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i40e: make functions static and remove dead code
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28 #include "i40e_type.h"
29 #include "i40e_adminq.h"
30 #include "i40e_prototype.h"
31 #include "i40e_virtchnl.h"
32
33 /**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40 static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41 {
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73 }
74
75 /**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83 void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85 {
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126 }
127
128 /**
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
131 *
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
139 **/
140 i40e_status i40e_init_shared_code(struct i40e_hw *hw)
141 {
142 i40e_status status = 0;
143 u32 reg;
144
145 hw->phy.get_link_info = true;
146
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
151 hw->port = (u8)reg;
152
153 i40e_set_mac_type(hw);
154
155 switch (hw->mac.type) {
156 case I40E_MAC_XL710:
157 break;
158 default:
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
160 break;
161 }
162
163 status = i40e_init_nvm(hw);
164 return status;
165 }
166
167 /**
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
173 **/
174 static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
175 u16 *flags,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
178 {
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
182 i40e_status status;
183
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
186
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
190
191 return status;
192 }
193
194 /**
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
200 **/
201 i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
204 {
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
208 i40e_status status;
209
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
215
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
217
218 return status;
219 }
220
221 /**
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
225 *
226 * Reads the adapter's MAC address from register
227 **/
228 i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
229 {
230 struct i40e_aqc_mac_address_read_data addrs;
231 i40e_status status;
232 u16 flags = 0;
233
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
235
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
238
239 return status;
240 }
241
242 /**
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
245 *
246 * Tests a MAC address to ensure it is a valid Individual Address
247 **/
248 i40e_status i40e_validate_mac_addr(u8 *mac_addr)
249 {
250 i40e_status status = 0;
251
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
265 }
266 return status;
267 }
268
269 /**
270 * i40e_get_media_type - Gets media type
271 * @hw: pointer to the hardware structure
272 **/
273 static enum i40e_media_type i40e_get_media_type(struct i40e_hw *hw)
274 {
275 enum i40e_media_type media;
276
277 switch (hw->phy.link_info.phy_type) {
278 case I40E_PHY_TYPE_10GBASE_SR:
279 case I40E_PHY_TYPE_10GBASE_LR:
280 case I40E_PHY_TYPE_40GBASE_SR4:
281 case I40E_PHY_TYPE_40GBASE_LR4:
282 media = I40E_MEDIA_TYPE_FIBER;
283 break;
284 case I40E_PHY_TYPE_100BASE_TX:
285 case I40E_PHY_TYPE_1000BASE_T:
286 case I40E_PHY_TYPE_10GBASE_T:
287 media = I40E_MEDIA_TYPE_BASET;
288 break;
289 case I40E_PHY_TYPE_10GBASE_CR1_CU:
290 case I40E_PHY_TYPE_40GBASE_CR4_CU:
291 case I40E_PHY_TYPE_10GBASE_CR1:
292 case I40E_PHY_TYPE_40GBASE_CR4:
293 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
294 media = I40E_MEDIA_TYPE_DA;
295 break;
296 case I40E_PHY_TYPE_1000BASE_KX:
297 case I40E_PHY_TYPE_10GBASE_KX4:
298 case I40E_PHY_TYPE_10GBASE_KR:
299 case I40E_PHY_TYPE_40GBASE_KR4:
300 media = I40E_MEDIA_TYPE_BACKPLANE;
301 break;
302 case I40E_PHY_TYPE_SGMII:
303 case I40E_PHY_TYPE_XAUI:
304 case I40E_PHY_TYPE_XFI:
305 case I40E_PHY_TYPE_XLAUI:
306 case I40E_PHY_TYPE_XLPPI:
307 default:
308 media = I40E_MEDIA_TYPE_UNKNOWN;
309 break;
310 }
311
312 return media;
313 }
314
315 #define I40E_PF_RESET_WAIT_COUNT_A0 200
316 #define I40E_PF_RESET_WAIT_COUNT 10
317 /**
318 * i40e_pf_reset - Reset the PF
319 * @hw: pointer to the hardware structure
320 *
321 * Assuming someone else has triggered a global reset,
322 * assure the global reset is complete and then reset the PF
323 **/
324 i40e_status i40e_pf_reset(struct i40e_hw *hw)
325 {
326 u32 cnt = 0;
327 u32 reg = 0;
328 u32 grst_del;
329
330 /* Poll for Global Reset steady state in case of recent GRST.
331 * The grst delay value is in 100ms units, and we'll wait a
332 * couple counts longer to be sure we don't just miss the end.
333 */
334 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
335 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
336 for (cnt = 0; cnt < grst_del + 2; cnt++) {
337 reg = rd32(hw, I40E_GLGEN_RSTAT);
338 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
339 break;
340 msleep(100);
341 }
342 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
343 hw_dbg(hw, "Global reset polling failed to complete.\n");
344 return I40E_ERR_RESET_FAILED;
345 }
346
347 /* Determine the PF number based on the PCI fn */
348 reg = rd32(hw, I40E_GLPCI_CAPSUP);
349 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
350 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
351 else
352 hw->pf_id = (u8)hw->bus.func;
353
354 /* If there was a Global Reset in progress when we got here,
355 * we don't need to do the PF Reset
356 */
357 if (!cnt) {
358 if (hw->revision_id == 0)
359 cnt = I40E_PF_RESET_WAIT_COUNT_A0;
360 else
361 cnt = I40E_PF_RESET_WAIT_COUNT;
362 reg = rd32(hw, I40E_PFGEN_CTRL);
363 wr32(hw, I40E_PFGEN_CTRL,
364 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
365 for (; cnt; cnt--) {
366 reg = rd32(hw, I40E_PFGEN_CTRL);
367 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
368 break;
369 usleep_range(1000, 2000);
370 }
371 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
372 hw_dbg(hw, "PF reset polling failed to complete.\n");
373 return I40E_ERR_RESET_FAILED;
374 }
375 }
376
377 i40e_clear_pxe_mode(hw);
378 return 0;
379 }
380
381 /**
382 * i40e_clear_pxe_mode - clear pxe operations mode
383 * @hw: pointer to the hw struct
384 *
385 * Make sure all PXE mode settings are cleared, including things
386 * like descriptor fetch/write-back mode.
387 **/
388 void i40e_clear_pxe_mode(struct i40e_hw *hw)
389 {
390 u32 reg;
391
392 /* Clear single descriptor fetch/write-back mode */
393 reg = rd32(hw, I40E_GLLAN_RCTL_0);
394
395 if (hw->revision_id == 0) {
396 /* As a work around clear PXE_MODE instead of setting it */
397 wr32(hw, I40E_GLLAN_RCTL_0, (reg & (~I40E_GLLAN_RCTL_0_PXE_MODE_MASK)));
398 } else {
399 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
400 }
401 }
402
403 /**
404 * i40e_led_get - return current on/off mode
405 * @hw: pointer to the hw struct
406 *
407 * The value returned is the 'mode' field as defined in the
408 * GPIO register definitions: 0x0 = off, 0xf = on, and other
409 * values are variations of possible behaviors relating to
410 * blink, link, and wire.
411 **/
412 u32 i40e_led_get(struct i40e_hw *hw)
413 {
414 u32 gpio_val = 0;
415 u32 mode = 0;
416 u32 port;
417 int i;
418
419 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
420 if (!hw->func_caps.led[i])
421 continue;
422
423 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
424 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
425 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
426
427 if (port != hw->port)
428 continue;
429
430 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
431 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
432 break;
433 }
434
435 return mode;
436 }
437
438 /**
439 * i40e_led_set - set new on/off mode
440 * @hw: pointer to the hw struct
441 * @mode: 0=off, else on (see EAS for mode details)
442 **/
443 void i40e_led_set(struct i40e_hw *hw, u32 mode)
444 {
445 u32 gpio_val = 0;
446 u32 led_mode = 0;
447 u32 port;
448 int i;
449
450 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
451 if (!hw->func_caps.led[i])
452 continue;
453
454 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
455 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
456 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
457
458 if (port != hw->port)
459 continue;
460
461 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
462 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
463 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
464 gpio_val |= led_mode;
465 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
466 }
467 }
468
469 /* Admin command wrappers */
470 /**
471 * i40e_aq_queue_shutdown
472 * @hw: pointer to the hw struct
473 * @unloading: is the driver unloading itself
474 *
475 * Tell the Firmware that we're shutting down the AdminQ and whether
476 * or not the driver is unloading as well.
477 **/
478 i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
479 bool unloading)
480 {
481 struct i40e_aq_desc desc;
482 struct i40e_aqc_queue_shutdown *cmd =
483 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
484 i40e_status status;
485
486 i40e_fill_default_direct_cmd_desc(&desc,
487 i40e_aqc_opc_queue_shutdown);
488
489 if (unloading)
490 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
491 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
492
493 return status;
494 }
495
496 /**
497 * i40e_aq_set_link_restart_an
498 * @hw: pointer to the hw struct
499 * @cmd_details: pointer to command details structure or NULL
500 *
501 * Sets up the link and restarts the Auto-Negotiation over the link.
502 **/
503 i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
504 struct i40e_asq_cmd_details *cmd_details)
505 {
506 struct i40e_aq_desc desc;
507 struct i40e_aqc_set_link_restart_an *cmd =
508 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
509 i40e_status status;
510
511 i40e_fill_default_direct_cmd_desc(&desc,
512 i40e_aqc_opc_set_link_restart_an);
513
514 cmd->command = I40E_AQ_PHY_RESTART_AN;
515
516 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
517
518 return status;
519 }
520
521 /**
522 * i40e_aq_get_link_info
523 * @hw: pointer to the hw struct
524 * @enable_lse: enable/disable LinkStatusEvent reporting
525 * @link: pointer to link status structure - optional
526 * @cmd_details: pointer to command details structure or NULL
527 *
528 * Returns the link status of the adapter.
529 **/
530 i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
531 bool enable_lse, struct i40e_link_status *link,
532 struct i40e_asq_cmd_details *cmd_details)
533 {
534 struct i40e_aq_desc desc;
535 struct i40e_aqc_get_link_status *resp =
536 (struct i40e_aqc_get_link_status *)&desc.params.raw;
537 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
538 i40e_status status;
539 u16 command_flags;
540
541 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
542
543 if (enable_lse)
544 command_flags = I40E_AQ_LSE_ENABLE;
545 else
546 command_flags = I40E_AQ_LSE_DISABLE;
547 resp->command_flags = cpu_to_le16(command_flags);
548
549 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
550
551 if (status)
552 goto aq_get_link_info_exit;
553
554 /* save off old link status information */
555 memcpy(&hw->phy.link_info_old, hw_link_info,
556 sizeof(struct i40e_link_status));
557
558 /* update link status */
559 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
560 hw->phy.media_type = i40e_get_media_type(hw);
561 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
562 hw_link_info->link_info = resp->link_info;
563 hw_link_info->an_info = resp->an_info;
564 hw_link_info->ext_info = resp->ext_info;
565 hw_link_info->loopback = resp->loopback;
566
567 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
568 hw_link_info->lse_enable = true;
569 else
570 hw_link_info->lse_enable = false;
571
572 /* save link status information */
573 if (link)
574 *link = *hw_link_info;
575
576 /* flag cleared so helper functions don't call AQ again */
577 hw->phy.get_link_info = false;
578
579 aq_get_link_info_exit:
580 return status;
581 }
582
583 /**
584 * i40e_aq_add_vsi
585 * @hw: pointer to the hw struct
586 * @vsi: pointer to a vsi context struct
587 * @cmd_details: pointer to command details structure or NULL
588 *
589 * Add a VSI context to the hardware.
590 **/
591 i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
592 struct i40e_vsi_context *vsi_ctx,
593 struct i40e_asq_cmd_details *cmd_details)
594 {
595 struct i40e_aq_desc desc;
596 struct i40e_aqc_add_get_update_vsi *cmd =
597 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
598 struct i40e_aqc_add_get_update_vsi_completion *resp =
599 (struct i40e_aqc_add_get_update_vsi_completion *)
600 &desc.params.raw;
601 i40e_status status;
602
603 i40e_fill_default_direct_cmd_desc(&desc,
604 i40e_aqc_opc_add_vsi);
605
606 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
607 cmd->connection_type = vsi_ctx->connection_type;
608 cmd->vf_id = vsi_ctx->vf_num;
609 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
610
611 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
612 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
613 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
614
615 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
616 sizeof(vsi_ctx->info), cmd_details);
617
618 if (status)
619 goto aq_add_vsi_exit;
620
621 vsi_ctx->seid = le16_to_cpu(resp->seid);
622 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
623 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
624 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
625
626 aq_add_vsi_exit:
627 return status;
628 }
629
630 /**
631 * i40e_aq_set_vsi_unicast_promiscuous
632 * @hw: pointer to the hw struct
633 * @seid: vsi number
634 * @set: set unicast promiscuous enable/disable
635 * @cmd_details: pointer to command details structure or NULL
636 **/
637 i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
638 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
639 {
640 struct i40e_aq_desc desc;
641 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
642 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
643 i40e_status status;
644 u16 flags = 0;
645
646 i40e_fill_default_direct_cmd_desc(&desc,
647 i40e_aqc_opc_set_vsi_promiscuous_modes);
648
649 if (set)
650 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
651
652 cmd->promiscuous_flags = cpu_to_le16(flags);
653
654 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
655
656 cmd->seid = cpu_to_le16(seid);
657 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
658
659 return status;
660 }
661
662 /**
663 * i40e_aq_set_vsi_multicast_promiscuous
664 * @hw: pointer to the hw struct
665 * @seid: vsi number
666 * @set: set multicast promiscuous enable/disable
667 * @cmd_details: pointer to command details structure or NULL
668 **/
669 i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
670 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
671 {
672 struct i40e_aq_desc desc;
673 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
674 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
675 i40e_status status;
676 u16 flags = 0;
677
678 i40e_fill_default_direct_cmd_desc(&desc,
679 i40e_aqc_opc_set_vsi_promiscuous_modes);
680
681 if (set)
682 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
683
684 cmd->promiscuous_flags = cpu_to_le16(flags);
685
686 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
687
688 cmd->seid = cpu_to_le16(seid);
689 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
690
691 return status;
692 }
693
694 /**
695 * i40e_aq_set_vsi_broadcast
696 * @hw: pointer to the hw struct
697 * @seid: vsi number
698 * @set_filter: true to set filter, false to clear filter
699 * @cmd_details: pointer to command details structure or NULL
700 *
701 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
702 **/
703 i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
704 u16 seid, bool set_filter,
705 struct i40e_asq_cmd_details *cmd_details)
706 {
707 struct i40e_aq_desc desc;
708 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
709 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
710 i40e_status status;
711
712 i40e_fill_default_direct_cmd_desc(&desc,
713 i40e_aqc_opc_set_vsi_promiscuous_modes);
714
715 if (set_filter)
716 cmd->promiscuous_flags
717 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
718 else
719 cmd->promiscuous_flags
720 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
721
722 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
723 cmd->seid = cpu_to_le16(seid);
724 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
725
726 return status;
727 }
728
729 /**
730 * i40e_get_vsi_params - get VSI configuration info
731 * @hw: pointer to the hw struct
732 * @vsi: pointer to a vsi context struct
733 * @cmd_details: pointer to command details structure or NULL
734 **/
735 i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
736 struct i40e_vsi_context *vsi_ctx,
737 struct i40e_asq_cmd_details *cmd_details)
738 {
739 struct i40e_aq_desc desc;
740 struct i40e_aqc_switch_seid *cmd =
741 (struct i40e_aqc_switch_seid *)&desc.params.raw;
742 struct i40e_aqc_add_get_update_vsi_completion *resp =
743 (struct i40e_aqc_add_get_update_vsi_completion *)
744 &desc.params.raw;
745 i40e_status status;
746
747 i40e_fill_default_direct_cmd_desc(&desc,
748 i40e_aqc_opc_get_vsi_parameters);
749
750 cmd->seid = cpu_to_le16(vsi_ctx->seid);
751
752 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
753 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
754 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
755
756 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
757 sizeof(vsi_ctx->info), NULL);
758
759 if (status)
760 goto aq_get_vsi_params_exit;
761
762 vsi_ctx->seid = le16_to_cpu(resp->seid);
763 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
764 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
765 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
766
767 aq_get_vsi_params_exit:
768 return status;
769 }
770
771 /**
772 * i40e_aq_update_vsi_params
773 * @hw: pointer to the hw struct
774 * @vsi: pointer to a vsi context struct
775 * @cmd_details: pointer to command details structure or NULL
776 *
777 * Update a VSI context.
778 **/
779 i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
780 struct i40e_vsi_context *vsi_ctx,
781 struct i40e_asq_cmd_details *cmd_details)
782 {
783 struct i40e_aq_desc desc;
784 struct i40e_aqc_switch_seid *cmd =
785 (struct i40e_aqc_switch_seid *)&desc.params.raw;
786 i40e_status status;
787
788 i40e_fill_default_direct_cmd_desc(&desc,
789 i40e_aqc_opc_update_vsi_parameters);
790 cmd->seid = cpu_to_le16(vsi_ctx->seid);
791
792 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
793 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
794 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
795
796 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
797 sizeof(vsi_ctx->info), cmd_details);
798
799 return status;
800 }
801
802 /**
803 * i40e_aq_get_switch_config
804 * @hw: pointer to the hardware structure
805 * @buf: pointer to the result buffer
806 * @buf_size: length of input buffer
807 * @start_seid: seid to start for the report, 0 == beginning
808 * @cmd_details: pointer to command details structure or NULL
809 *
810 * Fill the buf with switch configuration returned from AdminQ command
811 **/
812 i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
813 struct i40e_aqc_get_switch_config_resp *buf,
814 u16 buf_size, u16 *start_seid,
815 struct i40e_asq_cmd_details *cmd_details)
816 {
817 struct i40e_aq_desc desc;
818 struct i40e_aqc_switch_seid *scfg =
819 (struct i40e_aqc_switch_seid *)&desc.params.raw;
820 i40e_status status;
821
822 i40e_fill_default_direct_cmd_desc(&desc,
823 i40e_aqc_opc_get_switch_config);
824 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
825 if (buf_size > I40E_AQ_LARGE_BUF)
826 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
827 scfg->seid = cpu_to_le16(*start_seid);
828
829 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
830 *start_seid = le16_to_cpu(scfg->seid);
831
832 return status;
833 }
834
835 /**
836 * i40e_aq_get_firmware_version
837 * @hw: pointer to the hw struct
838 * @fw_major_version: firmware major version
839 * @fw_minor_version: firmware minor version
840 * @api_major_version: major queue version
841 * @api_minor_version: minor queue version
842 * @cmd_details: pointer to command details structure or NULL
843 *
844 * Get the firmware version from the admin queue commands
845 **/
846 i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
847 u16 *fw_major_version, u16 *fw_minor_version,
848 u16 *api_major_version, u16 *api_minor_version,
849 struct i40e_asq_cmd_details *cmd_details)
850 {
851 struct i40e_aq_desc desc;
852 struct i40e_aqc_get_version *resp =
853 (struct i40e_aqc_get_version *)&desc.params.raw;
854 i40e_status status;
855
856 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
857
858 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
859
860 if (!status) {
861 if (fw_major_version != NULL)
862 *fw_major_version = le16_to_cpu(resp->fw_major);
863 if (fw_minor_version != NULL)
864 *fw_minor_version = le16_to_cpu(resp->fw_minor);
865 if (api_major_version != NULL)
866 *api_major_version = le16_to_cpu(resp->api_major);
867 if (api_minor_version != NULL)
868 *api_minor_version = le16_to_cpu(resp->api_minor);
869 }
870
871 return status;
872 }
873
874 /**
875 * i40e_aq_send_driver_version
876 * @hw: pointer to the hw struct
877 * @event: driver event: driver ok, start or stop
878 * @dv: driver's major, minor version
879 * @cmd_details: pointer to command details structure or NULL
880 *
881 * Send the driver version to the firmware
882 **/
883 i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
884 struct i40e_driver_version *dv,
885 struct i40e_asq_cmd_details *cmd_details)
886 {
887 struct i40e_aq_desc desc;
888 struct i40e_aqc_driver_version *cmd =
889 (struct i40e_aqc_driver_version *)&desc.params.raw;
890 i40e_status status;
891
892 if (dv == NULL)
893 return I40E_ERR_PARAM;
894
895 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
896
897 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
898 cmd->driver_major_ver = dv->major_version;
899 cmd->driver_minor_ver = dv->minor_version;
900 cmd->driver_build_ver = dv->build_version;
901 cmd->driver_subbuild_ver = dv->subbuild_version;
902 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
903
904 return status;
905 }
906
907 /**
908 * i40e_get_link_status - get status of the HW network link
909 * @hw: pointer to the hw struct
910 *
911 * Returns true if link is up, false if link is down.
912 *
913 * Side effect: LinkStatusEvent reporting becomes enabled
914 **/
915 bool i40e_get_link_status(struct i40e_hw *hw)
916 {
917 i40e_status status = 0;
918 bool link_status = false;
919
920 if (hw->phy.get_link_info) {
921 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
922
923 if (status)
924 goto i40e_get_link_status_exit;
925 }
926
927 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
928
929 i40e_get_link_status_exit:
930 return link_status;
931 }
932
933 /**
934 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
935 * @hw: pointer to the hw struct
936 * @uplink_seid: the MAC or other gizmo SEID
937 * @downlink_seid: the VSI SEID
938 * @enabled_tc: bitmap of TCs to be enabled
939 * @default_port: true for default port VSI, false for control port
940 * @enable_l2_filtering: true to add L2 filter table rules to regular forwarding rules for cloud support
941 * @veb_seid: pointer to where to put the resulting VEB SEID
942 * @cmd_details: pointer to command details structure or NULL
943 *
944 * This asks the FW to add a VEB between the uplink and downlink
945 * elements. If the uplink SEID is 0, this will be a floating VEB.
946 **/
947 i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
948 u16 downlink_seid, u8 enabled_tc,
949 bool default_port, bool enable_l2_filtering,
950 u16 *veb_seid,
951 struct i40e_asq_cmd_details *cmd_details)
952 {
953 struct i40e_aq_desc desc;
954 struct i40e_aqc_add_veb *cmd =
955 (struct i40e_aqc_add_veb *)&desc.params.raw;
956 struct i40e_aqc_add_veb_completion *resp =
957 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
958 i40e_status status;
959 u16 veb_flags = 0;
960
961 /* SEIDs need to either both be set or both be 0 for floating VEB */
962 if (!!uplink_seid != !!downlink_seid)
963 return I40E_ERR_PARAM;
964
965 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
966
967 cmd->uplink_seid = cpu_to_le16(uplink_seid);
968 cmd->downlink_seid = cpu_to_le16(downlink_seid);
969 cmd->enable_tcs = enabled_tc;
970 if (!uplink_seid)
971 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
972 if (default_port)
973 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
974 else
975 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
976
977 if (enable_l2_filtering)
978 veb_flags |= I40E_AQC_ADD_VEB_ENABLE_L2_FILTER;
979
980 cmd->veb_flags = cpu_to_le16(veb_flags);
981
982 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
983
984 if (!status && veb_seid)
985 *veb_seid = le16_to_cpu(resp->veb_seid);
986
987 return status;
988 }
989
990 /**
991 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
992 * @hw: pointer to the hw struct
993 * @veb_seid: the SEID of the VEB to query
994 * @switch_id: the uplink switch id
995 * @floating_veb: set to true if the VEB is floating
996 * @statistic_index: index of the stats counter block for this VEB
997 * @vebs_used: number of VEB's used by function
998 * @vebs_unallocated: total VEB's not reserved by any function
999 * @cmd_details: pointer to command details structure or NULL
1000 *
1001 * This retrieves the parameters for a particular VEB, specified by
1002 * uplink_seid, and returns them to the caller.
1003 **/
1004 i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
1005 u16 veb_seid, u16 *switch_id,
1006 bool *floating, u16 *statistic_index,
1007 u16 *vebs_used, u16 *vebs_free,
1008 struct i40e_asq_cmd_details *cmd_details)
1009 {
1010 struct i40e_aq_desc desc;
1011 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
1012 (struct i40e_aqc_get_veb_parameters_completion *)
1013 &desc.params.raw;
1014 i40e_status status;
1015
1016 if (veb_seid == 0)
1017 return I40E_ERR_PARAM;
1018
1019 i40e_fill_default_direct_cmd_desc(&desc,
1020 i40e_aqc_opc_get_veb_parameters);
1021 cmd_resp->seid = cpu_to_le16(veb_seid);
1022
1023 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1024 if (status)
1025 goto get_veb_exit;
1026
1027 if (switch_id)
1028 *switch_id = le16_to_cpu(cmd_resp->switch_id);
1029 if (statistic_index)
1030 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
1031 if (vebs_used)
1032 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
1033 if (vebs_free)
1034 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
1035 if (floating) {
1036 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
1037 if (flags & I40E_AQC_ADD_VEB_FLOATING)
1038 *floating = true;
1039 else
1040 *floating = false;
1041 }
1042
1043 get_veb_exit:
1044 return status;
1045 }
1046
1047 /**
1048 * i40e_aq_add_macvlan
1049 * @hw: pointer to the hw struct
1050 * @seid: VSI for the mac address
1051 * @mv_list: list of macvlans to be added
1052 * @count: length of the list
1053 * @cmd_details: pointer to command details structure or NULL
1054 *
1055 * Add MAC/VLAN addresses to the HW filtering
1056 **/
1057 i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
1058 struct i40e_aqc_add_macvlan_element_data *mv_list,
1059 u16 count, struct i40e_asq_cmd_details *cmd_details)
1060 {
1061 struct i40e_aq_desc desc;
1062 struct i40e_aqc_macvlan *cmd =
1063 (struct i40e_aqc_macvlan *)&desc.params.raw;
1064 i40e_status status;
1065 u16 buf_size;
1066
1067 if (count == 0 || !mv_list || !hw)
1068 return I40E_ERR_PARAM;
1069
1070 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1071
1072 /* prep the rest of the request */
1073 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1074 cmd->num_addresses = cpu_to_le16(count);
1075 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1076 cmd->seid[1] = 0;
1077 cmd->seid[2] = 0;
1078
1079 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1080 if (buf_size > I40E_AQ_LARGE_BUF)
1081 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1082
1083 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1084 cmd_details);
1085
1086 return status;
1087 }
1088
1089 /**
1090 * i40e_aq_remove_macvlan
1091 * @hw: pointer to the hw struct
1092 * @seid: VSI for the mac address
1093 * @mv_list: list of macvlans to be removed
1094 * @count: length of the list
1095 * @cmd_details: pointer to command details structure or NULL
1096 *
1097 * Remove MAC/VLAN addresses from the HW filtering
1098 **/
1099 i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1100 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1101 u16 count, struct i40e_asq_cmd_details *cmd_details)
1102 {
1103 struct i40e_aq_desc desc;
1104 struct i40e_aqc_macvlan *cmd =
1105 (struct i40e_aqc_macvlan *)&desc.params.raw;
1106 i40e_status status;
1107 u16 buf_size;
1108
1109 if (count == 0 || !mv_list || !hw)
1110 return I40E_ERR_PARAM;
1111
1112 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1113
1114 /* prep the rest of the request */
1115 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1116 cmd->num_addresses = cpu_to_le16(count);
1117 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1118 cmd->seid[1] = 0;
1119 cmd->seid[2] = 0;
1120
1121 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1122 if (buf_size > I40E_AQ_LARGE_BUF)
1123 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1124
1125 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1126 cmd_details);
1127
1128 return status;
1129 }
1130
1131 /**
1132 * i40e_aq_send_msg_to_vf
1133 * @hw: pointer to the hardware structure
1134 * @vfid: vf id to send msg
1135 * @msg: pointer to the msg buffer
1136 * @msglen: msg length
1137 * @cmd_details: pointer to command details
1138 *
1139 * send msg to vf
1140 **/
1141 i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1142 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1143 struct i40e_asq_cmd_details *cmd_details)
1144 {
1145 struct i40e_aq_desc desc;
1146 struct i40e_aqc_pf_vf_message *cmd =
1147 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1148 i40e_status status;
1149
1150 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1151 cmd->id = cpu_to_le32(vfid);
1152 desc.cookie_high = cpu_to_le32(v_opcode);
1153 desc.cookie_low = cpu_to_le32(v_retval);
1154 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1155 if (msglen) {
1156 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1157 I40E_AQ_FLAG_RD));
1158 if (msglen > I40E_AQ_LARGE_BUF)
1159 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1160 desc.datalen = cpu_to_le16(msglen);
1161 }
1162 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1163
1164 return status;
1165 }
1166
1167 /**
1168 * i40e_aq_set_hmc_resource_profile
1169 * @hw: pointer to the hw struct
1170 * @profile: type of profile the HMC is to be set as
1171 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1172 * @cmd_details: pointer to command details structure or NULL
1173 *
1174 * set the HMC profile of the device.
1175 **/
1176 i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1177 enum i40e_aq_hmc_profile profile,
1178 u8 pe_vf_enabled_count,
1179 struct i40e_asq_cmd_details *cmd_details)
1180 {
1181 struct i40e_aq_desc desc;
1182 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1183 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1184 i40e_status status;
1185
1186 i40e_fill_default_direct_cmd_desc(&desc,
1187 i40e_aqc_opc_set_hmc_resource_profile);
1188
1189 cmd->pm_profile = (u8)profile;
1190 cmd->pe_vf_enabled = pe_vf_enabled_count;
1191
1192 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1193
1194 return status;
1195 }
1196
1197 /**
1198 * i40e_aq_request_resource
1199 * @hw: pointer to the hw struct
1200 * @resource: resource id
1201 * @access: access type
1202 * @sdp_number: resource number
1203 * @timeout: the maximum time in ms that the driver may hold the resource
1204 * @cmd_details: pointer to command details structure or NULL
1205 *
1206 * requests common resource using the admin queue commands
1207 **/
1208 i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1209 enum i40e_aq_resources_ids resource,
1210 enum i40e_aq_resource_access_type access,
1211 u8 sdp_number, u64 *timeout,
1212 struct i40e_asq_cmd_details *cmd_details)
1213 {
1214 struct i40e_aq_desc desc;
1215 struct i40e_aqc_request_resource *cmd_resp =
1216 (struct i40e_aqc_request_resource *)&desc.params.raw;
1217 i40e_status status;
1218
1219 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1220
1221 cmd_resp->resource_id = cpu_to_le16(resource);
1222 cmd_resp->access_type = cpu_to_le16(access);
1223 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1224
1225 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1226 /* The completion specifies the maximum time in ms that the driver
1227 * may hold the resource in the Timeout field.
1228 * If the resource is held by someone else, the command completes with
1229 * busy return value and the timeout field indicates the maximum time
1230 * the current owner of the resource has to free it.
1231 */
1232 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1233 *timeout = le32_to_cpu(cmd_resp->timeout);
1234
1235 return status;
1236 }
1237
1238 /**
1239 * i40e_aq_release_resource
1240 * @hw: pointer to the hw struct
1241 * @resource: resource id
1242 * @sdp_number: resource number
1243 * @cmd_details: pointer to command details structure or NULL
1244 *
1245 * release common resource using the admin queue commands
1246 **/
1247 i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1248 enum i40e_aq_resources_ids resource,
1249 u8 sdp_number,
1250 struct i40e_asq_cmd_details *cmd_details)
1251 {
1252 struct i40e_aq_desc desc;
1253 struct i40e_aqc_request_resource *cmd =
1254 (struct i40e_aqc_request_resource *)&desc.params.raw;
1255 i40e_status status;
1256
1257 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1258
1259 cmd->resource_id = cpu_to_le16(resource);
1260 cmd->resource_number = cpu_to_le32(sdp_number);
1261
1262 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1263
1264 return status;
1265 }
1266
1267 /**
1268 * i40e_aq_read_nvm
1269 * @hw: pointer to the hw struct
1270 * @module_pointer: module pointer location in words from the NVM beginning
1271 * @offset: byte offset from the module beginning
1272 * @length: length of the section to be read (in bytes from the offset)
1273 * @data: command buffer (size [bytes] = length)
1274 * @last_command: tells if this is the last command in a series
1275 * @cmd_details: pointer to command details structure or NULL
1276 *
1277 * Read the NVM using the admin queue commands
1278 **/
1279 i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1280 u32 offset, u16 length, void *data,
1281 bool last_command,
1282 struct i40e_asq_cmd_details *cmd_details)
1283 {
1284 struct i40e_aq_desc desc;
1285 struct i40e_aqc_nvm_update *cmd =
1286 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1287 i40e_status status;
1288
1289 /* In offset the highest byte must be zeroed. */
1290 if (offset & 0xFF000000) {
1291 status = I40E_ERR_PARAM;
1292 goto i40e_aq_read_nvm_exit;
1293 }
1294
1295 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1296
1297 /* If this is the last command in a series, set the proper flag. */
1298 if (last_command)
1299 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1300 cmd->module_pointer = module_pointer;
1301 cmd->offset = cpu_to_le32(offset);
1302 cmd->length = cpu_to_le16(length);
1303
1304 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1305 if (length > I40E_AQ_LARGE_BUF)
1306 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1307
1308 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1309
1310 i40e_aq_read_nvm_exit:
1311 return status;
1312 }
1313
1314 #define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1315 #define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1316 #define I40E_DEV_FUNC_CAP_NPAR 0x03
1317 #define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1318 #define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1319 #define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1320 #define I40E_DEV_FUNC_CAP_VF 0x13
1321 #define I40E_DEV_FUNC_CAP_VMDQ 0x14
1322 #define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1323 #define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1324 #define I40E_DEV_FUNC_CAP_VSI 0x17
1325 #define I40E_DEV_FUNC_CAP_DCB 0x18
1326 #define I40E_DEV_FUNC_CAP_FCOE 0x21
1327 #define I40E_DEV_FUNC_CAP_RSS 0x40
1328 #define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1329 #define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1330 #define I40E_DEV_FUNC_CAP_MSIX 0x43
1331 #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1332 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1333 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1334 #define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1335 #define I40E_DEV_FUNC_CAP_CEM 0xF2
1336 #define I40E_DEV_FUNC_CAP_IWARP 0x51
1337 #define I40E_DEV_FUNC_CAP_LED 0x61
1338 #define I40E_DEV_FUNC_CAP_SDP 0x62
1339 #define I40E_DEV_FUNC_CAP_MDIO 0x63
1340
1341 /**
1342 * i40e_parse_discover_capabilities
1343 * @hw: pointer to the hw struct
1344 * @buff: pointer to a buffer containing device/function capability records
1345 * @cap_count: number of capability records in the list
1346 * @list_type_opc: type of capabilities list to parse
1347 *
1348 * Parse the device/function capabilities list.
1349 **/
1350 static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1351 u32 cap_count,
1352 enum i40e_admin_queue_opc list_type_opc)
1353 {
1354 struct i40e_aqc_list_capabilities_element_resp *cap;
1355 u32 number, logical_id, phys_id;
1356 struct i40e_hw_capabilities *p;
1357 u32 reg_val;
1358 u32 i = 0;
1359 u16 id;
1360
1361 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1362
1363 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1364 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1365 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1366 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1367 else
1368 return;
1369
1370 for (i = 0; i < cap_count; i++, cap++) {
1371 id = le16_to_cpu(cap->id);
1372 number = le32_to_cpu(cap->number);
1373 logical_id = le32_to_cpu(cap->logical_id);
1374 phys_id = le32_to_cpu(cap->phys_id);
1375
1376 switch (id) {
1377 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1378 p->switch_mode = number;
1379 break;
1380 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1381 p->management_mode = number;
1382 break;
1383 case I40E_DEV_FUNC_CAP_NPAR:
1384 p->npar_enable = number;
1385 break;
1386 case I40E_DEV_FUNC_CAP_OS2BMC:
1387 p->os2bmc = number;
1388 break;
1389 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1390 p->valid_functions = number;
1391 break;
1392 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1393 if (number == 1)
1394 p->sr_iov_1_1 = true;
1395 break;
1396 case I40E_DEV_FUNC_CAP_VF:
1397 p->num_vfs = number;
1398 p->vf_base_id = logical_id;
1399 break;
1400 case I40E_DEV_FUNC_CAP_VMDQ:
1401 if (number == 1)
1402 p->vmdq = true;
1403 break;
1404 case I40E_DEV_FUNC_CAP_802_1_QBG:
1405 if (number == 1)
1406 p->evb_802_1_qbg = true;
1407 break;
1408 case I40E_DEV_FUNC_CAP_802_1_QBH:
1409 if (number == 1)
1410 p->evb_802_1_qbh = true;
1411 break;
1412 case I40E_DEV_FUNC_CAP_VSI:
1413 p->num_vsis = number;
1414 break;
1415 case I40E_DEV_FUNC_CAP_DCB:
1416 if (number == 1) {
1417 p->dcb = true;
1418 p->enabled_tcmap = logical_id;
1419 p->maxtc = phys_id;
1420 }
1421 break;
1422 case I40E_DEV_FUNC_CAP_FCOE:
1423 if (number == 1)
1424 p->fcoe = true;
1425 break;
1426 case I40E_DEV_FUNC_CAP_RSS:
1427 p->rss = true;
1428 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1429 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1430 p->rss_table_size = number;
1431 else
1432 p->rss_table_size = 128;
1433 p->rss_table_entry_width = logical_id;
1434 break;
1435 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1436 p->num_rx_qp = number;
1437 p->base_queue = phys_id;
1438 break;
1439 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1440 p->num_tx_qp = number;
1441 p->base_queue = phys_id;
1442 break;
1443 case I40E_DEV_FUNC_CAP_MSIX:
1444 p->num_msix_vectors = number;
1445 break;
1446 case I40E_DEV_FUNC_CAP_MSIX_VF:
1447 p->num_msix_vectors_vf = number;
1448 break;
1449 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1450 if (number == 1)
1451 p->mfp_mode_1 = true;
1452 break;
1453 case I40E_DEV_FUNC_CAP_CEM:
1454 if (number == 1)
1455 p->mgmt_cem = true;
1456 break;
1457 case I40E_DEV_FUNC_CAP_IWARP:
1458 if (number == 1)
1459 p->iwarp = true;
1460 break;
1461 case I40E_DEV_FUNC_CAP_LED:
1462 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1463 p->led[phys_id] = true;
1464 break;
1465 case I40E_DEV_FUNC_CAP_SDP:
1466 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1467 p->sdp[phys_id] = true;
1468 break;
1469 case I40E_DEV_FUNC_CAP_MDIO:
1470 if (number == 1) {
1471 p->mdio_port_num = phys_id;
1472 p->mdio_port_mode = logical_id;
1473 }
1474 break;
1475 case I40E_DEV_FUNC_CAP_IEEE_1588:
1476 if (number == 1)
1477 p->ieee_1588 = true;
1478 break;
1479 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1480 p->fd = true;
1481 p->fd_filters_guaranteed = number;
1482 p->fd_filters_best_effort = logical_id;
1483 break;
1484 default:
1485 break;
1486 }
1487 }
1488
1489 /* additional HW specific goodies that might
1490 * someday be HW version specific
1491 */
1492 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1493 }
1494
1495 /**
1496 * i40e_aq_discover_capabilities
1497 * @hw: pointer to the hw struct
1498 * @buff: a virtual buffer to hold the capabilities
1499 * @buff_size: Size of the virtual buffer
1500 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1501 * @list_type_opc: capabilities type to discover - pass in the command opcode
1502 * @cmd_details: pointer to command details structure or NULL
1503 *
1504 * Get the device capabilities descriptions from the firmware
1505 **/
1506 i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1507 void *buff, u16 buff_size, u16 *data_size,
1508 enum i40e_admin_queue_opc list_type_opc,
1509 struct i40e_asq_cmd_details *cmd_details)
1510 {
1511 struct i40e_aqc_list_capabilites *cmd;
1512 i40e_status status = 0;
1513 struct i40e_aq_desc desc;
1514
1515 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1516
1517 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1518 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1519 status = I40E_ERR_PARAM;
1520 goto exit;
1521 }
1522
1523 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1524
1525 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1526 if (buff_size > I40E_AQ_LARGE_BUF)
1527 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1528
1529 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1530 *data_size = le16_to_cpu(desc.datalen);
1531
1532 if (status)
1533 goto exit;
1534
1535 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1536 list_type_opc);
1537
1538 exit:
1539 return status;
1540 }
1541
1542 /**
1543 * i40e_aq_get_lldp_mib
1544 * @hw: pointer to the hw struct
1545 * @bridge_type: type of bridge requested
1546 * @mib_type: Local, Remote or both Local and Remote MIBs
1547 * @buff: pointer to a user supplied buffer to store the MIB block
1548 * @buff_size: size of the buffer (in bytes)
1549 * @local_len : length of the returned Local LLDP MIB
1550 * @remote_len: length of the returned Remote LLDP MIB
1551 * @cmd_details: pointer to command details structure or NULL
1552 *
1553 * Requests the complete LLDP MIB (entire packet).
1554 **/
1555 i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1556 u8 mib_type, void *buff, u16 buff_size,
1557 u16 *local_len, u16 *remote_len,
1558 struct i40e_asq_cmd_details *cmd_details)
1559 {
1560 struct i40e_aq_desc desc;
1561 struct i40e_aqc_lldp_get_mib *cmd =
1562 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1563 struct i40e_aqc_lldp_get_mib *resp =
1564 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1565 i40e_status status;
1566
1567 if (buff_size == 0 || !buff)
1568 return I40E_ERR_PARAM;
1569
1570 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1571 /* Indirect Command */
1572 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1573
1574 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1575 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1576 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1577
1578 desc.datalen = cpu_to_le16(buff_size);
1579
1580 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1581 if (buff_size > I40E_AQ_LARGE_BUF)
1582 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1583
1584 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1585 if (!status) {
1586 if (local_len != NULL)
1587 *local_len = le16_to_cpu(resp->local_len);
1588 if (remote_len != NULL)
1589 *remote_len = le16_to_cpu(resp->remote_len);
1590 }
1591
1592 return status;
1593 }
1594
1595 /**
1596 * i40e_aq_cfg_lldp_mib_change_event
1597 * @hw: pointer to the hw struct
1598 * @enable_update: Enable or Disable event posting
1599 * @cmd_details: pointer to command details structure or NULL
1600 *
1601 * Enable or Disable posting of an event on ARQ when LLDP MIB
1602 * associated with the interface changes
1603 **/
1604 i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1605 bool enable_update,
1606 struct i40e_asq_cmd_details *cmd_details)
1607 {
1608 struct i40e_aq_desc desc;
1609 struct i40e_aqc_lldp_update_mib *cmd =
1610 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1611 i40e_status status;
1612
1613 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1614
1615 if (!enable_update)
1616 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1617
1618 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1619
1620 return status;
1621 }
1622
1623 /**
1624 * i40e_aq_stop_lldp
1625 * @hw: pointer to the hw struct
1626 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1627 * @cmd_details: pointer to command details structure or NULL
1628 *
1629 * Stop or Shutdown the embedded LLDP Agent
1630 **/
1631 i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1632 struct i40e_asq_cmd_details *cmd_details)
1633 {
1634 struct i40e_aq_desc desc;
1635 struct i40e_aqc_lldp_stop *cmd =
1636 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1637 i40e_status status;
1638
1639 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1640
1641 if (shutdown_agent)
1642 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1643
1644 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1645
1646 return status;
1647 }
1648
1649 /**
1650 * i40e_aq_start_lldp
1651 * @hw: pointer to the hw struct
1652 * @cmd_details: pointer to command details structure or NULL
1653 *
1654 * Start the embedded LLDP Agent on all ports.
1655 **/
1656 i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1657 struct i40e_asq_cmd_details *cmd_details)
1658 {
1659 struct i40e_aq_desc desc;
1660 struct i40e_aqc_lldp_start *cmd =
1661 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1662 i40e_status status;
1663
1664 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1665
1666 cmd->command = I40E_AQ_LLDP_AGENT_START;
1667
1668 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1669
1670 return status;
1671 }
1672
1673 /**
1674 * i40e_aq_delete_element - Delete switch element
1675 * @hw: pointer to the hw struct
1676 * @seid: the SEID to delete from the switch
1677 * @cmd_details: pointer to command details structure or NULL
1678 *
1679 * This deletes a switch element from the switch.
1680 **/
1681 i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1682 struct i40e_asq_cmd_details *cmd_details)
1683 {
1684 struct i40e_aq_desc desc;
1685 struct i40e_aqc_switch_seid *cmd =
1686 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1687 i40e_status status;
1688
1689 if (seid == 0)
1690 return I40E_ERR_PARAM;
1691
1692 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1693
1694 cmd->seid = cpu_to_le16(seid);
1695
1696 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1697
1698 return status;
1699 }
1700
1701 /**
1702 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1703 * @hw: pointer to the hw struct
1704 * @seid: seid for the physical port/switching component/vsi
1705 * @buff: Indirect buffer to hold data parameters and response
1706 * @buff_size: Indirect buffer size
1707 * @opcode: Tx scheduler AQ command opcode
1708 * @cmd_details: pointer to command details structure or NULL
1709 *
1710 * Generic command handler for Tx scheduler AQ commands
1711 **/
1712 static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1713 void *buff, u16 buff_size,
1714 enum i40e_admin_queue_opc opcode,
1715 struct i40e_asq_cmd_details *cmd_details)
1716 {
1717 struct i40e_aq_desc desc;
1718 struct i40e_aqc_tx_sched_ind *cmd =
1719 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1720 i40e_status status;
1721 bool cmd_param_flag = false;
1722
1723 switch (opcode) {
1724 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1725 case i40e_aqc_opc_configure_vsi_tc_bw:
1726 case i40e_aqc_opc_enable_switching_comp_ets:
1727 case i40e_aqc_opc_modify_switching_comp_ets:
1728 case i40e_aqc_opc_disable_switching_comp_ets:
1729 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1730 case i40e_aqc_opc_configure_switching_comp_bw_config:
1731 cmd_param_flag = true;
1732 break;
1733 case i40e_aqc_opc_query_vsi_bw_config:
1734 case i40e_aqc_opc_query_vsi_ets_sla_config:
1735 case i40e_aqc_opc_query_switching_comp_ets_config:
1736 case i40e_aqc_opc_query_port_ets_config:
1737 case i40e_aqc_opc_query_switching_comp_bw_config:
1738 cmd_param_flag = false;
1739 break;
1740 default:
1741 return I40E_ERR_PARAM;
1742 }
1743
1744 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1745
1746 /* Indirect command */
1747 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1748 if (cmd_param_flag)
1749 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1750 if (buff_size > I40E_AQ_LARGE_BUF)
1751 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1752
1753 desc.datalen = cpu_to_le16(buff_size);
1754
1755 cmd->vsi_seid = cpu_to_le16(seid);
1756
1757 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1758
1759 return status;
1760 }
1761
1762 /**
1763 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1764 * @hw: pointer to the hw struct
1765 * @seid: VSI seid
1766 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1767 * @cmd_details: pointer to command details structure or NULL
1768 **/
1769 i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1770 u16 seid,
1771 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1772 struct i40e_asq_cmd_details *cmd_details)
1773 {
1774 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1775 i40e_aqc_opc_configure_vsi_tc_bw,
1776 cmd_details);
1777 }
1778
1779 /**
1780 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1781 * @hw: pointer to the hw struct
1782 * @seid: seid of the VSI
1783 * @bw_data: Buffer to hold VSI BW configuration
1784 * @cmd_details: pointer to command details structure or NULL
1785 **/
1786 i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1787 u16 seid,
1788 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1789 struct i40e_asq_cmd_details *cmd_details)
1790 {
1791 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1792 i40e_aqc_opc_query_vsi_bw_config,
1793 cmd_details);
1794 }
1795
1796 /**
1797 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1798 * @hw: pointer to the hw struct
1799 * @seid: seid of the VSI
1800 * @bw_data: Buffer to hold VSI BW configuration per TC
1801 * @cmd_details: pointer to command details structure or NULL
1802 **/
1803 i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1804 u16 seid,
1805 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1806 struct i40e_asq_cmd_details *cmd_details)
1807 {
1808 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1809 i40e_aqc_opc_query_vsi_ets_sla_config,
1810 cmd_details);
1811 }
1812
1813 /**
1814 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1815 * @hw: pointer to the hw struct
1816 * @seid: seid of the switching component
1817 * @bw_data: Buffer to hold switching component's per TC BW config
1818 * @cmd_details: pointer to command details structure or NULL
1819 **/
1820 i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1821 u16 seid,
1822 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1823 struct i40e_asq_cmd_details *cmd_details)
1824 {
1825 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1826 i40e_aqc_opc_query_switching_comp_ets_config,
1827 cmd_details);
1828 }
1829
1830 /**
1831 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1832 * @hw: pointer to the hw struct
1833 * @seid: seid of the VSI or switching component connected to Physical Port
1834 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1835 * @cmd_details: pointer to command details structure or NULL
1836 **/
1837 i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1838 u16 seid,
1839 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1840 struct i40e_asq_cmd_details *cmd_details)
1841 {
1842 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1843 i40e_aqc_opc_query_port_ets_config,
1844 cmd_details);
1845 }
1846
1847 /**
1848 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1849 * @hw: pointer to the hw struct
1850 * @seid: seid of the switching component
1851 * @bw_data: Buffer to hold switching component's BW configuration
1852 * @cmd_details: pointer to command details structure or NULL
1853 **/
1854 i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1855 u16 seid,
1856 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1857 struct i40e_asq_cmd_details *cmd_details)
1858 {
1859 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1860 i40e_aqc_opc_query_switching_comp_bw_config,
1861 cmd_details);
1862 }
1863
1864 /**
1865 * i40e_validate_filter_settings
1866 * @hw: pointer to the hardware structure
1867 * @settings: Filter control settings
1868 *
1869 * Check and validate the filter control settings passed.
1870 * The function checks for the valid filter/context sizes being
1871 * passed for FCoE and PE.
1872 *
1873 * Returns 0 if the values passed are valid and within
1874 * range else returns an error.
1875 **/
1876 static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1877 struct i40e_filter_control_settings *settings)
1878 {
1879 u32 fcoe_cntx_size, fcoe_filt_size;
1880 u32 pe_cntx_size, pe_filt_size;
1881 u32 fcoe_fmax, pe_fmax;
1882 u32 val;
1883
1884 /* Validate FCoE settings passed */
1885 switch (settings->fcoe_filt_num) {
1886 case I40E_HASH_FILTER_SIZE_1K:
1887 case I40E_HASH_FILTER_SIZE_2K:
1888 case I40E_HASH_FILTER_SIZE_4K:
1889 case I40E_HASH_FILTER_SIZE_8K:
1890 case I40E_HASH_FILTER_SIZE_16K:
1891 case I40E_HASH_FILTER_SIZE_32K:
1892 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1893 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1894 break;
1895 default:
1896 return I40E_ERR_PARAM;
1897 }
1898
1899 switch (settings->fcoe_cntx_num) {
1900 case I40E_DMA_CNTX_SIZE_512:
1901 case I40E_DMA_CNTX_SIZE_1K:
1902 case I40E_DMA_CNTX_SIZE_2K:
1903 case I40E_DMA_CNTX_SIZE_4K:
1904 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1905 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1906 break;
1907 default:
1908 return I40E_ERR_PARAM;
1909 }
1910
1911 /* Validate PE settings passed */
1912 switch (settings->pe_filt_num) {
1913 case I40E_HASH_FILTER_SIZE_1K:
1914 case I40E_HASH_FILTER_SIZE_2K:
1915 case I40E_HASH_FILTER_SIZE_4K:
1916 case I40E_HASH_FILTER_SIZE_8K:
1917 case I40E_HASH_FILTER_SIZE_16K:
1918 case I40E_HASH_FILTER_SIZE_32K:
1919 case I40E_HASH_FILTER_SIZE_64K:
1920 case I40E_HASH_FILTER_SIZE_128K:
1921 case I40E_HASH_FILTER_SIZE_256K:
1922 case I40E_HASH_FILTER_SIZE_512K:
1923 case I40E_HASH_FILTER_SIZE_1M:
1924 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1925 pe_filt_size <<= (u32)settings->pe_filt_num;
1926 break;
1927 default:
1928 return I40E_ERR_PARAM;
1929 }
1930
1931 switch (settings->pe_cntx_num) {
1932 case I40E_DMA_CNTX_SIZE_512:
1933 case I40E_DMA_CNTX_SIZE_1K:
1934 case I40E_DMA_CNTX_SIZE_2K:
1935 case I40E_DMA_CNTX_SIZE_4K:
1936 case I40E_DMA_CNTX_SIZE_8K:
1937 case I40E_DMA_CNTX_SIZE_16K:
1938 case I40E_DMA_CNTX_SIZE_32K:
1939 case I40E_DMA_CNTX_SIZE_64K:
1940 case I40E_DMA_CNTX_SIZE_128K:
1941 case I40E_DMA_CNTX_SIZE_256K:
1942 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1943 pe_cntx_size <<= (u32)settings->pe_cntx_num;
1944 break;
1945 default:
1946 return I40E_ERR_PARAM;
1947 }
1948
1949 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
1950 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
1951 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
1952 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
1953 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
1954 return I40E_ERR_INVALID_SIZE;
1955
1956 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
1957 val = rd32(hw, I40E_GLHMC_PEXFMAX);
1958 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
1959 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
1960 if (pe_filt_size + pe_cntx_size > pe_fmax)
1961 return I40E_ERR_INVALID_SIZE;
1962
1963 return 0;
1964 }
1965
1966 /**
1967 * i40e_set_filter_control
1968 * @hw: pointer to the hardware structure
1969 * @settings: Filter control settings
1970 *
1971 * Set the Queue Filters for PE/FCoE and enable filters required
1972 * for a single PF. It is expected that these settings are programmed
1973 * at the driver initialization time.
1974 **/
1975 i40e_status i40e_set_filter_control(struct i40e_hw *hw,
1976 struct i40e_filter_control_settings *settings)
1977 {
1978 i40e_status ret = 0;
1979 u32 hash_lut_size = 0;
1980 u32 val;
1981
1982 if (!settings)
1983 return I40E_ERR_PARAM;
1984
1985 /* Validate the input settings */
1986 ret = i40e_validate_filter_settings(hw, settings);
1987 if (ret)
1988 return ret;
1989
1990 /* Read the PF Queue Filter control register */
1991 val = rd32(hw, I40E_PFQF_CTL_0);
1992
1993 /* Program required PE hash buckets for the PF */
1994 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
1995 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
1996 I40E_PFQF_CTL_0_PEHSIZE_MASK;
1997 /* Program required PE contexts for the PF */
1998 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
1999 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2000 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2001
2002 /* Program required FCoE hash buckets for the PF */
2003 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2004 val |= ((u32)settings->fcoe_filt_num <<
2005 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2006 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2007 /* Program required FCoE DDP contexts for the PF */
2008 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2009 val |= ((u32)settings->fcoe_cntx_num <<
2010 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2011 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2012
2013 /* Program Hash LUT size for the PF */
2014 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2015 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2016 hash_lut_size = 1;
2017 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2018 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2019
2020 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2021 if (settings->enable_fdir)
2022 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2023 if (settings->enable_ethtype)
2024 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2025 if (settings->enable_macvlan)
2026 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2027
2028 wr32(hw, I40E_PFQF_CTL_0, val);
2029
2030 return 0;
2031 }
Linux kernel - Deliverables
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