1 /*******************************************************************************
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 ******************************************************************************/
28 #include "i40e_diag.h"
29 #include "i40e_prototype.h"
32 * i40e_diag_reg_pattern_test
33 * @hw: pointer to the hw struct
34 * @reg: reg to be tested
35 * @mask: bits to be touched
37 static i40e_status
i40e_diag_reg_pattern_test(struct i40e_hw
*hw
,
40 const u32 patterns
[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
41 u32 pat
, val
, orig_val
;
44 orig_val
= rd32(hw
, reg
);
45 for (i
= 0; i
< ARRAY_SIZE(patterns
); i
++) {
47 wr32(hw
, reg
, (pat
& mask
));
49 if ((val
& mask
) != (pat
& mask
)) {
50 i40e_debug(hw
, I40E_DEBUG_DIAG
,
51 "%s: reg pattern test failed - reg 0x%08x pat 0x%08x val 0x%08x\n",
52 __func__
, reg
, pat
, val
);
53 return I40E_ERR_DIAG_TEST_FAILED
;
57 wr32(hw
, reg
, orig_val
);
59 if (val
!= orig_val
) {
60 i40e_debug(hw
, I40E_DEBUG_DIAG
,
61 "%s: reg restore test failed - reg 0x%08x orig_val 0x%08x val 0x%08x\n",
62 __func__
, reg
, orig_val
, val
);
63 return I40E_ERR_DIAG_TEST_FAILED
;
69 struct i40e_diag_reg_test_info i40e_reg_list
[] = {
70 /* offset mask elements stride */
71 {I40E_QTX_CTL(0), 0x0000FFBF, 64, I40E_QTX_CTL(1) - I40E_QTX_CTL(0)},
72 {I40E_PFINT_ITR0(0), 0x00000FFF, 3, I40E_PFINT_ITR0(1) - I40E_PFINT_ITR0(0)},
73 {I40E_PFINT_ITRN(0, 0), 0x00000FFF, 64, I40E_PFINT_ITRN(0, 1) - I40E_PFINT_ITRN(0, 0)},
74 {I40E_PFINT_ITRN(1, 0), 0x00000FFF, 64, I40E_PFINT_ITRN(1, 1) - I40E_PFINT_ITRN(1, 0)},
75 {I40E_PFINT_ITRN(2, 0), 0x00000FFF, 64, I40E_PFINT_ITRN(2, 1) - I40E_PFINT_ITRN(2, 0)},
76 {I40E_PFINT_STAT_CTL0
, 0x0000000C, 1, 0},
77 {I40E_PFINT_LNKLST0
, 0x00001FFF, 1, 0},
78 {I40E_PFINT_LNKLSTN(0), 0x000007FF, 511, I40E_PFINT_LNKLSTN(1) - I40E_PFINT_LNKLSTN(0)},
79 {I40E_QINT_TQCTL(0), 0x000000FF, I40E_QINT_TQCTL_MAX_INDEX
+ 1, I40E_QINT_TQCTL(1) - I40E_QINT_TQCTL(0)},
80 {I40E_QINT_RQCTL(0), 0x000000FF, I40E_QINT_RQCTL_MAX_INDEX
+ 1, I40E_QINT_RQCTL(1) - I40E_QINT_RQCTL(0)},
81 {I40E_PFINT_ICR0_ENA
, 0xF7F20000, 1, 0},
87 * @hw: pointer to the hw struct
89 * Perform registers diagnostic test
91 i40e_status
i40e_diag_reg_test(struct i40e_hw
*hw
)
93 i40e_status ret_code
= 0;
97 for (i
= 0; (i40e_reg_list
[i
].offset
!= 0) && !ret_code
; i
++) {
98 mask
= i40e_reg_list
[i
].mask
;
99 for (j
= 0; (j
< i40e_reg_list
[i
].elements
) && !ret_code
; j
++) {
100 reg
= i40e_reg_list
[i
].offset
+
101 (j
* i40e_reg_list
[i
].stride
);
102 ret_code
= i40e_diag_reg_pattern_test(hw
, reg
, mask
);
110 * i40e_diag_eeprom_test
111 * @hw: pointer to the hw struct
113 * Perform EEPROM diagnostic test
115 i40e_status
i40e_diag_eeprom_test(struct i40e_hw
*hw
)
117 i40e_status ret_code
;
120 /* read NVM control word and if NVM valid, validate EEPROM checksum*/
121 ret_code
= i40e_read_nvm_word(hw
, I40E_SR_NVM_CONTROL_WORD
, ®_val
);
123 ((reg_val
& I40E_SR_CONTROL_WORD_1_MASK
) ==
124 (0x01 << I40E_SR_CONTROL_WORD_1_SHIFT
))) {
125 ret_code
= i40e_validate_nvm_checksum(hw
, NULL
);
127 ret_code
= I40E_ERR_DIAG_TEST_FAILED
;