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i40e: Change MSIX to MSI-X
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #ifdef CONFIG_I40E_VXLAN
30 #include <net/vxlan.h>
31 #endif
32
33 const char i40e_driver_name[] = "i40e";
34 static const char i40e_driver_string[] =
35 "Intel(R) Ethernet Connection XL710 Network Driver";
36
37 #define DRV_KERN "-k"
38
39 #define DRV_VERSION_MAJOR 0
40 #define DRV_VERSION_MINOR 3
41 #define DRV_VERSION_BUILD 31
42 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
43 __stringify(DRV_VERSION_MINOR) "." \
44 __stringify(DRV_VERSION_BUILD) DRV_KERN
45 const char i40e_driver_version_str[] = DRV_VERSION;
46 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
47
48 /* a bit of forward declarations */
49 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
50 static void i40e_handle_reset_warning(struct i40e_pf *pf);
51 static int i40e_add_vsi(struct i40e_vsi *vsi);
52 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
53 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
54 static int i40e_setup_misc_vector(struct i40e_pf *pf);
55 static void i40e_determine_queue_usage(struct i40e_pf *pf);
56 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
57 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
58 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
59
60 /* i40e_pci_tbl - PCI Device ID Table
61 *
62 * Last entry must be all 0s
63 *
64 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
65 * Class, Class Mask, private data (not used) }
66 */
67 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 /* required last entry */
79 {0, }
80 };
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
82
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
87
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
92
93 /**
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
99 **/
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
102 {
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
104
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
108 if (!mem->va)
109 return -ENOMEM;
110
111 return 0;
112 }
113
114 /**
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
118 **/
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
120 {
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
122
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
124 mem->va = NULL;
125 mem->pa = 0;
126 mem->size = 0;
127
128 return 0;
129 }
130
131 /**
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
136 **/
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
138 u32 size)
139 {
140 mem->size = size;
141 mem->va = kzalloc(size, GFP_KERNEL);
142
143 if (!mem->va)
144 return -ENOMEM;
145
146 return 0;
147 }
148
149 /**
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
153 **/
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
155 {
156 /* it's ok to kfree a NULL pointer */
157 kfree(mem->va);
158 mem->va = NULL;
159 mem->size = 0;
160
161 return 0;
162 }
163
164 /**
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
170 *
171 * Returns the base item index of the lump, or negative for error
172 *
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
176 **/
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
178 u16 needed, u16 id)
179 {
180 int ret = -ENOMEM;
181 int i, j;
182
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
186 pile, needed, id);
187 return -EINVAL;
188 }
189
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
195 i++;
196 continue;
197 }
198
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
202 break;
203 }
204
205 if (j == needed) {
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
209 ret = i;
210 pile->search_hint = i + j;
211 break;
212 } else {
213 /* not enough, so skip over it and continue looking */
214 i += j;
215 }
216 }
217
218 return ret;
219 }
220
221 /**
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
226 *
227 * Returns the count of items in the lump
228 **/
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
230 {
231 int valid_id = (id | I40E_PILE_VALID_BIT);
232 int count = 0;
233 int i;
234
235 if (!pile || index >= pile->num_entries)
236 return -EINVAL;
237
238 for (i = index;
239 i < pile->num_entries && pile->list[i] == valid_id;
240 i++) {
241 pile->list[i] = 0;
242 count++;
243 }
244
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
247
248 return count;
249 }
250
251 /**
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
254 *
255 * If not already scheduled, this puts the task into the work queue
256 **/
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
258 {
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
263 }
264
265 /**
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
268 *
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
271 * reset.
272 **/
273 static void i40e_tx_timeout(struct net_device *netdev)
274 {
275 struct i40e_netdev_priv *np = netdev_priv(netdev);
276 struct i40e_vsi *vsi = np->vsi;
277 struct i40e_pf *pf = vsi->back;
278
279 pf->tx_timeout_count++;
280
281 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
282 pf->tx_timeout_recovery_level = 0;
283 pf->tx_timeout_last_recovery = jiffies;
284 netdev_info(netdev, "tx_timeout recovery level %d\n",
285 pf->tx_timeout_recovery_level);
286
287 switch (pf->tx_timeout_recovery_level) {
288 case 0:
289 /* disable and re-enable queues for the VSI */
290 if (in_interrupt()) {
291 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
292 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
293 } else {
294 i40e_vsi_reinit_locked(vsi);
295 }
296 break;
297 case 1:
298 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
299 break;
300 case 2:
301 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
302 break;
303 case 3:
304 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
305 break;
306 default:
307 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
308 set_bit(__I40E_DOWN, &vsi->state);
309 i40e_down(vsi);
310 break;
311 }
312 i40e_service_event_schedule(pf);
313 pf->tx_timeout_recovery_level++;
314 }
315
316 /**
317 * i40e_release_rx_desc - Store the new tail and head values
318 * @rx_ring: ring to bump
319 * @val: new head index
320 **/
321 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
322 {
323 rx_ring->next_to_use = val;
324
325 /* Force memory writes to complete before letting h/w
326 * know there are new descriptors to fetch. (Only
327 * applicable for weak-ordered memory model archs,
328 * such as IA-64).
329 */
330 wmb();
331 writel(val, rx_ring->tail);
332 }
333
334 /**
335 * i40e_get_vsi_stats_struct - Get System Network Statistics
336 * @vsi: the VSI we care about
337 *
338 * Returns the address of the device statistics structure.
339 * The statistics are actually updated from the service task.
340 **/
341 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
342 {
343 return &vsi->net_stats;
344 }
345
346 /**
347 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
348 * @netdev: network interface device structure
349 *
350 * Returns the address of the device statistics structure.
351 * The statistics are actually updated from the service task.
352 **/
353 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
354 struct net_device *netdev,
355 struct rtnl_link_stats64 *stats)
356 {
357 struct i40e_netdev_priv *np = netdev_priv(netdev);
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
360 int i;
361
362 if (test_bit(__I40E_DOWN, &vsi->state))
363 return stats;
364
365 if (!vsi->tx_rings)
366 return stats;
367
368 rcu_read_lock();
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
370 struct i40e_ring *tx_ring, *rx_ring;
371 u64 bytes, packets;
372 unsigned int start;
373
374 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
375 if (!tx_ring)
376 continue;
377
378 do {
379 start = u64_stats_fetch_begin_bh(&tx_ring->syncp);
380 packets = tx_ring->stats.packets;
381 bytes = tx_ring->stats.bytes;
382 } while (u64_stats_fetch_retry_bh(&tx_ring->syncp, start));
383
384 stats->tx_packets += packets;
385 stats->tx_bytes += bytes;
386 rx_ring = &tx_ring[1];
387
388 do {
389 start = u64_stats_fetch_begin_bh(&rx_ring->syncp);
390 packets = rx_ring->stats.packets;
391 bytes = rx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_bh(&rx_ring->syncp, start));
393
394 stats->rx_packets += packets;
395 stats->rx_bytes += bytes;
396 }
397 rcu_read_unlock();
398
399 /* following stats updated by ixgbe_watchdog_task() */
400 stats->multicast = vsi_stats->multicast;
401 stats->tx_errors = vsi_stats->tx_errors;
402 stats->tx_dropped = vsi_stats->tx_dropped;
403 stats->rx_errors = vsi_stats->rx_errors;
404 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
405 stats->rx_length_errors = vsi_stats->rx_length_errors;
406
407 return stats;
408 }
409
410 /**
411 * i40e_vsi_reset_stats - Resets all stats of the given vsi
412 * @vsi: the VSI to have its stats reset
413 **/
414 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
415 {
416 struct rtnl_link_stats64 *ns;
417 int i;
418
419 if (!vsi)
420 return;
421
422 ns = i40e_get_vsi_stats_struct(vsi);
423 memset(ns, 0, sizeof(*ns));
424 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
425 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
426 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
427 if (vsi->rx_rings && vsi->rx_rings[0]) {
428 for (i = 0; i < vsi->num_queue_pairs; i++) {
429 memset(&vsi->rx_rings[i]->stats, 0 ,
430 sizeof(vsi->rx_rings[i]->stats));
431 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
432 sizeof(vsi->rx_rings[i]->rx_stats));
433 memset(&vsi->tx_rings[i]->stats, 0 ,
434 sizeof(vsi->tx_rings[i]->stats));
435 memset(&vsi->tx_rings[i]->tx_stats, 0,
436 sizeof(vsi->tx_rings[i]->tx_stats));
437 }
438 }
439 vsi->stat_offsets_loaded = false;
440 }
441
442 /**
443 * i40e_pf_reset_stats - Reset all of the stats for the given pf
444 * @pf: the PF to be reset
445 **/
446 void i40e_pf_reset_stats(struct i40e_pf *pf)
447 {
448 memset(&pf->stats, 0, sizeof(pf->stats));
449 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
450 pf->stat_offsets_loaded = false;
451 }
452
453 /**
454 * i40e_stat_update48 - read and update a 48 bit stat from the chip
455 * @hw: ptr to the hardware info
456 * @hireg: the high 32 bit reg to read
457 * @loreg: the low 32 bit reg to read
458 * @offset_loaded: has the initial offset been loaded yet
459 * @offset: ptr to current offset value
460 * @stat: ptr to the stat
461 *
462 * Since the device stats are not reset at PFReset, they likely will not
463 * be zeroed when the driver starts. We'll save the first values read
464 * and use them as offsets to be subtracted from the raw values in order
465 * to report stats that count from zero. In the process, we also manage
466 * the potential roll-over.
467 **/
468 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
469 bool offset_loaded, u64 *offset, u64 *stat)
470 {
471 u64 new_data;
472
473 if (hw->device_id == I40E_DEV_ID_QEMU) {
474 new_data = rd32(hw, loreg);
475 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
476 } else {
477 new_data = rd64(hw, loreg);
478 }
479 if (!offset_loaded)
480 *offset = new_data;
481 if (likely(new_data >= *offset))
482 *stat = new_data - *offset;
483 else
484 *stat = (new_data + ((u64)1 << 48)) - *offset;
485 *stat &= 0xFFFFFFFFFFFFULL;
486 }
487
488 /**
489 * i40e_stat_update32 - read and update a 32 bit stat from the chip
490 * @hw: ptr to the hardware info
491 * @reg: the hw reg to read
492 * @offset_loaded: has the initial offset been loaded yet
493 * @offset: ptr to current offset value
494 * @stat: ptr to the stat
495 **/
496 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
497 bool offset_loaded, u64 *offset, u64 *stat)
498 {
499 u32 new_data;
500
501 new_data = rd32(hw, reg);
502 if (!offset_loaded)
503 *offset = new_data;
504 if (likely(new_data >= *offset))
505 *stat = (u32)(new_data - *offset);
506 else
507 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
508 }
509
510 /**
511 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
512 * @vsi: the VSI to be updated
513 **/
514 void i40e_update_eth_stats(struct i40e_vsi *vsi)
515 {
516 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
517 struct i40e_pf *pf = vsi->back;
518 struct i40e_hw *hw = &pf->hw;
519 struct i40e_eth_stats *oes;
520 struct i40e_eth_stats *es; /* device's eth stats */
521
522 es = &vsi->eth_stats;
523 oes = &vsi->eth_stats_offsets;
524
525 /* Gather up the stats that the hw collects */
526 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
527 vsi->stat_offsets_loaded,
528 &oes->tx_errors, &es->tx_errors);
529 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
530 vsi->stat_offsets_loaded,
531 &oes->rx_discards, &es->rx_discards);
532
533 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
534 I40E_GLV_GORCL(stat_idx),
535 vsi->stat_offsets_loaded,
536 &oes->rx_bytes, &es->rx_bytes);
537 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
538 I40E_GLV_UPRCL(stat_idx),
539 vsi->stat_offsets_loaded,
540 &oes->rx_unicast, &es->rx_unicast);
541 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
542 I40E_GLV_MPRCL(stat_idx),
543 vsi->stat_offsets_loaded,
544 &oes->rx_multicast, &es->rx_multicast);
545 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
546 I40E_GLV_BPRCL(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->rx_broadcast, &es->rx_broadcast);
549
550 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
551 I40E_GLV_GOTCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->tx_bytes, &es->tx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
555 I40E_GLV_UPTCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->tx_unicast, &es->tx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
559 I40E_GLV_MPTCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->tx_multicast, &es->tx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
563 I40E_GLV_BPTCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->tx_broadcast, &es->tx_broadcast);
566 vsi->stat_offsets_loaded = true;
567 }
568
569 /**
570 * i40e_update_veb_stats - Update Switch component statistics
571 * @veb: the VEB being updated
572 **/
573 static void i40e_update_veb_stats(struct i40e_veb *veb)
574 {
575 struct i40e_pf *pf = veb->pf;
576 struct i40e_hw *hw = &pf->hw;
577 struct i40e_eth_stats *oes;
578 struct i40e_eth_stats *es; /* device's eth stats */
579 int idx = 0;
580
581 idx = veb->stats_idx;
582 es = &veb->stats;
583 oes = &veb->stats_offsets;
584
585 /* Gather up the stats that the hw collects */
586 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
587 veb->stat_offsets_loaded,
588 &oes->tx_discards, &es->tx_discards);
589 if (hw->revision_id > 0)
590 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
591 veb->stat_offsets_loaded,
592 &oes->rx_unknown_protocol,
593 &es->rx_unknown_protocol);
594 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
595 veb->stat_offsets_loaded,
596 &oes->rx_bytes, &es->rx_bytes);
597 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
598 veb->stat_offsets_loaded,
599 &oes->rx_unicast, &es->rx_unicast);
600 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
601 veb->stat_offsets_loaded,
602 &oes->rx_multicast, &es->rx_multicast);
603 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
604 veb->stat_offsets_loaded,
605 &oes->rx_broadcast, &es->rx_broadcast);
606
607 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
608 veb->stat_offsets_loaded,
609 &oes->tx_bytes, &es->tx_bytes);
610 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
611 veb->stat_offsets_loaded,
612 &oes->tx_unicast, &es->tx_unicast);
613 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
614 veb->stat_offsets_loaded,
615 &oes->tx_multicast, &es->tx_multicast);
616 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
617 veb->stat_offsets_loaded,
618 &oes->tx_broadcast, &es->tx_broadcast);
619 veb->stat_offsets_loaded = true;
620 }
621
622 /**
623 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
624 * @pf: the corresponding PF
625 *
626 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
627 **/
628 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
629 {
630 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
631 struct i40e_hw_port_stats *nsd = &pf->stats;
632 struct i40e_hw *hw = &pf->hw;
633 u64 xoff = 0;
634 u16 i, v;
635
636 if ((hw->fc.current_mode != I40E_FC_FULL) &&
637 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
638 return;
639
640 xoff = nsd->link_xoff_rx;
641 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
642 pf->stat_offsets_loaded,
643 &osd->link_xoff_rx, &nsd->link_xoff_rx);
644
645 /* No new LFC xoff rx */
646 if (!(nsd->link_xoff_rx - xoff))
647 return;
648
649 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
650 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
651 struct i40e_vsi *vsi = pf->vsi[v];
652
653 if (!vsi)
654 continue;
655
656 for (i = 0; i < vsi->num_queue_pairs; i++) {
657 struct i40e_ring *ring = vsi->tx_rings[i];
658 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
659 }
660 }
661 }
662
663 /**
664 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
665 * @pf: the corresponding PF
666 *
667 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
668 **/
669 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
670 {
671 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
672 struct i40e_hw_port_stats *nsd = &pf->stats;
673 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
674 struct i40e_dcbx_config *dcb_cfg;
675 struct i40e_hw *hw = &pf->hw;
676 u16 i, v;
677 u8 tc;
678
679 dcb_cfg = &hw->local_dcbx_config;
680
681 /* See if DCB enabled with PFC TC */
682 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
683 !(dcb_cfg->pfc.pfcenable)) {
684 i40e_update_link_xoff_rx(pf);
685 return;
686 }
687
688 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
689 u64 prio_xoff = nsd->priority_xoff_rx[i];
690 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
691 pf->stat_offsets_loaded,
692 &osd->priority_xoff_rx[i],
693 &nsd->priority_xoff_rx[i]);
694
695 /* No new PFC xoff rx */
696 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
697 continue;
698 /* Get the TC for given priority */
699 tc = dcb_cfg->etscfg.prioritytable[i];
700 xoff[tc] = true;
701 }
702
703 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
704 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
705 struct i40e_vsi *vsi = pf->vsi[v];
706
707 if (!vsi)
708 continue;
709
710 for (i = 0; i < vsi->num_queue_pairs; i++) {
711 struct i40e_ring *ring = vsi->tx_rings[i];
712
713 tc = ring->dcb_tc;
714 if (xoff[tc])
715 clear_bit(__I40E_HANG_CHECK_ARMED,
716 &ring->state);
717 }
718 }
719 }
720
721 /**
722 * i40e_update_stats - Update the board statistics counters.
723 * @vsi: the VSI to be updated
724 *
725 * There are a few instances where we store the same stat in a
726 * couple of different structs. This is partly because we have
727 * the netdev stats that need to be filled out, which is slightly
728 * different from the "eth_stats" defined by the chip and used in
729 * VF communications. We sort it all out here in a central place.
730 **/
731 void i40e_update_stats(struct i40e_vsi *vsi)
732 {
733 struct i40e_pf *pf = vsi->back;
734 struct i40e_hw *hw = &pf->hw;
735 struct rtnl_link_stats64 *ons;
736 struct rtnl_link_stats64 *ns; /* netdev stats */
737 struct i40e_eth_stats *oes;
738 struct i40e_eth_stats *es; /* device's eth stats */
739 u32 tx_restart, tx_busy;
740 u32 rx_page, rx_buf;
741 u64 rx_p, rx_b;
742 u64 tx_p, tx_b;
743 int i;
744 u16 q;
745
746 if (test_bit(__I40E_DOWN, &vsi->state) ||
747 test_bit(__I40E_CONFIG_BUSY, &pf->state))
748 return;
749
750 ns = i40e_get_vsi_stats_struct(vsi);
751 ons = &vsi->net_stats_offsets;
752 es = &vsi->eth_stats;
753 oes = &vsi->eth_stats_offsets;
754
755 /* Gather up the netdev and vsi stats that the driver collects
756 * on the fly during packet processing
757 */
758 rx_b = rx_p = 0;
759 tx_b = tx_p = 0;
760 tx_restart = tx_busy = 0;
761 rx_page = 0;
762 rx_buf = 0;
763 rcu_read_lock();
764 for (q = 0; q < vsi->num_queue_pairs; q++) {
765 struct i40e_ring *p;
766 u64 bytes, packets;
767 unsigned int start;
768
769 /* locate Tx ring */
770 p = ACCESS_ONCE(vsi->tx_rings[q]);
771
772 do {
773 start = u64_stats_fetch_begin_bh(&p->syncp);
774 packets = p->stats.packets;
775 bytes = p->stats.bytes;
776 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
777 tx_b += bytes;
778 tx_p += packets;
779 tx_restart += p->tx_stats.restart_queue;
780 tx_busy += p->tx_stats.tx_busy;
781
782 /* Rx queue is part of the same block as Tx queue */
783 p = &p[1];
784 do {
785 start = u64_stats_fetch_begin_bh(&p->syncp);
786 packets = p->stats.packets;
787 bytes = p->stats.bytes;
788 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
789 rx_b += bytes;
790 rx_p += packets;
791 rx_buf += p->rx_stats.alloc_buff_failed;
792 rx_page += p->rx_stats.alloc_page_failed;
793 }
794 rcu_read_unlock();
795 vsi->tx_restart = tx_restart;
796 vsi->tx_busy = tx_busy;
797 vsi->rx_page_failed = rx_page;
798 vsi->rx_buf_failed = rx_buf;
799
800 ns->rx_packets = rx_p;
801 ns->rx_bytes = rx_b;
802 ns->tx_packets = tx_p;
803 ns->tx_bytes = tx_b;
804
805 i40e_update_eth_stats(vsi);
806 /* update netdev stats from eth stats */
807 ons->rx_errors = oes->rx_errors;
808 ns->rx_errors = es->rx_errors;
809 ons->tx_errors = oes->tx_errors;
810 ns->tx_errors = es->tx_errors;
811 ons->multicast = oes->rx_multicast;
812 ns->multicast = es->rx_multicast;
813 ons->tx_dropped = oes->tx_discards;
814 ns->tx_dropped = es->tx_discards;
815
816 /* Get the port data only if this is the main PF VSI */
817 if (vsi == pf->vsi[pf->lan_vsi]) {
818 struct i40e_hw_port_stats *nsd = &pf->stats;
819 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
820
821 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
822 I40E_GLPRT_GORCL(hw->port),
823 pf->stat_offsets_loaded,
824 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
825 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
826 I40E_GLPRT_GOTCL(hw->port),
827 pf->stat_offsets_loaded,
828 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
829 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
830 pf->stat_offsets_loaded,
831 &osd->eth.rx_discards,
832 &nsd->eth.rx_discards);
833 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
834 pf->stat_offsets_loaded,
835 &osd->eth.tx_discards,
836 &nsd->eth.tx_discards);
837 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
838 I40E_GLPRT_MPRCL(hw->port),
839 pf->stat_offsets_loaded,
840 &osd->eth.rx_multicast,
841 &nsd->eth.rx_multicast);
842
843 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
844 pf->stat_offsets_loaded,
845 &osd->tx_dropped_link_down,
846 &nsd->tx_dropped_link_down);
847
848 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
849 pf->stat_offsets_loaded,
850 &osd->crc_errors, &nsd->crc_errors);
851 ns->rx_crc_errors = nsd->crc_errors;
852
853 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
854 pf->stat_offsets_loaded,
855 &osd->illegal_bytes, &nsd->illegal_bytes);
856 ns->rx_errors = nsd->crc_errors
857 + nsd->illegal_bytes;
858
859 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->mac_local_faults,
862 &nsd->mac_local_faults);
863 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->mac_remote_faults,
866 &nsd->mac_remote_faults);
867
868 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
869 pf->stat_offsets_loaded,
870 &osd->rx_length_errors,
871 &nsd->rx_length_errors);
872 ns->rx_length_errors = nsd->rx_length_errors;
873
874 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->link_xon_rx, &nsd->link_xon_rx);
877 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
878 pf->stat_offsets_loaded,
879 &osd->link_xon_tx, &nsd->link_xon_tx);
880 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
881 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
882 pf->stat_offsets_loaded,
883 &osd->link_xoff_tx, &nsd->link_xoff_tx);
884
885 for (i = 0; i < 8; i++) {
886 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
887 pf->stat_offsets_loaded,
888 &osd->priority_xon_rx[i],
889 &nsd->priority_xon_rx[i]);
890 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
891 pf->stat_offsets_loaded,
892 &osd->priority_xon_tx[i],
893 &nsd->priority_xon_tx[i]);
894 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
895 pf->stat_offsets_loaded,
896 &osd->priority_xoff_tx[i],
897 &nsd->priority_xoff_tx[i]);
898 i40e_stat_update32(hw,
899 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
900 pf->stat_offsets_loaded,
901 &osd->priority_xon_2_xoff[i],
902 &nsd->priority_xon_2_xoff[i]);
903 }
904
905 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
906 I40E_GLPRT_PRC64L(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->rx_size_64, &nsd->rx_size_64);
909 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
910 I40E_GLPRT_PRC127L(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->rx_size_127, &nsd->rx_size_127);
913 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
914 I40E_GLPRT_PRC255L(hw->port),
915 pf->stat_offsets_loaded,
916 &osd->rx_size_255, &nsd->rx_size_255);
917 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
918 I40E_GLPRT_PRC511L(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->rx_size_511, &nsd->rx_size_511);
921 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
922 I40E_GLPRT_PRC1023L(hw->port),
923 pf->stat_offsets_loaded,
924 &osd->rx_size_1023, &nsd->rx_size_1023);
925 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
926 I40E_GLPRT_PRC1522L(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->rx_size_1522, &nsd->rx_size_1522);
929 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
930 I40E_GLPRT_PRC9522L(hw->port),
931 pf->stat_offsets_loaded,
932 &osd->rx_size_big, &nsd->rx_size_big);
933
934 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
935 I40E_GLPRT_PTC64L(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->tx_size_64, &nsd->tx_size_64);
938 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
939 I40E_GLPRT_PTC127L(hw->port),
940 pf->stat_offsets_loaded,
941 &osd->tx_size_127, &nsd->tx_size_127);
942 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
943 I40E_GLPRT_PTC255L(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->tx_size_255, &nsd->tx_size_255);
946 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
947 I40E_GLPRT_PTC511L(hw->port),
948 pf->stat_offsets_loaded,
949 &osd->tx_size_511, &nsd->tx_size_511);
950 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
951 I40E_GLPRT_PTC1023L(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->tx_size_1023, &nsd->tx_size_1023);
954 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
955 I40E_GLPRT_PTC1522L(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->tx_size_1522, &nsd->tx_size_1522);
958 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
959 I40E_GLPRT_PTC9522L(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->tx_size_big, &nsd->tx_size_big);
962
963 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->rx_undersize, &nsd->rx_undersize);
966 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_fragments, &nsd->rx_fragments);
969 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->rx_oversize, &nsd->rx_oversize);
972 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->rx_jabber, &nsd->rx_jabber);
975 }
976
977 pf->stat_offsets_loaded = true;
978 }
979
980 /**
981 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
982 * @vsi: the VSI to be searched
983 * @macaddr: the MAC address
984 * @vlan: the vlan
985 * @is_vf: make sure its a vf filter, else doesn't matter
986 * @is_netdev: make sure its a netdev filter, else doesn't matter
987 *
988 * Returns ptr to the filter object or NULL
989 **/
990 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
991 u8 *macaddr, s16 vlan,
992 bool is_vf, bool is_netdev)
993 {
994 struct i40e_mac_filter *f;
995
996 if (!vsi || !macaddr)
997 return NULL;
998
999 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1000 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1001 (vlan == f->vlan) &&
1002 (!is_vf || f->is_vf) &&
1003 (!is_netdev || f->is_netdev))
1004 return f;
1005 }
1006 return NULL;
1007 }
1008
1009 /**
1010 * i40e_find_mac - Find a mac addr in the macvlan filters list
1011 * @vsi: the VSI to be searched
1012 * @macaddr: the MAC address we are searching for
1013 * @is_vf: make sure its a vf filter, else doesn't matter
1014 * @is_netdev: make sure its a netdev filter, else doesn't matter
1015 *
1016 * Returns the first filter with the provided MAC address or NULL if
1017 * MAC address was not found
1018 **/
1019 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1020 bool is_vf, bool is_netdev)
1021 {
1022 struct i40e_mac_filter *f;
1023
1024 if (!vsi || !macaddr)
1025 return NULL;
1026
1027 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1028 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1029 (!is_vf || f->is_vf) &&
1030 (!is_netdev || f->is_netdev))
1031 return f;
1032 }
1033 return NULL;
1034 }
1035
1036 /**
1037 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1038 * @vsi: the VSI to be searched
1039 *
1040 * Returns true if VSI is in vlan mode or false otherwise
1041 **/
1042 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1043 {
1044 struct i40e_mac_filter *f;
1045
1046 /* Only -1 for all the filters denotes not in vlan mode
1047 * so we have to go through all the list in order to make sure
1048 */
1049 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1050 if (f->vlan >= 0)
1051 return true;
1052 }
1053
1054 return false;
1055 }
1056
1057 /**
1058 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1059 * @vsi: the VSI to be searched
1060 * @macaddr: the mac address to be filtered
1061 * @is_vf: true if it is a vf
1062 * @is_netdev: true if it is a netdev
1063 *
1064 * Goes through all the macvlan filters and adds a
1065 * macvlan filter for each unique vlan that already exists
1066 *
1067 * Returns first filter found on success, else NULL
1068 **/
1069 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1070 bool is_vf, bool is_netdev)
1071 {
1072 struct i40e_mac_filter *f;
1073
1074 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1075 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1076 is_vf, is_netdev)) {
1077 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1078 is_vf, is_netdev))
1079 return NULL;
1080 }
1081 }
1082
1083 return list_first_entry_or_null(&vsi->mac_filter_list,
1084 struct i40e_mac_filter, list);
1085 }
1086
1087 /**
1088 * i40e_add_filter - Add a mac/vlan filter to the VSI
1089 * @vsi: the VSI to be searched
1090 * @macaddr: the MAC address
1091 * @vlan: the vlan
1092 * @is_vf: make sure its a vf filter, else doesn't matter
1093 * @is_netdev: make sure its a netdev filter, else doesn't matter
1094 *
1095 * Returns ptr to the filter object or NULL when no memory available.
1096 **/
1097 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1098 u8 *macaddr, s16 vlan,
1099 bool is_vf, bool is_netdev)
1100 {
1101 struct i40e_mac_filter *f;
1102
1103 if (!vsi || !macaddr)
1104 return NULL;
1105
1106 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1107 if (!f) {
1108 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1109 if (!f)
1110 goto add_filter_out;
1111
1112 memcpy(f->macaddr, macaddr, ETH_ALEN);
1113 f->vlan = vlan;
1114 f->changed = true;
1115
1116 INIT_LIST_HEAD(&f->list);
1117 list_add(&f->list, &vsi->mac_filter_list);
1118 }
1119
1120 /* increment counter and add a new flag if needed */
1121 if (is_vf) {
1122 if (!f->is_vf) {
1123 f->is_vf = true;
1124 f->counter++;
1125 }
1126 } else if (is_netdev) {
1127 if (!f->is_netdev) {
1128 f->is_netdev = true;
1129 f->counter++;
1130 }
1131 } else {
1132 f->counter++;
1133 }
1134
1135 /* changed tells sync_filters_subtask to
1136 * push the filter down to the firmware
1137 */
1138 if (f->changed) {
1139 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1140 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1141 }
1142
1143 add_filter_out:
1144 return f;
1145 }
1146
1147 /**
1148 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1149 * @vsi: the VSI to be searched
1150 * @macaddr: the MAC address
1151 * @vlan: the vlan
1152 * @is_vf: make sure it's a vf filter, else doesn't matter
1153 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1154 **/
1155 void i40e_del_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1158 {
1159 struct i40e_mac_filter *f;
1160
1161 if (!vsi || !macaddr)
1162 return;
1163
1164 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1165 if (!f || f->counter == 0)
1166 return;
1167
1168 if (is_vf) {
1169 if (f->is_vf) {
1170 f->is_vf = false;
1171 f->counter--;
1172 }
1173 } else if (is_netdev) {
1174 if (f->is_netdev) {
1175 f->is_netdev = false;
1176 f->counter--;
1177 }
1178 } else {
1179 /* make sure we don't remove a filter in use by vf or netdev */
1180 int min_f = 0;
1181 min_f += (f->is_vf ? 1 : 0);
1182 min_f += (f->is_netdev ? 1 : 0);
1183
1184 if (f->counter > min_f)
1185 f->counter--;
1186 }
1187
1188 /* counter == 0 tells sync_filters_subtask to
1189 * remove the filter from the firmware's list
1190 */
1191 if (f->counter == 0) {
1192 f->changed = true;
1193 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1194 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1195 }
1196 }
1197
1198 /**
1199 * i40e_set_mac - NDO callback to set mac address
1200 * @netdev: network interface device structure
1201 * @p: pointer to an address structure
1202 *
1203 * Returns 0 on success, negative on failure
1204 **/
1205 static int i40e_set_mac(struct net_device *netdev, void *p)
1206 {
1207 struct i40e_netdev_priv *np = netdev_priv(netdev);
1208 struct i40e_vsi *vsi = np->vsi;
1209 struct sockaddr *addr = p;
1210 struct i40e_mac_filter *f;
1211
1212 if (!is_valid_ether_addr(addr->sa_data))
1213 return -EADDRNOTAVAIL;
1214
1215 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1216
1217 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1218 return 0;
1219
1220 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1221 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1222 return -EADDRNOTAVAIL;
1223
1224 if (vsi->type == I40E_VSI_MAIN) {
1225 i40e_status ret;
1226 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1227 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1228 addr->sa_data, NULL);
1229 if (ret) {
1230 netdev_info(netdev,
1231 "Addr change for Main VSI failed: %d\n",
1232 ret);
1233 return -EADDRNOTAVAIL;
1234 }
1235
1236 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1237 }
1238
1239 /* In order to be sure to not drop any packets, add the new address
1240 * then delete the old one.
1241 */
1242 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1243 if (!f)
1244 return -ENOMEM;
1245
1246 i40e_sync_vsi_filters(vsi);
1247 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1248 i40e_sync_vsi_filters(vsi);
1249
1250 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1251
1252 return 0;
1253 }
1254
1255 /**
1256 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1257 * @vsi: the VSI being setup
1258 * @ctxt: VSI context structure
1259 * @enabled_tc: Enabled TCs bitmap
1260 * @is_add: True if called before Add VSI
1261 *
1262 * Setup VSI queue mapping for enabled traffic classes.
1263 **/
1264 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1265 struct i40e_vsi_context *ctxt,
1266 u8 enabled_tc,
1267 bool is_add)
1268 {
1269 struct i40e_pf *pf = vsi->back;
1270 u16 sections = 0;
1271 u8 netdev_tc = 0;
1272 u16 numtc = 0;
1273 u16 qcount;
1274 u8 offset;
1275 u16 qmap;
1276 int i;
1277 u16 num_tc_qps = 0;
1278
1279 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1280 offset = 0;
1281
1282 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1283 /* Find numtc from enabled TC bitmap */
1284 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1285 if (enabled_tc & (1 << i)) /* TC is enabled */
1286 numtc++;
1287 }
1288 if (!numtc) {
1289 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1290 numtc = 1;
1291 }
1292 } else {
1293 /* At least TC0 is enabled in case of non-DCB case */
1294 numtc = 1;
1295 }
1296
1297 vsi->tc_config.numtc = numtc;
1298 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1299 /* Number of queues per enabled TC */
1300 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc);
1301 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1302
1303 /* Setup queue offset/count for all TCs for given VSI */
1304 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1305 /* See if the given TC is enabled for the given VSI */
1306 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1307 int pow, num_qps;
1308
1309 switch (vsi->type) {
1310 case I40E_VSI_MAIN:
1311 qcount = min_t(int, pf->rss_size, num_tc_qps);
1312 break;
1313 case I40E_VSI_FDIR:
1314 case I40E_VSI_SRIOV:
1315 case I40E_VSI_VMDQ2:
1316 default:
1317 qcount = num_tc_qps;
1318 WARN_ON(i != 0);
1319 break;
1320 }
1321 vsi->tc_config.tc_info[i].qoffset = offset;
1322 vsi->tc_config.tc_info[i].qcount = qcount;
1323
1324 /* find the power-of-2 of the number of queue pairs */
1325 num_qps = qcount;
1326 pow = 0;
1327 while (num_qps && ((1 << pow) < qcount)) {
1328 pow++;
1329 num_qps >>= 1;
1330 }
1331
1332 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1333 qmap =
1334 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1335 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1336
1337 offset += qcount;
1338 } else {
1339 /* TC is not enabled so set the offset to
1340 * default queue and allocate one queue
1341 * for the given TC.
1342 */
1343 vsi->tc_config.tc_info[i].qoffset = 0;
1344 vsi->tc_config.tc_info[i].qcount = 1;
1345 vsi->tc_config.tc_info[i].netdev_tc = 0;
1346
1347 qmap = 0;
1348 }
1349 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1350 }
1351
1352 /* Set actual Tx/Rx queue pairs */
1353 vsi->num_queue_pairs = offset;
1354
1355 /* Scheduler section valid can only be set for ADD VSI */
1356 if (is_add) {
1357 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1358
1359 ctxt->info.up_enable_bits = enabled_tc;
1360 }
1361 if (vsi->type == I40E_VSI_SRIOV) {
1362 ctxt->info.mapping_flags |=
1363 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1364 for (i = 0; i < vsi->num_queue_pairs; i++)
1365 ctxt->info.queue_mapping[i] =
1366 cpu_to_le16(vsi->base_queue + i);
1367 } else {
1368 ctxt->info.mapping_flags |=
1369 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1370 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1371 }
1372 ctxt->info.valid_sections |= cpu_to_le16(sections);
1373 }
1374
1375 /**
1376 * i40e_set_rx_mode - NDO callback to set the netdev filters
1377 * @netdev: network interface device structure
1378 **/
1379 static void i40e_set_rx_mode(struct net_device *netdev)
1380 {
1381 struct i40e_netdev_priv *np = netdev_priv(netdev);
1382 struct i40e_mac_filter *f, *ftmp;
1383 struct i40e_vsi *vsi = np->vsi;
1384 struct netdev_hw_addr *uca;
1385 struct netdev_hw_addr *mca;
1386 struct netdev_hw_addr *ha;
1387
1388 /* add addr if not already in the filter list */
1389 netdev_for_each_uc_addr(uca, netdev) {
1390 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1391 if (i40e_is_vsi_in_vlan(vsi))
1392 i40e_put_mac_in_vlan(vsi, uca->addr,
1393 false, true);
1394 else
1395 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1396 false, true);
1397 }
1398 }
1399
1400 netdev_for_each_mc_addr(mca, netdev) {
1401 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1402 if (i40e_is_vsi_in_vlan(vsi))
1403 i40e_put_mac_in_vlan(vsi, mca->addr,
1404 false, true);
1405 else
1406 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1407 false, true);
1408 }
1409 }
1410
1411 /* remove filter if not in netdev list */
1412 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1413 bool found = false;
1414
1415 if (!f->is_netdev)
1416 continue;
1417
1418 if (is_multicast_ether_addr(f->macaddr)) {
1419 netdev_for_each_mc_addr(mca, netdev) {
1420 if (ether_addr_equal(mca->addr, f->macaddr)) {
1421 found = true;
1422 break;
1423 }
1424 }
1425 } else {
1426 netdev_for_each_uc_addr(uca, netdev) {
1427 if (ether_addr_equal(uca->addr, f->macaddr)) {
1428 found = true;
1429 break;
1430 }
1431 }
1432
1433 for_each_dev_addr(netdev, ha) {
1434 if (ether_addr_equal(ha->addr, f->macaddr)) {
1435 found = true;
1436 break;
1437 }
1438 }
1439 }
1440 if (!found)
1441 i40e_del_filter(
1442 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1443 }
1444
1445 /* check for other flag changes */
1446 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1447 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1448 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1449 }
1450 }
1451
1452 /**
1453 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1454 * @vsi: ptr to the VSI
1455 *
1456 * Push any outstanding VSI filter changes through the AdminQ.
1457 *
1458 * Returns 0 or error value
1459 **/
1460 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1461 {
1462 struct i40e_mac_filter *f, *ftmp;
1463 bool promisc_forced_on = false;
1464 bool add_happened = false;
1465 int filter_list_len = 0;
1466 u32 changed_flags = 0;
1467 i40e_status aq_ret = 0;
1468 struct i40e_pf *pf;
1469 int num_add = 0;
1470 int num_del = 0;
1471 u16 cmd_flags;
1472
1473 /* empty array typed pointers, kcalloc later */
1474 struct i40e_aqc_add_macvlan_element_data *add_list;
1475 struct i40e_aqc_remove_macvlan_element_data *del_list;
1476
1477 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1478 usleep_range(1000, 2000);
1479 pf = vsi->back;
1480
1481 if (vsi->netdev) {
1482 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1483 vsi->current_netdev_flags = vsi->netdev->flags;
1484 }
1485
1486 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1487 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1488
1489 filter_list_len = pf->hw.aq.asq_buf_size /
1490 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1491 del_list = kcalloc(filter_list_len,
1492 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1493 GFP_KERNEL);
1494 if (!del_list)
1495 return -ENOMEM;
1496
1497 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1498 if (!f->changed)
1499 continue;
1500
1501 if (f->counter != 0)
1502 continue;
1503 f->changed = false;
1504 cmd_flags = 0;
1505
1506 /* add to delete list */
1507 memcpy(del_list[num_del].mac_addr,
1508 f->macaddr, ETH_ALEN);
1509 del_list[num_del].vlan_tag =
1510 cpu_to_le16((u16)(f->vlan ==
1511 I40E_VLAN_ANY ? 0 : f->vlan));
1512
1513 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 del_list[num_del].flags = cmd_flags;
1515 num_del++;
1516
1517 /* unlink from filter list */
1518 list_del(&f->list);
1519 kfree(f);
1520
1521 /* flush a full buffer */
1522 if (num_del == filter_list_len) {
1523 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1524 vsi->seid, del_list, num_del,
1525 NULL);
1526 num_del = 0;
1527 memset(del_list, 0, sizeof(*del_list));
1528
1529 if (aq_ret)
1530 dev_info(&pf->pdev->dev,
1531 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1532 aq_ret,
1533 pf->hw.aq.asq_last_status);
1534 }
1535 }
1536 if (num_del) {
1537 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1538 del_list, num_del, NULL);
1539 num_del = 0;
1540
1541 if (aq_ret)
1542 dev_info(&pf->pdev->dev,
1543 "ignoring delete macvlan error, err %d, aq_err %d\n",
1544 aq_ret, pf->hw.aq.asq_last_status);
1545 }
1546
1547 kfree(del_list);
1548 del_list = NULL;
1549
1550 /* do all the adds now */
1551 filter_list_len = pf->hw.aq.asq_buf_size /
1552 sizeof(struct i40e_aqc_add_macvlan_element_data),
1553 add_list = kcalloc(filter_list_len,
1554 sizeof(struct i40e_aqc_add_macvlan_element_data),
1555 GFP_KERNEL);
1556 if (!add_list)
1557 return -ENOMEM;
1558
1559 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1560 if (!f->changed)
1561 continue;
1562
1563 if (f->counter == 0)
1564 continue;
1565 f->changed = false;
1566 add_happened = true;
1567 cmd_flags = 0;
1568
1569 /* add to add array */
1570 memcpy(add_list[num_add].mac_addr,
1571 f->macaddr, ETH_ALEN);
1572 add_list[num_add].vlan_tag =
1573 cpu_to_le16(
1574 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1575 add_list[num_add].queue_number = 0;
1576
1577 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1578 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1579 num_add++;
1580
1581 /* flush a full buffer */
1582 if (num_add == filter_list_len) {
1583 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1584 add_list, num_add,
1585 NULL);
1586 num_add = 0;
1587
1588 if (aq_ret)
1589 break;
1590 memset(add_list, 0, sizeof(*add_list));
1591 }
1592 }
1593 if (num_add) {
1594 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1595 add_list, num_add, NULL);
1596 num_add = 0;
1597 }
1598 kfree(add_list);
1599 add_list = NULL;
1600
1601 if (add_happened && (!aq_ret)) {
1602 /* do nothing */;
1603 } else if (add_happened && (aq_ret)) {
1604 dev_info(&pf->pdev->dev,
1605 "add filter failed, err %d, aq_err %d\n",
1606 aq_ret, pf->hw.aq.asq_last_status);
1607 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1608 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1609 &vsi->state)) {
1610 promisc_forced_on = true;
1611 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1612 &vsi->state);
1613 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1614 }
1615 }
1616 }
1617
1618 /* check for changes in promiscuous modes */
1619 if (changed_flags & IFF_ALLMULTI) {
1620 bool cur_multipromisc;
1621 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1622 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1623 vsi->seid,
1624 cur_multipromisc,
1625 NULL);
1626 if (aq_ret)
1627 dev_info(&pf->pdev->dev,
1628 "set multi promisc failed, err %d, aq_err %d\n",
1629 aq_ret, pf->hw.aq.asq_last_status);
1630 }
1631 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1632 bool cur_promisc;
1633 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1634 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1635 &vsi->state));
1636 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1637 vsi->seid,
1638 cur_promisc, NULL);
1639 if (aq_ret)
1640 dev_info(&pf->pdev->dev,
1641 "set uni promisc failed, err %d, aq_err %d\n",
1642 aq_ret, pf->hw.aq.asq_last_status);
1643 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1644 vsi->seid,
1645 cur_promisc, NULL);
1646 if (aq_ret)
1647 dev_info(&pf->pdev->dev,
1648 "set brdcast promisc failed, err %d, aq_err %d\n",
1649 aq_ret, pf->hw.aq.asq_last_status);
1650 }
1651
1652 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1653 return 0;
1654 }
1655
1656 /**
1657 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1658 * @pf: board private structure
1659 **/
1660 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1661 {
1662 int v;
1663
1664 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1665 return;
1666 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1667
1668 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1669 if (pf->vsi[v] &&
1670 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1671 i40e_sync_vsi_filters(pf->vsi[v]);
1672 }
1673 }
1674
1675 /**
1676 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1677 * @netdev: network interface device structure
1678 * @new_mtu: new value for maximum frame size
1679 *
1680 * Returns 0 on success, negative on failure
1681 **/
1682 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1683 {
1684 struct i40e_netdev_priv *np = netdev_priv(netdev);
1685 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1686 struct i40e_vsi *vsi = np->vsi;
1687
1688 /* MTU < 68 is an error and causes problems on some kernels */
1689 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1690 return -EINVAL;
1691
1692 netdev_info(netdev, "changing MTU from %d to %d\n",
1693 netdev->mtu, new_mtu);
1694 netdev->mtu = new_mtu;
1695 if (netif_running(netdev))
1696 i40e_vsi_reinit_locked(vsi);
1697
1698 return 0;
1699 }
1700
1701 /**
1702 * i40e_ioctl - Access the hwtstamp interface
1703 * @netdev: network interface device structure
1704 * @ifr: interface request data
1705 * @cmd: ioctl command
1706 **/
1707 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1708 {
1709 struct i40e_netdev_priv *np = netdev_priv(netdev);
1710 struct i40e_pf *pf = np->vsi->back;
1711
1712 switch (cmd) {
1713 case SIOCGHWTSTAMP:
1714 return i40e_ptp_get_ts_config(pf, ifr);
1715 case SIOCSHWTSTAMP:
1716 return i40e_ptp_set_ts_config(pf, ifr);
1717 default:
1718 return -EOPNOTSUPP;
1719 }
1720 }
1721
1722 /**
1723 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1724 * @vsi: the vsi being adjusted
1725 **/
1726 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1727 {
1728 struct i40e_vsi_context ctxt;
1729 i40e_status ret;
1730
1731 if ((vsi->info.valid_sections &
1732 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1733 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1734 return; /* already enabled */
1735
1736 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1737 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1738 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1739
1740 ctxt.seid = vsi->seid;
1741 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1742 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1743 if (ret) {
1744 dev_info(&vsi->back->pdev->dev,
1745 "%s: update vsi failed, aq_err=%d\n",
1746 __func__, vsi->back->hw.aq.asq_last_status);
1747 }
1748 }
1749
1750 /**
1751 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1752 * @vsi: the vsi being adjusted
1753 **/
1754 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1755 {
1756 struct i40e_vsi_context ctxt;
1757 i40e_status ret;
1758
1759 if ((vsi->info.valid_sections &
1760 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1761 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1762 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1763 return; /* already disabled */
1764
1765 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1766 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1767 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1768
1769 ctxt.seid = vsi->seid;
1770 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1771 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1772 if (ret) {
1773 dev_info(&vsi->back->pdev->dev,
1774 "%s: update vsi failed, aq_err=%d\n",
1775 __func__, vsi->back->hw.aq.asq_last_status);
1776 }
1777 }
1778
1779 /**
1780 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1781 * @netdev: network interface to be adjusted
1782 * @features: netdev features to test if VLAN offload is enabled or not
1783 **/
1784 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1785 {
1786 struct i40e_netdev_priv *np = netdev_priv(netdev);
1787 struct i40e_vsi *vsi = np->vsi;
1788
1789 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1790 i40e_vlan_stripping_enable(vsi);
1791 else
1792 i40e_vlan_stripping_disable(vsi);
1793 }
1794
1795 /**
1796 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1797 * @vsi: the vsi being configured
1798 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1799 **/
1800 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1801 {
1802 struct i40e_mac_filter *f, *add_f;
1803 bool is_netdev, is_vf;
1804
1805 is_vf = (vsi->type == I40E_VSI_SRIOV);
1806 is_netdev = !!(vsi->netdev);
1807
1808 if (is_netdev) {
1809 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1810 is_vf, is_netdev);
1811 if (!add_f) {
1812 dev_info(&vsi->back->pdev->dev,
1813 "Could not add vlan filter %d for %pM\n",
1814 vid, vsi->netdev->dev_addr);
1815 return -ENOMEM;
1816 }
1817 }
1818
1819 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1820 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1821 if (!add_f) {
1822 dev_info(&vsi->back->pdev->dev,
1823 "Could not add vlan filter %d for %pM\n",
1824 vid, f->macaddr);
1825 return -ENOMEM;
1826 }
1827 }
1828
1829 /* Now if we add a vlan tag, make sure to check if it is the first
1830 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1831 * with 0, so we now accept untagged and specified tagged traffic
1832 * (and not any taged and untagged)
1833 */
1834 if (vid > 0) {
1835 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1836 I40E_VLAN_ANY,
1837 is_vf, is_netdev)) {
1838 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1839 I40E_VLAN_ANY, is_vf, is_netdev);
1840 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1841 is_vf, is_netdev);
1842 if (!add_f) {
1843 dev_info(&vsi->back->pdev->dev,
1844 "Could not add filter 0 for %pM\n",
1845 vsi->netdev->dev_addr);
1846 return -ENOMEM;
1847 }
1848 }
1849 }
1850
1851 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1852 if (vid > 0 && !vsi->info.pvid) {
1853 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1854 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1855 is_vf, is_netdev)) {
1856 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1857 is_vf, is_netdev);
1858 add_f = i40e_add_filter(vsi, f->macaddr,
1859 0, is_vf, is_netdev);
1860 if (!add_f) {
1861 dev_info(&vsi->back->pdev->dev,
1862 "Could not add filter 0 for %pM\n",
1863 f->macaddr);
1864 return -ENOMEM;
1865 }
1866 }
1867 }
1868 }
1869
1870 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1871 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1872 return 0;
1873
1874 return i40e_sync_vsi_filters(vsi);
1875 }
1876
1877 /**
1878 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1879 * @vsi: the vsi being configured
1880 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1881 *
1882 * Return: 0 on success or negative otherwise
1883 **/
1884 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1885 {
1886 struct net_device *netdev = vsi->netdev;
1887 struct i40e_mac_filter *f, *add_f;
1888 bool is_vf, is_netdev;
1889 int filter_count = 0;
1890
1891 is_vf = (vsi->type == I40E_VSI_SRIOV);
1892 is_netdev = !!(netdev);
1893
1894 if (is_netdev)
1895 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1896
1897 list_for_each_entry(f, &vsi->mac_filter_list, list)
1898 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1899
1900 /* go through all the filters for this VSI and if there is only
1901 * vid == 0 it means there are no other filters, so vid 0 must
1902 * be replaced with -1. This signifies that we should from now
1903 * on accept any traffic (with any tag present, or untagged)
1904 */
1905 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1906 if (is_netdev) {
1907 if (f->vlan &&
1908 ether_addr_equal(netdev->dev_addr, f->macaddr))
1909 filter_count++;
1910 }
1911
1912 if (f->vlan)
1913 filter_count++;
1914 }
1915
1916 if (!filter_count && is_netdev) {
1917 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1918 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1919 is_vf, is_netdev);
1920 if (!f) {
1921 dev_info(&vsi->back->pdev->dev,
1922 "Could not add filter %d for %pM\n",
1923 I40E_VLAN_ANY, netdev->dev_addr);
1924 return -ENOMEM;
1925 }
1926 }
1927
1928 if (!filter_count) {
1929 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1930 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1931 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1932 is_vf, is_netdev);
1933 if (!add_f) {
1934 dev_info(&vsi->back->pdev->dev,
1935 "Could not add filter %d for %pM\n",
1936 I40E_VLAN_ANY, f->macaddr);
1937 return -ENOMEM;
1938 }
1939 }
1940 }
1941
1942 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1943 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1944 return 0;
1945
1946 return i40e_sync_vsi_filters(vsi);
1947 }
1948
1949 /**
1950 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1951 * @netdev: network interface to be adjusted
1952 * @vid: vlan id to be added
1953 *
1954 * net_device_ops implementation for adding vlan ids
1955 **/
1956 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1957 __always_unused __be16 proto, u16 vid)
1958 {
1959 struct i40e_netdev_priv *np = netdev_priv(netdev);
1960 struct i40e_vsi *vsi = np->vsi;
1961 int ret = 0;
1962
1963 if (vid > 4095)
1964 return -EINVAL;
1965
1966 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1967
1968 /* If the network stack called us with vid = 0, we should
1969 * indicate to i40e_vsi_add_vlan() that we want to receive
1970 * any traffic (i.e. with any vlan tag, or untagged)
1971 */
1972 ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY);
1973
1974 if (!ret && (vid < VLAN_N_VID))
1975 set_bit(vid, vsi->active_vlans);
1976
1977 return ret;
1978 }
1979
1980 /**
1981 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
1982 * @netdev: network interface to be adjusted
1983 * @vid: vlan id to be removed
1984 *
1985 * net_device_ops implementation for adding vlan ids
1986 **/
1987 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
1988 __always_unused __be16 proto, u16 vid)
1989 {
1990 struct i40e_netdev_priv *np = netdev_priv(netdev);
1991 struct i40e_vsi *vsi = np->vsi;
1992
1993 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
1994
1995 /* return code is ignored as there is nothing a user
1996 * can do about failure to remove and a log message was
1997 * already printed from the other function
1998 */
1999 i40e_vsi_kill_vlan(vsi, vid);
2000
2001 clear_bit(vid, vsi->active_vlans);
2002
2003 return 0;
2004 }
2005
2006 /**
2007 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2008 * @vsi: the vsi being brought back up
2009 **/
2010 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2011 {
2012 u16 vid;
2013
2014 if (!vsi->netdev)
2015 return;
2016
2017 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2018
2019 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2020 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2021 vid);
2022 }
2023
2024 /**
2025 * i40e_vsi_add_pvid - Add pvid for the VSI
2026 * @vsi: the vsi being adjusted
2027 * @vid: the vlan id to set as a PVID
2028 **/
2029 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2030 {
2031 struct i40e_vsi_context ctxt;
2032 i40e_status aq_ret;
2033
2034 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2035 vsi->info.pvid = cpu_to_le16(vid);
2036 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2037 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2038 I40E_AQ_VSI_PVLAN_EMOD_STR;
2039
2040 ctxt.seid = vsi->seid;
2041 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2042 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2043 if (aq_ret) {
2044 dev_info(&vsi->back->pdev->dev,
2045 "%s: update vsi failed, aq_err=%d\n",
2046 __func__, vsi->back->hw.aq.asq_last_status);
2047 return -ENOENT;
2048 }
2049
2050 return 0;
2051 }
2052
2053 /**
2054 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2055 * @vsi: the vsi being adjusted
2056 *
2057 * Just use the vlan_rx_register() service to put it back to normal
2058 **/
2059 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2060 {
2061 i40e_vlan_stripping_disable(vsi);
2062
2063 vsi->info.pvid = 0;
2064 }
2065
2066 /**
2067 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2068 * @vsi: ptr to the VSI
2069 *
2070 * If this function returns with an error, then it's possible one or
2071 * more of the rings is populated (while the rest are not). It is the
2072 * callers duty to clean those orphaned rings.
2073 *
2074 * Return 0 on success, negative on failure
2075 **/
2076 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2077 {
2078 int i, err = 0;
2079
2080 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2081 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2082
2083 return err;
2084 }
2085
2086 /**
2087 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2088 * @vsi: ptr to the VSI
2089 *
2090 * Free VSI's transmit software resources
2091 **/
2092 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2093 {
2094 int i;
2095
2096 if (!vsi->tx_rings)
2097 return;
2098
2099 for (i = 0; i < vsi->num_queue_pairs; i++)
2100 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2101 i40e_free_tx_resources(vsi->tx_rings[i]);
2102 }
2103
2104 /**
2105 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2106 * @vsi: ptr to the VSI
2107 *
2108 * If this function returns with an error, then it's possible one or
2109 * more of the rings is populated (while the rest are not). It is the
2110 * callers duty to clean those orphaned rings.
2111 *
2112 * Return 0 on success, negative on failure
2113 **/
2114 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2115 {
2116 int i, err = 0;
2117
2118 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2119 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2120 return err;
2121 }
2122
2123 /**
2124 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2125 * @vsi: ptr to the VSI
2126 *
2127 * Free all receive software resources
2128 **/
2129 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2130 {
2131 int i;
2132
2133 if (!vsi->rx_rings)
2134 return;
2135
2136 for (i = 0; i < vsi->num_queue_pairs; i++)
2137 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2138 i40e_free_rx_resources(vsi->rx_rings[i]);
2139 }
2140
2141 /**
2142 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2143 * @ring: The Tx ring to configure
2144 *
2145 * Configure the Tx descriptor ring in the HMC context.
2146 **/
2147 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2148 {
2149 struct i40e_vsi *vsi = ring->vsi;
2150 u16 pf_q = vsi->base_queue + ring->queue_index;
2151 struct i40e_hw *hw = &vsi->back->hw;
2152 struct i40e_hmc_obj_txq tx_ctx;
2153 i40e_status err = 0;
2154 u32 qtx_ctl = 0;
2155
2156 /* some ATR related tx ring init */
2157 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2158 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2159 ring->atr_count = 0;
2160 } else {
2161 ring->atr_sample_rate = 0;
2162 }
2163
2164 /* initialize XPS */
2165 if (ring->q_vector && ring->netdev &&
2166 vsi->tc_config.numtc <= 1 &&
2167 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2168 netif_set_xps_queue(ring->netdev,
2169 &ring->q_vector->affinity_mask,
2170 ring->queue_index);
2171
2172 /* clear the context structure first */
2173 memset(&tx_ctx, 0, sizeof(tx_ctx));
2174
2175 tx_ctx.new_context = 1;
2176 tx_ctx.base = (ring->dma / 128);
2177 tx_ctx.qlen = ring->count;
2178 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2179 I40E_FLAG_FD_ATR_ENABLED));
2180 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2181
2182 /* As part of VSI creation/update, FW allocates certain
2183 * Tx arbitration queue sets for each TC enabled for
2184 * the VSI. The FW returns the handles to these queue
2185 * sets as part of the response buffer to Add VSI,
2186 * Update VSI, etc. AQ commands. It is expected that
2187 * these queue set handles be associated with the Tx
2188 * queues by the driver as part of the TX queue context
2189 * initialization. This has to be done regardless of
2190 * DCB as by default everything is mapped to TC0.
2191 */
2192 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2193 tx_ctx.rdylist_act = 0;
2194
2195 /* clear the context in the HMC */
2196 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2197 if (err) {
2198 dev_info(&vsi->back->pdev->dev,
2199 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2200 ring->queue_index, pf_q, err);
2201 return -ENOMEM;
2202 }
2203
2204 /* set the context in the HMC */
2205 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2206 if (err) {
2207 dev_info(&vsi->back->pdev->dev,
2208 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2209 ring->queue_index, pf_q, err);
2210 return -ENOMEM;
2211 }
2212
2213 /* Now associate this queue with this PCI function */
2214 if (vsi->type == I40E_VSI_VMDQ2)
2215 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2216 else
2217 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2218 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2219 I40E_QTX_CTL_PF_INDX_MASK);
2220 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2221 i40e_flush(hw);
2222
2223 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2224
2225 /* cache tail off for easier writes later */
2226 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2227
2228 return 0;
2229 }
2230
2231 /**
2232 * i40e_configure_rx_ring - Configure a receive ring context
2233 * @ring: The Rx ring to configure
2234 *
2235 * Configure the Rx descriptor ring in the HMC context.
2236 **/
2237 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2238 {
2239 struct i40e_vsi *vsi = ring->vsi;
2240 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2241 u16 pf_q = vsi->base_queue + ring->queue_index;
2242 struct i40e_hw *hw = &vsi->back->hw;
2243 struct i40e_hmc_obj_rxq rx_ctx;
2244 i40e_status err = 0;
2245
2246 ring->state = 0;
2247
2248 /* clear the context structure first */
2249 memset(&rx_ctx, 0, sizeof(rx_ctx));
2250
2251 ring->rx_buf_len = vsi->rx_buf_len;
2252 ring->rx_hdr_len = vsi->rx_hdr_len;
2253
2254 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2255 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2256
2257 rx_ctx.base = (ring->dma / 128);
2258 rx_ctx.qlen = ring->count;
2259
2260 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2261 set_ring_16byte_desc_enabled(ring);
2262 rx_ctx.dsize = 0;
2263 } else {
2264 rx_ctx.dsize = 1;
2265 }
2266
2267 rx_ctx.dtype = vsi->dtype;
2268 if (vsi->dtype) {
2269 set_ring_ps_enabled(ring);
2270 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2271 I40E_RX_SPLIT_IP |
2272 I40E_RX_SPLIT_TCP_UDP |
2273 I40E_RX_SPLIT_SCTP;
2274 } else {
2275 rx_ctx.hsplit_0 = 0;
2276 }
2277
2278 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2279 (chain_len * ring->rx_buf_len));
2280 rx_ctx.tphrdesc_ena = 1;
2281 rx_ctx.tphwdesc_ena = 1;
2282 rx_ctx.tphdata_ena = 1;
2283 rx_ctx.tphhead_ena = 1;
2284 if (hw->revision_id == 0)
2285 rx_ctx.lrxqthresh = 0;
2286 else
2287 rx_ctx.lrxqthresh = 2;
2288 rx_ctx.crcstrip = 1;
2289 rx_ctx.l2tsel = 1;
2290 rx_ctx.showiv = 1;
2291
2292 /* clear the context in the HMC */
2293 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2294 if (err) {
2295 dev_info(&vsi->back->pdev->dev,
2296 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2297 ring->queue_index, pf_q, err);
2298 return -ENOMEM;
2299 }
2300
2301 /* set the context in the HMC */
2302 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2303 if (err) {
2304 dev_info(&vsi->back->pdev->dev,
2305 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2306 ring->queue_index, pf_q, err);
2307 return -ENOMEM;
2308 }
2309
2310 /* cache tail for quicker writes, and clear the reg before use */
2311 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2312 writel(0, ring->tail);
2313
2314 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2315
2316 return 0;
2317 }
2318
2319 /**
2320 * i40e_vsi_configure_tx - Configure the VSI for Tx
2321 * @vsi: VSI structure describing this set of rings and resources
2322 *
2323 * Configure the Tx VSI for operation.
2324 **/
2325 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2326 {
2327 int err = 0;
2328 u16 i;
2329
2330 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2331 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2332
2333 return err;
2334 }
2335
2336 /**
2337 * i40e_vsi_configure_rx - Configure the VSI for Rx
2338 * @vsi: the VSI being configured
2339 *
2340 * Configure the Rx VSI for operation.
2341 **/
2342 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2343 {
2344 int err = 0;
2345 u16 i;
2346
2347 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2348 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2349 + ETH_FCS_LEN + VLAN_HLEN;
2350 else
2351 vsi->max_frame = I40E_RXBUFFER_2048;
2352
2353 /* figure out correct receive buffer length */
2354 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2355 I40E_FLAG_RX_PS_ENABLED)) {
2356 case I40E_FLAG_RX_1BUF_ENABLED:
2357 vsi->rx_hdr_len = 0;
2358 vsi->rx_buf_len = vsi->max_frame;
2359 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2360 break;
2361 case I40E_FLAG_RX_PS_ENABLED:
2362 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2363 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2364 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2365 break;
2366 default:
2367 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2368 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2369 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2370 break;
2371 }
2372
2373 /* round up for the chip's needs */
2374 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2375 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2376 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2377 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2378
2379 /* set up individual rings */
2380 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2381 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2382
2383 return err;
2384 }
2385
2386 /**
2387 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2388 * @vsi: ptr to the VSI
2389 **/
2390 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2391 {
2392 u16 qoffset, qcount;
2393 int i, n;
2394
2395 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2396 return;
2397
2398 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2399 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2400 continue;
2401
2402 qoffset = vsi->tc_config.tc_info[n].qoffset;
2403 qcount = vsi->tc_config.tc_info[n].qcount;
2404 for (i = qoffset; i < (qoffset + qcount); i++) {
2405 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2406 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2407 rx_ring->dcb_tc = n;
2408 tx_ring->dcb_tc = n;
2409 }
2410 }
2411 }
2412
2413 /**
2414 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2415 * @vsi: ptr to the VSI
2416 **/
2417 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2418 {
2419 if (vsi->netdev)
2420 i40e_set_rx_mode(vsi->netdev);
2421 }
2422
2423 /**
2424 * i40e_vsi_configure - Set up the VSI for action
2425 * @vsi: the VSI being configured
2426 **/
2427 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2428 {
2429 int err;
2430
2431 i40e_set_vsi_rx_mode(vsi);
2432 i40e_restore_vlan(vsi);
2433 i40e_vsi_config_dcb_rings(vsi);
2434 err = i40e_vsi_configure_tx(vsi);
2435 if (!err)
2436 err = i40e_vsi_configure_rx(vsi);
2437
2438 return err;
2439 }
2440
2441 /**
2442 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2443 * @vsi: the VSI being configured
2444 **/
2445 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2446 {
2447 struct i40e_pf *pf = vsi->back;
2448 struct i40e_q_vector *q_vector;
2449 struct i40e_hw *hw = &pf->hw;
2450 u16 vector;
2451 int i, q;
2452 u32 val;
2453 u32 qp;
2454
2455 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2456 * and PFINT_LNKLSTn registers, e.g.:
2457 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2458 */
2459 qp = vsi->base_queue;
2460 vector = vsi->base_vector;
2461 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2462 q_vector = vsi->q_vectors[i];
2463 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2464 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2465 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2466 q_vector->rx.itr);
2467 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2468 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2469 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2470 q_vector->tx.itr);
2471
2472 /* Linked list for the queuepairs assigned to this vector */
2473 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2474 for (q = 0; q < q_vector->num_ringpairs; q++) {
2475 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2476 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2477 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2478 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2479 (I40E_QUEUE_TYPE_TX
2480 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2481
2482 wr32(hw, I40E_QINT_RQCTL(qp), val);
2483
2484 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2485 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2486 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2487 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2488 (I40E_QUEUE_TYPE_RX
2489 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2490
2491 /* Terminate the linked list */
2492 if (q == (q_vector->num_ringpairs - 1))
2493 val |= (I40E_QUEUE_END_OF_LIST
2494 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2495
2496 wr32(hw, I40E_QINT_TQCTL(qp), val);
2497 qp++;
2498 }
2499 }
2500
2501 i40e_flush(hw);
2502 }
2503
2504 /**
2505 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2506 * @hw: ptr to the hardware info
2507 **/
2508 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2509 {
2510 u32 val;
2511
2512 /* clear things first */
2513 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2514 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2515
2516 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2517 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2518 I40E_PFINT_ICR0_ENA_GRST_MASK |
2519 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2520 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2521 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2522 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2523 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2524 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2525 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2526
2527 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2528
2529 /* SW_ITR_IDX = 0, but don't change INTENA */
2530 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2531 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2532
2533 /* OTHER_ITR_IDX = 0 */
2534 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2535 }
2536
2537 /**
2538 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2539 * @vsi: the VSI being configured
2540 **/
2541 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2542 {
2543 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2544 struct i40e_pf *pf = vsi->back;
2545 struct i40e_hw *hw = &pf->hw;
2546 u32 val;
2547
2548 /* set the ITR configuration */
2549 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2550 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2551 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2552 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2553 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2554 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2555
2556 i40e_enable_misc_int_causes(hw);
2557
2558 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2559 wr32(hw, I40E_PFINT_LNKLST0, 0);
2560
2561 /* Associate the queue pair to the vector and enable the q int */
2562 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2563 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2564 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2565
2566 wr32(hw, I40E_QINT_RQCTL(0), val);
2567
2568 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2569 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2570 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2571
2572 wr32(hw, I40E_QINT_TQCTL(0), val);
2573 i40e_flush(hw);
2574 }
2575
2576 /**
2577 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2578 * @pf: board private structure
2579 **/
2580 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2581 {
2582 struct i40e_hw *hw = &pf->hw;
2583
2584 wr32(hw, I40E_PFINT_DYN_CTL0,
2585 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2586 i40e_flush(hw);
2587 }
2588
2589 /**
2590 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2591 * @pf: board private structure
2592 **/
2593 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2594 {
2595 struct i40e_hw *hw = &pf->hw;
2596 u32 val;
2597
2598 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2599 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2600 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2601
2602 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2603 i40e_flush(hw);
2604 }
2605
2606 /**
2607 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2608 * @vsi: pointer to a vsi
2609 * @vector: enable a particular Hw Interrupt vector
2610 **/
2611 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2612 {
2613 struct i40e_pf *pf = vsi->back;
2614 struct i40e_hw *hw = &pf->hw;
2615 u32 val;
2616
2617 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2618 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2619 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2620 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2621 /* skip the flush */
2622 }
2623
2624 /**
2625 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2626 * @irq: interrupt number
2627 * @data: pointer to a q_vector
2628 **/
2629 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2630 {
2631 struct i40e_q_vector *q_vector = data;
2632
2633 if (!q_vector->tx.ring && !q_vector->rx.ring)
2634 return IRQ_HANDLED;
2635
2636 napi_schedule(&q_vector->napi);
2637
2638 return IRQ_HANDLED;
2639 }
2640
2641 /**
2642 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2643 * @vsi: the VSI being configured
2644 * @basename: name for the vector
2645 *
2646 * Allocates MSI-X vectors and requests interrupts from the kernel.
2647 **/
2648 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2649 {
2650 int q_vectors = vsi->num_q_vectors;
2651 struct i40e_pf *pf = vsi->back;
2652 int base = vsi->base_vector;
2653 int rx_int_idx = 0;
2654 int tx_int_idx = 0;
2655 int vector, err;
2656
2657 for (vector = 0; vector < q_vectors; vector++) {
2658 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2659
2660 if (q_vector->tx.ring && q_vector->rx.ring) {
2661 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2662 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2663 tx_int_idx++;
2664 } else if (q_vector->rx.ring) {
2665 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2666 "%s-%s-%d", basename, "rx", rx_int_idx++);
2667 } else if (q_vector->tx.ring) {
2668 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2669 "%s-%s-%d", basename, "tx", tx_int_idx++);
2670 } else {
2671 /* skip this unused q_vector */
2672 continue;
2673 }
2674 err = request_irq(pf->msix_entries[base + vector].vector,
2675 vsi->irq_handler,
2676 0,
2677 q_vector->name,
2678 q_vector);
2679 if (err) {
2680 dev_info(&pf->pdev->dev,
2681 "%s: request_irq failed, error: %d\n",
2682 __func__, err);
2683 goto free_queue_irqs;
2684 }
2685 /* assign the mask for this irq */
2686 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2687 &q_vector->affinity_mask);
2688 }
2689
2690 return 0;
2691
2692 free_queue_irqs:
2693 while (vector) {
2694 vector--;
2695 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2696 NULL);
2697 free_irq(pf->msix_entries[base + vector].vector,
2698 &(vsi->q_vectors[vector]));
2699 }
2700 return err;
2701 }
2702
2703 /**
2704 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2705 * @vsi: the VSI being un-configured
2706 **/
2707 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2708 {
2709 struct i40e_pf *pf = vsi->back;
2710 struct i40e_hw *hw = &pf->hw;
2711 int base = vsi->base_vector;
2712 int i;
2713
2714 for (i = 0; i < vsi->num_queue_pairs; i++) {
2715 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2716 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2717 }
2718
2719 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2720 for (i = vsi->base_vector;
2721 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2722 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2723
2724 i40e_flush(hw);
2725 for (i = 0; i < vsi->num_q_vectors; i++)
2726 synchronize_irq(pf->msix_entries[i + base].vector);
2727 } else {
2728 /* Legacy and MSI mode - this stops all interrupt handling */
2729 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2730 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2731 i40e_flush(hw);
2732 synchronize_irq(pf->pdev->irq);
2733 }
2734 }
2735
2736 /**
2737 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2738 * @vsi: the VSI being configured
2739 **/
2740 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2741 {
2742 struct i40e_pf *pf = vsi->back;
2743 int i;
2744
2745 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2746 for (i = vsi->base_vector;
2747 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2748 i40e_irq_dynamic_enable(vsi, i);
2749 } else {
2750 i40e_irq_dynamic_enable_icr0(pf);
2751 }
2752
2753 i40e_flush(&pf->hw);
2754 return 0;
2755 }
2756
2757 /**
2758 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2759 * @pf: board private structure
2760 **/
2761 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2762 {
2763 /* Disable ICR 0 */
2764 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2765 i40e_flush(&pf->hw);
2766 }
2767
2768 /**
2769 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2770 * @irq: interrupt number
2771 * @data: pointer to a q_vector
2772 *
2773 * This is the handler used for all MSI/Legacy interrupts, and deals
2774 * with both queue and non-queue interrupts. This is also used in
2775 * MSIX mode to handle the non-queue interrupts.
2776 **/
2777 static irqreturn_t i40e_intr(int irq, void *data)
2778 {
2779 struct i40e_pf *pf = (struct i40e_pf *)data;
2780 struct i40e_hw *hw = &pf->hw;
2781 irqreturn_t ret = IRQ_NONE;
2782 u32 icr0, icr0_remaining;
2783 u32 val, ena_mask;
2784
2785 icr0 = rd32(hw, I40E_PFINT_ICR0);
2786 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2787
2788 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2789 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2790 goto enable_intr;
2791
2792 /* if interrupt but no bits showing, must be SWINT */
2793 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2794 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2795 pf->sw_int_count++;
2796
2797 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2798 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2799
2800 /* temporarily disable queue cause for NAPI processing */
2801 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2802 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2803 wr32(hw, I40E_QINT_RQCTL(0), qval);
2804
2805 qval = rd32(hw, I40E_QINT_TQCTL(0));
2806 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2807 wr32(hw, I40E_QINT_TQCTL(0), qval);
2808
2809 if (!test_bit(__I40E_DOWN, &pf->state))
2810 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2811 }
2812
2813 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2814 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2815 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2816 }
2817
2818 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2819 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2820 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2821 }
2822
2823 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2824 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2825 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2826 }
2827
2828 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2829 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2830 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2831 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2832 val = rd32(hw, I40E_GLGEN_RSTAT);
2833 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2834 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2835 if (val == I40E_RESET_CORER)
2836 pf->corer_count++;
2837 else if (val == I40E_RESET_GLOBR)
2838 pf->globr_count++;
2839 else if (val == I40E_RESET_EMPR)
2840 pf->empr_count++;
2841 }
2842
2843 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2844 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2845 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2846 }
2847
2848 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2849 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2850
2851 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2852 ena_mask &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2853 i40e_ptp_tx_hwtstamp(pf);
2854 prttsyn_stat &= ~I40E_PRTTSYN_STAT_0_TXTIME_MASK;
2855 }
2856
2857 wr32(hw, I40E_PRTTSYN_STAT_0, prttsyn_stat);
2858 }
2859
2860 /* If a critical error is pending we have no choice but to reset the
2861 * device.
2862 * Report and mask out any remaining unexpected interrupts.
2863 */
2864 icr0_remaining = icr0 & ena_mask;
2865 if (icr0_remaining) {
2866 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2867 icr0_remaining);
2868 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2869 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2870 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
2871 (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
2872 dev_info(&pf->pdev->dev, "device will be reset\n");
2873 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2874 i40e_service_event_schedule(pf);
2875 }
2876 ena_mask &= ~icr0_remaining;
2877 }
2878 ret = IRQ_HANDLED;
2879
2880 enable_intr:
2881 /* re-enable interrupt causes */
2882 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2883 if (!test_bit(__I40E_DOWN, &pf->state)) {
2884 i40e_service_event_schedule(pf);
2885 i40e_irq_dynamic_enable_icr0(pf);
2886 }
2887
2888 return ret;
2889 }
2890
2891 /**
2892 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
2893 * @tx_ring: tx ring to clean
2894 * @budget: how many cleans we're allowed
2895 *
2896 * Returns true if there's any budget left (e.g. the clean is finished)
2897 **/
2898 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
2899 {
2900 struct i40e_vsi *vsi = tx_ring->vsi;
2901 u16 i = tx_ring->next_to_clean;
2902 struct i40e_tx_buffer *tx_buf;
2903 struct i40e_tx_desc *tx_desc;
2904
2905 tx_buf = &tx_ring->tx_bi[i];
2906 tx_desc = I40E_TX_DESC(tx_ring, i);
2907 i -= tx_ring->count;
2908
2909 do {
2910 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
2911
2912 /* if next_to_watch is not set then there is no work pending */
2913 if (!eop_desc)
2914 break;
2915
2916 /* prevent any other reads prior to eop_desc */
2917 read_barrier_depends();
2918
2919 /* if the descriptor isn't done, no work yet to do */
2920 if (!(eop_desc->cmd_type_offset_bsz &
2921 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
2922 break;
2923
2924 /* clear next_to_watch to prevent false hangs */
2925 tx_buf->next_to_watch = NULL;
2926
2927 /* unmap skb header data */
2928 dma_unmap_single(tx_ring->dev,
2929 dma_unmap_addr(tx_buf, dma),
2930 dma_unmap_len(tx_buf, len),
2931 DMA_TO_DEVICE);
2932
2933 dma_unmap_len_set(tx_buf, len, 0);
2934
2935
2936 /* move to the next desc and buffer to clean */
2937 tx_buf++;
2938 tx_desc++;
2939 i++;
2940 if (unlikely(!i)) {
2941 i -= tx_ring->count;
2942 tx_buf = tx_ring->tx_bi;
2943 tx_desc = I40E_TX_DESC(tx_ring, 0);
2944 }
2945
2946 /* update budget accounting */
2947 budget--;
2948 } while (likely(budget));
2949
2950 i += tx_ring->count;
2951 tx_ring->next_to_clean = i;
2952
2953 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
2954 i40e_irq_dynamic_enable(vsi,
2955 tx_ring->q_vector->v_idx + vsi->base_vector);
2956 }
2957 return budget > 0;
2958 }
2959
2960 /**
2961 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
2962 * @irq: interrupt number
2963 * @data: pointer to a q_vector
2964 **/
2965 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
2966 {
2967 struct i40e_q_vector *q_vector = data;
2968 struct i40e_vsi *vsi;
2969
2970 if (!q_vector->tx.ring)
2971 return IRQ_HANDLED;
2972
2973 vsi = q_vector->tx.ring->vsi;
2974 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
2975
2976 return IRQ_HANDLED;
2977 }
2978
2979 /**
2980 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
2981 * @vsi: the VSI being configured
2982 * @v_idx: vector index
2983 * @qp_idx: queue pair index
2984 **/
2985 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
2986 {
2987 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
2988 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
2989 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
2990
2991 tx_ring->q_vector = q_vector;
2992 tx_ring->next = q_vector->tx.ring;
2993 q_vector->tx.ring = tx_ring;
2994 q_vector->tx.count++;
2995
2996 rx_ring->q_vector = q_vector;
2997 rx_ring->next = q_vector->rx.ring;
2998 q_vector->rx.ring = rx_ring;
2999 q_vector->rx.count++;
3000 }
3001
3002 /**
3003 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3004 * @vsi: the VSI being configured
3005 *
3006 * This function maps descriptor rings to the queue-specific vectors
3007 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3008 * one vector per queue pair, but on a constrained vector budget, we
3009 * group the queue pairs as "efficiently" as possible.
3010 **/
3011 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3012 {
3013 int qp_remaining = vsi->num_queue_pairs;
3014 int q_vectors = vsi->num_q_vectors;
3015 int num_ringpairs;
3016 int v_start = 0;
3017 int qp_idx = 0;
3018
3019 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3020 * group them so there are multiple queues per vector.
3021 */
3022 for (; v_start < q_vectors && qp_remaining; v_start++) {
3023 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3024
3025 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3026
3027 q_vector->num_ringpairs = num_ringpairs;
3028
3029 q_vector->rx.count = 0;
3030 q_vector->tx.count = 0;
3031 q_vector->rx.ring = NULL;
3032 q_vector->tx.ring = NULL;
3033
3034 while (num_ringpairs--) {
3035 map_vector_to_qp(vsi, v_start, qp_idx);
3036 qp_idx++;
3037 qp_remaining--;
3038 }
3039 }
3040 }
3041
3042 /**
3043 * i40e_vsi_request_irq - Request IRQ from the OS
3044 * @vsi: the VSI being configured
3045 * @basename: name for the vector
3046 **/
3047 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3048 {
3049 struct i40e_pf *pf = vsi->back;
3050 int err;
3051
3052 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3053 err = i40e_vsi_request_irq_msix(vsi, basename);
3054 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3055 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3056 pf->misc_int_name, pf);
3057 else
3058 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3059 pf->misc_int_name, pf);
3060
3061 if (err)
3062 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3063
3064 return err;
3065 }
3066
3067 #ifdef CONFIG_NET_POLL_CONTROLLER
3068 /**
3069 * i40e_netpoll - A Polling 'interrupt'handler
3070 * @netdev: network interface device structure
3071 *
3072 * This is used by netconsole to send skbs without having to re-enable
3073 * interrupts. It's not called while the normal interrupt routine is executing.
3074 **/
3075 static void i40e_netpoll(struct net_device *netdev)
3076 {
3077 struct i40e_netdev_priv *np = netdev_priv(netdev);
3078 struct i40e_vsi *vsi = np->vsi;
3079 struct i40e_pf *pf = vsi->back;
3080 int i;
3081
3082 /* if interface is down do nothing */
3083 if (test_bit(__I40E_DOWN, &vsi->state))
3084 return;
3085
3086 pf->flags |= I40E_FLAG_IN_NETPOLL;
3087 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3088 for (i = 0; i < vsi->num_q_vectors; i++)
3089 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3090 } else {
3091 i40e_intr(pf->pdev->irq, netdev);
3092 }
3093 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3094 }
3095 #endif
3096
3097 /**
3098 * i40e_vsi_control_tx - Start or stop a VSI's rings
3099 * @vsi: the VSI being configured
3100 * @enable: start or stop the rings
3101 **/
3102 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3103 {
3104 struct i40e_pf *pf = vsi->back;
3105 struct i40e_hw *hw = &pf->hw;
3106 int i, j, pf_q;
3107 u32 tx_reg;
3108
3109 pf_q = vsi->base_queue;
3110 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3111 for (j = 0; j < 50; j++) {
3112 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3113 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3114 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3115 break;
3116 usleep_range(1000, 2000);
3117 }
3118 /* Skip if the queue is already in the requested state */
3119 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3120 continue;
3121 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3122 continue;
3123
3124 /* turn on/off the queue */
3125 if (enable) {
3126 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3127 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3128 } else {
3129 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3130 }
3131
3132 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3133
3134 /* wait for the change to finish */
3135 for (j = 0; j < 10; j++) {
3136 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3137 if (enable) {
3138 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3139 break;
3140 } else {
3141 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3142 break;
3143 }
3144
3145 udelay(10);
3146 }
3147 if (j >= 10) {
3148 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3149 pf_q, (enable ? "en" : "dis"));
3150 return -ETIMEDOUT;
3151 }
3152 }
3153
3154 if (hw->revision_id == 0)
3155 mdelay(50);
3156
3157 return 0;
3158 }
3159
3160 /**
3161 * i40e_vsi_control_rx - Start or stop a VSI's rings
3162 * @vsi: the VSI being configured
3163 * @enable: start or stop the rings
3164 **/
3165 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3166 {
3167 struct i40e_pf *pf = vsi->back;
3168 struct i40e_hw *hw = &pf->hw;
3169 int i, j, pf_q;
3170 u32 rx_reg;
3171
3172 pf_q = vsi->base_queue;
3173 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3174 for (j = 0; j < 50; j++) {
3175 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3176 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3177 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3178 break;
3179 usleep_range(1000, 2000);
3180 }
3181
3182 if (enable) {
3183 /* is STAT set ? */
3184 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3185 continue;
3186 } else {
3187 /* is !STAT set ? */
3188 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3189 continue;
3190 }
3191
3192 /* turn on/off the queue */
3193 if (enable)
3194 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3195 else
3196 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3197 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3198
3199 /* wait for the change to finish */
3200 for (j = 0; j < 10; j++) {
3201 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3202
3203 if (enable) {
3204 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3205 break;
3206 } else {
3207 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3208 break;
3209 }
3210
3211 udelay(10);
3212 }
3213 if (j >= 10) {
3214 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3215 pf_q, (enable ? "en" : "dis"));
3216 return -ETIMEDOUT;
3217 }
3218 }
3219
3220 return 0;
3221 }
3222
3223 /**
3224 * i40e_vsi_control_rings - Start or stop a VSI's rings
3225 * @vsi: the VSI being configured
3226 * @enable: start or stop the rings
3227 **/
3228 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3229 {
3230 int ret = 0;
3231
3232 /* do rx first for enable and last for disable */
3233 if (request) {
3234 ret = i40e_vsi_control_rx(vsi, request);
3235 if (ret)
3236 return ret;
3237 ret = i40e_vsi_control_tx(vsi, request);
3238 } else {
3239 /* Ignore return value, we need to shutdown whatever we can */
3240 i40e_vsi_control_tx(vsi, request);
3241 i40e_vsi_control_rx(vsi, request);
3242 }
3243
3244 return ret;
3245 }
3246
3247 /**
3248 * i40e_vsi_free_irq - Free the irq association with the OS
3249 * @vsi: the VSI being configured
3250 **/
3251 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3252 {
3253 struct i40e_pf *pf = vsi->back;
3254 struct i40e_hw *hw = &pf->hw;
3255 int base = vsi->base_vector;
3256 u32 val, qp;
3257 int i;
3258
3259 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3260 if (!vsi->q_vectors)
3261 return;
3262
3263 for (i = 0; i < vsi->num_q_vectors; i++) {
3264 u16 vector = i + base;
3265
3266 /* free only the irqs that were actually requested */
3267 if (!vsi->q_vectors[i] ||
3268 !vsi->q_vectors[i]->num_ringpairs)
3269 continue;
3270
3271 /* clear the affinity_mask in the IRQ descriptor */
3272 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3273 NULL);
3274 free_irq(pf->msix_entries[vector].vector,
3275 vsi->q_vectors[i]);
3276
3277 /* Tear down the interrupt queue link list
3278 *
3279 * We know that they come in pairs and always
3280 * the Rx first, then the Tx. To clear the
3281 * link list, stick the EOL value into the
3282 * next_q field of the registers.
3283 */
3284 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3285 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3286 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3287 val |= I40E_QUEUE_END_OF_LIST
3288 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3289 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3290
3291 while (qp != I40E_QUEUE_END_OF_LIST) {
3292 u32 next;
3293
3294 val = rd32(hw, I40E_QINT_RQCTL(qp));
3295
3296 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3297 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3298 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3299 I40E_QINT_RQCTL_INTEVENT_MASK);
3300
3301 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3302 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3303
3304 wr32(hw, I40E_QINT_RQCTL(qp), val);
3305
3306 val = rd32(hw, I40E_QINT_TQCTL(qp));
3307
3308 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3309 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3310
3311 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3312 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3313 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3314 I40E_QINT_TQCTL_INTEVENT_MASK);
3315
3316 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3317 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3318
3319 wr32(hw, I40E_QINT_TQCTL(qp), val);
3320 qp = next;
3321 }
3322 }
3323 } else {
3324 free_irq(pf->pdev->irq, pf);
3325
3326 val = rd32(hw, I40E_PFINT_LNKLST0);
3327 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3328 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3329 val |= I40E_QUEUE_END_OF_LIST
3330 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3331 wr32(hw, I40E_PFINT_LNKLST0, val);
3332
3333 val = rd32(hw, I40E_QINT_RQCTL(qp));
3334 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3335 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3336 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3337 I40E_QINT_RQCTL_INTEVENT_MASK);
3338
3339 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3340 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3341
3342 wr32(hw, I40E_QINT_RQCTL(qp), val);
3343
3344 val = rd32(hw, I40E_QINT_TQCTL(qp));
3345
3346 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3347 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3348 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3349 I40E_QINT_TQCTL_INTEVENT_MASK);
3350
3351 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3352 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3353
3354 wr32(hw, I40E_QINT_TQCTL(qp), val);
3355 }
3356 }
3357
3358 /**
3359 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3360 * @vsi: the VSI being configured
3361 * @v_idx: Index of vector to be freed
3362 *
3363 * This function frees the memory allocated to the q_vector. In addition if
3364 * NAPI is enabled it will delete any references to the NAPI struct prior
3365 * to freeing the q_vector.
3366 **/
3367 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3368 {
3369 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3370 struct i40e_ring *ring;
3371
3372 if (!q_vector)
3373 return;
3374
3375 /* disassociate q_vector from rings */
3376 i40e_for_each_ring(ring, q_vector->tx)
3377 ring->q_vector = NULL;
3378
3379 i40e_for_each_ring(ring, q_vector->rx)
3380 ring->q_vector = NULL;
3381
3382 /* only VSI w/ an associated netdev is set up w/ NAPI */
3383 if (vsi->netdev)
3384 netif_napi_del(&q_vector->napi);
3385
3386 vsi->q_vectors[v_idx] = NULL;
3387
3388 kfree_rcu(q_vector, rcu);
3389 }
3390
3391 /**
3392 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3393 * @vsi: the VSI being un-configured
3394 *
3395 * This frees the memory allocated to the q_vectors and
3396 * deletes references to the NAPI struct.
3397 **/
3398 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3399 {
3400 int v_idx;
3401
3402 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3403 i40e_free_q_vector(vsi, v_idx);
3404 }
3405
3406 /**
3407 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3408 * @pf: board private structure
3409 **/
3410 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3411 {
3412 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3413 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3414 pci_disable_msix(pf->pdev);
3415 kfree(pf->msix_entries);
3416 pf->msix_entries = NULL;
3417 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3418 pci_disable_msi(pf->pdev);
3419 }
3420 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3421 }
3422
3423 /**
3424 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3425 * @pf: board private structure
3426 *
3427 * We go through and clear interrupt specific resources and reset the structure
3428 * to pre-load conditions
3429 **/
3430 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3431 {
3432 int i;
3433
3434 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3435 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3436 if (pf->vsi[i])
3437 i40e_vsi_free_q_vectors(pf->vsi[i]);
3438 i40e_reset_interrupt_capability(pf);
3439 }
3440
3441 /**
3442 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3443 * @vsi: the VSI being configured
3444 **/
3445 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3446 {
3447 int q_idx;
3448
3449 if (!vsi->netdev)
3450 return;
3451
3452 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3453 napi_enable(&vsi->q_vectors[q_idx]->napi);
3454 }
3455
3456 /**
3457 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3458 * @vsi: the VSI being configured
3459 **/
3460 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3461 {
3462 int q_idx;
3463
3464 if (!vsi->netdev)
3465 return;
3466
3467 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3468 napi_disable(&vsi->q_vectors[q_idx]->napi);
3469 }
3470
3471 /**
3472 * i40e_quiesce_vsi - Pause a given VSI
3473 * @vsi: the VSI being paused
3474 **/
3475 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3476 {
3477 if (test_bit(__I40E_DOWN, &vsi->state))
3478 return;
3479
3480 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3481 if (vsi->netdev && netif_running(vsi->netdev)) {
3482 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3483 } else {
3484 set_bit(__I40E_DOWN, &vsi->state);
3485 i40e_down(vsi);
3486 }
3487 }
3488
3489 /**
3490 * i40e_unquiesce_vsi - Resume a given VSI
3491 * @vsi: the VSI being resumed
3492 **/
3493 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3494 {
3495 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3496 return;
3497
3498 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3499 if (vsi->netdev && netif_running(vsi->netdev))
3500 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3501 else
3502 i40e_up(vsi); /* this clears the DOWN bit */
3503 }
3504
3505 /**
3506 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3507 * @pf: the PF
3508 **/
3509 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3510 {
3511 int v;
3512
3513 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3514 if (pf->vsi[v])
3515 i40e_quiesce_vsi(pf->vsi[v]);
3516 }
3517 }
3518
3519 /**
3520 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3521 * @pf: the PF
3522 **/
3523 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3524 {
3525 int v;
3526
3527 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3528 if (pf->vsi[v])
3529 i40e_unquiesce_vsi(pf->vsi[v]);
3530 }
3531 }
3532
3533 /**
3534 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3535 * @dcbcfg: the corresponding DCBx configuration structure
3536 *
3537 * Return the number of TCs from given DCBx configuration
3538 **/
3539 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3540 {
3541 u8 num_tc = 0;
3542 int i;
3543
3544 /* Scan the ETS Config Priority Table to find
3545 * traffic class enabled for a given priority
3546 * and use the traffic class index to get the
3547 * number of traffic classes enabled
3548 */
3549 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3550 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3551 num_tc = dcbcfg->etscfg.prioritytable[i];
3552 }
3553
3554 /* Traffic class index starts from zero so
3555 * increment to return the actual count
3556 */
3557 return num_tc + 1;
3558 }
3559
3560 /**
3561 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3562 * @dcbcfg: the corresponding DCBx configuration structure
3563 *
3564 * Query the current DCB configuration and return the number of
3565 * traffic classes enabled from the given DCBX config
3566 **/
3567 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3568 {
3569 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3570 u8 enabled_tc = 1;
3571 u8 i;
3572
3573 for (i = 0; i < num_tc; i++)
3574 enabled_tc |= 1 << i;
3575
3576 return enabled_tc;
3577 }
3578
3579 /**
3580 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3581 * @pf: PF being queried
3582 *
3583 * Return number of traffic classes enabled for the given PF
3584 **/
3585 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3586 {
3587 struct i40e_hw *hw = &pf->hw;
3588 u8 i, enabled_tc;
3589 u8 num_tc = 0;
3590 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3591
3592 /* If DCB is not enabled then always in single TC */
3593 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3594 return 1;
3595
3596 /* MFP mode return count of enabled TCs for this PF */
3597 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3598 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3599 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3600 if (enabled_tc & (1 << i))
3601 num_tc++;
3602 }
3603 return num_tc;
3604 }
3605
3606 /* SFP mode will be enabled for all TCs on port */
3607 return i40e_dcb_get_num_tc(dcbcfg);
3608 }
3609
3610 /**
3611 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3612 * @pf: PF being queried
3613 *
3614 * Return a bitmap for first enabled traffic class for this PF.
3615 **/
3616 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3617 {
3618 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3619 u8 i = 0;
3620
3621 if (!enabled_tc)
3622 return 0x1; /* TC0 */
3623
3624 /* Find the first enabled TC */
3625 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3626 if (enabled_tc & (1 << i))
3627 break;
3628 }
3629
3630 return 1 << i;
3631 }
3632
3633 /**
3634 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3635 * @pf: PF being queried
3636 *
3637 * Return a bitmap for enabled traffic classes for this PF.
3638 **/
3639 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3640 {
3641 /* If DCB is not enabled for this PF then just return default TC */
3642 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3643 return i40e_pf_get_default_tc(pf);
3644
3645 /* MFP mode will have enabled TCs set by FW */
3646 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3647 return pf->hw.func_caps.enabled_tcmap;
3648
3649 /* SFP mode we want PF to be enabled for all TCs */
3650 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3651 }
3652
3653 /**
3654 * i40e_vsi_get_bw_info - Query VSI BW Information
3655 * @vsi: the VSI being queried
3656 *
3657 * Returns 0 on success, negative value on failure
3658 **/
3659 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3660 {
3661 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3662 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3663 struct i40e_pf *pf = vsi->back;
3664 struct i40e_hw *hw = &pf->hw;
3665 i40e_status aq_ret;
3666 u32 tc_bw_max;
3667 int i;
3668
3669 /* Get the VSI level BW configuration */
3670 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3671 if (aq_ret) {
3672 dev_info(&pf->pdev->dev,
3673 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3674 aq_ret, pf->hw.aq.asq_last_status);
3675 return -EINVAL;
3676 }
3677
3678 /* Get the VSI level BW configuration per TC */
3679 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3680 NULL);
3681 if (aq_ret) {
3682 dev_info(&pf->pdev->dev,
3683 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3684 aq_ret, pf->hw.aq.asq_last_status);
3685 return -EINVAL;
3686 }
3687
3688 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3689 dev_info(&pf->pdev->dev,
3690 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3691 bw_config.tc_valid_bits,
3692 bw_ets_config.tc_valid_bits);
3693 /* Still continuing */
3694 }
3695
3696 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3697 vsi->bw_max_quanta = bw_config.max_bw;
3698 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3699 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3700 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3701 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3702 vsi->bw_ets_limit_credits[i] =
3703 le16_to_cpu(bw_ets_config.credits[i]);
3704 /* 3 bits out of 4 for each TC */
3705 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3706 }
3707
3708 return 0;
3709 }
3710
3711 /**
3712 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3713 * @vsi: the VSI being configured
3714 * @enabled_tc: TC bitmap
3715 * @bw_credits: BW shared credits per TC
3716 *
3717 * Returns 0 on success, negative value on failure
3718 **/
3719 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3720 u8 *bw_share)
3721 {
3722 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3723 i40e_status aq_ret;
3724 int i;
3725
3726 bw_data.tc_valid_bits = enabled_tc;
3727 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3728 bw_data.tc_bw_credits[i] = bw_share[i];
3729
3730 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3731 NULL);
3732 if (aq_ret) {
3733 dev_info(&vsi->back->pdev->dev,
3734 "%s: AQ command Config VSI BW allocation per TC failed = %d\n",
3735 __func__, vsi->back->hw.aq.asq_last_status);
3736 return -EINVAL;
3737 }
3738
3739 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3740 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3741
3742 return 0;
3743 }
3744
3745 /**
3746 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3747 * @vsi: the VSI being configured
3748 * @enabled_tc: TC map to be enabled
3749 *
3750 **/
3751 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3752 {
3753 struct net_device *netdev = vsi->netdev;
3754 struct i40e_pf *pf = vsi->back;
3755 struct i40e_hw *hw = &pf->hw;
3756 u8 netdev_tc = 0;
3757 int i;
3758 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3759
3760 if (!netdev)
3761 return;
3762
3763 if (!enabled_tc) {
3764 netdev_reset_tc(netdev);
3765 return;
3766 }
3767
3768 /* Set up actual enabled TCs on the VSI */
3769 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3770 return;
3771
3772 /* set per TC queues for the VSI */
3773 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3774 /* Only set TC queues for enabled tcs
3775 *
3776 * e.g. For a VSI that has TC0 and TC3 enabled the
3777 * enabled_tc bitmap would be 0x00001001; the driver
3778 * will set the numtc for netdev as 2 that will be
3779 * referenced by the netdev layer as TC 0 and 1.
3780 */
3781 if (vsi->tc_config.enabled_tc & (1 << i))
3782 netdev_set_tc_queue(netdev,
3783 vsi->tc_config.tc_info[i].netdev_tc,
3784 vsi->tc_config.tc_info[i].qcount,
3785 vsi->tc_config.tc_info[i].qoffset);
3786 }
3787
3788 /* Assign UP2TC map for the VSI */
3789 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3790 /* Get the actual TC# for the UP */
3791 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3792 /* Get the mapped netdev TC# for the UP */
3793 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3794 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3795 }
3796 }
3797
3798 /**
3799 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3800 * @vsi: the VSI being configured
3801 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3802 **/
3803 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3804 struct i40e_vsi_context *ctxt)
3805 {
3806 /* copy just the sections touched not the entire info
3807 * since not all sections are valid as returned by
3808 * update vsi params
3809 */
3810 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3811 memcpy(&vsi->info.queue_mapping,
3812 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3813 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3814 sizeof(vsi->info.tc_mapping));
3815 }
3816
3817 /**
3818 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3819 * @vsi: VSI to be configured
3820 * @enabled_tc: TC bitmap
3821 *
3822 * This configures a particular VSI for TCs that are mapped to the
3823 * given TC bitmap. It uses default bandwidth share for TCs across
3824 * VSIs to configure TC for a particular VSI.
3825 *
3826 * NOTE:
3827 * It is expected that the VSI queues have been quisced before calling
3828 * this function.
3829 **/
3830 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3831 {
3832 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3833 struct i40e_vsi_context ctxt;
3834 int ret = 0;
3835 int i;
3836
3837 /* Check if enabled_tc is same as existing or new TCs */
3838 if (vsi->tc_config.enabled_tc == enabled_tc)
3839 return ret;
3840
3841 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3842 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3843 if (enabled_tc & (1 << i))
3844 bw_share[i] = 1;
3845 }
3846
3847 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3848 if (ret) {
3849 dev_info(&vsi->back->pdev->dev,
3850 "Failed configuring TC map %d for VSI %d\n",
3851 enabled_tc, vsi->seid);
3852 goto out;
3853 }
3854
3855 /* Update Queue Pairs Mapping for currently enabled UPs */
3856 ctxt.seid = vsi->seid;
3857 ctxt.pf_num = vsi->back->hw.pf_id;
3858 ctxt.vf_num = 0;
3859 ctxt.uplink_seid = vsi->uplink_seid;
3860 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3861 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3862
3863 /* Update the VSI after updating the VSI queue-mapping information */
3864 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3865 if (ret) {
3866 dev_info(&vsi->back->pdev->dev,
3867 "update vsi failed, aq_err=%d\n",
3868 vsi->back->hw.aq.asq_last_status);
3869 goto out;
3870 }
3871 /* update the local VSI info with updated queue map */
3872 i40e_vsi_update_queue_map(vsi, &ctxt);
3873 vsi->info.valid_sections = 0;
3874
3875 /* Update current VSI BW information */
3876 ret = i40e_vsi_get_bw_info(vsi);
3877 if (ret) {
3878 dev_info(&vsi->back->pdev->dev,
3879 "Failed updating vsi bw info, aq_err=%d\n",
3880 vsi->back->hw.aq.asq_last_status);
3881 goto out;
3882 }
3883
3884 /* Update the netdev TC setup */
3885 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3886 out:
3887 return ret;
3888 }
3889
3890 /**
3891 * i40e_veb_config_tc - Configure TCs for given VEB
3892 * @veb: given VEB
3893 * @enabled_tc: TC bitmap
3894 *
3895 * Configures given TC bitmap for VEB (switching) element
3896 **/
3897 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
3898 {
3899 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
3900 struct i40e_pf *pf = veb->pf;
3901 int ret = 0;
3902 int i;
3903
3904 /* No TCs or already enabled TCs just return */
3905 if (!enabled_tc || veb->enabled_tc == enabled_tc)
3906 return ret;
3907
3908 bw_data.tc_valid_bits = enabled_tc;
3909 /* bw_data.absolute_credits is not set (relative) */
3910
3911 /* Enable ETS TCs with equal BW Share for now */
3912 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3913 if (enabled_tc & (1 << i))
3914 bw_data.tc_bw_share_credits[i] = 1;
3915 }
3916
3917 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
3918 &bw_data, NULL);
3919 if (ret) {
3920 dev_info(&pf->pdev->dev,
3921 "veb bw config failed, aq_err=%d\n",
3922 pf->hw.aq.asq_last_status);
3923 goto out;
3924 }
3925
3926 /* Update the BW information */
3927 ret = i40e_veb_get_bw_info(veb);
3928 if (ret) {
3929 dev_info(&pf->pdev->dev,
3930 "Failed getting veb bw config, aq_err=%d\n",
3931 pf->hw.aq.asq_last_status);
3932 }
3933
3934 out:
3935 return ret;
3936 }
3937
3938 #ifdef CONFIG_I40E_DCB
3939 /**
3940 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
3941 * @pf: PF struct
3942 *
3943 * Reconfigure VEB/VSIs on a given PF; it is assumed that
3944 * the caller would've quiesce all the VSIs before calling
3945 * this function
3946 **/
3947 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
3948 {
3949 u8 tc_map = 0;
3950 int ret;
3951 u8 v;
3952
3953 /* Enable the TCs available on PF to all VEBs */
3954 tc_map = i40e_pf_get_tc_map(pf);
3955 for (v = 0; v < I40E_MAX_VEB; v++) {
3956 if (!pf->veb[v])
3957 continue;
3958 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
3959 if (ret) {
3960 dev_info(&pf->pdev->dev,
3961 "Failed configuring TC for VEB seid=%d\n",
3962 pf->veb[v]->seid);
3963 /* Will try to configure as many components */
3964 }
3965 }
3966
3967 /* Update each VSI */
3968 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3969 if (!pf->vsi[v])
3970 continue;
3971
3972 /* - Enable all TCs for the LAN VSI
3973 * - For all others keep them at TC0 for now
3974 */
3975 if (v == pf->lan_vsi)
3976 tc_map = i40e_pf_get_tc_map(pf);
3977 else
3978 tc_map = i40e_pf_get_default_tc(pf);
3979
3980 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
3981 if (ret) {
3982 dev_info(&pf->pdev->dev,
3983 "Failed configuring TC for VSI seid=%d\n",
3984 pf->vsi[v]->seid);
3985 /* Will try to configure as many components */
3986 } else {
3987 if (pf->vsi[v]->netdev)
3988 i40e_dcbnl_set_all(pf->vsi[v]);
3989 }
3990 }
3991 }
3992
3993 /**
3994 * i40e_init_pf_dcb - Initialize DCB configuration
3995 * @pf: PF being configured
3996 *
3997 * Query the current DCB configuration and cache it
3998 * in the hardware structure
3999 **/
4000 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4001 {
4002 struct i40e_hw *hw = &pf->hw;
4003 int err = 0;
4004
4005 if (pf->hw.func_caps.npar_enable)
4006 goto out;
4007
4008 /* Get the initial DCB configuration */
4009 err = i40e_init_dcb(hw);
4010 if (!err) {
4011 /* Device/Function is not DCBX capable */
4012 if ((!hw->func_caps.dcb) ||
4013 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4014 dev_info(&pf->pdev->dev,
4015 "DCBX offload is not supported or is disabled for this PF.\n");
4016
4017 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4018 goto out;
4019
4020 } else {
4021 /* When status is not DISABLED then DCBX in FW */
4022 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4023 DCB_CAP_DCBX_VER_IEEE;
4024 pf->flags |= I40E_FLAG_DCB_ENABLED;
4025 }
4026 }
4027
4028 out:
4029 return err;
4030 }
4031 #endif /* CONFIG_I40E_DCB */
4032
4033 /**
4034 * i40e_up_complete - Finish the last steps of bringing up a connection
4035 * @vsi: the VSI being configured
4036 **/
4037 static int i40e_up_complete(struct i40e_vsi *vsi)
4038 {
4039 struct i40e_pf *pf = vsi->back;
4040 int err;
4041
4042 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4043 i40e_vsi_configure_msix(vsi);
4044 else
4045 i40e_configure_msi_and_legacy(vsi);
4046
4047 /* start rings */
4048 err = i40e_vsi_control_rings(vsi, true);
4049 if (err)
4050 return err;
4051
4052 clear_bit(__I40E_DOWN, &vsi->state);
4053 i40e_napi_enable_all(vsi);
4054 i40e_vsi_enable_irq(vsi);
4055
4056 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4057 (vsi->netdev)) {
4058 netdev_info(vsi->netdev, "NIC Link is Up\n");
4059 netif_tx_start_all_queues(vsi->netdev);
4060 netif_carrier_on(vsi->netdev);
4061 } else if (vsi->netdev) {
4062 netdev_info(vsi->netdev, "NIC Link is Down\n");
4063 }
4064 i40e_service_event_schedule(pf);
4065
4066 return 0;
4067 }
4068
4069 /**
4070 * i40e_vsi_reinit_locked - Reset the VSI
4071 * @vsi: the VSI being configured
4072 *
4073 * Rebuild the ring structs after some configuration
4074 * has changed, e.g. MTU size.
4075 **/
4076 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4077 {
4078 struct i40e_pf *pf = vsi->back;
4079
4080 WARN_ON(in_interrupt());
4081 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4082 usleep_range(1000, 2000);
4083 i40e_down(vsi);
4084
4085 /* Give a VF some time to respond to the reset. The
4086 * two second wait is based upon the watchdog cycle in
4087 * the VF driver.
4088 */
4089 if (vsi->type == I40E_VSI_SRIOV)
4090 msleep(2000);
4091 i40e_up(vsi);
4092 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4093 }
4094
4095 /**
4096 * i40e_up - Bring the connection back up after being down
4097 * @vsi: the VSI being configured
4098 **/
4099 int i40e_up(struct i40e_vsi *vsi)
4100 {
4101 int err;
4102
4103 err = i40e_vsi_configure(vsi);
4104 if (!err)
4105 err = i40e_up_complete(vsi);
4106
4107 return err;
4108 }
4109
4110 /**
4111 * i40e_down - Shutdown the connection processing
4112 * @vsi: the VSI being stopped
4113 **/
4114 void i40e_down(struct i40e_vsi *vsi)
4115 {
4116 int i;
4117
4118 /* It is assumed that the caller of this function
4119 * sets the vsi->state __I40E_DOWN bit.
4120 */
4121 if (vsi->netdev) {
4122 netif_carrier_off(vsi->netdev);
4123 netif_tx_disable(vsi->netdev);
4124 }
4125 i40e_vsi_disable_irq(vsi);
4126 i40e_vsi_control_rings(vsi, false);
4127 i40e_napi_disable_all(vsi);
4128
4129 for (i = 0; i < vsi->num_queue_pairs; i++) {
4130 i40e_clean_tx_ring(vsi->tx_rings[i]);
4131 i40e_clean_rx_ring(vsi->rx_rings[i]);
4132 }
4133 }
4134
4135 /**
4136 * i40e_setup_tc - configure multiple traffic classes
4137 * @netdev: net device to configure
4138 * @tc: number of traffic classes to enable
4139 **/
4140 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4141 {
4142 struct i40e_netdev_priv *np = netdev_priv(netdev);
4143 struct i40e_vsi *vsi = np->vsi;
4144 struct i40e_pf *pf = vsi->back;
4145 u8 enabled_tc = 0;
4146 int ret = -EINVAL;
4147 int i;
4148
4149 /* Check if DCB enabled to continue */
4150 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4151 netdev_info(netdev, "DCB is not enabled for adapter\n");
4152 goto exit;
4153 }
4154
4155 /* Check if MFP enabled */
4156 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4157 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4158 goto exit;
4159 }
4160
4161 /* Check whether tc count is within enabled limit */
4162 if (tc > i40e_pf_get_num_tc(pf)) {
4163 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4164 goto exit;
4165 }
4166
4167 /* Generate TC map for number of tc requested */
4168 for (i = 0; i < tc; i++)
4169 enabled_tc |= (1 << i);
4170
4171 /* Requesting same TC configuration as already enabled */
4172 if (enabled_tc == vsi->tc_config.enabled_tc)
4173 return 0;
4174
4175 /* Quiesce VSI queues */
4176 i40e_quiesce_vsi(vsi);
4177
4178 /* Configure VSI for enabled TCs */
4179 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4180 if (ret) {
4181 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4182 vsi->seid);
4183 goto exit;
4184 }
4185
4186 /* Unquiesce VSI */
4187 i40e_unquiesce_vsi(vsi);
4188
4189 exit:
4190 return ret;
4191 }
4192
4193 /**
4194 * i40e_open - Called when a network interface is made active
4195 * @netdev: network interface device structure
4196 *
4197 * The open entry point is called when a network interface is made
4198 * active by the system (IFF_UP). At this point all resources needed
4199 * for transmit and receive operations are allocated, the interrupt
4200 * handler is registered with the OS, the netdev watchdog subtask is
4201 * enabled, and the stack is notified that the interface is ready.
4202 *
4203 * Returns 0 on success, negative value on failure
4204 **/
4205 static int i40e_open(struct net_device *netdev)
4206 {
4207 struct i40e_netdev_priv *np = netdev_priv(netdev);
4208 struct i40e_vsi *vsi = np->vsi;
4209 struct i40e_pf *pf = vsi->back;
4210 char int_name[IFNAMSIZ];
4211 int err;
4212
4213 /* disallow open during test */
4214 if (test_bit(__I40E_TESTING, &pf->state))
4215 return -EBUSY;
4216
4217 netif_carrier_off(netdev);
4218
4219 /* allocate descriptors */
4220 err = i40e_vsi_setup_tx_resources(vsi);
4221 if (err)
4222 goto err_setup_tx;
4223 err = i40e_vsi_setup_rx_resources(vsi);
4224 if (err)
4225 goto err_setup_rx;
4226
4227 err = i40e_vsi_configure(vsi);
4228 if (err)
4229 goto err_setup_rx;
4230
4231 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4232 dev_driver_string(&pf->pdev->dev), netdev->name);
4233 err = i40e_vsi_request_irq(vsi, int_name);
4234 if (err)
4235 goto err_setup_rx;
4236
4237 /* Notify the stack of the actual queue counts. */
4238 err = netif_set_real_num_tx_queues(netdev, vsi->num_queue_pairs);
4239 if (err)
4240 goto err_set_queues;
4241
4242 err = netif_set_real_num_rx_queues(netdev, vsi->num_queue_pairs);
4243 if (err)
4244 goto err_set_queues;
4245
4246 err = i40e_up_complete(vsi);
4247 if (err)
4248 goto err_up_complete;
4249
4250 #ifdef CONFIG_I40E_VXLAN
4251 vxlan_get_rx_port(netdev);
4252 #endif
4253
4254 return 0;
4255
4256 err_up_complete:
4257 i40e_down(vsi);
4258 err_set_queues:
4259 i40e_vsi_free_irq(vsi);
4260 err_setup_rx:
4261 i40e_vsi_free_rx_resources(vsi);
4262 err_setup_tx:
4263 i40e_vsi_free_tx_resources(vsi);
4264 if (vsi == pf->vsi[pf->lan_vsi])
4265 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4266
4267 return err;
4268 }
4269
4270 /**
4271 * i40e_close - Disables a network interface
4272 * @netdev: network interface device structure
4273 *
4274 * The close entry point is called when an interface is de-activated
4275 * by the OS. The hardware is still under the driver's control, but
4276 * this netdev interface is disabled.
4277 *
4278 * Returns 0, this is not allowed to fail
4279 **/
4280 static int i40e_close(struct net_device *netdev)
4281 {
4282 struct i40e_netdev_priv *np = netdev_priv(netdev);
4283 struct i40e_vsi *vsi = np->vsi;
4284
4285 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4286 return 0;
4287
4288 i40e_down(vsi);
4289 i40e_vsi_free_irq(vsi);
4290
4291 i40e_vsi_free_tx_resources(vsi);
4292 i40e_vsi_free_rx_resources(vsi);
4293
4294 return 0;
4295 }
4296
4297 /**
4298 * i40e_do_reset - Start a PF or Core Reset sequence
4299 * @pf: board private structure
4300 * @reset_flags: which reset is requested
4301 *
4302 * The essential difference in resets is that the PF Reset
4303 * doesn't clear the packet buffers, doesn't reset the PE
4304 * firmware, and doesn't bother the other PFs on the chip.
4305 **/
4306 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4307 {
4308 u32 val;
4309
4310 WARN_ON(in_interrupt());
4311
4312 /* do the biggest reset indicated */
4313 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4314
4315 /* Request a Global Reset
4316 *
4317 * This will start the chip's countdown to the actual full
4318 * chip reset event, and a warning interrupt to be sent
4319 * to all PFs, including the requestor. Our handler
4320 * for the warning interrupt will deal with the shutdown
4321 * and recovery of the switch setup.
4322 */
4323 dev_info(&pf->pdev->dev, "GlobalR requested\n");
4324 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4325 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4326 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4327
4328 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4329
4330 /* Request a Core Reset
4331 *
4332 * Same as Global Reset, except does *not* include the MAC/PHY
4333 */
4334 dev_info(&pf->pdev->dev, "CoreR requested\n");
4335 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4336 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4337 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4338 i40e_flush(&pf->hw);
4339
4340 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4341
4342 /* Request a Firmware Reset
4343 *
4344 * Same as Global reset, plus restarting the
4345 * embedded firmware engine.
4346 */
4347 /* enable EMP Reset */
4348 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4349 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4350 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4351
4352 /* force the reset */
4353 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4354 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4355 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4356 i40e_flush(&pf->hw);
4357
4358 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4359
4360 /* Request a PF Reset
4361 *
4362 * Resets only the PF-specific registers
4363 *
4364 * This goes directly to the tear-down and rebuild of
4365 * the switch, since we need to do all the recovery as
4366 * for the Core Reset.
4367 */
4368 dev_info(&pf->pdev->dev, "PFR requested\n");
4369 i40e_handle_reset_warning(pf);
4370
4371 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4372 int v;
4373
4374 /* Find the VSI(s) that requested a re-init */
4375 dev_info(&pf->pdev->dev,
4376 "VSI reinit requested\n");
4377 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4378 struct i40e_vsi *vsi = pf->vsi[v];
4379 if (vsi != NULL &&
4380 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4381 i40e_vsi_reinit_locked(pf->vsi[v]);
4382 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4383 }
4384 }
4385
4386 /* no further action needed, so return now */
4387 return;
4388 } else {
4389 dev_info(&pf->pdev->dev,
4390 "bad reset request 0x%08x\n", reset_flags);
4391 return;
4392 }
4393 }
4394
4395 #ifdef CONFIG_I40E_DCB
4396 /**
4397 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4398 * @pf: board private structure
4399 * @old_cfg: current DCB config
4400 * @new_cfg: new DCB config
4401 **/
4402 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4403 struct i40e_dcbx_config *old_cfg,
4404 struct i40e_dcbx_config *new_cfg)
4405 {
4406 bool need_reconfig = false;
4407
4408 /* Check if ETS configuration has changed */
4409 if (memcmp(&new_cfg->etscfg,
4410 &old_cfg->etscfg,
4411 sizeof(new_cfg->etscfg))) {
4412 /* If Priority Table has changed reconfig is needed */
4413 if (memcmp(&new_cfg->etscfg.prioritytable,
4414 &old_cfg->etscfg.prioritytable,
4415 sizeof(new_cfg->etscfg.prioritytable))) {
4416 need_reconfig = true;
4417 dev_info(&pf->pdev->dev, "ETS UP2TC changed.\n");
4418 }
4419
4420 if (memcmp(&new_cfg->etscfg.tcbwtable,
4421 &old_cfg->etscfg.tcbwtable,
4422 sizeof(new_cfg->etscfg.tcbwtable)))
4423 dev_info(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4424
4425 if (memcmp(&new_cfg->etscfg.tsatable,
4426 &old_cfg->etscfg.tsatable,
4427 sizeof(new_cfg->etscfg.tsatable)))
4428 dev_info(&pf->pdev->dev, "ETS TSA Table changed.\n");
4429 }
4430
4431 /* Check if PFC configuration has changed */
4432 if (memcmp(&new_cfg->pfc,
4433 &old_cfg->pfc,
4434 sizeof(new_cfg->pfc))) {
4435 need_reconfig = true;
4436 dev_info(&pf->pdev->dev, "PFC config change detected.\n");
4437 }
4438
4439 /* Check if APP Table has changed */
4440 if (memcmp(&new_cfg->app,
4441 &old_cfg->app,
4442 sizeof(new_cfg->app))) {
4443 need_reconfig = true;
4444 dev_info(&pf->pdev->dev, "APP Table change detected.\n");
4445 }
4446
4447 return need_reconfig;
4448 }
4449
4450 /**
4451 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4452 * @pf: board private structure
4453 * @e: event info posted on ARQ
4454 **/
4455 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4456 struct i40e_arq_event_info *e)
4457 {
4458 struct i40e_aqc_lldp_get_mib *mib =
4459 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4460 struct i40e_hw *hw = &pf->hw;
4461 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4462 struct i40e_dcbx_config tmp_dcbx_cfg;
4463 bool need_reconfig = false;
4464 int ret = 0;
4465 u8 type;
4466
4467 /* Ignore if event is not for Nearest Bridge */
4468 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4469 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4470 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4471 return ret;
4472
4473 /* Check MIB Type and return if event for Remote MIB update */
4474 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4475 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4476 /* Update the remote cached instance and return */
4477 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4478 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4479 &hw->remote_dcbx_config);
4480 goto exit;
4481 }
4482
4483 /* Convert/store the DCBX data from LLDPDU temporarily */
4484 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4485 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4486 if (ret) {
4487 /* Error in LLDPDU parsing return */
4488 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4489 goto exit;
4490 }
4491
4492 /* No change detected in DCBX configs */
4493 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4494 dev_info(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4495 goto exit;
4496 }
4497
4498 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4499
4500 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4501
4502 /* Overwrite the new configuration */
4503 *dcbx_cfg = tmp_dcbx_cfg;
4504
4505 if (!need_reconfig)
4506 goto exit;
4507
4508 /* Reconfiguration needed quiesce all VSIs */
4509 i40e_pf_quiesce_all_vsi(pf);
4510
4511 /* Changes in configuration update VEB/VSI */
4512 i40e_dcb_reconfigure(pf);
4513
4514 i40e_pf_unquiesce_all_vsi(pf);
4515 exit:
4516 return ret;
4517 }
4518 #endif /* CONFIG_I40E_DCB */
4519
4520 /**
4521 * i40e_do_reset_safe - Protected reset path for userland calls.
4522 * @pf: board private structure
4523 * @reset_flags: which reset is requested
4524 *
4525 **/
4526 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4527 {
4528 rtnl_lock();
4529 i40e_do_reset(pf, reset_flags);
4530 rtnl_unlock();
4531 }
4532
4533 /**
4534 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4535 * @pf: board private structure
4536 * @e: event info posted on ARQ
4537 *
4538 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4539 * and VF queues
4540 **/
4541 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4542 struct i40e_arq_event_info *e)
4543 {
4544 struct i40e_aqc_lan_overflow *data =
4545 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4546 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4547 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4548 struct i40e_hw *hw = &pf->hw;
4549 struct i40e_vf *vf;
4550 u16 vf_id;
4551
4552 dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n",
4553 __func__, queue, qtx_ctl);
4554
4555 /* Queue belongs to VF, find the VF and issue VF reset */
4556 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4557 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4558 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4559 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4560 vf_id -= hw->func_caps.vf_base_id;
4561 vf = &pf->vf[vf_id];
4562 i40e_vc_notify_vf_reset(vf);
4563 /* Allow VF to process pending reset notification */
4564 msleep(20);
4565 i40e_reset_vf(vf, false);
4566 }
4567 }
4568
4569 /**
4570 * i40e_service_event_complete - Finish up the service event
4571 * @pf: board private structure
4572 **/
4573 static void i40e_service_event_complete(struct i40e_pf *pf)
4574 {
4575 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4576
4577 /* flush memory to make sure state is correct before next watchog */
4578 smp_mb__before_clear_bit();
4579 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4580 }
4581
4582 /**
4583 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4584 * @pf: board private structure
4585 **/
4586 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4587 {
4588 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4589 return;
4590
4591 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4592
4593 /* if interface is down do nothing */
4594 if (test_bit(__I40E_DOWN, &pf->state))
4595 return;
4596 }
4597
4598 /**
4599 * i40e_vsi_link_event - notify VSI of a link event
4600 * @vsi: vsi to be notified
4601 * @link_up: link up or down
4602 **/
4603 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4604 {
4605 if (!vsi)
4606 return;
4607
4608 switch (vsi->type) {
4609 case I40E_VSI_MAIN:
4610 if (!vsi->netdev || !vsi->netdev_registered)
4611 break;
4612
4613 if (link_up) {
4614 netif_carrier_on(vsi->netdev);
4615 netif_tx_wake_all_queues(vsi->netdev);
4616 } else {
4617 netif_carrier_off(vsi->netdev);
4618 netif_tx_stop_all_queues(vsi->netdev);
4619 }
4620 break;
4621
4622 case I40E_VSI_SRIOV:
4623 break;
4624
4625 case I40E_VSI_VMDQ2:
4626 case I40E_VSI_CTRL:
4627 case I40E_VSI_MIRROR:
4628 default:
4629 /* there is no notification for other VSIs */
4630 break;
4631 }
4632 }
4633
4634 /**
4635 * i40e_veb_link_event - notify elements on the veb of a link event
4636 * @veb: veb to be notified
4637 * @link_up: link up or down
4638 **/
4639 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4640 {
4641 struct i40e_pf *pf;
4642 int i;
4643
4644 if (!veb || !veb->pf)
4645 return;
4646 pf = veb->pf;
4647
4648 /* depth first... */
4649 for (i = 0; i < I40E_MAX_VEB; i++)
4650 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4651 i40e_veb_link_event(pf->veb[i], link_up);
4652
4653 /* ... now the local VSIs */
4654 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4655 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4656 i40e_vsi_link_event(pf->vsi[i], link_up);
4657 }
4658
4659 /**
4660 * i40e_link_event - Update netif_carrier status
4661 * @pf: board private structure
4662 **/
4663 static void i40e_link_event(struct i40e_pf *pf)
4664 {
4665 bool new_link, old_link;
4666
4667 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4668 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4669
4670 if (new_link == old_link)
4671 return;
4672
4673 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4674 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4675 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4676
4677 /* Notify the base of the switch tree connected to
4678 * the link. Floating VEBs are not notified.
4679 */
4680 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4681 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4682 else
4683 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4684
4685 if (pf->vf)
4686 i40e_vc_notify_link_state(pf);
4687
4688 if (pf->flags & I40E_FLAG_PTP)
4689 i40e_ptp_set_increment(pf);
4690 }
4691
4692 /**
4693 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4694 * @pf: board private structure
4695 *
4696 * Set the per-queue flags to request a check for stuck queues in the irq
4697 * clean functions, then force interrupts to be sure the irq clean is called.
4698 **/
4699 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4700 {
4701 int i, v;
4702
4703 /* If we're down or resetting, just bail */
4704 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4705 return;
4706
4707 /* for each VSI/netdev
4708 * for each Tx queue
4709 * set the check flag
4710 * for each q_vector
4711 * force an interrupt
4712 */
4713 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4714 struct i40e_vsi *vsi = pf->vsi[v];
4715 int armed = 0;
4716
4717 if (!pf->vsi[v] ||
4718 test_bit(__I40E_DOWN, &vsi->state) ||
4719 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4720 continue;
4721
4722 for (i = 0; i < vsi->num_queue_pairs; i++) {
4723 set_check_for_tx_hang(vsi->tx_rings[i]);
4724 if (test_bit(__I40E_HANG_CHECK_ARMED,
4725 &vsi->tx_rings[i]->state))
4726 armed++;
4727 }
4728
4729 if (armed) {
4730 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4731 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4732 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4733 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4734 } else {
4735 u16 vec = vsi->base_vector - 1;
4736 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4737 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4738 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4739 wr32(&vsi->back->hw,
4740 I40E_PFINT_DYN_CTLN(vec), val);
4741 }
4742 i40e_flush(&vsi->back->hw);
4743 }
4744 }
4745 }
4746
4747 /**
4748 * i40e_watchdog_subtask - Check and bring link up
4749 * @pf: board private structure
4750 **/
4751 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4752 {
4753 int i;
4754
4755 /* if interface is down do nothing */
4756 if (test_bit(__I40E_DOWN, &pf->state) ||
4757 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4758 return;
4759
4760 /* Update the stats for active netdevs so the network stack
4761 * can look at updated numbers whenever it cares to
4762 */
4763 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4764 if (pf->vsi[i] && pf->vsi[i]->netdev)
4765 i40e_update_stats(pf->vsi[i]);
4766
4767 /* Update the stats for the active switching components */
4768 for (i = 0; i < I40E_MAX_VEB; i++)
4769 if (pf->veb[i])
4770 i40e_update_veb_stats(pf->veb[i]);
4771
4772 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
4773 }
4774
4775 /**
4776 * i40e_reset_subtask - Set up for resetting the device and driver
4777 * @pf: board private structure
4778 **/
4779 static void i40e_reset_subtask(struct i40e_pf *pf)
4780 {
4781 u32 reset_flags = 0;
4782
4783 rtnl_lock();
4784 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4785 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4786 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4787 }
4788 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4789 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4790 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4791 }
4792 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4793 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4794 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4795 }
4796 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4797 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4798 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4799 }
4800
4801 /* If there's a recovery already waiting, it takes
4802 * precedence before starting a new reset sequence.
4803 */
4804 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4805 i40e_handle_reset_warning(pf);
4806 goto unlock;
4807 }
4808
4809 /* If we're already down or resetting, just bail */
4810 if (reset_flags &&
4811 !test_bit(__I40E_DOWN, &pf->state) &&
4812 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4813 i40e_do_reset(pf, reset_flags);
4814
4815 unlock:
4816 rtnl_unlock();
4817 }
4818
4819 /**
4820 * i40e_handle_link_event - Handle link event
4821 * @pf: board private structure
4822 * @e: event info posted on ARQ
4823 **/
4824 static void i40e_handle_link_event(struct i40e_pf *pf,
4825 struct i40e_arq_event_info *e)
4826 {
4827 struct i40e_hw *hw = &pf->hw;
4828 struct i40e_aqc_get_link_status *status =
4829 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4830 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4831
4832 /* save off old link status information */
4833 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4834 sizeof(pf->hw.phy.link_info_old));
4835
4836 /* update link status */
4837 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4838 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4839 hw_link_info->link_info = status->link_info;
4840 hw_link_info->an_info = status->an_info;
4841 hw_link_info->ext_info = status->ext_info;
4842 hw_link_info->lse_enable =
4843 le16_to_cpu(status->command_flags) &
4844 I40E_AQ_LSE_ENABLE;
4845
4846 /* process the event */
4847 i40e_link_event(pf);
4848
4849 /* Do a new status request to re-enable LSE reporting
4850 * and load new status information into the hw struct,
4851 * then see if the status changed while processing the
4852 * initial event.
4853 */
4854 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
4855 i40e_link_event(pf);
4856 }
4857
4858 /**
4859 * i40e_clean_adminq_subtask - Clean the AdminQ rings
4860 * @pf: board private structure
4861 **/
4862 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
4863 {
4864 struct i40e_arq_event_info event;
4865 struct i40e_hw *hw = &pf->hw;
4866 u16 pending, i = 0;
4867 i40e_status ret;
4868 u16 opcode;
4869 u32 val;
4870
4871 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
4872 return;
4873
4874 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
4875 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
4876 if (!event.msg_buf)
4877 return;
4878
4879 do {
4880 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
4881 ret = i40e_clean_arq_element(hw, &event, &pending);
4882 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
4883 dev_info(&pf->pdev->dev, "No ARQ event found\n");
4884 break;
4885 } else if (ret) {
4886 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
4887 break;
4888 }
4889
4890 opcode = le16_to_cpu(event.desc.opcode);
4891 switch (opcode) {
4892
4893 case i40e_aqc_opc_get_link_status:
4894 i40e_handle_link_event(pf, &event);
4895 break;
4896 case i40e_aqc_opc_send_msg_to_pf:
4897 ret = i40e_vc_process_vf_msg(pf,
4898 le16_to_cpu(event.desc.retval),
4899 le32_to_cpu(event.desc.cookie_high),
4900 le32_to_cpu(event.desc.cookie_low),
4901 event.msg_buf,
4902 event.msg_size);
4903 break;
4904 case i40e_aqc_opc_lldp_update_mib:
4905 dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
4906 #ifdef CONFIG_I40E_DCB
4907 rtnl_lock();
4908 ret = i40e_handle_lldp_event(pf, &event);
4909 rtnl_unlock();
4910 #endif /* CONFIG_I40E_DCB */
4911 break;
4912 case i40e_aqc_opc_event_lan_overflow:
4913 dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
4914 i40e_handle_lan_overflow_event(pf, &event);
4915 break;
4916 case i40e_aqc_opc_send_msg_to_peer:
4917 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
4918 break;
4919 default:
4920 dev_info(&pf->pdev->dev,
4921 "ARQ Error: Unknown event 0x%04x received\n",
4922 opcode);
4923 break;
4924 }
4925 } while (pending && (i++ < pf->adminq_work_limit));
4926
4927 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
4928 /* re-enable Admin queue interrupt cause */
4929 val = rd32(hw, I40E_PFINT_ICR0_ENA);
4930 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4931 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4932 i40e_flush(hw);
4933
4934 kfree(event.msg_buf);
4935 }
4936
4937 /**
4938 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
4939 * @veb: pointer to the VEB instance
4940 *
4941 * This is a recursive function that first builds the attached VSIs then
4942 * recurses in to build the next layer of VEB. We track the connections
4943 * through our own index numbers because the seid's from the HW could
4944 * change across the reset.
4945 **/
4946 static int i40e_reconstitute_veb(struct i40e_veb *veb)
4947 {
4948 struct i40e_vsi *ctl_vsi = NULL;
4949 struct i40e_pf *pf = veb->pf;
4950 int v, veb_idx;
4951 int ret;
4952
4953 /* build VSI that owns this VEB, temporarily attached to base VEB */
4954 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
4955 if (pf->vsi[v] &&
4956 pf->vsi[v]->veb_idx == veb->idx &&
4957 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
4958 ctl_vsi = pf->vsi[v];
4959 break;
4960 }
4961 }
4962 if (!ctl_vsi) {
4963 dev_info(&pf->pdev->dev,
4964 "missing owner VSI for veb_idx %d\n", veb->idx);
4965 ret = -ENOENT;
4966 goto end_reconstitute;
4967 }
4968 if (ctl_vsi != pf->vsi[pf->lan_vsi])
4969 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
4970 ret = i40e_add_vsi(ctl_vsi);
4971 if (ret) {
4972 dev_info(&pf->pdev->dev,
4973 "rebuild of owner VSI failed: %d\n", ret);
4974 goto end_reconstitute;
4975 }
4976 i40e_vsi_reset_stats(ctl_vsi);
4977
4978 /* create the VEB in the switch and move the VSI onto the VEB */
4979 ret = i40e_add_veb(veb, ctl_vsi);
4980 if (ret)
4981 goto end_reconstitute;
4982
4983 /* create the remaining VSIs attached to this VEB */
4984 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4985 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
4986 continue;
4987
4988 if (pf->vsi[v]->veb_idx == veb->idx) {
4989 struct i40e_vsi *vsi = pf->vsi[v];
4990 vsi->uplink_seid = veb->seid;
4991 ret = i40e_add_vsi(vsi);
4992 if (ret) {
4993 dev_info(&pf->pdev->dev,
4994 "rebuild of vsi_idx %d failed: %d\n",
4995 v, ret);
4996 goto end_reconstitute;
4997 }
4998 i40e_vsi_reset_stats(vsi);
4999 }
5000 }
5001
5002 /* create any VEBs attached to this VEB - RECURSION */
5003 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5004 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5005 pf->veb[veb_idx]->uplink_seid = veb->seid;
5006 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5007 if (ret)
5008 break;
5009 }
5010 }
5011
5012 end_reconstitute:
5013 return ret;
5014 }
5015
5016 /**
5017 * i40e_get_capabilities - get info about the HW
5018 * @pf: the PF struct
5019 **/
5020 static int i40e_get_capabilities(struct i40e_pf *pf)
5021 {
5022 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5023 u16 data_size;
5024 int buf_len;
5025 int err;
5026
5027 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5028 do {
5029 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5030 if (!cap_buf)
5031 return -ENOMEM;
5032
5033 /* this loads the data into the hw struct for us */
5034 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5035 &data_size,
5036 i40e_aqc_opc_list_func_capabilities,
5037 NULL);
5038 /* data loaded, buffer no longer needed */
5039 kfree(cap_buf);
5040
5041 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5042 /* retry with a larger buffer */
5043 buf_len = data_size;
5044 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5045 dev_info(&pf->pdev->dev,
5046 "capability discovery failed: aq=%d\n",
5047 pf->hw.aq.asq_last_status);
5048 return -ENODEV;
5049 }
5050 } while (err);
5051
5052 /* increment MSI-X count because current FW skips one */
5053 pf->hw.func_caps.num_msix_vectors++;
5054
5055 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5056 dev_info(&pf->pdev->dev,
5057 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5058 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5059 pf->hw.func_caps.num_msix_vectors,
5060 pf->hw.func_caps.num_msix_vectors_vf,
5061 pf->hw.func_caps.fd_filters_guaranteed,
5062 pf->hw.func_caps.fd_filters_best_effort,
5063 pf->hw.func_caps.num_tx_qp,
5064 pf->hw.func_caps.num_vsis);
5065
5066 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5067 + pf->hw.func_caps.num_vfs)
5068 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5069 dev_info(&pf->pdev->dev,
5070 "got num_vsis %d, setting num_vsis to %d\n",
5071 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5072 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5073 }
5074
5075 return 0;
5076 }
5077
5078 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5079
5080 /**
5081 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5082 * @pf: board private structure
5083 **/
5084 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5085 {
5086 struct i40e_vsi *vsi;
5087 bool new_vsi = false;
5088 int err, i;
5089
5090 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5091 return;
5092
5093 /* find existing VSI and see if it needs configuring */
5094 vsi = NULL;
5095 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5096 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5097 vsi = pf->vsi[i];
5098 break;
5099 }
5100 }
5101
5102 /* create a new VSI if none exists */
5103 if (!vsi) {
5104 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5105 pf->vsi[pf->lan_vsi]->seid, 0);
5106 if (!vsi) {
5107 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5108 goto err_vsi;
5109 }
5110 new_vsi = true;
5111 }
5112 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5113
5114 err = i40e_vsi_setup_tx_resources(vsi);
5115 if (err)
5116 goto err_setup_tx;
5117 err = i40e_vsi_setup_rx_resources(vsi);
5118 if (err)
5119 goto err_setup_rx;
5120
5121 if (new_vsi) {
5122 char int_name[IFNAMSIZ + 9];
5123 err = i40e_vsi_configure(vsi);
5124 if (err)
5125 goto err_setup_rx;
5126 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5127 dev_driver_string(&pf->pdev->dev));
5128 err = i40e_vsi_request_irq(vsi, int_name);
5129 if (err)
5130 goto err_setup_rx;
5131 err = i40e_up_complete(vsi);
5132 if (err)
5133 goto err_up_complete;
5134 }
5135
5136 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5137 return;
5138
5139 err_up_complete:
5140 i40e_down(vsi);
5141 i40e_vsi_free_irq(vsi);
5142 err_setup_rx:
5143 i40e_vsi_free_rx_resources(vsi);
5144 err_setup_tx:
5145 i40e_vsi_free_tx_resources(vsi);
5146 err_vsi:
5147 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5148 i40e_vsi_clear(vsi);
5149 }
5150
5151 /**
5152 * i40e_fdir_teardown - release the Flow Director resources
5153 * @pf: board private structure
5154 **/
5155 static void i40e_fdir_teardown(struct i40e_pf *pf)
5156 {
5157 int i;
5158
5159 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5160 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5161 i40e_vsi_release(pf->vsi[i]);
5162 break;
5163 }
5164 }
5165 }
5166
5167 /**
5168 * i40e_prep_for_reset - prep for the core to reset
5169 * @pf: board private structure
5170 *
5171 * Close up the VFs and other things in prep for pf Reset.
5172 **/
5173 static int i40e_prep_for_reset(struct i40e_pf *pf)
5174 {
5175 struct i40e_hw *hw = &pf->hw;
5176 i40e_status ret;
5177 u32 v;
5178
5179 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5180 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5181 return 0;
5182
5183 dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5184
5185 if (i40e_check_asq_alive(hw))
5186 i40e_vc_notify_reset(pf);
5187
5188 /* quiesce the VSIs and their queues that are not already DOWN */
5189 i40e_pf_quiesce_all_vsi(pf);
5190
5191 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5192 if (pf->vsi[v])
5193 pf->vsi[v]->seid = 0;
5194 }
5195
5196 i40e_shutdown_adminq(&pf->hw);
5197
5198 /* call shutdown HMC */
5199 ret = i40e_shutdown_lan_hmc(hw);
5200 if (ret) {
5201 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
5202 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5203 }
5204 return ret;
5205 }
5206
5207 /**
5208 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5209 * @pf: board private structure
5210 * @reinit: if the Main VSI needs to re-initialized.
5211 **/
5212 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5213 {
5214 struct i40e_driver_version dv;
5215 struct i40e_hw *hw = &pf->hw;
5216 i40e_status ret;
5217 u32 v;
5218
5219 /* Now we wait for GRST to settle out.
5220 * We don't have to delete the VEBs or VSIs from the hw switch
5221 * because the reset will make them disappear.
5222 */
5223 ret = i40e_pf_reset(hw);
5224 if (ret)
5225 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5226 pf->pfr_count++;
5227
5228 if (test_bit(__I40E_DOWN, &pf->state))
5229 goto end_core_reset;
5230 dev_info(&pf->pdev->dev, "Rebuilding internal switch\n");
5231
5232 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5233 ret = i40e_init_adminq(&pf->hw);
5234 if (ret) {
5235 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5236 goto end_core_reset;
5237 }
5238
5239 ret = i40e_get_capabilities(pf);
5240 if (ret) {
5241 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5242 ret);
5243 goto end_core_reset;
5244 }
5245
5246 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5247 hw->func_caps.num_rx_qp,
5248 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5249 if (ret) {
5250 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5251 goto end_core_reset;
5252 }
5253 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5254 if (ret) {
5255 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5256 goto end_core_reset;
5257 }
5258
5259 #ifdef CONFIG_I40E_DCB
5260 ret = i40e_init_pf_dcb(pf);
5261 if (ret) {
5262 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5263 goto end_core_reset;
5264 }
5265 #endif /* CONFIG_I40E_DCB */
5266
5267 /* do basic switch setup */
5268 ret = i40e_setup_pf_switch(pf, reinit);
5269 if (ret)
5270 goto end_core_reset;
5271
5272 /* Rebuild the VSIs and VEBs that existed before reset.
5273 * They are still in our local switch element arrays, so only
5274 * need to rebuild the switch model in the HW.
5275 *
5276 * If there were VEBs but the reconstitution failed, we'll try
5277 * try to recover minimal use by getting the basic PF VSI working.
5278 */
5279 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5280 dev_info(&pf->pdev->dev, "attempting to rebuild switch\n");
5281 /* find the one VEB connected to the MAC, and find orphans */
5282 for (v = 0; v < I40E_MAX_VEB; v++) {
5283 if (!pf->veb[v])
5284 continue;
5285
5286 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5287 pf->veb[v]->uplink_seid == 0) {
5288 ret = i40e_reconstitute_veb(pf->veb[v]);
5289
5290 if (!ret)
5291 continue;
5292
5293 /* If Main VEB failed, we're in deep doodoo,
5294 * so give up rebuilding the switch and set up
5295 * for minimal rebuild of PF VSI.
5296 * If orphan failed, we'll report the error
5297 * but try to keep going.
5298 */
5299 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5300 dev_info(&pf->pdev->dev,
5301 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5302 ret);
5303 pf->vsi[pf->lan_vsi]->uplink_seid
5304 = pf->mac_seid;
5305 break;
5306 } else if (pf->veb[v]->uplink_seid == 0) {
5307 dev_info(&pf->pdev->dev,
5308 "rebuild of orphan VEB failed: %d\n",
5309 ret);
5310 }
5311 }
5312 }
5313 }
5314
5315 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5316 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5317 /* no VEB, so rebuild only the Main VSI */
5318 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5319 if (ret) {
5320 dev_info(&pf->pdev->dev,
5321 "rebuild of Main VSI failed: %d\n", ret);
5322 goto end_core_reset;
5323 }
5324 }
5325
5326 /* reinit the misc interrupt */
5327 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5328 ret = i40e_setup_misc_vector(pf);
5329
5330 /* restart the VSIs that were rebuilt and running before the reset */
5331 i40e_pf_unquiesce_all_vsi(pf);
5332
5333 if (pf->num_alloc_vfs) {
5334 for (v = 0; v < pf->num_alloc_vfs; v++)
5335 i40e_reset_vf(&pf->vf[v], true);
5336 }
5337
5338 /* tell the firmware that we're starting */
5339 dv.major_version = DRV_VERSION_MAJOR;
5340 dv.minor_version = DRV_VERSION_MINOR;
5341 dv.build_version = DRV_VERSION_BUILD;
5342 dv.subbuild_version = 0;
5343 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5344
5345 dev_info(&pf->pdev->dev, "PF reset done\n");
5346
5347 end_core_reset:
5348 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5349 }
5350
5351 /**
5352 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5353 * @pf: board private structure
5354 *
5355 * Close up the VFs and other things in prep for a Core Reset,
5356 * then get ready to rebuild the world.
5357 **/
5358 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5359 {
5360 i40e_status ret;
5361
5362 ret = i40e_prep_for_reset(pf);
5363 if (!ret)
5364 i40e_reset_and_rebuild(pf, false);
5365 }
5366
5367 /**
5368 * i40e_handle_mdd_event
5369 * @pf: pointer to the pf structure
5370 *
5371 * Called from the MDD irq handler to identify possibly malicious vfs
5372 **/
5373 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5374 {
5375 struct i40e_hw *hw = &pf->hw;
5376 bool mdd_detected = false;
5377 struct i40e_vf *vf;
5378 u32 reg;
5379 int i;
5380
5381 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5382 return;
5383
5384 /* find what triggered the MDD event */
5385 reg = rd32(hw, I40E_GL_MDET_TX);
5386 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5387 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
5388 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
5389 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
5390 >> I40E_GL_MDET_TX_EVENT_SHIFT;
5391 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
5392 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
5393 dev_info(&pf->pdev->dev,
5394 "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n",
5395 event, queue, func);
5396 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5397 mdd_detected = true;
5398 }
5399 reg = rd32(hw, I40E_GL_MDET_RX);
5400 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5401 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
5402 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
5403 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
5404 >> I40E_GL_MDET_RX_EVENT_SHIFT;
5405 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
5406 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
5407 dev_info(&pf->pdev->dev,
5408 "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n",
5409 event, queue, func);
5410 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5411 mdd_detected = true;
5412 }
5413
5414 /* see if one of the VFs needs its hand slapped */
5415 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5416 vf = &(pf->vf[i]);
5417 reg = rd32(hw, I40E_VP_MDET_TX(i));
5418 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5419 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5420 vf->num_mdd_events++;
5421 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5422 }
5423
5424 reg = rd32(hw, I40E_VP_MDET_RX(i));
5425 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5426 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5427 vf->num_mdd_events++;
5428 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5429 }
5430
5431 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5432 dev_info(&pf->pdev->dev,
5433 "Too many MDD events on VF %d, disabled\n", i);
5434 dev_info(&pf->pdev->dev,
5435 "Use PF Control I/F to re-enable the VF\n");
5436 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5437 }
5438 }
5439
5440 /* re-enable mdd interrupt cause */
5441 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5442 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5443 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5444 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5445 i40e_flush(hw);
5446 }
5447
5448 #ifdef CONFIG_I40E_VXLAN
5449 /**
5450 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5451 * @pf: board private structure
5452 **/
5453 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5454 {
5455 const int vxlan_hdr_qwords = 4;
5456 struct i40e_hw *hw = &pf->hw;
5457 i40e_status ret;
5458 u8 filter_index;
5459 __be16 port;
5460 int i;
5461
5462 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5463 return;
5464
5465 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5466
5467 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5468 if (pf->pending_vxlan_bitmap & (1 << i)) {
5469 pf->pending_vxlan_bitmap &= ~(1 << i);
5470 port = pf->vxlan_ports[i];
5471 ret = port ?
5472 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5473 vxlan_hdr_qwords,
5474 I40E_AQC_TUNNEL_TYPE_VXLAN,
5475 &filter_index, NULL)
5476 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5477
5478 if (ret) {
5479 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5480 port ? "adding" : "deleting",
5481 ntohs(port), port ? i : i);
5482
5483 pf->vxlan_ports[i] = 0;
5484 } else {
5485 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5486 port ? "Added" : "Deleted",
5487 ntohs(port), port ? i : filter_index);
5488 }
5489 }
5490 }
5491 }
5492
5493 #endif
5494 /**
5495 * i40e_service_task - Run the driver's async subtasks
5496 * @work: pointer to work_struct containing our data
5497 **/
5498 static void i40e_service_task(struct work_struct *work)
5499 {
5500 struct i40e_pf *pf = container_of(work,
5501 struct i40e_pf,
5502 service_task);
5503 unsigned long start_time = jiffies;
5504
5505 i40e_reset_subtask(pf);
5506 i40e_handle_mdd_event(pf);
5507 i40e_vc_process_vflr_event(pf);
5508 i40e_watchdog_subtask(pf);
5509 i40e_fdir_reinit_subtask(pf);
5510 i40e_check_hang_subtask(pf);
5511 i40e_sync_filters_subtask(pf);
5512 #ifdef CONFIG_I40E_VXLAN
5513 i40e_sync_vxlan_filters_subtask(pf);
5514 #endif
5515 i40e_clean_adminq_subtask(pf);
5516
5517 i40e_service_event_complete(pf);
5518
5519 /* If the tasks have taken longer than one timer cycle or there
5520 * is more work to be done, reschedule the service task now
5521 * rather than wait for the timer to tick again.
5522 */
5523 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5524 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5525 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5526 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5527 i40e_service_event_schedule(pf);
5528 }
5529
5530 /**
5531 * i40e_service_timer - timer callback
5532 * @data: pointer to PF struct
5533 **/
5534 static void i40e_service_timer(unsigned long data)
5535 {
5536 struct i40e_pf *pf = (struct i40e_pf *)data;
5537
5538 mod_timer(&pf->service_timer,
5539 round_jiffies(jiffies + pf->service_timer_period));
5540 i40e_service_event_schedule(pf);
5541 }
5542
5543 /**
5544 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5545 * @vsi: the VSI being configured
5546 **/
5547 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5548 {
5549 struct i40e_pf *pf = vsi->back;
5550
5551 switch (vsi->type) {
5552 case I40E_VSI_MAIN:
5553 vsi->alloc_queue_pairs = pf->num_lan_qps;
5554 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5555 I40E_REQ_DESCRIPTOR_MULTIPLE);
5556 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5557 vsi->num_q_vectors = pf->num_lan_msix;
5558 else
5559 vsi->num_q_vectors = 1;
5560
5561 break;
5562
5563 case I40E_VSI_FDIR:
5564 vsi->alloc_queue_pairs = 1;
5565 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5566 I40E_REQ_DESCRIPTOR_MULTIPLE);
5567 vsi->num_q_vectors = 1;
5568 break;
5569
5570 case I40E_VSI_VMDQ2:
5571 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5572 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5573 I40E_REQ_DESCRIPTOR_MULTIPLE);
5574 vsi->num_q_vectors = pf->num_vmdq_msix;
5575 break;
5576
5577 case I40E_VSI_SRIOV:
5578 vsi->alloc_queue_pairs = pf->num_vf_qps;
5579 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5580 I40E_REQ_DESCRIPTOR_MULTIPLE);
5581 break;
5582
5583 default:
5584 WARN_ON(1);
5585 return -ENODATA;
5586 }
5587
5588 return 0;
5589 }
5590
5591 /**
5592 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5593 * @type: VSI pointer
5594 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5595 *
5596 * On error: returns error code (negative)
5597 * On success: returns 0
5598 **/
5599 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5600 {
5601 int size;
5602 int ret = 0;
5603
5604 /* allocate memory for both Tx and Rx ring pointers */
5605 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5606 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5607 if (!vsi->tx_rings)
5608 return -ENOMEM;
5609 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5610
5611 if (alloc_qvectors) {
5612 /* allocate memory for q_vector pointers */
5613 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5614 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5615 if (!vsi->q_vectors) {
5616 ret = -ENOMEM;
5617 goto err_vectors;
5618 }
5619 }
5620 return ret;
5621
5622 err_vectors:
5623 kfree(vsi->tx_rings);
5624 return ret;
5625 }
5626
5627 /**
5628 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5629 * @pf: board private structure
5630 * @type: type of VSI
5631 *
5632 * On error: returns error code (negative)
5633 * On success: returns vsi index in PF (positive)
5634 **/
5635 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5636 {
5637 int ret = -ENODEV;
5638 struct i40e_vsi *vsi;
5639 int vsi_idx;
5640 int i;
5641
5642 /* Need to protect the allocation of the VSIs at the PF level */
5643 mutex_lock(&pf->switch_mutex);
5644
5645 /* VSI list may be fragmented if VSI creation/destruction has
5646 * been happening. We can afford to do a quick scan to look
5647 * for any free VSIs in the list.
5648 *
5649 * find next empty vsi slot, looping back around if necessary
5650 */
5651 i = pf->next_vsi;
5652 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5653 i++;
5654 if (i >= pf->hw.func_caps.num_vsis) {
5655 i = 0;
5656 while (i < pf->next_vsi && pf->vsi[i])
5657 i++;
5658 }
5659
5660 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5661 vsi_idx = i; /* Found one! */
5662 } else {
5663 ret = -ENODEV;
5664 goto unlock_pf; /* out of VSI slots! */
5665 }
5666 pf->next_vsi = ++i;
5667
5668 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5669 if (!vsi) {
5670 ret = -ENOMEM;
5671 goto unlock_pf;
5672 }
5673 vsi->type = type;
5674 vsi->back = pf;
5675 set_bit(__I40E_DOWN, &vsi->state);
5676 vsi->flags = 0;
5677 vsi->idx = vsi_idx;
5678 vsi->rx_itr_setting = pf->rx_itr_default;
5679 vsi->tx_itr_setting = pf->tx_itr_default;
5680 vsi->netdev_registered = false;
5681 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5682 INIT_LIST_HEAD(&vsi->mac_filter_list);
5683
5684 ret = i40e_set_num_rings_in_vsi(vsi);
5685 if (ret)
5686 goto err_rings;
5687
5688 ret = i40e_vsi_alloc_arrays(vsi, true);
5689 if (ret)
5690 goto err_rings;
5691
5692 /* Setup default MSIX irq handler for VSI */
5693 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5694
5695 pf->vsi[vsi_idx] = vsi;
5696 ret = vsi_idx;
5697 goto unlock_pf;
5698
5699 err_rings:
5700 pf->next_vsi = i - 1;
5701 kfree(vsi);
5702 unlock_pf:
5703 mutex_unlock(&pf->switch_mutex);
5704 return ret;
5705 }
5706
5707 /**
5708 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5709 * @type: VSI pointer
5710 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5711 *
5712 * On error: returns error code (negative)
5713 * On success: returns 0
5714 **/
5715 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5716 {
5717 /* free the ring and vector containers */
5718 if (free_qvectors) {
5719 kfree(vsi->q_vectors);
5720 vsi->q_vectors = NULL;
5721 }
5722 kfree(vsi->tx_rings);
5723 vsi->tx_rings = NULL;
5724 vsi->rx_rings = NULL;
5725 }
5726
5727 /**
5728 * i40e_vsi_clear - Deallocate the VSI provided
5729 * @vsi: the VSI being un-configured
5730 **/
5731 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5732 {
5733 struct i40e_pf *pf;
5734
5735 if (!vsi)
5736 return 0;
5737
5738 if (!vsi->back)
5739 goto free_vsi;
5740 pf = vsi->back;
5741
5742 mutex_lock(&pf->switch_mutex);
5743 if (!pf->vsi[vsi->idx]) {
5744 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5745 vsi->idx, vsi->idx, vsi, vsi->type);
5746 goto unlock_vsi;
5747 }
5748
5749 if (pf->vsi[vsi->idx] != vsi) {
5750 dev_err(&pf->pdev->dev,
5751 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5752 pf->vsi[vsi->idx]->idx,
5753 pf->vsi[vsi->idx],
5754 pf->vsi[vsi->idx]->type,
5755 vsi->idx, vsi, vsi->type);
5756 goto unlock_vsi;
5757 }
5758
5759 /* updates the pf for this cleared vsi */
5760 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5761 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5762
5763 i40e_vsi_free_arrays(vsi, true);
5764
5765 pf->vsi[vsi->idx] = NULL;
5766 if (vsi->idx < pf->next_vsi)
5767 pf->next_vsi = vsi->idx;
5768
5769 unlock_vsi:
5770 mutex_unlock(&pf->switch_mutex);
5771 free_vsi:
5772 kfree(vsi);
5773
5774 return 0;
5775 }
5776
5777 /**
5778 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5779 * @vsi: the VSI being cleaned
5780 **/
5781 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5782 {
5783 int i;
5784
5785 if (vsi->tx_rings && vsi->tx_rings[0]) {
5786 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5787 kfree_rcu(vsi->tx_rings[i], rcu);
5788 vsi->tx_rings[i] = NULL;
5789 vsi->rx_rings[i] = NULL;
5790 }
5791 }
5792 }
5793
5794 /**
5795 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5796 * @vsi: the VSI being configured
5797 **/
5798 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5799 {
5800 struct i40e_pf *pf = vsi->back;
5801 int i;
5802
5803 /* Set basic values in the rings to be used later during open() */
5804 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5805 struct i40e_ring *tx_ring;
5806 struct i40e_ring *rx_ring;
5807
5808 /* allocate space for both Tx and Rx in one shot */
5809 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
5810 if (!tx_ring)
5811 goto err_out;
5812
5813 tx_ring->queue_index = i;
5814 tx_ring->reg_idx = vsi->base_queue + i;
5815 tx_ring->ring_active = false;
5816 tx_ring->vsi = vsi;
5817 tx_ring->netdev = vsi->netdev;
5818 tx_ring->dev = &pf->pdev->dev;
5819 tx_ring->count = vsi->num_desc;
5820 tx_ring->size = 0;
5821 tx_ring->dcb_tc = 0;
5822 vsi->tx_rings[i] = tx_ring;
5823
5824 rx_ring = &tx_ring[1];
5825 rx_ring->queue_index = i;
5826 rx_ring->reg_idx = vsi->base_queue + i;
5827 rx_ring->ring_active = false;
5828 rx_ring->vsi = vsi;
5829 rx_ring->netdev = vsi->netdev;
5830 rx_ring->dev = &pf->pdev->dev;
5831 rx_ring->count = vsi->num_desc;
5832 rx_ring->size = 0;
5833 rx_ring->dcb_tc = 0;
5834 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
5835 set_ring_16byte_desc_enabled(rx_ring);
5836 else
5837 clear_ring_16byte_desc_enabled(rx_ring);
5838 vsi->rx_rings[i] = rx_ring;
5839 }
5840
5841 return 0;
5842
5843 err_out:
5844 i40e_vsi_clear_rings(vsi);
5845 return -ENOMEM;
5846 }
5847
5848 /**
5849 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
5850 * @pf: board private structure
5851 * @vectors: the number of MSI-X vectors to request
5852 *
5853 * Returns the number of vectors reserved, or error
5854 **/
5855 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
5856 {
5857 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
5858 I40E_MIN_MSIX, vectors);
5859 if (vectors < 0) {
5860 dev_info(&pf->pdev->dev,
5861 "MSI-X vector reservation failed: %d\n", vectors);
5862 vectors = 0;
5863 }
5864
5865 pf->num_msix_entries = vectors;
5866
5867 return vectors;
5868 }
5869
5870 /**
5871 * i40e_init_msix - Setup the MSIX capability
5872 * @pf: board private structure
5873 *
5874 * Work with the OS to set up the MSIX vectors needed.
5875 *
5876 * Returns 0 on success, negative on failure
5877 **/
5878 static int i40e_init_msix(struct i40e_pf *pf)
5879 {
5880 i40e_status err = 0;
5881 struct i40e_hw *hw = &pf->hw;
5882 int v_budget, i;
5883 int vec;
5884
5885 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
5886 return -ENODEV;
5887
5888 /* The number of vectors we'll request will be comprised of:
5889 * - Add 1 for "other" cause for Admin Queue events, etc.
5890 * - The number of LAN queue pairs
5891 * - Queues being used for RSS.
5892 * We don't need as many as max_rss_size vectors.
5893 * use rss_size instead in the calculation since that
5894 * is governed by number of cpus in the system.
5895 * - assumes symmetric Tx/Rx pairing
5896 * - The number of VMDq pairs
5897 * Once we count this up, try the request.
5898 *
5899 * If we can't get what we want, we'll simplify to nearly nothing
5900 * and try again. If that still fails, we punt.
5901 */
5902 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
5903 pf->num_vmdq_msix = pf->num_vmdq_qps;
5904 v_budget = 1 + pf->num_lan_msix;
5905 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
5906 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
5907 v_budget++;
5908
5909 /* Scale down if necessary, and the rings will share vectors */
5910 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
5911
5912 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
5913 GFP_KERNEL);
5914 if (!pf->msix_entries)
5915 return -ENOMEM;
5916
5917 for (i = 0; i < v_budget; i++)
5918 pf->msix_entries[i].entry = i;
5919 vec = i40e_reserve_msix_vectors(pf, v_budget);
5920 if (vec < I40E_MIN_MSIX) {
5921 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
5922 kfree(pf->msix_entries);
5923 pf->msix_entries = NULL;
5924 return -ENODEV;
5925
5926 } else if (vec == I40E_MIN_MSIX) {
5927 /* Adjust for minimal MSIX use */
5928 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
5929 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
5930 pf->num_vmdq_vsis = 0;
5931 pf->num_vmdq_qps = 0;
5932 pf->num_vmdq_msix = 0;
5933 pf->num_lan_qps = 1;
5934 pf->num_lan_msix = 1;
5935
5936 } else if (vec != v_budget) {
5937 /* Scale vector usage down */
5938 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
5939 vec--; /* reserve the misc vector */
5940
5941 /* partition out the remaining vectors */
5942 switch (vec) {
5943 case 2:
5944 pf->num_vmdq_vsis = 1;
5945 pf->num_lan_msix = 1;
5946 break;
5947 case 3:
5948 pf->num_vmdq_vsis = 1;
5949 pf->num_lan_msix = 2;
5950 break;
5951 default:
5952 pf->num_lan_msix = min_t(int, (vec / 2),
5953 pf->num_lan_qps);
5954 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
5955 I40E_DEFAULT_NUM_VMDQ_VSI);
5956 break;
5957 }
5958 }
5959
5960 return err;
5961 }
5962
5963 /**
5964 * i40e_alloc_q_vector - Allocate memory for a single interrupt vector
5965 * @vsi: the VSI being configured
5966 * @v_idx: index of the vector in the vsi struct
5967 *
5968 * We allocate one q_vector. If allocation fails we return -ENOMEM.
5969 **/
5970 static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
5971 {
5972 struct i40e_q_vector *q_vector;
5973
5974 /* allocate q_vector */
5975 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
5976 if (!q_vector)
5977 return -ENOMEM;
5978
5979 q_vector->vsi = vsi;
5980 q_vector->v_idx = v_idx;
5981 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
5982 if (vsi->netdev)
5983 netif_napi_add(vsi->netdev, &q_vector->napi,
5984 i40e_napi_poll, vsi->work_limit);
5985
5986 q_vector->rx.latency_range = I40E_LOW_LATENCY;
5987 q_vector->tx.latency_range = I40E_LOW_LATENCY;
5988
5989 /* tie q_vector and vsi together */
5990 vsi->q_vectors[v_idx] = q_vector;
5991
5992 return 0;
5993 }
5994
5995 /**
5996 * i40e_alloc_q_vectors - Allocate memory for interrupt vectors
5997 * @vsi: the VSI being configured
5998 *
5999 * We allocate one q_vector per queue interrupt. If allocation fails we
6000 * return -ENOMEM.
6001 **/
6002 static int i40e_alloc_q_vectors(struct i40e_vsi *vsi)
6003 {
6004 struct i40e_pf *pf = vsi->back;
6005 int v_idx, num_q_vectors;
6006 int err;
6007
6008 /* if not MSIX, give the one vector only to the LAN VSI */
6009 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6010 num_q_vectors = vsi->num_q_vectors;
6011 else if (vsi == pf->vsi[pf->lan_vsi])
6012 num_q_vectors = 1;
6013 else
6014 return -EINVAL;
6015
6016 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6017 err = i40e_alloc_q_vector(vsi, v_idx);
6018 if (err)
6019 goto err_out;
6020 }
6021
6022 return 0;
6023
6024 err_out:
6025 while (v_idx--)
6026 i40e_free_q_vector(vsi, v_idx);
6027
6028 return err;
6029 }
6030
6031 /**
6032 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6033 * @pf: board private structure to initialize
6034 **/
6035 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6036 {
6037 int err = 0;
6038
6039 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6040 err = i40e_init_msix(pf);
6041 if (err) {
6042 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6043 I40E_FLAG_RSS_ENABLED |
6044 I40E_FLAG_DCB_ENABLED |
6045 I40E_FLAG_SRIOV_ENABLED |
6046 I40E_FLAG_FD_SB_ENABLED |
6047 I40E_FLAG_FD_ATR_ENABLED |
6048 I40E_FLAG_VMDQ_ENABLED);
6049
6050 /* rework the queue expectations without MSIX */
6051 i40e_determine_queue_usage(pf);
6052 }
6053 }
6054
6055 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6056 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6057 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6058 err = pci_enable_msi(pf->pdev);
6059 if (err) {
6060 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6061 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6062 }
6063 }
6064
6065 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6066 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6067
6068 /* track first vector for misc interrupts */
6069 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6070 }
6071
6072 /**
6073 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6074 * @pf: board private structure
6075 *
6076 * This sets up the handler for MSIX 0, which is used to manage the
6077 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6078 * when in MSI or Legacy interrupt mode.
6079 **/
6080 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6081 {
6082 struct i40e_hw *hw = &pf->hw;
6083 int err = 0;
6084
6085 /* Only request the irq if this is the first time through, and
6086 * not when we're rebuilding after a Reset
6087 */
6088 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6089 err = request_irq(pf->msix_entries[0].vector,
6090 i40e_intr, 0, pf->misc_int_name, pf);
6091 if (err) {
6092 dev_info(&pf->pdev->dev,
6093 "request_irq for %s failed: %d\n",
6094 pf->misc_int_name, err);
6095 return -EFAULT;
6096 }
6097 }
6098
6099 i40e_enable_misc_int_causes(hw);
6100
6101 /* associate no queues to the misc vector */
6102 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6103 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6104
6105 i40e_flush(hw);
6106
6107 i40e_irq_dynamic_enable_icr0(pf);
6108
6109 return err;
6110 }
6111
6112 /**
6113 * i40e_config_rss - Prepare for RSS if used
6114 * @pf: board private structure
6115 **/
6116 static int i40e_config_rss(struct i40e_pf *pf)
6117 {
6118 /* Set of random keys generated using kernel random number generator */
6119 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6120 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6121 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6122 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6123 struct i40e_hw *hw = &pf->hw;
6124 u32 lut = 0;
6125 int i, j;
6126 u64 hena;
6127
6128 /* Fill out hash function seed */
6129 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6130 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6131
6132 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6133 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6134 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6135 hena |= I40E_DEFAULT_RSS_HENA;
6136 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6137 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6138
6139 /* Populate the LUT with max no. of queues in round robin fashion */
6140 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
6141
6142 /* The assumption is that lan qp count will be the highest
6143 * qp count for any PF VSI that needs RSS.
6144 * If multiple VSIs need RSS support, all the qp counts
6145 * for those VSIs should be a power of 2 for RSS to work.
6146 * If LAN VSI is the only consumer for RSS then this requirement
6147 * is not necessary.
6148 */
6149 if (j == pf->rss_size)
6150 j = 0;
6151 /* lut = 4-byte sliding window of 4 lut entries */
6152 lut = (lut << 8) | (j &
6153 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6154 /* On i = 3, we have 4 entries in lut; write to the register */
6155 if ((i & 3) == 3)
6156 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6157 }
6158 i40e_flush(hw);
6159
6160 return 0;
6161 }
6162
6163 /**
6164 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6165 * @pf: board private structure
6166 * @queue_count: the requested queue count for rss.
6167 *
6168 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6169 * count which may be different from the requested queue count.
6170 **/
6171 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6172 {
6173 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6174 return 0;
6175
6176 queue_count = min_t(int, queue_count, pf->rss_size_max);
6177 queue_count = rounddown_pow_of_two(queue_count);
6178
6179 if (queue_count != pf->rss_size) {
6180 i40e_prep_for_reset(pf);
6181
6182 pf->rss_size = queue_count;
6183
6184 i40e_reset_and_rebuild(pf, true);
6185 i40e_config_rss(pf);
6186 }
6187 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6188 return pf->rss_size;
6189 }
6190
6191 /**
6192 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6193 * @pf: board private structure to initialize
6194 *
6195 * i40e_sw_init initializes the Adapter private data structure.
6196 * Fields are initialized based on PCI device information and
6197 * OS network device settings (MTU size).
6198 **/
6199 static int i40e_sw_init(struct i40e_pf *pf)
6200 {
6201 int err = 0;
6202 int size;
6203
6204 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6205 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6206 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6207 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6208 if (I40E_DEBUG_USER & debug)
6209 pf->hw.debug_mask = debug;
6210 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6211 I40E_DEFAULT_MSG_ENABLE);
6212 }
6213
6214 /* Set default capability flags */
6215 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6216 I40E_FLAG_MSI_ENABLED |
6217 I40E_FLAG_MSIX_ENABLED |
6218 I40E_FLAG_RX_1BUF_ENABLED;
6219
6220 /* Depending on PF configurations, it is possible that the RSS
6221 * maximum might end up larger than the available queues
6222 */
6223 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6224 pf->rss_size_max = min_t(int, pf->rss_size_max,
6225 pf->hw.func_caps.num_tx_qp);
6226 if (pf->hw.func_caps.rss) {
6227 pf->flags |= I40E_FLAG_RSS_ENABLED;
6228 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6229 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6230 } else {
6231 pf->rss_size = 1;
6232 }
6233
6234 /* MFP mode enabled */
6235 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6236 pf->flags |= I40E_FLAG_MFP_ENABLED;
6237 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6238 }
6239
6240 /* FW/NVM is not yet fixed in this regard */
6241 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6242 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6243 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6244 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6245 dev_info(&pf->pdev->dev,
6246 "Flow Director ATR mode Enabled\n");
6247 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6248 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6249 dev_info(&pf->pdev->dev,
6250 "Flow Director Side Band mode Enabled\n");
6251 } else {
6252 dev_info(&pf->pdev->dev,
6253 "Flow Director Side Band mode Disabled in MFP mode\n");
6254 }
6255 pf->fdir_pf_filter_count =
6256 pf->hw.func_caps.fd_filters_guaranteed;
6257 pf->hw.fdir_shared_filter_count =
6258 pf->hw.func_caps.fd_filters_best_effort;
6259 }
6260
6261 if (pf->hw.func_caps.vmdq) {
6262 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6263 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6264 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6265 }
6266
6267 #ifdef CONFIG_PCI_IOV
6268 if (pf->hw.func_caps.num_vfs) {
6269 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6270 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6271 pf->num_req_vfs = min_t(int,
6272 pf->hw.func_caps.num_vfs,
6273 I40E_MAX_VF_COUNT);
6274 dev_info(&pf->pdev->dev,
6275 "Number of VFs being requested for PF[%d] = %d\n",
6276 pf->hw.pf_id, pf->num_req_vfs);
6277 }
6278 #endif /* CONFIG_PCI_IOV */
6279 pf->eeprom_version = 0xDEAD;
6280 pf->lan_veb = I40E_NO_VEB;
6281 pf->lan_vsi = I40E_NO_VSI;
6282
6283 /* set up queue assignment tracking */
6284 size = sizeof(struct i40e_lump_tracking)
6285 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6286 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6287 if (!pf->qp_pile) {
6288 err = -ENOMEM;
6289 goto sw_init_done;
6290 }
6291 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6292 pf->qp_pile->search_hint = 0;
6293
6294 /* set up vector assignment tracking */
6295 size = sizeof(struct i40e_lump_tracking)
6296 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6297 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6298 if (!pf->irq_pile) {
6299 kfree(pf->qp_pile);
6300 err = -ENOMEM;
6301 goto sw_init_done;
6302 }
6303 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6304 pf->irq_pile->search_hint = 0;
6305
6306 mutex_init(&pf->switch_mutex);
6307
6308 sw_init_done:
6309 return err;
6310 }
6311
6312 /**
6313 * i40e_set_features - set the netdev feature flags
6314 * @netdev: ptr to the netdev being adjusted
6315 * @features: the feature set that the stack is suggesting
6316 **/
6317 static int i40e_set_features(struct net_device *netdev,
6318 netdev_features_t features)
6319 {
6320 struct i40e_netdev_priv *np = netdev_priv(netdev);
6321 struct i40e_vsi *vsi = np->vsi;
6322
6323 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6324 i40e_vlan_stripping_enable(vsi);
6325 else
6326 i40e_vlan_stripping_disable(vsi);
6327
6328 return 0;
6329 }
6330
6331 #ifdef CONFIG_I40E_VXLAN
6332 /**
6333 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6334 * @pf: board private structure
6335 * @port: The UDP port to look up
6336 *
6337 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6338 **/
6339 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6340 {
6341 u8 i;
6342
6343 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6344 if (pf->vxlan_ports[i] == port)
6345 return i;
6346 }
6347
6348 return i;
6349 }
6350
6351 /**
6352 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6353 * @netdev: This physical port's netdev
6354 * @sa_family: Socket Family that VXLAN is notifying us about
6355 * @port: New UDP port number that VXLAN started listening to
6356 **/
6357 static void i40e_add_vxlan_port(struct net_device *netdev,
6358 sa_family_t sa_family, __be16 port)
6359 {
6360 struct i40e_netdev_priv *np = netdev_priv(netdev);
6361 struct i40e_vsi *vsi = np->vsi;
6362 struct i40e_pf *pf = vsi->back;
6363 u8 next_idx;
6364 u8 idx;
6365
6366 if (sa_family == AF_INET6)
6367 return;
6368
6369 idx = i40e_get_vxlan_port_idx(pf, port);
6370
6371 /* Check if port already exists */
6372 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6373 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6374 return;
6375 }
6376
6377 /* Now check if there is space to add the new port */
6378 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6379
6380 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6381 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6382 ntohs(port));
6383 return;
6384 }
6385
6386 /* New port: add it and mark its index in the bitmap */
6387 pf->vxlan_ports[next_idx] = port;
6388 pf->pending_vxlan_bitmap |= (1 << next_idx);
6389
6390 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6391 }
6392
6393 /**
6394 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6395 * @netdev: This physical port's netdev
6396 * @sa_family: Socket Family that VXLAN is notifying us about
6397 * @port: UDP port number that VXLAN stopped listening to
6398 **/
6399 static void i40e_del_vxlan_port(struct net_device *netdev,
6400 sa_family_t sa_family, __be16 port)
6401 {
6402 struct i40e_netdev_priv *np = netdev_priv(netdev);
6403 struct i40e_vsi *vsi = np->vsi;
6404 struct i40e_pf *pf = vsi->back;
6405 u8 idx;
6406
6407 if (sa_family == AF_INET6)
6408 return;
6409
6410 idx = i40e_get_vxlan_port_idx(pf, port);
6411
6412 /* Check if port already exists */
6413 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6414 /* if port exists, set it to 0 (mark for deletion)
6415 * and make it pending
6416 */
6417 pf->vxlan_ports[idx] = 0;
6418
6419 pf->pending_vxlan_bitmap |= (1 << idx);
6420
6421 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6422 } else {
6423 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6424 ntohs(port));
6425 }
6426 }
6427
6428 #endif
6429 static const struct net_device_ops i40e_netdev_ops = {
6430 .ndo_open = i40e_open,
6431 .ndo_stop = i40e_close,
6432 .ndo_start_xmit = i40e_lan_xmit_frame,
6433 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6434 .ndo_set_rx_mode = i40e_set_rx_mode,
6435 .ndo_validate_addr = eth_validate_addr,
6436 .ndo_set_mac_address = i40e_set_mac,
6437 .ndo_change_mtu = i40e_change_mtu,
6438 .ndo_do_ioctl = i40e_ioctl,
6439 .ndo_tx_timeout = i40e_tx_timeout,
6440 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6441 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6442 #ifdef CONFIG_NET_POLL_CONTROLLER
6443 .ndo_poll_controller = i40e_netpoll,
6444 #endif
6445 .ndo_setup_tc = i40e_setup_tc,
6446 .ndo_set_features = i40e_set_features,
6447 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6448 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6449 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6450 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6451 #ifdef CONFIG_I40E_VXLAN
6452 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6453 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6454 #endif
6455 };
6456
6457 /**
6458 * i40e_config_netdev - Setup the netdev flags
6459 * @vsi: the VSI being configured
6460 *
6461 * Returns 0 on success, negative value on failure
6462 **/
6463 static int i40e_config_netdev(struct i40e_vsi *vsi)
6464 {
6465 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6466 struct i40e_pf *pf = vsi->back;
6467 struct i40e_hw *hw = &pf->hw;
6468 struct i40e_netdev_priv *np;
6469 struct net_device *netdev;
6470 u8 mac_addr[ETH_ALEN];
6471 int etherdev_size;
6472
6473 etherdev_size = sizeof(struct i40e_netdev_priv);
6474 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6475 if (!netdev)
6476 return -ENOMEM;
6477
6478 vsi->netdev = netdev;
6479 np = netdev_priv(netdev);
6480 np->vsi = vsi;
6481
6482 netdev->hw_enc_features = NETIF_F_IP_CSUM |
6483 NETIF_F_GSO_UDP_TUNNEL |
6484 NETIF_F_TSO |
6485 NETIF_F_SG;
6486
6487 netdev->features = NETIF_F_SG |
6488 NETIF_F_IP_CSUM |
6489 NETIF_F_SCTP_CSUM |
6490 NETIF_F_HIGHDMA |
6491 NETIF_F_GSO_UDP_TUNNEL |
6492 NETIF_F_HW_VLAN_CTAG_TX |
6493 NETIF_F_HW_VLAN_CTAG_RX |
6494 NETIF_F_HW_VLAN_CTAG_FILTER |
6495 NETIF_F_IPV6_CSUM |
6496 NETIF_F_TSO |
6497 NETIF_F_TSO6 |
6498 NETIF_F_RXCSUM |
6499 NETIF_F_RXHASH |
6500 0;
6501
6502 /* copy netdev features into list of user selectable features */
6503 netdev->hw_features |= netdev->features;
6504
6505 if (vsi->type == I40E_VSI_MAIN) {
6506 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6507 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6508 } else {
6509 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6510 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6511 pf->vsi[pf->lan_vsi]->netdev->name);
6512 random_ether_addr(mac_addr);
6513 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6514 }
6515 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6516
6517 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6518 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6519 /* vlan gets same features (except vlan offload)
6520 * after any tweaks for specific VSI types
6521 */
6522 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6523 NETIF_F_HW_VLAN_CTAG_RX |
6524 NETIF_F_HW_VLAN_CTAG_FILTER);
6525 netdev->priv_flags |= IFF_UNICAST_FLT;
6526 netdev->priv_flags |= IFF_SUPP_NOFCS;
6527 /* Setup netdev TC information */
6528 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6529
6530 netdev->netdev_ops = &i40e_netdev_ops;
6531 netdev->watchdog_timeo = 5 * HZ;
6532 i40e_set_ethtool_ops(netdev);
6533
6534 return 0;
6535 }
6536
6537 /**
6538 * i40e_vsi_delete - Delete a VSI from the switch
6539 * @vsi: the VSI being removed
6540 *
6541 * Returns 0 on success, negative value on failure
6542 **/
6543 static void i40e_vsi_delete(struct i40e_vsi *vsi)
6544 {
6545 /* remove default VSI is not allowed */
6546 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6547 return;
6548
6549 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6550 return;
6551 }
6552
6553 /**
6554 * i40e_add_vsi - Add a VSI to the switch
6555 * @vsi: the VSI being configured
6556 *
6557 * This initializes a VSI context depending on the VSI type to be added and
6558 * passes it down to the add_vsi aq command.
6559 **/
6560 static int i40e_add_vsi(struct i40e_vsi *vsi)
6561 {
6562 int ret = -ENODEV;
6563 struct i40e_mac_filter *f, *ftmp;
6564 struct i40e_pf *pf = vsi->back;
6565 struct i40e_hw *hw = &pf->hw;
6566 struct i40e_vsi_context ctxt;
6567 u8 enabled_tc = 0x1; /* TC0 enabled */
6568 int f_count = 0;
6569
6570 memset(&ctxt, 0, sizeof(ctxt));
6571 switch (vsi->type) {
6572 case I40E_VSI_MAIN:
6573 /* The PF's main VSI is already setup as part of the
6574 * device initialization, so we'll not bother with
6575 * the add_vsi call, but we will retrieve the current
6576 * VSI context.
6577 */
6578 ctxt.seid = pf->main_vsi_seid;
6579 ctxt.pf_num = pf->hw.pf_id;
6580 ctxt.vf_num = 0;
6581 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6582 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6583 if (ret) {
6584 dev_info(&pf->pdev->dev,
6585 "couldn't get pf vsi config, err %d, aq_err %d\n",
6586 ret, pf->hw.aq.asq_last_status);
6587 return -ENOENT;
6588 }
6589 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6590 vsi->info.valid_sections = 0;
6591
6592 vsi->seid = ctxt.seid;
6593 vsi->id = ctxt.vsi_number;
6594
6595 enabled_tc = i40e_pf_get_tc_map(pf);
6596
6597 /* MFP mode setup queue map and update VSI */
6598 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6599 memset(&ctxt, 0, sizeof(ctxt));
6600 ctxt.seid = pf->main_vsi_seid;
6601 ctxt.pf_num = pf->hw.pf_id;
6602 ctxt.vf_num = 0;
6603 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6604 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6605 if (ret) {
6606 dev_info(&pf->pdev->dev,
6607 "update vsi failed, aq_err=%d\n",
6608 pf->hw.aq.asq_last_status);
6609 ret = -ENOENT;
6610 goto err;
6611 }
6612 /* update the local VSI info queue map */
6613 i40e_vsi_update_queue_map(vsi, &ctxt);
6614 vsi->info.valid_sections = 0;
6615 } else {
6616 /* Default/Main VSI is only enabled for TC0
6617 * reconfigure it to enable all TCs that are
6618 * available on the port in SFP mode.
6619 */
6620 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6621 if (ret) {
6622 dev_info(&pf->pdev->dev,
6623 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6624 enabled_tc, ret,
6625 pf->hw.aq.asq_last_status);
6626 ret = -ENOENT;
6627 }
6628 }
6629 break;
6630
6631 case I40E_VSI_FDIR:
6632 ctxt.pf_num = hw->pf_id;
6633 ctxt.vf_num = 0;
6634 ctxt.uplink_seid = vsi->uplink_seid;
6635 ctxt.connection_type = 0x1; /* regular data port */
6636 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6637 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6638 break;
6639
6640 case I40E_VSI_VMDQ2:
6641 ctxt.pf_num = hw->pf_id;
6642 ctxt.vf_num = 0;
6643 ctxt.uplink_seid = vsi->uplink_seid;
6644 ctxt.connection_type = 0x1; /* regular data port */
6645 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6646
6647 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6648
6649 /* This VSI is connected to VEB so the switch_id
6650 * should be set to zero by default.
6651 */
6652 ctxt.info.switch_id = 0;
6653 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6654 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6655
6656 /* Setup the VSI tx/rx queue map for TC0 only for now */
6657 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6658 break;
6659
6660 case I40E_VSI_SRIOV:
6661 ctxt.pf_num = hw->pf_id;
6662 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6663 ctxt.uplink_seid = vsi->uplink_seid;
6664 ctxt.connection_type = 0x1; /* regular data port */
6665 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6666
6667 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6668
6669 /* This VSI is connected to VEB so the switch_id
6670 * should be set to zero by default.
6671 */
6672 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6673
6674 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6675 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6676 /* Setup the VSI tx/rx queue map for TC0 only for now */
6677 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6678 break;
6679
6680 default:
6681 return -ENODEV;
6682 }
6683
6684 if (vsi->type != I40E_VSI_MAIN) {
6685 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6686 if (ret) {
6687 dev_info(&vsi->back->pdev->dev,
6688 "add vsi failed, aq_err=%d\n",
6689 vsi->back->hw.aq.asq_last_status);
6690 ret = -ENOENT;
6691 goto err;
6692 }
6693 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6694 vsi->info.valid_sections = 0;
6695 vsi->seid = ctxt.seid;
6696 vsi->id = ctxt.vsi_number;
6697 }
6698
6699 /* If macvlan filters already exist, force them to get loaded */
6700 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6701 f->changed = true;
6702 f_count++;
6703 }
6704 if (f_count) {
6705 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6706 pf->flags |= I40E_FLAG_FILTER_SYNC;
6707 }
6708
6709 /* Update VSI BW information */
6710 ret = i40e_vsi_get_bw_info(vsi);
6711 if (ret) {
6712 dev_info(&pf->pdev->dev,
6713 "couldn't get vsi bw info, err %d, aq_err %d\n",
6714 ret, pf->hw.aq.asq_last_status);
6715 /* VSI is already added so not tearing that up */
6716 ret = 0;
6717 }
6718
6719 err:
6720 return ret;
6721 }
6722
6723 /**
6724 * i40e_vsi_release - Delete a VSI and free its resources
6725 * @vsi: the VSI being removed
6726 *
6727 * Returns 0 on success or < 0 on error
6728 **/
6729 int i40e_vsi_release(struct i40e_vsi *vsi)
6730 {
6731 struct i40e_mac_filter *f, *ftmp;
6732 struct i40e_veb *veb = NULL;
6733 struct i40e_pf *pf;
6734 u16 uplink_seid;
6735 int i, n;
6736
6737 pf = vsi->back;
6738
6739 /* release of a VEB-owner or last VSI is not allowed */
6740 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6741 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6742 vsi->seid, vsi->uplink_seid);
6743 return -ENODEV;
6744 }
6745 if (vsi == pf->vsi[pf->lan_vsi] &&
6746 !test_bit(__I40E_DOWN, &pf->state)) {
6747 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6748 return -ENODEV;
6749 }
6750
6751 uplink_seid = vsi->uplink_seid;
6752 if (vsi->type != I40E_VSI_SRIOV) {
6753 if (vsi->netdev_registered) {
6754 vsi->netdev_registered = false;
6755 if (vsi->netdev) {
6756 /* results in a call to i40e_close() */
6757 unregister_netdev(vsi->netdev);
6758 free_netdev(vsi->netdev);
6759 vsi->netdev = NULL;
6760 }
6761 } else {
6762 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6763 i40e_down(vsi);
6764 i40e_vsi_free_irq(vsi);
6765 i40e_vsi_free_tx_resources(vsi);
6766 i40e_vsi_free_rx_resources(vsi);
6767 }
6768 i40e_vsi_disable_irq(vsi);
6769 }
6770
6771 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6772 i40e_del_filter(vsi, f->macaddr, f->vlan,
6773 f->is_vf, f->is_netdev);
6774 i40e_sync_vsi_filters(vsi);
6775
6776 i40e_vsi_delete(vsi);
6777 i40e_vsi_free_q_vectors(vsi);
6778 i40e_vsi_clear_rings(vsi);
6779 i40e_vsi_clear(vsi);
6780
6781 /* If this was the last thing on the VEB, except for the
6782 * controlling VSI, remove the VEB, which puts the controlling
6783 * VSI onto the next level down in the switch.
6784 *
6785 * Well, okay, there's one more exception here: don't remove
6786 * the orphan VEBs yet. We'll wait for an explicit remove request
6787 * from up the network stack.
6788 */
6789 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6790 if (pf->vsi[i] &&
6791 pf->vsi[i]->uplink_seid == uplink_seid &&
6792 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6793 n++; /* count the VSIs */
6794 }
6795 }
6796 for (i = 0; i < I40E_MAX_VEB; i++) {
6797 if (!pf->veb[i])
6798 continue;
6799 if (pf->veb[i]->uplink_seid == uplink_seid)
6800 n++; /* count the VEBs */
6801 if (pf->veb[i]->seid == uplink_seid)
6802 veb = pf->veb[i];
6803 }
6804 if (n == 0 && veb && veb->uplink_seid != 0)
6805 i40e_veb_release(veb);
6806
6807 return 0;
6808 }
6809
6810 /**
6811 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
6812 * @vsi: ptr to the VSI
6813 *
6814 * This should only be called after i40e_vsi_mem_alloc() which allocates the
6815 * corresponding SW VSI structure and initializes num_queue_pairs for the
6816 * newly allocated VSI.
6817 *
6818 * Returns 0 on success or negative on failure
6819 **/
6820 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
6821 {
6822 int ret = -ENOENT;
6823 struct i40e_pf *pf = vsi->back;
6824
6825 if (vsi->q_vectors[0]) {
6826 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
6827 vsi->seid);
6828 return -EEXIST;
6829 }
6830
6831 if (vsi->base_vector) {
6832 dev_info(&pf->pdev->dev,
6833 "VSI %d has non-zero base vector %d\n",
6834 vsi->seid, vsi->base_vector);
6835 return -EEXIST;
6836 }
6837
6838 ret = i40e_alloc_q_vectors(vsi);
6839 if (ret) {
6840 dev_info(&pf->pdev->dev,
6841 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
6842 vsi->num_q_vectors, vsi->seid, ret);
6843 vsi->num_q_vectors = 0;
6844 goto vector_setup_out;
6845 }
6846
6847 if (vsi->num_q_vectors)
6848 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
6849 vsi->num_q_vectors, vsi->idx);
6850 if (vsi->base_vector < 0) {
6851 dev_info(&pf->pdev->dev,
6852 "failed to get q tracking for VSI %d, err=%d\n",
6853 vsi->seid, vsi->base_vector);
6854 i40e_vsi_free_q_vectors(vsi);
6855 ret = -ENOENT;
6856 goto vector_setup_out;
6857 }
6858
6859 vector_setup_out:
6860 return ret;
6861 }
6862
6863 /**
6864 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
6865 * @vsi: pointer to the vsi.
6866 *
6867 * This re-allocates a vsi's queue resources.
6868 *
6869 * Returns pointer to the successfully allocated and configured VSI sw struct
6870 * on success, otherwise returns NULL on failure.
6871 **/
6872 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
6873 {
6874 struct i40e_pf *pf = vsi->back;
6875 u8 enabled_tc;
6876 int ret;
6877
6878 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6879 i40e_vsi_clear_rings(vsi);
6880
6881 i40e_vsi_free_arrays(vsi, false);
6882 i40e_set_num_rings_in_vsi(vsi);
6883 ret = i40e_vsi_alloc_arrays(vsi, false);
6884 if (ret)
6885 goto err_vsi;
6886
6887 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
6888 if (ret < 0) {
6889 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
6890 vsi->seid, ret);
6891 goto err_vsi;
6892 }
6893 vsi->base_queue = ret;
6894
6895 /* Update the FW view of the VSI. Force a reset of TC and queue
6896 * layout configurations.
6897 */
6898 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
6899 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
6900 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
6901 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
6902
6903 /* assign it some queues */
6904 ret = i40e_alloc_rings(vsi);
6905 if (ret)
6906 goto err_rings;
6907
6908 /* map all of the rings to the q_vectors */
6909 i40e_vsi_map_rings_to_vectors(vsi);
6910 return vsi;
6911
6912 err_rings:
6913 i40e_vsi_free_q_vectors(vsi);
6914 if (vsi->netdev_registered) {
6915 vsi->netdev_registered = false;
6916 unregister_netdev(vsi->netdev);
6917 free_netdev(vsi->netdev);
6918 vsi->netdev = NULL;
6919 }
6920 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
6921 err_vsi:
6922 i40e_vsi_clear(vsi);
6923 return NULL;
6924 }
6925
6926 /**
6927 * i40e_vsi_setup - Set up a VSI by a given type
6928 * @pf: board private structure
6929 * @type: VSI type
6930 * @uplink_seid: the switch element to link to
6931 * @param1: usage depends upon VSI type. For VF types, indicates VF id
6932 *
6933 * This allocates the sw VSI structure and its queue resources, then add a VSI
6934 * to the identified VEB.
6935 *
6936 * Returns pointer to the successfully allocated and configure VSI sw struct on
6937 * success, otherwise returns NULL on failure.
6938 **/
6939 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
6940 u16 uplink_seid, u32 param1)
6941 {
6942 struct i40e_vsi *vsi = NULL;
6943 struct i40e_veb *veb = NULL;
6944 int ret, i;
6945 int v_idx;
6946
6947 /* The requested uplink_seid must be either
6948 * - the PF's port seid
6949 * no VEB is needed because this is the PF
6950 * or this is a Flow Director special case VSI
6951 * - seid of an existing VEB
6952 * - seid of a VSI that owns an existing VEB
6953 * - seid of a VSI that doesn't own a VEB
6954 * a new VEB is created and the VSI becomes the owner
6955 * - seid of the PF VSI, which is what creates the first VEB
6956 * this is a special case of the previous
6957 *
6958 * Find which uplink_seid we were given and create a new VEB if needed
6959 */
6960 for (i = 0; i < I40E_MAX_VEB; i++) {
6961 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
6962 veb = pf->veb[i];
6963 break;
6964 }
6965 }
6966
6967 if (!veb && uplink_seid != pf->mac_seid) {
6968
6969 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6970 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
6971 vsi = pf->vsi[i];
6972 break;
6973 }
6974 }
6975 if (!vsi) {
6976 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
6977 uplink_seid);
6978 return NULL;
6979 }
6980
6981 if (vsi->uplink_seid == pf->mac_seid)
6982 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
6983 vsi->tc_config.enabled_tc);
6984 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
6985 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
6986 vsi->tc_config.enabled_tc);
6987
6988 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
6989 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
6990 veb = pf->veb[i];
6991 }
6992 if (!veb) {
6993 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
6994 return NULL;
6995 }
6996
6997 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
6998 uplink_seid = veb->seid;
6999 }
7000
7001 /* get vsi sw struct */
7002 v_idx = i40e_vsi_mem_alloc(pf, type);
7003 if (v_idx < 0)
7004 goto err_alloc;
7005 vsi = pf->vsi[v_idx];
7006 if (!vsi)
7007 goto err_alloc;
7008 vsi->type = type;
7009 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7010
7011 if (type == I40E_VSI_MAIN)
7012 pf->lan_vsi = v_idx;
7013 else if (type == I40E_VSI_SRIOV)
7014 vsi->vf_id = param1;
7015 /* assign it some queues */
7016 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7017 vsi->idx);
7018 if (ret < 0) {
7019 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7020 vsi->seid, ret);
7021 goto err_vsi;
7022 }
7023 vsi->base_queue = ret;
7024
7025 /* get a VSI from the hardware */
7026 vsi->uplink_seid = uplink_seid;
7027 ret = i40e_add_vsi(vsi);
7028 if (ret)
7029 goto err_vsi;
7030
7031 switch (vsi->type) {
7032 /* setup the netdev if needed */
7033 case I40E_VSI_MAIN:
7034 case I40E_VSI_VMDQ2:
7035 ret = i40e_config_netdev(vsi);
7036 if (ret)
7037 goto err_netdev;
7038 ret = register_netdev(vsi->netdev);
7039 if (ret)
7040 goto err_netdev;
7041 vsi->netdev_registered = true;
7042 netif_carrier_off(vsi->netdev);
7043 #ifdef CONFIG_I40E_DCB
7044 /* Setup DCB netlink interface */
7045 i40e_dcbnl_setup(vsi);
7046 #endif /* CONFIG_I40E_DCB */
7047 /* fall through */
7048
7049 case I40E_VSI_FDIR:
7050 /* set up vectors and rings if needed */
7051 ret = i40e_vsi_setup_vectors(vsi);
7052 if (ret)
7053 goto err_msix;
7054
7055 ret = i40e_alloc_rings(vsi);
7056 if (ret)
7057 goto err_rings;
7058
7059 /* map all of the rings to the q_vectors */
7060 i40e_vsi_map_rings_to_vectors(vsi);
7061
7062 i40e_vsi_reset_stats(vsi);
7063 break;
7064
7065 default:
7066 /* no netdev or rings for the other VSI types */
7067 break;
7068 }
7069
7070 return vsi;
7071
7072 err_rings:
7073 i40e_vsi_free_q_vectors(vsi);
7074 err_msix:
7075 if (vsi->netdev_registered) {
7076 vsi->netdev_registered = false;
7077 unregister_netdev(vsi->netdev);
7078 free_netdev(vsi->netdev);
7079 vsi->netdev = NULL;
7080 }
7081 err_netdev:
7082 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7083 err_vsi:
7084 i40e_vsi_clear(vsi);
7085 err_alloc:
7086 return NULL;
7087 }
7088
7089 /**
7090 * i40e_veb_get_bw_info - Query VEB BW information
7091 * @veb: the veb to query
7092 *
7093 * Query the Tx scheduler BW configuration data for given VEB
7094 **/
7095 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7096 {
7097 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7098 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7099 struct i40e_pf *pf = veb->pf;
7100 struct i40e_hw *hw = &pf->hw;
7101 u32 tc_bw_max;
7102 int ret = 0;
7103 int i;
7104
7105 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7106 &bw_data, NULL);
7107 if (ret) {
7108 dev_info(&pf->pdev->dev,
7109 "query veb bw config failed, aq_err=%d\n",
7110 hw->aq.asq_last_status);
7111 goto out;
7112 }
7113
7114 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7115 &ets_data, NULL);
7116 if (ret) {
7117 dev_info(&pf->pdev->dev,
7118 "query veb bw ets config failed, aq_err=%d\n",
7119 hw->aq.asq_last_status);
7120 goto out;
7121 }
7122
7123 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7124 veb->bw_max_quanta = ets_data.tc_bw_max;
7125 veb->is_abs_credits = bw_data.absolute_credits_enable;
7126 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7127 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7128 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7129 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7130 veb->bw_tc_limit_credits[i] =
7131 le16_to_cpu(bw_data.tc_bw_limits[i]);
7132 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7133 }
7134
7135 out:
7136 return ret;
7137 }
7138
7139 /**
7140 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7141 * @pf: board private structure
7142 *
7143 * On error: returns error code (negative)
7144 * On success: returns vsi index in PF (positive)
7145 **/
7146 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7147 {
7148 int ret = -ENOENT;
7149 struct i40e_veb *veb;
7150 int i;
7151
7152 /* Need to protect the allocation of switch elements at the PF level */
7153 mutex_lock(&pf->switch_mutex);
7154
7155 /* VEB list may be fragmented if VEB creation/destruction has
7156 * been happening. We can afford to do a quick scan to look
7157 * for any free slots in the list.
7158 *
7159 * find next empty veb slot, looping back around if necessary
7160 */
7161 i = 0;
7162 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7163 i++;
7164 if (i >= I40E_MAX_VEB) {
7165 ret = -ENOMEM;
7166 goto err_alloc_veb; /* out of VEB slots! */
7167 }
7168
7169 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7170 if (!veb) {
7171 ret = -ENOMEM;
7172 goto err_alloc_veb;
7173 }
7174 veb->pf = pf;
7175 veb->idx = i;
7176 veb->enabled_tc = 1;
7177
7178 pf->veb[i] = veb;
7179 ret = i;
7180 err_alloc_veb:
7181 mutex_unlock(&pf->switch_mutex);
7182 return ret;
7183 }
7184
7185 /**
7186 * i40e_switch_branch_release - Delete a branch of the switch tree
7187 * @branch: where to start deleting
7188 *
7189 * This uses recursion to find the tips of the branch to be
7190 * removed, deleting until we get back to and can delete this VEB.
7191 **/
7192 static void i40e_switch_branch_release(struct i40e_veb *branch)
7193 {
7194 struct i40e_pf *pf = branch->pf;
7195 u16 branch_seid = branch->seid;
7196 u16 veb_idx = branch->idx;
7197 int i;
7198
7199 /* release any VEBs on this VEB - RECURSION */
7200 for (i = 0; i < I40E_MAX_VEB; i++) {
7201 if (!pf->veb[i])
7202 continue;
7203 if (pf->veb[i]->uplink_seid == branch->seid)
7204 i40e_switch_branch_release(pf->veb[i]);
7205 }
7206
7207 /* Release the VSIs on this VEB, but not the owner VSI.
7208 *
7209 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7210 * the VEB itself, so don't use (*branch) after this loop.
7211 */
7212 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7213 if (!pf->vsi[i])
7214 continue;
7215 if (pf->vsi[i]->uplink_seid == branch_seid &&
7216 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7217 i40e_vsi_release(pf->vsi[i]);
7218 }
7219 }
7220
7221 /* There's one corner case where the VEB might not have been
7222 * removed, so double check it here and remove it if needed.
7223 * This case happens if the veb was created from the debugfs
7224 * commands and no VSIs were added to it.
7225 */
7226 if (pf->veb[veb_idx])
7227 i40e_veb_release(pf->veb[veb_idx]);
7228 }
7229
7230 /**
7231 * i40e_veb_clear - remove veb struct
7232 * @veb: the veb to remove
7233 **/
7234 static void i40e_veb_clear(struct i40e_veb *veb)
7235 {
7236 if (!veb)
7237 return;
7238
7239 if (veb->pf) {
7240 struct i40e_pf *pf = veb->pf;
7241
7242 mutex_lock(&pf->switch_mutex);
7243 if (pf->veb[veb->idx] == veb)
7244 pf->veb[veb->idx] = NULL;
7245 mutex_unlock(&pf->switch_mutex);
7246 }
7247
7248 kfree(veb);
7249 }
7250
7251 /**
7252 * i40e_veb_release - Delete a VEB and free its resources
7253 * @veb: the VEB being removed
7254 **/
7255 void i40e_veb_release(struct i40e_veb *veb)
7256 {
7257 struct i40e_vsi *vsi = NULL;
7258 struct i40e_pf *pf;
7259 int i, n = 0;
7260
7261 pf = veb->pf;
7262
7263 /* find the remaining VSI and check for extras */
7264 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7265 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7266 n++;
7267 vsi = pf->vsi[i];
7268 }
7269 }
7270 if (n != 1) {
7271 dev_info(&pf->pdev->dev,
7272 "can't remove VEB %d with %d VSIs left\n",
7273 veb->seid, n);
7274 return;
7275 }
7276
7277 /* move the remaining VSI to uplink veb */
7278 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7279 if (veb->uplink_seid) {
7280 vsi->uplink_seid = veb->uplink_seid;
7281 if (veb->uplink_seid == pf->mac_seid)
7282 vsi->veb_idx = I40E_NO_VEB;
7283 else
7284 vsi->veb_idx = veb->veb_idx;
7285 } else {
7286 /* floating VEB */
7287 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7288 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7289 }
7290
7291 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7292 i40e_veb_clear(veb);
7293
7294 return;
7295 }
7296
7297 /**
7298 * i40e_add_veb - create the VEB in the switch
7299 * @veb: the VEB to be instantiated
7300 * @vsi: the controlling VSI
7301 **/
7302 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7303 {
7304 bool is_default = false;
7305 bool is_cloud = false;
7306 int ret;
7307
7308 /* get a VEB from the hardware */
7309 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7310 veb->enabled_tc, is_default,
7311 is_cloud, &veb->seid, NULL);
7312 if (ret) {
7313 dev_info(&veb->pf->pdev->dev,
7314 "couldn't add VEB, err %d, aq_err %d\n",
7315 ret, veb->pf->hw.aq.asq_last_status);
7316 return -EPERM;
7317 }
7318
7319 /* get statistics counter */
7320 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7321 &veb->stats_idx, NULL, NULL, NULL);
7322 if (ret) {
7323 dev_info(&veb->pf->pdev->dev,
7324 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7325 ret, veb->pf->hw.aq.asq_last_status);
7326 return -EPERM;
7327 }
7328 ret = i40e_veb_get_bw_info(veb);
7329 if (ret) {
7330 dev_info(&veb->pf->pdev->dev,
7331 "couldn't get VEB bw info, err %d, aq_err %d\n",
7332 ret, veb->pf->hw.aq.asq_last_status);
7333 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7334 return -ENOENT;
7335 }
7336
7337 vsi->uplink_seid = veb->seid;
7338 vsi->veb_idx = veb->idx;
7339 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7340
7341 return 0;
7342 }
7343
7344 /**
7345 * i40e_veb_setup - Set up a VEB
7346 * @pf: board private structure
7347 * @flags: VEB setup flags
7348 * @uplink_seid: the switch element to link to
7349 * @vsi_seid: the initial VSI seid
7350 * @enabled_tc: Enabled TC bit-map
7351 *
7352 * This allocates the sw VEB structure and links it into the switch
7353 * It is possible and legal for this to be a duplicate of an already
7354 * existing VEB. It is also possible for both uplink and vsi seids
7355 * to be zero, in order to create a floating VEB.
7356 *
7357 * Returns pointer to the successfully allocated VEB sw struct on
7358 * success, otherwise returns NULL on failure.
7359 **/
7360 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7361 u16 uplink_seid, u16 vsi_seid,
7362 u8 enabled_tc)
7363 {
7364 struct i40e_veb *veb, *uplink_veb = NULL;
7365 int vsi_idx, veb_idx;
7366 int ret;
7367
7368 /* if one seid is 0, the other must be 0 to create a floating relay */
7369 if ((uplink_seid == 0 || vsi_seid == 0) &&
7370 (uplink_seid + vsi_seid != 0)) {
7371 dev_info(&pf->pdev->dev,
7372 "one, not both seid's are 0: uplink=%d vsi=%d\n",
7373 uplink_seid, vsi_seid);
7374 return NULL;
7375 }
7376
7377 /* make sure there is such a vsi and uplink */
7378 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
7379 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7380 break;
7381 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
7382 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7383 vsi_seid);
7384 return NULL;
7385 }
7386
7387 if (uplink_seid && uplink_seid != pf->mac_seid) {
7388 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
7389 if (pf->veb[veb_idx] &&
7390 pf->veb[veb_idx]->seid == uplink_seid) {
7391 uplink_veb = pf->veb[veb_idx];
7392 break;
7393 }
7394 }
7395 if (!uplink_veb) {
7396 dev_info(&pf->pdev->dev,
7397 "uplink seid %d not found\n", uplink_seid);
7398 return NULL;
7399 }
7400 }
7401
7402 /* get veb sw struct */
7403 veb_idx = i40e_veb_mem_alloc(pf);
7404 if (veb_idx < 0)
7405 goto err_alloc;
7406 veb = pf->veb[veb_idx];
7407 veb->flags = flags;
7408 veb->uplink_seid = uplink_seid;
7409 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7410 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7411
7412 /* create the VEB in the switch */
7413 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7414 if (ret)
7415 goto err_veb;
7416
7417 return veb;
7418
7419 err_veb:
7420 i40e_veb_clear(veb);
7421 err_alloc:
7422 return NULL;
7423 }
7424
7425 /**
7426 * i40e_setup_pf_switch_element - set pf vars based on switch type
7427 * @pf: board private structure
7428 * @ele: element we are building info from
7429 * @num_reported: total number of elements
7430 * @printconfig: should we print the contents
7431 *
7432 * helper function to assist in extracting a few useful SEID values.
7433 **/
7434 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7435 struct i40e_aqc_switch_config_element_resp *ele,
7436 u16 num_reported, bool printconfig)
7437 {
7438 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7439 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7440 u8 element_type = ele->element_type;
7441 u16 seid = le16_to_cpu(ele->seid);
7442
7443 if (printconfig)
7444 dev_info(&pf->pdev->dev,
7445 "type=%d seid=%d uplink=%d downlink=%d\n",
7446 element_type, seid, uplink_seid, downlink_seid);
7447
7448 switch (element_type) {
7449 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7450 pf->mac_seid = seid;
7451 break;
7452 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7453 /* Main VEB? */
7454 if (uplink_seid != pf->mac_seid)
7455 break;
7456 if (pf->lan_veb == I40E_NO_VEB) {
7457 int v;
7458
7459 /* find existing or else empty VEB */
7460 for (v = 0; v < I40E_MAX_VEB; v++) {
7461 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7462 pf->lan_veb = v;
7463 break;
7464 }
7465 }
7466 if (pf->lan_veb == I40E_NO_VEB) {
7467 v = i40e_veb_mem_alloc(pf);
7468 if (v < 0)
7469 break;
7470 pf->lan_veb = v;
7471 }
7472 }
7473
7474 pf->veb[pf->lan_veb]->seid = seid;
7475 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7476 pf->veb[pf->lan_veb]->pf = pf;
7477 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7478 break;
7479 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7480 if (num_reported != 1)
7481 break;
7482 /* This is immediately after a reset so we can assume this is
7483 * the PF's VSI
7484 */
7485 pf->mac_seid = uplink_seid;
7486 pf->pf_seid = downlink_seid;
7487 pf->main_vsi_seid = seid;
7488 if (printconfig)
7489 dev_info(&pf->pdev->dev,
7490 "pf_seid=%d main_vsi_seid=%d\n",
7491 pf->pf_seid, pf->main_vsi_seid);
7492 break;
7493 case I40E_SWITCH_ELEMENT_TYPE_PF:
7494 case I40E_SWITCH_ELEMENT_TYPE_VF:
7495 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7496 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7497 case I40E_SWITCH_ELEMENT_TYPE_PE:
7498 case I40E_SWITCH_ELEMENT_TYPE_PA:
7499 /* ignore these for now */
7500 break;
7501 default:
7502 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7503 element_type, seid);
7504 break;
7505 }
7506 }
7507
7508 /**
7509 * i40e_fetch_switch_configuration - Get switch config from firmware
7510 * @pf: board private structure
7511 * @printconfig: should we print the contents
7512 *
7513 * Get the current switch configuration from the device and
7514 * extract a few useful SEID values.
7515 **/
7516 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7517 {
7518 struct i40e_aqc_get_switch_config_resp *sw_config;
7519 u16 next_seid = 0;
7520 int ret = 0;
7521 u8 *aq_buf;
7522 int i;
7523
7524 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7525 if (!aq_buf)
7526 return -ENOMEM;
7527
7528 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7529 do {
7530 u16 num_reported, num_total;
7531
7532 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7533 I40E_AQ_LARGE_BUF,
7534 &next_seid, NULL);
7535 if (ret) {
7536 dev_info(&pf->pdev->dev,
7537 "get switch config failed %d aq_err=%x\n",
7538 ret, pf->hw.aq.asq_last_status);
7539 kfree(aq_buf);
7540 return -ENOENT;
7541 }
7542
7543 num_reported = le16_to_cpu(sw_config->header.num_reported);
7544 num_total = le16_to_cpu(sw_config->header.num_total);
7545
7546 if (printconfig)
7547 dev_info(&pf->pdev->dev,
7548 "header: %d reported %d total\n",
7549 num_reported, num_total);
7550
7551 if (num_reported) {
7552 int sz = sizeof(*sw_config) * num_reported;
7553
7554 kfree(pf->sw_config);
7555 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7556 if (pf->sw_config)
7557 memcpy(pf->sw_config, sw_config, sz);
7558 }
7559
7560 for (i = 0; i < num_reported; i++) {
7561 struct i40e_aqc_switch_config_element_resp *ele =
7562 &sw_config->element[i];
7563
7564 i40e_setup_pf_switch_element(pf, ele, num_reported,
7565 printconfig);
7566 }
7567 } while (next_seid != 0);
7568
7569 kfree(aq_buf);
7570 return ret;
7571 }
7572
7573 /**
7574 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7575 * @pf: board private structure
7576 * @reinit: if the Main VSI needs to re-initialized.
7577 *
7578 * Returns 0 on success, negative value on failure
7579 **/
7580 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7581 {
7582 u32 rxfc = 0, txfc = 0, rxfc_reg;
7583 int ret;
7584
7585 /* find out what's out there already */
7586 ret = i40e_fetch_switch_configuration(pf, false);
7587 if (ret) {
7588 dev_info(&pf->pdev->dev,
7589 "couldn't fetch switch config, err %d, aq_err %d\n",
7590 ret, pf->hw.aq.asq_last_status);
7591 return ret;
7592 }
7593 i40e_pf_reset_stats(pf);
7594
7595 /* first time setup */
7596 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7597 struct i40e_vsi *vsi = NULL;
7598 u16 uplink_seid;
7599
7600 /* Set up the PF VSI associated with the PF's main VSI
7601 * that is already in the HW switch
7602 */
7603 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7604 uplink_seid = pf->veb[pf->lan_veb]->seid;
7605 else
7606 uplink_seid = pf->mac_seid;
7607 if (pf->lan_vsi == I40E_NO_VSI)
7608 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7609 else if (reinit)
7610 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7611 if (!vsi) {
7612 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7613 i40e_fdir_teardown(pf);
7614 return -EAGAIN;
7615 }
7616 } else {
7617 /* force a reset of TC and queue layout configurations */
7618 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7619 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7620 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7621 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7622 }
7623 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7624
7625 i40e_fdir_sb_setup(pf);
7626
7627 /* Setup static PF queue filter control settings */
7628 ret = i40e_setup_pf_filter_control(pf);
7629 if (ret) {
7630 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7631 ret);
7632 /* Failure here should not stop continuing other steps */
7633 }
7634
7635 /* enable RSS in the HW, even for only one queue, as the stack can use
7636 * the hash
7637 */
7638 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7639 i40e_config_rss(pf);
7640
7641 /* fill in link information and enable LSE reporting */
7642 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7643 i40e_link_event(pf);
7644
7645 /* Initialize user-specific link properties */
7646 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7647 I40E_AQ_AN_COMPLETED) ? true : false);
7648 /* requested_mode is set in probe or by ethtool */
7649 if (!pf->fc_autoneg_status)
7650 goto no_autoneg;
7651
7652 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7653 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7654 pf->hw.fc.current_mode = I40E_FC_FULL;
7655 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7656 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7657 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7658 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7659 else
7660 pf->hw.fc.current_mode = I40E_FC_NONE;
7661
7662 /* sync the flow control settings with the auto-neg values */
7663 switch (pf->hw.fc.current_mode) {
7664 case I40E_FC_FULL:
7665 txfc = 1;
7666 rxfc = 1;
7667 break;
7668 case I40E_FC_TX_PAUSE:
7669 txfc = 1;
7670 rxfc = 0;
7671 break;
7672 case I40E_FC_RX_PAUSE:
7673 txfc = 0;
7674 rxfc = 1;
7675 break;
7676 case I40E_FC_NONE:
7677 case I40E_FC_DEFAULT:
7678 txfc = 0;
7679 rxfc = 0;
7680 break;
7681 case I40E_FC_PFC:
7682 /* TBD */
7683 break;
7684 /* no default case, we have to handle all possibilities here */
7685 }
7686
7687 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7688
7689 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7690 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7691 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7692
7693 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7694
7695 goto fc_complete;
7696
7697 no_autoneg:
7698 /* disable L2 flow control, user can turn it on if they wish */
7699 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7700 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7701 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7702
7703 fc_complete:
7704 i40e_ptp_init(pf);
7705
7706 return ret;
7707 }
7708
7709 /**
7710 * i40e_determine_queue_usage - Work out queue distribution
7711 * @pf: board private structure
7712 **/
7713 static void i40e_determine_queue_usage(struct i40e_pf *pf)
7714 {
7715 int queues_left;
7716
7717 pf->num_lan_qps = 0;
7718
7719 /* Find the max queues to be put into basic use. We'll always be
7720 * using TC0, whether or not DCB is running, and TC0 will get the
7721 * big RSS set.
7722 */
7723 queues_left = pf->hw.func_caps.num_tx_qp;
7724
7725 if ((queues_left == 1) ||
7726 !(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7727 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7728 I40E_FLAG_DCB_ENABLED))) {
7729 /* one qp for PF, no queues for anything else */
7730 queues_left = 0;
7731 pf->rss_size = pf->num_lan_qps = 1;
7732
7733 /* make sure all the fancies are disabled */
7734 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7735 I40E_FLAG_FD_SB_ENABLED |
7736 I40E_FLAG_FD_ATR_ENABLED |
7737 I40E_FLAG_DCB_ENABLED |
7738 I40E_FLAG_SRIOV_ENABLED |
7739 I40E_FLAG_VMDQ_ENABLED);
7740 } else {
7741 /* Not enough queues for all TCs */
7742 if ((pf->flags & I40E_FLAG_DCB_ENABLED) &&
7743 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7744 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7745 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7746 }
7747 pf->num_lan_qps = pf->rss_size_max;
7748 queues_left -= pf->num_lan_qps;
7749 }
7750
7751 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7752 if (queues_left > 1) {
7753 queues_left -= 1; /* save 1 queue for FD */
7754 } else {
7755 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7756 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
7757 }
7758 }
7759
7760 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7761 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7762 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
7763 (queues_left / pf->num_vf_qps));
7764 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7765 }
7766
7767 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7768 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7769 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7770 (queues_left / pf->num_vmdq_qps));
7771 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7772 }
7773
7774 pf->queues_left = queues_left;
7775 return;
7776 }
7777
7778 /**
7779 * i40e_setup_pf_filter_control - Setup PF static filter control
7780 * @pf: PF to be setup
7781 *
7782 * i40e_setup_pf_filter_control sets up a pf's initial filter control
7783 * settings. If PE/FCoE are enabled then it will also set the per PF
7784 * based filter sizes required for them. It also enables Flow director,
7785 * ethertype and macvlan type filter settings for the pf.
7786 *
7787 * Returns 0 on success, negative on failure
7788 **/
7789 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
7790 {
7791 struct i40e_filter_control_settings *settings = &pf->filter_settings;
7792
7793 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
7794
7795 /* Flow Director is enabled */
7796 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
7797 settings->enable_fdir = true;
7798
7799 /* Ethtype and MACVLAN filters enabled for PF */
7800 settings->enable_ethtype = true;
7801 settings->enable_macvlan = true;
7802
7803 if (i40e_set_filter_control(&pf->hw, settings))
7804 return -ENOENT;
7805
7806 return 0;
7807 }
7808
7809 /**
7810 * i40e_probe - Device initialization routine
7811 * @pdev: PCI device information struct
7812 * @ent: entry in i40e_pci_tbl
7813 *
7814 * i40e_probe initializes a pf identified by a pci_dev structure.
7815 * The OS initialization, configuring of the pf private structure,
7816 * and a hardware reset occur.
7817 *
7818 * Returns 0 on success, negative on failure
7819 **/
7820 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7821 {
7822 struct i40e_driver_version dv;
7823 struct i40e_pf *pf;
7824 struct i40e_hw *hw;
7825 static u16 pfs_found;
7826 u16 link_status;
7827 int err = 0;
7828 u32 len;
7829
7830 err = pci_enable_device_mem(pdev);
7831 if (err)
7832 return err;
7833
7834 /* set up for high or low dma */
7835 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7836 /* coherent mask for the same size will always succeed if
7837 * dma_set_mask does
7838 */
7839 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
7840 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
7841 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7842 } else {
7843 dev_err(&pdev->dev, "DMA configuration failed: %d\n", err);
7844 err = -EIO;
7845 goto err_dma;
7846 }
7847
7848 /* set up pci connections */
7849 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7850 IORESOURCE_MEM), i40e_driver_name);
7851 if (err) {
7852 dev_info(&pdev->dev,
7853 "pci_request_selected_regions failed %d\n", err);
7854 goto err_pci_reg;
7855 }
7856
7857 pci_enable_pcie_error_reporting(pdev);
7858 pci_set_master(pdev);
7859
7860 /* Now that we have a PCI connection, we need to do the
7861 * low level device setup. This is primarily setting up
7862 * the Admin Queue structures and then querying for the
7863 * device's current profile information.
7864 */
7865 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
7866 if (!pf) {
7867 err = -ENOMEM;
7868 goto err_pf_alloc;
7869 }
7870 pf->next_vsi = 0;
7871 pf->pdev = pdev;
7872 set_bit(__I40E_DOWN, &pf->state);
7873
7874 hw = &pf->hw;
7875 hw->back = pf;
7876 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7877 pci_resource_len(pdev, 0));
7878 if (!hw->hw_addr) {
7879 err = -EIO;
7880 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
7881 (unsigned int)pci_resource_start(pdev, 0),
7882 (unsigned int)pci_resource_len(pdev, 0), err);
7883 goto err_ioremap;
7884 }
7885 hw->vendor_id = pdev->vendor;
7886 hw->device_id = pdev->device;
7887 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
7888 hw->subsystem_vendor_id = pdev->subsystem_vendor;
7889 hw->subsystem_device_id = pdev->subsystem_device;
7890 hw->bus.device = PCI_SLOT(pdev->devfn);
7891 hw->bus.func = PCI_FUNC(pdev->devfn);
7892 pf->instance = pfs_found;
7893
7894 /* do a special CORER for clearing PXE mode once at init */
7895 if (hw->revision_id == 0 &&
7896 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
7897 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
7898 i40e_flush(hw);
7899 msleep(200);
7900 pf->corer_count++;
7901
7902 i40e_clear_pxe_mode(hw);
7903 }
7904
7905 /* Reset here to make sure all is clean and to define PF 'n' */
7906 err = i40e_pf_reset(hw);
7907 if (err) {
7908 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
7909 goto err_pf_reset;
7910 }
7911 pf->pfr_count++;
7912
7913 hw->aq.num_arq_entries = I40E_AQ_LEN;
7914 hw->aq.num_asq_entries = I40E_AQ_LEN;
7915 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7916 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7917 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
7918 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
7919 "%s-pf%d:misc",
7920 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
7921
7922 err = i40e_init_shared_code(hw);
7923 if (err) {
7924 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
7925 goto err_pf_reset;
7926 }
7927
7928 /* set up a default setting for link flow control */
7929 pf->hw.fc.requested_mode = I40E_FC_NONE;
7930
7931 err = i40e_init_adminq(hw);
7932 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
7933 if (((hw->nvm.version & I40E_NVM_VERSION_HI_MASK)
7934 >> I40E_NVM_VERSION_HI_SHIFT) != I40E_CURRENT_NVM_VERSION_HI) {
7935 dev_info(&pdev->dev,
7936 "warning: NVM version not supported, supported version: %02x.%02x\n",
7937 I40E_CURRENT_NVM_VERSION_HI,
7938 I40E_CURRENT_NVM_VERSION_LO);
7939 }
7940 if (err) {
7941 dev_info(&pdev->dev,
7942 "init_adminq failed: %d expecting API %02x.%02x\n",
7943 err,
7944 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
7945 goto err_pf_reset;
7946 }
7947
7948 i40e_clear_pxe_mode(hw);
7949 err = i40e_get_capabilities(pf);
7950 if (err)
7951 goto err_adminq_setup;
7952
7953 err = i40e_sw_init(pf);
7954 if (err) {
7955 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
7956 goto err_sw_init;
7957 }
7958
7959 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7960 hw->func_caps.num_rx_qp,
7961 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7962 if (err) {
7963 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
7964 goto err_init_lan_hmc;
7965 }
7966
7967 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7968 if (err) {
7969 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
7970 err = -ENOENT;
7971 goto err_configure_lan_hmc;
7972 }
7973
7974 i40e_get_mac_addr(hw, hw->mac.addr);
7975 if (!is_valid_ether_addr(hw->mac.addr)) {
7976 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
7977 err = -EIO;
7978 goto err_mac_addr;
7979 }
7980 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
7981 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
7982
7983 pci_set_drvdata(pdev, pf);
7984 pci_save_state(pdev);
7985 #ifdef CONFIG_I40E_DCB
7986 err = i40e_init_pf_dcb(pf);
7987 if (err) {
7988 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
7989 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7990 goto err_init_dcb;
7991 }
7992 #endif /* CONFIG_I40E_DCB */
7993
7994 /* set up periodic task facility */
7995 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
7996 pf->service_timer_period = HZ;
7997
7998 INIT_WORK(&pf->service_task, i40e_service_task);
7999 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8000 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8001 pf->link_check_timeout = jiffies;
8002
8003 /* WoL defaults to disabled */
8004 pf->wol_en = false;
8005 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8006
8007 /* set up the main switch operations */
8008 i40e_determine_queue_usage(pf);
8009 i40e_init_interrupt_scheme(pf);
8010
8011 /* Set up the *vsi struct based on the number of VSIs in the HW,
8012 * and set up our local tracking of the MAIN PF vsi.
8013 */
8014 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
8015 pf->vsi = kzalloc(len, GFP_KERNEL);
8016 if (!pf->vsi) {
8017 err = -ENOMEM;
8018 goto err_switch_setup;
8019 }
8020
8021 err = i40e_setup_pf_switch(pf, false);
8022 if (err) {
8023 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8024 goto err_vsis;
8025 }
8026
8027 /* The main driver is (mostly) up and happy. We need to set this state
8028 * before setting up the misc vector or we get a race and the vector
8029 * ends up disabled forever.
8030 */
8031 clear_bit(__I40E_DOWN, &pf->state);
8032
8033 /* In case of MSIX we are going to setup the misc vector right here
8034 * to handle admin queue events etc. In case of legacy and MSI
8035 * the misc functionality and queue processing is combined in
8036 * the same vector and that gets setup at open.
8037 */
8038 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8039 err = i40e_setup_misc_vector(pf);
8040 if (err) {
8041 dev_info(&pdev->dev,
8042 "setup of misc vector failed: %d\n", err);
8043 goto err_vsis;
8044 }
8045 }
8046
8047 /* prep for VF support */
8048 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8049 (pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8050 u32 val;
8051
8052 /* disable link interrupts for VFs */
8053 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8054 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8055 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8056 i40e_flush(hw);
8057
8058 if (pci_num_vf(pdev)) {
8059 dev_info(&pdev->dev,
8060 "Active VFs found, allocating resources.\n");
8061 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8062 if (err)
8063 dev_info(&pdev->dev,
8064 "Error %d allocating resources for existing VFs\n",
8065 err);
8066 }
8067 }
8068
8069 pfs_found++;
8070
8071 i40e_dbg_pf_init(pf);
8072
8073 /* tell the firmware that we're starting */
8074 dv.major_version = DRV_VERSION_MAJOR;
8075 dv.minor_version = DRV_VERSION_MINOR;
8076 dv.build_version = DRV_VERSION_BUILD;
8077 dv.subbuild_version = 0;
8078 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8079
8080 /* since everything's happy, start the service_task timer */
8081 mod_timer(&pf->service_timer,
8082 round_jiffies(jiffies + pf->service_timer_period));
8083
8084 /* Get the negotiated link width and speed from PCI config space */
8085 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8086
8087 i40e_set_pci_config_data(hw, link_status);
8088
8089 dev_info(&pdev->dev, "PCI Express: %s %s\n",
8090 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8091 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8092 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8093 "Unknown"),
8094 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8095 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8096 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8097 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8098 "Unknown"));
8099
8100 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8101 hw->bus.speed < i40e_bus_speed_8000) {
8102 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8103 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8104 }
8105
8106 return 0;
8107
8108 /* Unwind what we've done if something failed in the setup */
8109 err_vsis:
8110 set_bit(__I40E_DOWN, &pf->state);
8111 i40e_clear_interrupt_scheme(pf);
8112 kfree(pf->vsi);
8113 err_switch_setup:
8114 i40e_reset_interrupt_capability(pf);
8115 del_timer_sync(&pf->service_timer);
8116 #ifdef CONFIG_I40E_DCB
8117 err_init_dcb:
8118 #endif /* CONFIG_I40E_DCB */
8119 err_mac_addr:
8120 err_configure_lan_hmc:
8121 (void)i40e_shutdown_lan_hmc(hw);
8122 err_init_lan_hmc:
8123 kfree(pf->qp_pile);
8124 kfree(pf->irq_pile);
8125 err_sw_init:
8126 err_adminq_setup:
8127 (void)i40e_shutdown_adminq(hw);
8128 err_pf_reset:
8129 iounmap(hw->hw_addr);
8130 err_ioremap:
8131 kfree(pf);
8132 err_pf_alloc:
8133 pci_disable_pcie_error_reporting(pdev);
8134 pci_release_selected_regions(pdev,
8135 pci_select_bars(pdev, IORESOURCE_MEM));
8136 err_pci_reg:
8137 err_dma:
8138 pci_disable_device(pdev);
8139 return err;
8140 }
8141
8142 /**
8143 * i40e_remove - Device removal routine
8144 * @pdev: PCI device information struct
8145 *
8146 * i40e_remove is called by the PCI subsystem to alert the driver
8147 * that is should release a PCI device. This could be caused by a
8148 * Hot-Plug event, or because the driver is going to be removed from
8149 * memory.
8150 **/
8151 static void i40e_remove(struct pci_dev *pdev)
8152 {
8153 struct i40e_pf *pf = pci_get_drvdata(pdev);
8154 i40e_status ret_code;
8155 u32 reg;
8156 int i;
8157
8158 i40e_dbg_pf_exit(pf);
8159
8160 i40e_ptp_stop(pf);
8161
8162 /* no more scheduling of any task */
8163 set_bit(__I40E_DOWN, &pf->state);
8164 del_timer_sync(&pf->service_timer);
8165 cancel_work_sync(&pf->service_task);
8166
8167 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8168 i40e_free_vfs(pf);
8169 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8170 }
8171
8172 i40e_fdir_teardown(pf);
8173
8174 /* If there is a switch structure or any orphans, remove them.
8175 * This will leave only the PF's VSI remaining.
8176 */
8177 for (i = 0; i < I40E_MAX_VEB; i++) {
8178 if (!pf->veb[i])
8179 continue;
8180
8181 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8182 pf->veb[i]->uplink_seid == 0)
8183 i40e_switch_branch_release(pf->veb[i]);
8184 }
8185
8186 /* Now we can shutdown the PF's VSI, just before we kill
8187 * adminq and hmc.
8188 */
8189 if (pf->vsi[pf->lan_vsi])
8190 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8191
8192 i40e_stop_misc_vector(pf);
8193 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8194 synchronize_irq(pf->msix_entries[0].vector);
8195 free_irq(pf->msix_entries[0].vector, pf);
8196 }
8197
8198 /* shutdown and destroy the HMC */
8199 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8200 if (ret_code)
8201 dev_warn(&pdev->dev,
8202 "Failed to destroy the HMC resources: %d\n", ret_code);
8203
8204 /* shutdown the adminq */
8205 ret_code = i40e_shutdown_adminq(&pf->hw);
8206 if (ret_code)
8207 dev_warn(&pdev->dev,
8208 "Failed to destroy the Admin Queue resources: %d\n",
8209 ret_code);
8210
8211 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8212 i40e_clear_interrupt_scheme(pf);
8213 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
8214 if (pf->vsi[i]) {
8215 i40e_vsi_clear_rings(pf->vsi[i]);
8216 i40e_vsi_clear(pf->vsi[i]);
8217 pf->vsi[i] = NULL;
8218 }
8219 }
8220
8221 for (i = 0; i < I40E_MAX_VEB; i++) {
8222 kfree(pf->veb[i]);
8223 pf->veb[i] = NULL;
8224 }
8225
8226 kfree(pf->qp_pile);
8227 kfree(pf->irq_pile);
8228 kfree(pf->sw_config);
8229 kfree(pf->vsi);
8230
8231 /* force a PF reset to clean anything leftover */
8232 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8233 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8234 i40e_flush(&pf->hw);
8235
8236 iounmap(pf->hw.hw_addr);
8237 kfree(pf);
8238 pci_release_selected_regions(pdev,
8239 pci_select_bars(pdev, IORESOURCE_MEM));
8240
8241 pci_disable_pcie_error_reporting(pdev);
8242 pci_disable_device(pdev);
8243 }
8244
8245 /**
8246 * i40e_pci_error_detected - warning that something funky happened in PCI land
8247 * @pdev: PCI device information struct
8248 *
8249 * Called to warn that something happened and the error handling steps
8250 * are in progress. Allows the driver to quiesce things, be ready for
8251 * remediation.
8252 **/
8253 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8254 enum pci_channel_state error)
8255 {
8256 struct i40e_pf *pf = pci_get_drvdata(pdev);
8257
8258 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8259
8260 /* shutdown all operations */
8261 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8262 rtnl_lock();
8263 i40e_prep_for_reset(pf);
8264 rtnl_unlock();
8265 }
8266
8267 /* Request a slot reset */
8268 return PCI_ERS_RESULT_NEED_RESET;
8269 }
8270
8271 /**
8272 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8273 * @pdev: PCI device information struct
8274 *
8275 * Called to find if the driver can work with the device now that
8276 * the pci slot has been reset. If a basic connection seems good
8277 * (registers are readable and have sane content) then return a
8278 * happy little PCI_ERS_RESULT_xxx.
8279 **/
8280 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8281 {
8282 struct i40e_pf *pf = pci_get_drvdata(pdev);
8283 pci_ers_result_t result;
8284 int err;
8285 u32 reg;
8286
8287 dev_info(&pdev->dev, "%s\n", __func__);
8288 if (pci_enable_device_mem(pdev)) {
8289 dev_info(&pdev->dev,
8290 "Cannot re-enable PCI device after reset.\n");
8291 result = PCI_ERS_RESULT_DISCONNECT;
8292 } else {
8293 pci_set_master(pdev);
8294 pci_restore_state(pdev);
8295 pci_save_state(pdev);
8296 pci_wake_from_d3(pdev, false);
8297
8298 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8299 if (reg == 0)
8300 result = PCI_ERS_RESULT_RECOVERED;
8301 else
8302 result = PCI_ERS_RESULT_DISCONNECT;
8303 }
8304
8305 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8306 if (err) {
8307 dev_info(&pdev->dev,
8308 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8309 err);
8310 /* non-fatal, continue */
8311 }
8312
8313 return result;
8314 }
8315
8316 /**
8317 * i40e_pci_error_resume - restart operations after PCI error recovery
8318 * @pdev: PCI device information struct
8319 *
8320 * Called to allow the driver to bring things back up after PCI error
8321 * and/or reset recovery has finished.
8322 **/
8323 static void i40e_pci_error_resume(struct pci_dev *pdev)
8324 {
8325 struct i40e_pf *pf = pci_get_drvdata(pdev);
8326
8327 dev_info(&pdev->dev, "%s\n", __func__);
8328 if (test_bit(__I40E_SUSPENDED, &pf->state))
8329 return;
8330
8331 rtnl_lock();
8332 i40e_handle_reset_warning(pf);
8333 rtnl_lock();
8334 }
8335
8336 /**
8337 * i40e_shutdown - PCI callback for shutting down
8338 * @pdev: PCI device information struct
8339 **/
8340 static void i40e_shutdown(struct pci_dev *pdev)
8341 {
8342 struct i40e_pf *pf = pci_get_drvdata(pdev);
8343 struct i40e_hw *hw = &pf->hw;
8344
8345 set_bit(__I40E_SUSPENDED, &pf->state);
8346 set_bit(__I40E_DOWN, &pf->state);
8347 rtnl_lock();
8348 i40e_prep_for_reset(pf);
8349 rtnl_unlock();
8350
8351 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8352 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8353
8354 if (system_state == SYSTEM_POWER_OFF) {
8355 pci_wake_from_d3(pdev, pf->wol_en);
8356 pci_set_power_state(pdev, PCI_D3hot);
8357 }
8358 }
8359
8360 #ifdef CONFIG_PM
8361 /**
8362 * i40e_suspend - PCI callback for moving to D3
8363 * @pdev: PCI device information struct
8364 **/
8365 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8366 {
8367 struct i40e_pf *pf = pci_get_drvdata(pdev);
8368 struct i40e_hw *hw = &pf->hw;
8369
8370 set_bit(__I40E_SUSPENDED, &pf->state);
8371 set_bit(__I40E_DOWN, &pf->state);
8372 rtnl_lock();
8373 i40e_prep_for_reset(pf);
8374 rtnl_unlock();
8375
8376 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8377 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8378
8379 pci_wake_from_d3(pdev, pf->wol_en);
8380 pci_set_power_state(pdev, PCI_D3hot);
8381
8382 return 0;
8383 }
8384
8385 /**
8386 * i40e_resume - PCI callback for waking up from D3
8387 * @pdev: PCI device information struct
8388 **/
8389 static int i40e_resume(struct pci_dev *pdev)
8390 {
8391 struct i40e_pf *pf = pci_get_drvdata(pdev);
8392 u32 err;
8393
8394 pci_set_power_state(pdev, PCI_D0);
8395 pci_restore_state(pdev);
8396 /* pci_restore_state() clears dev->state_saves, so
8397 * call pci_save_state() again to restore it.
8398 */
8399 pci_save_state(pdev);
8400
8401 err = pci_enable_device_mem(pdev);
8402 if (err) {
8403 dev_err(&pdev->dev,
8404 "%s: Cannot enable PCI device from suspend\n",
8405 __func__);
8406 return err;
8407 }
8408 pci_set_master(pdev);
8409
8410 /* no wakeup events while running */
8411 pci_wake_from_d3(pdev, false);
8412
8413 /* handling the reset will rebuild the device state */
8414 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8415 clear_bit(__I40E_DOWN, &pf->state);
8416 rtnl_lock();
8417 i40e_reset_and_rebuild(pf, false);
8418 rtnl_unlock();
8419 }
8420
8421 return 0;
8422 }
8423
8424 #endif
8425 static const struct pci_error_handlers i40e_err_handler = {
8426 .error_detected = i40e_pci_error_detected,
8427 .slot_reset = i40e_pci_error_slot_reset,
8428 .resume = i40e_pci_error_resume,
8429 };
8430
8431 static struct pci_driver i40e_driver = {
8432 .name = i40e_driver_name,
8433 .id_table = i40e_pci_tbl,
8434 .probe = i40e_probe,
8435 .remove = i40e_remove,
8436 #ifdef CONFIG_PM
8437 .suspend = i40e_suspend,
8438 .resume = i40e_resume,
8439 #endif
8440 .shutdown = i40e_shutdown,
8441 .err_handler = &i40e_err_handler,
8442 .sriov_configure = i40e_pci_sriov_configure,
8443 };
8444
8445 /**
8446 * i40e_init_module - Driver registration routine
8447 *
8448 * i40e_init_module is the first routine called when the driver is
8449 * loaded. All it does is register with the PCI subsystem.
8450 **/
8451 static int __init i40e_init_module(void)
8452 {
8453 pr_info("%s: %s - version %s\n", i40e_driver_name,
8454 i40e_driver_string, i40e_driver_version_str);
8455 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8456 i40e_dbg_init();
8457 return pci_register_driver(&i40e_driver);
8458 }
8459 module_init(i40e_init_module);
8460
8461 /**
8462 * i40e_exit_module - Driver exit cleanup routine
8463 *
8464 * i40e_exit_module is called just before the driver is removed
8465 * from memory.
8466 **/
8467 static void __exit i40e_exit_module(void)
8468 {
8469 pci_unregister_driver(&i40e_driver);
8470 i40e_dbg_exit();
8471 }
8472 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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