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[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28 /* Local includes */
29 #include "i40e.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 0
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 25
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58
59 /* i40e_pci_tbl - PCI Device ID Table
60 *
61 * Last entry must be all 0s
62 *
63 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
64 * Class, Class Mask, private data (not used) }
65 */
66 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
67 {PCI_VDEVICE(INTEL, I40E_SFP_XL710_DEVICE_ID), 0},
68 {PCI_VDEVICE(INTEL, I40E_SFP_X710_DEVICE_ID), 0},
69 {PCI_VDEVICE(INTEL, I40E_QEMU_DEVICE_ID), 0},
70 {PCI_VDEVICE(INTEL, I40E_KX_A_DEVICE_ID), 0},
71 {PCI_VDEVICE(INTEL, I40E_KX_B_DEVICE_ID), 0},
72 {PCI_VDEVICE(INTEL, I40E_KX_C_DEVICE_ID), 0},
73 {PCI_VDEVICE(INTEL, I40E_KX_D_DEVICE_ID), 0},
74 {PCI_VDEVICE(INTEL, I40E_QSFP_A_DEVICE_ID), 0},
75 {PCI_VDEVICE(INTEL, I40E_QSFP_B_DEVICE_ID), 0},
76 {PCI_VDEVICE(INTEL, I40E_QSFP_C_DEVICE_ID), 0},
77 /* required last entry */
78 {0, }
79 };
80 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
81
82 #define I40E_MAX_VF_COUNT 128
83 static int debug = -1;
84 module_param(debug, int, 0);
85 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
86
87 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
88 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
91
92 /**
93 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
94 * @hw: pointer to the HW structure
95 * @mem: ptr to mem struct to fill out
96 * @size: size of memory requested
97 * @alignment: what to align the allocation to
98 **/
99 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
100 u64 size, u32 alignment)
101 {
102 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
103
104 mem->size = ALIGN(size, alignment);
105 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
106 &mem->pa, GFP_KERNEL);
107 if (!mem->va)
108 return -ENOMEM;
109
110 return 0;
111 }
112
113 /**
114 * i40e_free_dma_mem_d - OS specific memory free for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to free
117 **/
118 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
119 {
120 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
121
122 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
123 mem->va = NULL;
124 mem->pa = 0;
125 mem->size = 0;
126
127 return 0;
128 }
129
130 /**
131 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to fill out
134 * @size: size of memory requested
135 **/
136 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
137 u32 size)
138 {
139 mem->size = size;
140 mem->va = kzalloc(size, GFP_KERNEL);
141
142 if (!mem->va)
143 return -ENOMEM;
144
145 return 0;
146 }
147
148 /**
149 * i40e_free_virt_mem_d - OS specific memory free for shared code
150 * @hw: pointer to the HW structure
151 * @mem: ptr to mem struct to free
152 **/
153 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
154 {
155 /* it's ok to kfree a NULL pointer */
156 kfree(mem->va);
157 mem->va = NULL;
158 mem->size = 0;
159
160 return 0;
161 }
162
163 /**
164 * i40e_get_lump - find a lump of free generic resource
165 * @pf: board private structure
166 * @pile: the pile of resource to search
167 * @needed: the number of items needed
168 * @id: an owner id to stick on the items assigned
169 *
170 * Returns the base item index of the lump, or negative for error
171 *
172 * The search_hint trick and lack of advanced fit-finding only work
173 * because we're highly likely to have all the same size lump requests.
174 * Linear search time and any fragmentation should be minimal.
175 **/
176 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
177 u16 needed, u16 id)
178 {
179 int ret = -ENOMEM;
180 int i, j;
181
182 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
183 dev_info(&pf->pdev->dev,
184 "param err: pile=%p needed=%d id=0x%04x\n",
185 pile, needed, id);
186 return -EINVAL;
187 }
188
189 /* start the linear search with an imperfect hint */
190 i = pile->search_hint;
191 while (i < pile->num_entries) {
192 /* skip already allocated entries */
193 if (pile->list[i] & I40E_PILE_VALID_BIT) {
194 i++;
195 continue;
196 }
197
198 /* do we have enough in this lump? */
199 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
200 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
201 break;
202 }
203
204 if (j == needed) {
205 /* there was enough, so assign it to the requestor */
206 for (j = 0; j < needed; j++)
207 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
208 ret = i;
209 pile->search_hint = i + j;
210 break;
211 } else {
212 /* not enough, so skip over it and continue looking */
213 i += j;
214 }
215 }
216
217 return ret;
218 }
219
220 /**
221 * i40e_put_lump - return a lump of generic resource
222 * @pile: the pile of resource to search
223 * @index: the base item index
224 * @id: the owner id of the items assigned
225 *
226 * Returns the count of items in the lump
227 **/
228 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
229 {
230 int valid_id = (id | I40E_PILE_VALID_BIT);
231 int count = 0;
232 int i;
233
234 if (!pile || index >= pile->num_entries)
235 return -EINVAL;
236
237 for (i = index;
238 i < pile->num_entries && pile->list[i] == valid_id;
239 i++) {
240 pile->list[i] = 0;
241 count++;
242 }
243
244 if (count && index < pile->search_hint)
245 pile->search_hint = index;
246
247 return count;
248 }
249
250 /**
251 * i40e_service_event_schedule - Schedule the service task to wake up
252 * @pf: board private structure
253 *
254 * If not already scheduled, this puts the task into the work queue
255 **/
256 static void i40e_service_event_schedule(struct i40e_pf *pf)
257 {
258 if (!test_bit(__I40E_DOWN, &pf->state) &&
259 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
260 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
261 schedule_work(&pf->service_task);
262 }
263
264 /**
265 * i40e_tx_timeout - Respond to a Tx Hang
266 * @netdev: network interface device structure
267 *
268 * If any port has noticed a Tx timeout, it is likely that the whole
269 * device is munged, not just the one netdev port, so go for the full
270 * reset.
271 **/
272 static void i40e_tx_timeout(struct net_device *netdev)
273 {
274 struct i40e_netdev_priv *np = netdev_priv(netdev);
275 struct i40e_vsi *vsi = np->vsi;
276 struct i40e_pf *pf = vsi->back;
277
278 pf->tx_timeout_count++;
279
280 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
281 pf->tx_timeout_recovery_level = 0;
282 pf->tx_timeout_last_recovery = jiffies;
283 netdev_info(netdev, "tx_timeout recovery level %d\n",
284 pf->tx_timeout_recovery_level);
285
286 switch (pf->tx_timeout_recovery_level) {
287 case 0:
288 /* disable and re-enable queues for the VSI */
289 if (in_interrupt()) {
290 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
291 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
292 } else {
293 i40e_vsi_reinit_locked(vsi);
294 }
295 break;
296 case 1:
297 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
298 break;
299 case 2:
300 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
301 break;
302 case 3:
303 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
304 break;
305 default:
306 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
307 i40e_down(vsi);
308 break;
309 }
310 i40e_service_event_schedule(pf);
311 pf->tx_timeout_recovery_level++;
312 }
313
314 /**
315 * i40e_release_rx_desc - Store the new tail and head values
316 * @rx_ring: ring to bump
317 * @val: new head index
318 **/
319 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
320 {
321 rx_ring->next_to_use = val;
322
323 /* Force memory writes to complete before letting h/w
324 * know there are new descriptors to fetch. (Only
325 * applicable for weak-ordered memory model archs,
326 * such as IA-64).
327 */
328 wmb();
329 writel(val, rx_ring->tail);
330 }
331
332 /**
333 * i40e_get_vsi_stats_struct - Get System Network Statistics
334 * @vsi: the VSI we care about
335 *
336 * Returns the address of the device statistics structure.
337 * The statistics are actually updated from the service task.
338 **/
339 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
340 {
341 return &vsi->net_stats;
342 }
343
344 /**
345 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
346 * @netdev: network interface device structure
347 *
348 * Returns the address of the device statistics structure.
349 * The statistics are actually updated from the service task.
350 **/
351 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
352 struct net_device *netdev,
353 struct rtnl_link_stats64 *stats)
354 {
355 struct i40e_netdev_priv *np = netdev_priv(netdev);
356 struct i40e_vsi *vsi = np->vsi;
357 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
358 int i;
359
360
361 if (test_bit(__I40E_DOWN, &vsi->state))
362 return stats;
363
364 if (!vsi->tx_rings)
365 return stats;
366
367 rcu_read_lock();
368 for (i = 0; i < vsi->num_queue_pairs; i++) {
369 struct i40e_ring *tx_ring, *rx_ring;
370 u64 bytes, packets;
371 unsigned int start;
372
373 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
374 if (!tx_ring)
375 continue;
376
377 do {
378 start = u64_stats_fetch_begin_bh(&tx_ring->syncp);
379 packets = tx_ring->stats.packets;
380 bytes = tx_ring->stats.bytes;
381 } while (u64_stats_fetch_retry_bh(&tx_ring->syncp, start));
382
383 stats->tx_packets += packets;
384 stats->tx_bytes += bytes;
385 rx_ring = &tx_ring[1];
386
387 do {
388 start = u64_stats_fetch_begin_bh(&rx_ring->syncp);
389 packets = rx_ring->stats.packets;
390 bytes = rx_ring->stats.bytes;
391 } while (u64_stats_fetch_retry_bh(&rx_ring->syncp, start));
392
393 stats->rx_packets += packets;
394 stats->rx_bytes += bytes;
395 }
396 rcu_read_unlock();
397
398 /* following stats updated by ixgbe_watchdog_task() */
399 stats->multicast = vsi_stats->multicast;
400 stats->tx_errors = vsi_stats->tx_errors;
401 stats->tx_dropped = vsi_stats->tx_dropped;
402 stats->rx_errors = vsi_stats->rx_errors;
403 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
404 stats->rx_length_errors = vsi_stats->rx_length_errors;
405
406 return stats;
407 }
408
409 /**
410 * i40e_vsi_reset_stats - Resets all stats of the given vsi
411 * @vsi: the VSI to have its stats reset
412 **/
413 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
414 {
415 struct rtnl_link_stats64 *ns;
416 int i;
417
418 if (!vsi)
419 return;
420
421 ns = i40e_get_vsi_stats_struct(vsi);
422 memset(ns, 0, sizeof(*ns));
423 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
424 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
425 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
426 if (vsi->rx_rings)
427 for (i = 0; i < vsi->num_queue_pairs; i++) {
428 memset(&vsi->rx_rings[i]->stats, 0 ,
429 sizeof(vsi->rx_rings[i]->stats));
430 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
431 sizeof(vsi->rx_rings[i]->rx_stats));
432 memset(&vsi->tx_rings[i]->stats, 0 ,
433 sizeof(vsi->tx_rings[i]->stats));
434 memset(&vsi->tx_rings[i]->tx_stats, 0,
435 sizeof(vsi->tx_rings[i]->tx_stats));
436 }
437 vsi->stat_offsets_loaded = false;
438 }
439
440 /**
441 * i40e_pf_reset_stats - Reset all of the stats for the given pf
442 * @pf: the PF to be reset
443 **/
444 void i40e_pf_reset_stats(struct i40e_pf *pf)
445 {
446 memset(&pf->stats, 0, sizeof(pf->stats));
447 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
448 pf->stat_offsets_loaded = false;
449 }
450
451 /**
452 * i40e_stat_update48 - read and update a 48 bit stat from the chip
453 * @hw: ptr to the hardware info
454 * @hireg: the high 32 bit reg to read
455 * @loreg: the low 32 bit reg to read
456 * @offset_loaded: has the initial offset been loaded yet
457 * @offset: ptr to current offset value
458 * @stat: ptr to the stat
459 *
460 * Since the device stats are not reset at PFReset, they likely will not
461 * be zeroed when the driver starts. We'll save the first values read
462 * and use them as offsets to be subtracted from the raw values in order
463 * to report stats that count from zero. In the process, we also manage
464 * the potential roll-over.
465 **/
466 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
467 bool offset_loaded, u64 *offset, u64 *stat)
468 {
469 u64 new_data;
470
471 if (hw->device_id == I40E_QEMU_DEVICE_ID) {
472 new_data = rd32(hw, loreg);
473 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
474 } else {
475 new_data = rd64(hw, loreg);
476 }
477 if (!offset_loaded)
478 *offset = new_data;
479 if (likely(new_data >= *offset))
480 *stat = new_data - *offset;
481 else
482 *stat = (new_data + ((u64)1 << 48)) - *offset;
483 *stat &= 0xFFFFFFFFFFFFULL;
484 }
485
486 /**
487 * i40e_stat_update32 - read and update a 32 bit stat from the chip
488 * @hw: ptr to the hardware info
489 * @reg: the hw reg to read
490 * @offset_loaded: has the initial offset been loaded yet
491 * @offset: ptr to current offset value
492 * @stat: ptr to the stat
493 **/
494 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
495 bool offset_loaded, u64 *offset, u64 *stat)
496 {
497 u32 new_data;
498
499 new_data = rd32(hw, reg);
500 if (!offset_loaded)
501 *offset = new_data;
502 if (likely(new_data >= *offset))
503 *stat = (u32)(new_data - *offset);
504 else
505 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
506 }
507
508 /**
509 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
510 * @vsi: the VSI to be updated
511 **/
512 void i40e_update_eth_stats(struct i40e_vsi *vsi)
513 {
514 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
515 struct i40e_pf *pf = vsi->back;
516 struct i40e_hw *hw = &pf->hw;
517 struct i40e_eth_stats *oes;
518 struct i40e_eth_stats *es; /* device's eth stats */
519
520 es = &vsi->eth_stats;
521 oes = &vsi->eth_stats_offsets;
522
523 /* Gather up the stats that the hw collects */
524 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
525 vsi->stat_offsets_loaded,
526 &oes->tx_errors, &es->tx_errors);
527 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
528 vsi->stat_offsets_loaded,
529 &oes->rx_discards, &es->rx_discards);
530
531 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
532 I40E_GLV_GORCL(stat_idx),
533 vsi->stat_offsets_loaded,
534 &oes->rx_bytes, &es->rx_bytes);
535 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
536 I40E_GLV_UPRCL(stat_idx),
537 vsi->stat_offsets_loaded,
538 &oes->rx_unicast, &es->rx_unicast);
539 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
540 I40E_GLV_MPRCL(stat_idx),
541 vsi->stat_offsets_loaded,
542 &oes->rx_multicast, &es->rx_multicast);
543 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
544 I40E_GLV_BPRCL(stat_idx),
545 vsi->stat_offsets_loaded,
546 &oes->rx_broadcast, &es->rx_broadcast);
547
548 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
549 I40E_GLV_GOTCL(stat_idx),
550 vsi->stat_offsets_loaded,
551 &oes->tx_bytes, &es->tx_bytes);
552 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
553 I40E_GLV_UPTCL(stat_idx),
554 vsi->stat_offsets_loaded,
555 &oes->tx_unicast, &es->tx_unicast);
556 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
557 I40E_GLV_MPTCL(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_multicast, &es->tx_multicast);
560 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
561 I40E_GLV_BPTCL(stat_idx),
562 vsi->stat_offsets_loaded,
563 &oes->tx_broadcast, &es->tx_broadcast);
564 vsi->stat_offsets_loaded = true;
565 }
566
567 /**
568 * i40e_update_veb_stats - Update Switch component statistics
569 * @veb: the VEB being updated
570 **/
571 static void i40e_update_veb_stats(struct i40e_veb *veb)
572 {
573 struct i40e_pf *pf = veb->pf;
574 struct i40e_hw *hw = &pf->hw;
575 struct i40e_eth_stats *oes;
576 struct i40e_eth_stats *es; /* device's eth stats */
577 int idx = 0;
578
579 idx = veb->stats_idx;
580 es = &veb->stats;
581 oes = &veb->stats_offsets;
582
583 /* Gather up the stats that the hw collects */
584 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
585 veb->stat_offsets_loaded,
586 &oes->tx_discards, &es->tx_discards);
587 if (hw->revision_id > 0)
588 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
589 veb->stat_offsets_loaded,
590 &oes->rx_unknown_protocol,
591 &es->rx_unknown_protocol);
592 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
593 veb->stat_offsets_loaded,
594 &oes->rx_bytes, &es->rx_bytes);
595 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
596 veb->stat_offsets_loaded,
597 &oes->rx_unicast, &es->rx_unicast);
598 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
599 veb->stat_offsets_loaded,
600 &oes->rx_multicast, &es->rx_multicast);
601 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
602 veb->stat_offsets_loaded,
603 &oes->rx_broadcast, &es->rx_broadcast);
604
605 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
606 veb->stat_offsets_loaded,
607 &oes->tx_bytes, &es->tx_bytes);
608 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
609 veb->stat_offsets_loaded,
610 &oes->tx_unicast, &es->tx_unicast);
611 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->tx_multicast, &es->tx_multicast);
614 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_broadcast, &es->tx_broadcast);
617 veb->stat_offsets_loaded = true;
618 }
619
620 /**
621 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
622 * @pf: the corresponding PF
623 *
624 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
625 **/
626 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
627 {
628 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
629 struct i40e_hw_port_stats *nsd = &pf->stats;
630 struct i40e_hw *hw = &pf->hw;
631 u64 xoff = 0;
632 u16 i, v;
633
634 if ((hw->fc.current_mode != I40E_FC_FULL) &&
635 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
636 return;
637
638 xoff = nsd->link_xoff_rx;
639 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
640 pf->stat_offsets_loaded,
641 &osd->link_xoff_rx, &nsd->link_xoff_rx);
642
643 /* No new LFC xoff rx */
644 if (!(nsd->link_xoff_rx - xoff))
645 return;
646
647 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
648 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
649 struct i40e_vsi *vsi = pf->vsi[v];
650
651 if (!vsi)
652 continue;
653
654 for (i = 0; i < vsi->num_queue_pairs; i++) {
655 struct i40e_ring *ring = vsi->tx_rings[i];
656 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
657 }
658 }
659 }
660
661 /**
662 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
663 * @pf: the corresponding PF
664 *
665 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
666 **/
667 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
668 {
669 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
670 struct i40e_hw_port_stats *nsd = &pf->stats;
671 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
672 struct i40e_dcbx_config *dcb_cfg;
673 struct i40e_hw *hw = &pf->hw;
674 u16 i, v;
675 u8 tc;
676
677 dcb_cfg = &hw->local_dcbx_config;
678
679 /* See if DCB enabled with PFC TC */
680 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
681 !(dcb_cfg->pfc.pfcenable)) {
682 i40e_update_link_xoff_rx(pf);
683 return;
684 }
685
686 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
687 u64 prio_xoff = nsd->priority_xoff_rx[i];
688 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
689 pf->stat_offsets_loaded,
690 &osd->priority_xoff_rx[i],
691 &nsd->priority_xoff_rx[i]);
692
693 /* No new PFC xoff rx */
694 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
695 continue;
696 /* Get the TC for given priority */
697 tc = dcb_cfg->etscfg.prioritytable[i];
698 xoff[tc] = true;
699 }
700
701 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
702 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
703 struct i40e_vsi *vsi = pf->vsi[v];
704
705 if (!vsi)
706 continue;
707
708 for (i = 0; i < vsi->num_queue_pairs; i++) {
709 struct i40e_ring *ring = vsi->tx_rings[i];
710
711 tc = ring->dcb_tc;
712 if (xoff[tc])
713 clear_bit(__I40E_HANG_CHECK_ARMED,
714 &ring->state);
715 }
716 }
717 }
718
719 /**
720 * i40e_update_stats - Update the board statistics counters.
721 * @vsi: the VSI to be updated
722 *
723 * There are a few instances where we store the same stat in a
724 * couple of different structs. This is partly because we have
725 * the netdev stats that need to be filled out, which is slightly
726 * different from the "eth_stats" defined by the chip and used in
727 * VF communications. We sort it all out here in a central place.
728 **/
729 void i40e_update_stats(struct i40e_vsi *vsi)
730 {
731 struct i40e_pf *pf = vsi->back;
732 struct i40e_hw *hw = &pf->hw;
733 struct rtnl_link_stats64 *ons;
734 struct rtnl_link_stats64 *ns; /* netdev stats */
735 struct i40e_eth_stats *oes;
736 struct i40e_eth_stats *es; /* device's eth stats */
737 u32 tx_restart, tx_busy;
738 u32 rx_page, rx_buf;
739 u64 rx_p, rx_b;
740 u64 tx_p, tx_b;
741 int i;
742 u16 q;
743
744 if (test_bit(__I40E_DOWN, &vsi->state) ||
745 test_bit(__I40E_CONFIG_BUSY, &pf->state))
746 return;
747
748 ns = i40e_get_vsi_stats_struct(vsi);
749 ons = &vsi->net_stats_offsets;
750 es = &vsi->eth_stats;
751 oes = &vsi->eth_stats_offsets;
752
753 /* Gather up the netdev and vsi stats that the driver collects
754 * on the fly during packet processing
755 */
756 rx_b = rx_p = 0;
757 tx_b = tx_p = 0;
758 tx_restart = tx_busy = 0;
759 rx_page = 0;
760 rx_buf = 0;
761 rcu_read_lock();
762 for (q = 0; q < vsi->num_queue_pairs; q++) {
763 struct i40e_ring *p;
764 u64 bytes, packets;
765 unsigned int start;
766
767 /* locate Tx ring */
768 p = ACCESS_ONCE(vsi->tx_rings[q]);
769
770 do {
771 start = u64_stats_fetch_begin_bh(&p->syncp);
772 packets = p->stats.packets;
773 bytes = p->stats.bytes;
774 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
775 tx_b += bytes;
776 tx_p += packets;
777 tx_restart += p->tx_stats.restart_queue;
778 tx_busy += p->tx_stats.tx_busy;
779
780 /* Rx queue is part of the same block as Tx queue */
781 p = &p[1];
782 do {
783 start = u64_stats_fetch_begin_bh(&p->syncp);
784 packets = p->stats.packets;
785 bytes = p->stats.bytes;
786 } while (u64_stats_fetch_retry_bh(&p->syncp, start));
787 rx_b += bytes;
788 rx_p += packets;
789 rx_buf += p->rx_stats.alloc_rx_buff_failed;
790 rx_page += p->rx_stats.alloc_rx_page_failed;
791 }
792 rcu_read_unlock();
793 vsi->tx_restart = tx_restart;
794 vsi->tx_busy = tx_busy;
795 vsi->rx_page_failed = rx_page;
796 vsi->rx_buf_failed = rx_buf;
797
798 ns->rx_packets = rx_p;
799 ns->rx_bytes = rx_b;
800 ns->tx_packets = tx_p;
801 ns->tx_bytes = tx_b;
802
803 i40e_update_eth_stats(vsi);
804 /* update netdev stats from eth stats */
805 ons->rx_errors = oes->rx_errors;
806 ns->rx_errors = es->rx_errors;
807 ons->tx_errors = oes->tx_errors;
808 ns->tx_errors = es->tx_errors;
809 ons->multicast = oes->rx_multicast;
810 ns->multicast = es->rx_multicast;
811 ons->tx_dropped = oes->tx_discards;
812 ns->tx_dropped = es->tx_discards;
813
814 /* Get the port data only if this is the main PF VSI */
815 if (vsi == pf->vsi[pf->lan_vsi]) {
816 struct i40e_hw_port_stats *nsd = &pf->stats;
817 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
818
819 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
820 I40E_GLPRT_GORCL(hw->port),
821 pf->stat_offsets_loaded,
822 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
823 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
824 I40E_GLPRT_GOTCL(hw->port),
825 pf->stat_offsets_loaded,
826 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
827 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
828 pf->stat_offsets_loaded,
829 &osd->eth.rx_discards,
830 &nsd->eth.rx_discards);
831 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
832 pf->stat_offsets_loaded,
833 &osd->eth.tx_discards,
834 &nsd->eth.tx_discards);
835 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
836 I40E_GLPRT_MPRCL(hw->port),
837 pf->stat_offsets_loaded,
838 &osd->eth.rx_multicast,
839 &nsd->eth.rx_multicast);
840
841 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
842 pf->stat_offsets_loaded,
843 &osd->tx_dropped_link_down,
844 &nsd->tx_dropped_link_down);
845
846 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
847 pf->stat_offsets_loaded,
848 &osd->crc_errors, &nsd->crc_errors);
849 ns->rx_crc_errors = nsd->crc_errors;
850
851 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
852 pf->stat_offsets_loaded,
853 &osd->illegal_bytes, &nsd->illegal_bytes);
854 ns->rx_errors = nsd->crc_errors
855 + nsd->illegal_bytes;
856
857 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
858 pf->stat_offsets_loaded,
859 &osd->mac_local_faults,
860 &nsd->mac_local_faults);
861 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
862 pf->stat_offsets_loaded,
863 &osd->mac_remote_faults,
864 &nsd->mac_remote_faults);
865
866 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
867 pf->stat_offsets_loaded,
868 &osd->rx_length_errors,
869 &nsd->rx_length_errors);
870 ns->rx_length_errors = nsd->rx_length_errors;
871
872 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
873 pf->stat_offsets_loaded,
874 &osd->link_xon_rx, &nsd->link_xon_rx);
875 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
876 pf->stat_offsets_loaded,
877 &osd->link_xon_tx, &nsd->link_xon_tx);
878 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
879 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->link_xoff_tx, &nsd->link_xoff_tx);
882
883 for (i = 0; i < 8; i++) {
884 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
885 pf->stat_offsets_loaded,
886 &osd->priority_xon_rx[i],
887 &nsd->priority_xon_rx[i]);
888 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
889 pf->stat_offsets_loaded,
890 &osd->priority_xon_tx[i],
891 &nsd->priority_xon_tx[i]);
892 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
893 pf->stat_offsets_loaded,
894 &osd->priority_xoff_tx[i],
895 &nsd->priority_xoff_tx[i]);
896 i40e_stat_update32(hw,
897 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
898 pf->stat_offsets_loaded,
899 &osd->priority_xon_2_xoff[i],
900 &nsd->priority_xon_2_xoff[i]);
901 }
902
903 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
904 I40E_GLPRT_PRC64L(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->rx_size_64, &nsd->rx_size_64);
907 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
908 I40E_GLPRT_PRC127L(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->rx_size_127, &nsd->rx_size_127);
911 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
912 I40E_GLPRT_PRC255L(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->rx_size_255, &nsd->rx_size_255);
915 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
916 I40E_GLPRT_PRC511L(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->rx_size_511, &nsd->rx_size_511);
919 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
920 I40E_GLPRT_PRC1023L(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->rx_size_1023, &nsd->rx_size_1023);
923 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
924 I40E_GLPRT_PRC1522L(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->rx_size_1522, &nsd->rx_size_1522);
927 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
928 I40E_GLPRT_PRC9522L(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->rx_size_big, &nsd->rx_size_big);
931
932 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
933 I40E_GLPRT_PTC64L(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->tx_size_64, &nsd->tx_size_64);
936 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
937 I40E_GLPRT_PTC127L(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->tx_size_127, &nsd->tx_size_127);
940 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
941 I40E_GLPRT_PTC255L(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->tx_size_255, &nsd->tx_size_255);
944 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
945 I40E_GLPRT_PTC511L(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->tx_size_511, &nsd->tx_size_511);
948 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
949 I40E_GLPRT_PTC1023L(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->tx_size_1023, &nsd->tx_size_1023);
952 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
953 I40E_GLPRT_PTC1522L(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_size_1522, &nsd->tx_size_1522);
956 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
957 I40E_GLPRT_PTC9522L(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->tx_size_big, &nsd->tx_size_big);
960
961 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->rx_undersize, &nsd->rx_undersize);
964 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
965 pf->stat_offsets_loaded,
966 &osd->rx_fragments, &nsd->rx_fragments);
967 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
968 pf->stat_offsets_loaded,
969 &osd->rx_oversize, &nsd->rx_oversize);
970 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_jabber, &nsd->rx_jabber);
973 }
974
975 pf->stat_offsets_loaded = true;
976 }
977
978 /**
979 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
980 * @vsi: the VSI to be searched
981 * @macaddr: the MAC address
982 * @vlan: the vlan
983 * @is_vf: make sure its a vf filter, else doesn't matter
984 * @is_netdev: make sure its a netdev filter, else doesn't matter
985 *
986 * Returns ptr to the filter object or NULL
987 **/
988 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
989 u8 *macaddr, s16 vlan,
990 bool is_vf, bool is_netdev)
991 {
992 struct i40e_mac_filter *f;
993
994 if (!vsi || !macaddr)
995 return NULL;
996
997 list_for_each_entry(f, &vsi->mac_filter_list, list) {
998 if ((ether_addr_equal(macaddr, f->macaddr)) &&
999 (vlan == f->vlan) &&
1000 (!is_vf || f->is_vf) &&
1001 (!is_netdev || f->is_netdev))
1002 return f;
1003 }
1004 return NULL;
1005 }
1006
1007 /**
1008 * i40e_find_mac - Find a mac addr in the macvlan filters list
1009 * @vsi: the VSI to be searched
1010 * @macaddr: the MAC address we are searching for
1011 * @is_vf: make sure its a vf filter, else doesn't matter
1012 * @is_netdev: make sure its a netdev filter, else doesn't matter
1013 *
1014 * Returns the first filter with the provided MAC address or NULL if
1015 * MAC address was not found
1016 **/
1017 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1018 bool is_vf, bool is_netdev)
1019 {
1020 struct i40e_mac_filter *f;
1021
1022 if (!vsi || !macaddr)
1023 return NULL;
1024
1025 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1026 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1027 (!is_vf || f->is_vf) &&
1028 (!is_netdev || f->is_netdev))
1029 return f;
1030 }
1031 return NULL;
1032 }
1033
1034 /**
1035 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1036 * @vsi: the VSI to be searched
1037 *
1038 * Returns true if VSI is in vlan mode or false otherwise
1039 **/
1040 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1041 {
1042 struct i40e_mac_filter *f;
1043
1044 /* Only -1 for all the filters denotes not in vlan mode
1045 * so we have to go through all the list in order to make sure
1046 */
1047 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1048 if (f->vlan >= 0)
1049 return true;
1050 }
1051
1052 return false;
1053 }
1054
1055 /**
1056 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1057 * @vsi: the VSI to be searched
1058 * @macaddr: the mac address to be filtered
1059 * @is_vf: true if it is a vf
1060 * @is_netdev: true if it is a netdev
1061 *
1062 * Goes through all the macvlan filters and adds a
1063 * macvlan filter for each unique vlan that already exists
1064 *
1065 * Returns first filter found on success, else NULL
1066 **/
1067 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1068 bool is_vf, bool is_netdev)
1069 {
1070 struct i40e_mac_filter *f;
1071
1072 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1073 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1074 is_vf, is_netdev)) {
1075 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1076 is_vf, is_netdev))
1077 return NULL;
1078 }
1079 }
1080
1081 return list_first_entry_or_null(&vsi->mac_filter_list,
1082 struct i40e_mac_filter, list);
1083 }
1084
1085 /**
1086 * i40e_add_filter - Add a mac/vlan filter to the VSI
1087 * @vsi: the VSI to be searched
1088 * @macaddr: the MAC address
1089 * @vlan: the vlan
1090 * @is_vf: make sure its a vf filter, else doesn't matter
1091 * @is_netdev: make sure its a netdev filter, else doesn't matter
1092 *
1093 * Returns ptr to the filter object or NULL when no memory available.
1094 **/
1095 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1096 u8 *macaddr, s16 vlan,
1097 bool is_vf, bool is_netdev)
1098 {
1099 struct i40e_mac_filter *f;
1100
1101 if (!vsi || !macaddr)
1102 return NULL;
1103
1104 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1105 if (!f) {
1106 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1107 if (!f)
1108 goto add_filter_out;
1109
1110 memcpy(f->macaddr, macaddr, ETH_ALEN);
1111 f->vlan = vlan;
1112 f->changed = true;
1113
1114 INIT_LIST_HEAD(&f->list);
1115 list_add(&f->list, &vsi->mac_filter_list);
1116 }
1117
1118 /* increment counter and add a new flag if needed */
1119 if (is_vf) {
1120 if (!f->is_vf) {
1121 f->is_vf = true;
1122 f->counter++;
1123 }
1124 } else if (is_netdev) {
1125 if (!f->is_netdev) {
1126 f->is_netdev = true;
1127 f->counter++;
1128 }
1129 } else {
1130 f->counter++;
1131 }
1132
1133 /* changed tells sync_filters_subtask to
1134 * push the filter down to the firmware
1135 */
1136 if (f->changed) {
1137 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1138 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1139 }
1140
1141 add_filter_out:
1142 return f;
1143 }
1144
1145 /**
1146 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1147 * @vsi: the VSI to be searched
1148 * @macaddr: the MAC address
1149 * @vlan: the vlan
1150 * @is_vf: make sure it's a vf filter, else doesn't matter
1151 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1152 **/
1153 void i40e_del_filter(struct i40e_vsi *vsi,
1154 u8 *macaddr, s16 vlan,
1155 bool is_vf, bool is_netdev)
1156 {
1157 struct i40e_mac_filter *f;
1158
1159 if (!vsi || !macaddr)
1160 return;
1161
1162 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1163 if (!f || f->counter == 0)
1164 return;
1165
1166 if (is_vf) {
1167 if (f->is_vf) {
1168 f->is_vf = false;
1169 f->counter--;
1170 }
1171 } else if (is_netdev) {
1172 if (f->is_netdev) {
1173 f->is_netdev = false;
1174 f->counter--;
1175 }
1176 } else {
1177 /* make sure we don't remove a filter in use by vf or netdev */
1178 int min_f = 0;
1179 min_f += (f->is_vf ? 1 : 0);
1180 min_f += (f->is_netdev ? 1 : 0);
1181
1182 if (f->counter > min_f)
1183 f->counter--;
1184 }
1185
1186 /* counter == 0 tells sync_filters_subtask to
1187 * remove the filter from the firmware's list
1188 */
1189 if (f->counter == 0) {
1190 f->changed = true;
1191 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1192 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1193 }
1194 }
1195
1196 /**
1197 * i40e_set_mac - NDO callback to set mac address
1198 * @netdev: network interface device structure
1199 * @p: pointer to an address structure
1200 *
1201 * Returns 0 on success, negative on failure
1202 **/
1203 static int i40e_set_mac(struct net_device *netdev, void *p)
1204 {
1205 struct i40e_netdev_priv *np = netdev_priv(netdev);
1206 struct i40e_vsi *vsi = np->vsi;
1207 struct sockaddr *addr = p;
1208 struct i40e_mac_filter *f;
1209
1210 if (!is_valid_ether_addr(addr->sa_data))
1211 return -EADDRNOTAVAIL;
1212
1213 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1214
1215 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1216 return 0;
1217
1218 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1219 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1220 return -EADDRNOTAVAIL;
1221
1222 if (vsi->type == I40E_VSI_MAIN) {
1223 i40e_status ret;
1224 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1225 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1226 addr->sa_data, NULL);
1227 if (ret) {
1228 netdev_info(netdev,
1229 "Addr change for Main VSI failed: %d\n",
1230 ret);
1231 return -EADDRNOTAVAIL;
1232 }
1233
1234 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1235 }
1236
1237 /* In order to be sure to not drop any packets, add the new address
1238 * then delete the old one.
1239 */
1240 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1241 if (!f)
1242 return -ENOMEM;
1243
1244 i40e_sync_vsi_filters(vsi);
1245 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1246 i40e_sync_vsi_filters(vsi);
1247
1248 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1249
1250 return 0;
1251 }
1252
1253 /**
1254 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1255 * @vsi: the VSI being setup
1256 * @ctxt: VSI context structure
1257 * @enabled_tc: Enabled TCs bitmap
1258 * @is_add: True if called before Add VSI
1259 *
1260 * Setup VSI queue mapping for enabled traffic classes.
1261 **/
1262 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1263 struct i40e_vsi_context *ctxt,
1264 u8 enabled_tc,
1265 bool is_add)
1266 {
1267 struct i40e_pf *pf = vsi->back;
1268 u16 sections = 0;
1269 u8 netdev_tc = 0;
1270 u16 numtc = 0;
1271 u16 qcount;
1272 u8 offset;
1273 u16 qmap;
1274 int i;
1275
1276 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1277 offset = 0;
1278
1279 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1280 /* Find numtc from enabled TC bitmap */
1281 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1282 if (enabled_tc & (1 << i)) /* TC is enabled */
1283 numtc++;
1284 }
1285 if (!numtc) {
1286 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1287 numtc = 1;
1288 }
1289 } else {
1290 /* At least TC0 is enabled in case of non-DCB case */
1291 numtc = 1;
1292 }
1293
1294 vsi->tc_config.numtc = numtc;
1295 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1296
1297 /* Setup queue offset/count for all TCs for given VSI */
1298 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1299 /* See if the given TC is enabled for the given VSI */
1300 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1301 int pow, num_qps;
1302
1303 vsi->tc_config.tc_info[i].qoffset = offset;
1304 switch (vsi->type) {
1305 case I40E_VSI_MAIN:
1306 if (i == 0)
1307 qcount = pf->rss_size;
1308 else
1309 qcount = pf->num_tc_qps;
1310 vsi->tc_config.tc_info[i].qcount = qcount;
1311 break;
1312 case I40E_VSI_FDIR:
1313 case I40E_VSI_SRIOV:
1314 case I40E_VSI_VMDQ2:
1315 default:
1316 qcount = vsi->alloc_queue_pairs;
1317 vsi->tc_config.tc_info[i].qcount = qcount;
1318 WARN_ON(i != 0);
1319 break;
1320 }
1321
1322 /* find the power-of-2 of the number of queue pairs */
1323 num_qps = vsi->tc_config.tc_info[i].qcount;
1324 pow = 0;
1325 while (num_qps &&
1326 ((1 << pow) < vsi->tc_config.tc_info[i].qcount)) {
1327 pow++;
1328 num_qps >>= 1;
1329 }
1330
1331 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1332 qmap =
1333 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1334 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1335
1336 offset += vsi->tc_config.tc_info[i].qcount;
1337 } else {
1338 /* TC is not enabled so set the offset to
1339 * default queue and allocate one queue
1340 * for the given TC.
1341 */
1342 vsi->tc_config.tc_info[i].qoffset = 0;
1343 vsi->tc_config.tc_info[i].qcount = 1;
1344 vsi->tc_config.tc_info[i].netdev_tc = 0;
1345
1346 qmap = 0;
1347 }
1348 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1349 }
1350
1351 /* Set actual Tx/Rx queue pairs */
1352 vsi->num_queue_pairs = offset;
1353
1354 /* Scheduler section valid can only be set for ADD VSI */
1355 if (is_add) {
1356 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1357
1358 ctxt->info.up_enable_bits = enabled_tc;
1359 }
1360 if (vsi->type == I40E_VSI_SRIOV) {
1361 ctxt->info.mapping_flags |=
1362 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1363 for (i = 0; i < vsi->num_queue_pairs; i++)
1364 ctxt->info.queue_mapping[i] =
1365 cpu_to_le16(vsi->base_queue + i);
1366 } else {
1367 ctxt->info.mapping_flags |=
1368 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1369 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1370 }
1371 ctxt->info.valid_sections |= cpu_to_le16(sections);
1372 }
1373
1374 /**
1375 * i40e_set_rx_mode - NDO callback to set the netdev filters
1376 * @netdev: network interface device structure
1377 **/
1378 static void i40e_set_rx_mode(struct net_device *netdev)
1379 {
1380 struct i40e_netdev_priv *np = netdev_priv(netdev);
1381 struct i40e_mac_filter *f, *ftmp;
1382 struct i40e_vsi *vsi = np->vsi;
1383 struct netdev_hw_addr *uca;
1384 struct netdev_hw_addr *mca;
1385 struct netdev_hw_addr *ha;
1386
1387 /* add addr if not already in the filter list */
1388 netdev_for_each_uc_addr(uca, netdev) {
1389 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1390 if (i40e_is_vsi_in_vlan(vsi))
1391 i40e_put_mac_in_vlan(vsi, uca->addr,
1392 false, true);
1393 else
1394 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1395 false, true);
1396 }
1397 }
1398
1399 netdev_for_each_mc_addr(mca, netdev) {
1400 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1401 if (i40e_is_vsi_in_vlan(vsi))
1402 i40e_put_mac_in_vlan(vsi, mca->addr,
1403 false, true);
1404 else
1405 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1406 false, true);
1407 }
1408 }
1409
1410 /* remove filter if not in netdev list */
1411 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1412 bool found = false;
1413
1414 if (!f->is_netdev)
1415 continue;
1416
1417 if (is_multicast_ether_addr(f->macaddr)) {
1418 netdev_for_each_mc_addr(mca, netdev) {
1419 if (ether_addr_equal(mca->addr, f->macaddr)) {
1420 found = true;
1421 break;
1422 }
1423 }
1424 } else {
1425 netdev_for_each_uc_addr(uca, netdev) {
1426 if (ether_addr_equal(uca->addr, f->macaddr)) {
1427 found = true;
1428 break;
1429 }
1430 }
1431
1432 for_each_dev_addr(netdev, ha) {
1433 if (ether_addr_equal(ha->addr, f->macaddr)) {
1434 found = true;
1435 break;
1436 }
1437 }
1438 }
1439 if (!found)
1440 i40e_del_filter(
1441 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1442 }
1443
1444 /* check for other flag changes */
1445 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1446 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1447 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1448 }
1449 }
1450
1451 /**
1452 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1453 * @vsi: ptr to the VSI
1454 *
1455 * Push any outstanding VSI filter changes through the AdminQ.
1456 *
1457 * Returns 0 or error value
1458 **/
1459 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1460 {
1461 struct i40e_mac_filter *f, *ftmp;
1462 bool promisc_forced_on = false;
1463 bool add_happened = false;
1464 int filter_list_len = 0;
1465 u32 changed_flags = 0;
1466 i40e_status aq_ret = 0;
1467 struct i40e_pf *pf;
1468 int num_add = 0;
1469 int num_del = 0;
1470 u16 cmd_flags;
1471
1472 /* empty array typed pointers, kcalloc later */
1473 struct i40e_aqc_add_macvlan_element_data *add_list;
1474 struct i40e_aqc_remove_macvlan_element_data *del_list;
1475
1476 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1477 usleep_range(1000, 2000);
1478 pf = vsi->back;
1479
1480 if (vsi->netdev) {
1481 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1482 vsi->current_netdev_flags = vsi->netdev->flags;
1483 }
1484
1485 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1486 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1487
1488 filter_list_len = pf->hw.aq.asq_buf_size /
1489 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1490 del_list = kcalloc(filter_list_len,
1491 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1492 GFP_KERNEL);
1493 if (!del_list)
1494 return -ENOMEM;
1495
1496 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1497 if (!f->changed)
1498 continue;
1499
1500 if (f->counter != 0)
1501 continue;
1502 f->changed = false;
1503 cmd_flags = 0;
1504
1505 /* add to delete list */
1506 memcpy(del_list[num_del].mac_addr,
1507 f->macaddr, ETH_ALEN);
1508 del_list[num_del].vlan_tag =
1509 cpu_to_le16((u16)(f->vlan ==
1510 I40E_VLAN_ANY ? 0 : f->vlan));
1511
1512 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1513 del_list[num_del].flags = cmd_flags;
1514 num_del++;
1515
1516 /* unlink from filter list */
1517 list_del(&f->list);
1518 kfree(f);
1519
1520 /* flush a full buffer */
1521 if (num_del == filter_list_len) {
1522 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1523 vsi->seid, del_list, num_del,
1524 NULL);
1525 num_del = 0;
1526 memset(del_list, 0, sizeof(*del_list));
1527
1528 if (aq_ret)
1529 dev_info(&pf->pdev->dev,
1530 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1531 aq_ret,
1532 pf->hw.aq.asq_last_status);
1533 }
1534 }
1535 if (num_del) {
1536 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1537 del_list, num_del, NULL);
1538 num_del = 0;
1539
1540 if (aq_ret)
1541 dev_info(&pf->pdev->dev,
1542 "ignoring delete macvlan error, err %d, aq_err %d\n",
1543 aq_ret, pf->hw.aq.asq_last_status);
1544 }
1545
1546 kfree(del_list);
1547 del_list = NULL;
1548
1549 /* do all the adds now */
1550 filter_list_len = pf->hw.aq.asq_buf_size /
1551 sizeof(struct i40e_aqc_add_macvlan_element_data),
1552 add_list = kcalloc(filter_list_len,
1553 sizeof(struct i40e_aqc_add_macvlan_element_data),
1554 GFP_KERNEL);
1555 if (!add_list)
1556 return -ENOMEM;
1557
1558 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1559 if (!f->changed)
1560 continue;
1561
1562 if (f->counter == 0)
1563 continue;
1564 f->changed = false;
1565 add_happened = true;
1566 cmd_flags = 0;
1567
1568 /* add to add array */
1569 memcpy(add_list[num_add].mac_addr,
1570 f->macaddr, ETH_ALEN);
1571 add_list[num_add].vlan_tag =
1572 cpu_to_le16(
1573 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1574 add_list[num_add].queue_number = 0;
1575
1576 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1577 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1578 num_add++;
1579
1580 /* flush a full buffer */
1581 if (num_add == filter_list_len) {
1582 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1583 add_list, num_add,
1584 NULL);
1585 num_add = 0;
1586
1587 if (aq_ret)
1588 break;
1589 memset(add_list, 0, sizeof(*add_list));
1590 }
1591 }
1592 if (num_add) {
1593 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1594 add_list, num_add, NULL);
1595 num_add = 0;
1596 }
1597 kfree(add_list);
1598 add_list = NULL;
1599
1600 if (add_happened && (!aq_ret)) {
1601 /* do nothing */;
1602 } else if (add_happened && (aq_ret)) {
1603 dev_info(&pf->pdev->dev,
1604 "add filter failed, err %d, aq_err %d\n",
1605 aq_ret, pf->hw.aq.asq_last_status);
1606 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1607 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1608 &vsi->state)) {
1609 promisc_forced_on = true;
1610 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1611 &vsi->state);
1612 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1613 }
1614 }
1615 }
1616
1617 /* check for changes in promiscuous modes */
1618 if (changed_flags & IFF_ALLMULTI) {
1619 bool cur_multipromisc;
1620 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1621 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1622 vsi->seid,
1623 cur_multipromisc,
1624 NULL);
1625 if (aq_ret)
1626 dev_info(&pf->pdev->dev,
1627 "set multi promisc failed, err %d, aq_err %d\n",
1628 aq_ret, pf->hw.aq.asq_last_status);
1629 }
1630 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1631 bool cur_promisc;
1632 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1633 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1634 &vsi->state));
1635 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1636 vsi->seid,
1637 cur_promisc, NULL);
1638 if (aq_ret)
1639 dev_info(&pf->pdev->dev,
1640 "set uni promisc failed, err %d, aq_err %d\n",
1641 aq_ret, pf->hw.aq.asq_last_status);
1642 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1643 vsi->seid,
1644 cur_promisc, NULL);
1645 if (aq_ret)
1646 dev_info(&pf->pdev->dev,
1647 "set brdcast promisc failed, err %d, aq_err %d\n",
1648 aq_ret, pf->hw.aq.asq_last_status);
1649 }
1650
1651 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1652 return 0;
1653 }
1654
1655 /**
1656 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1657 * @pf: board private structure
1658 **/
1659 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1660 {
1661 int v;
1662
1663 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1664 return;
1665 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1666
1667 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1668 if (pf->vsi[v] &&
1669 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1670 i40e_sync_vsi_filters(pf->vsi[v]);
1671 }
1672 }
1673
1674 /**
1675 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1676 * @netdev: network interface device structure
1677 * @new_mtu: new value for maximum frame size
1678 *
1679 * Returns 0 on success, negative on failure
1680 **/
1681 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1682 {
1683 struct i40e_netdev_priv *np = netdev_priv(netdev);
1684 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1685 struct i40e_vsi *vsi = np->vsi;
1686
1687 /* MTU < 68 is an error and causes problems on some kernels */
1688 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1689 return -EINVAL;
1690
1691 netdev_info(netdev, "changing MTU from %d to %d\n",
1692 netdev->mtu, new_mtu);
1693 netdev->mtu = new_mtu;
1694 if (netif_running(netdev))
1695 i40e_vsi_reinit_locked(vsi);
1696
1697 return 0;
1698 }
1699
1700 /**
1701 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1702 * @vsi: the vsi being adjusted
1703 **/
1704 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1705 {
1706 struct i40e_vsi_context ctxt;
1707 i40e_status ret;
1708
1709 if ((vsi->info.valid_sections &
1710 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1711 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1712 return; /* already enabled */
1713
1714 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1715 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1716 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1717
1718 ctxt.seid = vsi->seid;
1719 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1720 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1721 if (ret) {
1722 dev_info(&vsi->back->pdev->dev,
1723 "%s: update vsi failed, aq_err=%d\n",
1724 __func__, vsi->back->hw.aq.asq_last_status);
1725 }
1726 }
1727
1728 /**
1729 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1730 * @vsi: the vsi being adjusted
1731 **/
1732 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1733 {
1734 struct i40e_vsi_context ctxt;
1735 i40e_status ret;
1736
1737 if ((vsi->info.valid_sections &
1738 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1739 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1740 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1741 return; /* already disabled */
1742
1743 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1744 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1745 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1746
1747 ctxt.seid = vsi->seid;
1748 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1749 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1750 if (ret) {
1751 dev_info(&vsi->back->pdev->dev,
1752 "%s: update vsi failed, aq_err=%d\n",
1753 __func__, vsi->back->hw.aq.asq_last_status);
1754 }
1755 }
1756
1757 /**
1758 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1759 * @netdev: network interface to be adjusted
1760 * @features: netdev features to test if VLAN offload is enabled or not
1761 **/
1762 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1763 {
1764 struct i40e_netdev_priv *np = netdev_priv(netdev);
1765 struct i40e_vsi *vsi = np->vsi;
1766
1767 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1768 i40e_vlan_stripping_enable(vsi);
1769 else
1770 i40e_vlan_stripping_disable(vsi);
1771 }
1772
1773 /**
1774 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1775 * @vsi: the vsi being configured
1776 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1777 **/
1778 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1779 {
1780 struct i40e_mac_filter *f, *add_f;
1781 bool is_netdev, is_vf;
1782
1783 is_vf = (vsi->type == I40E_VSI_SRIOV);
1784 is_netdev = !!(vsi->netdev);
1785
1786 if (is_netdev) {
1787 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1788 is_vf, is_netdev);
1789 if (!add_f) {
1790 dev_info(&vsi->back->pdev->dev,
1791 "Could not add vlan filter %d for %pM\n",
1792 vid, vsi->netdev->dev_addr);
1793 return -ENOMEM;
1794 }
1795 }
1796
1797 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1798 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1799 if (!add_f) {
1800 dev_info(&vsi->back->pdev->dev,
1801 "Could not add vlan filter %d for %pM\n",
1802 vid, f->macaddr);
1803 return -ENOMEM;
1804 }
1805 }
1806
1807 /* Now if we add a vlan tag, make sure to check if it is the first
1808 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1809 * with 0, so we now accept untagged and specified tagged traffic
1810 * (and not any taged and untagged)
1811 */
1812 if (vid > 0) {
1813 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1814 I40E_VLAN_ANY,
1815 is_vf, is_netdev)) {
1816 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1817 I40E_VLAN_ANY, is_vf, is_netdev);
1818 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1819 is_vf, is_netdev);
1820 if (!add_f) {
1821 dev_info(&vsi->back->pdev->dev,
1822 "Could not add filter 0 for %pM\n",
1823 vsi->netdev->dev_addr);
1824 return -ENOMEM;
1825 }
1826 }
1827
1828 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1829 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1830 is_vf, is_netdev)) {
1831 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1832 is_vf, is_netdev);
1833 add_f = i40e_add_filter(vsi, f->macaddr,
1834 0, is_vf, is_netdev);
1835 if (!add_f) {
1836 dev_info(&vsi->back->pdev->dev,
1837 "Could not add filter 0 for %pM\n",
1838 f->macaddr);
1839 return -ENOMEM;
1840 }
1841 }
1842 }
1843 }
1844
1845 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1846 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1847 return 0;
1848
1849 return i40e_sync_vsi_filters(vsi);
1850 }
1851
1852 /**
1853 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1854 * @vsi: the vsi being configured
1855 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1856 *
1857 * Return: 0 on success or negative otherwise
1858 **/
1859 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1860 {
1861 struct net_device *netdev = vsi->netdev;
1862 struct i40e_mac_filter *f, *add_f;
1863 bool is_vf, is_netdev;
1864 int filter_count = 0;
1865
1866 is_vf = (vsi->type == I40E_VSI_SRIOV);
1867 is_netdev = !!(netdev);
1868
1869 if (is_netdev)
1870 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1871
1872 list_for_each_entry(f, &vsi->mac_filter_list, list)
1873 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1874
1875 /* go through all the filters for this VSI and if there is only
1876 * vid == 0 it means there are no other filters, so vid 0 must
1877 * be replaced with -1. This signifies that we should from now
1878 * on accept any traffic (with any tag present, or untagged)
1879 */
1880 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1881 if (is_netdev) {
1882 if (f->vlan &&
1883 ether_addr_equal(netdev->dev_addr, f->macaddr))
1884 filter_count++;
1885 }
1886
1887 if (f->vlan)
1888 filter_count++;
1889 }
1890
1891 if (!filter_count && is_netdev) {
1892 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1893 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1894 is_vf, is_netdev);
1895 if (!f) {
1896 dev_info(&vsi->back->pdev->dev,
1897 "Could not add filter %d for %pM\n",
1898 I40E_VLAN_ANY, netdev->dev_addr);
1899 return -ENOMEM;
1900 }
1901 }
1902
1903 if (!filter_count) {
1904 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1905 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1906 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1907 is_vf, is_netdev);
1908 if (!add_f) {
1909 dev_info(&vsi->back->pdev->dev,
1910 "Could not add filter %d for %pM\n",
1911 I40E_VLAN_ANY, f->macaddr);
1912 return -ENOMEM;
1913 }
1914 }
1915 }
1916
1917 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1918 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1919 return 0;
1920
1921 return i40e_sync_vsi_filters(vsi);
1922 }
1923
1924 /**
1925 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1926 * @netdev: network interface to be adjusted
1927 * @vid: vlan id to be added
1928 *
1929 * net_device_ops implementation for adding vlan ids
1930 **/
1931 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1932 __always_unused __be16 proto, u16 vid)
1933 {
1934 struct i40e_netdev_priv *np = netdev_priv(netdev);
1935 struct i40e_vsi *vsi = np->vsi;
1936 int ret = 0;
1937
1938 if (vid > 4095)
1939 return -EINVAL;
1940
1941 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1942
1943 /* If the network stack called us with vid = 0, we should
1944 * indicate to i40e_vsi_add_vlan() that we want to receive
1945 * any traffic (i.e. with any vlan tag, or untagged)
1946 */
1947 ret = i40e_vsi_add_vlan(vsi, vid ? vid : I40E_VLAN_ANY);
1948
1949 if (!ret && (vid < VLAN_N_VID))
1950 set_bit(vid, vsi->active_vlans);
1951
1952 return ret;
1953 }
1954
1955 /**
1956 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
1957 * @netdev: network interface to be adjusted
1958 * @vid: vlan id to be removed
1959 *
1960 * net_device_ops implementation for adding vlan ids
1961 **/
1962 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
1963 __always_unused __be16 proto, u16 vid)
1964 {
1965 struct i40e_netdev_priv *np = netdev_priv(netdev);
1966 struct i40e_vsi *vsi = np->vsi;
1967
1968 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
1969
1970 /* return code is ignored as there is nothing a user
1971 * can do about failure to remove and a log message was
1972 * already printed from the other function
1973 */
1974 i40e_vsi_kill_vlan(vsi, vid);
1975
1976 clear_bit(vid, vsi->active_vlans);
1977
1978 return 0;
1979 }
1980
1981 /**
1982 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
1983 * @vsi: the vsi being brought back up
1984 **/
1985 static void i40e_restore_vlan(struct i40e_vsi *vsi)
1986 {
1987 u16 vid;
1988
1989 if (!vsi->netdev)
1990 return;
1991
1992 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
1993
1994 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
1995 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
1996 vid);
1997 }
1998
1999 /**
2000 * i40e_vsi_add_pvid - Add pvid for the VSI
2001 * @vsi: the vsi being adjusted
2002 * @vid: the vlan id to set as a PVID
2003 **/
2004 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2005 {
2006 struct i40e_vsi_context ctxt;
2007 i40e_status aq_ret;
2008
2009 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2010 vsi->info.pvid = cpu_to_le16(vid);
2011 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2012 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2013 I40E_AQ_VSI_PVLAN_EMOD_STR;
2014
2015 ctxt.seid = vsi->seid;
2016 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2017 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2018 if (aq_ret) {
2019 dev_info(&vsi->back->pdev->dev,
2020 "%s: update vsi failed, aq_err=%d\n",
2021 __func__, vsi->back->hw.aq.asq_last_status);
2022 return -ENOENT;
2023 }
2024
2025 return 0;
2026 }
2027
2028 /**
2029 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2030 * @vsi: the vsi being adjusted
2031 *
2032 * Just use the vlan_rx_register() service to put it back to normal
2033 **/
2034 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2035 {
2036 i40e_vlan_stripping_disable(vsi);
2037
2038 vsi->info.pvid = 0;
2039 }
2040
2041 /**
2042 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2043 * @vsi: ptr to the VSI
2044 *
2045 * If this function returns with an error, then it's possible one or
2046 * more of the rings is populated (while the rest are not). It is the
2047 * callers duty to clean those orphaned rings.
2048 *
2049 * Return 0 on success, negative on failure
2050 **/
2051 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2052 {
2053 int i, err = 0;
2054
2055 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2056 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2057
2058 return err;
2059 }
2060
2061 /**
2062 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2063 * @vsi: ptr to the VSI
2064 *
2065 * Free VSI's transmit software resources
2066 **/
2067 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2068 {
2069 int i;
2070
2071 for (i = 0; i < vsi->num_queue_pairs; i++)
2072 if (vsi->tx_rings[i]->desc)
2073 i40e_free_tx_resources(vsi->tx_rings[i]);
2074 }
2075
2076 /**
2077 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2078 * @vsi: ptr to the VSI
2079 *
2080 * If this function returns with an error, then it's possible one or
2081 * more of the rings is populated (while the rest are not). It is the
2082 * callers duty to clean those orphaned rings.
2083 *
2084 * Return 0 on success, negative on failure
2085 **/
2086 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2087 {
2088 int i, err = 0;
2089
2090 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2091 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2092 return err;
2093 }
2094
2095 /**
2096 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2097 * @vsi: ptr to the VSI
2098 *
2099 * Free all receive software resources
2100 **/
2101 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2102 {
2103 int i;
2104
2105 for (i = 0; i < vsi->num_queue_pairs; i++)
2106 if (vsi->rx_rings[i]->desc)
2107 i40e_free_rx_resources(vsi->rx_rings[i]);
2108 }
2109
2110 /**
2111 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2112 * @ring: The Tx ring to configure
2113 *
2114 * Configure the Tx descriptor ring in the HMC context.
2115 **/
2116 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2117 {
2118 struct i40e_vsi *vsi = ring->vsi;
2119 u16 pf_q = vsi->base_queue + ring->queue_index;
2120 struct i40e_hw *hw = &vsi->back->hw;
2121 struct i40e_hmc_obj_txq tx_ctx;
2122 i40e_status err = 0;
2123 u32 qtx_ctl = 0;
2124
2125 /* some ATR related tx ring init */
2126 if (vsi->back->flags & I40E_FLAG_FDIR_ATR_ENABLED) {
2127 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2128 ring->atr_count = 0;
2129 } else {
2130 ring->atr_sample_rate = 0;
2131 }
2132
2133 /* initialize XPS */
2134 if (ring->q_vector && ring->netdev &&
2135 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2136 netif_set_xps_queue(ring->netdev,
2137 &ring->q_vector->affinity_mask,
2138 ring->queue_index);
2139
2140 /* clear the context structure first */
2141 memset(&tx_ctx, 0, sizeof(tx_ctx));
2142
2143 tx_ctx.new_context = 1;
2144 tx_ctx.base = (ring->dma / 128);
2145 tx_ctx.qlen = ring->count;
2146 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FDIR_ENABLED |
2147 I40E_FLAG_FDIR_ATR_ENABLED));
2148
2149 /* As part of VSI creation/update, FW allocates certain
2150 * Tx arbitration queue sets for each TC enabled for
2151 * the VSI. The FW returns the handles to these queue
2152 * sets as part of the response buffer to Add VSI,
2153 * Update VSI, etc. AQ commands. It is expected that
2154 * these queue set handles be associated with the Tx
2155 * queues by the driver as part of the TX queue context
2156 * initialization. This has to be done regardless of
2157 * DCB as by default everything is mapped to TC0.
2158 */
2159 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2160 tx_ctx.rdylist_act = 0;
2161
2162 /* clear the context in the HMC */
2163 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2164 if (err) {
2165 dev_info(&vsi->back->pdev->dev,
2166 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2167 ring->queue_index, pf_q, err);
2168 return -ENOMEM;
2169 }
2170
2171 /* set the context in the HMC */
2172 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2173 if (err) {
2174 dev_info(&vsi->back->pdev->dev,
2175 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2176 ring->queue_index, pf_q, err);
2177 return -ENOMEM;
2178 }
2179
2180 /* Now associate this queue with this PCI function */
2181 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2182 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2183 I40E_QTX_CTL_PF_INDX_MASK);
2184 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2185 i40e_flush(hw);
2186
2187 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2188
2189 /* cache tail off for easier writes later */
2190 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2191
2192 return 0;
2193 }
2194
2195 /**
2196 * i40e_configure_rx_ring - Configure a receive ring context
2197 * @ring: The Rx ring to configure
2198 *
2199 * Configure the Rx descriptor ring in the HMC context.
2200 **/
2201 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2202 {
2203 struct i40e_vsi *vsi = ring->vsi;
2204 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2205 u16 pf_q = vsi->base_queue + ring->queue_index;
2206 struct i40e_hw *hw = &vsi->back->hw;
2207 struct i40e_hmc_obj_rxq rx_ctx;
2208 i40e_status err = 0;
2209
2210 ring->state = 0;
2211
2212 /* clear the context structure first */
2213 memset(&rx_ctx, 0, sizeof(rx_ctx));
2214
2215 ring->rx_buf_len = vsi->rx_buf_len;
2216 ring->rx_hdr_len = vsi->rx_hdr_len;
2217
2218 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2219 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2220
2221 rx_ctx.base = (ring->dma / 128);
2222 rx_ctx.qlen = ring->count;
2223
2224 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2225 set_ring_16byte_desc_enabled(ring);
2226 rx_ctx.dsize = 0;
2227 } else {
2228 rx_ctx.dsize = 1;
2229 }
2230
2231 rx_ctx.dtype = vsi->dtype;
2232 if (vsi->dtype) {
2233 set_ring_ps_enabled(ring);
2234 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2235 I40E_RX_SPLIT_IP |
2236 I40E_RX_SPLIT_TCP_UDP |
2237 I40E_RX_SPLIT_SCTP;
2238 } else {
2239 rx_ctx.hsplit_0 = 0;
2240 }
2241
2242 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2243 (chain_len * ring->rx_buf_len));
2244 rx_ctx.tphrdesc_ena = 1;
2245 rx_ctx.tphwdesc_ena = 1;
2246 rx_ctx.tphdata_ena = 1;
2247 rx_ctx.tphhead_ena = 1;
2248 if (hw->revision_id == 0)
2249 rx_ctx.lrxqthresh = 0;
2250 else
2251 rx_ctx.lrxqthresh = 2;
2252 rx_ctx.crcstrip = 1;
2253 rx_ctx.l2tsel = 1;
2254 rx_ctx.showiv = 1;
2255
2256 /* clear the context in the HMC */
2257 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2258 if (err) {
2259 dev_info(&vsi->back->pdev->dev,
2260 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2261 ring->queue_index, pf_q, err);
2262 return -ENOMEM;
2263 }
2264
2265 /* set the context in the HMC */
2266 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2267 if (err) {
2268 dev_info(&vsi->back->pdev->dev,
2269 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2270 ring->queue_index, pf_q, err);
2271 return -ENOMEM;
2272 }
2273
2274 /* cache tail for quicker writes, and clear the reg before use */
2275 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2276 writel(0, ring->tail);
2277
2278 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2279
2280 return 0;
2281 }
2282
2283 /**
2284 * i40e_vsi_configure_tx - Configure the VSI for Tx
2285 * @vsi: VSI structure describing this set of rings and resources
2286 *
2287 * Configure the Tx VSI for operation.
2288 **/
2289 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2290 {
2291 int err = 0;
2292 u16 i;
2293
2294 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2295 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2296
2297 return err;
2298 }
2299
2300 /**
2301 * i40e_vsi_configure_rx - Configure the VSI for Rx
2302 * @vsi: the VSI being configured
2303 *
2304 * Configure the Rx VSI for operation.
2305 **/
2306 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2307 {
2308 int err = 0;
2309 u16 i;
2310
2311 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2312 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2313 + ETH_FCS_LEN + VLAN_HLEN;
2314 else
2315 vsi->max_frame = I40E_RXBUFFER_2048;
2316
2317 /* figure out correct receive buffer length */
2318 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2319 I40E_FLAG_RX_PS_ENABLED)) {
2320 case I40E_FLAG_RX_1BUF_ENABLED:
2321 vsi->rx_hdr_len = 0;
2322 vsi->rx_buf_len = vsi->max_frame;
2323 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2324 break;
2325 case I40E_FLAG_RX_PS_ENABLED:
2326 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2327 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2328 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2329 break;
2330 default:
2331 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2332 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2333 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2334 break;
2335 }
2336
2337 /* round up for the chip's needs */
2338 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2339 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2340 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2341 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2342
2343 /* set up individual rings */
2344 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2345 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2346
2347 return err;
2348 }
2349
2350 /**
2351 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2352 * @vsi: ptr to the VSI
2353 **/
2354 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2355 {
2356 u16 qoffset, qcount;
2357 int i, n;
2358
2359 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2360 return;
2361
2362 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2363 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2364 continue;
2365
2366 qoffset = vsi->tc_config.tc_info[n].qoffset;
2367 qcount = vsi->tc_config.tc_info[n].qcount;
2368 for (i = qoffset; i < (qoffset + qcount); i++) {
2369 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2370 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2371 rx_ring->dcb_tc = n;
2372 tx_ring->dcb_tc = n;
2373 }
2374 }
2375 }
2376
2377 /**
2378 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2379 * @vsi: ptr to the VSI
2380 **/
2381 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2382 {
2383 if (vsi->netdev)
2384 i40e_set_rx_mode(vsi->netdev);
2385 }
2386
2387 /**
2388 * i40e_vsi_configure - Set up the VSI for action
2389 * @vsi: the VSI being configured
2390 **/
2391 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2392 {
2393 int err;
2394
2395 i40e_set_vsi_rx_mode(vsi);
2396 i40e_restore_vlan(vsi);
2397 i40e_vsi_config_dcb_rings(vsi);
2398 err = i40e_vsi_configure_tx(vsi);
2399 if (!err)
2400 err = i40e_vsi_configure_rx(vsi);
2401
2402 return err;
2403 }
2404
2405 /**
2406 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2407 * @vsi: the VSI being configured
2408 **/
2409 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2410 {
2411 struct i40e_pf *pf = vsi->back;
2412 struct i40e_q_vector *q_vector;
2413 struct i40e_hw *hw = &pf->hw;
2414 u16 vector;
2415 int i, q;
2416 u32 val;
2417 u32 qp;
2418
2419 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2420 * and PFINT_LNKLSTn registers, e.g.:
2421 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2422 */
2423 qp = vsi->base_queue;
2424 vector = vsi->base_vector;
2425 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2426 q_vector = vsi->q_vectors[i];
2427 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2428 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2429 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2430 q_vector->rx.itr);
2431 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2432 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2433 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2434 q_vector->tx.itr);
2435
2436 /* Linked list for the queuepairs assigned to this vector */
2437 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2438 for (q = 0; q < q_vector->num_ringpairs; q++) {
2439 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2440 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2441 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2442 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2443 (I40E_QUEUE_TYPE_TX
2444 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2445
2446 wr32(hw, I40E_QINT_RQCTL(qp), val);
2447
2448 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2449 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2450 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2451 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2452 (I40E_QUEUE_TYPE_RX
2453 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2454
2455 /* Terminate the linked list */
2456 if (q == (q_vector->num_ringpairs - 1))
2457 val |= (I40E_QUEUE_END_OF_LIST
2458 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2459
2460 wr32(hw, I40E_QINT_TQCTL(qp), val);
2461 qp++;
2462 }
2463 }
2464
2465 i40e_flush(hw);
2466 }
2467
2468 /**
2469 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2470 * @hw: ptr to the hardware info
2471 **/
2472 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2473 {
2474 u32 val;
2475
2476 /* clear things first */
2477 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2478 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2479
2480 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2481 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2482 I40E_PFINT_ICR0_ENA_GRST_MASK |
2483 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2484 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2485 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2486 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2487 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2488 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2489
2490 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2491
2492 /* SW_ITR_IDX = 0, but don't change INTENA */
2493 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2494 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2495
2496 /* OTHER_ITR_IDX = 0 */
2497 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2498 }
2499
2500 /**
2501 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2502 * @vsi: the VSI being configured
2503 **/
2504 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2505 {
2506 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2507 struct i40e_pf *pf = vsi->back;
2508 struct i40e_hw *hw = &pf->hw;
2509 u32 val;
2510
2511 /* set the ITR configuration */
2512 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2513 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2514 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2515 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2516 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2517 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2518
2519 i40e_enable_misc_int_causes(hw);
2520
2521 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2522 wr32(hw, I40E_PFINT_LNKLST0, 0);
2523
2524 /* Associate the queue pair to the vector and enable the q int */
2525 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2526 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2527 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2528
2529 wr32(hw, I40E_QINT_RQCTL(0), val);
2530
2531 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2532 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2533 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2534
2535 wr32(hw, I40E_QINT_TQCTL(0), val);
2536 i40e_flush(hw);
2537 }
2538
2539 /**
2540 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2541 * @pf: board private structure
2542 **/
2543 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2544 {
2545 struct i40e_hw *hw = &pf->hw;
2546
2547 wr32(hw, I40E_PFINT_DYN_CTL0,
2548 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2549 i40e_flush(hw);
2550 }
2551
2552 /**
2553 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2554 * @pf: board private structure
2555 **/
2556 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2557 {
2558 struct i40e_hw *hw = &pf->hw;
2559 u32 val;
2560
2561 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2562 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2563 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2564
2565 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2566 i40e_flush(hw);
2567 }
2568
2569 /**
2570 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2571 * @vsi: pointer to a vsi
2572 * @vector: enable a particular Hw Interrupt vector
2573 **/
2574 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2575 {
2576 struct i40e_pf *pf = vsi->back;
2577 struct i40e_hw *hw = &pf->hw;
2578 u32 val;
2579
2580 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2581 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2582 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2583 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2584 /* skip the flush */
2585 }
2586
2587 /**
2588 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2589 * @irq: interrupt number
2590 * @data: pointer to a q_vector
2591 **/
2592 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2593 {
2594 struct i40e_q_vector *q_vector = data;
2595
2596 if (!q_vector->tx.ring && !q_vector->rx.ring)
2597 return IRQ_HANDLED;
2598
2599 napi_schedule(&q_vector->napi);
2600
2601 return IRQ_HANDLED;
2602 }
2603
2604 /**
2605 * i40e_fdir_clean_rings - Interrupt Handler for FDIR rings
2606 * @irq: interrupt number
2607 * @data: pointer to a q_vector
2608 **/
2609 static irqreturn_t i40e_fdir_clean_rings(int irq, void *data)
2610 {
2611 struct i40e_q_vector *q_vector = data;
2612
2613 if (!q_vector->tx.ring && !q_vector->rx.ring)
2614 return IRQ_HANDLED;
2615
2616 pr_info("fdir ring cleaning needed\n");
2617
2618 return IRQ_HANDLED;
2619 }
2620
2621 /**
2622 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2623 * @vsi: the VSI being configured
2624 * @basename: name for the vector
2625 *
2626 * Allocates MSI-X vectors and requests interrupts from the kernel.
2627 **/
2628 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2629 {
2630 int q_vectors = vsi->num_q_vectors;
2631 struct i40e_pf *pf = vsi->back;
2632 int base = vsi->base_vector;
2633 int rx_int_idx = 0;
2634 int tx_int_idx = 0;
2635 int vector, err;
2636
2637 for (vector = 0; vector < q_vectors; vector++) {
2638 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2639
2640 if (q_vector->tx.ring && q_vector->rx.ring) {
2641 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2642 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2643 tx_int_idx++;
2644 } else if (q_vector->rx.ring) {
2645 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2646 "%s-%s-%d", basename, "rx", rx_int_idx++);
2647 } else if (q_vector->tx.ring) {
2648 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2649 "%s-%s-%d", basename, "tx", tx_int_idx++);
2650 } else {
2651 /* skip this unused q_vector */
2652 continue;
2653 }
2654 err = request_irq(pf->msix_entries[base + vector].vector,
2655 vsi->irq_handler,
2656 0,
2657 q_vector->name,
2658 q_vector);
2659 if (err) {
2660 dev_info(&pf->pdev->dev,
2661 "%s: request_irq failed, error: %d\n",
2662 __func__, err);
2663 goto free_queue_irqs;
2664 }
2665 /* assign the mask for this irq */
2666 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2667 &q_vector->affinity_mask);
2668 }
2669
2670 return 0;
2671
2672 free_queue_irqs:
2673 while (vector) {
2674 vector--;
2675 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2676 NULL);
2677 free_irq(pf->msix_entries[base + vector].vector,
2678 &(vsi->q_vectors[vector]));
2679 }
2680 return err;
2681 }
2682
2683 /**
2684 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2685 * @vsi: the VSI being un-configured
2686 **/
2687 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2688 {
2689 struct i40e_pf *pf = vsi->back;
2690 struct i40e_hw *hw = &pf->hw;
2691 int base = vsi->base_vector;
2692 int i;
2693
2694 for (i = 0; i < vsi->num_queue_pairs; i++) {
2695 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2696 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2697 }
2698
2699 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2700 for (i = vsi->base_vector;
2701 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2702 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2703
2704 i40e_flush(hw);
2705 for (i = 0; i < vsi->num_q_vectors; i++)
2706 synchronize_irq(pf->msix_entries[i + base].vector);
2707 } else {
2708 /* Legacy and MSI mode - this stops all interrupt handling */
2709 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2710 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2711 i40e_flush(hw);
2712 synchronize_irq(pf->pdev->irq);
2713 }
2714 }
2715
2716 /**
2717 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2718 * @vsi: the VSI being configured
2719 **/
2720 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2721 {
2722 struct i40e_pf *pf = vsi->back;
2723 int i;
2724
2725 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2726 for (i = vsi->base_vector;
2727 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2728 i40e_irq_dynamic_enable(vsi, i);
2729 } else {
2730 i40e_irq_dynamic_enable_icr0(pf);
2731 }
2732
2733 i40e_flush(&pf->hw);
2734 return 0;
2735 }
2736
2737 /**
2738 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2739 * @pf: board private structure
2740 **/
2741 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2742 {
2743 /* Disable ICR 0 */
2744 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2745 i40e_flush(&pf->hw);
2746 }
2747
2748 /**
2749 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2750 * @irq: interrupt number
2751 * @data: pointer to a q_vector
2752 *
2753 * This is the handler used for all MSI/Legacy interrupts, and deals
2754 * with both queue and non-queue interrupts. This is also used in
2755 * MSIX mode to handle the non-queue interrupts.
2756 **/
2757 static irqreturn_t i40e_intr(int irq, void *data)
2758 {
2759 struct i40e_pf *pf = (struct i40e_pf *)data;
2760 struct i40e_hw *hw = &pf->hw;
2761 irqreturn_t ret = IRQ_NONE;
2762 u32 icr0, icr0_remaining;
2763 u32 val, ena_mask;
2764
2765 icr0 = rd32(hw, I40E_PFINT_ICR0);
2766 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2767
2768 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2769 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2770 goto enable_intr;
2771
2772 /* if interrupt but no bits showing, must be SWINT */
2773 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2774 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2775 pf->sw_int_count++;
2776
2777 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2778 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2779
2780 /* temporarily disable queue cause for NAPI processing */
2781 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2782 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2783 wr32(hw, I40E_QINT_RQCTL(0), qval);
2784
2785 qval = rd32(hw, I40E_QINT_TQCTL(0));
2786 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2787 wr32(hw, I40E_QINT_TQCTL(0), qval);
2788
2789 if (!test_bit(__I40E_DOWN, &pf->state))
2790 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2791 }
2792
2793 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2794 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2795 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2796 }
2797
2798 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2799 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2800 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2801 }
2802
2803 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2804 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2805 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2806 }
2807
2808 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2809 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2810 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2811 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2812 val = rd32(hw, I40E_GLGEN_RSTAT);
2813 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2814 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2815 if (val == I40E_RESET_CORER)
2816 pf->corer_count++;
2817 else if (val == I40E_RESET_GLOBR)
2818 pf->globr_count++;
2819 else if (val == I40E_RESET_EMPR)
2820 pf->empr_count++;
2821 }
2822
2823 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2824 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2825 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2826 }
2827
2828 /* If a critical error is pending we have no choice but to reset the
2829 * device.
2830 * Report and mask out any remaining unexpected interrupts.
2831 */
2832 icr0_remaining = icr0 & ena_mask;
2833 if (icr0_remaining) {
2834 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2835 icr0_remaining);
2836 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2837 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2838 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK) ||
2839 (icr0_remaining & I40E_PFINT_ICR0_MAL_DETECT_MASK)) {
2840 dev_info(&pf->pdev->dev, "device will be reset\n");
2841 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2842 i40e_service_event_schedule(pf);
2843 }
2844 ena_mask &= ~icr0_remaining;
2845 }
2846 ret = IRQ_HANDLED;
2847
2848 enable_intr:
2849 /* re-enable interrupt causes */
2850 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2851 if (!test_bit(__I40E_DOWN, &pf->state)) {
2852 i40e_service_event_schedule(pf);
2853 i40e_irq_dynamic_enable_icr0(pf);
2854 }
2855
2856 return ret;
2857 }
2858
2859 /**
2860 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
2861 * @vsi: the VSI being configured
2862 * @v_idx: vector index
2863 * @qp_idx: queue pair index
2864 **/
2865 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
2866 {
2867 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
2868 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
2869 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
2870
2871 tx_ring->q_vector = q_vector;
2872 tx_ring->next = q_vector->tx.ring;
2873 q_vector->tx.ring = tx_ring;
2874 q_vector->tx.count++;
2875
2876 rx_ring->q_vector = q_vector;
2877 rx_ring->next = q_vector->rx.ring;
2878 q_vector->rx.ring = rx_ring;
2879 q_vector->rx.count++;
2880 }
2881
2882 /**
2883 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
2884 * @vsi: the VSI being configured
2885 *
2886 * This function maps descriptor rings to the queue-specific vectors
2887 * we were allotted through the MSI-X enabling code. Ideally, we'd have
2888 * one vector per queue pair, but on a constrained vector budget, we
2889 * group the queue pairs as "efficiently" as possible.
2890 **/
2891 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
2892 {
2893 int qp_remaining = vsi->num_queue_pairs;
2894 int q_vectors = vsi->num_q_vectors;
2895 int num_ringpairs;
2896 int v_start = 0;
2897 int qp_idx = 0;
2898
2899 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
2900 * group them so there are multiple queues per vector.
2901 */
2902 for (; v_start < q_vectors && qp_remaining; v_start++) {
2903 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
2904
2905 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
2906
2907 q_vector->num_ringpairs = num_ringpairs;
2908
2909 q_vector->rx.count = 0;
2910 q_vector->tx.count = 0;
2911 q_vector->rx.ring = NULL;
2912 q_vector->tx.ring = NULL;
2913
2914 while (num_ringpairs--) {
2915 map_vector_to_qp(vsi, v_start, qp_idx);
2916 qp_idx++;
2917 qp_remaining--;
2918 }
2919 }
2920 }
2921
2922 /**
2923 * i40e_vsi_request_irq - Request IRQ from the OS
2924 * @vsi: the VSI being configured
2925 * @basename: name for the vector
2926 **/
2927 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
2928 {
2929 struct i40e_pf *pf = vsi->back;
2930 int err;
2931
2932 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
2933 err = i40e_vsi_request_irq_msix(vsi, basename);
2934 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
2935 err = request_irq(pf->pdev->irq, i40e_intr, 0,
2936 pf->misc_int_name, pf);
2937 else
2938 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
2939 pf->misc_int_name, pf);
2940
2941 if (err)
2942 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
2943
2944 return err;
2945 }
2946
2947 #ifdef CONFIG_NET_POLL_CONTROLLER
2948 /**
2949 * i40e_netpoll - A Polling 'interrupt'handler
2950 * @netdev: network interface device structure
2951 *
2952 * This is used by netconsole to send skbs without having to re-enable
2953 * interrupts. It's not called while the normal interrupt routine is executing.
2954 **/
2955 static void i40e_netpoll(struct net_device *netdev)
2956 {
2957 struct i40e_netdev_priv *np = netdev_priv(netdev);
2958 struct i40e_vsi *vsi = np->vsi;
2959 struct i40e_pf *pf = vsi->back;
2960 int i;
2961
2962 /* if interface is down do nothing */
2963 if (test_bit(__I40E_DOWN, &vsi->state))
2964 return;
2965
2966 pf->flags |= I40E_FLAG_IN_NETPOLL;
2967 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2968 for (i = 0; i < vsi->num_q_vectors; i++)
2969 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
2970 } else {
2971 i40e_intr(pf->pdev->irq, netdev);
2972 }
2973 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
2974 }
2975 #endif
2976
2977 /**
2978 * i40e_vsi_control_tx - Start or stop a VSI's rings
2979 * @vsi: the VSI being configured
2980 * @enable: start or stop the rings
2981 **/
2982 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
2983 {
2984 struct i40e_pf *pf = vsi->back;
2985 struct i40e_hw *hw = &pf->hw;
2986 int i, j, pf_q;
2987 u32 tx_reg;
2988
2989 pf_q = vsi->base_queue;
2990 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
2991 j = 1000;
2992 do {
2993 usleep_range(1000, 2000);
2994 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
2995 } while (j-- && ((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT)
2996 ^ (tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT)) & 1);
2997
2998 /* Skip if the queue is already in the requested state */
2999 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3000 continue;
3001 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3002 continue;
3003
3004 /* turn on/off the queue */
3005 if (enable)
3006 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK |
3007 I40E_QTX_ENA_QENA_STAT_MASK;
3008 else
3009 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3010
3011 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3012
3013 /* wait for the change to finish */
3014 for (j = 0; j < 10; j++) {
3015 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3016 if (enable) {
3017 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3018 break;
3019 } else {
3020 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3021 break;
3022 }
3023
3024 udelay(10);
3025 }
3026 if (j >= 10) {
3027 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3028 pf_q, (enable ? "en" : "dis"));
3029 return -ETIMEDOUT;
3030 }
3031 }
3032
3033 if (hw->revision_id == 0)
3034 mdelay(50);
3035
3036 return 0;
3037 }
3038
3039 /**
3040 * i40e_vsi_control_rx - Start or stop a VSI's rings
3041 * @vsi: the VSI being configured
3042 * @enable: start or stop the rings
3043 **/
3044 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3045 {
3046 struct i40e_pf *pf = vsi->back;
3047 struct i40e_hw *hw = &pf->hw;
3048 int i, j, pf_q;
3049 u32 rx_reg;
3050
3051 pf_q = vsi->base_queue;
3052 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3053 j = 1000;
3054 do {
3055 usleep_range(1000, 2000);
3056 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3057 } while (j-- && ((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT)
3058 ^ (rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT)) & 1);
3059
3060 if (enable) {
3061 /* is STAT set ? */
3062 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3063 continue;
3064 } else {
3065 /* is !STAT set ? */
3066 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3067 continue;
3068 }
3069
3070 /* turn on/off the queue */
3071 if (enable)
3072 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK |
3073 I40E_QRX_ENA_QENA_STAT_MASK;
3074 else
3075 rx_reg &= ~(I40E_QRX_ENA_QENA_REQ_MASK |
3076 I40E_QRX_ENA_QENA_STAT_MASK);
3077 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3078
3079 /* wait for the change to finish */
3080 for (j = 0; j < 10; j++) {
3081 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3082
3083 if (enable) {
3084 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3085 break;
3086 } else {
3087 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3088 break;
3089 }
3090
3091 udelay(10);
3092 }
3093 if (j >= 10) {
3094 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3095 pf_q, (enable ? "en" : "dis"));
3096 return -ETIMEDOUT;
3097 }
3098 }
3099
3100 return 0;
3101 }
3102
3103 /**
3104 * i40e_vsi_control_rings - Start or stop a VSI's rings
3105 * @vsi: the VSI being configured
3106 * @enable: start or stop the rings
3107 **/
3108 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3109 {
3110 int ret;
3111
3112 /* do rx first for enable and last for disable */
3113 if (request) {
3114 ret = i40e_vsi_control_rx(vsi, request);
3115 if (ret)
3116 return ret;
3117 ret = i40e_vsi_control_tx(vsi, request);
3118 } else {
3119 ret = i40e_vsi_control_tx(vsi, request);
3120 if (ret)
3121 return ret;
3122 ret = i40e_vsi_control_rx(vsi, request);
3123 }
3124
3125 return ret;
3126 }
3127
3128 /**
3129 * i40e_vsi_free_irq - Free the irq association with the OS
3130 * @vsi: the VSI being configured
3131 **/
3132 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3133 {
3134 struct i40e_pf *pf = vsi->back;
3135 struct i40e_hw *hw = &pf->hw;
3136 int base = vsi->base_vector;
3137 u32 val, qp;
3138 int i;
3139
3140 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3141 if (!vsi->q_vectors)
3142 return;
3143
3144 for (i = 0; i < vsi->num_q_vectors; i++) {
3145 u16 vector = i + base;
3146
3147 /* free only the irqs that were actually requested */
3148 if (!vsi->q_vectors[i] ||
3149 !vsi->q_vectors[i]->num_ringpairs)
3150 continue;
3151
3152 /* clear the affinity_mask in the IRQ descriptor */
3153 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3154 NULL);
3155 free_irq(pf->msix_entries[vector].vector,
3156 vsi->q_vectors[i]);
3157
3158 /* Tear down the interrupt queue link list
3159 *
3160 * We know that they come in pairs and always
3161 * the Rx first, then the Tx. To clear the
3162 * link list, stick the EOL value into the
3163 * next_q field of the registers.
3164 */
3165 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3166 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3167 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3168 val |= I40E_QUEUE_END_OF_LIST
3169 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3170 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3171
3172 while (qp != I40E_QUEUE_END_OF_LIST) {
3173 u32 next;
3174
3175 val = rd32(hw, I40E_QINT_RQCTL(qp));
3176
3177 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3178 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3179 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3180 I40E_QINT_RQCTL_INTEVENT_MASK);
3181
3182 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3183 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3184
3185 wr32(hw, I40E_QINT_RQCTL(qp), val);
3186
3187 val = rd32(hw, I40E_QINT_TQCTL(qp));
3188
3189 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3190 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3191
3192 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3193 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3194 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3195 I40E_QINT_TQCTL_INTEVENT_MASK);
3196
3197 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3198 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3199
3200 wr32(hw, I40E_QINT_TQCTL(qp), val);
3201 qp = next;
3202 }
3203 }
3204 } else {
3205 free_irq(pf->pdev->irq, pf);
3206
3207 val = rd32(hw, I40E_PFINT_LNKLST0);
3208 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3209 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3210 val |= I40E_QUEUE_END_OF_LIST
3211 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3212 wr32(hw, I40E_PFINT_LNKLST0, val);
3213
3214 val = rd32(hw, I40E_QINT_RQCTL(qp));
3215 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3216 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3217 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3218 I40E_QINT_RQCTL_INTEVENT_MASK);
3219
3220 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3221 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3222
3223 wr32(hw, I40E_QINT_RQCTL(qp), val);
3224
3225 val = rd32(hw, I40E_QINT_TQCTL(qp));
3226
3227 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3228 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3229 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3230 I40E_QINT_TQCTL_INTEVENT_MASK);
3231
3232 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3233 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3234
3235 wr32(hw, I40E_QINT_TQCTL(qp), val);
3236 }
3237 }
3238
3239 /**
3240 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3241 * @vsi: the VSI being configured
3242 * @v_idx: Index of vector to be freed
3243 *
3244 * This function frees the memory allocated to the q_vector. In addition if
3245 * NAPI is enabled it will delete any references to the NAPI struct prior
3246 * to freeing the q_vector.
3247 **/
3248 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3249 {
3250 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3251 struct i40e_ring *ring;
3252
3253 if (!q_vector)
3254 return;
3255
3256 /* disassociate q_vector from rings */
3257 i40e_for_each_ring(ring, q_vector->tx)
3258 ring->q_vector = NULL;
3259
3260 i40e_for_each_ring(ring, q_vector->rx)
3261 ring->q_vector = NULL;
3262
3263 /* only VSI w/ an associated netdev is set up w/ NAPI */
3264 if (vsi->netdev)
3265 netif_napi_del(&q_vector->napi);
3266
3267 vsi->q_vectors[v_idx] = NULL;
3268
3269 kfree_rcu(q_vector, rcu);
3270 }
3271
3272 /**
3273 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3274 * @vsi: the VSI being un-configured
3275 *
3276 * This frees the memory allocated to the q_vectors and
3277 * deletes references to the NAPI struct.
3278 **/
3279 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3280 {
3281 int v_idx;
3282
3283 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3284 i40e_free_q_vector(vsi, v_idx);
3285 }
3286
3287 /**
3288 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3289 * @pf: board private structure
3290 **/
3291 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3292 {
3293 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3294 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3295 pci_disable_msix(pf->pdev);
3296 kfree(pf->msix_entries);
3297 pf->msix_entries = NULL;
3298 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3299 pci_disable_msi(pf->pdev);
3300 }
3301 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3302 }
3303
3304 /**
3305 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3306 * @pf: board private structure
3307 *
3308 * We go through and clear interrupt specific resources and reset the structure
3309 * to pre-load conditions
3310 **/
3311 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3312 {
3313 int i;
3314
3315 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3316 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3317 if (pf->vsi[i])
3318 i40e_vsi_free_q_vectors(pf->vsi[i]);
3319 i40e_reset_interrupt_capability(pf);
3320 }
3321
3322 /**
3323 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3324 * @vsi: the VSI being configured
3325 **/
3326 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3327 {
3328 int q_idx;
3329
3330 if (!vsi->netdev)
3331 return;
3332
3333 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3334 napi_enable(&vsi->q_vectors[q_idx]->napi);
3335 }
3336
3337 /**
3338 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3339 * @vsi: the VSI being configured
3340 **/
3341 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3342 {
3343 int q_idx;
3344
3345 if (!vsi->netdev)
3346 return;
3347
3348 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3349 napi_disable(&vsi->q_vectors[q_idx]->napi);
3350 }
3351
3352 /**
3353 * i40e_quiesce_vsi - Pause a given VSI
3354 * @vsi: the VSI being paused
3355 **/
3356 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3357 {
3358 if (test_bit(__I40E_DOWN, &vsi->state))
3359 return;
3360
3361 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3362 if (vsi->netdev && netif_running(vsi->netdev)) {
3363 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3364 } else {
3365 set_bit(__I40E_DOWN, &vsi->state);
3366 i40e_down(vsi);
3367 }
3368 }
3369
3370 /**
3371 * i40e_unquiesce_vsi - Resume a given VSI
3372 * @vsi: the VSI being resumed
3373 **/
3374 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3375 {
3376 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3377 return;
3378
3379 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3380 if (vsi->netdev && netif_running(vsi->netdev))
3381 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3382 else
3383 i40e_up(vsi); /* this clears the DOWN bit */
3384 }
3385
3386 /**
3387 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3388 * @pf: the PF
3389 **/
3390 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3391 {
3392 int v;
3393
3394 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3395 if (pf->vsi[v])
3396 i40e_quiesce_vsi(pf->vsi[v]);
3397 }
3398 }
3399
3400 /**
3401 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3402 * @pf: the PF
3403 **/
3404 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3405 {
3406 int v;
3407
3408 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3409 if (pf->vsi[v])
3410 i40e_unquiesce_vsi(pf->vsi[v]);
3411 }
3412 }
3413
3414 /**
3415 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3416 * @dcbcfg: the corresponding DCBx configuration structure
3417 *
3418 * Return the number of TCs from given DCBx configuration
3419 **/
3420 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3421 {
3422 u8 num_tc = 0;
3423 int i;
3424
3425 /* Scan the ETS Config Priority Table to find
3426 * traffic class enabled for a given priority
3427 * and use the traffic class index to get the
3428 * number of traffic classes enabled
3429 */
3430 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3431 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3432 num_tc = dcbcfg->etscfg.prioritytable[i];
3433 }
3434
3435 /* Traffic class index starts from zero so
3436 * increment to return the actual count
3437 */
3438 return num_tc + 1;
3439 }
3440
3441 /**
3442 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3443 * @dcbcfg: the corresponding DCBx configuration structure
3444 *
3445 * Query the current DCB configuration and return the number of
3446 * traffic classes enabled from the given DCBX config
3447 **/
3448 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3449 {
3450 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3451 u8 enabled_tc = 1;
3452 u8 i;
3453
3454 for (i = 0; i < num_tc; i++)
3455 enabled_tc |= 1 << i;
3456
3457 return enabled_tc;
3458 }
3459
3460 /**
3461 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3462 * @pf: PF being queried
3463 *
3464 * Return number of traffic classes enabled for the given PF
3465 **/
3466 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3467 {
3468 struct i40e_hw *hw = &pf->hw;
3469 u8 i, enabled_tc;
3470 u8 num_tc = 0;
3471 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3472
3473 /* If DCB is not enabled then always in single TC */
3474 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3475 return 1;
3476
3477 /* MFP mode return count of enabled TCs for this PF */
3478 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3479 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3480 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3481 if (enabled_tc & (1 << i))
3482 num_tc++;
3483 }
3484 return num_tc;
3485 }
3486
3487 /* SFP mode will be enabled for all TCs on port */
3488 return i40e_dcb_get_num_tc(dcbcfg);
3489 }
3490
3491 /**
3492 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3493 * @pf: PF being queried
3494 *
3495 * Return a bitmap for first enabled traffic class for this PF.
3496 **/
3497 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3498 {
3499 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3500 u8 i = 0;
3501
3502 if (!enabled_tc)
3503 return 0x1; /* TC0 */
3504
3505 /* Find the first enabled TC */
3506 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3507 if (enabled_tc & (1 << i))
3508 break;
3509 }
3510
3511 return 1 << i;
3512 }
3513
3514 /**
3515 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3516 * @pf: PF being queried
3517 *
3518 * Return a bitmap for enabled traffic classes for this PF.
3519 **/
3520 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3521 {
3522 /* If DCB is not enabled for this PF then just return default TC */
3523 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3524 return i40e_pf_get_default_tc(pf);
3525
3526 /* MFP mode will have enabled TCs set by FW */
3527 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3528 return pf->hw.func_caps.enabled_tcmap;
3529
3530 /* SFP mode we want PF to be enabled for all TCs */
3531 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3532 }
3533
3534 /**
3535 * i40e_vsi_get_bw_info - Query VSI BW Information
3536 * @vsi: the VSI being queried
3537 *
3538 * Returns 0 on success, negative value on failure
3539 **/
3540 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3541 {
3542 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3543 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3544 struct i40e_pf *pf = vsi->back;
3545 struct i40e_hw *hw = &pf->hw;
3546 i40e_status aq_ret;
3547 u32 tc_bw_max;
3548 int i;
3549
3550 /* Get the VSI level BW configuration */
3551 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3552 if (aq_ret) {
3553 dev_info(&pf->pdev->dev,
3554 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3555 aq_ret, pf->hw.aq.asq_last_status);
3556 return -EINVAL;
3557 }
3558
3559 /* Get the VSI level BW configuration per TC */
3560 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3561 NULL);
3562 if (aq_ret) {
3563 dev_info(&pf->pdev->dev,
3564 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3565 aq_ret, pf->hw.aq.asq_last_status);
3566 return -EINVAL;
3567 }
3568
3569 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3570 dev_info(&pf->pdev->dev,
3571 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3572 bw_config.tc_valid_bits,
3573 bw_ets_config.tc_valid_bits);
3574 /* Still continuing */
3575 }
3576
3577 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3578 vsi->bw_max_quanta = bw_config.max_bw;
3579 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3580 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3581 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3582 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3583 vsi->bw_ets_limit_credits[i] =
3584 le16_to_cpu(bw_ets_config.credits[i]);
3585 /* 3 bits out of 4 for each TC */
3586 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3587 }
3588
3589 return 0;
3590 }
3591
3592 /**
3593 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3594 * @vsi: the VSI being configured
3595 * @enabled_tc: TC bitmap
3596 * @bw_credits: BW shared credits per TC
3597 *
3598 * Returns 0 on success, negative value on failure
3599 **/
3600 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3601 u8 *bw_share)
3602 {
3603 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3604 i40e_status aq_ret;
3605 int i;
3606
3607 bw_data.tc_valid_bits = enabled_tc;
3608 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3609 bw_data.tc_bw_credits[i] = bw_share[i];
3610
3611 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3612 NULL);
3613 if (aq_ret) {
3614 dev_info(&vsi->back->pdev->dev,
3615 "%s: AQ command Config VSI BW allocation per TC failed = %d\n",
3616 __func__, vsi->back->hw.aq.asq_last_status);
3617 return -EINVAL;
3618 }
3619
3620 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3621 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3622
3623 return 0;
3624 }
3625
3626 /**
3627 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3628 * @vsi: the VSI being configured
3629 * @enabled_tc: TC map to be enabled
3630 *
3631 **/
3632 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3633 {
3634 struct net_device *netdev = vsi->netdev;
3635 struct i40e_pf *pf = vsi->back;
3636 struct i40e_hw *hw = &pf->hw;
3637 u8 netdev_tc = 0;
3638 int i;
3639 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3640
3641 if (!netdev)
3642 return;
3643
3644 if (!enabled_tc) {
3645 netdev_reset_tc(netdev);
3646 return;
3647 }
3648
3649 /* Set up actual enabled TCs on the VSI */
3650 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3651 return;
3652
3653 /* set per TC queues for the VSI */
3654 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3655 /* Only set TC queues for enabled tcs
3656 *
3657 * e.g. For a VSI that has TC0 and TC3 enabled the
3658 * enabled_tc bitmap would be 0x00001001; the driver
3659 * will set the numtc for netdev as 2 that will be
3660 * referenced by the netdev layer as TC 0 and 1.
3661 */
3662 if (vsi->tc_config.enabled_tc & (1 << i))
3663 netdev_set_tc_queue(netdev,
3664 vsi->tc_config.tc_info[i].netdev_tc,
3665 vsi->tc_config.tc_info[i].qcount,
3666 vsi->tc_config.tc_info[i].qoffset);
3667 }
3668
3669 /* Assign UP2TC map for the VSI */
3670 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3671 /* Get the actual TC# for the UP */
3672 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3673 /* Get the mapped netdev TC# for the UP */
3674 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3675 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3676 }
3677 }
3678
3679 /**
3680 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3681 * @vsi: the VSI being configured
3682 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3683 **/
3684 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3685 struct i40e_vsi_context *ctxt)
3686 {
3687 /* copy just the sections touched not the entire info
3688 * since not all sections are valid as returned by
3689 * update vsi params
3690 */
3691 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3692 memcpy(&vsi->info.queue_mapping,
3693 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3694 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3695 sizeof(vsi->info.tc_mapping));
3696 }
3697
3698 /**
3699 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3700 * @vsi: VSI to be configured
3701 * @enabled_tc: TC bitmap
3702 *
3703 * This configures a particular VSI for TCs that are mapped to the
3704 * given TC bitmap. It uses default bandwidth share for TCs across
3705 * VSIs to configure TC for a particular VSI.
3706 *
3707 * NOTE:
3708 * It is expected that the VSI queues have been quisced before calling
3709 * this function.
3710 **/
3711 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3712 {
3713 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3714 struct i40e_vsi_context ctxt;
3715 int ret = 0;
3716 int i;
3717
3718 /* Check if enabled_tc is same as existing or new TCs */
3719 if (vsi->tc_config.enabled_tc == enabled_tc)
3720 return ret;
3721
3722 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3723 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3724 if (enabled_tc & (1 << i))
3725 bw_share[i] = 1;
3726 }
3727
3728 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3729 if (ret) {
3730 dev_info(&vsi->back->pdev->dev,
3731 "Failed configuring TC map %d for VSI %d\n",
3732 enabled_tc, vsi->seid);
3733 goto out;
3734 }
3735
3736 /* Update Queue Pairs Mapping for currently enabled UPs */
3737 ctxt.seid = vsi->seid;
3738 ctxt.pf_num = vsi->back->hw.pf_id;
3739 ctxt.vf_num = 0;
3740 ctxt.uplink_seid = vsi->uplink_seid;
3741 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3742 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3743
3744 /* Update the VSI after updating the VSI queue-mapping information */
3745 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3746 if (ret) {
3747 dev_info(&vsi->back->pdev->dev,
3748 "update vsi failed, aq_err=%d\n",
3749 vsi->back->hw.aq.asq_last_status);
3750 goto out;
3751 }
3752 /* update the local VSI info with updated queue map */
3753 i40e_vsi_update_queue_map(vsi, &ctxt);
3754 vsi->info.valid_sections = 0;
3755
3756 /* Update current VSI BW information */
3757 ret = i40e_vsi_get_bw_info(vsi);
3758 if (ret) {
3759 dev_info(&vsi->back->pdev->dev,
3760 "Failed updating vsi bw info, aq_err=%d\n",
3761 vsi->back->hw.aq.asq_last_status);
3762 goto out;
3763 }
3764
3765 /* Update the netdev TC setup */
3766 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3767 out:
3768 return ret;
3769 }
3770
3771 /**
3772 * i40e_up_complete - Finish the last steps of bringing up a connection
3773 * @vsi: the VSI being configured
3774 **/
3775 static int i40e_up_complete(struct i40e_vsi *vsi)
3776 {
3777 struct i40e_pf *pf = vsi->back;
3778 int err;
3779
3780 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3781 i40e_vsi_configure_msix(vsi);
3782 else
3783 i40e_configure_msi_and_legacy(vsi);
3784
3785 /* start rings */
3786 err = i40e_vsi_control_rings(vsi, true);
3787 if (err)
3788 return err;
3789
3790 clear_bit(__I40E_DOWN, &vsi->state);
3791 i40e_napi_enable_all(vsi);
3792 i40e_vsi_enable_irq(vsi);
3793
3794 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
3795 (vsi->netdev)) {
3796 netdev_info(vsi->netdev, "NIC Link is Up\n");
3797 netif_tx_start_all_queues(vsi->netdev);
3798 netif_carrier_on(vsi->netdev);
3799 } else if (vsi->netdev) {
3800 netdev_info(vsi->netdev, "NIC Link is Down\n");
3801 }
3802 i40e_service_event_schedule(pf);
3803
3804 return 0;
3805 }
3806
3807 /**
3808 * i40e_vsi_reinit_locked - Reset the VSI
3809 * @vsi: the VSI being configured
3810 *
3811 * Rebuild the ring structs after some configuration
3812 * has changed, e.g. MTU size.
3813 **/
3814 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
3815 {
3816 struct i40e_pf *pf = vsi->back;
3817
3818 WARN_ON(in_interrupt());
3819 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
3820 usleep_range(1000, 2000);
3821 i40e_down(vsi);
3822
3823 /* Give a VF some time to respond to the reset. The
3824 * two second wait is based upon the watchdog cycle in
3825 * the VF driver.
3826 */
3827 if (vsi->type == I40E_VSI_SRIOV)
3828 msleep(2000);
3829 i40e_up(vsi);
3830 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
3831 }
3832
3833 /**
3834 * i40e_up - Bring the connection back up after being down
3835 * @vsi: the VSI being configured
3836 **/
3837 int i40e_up(struct i40e_vsi *vsi)
3838 {
3839 int err;
3840
3841 err = i40e_vsi_configure(vsi);
3842 if (!err)
3843 err = i40e_up_complete(vsi);
3844
3845 return err;
3846 }
3847
3848 /**
3849 * i40e_down - Shutdown the connection processing
3850 * @vsi: the VSI being stopped
3851 **/
3852 void i40e_down(struct i40e_vsi *vsi)
3853 {
3854 int i;
3855
3856 /* It is assumed that the caller of this function
3857 * sets the vsi->state __I40E_DOWN bit.
3858 */
3859 if (vsi->netdev) {
3860 netif_carrier_off(vsi->netdev);
3861 netif_tx_disable(vsi->netdev);
3862 }
3863 i40e_vsi_disable_irq(vsi);
3864 i40e_vsi_control_rings(vsi, false);
3865 i40e_napi_disable_all(vsi);
3866
3867 for (i = 0; i < vsi->num_queue_pairs; i++) {
3868 i40e_clean_tx_ring(vsi->tx_rings[i]);
3869 i40e_clean_rx_ring(vsi->rx_rings[i]);
3870 }
3871 }
3872
3873 /**
3874 * i40e_setup_tc - configure multiple traffic classes
3875 * @netdev: net device to configure
3876 * @tc: number of traffic classes to enable
3877 **/
3878 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
3879 {
3880 struct i40e_netdev_priv *np = netdev_priv(netdev);
3881 struct i40e_vsi *vsi = np->vsi;
3882 struct i40e_pf *pf = vsi->back;
3883 u8 enabled_tc = 0;
3884 int ret = -EINVAL;
3885 int i;
3886
3887 /* Check if DCB enabled to continue */
3888 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
3889 netdev_info(netdev, "DCB is not enabled for adapter\n");
3890 goto exit;
3891 }
3892
3893 /* Check if MFP enabled */
3894 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3895 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
3896 goto exit;
3897 }
3898
3899 /* Check whether tc count is within enabled limit */
3900 if (tc > i40e_pf_get_num_tc(pf)) {
3901 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
3902 goto exit;
3903 }
3904
3905 /* Generate TC map for number of tc requested */
3906 for (i = 0; i < tc; i++)
3907 enabled_tc |= (1 << i);
3908
3909 /* Requesting same TC configuration as already enabled */
3910 if (enabled_tc == vsi->tc_config.enabled_tc)
3911 return 0;
3912
3913 /* Quiesce VSI queues */
3914 i40e_quiesce_vsi(vsi);
3915
3916 /* Configure VSI for enabled TCs */
3917 ret = i40e_vsi_config_tc(vsi, enabled_tc);
3918 if (ret) {
3919 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
3920 vsi->seid);
3921 goto exit;
3922 }
3923
3924 /* Unquiesce VSI */
3925 i40e_unquiesce_vsi(vsi);
3926
3927 exit:
3928 return ret;
3929 }
3930
3931 /**
3932 * i40e_open - Called when a network interface is made active
3933 * @netdev: network interface device structure
3934 *
3935 * The open entry point is called when a network interface is made
3936 * active by the system (IFF_UP). At this point all resources needed
3937 * for transmit and receive operations are allocated, the interrupt
3938 * handler is registered with the OS, the netdev watchdog subtask is
3939 * enabled, and the stack is notified that the interface is ready.
3940 *
3941 * Returns 0 on success, negative value on failure
3942 **/
3943 static int i40e_open(struct net_device *netdev)
3944 {
3945 struct i40e_netdev_priv *np = netdev_priv(netdev);
3946 struct i40e_vsi *vsi = np->vsi;
3947 struct i40e_pf *pf = vsi->back;
3948 char int_name[IFNAMSIZ];
3949 int err;
3950
3951 /* disallow open during test */
3952 if (test_bit(__I40E_TESTING, &pf->state))
3953 return -EBUSY;
3954
3955 netif_carrier_off(netdev);
3956
3957 /* allocate descriptors */
3958 err = i40e_vsi_setup_tx_resources(vsi);
3959 if (err)
3960 goto err_setup_tx;
3961 err = i40e_vsi_setup_rx_resources(vsi);
3962 if (err)
3963 goto err_setup_rx;
3964
3965 err = i40e_vsi_configure(vsi);
3966 if (err)
3967 goto err_setup_rx;
3968
3969 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
3970 dev_driver_string(&pf->pdev->dev), netdev->name);
3971 err = i40e_vsi_request_irq(vsi, int_name);
3972 if (err)
3973 goto err_setup_rx;
3974
3975 /* Notify the stack of the actual queue counts. */
3976 err = netif_set_real_num_tx_queues(netdev, vsi->num_queue_pairs);
3977 if (err)
3978 goto err_set_queues;
3979
3980 err = netif_set_real_num_rx_queues(netdev, vsi->num_queue_pairs);
3981 if (err)
3982 goto err_set_queues;
3983
3984 err = i40e_up_complete(vsi);
3985 if (err)
3986 goto err_up_complete;
3987
3988 #ifdef CONFIG_I40E_VXLAN
3989 vxlan_get_rx_port(netdev);
3990 #endif
3991
3992 return 0;
3993
3994 err_up_complete:
3995 i40e_down(vsi);
3996 err_set_queues:
3997 i40e_vsi_free_irq(vsi);
3998 err_setup_rx:
3999 i40e_vsi_free_rx_resources(vsi);
4000 err_setup_tx:
4001 i40e_vsi_free_tx_resources(vsi);
4002 if (vsi == pf->vsi[pf->lan_vsi])
4003 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4004
4005 return err;
4006 }
4007
4008 /**
4009 * i40e_close - Disables a network interface
4010 * @netdev: network interface device structure
4011 *
4012 * The close entry point is called when an interface is de-activated
4013 * by the OS. The hardware is still under the driver's control, but
4014 * this netdev interface is disabled.
4015 *
4016 * Returns 0, this is not allowed to fail
4017 **/
4018 static int i40e_close(struct net_device *netdev)
4019 {
4020 struct i40e_netdev_priv *np = netdev_priv(netdev);
4021 struct i40e_vsi *vsi = np->vsi;
4022
4023 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4024 return 0;
4025
4026 i40e_down(vsi);
4027 i40e_vsi_free_irq(vsi);
4028
4029 i40e_vsi_free_tx_resources(vsi);
4030 i40e_vsi_free_rx_resources(vsi);
4031
4032 return 0;
4033 }
4034
4035 /**
4036 * i40e_do_reset - Start a PF or Core Reset sequence
4037 * @pf: board private structure
4038 * @reset_flags: which reset is requested
4039 *
4040 * The essential difference in resets is that the PF Reset
4041 * doesn't clear the packet buffers, doesn't reset the PE
4042 * firmware, and doesn't bother the other PFs on the chip.
4043 **/
4044 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4045 {
4046 u32 val;
4047
4048 WARN_ON(in_interrupt());
4049
4050 /* do the biggest reset indicated */
4051 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4052
4053 /* Request a Global Reset
4054 *
4055 * This will start the chip's countdown to the actual full
4056 * chip reset event, and a warning interrupt to be sent
4057 * to all PFs, including the requestor. Our handler
4058 * for the warning interrupt will deal with the shutdown
4059 * and recovery of the switch setup.
4060 */
4061 dev_info(&pf->pdev->dev, "GlobalR requested\n");
4062 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4063 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4064 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4065
4066 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4067
4068 /* Request a Core Reset
4069 *
4070 * Same as Global Reset, except does *not* include the MAC/PHY
4071 */
4072 dev_info(&pf->pdev->dev, "CoreR requested\n");
4073 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4074 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4075 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4076 i40e_flush(&pf->hw);
4077
4078 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4079
4080 /* Request a Firmware Reset
4081 *
4082 * Same as Global reset, plus restarting the
4083 * embedded firmware engine.
4084 */
4085 /* enable EMP Reset */
4086 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4087 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4088 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4089
4090 /* force the reset */
4091 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4092 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4093 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4094 i40e_flush(&pf->hw);
4095
4096 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4097
4098 /* Request a PF Reset
4099 *
4100 * Resets only the PF-specific registers
4101 *
4102 * This goes directly to the tear-down and rebuild of
4103 * the switch, since we need to do all the recovery as
4104 * for the Core Reset.
4105 */
4106 dev_info(&pf->pdev->dev, "PFR requested\n");
4107 i40e_handle_reset_warning(pf);
4108
4109 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4110 int v;
4111
4112 /* Find the VSI(s) that requested a re-init */
4113 dev_info(&pf->pdev->dev,
4114 "VSI reinit requested\n");
4115 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4116 struct i40e_vsi *vsi = pf->vsi[v];
4117 if (vsi != NULL &&
4118 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4119 i40e_vsi_reinit_locked(pf->vsi[v]);
4120 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4121 }
4122 }
4123
4124 /* no further action needed, so return now */
4125 return;
4126 } else {
4127 dev_info(&pf->pdev->dev,
4128 "bad reset request 0x%08x\n", reset_flags);
4129 return;
4130 }
4131 }
4132
4133 /**
4134 * i40e_do_reset_safe - Protected reset path for userland calls.
4135 * @pf: board private structure
4136 * @reset_flags: which reset is requested
4137 *
4138 **/
4139 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4140 {
4141 rtnl_lock();
4142 i40e_do_reset(pf, reset_flags);
4143 rtnl_unlock();
4144 }
4145
4146 /**
4147 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4148 * @pf: board private structure
4149 * @e: event info posted on ARQ
4150 *
4151 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4152 * and VF queues
4153 **/
4154 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4155 struct i40e_arq_event_info *e)
4156 {
4157 struct i40e_aqc_lan_overflow *data =
4158 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4159 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4160 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4161 struct i40e_hw *hw = &pf->hw;
4162 struct i40e_vf *vf;
4163 u16 vf_id;
4164
4165 dev_info(&pf->pdev->dev, "%s: Rx Queue Number = %d QTX_CTL=0x%08x\n",
4166 __func__, queue, qtx_ctl);
4167
4168 /* Queue belongs to VF, find the VF and issue VF reset */
4169 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4170 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4171 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4172 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4173 vf_id -= hw->func_caps.vf_base_id;
4174 vf = &pf->vf[vf_id];
4175 i40e_vc_notify_vf_reset(vf);
4176 /* Allow VF to process pending reset notification */
4177 msleep(20);
4178 i40e_reset_vf(vf, false);
4179 }
4180 }
4181
4182 /**
4183 * i40e_service_event_complete - Finish up the service event
4184 * @pf: board private structure
4185 **/
4186 static void i40e_service_event_complete(struct i40e_pf *pf)
4187 {
4188 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4189
4190 /* flush memory to make sure state is correct before next watchog */
4191 smp_mb__before_clear_bit();
4192 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4193 }
4194
4195 /**
4196 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4197 * @pf: board private structure
4198 **/
4199 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4200 {
4201 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4202 return;
4203
4204 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4205
4206 /* if interface is down do nothing */
4207 if (test_bit(__I40E_DOWN, &pf->state))
4208 return;
4209 }
4210
4211 /**
4212 * i40e_vsi_link_event - notify VSI of a link event
4213 * @vsi: vsi to be notified
4214 * @link_up: link up or down
4215 **/
4216 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4217 {
4218 if (!vsi)
4219 return;
4220
4221 switch (vsi->type) {
4222 case I40E_VSI_MAIN:
4223 if (!vsi->netdev || !vsi->netdev_registered)
4224 break;
4225
4226 if (link_up) {
4227 netif_carrier_on(vsi->netdev);
4228 netif_tx_wake_all_queues(vsi->netdev);
4229 } else {
4230 netif_carrier_off(vsi->netdev);
4231 netif_tx_stop_all_queues(vsi->netdev);
4232 }
4233 break;
4234
4235 case I40E_VSI_SRIOV:
4236 break;
4237
4238 case I40E_VSI_VMDQ2:
4239 case I40E_VSI_CTRL:
4240 case I40E_VSI_MIRROR:
4241 default:
4242 /* there is no notification for other VSIs */
4243 break;
4244 }
4245 }
4246
4247 /**
4248 * i40e_veb_link_event - notify elements on the veb of a link event
4249 * @veb: veb to be notified
4250 * @link_up: link up or down
4251 **/
4252 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4253 {
4254 struct i40e_pf *pf;
4255 int i;
4256
4257 if (!veb || !veb->pf)
4258 return;
4259 pf = veb->pf;
4260
4261 /* depth first... */
4262 for (i = 0; i < I40E_MAX_VEB; i++)
4263 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4264 i40e_veb_link_event(pf->veb[i], link_up);
4265
4266 /* ... now the local VSIs */
4267 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4268 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4269 i40e_vsi_link_event(pf->vsi[i], link_up);
4270 }
4271
4272 /**
4273 * i40e_link_event - Update netif_carrier status
4274 * @pf: board private structure
4275 **/
4276 static void i40e_link_event(struct i40e_pf *pf)
4277 {
4278 bool new_link, old_link;
4279
4280 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4281 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4282
4283 if (new_link == old_link)
4284 return;
4285
4286 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4287 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4288 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4289
4290 /* Notify the base of the switch tree connected to
4291 * the link. Floating VEBs are not notified.
4292 */
4293 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4294 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4295 else
4296 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4297
4298 if (pf->vf)
4299 i40e_vc_notify_link_state(pf);
4300 }
4301
4302 /**
4303 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4304 * @pf: board private structure
4305 *
4306 * Set the per-queue flags to request a check for stuck queues in the irq
4307 * clean functions, then force interrupts to be sure the irq clean is called.
4308 **/
4309 static void i40e_check_hang_subtask(struct i40e_pf *pf)
4310 {
4311 int i, v;
4312
4313 /* If we're down or resetting, just bail */
4314 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4315 return;
4316
4317 /* for each VSI/netdev
4318 * for each Tx queue
4319 * set the check flag
4320 * for each q_vector
4321 * force an interrupt
4322 */
4323 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4324 struct i40e_vsi *vsi = pf->vsi[v];
4325 int armed = 0;
4326
4327 if (!pf->vsi[v] ||
4328 test_bit(__I40E_DOWN, &vsi->state) ||
4329 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4330 continue;
4331
4332 for (i = 0; i < vsi->num_queue_pairs; i++) {
4333 set_check_for_tx_hang(vsi->tx_rings[i]);
4334 if (test_bit(__I40E_HANG_CHECK_ARMED,
4335 &vsi->tx_rings[i]->state))
4336 armed++;
4337 }
4338
4339 if (armed) {
4340 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4341 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4342 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4343 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4344 } else {
4345 u16 vec = vsi->base_vector - 1;
4346 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4347 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4348 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4349 wr32(&vsi->back->hw,
4350 I40E_PFINT_DYN_CTLN(vec), val);
4351 }
4352 i40e_flush(&vsi->back->hw);
4353 }
4354 }
4355 }
4356
4357 /**
4358 * i40e_watchdog_subtask - Check and bring link up
4359 * @pf: board private structure
4360 **/
4361 static void i40e_watchdog_subtask(struct i40e_pf *pf)
4362 {
4363 int i;
4364
4365 /* if interface is down do nothing */
4366 if (test_bit(__I40E_DOWN, &pf->state) ||
4367 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4368 return;
4369
4370 /* Update the stats for active netdevs so the network stack
4371 * can look at updated numbers whenever it cares to
4372 */
4373 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4374 if (pf->vsi[i] && pf->vsi[i]->netdev)
4375 i40e_update_stats(pf->vsi[i]);
4376
4377 /* Update the stats for the active switching components */
4378 for (i = 0; i < I40E_MAX_VEB; i++)
4379 if (pf->veb[i])
4380 i40e_update_veb_stats(pf->veb[i]);
4381 }
4382
4383 /**
4384 * i40e_reset_subtask - Set up for resetting the device and driver
4385 * @pf: board private structure
4386 **/
4387 static void i40e_reset_subtask(struct i40e_pf *pf)
4388 {
4389 u32 reset_flags = 0;
4390
4391 rtnl_lock();
4392 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4393 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4394 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4395 }
4396 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4397 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4398 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4399 }
4400 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4401 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4402 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4403 }
4404 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4405 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4406 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4407 }
4408
4409 /* If there's a recovery already waiting, it takes
4410 * precedence before starting a new reset sequence.
4411 */
4412 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4413 i40e_handle_reset_warning(pf);
4414 goto unlock;
4415 }
4416
4417 /* If we're already down or resetting, just bail */
4418 if (reset_flags &&
4419 !test_bit(__I40E_DOWN, &pf->state) &&
4420 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4421 i40e_do_reset(pf, reset_flags);
4422
4423 unlock:
4424 rtnl_unlock();
4425 }
4426
4427 /**
4428 * i40e_handle_link_event - Handle link event
4429 * @pf: board private structure
4430 * @e: event info posted on ARQ
4431 **/
4432 static void i40e_handle_link_event(struct i40e_pf *pf,
4433 struct i40e_arq_event_info *e)
4434 {
4435 struct i40e_hw *hw = &pf->hw;
4436 struct i40e_aqc_get_link_status *status =
4437 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4438 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4439
4440 /* save off old link status information */
4441 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4442 sizeof(pf->hw.phy.link_info_old));
4443
4444 /* update link status */
4445 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4446 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4447 hw_link_info->link_info = status->link_info;
4448 hw_link_info->an_info = status->an_info;
4449 hw_link_info->ext_info = status->ext_info;
4450 hw_link_info->lse_enable =
4451 le16_to_cpu(status->command_flags) &
4452 I40E_AQ_LSE_ENABLE;
4453
4454 /* process the event */
4455 i40e_link_event(pf);
4456
4457 /* Do a new status request to re-enable LSE reporting
4458 * and load new status information into the hw struct,
4459 * then see if the status changed while processing the
4460 * initial event.
4461 */
4462 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
4463 i40e_link_event(pf);
4464 }
4465
4466 /**
4467 * i40e_clean_adminq_subtask - Clean the AdminQ rings
4468 * @pf: board private structure
4469 **/
4470 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
4471 {
4472 struct i40e_arq_event_info event;
4473 struct i40e_hw *hw = &pf->hw;
4474 u16 pending, i = 0;
4475 i40e_status ret;
4476 u16 opcode;
4477 u32 val;
4478
4479 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
4480 return;
4481
4482 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
4483 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
4484 if (!event.msg_buf)
4485 return;
4486
4487 do {
4488 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
4489 ret = i40e_clean_arq_element(hw, &event, &pending);
4490 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
4491 dev_info(&pf->pdev->dev, "No ARQ event found\n");
4492 break;
4493 } else if (ret) {
4494 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
4495 break;
4496 }
4497
4498 opcode = le16_to_cpu(event.desc.opcode);
4499 switch (opcode) {
4500
4501 case i40e_aqc_opc_get_link_status:
4502 i40e_handle_link_event(pf, &event);
4503 break;
4504 case i40e_aqc_opc_send_msg_to_pf:
4505 ret = i40e_vc_process_vf_msg(pf,
4506 le16_to_cpu(event.desc.retval),
4507 le32_to_cpu(event.desc.cookie_high),
4508 le32_to_cpu(event.desc.cookie_low),
4509 event.msg_buf,
4510 event.msg_size);
4511 break;
4512 case i40e_aqc_opc_lldp_update_mib:
4513 dev_info(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
4514 break;
4515 case i40e_aqc_opc_event_lan_overflow:
4516 dev_info(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
4517 i40e_handle_lan_overflow_event(pf, &event);
4518 break;
4519 default:
4520 dev_info(&pf->pdev->dev,
4521 "ARQ Error: Unknown event %d received\n",
4522 event.desc.opcode);
4523 break;
4524 }
4525 } while (pending && (i++ < pf->adminq_work_limit));
4526
4527 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
4528 /* re-enable Admin queue interrupt cause */
4529 val = rd32(hw, I40E_PFINT_ICR0_ENA);
4530 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4531 wr32(hw, I40E_PFINT_ICR0_ENA, val);
4532 i40e_flush(hw);
4533
4534 kfree(event.msg_buf);
4535 }
4536
4537 /**
4538 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
4539 * @veb: pointer to the VEB instance
4540 *
4541 * This is a recursive function that first builds the attached VSIs then
4542 * recurses in to build the next layer of VEB. We track the connections
4543 * through our own index numbers because the seid's from the HW could
4544 * change across the reset.
4545 **/
4546 static int i40e_reconstitute_veb(struct i40e_veb *veb)
4547 {
4548 struct i40e_vsi *ctl_vsi = NULL;
4549 struct i40e_pf *pf = veb->pf;
4550 int v, veb_idx;
4551 int ret;
4552
4553 /* build VSI that owns this VEB, temporarily attached to base VEB */
4554 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
4555 if (pf->vsi[v] &&
4556 pf->vsi[v]->veb_idx == veb->idx &&
4557 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
4558 ctl_vsi = pf->vsi[v];
4559 break;
4560 }
4561 }
4562 if (!ctl_vsi) {
4563 dev_info(&pf->pdev->dev,
4564 "missing owner VSI for veb_idx %d\n", veb->idx);
4565 ret = -ENOENT;
4566 goto end_reconstitute;
4567 }
4568 if (ctl_vsi != pf->vsi[pf->lan_vsi])
4569 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
4570 ret = i40e_add_vsi(ctl_vsi);
4571 if (ret) {
4572 dev_info(&pf->pdev->dev,
4573 "rebuild of owner VSI failed: %d\n", ret);
4574 goto end_reconstitute;
4575 }
4576 i40e_vsi_reset_stats(ctl_vsi);
4577
4578 /* create the VEB in the switch and move the VSI onto the VEB */
4579 ret = i40e_add_veb(veb, ctl_vsi);
4580 if (ret)
4581 goto end_reconstitute;
4582
4583 /* create the remaining VSIs attached to this VEB */
4584 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4585 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
4586 continue;
4587
4588 if (pf->vsi[v]->veb_idx == veb->idx) {
4589 struct i40e_vsi *vsi = pf->vsi[v];
4590 vsi->uplink_seid = veb->seid;
4591 ret = i40e_add_vsi(vsi);
4592 if (ret) {
4593 dev_info(&pf->pdev->dev,
4594 "rebuild of vsi_idx %d failed: %d\n",
4595 v, ret);
4596 goto end_reconstitute;
4597 }
4598 i40e_vsi_reset_stats(vsi);
4599 }
4600 }
4601
4602 /* create any VEBs attached to this VEB - RECURSION */
4603 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
4604 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
4605 pf->veb[veb_idx]->uplink_seid = veb->seid;
4606 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
4607 if (ret)
4608 break;
4609 }
4610 }
4611
4612 end_reconstitute:
4613 return ret;
4614 }
4615
4616 /**
4617 * i40e_get_capabilities - get info about the HW
4618 * @pf: the PF struct
4619 **/
4620 static int i40e_get_capabilities(struct i40e_pf *pf)
4621 {
4622 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
4623 u16 data_size;
4624 int buf_len;
4625 int err;
4626
4627 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
4628 do {
4629 cap_buf = kzalloc(buf_len, GFP_KERNEL);
4630 if (!cap_buf)
4631 return -ENOMEM;
4632
4633 /* this loads the data into the hw struct for us */
4634 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
4635 &data_size,
4636 i40e_aqc_opc_list_func_capabilities,
4637 NULL);
4638 /* data loaded, buffer no longer needed */
4639 kfree(cap_buf);
4640
4641 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
4642 /* retry with a larger buffer */
4643 buf_len = data_size;
4644 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
4645 dev_info(&pf->pdev->dev,
4646 "capability discovery failed: aq=%d\n",
4647 pf->hw.aq.asq_last_status);
4648 return -ENODEV;
4649 }
4650 } while (err);
4651
4652 if (pf->hw.revision_id == 0 && pf->hw.func_caps.npar_enable) {
4653 pf->hw.func_caps.num_msix_vectors += 1;
4654 pf->hw.func_caps.num_tx_qp =
4655 min_t(int, pf->hw.func_caps.num_tx_qp,
4656 I40E_MAX_NPAR_QPS);
4657 }
4658
4659 if (pf->hw.debug_mask & I40E_DEBUG_USER)
4660 dev_info(&pf->pdev->dev,
4661 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
4662 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
4663 pf->hw.func_caps.num_msix_vectors,
4664 pf->hw.func_caps.num_msix_vectors_vf,
4665 pf->hw.func_caps.fd_filters_guaranteed,
4666 pf->hw.func_caps.fd_filters_best_effort,
4667 pf->hw.func_caps.num_tx_qp,
4668 pf->hw.func_caps.num_vsis);
4669
4670 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
4671 + pf->hw.func_caps.num_vfs)
4672 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
4673 dev_info(&pf->pdev->dev,
4674 "got num_vsis %d, setting num_vsis to %d\n",
4675 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
4676 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
4677 }
4678
4679 return 0;
4680 }
4681
4682 /**
4683 * i40e_fdir_setup - initialize the Flow Director resources
4684 * @pf: board private structure
4685 **/
4686 static void i40e_fdir_setup(struct i40e_pf *pf)
4687 {
4688 struct i40e_vsi *vsi;
4689 bool new_vsi = false;
4690 int err, i;
4691
4692 if (!(pf->flags & (I40E_FLAG_FDIR_ENABLED |
4693 I40E_FLAG_FDIR_ATR_ENABLED)))
4694 return;
4695
4696 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
4697
4698 /* find existing or make new FDIR VSI */
4699 vsi = NULL;
4700 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4701 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR)
4702 vsi = pf->vsi[i];
4703 if (!vsi) {
4704 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR, pf->mac_seid, 0);
4705 if (!vsi) {
4706 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
4707 pf->flags &= ~I40E_FLAG_FDIR_ENABLED;
4708 return;
4709 }
4710 new_vsi = true;
4711 }
4712 WARN_ON(vsi->base_queue != I40E_FDIR_RING);
4713 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_rings);
4714
4715 err = i40e_vsi_setup_tx_resources(vsi);
4716 if (!err)
4717 err = i40e_vsi_setup_rx_resources(vsi);
4718 if (!err)
4719 err = i40e_vsi_configure(vsi);
4720 if (!err && new_vsi) {
4721 char int_name[IFNAMSIZ + 9];
4722 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4723 dev_driver_string(&pf->pdev->dev));
4724 err = i40e_vsi_request_irq(vsi, int_name);
4725 }
4726 if (!err)
4727 err = i40e_up_complete(vsi);
4728
4729 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4730 }
4731
4732 /**
4733 * i40e_fdir_teardown - release the Flow Director resources
4734 * @pf: board private structure
4735 **/
4736 static void i40e_fdir_teardown(struct i40e_pf *pf)
4737 {
4738 int i;
4739
4740 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
4741 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
4742 i40e_vsi_release(pf->vsi[i]);
4743 break;
4744 }
4745 }
4746 }
4747
4748 /**
4749 * i40e_prep_for_reset - prep for the core to reset
4750 * @pf: board private structure
4751 *
4752 * Close up the VFs and other things in prep for pf Reset.
4753 **/
4754 static int i40e_prep_for_reset(struct i40e_pf *pf)
4755 {
4756 struct i40e_hw *hw = &pf->hw;
4757 i40e_status ret;
4758 u32 v;
4759
4760 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
4761 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
4762 return 0;
4763
4764 dev_info(&pf->pdev->dev, "Tearing down internal switch for reset\n");
4765
4766 if (i40e_check_asq_alive(hw))
4767 i40e_vc_notify_reset(pf);
4768
4769 /* quiesce the VSIs and their queues that are not already DOWN */
4770 i40e_pf_quiesce_all_vsi(pf);
4771
4772 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4773 if (pf->vsi[v])
4774 pf->vsi[v]->seid = 0;
4775 }
4776
4777 i40e_shutdown_adminq(&pf->hw);
4778
4779 /* call shutdown HMC */
4780 ret = i40e_shutdown_lan_hmc(hw);
4781 if (ret) {
4782 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
4783 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
4784 }
4785 return ret;
4786 }
4787
4788 /**
4789 * i40e_reset_and_rebuild - reset and rebuid using a saved config
4790 * @pf: board private structure
4791 * @reinit: if the Main VSI needs to re-initialized.
4792 **/
4793 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
4794 {
4795 struct i40e_driver_version dv;
4796 struct i40e_hw *hw = &pf->hw;
4797 i40e_status ret;
4798 u32 v;
4799
4800 /* Now we wait for GRST to settle out.
4801 * We don't have to delete the VEBs or VSIs from the hw switch
4802 * because the reset will make them disappear.
4803 */
4804 ret = i40e_pf_reset(hw);
4805 if (ret)
4806 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
4807 pf->pfr_count++;
4808
4809 if (test_bit(__I40E_DOWN, &pf->state))
4810 goto end_core_reset;
4811 dev_info(&pf->pdev->dev, "Rebuilding internal switch\n");
4812
4813 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
4814 ret = i40e_init_adminq(&pf->hw);
4815 if (ret) {
4816 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
4817 goto end_core_reset;
4818 }
4819
4820 ret = i40e_get_capabilities(pf);
4821 if (ret) {
4822 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
4823 ret);
4824 goto end_core_reset;
4825 }
4826
4827 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
4828 hw->func_caps.num_rx_qp,
4829 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
4830 if (ret) {
4831 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
4832 goto end_core_reset;
4833 }
4834 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
4835 if (ret) {
4836 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
4837 goto end_core_reset;
4838 }
4839
4840 /* do basic switch setup */
4841 ret = i40e_setup_pf_switch(pf, reinit);
4842 if (ret)
4843 goto end_core_reset;
4844
4845 /* Rebuild the VSIs and VEBs that existed before reset.
4846 * They are still in our local switch element arrays, so only
4847 * need to rebuild the switch model in the HW.
4848 *
4849 * If there were VEBs but the reconstitution failed, we'll try
4850 * try to recover minimal use by getting the basic PF VSI working.
4851 */
4852 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
4853 dev_info(&pf->pdev->dev, "attempting to rebuild switch\n");
4854 /* find the one VEB connected to the MAC, and find orphans */
4855 for (v = 0; v < I40E_MAX_VEB; v++) {
4856 if (!pf->veb[v])
4857 continue;
4858
4859 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
4860 pf->veb[v]->uplink_seid == 0) {
4861 ret = i40e_reconstitute_veb(pf->veb[v]);
4862
4863 if (!ret)
4864 continue;
4865
4866 /* If Main VEB failed, we're in deep doodoo,
4867 * so give up rebuilding the switch and set up
4868 * for minimal rebuild of PF VSI.
4869 * If orphan failed, we'll report the error
4870 * but try to keep going.
4871 */
4872 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
4873 dev_info(&pf->pdev->dev,
4874 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
4875 ret);
4876 pf->vsi[pf->lan_vsi]->uplink_seid
4877 = pf->mac_seid;
4878 break;
4879 } else if (pf->veb[v]->uplink_seid == 0) {
4880 dev_info(&pf->pdev->dev,
4881 "rebuild of orphan VEB failed: %d\n",
4882 ret);
4883 }
4884 }
4885 }
4886 }
4887
4888 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
4889 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
4890 /* no VEB, so rebuild only the Main VSI */
4891 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
4892 if (ret) {
4893 dev_info(&pf->pdev->dev,
4894 "rebuild of Main VSI failed: %d\n", ret);
4895 goto end_core_reset;
4896 }
4897 }
4898
4899 /* reinit the misc interrupt */
4900 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4901 ret = i40e_setup_misc_vector(pf);
4902
4903 /* restart the VSIs that were rebuilt and running before the reset */
4904 i40e_pf_unquiesce_all_vsi(pf);
4905
4906 /* tell the firmware that we're starting */
4907 dv.major_version = DRV_VERSION_MAJOR;
4908 dv.minor_version = DRV_VERSION_MINOR;
4909 dv.build_version = DRV_VERSION_BUILD;
4910 dv.subbuild_version = 0;
4911 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
4912
4913 dev_info(&pf->pdev->dev, "PF reset done\n");
4914
4915 end_core_reset:
4916 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
4917 }
4918
4919 /**
4920 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
4921 * @pf: board private structure
4922 *
4923 * Close up the VFs and other things in prep for a Core Reset,
4924 * then get ready to rebuild the world.
4925 **/
4926 static void i40e_handle_reset_warning(struct i40e_pf *pf)
4927 {
4928 i40e_status ret;
4929
4930 ret = i40e_prep_for_reset(pf);
4931 if (!ret)
4932 i40e_reset_and_rebuild(pf, false);
4933 }
4934
4935 /**
4936 * i40e_handle_mdd_event
4937 * @pf: pointer to the pf structure
4938 *
4939 * Called from the MDD irq handler to identify possibly malicious vfs
4940 **/
4941 static void i40e_handle_mdd_event(struct i40e_pf *pf)
4942 {
4943 struct i40e_hw *hw = &pf->hw;
4944 bool mdd_detected = false;
4945 struct i40e_vf *vf;
4946 u32 reg;
4947 int i;
4948
4949 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
4950 return;
4951
4952 /* find what triggered the MDD event */
4953 reg = rd32(hw, I40E_GL_MDET_TX);
4954 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
4955 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
4956 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
4957 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
4958 >> I40E_GL_MDET_TX_EVENT_SHIFT;
4959 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
4960 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
4961 dev_info(&pf->pdev->dev,
4962 "Malicious Driver Detection TX event 0x%02x on q %d of function 0x%02x\n",
4963 event, queue, func);
4964 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
4965 mdd_detected = true;
4966 }
4967 reg = rd32(hw, I40E_GL_MDET_RX);
4968 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
4969 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
4970 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
4971 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
4972 >> I40E_GL_MDET_RX_EVENT_SHIFT;
4973 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
4974 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
4975 dev_info(&pf->pdev->dev,
4976 "Malicious Driver Detection RX event 0x%02x on q %d of function 0x%02x\n",
4977 event, queue, func);
4978 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
4979 mdd_detected = true;
4980 }
4981
4982 /* see if one of the VFs needs its hand slapped */
4983 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
4984 vf = &(pf->vf[i]);
4985 reg = rd32(hw, I40E_VP_MDET_TX(i));
4986 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
4987 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
4988 vf->num_mdd_events++;
4989 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
4990 }
4991
4992 reg = rd32(hw, I40E_VP_MDET_RX(i));
4993 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
4994 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
4995 vf->num_mdd_events++;
4996 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
4997 }
4998
4999 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5000 dev_info(&pf->pdev->dev,
5001 "Too many MDD events on VF %d, disabled\n", i);
5002 dev_info(&pf->pdev->dev,
5003 "Use PF Control I/F to re-enable the VF\n");
5004 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5005 }
5006 }
5007
5008 /* re-enable mdd interrupt cause */
5009 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5010 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5011 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5012 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5013 i40e_flush(hw);
5014 }
5015
5016 #ifdef CONFIG_I40E_VXLAN
5017 /**
5018 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5019 * @pf: board private structure
5020 **/
5021 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5022 {
5023 const int vxlan_hdr_qwords = 4;
5024 struct i40e_hw *hw = &pf->hw;
5025 i40e_status ret;
5026 u8 filter_index;
5027 __be16 port;
5028 int i;
5029
5030 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5031 return;
5032
5033 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5034
5035 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5036 if (pf->pending_vxlan_bitmap & (1 << i)) {
5037 pf->pending_vxlan_bitmap &= ~(1 << i);
5038 port = pf->vxlan_ports[i];
5039 ret = port ?
5040 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5041 vxlan_hdr_qwords,
5042 I40E_AQC_TUNNEL_TYPE_VXLAN,
5043 &filter_index, NULL)
5044 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5045
5046 if (ret) {
5047 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5048 port ? "adding" : "deleting",
5049 ntohs(port), port ? i : i);
5050
5051 pf->vxlan_ports[i] = 0;
5052 } else {
5053 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5054 port ? "Added" : "Deleted",
5055 ntohs(port), port ? i : filter_index);
5056 }
5057 }
5058 }
5059 }
5060
5061 #endif
5062 /**
5063 * i40e_service_task - Run the driver's async subtasks
5064 * @work: pointer to work_struct containing our data
5065 **/
5066 static void i40e_service_task(struct work_struct *work)
5067 {
5068 struct i40e_pf *pf = container_of(work,
5069 struct i40e_pf,
5070 service_task);
5071 unsigned long start_time = jiffies;
5072
5073 i40e_reset_subtask(pf);
5074 i40e_handle_mdd_event(pf);
5075 i40e_vc_process_vflr_event(pf);
5076 i40e_watchdog_subtask(pf);
5077 i40e_fdir_reinit_subtask(pf);
5078 i40e_check_hang_subtask(pf);
5079 i40e_sync_filters_subtask(pf);
5080 #ifdef CONFIG_I40E_VXLAN
5081 i40e_sync_vxlan_filters_subtask(pf);
5082 #endif
5083 i40e_clean_adminq_subtask(pf);
5084
5085 i40e_service_event_complete(pf);
5086
5087 /* If the tasks have taken longer than one timer cycle or there
5088 * is more work to be done, reschedule the service task now
5089 * rather than wait for the timer to tick again.
5090 */
5091 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5092 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5093 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5094 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5095 i40e_service_event_schedule(pf);
5096 }
5097
5098 /**
5099 * i40e_service_timer - timer callback
5100 * @data: pointer to PF struct
5101 **/
5102 static void i40e_service_timer(unsigned long data)
5103 {
5104 struct i40e_pf *pf = (struct i40e_pf *)data;
5105
5106 mod_timer(&pf->service_timer,
5107 round_jiffies(jiffies + pf->service_timer_period));
5108 i40e_service_event_schedule(pf);
5109 }
5110
5111 /**
5112 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5113 * @vsi: the VSI being configured
5114 **/
5115 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5116 {
5117 struct i40e_pf *pf = vsi->back;
5118
5119 switch (vsi->type) {
5120 case I40E_VSI_MAIN:
5121 vsi->alloc_queue_pairs = pf->num_lan_qps;
5122 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5123 I40E_REQ_DESCRIPTOR_MULTIPLE);
5124 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5125 vsi->num_q_vectors = pf->num_lan_msix;
5126 else
5127 vsi->num_q_vectors = 1;
5128
5129 break;
5130
5131 case I40E_VSI_FDIR:
5132 vsi->alloc_queue_pairs = 1;
5133 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5134 I40E_REQ_DESCRIPTOR_MULTIPLE);
5135 vsi->num_q_vectors = 1;
5136 break;
5137
5138 case I40E_VSI_VMDQ2:
5139 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5140 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5141 I40E_REQ_DESCRIPTOR_MULTIPLE);
5142 vsi->num_q_vectors = pf->num_vmdq_msix;
5143 break;
5144
5145 case I40E_VSI_SRIOV:
5146 vsi->alloc_queue_pairs = pf->num_vf_qps;
5147 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5148 I40E_REQ_DESCRIPTOR_MULTIPLE);
5149 break;
5150
5151 default:
5152 WARN_ON(1);
5153 return -ENODATA;
5154 }
5155
5156 return 0;
5157 }
5158
5159 /**
5160 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5161 * @type: VSI pointer
5162 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5163 *
5164 * On error: returns error code (negative)
5165 * On success: returns 0
5166 **/
5167 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5168 {
5169 int size;
5170 int ret = 0;
5171
5172 /* allocate memory for both Tx and Rx ring pointers */
5173 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5174 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5175 if (!vsi->tx_rings)
5176 return -ENOMEM;
5177 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5178
5179 if (alloc_qvectors) {
5180 /* allocate memory for q_vector pointers */
5181 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5182 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5183 if (!vsi->q_vectors) {
5184 ret = -ENOMEM;
5185 goto err_vectors;
5186 }
5187 }
5188 return ret;
5189
5190 err_vectors:
5191 kfree(vsi->tx_rings);
5192 return ret;
5193 }
5194
5195 /**
5196 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5197 * @pf: board private structure
5198 * @type: type of VSI
5199 *
5200 * On error: returns error code (negative)
5201 * On success: returns vsi index in PF (positive)
5202 **/
5203 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5204 {
5205 int ret = -ENODEV;
5206 struct i40e_vsi *vsi;
5207 int vsi_idx;
5208 int i;
5209
5210 /* Need to protect the allocation of the VSIs at the PF level */
5211 mutex_lock(&pf->switch_mutex);
5212
5213 /* VSI list may be fragmented if VSI creation/destruction has
5214 * been happening. We can afford to do a quick scan to look
5215 * for any free VSIs in the list.
5216 *
5217 * find next empty vsi slot, looping back around if necessary
5218 */
5219 i = pf->next_vsi;
5220 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5221 i++;
5222 if (i >= pf->hw.func_caps.num_vsis) {
5223 i = 0;
5224 while (i < pf->next_vsi && pf->vsi[i])
5225 i++;
5226 }
5227
5228 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5229 vsi_idx = i; /* Found one! */
5230 } else {
5231 ret = -ENODEV;
5232 goto unlock_pf; /* out of VSI slots! */
5233 }
5234 pf->next_vsi = ++i;
5235
5236 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5237 if (!vsi) {
5238 ret = -ENOMEM;
5239 goto unlock_pf;
5240 }
5241 vsi->type = type;
5242 vsi->back = pf;
5243 set_bit(__I40E_DOWN, &vsi->state);
5244 vsi->flags = 0;
5245 vsi->idx = vsi_idx;
5246 vsi->rx_itr_setting = pf->rx_itr_default;
5247 vsi->tx_itr_setting = pf->tx_itr_default;
5248 vsi->netdev_registered = false;
5249 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5250 INIT_LIST_HEAD(&vsi->mac_filter_list);
5251
5252 ret = i40e_set_num_rings_in_vsi(vsi);
5253 if (ret)
5254 goto err_rings;
5255
5256 ret = i40e_vsi_alloc_arrays(vsi, true);
5257 if (ret)
5258 goto err_rings;
5259
5260 /* Setup default MSIX irq handler for VSI */
5261 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5262
5263 pf->vsi[vsi_idx] = vsi;
5264 ret = vsi_idx;
5265 goto unlock_pf;
5266
5267 err_rings:
5268 pf->next_vsi = i - 1;
5269 kfree(vsi);
5270 unlock_pf:
5271 mutex_unlock(&pf->switch_mutex);
5272 return ret;
5273 }
5274
5275 /**
5276 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5277 * @type: VSI pointer
5278 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5279 *
5280 * On error: returns error code (negative)
5281 * On success: returns 0
5282 **/
5283 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5284 {
5285 /* free the ring and vector containers */
5286 if (free_qvectors) {
5287 kfree(vsi->q_vectors);
5288 vsi->q_vectors = NULL;
5289 }
5290 kfree(vsi->tx_rings);
5291 vsi->tx_rings = NULL;
5292 vsi->rx_rings = NULL;
5293 }
5294
5295 /**
5296 * i40e_vsi_clear - Deallocate the VSI provided
5297 * @vsi: the VSI being un-configured
5298 **/
5299 static int i40e_vsi_clear(struct i40e_vsi *vsi)
5300 {
5301 struct i40e_pf *pf;
5302
5303 if (!vsi)
5304 return 0;
5305
5306 if (!vsi->back)
5307 goto free_vsi;
5308 pf = vsi->back;
5309
5310 mutex_lock(&pf->switch_mutex);
5311 if (!pf->vsi[vsi->idx]) {
5312 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5313 vsi->idx, vsi->idx, vsi, vsi->type);
5314 goto unlock_vsi;
5315 }
5316
5317 if (pf->vsi[vsi->idx] != vsi) {
5318 dev_err(&pf->pdev->dev,
5319 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5320 pf->vsi[vsi->idx]->idx,
5321 pf->vsi[vsi->idx],
5322 pf->vsi[vsi->idx]->type,
5323 vsi->idx, vsi, vsi->type);
5324 goto unlock_vsi;
5325 }
5326
5327 /* updates the pf for this cleared vsi */
5328 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5329 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5330
5331 i40e_vsi_free_arrays(vsi, true);
5332
5333 pf->vsi[vsi->idx] = NULL;
5334 if (vsi->idx < pf->next_vsi)
5335 pf->next_vsi = vsi->idx;
5336
5337 unlock_vsi:
5338 mutex_unlock(&pf->switch_mutex);
5339 free_vsi:
5340 kfree(vsi);
5341
5342 return 0;
5343 }
5344
5345 /**
5346 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5347 * @vsi: the VSI being cleaned
5348 **/
5349 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5350 {
5351 int i;
5352
5353 if (vsi->tx_rings[0]) {
5354 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5355 kfree_rcu(vsi->tx_rings[i], rcu);
5356 vsi->tx_rings[i] = NULL;
5357 vsi->rx_rings[i] = NULL;
5358 }
5359 }
5360 }
5361
5362 /**
5363 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5364 * @vsi: the VSI being configured
5365 **/
5366 static int i40e_alloc_rings(struct i40e_vsi *vsi)
5367 {
5368 struct i40e_pf *pf = vsi->back;
5369 int i;
5370
5371 /* Set basic values in the rings to be used later during open() */
5372 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5373 struct i40e_ring *tx_ring;
5374 struct i40e_ring *rx_ring;
5375
5376 /* allocate space for both Tx and Rx in one shot */
5377 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
5378 if (!tx_ring)
5379 goto err_out;
5380
5381 tx_ring->queue_index = i;
5382 tx_ring->reg_idx = vsi->base_queue + i;
5383 tx_ring->ring_active = false;
5384 tx_ring->vsi = vsi;
5385 tx_ring->netdev = vsi->netdev;
5386 tx_ring->dev = &pf->pdev->dev;
5387 tx_ring->count = vsi->num_desc;
5388 tx_ring->size = 0;
5389 tx_ring->dcb_tc = 0;
5390 vsi->tx_rings[i] = tx_ring;
5391
5392 rx_ring = &tx_ring[1];
5393 rx_ring->queue_index = i;
5394 rx_ring->reg_idx = vsi->base_queue + i;
5395 rx_ring->ring_active = false;
5396 rx_ring->vsi = vsi;
5397 rx_ring->netdev = vsi->netdev;
5398 rx_ring->dev = &pf->pdev->dev;
5399 rx_ring->count = vsi->num_desc;
5400 rx_ring->size = 0;
5401 rx_ring->dcb_tc = 0;
5402 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
5403 set_ring_16byte_desc_enabled(rx_ring);
5404 else
5405 clear_ring_16byte_desc_enabled(rx_ring);
5406 vsi->rx_rings[i] = rx_ring;
5407 }
5408
5409 return 0;
5410
5411 err_out:
5412 i40e_vsi_clear_rings(vsi);
5413 return -ENOMEM;
5414 }
5415
5416 /**
5417 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
5418 * @pf: board private structure
5419 * @vectors: the number of MSI-X vectors to request
5420 *
5421 * Returns the number of vectors reserved, or error
5422 **/
5423 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
5424 {
5425 int err = 0;
5426
5427 pf->num_msix_entries = 0;
5428 while (vectors >= I40E_MIN_MSIX) {
5429 err = pci_enable_msix(pf->pdev, pf->msix_entries, vectors);
5430 if (err == 0) {
5431 /* good to go */
5432 pf->num_msix_entries = vectors;
5433 break;
5434 } else if (err < 0) {
5435 /* total failure */
5436 dev_info(&pf->pdev->dev,
5437 "MSI-X vector reservation failed: %d\n", err);
5438 vectors = 0;
5439 break;
5440 } else {
5441 /* err > 0 is the hint for retry */
5442 dev_info(&pf->pdev->dev,
5443 "MSI-X vectors wanted %d, retrying with %d\n",
5444 vectors, err);
5445 vectors = err;
5446 }
5447 }
5448
5449 if (vectors > 0 && vectors < I40E_MIN_MSIX) {
5450 dev_info(&pf->pdev->dev,
5451 "Couldn't get enough vectors, only %d available\n",
5452 vectors);
5453 vectors = 0;
5454 }
5455
5456 return vectors;
5457 }
5458
5459 /**
5460 * i40e_init_msix - Setup the MSIX capability
5461 * @pf: board private structure
5462 *
5463 * Work with the OS to set up the MSIX vectors needed.
5464 *
5465 * Returns 0 on success, negative on failure
5466 **/
5467 static int i40e_init_msix(struct i40e_pf *pf)
5468 {
5469 i40e_status err = 0;
5470 struct i40e_hw *hw = &pf->hw;
5471 int v_budget, i;
5472 int vec;
5473
5474 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
5475 return -ENODEV;
5476
5477 /* The number of vectors we'll request will be comprised of:
5478 * - Add 1 for "other" cause for Admin Queue events, etc.
5479 * - The number of LAN queue pairs
5480 * - Queues being used for RSS.
5481 * We don't need as many as max_rss_size vectors.
5482 * use rss_size instead in the calculation since that
5483 * is governed by number of cpus in the system.
5484 * - assumes symmetric Tx/Rx pairing
5485 * - The number of VMDq pairs
5486 * Once we count this up, try the request.
5487 *
5488 * If we can't get what we want, we'll simplify to nearly nothing
5489 * and try again. If that still fails, we punt.
5490 */
5491 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
5492 pf->num_vmdq_msix = pf->num_vmdq_qps;
5493 v_budget = 1 + pf->num_lan_msix;
5494 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
5495 if (pf->flags & I40E_FLAG_FDIR_ENABLED)
5496 v_budget++;
5497
5498 /* Scale down if necessary, and the rings will share vectors */
5499 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
5500
5501 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
5502 GFP_KERNEL);
5503 if (!pf->msix_entries)
5504 return -ENOMEM;
5505
5506 for (i = 0; i < v_budget; i++)
5507 pf->msix_entries[i].entry = i;
5508 vec = i40e_reserve_msix_vectors(pf, v_budget);
5509 if (vec < I40E_MIN_MSIX) {
5510 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
5511 kfree(pf->msix_entries);
5512 pf->msix_entries = NULL;
5513 return -ENODEV;
5514
5515 } else if (vec == I40E_MIN_MSIX) {
5516 /* Adjust for minimal MSIX use */
5517 dev_info(&pf->pdev->dev, "Features disabled, not enough MSIX vectors\n");
5518 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
5519 pf->num_vmdq_vsis = 0;
5520 pf->num_vmdq_qps = 0;
5521 pf->num_vmdq_msix = 0;
5522 pf->num_lan_qps = 1;
5523 pf->num_lan_msix = 1;
5524
5525 } else if (vec != v_budget) {
5526 /* Scale vector usage down */
5527 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
5528 vec--; /* reserve the misc vector */
5529
5530 /* partition out the remaining vectors */
5531 switch (vec) {
5532 case 2:
5533 pf->num_vmdq_vsis = 1;
5534 pf->num_lan_msix = 1;
5535 break;
5536 case 3:
5537 pf->num_vmdq_vsis = 1;
5538 pf->num_lan_msix = 2;
5539 break;
5540 default:
5541 pf->num_lan_msix = min_t(int, (vec / 2),
5542 pf->num_lan_qps);
5543 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
5544 I40E_DEFAULT_NUM_VMDQ_VSI);
5545 break;
5546 }
5547 }
5548
5549 return err;
5550 }
5551
5552 /**
5553 * i40e_alloc_q_vector - Allocate memory for a single interrupt vector
5554 * @vsi: the VSI being configured
5555 * @v_idx: index of the vector in the vsi struct
5556 *
5557 * We allocate one q_vector. If allocation fails we return -ENOMEM.
5558 **/
5559 static int i40e_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
5560 {
5561 struct i40e_q_vector *q_vector;
5562
5563 /* allocate q_vector */
5564 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
5565 if (!q_vector)
5566 return -ENOMEM;
5567
5568 q_vector->vsi = vsi;
5569 q_vector->v_idx = v_idx;
5570 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
5571 if (vsi->netdev)
5572 netif_napi_add(vsi->netdev, &q_vector->napi,
5573 i40e_napi_poll, vsi->work_limit);
5574
5575 q_vector->rx.latency_range = I40E_LOW_LATENCY;
5576 q_vector->tx.latency_range = I40E_LOW_LATENCY;
5577
5578 /* tie q_vector and vsi together */
5579 vsi->q_vectors[v_idx] = q_vector;
5580
5581 return 0;
5582 }
5583
5584 /**
5585 * i40e_alloc_q_vectors - Allocate memory for interrupt vectors
5586 * @vsi: the VSI being configured
5587 *
5588 * We allocate one q_vector per queue interrupt. If allocation fails we
5589 * return -ENOMEM.
5590 **/
5591 static int i40e_alloc_q_vectors(struct i40e_vsi *vsi)
5592 {
5593 struct i40e_pf *pf = vsi->back;
5594 int v_idx, num_q_vectors;
5595 int err;
5596
5597 /* if not MSIX, give the one vector only to the LAN VSI */
5598 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5599 num_q_vectors = vsi->num_q_vectors;
5600 else if (vsi == pf->vsi[pf->lan_vsi])
5601 num_q_vectors = 1;
5602 else
5603 return -EINVAL;
5604
5605 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
5606 err = i40e_alloc_q_vector(vsi, v_idx);
5607 if (err)
5608 goto err_out;
5609 }
5610
5611 return 0;
5612
5613 err_out:
5614 while (v_idx--)
5615 i40e_free_q_vector(vsi, v_idx);
5616
5617 return err;
5618 }
5619
5620 /**
5621 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
5622 * @pf: board private structure to initialize
5623 **/
5624 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
5625 {
5626 int err = 0;
5627
5628 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
5629 err = i40e_init_msix(pf);
5630 if (err) {
5631 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
5632 I40E_FLAG_RSS_ENABLED |
5633 I40E_FLAG_DCB_ENABLED |
5634 I40E_FLAG_SRIOV_ENABLED |
5635 I40E_FLAG_FDIR_ENABLED |
5636 I40E_FLAG_FDIR_ATR_ENABLED |
5637 I40E_FLAG_VMDQ_ENABLED);
5638
5639 /* rework the queue expectations without MSIX */
5640 i40e_determine_queue_usage(pf);
5641 }
5642 }
5643
5644 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
5645 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
5646 dev_info(&pf->pdev->dev, "MSIX not available, trying MSI\n");
5647 err = pci_enable_msi(pf->pdev);
5648 if (err) {
5649 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
5650 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
5651 }
5652 }
5653
5654 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
5655 dev_info(&pf->pdev->dev, "MSIX and MSI not available, falling back to Legacy IRQ\n");
5656
5657 /* track first vector for misc interrupts */
5658 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
5659 }
5660
5661 /**
5662 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
5663 * @pf: board private structure
5664 *
5665 * This sets up the handler for MSIX 0, which is used to manage the
5666 * non-queue interrupts, e.g. AdminQ and errors. This is not used
5667 * when in MSI or Legacy interrupt mode.
5668 **/
5669 static int i40e_setup_misc_vector(struct i40e_pf *pf)
5670 {
5671 struct i40e_hw *hw = &pf->hw;
5672 int err = 0;
5673
5674 /* Only request the irq if this is the first time through, and
5675 * not when we're rebuilding after a Reset
5676 */
5677 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
5678 err = request_irq(pf->msix_entries[0].vector,
5679 i40e_intr, 0, pf->misc_int_name, pf);
5680 if (err) {
5681 dev_info(&pf->pdev->dev,
5682 "request_irq for msix_misc failed: %d\n", err);
5683 return -EFAULT;
5684 }
5685 }
5686
5687 i40e_enable_misc_int_causes(hw);
5688
5689 /* associate no queues to the misc vector */
5690 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
5691 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
5692
5693 i40e_flush(hw);
5694
5695 i40e_irq_dynamic_enable_icr0(pf);
5696
5697 return err;
5698 }
5699
5700 /**
5701 * i40e_config_rss - Prepare for RSS if used
5702 * @pf: board private structure
5703 **/
5704 static int i40e_config_rss(struct i40e_pf *pf)
5705 {
5706 /* Set of random keys generated using kernel random number generator */
5707 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
5708 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
5709 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
5710 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
5711 struct i40e_hw *hw = &pf->hw;
5712 u32 lut = 0;
5713 int i, j;
5714 u64 hena;
5715
5716 /* Fill out hash function seed */
5717 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
5718 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
5719
5720 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
5721 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
5722 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
5723 hena |= I40E_DEFAULT_RSS_HENA;
5724 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
5725 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
5726
5727 /* Populate the LUT with max no. of queues in round robin fashion */
5728 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
5729
5730 /* The assumption is that lan qp count will be the highest
5731 * qp count for any PF VSI that needs RSS.
5732 * If multiple VSIs need RSS support, all the qp counts
5733 * for those VSIs should be a power of 2 for RSS to work.
5734 * If LAN VSI is the only consumer for RSS then this requirement
5735 * is not necessary.
5736 */
5737 if (j == pf->rss_size)
5738 j = 0;
5739 /* lut = 4-byte sliding window of 4 lut entries */
5740 lut = (lut << 8) | (j &
5741 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
5742 /* On i = 3, we have 4 entries in lut; write to the register */
5743 if ((i & 3) == 3)
5744 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
5745 }
5746 i40e_flush(hw);
5747
5748 return 0;
5749 }
5750
5751 /**
5752 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
5753 * @pf: board private structure
5754 * @queue_count: the requested queue count for rss.
5755 *
5756 * returns 0 if rss is not enabled, if enabled returns the final rss queue
5757 * count which may be different from the requested queue count.
5758 **/
5759 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
5760 {
5761 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
5762 return 0;
5763
5764 queue_count = min_t(int, queue_count, pf->rss_size_max);
5765 queue_count = rounddown_pow_of_two(queue_count);
5766
5767 if (queue_count != pf->rss_size) {
5768 if (pf->queues_left < (queue_count - pf->rss_size)) {
5769 dev_info(&pf->pdev->dev,
5770 "Not enough queues to do RSS on %d queues: remaining queues %d\n",
5771 queue_count, pf->queues_left);
5772 return pf->rss_size;
5773 }
5774 i40e_prep_for_reset(pf);
5775
5776 pf->num_lan_qps += (queue_count - pf->rss_size);
5777 pf->queues_left -= (queue_count - pf->rss_size);
5778 pf->rss_size = queue_count;
5779
5780 i40e_reset_and_rebuild(pf, true);
5781 i40e_config_rss(pf);
5782 }
5783 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
5784 return pf->rss_size;
5785 }
5786
5787 /**
5788 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
5789 * @pf: board private structure to initialize
5790 *
5791 * i40e_sw_init initializes the Adapter private data structure.
5792 * Fields are initialized based on PCI device information and
5793 * OS network device settings (MTU size).
5794 **/
5795 static int i40e_sw_init(struct i40e_pf *pf)
5796 {
5797 int err = 0;
5798 int size;
5799
5800 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
5801 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
5802 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
5803 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
5804 if (I40E_DEBUG_USER & debug)
5805 pf->hw.debug_mask = debug;
5806 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
5807 I40E_DEFAULT_MSG_ENABLE);
5808 }
5809
5810 /* Set default capability flags */
5811 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
5812 I40E_FLAG_MSI_ENABLED |
5813 I40E_FLAG_MSIX_ENABLED |
5814 I40E_FLAG_RX_PS_ENABLED |
5815 I40E_FLAG_RX_1BUF_ENABLED;
5816
5817 /* Depending on PF configurations, it is possible that the RSS
5818 * maximum might end up larger than the available queues
5819 */
5820 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
5821 pf->rss_size_max = min_t(int, pf->rss_size_max,
5822 pf->hw.func_caps.num_tx_qp);
5823 if (pf->hw.func_caps.rss) {
5824 pf->flags |= I40E_FLAG_RSS_ENABLED;
5825 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
5826 } else {
5827 pf->rss_size = 1;
5828 }
5829
5830 if (pf->hw.func_caps.dcb)
5831 pf->num_tc_qps = I40E_DEFAULT_QUEUES_PER_TC;
5832 else
5833 pf->num_tc_qps = 0;
5834
5835 if (pf->hw.func_caps.fd) {
5836 /* FW/NVM is not yet fixed in this regard */
5837 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
5838 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
5839 pf->flags |= I40E_FLAG_FDIR_ATR_ENABLED;
5840 dev_info(&pf->pdev->dev,
5841 "Flow Director ATR mode Enabled\n");
5842 pf->flags |= I40E_FLAG_FDIR_ENABLED;
5843 dev_info(&pf->pdev->dev,
5844 "Flow Director Side Band mode Enabled\n");
5845 pf->fdir_pf_filter_count =
5846 pf->hw.func_caps.fd_filters_guaranteed;
5847 }
5848 } else {
5849 pf->fdir_pf_filter_count = 0;
5850 }
5851
5852 if (pf->hw.func_caps.vmdq) {
5853 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
5854 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
5855 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
5856 }
5857
5858 /* MFP mode enabled */
5859 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
5860 pf->flags |= I40E_FLAG_MFP_ENABLED;
5861 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
5862 }
5863
5864 #ifdef CONFIG_PCI_IOV
5865 if (pf->hw.func_caps.num_vfs) {
5866 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
5867 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
5868 pf->num_req_vfs = min_t(int,
5869 pf->hw.func_caps.num_vfs,
5870 I40E_MAX_VF_COUNT);
5871 dev_info(&pf->pdev->dev,
5872 "Number of VFs being requested for PF[%d] = %d\n",
5873 pf->hw.pf_id, pf->num_req_vfs);
5874 }
5875 #endif /* CONFIG_PCI_IOV */
5876 pf->eeprom_version = 0xDEAD;
5877 pf->lan_veb = I40E_NO_VEB;
5878 pf->lan_vsi = I40E_NO_VSI;
5879
5880 /* set up queue assignment tracking */
5881 size = sizeof(struct i40e_lump_tracking)
5882 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
5883 pf->qp_pile = kzalloc(size, GFP_KERNEL);
5884 if (!pf->qp_pile) {
5885 err = -ENOMEM;
5886 goto sw_init_done;
5887 }
5888 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
5889 pf->qp_pile->search_hint = 0;
5890
5891 /* set up vector assignment tracking */
5892 size = sizeof(struct i40e_lump_tracking)
5893 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
5894 pf->irq_pile = kzalloc(size, GFP_KERNEL);
5895 if (!pf->irq_pile) {
5896 kfree(pf->qp_pile);
5897 err = -ENOMEM;
5898 goto sw_init_done;
5899 }
5900 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
5901 pf->irq_pile->search_hint = 0;
5902
5903 mutex_init(&pf->switch_mutex);
5904
5905 sw_init_done:
5906 return err;
5907 }
5908
5909 /**
5910 * i40e_set_features - set the netdev feature flags
5911 * @netdev: ptr to the netdev being adjusted
5912 * @features: the feature set that the stack is suggesting
5913 **/
5914 static int i40e_set_features(struct net_device *netdev,
5915 netdev_features_t features)
5916 {
5917 struct i40e_netdev_priv *np = netdev_priv(netdev);
5918 struct i40e_vsi *vsi = np->vsi;
5919
5920 if (features & NETIF_F_HW_VLAN_CTAG_RX)
5921 i40e_vlan_stripping_enable(vsi);
5922 else
5923 i40e_vlan_stripping_disable(vsi);
5924
5925 return 0;
5926 }
5927
5928 #ifdef CONFIG_I40E_VXLAN
5929 /**
5930 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
5931 * @pf: board private structure
5932 * @port: The UDP port to look up
5933 *
5934 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
5935 **/
5936 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
5937 {
5938 u8 i;
5939
5940 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5941 if (pf->vxlan_ports[i] == port)
5942 return i;
5943 }
5944
5945 return i;
5946 }
5947
5948 /**
5949 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
5950 * @netdev: This physical port's netdev
5951 * @sa_family: Socket Family that VXLAN is notifying us about
5952 * @port: New UDP port number that VXLAN started listening to
5953 **/
5954 static void i40e_add_vxlan_port(struct net_device *netdev,
5955 sa_family_t sa_family, __be16 port)
5956 {
5957 struct i40e_netdev_priv *np = netdev_priv(netdev);
5958 struct i40e_vsi *vsi = np->vsi;
5959 struct i40e_pf *pf = vsi->back;
5960 u8 next_idx;
5961 u8 idx;
5962
5963 if (sa_family == AF_INET6)
5964 return;
5965
5966 idx = i40e_get_vxlan_port_idx(pf, port);
5967
5968 /* Check if port already exists */
5969 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
5970 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
5971 return;
5972 }
5973
5974 /* Now check if there is space to add the new port */
5975 next_idx = i40e_get_vxlan_port_idx(pf, 0);
5976
5977 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
5978 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
5979 ntohs(port));
5980 return;
5981 }
5982
5983 /* New port: add it and mark its index in the bitmap */
5984 pf->vxlan_ports[next_idx] = port;
5985 pf->pending_vxlan_bitmap |= (1 << next_idx);
5986
5987 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
5988 }
5989
5990 /**
5991 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
5992 * @netdev: This physical port's netdev
5993 * @sa_family: Socket Family that VXLAN is notifying us about
5994 * @port: UDP port number that VXLAN stopped listening to
5995 **/
5996 static void i40e_del_vxlan_port(struct net_device *netdev,
5997 sa_family_t sa_family, __be16 port)
5998 {
5999 struct i40e_netdev_priv *np = netdev_priv(netdev);
6000 struct i40e_vsi *vsi = np->vsi;
6001 struct i40e_pf *pf = vsi->back;
6002 u8 idx;
6003
6004 if (sa_family == AF_INET6)
6005 return;
6006
6007 idx = i40e_get_vxlan_port_idx(pf, port);
6008
6009 /* Check if port already exists */
6010 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6011 /* if port exists, set it to 0 (mark for deletion)
6012 * and make it pending
6013 */
6014 pf->vxlan_ports[idx] = 0;
6015
6016 pf->pending_vxlan_bitmap |= (1 << idx);
6017
6018 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6019 } else {
6020 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6021 ntohs(port));
6022 }
6023 }
6024
6025 #endif
6026 static const struct net_device_ops i40e_netdev_ops = {
6027 .ndo_open = i40e_open,
6028 .ndo_stop = i40e_close,
6029 .ndo_start_xmit = i40e_lan_xmit_frame,
6030 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6031 .ndo_set_rx_mode = i40e_set_rx_mode,
6032 .ndo_validate_addr = eth_validate_addr,
6033 .ndo_set_mac_address = i40e_set_mac,
6034 .ndo_change_mtu = i40e_change_mtu,
6035 .ndo_tx_timeout = i40e_tx_timeout,
6036 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6037 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6038 #ifdef CONFIG_NET_POLL_CONTROLLER
6039 .ndo_poll_controller = i40e_netpoll,
6040 #endif
6041 .ndo_setup_tc = i40e_setup_tc,
6042 .ndo_set_features = i40e_set_features,
6043 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6044 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6045 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6046 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6047 #ifdef CONFIG_I40E_VXLAN
6048 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6049 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6050 #endif
6051 };
6052
6053 /**
6054 * i40e_config_netdev - Setup the netdev flags
6055 * @vsi: the VSI being configured
6056 *
6057 * Returns 0 on success, negative value on failure
6058 **/
6059 static int i40e_config_netdev(struct i40e_vsi *vsi)
6060 {
6061 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6062 struct i40e_pf *pf = vsi->back;
6063 struct i40e_hw *hw = &pf->hw;
6064 struct i40e_netdev_priv *np;
6065 struct net_device *netdev;
6066 u8 mac_addr[ETH_ALEN];
6067 int etherdev_size;
6068
6069 etherdev_size = sizeof(struct i40e_netdev_priv);
6070 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6071 if (!netdev)
6072 return -ENOMEM;
6073
6074 vsi->netdev = netdev;
6075 np = netdev_priv(netdev);
6076 np->vsi = vsi;
6077
6078 netdev->hw_enc_features = NETIF_F_IP_CSUM |
6079 NETIF_F_GSO_UDP_TUNNEL |
6080 NETIF_F_TSO |
6081 NETIF_F_SG;
6082
6083 netdev->features = NETIF_F_SG |
6084 NETIF_F_IP_CSUM |
6085 NETIF_F_SCTP_CSUM |
6086 NETIF_F_HIGHDMA |
6087 NETIF_F_GSO_UDP_TUNNEL |
6088 NETIF_F_HW_VLAN_CTAG_TX |
6089 NETIF_F_HW_VLAN_CTAG_RX |
6090 NETIF_F_HW_VLAN_CTAG_FILTER |
6091 NETIF_F_IPV6_CSUM |
6092 NETIF_F_TSO |
6093 NETIF_F_TSO6 |
6094 NETIF_F_RXCSUM |
6095 NETIF_F_RXHASH |
6096 0;
6097
6098 /* copy netdev features into list of user selectable features */
6099 netdev->hw_features |= netdev->features;
6100
6101 if (vsi->type == I40E_VSI_MAIN) {
6102 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6103 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6104 } else {
6105 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6106 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6107 pf->vsi[pf->lan_vsi]->netdev->name);
6108 random_ether_addr(mac_addr);
6109 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6110 }
6111 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6112
6113 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6114 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6115 /* vlan gets same features (except vlan offload)
6116 * after any tweaks for specific VSI types
6117 */
6118 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6119 NETIF_F_HW_VLAN_CTAG_RX |
6120 NETIF_F_HW_VLAN_CTAG_FILTER);
6121 netdev->priv_flags |= IFF_UNICAST_FLT;
6122 netdev->priv_flags |= IFF_SUPP_NOFCS;
6123 /* Setup netdev TC information */
6124 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6125
6126 netdev->netdev_ops = &i40e_netdev_ops;
6127 netdev->watchdog_timeo = 5 * HZ;
6128 i40e_set_ethtool_ops(netdev);
6129
6130 return 0;
6131 }
6132
6133 /**
6134 * i40e_vsi_delete - Delete a VSI from the switch
6135 * @vsi: the VSI being removed
6136 *
6137 * Returns 0 on success, negative value on failure
6138 **/
6139 static void i40e_vsi_delete(struct i40e_vsi *vsi)
6140 {
6141 /* remove default VSI is not allowed */
6142 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6143 return;
6144
6145 /* there is no HW VSI for FDIR */
6146 if (vsi->type == I40E_VSI_FDIR)
6147 return;
6148
6149 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6150 return;
6151 }
6152
6153 /**
6154 * i40e_add_vsi - Add a VSI to the switch
6155 * @vsi: the VSI being configured
6156 *
6157 * This initializes a VSI context depending on the VSI type to be added and
6158 * passes it down to the add_vsi aq command.
6159 **/
6160 static int i40e_add_vsi(struct i40e_vsi *vsi)
6161 {
6162 int ret = -ENODEV;
6163 struct i40e_mac_filter *f, *ftmp;
6164 struct i40e_pf *pf = vsi->back;
6165 struct i40e_hw *hw = &pf->hw;
6166 struct i40e_vsi_context ctxt;
6167 u8 enabled_tc = 0x1; /* TC0 enabled */
6168 int f_count = 0;
6169
6170 memset(&ctxt, 0, sizeof(ctxt));
6171 switch (vsi->type) {
6172 case I40E_VSI_MAIN:
6173 /* The PF's main VSI is already setup as part of the
6174 * device initialization, so we'll not bother with
6175 * the add_vsi call, but we will retrieve the current
6176 * VSI context.
6177 */
6178 ctxt.seid = pf->main_vsi_seid;
6179 ctxt.pf_num = pf->hw.pf_id;
6180 ctxt.vf_num = 0;
6181 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6182 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6183 if (ret) {
6184 dev_info(&pf->pdev->dev,
6185 "couldn't get pf vsi config, err %d, aq_err %d\n",
6186 ret, pf->hw.aq.asq_last_status);
6187 return -ENOENT;
6188 }
6189 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6190 vsi->info.valid_sections = 0;
6191
6192 vsi->seid = ctxt.seid;
6193 vsi->id = ctxt.vsi_number;
6194
6195 enabled_tc = i40e_pf_get_tc_map(pf);
6196
6197 /* MFP mode setup queue map and update VSI */
6198 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6199 memset(&ctxt, 0, sizeof(ctxt));
6200 ctxt.seid = pf->main_vsi_seid;
6201 ctxt.pf_num = pf->hw.pf_id;
6202 ctxt.vf_num = 0;
6203 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6204 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6205 if (ret) {
6206 dev_info(&pf->pdev->dev,
6207 "update vsi failed, aq_err=%d\n",
6208 pf->hw.aq.asq_last_status);
6209 ret = -ENOENT;
6210 goto err;
6211 }
6212 /* update the local VSI info queue map */
6213 i40e_vsi_update_queue_map(vsi, &ctxt);
6214 vsi->info.valid_sections = 0;
6215 } else {
6216 /* Default/Main VSI is only enabled for TC0
6217 * reconfigure it to enable all TCs that are
6218 * available on the port in SFP mode.
6219 */
6220 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6221 if (ret) {
6222 dev_info(&pf->pdev->dev,
6223 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6224 enabled_tc, ret,
6225 pf->hw.aq.asq_last_status);
6226 ret = -ENOENT;
6227 }
6228 }
6229 break;
6230
6231 case I40E_VSI_FDIR:
6232 /* no queue mapping or actual HW VSI needed */
6233 vsi->info.valid_sections = 0;
6234 vsi->seid = 0;
6235 vsi->id = 0;
6236 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6237 return 0;
6238 break;
6239
6240 case I40E_VSI_VMDQ2:
6241 ctxt.pf_num = hw->pf_id;
6242 ctxt.vf_num = 0;
6243 ctxt.uplink_seid = vsi->uplink_seid;
6244 ctxt.connection_type = 0x1; /* regular data port */
6245 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6246
6247 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6248
6249 /* This VSI is connected to VEB so the switch_id
6250 * should be set to zero by default.
6251 */
6252 ctxt.info.switch_id = 0;
6253 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6254 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6255
6256 /* Setup the VSI tx/rx queue map for TC0 only for now */
6257 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6258 break;
6259
6260 case I40E_VSI_SRIOV:
6261 ctxt.pf_num = hw->pf_id;
6262 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6263 ctxt.uplink_seid = vsi->uplink_seid;
6264 ctxt.connection_type = 0x1; /* regular data port */
6265 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6266
6267 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6268
6269 /* This VSI is connected to VEB so the switch_id
6270 * should be set to zero by default.
6271 */
6272 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6273
6274 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6275 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6276 /* Setup the VSI tx/rx queue map for TC0 only for now */
6277 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6278 break;
6279
6280 default:
6281 return -ENODEV;
6282 }
6283
6284 if (vsi->type != I40E_VSI_MAIN) {
6285 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6286 if (ret) {
6287 dev_info(&vsi->back->pdev->dev,
6288 "add vsi failed, aq_err=%d\n",
6289 vsi->back->hw.aq.asq_last_status);
6290 ret = -ENOENT;
6291 goto err;
6292 }
6293 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6294 vsi->info.valid_sections = 0;
6295 vsi->seid = ctxt.seid;
6296 vsi->id = ctxt.vsi_number;
6297 }
6298
6299 /* If macvlan filters already exist, force them to get loaded */
6300 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6301 f->changed = true;
6302 f_count++;
6303 }
6304 if (f_count) {
6305 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6306 pf->flags |= I40E_FLAG_FILTER_SYNC;
6307 }
6308
6309 /* Update VSI BW information */
6310 ret = i40e_vsi_get_bw_info(vsi);
6311 if (ret) {
6312 dev_info(&pf->pdev->dev,
6313 "couldn't get vsi bw info, err %d, aq_err %d\n",
6314 ret, pf->hw.aq.asq_last_status);
6315 /* VSI is already added so not tearing that up */
6316 ret = 0;
6317 }
6318
6319 err:
6320 return ret;
6321 }
6322
6323 /**
6324 * i40e_vsi_release - Delete a VSI and free its resources
6325 * @vsi: the VSI being removed
6326 *
6327 * Returns 0 on success or < 0 on error
6328 **/
6329 int i40e_vsi_release(struct i40e_vsi *vsi)
6330 {
6331 struct i40e_mac_filter *f, *ftmp;
6332 struct i40e_veb *veb = NULL;
6333 struct i40e_pf *pf;
6334 u16 uplink_seid;
6335 int i, n;
6336
6337 pf = vsi->back;
6338
6339 /* release of a VEB-owner or last VSI is not allowed */
6340 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6341 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6342 vsi->seid, vsi->uplink_seid);
6343 return -ENODEV;
6344 }
6345 if (vsi == pf->vsi[pf->lan_vsi] &&
6346 !test_bit(__I40E_DOWN, &pf->state)) {
6347 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6348 return -ENODEV;
6349 }
6350
6351 uplink_seid = vsi->uplink_seid;
6352 if (vsi->type != I40E_VSI_SRIOV) {
6353 if (vsi->netdev_registered) {
6354 vsi->netdev_registered = false;
6355 if (vsi->netdev) {
6356 /* results in a call to i40e_close() */
6357 unregister_netdev(vsi->netdev);
6358 free_netdev(vsi->netdev);
6359 vsi->netdev = NULL;
6360 }
6361 } else {
6362 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6363 i40e_down(vsi);
6364 i40e_vsi_free_irq(vsi);
6365 i40e_vsi_free_tx_resources(vsi);
6366 i40e_vsi_free_rx_resources(vsi);
6367 }
6368 i40e_vsi_disable_irq(vsi);
6369 }
6370
6371 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6372 i40e_del_filter(vsi, f->macaddr, f->vlan,
6373 f->is_vf, f->is_netdev);
6374 i40e_sync_vsi_filters(vsi);
6375
6376 i40e_vsi_delete(vsi);
6377 i40e_vsi_free_q_vectors(vsi);
6378 i40e_vsi_clear_rings(vsi);
6379 i40e_vsi_clear(vsi);
6380
6381 /* If this was the last thing on the VEB, except for the
6382 * controlling VSI, remove the VEB, which puts the controlling
6383 * VSI onto the next level down in the switch.
6384 *
6385 * Well, okay, there's one more exception here: don't remove
6386 * the orphan VEBs yet. We'll wait for an explicit remove request
6387 * from up the network stack.
6388 */
6389 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6390 if (pf->vsi[i] &&
6391 pf->vsi[i]->uplink_seid == uplink_seid &&
6392 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6393 n++; /* count the VSIs */
6394 }
6395 }
6396 for (i = 0; i < I40E_MAX_VEB; i++) {
6397 if (!pf->veb[i])
6398 continue;
6399 if (pf->veb[i]->uplink_seid == uplink_seid)
6400 n++; /* count the VEBs */
6401 if (pf->veb[i]->seid == uplink_seid)
6402 veb = pf->veb[i];
6403 }
6404 if (n == 0 && veb && veb->uplink_seid != 0)
6405 i40e_veb_release(veb);
6406
6407 return 0;
6408 }
6409
6410 /**
6411 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
6412 * @vsi: ptr to the VSI
6413 *
6414 * This should only be called after i40e_vsi_mem_alloc() which allocates the
6415 * corresponding SW VSI structure and initializes num_queue_pairs for the
6416 * newly allocated VSI.
6417 *
6418 * Returns 0 on success or negative on failure
6419 **/
6420 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
6421 {
6422 int ret = -ENOENT;
6423 struct i40e_pf *pf = vsi->back;
6424
6425 if (vsi->q_vectors[0]) {
6426 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
6427 vsi->seid);
6428 return -EEXIST;
6429 }
6430
6431 if (vsi->base_vector) {
6432 dev_info(&pf->pdev->dev,
6433 "VSI %d has non-zero base vector %d\n",
6434 vsi->seid, vsi->base_vector);
6435 return -EEXIST;
6436 }
6437
6438 ret = i40e_alloc_q_vectors(vsi);
6439 if (ret) {
6440 dev_info(&pf->pdev->dev,
6441 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
6442 vsi->num_q_vectors, vsi->seid, ret);
6443 vsi->num_q_vectors = 0;
6444 goto vector_setup_out;
6445 }
6446
6447 if (vsi->num_q_vectors)
6448 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
6449 vsi->num_q_vectors, vsi->idx);
6450 if (vsi->base_vector < 0) {
6451 dev_info(&pf->pdev->dev,
6452 "failed to get q tracking for VSI %d, err=%d\n",
6453 vsi->seid, vsi->base_vector);
6454 i40e_vsi_free_q_vectors(vsi);
6455 ret = -ENOENT;
6456 goto vector_setup_out;
6457 }
6458
6459 vector_setup_out:
6460 return ret;
6461 }
6462
6463 /**
6464 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
6465 * @vsi: pointer to the vsi.
6466 *
6467 * This re-allocates a vsi's queue resources.
6468 *
6469 * Returns pointer to the successfully allocated and configured VSI sw struct
6470 * on success, otherwise returns NULL on failure.
6471 **/
6472 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
6473 {
6474 struct i40e_pf *pf = vsi->back;
6475 u8 enabled_tc;
6476 int ret;
6477
6478 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6479 i40e_vsi_clear_rings(vsi);
6480
6481 i40e_vsi_free_arrays(vsi, false);
6482 i40e_set_num_rings_in_vsi(vsi);
6483 ret = i40e_vsi_alloc_arrays(vsi, false);
6484 if (ret)
6485 goto err_vsi;
6486
6487 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
6488 if (ret < 0) {
6489 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
6490 vsi->seid, ret);
6491 goto err_vsi;
6492 }
6493 vsi->base_queue = ret;
6494
6495 /* Update the FW view of the VSI. Force a reset of TC and queue
6496 * layout configurations.
6497 */
6498 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
6499 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
6500 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
6501 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
6502
6503 /* assign it some queues */
6504 ret = i40e_alloc_rings(vsi);
6505 if (ret)
6506 goto err_rings;
6507
6508 /* map all of the rings to the q_vectors */
6509 i40e_vsi_map_rings_to_vectors(vsi);
6510 return vsi;
6511
6512 err_rings:
6513 i40e_vsi_free_q_vectors(vsi);
6514 if (vsi->netdev_registered) {
6515 vsi->netdev_registered = false;
6516 unregister_netdev(vsi->netdev);
6517 free_netdev(vsi->netdev);
6518 vsi->netdev = NULL;
6519 }
6520 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
6521 err_vsi:
6522 i40e_vsi_clear(vsi);
6523 return NULL;
6524 }
6525
6526 /**
6527 * i40e_vsi_setup - Set up a VSI by a given type
6528 * @pf: board private structure
6529 * @type: VSI type
6530 * @uplink_seid: the switch element to link to
6531 * @param1: usage depends upon VSI type. For VF types, indicates VF id
6532 *
6533 * This allocates the sw VSI structure and its queue resources, then add a VSI
6534 * to the identified VEB.
6535 *
6536 * Returns pointer to the successfully allocated and configure VSI sw struct on
6537 * success, otherwise returns NULL on failure.
6538 **/
6539 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
6540 u16 uplink_seid, u32 param1)
6541 {
6542 struct i40e_vsi *vsi = NULL;
6543 struct i40e_veb *veb = NULL;
6544 int ret, i;
6545 int v_idx;
6546
6547 /* The requested uplink_seid must be either
6548 * - the PF's port seid
6549 * no VEB is needed because this is the PF
6550 * or this is a Flow Director special case VSI
6551 * - seid of an existing VEB
6552 * - seid of a VSI that owns an existing VEB
6553 * - seid of a VSI that doesn't own a VEB
6554 * a new VEB is created and the VSI becomes the owner
6555 * - seid of the PF VSI, which is what creates the first VEB
6556 * this is a special case of the previous
6557 *
6558 * Find which uplink_seid we were given and create a new VEB if needed
6559 */
6560 for (i = 0; i < I40E_MAX_VEB; i++) {
6561 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
6562 veb = pf->veb[i];
6563 break;
6564 }
6565 }
6566
6567 if (!veb && uplink_seid != pf->mac_seid) {
6568
6569 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6570 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
6571 vsi = pf->vsi[i];
6572 break;
6573 }
6574 }
6575 if (!vsi) {
6576 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
6577 uplink_seid);
6578 return NULL;
6579 }
6580
6581 if (vsi->uplink_seid == pf->mac_seid)
6582 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
6583 vsi->tc_config.enabled_tc);
6584 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
6585 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
6586 vsi->tc_config.enabled_tc);
6587
6588 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
6589 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
6590 veb = pf->veb[i];
6591 }
6592 if (!veb) {
6593 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
6594 return NULL;
6595 }
6596
6597 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
6598 uplink_seid = veb->seid;
6599 }
6600
6601 /* get vsi sw struct */
6602 v_idx = i40e_vsi_mem_alloc(pf, type);
6603 if (v_idx < 0)
6604 goto err_alloc;
6605 vsi = pf->vsi[v_idx];
6606 vsi->type = type;
6607 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
6608
6609 if (type == I40E_VSI_MAIN)
6610 pf->lan_vsi = v_idx;
6611 else if (type == I40E_VSI_SRIOV)
6612 vsi->vf_id = param1;
6613 /* assign it some queues */
6614 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
6615 if (ret < 0) {
6616 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
6617 vsi->seid, ret);
6618 goto err_vsi;
6619 }
6620 vsi->base_queue = ret;
6621
6622 /* get a VSI from the hardware */
6623 vsi->uplink_seid = uplink_seid;
6624 ret = i40e_add_vsi(vsi);
6625 if (ret)
6626 goto err_vsi;
6627
6628 switch (vsi->type) {
6629 /* setup the netdev if needed */
6630 case I40E_VSI_MAIN:
6631 case I40E_VSI_VMDQ2:
6632 ret = i40e_config_netdev(vsi);
6633 if (ret)
6634 goto err_netdev;
6635 ret = register_netdev(vsi->netdev);
6636 if (ret)
6637 goto err_netdev;
6638 vsi->netdev_registered = true;
6639 netif_carrier_off(vsi->netdev);
6640 /* fall through */
6641
6642 case I40E_VSI_FDIR:
6643 /* set up vectors and rings if needed */
6644 ret = i40e_vsi_setup_vectors(vsi);
6645 if (ret)
6646 goto err_msix;
6647
6648 ret = i40e_alloc_rings(vsi);
6649 if (ret)
6650 goto err_rings;
6651
6652 /* map all of the rings to the q_vectors */
6653 i40e_vsi_map_rings_to_vectors(vsi);
6654
6655 i40e_vsi_reset_stats(vsi);
6656 break;
6657
6658 default:
6659 /* no netdev or rings for the other VSI types */
6660 break;
6661 }
6662
6663 return vsi;
6664
6665 err_rings:
6666 i40e_vsi_free_q_vectors(vsi);
6667 err_msix:
6668 if (vsi->netdev_registered) {
6669 vsi->netdev_registered = false;
6670 unregister_netdev(vsi->netdev);
6671 free_netdev(vsi->netdev);
6672 vsi->netdev = NULL;
6673 }
6674 err_netdev:
6675 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
6676 err_vsi:
6677 i40e_vsi_clear(vsi);
6678 err_alloc:
6679 return NULL;
6680 }
6681
6682 /**
6683 * i40e_veb_get_bw_info - Query VEB BW information
6684 * @veb: the veb to query
6685 *
6686 * Query the Tx scheduler BW configuration data for given VEB
6687 **/
6688 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
6689 {
6690 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
6691 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
6692 struct i40e_pf *pf = veb->pf;
6693 struct i40e_hw *hw = &pf->hw;
6694 u32 tc_bw_max;
6695 int ret = 0;
6696 int i;
6697
6698 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
6699 &bw_data, NULL);
6700 if (ret) {
6701 dev_info(&pf->pdev->dev,
6702 "query veb bw config failed, aq_err=%d\n",
6703 hw->aq.asq_last_status);
6704 goto out;
6705 }
6706
6707 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
6708 &ets_data, NULL);
6709 if (ret) {
6710 dev_info(&pf->pdev->dev,
6711 "query veb bw ets config failed, aq_err=%d\n",
6712 hw->aq.asq_last_status);
6713 goto out;
6714 }
6715
6716 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
6717 veb->bw_max_quanta = ets_data.tc_bw_max;
6718 veb->is_abs_credits = bw_data.absolute_credits_enable;
6719 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
6720 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
6721 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6722 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
6723 veb->bw_tc_limit_credits[i] =
6724 le16_to_cpu(bw_data.tc_bw_limits[i]);
6725 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
6726 }
6727
6728 out:
6729 return ret;
6730 }
6731
6732 /**
6733 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
6734 * @pf: board private structure
6735 *
6736 * On error: returns error code (negative)
6737 * On success: returns vsi index in PF (positive)
6738 **/
6739 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
6740 {
6741 int ret = -ENOENT;
6742 struct i40e_veb *veb;
6743 int i;
6744
6745 /* Need to protect the allocation of switch elements at the PF level */
6746 mutex_lock(&pf->switch_mutex);
6747
6748 /* VEB list may be fragmented if VEB creation/destruction has
6749 * been happening. We can afford to do a quick scan to look
6750 * for any free slots in the list.
6751 *
6752 * find next empty veb slot, looping back around if necessary
6753 */
6754 i = 0;
6755 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
6756 i++;
6757 if (i >= I40E_MAX_VEB) {
6758 ret = -ENOMEM;
6759 goto err_alloc_veb; /* out of VEB slots! */
6760 }
6761
6762 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
6763 if (!veb) {
6764 ret = -ENOMEM;
6765 goto err_alloc_veb;
6766 }
6767 veb->pf = pf;
6768 veb->idx = i;
6769 veb->enabled_tc = 1;
6770
6771 pf->veb[i] = veb;
6772 ret = i;
6773 err_alloc_veb:
6774 mutex_unlock(&pf->switch_mutex);
6775 return ret;
6776 }
6777
6778 /**
6779 * i40e_switch_branch_release - Delete a branch of the switch tree
6780 * @branch: where to start deleting
6781 *
6782 * This uses recursion to find the tips of the branch to be
6783 * removed, deleting until we get back to and can delete this VEB.
6784 **/
6785 static void i40e_switch_branch_release(struct i40e_veb *branch)
6786 {
6787 struct i40e_pf *pf = branch->pf;
6788 u16 branch_seid = branch->seid;
6789 u16 veb_idx = branch->idx;
6790 int i;
6791
6792 /* release any VEBs on this VEB - RECURSION */
6793 for (i = 0; i < I40E_MAX_VEB; i++) {
6794 if (!pf->veb[i])
6795 continue;
6796 if (pf->veb[i]->uplink_seid == branch->seid)
6797 i40e_switch_branch_release(pf->veb[i]);
6798 }
6799
6800 /* Release the VSIs on this VEB, but not the owner VSI.
6801 *
6802 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
6803 * the VEB itself, so don't use (*branch) after this loop.
6804 */
6805 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6806 if (!pf->vsi[i])
6807 continue;
6808 if (pf->vsi[i]->uplink_seid == branch_seid &&
6809 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
6810 i40e_vsi_release(pf->vsi[i]);
6811 }
6812 }
6813
6814 /* There's one corner case where the VEB might not have been
6815 * removed, so double check it here and remove it if needed.
6816 * This case happens if the veb was created from the debugfs
6817 * commands and no VSIs were added to it.
6818 */
6819 if (pf->veb[veb_idx])
6820 i40e_veb_release(pf->veb[veb_idx]);
6821 }
6822
6823 /**
6824 * i40e_veb_clear - remove veb struct
6825 * @veb: the veb to remove
6826 **/
6827 static void i40e_veb_clear(struct i40e_veb *veb)
6828 {
6829 if (!veb)
6830 return;
6831
6832 if (veb->pf) {
6833 struct i40e_pf *pf = veb->pf;
6834
6835 mutex_lock(&pf->switch_mutex);
6836 if (pf->veb[veb->idx] == veb)
6837 pf->veb[veb->idx] = NULL;
6838 mutex_unlock(&pf->switch_mutex);
6839 }
6840
6841 kfree(veb);
6842 }
6843
6844 /**
6845 * i40e_veb_release - Delete a VEB and free its resources
6846 * @veb: the VEB being removed
6847 **/
6848 void i40e_veb_release(struct i40e_veb *veb)
6849 {
6850 struct i40e_vsi *vsi = NULL;
6851 struct i40e_pf *pf;
6852 int i, n = 0;
6853
6854 pf = veb->pf;
6855
6856 /* find the remaining VSI and check for extras */
6857 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
6858 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
6859 n++;
6860 vsi = pf->vsi[i];
6861 }
6862 }
6863 if (n != 1) {
6864 dev_info(&pf->pdev->dev,
6865 "can't remove VEB %d with %d VSIs left\n",
6866 veb->seid, n);
6867 return;
6868 }
6869
6870 /* move the remaining VSI to uplink veb */
6871 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
6872 if (veb->uplink_seid) {
6873 vsi->uplink_seid = veb->uplink_seid;
6874 if (veb->uplink_seid == pf->mac_seid)
6875 vsi->veb_idx = I40E_NO_VEB;
6876 else
6877 vsi->veb_idx = veb->veb_idx;
6878 } else {
6879 /* floating VEB */
6880 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6881 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
6882 }
6883
6884 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
6885 i40e_veb_clear(veb);
6886
6887 return;
6888 }
6889
6890 /**
6891 * i40e_add_veb - create the VEB in the switch
6892 * @veb: the VEB to be instantiated
6893 * @vsi: the controlling VSI
6894 **/
6895 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
6896 {
6897 bool is_default = false;
6898 bool is_cloud = false;
6899 int ret;
6900
6901 /* get a VEB from the hardware */
6902 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
6903 veb->enabled_tc, is_default,
6904 is_cloud, &veb->seid, NULL);
6905 if (ret) {
6906 dev_info(&veb->pf->pdev->dev,
6907 "couldn't add VEB, err %d, aq_err %d\n",
6908 ret, veb->pf->hw.aq.asq_last_status);
6909 return -EPERM;
6910 }
6911
6912 /* get statistics counter */
6913 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
6914 &veb->stats_idx, NULL, NULL, NULL);
6915 if (ret) {
6916 dev_info(&veb->pf->pdev->dev,
6917 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
6918 ret, veb->pf->hw.aq.asq_last_status);
6919 return -EPERM;
6920 }
6921 ret = i40e_veb_get_bw_info(veb);
6922 if (ret) {
6923 dev_info(&veb->pf->pdev->dev,
6924 "couldn't get VEB bw info, err %d, aq_err %d\n",
6925 ret, veb->pf->hw.aq.asq_last_status);
6926 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
6927 return -ENOENT;
6928 }
6929
6930 vsi->uplink_seid = veb->seid;
6931 vsi->veb_idx = veb->idx;
6932 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
6933
6934 return 0;
6935 }
6936
6937 /**
6938 * i40e_veb_setup - Set up a VEB
6939 * @pf: board private structure
6940 * @flags: VEB setup flags
6941 * @uplink_seid: the switch element to link to
6942 * @vsi_seid: the initial VSI seid
6943 * @enabled_tc: Enabled TC bit-map
6944 *
6945 * This allocates the sw VEB structure and links it into the switch
6946 * It is possible and legal for this to be a duplicate of an already
6947 * existing VEB. It is also possible for both uplink and vsi seids
6948 * to be zero, in order to create a floating VEB.
6949 *
6950 * Returns pointer to the successfully allocated VEB sw struct on
6951 * success, otherwise returns NULL on failure.
6952 **/
6953 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
6954 u16 uplink_seid, u16 vsi_seid,
6955 u8 enabled_tc)
6956 {
6957 struct i40e_veb *veb, *uplink_veb = NULL;
6958 int vsi_idx, veb_idx;
6959 int ret;
6960
6961 /* if one seid is 0, the other must be 0 to create a floating relay */
6962 if ((uplink_seid == 0 || vsi_seid == 0) &&
6963 (uplink_seid + vsi_seid != 0)) {
6964 dev_info(&pf->pdev->dev,
6965 "one, not both seid's are 0: uplink=%d vsi=%d\n",
6966 uplink_seid, vsi_seid);
6967 return NULL;
6968 }
6969
6970 /* make sure there is such a vsi and uplink */
6971 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
6972 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
6973 break;
6974 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
6975 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
6976 vsi_seid);
6977 return NULL;
6978 }
6979
6980 if (uplink_seid && uplink_seid != pf->mac_seid) {
6981 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6982 if (pf->veb[veb_idx] &&
6983 pf->veb[veb_idx]->seid == uplink_seid) {
6984 uplink_veb = pf->veb[veb_idx];
6985 break;
6986 }
6987 }
6988 if (!uplink_veb) {
6989 dev_info(&pf->pdev->dev,
6990 "uplink seid %d not found\n", uplink_seid);
6991 return NULL;
6992 }
6993 }
6994
6995 /* get veb sw struct */
6996 veb_idx = i40e_veb_mem_alloc(pf);
6997 if (veb_idx < 0)
6998 goto err_alloc;
6999 veb = pf->veb[veb_idx];
7000 veb->flags = flags;
7001 veb->uplink_seid = uplink_seid;
7002 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7003 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7004
7005 /* create the VEB in the switch */
7006 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7007 if (ret)
7008 goto err_veb;
7009
7010 return veb;
7011
7012 err_veb:
7013 i40e_veb_clear(veb);
7014 err_alloc:
7015 return NULL;
7016 }
7017
7018 /**
7019 * i40e_setup_pf_switch_element - set pf vars based on switch type
7020 * @pf: board private structure
7021 * @ele: element we are building info from
7022 * @num_reported: total number of elements
7023 * @printconfig: should we print the contents
7024 *
7025 * helper function to assist in extracting a few useful SEID values.
7026 **/
7027 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7028 struct i40e_aqc_switch_config_element_resp *ele,
7029 u16 num_reported, bool printconfig)
7030 {
7031 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7032 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7033 u8 element_type = ele->element_type;
7034 u16 seid = le16_to_cpu(ele->seid);
7035
7036 if (printconfig)
7037 dev_info(&pf->pdev->dev,
7038 "type=%d seid=%d uplink=%d downlink=%d\n",
7039 element_type, seid, uplink_seid, downlink_seid);
7040
7041 switch (element_type) {
7042 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7043 pf->mac_seid = seid;
7044 break;
7045 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7046 /* Main VEB? */
7047 if (uplink_seid != pf->mac_seid)
7048 break;
7049 if (pf->lan_veb == I40E_NO_VEB) {
7050 int v;
7051
7052 /* find existing or else empty VEB */
7053 for (v = 0; v < I40E_MAX_VEB; v++) {
7054 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7055 pf->lan_veb = v;
7056 break;
7057 }
7058 }
7059 if (pf->lan_veb == I40E_NO_VEB) {
7060 v = i40e_veb_mem_alloc(pf);
7061 if (v < 0)
7062 break;
7063 pf->lan_veb = v;
7064 }
7065 }
7066
7067 pf->veb[pf->lan_veb]->seid = seid;
7068 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7069 pf->veb[pf->lan_veb]->pf = pf;
7070 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7071 break;
7072 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7073 if (num_reported != 1)
7074 break;
7075 /* This is immediately after a reset so we can assume this is
7076 * the PF's VSI
7077 */
7078 pf->mac_seid = uplink_seid;
7079 pf->pf_seid = downlink_seid;
7080 pf->main_vsi_seid = seid;
7081 if (printconfig)
7082 dev_info(&pf->pdev->dev,
7083 "pf_seid=%d main_vsi_seid=%d\n",
7084 pf->pf_seid, pf->main_vsi_seid);
7085 break;
7086 case I40E_SWITCH_ELEMENT_TYPE_PF:
7087 case I40E_SWITCH_ELEMENT_TYPE_VF:
7088 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7089 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7090 case I40E_SWITCH_ELEMENT_TYPE_PE:
7091 case I40E_SWITCH_ELEMENT_TYPE_PA:
7092 /* ignore these for now */
7093 break;
7094 default:
7095 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7096 element_type, seid);
7097 break;
7098 }
7099 }
7100
7101 /**
7102 * i40e_fetch_switch_configuration - Get switch config from firmware
7103 * @pf: board private structure
7104 * @printconfig: should we print the contents
7105 *
7106 * Get the current switch configuration from the device and
7107 * extract a few useful SEID values.
7108 **/
7109 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7110 {
7111 struct i40e_aqc_get_switch_config_resp *sw_config;
7112 u16 next_seid = 0;
7113 int ret = 0;
7114 u8 *aq_buf;
7115 int i;
7116
7117 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7118 if (!aq_buf)
7119 return -ENOMEM;
7120
7121 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7122 do {
7123 u16 num_reported, num_total;
7124
7125 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7126 I40E_AQ_LARGE_BUF,
7127 &next_seid, NULL);
7128 if (ret) {
7129 dev_info(&pf->pdev->dev,
7130 "get switch config failed %d aq_err=%x\n",
7131 ret, pf->hw.aq.asq_last_status);
7132 kfree(aq_buf);
7133 return -ENOENT;
7134 }
7135
7136 num_reported = le16_to_cpu(sw_config->header.num_reported);
7137 num_total = le16_to_cpu(sw_config->header.num_total);
7138
7139 if (printconfig)
7140 dev_info(&pf->pdev->dev,
7141 "header: %d reported %d total\n",
7142 num_reported, num_total);
7143
7144 if (num_reported) {
7145 int sz = sizeof(*sw_config) * num_reported;
7146
7147 kfree(pf->sw_config);
7148 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7149 if (pf->sw_config)
7150 memcpy(pf->sw_config, sw_config, sz);
7151 }
7152
7153 for (i = 0; i < num_reported; i++) {
7154 struct i40e_aqc_switch_config_element_resp *ele =
7155 &sw_config->element[i];
7156
7157 i40e_setup_pf_switch_element(pf, ele, num_reported,
7158 printconfig);
7159 }
7160 } while (next_seid != 0);
7161
7162 kfree(aq_buf);
7163 return ret;
7164 }
7165
7166 /**
7167 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7168 * @pf: board private structure
7169 * @reinit: if the Main VSI needs to re-initialized.
7170 *
7171 * Returns 0 on success, negative value on failure
7172 **/
7173 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7174 {
7175 u32 rxfc = 0, txfc = 0, rxfc_reg;
7176 int ret;
7177
7178 /* find out what's out there already */
7179 ret = i40e_fetch_switch_configuration(pf, false);
7180 if (ret) {
7181 dev_info(&pf->pdev->dev,
7182 "couldn't fetch switch config, err %d, aq_err %d\n",
7183 ret, pf->hw.aq.asq_last_status);
7184 return ret;
7185 }
7186 i40e_pf_reset_stats(pf);
7187
7188 /* fdir VSI must happen first to be sure it gets queue 0, but only
7189 * if there is enough room for the fdir VSI
7190 */
7191 if (pf->num_lan_qps > 1)
7192 i40e_fdir_setup(pf);
7193
7194 /* first time setup */
7195 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7196 struct i40e_vsi *vsi = NULL;
7197 u16 uplink_seid;
7198
7199 /* Set up the PF VSI associated with the PF's main VSI
7200 * that is already in the HW switch
7201 */
7202 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7203 uplink_seid = pf->veb[pf->lan_veb]->seid;
7204 else
7205 uplink_seid = pf->mac_seid;
7206 if (pf->lan_vsi == I40E_NO_VSI)
7207 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7208 else if (reinit)
7209 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7210 if (!vsi) {
7211 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7212 i40e_fdir_teardown(pf);
7213 return -EAGAIN;
7214 }
7215 } else {
7216 /* force a reset of TC and queue layout configurations */
7217 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7218 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7219 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7220 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7221 }
7222 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7223
7224 /* Setup static PF queue filter control settings */
7225 ret = i40e_setup_pf_filter_control(pf);
7226 if (ret) {
7227 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7228 ret);
7229 /* Failure here should not stop continuing other steps */
7230 }
7231
7232 /* enable RSS in the HW, even for only one queue, as the stack can use
7233 * the hash
7234 */
7235 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7236 i40e_config_rss(pf);
7237
7238 /* fill in link information and enable LSE reporting */
7239 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7240 i40e_link_event(pf);
7241
7242 /* Initialize user-specific link properties */
7243 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7244 I40E_AQ_AN_COMPLETED) ? true : false);
7245 /* requested_mode is set in probe or by ethtool */
7246 if (!pf->fc_autoneg_status)
7247 goto no_autoneg;
7248
7249 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7250 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7251 pf->hw.fc.current_mode = I40E_FC_FULL;
7252 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7253 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7254 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7255 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7256 else
7257 pf->hw.fc.current_mode = I40E_FC_NONE;
7258
7259 /* sync the flow control settings with the auto-neg values */
7260 switch (pf->hw.fc.current_mode) {
7261 case I40E_FC_FULL:
7262 txfc = 1;
7263 rxfc = 1;
7264 break;
7265 case I40E_FC_TX_PAUSE:
7266 txfc = 1;
7267 rxfc = 0;
7268 break;
7269 case I40E_FC_RX_PAUSE:
7270 txfc = 0;
7271 rxfc = 1;
7272 break;
7273 case I40E_FC_NONE:
7274 case I40E_FC_DEFAULT:
7275 txfc = 0;
7276 rxfc = 0;
7277 break;
7278 case I40E_FC_PFC:
7279 /* TBD */
7280 break;
7281 /* no default case, we have to handle all possibilities here */
7282 }
7283
7284 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7285
7286 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7287 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7288 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7289
7290 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7291
7292 goto fc_complete;
7293
7294 no_autoneg:
7295 /* disable L2 flow control, user can turn it on if they wish */
7296 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7297 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7298 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7299
7300 fc_complete:
7301 return ret;
7302 }
7303
7304 /**
7305 * i40e_set_rss_size - helper to set rss_size
7306 * @pf: board private structure
7307 * @queues_left: how many queues
7308 */
7309 static u16 i40e_set_rss_size(struct i40e_pf *pf, int queues_left)
7310 {
7311 int num_tc0;
7312
7313 num_tc0 = min_t(int, queues_left, pf->rss_size_max);
7314 num_tc0 = min_t(int, num_tc0, num_online_cpus());
7315 num_tc0 = rounddown_pow_of_two(num_tc0);
7316
7317 return num_tc0;
7318 }
7319
7320 /**
7321 * i40e_determine_queue_usage - Work out queue distribution
7322 * @pf: board private structure
7323 **/
7324 static void i40e_determine_queue_usage(struct i40e_pf *pf)
7325 {
7326 int accum_tc_size;
7327 int queues_left;
7328
7329 pf->num_lan_qps = 0;
7330 pf->num_tc_qps = rounddown_pow_of_two(pf->num_tc_qps);
7331 accum_tc_size = (I40E_MAX_TRAFFIC_CLASS - 1) * pf->num_tc_qps;
7332
7333 /* Find the max queues to be put into basic use. We'll always be
7334 * using TC0, whether or not DCB is running, and TC0 will get the
7335 * big RSS set.
7336 */
7337 queues_left = pf->hw.func_caps.num_tx_qp;
7338
7339 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7340 !(pf->flags & (I40E_FLAG_RSS_ENABLED |
7341 I40E_FLAG_FDIR_ENABLED | I40E_FLAG_DCB_ENABLED)) ||
7342 (queues_left == 1)) {
7343
7344 /* one qp for PF, no queues for anything else */
7345 queues_left = 0;
7346 pf->rss_size = pf->num_lan_qps = 1;
7347
7348 /* make sure all the fancies are disabled */
7349 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7350 I40E_FLAG_FDIR_ENABLED |
7351 I40E_FLAG_FDIR_ATR_ENABLED |
7352 I40E_FLAG_DCB_ENABLED |
7353 I40E_FLAG_SRIOV_ENABLED |
7354 I40E_FLAG_VMDQ_ENABLED);
7355
7356 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
7357 !(pf->flags & I40E_FLAG_FDIR_ENABLED) &&
7358 !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7359
7360 pf->rss_size = i40e_set_rss_size(pf, queues_left);
7361
7362 queues_left -= pf->rss_size;
7363 pf->num_lan_qps = pf->rss_size_max;
7364
7365 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
7366 !(pf->flags & I40E_FLAG_FDIR_ENABLED) &&
7367 (pf->flags & I40E_FLAG_DCB_ENABLED)) {
7368
7369 /* save num_tc_qps queues for TCs 1 thru 7 and the rest
7370 * are set up for RSS in TC0
7371 */
7372 queues_left -= accum_tc_size;
7373
7374 pf->rss_size = i40e_set_rss_size(pf, queues_left);
7375
7376 queues_left -= pf->rss_size;
7377 if (queues_left < 0) {
7378 dev_info(&pf->pdev->dev, "not enough queues for DCB\n");
7379 return;
7380 }
7381
7382 pf->num_lan_qps = pf->rss_size_max + accum_tc_size;
7383
7384 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
7385 (pf->flags & I40E_FLAG_FDIR_ENABLED) &&
7386 !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
7387
7388 queues_left -= 1; /* save 1 queue for FD */
7389
7390 pf->rss_size = i40e_set_rss_size(pf, queues_left);
7391
7392 queues_left -= pf->rss_size;
7393 if (queues_left < 0) {
7394 dev_info(&pf->pdev->dev, "not enough queues for Flow Director\n");
7395 return;
7396 }
7397
7398 pf->num_lan_qps = pf->rss_size_max;
7399
7400 } else if (pf->flags & I40E_FLAG_RSS_ENABLED &&
7401 (pf->flags & I40E_FLAG_FDIR_ENABLED) &&
7402 (pf->flags & I40E_FLAG_DCB_ENABLED)) {
7403
7404 /* save 1 queue for TCs 1 thru 7,
7405 * 1 queue for flow director,
7406 * and the rest are set up for RSS in TC0
7407 */
7408 queues_left -= 1;
7409 queues_left -= accum_tc_size;
7410
7411 pf->rss_size = i40e_set_rss_size(pf, queues_left);
7412 queues_left -= pf->rss_size;
7413 if (queues_left < 0) {
7414 dev_info(&pf->pdev->dev, "not enough queues for DCB and Flow Director\n");
7415 return;
7416 }
7417
7418 pf->num_lan_qps = pf->rss_size_max + accum_tc_size;
7419
7420 } else {
7421 dev_info(&pf->pdev->dev,
7422 "Invalid configuration, flags=0x%08llx\n", pf->flags);
7423 return;
7424 }
7425
7426 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7427 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7428 pf->num_req_vfs = min_t(int, pf->num_req_vfs, (queues_left /
7429 pf->num_vf_qps));
7430 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7431 }
7432
7433 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7434 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7435 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7436 (queues_left / pf->num_vmdq_qps));
7437 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7438 }
7439
7440 pf->queues_left = queues_left;
7441 return;
7442 }
7443
7444 /**
7445 * i40e_setup_pf_filter_control - Setup PF static filter control
7446 * @pf: PF to be setup
7447 *
7448 * i40e_setup_pf_filter_control sets up a pf's initial filter control
7449 * settings. If PE/FCoE are enabled then it will also set the per PF
7450 * based filter sizes required for them. It also enables Flow director,
7451 * ethertype and macvlan type filter settings for the pf.
7452 *
7453 * Returns 0 on success, negative on failure
7454 **/
7455 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
7456 {
7457 struct i40e_filter_control_settings *settings = &pf->filter_settings;
7458
7459 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
7460
7461 /* Flow Director is enabled */
7462 if (pf->flags & (I40E_FLAG_FDIR_ENABLED | I40E_FLAG_FDIR_ATR_ENABLED))
7463 settings->enable_fdir = true;
7464
7465 /* Ethtype and MACVLAN filters enabled for PF */
7466 settings->enable_ethtype = true;
7467 settings->enable_macvlan = true;
7468
7469 if (i40e_set_filter_control(&pf->hw, settings))
7470 return -ENOENT;
7471
7472 return 0;
7473 }
7474
7475 /**
7476 * i40e_probe - Device initialization routine
7477 * @pdev: PCI device information struct
7478 * @ent: entry in i40e_pci_tbl
7479 *
7480 * i40e_probe initializes a pf identified by a pci_dev structure.
7481 * The OS initialization, configuring of the pf private structure,
7482 * and a hardware reset occur.
7483 *
7484 * Returns 0 on success, negative on failure
7485 **/
7486 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7487 {
7488 struct i40e_driver_version dv;
7489 struct i40e_pf *pf;
7490 struct i40e_hw *hw;
7491 static u16 pfs_found;
7492 u16 link_status;
7493 int err = 0;
7494 u32 len;
7495
7496 err = pci_enable_device_mem(pdev);
7497 if (err)
7498 return err;
7499
7500 /* set up for high or low dma */
7501 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
7502 /* coherent mask for the same size will always succeed if
7503 * dma_set_mask does
7504 */
7505 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
7506 } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) {
7507 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
7508 } else {
7509 dev_err(&pdev->dev, "DMA configuration failed: %d\n", err);
7510 err = -EIO;
7511 goto err_dma;
7512 }
7513
7514 /* set up pci connections */
7515 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7516 IORESOURCE_MEM), i40e_driver_name);
7517 if (err) {
7518 dev_info(&pdev->dev,
7519 "pci_request_selected_regions failed %d\n", err);
7520 goto err_pci_reg;
7521 }
7522
7523 pci_enable_pcie_error_reporting(pdev);
7524 pci_set_master(pdev);
7525
7526 /* Now that we have a PCI connection, we need to do the
7527 * low level device setup. This is primarily setting up
7528 * the Admin Queue structures and then querying for the
7529 * device's current profile information.
7530 */
7531 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
7532 if (!pf) {
7533 err = -ENOMEM;
7534 goto err_pf_alloc;
7535 }
7536 pf->next_vsi = 0;
7537 pf->pdev = pdev;
7538 set_bit(__I40E_DOWN, &pf->state);
7539
7540 hw = &pf->hw;
7541 hw->back = pf;
7542 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7543 pci_resource_len(pdev, 0));
7544 if (!hw->hw_addr) {
7545 err = -EIO;
7546 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
7547 (unsigned int)pci_resource_start(pdev, 0),
7548 (unsigned int)pci_resource_len(pdev, 0), err);
7549 goto err_ioremap;
7550 }
7551 hw->vendor_id = pdev->vendor;
7552 hw->device_id = pdev->device;
7553 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
7554 hw->subsystem_vendor_id = pdev->subsystem_vendor;
7555 hw->subsystem_device_id = pdev->subsystem_device;
7556 hw->bus.device = PCI_SLOT(pdev->devfn);
7557 hw->bus.func = PCI_FUNC(pdev->devfn);
7558 pf->instance = pfs_found;
7559
7560 /* do a special CORER for clearing PXE mode once at init */
7561 if (hw->revision_id == 0 &&
7562 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
7563 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
7564 i40e_flush(hw);
7565 msleep(200);
7566 pf->corer_count++;
7567
7568 i40e_clear_pxe_mode(hw);
7569 }
7570
7571 /* Reset here to make sure all is clean and to define PF 'n' */
7572 err = i40e_pf_reset(hw);
7573 if (err) {
7574 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
7575 goto err_pf_reset;
7576 }
7577 pf->pfr_count++;
7578
7579 hw->aq.num_arq_entries = I40E_AQ_LEN;
7580 hw->aq.num_asq_entries = I40E_AQ_LEN;
7581 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7582 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
7583 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
7584 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
7585 "%s-pf%d:misc",
7586 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
7587
7588 err = i40e_init_shared_code(hw);
7589 if (err) {
7590 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
7591 goto err_pf_reset;
7592 }
7593
7594 /* set up a default setting for link flow control */
7595 pf->hw.fc.requested_mode = I40E_FC_NONE;
7596
7597 err = i40e_init_adminq(hw);
7598 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
7599 if (((hw->nvm.version & I40E_NVM_VERSION_HI_MASK)
7600 >> I40E_NVM_VERSION_HI_SHIFT) != I40E_CURRENT_NVM_VERSION_HI) {
7601 dev_info(&pdev->dev,
7602 "warning: NVM version not supported, supported version: %02x.%02x\n",
7603 I40E_CURRENT_NVM_VERSION_HI,
7604 I40E_CURRENT_NVM_VERSION_LO);
7605 }
7606 if (err) {
7607 dev_info(&pdev->dev,
7608 "init_adminq failed: %d expecting API %02x.%02x\n",
7609 err,
7610 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
7611 goto err_pf_reset;
7612 }
7613
7614 err = i40e_get_capabilities(pf);
7615 if (err)
7616 goto err_adminq_setup;
7617
7618 err = i40e_sw_init(pf);
7619 if (err) {
7620 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
7621 goto err_sw_init;
7622 }
7623
7624 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
7625 hw->func_caps.num_rx_qp,
7626 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
7627 if (err) {
7628 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
7629 goto err_init_lan_hmc;
7630 }
7631
7632 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
7633 if (err) {
7634 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
7635 err = -ENOENT;
7636 goto err_configure_lan_hmc;
7637 }
7638
7639 i40e_get_mac_addr(hw, hw->mac.addr);
7640 if (!is_valid_ether_addr(hw->mac.addr)) {
7641 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
7642 err = -EIO;
7643 goto err_mac_addr;
7644 }
7645 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
7646 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
7647
7648 pci_set_drvdata(pdev, pf);
7649 pci_save_state(pdev);
7650
7651 /* set up periodic task facility */
7652 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
7653 pf->service_timer_period = HZ;
7654
7655 INIT_WORK(&pf->service_task, i40e_service_task);
7656 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
7657 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
7658 pf->link_check_timeout = jiffies;
7659
7660 /* WoL defaults to disabled */
7661 pf->wol_en = false;
7662 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
7663
7664 /* set up the main switch operations */
7665 i40e_determine_queue_usage(pf);
7666 i40e_init_interrupt_scheme(pf);
7667
7668 /* Set up the *vsi struct based on the number of VSIs in the HW,
7669 * and set up our local tracking of the MAIN PF vsi.
7670 */
7671 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
7672 pf->vsi = kzalloc(len, GFP_KERNEL);
7673 if (!pf->vsi) {
7674 err = -ENOMEM;
7675 goto err_switch_setup;
7676 }
7677
7678 err = i40e_setup_pf_switch(pf, false);
7679 if (err) {
7680 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
7681 goto err_vsis;
7682 }
7683
7684 /* The main driver is (mostly) up and happy. We need to set this state
7685 * before setting up the misc vector or we get a race and the vector
7686 * ends up disabled forever.
7687 */
7688 clear_bit(__I40E_DOWN, &pf->state);
7689
7690 /* In case of MSIX we are going to setup the misc vector right here
7691 * to handle admin queue events etc. In case of legacy and MSI
7692 * the misc functionality and queue processing is combined in
7693 * the same vector and that gets setup at open.
7694 */
7695 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7696 err = i40e_setup_misc_vector(pf);
7697 if (err) {
7698 dev_info(&pdev->dev,
7699 "setup of misc vector failed: %d\n", err);
7700 goto err_vsis;
7701 }
7702 }
7703
7704 /* prep for VF support */
7705 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7706 (pf->flags & I40E_FLAG_MSIX_ENABLED)) {
7707 u32 val;
7708
7709 /* disable link interrupts for VFs */
7710 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
7711 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
7712 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
7713 i40e_flush(hw);
7714 }
7715
7716 pfs_found++;
7717
7718 i40e_dbg_pf_init(pf);
7719
7720 /* tell the firmware that we're starting */
7721 dv.major_version = DRV_VERSION_MAJOR;
7722 dv.minor_version = DRV_VERSION_MINOR;
7723 dv.build_version = DRV_VERSION_BUILD;
7724 dv.subbuild_version = 0;
7725 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
7726
7727 /* since everything's happy, start the service_task timer */
7728 mod_timer(&pf->service_timer,
7729 round_jiffies(jiffies + pf->service_timer_period));
7730
7731 /* Get the negotiated link width and speed from PCI config space */
7732 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
7733
7734 i40e_set_pci_config_data(hw, link_status);
7735
7736 dev_info(&pdev->dev, "PCI Express: %s %s\n",
7737 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
7738 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
7739 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
7740 "Unknown"),
7741 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
7742 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
7743 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
7744 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
7745 "Unknown"));
7746
7747 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
7748 hw->bus.speed < i40e_bus_speed_8000) {
7749 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
7750 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
7751 }
7752
7753 return 0;
7754
7755 /* Unwind what we've done if something failed in the setup */
7756 err_vsis:
7757 set_bit(__I40E_DOWN, &pf->state);
7758 i40e_clear_interrupt_scheme(pf);
7759 kfree(pf->vsi);
7760 err_switch_setup:
7761 i40e_reset_interrupt_capability(pf);
7762 del_timer_sync(&pf->service_timer);
7763 err_mac_addr:
7764 err_configure_lan_hmc:
7765 (void)i40e_shutdown_lan_hmc(hw);
7766 err_init_lan_hmc:
7767 kfree(pf->qp_pile);
7768 kfree(pf->irq_pile);
7769 err_sw_init:
7770 err_adminq_setup:
7771 (void)i40e_shutdown_adminq(hw);
7772 err_pf_reset:
7773 iounmap(hw->hw_addr);
7774 err_ioremap:
7775 kfree(pf);
7776 err_pf_alloc:
7777 pci_disable_pcie_error_reporting(pdev);
7778 pci_release_selected_regions(pdev,
7779 pci_select_bars(pdev, IORESOURCE_MEM));
7780 err_pci_reg:
7781 err_dma:
7782 pci_disable_device(pdev);
7783 return err;
7784 }
7785
7786 /**
7787 * i40e_remove - Device removal routine
7788 * @pdev: PCI device information struct
7789 *
7790 * i40e_remove is called by the PCI subsystem to alert the driver
7791 * that is should release a PCI device. This could be caused by a
7792 * Hot-Plug event, or because the driver is going to be removed from
7793 * memory.
7794 **/
7795 static void i40e_remove(struct pci_dev *pdev)
7796 {
7797 struct i40e_pf *pf = pci_get_drvdata(pdev);
7798 i40e_status ret_code;
7799 u32 reg;
7800 int i;
7801
7802 i40e_dbg_pf_exit(pf);
7803
7804 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7805 i40e_free_vfs(pf);
7806 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
7807 }
7808
7809 /* no more scheduling of any task */
7810 set_bit(__I40E_DOWN, &pf->state);
7811 del_timer_sync(&pf->service_timer);
7812 cancel_work_sync(&pf->service_task);
7813
7814 i40e_fdir_teardown(pf);
7815
7816 /* If there is a switch structure or any orphans, remove them.
7817 * This will leave only the PF's VSI remaining.
7818 */
7819 for (i = 0; i < I40E_MAX_VEB; i++) {
7820 if (!pf->veb[i])
7821 continue;
7822
7823 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
7824 pf->veb[i]->uplink_seid == 0)
7825 i40e_switch_branch_release(pf->veb[i]);
7826 }
7827
7828 /* Now we can shutdown the PF's VSI, just before we kill
7829 * adminq and hmc.
7830 */
7831 if (pf->vsi[pf->lan_vsi])
7832 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
7833
7834 i40e_stop_misc_vector(pf);
7835 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7836 synchronize_irq(pf->msix_entries[0].vector);
7837 free_irq(pf->msix_entries[0].vector, pf);
7838 }
7839
7840 /* shutdown and destroy the HMC */
7841 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
7842 if (ret_code)
7843 dev_warn(&pdev->dev,
7844 "Failed to destroy the HMC resources: %d\n", ret_code);
7845
7846 /* shutdown the adminq */
7847 ret_code = i40e_shutdown_adminq(&pf->hw);
7848 if (ret_code)
7849 dev_warn(&pdev->dev,
7850 "Failed to destroy the Admin Queue resources: %d\n",
7851 ret_code);
7852
7853 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
7854 i40e_clear_interrupt_scheme(pf);
7855 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7856 if (pf->vsi[i]) {
7857 i40e_vsi_clear_rings(pf->vsi[i]);
7858 i40e_vsi_clear(pf->vsi[i]);
7859 pf->vsi[i] = NULL;
7860 }
7861 }
7862
7863 for (i = 0; i < I40E_MAX_VEB; i++) {
7864 kfree(pf->veb[i]);
7865 pf->veb[i] = NULL;
7866 }
7867
7868 kfree(pf->qp_pile);
7869 kfree(pf->irq_pile);
7870 kfree(pf->sw_config);
7871 kfree(pf->vsi);
7872
7873 /* force a PF reset to clean anything leftover */
7874 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
7875 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
7876 i40e_flush(&pf->hw);
7877
7878 iounmap(pf->hw.hw_addr);
7879 kfree(pf);
7880 pci_release_selected_regions(pdev,
7881 pci_select_bars(pdev, IORESOURCE_MEM));
7882
7883 pci_disable_pcie_error_reporting(pdev);
7884 pci_disable_device(pdev);
7885 }
7886
7887 /**
7888 * i40e_pci_error_detected - warning that something funky happened in PCI land
7889 * @pdev: PCI device information struct
7890 *
7891 * Called to warn that something happened and the error handling steps
7892 * are in progress. Allows the driver to quiesce things, be ready for
7893 * remediation.
7894 **/
7895 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
7896 enum pci_channel_state error)
7897 {
7898 struct i40e_pf *pf = pci_get_drvdata(pdev);
7899
7900 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
7901
7902 /* shutdown all operations */
7903 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
7904 rtnl_lock();
7905 i40e_prep_for_reset(pf);
7906 rtnl_unlock();
7907 }
7908
7909 /* Request a slot reset */
7910 return PCI_ERS_RESULT_NEED_RESET;
7911 }
7912
7913 /**
7914 * i40e_pci_error_slot_reset - a PCI slot reset just happened
7915 * @pdev: PCI device information struct
7916 *
7917 * Called to find if the driver can work with the device now that
7918 * the pci slot has been reset. If a basic connection seems good
7919 * (registers are readable and have sane content) then return a
7920 * happy little PCI_ERS_RESULT_xxx.
7921 **/
7922 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
7923 {
7924 struct i40e_pf *pf = pci_get_drvdata(pdev);
7925 pci_ers_result_t result;
7926 int err;
7927 u32 reg;
7928
7929 dev_info(&pdev->dev, "%s\n", __func__);
7930 if (pci_enable_device_mem(pdev)) {
7931 dev_info(&pdev->dev,
7932 "Cannot re-enable PCI device after reset.\n");
7933 result = PCI_ERS_RESULT_DISCONNECT;
7934 } else {
7935 pci_set_master(pdev);
7936 pci_restore_state(pdev);
7937 pci_save_state(pdev);
7938 pci_wake_from_d3(pdev, false);
7939
7940 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
7941 if (reg == 0)
7942 result = PCI_ERS_RESULT_RECOVERED;
7943 else
7944 result = PCI_ERS_RESULT_DISCONNECT;
7945 }
7946
7947 err = pci_cleanup_aer_uncorrect_error_status(pdev);
7948 if (err) {
7949 dev_info(&pdev->dev,
7950 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7951 err);
7952 /* non-fatal, continue */
7953 }
7954
7955 return result;
7956 }
7957
7958 /**
7959 * i40e_pci_error_resume - restart operations after PCI error recovery
7960 * @pdev: PCI device information struct
7961 *
7962 * Called to allow the driver to bring things back up after PCI error
7963 * and/or reset recovery has finished.
7964 **/
7965 static void i40e_pci_error_resume(struct pci_dev *pdev)
7966 {
7967 struct i40e_pf *pf = pci_get_drvdata(pdev);
7968
7969 dev_info(&pdev->dev, "%s\n", __func__);
7970 if (test_bit(__I40E_SUSPENDED, &pf->state))
7971 return;
7972
7973 rtnl_lock();
7974 i40e_handle_reset_warning(pf);
7975 rtnl_lock();
7976 }
7977
7978 /**
7979 * i40e_shutdown - PCI callback for shutting down
7980 * @pdev: PCI device information struct
7981 **/
7982 static void i40e_shutdown(struct pci_dev *pdev)
7983 {
7984 struct i40e_pf *pf = pci_get_drvdata(pdev);
7985 struct i40e_hw *hw = &pf->hw;
7986
7987 set_bit(__I40E_SUSPENDED, &pf->state);
7988 set_bit(__I40E_DOWN, &pf->state);
7989 rtnl_lock();
7990 i40e_prep_for_reset(pf);
7991 rtnl_unlock();
7992
7993 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
7994 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
7995
7996 if (system_state == SYSTEM_POWER_OFF) {
7997 pci_wake_from_d3(pdev, pf->wol_en);
7998 pci_set_power_state(pdev, PCI_D3hot);
7999 }
8000 }
8001
8002 #ifdef CONFIG_PM
8003 /**
8004 * i40e_suspend - PCI callback for moving to D3
8005 * @pdev: PCI device information struct
8006 **/
8007 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8008 {
8009 struct i40e_pf *pf = pci_get_drvdata(pdev);
8010 struct i40e_hw *hw = &pf->hw;
8011
8012 set_bit(__I40E_SUSPENDED, &pf->state);
8013 set_bit(__I40E_DOWN, &pf->state);
8014 rtnl_lock();
8015 i40e_prep_for_reset(pf);
8016 rtnl_unlock();
8017
8018 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8019 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8020
8021 pci_wake_from_d3(pdev, pf->wol_en);
8022 pci_set_power_state(pdev, PCI_D3hot);
8023
8024 return 0;
8025 }
8026
8027 /**
8028 * i40e_resume - PCI callback for waking up from D3
8029 * @pdev: PCI device information struct
8030 **/
8031 static int i40e_resume(struct pci_dev *pdev)
8032 {
8033 struct i40e_pf *pf = pci_get_drvdata(pdev);
8034 u32 err;
8035
8036 pci_set_power_state(pdev, PCI_D0);
8037 pci_restore_state(pdev);
8038 /* pci_restore_state() clears dev->state_saves, so
8039 * call pci_save_state() again to restore it.
8040 */
8041 pci_save_state(pdev);
8042
8043 err = pci_enable_device_mem(pdev);
8044 if (err) {
8045 dev_err(&pdev->dev,
8046 "%s: Cannot enable PCI device from suspend\n",
8047 __func__);
8048 return err;
8049 }
8050 pci_set_master(pdev);
8051
8052 /* no wakeup events while running */
8053 pci_wake_from_d3(pdev, false);
8054
8055 /* handling the reset will rebuild the device state */
8056 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8057 clear_bit(__I40E_DOWN, &pf->state);
8058 rtnl_lock();
8059 i40e_reset_and_rebuild(pf, false);
8060 rtnl_unlock();
8061 }
8062
8063 return 0;
8064 }
8065
8066 #endif
8067 static const struct pci_error_handlers i40e_err_handler = {
8068 .error_detected = i40e_pci_error_detected,
8069 .slot_reset = i40e_pci_error_slot_reset,
8070 .resume = i40e_pci_error_resume,
8071 };
8072
8073 static struct pci_driver i40e_driver = {
8074 .name = i40e_driver_name,
8075 .id_table = i40e_pci_tbl,
8076 .probe = i40e_probe,
8077 .remove = i40e_remove,
8078 #ifdef CONFIG_PM
8079 .suspend = i40e_suspend,
8080 .resume = i40e_resume,
8081 #endif
8082 .shutdown = i40e_shutdown,
8083 .err_handler = &i40e_err_handler,
8084 .sriov_configure = i40e_pci_sriov_configure,
8085 };
8086
8087 /**
8088 * i40e_init_module - Driver registration routine
8089 *
8090 * i40e_init_module is the first routine called when the driver is
8091 * loaded. All it does is register with the PCI subsystem.
8092 **/
8093 static int __init i40e_init_module(void)
8094 {
8095 pr_info("%s: %s - version %s\n", i40e_driver_name,
8096 i40e_driver_string, i40e_driver_version_str);
8097 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8098 i40e_dbg_init();
8099 return pci_register_driver(&i40e_driver);
8100 }
8101 module_init(i40e_init_module);
8102
8103 /**
8104 * i40e_exit_module - Driver exit cleanup routine
8105 *
8106 * i40e_exit_module is called just before the driver is removed
8107 * from memory.
8108 **/
8109 static void __exit i40e_exit_module(void)
8110 {
8111 pci_unregister_driver(&i40e_driver);
8112 i40e_dbg_exit();
8113 }
8114 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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