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[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 0
41 #define DRV_VERSION_MINOR 4
42 #define DRV_VERSION_BUILD 19
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 /* required last entry */
78 {0, }
79 };
80 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
81
82 #define I40E_MAX_VF_COUNT 128
83 static int debug = -1;
84 module_param(debug, int, 0);
85 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
86
87 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
88 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
89 MODULE_LICENSE("GPL");
90 MODULE_VERSION(DRV_VERSION);
91
92 /**
93 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
94 * @hw: pointer to the HW structure
95 * @mem: ptr to mem struct to fill out
96 * @size: size of memory requested
97 * @alignment: what to align the allocation to
98 **/
99 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
100 u64 size, u32 alignment)
101 {
102 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
103
104 mem->size = ALIGN(size, alignment);
105 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
106 &mem->pa, GFP_KERNEL);
107 if (!mem->va)
108 return -ENOMEM;
109
110 return 0;
111 }
112
113 /**
114 * i40e_free_dma_mem_d - OS specific memory free for shared code
115 * @hw: pointer to the HW structure
116 * @mem: ptr to mem struct to free
117 **/
118 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
119 {
120 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
121
122 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
123 mem->va = NULL;
124 mem->pa = 0;
125 mem->size = 0;
126
127 return 0;
128 }
129
130 /**
131 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to fill out
134 * @size: size of memory requested
135 **/
136 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
137 u32 size)
138 {
139 mem->size = size;
140 mem->va = kzalloc(size, GFP_KERNEL);
141
142 if (!mem->va)
143 return -ENOMEM;
144
145 return 0;
146 }
147
148 /**
149 * i40e_free_virt_mem_d - OS specific memory free for shared code
150 * @hw: pointer to the HW structure
151 * @mem: ptr to mem struct to free
152 **/
153 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
154 {
155 /* it's ok to kfree a NULL pointer */
156 kfree(mem->va);
157 mem->va = NULL;
158 mem->size = 0;
159
160 return 0;
161 }
162
163 /**
164 * i40e_get_lump - find a lump of free generic resource
165 * @pf: board private structure
166 * @pile: the pile of resource to search
167 * @needed: the number of items needed
168 * @id: an owner id to stick on the items assigned
169 *
170 * Returns the base item index of the lump, or negative for error
171 *
172 * The search_hint trick and lack of advanced fit-finding only work
173 * because we're highly likely to have all the same size lump requests.
174 * Linear search time and any fragmentation should be minimal.
175 **/
176 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
177 u16 needed, u16 id)
178 {
179 int ret = -ENOMEM;
180 int i, j;
181
182 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
183 dev_info(&pf->pdev->dev,
184 "param err: pile=%p needed=%d id=0x%04x\n",
185 pile, needed, id);
186 return -EINVAL;
187 }
188
189 /* start the linear search with an imperfect hint */
190 i = pile->search_hint;
191 while (i < pile->num_entries) {
192 /* skip already allocated entries */
193 if (pile->list[i] & I40E_PILE_VALID_BIT) {
194 i++;
195 continue;
196 }
197
198 /* do we have enough in this lump? */
199 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
200 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
201 break;
202 }
203
204 if (j == needed) {
205 /* there was enough, so assign it to the requestor */
206 for (j = 0; j < needed; j++)
207 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
208 ret = i;
209 pile->search_hint = i + j;
210 break;
211 } else {
212 /* not enough, so skip over it and continue looking */
213 i += j;
214 }
215 }
216
217 return ret;
218 }
219
220 /**
221 * i40e_put_lump - return a lump of generic resource
222 * @pile: the pile of resource to search
223 * @index: the base item index
224 * @id: the owner id of the items assigned
225 *
226 * Returns the count of items in the lump
227 **/
228 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
229 {
230 int valid_id = (id | I40E_PILE_VALID_BIT);
231 int count = 0;
232 int i;
233
234 if (!pile || index >= pile->num_entries)
235 return -EINVAL;
236
237 for (i = index;
238 i < pile->num_entries && pile->list[i] == valid_id;
239 i++) {
240 pile->list[i] = 0;
241 count++;
242 }
243
244 if (count && index < pile->search_hint)
245 pile->search_hint = index;
246
247 return count;
248 }
249
250 /**
251 * i40e_service_event_schedule - Schedule the service task to wake up
252 * @pf: board private structure
253 *
254 * If not already scheduled, this puts the task into the work queue
255 **/
256 static void i40e_service_event_schedule(struct i40e_pf *pf)
257 {
258 if (!test_bit(__I40E_DOWN, &pf->state) &&
259 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
260 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
261 schedule_work(&pf->service_task);
262 }
263
264 /**
265 * i40e_tx_timeout - Respond to a Tx Hang
266 * @netdev: network interface device structure
267 *
268 * If any port has noticed a Tx timeout, it is likely that the whole
269 * device is munged, not just the one netdev port, so go for the full
270 * reset.
271 **/
272 static void i40e_tx_timeout(struct net_device *netdev)
273 {
274 struct i40e_netdev_priv *np = netdev_priv(netdev);
275 struct i40e_vsi *vsi = np->vsi;
276 struct i40e_pf *pf = vsi->back;
277
278 pf->tx_timeout_count++;
279
280 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
281 pf->tx_timeout_recovery_level = 1;
282 pf->tx_timeout_last_recovery = jiffies;
283 netdev_info(netdev, "tx_timeout recovery level %d\n",
284 pf->tx_timeout_recovery_level);
285
286 switch (pf->tx_timeout_recovery_level) {
287 case 0:
288 /* disable and re-enable queues for the VSI */
289 if (in_interrupt()) {
290 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
291 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
292 } else {
293 i40e_vsi_reinit_locked(vsi);
294 }
295 break;
296 case 1:
297 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
298 break;
299 case 2:
300 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
301 break;
302 case 3:
303 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
304 break;
305 default:
306 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
307 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
308 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
309 break;
310 }
311 i40e_service_event_schedule(pf);
312 pf->tx_timeout_recovery_level++;
313 }
314
315 /**
316 * i40e_release_rx_desc - Store the new tail and head values
317 * @rx_ring: ring to bump
318 * @val: new head index
319 **/
320 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
321 {
322 rx_ring->next_to_use = val;
323
324 /* Force memory writes to complete before letting h/w
325 * know there are new descriptors to fetch. (Only
326 * applicable for weak-ordered memory model archs,
327 * such as IA-64).
328 */
329 wmb();
330 writel(val, rx_ring->tail);
331 }
332
333 /**
334 * i40e_get_vsi_stats_struct - Get System Network Statistics
335 * @vsi: the VSI we care about
336 *
337 * Returns the address of the device statistics structure.
338 * The statistics are actually updated from the service task.
339 **/
340 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
341 {
342 return &vsi->net_stats;
343 }
344
345 /**
346 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
347 * @netdev: network interface device structure
348 *
349 * Returns the address of the device statistics structure.
350 * The statistics are actually updated from the service task.
351 **/
352 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
353 struct net_device *netdev,
354 struct rtnl_link_stats64 *stats)
355 {
356 struct i40e_netdev_priv *np = netdev_priv(netdev);
357 struct i40e_ring *tx_ring, *rx_ring;
358 struct i40e_vsi *vsi = np->vsi;
359 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
360 int i;
361
362 if (test_bit(__I40E_DOWN, &vsi->state))
363 return stats;
364
365 if (!vsi->tx_rings)
366 return stats;
367
368 rcu_read_lock();
369 for (i = 0; i < vsi->num_queue_pairs; i++) {
370 u64 bytes, packets;
371 unsigned int start;
372
373 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
374 if (!tx_ring)
375 continue;
376
377 do {
378 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
379 packets = tx_ring->stats.packets;
380 bytes = tx_ring->stats.bytes;
381 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
382
383 stats->tx_packets += packets;
384 stats->tx_bytes += bytes;
385 rx_ring = &tx_ring[1];
386
387 do {
388 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
389 packets = rx_ring->stats.packets;
390 bytes = rx_ring->stats.bytes;
391 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
392
393 stats->rx_packets += packets;
394 stats->rx_bytes += bytes;
395 }
396 rcu_read_unlock();
397
398 /* following stats updated by i40e_watchdog_subtask() */
399 stats->multicast = vsi_stats->multicast;
400 stats->tx_errors = vsi_stats->tx_errors;
401 stats->tx_dropped = vsi_stats->tx_dropped;
402 stats->rx_errors = vsi_stats->rx_errors;
403 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
404 stats->rx_length_errors = vsi_stats->rx_length_errors;
405
406 return stats;
407 }
408
409 /**
410 * i40e_vsi_reset_stats - Resets all stats of the given vsi
411 * @vsi: the VSI to have its stats reset
412 **/
413 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
414 {
415 struct rtnl_link_stats64 *ns;
416 int i;
417
418 if (!vsi)
419 return;
420
421 ns = i40e_get_vsi_stats_struct(vsi);
422 memset(ns, 0, sizeof(*ns));
423 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
424 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
425 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
426 if (vsi->rx_rings && vsi->rx_rings[0]) {
427 for (i = 0; i < vsi->num_queue_pairs; i++) {
428 memset(&vsi->rx_rings[i]->stats, 0 ,
429 sizeof(vsi->rx_rings[i]->stats));
430 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
431 sizeof(vsi->rx_rings[i]->rx_stats));
432 memset(&vsi->tx_rings[i]->stats, 0 ,
433 sizeof(vsi->tx_rings[i]->stats));
434 memset(&vsi->tx_rings[i]->tx_stats, 0,
435 sizeof(vsi->tx_rings[i]->tx_stats));
436 }
437 }
438 vsi->stat_offsets_loaded = false;
439 }
440
441 /**
442 * i40e_pf_reset_stats - Reset all of the stats for the given pf
443 * @pf: the PF to be reset
444 **/
445 void i40e_pf_reset_stats(struct i40e_pf *pf)
446 {
447 int i;
448
449 memset(&pf->stats, 0, sizeof(pf->stats));
450 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
451 pf->stat_offsets_loaded = false;
452
453 for (i = 0; i < I40E_MAX_VEB; i++) {
454 if (pf->veb[i]) {
455 memset(&pf->veb[i]->stats, 0,
456 sizeof(pf->veb[i]->stats));
457 memset(&pf->veb[i]->stats_offsets, 0,
458 sizeof(pf->veb[i]->stats_offsets));
459 pf->veb[i]->stat_offsets_loaded = false;
460 }
461 }
462 }
463
464 /**
465 * i40e_stat_update48 - read and update a 48 bit stat from the chip
466 * @hw: ptr to the hardware info
467 * @hireg: the high 32 bit reg to read
468 * @loreg: the low 32 bit reg to read
469 * @offset_loaded: has the initial offset been loaded yet
470 * @offset: ptr to current offset value
471 * @stat: ptr to the stat
472 *
473 * Since the device stats are not reset at PFReset, they likely will not
474 * be zeroed when the driver starts. We'll save the first values read
475 * and use them as offsets to be subtracted from the raw values in order
476 * to report stats that count from zero. In the process, we also manage
477 * the potential roll-over.
478 **/
479 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
480 bool offset_loaded, u64 *offset, u64 *stat)
481 {
482 u64 new_data;
483
484 if (hw->device_id == I40E_DEV_ID_QEMU) {
485 new_data = rd32(hw, loreg);
486 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
487 } else {
488 new_data = rd64(hw, loreg);
489 }
490 if (!offset_loaded)
491 *offset = new_data;
492 if (likely(new_data >= *offset))
493 *stat = new_data - *offset;
494 else
495 *stat = (new_data + ((u64)1 << 48)) - *offset;
496 *stat &= 0xFFFFFFFFFFFFULL;
497 }
498
499 /**
500 * i40e_stat_update32 - read and update a 32 bit stat from the chip
501 * @hw: ptr to the hardware info
502 * @reg: the hw reg to read
503 * @offset_loaded: has the initial offset been loaded yet
504 * @offset: ptr to current offset value
505 * @stat: ptr to the stat
506 **/
507 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
508 bool offset_loaded, u64 *offset, u64 *stat)
509 {
510 u32 new_data;
511
512 new_data = rd32(hw, reg);
513 if (!offset_loaded)
514 *offset = new_data;
515 if (likely(new_data >= *offset))
516 *stat = (u32)(new_data - *offset);
517 else
518 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
519 }
520
521 /**
522 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
523 * @vsi: the VSI to be updated
524 **/
525 void i40e_update_eth_stats(struct i40e_vsi *vsi)
526 {
527 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
528 struct i40e_pf *pf = vsi->back;
529 struct i40e_hw *hw = &pf->hw;
530 struct i40e_eth_stats *oes;
531 struct i40e_eth_stats *es; /* device's eth stats */
532
533 es = &vsi->eth_stats;
534 oes = &vsi->eth_stats_offsets;
535
536 /* Gather up the stats that the hw collects */
537 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
538 vsi->stat_offsets_loaded,
539 &oes->tx_errors, &es->tx_errors);
540 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
541 vsi->stat_offsets_loaded,
542 &oes->rx_discards, &es->rx_discards);
543 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
546 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
547 vsi->stat_offsets_loaded,
548 &oes->tx_errors, &es->tx_errors);
549
550 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
551 I40E_GLV_GORCL(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_bytes, &es->rx_bytes);
554 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
555 I40E_GLV_UPRCL(stat_idx),
556 vsi->stat_offsets_loaded,
557 &oes->rx_unicast, &es->rx_unicast);
558 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
559 I40E_GLV_MPRCL(stat_idx),
560 vsi->stat_offsets_loaded,
561 &oes->rx_multicast, &es->rx_multicast);
562 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
563 I40E_GLV_BPRCL(stat_idx),
564 vsi->stat_offsets_loaded,
565 &oes->rx_broadcast, &es->rx_broadcast);
566
567 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
568 I40E_GLV_GOTCL(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->tx_bytes, &es->tx_bytes);
571 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
572 I40E_GLV_UPTCL(stat_idx),
573 vsi->stat_offsets_loaded,
574 &oes->tx_unicast, &es->tx_unicast);
575 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
576 I40E_GLV_MPTCL(stat_idx),
577 vsi->stat_offsets_loaded,
578 &oes->tx_multicast, &es->tx_multicast);
579 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
580 I40E_GLV_BPTCL(stat_idx),
581 vsi->stat_offsets_loaded,
582 &oes->tx_broadcast, &es->tx_broadcast);
583 vsi->stat_offsets_loaded = true;
584 }
585
586 /**
587 * i40e_update_veb_stats - Update Switch component statistics
588 * @veb: the VEB being updated
589 **/
590 static void i40e_update_veb_stats(struct i40e_veb *veb)
591 {
592 struct i40e_pf *pf = veb->pf;
593 struct i40e_hw *hw = &pf->hw;
594 struct i40e_eth_stats *oes;
595 struct i40e_eth_stats *es; /* device's eth stats */
596 int idx = 0;
597
598 idx = veb->stats_idx;
599 es = &veb->stats;
600 oes = &veb->stats_offsets;
601
602 /* Gather up the stats that the hw collects */
603 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
604 veb->stat_offsets_loaded,
605 &oes->tx_discards, &es->tx_discards);
606 if (hw->revision_id > 0)
607 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
608 veb->stat_offsets_loaded,
609 &oes->rx_unknown_protocol,
610 &es->rx_unknown_protocol);
611 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->rx_bytes, &es->rx_bytes);
614 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->rx_unicast, &es->rx_unicast);
617 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
618 veb->stat_offsets_loaded,
619 &oes->rx_multicast, &es->rx_multicast);
620 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
621 veb->stat_offsets_loaded,
622 &oes->rx_broadcast, &es->rx_broadcast);
623
624 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
625 veb->stat_offsets_loaded,
626 &oes->tx_bytes, &es->tx_bytes);
627 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
628 veb->stat_offsets_loaded,
629 &oes->tx_unicast, &es->tx_unicast);
630 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
631 veb->stat_offsets_loaded,
632 &oes->tx_multicast, &es->tx_multicast);
633 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
634 veb->stat_offsets_loaded,
635 &oes->tx_broadcast, &es->tx_broadcast);
636 veb->stat_offsets_loaded = true;
637 }
638
639 /**
640 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
641 * @pf: the corresponding PF
642 *
643 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
644 **/
645 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
646 {
647 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
648 struct i40e_hw_port_stats *nsd = &pf->stats;
649 struct i40e_hw *hw = &pf->hw;
650 u64 xoff = 0;
651 u16 i, v;
652
653 if ((hw->fc.current_mode != I40E_FC_FULL) &&
654 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
655 return;
656
657 xoff = nsd->link_xoff_rx;
658 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
659 pf->stat_offsets_loaded,
660 &osd->link_xoff_rx, &nsd->link_xoff_rx);
661
662 /* No new LFC xoff rx */
663 if (!(nsd->link_xoff_rx - xoff))
664 return;
665
666 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
667 for (v = 0; v < pf->num_alloc_vsi; v++) {
668 struct i40e_vsi *vsi = pf->vsi[v];
669
670 if (!vsi || !vsi->tx_rings[0])
671 continue;
672
673 for (i = 0; i < vsi->num_queue_pairs; i++) {
674 struct i40e_ring *ring = vsi->tx_rings[i];
675 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
676 }
677 }
678 }
679
680 /**
681 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
682 * @pf: the corresponding PF
683 *
684 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
685 **/
686 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
687 {
688 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
689 struct i40e_hw_port_stats *nsd = &pf->stats;
690 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
691 struct i40e_dcbx_config *dcb_cfg;
692 struct i40e_hw *hw = &pf->hw;
693 u16 i, v;
694 u8 tc;
695
696 dcb_cfg = &hw->local_dcbx_config;
697
698 /* See if DCB enabled with PFC TC */
699 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
700 !(dcb_cfg->pfc.pfcenable)) {
701 i40e_update_link_xoff_rx(pf);
702 return;
703 }
704
705 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
706 u64 prio_xoff = nsd->priority_xoff_rx[i];
707 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
708 pf->stat_offsets_loaded,
709 &osd->priority_xoff_rx[i],
710 &nsd->priority_xoff_rx[i]);
711
712 /* No new PFC xoff rx */
713 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
714 continue;
715 /* Get the TC for given priority */
716 tc = dcb_cfg->etscfg.prioritytable[i];
717 xoff[tc] = true;
718 }
719
720 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
721 for (v = 0; v < pf->num_alloc_vsi; v++) {
722 struct i40e_vsi *vsi = pf->vsi[v];
723
724 if (!vsi || !vsi->tx_rings[0])
725 continue;
726
727 for (i = 0; i < vsi->num_queue_pairs; i++) {
728 struct i40e_ring *ring = vsi->tx_rings[i];
729
730 tc = ring->dcb_tc;
731 if (xoff[tc])
732 clear_bit(__I40E_HANG_CHECK_ARMED,
733 &ring->state);
734 }
735 }
736 }
737
738 /**
739 * i40e_update_vsi_stats - Update the vsi statistics counters.
740 * @vsi: the VSI to be updated
741 *
742 * There are a few instances where we store the same stat in a
743 * couple of different structs. This is partly because we have
744 * the netdev stats that need to be filled out, which is slightly
745 * different from the "eth_stats" defined by the chip and used in
746 * VF communications. We sort it out here.
747 **/
748 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
749 {
750 struct i40e_pf *pf = vsi->back;
751 struct rtnl_link_stats64 *ons;
752 struct rtnl_link_stats64 *ns; /* netdev stats */
753 struct i40e_eth_stats *oes;
754 struct i40e_eth_stats *es; /* device's eth stats */
755 u32 tx_restart, tx_busy;
756 u32 rx_page, rx_buf;
757 u64 rx_p, rx_b;
758 u64 tx_p, tx_b;
759 u16 q;
760
761 if (test_bit(__I40E_DOWN, &vsi->state) ||
762 test_bit(__I40E_CONFIG_BUSY, &pf->state))
763 return;
764
765 ns = i40e_get_vsi_stats_struct(vsi);
766 ons = &vsi->net_stats_offsets;
767 es = &vsi->eth_stats;
768 oes = &vsi->eth_stats_offsets;
769
770 /* Gather up the netdev and vsi stats that the driver collects
771 * on the fly during packet processing
772 */
773 rx_b = rx_p = 0;
774 tx_b = tx_p = 0;
775 tx_restart = tx_busy = 0;
776 rx_page = 0;
777 rx_buf = 0;
778 rcu_read_lock();
779 for (q = 0; q < vsi->num_queue_pairs; q++) {
780 struct i40e_ring *p;
781 u64 bytes, packets;
782 unsigned int start;
783
784 /* locate Tx ring */
785 p = ACCESS_ONCE(vsi->tx_rings[q]);
786
787 do {
788 start = u64_stats_fetch_begin_irq(&p->syncp);
789 packets = p->stats.packets;
790 bytes = p->stats.bytes;
791 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
792 tx_b += bytes;
793 tx_p += packets;
794 tx_restart += p->tx_stats.restart_queue;
795 tx_busy += p->tx_stats.tx_busy;
796
797 /* Rx queue is part of the same block as Tx queue */
798 p = &p[1];
799 do {
800 start = u64_stats_fetch_begin_irq(&p->syncp);
801 packets = p->stats.packets;
802 bytes = p->stats.bytes;
803 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
804 rx_b += bytes;
805 rx_p += packets;
806 rx_buf += p->rx_stats.alloc_buff_failed;
807 rx_page += p->rx_stats.alloc_page_failed;
808 }
809 rcu_read_unlock();
810 vsi->tx_restart = tx_restart;
811 vsi->tx_busy = tx_busy;
812 vsi->rx_page_failed = rx_page;
813 vsi->rx_buf_failed = rx_buf;
814
815 ns->rx_packets = rx_p;
816 ns->rx_bytes = rx_b;
817 ns->tx_packets = tx_p;
818 ns->tx_bytes = tx_b;
819
820 /* update netdev stats from eth stats */
821 i40e_update_eth_stats(vsi);
822 ons->tx_errors = oes->tx_errors;
823 ns->tx_errors = es->tx_errors;
824 ons->multicast = oes->rx_multicast;
825 ns->multicast = es->rx_multicast;
826 ons->rx_dropped = oes->rx_discards;
827 ns->rx_dropped = es->rx_discards;
828 ons->tx_dropped = oes->tx_discards;
829 ns->tx_dropped = es->tx_discards;
830
831 /* pull in a couple PF stats if this is the main vsi */
832 if (vsi == pf->vsi[pf->lan_vsi]) {
833 ns->rx_crc_errors = pf->stats.crc_errors;
834 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
835 ns->rx_length_errors = pf->stats.rx_length_errors;
836 }
837 }
838
839 /**
840 * i40e_update_pf_stats - Update the pf statistics counters.
841 * @pf: the PF to be updated
842 **/
843 static void i40e_update_pf_stats(struct i40e_pf *pf)
844 {
845 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
846 struct i40e_hw_port_stats *nsd = &pf->stats;
847 struct i40e_hw *hw = &pf->hw;
848 u32 val;
849 int i;
850
851 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
852 I40E_GLPRT_GORCL(hw->port),
853 pf->stat_offsets_loaded,
854 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
855 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
856 I40E_GLPRT_GOTCL(hw->port),
857 pf->stat_offsets_loaded,
858 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
859 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
860 pf->stat_offsets_loaded,
861 &osd->eth.rx_discards,
862 &nsd->eth.rx_discards);
863 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
864 pf->stat_offsets_loaded,
865 &osd->eth.tx_discards,
866 &nsd->eth.tx_discards);
867
868 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
869 I40E_GLPRT_UPRCL(hw->port),
870 pf->stat_offsets_loaded,
871 &osd->eth.rx_unicast,
872 &nsd->eth.rx_unicast);
873 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
874 I40E_GLPRT_MPRCL(hw->port),
875 pf->stat_offsets_loaded,
876 &osd->eth.rx_multicast,
877 &nsd->eth.rx_multicast);
878 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
879 I40E_GLPRT_BPRCL(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->eth.rx_broadcast,
882 &nsd->eth.rx_broadcast);
883 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
884 I40E_GLPRT_UPTCL(hw->port),
885 pf->stat_offsets_loaded,
886 &osd->eth.tx_unicast,
887 &nsd->eth.tx_unicast);
888 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
889 I40E_GLPRT_MPTCL(hw->port),
890 pf->stat_offsets_loaded,
891 &osd->eth.tx_multicast,
892 &nsd->eth.tx_multicast);
893 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
894 I40E_GLPRT_BPTCL(hw->port),
895 pf->stat_offsets_loaded,
896 &osd->eth.tx_broadcast,
897 &nsd->eth.tx_broadcast);
898
899 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
900 pf->stat_offsets_loaded,
901 &osd->tx_dropped_link_down,
902 &nsd->tx_dropped_link_down);
903
904 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->crc_errors, &nsd->crc_errors);
907
908 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->illegal_bytes, &nsd->illegal_bytes);
911
912 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->mac_local_faults,
915 &nsd->mac_local_faults);
916 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->mac_remote_faults,
919 &nsd->mac_remote_faults);
920
921 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->rx_length_errors,
924 &nsd->rx_length_errors);
925
926 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->link_xon_rx, &nsd->link_xon_rx);
929 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
930 pf->stat_offsets_loaded,
931 &osd->link_xon_tx, &nsd->link_xon_tx);
932 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
933 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->link_xoff_tx, &nsd->link_xoff_tx);
936
937 for (i = 0; i < 8; i++) {
938 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
939 pf->stat_offsets_loaded,
940 &osd->priority_xon_rx[i],
941 &nsd->priority_xon_rx[i]);
942 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
943 pf->stat_offsets_loaded,
944 &osd->priority_xon_tx[i],
945 &nsd->priority_xon_tx[i]);
946 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
947 pf->stat_offsets_loaded,
948 &osd->priority_xoff_tx[i],
949 &nsd->priority_xoff_tx[i]);
950 i40e_stat_update32(hw,
951 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
952 pf->stat_offsets_loaded,
953 &osd->priority_xon_2_xoff[i],
954 &nsd->priority_xon_2_xoff[i]);
955 }
956
957 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
958 I40E_GLPRT_PRC64L(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->rx_size_64, &nsd->rx_size_64);
961 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
962 I40E_GLPRT_PRC127L(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->rx_size_127, &nsd->rx_size_127);
965 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
966 I40E_GLPRT_PRC255L(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->rx_size_255, &nsd->rx_size_255);
969 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
970 I40E_GLPRT_PRC511L(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_size_511, &nsd->rx_size_511);
973 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
974 I40E_GLPRT_PRC1023L(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_size_1023, &nsd->rx_size_1023);
977 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
978 I40E_GLPRT_PRC1522L(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->rx_size_1522, &nsd->rx_size_1522);
981 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
982 I40E_GLPRT_PRC9522L(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->rx_size_big, &nsd->rx_size_big);
985
986 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
987 I40E_GLPRT_PTC64L(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->tx_size_64, &nsd->tx_size_64);
990 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
991 I40E_GLPRT_PTC127L(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->tx_size_127, &nsd->tx_size_127);
994 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
995 I40E_GLPRT_PTC255L(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->tx_size_255, &nsd->tx_size_255);
998 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
999 I40E_GLPRT_PTC511L(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->tx_size_511, &nsd->tx_size_511);
1002 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1003 I40E_GLPRT_PTC1023L(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->tx_size_1023, &nsd->tx_size_1023);
1006 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1007 I40E_GLPRT_PTC1522L(hw->port),
1008 pf->stat_offsets_loaded,
1009 &osd->tx_size_1522, &nsd->tx_size_1522);
1010 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1011 I40E_GLPRT_PTC9522L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->tx_size_big, &nsd->tx_size_big);
1014
1015 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_undersize, &nsd->rx_undersize);
1018 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->rx_fragments, &nsd->rx_fragments);
1021 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_oversize, &nsd->rx_oversize);
1024 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_jabber, &nsd->rx_jabber);
1027
1028 /* FDIR stats */
1029 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1030 pf->stat_offsets_loaded,
1031 &osd->fd_atr_match, &nsd->fd_atr_match);
1032 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1033 pf->stat_offsets_loaded,
1034 &osd->fd_sb_match, &nsd->fd_sb_match);
1035
1036 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1037 nsd->tx_lpi_status =
1038 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1039 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1040 nsd->rx_lpi_status =
1041 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1042 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1043 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1044 pf->stat_offsets_loaded,
1045 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1046 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1047 pf->stat_offsets_loaded,
1048 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1049
1050 pf->stat_offsets_loaded = true;
1051 }
1052
1053 /**
1054 * i40e_update_stats - Update the various statistics counters.
1055 * @vsi: the VSI to be updated
1056 *
1057 * Update the various stats for this VSI and its related entities.
1058 **/
1059 void i40e_update_stats(struct i40e_vsi *vsi)
1060 {
1061 struct i40e_pf *pf = vsi->back;
1062
1063 if (vsi == pf->vsi[pf->lan_vsi])
1064 i40e_update_pf_stats(pf);
1065
1066 i40e_update_vsi_stats(vsi);
1067 }
1068
1069 /**
1070 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1071 * @vsi: the VSI to be searched
1072 * @macaddr: the MAC address
1073 * @vlan: the vlan
1074 * @is_vf: make sure its a vf filter, else doesn't matter
1075 * @is_netdev: make sure its a netdev filter, else doesn't matter
1076 *
1077 * Returns ptr to the filter object or NULL
1078 **/
1079 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1080 u8 *macaddr, s16 vlan,
1081 bool is_vf, bool is_netdev)
1082 {
1083 struct i40e_mac_filter *f;
1084
1085 if (!vsi || !macaddr)
1086 return NULL;
1087
1088 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1089 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1090 (vlan == f->vlan) &&
1091 (!is_vf || f->is_vf) &&
1092 (!is_netdev || f->is_netdev))
1093 return f;
1094 }
1095 return NULL;
1096 }
1097
1098 /**
1099 * i40e_find_mac - Find a mac addr in the macvlan filters list
1100 * @vsi: the VSI to be searched
1101 * @macaddr: the MAC address we are searching for
1102 * @is_vf: make sure its a vf filter, else doesn't matter
1103 * @is_netdev: make sure its a netdev filter, else doesn't matter
1104 *
1105 * Returns the first filter with the provided MAC address or NULL if
1106 * MAC address was not found
1107 **/
1108 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1109 bool is_vf, bool is_netdev)
1110 {
1111 struct i40e_mac_filter *f;
1112
1113 if (!vsi || !macaddr)
1114 return NULL;
1115
1116 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1117 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1118 (!is_vf || f->is_vf) &&
1119 (!is_netdev || f->is_netdev))
1120 return f;
1121 }
1122 return NULL;
1123 }
1124
1125 /**
1126 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1127 * @vsi: the VSI to be searched
1128 *
1129 * Returns true if VSI is in vlan mode or false otherwise
1130 **/
1131 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1132 {
1133 struct i40e_mac_filter *f;
1134
1135 /* Only -1 for all the filters denotes not in vlan mode
1136 * so we have to go through all the list in order to make sure
1137 */
1138 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1139 if (f->vlan >= 0)
1140 return true;
1141 }
1142
1143 return false;
1144 }
1145
1146 /**
1147 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1148 * @vsi: the VSI to be searched
1149 * @macaddr: the mac address to be filtered
1150 * @is_vf: true if it is a vf
1151 * @is_netdev: true if it is a netdev
1152 *
1153 * Goes through all the macvlan filters and adds a
1154 * macvlan filter for each unique vlan that already exists
1155 *
1156 * Returns first filter found on success, else NULL
1157 **/
1158 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1159 bool is_vf, bool is_netdev)
1160 {
1161 struct i40e_mac_filter *f;
1162
1163 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1164 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1165 is_vf, is_netdev)) {
1166 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1167 is_vf, is_netdev))
1168 return NULL;
1169 }
1170 }
1171
1172 return list_first_entry_or_null(&vsi->mac_filter_list,
1173 struct i40e_mac_filter, list);
1174 }
1175
1176 /**
1177 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1178 * @vsi: the PF Main VSI - inappropriate for any other VSI
1179 * @macaddr: the MAC address
1180 **/
1181 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1182 {
1183 struct i40e_aqc_remove_macvlan_element_data element;
1184 struct i40e_pf *pf = vsi->back;
1185 i40e_status aq_ret;
1186
1187 /* Only appropriate for the PF main VSI */
1188 if (vsi->type != I40E_VSI_MAIN)
1189 return;
1190
1191 ether_addr_copy(element.mac_addr, macaddr);
1192 element.vlan_tag = 0;
1193 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1194 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1195 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1196 if (aq_ret)
1197 dev_err(&pf->pdev->dev, "Could not remove default MAC-VLAN\n");
1198 }
1199
1200 /**
1201 * i40e_add_filter - Add a mac/vlan filter to the VSI
1202 * @vsi: the VSI to be searched
1203 * @macaddr: the MAC address
1204 * @vlan: the vlan
1205 * @is_vf: make sure its a vf filter, else doesn't matter
1206 * @is_netdev: make sure its a netdev filter, else doesn't matter
1207 *
1208 * Returns ptr to the filter object or NULL when no memory available.
1209 **/
1210 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1211 u8 *macaddr, s16 vlan,
1212 bool is_vf, bool is_netdev)
1213 {
1214 struct i40e_mac_filter *f;
1215
1216 if (!vsi || !macaddr)
1217 return NULL;
1218
1219 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1220 if (!f) {
1221 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1222 if (!f)
1223 goto add_filter_out;
1224
1225 ether_addr_copy(f->macaddr, macaddr);
1226 f->vlan = vlan;
1227 f->changed = true;
1228
1229 INIT_LIST_HEAD(&f->list);
1230 list_add(&f->list, &vsi->mac_filter_list);
1231 }
1232
1233 /* increment counter and add a new flag if needed */
1234 if (is_vf) {
1235 if (!f->is_vf) {
1236 f->is_vf = true;
1237 f->counter++;
1238 }
1239 } else if (is_netdev) {
1240 if (!f->is_netdev) {
1241 f->is_netdev = true;
1242 f->counter++;
1243 }
1244 } else {
1245 f->counter++;
1246 }
1247
1248 /* changed tells sync_filters_subtask to
1249 * push the filter down to the firmware
1250 */
1251 if (f->changed) {
1252 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1253 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1254 }
1255
1256 add_filter_out:
1257 return f;
1258 }
1259
1260 /**
1261 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1262 * @vsi: the VSI to be searched
1263 * @macaddr: the MAC address
1264 * @vlan: the vlan
1265 * @is_vf: make sure it's a vf filter, else doesn't matter
1266 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1267 **/
1268 void i40e_del_filter(struct i40e_vsi *vsi,
1269 u8 *macaddr, s16 vlan,
1270 bool is_vf, bool is_netdev)
1271 {
1272 struct i40e_mac_filter *f;
1273
1274 if (!vsi || !macaddr)
1275 return;
1276
1277 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1278 if (!f || f->counter == 0)
1279 return;
1280
1281 if (is_vf) {
1282 if (f->is_vf) {
1283 f->is_vf = false;
1284 f->counter--;
1285 }
1286 } else if (is_netdev) {
1287 if (f->is_netdev) {
1288 f->is_netdev = false;
1289 f->counter--;
1290 }
1291 } else {
1292 /* make sure we don't remove a filter in use by vf or netdev */
1293 int min_f = 0;
1294 min_f += (f->is_vf ? 1 : 0);
1295 min_f += (f->is_netdev ? 1 : 0);
1296
1297 if (f->counter > min_f)
1298 f->counter--;
1299 }
1300
1301 /* counter == 0 tells sync_filters_subtask to
1302 * remove the filter from the firmware's list
1303 */
1304 if (f->counter == 0) {
1305 f->changed = true;
1306 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1307 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1308 }
1309 }
1310
1311 /**
1312 * i40e_set_mac - NDO callback to set mac address
1313 * @netdev: network interface device structure
1314 * @p: pointer to an address structure
1315 *
1316 * Returns 0 on success, negative on failure
1317 **/
1318 static int i40e_set_mac(struct net_device *netdev, void *p)
1319 {
1320 struct i40e_netdev_priv *np = netdev_priv(netdev);
1321 struct i40e_vsi *vsi = np->vsi;
1322 struct sockaddr *addr = p;
1323 struct i40e_mac_filter *f;
1324
1325 if (!is_valid_ether_addr(addr->sa_data))
1326 return -EADDRNOTAVAIL;
1327
1328 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1329
1330 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1331 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1332 return -EADDRNOTAVAIL;
1333
1334 if (vsi->type == I40E_VSI_MAIN) {
1335 i40e_status ret;
1336 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1337 I40E_AQC_WRITE_TYPE_LAA_WOL,
1338 addr->sa_data, NULL);
1339 if (ret) {
1340 netdev_info(netdev,
1341 "Addr change for Main VSI failed: %d\n",
1342 ret);
1343 return -EADDRNOTAVAIL;
1344 }
1345 }
1346
1347 f = i40e_find_mac(vsi, addr->sa_data, false, true);
1348 if (!f) {
1349 /* In order to be sure to not drop any packets, add the
1350 * new address first then delete the old one.
1351 */
1352 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1353 false, false);
1354 if (!f)
1355 return -ENOMEM;
1356
1357 i40e_sync_vsi_filters(vsi);
1358 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1359 false, false);
1360 i40e_sync_vsi_filters(vsi);
1361 }
1362
1363 f->is_laa = true;
1364 if (!ether_addr_equal(netdev->dev_addr, addr->sa_data))
1365 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1366
1367 return 0;
1368 }
1369
1370 /**
1371 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1372 * @vsi: the VSI being setup
1373 * @ctxt: VSI context structure
1374 * @enabled_tc: Enabled TCs bitmap
1375 * @is_add: True if called before Add VSI
1376 *
1377 * Setup VSI queue mapping for enabled traffic classes.
1378 **/
1379 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1380 struct i40e_vsi_context *ctxt,
1381 u8 enabled_tc,
1382 bool is_add)
1383 {
1384 struct i40e_pf *pf = vsi->back;
1385 u16 sections = 0;
1386 u8 netdev_tc = 0;
1387 u16 numtc = 0;
1388 u16 qcount;
1389 u8 offset;
1390 u16 qmap;
1391 int i;
1392 u16 num_tc_qps = 0;
1393
1394 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1395 offset = 0;
1396
1397 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1398 /* Find numtc from enabled TC bitmap */
1399 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1400 if (enabled_tc & (1 << i)) /* TC is enabled */
1401 numtc++;
1402 }
1403 if (!numtc) {
1404 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1405 numtc = 1;
1406 }
1407 } else {
1408 /* At least TC0 is enabled in case of non-DCB case */
1409 numtc = 1;
1410 }
1411
1412 vsi->tc_config.numtc = numtc;
1413 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1414 /* Number of queues per enabled TC */
1415 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1416 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1417
1418 /* Setup queue offset/count for all TCs for given VSI */
1419 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1420 /* See if the given TC is enabled for the given VSI */
1421 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1422 int pow, num_qps;
1423
1424 switch (vsi->type) {
1425 case I40E_VSI_MAIN:
1426 qcount = min_t(int, pf->rss_size, num_tc_qps);
1427 break;
1428 case I40E_VSI_FDIR:
1429 case I40E_VSI_SRIOV:
1430 case I40E_VSI_VMDQ2:
1431 default:
1432 qcount = num_tc_qps;
1433 WARN_ON(i != 0);
1434 break;
1435 }
1436 vsi->tc_config.tc_info[i].qoffset = offset;
1437 vsi->tc_config.tc_info[i].qcount = qcount;
1438
1439 /* find the power-of-2 of the number of queue pairs */
1440 num_qps = qcount;
1441 pow = 0;
1442 while (num_qps && ((1 << pow) < qcount)) {
1443 pow++;
1444 num_qps >>= 1;
1445 }
1446
1447 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1448 qmap =
1449 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1450 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1451
1452 offset += qcount;
1453 } else {
1454 /* TC is not enabled so set the offset to
1455 * default queue and allocate one queue
1456 * for the given TC.
1457 */
1458 vsi->tc_config.tc_info[i].qoffset = 0;
1459 vsi->tc_config.tc_info[i].qcount = 1;
1460 vsi->tc_config.tc_info[i].netdev_tc = 0;
1461
1462 qmap = 0;
1463 }
1464 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1465 }
1466
1467 /* Set actual Tx/Rx queue pairs */
1468 vsi->num_queue_pairs = offset;
1469
1470 /* Scheduler section valid can only be set for ADD VSI */
1471 if (is_add) {
1472 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1473
1474 ctxt->info.up_enable_bits = enabled_tc;
1475 }
1476 if (vsi->type == I40E_VSI_SRIOV) {
1477 ctxt->info.mapping_flags |=
1478 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1479 for (i = 0; i < vsi->num_queue_pairs; i++)
1480 ctxt->info.queue_mapping[i] =
1481 cpu_to_le16(vsi->base_queue + i);
1482 } else {
1483 ctxt->info.mapping_flags |=
1484 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1485 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1486 }
1487 ctxt->info.valid_sections |= cpu_to_le16(sections);
1488 }
1489
1490 /**
1491 * i40e_set_rx_mode - NDO callback to set the netdev filters
1492 * @netdev: network interface device structure
1493 **/
1494 static void i40e_set_rx_mode(struct net_device *netdev)
1495 {
1496 struct i40e_netdev_priv *np = netdev_priv(netdev);
1497 struct i40e_mac_filter *f, *ftmp;
1498 struct i40e_vsi *vsi = np->vsi;
1499 struct netdev_hw_addr *uca;
1500 struct netdev_hw_addr *mca;
1501 struct netdev_hw_addr *ha;
1502
1503 /* add addr if not already in the filter list */
1504 netdev_for_each_uc_addr(uca, netdev) {
1505 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1506 if (i40e_is_vsi_in_vlan(vsi))
1507 i40e_put_mac_in_vlan(vsi, uca->addr,
1508 false, true);
1509 else
1510 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1511 false, true);
1512 }
1513 }
1514
1515 netdev_for_each_mc_addr(mca, netdev) {
1516 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1517 if (i40e_is_vsi_in_vlan(vsi))
1518 i40e_put_mac_in_vlan(vsi, mca->addr,
1519 false, true);
1520 else
1521 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1522 false, true);
1523 }
1524 }
1525
1526 /* remove filter if not in netdev list */
1527 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1528 bool found = false;
1529
1530 if (!f->is_netdev)
1531 continue;
1532
1533 if (is_multicast_ether_addr(f->macaddr)) {
1534 netdev_for_each_mc_addr(mca, netdev) {
1535 if (ether_addr_equal(mca->addr, f->macaddr)) {
1536 found = true;
1537 break;
1538 }
1539 }
1540 } else {
1541 netdev_for_each_uc_addr(uca, netdev) {
1542 if (ether_addr_equal(uca->addr, f->macaddr)) {
1543 found = true;
1544 break;
1545 }
1546 }
1547
1548 for_each_dev_addr(netdev, ha) {
1549 if (ether_addr_equal(ha->addr, f->macaddr)) {
1550 found = true;
1551 break;
1552 }
1553 }
1554 }
1555 if (!found)
1556 i40e_del_filter(
1557 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1558 }
1559
1560 /* check for other flag changes */
1561 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1562 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1563 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1564 }
1565 }
1566
1567 /**
1568 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1569 * @vsi: ptr to the VSI
1570 *
1571 * Push any outstanding VSI filter changes through the AdminQ.
1572 *
1573 * Returns 0 or error value
1574 **/
1575 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1576 {
1577 struct i40e_mac_filter *f, *ftmp;
1578 bool promisc_forced_on = false;
1579 bool add_happened = false;
1580 int filter_list_len = 0;
1581 u32 changed_flags = 0;
1582 i40e_status aq_ret = 0;
1583 struct i40e_pf *pf;
1584 int num_add = 0;
1585 int num_del = 0;
1586 u16 cmd_flags;
1587
1588 /* empty array typed pointers, kcalloc later */
1589 struct i40e_aqc_add_macvlan_element_data *add_list;
1590 struct i40e_aqc_remove_macvlan_element_data *del_list;
1591
1592 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1593 usleep_range(1000, 2000);
1594 pf = vsi->back;
1595
1596 if (vsi->netdev) {
1597 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1598 vsi->current_netdev_flags = vsi->netdev->flags;
1599 }
1600
1601 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1602 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1603
1604 filter_list_len = pf->hw.aq.asq_buf_size /
1605 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1606 del_list = kcalloc(filter_list_len,
1607 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1608 GFP_KERNEL);
1609 if (!del_list)
1610 return -ENOMEM;
1611
1612 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1613 if (!f->changed)
1614 continue;
1615
1616 if (f->counter != 0)
1617 continue;
1618 f->changed = false;
1619 cmd_flags = 0;
1620
1621 /* add to delete list */
1622 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1623 del_list[num_del].vlan_tag =
1624 cpu_to_le16((u16)(f->vlan ==
1625 I40E_VLAN_ANY ? 0 : f->vlan));
1626
1627 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1628 del_list[num_del].flags = cmd_flags;
1629 num_del++;
1630
1631 /* unlink from filter list */
1632 list_del(&f->list);
1633 kfree(f);
1634
1635 /* flush a full buffer */
1636 if (num_del == filter_list_len) {
1637 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1638 vsi->seid, del_list, num_del,
1639 NULL);
1640 num_del = 0;
1641 memset(del_list, 0, sizeof(*del_list));
1642
1643 if (aq_ret &&
1644 pf->hw.aq.asq_last_status !=
1645 I40E_AQ_RC_ENOENT)
1646 dev_info(&pf->pdev->dev,
1647 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1648 aq_ret,
1649 pf->hw.aq.asq_last_status);
1650 }
1651 }
1652 if (num_del) {
1653 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1654 del_list, num_del, NULL);
1655 num_del = 0;
1656
1657 if (aq_ret &&
1658 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1659 dev_info(&pf->pdev->dev,
1660 "ignoring delete macvlan error, err %d, aq_err %d\n",
1661 aq_ret, pf->hw.aq.asq_last_status);
1662 }
1663
1664 kfree(del_list);
1665 del_list = NULL;
1666
1667 /* do all the adds now */
1668 filter_list_len = pf->hw.aq.asq_buf_size /
1669 sizeof(struct i40e_aqc_add_macvlan_element_data),
1670 add_list = kcalloc(filter_list_len,
1671 sizeof(struct i40e_aqc_add_macvlan_element_data),
1672 GFP_KERNEL);
1673 if (!add_list)
1674 return -ENOMEM;
1675
1676 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1677 if (!f->changed)
1678 continue;
1679
1680 if (f->counter == 0)
1681 continue;
1682 f->changed = false;
1683 add_happened = true;
1684 cmd_flags = 0;
1685
1686 /* add to add array */
1687 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1688 add_list[num_add].vlan_tag =
1689 cpu_to_le16(
1690 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1691 add_list[num_add].queue_number = 0;
1692
1693 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1694 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1695 num_add++;
1696
1697 /* flush a full buffer */
1698 if (num_add == filter_list_len) {
1699 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1700 add_list, num_add,
1701 NULL);
1702 num_add = 0;
1703
1704 if (aq_ret)
1705 break;
1706 memset(add_list, 0, sizeof(*add_list));
1707 }
1708 }
1709 if (num_add) {
1710 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1711 add_list, num_add, NULL);
1712 num_add = 0;
1713 }
1714 kfree(add_list);
1715 add_list = NULL;
1716
1717 if (add_happened && (!aq_ret)) {
1718 /* do nothing */;
1719 } else if (add_happened && (aq_ret)) {
1720 dev_info(&pf->pdev->dev,
1721 "add filter failed, err %d, aq_err %d\n",
1722 aq_ret, pf->hw.aq.asq_last_status);
1723 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1724 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1725 &vsi->state)) {
1726 promisc_forced_on = true;
1727 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1728 &vsi->state);
1729 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1730 }
1731 }
1732 }
1733
1734 /* check for changes in promiscuous modes */
1735 if (changed_flags & IFF_ALLMULTI) {
1736 bool cur_multipromisc;
1737 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1738 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1739 vsi->seid,
1740 cur_multipromisc,
1741 NULL);
1742 if (aq_ret)
1743 dev_info(&pf->pdev->dev,
1744 "set multi promisc failed, err %d, aq_err %d\n",
1745 aq_ret, pf->hw.aq.asq_last_status);
1746 }
1747 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1748 bool cur_promisc;
1749 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1750 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1751 &vsi->state));
1752 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1753 vsi->seid,
1754 cur_promisc, NULL);
1755 if (aq_ret)
1756 dev_info(&pf->pdev->dev,
1757 "set uni promisc failed, err %d, aq_err %d\n",
1758 aq_ret, pf->hw.aq.asq_last_status);
1759 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1760 vsi->seid,
1761 cur_promisc, NULL);
1762 if (aq_ret)
1763 dev_info(&pf->pdev->dev,
1764 "set brdcast promisc failed, err %d, aq_err %d\n",
1765 aq_ret, pf->hw.aq.asq_last_status);
1766 }
1767
1768 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1769 return 0;
1770 }
1771
1772 /**
1773 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1774 * @pf: board private structure
1775 **/
1776 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1777 {
1778 int v;
1779
1780 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1781 return;
1782 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1783
1784 for (v = 0; v < pf->num_alloc_vsi; v++) {
1785 if (pf->vsi[v] &&
1786 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1787 i40e_sync_vsi_filters(pf->vsi[v]);
1788 }
1789 }
1790
1791 /**
1792 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1793 * @netdev: network interface device structure
1794 * @new_mtu: new value for maximum frame size
1795 *
1796 * Returns 0 on success, negative on failure
1797 **/
1798 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1799 {
1800 struct i40e_netdev_priv *np = netdev_priv(netdev);
1801 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1802 struct i40e_vsi *vsi = np->vsi;
1803
1804 /* MTU < 68 is an error and causes problems on some kernels */
1805 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1806 return -EINVAL;
1807
1808 netdev_info(netdev, "changing MTU from %d to %d\n",
1809 netdev->mtu, new_mtu);
1810 netdev->mtu = new_mtu;
1811 if (netif_running(netdev))
1812 i40e_vsi_reinit_locked(vsi);
1813
1814 return 0;
1815 }
1816
1817 /**
1818 * i40e_ioctl - Access the hwtstamp interface
1819 * @netdev: network interface device structure
1820 * @ifr: interface request data
1821 * @cmd: ioctl command
1822 **/
1823 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1824 {
1825 struct i40e_netdev_priv *np = netdev_priv(netdev);
1826 struct i40e_pf *pf = np->vsi->back;
1827
1828 switch (cmd) {
1829 case SIOCGHWTSTAMP:
1830 return i40e_ptp_get_ts_config(pf, ifr);
1831 case SIOCSHWTSTAMP:
1832 return i40e_ptp_set_ts_config(pf, ifr);
1833 default:
1834 return -EOPNOTSUPP;
1835 }
1836 }
1837
1838 /**
1839 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1840 * @vsi: the vsi being adjusted
1841 **/
1842 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1843 {
1844 struct i40e_vsi_context ctxt;
1845 i40e_status ret;
1846
1847 if ((vsi->info.valid_sections &
1848 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1849 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1850 return; /* already enabled */
1851
1852 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1853 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1854 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1855
1856 ctxt.seid = vsi->seid;
1857 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1858 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1859 if (ret) {
1860 dev_info(&vsi->back->pdev->dev,
1861 "%s: update vsi failed, aq_err=%d\n",
1862 __func__, vsi->back->hw.aq.asq_last_status);
1863 }
1864 }
1865
1866 /**
1867 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1868 * @vsi: the vsi being adjusted
1869 **/
1870 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1871 {
1872 struct i40e_vsi_context ctxt;
1873 i40e_status ret;
1874
1875 if ((vsi->info.valid_sections &
1876 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1877 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1878 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1879 return; /* already disabled */
1880
1881 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1882 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1883 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1884
1885 ctxt.seid = vsi->seid;
1886 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1887 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1888 if (ret) {
1889 dev_info(&vsi->back->pdev->dev,
1890 "%s: update vsi failed, aq_err=%d\n",
1891 __func__, vsi->back->hw.aq.asq_last_status);
1892 }
1893 }
1894
1895 /**
1896 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1897 * @netdev: network interface to be adjusted
1898 * @features: netdev features to test if VLAN offload is enabled or not
1899 **/
1900 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1901 {
1902 struct i40e_netdev_priv *np = netdev_priv(netdev);
1903 struct i40e_vsi *vsi = np->vsi;
1904
1905 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1906 i40e_vlan_stripping_enable(vsi);
1907 else
1908 i40e_vlan_stripping_disable(vsi);
1909 }
1910
1911 /**
1912 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1913 * @vsi: the vsi being configured
1914 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1915 **/
1916 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1917 {
1918 struct i40e_mac_filter *f, *add_f;
1919 bool is_netdev, is_vf;
1920
1921 is_vf = (vsi->type == I40E_VSI_SRIOV);
1922 is_netdev = !!(vsi->netdev);
1923
1924 if (is_netdev) {
1925 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1926 is_vf, is_netdev);
1927 if (!add_f) {
1928 dev_info(&vsi->back->pdev->dev,
1929 "Could not add vlan filter %d for %pM\n",
1930 vid, vsi->netdev->dev_addr);
1931 return -ENOMEM;
1932 }
1933 }
1934
1935 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1936 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1937 if (!add_f) {
1938 dev_info(&vsi->back->pdev->dev,
1939 "Could not add vlan filter %d for %pM\n",
1940 vid, f->macaddr);
1941 return -ENOMEM;
1942 }
1943 }
1944
1945 /* Now if we add a vlan tag, make sure to check if it is the first
1946 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1947 * with 0, so we now accept untagged and specified tagged traffic
1948 * (and not any taged and untagged)
1949 */
1950 if (vid > 0) {
1951 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1952 I40E_VLAN_ANY,
1953 is_vf, is_netdev)) {
1954 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1955 I40E_VLAN_ANY, is_vf, is_netdev);
1956 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1957 is_vf, is_netdev);
1958 if (!add_f) {
1959 dev_info(&vsi->back->pdev->dev,
1960 "Could not add filter 0 for %pM\n",
1961 vsi->netdev->dev_addr);
1962 return -ENOMEM;
1963 }
1964 }
1965 }
1966
1967 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1968 if (vid > 0 && !vsi->info.pvid) {
1969 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1970 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1971 is_vf, is_netdev)) {
1972 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1973 is_vf, is_netdev);
1974 add_f = i40e_add_filter(vsi, f->macaddr,
1975 0, is_vf, is_netdev);
1976 if (!add_f) {
1977 dev_info(&vsi->back->pdev->dev,
1978 "Could not add filter 0 for %pM\n",
1979 f->macaddr);
1980 return -ENOMEM;
1981 }
1982 }
1983 }
1984 }
1985
1986 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1987 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1988 return 0;
1989
1990 return i40e_sync_vsi_filters(vsi);
1991 }
1992
1993 /**
1994 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1995 * @vsi: the vsi being configured
1996 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1997 *
1998 * Return: 0 on success or negative otherwise
1999 **/
2000 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2001 {
2002 struct net_device *netdev = vsi->netdev;
2003 struct i40e_mac_filter *f, *add_f;
2004 bool is_vf, is_netdev;
2005 int filter_count = 0;
2006
2007 is_vf = (vsi->type == I40E_VSI_SRIOV);
2008 is_netdev = !!(netdev);
2009
2010 if (is_netdev)
2011 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2012
2013 list_for_each_entry(f, &vsi->mac_filter_list, list)
2014 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2015
2016 /* go through all the filters for this VSI and if there is only
2017 * vid == 0 it means there are no other filters, so vid 0 must
2018 * be replaced with -1. This signifies that we should from now
2019 * on accept any traffic (with any tag present, or untagged)
2020 */
2021 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2022 if (is_netdev) {
2023 if (f->vlan &&
2024 ether_addr_equal(netdev->dev_addr, f->macaddr))
2025 filter_count++;
2026 }
2027
2028 if (f->vlan)
2029 filter_count++;
2030 }
2031
2032 if (!filter_count && is_netdev) {
2033 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2034 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2035 is_vf, is_netdev);
2036 if (!f) {
2037 dev_info(&vsi->back->pdev->dev,
2038 "Could not add filter %d for %pM\n",
2039 I40E_VLAN_ANY, netdev->dev_addr);
2040 return -ENOMEM;
2041 }
2042 }
2043
2044 if (!filter_count) {
2045 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2046 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2047 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2048 is_vf, is_netdev);
2049 if (!add_f) {
2050 dev_info(&vsi->back->pdev->dev,
2051 "Could not add filter %d for %pM\n",
2052 I40E_VLAN_ANY, f->macaddr);
2053 return -ENOMEM;
2054 }
2055 }
2056 }
2057
2058 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2059 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2060 return 0;
2061
2062 return i40e_sync_vsi_filters(vsi);
2063 }
2064
2065 /**
2066 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2067 * @netdev: network interface to be adjusted
2068 * @vid: vlan id to be added
2069 *
2070 * net_device_ops implementation for adding vlan ids
2071 **/
2072 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2073 __always_unused __be16 proto, u16 vid)
2074 {
2075 struct i40e_netdev_priv *np = netdev_priv(netdev);
2076 struct i40e_vsi *vsi = np->vsi;
2077 int ret = 0;
2078
2079 if (vid > 4095)
2080 return -EINVAL;
2081
2082 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2083
2084 /* If the network stack called us with vid = 0 then
2085 * it is asking to receive priority tagged packets with
2086 * vlan id 0. Our HW receives them by default when configured
2087 * to receive untagged packets so there is no need to add an
2088 * extra filter for vlan 0 tagged packets.
2089 */
2090 if (vid)
2091 ret = i40e_vsi_add_vlan(vsi, vid);
2092
2093 if (!ret && (vid < VLAN_N_VID))
2094 set_bit(vid, vsi->active_vlans);
2095
2096 return ret;
2097 }
2098
2099 /**
2100 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2101 * @netdev: network interface to be adjusted
2102 * @vid: vlan id to be removed
2103 *
2104 * net_device_ops implementation for removing vlan ids
2105 **/
2106 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2107 __always_unused __be16 proto, u16 vid)
2108 {
2109 struct i40e_netdev_priv *np = netdev_priv(netdev);
2110 struct i40e_vsi *vsi = np->vsi;
2111
2112 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2113
2114 /* return code is ignored as there is nothing a user
2115 * can do about failure to remove and a log message was
2116 * already printed from the other function
2117 */
2118 i40e_vsi_kill_vlan(vsi, vid);
2119
2120 clear_bit(vid, vsi->active_vlans);
2121
2122 return 0;
2123 }
2124
2125 /**
2126 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2127 * @vsi: the vsi being brought back up
2128 **/
2129 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2130 {
2131 u16 vid;
2132
2133 if (!vsi->netdev)
2134 return;
2135
2136 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2137
2138 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2139 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2140 vid);
2141 }
2142
2143 /**
2144 * i40e_vsi_add_pvid - Add pvid for the VSI
2145 * @vsi: the vsi being adjusted
2146 * @vid: the vlan id to set as a PVID
2147 **/
2148 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2149 {
2150 struct i40e_vsi_context ctxt;
2151 i40e_status aq_ret;
2152
2153 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2154 vsi->info.pvid = cpu_to_le16(vid);
2155 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2156 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2157 I40E_AQ_VSI_PVLAN_EMOD_STR;
2158
2159 ctxt.seid = vsi->seid;
2160 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2161 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2162 if (aq_ret) {
2163 dev_info(&vsi->back->pdev->dev,
2164 "%s: update vsi failed, aq_err=%d\n",
2165 __func__, vsi->back->hw.aq.asq_last_status);
2166 return -ENOENT;
2167 }
2168
2169 return 0;
2170 }
2171
2172 /**
2173 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2174 * @vsi: the vsi being adjusted
2175 *
2176 * Just use the vlan_rx_register() service to put it back to normal
2177 **/
2178 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2179 {
2180 i40e_vlan_stripping_disable(vsi);
2181
2182 vsi->info.pvid = 0;
2183 }
2184
2185 /**
2186 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2187 * @vsi: ptr to the VSI
2188 *
2189 * If this function returns with an error, then it's possible one or
2190 * more of the rings is populated (while the rest are not). It is the
2191 * callers duty to clean those orphaned rings.
2192 *
2193 * Return 0 on success, negative on failure
2194 **/
2195 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2196 {
2197 int i, err = 0;
2198
2199 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2200 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2201
2202 return err;
2203 }
2204
2205 /**
2206 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2207 * @vsi: ptr to the VSI
2208 *
2209 * Free VSI's transmit software resources
2210 **/
2211 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2212 {
2213 int i;
2214
2215 if (!vsi->tx_rings)
2216 return;
2217
2218 for (i = 0; i < vsi->num_queue_pairs; i++)
2219 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2220 i40e_free_tx_resources(vsi->tx_rings[i]);
2221 }
2222
2223 /**
2224 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2225 * @vsi: ptr to the VSI
2226 *
2227 * If this function returns with an error, then it's possible one or
2228 * more of the rings is populated (while the rest are not). It is the
2229 * callers duty to clean those orphaned rings.
2230 *
2231 * Return 0 on success, negative on failure
2232 **/
2233 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2234 {
2235 int i, err = 0;
2236
2237 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2238 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2239 return err;
2240 }
2241
2242 /**
2243 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2244 * @vsi: ptr to the VSI
2245 *
2246 * Free all receive software resources
2247 **/
2248 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2249 {
2250 int i;
2251
2252 if (!vsi->rx_rings)
2253 return;
2254
2255 for (i = 0; i < vsi->num_queue_pairs; i++)
2256 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2257 i40e_free_rx_resources(vsi->rx_rings[i]);
2258 }
2259
2260 /**
2261 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2262 * @ring: The Tx ring to configure
2263 *
2264 * Configure the Tx descriptor ring in the HMC context.
2265 **/
2266 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2267 {
2268 struct i40e_vsi *vsi = ring->vsi;
2269 u16 pf_q = vsi->base_queue + ring->queue_index;
2270 struct i40e_hw *hw = &vsi->back->hw;
2271 struct i40e_hmc_obj_txq tx_ctx;
2272 i40e_status err = 0;
2273 u32 qtx_ctl = 0;
2274
2275 /* some ATR related tx ring init */
2276 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2277 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2278 ring->atr_count = 0;
2279 } else {
2280 ring->atr_sample_rate = 0;
2281 }
2282
2283 /* initialize XPS */
2284 if (ring->q_vector && ring->netdev &&
2285 vsi->tc_config.numtc <= 1 &&
2286 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2287 netif_set_xps_queue(ring->netdev,
2288 &ring->q_vector->affinity_mask,
2289 ring->queue_index);
2290
2291 /* clear the context structure first */
2292 memset(&tx_ctx, 0, sizeof(tx_ctx));
2293
2294 tx_ctx.new_context = 1;
2295 tx_ctx.base = (ring->dma / 128);
2296 tx_ctx.qlen = ring->count;
2297 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2298 I40E_FLAG_FD_ATR_ENABLED));
2299 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2300 /* FDIR VSI tx ring can still use RS bit and writebacks */
2301 if (vsi->type != I40E_VSI_FDIR)
2302 tx_ctx.head_wb_ena = 1;
2303 tx_ctx.head_wb_addr = ring->dma +
2304 (ring->count * sizeof(struct i40e_tx_desc));
2305
2306 /* As part of VSI creation/update, FW allocates certain
2307 * Tx arbitration queue sets for each TC enabled for
2308 * the VSI. The FW returns the handles to these queue
2309 * sets as part of the response buffer to Add VSI,
2310 * Update VSI, etc. AQ commands. It is expected that
2311 * these queue set handles be associated with the Tx
2312 * queues by the driver as part of the TX queue context
2313 * initialization. This has to be done regardless of
2314 * DCB as by default everything is mapped to TC0.
2315 */
2316 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2317 tx_ctx.rdylist_act = 0;
2318
2319 /* clear the context in the HMC */
2320 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2321 if (err) {
2322 dev_info(&vsi->back->pdev->dev,
2323 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2324 ring->queue_index, pf_q, err);
2325 return -ENOMEM;
2326 }
2327
2328 /* set the context in the HMC */
2329 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2330 if (err) {
2331 dev_info(&vsi->back->pdev->dev,
2332 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2333 ring->queue_index, pf_q, err);
2334 return -ENOMEM;
2335 }
2336
2337 /* Now associate this queue with this PCI function */
2338 if (vsi->type == I40E_VSI_VMDQ2)
2339 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2340 else
2341 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2342 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2343 I40E_QTX_CTL_PF_INDX_MASK);
2344 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2345 i40e_flush(hw);
2346
2347 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2348
2349 /* cache tail off for easier writes later */
2350 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2351
2352 return 0;
2353 }
2354
2355 /**
2356 * i40e_configure_rx_ring - Configure a receive ring context
2357 * @ring: The Rx ring to configure
2358 *
2359 * Configure the Rx descriptor ring in the HMC context.
2360 **/
2361 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2362 {
2363 struct i40e_vsi *vsi = ring->vsi;
2364 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2365 u16 pf_q = vsi->base_queue + ring->queue_index;
2366 struct i40e_hw *hw = &vsi->back->hw;
2367 struct i40e_hmc_obj_rxq rx_ctx;
2368 i40e_status err = 0;
2369
2370 ring->state = 0;
2371
2372 /* clear the context structure first */
2373 memset(&rx_ctx, 0, sizeof(rx_ctx));
2374
2375 ring->rx_buf_len = vsi->rx_buf_len;
2376 ring->rx_hdr_len = vsi->rx_hdr_len;
2377
2378 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2379 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2380
2381 rx_ctx.base = (ring->dma / 128);
2382 rx_ctx.qlen = ring->count;
2383
2384 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2385 set_ring_16byte_desc_enabled(ring);
2386 rx_ctx.dsize = 0;
2387 } else {
2388 rx_ctx.dsize = 1;
2389 }
2390
2391 rx_ctx.dtype = vsi->dtype;
2392 if (vsi->dtype) {
2393 set_ring_ps_enabled(ring);
2394 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2395 I40E_RX_SPLIT_IP |
2396 I40E_RX_SPLIT_TCP_UDP |
2397 I40E_RX_SPLIT_SCTP;
2398 } else {
2399 rx_ctx.hsplit_0 = 0;
2400 }
2401
2402 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2403 (chain_len * ring->rx_buf_len));
2404 if (hw->revision_id == 0)
2405 rx_ctx.lrxqthresh = 0;
2406 else
2407 rx_ctx.lrxqthresh = 2;
2408 rx_ctx.crcstrip = 1;
2409 rx_ctx.l2tsel = 1;
2410 rx_ctx.showiv = 1;
2411 /* set the prefena field to 1 because the manual says to */
2412 rx_ctx.prefena = 1;
2413
2414 /* clear the context in the HMC */
2415 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2416 if (err) {
2417 dev_info(&vsi->back->pdev->dev,
2418 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2419 ring->queue_index, pf_q, err);
2420 return -ENOMEM;
2421 }
2422
2423 /* set the context in the HMC */
2424 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2425 if (err) {
2426 dev_info(&vsi->back->pdev->dev,
2427 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2428 ring->queue_index, pf_q, err);
2429 return -ENOMEM;
2430 }
2431
2432 /* cache tail for quicker writes, and clear the reg before use */
2433 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2434 writel(0, ring->tail);
2435
2436 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2437
2438 return 0;
2439 }
2440
2441 /**
2442 * i40e_vsi_configure_tx - Configure the VSI for Tx
2443 * @vsi: VSI structure describing this set of rings and resources
2444 *
2445 * Configure the Tx VSI for operation.
2446 **/
2447 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2448 {
2449 int err = 0;
2450 u16 i;
2451
2452 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2453 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2454
2455 return err;
2456 }
2457
2458 /**
2459 * i40e_vsi_configure_rx - Configure the VSI for Rx
2460 * @vsi: the VSI being configured
2461 *
2462 * Configure the Rx VSI for operation.
2463 **/
2464 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2465 {
2466 int err = 0;
2467 u16 i;
2468
2469 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2470 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2471 + ETH_FCS_LEN + VLAN_HLEN;
2472 else
2473 vsi->max_frame = I40E_RXBUFFER_2048;
2474
2475 /* figure out correct receive buffer length */
2476 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2477 I40E_FLAG_RX_PS_ENABLED)) {
2478 case I40E_FLAG_RX_1BUF_ENABLED:
2479 vsi->rx_hdr_len = 0;
2480 vsi->rx_buf_len = vsi->max_frame;
2481 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2482 break;
2483 case I40E_FLAG_RX_PS_ENABLED:
2484 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2485 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2486 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2487 break;
2488 default:
2489 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2490 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2491 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2492 break;
2493 }
2494
2495 /* round up for the chip's needs */
2496 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2497 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2498 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2499 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2500
2501 /* set up individual rings */
2502 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2503 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2504
2505 return err;
2506 }
2507
2508 /**
2509 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2510 * @vsi: ptr to the VSI
2511 **/
2512 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2513 {
2514 struct i40e_ring *tx_ring, *rx_ring;
2515 u16 qoffset, qcount;
2516 int i, n;
2517
2518 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2519 return;
2520
2521 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2522 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2523 continue;
2524
2525 qoffset = vsi->tc_config.tc_info[n].qoffset;
2526 qcount = vsi->tc_config.tc_info[n].qcount;
2527 for (i = qoffset; i < (qoffset + qcount); i++) {
2528 rx_ring = vsi->rx_rings[i];
2529 tx_ring = vsi->tx_rings[i];
2530 rx_ring->dcb_tc = n;
2531 tx_ring->dcb_tc = n;
2532 }
2533 }
2534 }
2535
2536 /**
2537 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2538 * @vsi: ptr to the VSI
2539 **/
2540 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2541 {
2542 if (vsi->netdev)
2543 i40e_set_rx_mode(vsi->netdev);
2544 }
2545
2546 /**
2547 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2548 * @vsi: Pointer to the targeted VSI
2549 *
2550 * This function replays the hlist on the hw where all the SB Flow Director
2551 * filters were saved.
2552 **/
2553 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2554 {
2555 struct i40e_fdir_filter *filter;
2556 struct i40e_pf *pf = vsi->back;
2557 struct hlist_node *node;
2558
2559 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2560 return;
2561
2562 hlist_for_each_entry_safe(filter, node,
2563 &pf->fdir_filter_list, fdir_node) {
2564 i40e_add_del_fdir(vsi, filter, true);
2565 }
2566 }
2567
2568 /**
2569 * i40e_vsi_configure - Set up the VSI for action
2570 * @vsi: the VSI being configured
2571 **/
2572 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2573 {
2574 int err;
2575
2576 i40e_set_vsi_rx_mode(vsi);
2577 i40e_restore_vlan(vsi);
2578 i40e_vsi_config_dcb_rings(vsi);
2579 err = i40e_vsi_configure_tx(vsi);
2580 if (!err)
2581 err = i40e_vsi_configure_rx(vsi);
2582
2583 return err;
2584 }
2585
2586 /**
2587 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2588 * @vsi: the VSI being configured
2589 **/
2590 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2591 {
2592 struct i40e_pf *pf = vsi->back;
2593 struct i40e_q_vector *q_vector;
2594 struct i40e_hw *hw = &pf->hw;
2595 u16 vector;
2596 int i, q;
2597 u32 val;
2598 u32 qp;
2599
2600 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2601 * and PFINT_LNKLSTn registers, e.g.:
2602 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2603 */
2604 qp = vsi->base_queue;
2605 vector = vsi->base_vector;
2606 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2607 q_vector = vsi->q_vectors[i];
2608 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2609 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2610 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2611 q_vector->rx.itr);
2612 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2613 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2614 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2615 q_vector->tx.itr);
2616
2617 /* Linked list for the queuepairs assigned to this vector */
2618 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2619 for (q = 0; q < q_vector->num_ringpairs; q++) {
2620 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2621 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2622 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2623 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2624 (I40E_QUEUE_TYPE_TX
2625 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2626
2627 wr32(hw, I40E_QINT_RQCTL(qp), val);
2628
2629 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2630 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2631 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2632 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2633 (I40E_QUEUE_TYPE_RX
2634 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2635
2636 /* Terminate the linked list */
2637 if (q == (q_vector->num_ringpairs - 1))
2638 val |= (I40E_QUEUE_END_OF_LIST
2639 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2640
2641 wr32(hw, I40E_QINT_TQCTL(qp), val);
2642 qp++;
2643 }
2644 }
2645
2646 i40e_flush(hw);
2647 }
2648
2649 /**
2650 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2651 * @hw: ptr to the hardware info
2652 **/
2653 static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2654 {
2655 u32 val;
2656
2657 /* clear things first */
2658 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2659 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2660
2661 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2662 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2663 I40E_PFINT_ICR0_ENA_GRST_MASK |
2664 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2665 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2666 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2667 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2668 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2669 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2670
2671 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2672
2673 /* SW_ITR_IDX = 0, but don't change INTENA */
2674 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2675 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2676
2677 /* OTHER_ITR_IDX = 0 */
2678 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2679 }
2680
2681 /**
2682 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2683 * @vsi: the VSI being configured
2684 **/
2685 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2686 {
2687 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2688 struct i40e_pf *pf = vsi->back;
2689 struct i40e_hw *hw = &pf->hw;
2690 u32 val;
2691
2692 /* set the ITR configuration */
2693 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2694 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2695 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2696 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2697 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2698 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2699
2700 i40e_enable_misc_int_causes(hw);
2701
2702 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2703 wr32(hw, I40E_PFINT_LNKLST0, 0);
2704
2705 /* Associate the queue pair to the vector and enable the queue int */
2706 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2707 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2708 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2709
2710 wr32(hw, I40E_QINT_RQCTL(0), val);
2711
2712 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2713 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2714 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2715
2716 wr32(hw, I40E_QINT_TQCTL(0), val);
2717 i40e_flush(hw);
2718 }
2719
2720 /**
2721 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2722 * @pf: board private structure
2723 **/
2724 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2725 {
2726 struct i40e_hw *hw = &pf->hw;
2727
2728 wr32(hw, I40E_PFINT_DYN_CTL0,
2729 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2730 i40e_flush(hw);
2731 }
2732
2733 /**
2734 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2735 * @pf: board private structure
2736 **/
2737 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2738 {
2739 struct i40e_hw *hw = &pf->hw;
2740 u32 val;
2741
2742 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2743 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2744 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2745
2746 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2747 i40e_flush(hw);
2748 }
2749
2750 /**
2751 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2752 * @vsi: pointer to a vsi
2753 * @vector: enable a particular Hw Interrupt vector
2754 **/
2755 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2756 {
2757 struct i40e_pf *pf = vsi->back;
2758 struct i40e_hw *hw = &pf->hw;
2759 u32 val;
2760
2761 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2762 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2763 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2764 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2765 /* skip the flush */
2766 }
2767
2768 /**
2769 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2770 * @vsi: pointer to a vsi
2771 * @vector: enable a particular Hw Interrupt vector
2772 **/
2773 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2774 {
2775 struct i40e_pf *pf = vsi->back;
2776 struct i40e_hw *hw = &pf->hw;
2777 u32 val;
2778
2779 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2780 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2781 i40e_flush(hw);
2782 }
2783
2784 /**
2785 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2786 * @irq: interrupt number
2787 * @data: pointer to a q_vector
2788 **/
2789 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2790 {
2791 struct i40e_q_vector *q_vector = data;
2792
2793 if (!q_vector->tx.ring && !q_vector->rx.ring)
2794 return IRQ_HANDLED;
2795
2796 napi_schedule(&q_vector->napi);
2797
2798 return IRQ_HANDLED;
2799 }
2800
2801 /**
2802 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2803 * @vsi: the VSI being configured
2804 * @basename: name for the vector
2805 *
2806 * Allocates MSI-X vectors and requests interrupts from the kernel.
2807 **/
2808 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2809 {
2810 int q_vectors = vsi->num_q_vectors;
2811 struct i40e_pf *pf = vsi->back;
2812 int base = vsi->base_vector;
2813 int rx_int_idx = 0;
2814 int tx_int_idx = 0;
2815 int vector, err;
2816
2817 for (vector = 0; vector < q_vectors; vector++) {
2818 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2819
2820 if (q_vector->tx.ring && q_vector->rx.ring) {
2821 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2822 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2823 tx_int_idx++;
2824 } else if (q_vector->rx.ring) {
2825 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2826 "%s-%s-%d", basename, "rx", rx_int_idx++);
2827 } else if (q_vector->tx.ring) {
2828 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2829 "%s-%s-%d", basename, "tx", tx_int_idx++);
2830 } else {
2831 /* skip this unused q_vector */
2832 continue;
2833 }
2834 err = request_irq(pf->msix_entries[base + vector].vector,
2835 vsi->irq_handler,
2836 0,
2837 q_vector->name,
2838 q_vector);
2839 if (err) {
2840 dev_info(&pf->pdev->dev,
2841 "%s: request_irq failed, error: %d\n",
2842 __func__, err);
2843 goto free_queue_irqs;
2844 }
2845 /* assign the mask for this irq */
2846 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2847 &q_vector->affinity_mask);
2848 }
2849
2850 vsi->irqs_ready = true;
2851 return 0;
2852
2853 free_queue_irqs:
2854 while (vector) {
2855 vector--;
2856 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2857 NULL);
2858 free_irq(pf->msix_entries[base + vector].vector,
2859 &(vsi->q_vectors[vector]));
2860 }
2861 return err;
2862 }
2863
2864 /**
2865 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2866 * @vsi: the VSI being un-configured
2867 **/
2868 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2869 {
2870 struct i40e_pf *pf = vsi->back;
2871 struct i40e_hw *hw = &pf->hw;
2872 int base = vsi->base_vector;
2873 int i;
2874
2875 for (i = 0; i < vsi->num_queue_pairs; i++) {
2876 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2877 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2878 }
2879
2880 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2881 for (i = vsi->base_vector;
2882 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2883 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2884
2885 i40e_flush(hw);
2886 for (i = 0; i < vsi->num_q_vectors; i++)
2887 synchronize_irq(pf->msix_entries[i + base].vector);
2888 } else {
2889 /* Legacy and MSI mode - this stops all interrupt handling */
2890 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2891 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2892 i40e_flush(hw);
2893 synchronize_irq(pf->pdev->irq);
2894 }
2895 }
2896
2897 /**
2898 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2899 * @vsi: the VSI being configured
2900 **/
2901 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2902 {
2903 struct i40e_pf *pf = vsi->back;
2904 int i;
2905
2906 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2907 for (i = vsi->base_vector;
2908 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2909 i40e_irq_dynamic_enable(vsi, i);
2910 } else {
2911 i40e_irq_dynamic_enable_icr0(pf);
2912 }
2913
2914 i40e_flush(&pf->hw);
2915 return 0;
2916 }
2917
2918 /**
2919 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2920 * @pf: board private structure
2921 **/
2922 static void i40e_stop_misc_vector(struct i40e_pf *pf)
2923 {
2924 /* Disable ICR 0 */
2925 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2926 i40e_flush(&pf->hw);
2927 }
2928
2929 /**
2930 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2931 * @irq: interrupt number
2932 * @data: pointer to a q_vector
2933 *
2934 * This is the handler used for all MSI/Legacy interrupts, and deals
2935 * with both queue and non-queue interrupts. This is also used in
2936 * MSIX mode to handle the non-queue interrupts.
2937 **/
2938 static irqreturn_t i40e_intr(int irq, void *data)
2939 {
2940 struct i40e_pf *pf = (struct i40e_pf *)data;
2941 struct i40e_hw *hw = &pf->hw;
2942 irqreturn_t ret = IRQ_NONE;
2943 u32 icr0, icr0_remaining;
2944 u32 val, ena_mask;
2945
2946 icr0 = rd32(hw, I40E_PFINT_ICR0);
2947 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2948
2949 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2950 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2951 goto enable_intr;
2952
2953 /* if interrupt but no bits showing, must be SWINT */
2954 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2955 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2956 pf->sw_int_count++;
2957
2958 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2959 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2960
2961 /* temporarily disable queue cause for NAPI processing */
2962 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2963 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2964 wr32(hw, I40E_QINT_RQCTL(0), qval);
2965
2966 qval = rd32(hw, I40E_QINT_TQCTL(0));
2967 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2968 wr32(hw, I40E_QINT_TQCTL(0), qval);
2969
2970 if (!test_bit(__I40E_DOWN, &pf->state))
2971 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2972 }
2973
2974 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2975 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2976 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2977 }
2978
2979 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2980 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2981 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2982 }
2983
2984 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2985 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2986 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2987 }
2988
2989 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2990 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2991 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2992 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2993 val = rd32(hw, I40E_GLGEN_RSTAT);
2994 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2995 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2996 if (val == I40E_RESET_CORER) {
2997 pf->corer_count++;
2998 } else if (val == I40E_RESET_GLOBR) {
2999 pf->globr_count++;
3000 } else if (val == I40E_RESET_EMPR) {
3001 pf->empr_count++;
3002 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
3003 }
3004 }
3005
3006 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3007 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3008 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3009 }
3010
3011 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3012 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3013
3014 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3015 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3016 i40e_ptp_tx_hwtstamp(pf);
3017 }
3018 }
3019
3020 /* If a critical error is pending we have no choice but to reset the
3021 * device.
3022 * Report and mask out any remaining unexpected interrupts.
3023 */
3024 icr0_remaining = icr0 & ena_mask;
3025 if (icr0_remaining) {
3026 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3027 icr0_remaining);
3028 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3029 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3030 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3031 dev_info(&pf->pdev->dev, "device will be reset\n");
3032 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3033 i40e_service_event_schedule(pf);
3034 }
3035 ena_mask &= ~icr0_remaining;
3036 }
3037 ret = IRQ_HANDLED;
3038
3039 enable_intr:
3040 /* re-enable interrupt causes */
3041 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3042 if (!test_bit(__I40E_DOWN, &pf->state)) {
3043 i40e_service_event_schedule(pf);
3044 i40e_irq_dynamic_enable_icr0(pf);
3045 }
3046
3047 return ret;
3048 }
3049
3050 /**
3051 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3052 * @tx_ring: tx ring to clean
3053 * @budget: how many cleans we're allowed
3054 *
3055 * Returns true if there's any budget left (e.g. the clean is finished)
3056 **/
3057 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3058 {
3059 struct i40e_vsi *vsi = tx_ring->vsi;
3060 u16 i = tx_ring->next_to_clean;
3061 struct i40e_tx_buffer *tx_buf;
3062 struct i40e_tx_desc *tx_desc;
3063
3064 tx_buf = &tx_ring->tx_bi[i];
3065 tx_desc = I40E_TX_DESC(tx_ring, i);
3066 i -= tx_ring->count;
3067
3068 do {
3069 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3070
3071 /* if next_to_watch is not set then there is no work pending */
3072 if (!eop_desc)
3073 break;
3074
3075 /* prevent any other reads prior to eop_desc */
3076 read_barrier_depends();
3077
3078 /* if the descriptor isn't done, no work yet to do */
3079 if (!(eop_desc->cmd_type_offset_bsz &
3080 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3081 break;
3082
3083 /* clear next_to_watch to prevent false hangs */
3084 tx_buf->next_to_watch = NULL;
3085
3086 tx_desc->buffer_addr = 0;
3087 tx_desc->cmd_type_offset_bsz = 0;
3088 /* move past filter desc */
3089 tx_buf++;
3090 tx_desc++;
3091 i++;
3092 if (unlikely(!i)) {
3093 i -= tx_ring->count;
3094 tx_buf = tx_ring->tx_bi;
3095 tx_desc = I40E_TX_DESC(tx_ring, 0);
3096 }
3097 /* unmap skb header data */
3098 dma_unmap_single(tx_ring->dev,
3099 dma_unmap_addr(tx_buf, dma),
3100 dma_unmap_len(tx_buf, len),
3101 DMA_TO_DEVICE);
3102 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3103 kfree(tx_buf->raw_buf);
3104
3105 tx_buf->raw_buf = NULL;
3106 tx_buf->tx_flags = 0;
3107 tx_buf->next_to_watch = NULL;
3108 dma_unmap_len_set(tx_buf, len, 0);
3109 tx_desc->buffer_addr = 0;
3110 tx_desc->cmd_type_offset_bsz = 0;
3111
3112 /* move us past the eop_desc for start of next FD desc */
3113 tx_buf++;
3114 tx_desc++;
3115 i++;
3116 if (unlikely(!i)) {
3117 i -= tx_ring->count;
3118 tx_buf = tx_ring->tx_bi;
3119 tx_desc = I40E_TX_DESC(tx_ring, 0);
3120 }
3121
3122 /* update budget accounting */
3123 budget--;
3124 } while (likely(budget));
3125
3126 i += tx_ring->count;
3127 tx_ring->next_to_clean = i;
3128
3129 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3130 i40e_irq_dynamic_enable(vsi,
3131 tx_ring->q_vector->v_idx + vsi->base_vector);
3132 }
3133 return budget > 0;
3134 }
3135
3136 /**
3137 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3138 * @irq: interrupt number
3139 * @data: pointer to a q_vector
3140 **/
3141 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3142 {
3143 struct i40e_q_vector *q_vector = data;
3144 struct i40e_vsi *vsi;
3145
3146 if (!q_vector->tx.ring)
3147 return IRQ_HANDLED;
3148
3149 vsi = q_vector->tx.ring->vsi;
3150 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3151
3152 return IRQ_HANDLED;
3153 }
3154
3155 /**
3156 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3157 * @vsi: the VSI being configured
3158 * @v_idx: vector index
3159 * @qp_idx: queue pair index
3160 **/
3161 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3162 {
3163 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3164 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3165 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3166
3167 tx_ring->q_vector = q_vector;
3168 tx_ring->next = q_vector->tx.ring;
3169 q_vector->tx.ring = tx_ring;
3170 q_vector->tx.count++;
3171
3172 rx_ring->q_vector = q_vector;
3173 rx_ring->next = q_vector->rx.ring;
3174 q_vector->rx.ring = rx_ring;
3175 q_vector->rx.count++;
3176 }
3177
3178 /**
3179 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3180 * @vsi: the VSI being configured
3181 *
3182 * This function maps descriptor rings to the queue-specific vectors
3183 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3184 * one vector per queue pair, but on a constrained vector budget, we
3185 * group the queue pairs as "efficiently" as possible.
3186 **/
3187 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3188 {
3189 int qp_remaining = vsi->num_queue_pairs;
3190 int q_vectors = vsi->num_q_vectors;
3191 int num_ringpairs;
3192 int v_start = 0;
3193 int qp_idx = 0;
3194
3195 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3196 * group them so there are multiple queues per vector.
3197 * It is also important to go through all the vectors available to be
3198 * sure that if we don't use all the vectors, that the remaining vectors
3199 * are cleared. This is especially important when decreasing the
3200 * number of queues in use.
3201 */
3202 for (; v_start < q_vectors; v_start++) {
3203 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3204
3205 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3206
3207 q_vector->num_ringpairs = num_ringpairs;
3208
3209 q_vector->rx.count = 0;
3210 q_vector->tx.count = 0;
3211 q_vector->rx.ring = NULL;
3212 q_vector->tx.ring = NULL;
3213
3214 while (num_ringpairs--) {
3215 map_vector_to_qp(vsi, v_start, qp_idx);
3216 qp_idx++;
3217 qp_remaining--;
3218 }
3219 }
3220 }
3221
3222 /**
3223 * i40e_vsi_request_irq - Request IRQ from the OS
3224 * @vsi: the VSI being configured
3225 * @basename: name for the vector
3226 **/
3227 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3228 {
3229 struct i40e_pf *pf = vsi->back;
3230 int err;
3231
3232 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3233 err = i40e_vsi_request_irq_msix(vsi, basename);
3234 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3235 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3236 pf->misc_int_name, pf);
3237 else
3238 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3239 pf->misc_int_name, pf);
3240
3241 if (err)
3242 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3243
3244 return err;
3245 }
3246
3247 #ifdef CONFIG_NET_POLL_CONTROLLER
3248 /**
3249 * i40e_netpoll - A Polling 'interrupt'handler
3250 * @netdev: network interface device structure
3251 *
3252 * This is used by netconsole to send skbs without having to re-enable
3253 * interrupts. It's not called while the normal interrupt routine is executing.
3254 **/
3255 static void i40e_netpoll(struct net_device *netdev)
3256 {
3257 struct i40e_netdev_priv *np = netdev_priv(netdev);
3258 struct i40e_vsi *vsi = np->vsi;
3259 struct i40e_pf *pf = vsi->back;
3260 int i;
3261
3262 /* if interface is down do nothing */
3263 if (test_bit(__I40E_DOWN, &vsi->state))
3264 return;
3265
3266 pf->flags |= I40E_FLAG_IN_NETPOLL;
3267 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3268 for (i = 0; i < vsi->num_q_vectors; i++)
3269 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3270 } else {
3271 i40e_intr(pf->pdev->irq, netdev);
3272 }
3273 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3274 }
3275 #endif
3276
3277 /**
3278 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3279 * @pf: the PF being configured
3280 * @pf_q: the PF queue
3281 * @enable: enable or disable state of the queue
3282 *
3283 * This routine will wait for the given Tx queue of the PF to reach the
3284 * enabled or disabled state.
3285 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3286 * multiple retries; else will return 0 in case of success.
3287 **/
3288 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3289 {
3290 int i;
3291 u32 tx_reg;
3292
3293 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3294 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3295 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3296 break;
3297
3298 udelay(10);
3299 }
3300 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3301 return -ETIMEDOUT;
3302
3303 return 0;
3304 }
3305
3306 /**
3307 * i40e_vsi_control_tx - Start or stop a VSI's rings
3308 * @vsi: the VSI being configured
3309 * @enable: start or stop the rings
3310 **/
3311 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3312 {
3313 struct i40e_pf *pf = vsi->back;
3314 struct i40e_hw *hw = &pf->hw;
3315 int i, j, pf_q, ret = 0;
3316 u32 tx_reg;
3317
3318 pf_q = vsi->base_queue;
3319 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3320
3321 /* warn the TX unit of coming changes */
3322 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3323 if (!enable)
3324 udelay(10);
3325
3326 for (j = 0; j < 50; j++) {
3327 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3328 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3329 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3330 break;
3331 usleep_range(1000, 2000);
3332 }
3333 /* Skip if the queue is already in the requested state */
3334 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3335 continue;
3336
3337 /* turn on/off the queue */
3338 if (enable) {
3339 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3340 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3341 } else {
3342 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3343 }
3344
3345 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3346
3347 /* wait for the change to finish */
3348 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3349 if (ret) {
3350 dev_info(&pf->pdev->dev,
3351 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3352 __func__, vsi->seid, pf_q,
3353 (enable ? "en" : "dis"));
3354 break;
3355 }
3356 }
3357
3358 if (hw->revision_id == 0)
3359 mdelay(50);
3360 return ret;
3361 }
3362
3363 /**
3364 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3365 * @pf: the PF being configured
3366 * @pf_q: the PF queue
3367 * @enable: enable or disable state of the queue
3368 *
3369 * This routine will wait for the given Rx queue of the PF to reach the
3370 * enabled or disabled state.
3371 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3372 * multiple retries; else will return 0 in case of success.
3373 **/
3374 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3375 {
3376 int i;
3377 u32 rx_reg;
3378
3379 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3380 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3381 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3382 break;
3383
3384 udelay(10);
3385 }
3386 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3387 return -ETIMEDOUT;
3388
3389 return 0;
3390 }
3391
3392 /**
3393 * i40e_vsi_control_rx - Start or stop a VSI's rings
3394 * @vsi: the VSI being configured
3395 * @enable: start or stop the rings
3396 **/
3397 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3398 {
3399 struct i40e_pf *pf = vsi->back;
3400 struct i40e_hw *hw = &pf->hw;
3401 int i, j, pf_q, ret = 0;
3402 u32 rx_reg;
3403
3404 pf_q = vsi->base_queue;
3405 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3406 for (j = 0; j < 50; j++) {
3407 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3408 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3409 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3410 break;
3411 usleep_range(1000, 2000);
3412 }
3413
3414 /* Skip if the queue is already in the requested state */
3415 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3416 continue;
3417
3418 /* turn on/off the queue */
3419 if (enable)
3420 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3421 else
3422 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3423 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3424
3425 /* wait for the change to finish */
3426 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3427 if (ret) {
3428 dev_info(&pf->pdev->dev,
3429 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3430 __func__, vsi->seid, pf_q,
3431 (enable ? "en" : "dis"));
3432 break;
3433 }
3434 }
3435
3436 return ret;
3437 }
3438
3439 /**
3440 * i40e_vsi_control_rings - Start or stop a VSI's rings
3441 * @vsi: the VSI being configured
3442 * @enable: start or stop the rings
3443 **/
3444 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3445 {
3446 int ret = 0;
3447
3448 /* do rx first for enable and last for disable */
3449 if (request) {
3450 ret = i40e_vsi_control_rx(vsi, request);
3451 if (ret)
3452 return ret;
3453 ret = i40e_vsi_control_tx(vsi, request);
3454 } else {
3455 /* Ignore return value, we need to shutdown whatever we can */
3456 i40e_vsi_control_tx(vsi, request);
3457 i40e_vsi_control_rx(vsi, request);
3458 }
3459
3460 return ret;
3461 }
3462
3463 /**
3464 * i40e_vsi_free_irq - Free the irq association with the OS
3465 * @vsi: the VSI being configured
3466 **/
3467 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3468 {
3469 struct i40e_pf *pf = vsi->back;
3470 struct i40e_hw *hw = &pf->hw;
3471 int base = vsi->base_vector;
3472 u32 val, qp;
3473 int i;
3474
3475 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3476 if (!vsi->q_vectors)
3477 return;
3478
3479 if (!vsi->irqs_ready)
3480 return;
3481
3482 vsi->irqs_ready = false;
3483 for (i = 0; i < vsi->num_q_vectors; i++) {
3484 u16 vector = i + base;
3485
3486 /* free only the irqs that were actually requested */
3487 if (!vsi->q_vectors[i] ||
3488 !vsi->q_vectors[i]->num_ringpairs)
3489 continue;
3490
3491 /* clear the affinity_mask in the IRQ descriptor */
3492 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3493 NULL);
3494 free_irq(pf->msix_entries[vector].vector,
3495 vsi->q_vectors[i]);
3496
3497 /* Tear down the interrupt queue link list
3498 *
3499 * We know that they come in pairs and always
3500 * the Rx first, then the Tx. To clear the
3501 * link list, stick the EOL value into the
3502 * next_q field of the registers.
3503 */
3504 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3505 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3506 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3507 val |= I40E_QUEUE_END_OF_LIST
3508 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3509 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3510
3511 while (qp != I40E_QUEUE_END_OF_LIST) {
3512 u32 next;
3513
3514 val = rd32(hw, I40E_QINT_RQCTL(qp));
3515
3516 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3517 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3518 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3519 I40E_QINT_RQCTL_INTEVENT_MASK);
3520
3521 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3522 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3523
3524 wr32(hw, I40E_QINT_RQCTL(qp), val);
3525
3526 val = rd32(hw, I40E_QINT_TQCTL(qp));
3527
3528 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3529 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3530
3531 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3532 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3533 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3534 I40E_QINT_TQCTL_INTEVENT_MASK);
3535
3536 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3537 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3538
3539 wr32(hw, I40E_QINT_TQCTL(qp), val);
3540 qp = next;
3541 }
3542 }
3543 } else {
3544 free_irq(pf->pdev->irq, pf);
3545
3546 val = rd32(hw, I40E_PFINT_LNKLST0);
3547 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3548 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3549 val |= I40E_QUEUE_END_OF_LIST
3550 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3551 wr32(hw, I40E_PFINT_LNKLST0, val);
3552
3553 val = rd32(hw, I40E_QINT_RQCTL(qp));
3554 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3555 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3556 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3557 I40E_QINT_RQCTL_INTEVENT_MASK);
3558
3559 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3560 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3561
3562 wr32(hw, I40E_QINT_RQCTL(qp), val);
3563
3564 val = rd32(hw, I40E_QINT_TQCTL(qp));
3565
3566 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3567 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3568 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3569 I40E_QINT_TQCTL_INTEVENT_MASK);
3570
3571 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3572 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3573
3574 wr32(hw, I40E_QINT_TQCTL(qp), val);
3575 }
3576 }
3577
3578 /**
3579 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3580 * @vsi: the VSI being configured
3581 * @v_idx: Index of vector to be freed
3582 *
3583 * This function frees the memory allocated to the q_vector. In addition if
3584 * NAPI is enabled it will delete any references to the NAPI struct prior
3585 * to freeing the q_vector.
3586 **/
3587 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3588 {
3589 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3590 struct i40e_ring *ring;
3591
3592 if (!q_vector)
3593 return;
3594
3595 /* disassociate q_vector from rings */
3596 i40e_for_each_ring(ring, q_vector->tx)
3597 ring->q_vector = NULL;
3598
3599 i40e_for_each_ring(ring, q_vector->rx)
3600 ring->q_vector = NULL;
3601
3602 /* only VSI w/ an associated netdev is set up w/ NAPI */
3603 if (vsi->netdev)
3604 netif_napi_del(&q_vector->napi);
3605
3606 vsi->q_vectors[v_idx] = NULL;
3607
3608 kfree_rcu(q_vector, rcu);
3609 }
3610
3611 /**
3612 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3613 * @vsi: the VSI being un-configured
3614 *
3615 * This frees the memory allocated to the q_vectors and
3616 * deletes references to the NAPI struct.
3617 **/
3618 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3619 {
3620 int v_idx;
3621
3622 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3623 i40e_free_q_vector(vsi, v_idx);
3624 }
3625
3626 /**
3627 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3628 * @pf: board private structure
3629 **/
3630 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3631 {
3632 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3633 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3634 pci_disable_msix(pf->pdev);
3635 kfree(pf->msix_entries);
3636 pf->msix_entries = NULL;
3637 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3638 pci_disable_msi(pf->pdev);
3639 }
3640 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3641 }
3642
3643 /**
3644 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3645 * @pf: board private structure
3646 *
3647 * We go through and clear interrupt specific resources and reset the structure
3648 * to pre-load conditions
3649 **/
3650 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3651 {
3652 int i;
3653
3654 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3655 for (i = 0; i < pf->num_alloc_vsi; i++)
3656 if (pf->vsi[i])
3657 i40e_vsi_free_q_vectors(pf->vsi[i]);
3658 i40e_reset_interrupt_capability(pf);
3659 }
3660
3661 /**
3662 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3663 * @vsi: the VSI being configured
3664 **/
3665 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3666 {
3667 int q_idx;
3668
3669 if (!vsi->netdev)
3670 return;
3671
3672 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3673 napi_enable(&vsi->q_vectors[q_idx]->napi);
3674 }
3675
3676 /**
3677 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3678 * @vsi: the VSI being configured
3679 **/
3680 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3681 {
3682 int q_idx;
3683
3684 if (!vsi->netdev)
3685 return;
3686
3687 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3688 napi_disable(&vsi->q_vectors[q_idx]->napi);
3689 }
3690
3691 /**
3692 * i40e_vsi_close - Shut down a VSI
3693 * @vsi: the vsi to be quelled
3694 **/
3695 static void i40e_vsi_close(struct i40e_vsi *vsi)
3696 {
3697 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3698 i40e_down(vsi);
3699 i40e_vsi_free_irq(vsi);
3700 i40e_vsi_free_tx_resources(vsi);
3701 i40e_vsi_free_rx_resources(vsi);
3702 }
3703
3704 /**
3705 * i40e_quiesce_vsi - Pause a given VSI
3706 * @vsi: the VSI being paused
3707 **/
3708 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3709 {
3710 if (test_bit(__I40E_DOWN, &vsi->state))
3711 return;
3712
3713 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3714 if (vsi->netdev && netif_running(vsi->netdev)) {
3715 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3716 } else {
3717 i40e_vsi_close(vsi);
3718 }
3719 }
3720
3721 /**
3722 * i40e_unquiesce_vsi - Resume a given VSI
3723 * @vsi: the VSI being resumed
3724 **/
3725 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3726 {
3727 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3728 return;
3729
3730 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3731 if (vsi->netdev && netif_running(vsi->netdev))
3732 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3733 else
3734 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3735 }
3736
3737 /**
3738 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3739 * @pf: the PF
3740 **/
3741 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3742 {
3743 int v;
3744
3745 for (v = 0; v < pf->num_alloc_vsi; v++) {
3746 if (pf->vsi[v])
3747 i40e_quiesce_vsi(pf->vsi[v]);
3748 }
3749 }
3750
3751 /**
3752 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3753 * @pf: the PF
3754 **/
3755 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3756 {
3757 int v;
3758
3759 for (v = 0; v < pf->num_alloc_vsi; v++) {
3760 if (pf->vsi[v])
3761 i40e_unquiesce_vsi(pf->vsi[v]);
3762 }
3763 }
3764
3765 /**
3766 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3767 * @dcbcfg: the corresponding DCBx configuration structure
3768 *
3769 * Return the number of TCs from given DCBx configuration
3770 **/
3771 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3772 {
3773 u8 num_tc = 0;
3774 int i;
3775
3776 /* Scan the ETS Config Priority Table to find
3777 * traffic class enabled for a given priority
3778 * and use the traffic class index to get the
3779 * number of traffic classes enabled
3780 */
3781 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3782 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3783 num_tc = dcbcfg->etscfg.prioritytable[i];
3784 }
3785
3786 /* Traffic class index starts from zero so
3787 * increment to return the actual count
3788 */
3789 return num_tc + 1;
3790 }
3791
3792 /**
3793 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3794 * @dcbcfg: the corresponding DCBx configuration structure
3795 *
3796 * Query the current DCB configuration and return the number of
3797 * traffic classes enabled from the given DCBX config
3798 **/
3799 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3800 {
3801 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3802 u8 enabled_tc = 1;
3803 u8 i;
3804
3805 for (i = 0; i < num_tc; i++)
3806 enabled_tc |= 1 << i;
3807
3808 return enabled_tc;
3809 }
3810
3811 /**
3812 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3813 * @pf: PF being queried
3814 *
3815 * Return number of traffic classes enabled for the given PF
3816 **/
3817 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3818 {
3819 struct i40e_hw *hw = &pf->hw;
3820 u8 i, enabled_tc;
3821 u8 num_tc = 0;
3822 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3823
3824 /* If DCB is not enabled then always in single TC */
3825 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3826 return 1;
3827
3828 /* MFP mode return count of enabled TCs for this PF */
3829 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3830 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3831 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3832 if (enabled_tc & (1 << i))
3833 num_tc++;
3834 }
3835 return num_tc;
3836 }
3837
3838 /* SFP mode will be enabled for all TCs on port */
3839 return i40e_dcb_get_num_tc(dcbcfg);
3840 }
3841
3842 /**
3843 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3844 * @pf: PF being queried
3845 *
3846 * Return a bitmap for first enabled traffic class for this PF.
3847 **/
3848 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3849 {
3850 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3851 u8 i = 0;
3852
3853 if (!enabled_tc)
3854 return 0x1; /* TC0 */
3855
3856 /* Find the first enabled TC */
3857 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3858 if (enabled_tc & (1 << i))
3859 break;
3860 }
3861
3862 return 1 << i;
3863 }
3864
3865 /**
3866 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3867 * @pf: PF being queried
3868 *
3869 * Return a bitmap for enabled traffic classes for this PF.
3870 **/
3871 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3872 {
3873 /* If DCB is not enabled for this PF then just return default TC */
3874 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3875 return i40e_pf_get_default_tc(pf);
3876
3877 /* MFP mode will have enabled TCs set by FW */
3878 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3879 return pf->hw.func_caps.enabled_tcmap;
3880
3881 /* SFP mode we want PF to be enabled for all TCs */
3882 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3883 }
3884
3885 /**
3886 * i40e_vsi_get_bw_info - Query VSI BW Information
3887 * @vsi: the VSI being queried
3888 *
3889 * Returns 0 on success, negative value on failure
3890 **/
3891 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3892 {
3893 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3894 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3895 struct i40e_pf *pf = vsi->back;
3896 struct i40e_hw *hw = &pf->hw;
3897 i40e_status aq_ret;
3898 u32 tc_bw_max;
3899 int i;
3900
3901 /* Get the VSI level BW configuration */
3902 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3903 if (aq_ret) {
3904 dev_info(&pf->pdev->dev,
3905 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3906 aq_ret, pf->hw.aq.asq_last_status);
3907 return -EINVAL;
3908 }
3909
3910 /* Get the VSI level BW configuration per TC */
3911 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3912 NULL);
3913 if (aq_ret) {
3914 dev_info(&pf->pdev->dev,
3915 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3916 aq_ret, pf->hw.aq.asq_last_status);
3917 return -EINVAL;
3918 }
3919
3920 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3921 dev_info(&pf->pdev->dev,
3922 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3923 bw_config.tc_valid_bits,
3924 bw_ets_config.tc_valid_bits);
3925 /* Still continuing */
3926 }
3927
3928 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3929 vsi->bw_max_quanta = bw_config.max_bw;
3930 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3931 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3932 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3933 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3934 vsi->bw_ets_limit_credits[i] =
3935 le16_to_cpu(bw_ets_config.credits[i]);
3936 /* 3 bits out of 4 for each TC */
3937 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3938 }
3939
3940 return 0;
3941 }
3942
3943 /**
3944 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3945 * @vsi: the VSI being configured
3946 * @enabled_tc: TC bitmap
3947 * @bw_credits: BW shared credits per TC
3948 *
3949 * Returns 0 on success, negative value on failure
3950 **/
3951 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3952 u8 *bw_share)
3953 {
3954 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3955 i40e_status aq_ret;
3956 int i;
3957
3958 bw_data.tc_valid_bits = enabled_tc;
3959 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3960 bw_data.tc_bw_credits[i] = bw_share[i];
3961
3962 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3963 NULL);
3964 if (aq_ret) {
3965 dev_info(&vsi->back->pdev->dev,
3966 "AQ command Config VSI BW allocation per TC failed = %d\n",
3967 vsi->back->hw.aq.asq_last_status);
3968 return -EINVAL;
3969 }
3970
3971 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3972 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3973
3974 return 0;
3975 }
3976
3977 /**
3978 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3979 * @vsi: the VSI being configured
3980 * @enabled_tc: TC map to be enabled
3981 *
3982 **/
3983 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3984 {
3985 struct net_device *netdev = vsi->netdev;
3986 struct i40e_pf *pf = vsi->back;
3987 struct i40e_hw *hw = &pf->hw;
3988 u8 netdev_tc = 0;
3989 int i;
3990 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3991
3992 if (!netdev)
3993 return;
3994
3995 if (!enabled_tc) {
3996 netdev_reset_tc(netdev);
3997 return;
3998 }
3999
4000 /* Set up actual enabled TCs on the VSI */
4001 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4002 return;
4003
4004 /* set per TC queues for the VSI */
4005 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4006 /* Only set TC queues for enabled tcs
4007 *
4008 * e.g. For a VSI that has TC0 and TC3 enabled the
4009 * enabled_tc bitmap would be 0x00001001; the driver
4010 * will set the numtc for netdev as 2 that will be
4011 * referenced by the netdev layer as TC 0 and 1.
4012 */
4013 if (vsi->tc_config.enabled_tc & (1 << i))
4014 netdev_set_tc_queue(netdev,
4015 vsi->tc_config.tc_info[i].netdev_tc,
4016 vsi->tc_config.tc_info[i].qcount,
4017 vsi->tc_config.tc_info[i].qoffset);
4018 }
4019
4020 /* Assign UP2TC map for the VSI */
4021 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4022 /* Get the actual TC# for the UP */
4023 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4024 /* Get the mapped netdev TC# for the UP */
4025 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4026 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4027 }
4028 }
4029
4030 /**
4031 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4032 * @vsi: the VSI being configured
4033 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4034 **/
4035 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4036 struct i40e_vsi_context *ctxt)
4037 {
4038 /* copy just the sections touched not the entire info
4039 * since not all sections are valid as returned by
4040 * update vsi params
4041 */
4042 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4043 memcpy(&vsi->info.queue_mapping,
4044 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4045 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4046 sizeof(vsi->info.tc_mapping));
4047 }
4048
4049 /**
4050 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4051 * @vsi: VSI to be configured
4052 * @enabled_tc: TC bitmap
4053 *
4054 * This configures a particular VSI for TCs that are mapped to the
4055 * given TC bitmap. It uses default bandwidth share for TCs across
4056 * VSIs to configure TC for a particular VSI.
4057 *
4058 * NOTE:
4059 * It is expected that the VSI queues have been quisced before calling
4060 * this function.
4061 **/
4062 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4063 {
4064 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4065 struct i40e_vsi_context ctxt;
4066 int ret = 0;
4067 int i;
4068
4069 /* Check if enabled_tc is same as existing or new TCs */
4070 if (vsi->tc_config.enabled_tc == enabled_tc)
4071 return ret;
4072
4073 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4074 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4075 if (enabled_tc & (1 << i))
4076 bw_share[i] = 1;
4077 }
4078
4079 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4080 if (ret) {
4081 dev_info(&vsi->back->pdev->dev,
4082 "Failed configuring TC map %d for VSI %d\n",
4083 enabled_tc, vsi->seid);
4084 goto out;
4085 }
4086
4087 /* Update Queue Pairs Mapping for currently enabled UPs */
4088 ctxt.seid = vsi->seid;
4089 ctxt.pf_num = vsi->back->hw.pf_id;
4090 ctxt.vf_num = 0;
4091 ctxt.uplink_seid = vsi->uplink_seid;
4092 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4093 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4094
4095 /* Update the VSI after updating the VSI queue-mapping information */
4096 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4097 if (ret) {
4098 dev_info(&vsi->back->pdev->dev,
4099 "update vsi failed, aq_err=%d\n",
4100 vsi->back->hw.aq.asq_last_status);
4101 goto out;
4102 }
4103 /* update the local VSI info with updated queue map */
4104 i40e_vsi_update_queue_map(vsi, &ctxt);
4105 vsi->info.valid_sections = 0;
4106
4107 /* Update current VSI BW information */
4108 ret = i40e_vsi_get_bw_info(vsi);
4109 if (ret) {
4110 dev_info(&vsi->back->pdev->dev,
4111 "Failed updating vsi bw info, aq_err=%d\n",
4112 vsi->back->hw.aq.asq_last_status);
4113 goto out;
4114 }
4115
4116 /* Update the netdev TC setup */
4117 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4118 out:
4119 return ret;
4120 }
4121
4122 /**
4123 * i40e_veb_config_tc - Configure TCs for given VEB
4124 * @veb: given VEB
4125 * @enabled_tc: TC bitmap
4126 *
4127 * Configures given TC bitmap for VEB (switching) element
4128 **/
4129 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4130 {
4131 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4132 struct i40e_pf *pf = veb->pf;
4133 int ret = 0;
4134 int i;
4135
4136 /* No TCs or already enabled TCs just return */
4137 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4138 return ret;
4139
4140 bw_data.tc_valid_bits = enabled_tc;
4141 /* bw_data.absolute_credits is not set (relative) */
4142
4143 /* Enable ETS TCs with equal BW Share for now */
4144 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4145 if (enabled_tc & (1 << i))
4146 bw_data.tc_bw_share_credits[i] = 1;
4147 }
4148
4149 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4150 &bw_data, NULL);
4151 if (ret) {
4152 dev_info(&pf->pdev->dev,
4153 "veb bw config failed, aq_err=%d\n",
4154 pf->hw.aq.asq_last_status);
4155 goto out;
4156 }
4157
4158 /* Update the BW information */
4159 ret = i40e_veb_get_bw_info(veb);
4160 if (ret) {
4161 dev_info(&pf->pdev->dev,
4162 "Failed getting veb bw config, aq_err=%d\n",
4163 pf->hw.aq.asq_last_status);
4164 }
4165
4166 out:
4167 return ret;
4168 }
4169
4170 #ifdef CONFIG_I40E_DCB
4171 /**
4172 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4173 * @pf: PF struct
4174 *
4175 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4176 * the caller would've quiesce all the VSIs before calling
4177 * this function
4178 **/
4179 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4180 {
4181 u8 tc_map = 0;
4182 int ret;
4183 u8 v;
4184
4185 /* Enable the TCs available on PF to all VEBs */
4186 tc_map = i40e_pf_get_tc_map(pf);
4187 for (v = 0; v < I40E_MAX_VEB; v++) {
4188 if (!pf->veb[v])
4189 continue;
4190 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4191 if (ret) {
4192 dev_info(&pf->pdev->dev,
4193 "Failed configuring TC for VEB seid=%d\n",
4194 pf->veb[v]->seid);
4195 /* Will try to configure as many components */
4196 }
4197 }
4198
4199 /* Update each VSI */
4200 for (v = 0; v < pf->num_alloc_vsi; v++) {
4201 if (!pf->vsi[v])
4202 continue;
4203
4204 /* - Enable all TCs for the LAN VSI
4205 * - For all others keep them at TC0 for now
4206 */
4207 if (v == pf->lan_vsi)
4208 tc_map = i40e_pf_get_tc_map(pf);
4209 else
4210 tc_map = i40e_pf_get_default_tc(pf);
4211
4212 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4213 if (ret) {
4214 dev_info(&pf->pdev->dev,
4215 "Failed configuring TC for VSI seid=%d\n",
4216 pf->vsi[v]->seid);
4217 /* Will try to configure as many components */
4218 } else {
4219 /* Re-configure VSI vectors based on updated TC map */
4220 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4221 if (pf->vsi[v]->netdev)
4222 i40e_dcbnl_set_all(pf->vsi[v]);
4223 }
4224 }
4225 }
4226
4227 /**
4228 * i40e_init_pf_dcb - Initialize DCB configuration
4229 * @pf: PF being configured
4230 *
4231 * Query the current DCB configuration and cache it
4232 * in the hardware structure
4233 **/
4234 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4235 {
4236 struct i40e_hw *hw = &pf->hw;
4237 int err = 0;
4238
4239 if (pf->hw.func_caps.npar_enable)
4240 goto out;
4241
4242 /* Get the initial DCB configuration */
4243 err = i40e_init_dcb(hw);
4244 if (!err) {
4245 /* Device/Function is not DCBX capable */
4246 if ((!hw->func_caps.dcb) ||
4247 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4248 dev_info(&pf->pdev->dev,
4249 "DCBX offload is not supported or is disabled for this PF.\n");
4250
4251 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4252 goto out;
4253
4254 } else {
4255 /* When status is not DISABLED then DCBX in FW */
4256 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4257 DCB_CAP_DCBX_VER_IEEE;
4258
4259 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4260 /* Enable DCB tagging only when more than one TC */
4261 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4262 pf->flags |= I40E_FLAG_DCB_ENABLED;
4263 }
4264 } else {
4265 dev_info(&pf->pdev->dev, "AQ Querying DCB configuration failed: %d\n",
4266 pf->hw.aq.asq_last_status);
4267 }
4268
4269 out:
4270 return err;
4271 }
4272 #endif /* CONFIG_I40E_DCB */
4273 #define SPEED_SIZE 14
4274 #define FC_SIZE 8
4275 /**
4276 * i40e_print_link_message - print link up or down
4277 * @vsi: the VSI for which link needs a message
4278 */
4279 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4280 {
4281 char speed[SPEED_SIZE] = "Unknown";
4282 char fc[FC_SIZE] = "RX/TX";
4283
4284 if (!isup) {
4285 netdev_info(vsi->netdev, "NIC Link is Down\n");
4286 return;
4287 }
4288
4289 switch (vsi->back->hw.phy.link_info.link_speed) {
4290 case I40E_LINK_SPEED_40GB:
4291 strncpy(speed, "40 Gbps", SPEED_SIZE);
4292 break;
4293 case I40E_LINK_SPEED_10GB:
4294 strncpy(speed, "10 Gbps", SPEED_SIZE);
4295 break;
4296 case I40E_LINK_SPEED_1GB:
4297 strncpy(speed, "1000 Mbps", SPEED_SIZE);
4298 break;
4299 default:
4300 break;
4301 }
4302
4303 switch (vsi->back->hw.fc.current_mode) {
4304 case I40E_FC_FULL:
4305 strncpy(fc, "RX/TX", FC_SIZE);
4306 break;
4307 case I40E_FC_TX_PAUSE:
4308 strncpy(fc, "TX", FC_SIZE);
4309 break;
4310 case I40E_FC_RX_PAUSE:
4311 strncpy(fc, "RX", FC_SIZE);
4312 break;
4313 default:
4314 strncpy(fc, "None", FC_SIZE);
4315 break;
4316 }
4317
4318 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4319 speed, fc);
4320 }
4321
4322 /**
4323 * i40e_up_complete - Finish the last steps of bringing up a connection
4324 * @vsi: the VSI being configured
4325 **/
4326 static int i40e_up_complete(struct i40e_vsi *vsi)
4327 {
4328 struct i40e_pf *pf = vsi->back;
4329 int err;
4330
4331 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4332 i40e_vsi_configure_msix(vsi);
4333 else
4334 i40e_configure_msi_and_legacy(vsi);
4335
4336 /* start rings */
4337 err = i40e_vsi_control_rings(vsi, true);
4338 if (err)
4339 return err;
4340
4341 clear_bit(__I40E_DOWN, &vsi->state);
4342 i40e_napi_enable_all(vsi);
4343 i40e_vsi_enable_irq(vsi);
4344
4345 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4346 (vsi->netdev)) {
4347 i40e_print_link_message(vsi, true);
4348 netif_tx_start_all_queues(vsi->netdev);
4349 netif_carrier_on(vsi->netdev);
4350 } else if (vsi->netdev) {
4351 i40e_print_link_message(vsi, false);
4352 }
4353
4354 /* replay FDIR SB filters */
4355 if (vsi->type == I40E_VSI_FDIR)
4356 i40e_fdir_filter_restore(vsi);
4357 i40e_service_event_schedule(pf);
4358
4359 return 0;
4360 }
4361
4362 /**
4363 * i40e_vsi_reinit_locked - Reset the VSI
4364 * @vsi: the VSI being configured
4365 *
4366 * Rebuild the ring structs after some configuration
4367 * has changed, e.g. MTU size.
4368 **/
4369 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4370 {
4371 struct i40e_pf *pf = vsi->back;
4372
4373 WARN_ON(in_interrupt());
4374 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4375 usleep_range(1000, 2000);
4376 i40e_down(vsi);
4377
4378 /* Give a VF some time to respond to the reset. The
4379 * two second wait is based upon the watchdog cycle in
4380 * the VF driver.
4381 */
4382 if (vsi->type == I40E_VSI_SRIOV)
4383 msleep(2000);
4384 i40e_up(vsi);
4385 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4386 }
4387
4388 /**
4389 * i40e_up - Bring the connection back up after being down
4390 * @vsi: the VSI being configured
4391 **/
4392 int i40e_up(struct i40e_vsi *vsi)
4393 {
4394 int err;
4395
4396 err = i40e_vsi_configure(vsi);
4397 if (!err)
4398 err = i40e_up_complete(vsi);
4399
4400 return err;
4401 }
4402
4403 /**
4404 * i40e_down - Shutdown the connection processing
4405 * @vsi: the VSI being stopped
4406 **/
4407 void i40e_down(struct i40e_vsi *vsi)
4408 {
4409 int i;
4410
4411 /* It is assumed that the caller of this function
4412 * sets the vsi->state __I40E_DOWN bit.
4413 */
4414 if (vsi->netdev) {
4415 netif_carrier_off(vsi->netdev);
4416 netif_tx_disable(vsi->netdev);
4417 }
4418 i40e_vsi_disable_irq(vsi);
4419 i40e_vsi_control_rings(vsi, false);
4420 i40e_napi_disable_all(vsi);
4421
4422 for (i = 0; i < vsi->num_queue_pairs; i++) {
4423 i40e_clean_tx_ring(vsi->tx_rings[i]);
4424 i40e_clean_rx_ring(vsi->rx_rings[i]);
4425 }
4426 }
4427
4428 /**
4429 * i40e_setup_tc - configure multiple traffic classes
4430 * @netdev: net device to configure
4431 * @tc: number of traffic classes to enable
4432 **/
4433 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4434 {
4435 struct i40e_netdev_priv *np = netdev_priv(netdev);
4436 struct i40e_vsi *vsi = np->vsi;
4437 struct i40e_pf *pf = vsi->back;
4438 u8 enabled_tc = 0;
4439 int ret = -EINVAL;
4440 int i;
4441
4442 /* Check if DCB enabled to continue */
4443 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4444 netdev_info(netdev, "DCB is not enabled for adapter\n");
4445 goto exit;
4446 }
4447
4448 /* Check if MFP enabled */
4449 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4450 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4451 goto exit;
4452 }
4453
4454 /* Check whether tc count is within enabled limit */
4455 if (tc > i40e_pf_get_num_tc(pf)) {
4456 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4457 goto exit;
4458 }
4459
4460 /* Generate TC map for number of tc requested */
4461 for (i = 0; i < tc; i++)
4462 enabled_tc |= (1 << i);
4463
4464 /* Requesting same TC configuration as already enabled */
4465 if (enabled_tc == vsi->tc_config.enabled_tc)
4466 return 0;
4467
4468 /* Quiesce VSI queues */
4469 i40e_quiesce_vsi(vsi);
4470
4471 /* Configure VSI for enabled TCs */
4472 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4473 if (ret) {
4474 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4475 vsi->seid);
4476 goto exit;
4477 }
4478
4479 /* Unquiesce VSI */
4480 i40e_unquiesce_vsi(vsi);
4481
4482 exit:
4483 return ret;
4484 }
4485
4486 /**
4487 * i40e_open - Called when a network interface is made active
4488 * @netdev: network interface device structure
4489 *
4490 * The open entry point is called when a network interface is made
4491 * active by the system (IFF_UP). At this point all resources needed
4492 * for transmit and receive operations are allocated, the interrupt
4493 * handler is registered with the OS, the netdev watchdog subtask is
4494 * enabled, and the stack is notified that the interface is ready.
4495 *
4496 * Returns 0 on success, negative value on failure
4497 **/
4498 static int i40e_open(struct net_device *netdev)
4499 {
4500 struct i40e_netdev_priv *np = netdev_priv(netdev);
4501 struct i40e_vsi *vsi = np->vsi;
4502 struct i40e_pf *pf = vsi->back;
4503 int err;
4504
4505 /* disallow open during test or if eeprom is broken */
4506 if (test_bit(__I40E_TESTING, &pf->state) ||
4507 test_bit(__I40E_BAD_EEPROM, &pf->state))
4508 return -EBUSY;
4509
4510 netif_carrier_off(netdev);
4511
4512 err = i40e_vsi_open(vsi);
4513 if (err)
4514 return err;
4515
4516 /* configure global TSO hardware offload settings */
4517 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4518 TCP_FLAG_FIN) >> 16);
4519 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4520 TCP_FLAG_FIN |
4521 TCP_FLAG_CWR) >> 16);
4522 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4523
4524 #ifdef CONFIG_I40E_VXLAN
4525 vxlan_get_rx_port(netdev);
4526 #endif
4527
4528 return 0;
4529 }
4530
4531 /**
4532 * i40e_vsi_open -
4533 * @vsi: the VSI to open
4534 *
4535 * Finish initialization of the VSI.
4536 *
4537 * Returns 0 on success, negative value on failure
4538 **/
4539 int i40e_vsi_open(struct i40e_vsi *vsi)
4540 {
4541 struct i40e_pf *pf = vsi->back;
4542 char int_name[IFNAMSIZ];
4543 int err;
4544
4545 /* allocate descriptors */
4546 err = i40e_vsi_setup_tx_resources(vsi);
4547 if (err)
4548 goto err_setup_tx;
4549 err = i40e_vsi_setup_rx_resources(vsi);
4550 if (err)
4551 goto err_setup_rx;
4552
4553 err = i40e_vsi_configure(vsi);
4554 if (err)
4555 goto err_setup_rx;
4556
4557 if (vsi->netdev) {
4558 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4559 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4560 err = i40e_vsi_request_irq(vsi, int_name);
4561 if (err)
4562 goto err_setup_rx;
4563
4564 /* Notify the stack of the actual queue counts. */
4565 err = netif_set_real_num_tx_queues(vsi->netdev,
4566 vsi->num_queue_pairs);
4567 if (err)
4568 goto err_set_queues;
4569
4570 err = netif_set_real_num_rx_queues(vsi->netdev,
4571 vsi->num_queue_pairs);
4572 if (err)
4573 goto err_set_queues;
4574
4575 } else if (vsi->type == I40E_VSI_FDIR) {
4576 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
4577 dev_driver_string(&pf->pdev->dev));
4578 err = i40e_vsi_request_irq(vsi, int_name);
4579 } else {
4580 err = -EINVAL;
4581 goto err_setup_rx;
4582 }
4583
4584 err = i40e_up_complete(vsi);
4585 if (err)
4586 goto err_up_complete;
4587
4588 return 0;
4589
4590 err_up_complete:
4591 i40e_down(vsi);
4592 err_set_queues:
4593 i40e_vsi_free_irq(vsi);
4594 err_setup_rx:
4595 i40e_vsi_free_rx_resources(vsi);
4596 err_setup_tx:
4597 i40e_vsi_free_tx_resources(vsi);
4598 if (vsi == pf->vsi[pf->lan_vsi])
4599 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4600
4601 return err;
4602 }
4603
4604 /**
4605 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4606 * @pf: Pointer to pf
4607 *
4608 * This function destroys the hlist where all the Flow Director
4609 * filters were saved.
4610 **/
4611 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4612 {
4613 struct i40e_fdir_filter *filter;
4614 struct hlist_node *node2;
4615
4616 hlist_for_each_entry_safe(filter, node2,
4617 &pf->fdir_filter_list, fdir_node) {
4618 hlist_del(&filter->fdir_node);
4619 kfree(filter);
4620 }
4621 pf->fdir_pf_active_filters = 0;
4622 }
4623
4624 /**
4625 * i40e_close - Disables a network interface
4626 * @netdev: network interface device structure
4627 *
4628 * The close entry point is called when an interface is de-activated
4629 * by the OS. The hardware is still under the driver's control, but
4630 * this netdev interface is disabled.
4631 *
4632 * Returns 0, this is not allowed to fail
4633 **/
4634 static int i40e_close(struct net_device *netdev)
4635 {
4636 struct i40e_netdev_priv *np = netdev_priv(netdev);
4637 struct i40e_vsi *vsi = np->vsi;
4638
4639 i40e_vsi_close(vsi);
4640
4641 return 0;
4642 }
4643
4644 /**
4645 * i40e_do_reset - Start a PF or Core Reset sequence
4646 * @pf: board private structure
4647 * @reset_flags: which reset is requested
4648 *
4649 * The essential difference in resets is that the PF Reset
4650 * doesn't clear the packet buffers, doesn't reset the PE
4651 * firmware, and doesn't bother the other PFs on the chip.
4652 **/
4653 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4654 {
4655 u32 val;
4656
4657 WARN_ON(in_interrupt());
4658
4659 if (i40e_check_asq_alive(&pf->hw))
4660 i40e_vc_notify_reset(pf);
4661
4662 /* do the biggest reset indicated */
4663 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4664
4665 /* Request a Global Reset
4666 *
4667 * This will start the chip's countdown to the actual full
4668 * chip reset event, and a warning interrupt to be sent
4669 * to all PFs, including the requestor. Our handler
4670 * for the warning interrupt will deal with the shutdown
4671 * and recovery of the switch setup.
4672 */
4673 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4674 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4675 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4676 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4677
4678 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4679
4680 /* Request a Core Reset
4681 *
4682 * Same as Global Reset, except does *not* include the MAC/PHY
4683 */
4684 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4685 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4686 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4687 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4688 i40e_flush(&pf->hw);
4689
4690 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4691
4692 /* Request a Firmware Reset
4693 *
4694 * Same as Global reset, plus restarting the
4695 * embedded firmware engine.
4696 */
4697 /* enable EMP Reset */
4698 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4699 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4700 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4701
4702 /* force the reset */
4703 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4704 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4705 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4706 i40e_flush(&pf->hw);
4707
4708 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4709
4710 /* Request a PF Reset
4711 *
4712 * Resets only the PF-specific registers
4713 *
4714 * This goes directly to the tear-down and rebuild of
4715 * the switch, since we need to do all the recovery as
4716 * for the Core Reset.
4717 */
4718 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4719 i40e_handle_reset_warning(pf);
4720
4721 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4722 int v;
4723
4724 /* Find the VSI(s) that requested a re-init */
4725 dev_info(&pf->pdev->dev,
4726 "VSI reinit requested\n");
4727 for (v = 0; v < pf->num_alloc_vsi; v++) {
4728 struct i40e_vsi *vsi = pf->vsi[v];
4729 if (vsi != NULL &&
4730 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4731 i40e_vsi_reinit_locked(pf->vsi[v]);
4732 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4733 }
4734 }
4735
4736 /* no further action needed, so return now */
4737 return;
4738 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
4739 int v;
4740
4741 /* Find the VSI(s) that needs to be brought down */
4742 dev_info(&pf->pdev->dev, "VSI down requested\n");
4743 for (v = 0; v < pf->num_alloc_vsi; v++) {
4744 struct i40e_vsi *vsi = pf->vsi[v];
4745 if (vsi != NULL &&
4746 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
4747 set_bit(__I40E_DOWN, &vsi->state);
4748 i40e_down(vsi);
4749 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
4750 }
4751 }
4752
4753 /* no further action needed, so return now */
4754 return;
4755 } else {
4756 dev_info(&pf->pdev->dev,
4757 "bad reset request 0x%08x\n", reset_flags);
4758 return;
4759 }
4760 }
4761
4762 #ifdef CONFIG_I40E_DCB
4763 /**
4764 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4765 * @pf: board private structure
4766 * @old_cfg: current DCB config
4767 * @new_cfg: new DCB config
4768 **/
4769 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4770 struct i40e_dcbx_config *old_cfg,
4771 struct i40e_dcbx_config *new_cfg)
4772 {
4773 bool need_reconfig = false;
4774
4775 /* Check if ETS configuration has changed */
4776 if (memcmp(&new_cfg->etscfg,
4777 &old_cfg->etscfg,
4778 sizeof(new_cfg->etscfg))) {
4779 /* If Priority Table has changed reconfig is needed */
4780 if (memcmp(&new_cfg->etscfg.prioritytable,
4781 &old_cfg->etscfg.prioritytable,
4782 sizeof(new_cfg->etscfg.prioritytable))) {
4783 need_reconfig = true;
4784 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4785 }
4786
4787 if (memcmp(&new_cfg->etscfg.tcbwtable,
4788 &old_cfg->etscfg.tcbwtable,
4789 sizeof(new_cfg->etscfg.tcbwtable)))
4790 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4791
4792 if (memcmp(&new_cfg->etscfg.tsatable,
4793 &old_cfg->etscfg.tsatable,
4794 sizeof(new_cfg->etscfg.tsatable)))
4795 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4796 }
4797
4798 /* Check if PFC configuration has changed */
4799 if (memcmp(&new_cfg->pfc,
4800 &old_cfg->pfc,
4801 sizeof(new_cfg->pfc))) {
4802 need_reconfig = true;
4803 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4804 }
4805
4806 /* Check if APP Table has changed */
4807 if (memcmp(&new_cfg->app,
4808 &old_cfg->app,
4809 sizeof(new_cfg->app))) {
4810 need_reconfig = true;
4811 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4812 }
4813
4814 return need_reconfig;
4815 }
4816
4817 /**
4818 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4819 * @pf: board private structure
4820 * @e: event info posted on ARQ
4821 **/
4822 static int i40e_handle_lldp_event(struct i40e_pf *pf,
4823 struct i40e_arq_event_info *e)
4824 {
4825 struct i40e_aqc_lldp_get_mib *mib =
4826 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4827 struct i40e_hw *hw = &pf->hw;
4828 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4829 struct i40e_dcbx_config tmp_dcbx_cfg;
4830 bool need_reconfig = false;
4831 int ret = 0;
4832 u8 type;
4833
4834 /* Not DCB capable or capability disabled */
4835 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
4836 return ret;
4837
4838 /* Ignore if event is not for Nearest Bridge */
4839 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4840 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4841 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4842 return ret;
4843
4844 /* Check MIB Type and return if event for Remote MIB update */
4845 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4846 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4847 /* Update the remote cached instance and return */
4848 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4849 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4850 &hw->remote_dcbx_config);
4851 goto exit;
4852 }
4853
4854 /* Convert/store the DCBX data from LLDPDU temporarily */
4855 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4856 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4857 if (ret) {
4858 /* Error in LLDPDU parsing return */
4859 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4860 goto exit;
4861 }
4862
4863 /* No change detected in DCBX configs */
4864 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4865 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4866 goto exit;
4867 }
4868
4869 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4870
4871 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4872
4873 /* Overwrite the new configuration */
4874 *dcbx_cfg = tmp_dcbx_cfg;
4875
4876 if (!need_reconfig)
4877 goto exit;
4878
4879 /* Enable DCB tagging only when more than one TC */
4880 if (i40e_dcb_get_num_tc(dcbx_cfg) > 1)
4881 pf->flags |= I40E_FLAG_DCB_ENABLED;
4882 else
4883 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
4884
4885 /* Reconfiguration needed quiesce all VSIs */
4886 i40e_pf_quiesce_all_vsi(pf);
4887
4888 /* Changes in configuration update VEB/VSI */
4889 i40e_dcb_reconfigure(pf);
4890
4891 i40e_pf_unquiesce_all_vsi(pf);
4892 exit:
4893 return ret;
4894 }
4895 #endif /* CONFIG_I40E_DCB */
4896
4897 /**
4898 * i40e_do_reset_safe - Protected reset path for userland calls.
4899 * @pf: board private structure
4900 * @reset_flags: which reset is requested
4901 *
4902 **/
4903 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4904 {
4905 rtnl_lock();
4906 i40e_do_reset(pf, reset_flags);
4907 rtnl_unlock();
4908 }
4909
4910 /**
4911 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4912 * @pf: board private structure
4913 * @e: event info posted on ARQ
4914 *
4915 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4916 * and VF queues
4917 **/
4918 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4919 struct i40e_arq_event_info *e)
4920 {
4921 struct i40e_aqc_lan_overflow *data =
4922 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4923 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4924 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4925 struct i40e_hw *hw = &pf->hw;
4926 struct i40e_vf *vf;
4927 u16 vf_id;
4928
4929 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4930 queue, qtx_ctl);
4931
4932 /* Queue belongs to VF, find the VF and issue VF reset */
4933 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4934 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4935 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4936 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4937 vf_id -= hw->func_caps.vf_base_id;
4938 vf = &pf->vf[vf_id];
4939 i40e_vc_notify_vf_reset(vf);
4940 /* Allow VF to process pending reset notification */
4941 msleep(20);
4942 i40e_reset_vf(vf, false);
4943 }
4944 }
4945
4946 /**
4947 * i40e_service_event_complete - Finish up the service event
4948 * @pf: board private structure
4949 **/
4950 static void i40e_service_event_complete(struct i40e_pf *pf)
4951 {
4952 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4953
4954 /* flush memory to make sure state is correct before next watchog */
4955 smp_mb__before_atomic();
4956 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4957 }
4958
4959 /**
4960 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
4961 * @pf: board private structure
4962 **/
4963 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
4964 {
4965 int val, fcnt_prog;
4966
4967 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4968 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
4969 return fcnt_prog;
4970 }
4971
4972 /**
4973 * i40e_get_current_fd_count - Get the count of total FD filters programmed
4974 * @pf: board private structure
4975 **/
4976 int i40e_get_current_fd_count(struct i40e_pf *pf)
4977 {
4978 int val, fcnt_prog;
4979 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4980 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4981 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4982 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4983 return fcnt_prog;
4984 }
4985 /**
4986 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4987 * @pf: board private structure
4988 **/
4989 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4990 {
4991 u32 fcnt_prog, fcnt_avail;
4992
4993 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4994 * to re-enable
4995 */
4996 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4997 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4998 return;
4999 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5000 fcnt_avail = pf->fdir_pf_filter_count;
5001 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
5002 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5003 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5004 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5005 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5006 }
5007 }
5008 /* Wait for some more space to be available to turn on ATR */
5009 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5010 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5011 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5012 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5013 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5014 }
5015 }
5016 }
5017
5018 /**
5019 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5020 * @pf: board private structure
5021 **/
5022 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5023 {
5024 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
5025 return;
5026
5027 /* if interface is down do nothing */
5028 if (test_bit(__I40E_DOWN, &pf->state))
5029 return;
5030 i40e_fdir_check_and_reenable(pf);
5031
5032 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5033 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
5034 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
5035 }
5036
5037 /**
5038 * i40e_vsi_link_event - notify VSI of a link event
5039 * @vsi: vsi to be notified
5040 * @link_up: link up or down
5041 **/
5042 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5043 {
5044 if (!vsi)
5045 return;
5046
5047 switch (vsi->type) {
5048 case I40E_VSI_MAIN:
5049 if (!vsi->netdev || !vsi->netdev_registered)
5050 break;
5051
5052 if (link_up) {
5053 netif_carrier_on(vsi->netdev);
5054 netif_tx_wake_all_queues(vsi->netdev);
5055 } else {
5056 netif_carrier_off(vsi->netdev);
5057 netif_tx_stop_all_queues(vsi->netdev);
5058 }
5059 break;
5060
5061 case I40E_VSI_SRIOV:
5062 break;
5063
5064 case I40E_VSI_VMDQ2:
5065 case I40E_VSI_CTRL:
5066 case I40E_VSI_MIRROR:
5067 default:
5068 /* there is no notification for other VSIs */
5069 break;
5070 }
5071 }
5072
5073 /**
5074 * i40e_veb_link_event - notify elements on the veb of a link event
5075 * @veb: veb to be notified
5076 * @link_up: link up or down
5077 **/
5078 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5079 {
5080 struct i40e_pf *pf;
5081 int i;
5082
5083 if (!veb || !veb->pf)
5084 return;
5085 pf = veb->pf;
5086
5087 /* depth first... */
5088 for (i = 0; i < I40E_MAX_VEB; i++)
5089 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5090 i40e_veb_link_event(pf->veb[i], link_up);
5091
5092 /* ... now the local VSIs */
5093 for (i = 0; i < pf->num_alloc_vsi; i++)
5094 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5095 i40e_vsi_link_event(pf->vsi[i], link_up);
5096 }
5097
5098 /**
5099 * i40e_link_event - Update netif_carrier status
5100 * @pf: board private structure
5101 **/
5102 static void i40e_link_event(struct i40e_pf *pf)
5103 {
5104 bool new_link, old_link;
5105
5106 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
5107 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5108
5109 if (new_link == old_link)
5110 return;
5111 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
5112 i40e_print_link_message(pf->vsi[pf->lan_vsi], new_link);
5113
5114 /* Notify the base of the switch tree connected to
5115 * the link. Floating VEBs are not notified.
5116 */
5117 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5118 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5119 else
5120 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
5121
5122 if (pf->vf)
5123 i40e_vc_notify_link_state(pf);
5124
5125 if (pf->flags & I40E_FLAG_PTP)
5126 i40e_ptp_set_increment(pf);
5127 }
5128
5129 /**
5130 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5131 * @pf: board private structure
5132 *
5133 * Set the per-queue flags to request a check for stuck queues in the irq
5134 * clean functions, then force interrupts to be sure the irq clean is called.
5135 **/
5136 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5137 {
5138 int i, v;
5139
5140 /* If we're down or resetting, just bail */
5141 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5142 return;
5143
5144 /* for each VSI/netdev
5145 * for each Tx queue
5146 * set the check flag
5147 * for each q_vector
5148 * force an interrupt
5149 */
5150 for (v = 0; v < pf->num_alloc_vsi; v++) {
5151 struct i40e_vsi *vsi = pf->vsi[v];
5152 int armed = 0;
5153
5154 if (!pf->vsi[v] ||
5155 test_bit(__I40E_DOWN, &vsi->state) ||
5156 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5157 continue;
5158
5159 for (i = 0; i < vsi->num_queue_pairs; i++) {
5160 set_check_for_tx_hang(vsi->tx_rings[i]);
5161 if (test_bit(__I40E_HANG_CHECK_ARMED,
5162 &vsi->tx_rings[i]->state))
5163 armed++;
5164 }
5165
5166 if (armed) {
5167 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5168 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5169 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5170 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
5171 } else {
5172 u16 vec = vsi->base_vector - 1;
5173 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5174 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
5175 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5176 wr32(&vsi->back->hw,
5177 I40E_PFINT_DYN_CTLN(vec), val);
5178 }
5179 i40e_flush(&vsi->back->hw);
5180 }
5181 }
5182 }
5183
5184 /**
5185 * i40e_watchdog_subtask - Check and bring link up
5186 * @pf: board private structure
5187 **/
5188 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5189 {
5190 int i;
5191
5192 /* if interface is down do nothing */
5193 if (test_bit(__I40E_DOWN, &pf->state) ||
5194 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5195 return;
5196
5197 /* Update the stats for active netdevs so the network stack
5198 * can look at updated numbers whenever it cares to
5199 */
5200 for (i = 0; i < pf->num_alloc_vsi; i++)
5201 if (pf->vsi[i] && pf->vsi[i]->netdev)
5202 i40e_update_stats(pf->vsi[i]);
5203
5204 /* Update the stats for the active switching components */
5205 for (i = 0; i < I40E_MAX_VEB; i++)
5206 if (pf->veb[i])
5207 i40e_update_veb_stats(pf->veb[i]);
5208
5209 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5210 }
5211
5212 /**
5213 * i40e_reset_subtask - Set up for resetting the device and driver
5214 * @pf: board private structure
5215 **/
5216 static void i40e_reset_subtask(struct i40e_pf *pf)
5217 {
5218 u32 reset_flags = 0;
5219
5220 rtnl_lock();
5221 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5222 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5223 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5224 }
5225 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5226 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5227 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5228 }
5229 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5230 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5231 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5232 }
5233 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5234 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5235 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5236 }
5237 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5238 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5239 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5240 }
5241
5242 /* If there's a recovery already waiting, it takes
5243 * precedence before starting a new reset sequence.
5244 */
5245 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5246 i40e_handle_reset_warning(pf);
5247 goto unlock;
5248 }
5249
5250 /* If we're already down or resetting, just bail */
5251 if (reset_flags &&
5252 !test_bit(__I40E_DOWN, &pf->state) &&
5253 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5254 i40e_do_reset(pf, reset_flags);
5255
5256 unlock:
5257 rtnl_unlock();
5258 }
5259
5260 /**
5261 * i40e_handle_link_event - Handle link event
5262 * @pf: board private structure
5263 * @e: event info posted on ARQ
5264 **/
5265 static void i40e_handle_link_event(struct i40e_pf *pf,
5266 struct i40e_arq_event_info *e)
5267 {
5268 struct i40e_hw *hw = &pf->hw;
5269 struct i40e_aqc_get_link_status *status =
5270 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5271 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5272
5273 /* save off old link status information */
5274 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5275 sizeof(pf->hw.phy.link_info_old));
5276
5277 /* update link status */
5278 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
5279 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
5280 hw_link_info->link_info = status->link_info;
5281 hw_link_info->an_info = status->an_info;
5282 hw_link_info->ext_info = status->ext_info;
5283 hw_link_info->lse_enable =
5284 le16_to_cpu(status->command_flags) &
5285 I40E_AQ_LSE_ENABLE;
5286
5287 /* process the event */
5288 i40e_link_event(pf);
5289
5290 /* Do a new status request to re-enable LSE reporting
5291 * and load new status information into the hw struct,
5292 * then see if the status changed while processing the
5293 * initial event.
5294 */
5295 i40e_update_link_info(&pf->hw, true);
5296 i40e_link_event(pf);
5297 }
5298
5299 /**
5300 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5301 * @pf: board private structure
5302 **/
5303 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5304 {
5305 struct i40e_arq_event_info event;
5306 struct i40e_hw *hw = &pf->hw;
5307 u16 pending, i = 0;
5308 i40e_status ret;
5309 u16 opcode;
5310 u32 oldval;
5311 u32 val;
5312
5313 /* check for error indications */
5314 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5315 oldval = val;
5316 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5317 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5318 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5319 }
5320 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5321 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5322 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5323 }
5324 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5325 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5326 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5327 }
5328 if (oldval != val)
5329 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5330
5331 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5332 oldval = val;
5333 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5334 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5335 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5336 }
5337 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5338 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5339 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5340 }
5341 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5342 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5343 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5344 }
5345 if (oldval != val)
5346 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5347
5348 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5349 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5350 if (!event.msg_buf)
5351 return;
5352
5353 do {
5354 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5355 ret = i40e_clean_arq_element(hw, &event, &pending);
5356 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5357 break;
5358 else if (ret) {
5359 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5360 break;
5361 }
5362
5363 opcode = le16_to_cpu(event.desc.opcode);
5364 switch (opcode) {
5365
5366 case i40e_aqc_opc_get_link_status:
5367 i40e_handle_link_event(pf, &event);
5368 break;
5369 case i40e_aqc_opc_send_msg_to_pf:
5370 ret = i40e_vc_process_vf_msg(pf,
5371 le16_to_cpu(event.desc.retval),
5372 le32_to_cpu(event.desc.cookie_high),
5373 le32_to_cpu(event.desc.cookie_low),
5374 event.msg_buf,
5375 event.msg_size);
5376 break;
5377 case i40e_aqc_opc_lldp_update_mib:
5378 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5379 #ifdef CONFIG_I40E_DCB
5380 rtnl_lock();
5381 ret = i40e_handle_lldp_event(pf, &event);
5382 rtnl_unlock();
5383 #endif /* CONFIG_I40E_DCB */
5384 break;
5385 case i40e_aqc_opc_event_lan_overflow:
5386 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5387 i40e_handle_lan_overflow_event(pf, &event);
5388 break;
5389 case i40e_aqc_opc_send_msg_to_peer:
5390 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5391 break;
5392 default:
5393 dev_info(&pf->pdev->dev,
5394 "ARQ Error: Unknown event 0x%04x received\n",
5395 opcode);
5396 break;
5397 }
5398 } while (pending && (i++ < pf->adminq_work_limit));
5399
5400 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5401 /* re-enable Admin queue interrupt cause */
5402 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5403 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5404 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5405 i40e_flush(hw);
5406
5407 kfree(event.msg_buf);
5408 }
5409
5410 /**
5411 * i40e_verify_eeprom - make sure eeprom is good to use
5412 * @pf: board private structure
5413 **/
5414 static void i40e_verify_eeprom(struct i40e_pf *pf)
5415 {
5416 int err;
5417
5418 err = i40e_diag_eeprom_test(&pf->hw);
5419 if (err) {
5420 /* retry in case of garbage read */
5421 err = i40e_diag_eeprom_test(&pf->hw);
5422 if (err) {
5423 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5424 err);
5425 set_bit(__I40E_BAD_EEPROM, &pf->state);
5426 }
5427 }
5428
5429 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5430 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5431 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5432 }
5433 }
5434
5435 /**
5436 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5437 * @veb: pointer to the VEB instance
5438 *
5439 * This is a recursive function that first builds the attached VSIs then
5440 * recurses in to build the next layer of VEB. We track the connections
5441 * through our own index numbers because the seid's from the HW could
5442 * change across the reset.
5443 **/
5444 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5445 {
5446 struct i40e_vsi *ctl_vsi = NULL;
5447 struct i40e_pf *pf = veb->pf;
5448 int v, veb_idx;
5449 int ret;
5450
5451 /* build VSI that owns this VEB, temporarily attached to base VEB */
5452 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5453 if (pf->vsi[v] &&
5454 pf->vsi[v]->veb_idx == veb->idx &&
5455 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5456 ctl_vsi = pf->vsi[v];
5457 break;
5458 }
5459 }
5460 if (!ctl_vsi) {
5461 dev_info(&pf->pdev->dev,
5462 "missing owner VSI for veb_idx %d\n", veb->idx);
5463 ret = -ENOENT;
5464 goto end_reconstitute;
5465 }
5466 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5467 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5468 ret = i40e_add_vsi(ctl_vsi);
5469 if (ret) {
5470 dev_info(&pf->pdev->dev,
5471 "rebuild of owner VSI failed: %d\n", ret);
5472 goto end_reconstitute;
5473 }
5474 i40e_vsi_reset_stats(ctl_vsi);
5475
5476 /* create the VEB in the switch and move the VSI onto the VEB */
5477 ret = i40e_add_veb(veb, ctl_vsi);
5478 if (ret)
5479 goto end_reconstitute;
5480
5481 /* create the remaining VSIs attached to this VEB */
5482 for (v = 0; v < pf->num_alloc_vsi; v++) {
5483 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5484 continue;
5485
5486 if (pf->vsi[v]->veb_idx == veb->idx) {
5487 struct i40e_vsi *vsi = pf->vsi[v];
5488 vsi->uplink_seid = veb->seid;
5489 ret = i40e_add_vsi(vsi);
5490 if (ret) {
5491 dev_info(&pf->pdev->dev,
5492 "rebuild of vsi_idx %d failed: %d\n",
5493 v, ret);
5494 goto end_reconstitute;
5495 }
5496 i40e_vsi_reset_stats(vsi);
5497 }
5498 }
5499
5500 /* create any VEBs attached to this VEB - RECURSION */
5501 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5502 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5503 pf->veb[veb_idx]->uplink_seid = veb->seid;
5504 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5505 if (ret)
5506 break;
5507 }
5508 }
5509
5510 end_reconstitute:
5511 return ret;
5512 }
5513
5514 /**
5515 * i40e_get_capabilities - get info about the HW
5516 * @pf: the PF struct
5517 **/
5518 static int i40e_get_capabilities(struct i40e_pf *pf)
5519 {
5520 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5521 u16 data_size;
5522 int buf_len;
5523 int err;
5524
5525 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5526 do {
5527 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5528 if (!cap_buf)
5529 return -ENOMEM;
5530
5531 /* this loads the data into the hw struct for us */
5532 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5533 &data_size,
5534 i40e_aqc_opc_list_func_capabilities,
5535 NULL);
5536 /* data loaded, buffer no longer needed */
5537 kfree(cap_buf);
5538
5539 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5540 /* retry with a larger buffer */
5541 buf_len = data_size;
5542 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5543 dev_info(&pf->pdev->dev,
5544 "capability discovery failed: aq=%d\n",
5545 pf->hw.aq.asq_last_status);
5546 return -ENODEV;
5547 }
5548 } while (err);
5549
5550 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5551 (pf->hw.aq.fw_maj_ver < 2)) {
5552 pf->hw.func_caps.num_msix_vectors++;
5553 pf->hw.func_caps.num_msix_vectors_vf++;
5554 }
5555
5556 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5557 dev_info(&pf->pdev->dev,
5558 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5559 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5560 pf->hw.func_caps.num_msix_vectors,
5561 pf->hw.func_caps.num_msix_vectors_vf,
5562 pf->hw.func_caps.fd_filters_guaranteed,
5563 pf->hw.func_caps.fd_filters_best_effort,
5564 pf->hw.func_caps.num_tx_qp,
5565 pf->hw.func_caps.num_vsis);
5566
5567 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5568 + pf->hw.func_caps.num_vfs)
5569 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5570 dev_info(&pf->pdev->dev,
5571 "got num_vsis %d, setting num_vsis to %d\n",
5572 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5573 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5574 }
5575
5576 return 0;
5577 }
5578
5579 static int i40e_vsi_clear(struct i40e_vsi *vsi);
5580
5581 /**
5582 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5583 * @pf: board private structure
5584 **/
5585 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5586 {
5587 struct i40e_vsi *vsi;
5588 int i;
5589
5590 /* quick workaround for an NVM issue that leaves a critical register
5591 * uninitialized
5592 */
5593 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
5594 static const u32 hkey[] = {
5595 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
5596 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
5597 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
5598 0x95b3a76d};
5599
5600 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
5601 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
5602 }
5603
5604 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5605 return;
5606
5607 /* find existing VSI and see if it needs configuring */
5608 vsi = NULL;
5609 for (i = 0; i < pf->num_alloc_vsi; i++) {
5610 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5611 vsi = pf->vsi[i];
5612 break;
5613 }
5614 }
5615
5616 /* create a new VSI if none exists */
5617 if (!vsi) {
5618 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5619 pf->vsi[pf->lan_vsi]->seid, 0);
5620 if (!vsi) {
5621 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5622 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5623 return;
5624 }
5625 }
5626
5627 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5628 }
5629
5630 /**
5631 * i40e_fdir_teardown - release the Flow Director resources
5632 * @pf: board private structure
5633 **/
5634 static void i40e_fdir_teardown(struct i40e_pf *pf)
5635 {
5636 int i;
5637
5638 i40e_fdir_filter_exit(pf);
5639 for (i = 0; i < pf->num_alloc_vsi; i++) {
5640 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5641 i40e_vsi_release(pf->vsi[i]);
5642 break;
5643 }
5644 }
5645 }
5646
5647 /**
5648 * i40e_prep_for_reset - prep for the core to reset
5649 * @pf: board private structure
5650 *
5651 * Close up the VFs and other things in prep for pf Reset.
5652 **/
5653 static void i40e_prep_for_reset(struct i40e_pf *pf)
5654 {
5655 struct i40e_hw *hw = &pf->hw;
5656 i40e_status ret = 0;
5657 u32 v;
5658
5659 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5660 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5661 return;
5662
5663 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5664
5665 /* quiesce the VSIs and their queues that are not already DOWN */
5666 i40e_pf_quiesce_all_vsi(pf);
5667
5668 for (v = 0; v < pf->num_alloc_vsi; v++) {
5669 if (pf->vsi[v])
5670 pf->vsi[v]->seid = 0;
5671 }
5672
5673 i40e_shutdown_adminq(&pf->hw);
5674
5675 /* call shutdown HMC */
5676 if (hw->hmc.hmc_obj) {
5677 ret = i40e_shutdown_lan_hmc(hw);
5678 if (ret)
5679 dev_warn(&pf->pdev->dev,
5680 "shutdown_lan_hmc failed: %d\n", ret);
5681 }
5682 }
5683
5684 /**
5685 * i40e_send_version - update firmware with driver version
5686 * @pf: PF struct
5687 */
5688 static void i40e_send_version(struct i40e_pf *pf)
5689 {
5690 struct i40e_driver_version dv;
5691
5692 dv.major_version = DRV_VERSION_MAJOR;
5693 dv.minor_version = DRV_VERSION_MINOR;
5694 dv.build_version = DRV_VERSION_BUILD;
5695 dv.subbuild_version = 0;
5696 strncpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
5697 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5698 }
5699
5700 /**
5701 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5702 * @pf: board private structure
5703 * @reinit: if the Main VSI needs to re-initialized.
5704 **/
5705 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5706 {
5707 struct i40e_hw *hw = &pf->hw;
5708 i40e_status ret;
5709 u32 v;
5710
5711 /* Now we wait for GRST to settle out.
5712 * We don't have to delete the VEBs or VSIs from the hw switch
5713 * because the reset will make them disappear.
5714 */
5715 ret = i40e_pf_reset(hw);
5716 if (ret) {
5717 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5718 goto end_core_reset;
5719 }
5720 pf->pfr_count++;
5721
5722 if (test_bit(__I40E_DOWN, &pf->state))
5723 goto end_core_reset;
5724 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5725
5726 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5727 ret = i40e_init_adminq(&pf->hw);
5728 if (ret) {
5729 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5730 goto end_core_reset;
5731 }
5732
5733 /* re-verify the eeprom if we just had an EMP reset */
5734 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5735 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5736 i40e_verify_eeprom(pf);
5737 }
5738
5739 i40e_clear_pxe_mode(hw);
5740 ret = i40e_get_capabilities(pf);
5741 if (ret) {
5742 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5743 ret);
5744 goto end_core_reset;
5745 }
5746
5747 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5748 hw->func_caps.num_rx_qp,
5749 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5750 if (ret) {
5751 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5752 goto end_core_reset;
5753 }
5754 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5755 if (ret) {
5756 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5757 goto end_core_reset;
5758 }
5759
5760 #ifdef CONFIG_I40E_DCB
5761 ret = i40e_init_pf_dcb(pf);
5762 if (ret) {
5763 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5764 goto end_core_reset;
5765 }
5766 #endif /* CONFIG_I40E_DCB */
5767
5768 /* do basic switch setup */
5769 ret = i40e_setup_pf_switch(pf, reinit);
5770 if (ret)
5771 goto end_core_reset;
5772
5773 /* Rebuild the VSIs and VEBs that existed before reset.
5774 * They are still in our local switch element arrays, so only
5775 * need to rebuild the switch model in the HW.
5776 *
5777 * If there were VEBs but the reconstitution failed, we'll try
5778 * try to recover minimal use by getting the basic PF VSI working.
5779 */
5780 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5781 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5782 /* find the one VEB connected to the MAC, and find orphans */
5783 for (v = 0; v < I40E_MAX_VEB; v++) {
5784 if (!pf->veb[v])
5785 continue;
5786
5787 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5788 pf->veb[v]->uplink_seid == 0) {
5789 ret = i40e_reconstitute_veb(pf->veb[v]);
5790
5791 if (!ret)
5792 continue;
5793
5794 /* If Main VEB failed, we're in deep doodoo,
5795 * so give up rebuilding the switch and set up
5796 * for minimal rebuild of PF VSI.
5797 * If orphan failed, we'll report the error
5798 * but try to keep going.
5799 */
5800 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5801 dev_info(&pf->pdev->dev,
5802 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5803 ret);
5804 pf->vsi[pf->lan_vsi]->uplink_seid
5805 = pf->mac_seid;
5806 break;
5807 } else if (pf->veb[v]->uplink_seid == 0) {
5808 dev_info(&pf->pdev->dev,
5809 "rebuild of orphan VEB failed: %d\n",
5810 ret);
5811 }
5812 }
5813 }
5814 }
5815
5816 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5817 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5818 /* no VEB, so rebuild only the Main VSI */
5819 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5820 if (ret) {
5821 dev_info(&pf->pdev->dev,
5822 "rebuild of Main VSI failed: %d\n", ret);
5823 goto end_core_reset;
5824 }
5825 }
5826
5827 /* reinit the misc interrupt */
5828 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5829 ret = i40e_setup_misc_vector(pf);
5830
5831 /* restart the VSIs that were rebuilt and running before the reset */
5832 i40e_pf_unquiesce_all_vsi(pf);
5833
5834 if (pf->num_alloc_vfs) {
5835 for (v = 0; v < pf->num_alloc_vfs; v++)
5836 i40e_reset_vf(&pf->vf[v], true);
5837 }
5838
5839 /* tell the firmware that we're starting */
5840 i40e_send_version(pf);
5841
5842 end_core_reset:
5843 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5844 }
5845
5846 /**
5847 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5848 * @pf: board private structure
5849 *
5850 * Close up the VFs and other things in prep for a Core Reset,
5851 * then get ready to rebuild the world.
5852 **/
5853 static void i40e_handle_reset_warning(struct i40e_pf *pf)
5854 {
5855 i40e_prep_for_reset(pf);
5856 i40e_reset_and_rebuild(pf, false);
5857 }
5858
5859 /**
5860 * i40e_handle_mdd_event
5861 * @pf: pointer to the pf structure
5862 *
5863 * Called from the MDD irq handler to identify possibly malicious vfs
5864 **/
5865 static void i40e_handle_mdd_event(struct i40e_pf *pf)
5866 {
5867 struct i40e_hw *hw = &pf->hw;
5868 bool mdd_detected = false;
5869 bool pf_mdd_detected = false;
5870 struct i40e_vf *vf;
5871 u32 reg;
5872 int i;
5873
5874 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5875 return;
5876
5877 /* find what triggered the MDD event */
5878 reg = rd32(hw, I40E_GL_MDET_TX);
5879 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5880 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
5881 I40E_GL_MDET_TX_PF_NUM_SHIFT;
5882 u8 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
5883 I40E_GL_MDET_TX_VF_NUM_SHIFT;
5884 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT) >>
5885 I40E_GL_MDET_TX_EVENT_SHIFT;
5886 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
5887 I40E_GL_MDET_TX_QUEUE_SHIFT;
5888 dev_info(&pf->pdev->dev,
5889 "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
5890 event, queue, pf_num, vf_num);
5891 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5892 mdd_detected = true;
5893 }
5894 reg = rd32(hw, I40E_GL_MDET_RX);
5895 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5896 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
5897 I40E_GL_MDET_RX_FUNCTION_SHIFT;
5898 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT) >>
5899 I40E_GL_MDET_RX_EVENT_SHIFT;
5900 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
5901 I40E_GL_MDET_RX_QUEUE_SHIFT;
5902 dev_info(&pf->pdev->dev,
5903 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5904 event, queue, func);
5905 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5906 mdd_detected = true;
5907 }
5908
5909 if (mdd_detected) {
5910 reg = rd32(hw, I40E_PF_MDET_TX);
5911 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
5912 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
5913 dev_info(&pf->pdev->dev,
5914 "MDD TX event is for this function 0x%08x, requesting PF reset.\n",
5915 reg);
5916 pf_mdd_detected = true;
5917 }
5918 reg = rd32(hw, I40E_PF_MDET_RX);
5919 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
5920 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
5921 dev_info(&pf->pdev->dev,
5922 "MDD RX event is for this function 0x%08x, requesting PF reset.\n",
5923 reg);
5924 pf_mdd_detected = true;
5925 }
5926 /* Queue belongs to the PF, initiate a reset */
5927 if (pf_mdd_detected) {
5928 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5929 i40e_service_event_schedule(pf);
5930 }
5931 }
5932
5933 /* see if one of the VFs needs its hand slapped */
5934 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5935 vf = &(pf->vf[i]);
5936 reg = rd32(hw, I40E_VP_MDET_TX(i));
5937 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5938 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5939 vf->num_mdd_events++;
5940 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5941 }
5942
5943 reg = rd32(hw, I40E_VP_MDET_RX(i));
5944 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5945 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5946 vf->num_mdd_events++;
5947 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5948 }
5949
5950 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5951 dev_info(&pf->pdev->dev,
5952 "Too many MDD events on VF %d, disabled\n", i);
5953 dev_info(&pf->pdev->dev,
5954 "Use PF Control I/F to re-enable the VF\n");
5955 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5956 }
5957 }
5958
5959 /* re-enable mdd interrupt cause */
5960 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5961 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5962 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5963 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5964 i40e_flush(hw);
5965 }
5966
5967 #ifdef CONFIG_I40E_VXLAN
5968 /**
5969 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5970 * @pf: board private structure
5971 **/
5972 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5973 {
5974 struct i40e_hw *hw = &pf->hw;
5975 i40e_status ret;
5976 u8 filter_index;
5977 __be16 port;
5978 int i;
5979
5980 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5981 return;
5982
5983 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5984
5985 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5986 if (pf->pending_vxlan_bitmap & (1 << i)) {
5987 pf->pending_vxlan_bitmap &= ~(1 << i);
5988 port = pf->vxlan_ports[i];
5989 ret = port ?
5990 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5991 I40E_AQC_TUNNEL_TYPE_VXLAN,
5992 &filter_index, NULL)
5993 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5994
5995 if (ret) {
5996 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5997 port ? "adding" : "deleting",
5998 ntohs(port), port ? i : i);
5999
6000 pf->vxlan_ports[i] = 0;
6001 } else {
6002 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6003 port ? "Added" : "Deleted",
6004 ntohs(port), port ? i : filter_index);
6005 }
6006 }
6007 }
6008 }
6009
6010 #endif
6011 /**
6012 * i40e_service_task - Run the driver's async subtasks
6013 * @work: pointer to work_struct containing our data
6014 **/
6015 static void i40e_service_task(struct work_struct *work)
6016 {
6017 struct i40e_pf *pf = container_of(work,
6018 struct i40e_pf,
6019 service_task);
6020 unsigned long start_time = jiffies;
6021
6022 /* don't bother with service tasks if a reset is in progress */
6023 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6024 i40e_service_event_complete(pf);
6025 return;
6026 }
6027
6028 i40e_reset_subtask(pf);
6029 i40e_handle_mdd_event(pf);
6030 i40e_vc_process_vflr_event(pf);
6031 i40e_watchdog_subtask(pf);
6032 i40e_fdir_reinit_subtask(pf);
6033 i40e_check_hang_subtask(pf);
6034 i40e_sync_filters_subtask(pf);
6035 #ifdef CONFIG_I40E_VXLAN
6036 i40e_sync_vxlan_filters_subtask(pf);
6037 #endif
6038 i40e_clean_adminq_subtask(pf);
6039
6040 i40e_service_event_complete(pf);
6041
6042 /* If the tasks have taken longer than one timer cycle or there
6043 * is more work to be done, reschedule the service task now
6044 * rather than wait for the timer to tick again.
6045 */
6046 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6047 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6048 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6049 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6050 i40e_service_event_schedule(pf);
6051 }
6052
6053 /**
6054 * i40e_service_timer - timer callback
6055 * @data: pointer to PF struct
6056 **/
6057 static void i40e_service_timer(unsigned long data)
6058 {
6059 struct i40e_pf *pf = (struct i40e_pf *)data;
6060
6061 mod_timer(&pf->service_timer,
6062 round_jiffies(jiffies + pf->service_timer_period));
6063 i40e_service_event_schedule(pf);
6064 }
6065
6066 /**
6067 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6068 * @vsi: the VSI being configured
6069 **/
6070 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6071 {
6072 struct i40e_pf *pf = vsi->back;
6073
6074 switch (vsi->type) {
6075 case I40E_VSI_MAIN:
6076 vsi->alloc_queue_pairs = pf->num_lan_qps;
6077 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6078 I40E_REQ_DESCRIPTOR_MULTIPLE);
6079 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6080 vsi->num_q_vectors = pf->num_lan_msix;
6081 else
6082 vsi->num_q_vectors = 1;
6083
6084 break;
6085
6086 case I40E_VSI_FDIR:
6087 vsi->alloc_queue_pairs = 1;
6088 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6089 I40E_REQ_DESCRIPTOR_MULTIPLE);
6090 vsi->num_q_vectors = 1;
6091 break;
6092
6093 case I40E_VSI_VMDQ2:
6094 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6095 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6096 I40E_REQ_DESCRIPTOR_MULTIPLE);
6097 vsi->num_q_vectors = pf->num_vmdq_msix;
6098 break;
6099
6100 case I40E_VSI_SRIOV:
6101 vsi->alloc_queue_pairs = pf->num_vf_qps;
6102 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6103 I40E_REQ_DESCRIPTOR_MULTIPLE);
6104 break;
6105
6106 default:
6107 WARN_ON(1);
6108 return -ENODATA;
6109 }
6110
6111 return 0;
6112 }
6113
6114 /**
6115 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6116 * @type: VSI pointer
6117 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6118 *
6119 * On error: returns error code (negative)
6120 * On success: returns 0
6121 **/
6122 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6123 {
6124 int size;
6125 int ret = 0;
6126
6127 /* allocate memory for both Tx and Rx ring pointers */
6128 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6129 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6130 if (!vsi->tx_rings)
6131 return -ENOMEM;
6132 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6133
6134 if (alloc_qvectors) {
6135 /* allocate memory for q_vector pointers */
6136 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
6137 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6138 if (!vsi->q_vectors) {
6139 ret = -ENOMEM;
6140 goto err_vectors;
6141 }
6142 }
6143 return ret;
6144
6145 err_vectors:
6146 kfree(vsi->tx_rings);
6147 return ret;
6148 }
6149
6150 /**
6151 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6152 * @pf: board private structure
6153 * @type: type of VSI
6154 *
6155 * On error: returns error code (negative)
6156 * On success: returns vsi index in PF (positive)
6157 **/
6158 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6159 {
6160 int ret = -ENODEV;
6161 struct i40e_vsi *vsi;
6162 int vsi_idx;
6163 int i;
6164
6165 /* Need to protect the allocation of the VSIs at the PF level */
6166 mutex_lock(&pf->switch_mutex);
6167
6168 /* VSI list may be fragmented if VSI creation/destruction has
6169 * been happening. We can afford to do a quick scan to look
6170 * for any free VSIs in the list.
6171 *
6172 * find next empty vsi slot, looping back around if necessary
6173 */
6174 i = pf->next_vsi;
6175 while (i < pf->num_alloc_vsi && pf->vsi[i])
6176 i++;
6177 if (i >= pf->num_alloc_vsi) {
6178 i = 0;
6179 while (i < pf->next_vsi && pf->vsi[i])
6180 i++;
6181 }
6182
6183 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6184 vsi_idx = i; /* Found one! */
6185 } else {
6186 ret = -ENODEV;
6187 goto unlock_pf; /* out of VSI slots! */
6188 }
6189 pf->next_vsi = ++i;
6190
6191 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6192 if (!vsi) {
6193 ret = -ENOMEM;
6194 goto unlock_pf;
6195 }
6196 vsi->type = type;
6197 vsi->back = pf;
6198 set_bit(__I40E_DOWN, &vsi->state);
6199 vsi->flags = 0;
6200 vsi->idx = vsi_idx;
6201 vsi->rx_itr_setting = pf->rx_itr_default;
6202 vsi->tx_itr_setting = pf->tx_itr_default;
6203 vsi->netdev_registered = false;
6204 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6205 INIT_LIST_HEAD(&vsi->mac_filter_list);
6206 vsi->irqs_ready = false;
6207
6208 ret = i40e_set_num_rings_in_vsi(vsi);
6209 if (ret)
6210 goto err_rings;
6211
6212 ret = i40e_vsi_alloc_arrays(vsi, true);
6213 if (ret)
6214 goto err_rings;
6215
6216 /* Setup default MSIX irq handler for VSI */
6217 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6218
6219 pf->vsi[vsi_idx] = vsi;
6220 ret = vsi_idx;
6221 goto unlock_pf;
6222
6223 err_rings:
6224 pf->next_vsi = i - 1;
6225 kfree(vsi);
6226 unlock_pf:
6227 mutex_unlock(&pf->switch_mutex);
6228 return ret;
6229 }
6230
6231 /**
6232 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6233 * @type: VSI pointer
6234 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6235 *
6236 * On error: returns error code (negative)
6237 * On success: returns 0
6238 **/
6239 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6240 {
6241 /* free the ring and vector containers */
6242 if (free_qvectors) {
6243 kfree(vsi->q_vectors);
6244 vsi->q_vectors = NULL;
6245 }
6246 kfree(vsi->tx_rings);
6247 vsi->tx_rings = NULL;
6248 vsi->rx_rings = NULL;
6249 }
6250
6251 /**
6252 * i40e_vsi_clear - Deallocate the VSI provided
6253 * @vsi: the VSI being un-configured
6254 **/
6255 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6256 {
6257 struct i40e_pf *pf;
6258
6259 if (!vsi)
6260 return 0;
6261
6262 if (!vsi->back)
6263 goto free_vsi;
6264 pf = vsi->back;
6265
6266 mutex_lock(&pf->switch_mutex);
6267 if (!pf->vsi[vsi->idx]) {
6268 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6269 vsi->idx, vsi->idx, vsi, vsi->type);
6270 goto unlock_vsi;
6271 }
6272
6273 if (pf->vsi[vsi->idx] != vsi) {
6274 dev_err(&pf->pdev->dev,
6275 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6276 pf->vsi[vsi->idx]->idx,
6277 pf->vsi[vsi->idx],
6278 pf->vsi[vsi->idx]->type,
6279 vsi->idx, vsi, vsi->type);
6280 goto unlock_vsi;
6281 }
6282
6283 /* updates the pf for this cleared vsi */
6284 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6285 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6286
6287 i40e_vsi_free_arrays(vsi, true);
6288
6289 pf->vsi[vsi->idx] = NULL;
6290 if (vsi->idx < pf->next_vsi)
6291 pf->next_vsi = vsi->idx;
6292
6293 unlock_vsi:
6294 mutex_unlock(&pf->switch_mutex);
6295 free_vsi:
6296 kfree(vsi);
6297
6298 return 0;
6299 }
6300
6301 /**
6302 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6303 * @vsi: the VSI being cleaned
6304 **/
6305 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6306 {
6307 int i;
6308
6309 if (vsi->tx_rings && vsi->tx_rings[0]) {
6310 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6311 kfree_rcu(vsi->tx_rings[i], rcu);
6312 vsi->tx_rings[i] = NULL;
6313 vsi->rx_rings[i] = NULL;
6314 }
6315 }
6316 }
6317
6318 /**
6319 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6320 * @vsi: the VSI being configured
6321 **/
6322 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6323 {
6324 struct i40e_ring *tx_ring, *rx_ring;
6325 struct i40e_pf *pf = vsi->back;
6326 int i;
6327
6328 /* Set basic values in the rings to be used later during open() */
6329 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6330 /* allocate space for both Tx and Rx in one shot */
6331 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6332 if (!tx_ring)
6333 goto err_out;
6334
6335 tx_ring->queue_index = i;
6336 tx_ring->reg_idx = vsi->base_queue + i;
6337 tx_ring->ring_active = false;
6338 tx_ring->vsi = vsi;
6339 tx_ring->netdev = vsi->netdev;
6340 tx_ring->dev = &pf->pdev->dev;
6341 tx_ring->count = vsi->num_desc;
6342 tx_ring->size = 0;
6343 tx_ring->dcb_tc = 0;
6344 vsi->tx_rings[i] = tx_ring;
6345
6346 rx_ring = &tx_ring[1];
6347 rx_ring->queue_index = i;
6348 rx_ring->reg_idx = vsi->base_queue + i;
6349 rx_ring->ring_active = false;
6350 rx_ring->vsi = vsi;
6351 rx_ring->netdev = vsi->netdev;
6352 rx_ring->dev = &pf->pdev->dev;
6353 rx_ring->count = vsi->num_desc;
6354 rx_ring->size = 0;
6355 rx_ring->dcb_tc = 0;
6356 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6357 set_ring_16byte_desc_enabled(rx_ring);
6358 else
6359 clear_ring_16byte_desc_enabled(rx_ring);
6360 vsi->rx_rings[i] = rx_ring;
6361 }
6362
6363 return 0;
6364
6365 err_out:
6366 i40e_vsi_clear_rings(vsi);
6367 return -ENOMEM;
6368 }
6369
6370 /**
6371 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6372 * @pf: board private structure
6373 * @vectors: the number of MSI-X vectors to request
6374 *
6375 * Returns the number of vectors reserved, or error
6376 **/
6377 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6378 {
6379 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6380 I40E_MIN_MSIX, vectors);
6381 if (vectors < 0) {
6382 dev_info(&pf->pdev->dev,
6383 "MSI-X vector reservation failed: %d\n", vectors);
6384 vectors = 0;
6385 }
6386
6387 return vectors;
6388 }
6389
6390 /**
6391 * i40e_init_msix - Setup the MSIX capability
6392 * @pf: board private structure
6393 *
6394 * Work with the OS to set up the MSIX vectors needed.
6395 *
6396 * Returns 0 on success, negative on failure
6397 **/
6398 static int i40e_init_msix(struct i40e_pf *pf)
6399 {
6400 i40e_status err = 0;
6401 struct i40e_hw *hw = &pf->hw;
6402 int v_budget, i;
6403 int vec;
6404
6405 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6406 return -ENODEV;
6407
6408 /* The number of vectors we'll request will be comprised of:
6409 * - Add 1 for "other" cause for Admin Queue events, etc.
6410 * - The number of LAN queue pairs
6411 * - Queues being used for RSS.
6412 * We don't need as many as max_rss_size vectors.
6413 * use rss_size instead in the calculation since that
6414 * is governed by number of cpus in the system.
6415 * - assumes symmetric Tx/Rx pairing
6416 * - The number of VMDq pairs
6417 * Once we count this up, try the request.
6418 *
6419 * If we can't get what we want, we'll simplify to nearly nothing
6420 * and try again. If that still fails, we punt.
6421 */
6422 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6423 pf->num_vmdq_msix = pf->num_vmdq_qps;
6424 v_budget = 1 + pf->num_lan_msix;
6425 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6426 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6427 v_budget++;
6428
6429 /* Scale down if necessary, and the rings will share vectors */
6430 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6431
6432 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6433 GFP_KERNEL);
6434 if (!pf->msix_entries)
6435 return -ENOMEM;
6436
6437 for (i = 0; i < v_budget; i++)
6438 pf->msix_entries[i].entry = i;
6439 vec = i40e_reserve_msix_vectors(pf, v_budget);
6440
6441 if (vec != v_budget) {
6442 /* If we have limited resources, we will start with no vectors
6443 * for the special features and then allocate vectors to some
6444 * of these features based on the policy and at the end disable
6445 * the features that did not get any vectors.
6446 */
6447 pf->num_vmdq_msix = 0;
6448 }
6449
6450 if (vec < I40E_MIN_MSIX) {
6451 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6452 kfree(pf->msix_entries);
6453 pf->msix_entries = NULL;
6454 return -ENODEV;
6455
6456 } else if (vec == I40E_MIN_MSIX) {
6457 /* Adjust for minimal MSIX use */
6458 pf->num_vmdq_vsis = 0;
6459 pf->num_vmdq_qps = 0;
6460 pf->num_lan_qps = 1;
6461 pf->num_lan_msix = 1;
6462
6463 } else if (vec != v_budget) {
6464 /* reserve the misc vector */
6465 vec--;
6466
6467 /* Scale vector usage down */
6468 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6469 pf->num_vmdq_vsis = 1;
6470
6471 /* partition out the remaining vectors */
6472 switch (vec) {
6473 case 2:
6474 pf->num_lan_msix = 1;
6475 break;
6476 case 3:
6477 pf->num_lan_msix = 2;
6478 break;
6479 default:
6480 pf->num_lan_msix = min_t(int, (vec / 2),
6481 pf->num_lan_qps);
6482 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6483 I40E_DEFAULT_NUM_VMDQ_VSI);
6484 break;
6485 }
6486 }
6487
6488 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
6489 (pf->num_vmdq_msix == 0)) {
6490 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
6491 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6492 }
6493 return err;
6494 }
6495
6496 /**
6497 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6498 * @vsi: the VSI being configured
6499 * @v_idx: index of the vector in the vsi struct
6500 *
6501 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6502 **/
6503 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6504 {
6505 struct i40e_q_vector *q_vector;
6506
6507 /* allocate q_vector */
6508 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6509 if (!q_vector)
6510 return -ENOMEM;
6511
6512 q_vector->vsi = vsi;
6513 q_vector->v_idx = v_idx;
6514 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6515 if (vsi->netdev)
6516 netif_napi_add(vsi->netdev, &q_vector->napi,
6517 i40e_napi_poll, NAPI_POLL_WEIGHT);
6518
6519 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6520 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6521
6522 /* tie q_vector and vsi together */
6523 vsi->q_vectors[v_idx] = q_vector;
6524
6525 return 0;
6526 }
6527
6528 /**
6529 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6530 * @vsi: the VSI being configured
6531 *
6532 * We allocate one q_vector per queue interrupt. If allocation fails we
6533 * return -ENOMEM.
6534 **/
6535 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6536 {
6537 struct i40e_pf *pf = vsi->back;
6538 int v_idx, num_q_vectors;
6539 int err;
6540
6541 /* if not MSIX, give the one vector only to the LAN VSI */
6542 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6543 num_q_vectors = vsi->num_q_vectors;
6544 else if (vsi == pf->vsi[pf->lan_vsi])
6545 num_q_vectors = 1;
6546 else
6547 return -EINVAL;
6548
6549 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6550 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6551 if (err)
6552 goto err_out;
6553 }
6554
6555 return 0;
6556
6557 err_out:
6558 while (v_idx--)
6559 i40e_free_q_vector(vsi, v_idx);
6560
6561 return err;
6562 }
6563
6564 /**
6565 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6566 * @pf: board private structure to initialize
6567 **/
6568 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6569 {
6570 int err = 0;
6571
6572 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6573 err = i40e_init_msix(pf);
6574 if (err) {
6575 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6576 I40E_FLAG_RSS_ENABLED |
6577 I40E_FLAG_DCB_CAPABLE |
6578 I40E_FLAG_SRIOV_ENABLED |
6579 I40E_FLAG_FD_SB_ENABLED |
6580 I40E_FLAG_FD_ATR_ENABLED |
6581 I40E_FLAG_VMDQ_ENABLED);
6582
6583 /* rework the queue expectations without MSIX */
6584 i40e_determine_queue_usage(pf);
6585 }
6586 }
6587
6588 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6589 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6590 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6591 err = pci_enable_msi(pf->pdev);
6592 if (err) {
6593 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6594 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6595 }
6596 }
6597
6598 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6599 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6600
6601 /* track first vector for misc interrupts */
6602 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6603 }
6604
6605 /**
6606 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6607 * @pf: board private structure
6608 *
6609 * This sets up the handler for MSIX 0, which is used to manage the
6610 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6611 * when in MSI or Legacy interrupt mode.
6612 **/
6613 static int i40e_setup_misc_vector(struct i40e_pf *pf)
6614 {
6615 struct i40e_hw *hw = &pf->hw;
6616 int err = 0;
6617
6618 /* Only request the irq if this is the first time through, and
6619 * not when we're rebuilding after a Reset
6620 */
6621 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6622 err = request_irq(pf->msix_entries[0].vector,
6623 i40e_intr, 0, pf->misc_int_name, pf);
6624 if (err) {
6625 dev_info(&pf->pdev->dev,
6626 "request_irq for %s failed: %d\n",
6627 pf->misc_int_name, err);
6628 return -EFAULT;
6629 }
6630 }
6631
6632 i40e_enable_misc_int_causes(hw);
6633
6634 /* associate no queues to the misc vector */
6635 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6636 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6637
6638 i40e_flush(hw);
6639
6640 i40e_irq_dynamic_enable_icr0(pf);
6641
6642 return err;
6643 }
6644
6645 /**
6646 * i40e_config_rss - Prepare for RSS if used
6647 * @pf: board private structure
6648 **/
6649 static int i40e_config_rss(struct i40e_pf *pf)
6650 {
6651 /* Set of random keys generated using kernel random number generator */
6652 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6653 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6654 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6655 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6656 struct i40e_hw *hw = &pf->hw;
6657 u32 lut = 0;
6658 int i, j;
6659 u64 hena;
6660 u32 reg_val;
6661
6662 /* Fill out hash function seed */
6663 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6664 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6665
6666 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6667 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6668 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6669 hena |= I40E_DEFAULT_RSS_HENA;
6670 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6671 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6672
6673 /* Check capability and Set table size and register per hw expectation*/
6674 reg_val = rd32(hw, I40E_PFQF_CTL_0);
6675 if (hw->func_caps.rss_table_size == 512) {
6676 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6677 pf->rss_table_size = 512;
6678 } else {
6679 pf->rss_table_size = 128;
6680 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
6681 }
6682 wr32(hw, I40E_PFQF_CTL_0, reg_val);
6683
6684 /* Populate the LUT with max no. of queues in round robin fashion */
6685 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
6686
6687 /* The assumption is that lan qp count will be the highest
6688 * qp count for any PF VSI that needs RSS.
6689 * If multiple VSIs need RSS support, all the qp counts
6690 * for those VSIs should be a power of 2 for RSS to work.
6691 * If LAN VSI is the only consumer for RSS then this requirement
6692 * is not necessary.
6693 */
6694 if (j == pf->rss_size)
6695 j = 0;
6696 /* lut = 4-byte sliding window of 4 lut entries */
6697 lut = (lut << 8) | (j &
6698 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6699 /* On i = 3, we have 4 entries in lut; write to the register */
6700 if ((i & 3) == 3)
6701 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6702 }
6703 i40e_flush(hw);
6704
6705 return 0;
6706 }
6707
6708 /**
6709 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6710 * @pf: board private structure
6711 * @queue_count: the requested queue count for rss.
6712 *
6713 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6714 * count which may be different from the requested queue count.
6715 **/
6716 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6717 {
6718 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6719 return 0;
6720
6721 queue_count = min_t(int, queue_count, pf->rss_size_max);
6722
6723 if (queue_count != pf->rss_size) {
6724 i40e_prep_for_reset(pf);
6725
6726 pf->rss_size = queue_count;
6727
6728 i40e_reset_and_rebuild(pf, true);
6729 i40e_config_rss(pf);
6730 }
6731 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6732 return pf->rss_size;
6733 }
6734
6735 /**
6736 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6737 * @pf: board private structure to initialize
6738 *
6739 * i40e_sw_init initializes the Adapter private data structure.
6740 * Fields are initialized based on PCI device information and
6741 * OS network device settings (MTU size).
6742 **/
6743 static int i40e_sw_init(struct i40e_pf *pf)
6744 {
6745 int err = 0;
6746 int size;
6747
6748 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6749 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6750 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6751 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6752 if (I40E_DEBUG_USER & debug)
6753 pf->hw.debug_mask = debug;
6754 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6755 I40E_DEFAULT_MSG_ENABLE);
6756 }
6757
6758 /* Set default capability flags */
6759 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6760 I40E_FLAG_MSI_ENABLED |
6761 I40E_FLAG_MSIX_ENABLED |
6762 I40E_FLAG_RX_1BUF_ENABLED;
6763
6764 /* Set default ITR */
6765 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
6766 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
6767
6768 /* Depending on PF configurations, it is possible that the RSS
6769 * maximum might end up larger than the available queues
6770 */
6771 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6772 pf->rss_size_max = min_t(int, pf->rss_size_max,
6773 pf->hw.func_caps.num_tx_qp);
6774 if (pf->hw.func_caps.rss) {
6775 pf->flags |= I40E_FLAG_RSS_ENABLED;
6776 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6777 } else {
6778 pf->rss_size = 1;
6779 }
6780
6781 /* MFP mode enabled */
6782 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6783 pf->flags |= I40E_FLAG_MFP_ENABLED;
6784 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6785 }
6786
6787 /* FW/NVM is not yet fixed in this regard */
6788 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6789 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6790 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6791 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6792 /* Setup a counter for fd_atr per pf */
6793 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
6794 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6795 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6796 /* Setup a counter for fd_sb per pf */
6797 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
6798 } else {
6799 dev_info(&pf->pdev->dev,
6800 "Flow Director Sideband mode Disabled in MFP mode\n");
6801 }
6802 pf->fdir_pf_filter_count =
6803 pf->hw.func_caps.fd_filters_guaranteed;
6804 pf->hw.fdir_shared_filter_count =
6805 pf->hw.func_caps.fd_filters_best_effort;
6806 }
6807
6808 if (pf->hw.func_caps.vmdq) {
6809 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6810 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6811 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6812 }
6813
6814 #ifdef CONFIG_PCI_IOV
6815 if (pf->hw.func_caps.num_vfs) {
6816 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6817 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6818 pf->num_req_vfs = min_t(int,
6819 pf->hw.func_caps.num_vfs,
6820 I40E_MAX_VF_COUNT);
6821 }
6822 #endif /* CONFIG_PCI_IOV */
6823 pf->eeprom_version = 0xDEAD;
6824 pf->lan_veb = I40E_NO_VEB;
6825 pf->lan_vsi = I40E_NO_VSI;
6826
6827 /* set up queue assignment tracking */
6828 size = sizeof(struct i40e_lump_tracking)
6829 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6830 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6831 if (!pf->qp_pile) {
6832 err = -ENOMEM;
6833 goto sw_init_done;
6834 }
6835 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6836 pf->qp_pile->search_hint = 0;
6837
6838 /* set up vector assignment tracking */
6839 size = sizeof(struct i40e_lump_tracking)
6840 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6841 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6842 if (!pf->irq_pile) {
6843 kfree(pf->qp_pile);
6844 err = -ENOMEM;
6845 goto sw_init_done;
6846 }
6847 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6848 pf->irq_pile->search_hint = 0;
6849
6850 pf->tx_timeout_recovery_level = 1;
6851
6852 mutex_init(&pf->switch_mutex);
6853
6854 sw_init_done:
6855 return err;
6856 }
6857
6858 /**
6859 * i40e_set_ntuple - set the ntuple feature flag and take action
6860 * @pf: board private structure to initialize
6861 * @features: the feature set that the stack is suggesting
6862 *
6863 * returns a bool to indicate if reset needs to happen
6864 **/
6865 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6866 {
6867 bool need_reset = false;
6868
6869 /* Check if Flow Director n-tuple support was enabled or disabled. If
6870 * the state changed, we need to reset.
6871 */
6872 if (features & NETIF_F_NTUPLE) {
6873 /* Enable filters and mark for reset */
6874 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6875 need_reset = true;
6876 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6877 } else {
6878 /* turn off filters, mark for reset and clear SW filter list */
6879 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6880 need_reset = true;
6881 i40e_fdir_filter_exit(pf);
6882 }
6883 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6884 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
6885 /* if ATR was auto disabled it can be re-enabled. */
6886 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
6887 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
6888 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6889 }
6890 return need_reset;
6891 }
6892
6893 /**
6894 * i40e_set_features - set the netdev feature flags
6895 * @netdev: ptr to the netdev being adjusted
6896 * @features: the feature set that the stack is suggesting
6897 **/
6898 static int i40e_set_features(struct net_device *netdev,
6899 netdev_features_t features)
6900 {
6901 struct i40e_netdev_priv *np = netdev_priv(netdev);
6902 struct i40e_vsi *vsi = np->vsi;
6903 struct i40e_pf *pf = vsi->back;
6904 bool need_reset;
6905
6906 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6907 i40e_vlan_stripping_enable(vsi);
6908 else
6909 i40e_vlan_stripping_disable(vsi);
6910
6911 need_reset = i40e_set_ntuple(pf, features);
6912
6913 if (need_reset)
6914 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6915
6916 return 0;
6917 }
6918
6919 #ifdef CONFIG_I40E_VXLAN
6920 /**
6921 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6922 * @pf: board private structure
6923 * @port: The UDP port to look up
6924 *
6925 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6926 **/
6927 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6928 {
6929 u8 i;
6930
6931 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6932 if (pf->vxlan_ports[i] == port)
6933 return i;
6934 }
6935
6936 return i;
6937 }
6938
6939 /**
6940 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6941 * @netdev: This physical port's netdev
6942 * @sa_family: Socket Family that VXLAN is notifying us about
6943 * @port: New UDP port number that VXLAN started listening to
6944 **/
6945 static void i40e_add_vxlan_port(struct net_device *netdev,
6946 sa_family_t sa_family, __be16 port)
6947 {
6948 struct i40e_netdev_priv *np = netdev_priv(netdev);
6949 struct i40e_vsi *vsi = np->vsi;
6950 struct i40e_pf *pf = vsi->back;
6951 u8 next_idx;
6952 u8 idx;
6953
6954 if (sa_family == AF_INET6)
6955 return;
6956
6957 idx = i40e_get_vxlan_port_idx(pf, port);
6958
6959 /* Check if port already exists */
6960 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6961 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6962 return;
6963 }
6964
6965 /* Now check if there is space to add the new port */
6966 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6967
6968 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6969 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6970 ntohs(port));
6971 return;
6972 }
6973
6974 /* New port: add it and mark its index in the bitmap */
6975 pf->vxlan_ports[next_idx] = port;
6976 pf->pending_vxlan_bitmap |= (1 << next_idx);
6977
6978 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6979 }
6980
6981 /**
6982 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6983 * @netdev: This physical port's netdev
6984 * @sa_family: Socket Family that VXLAN is notifying us about
6985 * @port: UDP port number that VXLAN stopped listening to
6986 **/
6987 static void i40e_del_vxlan_port(struct net_device *netdev,
6988 sa_family_t sa_family, __be16 port)
6989 {
6990 struct i40e_netdev_priv *np = netdev_priv(netdev);
6991 struct i40e_vsi *vsi = np->vsi;
6992 struct i40e_pf *pf = vsi->back;
6993 u8 idx;
6994
6995 if (sa_family == AF_INET6)
6996 return;
6997
6998 idx = i40e_get_vxlan_port_idx(pf, port);
6999
7000 /* Check if port already exists */
7001 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7002 /* if port exists, set it to 0 (mark for deletion)
7003 * and make it pending
7004 */
7005 pf->vxlan_ports[idx] = 0;
7006
7007 pf->pending_vxlan_bitmap |= (1 << idx);
7008
7009 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7010 } else {
7011 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7012 ntohs(port));
7013 }
7014 }
7015
7016 #endif
7017 #ifdef HAVE_FDB_OPS
7018 #ifdef USE_CONST_DEV_UC_CHAR
7019 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7020 struct net_device *dev,
7021 const unsigned char *addr,
7022 u16 flags)
7023 #else
7024 static int i40e_ndo_fdb_add(struct ndmsg *ndm,
7025 struct net_device *dev,
7026 unsigned char *addr,
7027 u16 flags)
7028 #endif
7029 {
7030 struct i40e_netdev_priv *np = netdev_priv(dev);
7031 struct i40e_pf *pf = np->vsi->back;
7032 int err = 0;
7033
7034 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7035 return -EOPNOTSUPP;
7036
7037 /* Hardware does not support aging addresses so if a
7038 * ndm_state is given only allow permanent addresses
7039 */
7040 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7041 netdev_info(dev, "FDB only supports static addresses\n");
7042 return -EINVAL;
7043 }
7044
7045 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7046 err = dev_uc_add_excl(dev, addr);
7047 else if (is_multicast_ether_addr(addr))
7048 err = dev_mc_add_excl(dev, addr);
7049 else
7050 err = -EINVAL;
7051
7052 /* Only return duplicate errors if NLM_F_EXCL is set */
7053 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7054 err = 0;
7055
7056 return err;
7057 }
7058
7059 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7060 #ifdef USE_CONST_DEV_UC_CHAR
7061 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7062 struct net_device *dev,
7063 const unsigned char *addr)
7064 #else
7065 static int i40e_ndo_fdb_del(struct ndmsg *ndm,
7066 struct net_device *dev,
7067 unsigned char *addr)
7068 #endif
7069 {
7070 struct i40e_netdev_priv *np = netdev_priv(dev);
7071 struct i40e_pf *pf = np->vsi->back;
7072 int err = -EOPNOTSUPP;
7073
7074 if (ndm->ndm_state & NUD_PERMANENT) {
7075 netdev_info(dev, "FDB only supports static addresses\n");
7076 return -EINVAL;
7077 }
7078
7079 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
7080 if (is_unicast_ether_addr(addr))
7081 err = dev_uc_del(dev, addr);
7082 else if (is_multicast_ether_addr(addr))
7083 err = dev_mc_del(dev, addr);
7084 else
7085 err = -EINVAL;
7086 }
7087
7088 return err;
7089 }
7090
7091 static int i40e_ndo_fdb_dump(struct sk_buff *skb,
7092 struct netlink_callback *cb,
7093 struct net_device *dev,
7094 int idx)
7095 {
7096 struct i40e_netdev_priv *np = netdev_priv(dev);
7097 struct i40e_pf *pf = np->vsi->back;
7098
7099 if (pf->flags & I40E_FLAG_SRIOV_ENABLED)
7100 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
7101
7102 return idx;
7103 }
7104
7105 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
7106 #endif /* HAVE_FDB_OPS */
7107 static const struct net_device_ops i40e_netdev_ops = {
7108 .ndo_open = i40e_open,
7109 .ndo_stop = i40e_close,
7110 .ndo_start_xmit = i40e_lan_xmit_frame,
7111 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7112 .ndo_set_rx_mode = i40e_set_rx_mode,
7113 .ndo_validate_addr = eth_validate_addr,
7114 .ndo_set_mac_address = i40e_set_mac,
7115 .ndo_change_mtu = i40e_change_mtu,
7116 .ndo_do_ioctl = i40e_ioctl,
7117 .ndo_tx_timeout = i40e_tx_timeout,
7118 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7119 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7120 #ifdef CONFIG_NET_POLL_CONTROLLER
7121 .ndo_poll_controller = i40e_netpoll,
7122 #endif
7123 .ndo_setup_tc = i40e_setup_tc,
7124 .ndo_set_features = i40e_set_features,
7125 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7126 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7127 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7128 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7129 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7130 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofck,
7131 #ifdef CONFIG_I40E_VXLAN
7132 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7133 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7134 #endif
7135 #ifdef HAVE_FDB_OPS
7136 .ndo_fdb_add = i40e_ndo_fdb_add,
7137 #ifndef USE_DEFAULT_FDB_DEL_DUMP
7138 .ndo_fdb_del = i40e_ndo_fdb_del,
7139 .ndo_fdb_dump = i40e_ndo_fdb_dump,
7140 #endif
7141 #endif
7142 };
7143
7144 /**
7145 * i40e_config_netdev - Setup the netdev flags
7146 * @vsi: the VSI being configured
7147 *
7148 * Returns 0 on success, negative value on failure
7149 **/
7150 static int i40e_config_netdev(struct i40e_vsi *vsi)
7151 {
7152 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7153 struct i40e_pf *pf = vsi->back;
7154 struct i40e_hw *hw = &pf->hw;
7155 struct i40e_netdev_priv *np;
7156 struct net_device *netdev;
7157 u8 mac_addr[ETH_ALEN];
7158 int etherdev_size;
7159
7160 etherdev_size = sizeof(struct i40e_netdev_priv);
7161 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7162 if (!netdev)
7163 return -ENOMEM;
7164
7165 vsi->netdev = netdev;
7166 np = netdev_priv(netdev);
7167 np->vsi = vsi;
7168
7169 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7170 NETIF_F_GSO_UDP_TUNNEL |
7171 NETIF_F_TSO;
7172
7173 netdev->features = NETIF_F_SG |
7174 NETIF_F_IP_CSUM |
7175 NETIF_F_SCTP_CSUM |
7176 NETIF_F_HIGHDMA |
7177 NETIF_F_GSO_UDP_TUNNEL |
7178 NETIF_F_HW_VLAN_CTAG_TX |
7179 NETIF_F_HW_VLAN_CTAG_RX |
7180 NETIF_F_HW_VLAN_CTAG_FILTER |
7181 NETIF_F_IPV6_CSUM |
7182 NETIF_F_TSO |
7183 NETIF_F_TSO_ECN |
7184 NETIF_F_TSO6 |
7185 NETIF_F_RXCSUM |
7186 NETIF_F_RXHASH |
7187 0;
7188
7189 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7190 netdev->features |= NETIF_F_NTUPLE;
7191
7192 /* copy netdev features into list of user selectable features */
7193 netdev->hw_features |= netdev->features;
7194
7195 if (vsi->type == I40E_VSI_MAIN) {
7196 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7197 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7198 /* The following two steps are necessary to prevent reception
7199 * of tagged packets - by default the NVM loads a MAC-VLAN
7200 * filter that will accept any tagged packet. This is to
7201 * prevent that during normal operations until a specific
7202 * VLAN tag filter has been set.
7203 */
7204 i40e_rm_default_mac_filter(vsi, mac_addr);
7205 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
7206 } else {
7207 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7208 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7209 pf->vsi[pf->lan_vsi]->netdev->name);
7210 random_ether_addr(mac_addr);
7211 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
7212 }
7213 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
7214
7215 ether_addr_copy(netdev->dev_addr, mac_addr);
7216 ether_addr_copy(netdev->perm_addr, mac_addr);
7217 /* vlan gets same features (except vlan offload)
7218 * after any tweaks for specific VSI types
7219 */
7220 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
7221 NETIF_F_HW_VLAN_CTAG_RX |
7222 NETIF_F_HW_VLAN_CTAG_FILTER);
7223 netdev->priv_flags |= IFF_UNICAST_FLT;
7224 netdev->priv_flags |= IFF_SUPP_NOFCS;
7225 /* Setup netdev TC information */
7226 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
7227
7228 netdev->netdev_ops = &i40e_netdev_ops;
7229 netdev->watchdog_timeo = 5 * HZ;
7230 i40e_set_ethtool_ops(netdev);
7231
7232 return 0;
7233 }
7234
7235 /**
7236 * i40e_vsi_delete - Delete a VSI from the switch
7237 * @vsi: the VSI being removed
7238 *
7239 * Returns 0 on success, negative value on failure
7240 **/
7241 static void i40e_vsi_delete(struct i40e_vsi *vsi)
7242 {
7243 /* remove default VSI is not allowed */
7244 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
7245 return;
7246
7247 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
7248 }
7249
7250 /**
7251 * i40e_add_vsi - Add a VSI to the switch
7252 * @vsi: the VSI being configured
7253 *
7254 * This initializes a VSI context depending on the VSI type to be added and
7255 * passes it down to the add_vsi aq command.
7256 **/
7257 static int i40e_add_vsi(struct i40e_vsi *vsi)
7258 {
7259 int ret = -ENODEV;
7260 struct i40e_mac_filter *f, *ftmp;
7261 struct i40e_pf *pf = vsi->back;
7262 struct i40e_hw *hw = &pf->hw;
7263 struct i40e_vsi_context ctxt;
7264 u8 enabled_tc = 0x1; /* TC0 enabled */
7265 int f_count = 0;
7266
7267 memset(&ctxt, 0, sizeof(ctxt));
7268 switch (vsi->type) {
7269 case I40E_VSI_MAIN:
7270 /* The PF's main VSI is already setup as part of the
7271 * device initialization, so we'll not bother with
7272 * the add_vsi call, but we will retrieve the current
7273 * VSI context.
7274 */
7275 ctxt.seid = pf->main_vsi_seid;
7276 ctxt.pf_num = pf->hw.pf_id;
7277 ctxt.vf_num = 0;
7278 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
7279 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7280 if (ret) {
7281 dev_info(&pf->pdev->dev,
7282 "couldn't get pf vsi config, err %d, aq_err %d\n",
7283 ret, pf->hw.aq.asq_last_status);
7284 return -ENOENT;
7285 }
7286 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7287 vsi->info.valid_sections = 0;
7288
7289 vsi->seid = ctxt.seid;
7290 vsi->id = ctxt.vsi_number;
7291
7292 enabled_tc = i40e_pf_get_tc_map(pf);
7293
7294 /* MFP mode setup queue map and update VSI */
7295 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
7296 memset(&ctxt, 0, sizeof(ctxt));
7297 ctxt.seid = pf->main_vsi_seid;
7298 ctxt.pf_num = pf->hw.pf_id;
7299 ctxt.vf_num = 0;
7300 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
7301 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7302 if (ret) {
7303 dev_info(&pf->pdev->dev,
7304 "update vsi failed, aq_err=%d\n",
7305 pf->hw.aq.asq_last_status);
7306 ret = -ENOENT;
7307 goto err;
7308 }
7309 /* update the local VSI info queue map */
7310 i40e_vsi_update_queue_map(vsi, &ctxt);
7311 vsi->info.valid_sections = 0;
7312 } else {
7313 /* Default/Main VSI is only enabled for TC0
7314 * reconfigure it to enable all TCs that are
7315 * available on the port in SFP mode.
7316 */
7317 ret = i40e_vsi_config_tc(vsi, enabled_tc);
7318 if (ret) {
7319 dev_info(&pf->pdev->dev,
7320 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
7321 enabled_tc, ret,
7322 pf->hw.aq.asq_last_status);
7323 ret = -ENOENT;
7324 }
7325 }
7326 break;
7327
7328 case I40E_VSI_FDIR:
7329 ctxt.pf_num = hw->pf_id;
7330 ctxt.vf_num = 0;
7331 ctxt.uplink_seid = vsi->uplink_seid;
7332 ctxt.connection_type = 0x1; /* regular data port */
7333 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
7334 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7335 break;
7336
7337 case I40E_VSI_VMDQ2:
7338 ctxt.pf_num = hw->pf_id;
7339 ctxt.vf_num = 0;
7340 ctxt.uplink_seid = vsi->uplink_seid;
7341 ctxt.connection_type = 0x1; /* regular data port */
7342 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
7343
7344 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7345
7346 /* This VSI is connected to VEB so the switch_id
7347 * should be set to zero by default.
7348 */
7349 ctxt.info.switch_id = 0;
7350 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
7351 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7352
7353 /* Setup the VSI tx/rx queue map for TC0 only for now */
7354 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7355 break;
7356
7357 case I40E_VSI_SRIOV:
7358 ctxt.pf_num = hw->pf_id;
7359 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
7360 ctxt.uplink_seid = vsi->uplink_seid;
7361 ctxt.connection_type = 0x1; /* regular data port */
7362 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
7363
7364 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
7365
7366 /* This VSI is connected to VEB so the switch_id
7367 * should be set to zero by default.
7368 */
7369 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
7370
7371 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
7372 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
7373 if (pf->vf[vsi->vf_id].spoofchk) {
7374 ctxt.info.valid_sections |=
7375 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
7376 ctxt.info.sec_flags |=
7377 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
7378 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
7379 }
7380 /* Setup the VSI tx/rx queue map for TC0 only for now */
7381 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
7382 break;
7383
7384 default:
7385 return -ENODEV;
7386 }
7387
7388 if (vsi->type != I40E_VSI_MAIN) {
7389 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
7390 if (ret) {
7391 dev_info(&vsi->back->pdev->dev,
7392 "add vsi failed, aq_err=%d\n",
7393 vsi->back->hw.aq.asq_last_status);
7394 ret = -ENOENT;
7395 goto err;
7396 }
7397 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
7398 vsi->info.valid_sections = 0;
7399 vsi->seid = ctxt.seid;
7400 vsi->id = ctxt.vsi_number;
7401 }
7402
7403 /* If macvlan filters already exist, force them to get loaded */
7404 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
7405 f->changed = true;
7406 f_count++;
7407
7408 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
7409 i40e_aq_mac_address_write(&vsi->back->hw,
7410 I40E_AQC_WRITE_TYPE_LAA_WOL,
7411 f->macaddr, NULL);
7412 }
7413 }
7414 if (f_count) {
7415 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
7416 pf->flags |= I40E_FLAG_FILTER_SYNC;
7417 }
7418
7419 /* Update VSI BW information */
7420 ret = i40e_vsi_get_bw_info(vsi);
7421 if (ret) {
7422 dev_info(&pf->pdev->dev,
7423 "couldn't get vsi bw info, err %d, aq_err %d\n",
7424 ret, pf->hw.aq.asq_last_status);
7425 /* VSI is already added so not tearing that up */
7426 ret = 0;
7427 }
7428
7429 err:
7430 return ret;
7431 }
7432
7433 /**
7434 * i40e_vsi_release - Delete a VSI and free its resources
7435 * @vsi: the VSI being removed
7436 *
7437 * Returns 0 on success or < 0 on error
7438 **/
7439 int i40e_vsi_release(struct i40e_vsi *vsi)
7440 {
7441 struct i40e_mac_filter *f, *ftmp;
7442 struct i40e_veb *veb = NULL;
7443 struct i40e_pf *pf;
7444 u16 uplink_seid;
7445 int i, n;
7446
7447 pf = vsi->back;
7448
7449 /* release of a VEB-owner or last VSI is not allowed */
7450 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
7451 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
7452 vsi->seid, vsi->uplink_seid);
7453 return -ENODEV;
7454 }
7455 if (vsi == pf->vsi[pf->lan_vsi] &&
7456 !test_bit(__I40E_DOWN, &pf->state)) {
7457 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
7458 return -ENODEV;
7459 }
7460
7461 uplink_seid = vsi->uplink_seid;
7462 if (vsi->type != I40E_VSI_SRIOV) {
7463 if (vsi->netdev_registered) {
7464 vsi->netdev_registered = false;
7465 if (vsi->netdev) {
7466 /* results in a call to i40e_close() */
7467 unregister_netdev(vsi->netdev);
7468 }
7469 } else {
7470 i40e_vsi_close(vsi);
7471 }
7472 i40e_vsi_disable_irq(vsi);
7473 }
7474
7475 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
7476 i40e_del_filter(vsi, f->macaddr, f->vlan,
7477 f->is_vf, f->is_netdev);
7478 i40e_sync_vsi_filters(vsi);
7479
7480 i40e_vsi_delete(vsi);
7481 i40e_vsi_free_q_vectors(vsi);
7482 if (vsi->netdev) {
7483 free_netdev(vsi->netdev);
7484 vsi->netdev = NULL;
7485 }
7486 i40e_vsi_clear_rings(vsi);
7487 i40e_vsi_clear(vsi);
7488
7489 /* If this was the last thing on the VEB, except for the
7490 * controlling VSI, remove the VEB, which puts the controlling
7491 * VSI onto the next level down in the switch.
7492 *
7493 * Well, okay, there's one more exception here: don't remove
7494 * the orphan VEBs yet. We'll wait for an explicit remove request
7495 * from up the network stack.
7496 */
7497 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
7498 if (pf->vsi[i] &&
7499 pf->vsi[i]->uplink_seid == uplink_seid &&
7500 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7501 n++; /* count the VSIs */
7502 }
7503 }
7504 for (i = 0; i < I40E_MAX_VEB; i++) {
7505 if (!pf->veb[i])
7506 continue;
7507 if (pf->veb[i]->uplink_seid == uplink_seid)
7508 n++; /* count the VEBs */
7509 if (pf->veb[i]->seid == uplink_seid)
7510 veb = pf->veb[i];
7511 }
7512 if (n == 0 && veb && veb->uplink_seid != 0)
7513 i40e_veb_release(veb);
7514
7515 return 0;
7516 }
7517
7518 /**
7519 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7520 * @vsi: ptr to the VSI
7521 *
7522 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7523 * corresponding SW VSI structure and initializes num_queue_pairs for the
7524 * newly allocated VSI.
7525 *
7526 * Returns 0 on success or negative on failure
7527 **/
7528 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7529 {
7530 int ret = -ENOENT;
7531 struct i40e_pf *pf = vsi->back;
7532
7533 if (vsi->q_vectors[0]) {
7534 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7535 vsi->seid);
7536 return -EEXIST;
7537 }
7538
7539 if (vsi->base_vector) {
7540 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7541 vsi->seid, vsi->base_vector);
7542 return -EEXIST;
7543 }
7544
7545 ret = i40e_vsi_alloc_q_vectors(vsi);
7546 if (ret) {
7547 dev_info(&pf->pdev->dev,
7548 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7549 vsi->num_q_vectors, vsi->seid, ret);
7550 vsi->num_q_vectors = 0;
7551 goto vector_setup_out;
7552 }
7553
7554 if (vsi->num_q_vectors)
7555 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7556 vsi->num_q_vectors, vsi->idx);
7557 if (vsi->base_vector < 0) {
7558 dev_info(&pf->pdev->dev,
7559 "failed to get queue tracking for VSI %d, err=%d\n",
7560 vsi->seid, vsi->base_vector);
7561 i40e_vsi_free_q_vectors(vsi);
7562 ret = -ENOENT;
7563 goto vector_setup_out;
7564 }
7565
7566 vector_setup_out:
7567 return ret;
7568 }
7569
7570 /**
7571 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7572 * @vsi: pointer to the vsi.
7573 *
7574 * This re-allocates a vsi's queue resources.
7575 *
7576 * Returns pointer to the successfully allocated and configured VSI sw struct
7577 * on success, otherwise returns NULL on failure.
7578 **/
7579 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7580 {
7581 struct i40e_pf *pf = vsi->back;
7582 u8 enabled_tc;
7583 int ret;
7584
7585 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7586 i40e_vsi_clear_rings(vsi);
7587
7588 i40e_vsi_free_arrays(vsi, false);
7589 i40e_set_num_rings_in_vsi(vsi);
7590 ret = i40e_vsi_alloc_arrays(vsi, false);
7591 if (ret)
7592 goto err_vsi;
7593
7594 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7595 if (ret < 0) {
7596 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7597 vsi->seid, ret);
7598 goto err_vsi;
7599 }
7600 vsi->base_queue = ret;
7601
7602 /* Update the FW view of the VSI. Force a reset of TC and queue
7603 * layout configurations.
7604 */
7605 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7606 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7607 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7608 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7609
7610 /* assign it some queues */
7611 ret = i40e_alloc_rings(vsi);
7612 if (ret)
7613 goto err_rings;
7614
7615 /* map all of the rings to the q_vectors */
7616 i40e_vsi_map_rings_to_vectors(vsi);
7617 return vsi;
7618
7619 err_rings:
7620 i40e_vsi_free_q_vectors(vsi);
7621 if (vsi->netdev_registered) {
7622 vsi->netdev_registered = false;
7623 unregister_netdev(vsi->netdev);
7624 free_netdev(vsi->netdev);
7625 vsi->netdev = NULL;
7626 }
7627 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7628 err_vsi:
7629 i40e_vsi_clear(vsi);
7630 return NULL;
7631 }
7632
7633 /**
7634 * i40e_vsi_setup - Set up a VSI by a given type
7635 * @pf: board private structure
7636 * @type: VSI type
7637 * @uplink_seid: the switch element to link to
7638 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7639 *
7640 * This allocates the sw VSI structure and its queue resources, then add a VSI
7641 * to the identified VEB.
7642 *
7643 * Returns pointer to the successfully allocated and configure VSI sw struct on
7644 * success, otherwise returns NULL on failure.
7645 **/
7646 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7647 u16 uplink_seid, u32 param1)
7648 {
7649 struct i40e_vsi *vsi = NULL;
7650 struct i40e_veb *veb = NULL;
7651 int ret, i;
7652 int v_idx;
7653
7654 /* The requested uplink_seid must be either
7655 * - the PF's port seid
7656 * no VEB is needed because this is the PF
7657 * or this is a Flow Director special case VSI
7658 * - seid of an existing VEB
7659 * - seid of a VSI that owns an existing VEB
7660 * - seid of a VSI that doesn't own a VEB
7661 * a new VEB is created and the VSI becomes the owner
7662 * - seid of the PF VSI, which is what creates the first VEB
7663 * this is a special case of the previous
7664 *
7665 * Find which uplink_seid we were given and create a new VEB if needed
7666 */
7667 for (i = 0; i < I40E_MAX_VEB; i++) {
7668 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7669 veb = pf->veb[i];
7670 break;
7671 }
7672 }
7673
7674 if (!veb && uplink_seid != pf->mac_seid) {
7675
7676 for (i = 0; i < pf->num_alloc_vsi; i++) {
7677 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7678 vsi = pf->vsi[i];
7679 break;
7680 }
7681 }
7682 if (!vsi) {
7683 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7684 uplink_seid);
7685 return NULL;
7686 }
7687
7688 if (vsi->uplink_seid == pf->mac_seid)
7689 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7690 vsi->tc_config.enabled_tc);
7691 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7692 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7693 vsi->tc_config.enabled_tc);
7694
7695 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7696 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7697 veb = pf->veb[i];
7698 }
7699 if (!veb) {
7700 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7701 return NULL;
7702 }
7703
7704 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7705 uplink_seid = veb->seid;
7706 }
7707
7708 /* get vsi sw struct */
7709 v_idx = i40e_vsi_mem_alloc(pf, type);
7710 if (v_idx < 0)
7711 goto err_alloc;
7712 vsi = pf->vsi[v_idx];
7713 if (!vsi)
7714 goto err_alloc;
7715 vsi->type = type;
7716 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7717
7718 if (type == I40E_VSI_MAIN)
7719 pf->lan_vsi = v_idx;
7720 else if (type == I40E_VSI_SRIOV)
7721 vsi->vf_id = param1;
7722 /* assign it some queues */
7723 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7724 vsi->idx);
7725 if (ret < 0) {
7726 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7727 vsi->seid, ret);
7728 goto err_vsi;
7729 }
7730 vsi->base_queue = ret;
7731
7732 /* get a VSI from the hardware */
7733 vsi->uplink_seid = uplink_seid;
7734 ret = i40e_add_vsi(vsi);
7735 if (ret)
7736 goto err_vsi;
7737
7738 switch (vsi->type) {
7739 /* setup the netdev if needed */
7740 case I40E_VSI_MAIN:
7741 case I40E_VSI_VMDQ2:
7742 ret = i40e_config_netdev(vsi);
7743 if (ret)
7744 goto err_netdev;
7745 ret = register_netdev(vsi->netdev);
7746 if (ret)
7747 goto err_netdev;
7748 vsi->netdev_registered = true;
7749 netif_carrier_off(vsi->netdev);
7750 #ifdef CONFIG_I40E_DCB
7751 /* Setup DCB netlink interface */
7752 i40e_dcbnl_setup(vsi);
7753 #endif /* CONFIG_I40E_DCB */
7754 /* fall through */
7755
7756 case I40E_VSI_FDIR:
7757 /* set up vectors and rings if needed */
7758 ret = i40e_vsi_setup_vectors(vsi);
7759 if (ret)
7760 goto err_msix;
7761
7762 ret = i40e_alloc_rings(vsi);
7763 if (ret)
7764 goto err_rings;
7765
7766 /* map all of the rings to the q_vectors */
7767 i40e_vsi_map_rings_to_vectors(vsi);
7768
7769 i40e_vsi_reset_stats(vsi);
7770 break;
7771
7772 default:
7773 /* no netdev or rings for the other VSI types */
7774 break;
7775 }
7776
7777 return vsi;
7778
7779 err_rings:
7780 i40e_vsi_free_q_vectors(vsi);
7781 err_msix:
7782 if (vsi->netdev_registered) {
7783 vsi->netdev_registered = false;
7784 unregister_netdev(vsi->netdev);
7785 free_netdev(vsi->netdev);
7786 vsi->netdev = NULL;
7787 }
7788 err_netdev:
7789 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7790 err_vsi:
7791 i40e_vsi_clear(vsi);
7792 err_alloc:
7793 return NULL;
7794 }
7795
7796 /**
7797 * i40e_veb_get_bw_info - Query VEB BW information
7798 * @veb: the veb to query
7799 *
7800 * Query the Tx scheduler BW configuration data for given VEB
7801 **/
7802 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7803 {
7804 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7805 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7806 struct i40e_pf *pf = veb->pf;
7807 struct i40e_hw *hw = &pf->hw;
7808 u32 tc_bw_max;
7809 int ret = 0;
7810 int i;
7811
7812 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7813 &bw_data, NULL);
7814 if (ret) {
7815 dev_info(&pf->pdev->dev,
7816 "query veb bw config failed, aq_err=%d\n",
7817 hw->aq.asq_last_status);
7818 goto out;
7819 }
7820
7821 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7822 &ets_data, NULL);
7823 if (ret) {
7824 dev_info(&pf->pdev->dev,
7825 "query veb bw ets config failed, aq_err=%d\n",
7826 hw->aq.asq_last_status);
7827 goto out;
7828 }
7829
7830 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7831 veb->bw_max_quanta = ets_data.tc_bw_max;
7832 veb->is_abs_credits = bw_data.absolute_credits_enable;
7833 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7834 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7835 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7836 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7837 veb->bw_tc_limit_credits[i] =
7838 le16_to_cpu(bw_data.tc_bw_limits[i]);
7839 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7840 }
7841
7842 out:
7843 return ret;
7844 }
7845
7846 /**
7847 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7848 * @pf: board private structure
7849 *
7850 * On error: returns error code (negative)
7851 * On success: returns vsi index in PF (positive)
7852 **/
7853 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7854 {
7855 int ret = -ENOENT;
7856 struct i40e_veb *veb;
7857 int i;
7858
7859 /* Need to protect the allocation of switch elements at the PF level */
7860 mutex_lock(&pf->switch_mutex);
7861
7862 /* VEB list may be fragmented if VEB creation/destruction has
7863 * been happening. We can afford to do a quick scan to look
7864 * for any free slots in the list.
7865 *
7866 * find next empty veb slot, looping back around if necessary
7867 */
7868 i = 0;
7869 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7870 i++;
7871 if (i >= I40E_MAX_VEB) {
7872 ret = -ENOMEM;
7873 goto err_alloc_veb; /* out of VEB slots! */
7874 }
7875
7876 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7877 if (!veb) {
7878 ret = -ENOMEM;
7879 goto err_alloc_veb;
7880 }
7881 veb->pf = pf;
7882 veb->idx = i;
7883 veb->enabled_tc = 1;
7884
7885 pf->veb[i] = veb;
7886 ret = i;
7887 err_alloc_veb:
7888 mutex_unlock(&pf->switch_mutex);
7889 return ret;
7890 }
7891
7892 /**
7893 * i40e_switch_branch_release - Delete a branch of the switch tree
7894 * @branch: where to start deleting
7895 *
7896 * This uses recursion to find the tips of the branch to be
7897 * removed, deleting until we get back to and can delete this VEB.
7898 **/
7899 static void i40e_switch_branch_release(struct i40e_veb *branch)
7900 {
7901 struct i40e_pf *pf = branch->pf;
7902 u16 branch_seid = branch->seid;
7903 u16 veb_idx = branch->idx;
7904 int i;
7905
7906 /* release any VEBs on this VEB - RECURSION */
7907 for (i = 0; i < I40E_MAX_VEB; i++) {
7908 if (!pf->veb[i])
7909 continue;
7910 if (pf->veb[i]->uplink_seid == branch->seid)
7911 i40e_switch_branch_release(pf->veb[i]);
7912 }
7913
7914 /* Release the VSIs on this VEB, but not the owner VSI.
7915 *
7916 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7917 * the VEB itself, so don't use (*branch) after this loop.
7918 */
7919 for (i = 0; i < pf->num_alloc_vsi; i++) {
7920 if (!pf->vsi[i])
7921 continue;
7922 if (pf->vsi[i]->uplink_seid == branch_seid &&
7923 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7924 i40e_vsi_release(pf->vsi[i]);
7925 }
7926 }
7927
7928 /* There's one corner case where the VEB might not have been
7929 * removed, so double check it here and remove it if needed.
7930 * This case happens if the veb was created from the debugfs
7931 * commands and no VSIs were added to it.
7932 */
7933 if (pf->veb[veb_idx])
7934 i40e_veb_release(pf->veb[veb_idx]);
7935 }
7936
7937 /**
7938 * i40e_veb_clear - remove veb struct
7939 * @veb: the veb to remove
7940 **/
7941 static void i40e_veb_clear(struct i40e_veb *veb)
7942 {
7943 if (!veb)
7944 return;
7945
7946 if (veb->pf) {
7947 struct i40e_pf *pf = veb->pf;
7948
7949 mutex_lock(&pf->switch_mutex);
7950 if (pf->veb[veb->idx] == veb)
7951 pf->veb[veb->idx] = NULL;
7952 mutex_unlock(&pf->switch_mutex);
7953 }
7954
7955 kfree(veb);
7956 }
7957
7958 /**
7959 * i40e_veb_release - Delete a VEB and free its resources
7960 * @veb: the VEB being removed
7961 **/
7962 void i40e_veb_release(struct i40e_veb *veb)
7963 {
7964 struct i40e_vsi *vsi = NULL;
7965 struct i40e_pf *pf;
7966 int i, n = 0;
7967
7968 pf = veb->pf;
7969
7970 /* find the remaining VSI and check for extras */
7971 for (i = 0; i < pf->num_alloc_vsi; i++) {
7972 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7973 n++;
7974 vsi = pf->vsi[i];
7975 }
7976 }
7977 if (n != 1) {
7978 dev_info(&pf->pdev->dev,
7979 "can't remove VEB %d with %d VSIs left\n",
7980 veb->seid, n);
7981 return;
7982 }
7983
7984 /* move the remaining VSI to uplink veb */
7985 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7986 if (veb->uplink_seid) {
7987 vsi->uplink_seid = veb->uplink_seid;
7988 if (veb->uplink_seid == pf->mac_seid)
7989 vsi->veb_idx = I40E_NO_VEB;
7990 else
7991 vsi->veb_idx = veb->veb_idx;
7992 } else {
7993 /* floating VEB */
7994 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7995 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7996 }
7997
7998 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7999 i40e_veb_clear(veb);
8000 }
8001
8002 /**
8003 * i40e_add_veb - create the VEB in the switch
8004 * @veb: the VEB to be instantiated
8005 * @vsi: the controlling VSI
8006 **/
8007 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8008 {
8009 bool is_default = false;
8010 bool is_cloud = false;
8011 int ret;
8012
8013 /* get a VEB from the hardware */
8014 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8015 veb->enabled_tc, is_default,
8016 is_cloud, &veb->seid, NULL);
8017 if (ret) {
8018 dev_info(&veb->pf->pdev->dev,
8019 "couldn't add VEB, err %d, aq_err %d\n",
8020 ret, veb->pf->hw.aq.asq_last_status);
8021 return -EPERM;
8022 }
8023
8024 /* get statistics counter */
8025 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8026 &veb->stats_idx, NULL, NULL, NULL);
8027 if (ret) {
8028 dev_info(&veb->pf->pdev->dev,
8029 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8030 ret, veb->pf->hw.aq.asq_last_status);
8031 return -EPERM;
8032 }
8033 ret = i40e_veb_get_bw_info(veb);
8034 if (ret) {
8035 dev_info(&veb->pf->pdev->dev,
8036 "couldn't get VEB bw info, err %d, aq_err %d\n",
8037 ret, veb->pf->hw.aq.asq_last_status);
8038 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8039 return -ENOENT;
8040 }
8041
8042 vsi->uplink_seid = veb->seid;
8043 vsi->veb_idx = veb->idx;
8044 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8045
8046 return 0;
8047 }
8048
8049 /**
8050 * i40e_veb_setup - Set up a VEB
8051 * @pf: board private structure
8052 * @flags: VEB setup flags
8053 * @uplink_seid: the switch element to link to
8054 * @vsi_seid: the initial VSI seid
8055 * @enabled_tc: Enabled TC bit-map
8056 *
8057 * This allocates the sw VEB structure and links it into the switch
8058 * It is possible and legal for this to be a duplicate of an already
8059 * existing VEB. It is also possible for both uplink and vsi seids
8060 * to be zero, in order to create a floating VEB.
8061 *
8062 * Returns pointer to the successfully allocated VEB sw struct on
8063 * success, otherwise returns NULL on failure.
8064 **/
8065 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8066 u16 uplink_seid, u16 vsi_seid,
8067 u8 enabled_tc)
8068 {
8069 struct i40e_veb *veb, *uplink_veb = NULL;
8070 int vsi_idx, veb_idx;
8071 int ret;
8072
8073 /* if one seid is 0, the other must be 0 to create a floating relay */
8074 if ((uplink_seid == 0 || vsi_seid == 0) &&
8075 (uplink_seid + vsi_seid != 0)) {
8076 dev_info(&pf->pdev->dev,
8077 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8078 uplink_seid, vsi_seid);
8079 return NULL;
8080 }
8081
8082 /* make sure there is such a vsi and uplink */
8083 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8084 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8085 break;
8086 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8087 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8088 vsi_seid);
8089 return NULL;
8090 }
8091
8092 if (uplink_seid && uplink_seid != pf->mac_seid) {
8093 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8094 if (pf->veb[veb_idx] &&
8095 pf->veb[veb_idx]->seid == uplink_seid) {
8096 uplink_veb = pf->veb[veb_idx];
8097 break;
8098 }
8099 }
8100 if (!uplink_veb) {
8101 dev_info(&pf->pdev->dev,
8102 "uplink seid %d not found\n", uplink_seid);
8103 return NULL;
8104 }
8105 }
8106
8107 /* get veb sw struct */
8108 veb_idx = i40e_veb_mem_alloc(pf);
8109 if (veb_idx < 0)
8110 goto err_alloc;
8111 veb = pf->veb[veb_idx];
8112 veb->flags = flags;
8113 veb->uplink_seid = uplink_seid;
8114 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8115 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8116
8117 /* create the VEB in the switch */
8118 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8119 if (ret)
8120 goto err_veb;
8121 if (vsi_idx == pf->lan_vsi)
8122 pf->lan_veb = veb->idx;
8123
8124 return veb;
8125
8126 err_veb:
8127 i40e_veb_clear(veb);
8128 err_alloc:
8129 return NULL;
8130 }
8131
8132 /**
8133 * i40e_setup_pf_switch_element - set pf vars based on switch type
8134 * @pf: board private structure
8135 * @ele: element we are building info from
8136 * @num_reported: total number of elements
8137 * @printconfig: should we print the contents
8138 *
8139 * helper function to assist in extracting a few useful SEID values.
8140 **/
8141 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
8142 struct i40e_aqc_switch_config_element_resp *ele,
8143 u16 num_reported, bool printconfig)
8144 {
8145 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
8146 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
8147 u8 element_type = ele->element_type;
8148 u16 seid = le16_to_cpu(ele->seid);
8149
8150 if (printconfig)
8151 dev_info(&pf->pdev->dev,
8152 "type=%d seid=%d uplink=%d downlink=%d\n",
8153 element_type, seid, uplink_seid, downlink_seid);
8154
8155 switch (element_type) {
8156 case I40E_SWITCH_ELEMENT_TYPE_MAC:
8157 pf->mac_seid = seid;
8158 break;
8159 case I40E_SWITCH_ELEMENT_TYPE_VEB:
8160 /* Main VEB? */
8161 if (uplink_seid != pf->mac_seid)
8162 break;
8163 if (pf->lan_veb == I40E_NO_VEB) {
8164 int v;
8165
8166 /* find existing or else empty VEB */
8167 for (v = 0; v < I40E_MAX_VEB; v++) {
8168 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
8169 pf->lan_veb = v;
8170 break;
8171 }
8172 }
8173 if (pf->lan_veb == I40E_NO_VEB) {
8174 v = i40e_veb_mem_alloc(pf);
8175 if (v < 0)
8176 break;
8177 pf->lan_veb = v;
8178 }
8179 }
8180
8181 pf->veb[pf->lan_veb]->seid = seid;
8182 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
8183 pf->veb[pf->lan_veb]->pf = pf;
8184 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
8185 break;
8186 case I40E_SWITCH_ELEMENT_TYPE_VSI:
8187 if (num_reported != 1)
8188 break;
8189 /* This is immediately after a reset so we can assume this is
8190 * the PF's VSI
8191 */
8192 pf->mac_seid = uplink_seid;
8193 pf->pf_seid = downlink_seid;
8194 pf->main_vsi_seid = seid;
8195 if (printconfig)
8196 dev_info(&pf->pdev->dev,
8197 "pf_seid=%d main_vsi_seid=%d\n",
8198 pf->pf_seid, pf->main_vsi_seid);
8199 break;
8200 case I40E_SWITCH_ELEMENT_TYPE_PF:
8201 case I40E_SWITCH_ELEMENT_TYPE_VF:
8202 case I40E_SWITCH_ELEMENT_TYPE_EMP:
8203 case I40E_SWITCH_ELEMENT_TYPE_BMC:
8204 case I40E_SWITCH_ELEMENT_TYPE_PE:
8205 case I40E_SWITCH_ELEMENT_TYPE_PA:
8206 /* ignore these for now */
8207 break;
8208 default:
8209 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
8210 element_type, seid);
8211 break;
8212 }
8213 }
8214
8215 /**
8216 * i40e_fetch_switch_configuration - Get switch config from firmware
8217 * @pf: board private structure
8218 * @printconfig: should we print the contents
8219 *
8220 * Get the current switch configuration from the device and
8221 * extract a few useful SEID values.
8222 **/
8223 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
8224 {
8225 struct i40e_aqc_get_switch_config_resp *sw_config;
8226 u16 next_seid = 0;
8227 int ret = 0;
8228 u8 *aq_buf;
8229 int i;
8230
8231 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
8232 if (!aq_buf)
8233 return -ENOMEM;
8234
8235 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
8236 do {
8237 u16 num_reported, num_total;
8238
8239 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
8240 I40E_AQ_LARGE_BUF,
8241 &next_seid, NULL);
8242 if (ret) {
8243 dev_info(&pf->pdev->dev,
8244 "get switch config failed %d aq_err=%x\n",
8245 ret, pf->hw.aq.asq_last_status);
8246 kfree(aq_buf);
8247 return -ENOENT;
8248 }
8249
8250 num_reported = le16_to_cpu(sw_config->header.num_reported);
8251 num_total = le16_to_cpu(sw_config->header.num_total);
8252
8253 if (printconfig)
8254 dev_info(&pf->pdev->dev,
8255 "header: %d reported %d total\n",
8256 num_reported, num_total);
8257
8258 for (i = 0; i < num_reported; i++) {
8259 struct i40e_aqc_switch_config_element_resp *ele =
8260 &sw_config->element[i];
8261
8262 i40e_setup_pf_switch_element(pf, ele, num_reported,
8263 printconfig);
8264 }
8265 } while (next_seid != 0);
8266
8267 kfree(aq_buf);
8268 return ret;
8269 }
8270
8271 /**
8272 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
8273 * @pf: board private structure
8274 * @reinit: if the Main VSI needs to re-initialized.
8275 *
8276 * Returns 0 on success, negative value on failure
8277 **/
8278 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
8279 {
8280 u32 rxfc = 0, txfc = 0, rxfc_reg;
8281 int ret;
8282
8283 /* find out what's out there already */
8284 ret = i40e_fetch_switch_configuration(pf, false);
8285 if (ret) {
8286 dev_info(&pf->pdev->dev,
8287 "couldn't fetch switch config, err %d, aq_err %d\n",
8288 ret, pf->hw.aq.asq_last_status);
8289 return ret;
8290 }
8291 i40e_pf_reset_stats(pf);
8292
8293 /* first time setup */
8294 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
8295 struct i40e_vsi *vsi = NULL;
8296 u16 uplink_seid;
8297
8298 /* Set up the PF VSI associated with the PF's main VSI
8299 * that is already in the HW switch
8300 */
8301 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
8302 uplink_seid = pf->veb[pf->lan_veb]->seid;
8303 else
8304 uplink_seid = pf->mac_seid;
8305 if (pf->lan_vsi == I40E_NO_VSI)
8306 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
8307 else if (reinit)
8308 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
8309 if (!vsi) {
8310 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
8311 i40e_fdir_teardown(pf);
8312 return -EAGAIN;
8313 }
8314 } else {
8315 /* force a reset of TC and queue layout configurations */
8316 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8317 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8318 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8319 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8320 }
8321 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
8322
8323 i40e_fdir_sb_setup(pf);
8324
8325 /* Setup static PF queue filter control settings */
8326 ret = i40e_setup_pf_filter_control(pf);
8327 if (ret) {
8328 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
8329 ret);
8330 /* Failure here should not stop continuing other steps */
8331 }
8332
8333 /* enable RSS in the HW, even for only one queue, as the stack can use
8334 * the hash
8335 */
8336 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
8337 i40e_config_rss(pf);
8338
8339 /* fill in link information and enable LSE reporting */
8340 i40e_update_link_info(&pf->hw, true);
8341 i40e_link_event(pf);
8342
8343 /* Initialize user-specific link properties */
8344 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
8345 I40E_AQ_AN_COMPLETED) ? true : false);
8346 /* requested_mode is set in probe or by ethtool */
8347 if (!pf->fc_autoneg_status)
8348 goto no_autoneg;
8349
8350 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
8351 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
8352 pf->hw.fc.current_mode = I40E_FC_FULL;
8353 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
8354 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
8355 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
8356 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
8357 else
8358 pf->hw.fc.current_mode = I40E_FC_NONE;
8359
8360 /* sync the flow control settings with the auto-neg values */
8361 switch (pf->hw.fc.current_mode) {
8362 case I40E_FC_FULL:
8363 txfc = 1;
8364 rxfc = 1;
8365 break;
8366 case I40E_FC_TX_PAUSE:
8367 txfc = 1;
8368 rxfc = 0;
8369 break;
8370 case I40E_FC_RX_PAUSE:
8371 txfc = 0;
8372 rxfc = 1;
8373 break;
8374 case I40E_FC_NONE:
8375 case I40E_FC_DEFAULT:
8376 txfc = 0;
8377 rxfc = 0;
8378 break;
8379 case I40E_FC_PFC:
8380 /* TBD */
8381 break;
8382 /* no default case, we have to handle all possibilities here */
8383 }
8384
8385 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
8386
8387 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8388 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
8389 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
8390
8391 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
8392
8393 goto fc_complete;
8394
8395 no_autoneg:
8396 /* disable L2 flow control, user can turn it on if they wish */
8397 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
8398 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
8399 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
8400
8401 fc_complete:
8402 i40e_ptp_init(pf);
8403
8404 return ret;
8405 }
8406
8407 /**
8408 * i40e_determine_queue_usage - Work out queue distribution
8409 * @pf: board private structure
8410 **/
8411 static void i40e_determine_queue_usage(struct i40e_pf *pf)
8412 {
8413 int queues_left;
8414
8415 pf->num_lan_qps = 0;
8416
8417 /* Find the max queues to be put into basic use. We'll always be
8418 * using TC0, whether or not DCB is running, and TC0 will get the
8419 * big RSS set.
8420 */
8421 queues_left = pf->hw.func_caps.num_tx_qp;
8422
8423 if ((queues_left == 1) ||
8424 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
8425 /* one qp for PF, no queues for anything else */
8426 queues_left = 0;
8427 pf->rss_size = pf->num_lan_qps = 1;
8428
8429 /* make sure all the fancies are disabled */
8430 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8431 I40E_FLAG_FD_SB_ENABLED |
8432 I40E_FLAG_FD_ATR_ENABLED |
8433 I40E_FLAG_DCB_CAPABLE |
8434 I40E_FLAG_SRIOV_ENABLED |
8435 I40E_FLAG_VMDQ_ENABLED);
8436 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
8437 I40E_FLAG_FD_SB_ENABLED |
8438 I40E_FLAG_FD_ATR_ENABLED |
8439 I40E_FLAG_DCB_CAPABLE))) {
8440 /* one qp for PF */
8441 pf->rss_size = pf->num_lan_qps = 1;
8442 queues_left -= pf->num_lan_qps;
8443
8444 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
8445 I40E_FLAG_FD_SB_ENABLED |
8446 I40E_FLAG_FD_ATR_ENABLED |
8447 I40E_FLAG_DCB_ENABLED |
8448 I40E_FLAG_VMDQ_ENABLED);
8449 } else {
8450 /* Not enough queues for all TCs */
8451 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
8452 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
8453 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8454 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
8455 }
8456 pf->num_lan_qps = pf->rss_size_max;
8457 queues_left -= pf->num_lan_qps;
8458 }
8459
8460 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8461 if (queues_left > 1) {
8462 queues_left -= 1; /* save 1 queue for FD */
8463 } else {
8464 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8465 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
8466 }
8467 }
8468
8469 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8470 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
8471 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
8472 (queues_left / pf->num_vf_qps));
8473 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
8474 }
8475
8476 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
8477 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
8478 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
8479 (queues_left / pf->num_vmdq_qps));
8480 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
8481 }
8482
8483 pf->queues_left = queues_left;
8484 }
8485
8486 /**
8487 * i40e_setup_pf_filter_control - Setup PF static filter control
8488 * @pf: PF to be setup
8489 *
8490 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8491 * settings. If PE/FCoE are enabled then it will also set the per PF
8492 * based filter sizes required for them. It also enables Flow director,
8493 * ethertype and macvlan type filter settings for the pf.
8494 *
8495 * Returns 0 on success, negative on failure
8496 **/
8497 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8498 {
8499 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8500
8501 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8502
8503 /* Flow Director is enabled */
8504 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8505 settings->enable_fdir = true;
8506
8507 /* Ethtype and MACVLAN filters enabled for PF */
8508 settings->enable_ethtype = true;
8509 settings->enable_macvlan = true;
8510
8511 if (i40e_set_filter_control(&pf->hw, settings))
8512 return -ENOENT;
8513
8514 return 0;
8515 }
8516
8517 #define INFO_STRING_LEN 255
8518 static void i40e_print_features(struct i40e_pf *pf)
8519 {
8520 struct i40e_hw *hw = &pf->hw;
8521 char *buf, *string;
8522
8523 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8524 if (!string) {
8525 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8526 return;
8527 }
8528
8529 buf = string;
8530
8531 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8532 #ifdef CONFIG_PCI_IOV
8533 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8534 #endif
8535 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8536 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8537
8538 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8539 buf += sprintf(buf, "RSS ");
8540 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8541 buf += sprintf(buf, "FD_ATR ");
8542 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8543 buf += sprintf(buf, "FD_SB ");
8544 buf += sprintf(buf, "NTUPLE ");
8545 }
8546 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
8547 buf += sprintf(buf, "DCB ");
8548 if (pf->flags & I40E_FLAG_PTP)
8549 buf += sprintf(buf, "PTP ");
8550
8551 BUG_ON(buf > (string + INFO_STRING_LEN));
8552 dev_info(&pf->pdev->dev, "%s\n", string);
8553 kfree(string);
8554 }
8555
8556 /**
8557 * i40e_probe - Device initialization routine
8558 * @pdev: PCI device information struct
8559 * @ent: entry in i40e_pci_tbl
8560 *
8561 * i40e_probe initializes a pf identified by a pci_dev structure.
8562 * The OS initialization, configuring of the pf private structure,
8563 * and a hardware reset occur.
8564 *
8565 * Returns 0 on success, negative on failure
8566 **/
8567 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8568 {
8569 struct i40e_pf *pf;
8570 struct i40e_hw *hw;
8571 static u16 pfs_found;
8572 u16 link_status;
8573 int err = 0;
8574 u32 len;
8575 u32 i;
8576
8577 err = pci_enable_device_mem(pdev);
8578 if (err)
8579 return err;
8580
8581 /* set up for high or low dma */
8582 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8583 if (err) {
8584 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8585 if (err) {
8586 dev_err(&pdev->dev,
8587 "DMA configuration failed: 0x%x\n", err);
8588 goto err_dma;
8589 }
8590 }
8591
8592 /* set up pci connections */
8593 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8594 IORESOURCE_MEM), i40e_driver_name);
8595 if (err) {
8596 dev_info(&pdev->dev,
8597 "pci_request_selected_regions failed %d\n", err);
8598 goto err_pci_reg;
8599 }
8600
8601 pci_enable_pcie_error_reporting(pdev);
8602 pci_set_master(pdev);
8603
8604 /* Now that we have a PCI connection, we need to do the
8605 * low level device setup. This is primarily setting up
8606 * the Admin Queue structures and then querying for the
8607 * device's current profile information.
8608 */
8609 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8610 if (!pf) {
8611 err = -ENOMEM;
8612 goto err_pf_alloc;
8613 }
8614 pf->next_vsi = 0;
8615 pf->pdev = pdev;
8616 set_bit(__I40E_DOWN, &pf->state);
8617
8618 hw = &pf->hw;
8619 hw->back = pf;
8620 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8621 pci_resource_len(pdev, 0));
8622 if (!hw->hw_addr) {
8623 err = -EIO;
8624 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8625 (unsigned int)pci_resource_start(pdev, 0),
8626 (unsigned int)pci_resource_len(pdev, 0), err);
8627 goto err_ioremap;
8628 }
8629 hw->vendor_id = pdev->vendor;
8630 hw->device_id = pdev->device;
8631 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8632 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8633 hw->subsystem_device_id = pdev->subsystem_device;
8634 hw->bus.device = PCI_SLOT(pdev->devfn);
8635 hw->bus.func = PCI_FUNC(pdev->devfn);
8636 pf->instance = pfs_found;
8637
8638 /* do a special CORER for clearing PXE mode once at init */
8639 if (hw->revision_id == 0 &&
8640 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8641 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8642 i40e_flush(hw);
8643 msleep(200);
8644 pf->corer_count++;
8645
8646 i40e_clear_pxe_mode(hw);
8647 }
8648
8649 /* Reset here to make sure all is clean and to define PF 'n' */
8650 i40e_clear_hw(hw);
8651 err = i40e_pf_reset(hw);
8652 if (err) {
8653 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8654 goto err_pf_reset;
8655 }
8656 pf->pfr_count++;
8657
8658 hw->aq.num_arq_entries = I40E_AQ_LEN;
8659 hw->aq.num_asq_entries = I40E_AQ_LEN;
8660 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8661 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8662 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8663 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8664 "%s-pf%d:misc",
8665 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8666
8667 err = i40e_init_shared_code(hw);
8668 if (err) {
8669 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8670 goto err_pf_reset;
8671 }
8672
8673 /* set up a default setting for link flow control */
8674 pf->hw.fc.requested_mode = I40E_FC_NONE;
8675
8676 err = i40e_init_adminq(hw);
8677 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8678 if (err) {
8679 dev_info(&pdev->dev,
8680 "init_adminq failed: %d expecting API %02x.%02x\n",
8681 err,
8682 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8683 goto err_pf_reset;
8684 }
8685
8686 if (hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
8687 dev_info(&pdev->dev,
8688 "Note: FW API version %02x.%02x newer than expected %02x.%02x, recommend driver update.\n",
8689 hw->aq.api_maj_ver, hw->aq.api_min_ver,
8690 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8691
8692 if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
8693 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR-1))
8694 dev_info(&pdev->dev,
8695 "Note: FW API version %02x.%02x older than expected %02x.%02x, recommend nvm update.\n",
8696 hw->aq.api_maj_ver, hw->aq.api_min_ver,
8697 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8698
8699
8700 i40e_verify_eeprom(pf);
8701
8702 /* Rev 0 hardware was never productized */
8703 if (hw->revision_id < 1)
8704 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
8705
8706 i40e_clear_pxe_mode(hw);
8707 err = i40e_get_capabilities(pf);
8708 if (err)
8709 goto err_adminq_setup;
8710
8711 err = i40e_sw_init(pf);
8712 if (err) {
8713 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8714 goto err_sw_init;
8715 }
8716
8717 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8718 hw->func_caps.num_rx_qp,
8719 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8720 if (err) {
8721 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8722 goto err_init_lan_hmc;
8723 }
8724
8725 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8726 if (err) {
8727 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8728 err = -ENOENT;
8729 goto err_configure_lan_hmc;
8730 }
8731
8732 i40e_get_mac_addr(hw, hw->mac.addr);
8733 if (!is_valid_ether_addr(hw->mac.addr)) {
8734 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8735 err = -EIO;
8736 goto err_mac_addr;
8737 }
8738 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8739 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
8740
8741 pci_set_drvdata(pdev, pf);
8742 pci_save_state(pdev);
8743 #ifdef CONFIG_I40E_DCB
8744 err = i40e_init_pf_dcb(pf);
8745 if (err) {
8746 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8747 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
8748 /* Continue without DCB enabled */
8749 }
8750 #endif /* CONFIG_I40E_DCB */
8751
8752 /* set up periodic task facility */
8753 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8754 pf->service_timer_period = HZ;
8755
8756 INIT_WORK(&pf->service_task, i40e_service_task);
8757 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8758 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8759 pf->link_check_timeout = jiffies;
8760
8761 /* WoL defaults to disabled */
8762 pf->wol_en = false;
8763 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8764
8765 /* set up the main switch operations */
8766 i40e_determine_queue_usage(pf);
8767 i40e_init_interrupt_scheme(pf);
8768
8769 /* The number of VSIs reported by the FW is the minimum guaranteed
8770 * to us; HW supports far more and we share the remaining pool with
8771 * the other PFs. We allocate space for more than the guarantee with
8772 * the understanding that we might not get them all later.
8773 */
8774 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
8775 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
8776 else
8777 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
8778
8779 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
8780 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
8781 pf->vsi = kzalloc(len, GFP_KERNEL);
8782 if (!pf->vsi) {
8783 err = -ENOMEM;
8784 goto err_switch_setup;
8785 }
8786
8787 err = i40e_setup_pf_switch(pf, false);
8788 if (err) {
8789 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8790 goto err_vsis;
8791 }
8792 /* if FDIR VSI was set up, start it now */
8793 for (i = 0; i < pf->num_alloc_vsi; i++) {
8794 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
8795 i40e_vsi_open(pf->vsi[i]);
8796 break;
8797 }
8798 }
8799
8800 /* The main driver is (mostly) up and happy. We need to set this state
8801 * before setting up the misc vector or we get a race and the vector
8802 * ends up disabled forever.
8803 */
8804 clear_bit(__I40E_DOWN, &pf->state);
8805
8806 /* In case of MSIX we are going to setup the misc vector right here
8807 * to handle admin queue events etc. In case of legacy and MSI
8808 * the misc functionality and queue processing is combined in
8809 * the same vector and that gets setup at open.
8810 */
8811 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8812 err = i40e_setup_misc_vector(pf);
8813 if (err) {
8814 dev_info(&pdev->dev,
8815 "setup of misc vector failed: %d\n", err);
8816 goto err_vsis;
8817 }
8818 }
8819
8820 #ifdef CONFIG_PCI_IOV
8821 /* prep for VF support */
8822 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8823 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8824 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
8825 u32 val;
8826
8827 /* disable link interrupts for VFs */
8828 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8829 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8830 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8831 i40e_flush(hw);
8832
8833 if (pci_num_vf(pdev)) {
8834 dev_info(&pdev->dev,
8835 "Active VFs found, allocating resources.\n");
8836 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8837 if (err)
8838 dev_info(&pdev->dev,
8839 "Error %d allocating resources for existing VFs\n",
8840 err);
8841 }
8842 }
8843 #endif /* CONFIG_PCI_IOV */
8844
8845 pfs_found++;
8846
8847 i40e_dbg_pf_init(pf);
8848
8849 /* tell the firmware that we're starting */
8850 i40e_send_version(pf);
8851
8852 /* since everything's happy, start the service_task timer */
8853 mod_timer(&pf->service_timer,
8854 round_jiffies(jiffies + pf->service_timer_period));
8855
8856 /* Get the negotiated link width and speed from PCI config space */
8857 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8858
8859 i40e_set_pci_config_data(hw, link_status);
8860
8861 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8862 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8863 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8864 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8865 "Unknown"),
8866 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8867 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8868 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8869 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8870 "Unknown"));
8871
8872 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8873 hw->bus.speed < i40e_bus_speed_8000) {
8874 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8875 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8876 }
8877
8878 /* print a string summarizing features */
8879 i40e_print_features(pf);
8880
8881 return 0;
8882
8883 /* Unwind what we've done if something failed in the setup */
8884 err_vsis:
8885 set_bit(__I40E_DOWN, &pf->state);
8886 i40e_clear_interrupt_scheme(pf);
8887 kfree(pf->vsi);
8888 err_switch_setup:
8889 i40e_reset_interrupt_capability(pf);
8890 del_timer_sync(&pf->service_timer);
8891 err_mac_addr:
8892 err_configure_lan_hmc:
8893 (void)i40e_shutdown_lan_hmc(hw);
8894 err_init_lan_hmc:
8895 kfree(pf->qp_pile);
8896 kfree(pf->irq_pile);
8897 err_sw_init:
8898 err_adminq_setup:
8899 (void)i40e_shutdown_adminq(hw);
8900 err_pf_reset:
8901 iounmap(hw->hw_addr);
8902 err_ioremap:
8903 kfree(pf);
8904 err_pf_alloc:
8905 pci_disable_pcie_error_reporting(pdev);
8906 pci_release_selected_regions(pdev,
8907 pci_select_bars(pdev, IORESOURCE_MEM));
8908 err_pci_reg:
8909 err_dma:
8910 pci_disable_device(pdev);
8911 return err;
8912 }
8913
8914 /**
8915 * i40e_remove - Device removal routine
8916 * @pdev: PCI device information struct
8917 *
8918 * i40e_remove is called by the PCI subsystem to alert the driver
8919 * that is should release a PCI device. This could be caused by a
8920 * Hot-Plug event, or because the driver is going to be removed from
8921 * memory.
8922 **/
8923 static void i40e_remove(struct pci_dev *pdev)
8924 {
8925 struct i40e_pf *pf = pci_get_drvdata(pdev);
8926 i40e_status ret_code;
8927 int i;
8928
8929 i40e_dbg_pf_exit(pf);
8930
8931 i40e_ptp_stop(pf);
8932
8933 /* no more scheduling of any task */
8934 set_bit(__I40E_DOWN, &pf->state);
8935 del_timer_sync(&pf->service_timer);
8936 cancel_work_sync(&pf->service_task);
8937
8938 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8939 i40e_free_vfs(pf);
8940 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8941 }
8942
8943 i40e_fdir_teardown(pf);
8944
8945 /* If there is a switch structure or any orphans, remove them.
8946 * This will leave only the PF's VSI remaining.
8947 */
8948 for (i = 0; i < I40E_MAX_VEB; i++) {
8949 if (!pf->veb[i])
8950 continue;
8951
8952 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8953 pf->veb[i]->uplink_seid == 0)
8954 i40e_switch_branch_release(pf->veb[i]);
8955 }
8956
8957 /* Now we can shutdown the PF's VSI, just before we kill
8958 * adminq and hmc.
8959 */
8960 if (pf->vsi[pf->lan_vsi])
8961 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8962
8963 i40e_stop_misc_vector(pf);
8964 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8965 synchronize_irq(pf->msix_entries[0].vector);
8966 free_irq(pf->msix_entries[0].vector, pf);
8967 }
8968
8969 /* shutdown and destroy the HMC */
8970 if (pf->hw.hmc.hmc_obj) {
8971 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8972 if (ret_code)
8973 dev_warn(&pdev->dev,
8974 "Failed to destroy the HMC resources: %d\n",
8975 ret_code);
8976 }
8977
8978 /* shutdown the adminq */
8979 ret_code = i40e_shutdown_adminq(&pf->hw);
8980 if (ret_code)
8981 dev_warn(&pdev->dev,
8982 "Failed to destroy the Admin Queue resources: %d\n",
8983 ret_code);
8984
8985 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8986 i40e_clear_interrupt_scheme(pf);
8987 for (i = 0; i < pf->num_alloc_vsi; i++) {
8988 if (pf->vsi[i]) {
8989 i40e_vsi_clear_rings(pf->vsi[i]);
8990 i40e_vsi_clear(pf->vsi[i]);
8991 pf->vsi[i] = NULL;
8992 }
8993 }
8994
8995 for (i = 0; i < I40E_MAX_VEB; i++) {
8996 kfree(pf->veb[i]);
8997 pf->veb[i] = NULL;
8998 }
8999
9000 kfree(pf->qp_pile);
9001 kfree(pf->irq_pile);
9002 kfree(pf->vsi);
9003
9004 iounmap(pf->hw.hw_addr);
9005 kfree(pf);
9006 pci_release_selected_regions(pdev,
9007 pci_select_bars(pdev, IORESOURCE_MEM));
9008
9009 pci_disable_pcie_error_reporting(pdev);
9010 pci_disable_device(pdev);
9011 }
9012
9013 /**
9014 * i40e_pci_error_detected - warning that something funky happened in PCI land
9015 * @pdev: PCI device information struct
9016 *
9017 * Called to warn that something happened and the error handling steps
9018 * are in progress. Allows the driver to quiesce things, be ready for
9019 * remediation.
9020 **/
9021 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9022 enum pci_channel_state error)
9023 {
9024 struct i40e_pf *pf = pci_get_drvdata(pdev);
9025
9026 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9027
9028 /* shutdown all operations */
9029 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9030 rtnl_lock();
9031 i40e_prep_for_reset(pf);
9032 rtnl_unlock();
9033 }
9034
9035 /* Request a slot reset */
9036 return PCI_ERS_RESULT_NEED_RESET;
9037 }
9038
9039 /**
9040 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9041 * @pdev: PCI device information struct
9042 *
9043 * Called to find if the driver can work with the device now that
9044 * the pci slot has been reset. If a basic connection seems good
9045 * (registers are readable and have sane content) then return a
9046 * happy little PCI_ERS_RESULT_xxx.
9047 **/
9048 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9049 {
9050 struct i40e_pf *pf = pci_get_drvdata(pdev);
9051 pci_ers_result_t result;
9052 int err;
9053 u32 reg;
9054
9055 dev_info(&pdev->dev, "%s\n", __func__);
9056 if (pci_enable_device_mem(pdev)) {
9057 dev_info(&pdev->dev,
9058 "Cannot re-enable PCI device after reset.\n");
9059 result = PCI_ERS_RESULT_DISCONNECT;
9060 } else {
9061 pci_set_master(pdev);
9062 pci_restore_state(pdev);
9063 pci_save_state(pdev);
9064 pci_wake_from_d3(pdev, false);
9065
9066 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9067 if (reg == 0)
9068 result = PCI_ERS_RESULT_RECOVERED;
9069 else
9070 result = PCI_ERS_RESULT_DISCONNECT;
9071 }
9072
9073 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9074 if (err) {
9075 dev_info(&pdev->dev,
9076 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9077 err);
9078 /* non-fatal, continue */
9079 }
9080
9081 return result;
9082 }
9083
9084 /**
9085 * i40e_pci_error_resume - restart operations after PCI error recovery
9086 * @pdev: PCI device information struct
9087 *
9088 * Called to allow the driver to bring things back up after PCI error
9089 * and/or reset recovery has finished.
9090 **/
9091 static void i40e_pci_error_resume(struct pci_dev *pdev)
9092 {
9093 struct i40e_pf *pf = pci_get_drvdata(pdev);
9094
9095 dev_info(&pdev->dev, "%s\n", __func__);
9096 if (test_bit(__I40E_SUSPENDED, &pf->state))
9097 return;
9098
9099 rtnl_lock();
9100 i40e_handle_reset_warning(pf);
9101 rtnl_lock();
9102 }
9103
9104 /**
9105 * i40e_shutdown - PCI callback for shutting down
9106 * @pdev: PCI device information struct
9107 **/
9108 static void i40e_shutdown(struct pci_dev *pdev)
9109 {
9110 struct i40e_pf *pf = pci_get_drvdata(pdev);
9111 struct i40e_hw *hw = &pf->hw;
9112
9113 set_bit(__I40E_SUSPENDED, &pf->state);
9114 set_bit(__I40E_DOWN, &pf->state);
9115 rtnl_lock();
9116 i40e_prep_for_reset(pf);
9117 rtnl_unlock();
9118
9119 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9120 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9121
9122 if (system_state == SYSTEM_POWER_OFF) {
9123 pci_wake_from_d3(pdev, pf->wol_en);
9124 pci_set_power_state(pdev, PCI_D3hot);
9125 }
9126 }
9127
9128 #ifdef CONFIG_PM
9129 /**
9130 * i40e_suspend - PCI callback for moving to D3
9131 * @pdev: PCI device information struct
9132 **/
9133 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
9134 {
9135 struct i40e_pf *pf = pci_get_drvdata(pdev);
9136 struct i40e_hw *hw = &pf->hw;
9137
9138 set_bit(__I40E_SUSPENDED, &pf->state);
9139 set_bit(__I40E_DOWN, &pf->state);
9140 rtnl_lock();
9141 i40e_prep_for_reset(pf);
9142 rtnl_unlock();
9143
9144 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9145 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9146
9147 pci_wake_from_d3(pdev, pf->wol_en);
9148 pci_set_power_state(pdev, PCI_D3hot);
9149
9150 return 0;
9151 }
9152
9153 /**
9154 * i40e_resume - PCI callback for waking up from D3
9155 * @pdev: PCI device information struct
9156 **/
9157 static int i40e_resume(struct pci_dev *pdev)
9158 {
9159 struct i40e_pf *pf = pci_get_drvdata(pdev);
9160 u32 err;
9161
9162 pci_set_power_state(pdev, PCI_D0);
9163 pci_restore_state(pdev);
9164 /* pci_restore_state() clears dev->state_saves, so
9165 * call pci_save_state() again to restore it.
9166 */
9167 pci_save_state(pdev);
9168
9169 err = pci_enable_device_mem(pdev);
9170 if (err) {
9171 dev_err(&pdev->dev,
9172 "%s: Cannot enable PCI device from suspend\n",
9173 __func__);
9174 return err;
9175 }
9176 pci_set_master(pdev);
9177
9178 /* no wakeup events while running */
9179 pci_wake_from_d3(pdev, false);
9180
9181 /* handling the reset will rebuild the device state */
9182 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
9183 clear_bit(__I40E_DOWN, &pf->state);
9184 rtnl_lock();
9185 i40e_reset_and_rebuild(pf, false);
9186 rtnl_unlock();
9187 }
9188
9189 return 0;
9190 }
9191
9192 #endif
9193 static const struct pci_error_handlers i40e_err_handler = {
9194 .error_detected = i40e_pci_error_detected,
9195 .slot_reset = i40e_pci_error_slot_reset,
9196 .resume = i40e_pci_error_resume,
9197 };
9198
9199 static struct pci_driver i40e_driver = {
9200 .name = i40e_driver_name,
9201 .id_table = i40e_pci_tbl,
9202 .probe = i40e_probe,
9203 .remove = i40e_remove,
9204 #ifdef CONFIG_PM
9205 .suspend = i40e_suspend,
9206 .resume = i40e_resume,
9207 #endif
9208 .shutdown = i40e_shutdown,
9209 .err_handler = &i40e_err_handler,
9210 .sriov_configure = i40e_pci_sriov_configure,
9211 };
9212
9213 /**
9214 * i40e_init_module - Driver registration routine
9215 *
9216 * i40e_init_module is the first routine called when the driver is
9217 * loaded. All it does is register with the PCI subsystem.
9218 **/
9219 static int __init i40e_init_module(void)
9220 {
9221 pr_info("%s: %s - version %s\n", i40e_driver_name,
9222 i40e_driver_string, i40e_driver_version_str);
9223 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
9224 i40e_dbg_init();
9225 return pci_register_driver(&i40e_driver);
9226 }
9227 module_init(i40e_init_module);
9228
9229 /**
9230 * i40e_exit_module - Driver exit cleanup routine
9231 *
9232 * i40e_exit_module is called just before the driver is removed
9233 * from memory.
9234 **/
9235 static void __exit i40e_exit_module(void)
9236 {
9237 pci_unregister_driver(&i40e_driver);
9238 i40e_dbg_exit();
9239 }
9240 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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