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i40e: trivial: remove unnecessary local var
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 #ifdef CONFIG_SPARC
32 #include <asm/idprom.h>
33 #include <asm/prom.h>
34 #endif
35
36 /* Local includes */
37 #include "i40e.h"
38 #include "i40e_diag.h"
39 #if IS_ENABLED(CONFIG_VXLAN)
40 #include <net/vxlan.h>
41 #endif
42 #if IS_ENABLED(CONFIG_GENEVE)
43 #include <net/geneve.h>
44 #endif
45
46 const char i40e_driver_name[] = "i40e";
47 static const char i40e_driver_string[] =
48 "Intel(R) Ethernet Connection XL710 Network Driver";
49
50 #define DRV_KERN "-k"
51
52 #define DRV_VERSION_MAJOR 1
53 #define DRV_VERSION_MINOR 4
54 #define DRV_VERSION_BUILD 10
55 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
56 __stringify(DRV_VERSION_MINOR) "." \
57 __stringify(DRV_VERSION_BUILD) DRV_KERN
58 const char i40e_driver_version_str[] = DRV_VERSION;
59 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
60
61 /* a bit of forward declarations */
62 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
63 static void i40e_handle_reset_warning(struct i40e_pf *pf);
64 static int i40e_add_vsi(struct i40e_vsi *vsi);
65 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
66 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
67 static int i40e_setup_misc_vector(struct i40e_pf *pf);
68 static void i40e_determine_queue_usage(struct i40e_pf *pf);
69 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
70 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
71 u16 rss_table_size, u16 rss_size);
72 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
73 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
74
75 /* i40e_pci_tbl - PCI Device ID Table
76 *
77 * Last entry must be all 0s
78 *
79 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
80 * Class, Class Mask, private data (not used) }
81 */
82 static const struct pci_device_id i40e_pci_tbl[] = {
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
92 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
93 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
94 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
95 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
96 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
97 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
98 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
99 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
100 /* required last entry */
101 {0, }
102 };
103 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
104
105 #define I40E_MAX_VF_COUNT 128
106 static int debug = -1;
107 module_param(debug, int, 0);
108 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
109
110 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
111 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
112 MODULE_LICENSE("GPL");
113 MODULE_VERSION(DRV_VERSION);
114
115 static struct workqueue_struct *i40e_wq;
116
117 /**
118 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
119 * @hw: pointer to the HW structure
120 * @mem: ptr to mem struct to fill out
121 * @size: size of memory requested
122 * @alignment: what to align the allocation to
123 **/
124 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
125 u64 size, u32 alignment)
126 {
127 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
128
129 mem->size = ALIGN(size, alignment);
130 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
131 &mem->pa, GFP_KERNEL);
132 if (!mem->va)
133 return -ENOMEM;
134
135 return 0;
136 }
137
138 /**
139 * i40e_free_dma_mem_d - OS specific memory free for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to free
142 **/
143 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
144 {
145 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
146
147 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
148 mem->va = NULL;
149 mem->pa = 0;
150 mem->size = 0;
151
152 return 0;
153 }
154
155 /**
156 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
157 * @hw: pointer to the HW structure
158 * @mem: ptr to mem struct to fill out
159 * @size: size of memory requested
160 **/
161 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
162 u32 size)
163 {
164 mem->size = size;
165 mem->va = kzalloc(size, GFP_KERNEL);
166
167 if (!mem->va)
168 return -ENOMEM;
169
170 return 0;
171 }
172
173 /**
174 * i40e_free_virt_mem_d - OS specific memory free for shared code
175 * @hw: pointer to the HW structure
176 * @mem: ptr to mem struct to free
177 **/
178 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
179 {
180 /* it's ok to kfree a NULL pointer */
181 kfree(mem->va);
182 mem->va = NULL;
183 mem->size = 0;
184
185 return 0;
186 }
187
188 /**
189 * i40e_get_lump - find a lump of free generic resource
190 * @pf: board private structure
191 * @pile: the pile of resource to search
192 * @needed: the number of items needed
193 * @id: an owner id to stick on the items assigned
194 *
195 * Returns the base item index of the lump, or negative for error
196 *
197 * The search_hint trick and lack of advanced fit-finding only work
198 * because we're highly likely to have all the same size lump requests.
199 * Linear search time and any fragmentation should be minimal.
200 **/
201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
202 u16 needed, u16 id)
203 {
204 int ret = -ENOMEM;
205 int i, j;
206
207 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
208 dev_info(&pf->pdev->dev,
209 "param err: pile=%p needed=%d id=0x%04x\n",
210 pile, needed, id);
211 return -EINVAL;
212 }
213
214 /* start the linear search with an imperfect hint */
215 i = pile->search_hint;
216 while (i < pile->num_entries) {
217 /* skip already allocated entries */
218 if (pile->list[i] & I40E_PILE_VALID_BIT) {
219 i++;
220 continue;
221 }
222
223 /* do we have enough in this lump? */
224 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
225 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
226 break;
227 }
228
229 if (j == needed) {
230 /* there was enough, so assign it to the requestor */
231 for (j = 0; j < needed; j++)
232 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
233 ret = i;
234 pile->search_hint = i + j;
235 break;
236 }
237
238 /* not enough, so skip over it and continue looking */
239 i += j;
240 }
241
242 return ret;
243 }
244
245 /**
246 * i40e_put_lump - return a lump of generic resource
247 * @pile: the pile of resource to search
248 * @index: the base item index
249 * @id: the owner id of the items assigned
250 *
251 * Returns the count of items in the lump
252 **/
253 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
254 {
255 int valid_id = (id | I40E_PILE_VALID_BIT);
256 int count = 0;
257 int i;
258
259 if (!pile || index >= pile->num_entries)
260 return -EINVAL;
261
262 for (i = index;
263 i < pile->num_entries && pile->list[i] == valid_id;
264 i++) {
265 pile->list[i] = 0;
266 count++;
267 }
268
269 if (count && index < pile->search_hint)
270 pile->search_hint = index;
271
272 return count;
273 }
274
275 /**
276 * i40e_find_vsi_from_id - searches for the vsi with the given id
277 * @pf - the pf structure to search for the vsi
278 * @id - id of the vsi it is searching for
279 **/
280 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
281 {
282 int i;
283
284 for (i = 0; i < pf->num_alloc_vsi; i++)
285 if (pf->vsi[i] && (pf->vsi[i]->id == id))
286 return pf->vsi[i];
287
288 return NULL;
289 }
290
291 /**
292 * i40e_service_event_schedule - Schedule the service task to wake up
293 * @pf: board private structure
294 *
295 * If not already scheduled, this puts the task into the work queue
296 **/
297 static void i40e_service_event_schedule(struct i40e_pf *pf)
298 {
299 if (!test_bit(__I40E_DOWN, &pf->state) &&
300 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
301 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
302 queue_work(i40e_wq, &pf->service_task);
303 }
304
305 /**
306 * i40e_tx_timeout - Respond to a Tx Hang
307 * @netdev: network interface device structure
308 *
309 * If any port has noticed a Tx timeout, it is likely that the whole
310 * device is munged, not just the one netdev port, so go for the full
311 * reset.
312 **/
313 #ifdef I40E_FCOE
314 void i40e_tx_timeout(struct net_device *netdev)
315 #else
316 static void i40e_tx_timeout(struct net_device *netdev)
317 #endif
318 {
319 struct i40e_netdev_priv *np = netdev_priv(netdev);
320 struct i40e_vsi *vsi = np->vsi;
321 struct i40e_pf *pf = vsi->back;
322 struct i40e_ring *tx_ring = NULL;
323 unsigned int i, hung_queue = 0;
324 u32 head, val;
325
326 pf->tx_timeout_count++;
327
328 /* find the stopped queue the same way the stack does */
329 for (i = 0; i < netdev->num_tx_queues; i++) {
330 struct netdev_queue *q;
331 unsigned long trans_start;
332
333 q = netdev_get_tx_queue(netdev, i);
334 trans_start = q->trans_start ? : netdev->trans_start;
335 if (netif_xmit_stopped(q) &&
336 time_after(jiffies,
337 (trans_start + netdev->watchdog_timeo))) {
338 hung_queue = i;
339 break;
340 }
341 }
342
343 if (i == netdev->num_tx_queues) {
344 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
345 } else {
346 /* now that we have an index, find the tx_ring struct */
347 for (i = 0; i < vsi->num_queue_pairs; i++) {
348 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
349 if (hung_queue ==
350 vsi->tx_rings[i]->queue_index) {
351 tx_ring = vsi->tx_rings[i];
352 break;
353 }
354 }
355 }
356 }
357
358 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
359 pf->tx_timeout_recovery_level = 1; /* reset after some time */
360 else if (time_before(jiffies,
361 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
362 return; /* don't do any new action before the next timeout */
363
364 if (tx_ring) {
365 head = i40e_get_head(tx_ring);
366 /* Read interrupt register */
367 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
368 val = rd32(&pf->hw,
369 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
370 tx_ring->vsi->base_vector - 1));
371 else
372 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
373
374 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
375 vsi->seid, hung_queue, tx_ring->next_to_clean,
376 head, tx_ring->next_to_use,
377 readl(tx_ring->tail), val);
378 }
379
380 pf->tx_timeout_last_recovery = jiffies;
381 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
382 pf->tx_timeout_recovery_level, hung_queue);
383
384 switch (pf->tx_timeout_recovery_level) {
385 case 1:
386 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
387 break;
388 case 2:
389 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
390 break;
391 case 3:
392 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
393 break;
394 default:
395 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
396 break;
397 }
398
399 i40e_service_event_schedule(pf);
400 pf->tx_timeout_recovery_level++;
401 }
402
403 /**
404 * i40e_release_rx_desc - Store the new tail and head values
405 * @rx_ring: ring to bump
406 * @val: new head index
407 **/
408 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
409 {
410 rx_ring->next_to_use = val;
411
412 /* Force memory writes to complete before letting h/w
413 * know there are new descriptors to fetch. (Only
414 * applicable for weak-ordered memory model archs,
415 * such as IA-64).
416 */
417 wmb();
418 writel(val, rx_ring->tail);
419 }
420
421 /**
422 * i40e_get_vsi_stats_struct - Get System Network Statistics
423 * @vsi: the VSI we care about
424 *
425 * Returns the address of the device statistics structure.
426 * The statistics are actually updated from the service task.
427 **/
428 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
429 {
430 return &vsi->net_stats;
431 }
432
433 /**
434 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
435 * @netdev: network interface device structure
436 *
437 * Returns the address of the device statistics structure.
438 * The statistics are actually updated from the service task.
439 **/
440 #ifdef I40E_FCOE
441 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
442 struct net_device *netdev,
443 struct rtnl_link_stats64 *stats)
444 #else
445 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
446 struct net_device *netdev,
447 struct rtnl_link_stats64 *stats)
448 #endif
449 {
450 struct i40e_netdev_priv *np = netdev_priv(netdev);
451 struct i40e_ring *tx_ring, *rx_ring;
452 struct i40e_vsi *vsi = np->vsi;
453 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
454 int i;
455
456 if (test_bit(__I40E_DOWN, &vsi->state))
457 return stats;
458
459 if (!vsi->tx_rings)
460 return stats;
461
462 rcu_read_lock();
463 for (i = 0; i < vsi->num_queue_pairs; i++) {
464 u64 bytes, packets;
465 unsigned int start;
466
467 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
468 if (!tx_ring)
469 continue;
470
471 do {
472 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
473 packets = tx_ring->stats.packets;
474 bytes = tx_ring->stats.bytes;
475 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
476
477 stats->tx_packets += packets;
478 stats->tx_bytes += bytes;
479 rx_ring = &tx_ring[1];
480
481 do {
482 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
483 packets = rx_ring->stats.packets;
484 bytes = rx_ring->stats.bytes;
485 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
486
487 stats->rx_packets += packets;
488 stats->rx_bytes += bytes;
489 }
490 rcu_read_unlock();
491
492 /* following stats updated by i40e_watchdog_subtask() */
493 stats->multicast = vsi_stats->multicast;
494 stats->tx_errors = vsi_stats->tx_errors;
495 stats->tx_dropped = vsi_stats->tx_dropped;
496 stats->rx_errors = vsi_stats->rx_errors;
497 stats->rx_dropped = vsi_stats->rx_dropped;
498 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
499 stats->rx_length_errors = vsi_stats->rx_length_errors;
500
501 return stats;
502 }
503
504 /**
505 * i40e_vsi_reset_stats - Resets all stats of the given vsi
506 * @vsi: the VSI to have its stats reset
507 **/
508 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
509 {
510 struct rtnl_link_stats64 *ns;
511 int i;
512
513 if (!vsi)
514 return;
515
516 ns = i40e_get_vsi_stats_struct(vsi);
517 memset(ns, 0, sizeof(*ns));
518 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
519 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
520 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
521 if (vsi->rx_rings && vsi->rx_rings[0]) {
522 for (i = 0; i < vsi->num_queue_pairs; i++) {
523 memset(&vsi->rx_rings[i]->stats, 0,
524 sizeof(vsi->rx_rings[i]->stats));
525 memset(&vsi->rx_rings[i]->rx_stats, 0,
526 sizeof(vsi->rx_rings[i]->rx_stats));
527 memset(&vsi->tx_rings[i]->stats, 0,
528 sizeof(vsi->tx_rings[i]->stats));
529 memset(&vsi->tx_rings[i]->tx_stats, 0,
530 sizeof(vsi->tx_rings[i]->tx_stats));
531 }
532 }
533 vsi->stat_offsets_loaded = false;
534 }
535
536 /**
537 * i40e_pf_reset_stats - Reset all of the stats for the given PF
538 * @pf: the PF to be reset
539 **/
540 void i40e_pf_reset_stats(struct i40e_pf *pf)
541 {
542 int i;
543
544 memset(&pf->stats, 0, sizeof(pf->stats));
545 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
546 pf->stat_offsets_loaded = false;
547
548 for (i = 0; i < I40E_MAX_VEB; i++) {
549 if (pf->veb[i]) {
550 memset(&pf->veb[i]->stats, 0,
551 sizeof(pf->veb[i]->stats));
552 memset(&pf->veb[i]->stats_offsets, 0,
553 sizeof(pf->veb[i]->stats_offsets));
554 pf->veb[i]->stat_offsets_loaded = false;
555 }
556 }
557 }
558
559 /**
560 * i40e_stat_update48 - read and update a 48 bit stat from the chip
561 * @hw: ptr to the hardware info
562 * @hireg: the high 32 bit reg to read
563 * @loreg: the low 32 bit reg to read
564 * @offset_loaded: has the initial offset been loaded yet
565 * @offset: ptr to current offset value
566 * @stat: ptr to the stat
567 *
568 * Since the device stats are not reset at PFReset, they likely will not
569 * be zeroed when the driver starts. We'll save the first values read
570 * and use them as offsets to be subtracted from the raw values in order
571 * to report stats that count from zero. In the process, we also manage
572 * the potential roll-over.
573 **/
574 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
575 bool offset_loaded, u64 *offset, u64 *stat)
576 {
577 u64 new_data;
578
579 if (hw->device_id == I40E_DEV_ID_QEMU) {
580 new_data = rd32(hw, loreg);
581 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
582 } else {
583 new_data = rd64(hw, loreg);
584 }
585 if (!offset_loaded)
586 *offset = new_data;
587 if (likely(new_data >= *offset))
588 *stat = new_data - *offset;
589 else
590 *stat = (new_data + BIT_ULL(48)) - *offset;
591 *stat &= 0xFFFFFFFFFFFFULL;
592 }
593
594 /**
595 * i40e_stat_update32 - read and update a 32 bit stat from the chip
596 * @hw: ptr to the hardware info
597 * @reg: the hw reg to read
598 * @offset_loaded: has the initial offset been loaded yet
599 * @offset: ptr to current offset value
600 * @stat: ptr to the stat
601 **/
602 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
603 bool offset_loaded, u64 *offset, u64 *stat)
604 {
605 u32 new_data;
606
607 new_data = rd32(hw, reg);
608 if (!offset_loaded)
609 *offset = new_data;
610 if (likely(new_data >= *offset))
611 *stat = (u32)(new_data - *offset);
612 else
613 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
614 }
615
616 /**
617 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
618 * @vsi: the VSI to be updated
619 **/
620 void i40e_update_eth_stats(struct i40e_vsi *vsi)
621 {
622 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
623 struct i40e_pf *pf = vsi->back;
624 struct i40e_hw *hw = &pf->hw;
625 struct i40e_eth_stats *oes;
626 struct i40e_eth_stats *es; /* device's eth stats */
627
628 es = &vsi->eth_stats;
629 oes = &vsi->eth_stats_offsets;
630
631 /* Gather up the stats that the hw collects */
632 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->tx_errors, &es->tx_errors);
635 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->rx_discards, &es->rx_discards);
638 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
639 vsi->stat_offsets_loaded,
640 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
641 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_errors, &es->tx_errors);
644
645 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
646 I40E_GLV_GORCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->rx_bytes, &es->rx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
650 I40E_GLV_UPRCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->rx_unicast, &es->rx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
654 I40E_GLV_MPRCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->rx_multicast, &es->rx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
658 I40E_GLV_BPRCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->rx_broadcast, &es->rx_broadcast);
661
662 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
663 I40E_GLV_GOTCL(stat_idx),
664 vsi->stat_offsets_loaded,
665 &oes->tx_bytes, &es->tx_bytes);
666 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
667 I40E_GLV_UPTCL(stat_idx),
668 vsi->stat_offsets_loaded,
669 &oes->tx_unicast, &es->tx_unicast);
670 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
671 I40E_GLV_MPTCL(stat_idx),
672 vsi->stat_offsets_loaded,
673 &oes->tx_multicast, &es->tx_multicast);
674 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
675 I40E_GLV_BPTCL(stat_idx),
676 vsi->stat_offsets_loaded,
677 &oes->tx_broadcast, &es->tx_broadcast);
678 vsi->stat_offsets_loaded = true;
679 }
680
681 /**
682 * i40e_update_veb_stats - Update Switch component statistics
683 * @veb: the VEB being updated
684 **/
685 static void i40e_update_veb_stats(struct i40e_veb *veb)
686 {
687 struct i40e_pf *pf = veb->pf;
688 struct i40e_hw *hw = &pf->hw;
689 struct i40e_eth_stats *oes;
690 struct i40e_eth_stats *es; /* device's eth stats */
691 struct i40e_veb_tc_stats *veb_oes;
692 struct i40e_veb_tc_stats *veb_es;
693 int i, idx = 0;
694
695 idx = veb->stats_idx;
696 es = &veb->stats;
697 oes = &veb->stats_offsets;
698 veb_es = &veb->tc_stats;
699 veb_oes = &veb->tc_stats_offsets;
700
701 /* Gather up the stats that the hw collects */
702 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_discards, &es->tx_discards);
705 if (hw->revision_id > 0)
706 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
707 veb->stat_offsets_loaded,
708 &oes->rx_unknown_protocol,
709 &es->rx_unknown_protocol);
710 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
711 veb->stat_offsets_loaded,
712 &oes->rx_bytes, &es->rx_bytes);
713 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
714 veb->stat_offsets_loaded,
715 &oes->rx_unicast, &es->rx_unicast);
716 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
717 veb->stat_offsets_loaded,
718 &oes->rx_multicast, &es->rx_multicast);
719 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
720 veb->stat_offsets_loaded,
721 &oes->rx_broadcast, &es->rx_broadcast);
722
723 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
724 veb->stat_offsets_loaded,
725 &oes->tx_bytes, &es->tx_bytes);
726 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
727 veb->stat_offsets_loaded,
728 &oes->tx_unicast, &es->tx_unicast);
729 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
730 veb->stat_offsets_loaded,
731 &oes->tx_multicast, &es->tx_multicast);
732 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
733 veb->stat_offsets_loaded,
734 &oes->tx_broadcast, &es->tx_broadcast);
735 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
736 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
737 I40E_GLVEBTC_RPCL(i, idx),
738 veb->stat_offsets_loaded,
739 &veb_oes->tc_rx_packets[i],
740 &veb_es->tc_rx_packets[i]);
741 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
742 I40E_GLVEBTC_RBCL(i, idx),
743 veb->stat_offsets_loaded,
744 &veb_oes->tc_rx_bytes[i],
745 &veb_es->tc_rx_bytes[i]);
746 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
747 I40E_GLVEBTC_TPCL(i, idx),
748 veb->stat_offsets_loaded,
749 &veb_oes->tc_tx_packets[i],
750 &veb_es->tc_tx_packets[i]);
751 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
752 I40E_GLVEBTC_TBCL(i, idx),
753 veb->stat_offsets_loaded,
754 &veb_oes->tc_tx_bytes[i],
755 &veb_es->tc_tx_bytes[i]);
756 }
757 veb->stat_offsets_loaded = true;
758 }
759
760 #ifdef I40E_FCOE
761 /**
762 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
763 * @vsi: the VSI that is capable of doing FCoE
764 **/
765 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
766 {
767 struct i40e_pf *pf = vsi->back;
768 struct i40e_hw *hw = &pf->hw;
769 struct i40e_fcoe_stats *ofs;
770 struct i40e_fcoe_stats *fs; /* device's eth stats */
771 int idx;
772
773 if (vsi->type != I40E_VSI_FCOE)
774 return;
775
776 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
777 fs = &vsi->fcoe_stats;
778 ofs = &vsi->fcoe_stats_offsets;
779
780 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
783 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
786 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
787 vsi->fcoe_stat_offsets_loaded,
788 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
789 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
790 vsi->fcoe_stat_offsets_loaded,
791 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
792 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
793 vsi->fcoe_stat_offsets_loaded,
794 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
795 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
796 vsi->fcoe_stat_offsets_loaded,
797 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
798 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
799 vsi->fcoe_stat_offsets_loaded,
800 &ofs->fcoe_last_error, &fs->fcoe_last_error);
801 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
802 vsi->fcoe_stat_offsets_loaded,
803 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
804
805 vsi->fcoe_stat_offsets_loaded = true;
806 }
807
808 #endif
809 /**
810 * i40e_update_vsi_stats - Update the vsi statistics counters.
811 * @vsi: the VSI to be updated
812 *
813 * There are a few instances where we store the same stat in a
814 * couple of different structs. This is partly because we have
815 * the netdev stats that need to be filled out, which is slightly
816 * different from the "eth_stats" defined by the chip and used in
817 * VF communications. We sort it out here.
818 **/
819 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
820 {
821 struct i40e_pf *pf = vsi->back;
822 struct rtnl_link_stats64 *ons;
823 struct rtnl_link_stats64 *ns; /* netdev stats */
824 struct i40e_eth_stats *oes;
825 struct i40e_eth_stats *es; /* device's eth stats */
826 u32 tx_restart, tx_busy;
827 struct i40e_ring *p;
828 u32 rx_page, rx_buf;
829 u64 bytes, packets;
830 unsigned int start;
831 u64 tx_linearize;
832 u64 tx_force_wb;
833 u64 rx_p, rx_b;
834 u64 tx_p, tx_b;
835 u16 q;
836
837 if (test_bit(__I40E_DOWN, &vsi->state) ||
838 test_bit(__I40E_CONFIG_BUSY, &pf->state))
839 return;
840
841 ns = i40e_get_vsi_stats_struct(vsi);
842 ons = &vsi->net_stats_offsets;
843 es = &vsi->eth_stats;
844 oes = &vsi->eth_stats_offsets;
845
846 /* Gather up the netdev and vsi stats that the driver collects
847 * on the fly during packet processing
848 */
849 rx_b = rx_p = 0;
850 tx_b = tx_p = 0;
851 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
852 rx_page = 0;
853 rx_buf = 0;
854 rcu_read_lock();
855 for (q = 0; q < vsi->num_queue_pairs; q++) {
856 /* locate Tx ring */
857 p = ACCESS_ONCE(vsi->tx_rings[q]);
858
859 do {
860 start = u64_stats_fetch_begin_irq(&p->syncp);
861 packets = p->stats.packets;
862 bytes = p->stats.bytes;
863 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
864 tx_b += bytes;
865 tx_p += packets;
866 tx_restart += p->tx_stats.restart_queue;
867 tx_busy += p->tx_stats.tx_busy;
868 tx_linearize += p->tx_stats.tx_linearize;
869 tx_force_wb += p->tx_stats.tx_force_wb;
870
871 /* Rx queue is part of the same block as Tx queue */
872 p = &p[1];
873 do {
874 start = u64_stats_fetch_begin_irq(&p->syncp);
875 packets = p->stats.packets;
876 bytes = p->stats.bytes;
877 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
878 rx_b += bytes;
879 rx_p += packets;
880 rx_buf += p->rx_stats.alloc_buff_failed;
881 rx_page += p->rx_stats.alloc_page_failed;
882 }
883 rcu_read_unlock();
884 vsi->tx_restart = tx_restart;
885 vsi->tx_busy = tx_busy;
886 vsi->tx_linearize = tx_linearize;
887 vsi->tx_force_wb = tx_force_wb;
888 vsi->rx_page_failed = rx_page;
889 vsi->rx_buf_failed = rx_buf;
890
891 ns->rx_packets = rx_p;
892 ns->rx_bytes = rx_b;
893 ns->tx_packets = tx_p;
894 ns->tx_bytes = tx_b;
895
896 /* update netdev stats from eth stats */
897 i40e_update_eth_stats(vsi);
898 ons->tx_errors = oes->tx_errors;
899 ns->tx_errors = es->tx_errors;
900 ons->multicast = oes->rx_multicast;
901 ns->multicast = es->rx_multicast;
902 ons->rx_dropped = oes->rx_discards;
903 ns->rx_dropped = es->rx_discards;
904 ons->tx_dropped = oes->tx_discards;
905 ns->tx_dropped = es->tx_discards;
906
907 /* pull in a couple PF stats if this is the main vsi */
908 if (vsi == pf->vsi[pf->lan_vsi]) {
909 ns->rx_crc_errors = pf->stats.crc_errors;
910 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
911 ns->rx_length_errors = pf->stats.rx_length_errors;
912 }
913 }
914
915 /**
916 * i40e_update_pf_stats - Update the PF statistics counters.
917 * @pf: the PF to be updated
918 **/
919 static void i40e_update_pf_stats(struct i40e_pf *pf)
920 {
921 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
922 struct i40e_hw_port_stats *nsd = &pf->stats;
923 struct i40e_hw *hw = &pf->hw;
924 u32 val;
925 int i;
926
927 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
928 I40E_GLPRT_GORCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
931 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
932 I40E_GLPRT_GOTCL(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
935 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
936 pf->stat_offsets_loaded,
937 &osd->eth.rx_discards,
938 &nsd->eth.rx_discards);
939 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
940 I40E_GLPRT_UPRCL(hw->port),
941 pf->stat_offsets_loaded,
942 &osd->eth.rx_unicast,
943 &nsd->eth.rx_unicast);
944 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
945 I40E_GLPRT_MPRCL(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->eth.rx_multicast,
948 &nsd->eth.rx_multicast);
949 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
950 I40E_GLPRT_BPRCL(hw->port),
951 pf->stat_offsets_loaded,
952 &osd->eth.rx_broadcast,
953 &nsd->eth.rx_broadcast);
954 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
955 I40E_GLPRT_UPTCL(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->eth.tx_unicast,
958 &nsd->eth.tx_unicast);
959 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
960 I40E_GLPRT_MPTCL(hw->port),
961 pf->stat_offsets_loaded,
962 &osd->eth.tx_multicast,
963 &nsd->eth.tx_multicast);
964 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
965 I40E_GLPRT_BPTCL(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->eth.tx_broadcast,
968 &nsd->eth.tx_broadcast);
969
970 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->tx_dropped_link_down,
973 &nsd->tx_dropped_link_down);
974
975 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->crc_errors, &nsd->crc_errors);
978
979 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->illegal_bytes, &nsd->illegal_bytes);
982
983 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->mac_local_faults,
986 &nsd->mac_local_faults);
987 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->mac_remote_faults,
990 &nsd->mac_remote_faults);
991
992 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
993 pf->stat_offsets_loaded,
994 &osd->rx_length_errors,
995 &nsd->rx_length_errors);
996
997 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->link_xon_rx, &nsd->link_xon_rx);
1000 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->link_xon_tx, &nsd->link_xon_tx);
1003 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1006 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1009
1010 for (i = 0; i < 8; i++) {
1011 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1012 pf->stat_offsets_loaded,
1013 &osd->priority_xoff_rx[i],
1014 &nsd->priority_xoff_rx[i]);
1015 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1016 pf->stat_offsets_loaded,
1017 &osd->priority_xon_rx[i],
1018 &nsd->priority_xon_rx[i]);
1019 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1020 pf->stat_offsets_loaded,
1021 &osd->priority_xon_tx[i],
1022 &nsd->priority_xon_tx[i]);
1023 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1024 pf->stat_offsets_loaded,
1025 &osd->priority_xoff_tx[i],
1026 &nsd->priority_xoff_tx[i]);
1027 i40e_stat_update32(hw,
1028 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1029 pf->stat_offsets_loaded,
1030 &osd->priority_xon_2_xoff[i],
1031 &nsd->priority_xon_2_xoff[i]);
1032 }
1033
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1035 I40E_GLPRT_PRC64L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_64, &nsd->rx_size_64);
1038 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1039 I40E_GLPRT_PRC127L(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->rx_size_127, &nsd->rx_size_127);
1042 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1043 I40E_GLPRT_PRC255L(hw->port),
1044 pf->stat_offsets_loaded,
1045 &osd->rx_size_255, &nsd->rx_size_255);
1046 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1047 I40E_GLPRT_PRC511L(hw->port),
1048 pf->stat_offsets_loaded,
1049 &osd->rx_size_511, &nsd->rx_size_511);
1050 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1051 I40E_GLPRT_PRC1023L(hw->port),
1052 pf->stat_offsets_loaded,
1053 &osd->rx_size_1023, &nsd->rx_size_1023);
1054 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1055 I40E_GLPRT_PRC1522L(hw->port),
1056 pf->stat_offsets_loaded,
1057 &osd->rx_size_1522, &nsd->rx_size_1522);
1058 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1059 I40E_GLPRT_PRC9522L(hw->port),
1060 pf->stat_offsets_loaded,
1061 &osd->rx_size_big, &nsd->rx_size_big);
1062
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1064 I40E_GLPRT_PTC64L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_64, &nsd->tx_size_64);
1067 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1068 I40E_GLPRT_PTC127L(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->tx_size_127, &nsd->tx_size_127);
1071 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1072 I40E_GLPRT_PTC255L(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->tx_size_255, &nsd->tx_size_255);
1075 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1076 I40E_GLPRT_PTC511L(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->tx_size_511, &nsd->tx_size_511);
1079 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1080 I40E_GLPRT_PTC1023L(hw->port),
1081 pf->stat_offsets_loaded,
1082 &osd->tx_size_1023, &nsd->tx_size_1023);
1083 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1084 I40E_GLPRT_PTC1522L(hw->port),
1085 pf->stat_offsets_loaded,
1086 &osd->tx_size_1522, &nsd->tx_size_1522);
1087 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1088 I40E_GLPRT_PTC9522L(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->tx_size_big, &nsd->tx_size_big);
1091
1092 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1093 pf->stat_offsets_loaded,
1094 &osd->rx_undersize, &nsd->rx_undersize);
1095 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1096 pf->stat_offsets_loaded,
1097 &osd->rx_fragments, &nsd->rx_fragments);
1098 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_oversize, &nsd->rx_oversize);
1101 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_jabber, &nsd->rx_jabber);
1104
1105 /* FDIR stats */
1106 i40e_stat_update32(hw,
1107 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1108 pf->stat_offsets_loaded,
1109 &osd->fd_atr_match, &nsd->fd_atr_match);
1110 i40e_stat_update32(hw,
1111 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1112 pf->stat_offsets_loaded,
1113 &osd->fd_sb_match, &nsd->fd_sb_match);
1114 i40e_stat_update32(hw,
1115 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1116 pf->stat_offsets_loaded,
1117 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1118
1119 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1120 nsd->tx_lpi_status =
1121 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1122 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1123 nsd->rx_lpi_status =
1124 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1125 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1126 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1127 pf->stat_offsets_loaded,
1128 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1129 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1130 pf->stat_offsets_loaded,
1131 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1132
1133 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1134 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1135 nsd->fd_sb_status = true;
1136 else
1137 nsd->fd_sb_status = false;
1138
1139 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1140 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1141 nsd->fd_atr_status = true;
1142 else
1143 nsd->fd_atr_status = false;
1144
1145 pf->stat_offsets_loaded = true;
1146 }
1147
1148 /**
1149 * i40e_update_stats - Update the various statistics counters.
1150 * @vsi: the VSI to be updated
1151 *
1152 * Update the various stats for this VSI and its related entities.
1153 **/
1154 void i40e_update_stats(struct i40e_vsi *vsi)
1155 {
1156 struct i40e_pf *pf = vsi->back;
1157
1158 if (vsi == pf->vsi[pf->lan_vsi])
1159 i40e_update_pf_stats(pf);
1160
1161 i40e_update_vsi_stats(vsi);
1162 #ifdef I40E_FCOE
1163 i40e_update_fcoe_stats(vsi);
1164 #endif
1165 }
1166
1167 /**
1168 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1169 * @vsi: the VSI to be searched
1170 * @macaddr: the MAC address
1171 * @vlan: the vlan
1172 * @is_vf: make sure its a VF filter, else doesn't matter
1173 * @is_netdev: make sure its a netdev filter, else doesn't matter
1174 *
1175 * Returns ptr to the filter object or NULL
1176 **/
1177 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1178 u8 *macaddr, s16 vlan,
1179 bool is_vf, bool is_netdev)
1180 {
1181 struct i40e_mac_filter *f;
1182
1183 if (!vsi || !macaddr)
1184 return NULL;
1185
1186 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1187 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1188 (vlan == f->vlan) &&
1189 (!is_vf || f->is_vf) &&
1190 (!is_netdev || f->is_netdev))
1191 return f;
1192 }
1193 return NULL;
1194 }
1195
1196 /**
1197 * i40e_find_mac - Find a mac addr in the macvlan filters list
1198 * @vsi: the VSI to be searched
1199 * @macaddr: the MAC address we are searching for
1200 * @is_vf: make sure its a VF filter, else doesn't matter
1201 * @is_netdev: make sure its a netdev filter, else doesn't matter
1202 *
1203 * Returns the first filter with the provided MAC address or NULL if
1204 * MAC address was not found
1205 **/
1206 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1207 bool is_vf, bool is_netdev)
1208 {
1209 struct i40e_mac_filter *f;
1210
1211 if (!vsi || !macaddr)
1212 return NULL;
1213
1214 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1215 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1216 (!is_vf || f->is_vf) &&
1217 (!is_netdev || f->is_netdev))
1218 return f;
1219 }
1220 return NULL;
1221 }
1222
1223 /**
1224 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1225 * @vsi: the VSI to be searched
1226 *
1227 * Returns true if VSI is in vlan mode or false otherwise
1228 **/
1229 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1230 {
1231 struct i40e_mac_filter *f;
1232
1233 /* Only -1 for all the filters denotes not in vlan mode
1234 * so we have to go through all the list in order to make sure
1235 */
1236 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1237 if (f->vlan >= 0 || vsi->info.pvid)
1238 return true;
1239 }
1240
1241 return false;
1242 }
1243
1244 /**
1245 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1246 * @vsi: the VSI to be searched
1247 * @macaddr: the mac address to be filtered
1248 * @is_vf: true if it is a VF
1249 * @is_netdev: true if it is a netdev
1250 *
1251 * Goes through all the macvlan filters and adds a
1252 * macvlan filter for each unique vlan that already exists
1253 *
1254 * Returns first filter found on success, else NULL
1255 **/
1256 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1257 bool is_vf, bool is_netdev)
1258 {
1259 struct i40e_mac_filter *f;
1260
1261 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1262 if (vsi->info.pvid)
1263 f->vlan = le16_to_cpu(vsi->info.pvid);
1264 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1265 is_vf, is_netdev)) {
1266 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1267 is_vf, is_netdev))
1268 return NULL;
1269 }
1270 }
1271
1272 return list_first_entry_or_null(&vsi->mac_filter_list,
1273 struct i40e_mac_filter, list);
1274 }
1275
1276 /**
1277 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1278 * @vsi: the VSI to be searched
1279 * @macaddr: the mac address to be removed
1280 * @is_vf: true if it is a VF
1281 * @is_netdev: true if it is a netdev
1282 *
1283 * Removes a given MAC address from a VSI, regardless of VLAN
1284 *
1285 * Returns 0 for success, or error
1286 **/
1287 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1288 bool is_vf, bool is_netdev)
1289 {
1290 struct i40e_mac_filter *f = NULL;
1291 int changed = 0;
1292
1293 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1294 "Missing mac_filter_list_lock\n");
1295 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1296 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1297 (is_vf == f->is_vf) &&
1298 (is_netdev == f->is_netdev)) {
1299 f->counter--;
1300 f->changed = true;
1301 changed = 1;
1302 }
1303 }
1304 if (changed) {
1305 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1306 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1307 return 0;
1308 }
1309 return -ENOENT;
1310 }
1311
1312 /**
1313 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1314 * @vsi: the PF Main VSI - inappropriate for any other VSI
1315 * @macaddr: the MAC address
1316 *
1317 * Some older firmware configurations set up a default promiscuous VLAN
1318 * filter that needs to be removed.
1319 **/
1320 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1321 {
1322 struct i40e_aqc_remove_macvlan_element_data element;
1323 struct i40e_pf *pf = vsi->back;
1324 i40e_status ret;
1325
1326 /* Only appropriate for the PF main VSI */
1327 if (vsi->type != I40E_VSI_MAIN)
1328 return -EINVAL;
1329
1330 memset(&element, 0, sizeof(element));
1331 ether_addr_copy(element.mac_addr, macaddr);
1332 element.vlan_tag = 0;
1333 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1334 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1335 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1336 if (ret)
1337 return -ENOENT;
1338
1339 return 0;
1340 }
1341
1342 /**
1343 * i40e_add_filter - Add a mac/vlan filter to the VSI
1344 * @vsi: the VSI to be searched
1345 * @macaddr: the MAC address
1346 * @vlan: the vlan
1347 * @is_vf: make sure its a VF filter, else doesn't matter
1348 * @is_netdev: make sure its a netdev filter, else doesn't matter
1349 *
1350 * Returns ptr to the filter object or NULL when no memory available.
1351 *
1352 * NOTE: This function is expected to be called with mac_filter_list_lock
1353 * being held.
1354 **/
1355 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1356 u8 *macaddr, s16 vlan,
1357 bool is_vf, bool is_netdev)
1358 {
1359 struct i40e_mac_filter *f;
1360
1361 if (!vsi || !macaddr)
1362 return NULL;
1363
1364 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1365 if (!f) {
1366 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1367 if (!f)
1368 goto add_filter_out;
1369
1370 ether_addr_copy(f->macaddr, macaddr);
1371 f->vlan = vlan;
1372 f->changed = true;
1373
1374 INIT_LIST_HEAD(&f->list);
1375 list_add_tail(&f->list, &vsi->mac_filter_list);
1376 }
1377
1378 /* increment counter and add a new flag if needed */
1379 if (is_vf) {
1380 if (!f->is_vf) {
1381 f->is_vf = true;
1382 f->counter++;
1383 }
1384 } else if (is_netdev) {
1385 if (!f->is_netdev) {
1386 f->is_netdev = true;
1387 f->counter++;
1388 }
1389 } else {
1390 f->counter++;
1391 }
1392
1393 /* changed tells sync_filters_subtask to
1394 * push the filter down to the firmware
1395 */
1396 if (f->changed) {
1397 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1398 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1399 }
1400
1401 add_filter_out:
1402 return f;
1403 }
1404
1405 /**
1406 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1407 * @vsi: the VSI to be searched
1408 * @macaddr: the MAC address
1409 * @vlan: the vlan
1410 * @is_vf: make sure it's a VF filter, else doesn't matter
1411 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1412 *
1413 * NOTE: This function is expected to be called with mac_filter_list_lock
1414 * being held.
1415 **/
1416 void i40e_del_filter(struct i40e_vsi *vsi,
1417 u8 *macaddr, s16 vlan,
1418 bool is_vf, bool is_netdev)
1419 {
1420 struct i40e_mac_filter *f;
1421
1422 if (!vsi || !macaddr)
1423 return;
1424
1425 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1426 if (!f || f->counter == 0)
1427 return;
1428
1429 if (is_vf) {
1430 if (f->is_vf) {
1431 f->is_vf = false;
1432 f->counter--;
1433 }
1434 } else if (is_netdev) {
1435 if (f->is_netdev) {
1436 f->is_netdev = false;
1437 f->counter--;
1438 }
1439 } else {
1440 /* make sure we don't remove a filter in use by VF or netdev */
1441 int min_f = 0;
1442
1443 min_f += (f->is_vf ? 1 : 0);
1444 min_f += (f->is_netdev ? 1 : 0);
1445
1446 if (f->counter > min_f)
1447 f->counter--;
1448 }
1449
1450 /* counter == 0 tells sync_filters_subtask to
1451 * remove the filter from the firmware's list
1452 */
1453 if (f->counter == 0) {
1454 f->changed = true;
1455 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1456 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1457 }
1458 }
1459
1460 /**
1461 * i40e_set_mac - NDO callback to set mac address
1462 * @netdev: network interface device structure
1463 * @p: pointer to an address structure
1464 *
1465 * Returns 0 on success, negative on failure
1466 **/
1467 #ifdef I40E_FCOE
1468 int i40e_set_mac(struct net_device *netdev, void *p)
1469 #else
1470 static int i40e_set_mac(struct net_device *netdev, void *p)
1471 #endif
1472 {
1473 struct i40e_netdev_priv *np = netdev_priv(netdev);
1474 struct i40e_vsi *vsi = np->vsi;
1475 struct i40e_pf *pf = vsi->back;
1476 struct i40e_hw *hw = &pf->hw;
1477 struct sockaddr *addr = p;
1478 struct i40e_mac_filter *f;
1479
1480 if (!is_valid_ether_addr(addr->sa_data))
1481 return -EADDRNOTAVAIL;
1482
1483 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1484 netdev_info(netdev, "already using mac address %pM\n",
1485 addr->sa_data);
1486 return 0;
1487 }
1488
1489 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1490 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1491 return -EADDRNOTAVAIL;
1492
1493 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1494 netdev_info(netdev, "returning to hw mac address %pM\n",
1495 hw->mac.addr);
1496 else
1497 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1498
1499 if (vsi->type == I40E_VSI_MAIN) {
1500 i40e_status ret;
1501
1502 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1503 I40E_AQC_WRITE_TYPE_LAA_WOL,
1504 addr->sa_data, NULL);
1505 if (ret) {
1506 netdev_info(netdev,
1507 "Addr change for Main VSI failed: %d\n",
1508 ret);
1509 return -EADDRNOTAVAIL;
1510 }
1511 }
1512
1513 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1514 struct i40e_aqc_remove_macvlan_element_data element;
1515
1516 memset(&element, 0, sizeof(element));
1517 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1518 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1519 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1520 } else {
1521 spin_lock_bh(&vsi->mac_filter_list_lock);
1522 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1523 false, false);
1524 spin_unlock_bh(&vsi->mac_filter_list_lock);
1525 }
1526
1527 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1528 struct i40e_aqc_add_macvlan_element_data element;
1529
1530 memset(&element, 0, sizeof(element));
1531 ether_addr_copy(element.mac_addr, hw->mac.addr);
1532 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1533 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1534 } else {
1535 spin_lock_bh(&vsi->mac_filter_list_lock);
1536 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1537 false, false);
1538 if (f)
1539 f->is_laa = true;
1540 spin_unlock_bh(&vsi->mac_filter_list_lock);
1541 }
1542
1543 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1544
1545 return i40e_sync_vsi_filters(vsi);
1546 }
1547
1548 /**
1549 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1550 * @vsi: the VSI being setup
1551 * @ctxt: VSI context structure
1552 * @enabled_tc: Enabled TCs bitmap
1553 * @is_add: True if called before Add VSI
1554 *
1555 * Setup VSI queue mapping for enabled traffic classes.
1556 **/
1557 #ifdef I40E_FCOE
1558 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1559 struct i40e_vsi_context *ctxt,
1560 u8 enabled_tc,
1561 bool is_add)
1562 #else
1563 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1564 struct i40e_vsi_context *ctxt,
1565 u8 enabled_tc,
1566 bool is_add)
1567 #endif
1568 {
1569 struct i40e_pf *pf = vsi->back;
1570 u16 sections = 0;
1571 u8 netdev_tc = 0;
1572 u16 numtc = 0;
1573 u16 qcount;
1574 u8 offset;
1575 u16 qmap;
1576 int i;
1577 u16 num_tc_qps = 0;
1578
1579 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1580 offset = 0;
1581
1582 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1583 /* Find numtc from enabled TC bitmap */
1584 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1585 if (enabled_tc & BIT(i)) /* TC is enabled */
1586 numtc++;
1587 }
1588 if (!numtc) {
1589 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1590 numtc = 1;
1591 }
1592 } else {
1593 /* At least TC0 is enabled in case of non-DCB case */
1594 numtc = 1;
1595 }
1596
1597 vsi->tc_config.numtc = numtc;
1598 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1599 /* Number of queues per enabled TC */
1600 /* In MFP case we can have a much lower count of MSIx
1601 * vectors available and so we need to lower the used
1602 * q count.
1603 */
1604 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1605 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1606 else
1607 qcount = vsi->alloc_queue_pairs;
1608 num_tc_qps = qcount / numtc;
1609 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1610
1611 /* Setup queue offset/count for all TCs for given VSI */
1612 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1613 /* See if the given TC is enabled for the given VSI */
1614 if (vsi->tc_config.enabled_tc & BIT(i)) {
1615 /* TC is enabled */
1616 int pow, num_qps;
1617
1618 switch (vsi->type) {
1619 case I40E_VSI_MAIN:
1620 qcount = min_t(int, pf->alloc_rss_size,
1621 num_tc_qps);
1622 break;
1623 #ifdef I40E_FCOE
1624 case I40E_VSI_FCOE:
1625 qcount = num_tc_qps;
1626 break;
1627 #endif
1628 case I40E_VSI_FDIR:
1629 case I40E_VSI_SRIOV:
1630 case I40E_VSI_VMDQ2:
1631 default:
1632 qcount = num_tc_qps;
1633 WARN_ON(i != 0);
1634 break;
1635 }
1636 vsi->tc_config.tc_info[i].qoffset = offset;
1637 vsi->tc_config.tc_info[i].qcount = qcount;
1638
1639 /* find the next higher power-of-2 of num queue pairs */
1640 num_qps = qcount;
1641 pow = 0;
1642 while (num_qps && (BIT_ULL(pow) < qcount)) {
1643 pow++;
1644 num_qps >>= 1;
1645 }
1646
1647 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1648 qmap =
1649 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1650 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1651
1652 offset += qcount;
1653 } else {
1654 /* TC is not enabled so set the offset to
1655 * default queue and allocate one queue
1656 * for the given TC.
1657 */
1658 vsi->tc_config.tc_info[i].qoffset = 0;
1659 vsi->tc_config.tc_info[i].qcount = 1;
1660 vsi->tc_config.tc_info[i].netdev_tc = 0;
1661
1662 qmap = 0;
1663 }
1664 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1665 }
1666
1667 /* Set actual Tx/Rx queue pairs */
1668 vsi->num_queue_pairs = offset;
1669 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1670 if (vsi->req_queue_pairs > 0)
1671 vsi->num_queue_pairs = vsi->req_queue_pairs;
1672 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1673 vsi->num_queue_pairs = pf->num_lan_msix;
1674 }
1675
1676 /* Scheduler section valid can only be set for ADD VSI */
1677 if (is_add) {
1678 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1679
1680 ctxt->info.up_enable_bits = enabled_tc;
1681 }
1682 if (vsi->type == I40E_VSI_SRIOV) {
1683 ctxt->info.mapping_flags |=
1684 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1685 for (i = 0; i < vsi->num_queue_pairs; i++)
1686 ctxt->info.queue_mapping[i] =
1687 cpu_to_le16(vsi->base_queue + i);
1688 } else {
1689 ctxt->info.mapping_flags |=
1690 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1691 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1692 }
1693 ctxt->info.valid_sections |= cpu_to_le16(sections);
1694 }
1695
1696 /**
1697 * i40e_set_rx_mode - NDO callback to set the netdev filters
1698 * @netdev: network interface device structure
1699 **/
1700 #ifdef I40E_FCOE
1701 void i40e_set_rx_mode(struct net_device *netdev)
1702 #else
1703 static void i40e_set_rx_mode(struct net_device *netdev)
1704 #endif
1705 {
1706 struct i40e_netdev_priv *np = netdev_priv(netdev);
1707 struct i40e_mac_filter *f, *ftmp;
1708 struct i40e_vsi *vsi = np->vsi;
1709 struct netdev_hw_addr *uca;
1710 struct netdev_hw_addr *mca;
1711 struct netdev_hw_addr *ha;
1712
1713 spin_lock_bh(&vsi->mac_filter_list_lock);
1714
1715 /* add addr if not already in the filter list */
1716 netdev_for_each_uc_addr(uca, netdev) {
1717 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1718 if (i40e_is_vsi_in_vlan(vsi))
1719 i40e_put_mac_in_vlan(vsi, uca->addr,
1720 false, true);
1721 else
1722 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1723 false, true);
1724 }
1725 }
1726
1727 netdev_for_each_mc_addr(mca, netdev) {
1728 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1729 if (i40e_is_vsi_in_vlan(vsi))
1730 i40e_put_mac_in_vlan(vsi, mca->addr,
1731 false, true);
1732 else
1733 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1734 false, true);
1735 }
1736 }
1737
1738 /* remove filter if not in netdev list */
1739 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1740
1741 if (!f->is_netdev)
1742 continue;
1743
1744 netdev_for_each_mc_addr(mca, netdev)
1745 if (ether_addr_equal(mca->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1747
1748 netdev_for_each_uc_addr(uca, netdev)
1749 if (ether_addr_equal(uca->addr, f->macaddr))
1750 goto bottom_of_search_loop;
1751
1752 for_each_dev_addr(netdev, ha)
1753 if (ether_addr_equal(ha->addr, f->macaddr))
1754 goto bottom_of_search_loop;
1755
1756 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1757 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1758
1759 bottom_of_search_loop:
1760 continue;
1761 }
1762 spin_unlock_bh(&vsi->mac_filter_list_lock);
1763
1764 /* check for other flag changes */
1765 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1766 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1767 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1768 }
1769 }
1770
1771 /**
1772 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1773 * @src: source MAC filter entry to be clones
1774 *
1775 * Returns the pointer to newly cloned MAC filter entry or NULL
1776 * in case of error
1777 **/
1778 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1779 struct i40e_mac_filter *src)
1780 {
1781 struct i40e_mac_filter *f;
1782
1783 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1784 if (!f)
1785 return NULL;
1786 *f = *src;
1787
1788 INIT_LIST_HEAD(&f->list);
1789
1790 return f;
1791 }
1792
1793 /**
1794 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1795 * @vsi: pointer to vsi struct
1796 * @from: Pointer to list which contains MAC filter entries - changes to
1797 * those entries needs to be undone.
1798 *
1799 * MAC filter entries from list were slated to be removed from device.
1800 **/
1801 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1802 struct list_head *from)
1803 {
1804 struct i40e_mac_filter *f, *ftmp;
1805
1806 list_for_each_entry_safe(f, ftmp, from, list) {
1807 f->changed = true;
1808 /* Move the element back into MAC filter list*/
1809 list_move_tail(&f->list, &vsi->mac_filter_list);
1810 }
1811 }
1812
1813 /**
1814 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1815 * @vsi: pointer to vsi struct
1816 *
1817 * MAC filter entries from list were slated to be added from device.
1818 **/
1819 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1820 {
1821 struct i40e_mac_filter *f, *ftmp;
1822
1823 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1824 if (!f->changed && f->counter)
1825 f->changed = true;
1826 }
1827 }
1828
1829 /**
1830 * i40e_cleanup_add_list - Deletes the element from add list and release
1831 * memory
1832 * @add_list: Pointer to list which contains MAC filter entries
1833 **/
1834 static void i40e_cleanup_add_list(struct list_head *add_list)
1835 {
1836 struct i40e_mac_filter *f, *ftmp;
1837
1838 list_for_each_entry_safe(f, ftmp, add_list, list) {
1839 list_del(&f->list);
1840 kfree(f);
1841 }
1842 }
1843
1844 /**
1845 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1846 * @vsi: ptr to the VSI
1847 *
1848 * Push any outstanding VSI filter changes through the AdminQ.
1849 *
1850 * Returns 0 or error value
1851 **/
1852 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1853 {
1854 struct list_head tmp_del_list, tmp_add_list;
1855 struct i40e_mac_filter *f, *ftmp, *fclone;
1856 bool promisc_forced_on = false;
1857 bool add_happened = false;
1858 int filter_list_len = 0;
1859 u32 changed_flags = 0;
1860 i40e_status aq_ret = 0;
1861 bool err_cond = false;
1862 int retval = 0;
1863 struct i40e_pf *pf;
1864 int num_add = 0;
1865 int num_del = 0;
1866 int aq_err = 0;
1867 u16 cmd_flags;
1868
1869 /* empty array typed pointers, kcalloc later */
1870 struct i40e_aqc_add_macvlan_element_data *add_list;
1871 struct i40e_aqc_remove_macvlan_element_data *del_list;
1872
1873 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1874 usleep_range(1000, 2000);
1875 pf = vsi->back;
1876
1877 if (vsi->netdev) {
1878 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1879 vsi->current_netdev_flags = vsi->netdev->flags;
1880 }
1881
1882 INIT_LIST_HEAD(&tmp_del_list);
1883 INIT_LIST_HEAD(&tmp_add_list);
1884
1885 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1886 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1887
1888 spin_lock_bh(&vsi->mac_filter_list_lock);
1889 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1890 if (!f->changed)
1891 continue;
1892
1893 if (f->counter != 0)
1894 continue;
1895 f->changed = false;
1896
1897 /* Move the element into temporary del_list */
1898 list_move_tail(&f->list, &tmp_del_list);
1899 }
1900
1901 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1902 if (!f->changed)
1903 continue;
1904
1905 if (f->counter == 0)
1906 continue;
1907 f->changed = false;
1908
1909 /* Clone MAC filter entry and add into temporary list */
1910 fclone = i40e_mac_filter_entry_clone(f);
1911 if (!fclone) {
1912 err_cond = true;
1913 break;
1914 }
1915 list_add_tail(&fclone->list, &tmp_add_list);
1916 }
1917
1918 /* if failed to clone MAC filter entry - undo */
1919 if (err_cond) {
1920 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1921 i40e_undo_add_filter_entries(vsi);
1922 }
1923 spin_unlock_bh(&vsi->mac_filter_list_lock);
1924
1925 if (err_cond) {
1926 i40e_cleanup_add_list(&tmp_add_list);
1927 retval = -ENOMEM;
1928 goto out;
1929 }
1930 }
1931
1932 /* Now process 'del_list' outside the lock */
1933 if (!list_empty(&tmp_del_list)) {
1934 int del_list_size;
1935
1936 filter_list_len = pf->hw.aq.asq_buf_size /
1937 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1938 del_list_size = filter_list_len *
1939 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1940 del_list = kzalloc(del_list_size, GFP_KERNEL);
1941 if (!del_list) {
1942 i40e_cleanup_add_list(&tmp_add_list);
1943
1944 /* Undo VSI's MAC filter entry element updates */
1945 spin_lock_bh(&vsi->mac_filter_list_lock);
1946 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1947 i40e_undo_add_filter_entries(vsi);
1948 spin_unlock_bh(&vsi->mac_filter_list_lock);
1949 retval = -ENOMEM;
1950 goto out;
1951 }
1952
1953 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1954 cmd_flags = 0;
1955
1956 /* add to delete list */
1957 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1958 del_list[num_del].vlan_tag =
1959 cpu_to_le16((u16)(f->vlan ==
1960 I40E_VLAN_ANY ? 0 : f->vlan));
1961
1962 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1963 del_list[num_del].flags = cmd_flags;
1964 num_del++;
1965
1966 /* flush a full buffer */
1967 if (num_del == filter_list_len) {
1968 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1969 vsi->seid,
1970 del_list,
1971 num_del,
1972 NULL);
1973 aq_err = pf->hw.aq.asq_last_status;
1974 num_del = 0;
1975 memset(del_list, 0, del_list_size);
1976
1977 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1978 retval = -EIO;
1979 dev_err(&pf->pdev->dev,
1980 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1981 i40e_stat_str(&pf->hw, aq_ret),
1982 i40e_aq_str(&pf->hw, aq_err));
1983 }
1984 }
1985 /* Release memory for MAC filter entries which were
1986 * synced up with HW.
1987 */
1988 list_del(&f->list);
1989 kfree(f);
1990 }
1991
1992 if (num_del) {
1993 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1994 del_list, num_del,
1995 NULL);
1996 aq_err = pf->hw.aq.asq_last_status;
1997 num_del = 0;
1998
1999 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
2000 dev_info(&pf->pdev->dev,
2001 "ignoring delete macvlan error, err %s aq_err %s\n",
2002 i40e_stat_str(&pf->hw, aq_ret),
2003 i40e_aq_str(&pf->hw, aq_err));
2004 }
2005
2006 kfree(del_list);
2007 del_list = NULL;
2008 }
2009
2010 if (!list_empty(&tmp_add_list)) {
2011 int add_list_size;
2012
2013 /* do all the adds now */
2014 filter_list_len = pf->hw.aq.asq_buf_size /
2015 sizeof(struct i40e_aqc_add_macvlan_element_data),
2016 add_list_size = filter_list_len *
2017 sizeof(struct i40e_aqc_add_macvlan_element_data);
2018 add_list = kzalloc(add_list_size, GFP_KERNEL);
2019 if (!add_list) {
2020 /* Purge element from temporary lists */
2021 i40e_cleanup_add_list(&tmp_add_list);
2022
2023 /* Undo add filter entries from VSI MAC filter list */
2024 spin_lock_bh(&vsi->mac_filter_list_lock);
2025 i40e_undo_add_filter_entries(vsi);
2026 spin_unlock_bh(&vsi->mac_filter_list_lock);
2027 retval = -ENOMEM;
2028 goto out;
2029 }
2030
2031 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2032
2033 add_happened = true;
2034 cmd_flags = 0;
2035
2036 /* add to add array */
2037 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2038 add_list[num_add].vlan_tag =
2039 cpu_to_le16(
2040 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2041 add_list[num_add].queue_number = 0;
2042
2043 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2044 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2045 num_add++;
2046
2047 /* flush a full buffer */
2048 if (num_add == filter_list_len) {
2049 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2050 add_list, num_add,
2051 NULL);
2052 aq_err = pf->hw.aq.asq_last_status;
2053 num_add = 0;
2054
2055 if (aq_ret)
2056 break;
2057 memset(add_list, 0, add_list_size);
2058 }
2059 /* Entries from tmp_add_list were cloned from MAC
2060 * filter list, hence clean those cloned entries
2061 */
2062 list_del(&f->list);
2063 kfree(f);
2064 }
2065
2066 if (num_add) {
2067 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
2068 add_list, num_add, NULL);
2069 aq_err = pf->hw.aq.asq_last_status;
2070 num_add = 0;
2071 }
2072 kfree(add_list);
2073 add_list = NULL;
2074
2075 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2076 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2077 dev_info(&pf->pdev->dev,
2078 "add filter failed, err %s aq_err %s\n",
2079 i40e_stat_str(&pf->hw, aq_ret),
2080 i40e_aq_str(&pf->hw, aq_err));
2081 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2082 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2083 &vsi->state)) {
2084 promisc_forced_on = true;
2085 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2086 &vsi->state);
2087 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2088 }
2089 }
2090 }
2091
2092 /* check for changes in promiscuous modes */
2093 if (changed_flags & IFF_ALLMULTI) {
2094 bool cur_multipromisc;
2095
2096 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2097 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2098 vsi->seid,
2099 cur_multipromisc,
2100 NULL);
2101 if (aq_ret) {
2102 retval = i40e_aq_rc_to_posix(aq_ret,
2103 pf->hw.aq.asq_last_status);
2104 dev_info(&pf->pdev->dev,
2105 "set multi promisc failed, err %s aq_err %s\n",
2106 i40e_stat_str(&pf->hw, aq_ret),
2107 i40e_aq_str(&pf->hw,
2108 pf->hw.aq.asq_last_status));
2109 }
2110 }
2111 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2112 bool cur_promisc;
2113
2114 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2115 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2116 &vsi->state));
2117 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
2118 /* set defport ON for Main VSI instead of true promisc
2119 * this way we will get all unicast/multicast and VLAN
2120 * promisc behavior but will not get VF or VMDq traffic
2121 * replicated on the Main VSI.
2122 */
2123 if (pf->cur_promisc != cur_promisc) {
2124 pf->cur_promisc = cur_promisc;
2125 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2126 }
2127 } else {
2128 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2129 &vsi->back->hw,
2130 vsi->seid,
2131 cur_promisc, NULL);
2132 if (aq_ret) {
2133 retval =
2134 i40e_aq_rc_to_posix(aq_ret,
2135 pf->hw.aq.asq_last_status);
2136 dev_info(&pf->pdev->dev,
2137 "set unicast promisc failed, err %d, aq_err %d\n",
2138 aq_ret, pf->hw.aq.asq_last_status);
2139 }
2140 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2141 &vsi->back->hw,
2142 vsi->seid,
2143 cur_promisc, NULL);
2144 if (aq_ret) {
2145 retval =
2146 i40e_aq_rc_to_posix(aq_ret,
2147 pf->hw.aq.asq_last_status);
2148 dev_info(&pf->pdev->dev,
2149 "set multicast promisc failed, err %d, aq_err %d\n",
2150 aq_ret, pf->hw.aq.asq_last_status);
2151 }
2152 }
2153 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2154 vsi->seid,
2155 cur_promisc, NULL);
2156 if (aq_ret) {
2157 retval = i40e_aq_rc_to_posix(aq_ret,
2158 pf->hw.aq.asq_last_status);
2159 dev_info(&pf->pdev->dev,
2160 "set brdcast promisc failed, err %s, aq_err %s\n",
2161 i40e_stat_str(&pf->hw, aq_ret),
2162 i40e_aq_str(&pf->hw,
2163 pf->hw.aq.asq_last_status));
2164 }
2165 }
2166 out:
2167 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2168 return retval;
2169 }
2170
2171 /**
2172 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2173 * @pf: board private structure
2174 **/
2175 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2176 {
2177 int v;
2178
2179 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2180 return;
2181 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2182
2183 for (v = 0; v < pf->num_alloc_vsi; v++) {
2184 if (pf->vsi[v] &&
2185 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2186 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2187
2188 if (ret) {
2189 /* come back and try again later */
2190 pf->flags |= I40E_FLAG_FILTER_SYNC;
2191 break;
2192 }
2193 }
2194 }
2195 }
2196
2197 /**
2198 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2199 * @netdev: network interface device structure
2200 * @new_mtu: new value for maximum frame size
2201 *
2202 * Returns 0 on success, negative on failure
2203 **/
2204 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2205 {
2206 struct i40e_netdev_priv *np = netdev_priv(netdev);
2207 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2208 struct i40e_vsi *vsi = np->vsi;
2209
2210 /* MTU < 68 is an error and causes problems on some kernels */
2211 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2212 return -EINVAL;
2213
2214 netdev_info(netdev, "changing MTU from %d to %d\n",
2215 netdev->mtu, new_mtu);
2216 netdev->mtu = new_mtu;
2217 if (netif_running(netdev))
2218 i40e_vsi_reinit_locked(vsi);
2219
2220 return 0;
2221 }
2222
2223 /**
2224 * i40e_ioctl - Access the hwtstamp interface
2225 * @netdev: network interface device structure
2226 * @ifr: interface request data
2227 * @cmd: ioctl command
2228 **/
2229 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2230 {
2231 struct i40e_netdev_priv *np = netdev_priv(netdev);
2232 struct i40e_pf *pf = np->vsi->back;
2233
2234 switch (cmd) {
2235 case SIOCGHWTSTAMP:
2236 return i40e_ptp_get_ts_config(pf, ifr);
2237 case SIOCSHWTSTAMP:
2238 return i40e_ptp_set_ts_config(pf, ifr);
2239 default:
2240 return -EOPNOTSUPP;
2241 }
2242 }
2243
2244 /**
2245 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2246 * @vsi: the vsi being adjusted
2247 **/
2248 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2249 {
2250 struct i40e_vsi_context ctxt;
2251 i40e_status ret;
2252
2253 if ((vsi->info.valid_sections &
2254 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2255 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2256 return; /* already enabled */
2257
2258 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2259 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2260 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2261
2262 ctxt.seid = vsi->seid;
2263 ctxt.info = vsi->info;
2264 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2265 if (ret) {
2266 dev_info(&vsi->back->pdev->dev,
2267 "update vlan stripping failed, err %s aq_err %s\n",
2268 i40e_stat_str(&vsi->back->hw, ret),
2269 i40e_aq_str(&vsi->back->hw,
2270 vsi->back->hw.aq.asq_last_status));
2271 }
2272 }
2273
2274 /**
2275 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2276 * @vsi: the vsi being adjusted
2277 **/
2278 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2279 {
2280 struct i40e_vsi_context ctxt;
2281 i40e_status ret;
2282
2283 if ((vsi->info.valid_sections &
2284 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2285 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2286 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2287 return; /* already disabled */
2288
2289 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2290 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2291 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2292
2293 ctxt.seid = vsi->seid;
2294 ctxt.info = vsi->info;
2295 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2296 if (ret) {
2297 dev_info(&vsi->back->pdev->dev,
2298 "update vlan stripping failed, err %s aq_err %s\n",
2299 i40e_stat_str(&vsi->back->hw, ret),
2300 i40e_aq_str(&vsi->back->hw,
2301 vsi->back->hw.aq.asq_last_status));
2302 }
2303 }
2304
2305 /**
2306 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2307 * @netdev: network interface to be adjusted
2308 * @features: netdev features to test if VLAN offload is enabled or not
2309 **/
2310 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2311 {
2312 struct i40e_netdev_priv *np = netdev_priv(netdev);
2313 struct i40e_vsi *vsi = np->vsi;
2314
2315 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2316 i40e_vlan_stripping_enable(vsi);
2317 else
2318 i40e_vlan_stripping_disable(vsi);
2319 }
2320
2321 /**
2322 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2323 * @vsi: the vsi being configured
2324 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2325 **/
2326 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2327 {
2328 struct i40e_mac_filter *f, *add_f;
2329 bool is_netdev, is_vf;
2330
2331 is_vf = (vsi->type == I40E_VSI_SRIOV);
2332 is_netdev = !!(vsi->netdev);
2333
2334 /* Locked once because all functions invoked below iterates list*/
2335 spin_lock_bh(&vsi->mac_filter_list_lock);
2336
2337 if (is_netdev) {
2338 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2339 is_vf, is_netdev);
2340 if (!add_f) {
2341 dev_info(&vsi->back->pdev->dev,
2342 "Could not add vlan filter %d for %pM\n",
2343 vid, vsi->netdev->dev_addr);
2344 spin_unlock_bh(&vsi->mac_filter_list_lock);
2345 return -ENOMEM;
2346 }
2347 }
2348
2349 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2350 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2351 if (!add_f) {
2352 dev_info(&vsi->back->pdev->dev,
2353 "Could not add vlan filter %d for %pM\n",
2354 vid, f->macaddr);
2355 spin_unlock_bh(&vsi->mac_filter_list_lock);
2356 return -ENOMEM;
2357 }
2358 }
2359
2360 /* Now if we add a vlan tag, make sure to check if it is the first
2361 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2362 * with 0, so we now accept untagged and specified tagged traffic
2363 * (and not any taged and untagged)
2364 */
2365 if (vid > 0) {
2366 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2367 I40E_VLAN_ANY,
2368 is_vf, is_netdev)) {
2369 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2370 I40E_VLAN_ANY, is_vf, is_netdev);
2371 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2372 is_vf, is_netdev);
2373 if (!add_f) {
2374 dev_info(&vsi->back->pdev->dev,
2375 "Could not add filter 0 for %pM\n",
2376 vsi->netdev->dev_addr);
2377 spin_unlock_bh(&vsi->mac_filter_list_lock);
2378 return -ENOMEM;
2379 }
2380 }
2381 }
2382
2383 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2384 if (vid > 0 && !vsi->info.pvid) {
2385 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2386 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2387 is_vf, is_netdev))
2388 continue;
2389 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2390 is_vf, is_netdev);
2391 add_f = i40e_add_filter(vsi, f->macaddr,
2392 0, is_vf, is_netdev);
2393 if (!add_f) {
2394 dev_info(&vsi->back->pdev->dev,
2395 "Could not add filter 0 for %pM\n",
2396 f->macaddr);
2397 spin_unlock_bh(&vsi->mac_filter_list_lock);
2398 return -ENOMEM;
2399 }
2400 }
2401 }
2402
2403 spin_unlock_bh(&vsi->mac_filter_list_lock);
2404
2405 /* schedule our worker thread which will take care of
2406 * applying the new filter changes
2407 */
2408 i40e_service_event_schedule(vsi->back);
2409 return 0;
2410 }
2411
2412 /**
2413 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2414 * @vsi: the vsi being configured
2415 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2416 *
2417 * Return: 0 on success or negative otherwise
2418 **/
2419 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2420 {
2421 struct net_device *netdev = vsi->netdev;
2422 struct i40e_mac_filter *f, *add_f;
2423 bool is_vf, is_netdev;
2424 int filter_count = 0;
2425
2426 is_vf = (vsi->type == I40E_VSI_SRIOV);
2427 is_netdev = !!(netdev);
2428
2429 /* Locked once because all functions invoked below iterates list */
2430 spin_lock_bh(&vsi->mac_filter_list_lock);
2431
2432 if (is_netdev)
2433 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2434
2435 list_for_each_entry(f, &vsi->mac_filter_list, list)
2436 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2437
2438 /* go through all the filters for this VSI and if there is only
2439 * vid == 0 it means there are no other filters, so vid 0 must
2440 * be replaced with -1. This signifies that we should from now
2441 * on accept any traffic (with any tag present, or untagged)
2442 */
2443 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2444 if (is_netdev) {
2445 if (f->vlan &&
2446 ether_addr_equal(netdev->dev_addr, f->macaddr))
2447 filter_count++;
2448 }
2449
2450 if (f->vlan)
2451 filter_count++;
2452 }
2453
2454 if (!filter_count && is_netdev) {
2455 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2456 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2457 is_vf, is_netdev);
2458 if (!f) {
2459 dev_info(&vsi->back->pdev->dev,
2460 "Could not add filter %d for %pM\n",
2461 I40E_VLAN_ANY, netdev->dev_addr);
2462 spin_unlock_bh(&vsi->mac_filter_list_lock);
2463 return -ENOMEM;
2464 }
2465 }
2466
2467 if (!filter_count) {
2468 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2469 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2470 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2471 is_vf, is_netdev);
2472 if (!add_f) {
2473 dev_info(&vsi->back->pdev->dev,
2474 "Could not add filter %d for %pM\n",
2475 I40E_VLAN_ANY, f->macaddr);
2476 spin_unlock_bh(&vsi->mac_filter_list_lock);
2477 return -ENOMEM;
2478 }
2479 }
2480 }
2481
2482 spin_unlock_bh(&vsi->mac_filter_list_lock);
2483
2484 /* schedule our worker thread which will take care of
2485 * applying the new filter changes
2486 */
2487 i40e_service_event_schedule(vsi->back);
2488 return 0;
2489 }
2490
2491 /**
2492 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2493 * @netdev: network interface to be adjusted
2494 * @vid: vlan id to be added
2495 *
2496 * net_device_ops implementation for adding vlan ids
2497 **/
2498 #ifdef I40E_FCOE
2499 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2500 __always_unused __be16 proto, u16 vid)
2501 #else
2502 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2503 __always_unused __be16 proto, u16 vid)
2504 #endif
2505 {
2506 struct i40e_netdev_priv *np = netdev_priv(netdev);
2507 struct i40e_vsi *vsi = np->vsi;
2508 int ret = 0;
2509
2510 if (vid > 4095)
2511 return -EINVAL;
2512
2513 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2514
2515 /* If the network stack called us with vid = 0 then
2516 * it is asking to receive priority tagged packets with
2517 * vlan id 0. Our HW receives them by default when configured
2518 * to receive untagged packets so there is no need to add an
2519 * extra filter for vlan 0 tagged packets.
2520 */
2521 if (vid)
2522 ret = i40e_vsi_add_vlan(vsi, vid);
2523
2524 if (!ret && (vid < VLAN_N_VID))
2525 set_bit(vid, vsi->active_vlans);
2526
2527 return ret;
2528 }
2529
2530 /**
2531 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2532 * @netdev: network interface to be adjusted
2533 * @vid: vlan id to be removed
2534 *
2535 * net_device_ops implementation for removing vlan ids
2536 **/
2537 #ifdef I40E_FCOE
2538 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2539 __always_unused __be16 proto, u16 vid)
2540 #else
2541 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2542 __always_unused __be16 proto, u16 vid)
2543 #endif
2544 {
2545 struct i40e_netdev_priv *np = netdev_priv(netdev);
2546 struct i40e_vsi *vsi = np->vsi;
2547
2548 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2549
2550 /* return code is ignored as there is nothing a user
2551 * can do about failure to remove and a log message was
2552 * already printed from the other function
2553 */
2554 i40e_vsi_kill_vlan(vsi, vid);
2555
2556 clear_bit(vid, vsi->active_vlans);
2557
2558 return 0;
2559 }
2560
2561 /**
2562 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2563 * @vsi: the vsi being brought back up
2564 **/
2565 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2566 {
2567 u16 vid;
2568
2569 if (!vsi->netdev)
2570 return;
2571
2572 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2573
2574 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2575 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2576 vid);
2577 }
2578
2579 /**
2580 * i40e_vsi_add_pvid - Add pvid for the VSI
2581 * @vsi: the vsi being adjusted
2582 * @vid: the vlan id to set as a PVID
2583 **/
2584 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2585 {
2586 struct i40e_vsi_context ctxt;
2587 i40e_status ret;
2588
2589 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2590 vsi->info.pvid = cpu_to_le16(vid);
2591 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2592 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2593 I40E_AQ_VSI_PVLAN_EMOD_STR;
2594
2595 ctxt.seid = vsi->seid;
2596 ctxt.info = vsi->info;
2597 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2598 if (ret) {
2599 dev_info(&vsi->back->pdev->dev,
2600 "add pvid failed, err %s aq_err %s\n",
2601 i40e_stat_str(&vsi->back->hw, ret),
2602 i40e_aq_str(&vsi->back->hw,
2603 vsi->back->hw.aq.asq_last_status));
2604 return -ENOENT;
2605 }
2606
2607 return 0;
2608 }
2609
2610 /**
2611 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2612 * @vsi: the vsi being adjusted
2613 *
2614 * Just use the vlan_rx_register() service to put it back to normal
2615 **/
2616 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2617 {
2618 i40e_vlan_stripping_disable(vsi);
2619
2620 vsi->info.pvid = 0;
2621 }
2622
2623 /**
2624 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2625 * @vsi: ptr to the VSI
2626 *
2627 * If this function returns with an error, then it's possible one or
2628 * more of the rings is populated (while the rest are not). It is the
2629 * callers duty to clean those orphaned rings.
2630 *
2631 * Return 0 on success, negative on failure
2632 **/
2633 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2634 {
2635 int i, err = 0;
2636
2637 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2638 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2639
2640 return err;
2641 }
2642
2643 /**
2644 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2645 * @vsi: ptr to the VSI
2646 *
2647 * Free VSI's transmit software resources
2648 **/
2649 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2650 {
2651 int i;
2652
2653 if (!vsi->tx_rings)
2654 return;
2655
2656 for (i = 0; i < vsi->num_queue_pairs; i++)
2657 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2658 i40e_free_tx_resources(vsi->tx_rings[i]);
2659 }
2660
2661 /**
2662 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2663 * @vsi: ptr to the VSI
2664 *
2665 * If this function returns with an error, then it's possible one or
2666 * more of the rings is populated (while the rest are not). It is the
2667 * callers duty to clean those orphaned rings.
2668 *
2669 * Return 0 on success, negative on failure
2670 **/
2671 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2672 {
2673 int i, err = 0;
2674
2675 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2676 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2677 #ifdef I40E_FCOE
2678 i40e_fcoe_setup_ddp_resources(vsi);
2679 #endif
2680 return err;
2681 }
2682
2683 /**
2684 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2685 * @vsi: ptr to the VSI
2686 *
2687 * Free all receive software resources
2688 **/
2689 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2690 {
2691 int i;
2692
2693 if (!vsi->rx_rings)
2694 return;
2695
2696 for (i = 0; i < vsi->num_queue_pairs; i++)
2697 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2698 i40e_free_rx_resources(vsi->rx_rings[i]);
2699 #ifdef I40E_FCOE
2700 i40e_fcoe_free_ddp_resources(vsi);
2701 #endif
2702 }
2703
2704 /**
2705 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2706 * @ring: The Tx ring to configure
2707 *
2708 * This enables/disables XPS for a given Tx descriptor ring
2709 * based on the TCs enabled for the VSI that ring belongs to.
2710 **/
2711 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2712 {
2713 struct i40e_vsi *vsi = ring->vsi;
2714 cpumask_var_t mask;
2715
2716 if (!ring->q_vector || !ring->netdev)
2717 return;
2718
2719 /* Single TC mode enable XPS */
2720 if (vsi->tc_config.numtc <= 1) {
2721 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2722 netif_set_xps_queue(ring->netdev,
2723 &ring->q_vector->affinity_mask,
2724 ring->queue_index);
2725 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2726 /* Disable XPS to allow selection based on TC */
2727 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2728 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2729 free_cpumask_var(mask);
2730 }
2731
2732 /* schedule our worker thread which will take care of
2733 * applying the new filter changes
2734 */
2735 i40e_service_event_schedule(vsi->back);
2736 }
2737
2738 /**
2739 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2740 * @ring: The Tx ring to configure
2741 *
2742 * Configure the Tx descriptor ring in the HMC context.
2743 **/
2744 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2745 {
2746 struct i40e_vsi *vsi = ring->vsi;
2747 u16 pf_q = vsi->base_queue + ring->queue_index;
2748 struct i40e_hw *hw = &vsi->back->hw;
2749 struct i40e_hmc_obj_txq tx_ctx;
2750 i40e_status err = 0;
2751 u32 qtx_ctl = 0;
2752
2753 /* some ATR related tx ring init */
2754 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2755 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2756 ring->atr_count = 0;
2757 } else {
2758 ring->atr_sample_rate = 0;
2759 }
2760
2761 /* configure XPS */
2762 i40e_config_xps_tx_ring(ring);
2763
2764 /* clear the context structure first */
2765 memset(&tx_ctx, 0, sizeof(tx_ctx));
2766
2767 tx_ctx.new_context = 1;
2768 tx_ctx.base = (ring->dma / 128);
2769 tx_ctx.qlen = ring->count;
2770 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2771 I40E_FLAG_FD_ATR_ENABLED));
2772 #ifdef I40E_FCOE
2773 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2774 #endif
2775 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2776 /* FDIR VSI tx ring can still use RS bit and writebacks */
2777 if (vsi->type != I40E_VSI_FDIR)
2778 tx_ctx.head_wb_ena = 1;
2779 tx_ctx.head_wb_addr = ring->dma +
2780 (ring->count * sizeof(struct i40e_tx_desc));
2781
2782 /* As part of VSI creation/update, FW allocates certain
2783 * Tx arbitration queue sets for each TC enabled for
2784 * the VSI. The FW returns the handles to these queue
2785 * sets as part of the response buffer to Add VSI,
2786 * Update VSI, etc. AQ commands. It is expected that
2787 * these queue set handles be associated with the Tx
2788 * queues by the driver as part of the TX queue context
2789 * initialization. This has to be done regardless of
2790 * DCB as by default everything is mapped to TC0.
2791 */
2792 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2793 tx_ctx.rdylist_act = 0;
2794
2795 /* clear the context in the HMC */
2796 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2797 if (err) {
2798 dev_info(&vsi->back->pdev->dev,
2799 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2800 ring->queue_index, pf_q, err);
2801 return -ENOMEM;
2802 }
2803
2804 /* set the context in the HMC */
2805 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2806 if (err) {
2807 dev_info(&vsi->back->pdev->dev,
2808 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2809 ring->queue_index, pf_q, err);
2810 return -ENOMEM;
2811 }
2812
2813 /* Now associate this queue with this PCI function */
2814 if (vsi->type == I40E_VSI_VMDQ2) {
2815 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2816 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2817 I40E_QTX_CTL_VFVM_INDX_MASK;
2818 } else {
2819 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2820 }
2821
2822 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2823 I40E_QTX_CTL_PF_INDX_MASK);
2824 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2825 i40e_flush(hw);
2826
2827 /* cache tail off for easier writes later */
2828 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2829
2830 return 0;
2831 }
2832
2833 /**
2834 * i40e_configure_rx_ring - Configure a receive ring context
2835 * @ring: The Rx ring to configure
2836 *
2837 * Configure the Rx descriptor ring in the HMC context.
2838 **/
2839 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2840 {
2841 struct i40e_vsi *vsi = ring->vsi;
2842 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2843 u16 pf_q = vsi->base_queue + ring->queue_index;
2844 struct i40e_hw *hw = &vsi->back->hw;
2845 struct i40e_hmc_obj_rxq rx_ctx;
2846 i40e_status err = 0;
2847
2848 ring->state = 0;
2849
2850 /* clear the context structure first */
2851 memset(&rx_ctx, 0, sizeof(rx_ctx));
2852
2853 ring->rx_buf_len = vsi->rx_buf_len;
2854 ring->rx_hdr_len = vsi->rx_hdr_len;
2855
2856 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2857 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2858
2859 rx_ctx.base = (ring->dma / 128);
2860 rx_ctx.qlen = ring->count;
2861
2862 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2863 set_ring_16byte_desc_enabled(ring);
2864 rx_ctx.dsize = 0;
2865 } else {
2866 rx_ctx.dsize = 1;
2867 }
2868
2869 rx_ctx.dtype = vsi->dtype;
2870 if (vsi->dtype) {
2871 set_ring_ps_enabled(ring);
2872 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2873 I40E_RX_SPLIT_IP |
2874 I40E_RX_SPLIT_TCP_UDP |
2875 I40E_RX_SPLIT_SCTP;
2876 } else {
2877 rx_ctx.hsplit_0 = 0;
2878 }
2879
2880 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2881 (chain_len * ring->rx_buf_len));
2882 if (hw->revision_id == 0)
2883 rx_ctx.lrxqthresh = 0;
2884 else
2885 rx_ctx.lrxqthresh = 2;
2886 rx_ctx.crcstrip = 1;
2887 rx_ctx.l2tsel = 1;
2888 /* this controls whether VLAN is stripped from inner headers */
2889 rx_ctx.showiv = 0;
2890 #ifdef I40E_FCOE
2891 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2892 #endif
2893 /* set the prefena field to 1 because the manual says to */
2894 rx_ctx.prefena = 1;
2895
2896 /* clear the context in the HMC */
2897 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2898 if (err) {
2899 dev_info(&vsi->back->pdev->dev,
2900 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2901 ring->queue_index, pf_q, err);
2902 return -ENOMEM;
2903 }
2904
2905 /* set the context in the HMC */
2906 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2907 if (err) {
2908 dev_info(&vsi->back->pdev->dev,
2909 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2910 ring->queue_index, pf_q, err);
2911 return -ENOMEM;
2912 }
2913
2914 /* cache tail for quicker writes, and clear the reg before use */
2915 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2916 writel(0, ring->tail);
2917
2918 if (ring_is_ps_enabled(ring)) {
2919 i40e_alloc_rx_headers(ring);
2920 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2921 } else {
2922 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2923 }
2924
2925 return 0;
2926 }
2927
2928 /**
2929 * i40e_vsi_configure_tx - Configure the VSI for Tx
2930 * @vsi: VSI structure describing this set of rings and resources
2931 *
2932 * Configure the Tx VSI for operation.
2933 **/
2934 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2935 {
2936 int err = 0;
2937 u16 i;
2938
2939 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2940 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2941
2942 return err;
2943 }
2944
2945 /**
2946 * i40e_vsi_configure_rx - Configure the VSI for Rx
2947 * @vsi: the VSI being configured
2948 *
2949 * Configure the Rx VSI for operation.
2950 **/
2951 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2952 {
2953 int err = 0;
2954 u16 i;
2955
2956 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2957 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2958 + ETH_FCS_LEN + VLAN_HLEN;
2959 else
2960 vsi->max_frame = I40E_RXBUFFER_2048;
2961
2962 /* figure out correct receive buffer length */
2963 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2964 I40E_FLAG_RX_PS_ENABLED)) {
2965 case I40E_FLAG_RX_1BUF_ENABLED:
2966 vsi->rx_hdr_len = 0;
2967 vsi->rx_buf_len = vsi->max_frame;
2968 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2969 break;
2970 case I40E_FLAG_RX_PS_ENABLED:
2971 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2972 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2973 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2974 break;
2975 default:
2976 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2977 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2978 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2979 break;
2980 }
2981
2982 #ifdef I40E_FCOE
2983 /* setup rx buffer for FCoE */
2984 if ((vsi->type == I40E_VSI_FCOE) &&
2985 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2986 vsi->rx_hdr_len = 0;
2987 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2988 vsi->max_frame = I40E_RXBUFFER_3072;
2989 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2990 }
2991
2992 #endif /* I40E_FCOE */
2993 /* round up for the chip's needs */
2994 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2995 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2996 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2997 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2998
2999 /* set up individual rings */
3000 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3001 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3002
3003 return err;
3004 }
3005
3006 /**
3007 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3008 * @vsi: ptr to the VSI
3009 **/
3010 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3011 {
3012 struct i40e_ring *tx_ring, *rx_ring;
3013 u16 qoffset, qcount;
3014 int i, n;
3015
3016 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3017 /* Reset the TC information */
3018 for (i = 0; i < vsi->num_queue_pairs; i++) {
3019 rx_ring = vsi->rx_rings[i];
3020 tx_ring = vsi->tx_rings[i];
3021 rx_ring->dcb_tc = 0;
3022 tx_ring->dcb_tc = 0;
3023 }
3024 }
3025
3026 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3027 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3028 continue;
3029
3030 qoffset = vsi->tc_config.tc_info[n].qoffset;
3031 qcount = vsi->tc_config.tc_info[n].qcount;
3032 for (i = qoffset; i < (qoffset + qcount); i++) {
3033 rx_ring = vsi->rx_rings[i];
3034 tx_ring = vsi->tx_rings[i];
3035 rx_ring->dcb_tc = n;
3036 tx_ring->dcb_tc = n;
3037 }
3038 }
3039 }
3040
3041 /**
3042 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3043 * @vsi: ptr to the VSI
3044 **/
3045 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3046 {
3047 if (vsi->netdev)
3048 i40e_set_rx_mode(vsi->netdev);
3049 }
3050
3051 /**
3052 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3053 * @vsi: Pointer to the targeted VSI
3054 *
3055 * This function replays the hlist on the hw where all the SB Flow Director
3056 * filters were saved.
3057 **/
3058 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3059 {
3060 struct i40e_fdir_filter *filter;
3061 struct i40e_pf *pf = vsi->back;
3062 struct hlist_node *node;
3063
3064 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3065 return;
3066
3067 hlist_for_each_entry_safe(filter, node,
3068 &pf->fdir_filter_list, fdir_node) {
3069 i40e_add_del_fdir(vsi, filter, true);
3070 }
3071 }
3072
3073 /**
3074 * i40e_vsi_configure - Set up the VSI for action
3075 * @vsi: the VSI being configured
3076 **/
3077 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3078 {
3079 int err;
3080
3081 i40e_set_vsi_rx_mode(vsi);
3082 i40e_restore_vlan(vsi);
3083 i40e_vsi_config_dcb_rings(vsi);
3084 err = i40e_vsi_configure_tx(vsi);
3085 if (!err)
3086 err = i40e_vsi_configure_rx(vsi);
3087
3088 return err;
3089 }
3090
3091 /**
3092 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3093 * @vsi: the VSI being configured
3094 **/
3095 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3096 {
3097 struct i40e_pf *pf = vsi->back;
3098 struct i40e_hw *hw = &pf->hw;
3099 u16 vector;
3100 int i, q;
3101 u32 qp;
3102
3103 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3104 * and PFINT_LNKLSTn registers, e.g.:
3105 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3106 */
3107 qp = vsi->base_queue;
3108 vector = vsi->base_vector;
3109 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3110 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3111
3112 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3113 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3114 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3115 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3116 q_vector->rx.itr);
3117 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3118 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3119 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3120 q_vector->tx.itr);
3121 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3122 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3123
3124 /* Linked list for the queuepairs assigned to this vector */
3125 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3126 for (q = 0; q < q_vector->num_ringpairs; q++) {
3127 u32 val;
3128
3129 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3130 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3131 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3132 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3133 (I40E_QUEUE_TYPE_TX
3134 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3135
3136 wr32(hw, I40E_QINT_RQCTL(qp), val);
3137
3138 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3139 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3140 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3141 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3142 (I40E_QUEUE_TYPE_RX
3143 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3144
3145 /* Terminate the linked list */
3146 if (q == (q_vector->num_ringpairs - 1))
3147 val |= (I40E_QUEUE_END_OF_LIST
3148 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3149
3150 wr32(hw, I40E_QINT_TQCTL(qp), val);
3151 qp++;
3152 }
3153 }
3154
3155 i40e_flush(hw);
3156 }
3157
3158 /**
3159 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3160 * @hw: ptr to the hardware info
3161 **/
3162 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3163 {
3164 struct i40e_hw *hw = &pf->hw;
3165 u32 val;
3166
3167 /* clear things first */
3168 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3169 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3170
3171 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3172 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3173 I40E_PFINT_ICR0_ENA_GRST_MASK |
3174 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3175 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3176 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3177 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3178 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3179
3180 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3181 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3182
3183 if (pf->flags & I40E_FLAG_PTP)
3184 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3185
3186 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3187
3188 /* SW_ITR_IDX = 0, but don't change INTENA */
3189 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3190 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3191
3192 /* OTHER_ITR_IDX = 0 */
3193 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3194 }
3195
3196 /**
3197 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3198 * @vsi: the VSI being configured
3199 **/
3200 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3201 {
3202 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3203 struct i40e_pf *pf = vsi->back;
3204 struct i40e_hw *hw = &pf->hw;
3205 u32 val;
3206
3207 /* set the ITR configuration */
3208 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3209 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3210 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3211 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3212 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3213 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3214 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3215
3216 i40e_enable_misc_int_causes(pf);
3217
3218 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3219 wr32(hw, I40E_PFINT_LNKLST0, 0);
3220
3221 /* Associate the queue pair to the vector and enable the queue int */
3222 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3223 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3224 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3225
3226 wr32(hw, I40E_QINT_RQCTL(0), val);
3227
3228 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3229 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3230 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3231
3232 wr32(hw, I40E_QINT_TQCTL(0), val);
3233 i40e_flush(hw);
3234 }
3235
3236 /**
3237 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3238 * @pf: board private structure
3239 **/
3240 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3241 {
3242 struct i40e_hw *hw = &pf->hw;
3243
3244 wr32(hw, I40E_PFINT_DYN_CTL0,
3245 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3246 i40e_flush(hw);
3247 }
3248
3249 /**
3250 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3251 * @pf: board private structure
3252 **/
3253 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3254 {
3255 struct i40e_hw *hw = &pf->hw;
3256 u32 val;
3257
3258 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3259 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3260 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3261
3262 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3263 i40e_flush(hw);
3264 }
3265
3266 /**
3267 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3268 * @vsi: pointer to a vsi
3269 * @vector: disable a particular Hw Interrupt vector
3270 **/
3271 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3272 {
3273 struct i40e_pf *pf = vsi->back;
3274 struct i40e_hw *hw = &pf->hw;
3275 u32 val;
3276
3277 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3278 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3279 i40e_flush(hw);
3280 }
3281
3282 /**
3283 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3284 * @irq: interrupt number
3285 * @data: pointer to a q_vector
3286 **/
3287 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3288 {
3289 struct i40e_q_vector *q_vector = data;
3290
3291 if (!q_vector->tx.ring && !q_vector->rx.ring)
3292 return IRQ_HANDLED;
3293
3294 napi_schedule_irqoff(&q_vector->napi);
3295
3296 return IRQ_HANDLED;
3297 }
3298
3299 /**
3300 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3301 * @vsi: the VSI being configured
3302 * @basename: name for the vector
3303 *
3304 * Allocates MSI-X vectors and requests interrupts from the kernel.
3305 **/
3306 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3307 {
3308 int q_vectors = vsi->num_q_vectors;
3309 struct i40e_pf *pf = vsi->back;
3310 int base = vsi->base_vector;
3311 int rx_int_idx = 0;
3312 int tx_int_idx = 0;
3313 int vector, err;
3314
3315 for (vector = 0; vector < q_vectors; vector++) {
3316 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3317
3318 if (q_vector->tx.ring && q_vector->rx.ring) {
3319 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3320 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3321 tx_int_idx++;
3322 } else if (q_vector->rx.ring) {
3323 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3324 "%s-%s-%d", basename, "rx", rx_int_idx++);
3325 } else if (q_vector->tx.ring) {
3326 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3327 "%s-%s-%d", basename, "tx", tx_int_idx++);
3328 } else {
3329 /* skip this unused q_vector */
3330 continue;
3331 }
3332 err = request_irq(pf->msix_entries[base + vector].vector,
3333 vsi->irq_handler,
3334 0,
3335 q_vector->name,
3336 q_vector);
3337 if (err) {
3338 dev_info(&pf->pdev->dev,
3339 "MSIX request_irq failed, error: %d\n", err);
3340 goto free_queue_irqs;
3341 }
3342 /* assign the mask for this irq */
3343 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3344 &q_vector->affinity_mask);
3345 }
3346
3347 vsi->irqs_ready = true;
3348 return 0;
3349
3350 free_queue_irqs:
3351 while (vector) {
3352 vector--;
3353 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3354 NULL);
3355 free_irq(pf->msix_entries[base + vector].vector,
3356 &(vsi->q_vectors[vector]));
3357 }
3358 return err;
3359 }
3360
3361 /**
3362 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3363 * @vsi: the VSI being un-configured
3364 **/
3365 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3366 {
3367 struct i40e_pf *pf = vsi->back;
3368 struct i40e_hw *hw = &pf->hw;
3369 int base = vsi->base_vector;
3370 int i;
3371
3372 for (i = 0; i < vsi->num_queue_pairs; i++) {
3373 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3374 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3375 }
3376
3377 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3378 for (i = vsi->base_vector;
3379 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3380 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3381
3382 i40e_flush(hw);
3383 for (i = 0; i < vsi->num_q_vectors; i++)
3384 synchronize_irq(pf->msix_entries[i + base].vector);
3385 } else {
3386 /* Legacy and MSI mode - this stops all interrupt handling */
3387 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3388 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3389 i40e_flush(hw);
3390 synchronize_irq(pf->pdev->irq);
3391 }
3392 }
3393
3394 /**
3395 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3396 * @vsi: the VSI being configured
3397 **/
3398 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3399 {
3400 struct i40e_pf *pf = vsi->back;
3401 int i;
3402
3403 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3404 for (i = 0; i < vsi->num_q_vectors; i++)
3405 i40e_irq_dynamic_enable(vsi, i);
3406 } else {
3407 i40e_irq_dynamic_enable_icr0(pf);
3408 }
3409
3410 i40e_flush(&pf->hw);
3411 return 0;
3412 }
3413
3414 /**
3415 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3416 * @pf: board private structure
3417 **/
3418 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3419 {
3420 /* Disable ICR 0 */
3421 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3422 i40e_flush(&pf->hw);
3423 }
3424
3425 /**
3426 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3427 * @irq: interrupt number
3428 * @data: pointer to a q_vector
3429 *
3430 * This is the handler used for all MSI/Legacy interrupts, and deals
3431 * with both queue and non-queue interrupts. This is also used in
3432 * MSIX mode to handle the non-queue interrupts.
3433 **/
3434 static irqreturn_t i40e_intr(int irq, void *data)
3435 {
3436 struct i40e_pf *pf = (struct i40e_pf *)data;
3437 struct i40e_hw *hw = &pf->hw;
3438 irqreturn_t ret = IRQ_NONE;
3439 u32 icr0, icr0_remaining;
3440 u32 val, ena_mask;
3441
3442 icr0 = rd32(hw, I40E_PFINT_ICR0);
3443 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3444
3445 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3446 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3447 goto enable_intr;
3448
3449 /* if interrupt but no bits showing, must be SWINT */
3450 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3451 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3452 pf->sw_int_count++;
3453
3454 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3455 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3456 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3457 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3458 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3459 }
3460
3461 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3462 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3463 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3464 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3465
3466 /* temporarily disable queue cause for NAPI processing */
3467 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3468
3469 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3470 wr32(hw, I40E_QINT_RQCTL(0), qval);
3471
3472 qval = rd32(hw, I40E_QINT_TQCTL(0));
3473 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3474 wr32(hw, I40E_QINT_TQCTL(0), qval);
3475
3476 if (!test_bit(__I40E_DOWN, &pf->state))
3477 napi_schedule_irqoff(&q_vector->napi);
3478 }
3479
3480 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3481 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3482 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3483 }
3484
3485 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3486 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3487 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3488 }
3489
3490 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3491 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3492 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3493 }
3494
3495 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3496 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3497 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3498 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3499 val = rd32(hw, I40E_GLGEN_RSTAT);
3500 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3501 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3502 if (val == I40E_RESET_CORER) {
3503 pf->corer_count++;
3504 } else if (val == I40E_RESET_GLOBR) {
3505 pf->globr_count++;
3506 } else if (val == I40E_RESET_EMPR) {
3507 pf->empr_count++;
3508 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3509 }
3510 }
3511
3512 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3513 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3514 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3515 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3516 rd32(hw, I40E_PFHMC_ERRORINFO),
3517 rd32(hw, I40E_PFHMC_ERRORDATA));
3518 }
3519
3520 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3521 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3522
3523 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3524 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3525 i40e_ptp_tx_hwtstamp(pf);
3526 }
3527 }
3528
3529 /* If a critical error is pending we have no choice but to reset the
3530 * device.
3531 * Report and mask out any remaining unexpected interrupts.
3532 */
3533 icr0_remaining = icr0 & ena_mask;
3534 if (icr0_remaining) {
3535 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3536 icr0_remaining);
3537 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3538 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3539 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3540 dev_info(&pf->pdev->dev, "device will be reset\n");
3541 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3542 i40e_service_event_schedule(pf);
3543 }
3544 ena_mask &= ~icr0_remaining;
3545 }
3546 ret = IRQ_HANDLED;
3547
3548 enable_intr:
3549 /* re-enable interrupt causes */
3550 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3551 if (!test_bit(__I40E_DOWN, &pf->state)) {
3552 i40e_service_event_schedule(pf);
3553 i40e_irq_dynamic_enable_icr0(pf);
3554 }
3555
3556 return ret;
3557 }
3558
3559 /**
3560 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3561 * @tx_ring: tx ring to clean
3562 * @budget: how many cleans we're allowed
3563 *
3564 * Returns true if there's any budget left (e.g. the clean is finished)
3565 **/
3566 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3567 {
3568 struct i40e_vsi *vsi = tx_ring->vsi;
3569 u16 i = tx_ring->next_to_clean;
3570 struct i40e_tx_buffer *tx_buf;
3571 struct i40e_tx_desc *tx_desc;
3572
3573 tx_buf = &tx_ring->tx_bi[i];
3574 tx_desc = I40E_TX_DESC(tx_ring, i);
3575 i -= tx_ring->count;
3576
3577 do {
3578 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3579
3580 /* if next_to_watch is not set then there is no work pending */
3581 if (!eop_desc)
3582 break;
3583
3584 /* prevent any other reads prior to eop_desc */
3585 read_barrier_depends();
3586
3587 /* if the descriptor isn't done, no work yet to do */
3588 if (!(eop_desc->cmd_type_offset_bsz &
3589 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3590 break;
3591
3592 /* clear next_to_watch to prevent false hangs */
3593 tx_buf->next_to_watch = NULL;
3594
3595 tx_desc->buffer_addr = 0;
3596 tx_desc->cmd_type_offset_bsz = 0;
3597 /* move past filter desc */
3598 tx_buf++;
3599 tx_desc++;
3600 i++;
3601 if (unlikely(!i)) {
3602 i -= tx_ring->count;
3603 tx_buf = tx_ring->tx_bi;
3604 tx_desc = I40E_TX_DESC(tx_ring, 0);
3605 }
3606 /* unmap skb header data */
3607 dma_unmap_single(tx_ring->dev,
3608 dma_unmap_addr(tx_buf, dma),
3609 dma_unmap_len(tx_buf, len),
3610 DMA_TO_DEVICE);
3611 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3612 kfree(tx_buf->raw_buf);
3613
3614 tx_buf->raw_buf = NULL;
3615 tx_buf->tx_flags = 0;
3616 tx_buf->next_to_watch = NULL;
3617 dma_unmap_len_set(tx_buf, len, 0);
3618 tx_desc->buffer_addr = 0;
3619 tx_desc->cmd_type_offset_bsz = 0;
3620
3621 /* move us past the eop_desc for start of next FD desc */
3622 tx_buf++;
3623 tx_desc++;
3624 i++;
3625 if (unlikely(!i)) {
3626 i -= tx_ring->count;
3627 tx_buf = tx_ring->tx_bi;
3628 tx_desc = I40E_TX_DESC(tx_ring, 0);
3629 }
3630
3631 /* update budget accounting */
3632 budget--;
3633 } while (likely(budget));
3634
3635 i += tx_ring->count;
3636 tx_ring->next_to_clean = i;
3637
3638 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3639 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3640
3641 return budget > 0;
3642 }
3643
3644 /**
3645 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3646 * @irq: interrupt number
3647 * @data: pointer to a q_vector
3648 **/
3649 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3650 {
3651 struct i40e_q_vector *q_vector = data;
3652 struct i40e_vsi *vsi;
3653
3654 if (!q_vector->tx.ring)
3655 return IRQ_HANDLED;
3656
3657 vsi = q_vector->tx.ring->vsi;
3658 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3659
3660 return IRQ_HANDLED;
3661 }
3662
3663 /**
3664 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3665 * @vsi: the VSI being configured
3666 * @v_idx: vector index
3667 * @qp_idx: queue pair index
3668 **/
3669 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3670 {
3671 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3672 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3673 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3674
3675 tx_ring->q_vector = q_vector;
3676 tx_ring->next = q_vector->tx.ring;
3677 q_vector->tx.ring = tx_ring;
3678 q_vector->tx.count++;
3679
3680 rx_ring->q_vector = q_vector;
3681 rx_ring->next = q_vector->rx.ring;
3682 q_vector->rx.ring = rx_ring;
3683 q_vector->rx.count++;
3684 }
3685
3686 /**
3687 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3688 * @vsi: the VSI being configured
3689 *
3690 * This function maps descriptor rings to the queue-specific vectors
3691 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3692 * one vector per queue pair, but on a constrained vector budget, we
3693 * group the queue pairs as "efficiently" as possible.
3694 **/
3695 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3696 {
3697 int qp_remaining = vsi->num_queue_pairs;
3698 int q_vectors = vsi->num_q_vectors;
3699 int num_ringpairs;
3700 int v_start = 0;
3701 int qp_idx = 0;
3702
3703 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3704 * group them so there are multiple queues per vector.
3705 * It is also important to go through all the vectors available to be
3706 * sure that if we don't use all the vectors, that the remaining vectors
3707 * are cleared. This is especially important when decreasing the
3708 * number of queues in use.
3709 */
3710 for (; v_start < q_vectors; v_start++) {
3711 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3712
3713 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3714
3715 q_vector->num_ringpairs = num_ringpairs;
3716
3717 q_vector->rx.count = 0;
3718 q_vector->tx.count = 0;
3719 q_vector->rx.ring = NULL;
3720 q_vector->tx.ring = NULL;
3721
3722 while (num_ringpairs--) {
3723 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3724 qp_idx++;
3725 qp_remaining--;
3726 }
3727 }
3728 }
3729
3730 /**
3731 * i40e_vsi_request_irq - Request IRQ from the OS
3732 * @vsi: the VSI being configured
3733 * @basename: name for the vector
3734 **/
3735 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3736 {
3737 struct i40e_pf *pf = vsi->back;
3738 int err;
3739
3740 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3741 err = i40e_vsi_request_irq_msix(vsi, basename);
3742 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3743 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3744 pf->int_name, pf);
3745 else
3746 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3747 pf->int_name, pf);
3748
3749 if (err)
3750 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3751
3752 return err;
3753 }
3754
3755 #ifdef CONFIG_NET_POLL_CONTROLLER
3756 /**
3757 * i40e_netpoll - A Polling 'interrupt'handler
3758 * @netdev: network interface device structure
3759 *
3760 * This is used by netconsole to send skbs without having to re-enable
3761 * interrupts. It's not called while the normal interrupt routine is executing.
3762 **/
3763 #ifdef I40E_FCOE
3764 void i40e_netpoll(struct net_device *netdev)
3765 #else
3766 static void i40e_netpoll(struct net_device *netdev)
3767 #endif
3768 {
3769 struct i40e_netdev_priv *np = netdev_priv(netdev);
3770 struct i40e_vsi *vsi = np->vsi;
3771 struct i40e_pf *pf = vsi->back;
3772 int i;
3773
3774 /* if interface is down do nothing */
3775 if (test_bit(__I40E_DOWN, &vsi->state))
3776 return;
3777
3778 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3779 for (i = 0; i < vsi->num_q_vectors; i++)
3780 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3781 } else {
3782 i40e_intr(pf->pdev->irq, netdev);
3783 }
3784 }
3785 #endif
3786
3787 /**
3788 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3789 * @pf: the PF being configured
3790 * @pf_q: the PF queue
3791 * @enable: enable or disable state of the queue
3792 *
3793 * This routine will wait for the given Tx queue of the PF to reach the
3794 * enabled or disabled state.
3795 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3796 * multiple retries; else will return 0 in case of success.
3797 **/
3798 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3799 {
3800 int i;
3801 u32 tx_reg;
3802
3803 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3804 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3805 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3806 break;
3807
3808 usleep_range(10, 20);
3809 }
3810 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3811 return -ETIMEDOUT;
3812
3813 return 0;
3814 }
3815
3816 /**
3817 * i40e_vsi_control_tx - Start or stop a VSI's rings
3818 * @vsi: the VSI being configured
3819 * @enable: start or stop the rings
3820 **/
3821 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3822 {
3823 struct i40e_pf *pf = vsi->back;
3824 struct i40e_hw *hw = &pf->hw;
3825 int i, j, pf_q, ret = 0;
3826 u32 tx_reg;
3827
3828 pf_q = vsi->base_queue;
3829 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3830
3831 /* warn the TX unit of coming changes */
3832 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3833 if (!enable)
3834 usleep_range(10, 20);
3835
3836 for (j = 0; j < 50; j++) {
3837 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3838 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3839 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3840 break;
3841 usleep_range(1000, 2000);
3842 }
3843 /* Skip if the queue is already in the requested state */
3844 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3845 continue;
3846
3847 /* turn on/off the queue */
3848 if (enable) {
3849 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3850 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3851 } else {
3852 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3853 }
3854
3855 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3856 /* No waiting for the Tx queue to disable */
3857 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3858 continue;
3859
3860 /* wait for the change to finish */
3861 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3862 if (ret) {
3863 dev_info(&pf->pdev->dev,
3864 "VSI seid %d Tx ring %d %sable timeout\n",
3865 vsi->seid, pf_q, (enable ? "en" : "dis"));
3866 break;
3867 }
3868 }
3869
3870 if (hw->revision_id == 0)
3871 mdelay(50);
3872 return ret;
3873 }
3874
3875 /**
3876 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3877 * @pf: the PF being configured
3878 * @pf_q: the PF queue
3879 * @enable: enable or disable state of the queue
3880 *
3881 * This routine will wait for the given Rx queue of the PF to reach the
3882 * enabled or disabled state.
3883 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3884 * multiple retries; else will return 0 in case of success.
3885 **/
3886 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3887 {
3888 int i;
3889 u32 rx_reg;
3890
3891 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3892 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3893 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3894 break;
3895
3896 usleep_range(10, 20);
3897 }
3898 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3899 return -ETIMEDOUT;
3900
3901 return 0;
3902 }
3903
3904 /**
3905 * i40e_vsi_control_rx - Start or stop a VSI's rings
3906 * @vsi: the VSI being configured
3907 * @enable: start or stop the rings
3908 **/
3909 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3910 {
3911 struct i40e_pf *pf = vsi->back;
3912 struct i40e_hw *hw = &pf->hw;
3913 int i, j, pf_q, ret = 0;
3914 u32 rx_reg;
3915
3916 pf_q = vsi->base_queue;
3917 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3918 for (j = 0; j < 50; j++) {
3919 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3920 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3921 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3922 break;
3923 usleep_range(1000, 2000);
3924 }
3925
3926 /* Skip if the queue is already in the requested state */
3927 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3928 continue;
3929
3930 /* turn on/off the queue */
3931 if (enable)
3932 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3933 else
3934 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3935 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3936
3937 /* wait for the change to finish */
3938 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3939 if (ret) {
3940 dev_info(&pf->pdev->dev,
3941 "VSI seid %d Rx ring %d %sable timeout\n",
3942 vsi->seid, pf_q, (enable ? "en" : "dis"));
3943 break;
3944 }
3945 }
3946
3947 return ret;
3948 }
3949
3950 /**
3951 * i40e_vsi_control_rings - Start or stop a VSI's rings
3952 * @vsi: the VSI being configured
3953 * @enable: start or stop the rings
3954 **/
3955 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3956 {
3957 int ret = 0;
3958
3959 /* do rx first for enable and last for disable */
3960 if (request) {
3961 ret = i40e_vsi_control_rx(vsi, request);
3962 if (ret)
3963 return ret;
3964 ret = i40e_vsi_control_tx(vsi, request);
3965 } else {
3966 /* Ignore return value, we need to shutdown whatever we can */
3967 i40e_vsi_control_tx(vsi, request);
3968 i40e_vsi_control_rx(vsi, request);
3969 }
3970
3971 return ret;
3972 }
3973
3974 /**
3975 * i40e_vsi_free_irq - Free the irq association with the OS
3976 * @vsi: the VSI being configured
3977 **/
3978 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3979 {
3980 struct i40e_pf *pf = vsi->back;
3981 struct i40e_hw *hw = &pf->hw;
3982 int base = vsi->base_vector;
3983 u32 val, qp;
3984 int i;
3985
3986 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3987 if (!vsi->q_vectors)
3988 return;
3989
3990 if (!vsi->irqs_ready)
3991 return;
3992
3993 vsi->irqs_ready = false;
3994 for (i = 0; i < vsi->num_q_vectors; i++) {
3995 u16 vector = i + base;
3996
3997 /* free only the irqs that were actually requested */
3998 if (!vsi->q_vectors[i] ||
3999 !vsi->q_vectors[i]->num_ringpairs)
4000 continue;
4001
4002 /* clear the affinity_mask in the IRQ descriptor */
4003 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4004 NULL);
4005 free_irq(pf->msix_entries[vector].vector,
4006 vsi->q_vectors[i]);
4007
4008 /* Tear down the interrupt queue link list
4009 *
4010 * We know that they come in pairs and always
4011 * the Rx first, then the Tx. To clear the
4012 * link list, stick the EOL value into the
4013 * next_q field of the registers.
4014 */
4015 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4016 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4017 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4018 val |= I40E_QUEUE_END_OF_LIST
4019 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4020 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4021
4022 while (qp != I40E_QUEUE_END_OF_LIST) {
4023 u32 next;
4024
4025 val = rd32(hw, I40E_QINT_RQCTL(qp));
4026
4027 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4028 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4029 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4030 I40E_QINT_RQCTL_INTEVENT_MASK);
4031
4032 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4033 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4034
4035 wr32(hw, I40E_QINT_RQCTL(qp), val);
4036
4037 val = rd32(hw, I40E_QINT_TQCTL(qp));
4038
4039 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4040 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4041
4042 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4043 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4044 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4045 I40E_QINT_TQCTL_INTEVENT_MASK);
4046
4047 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4048 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4049
4050 wr32(hw, I40E_QINT_TQCTL(qp), val);
4051 qp = next;
4052 }
4053 }
4054 } else {
4055 free_irq(pf->pdev->irq, pf);
4056
4057 val = rd32(hw, I40E_PFINT_LNKLST0);
4058 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4059 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4060 val |= I40E_QUEUE_END_OF_LIST
4061 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4062 wr32(hw, I40E_PFINT_LNKLST0, val);
4063
4064 val = rd32(hw, I40E_QINT_RQCTL(qp));
4065 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4066 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4067 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4068 I40E_QINT_RQCTL_INTEVENT_MASK);
4069
4070 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4071 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4072
4073 wr32(hw, I40E_QINT_RQCTL(qp), val);
4074
4075 val = rd32(hw, I40E_QINT_TQCTL(qp));
4076
4077 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4078 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4079 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4080 I40E_QINT_TQCTL_INTEVENT_MASK);
4081
4082 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4083 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4084
4085 wr32(hw, I40E_QINT_TQCTL(qp), val);
4086 }
4087 }
4088
4089 /**
4090 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4091 * @vsi: the VSI being configured
4092 * @v_idx: Index of vector to be freed
4093 *
4094 * This function frees the memory allocated to the q_vector. In addition if
4095 * NAPI is enabled it will delete any references to the NAPI struct prior
4096 * to freeing the q_vector.
4097 **/
4098 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4099 {
4100 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4101 struct i40e_ring *ring;
4102
4103 if (!q_vector)
4104 return;
4105
4106 /* disassociate q_vector from rings */
4107 i40e_for_each_ring(ring, q_vector->tx)
4108 ring->q_vector = NULL;
4109
4110 i40e_for_each_ring(ring, q_vector->rx)
4111 ring->q_vector = NULL;
4112
4113 /* only VSI w/ an associated netdev is set up w/ NAPI */
4114 if (vsi->netdev)
4115 netif_napi_del(&q_vector->napi);
4116
4117 vsi->q_vectors[v_idx] = NULL;
4118
4119 kfree_rcu(q_vector, rcu);
4120 }
4121
4122 /**
4123 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4124 * @vsi: the VSI being un-configured
4125 *
4126 * This frees the memory allocated to the q_vectors and
4127 * deletes references to the NAPI struct.
4128 **/
4129 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4130 {
4131 int v_idx;
4132
4133 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4134 i40e_free_q_vector(vsi, v_idx);
4135 }
4136
4137 /**
4138 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4139 * @pf: board private structure
4140 **/
4141 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4142 {
4143 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4144 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4145 pci_disable_msix(pf->pdev);
4146 kfree(pf->msix_entries);
4147 pf->msix_entries = NULL;
4148 kfree(pf->irq_pile);
4149 pf->irq_pile = NULL;
4150 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4151 pci_disable_msi(pf->pdev);
4152 }
4153 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4154 }
4155
4156 /**
4157 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4158 * @pf: board private structure
4159 *
4160 * We go through and clear interrupt specific resources and reset the structure
4161 * to pre-load conditions
4162 **/
4163 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4164 {
4165 int i;
4166
4167 i40e_stop_misc_vector(pf);
4168 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4169 synchronize_irq(pf->msix_entries[0].vector);
4170 free_irq(pf->msix_entries[0].vector, pf);
4171 }
4172
4173 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4174 for (i = 0; i < pf->num_alloc_vsi; i++)
4175 if (pf->vsi[i])
4176 i40e_vsi_free_q_vectors(pf->vsi[i]);
4177 i40e_reset_interrupt_capability(pf);
4178 }
4179
4180 /**
4181 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4182 * @vsi: the VSI being configured
4183 **/
4184 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4185 {
4186 int q_idx;
4187
4188 if (!vsi->netdev)
4189 return;
4190
4191 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4192 napi_enable(&vsi->q_vectors[q_idx]->napi);
4193 }
4194
4195 /**
4196 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4197 * @vsi: the VSI being configured
4198 **/
4199 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4200 {
4201 int q_idx;
4202
4203 if (!vsi->netdev)
4204 return;
4205
4206 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4207 napi_disable(&vsi->q_vectors[q_idx]->napi);
4208 }
4209
4210 /**
4211 * i40e_vsi_close - Shut down a VSI
4212 * @vsi: the vsi to be quelled
4213 **/
4214 static void i40e_vsi_close(struct i40e_vsi *vsi)
4215 {
4216 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4217 i40e_down(vsi);
4218 i40e_vsi_free_irq(vsi);
4219 i40e_vsi_free_tx_resources(vsi);
4220 i40e_vsi_free_rx_resources(vsi);
4221 vsi->current_netdev_flags = 0;
4222 }
4223
4224 /**
4225 * i40e_quiesce_vsi - Pause a given VSI
4226 * @vsi: the VSI being paused
4227 **/
4228 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4229 {
4230 if (test_bit(__I40E_DOWN, &vsi->state))
4231 return;
4232
4233 /* No need to disable FCoE VSI when Tx suspended */
4234 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4235 vsi->type == I40E_VSI_FCOE) {
4236 dev_dbg(&vsi->back->pdev->dev,
4237 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4238 return;
4239 }
4240
4241 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4242 if (vsi->netdev && netif_running(vsi->netdev))
4243 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4244 else
4245 i40e_vsi_close(vsi);
4246 }
4247
4248 /**
4249 * i40e_unquiesce_vsi - Resume a given VSI
4250 * @vsi: the VSI being resumed
4251 **/
4252 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4253 {
4254 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4255 return;
4256
4257 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4258 if (vsi->netdev && netif_running(vsi->netdev))
4259 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4260 else
4261 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4262 }
4263
4264 /**
4265 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4266 * @pf: the PF
4267 **/
4268 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4269 {
4270 int v;
4271
4272 for (v = 0; v < pf->num_alloc_vsi; v++) {
4273 if (pf->vsi[v])
4274 i40e_quiesce_vsi(pf->vsi[v]);
4275 }
4276 }
4277
4278 /**
4279 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4280 * @pf: the PF
4281 **/
4282 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4283 {
4284 int v;
4285
4286 for (v = 0; v < pf->num_alloc_vsi; v++) {
4287 if (pf->vsi[v])
4288 i40e_unquiesce_vsi(pf->vsi[v]);
4289 }
4290 }
4291
4292 #ifdef CONFIG_I40E_DCB
4293 /**
4294 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4295 * @vsi: the VSI being configured
4296 *
4297 * This function waits for the given VSI's Tx queues to be disabled.
4298 **/
4299 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4300 {
4301 struct i40e_pf *pf = vsi->back;
4302 int i, pf_q, ret;
4303
4304 pf_q = vsi->base_queue;
4305 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4306 /* Check and wait for the disable status of the queue */
4307 ret = i40e_pf_txq_wait(pf, pf_q, false);
4308 if (ret) {
4309 dev_info(&pf->pdev->dev,
4310 "VSI seid %d Tx ring %d disable timeout\n",
4311 vsi->seid, pf_q);
4312 return ret;
4313 }
4314 }
4315
4316 return 0;
4317 }
4318
4319 /**
4320 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4321 * @pf: the PF
4322 *
4323 * This function waits for the Tx queues to be in disabled state for all the
4324 * VSIs that are managed by this PF.
4325 **/
4326 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4327 {
4328 int v, ret = 0;
4329
4330 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4331 /* No need to wait for FCoE VSI queues */
4332 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4333 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4334 if (ret)
4335 break;
4336 }
4337 }
4338
4339 return ret;
4340 }
4341
4342 #endif
4343
4344 /**
4345 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4346 * @q_idx: TX queue number
4347 * @vsi: Pointer to VSI struct
4348 *
4349 * This function checks specified queue for given VSI. Detects hung condition.
4350 * Sets hung bit since it is two step process. Before next run of service task
4351 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4352 * hung condition remain unchanged and during subsequent run, this function
4353 * issues SW interrupt to recover from hung condition.
4354 **/
4355 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4356 {
4357 struct i40e_ring *tx_ring = NULL;
4358 struct i40e_pf *pf;
4359 u32 head, val, tx_pending;
4360 int i;
4361
4362 pf = vsi->back;
4363
4364 /* now that we have an index, find the tx_ring struct */
4365 for (i = 0; i < vsi->num_queue_pairs; i++) {
4366 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4367 if (q_idx == vsi->tx_rings[i]->queue_index) {
4368 tx_ring = vsi->tx_rings[i];
4369 break;
4370 }
4371 }
4372 }
4373
4374 if (!tx_ring)
4375 return;
4376
4377 /* Read interrupt register */
4378 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4379 val = rd32(&pf->hw,
4380 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4381 tx_ring->vsi->base_vector - 1));
4382 else
4383 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4384
4385 /* Bail out if interrupts are disabled because napi_poll
4386 * execution in-progress or will get scheduled soon.
4387 * napi_poll cleans TX and RX queues and updates 'next_to_clean'.
4388 */
4389 if (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))
4390 return;
4391
4392 head = i40e_get_head(tx_ring);
4393
4394 tx_pending = i40e_get_tx_pending(tx_ring);
4395
4396 /* HW is done executing descriptors, updated HEAD write back,
4397 * but SW hasn't processed those descriptors. If interrupt is
4398 * not generated from this point ON, it could result into
4399 * dev_watchdog detecting timeout on those netdev_queue,
4400 * hence proactively trigger SW interrupt.
4401 */
4402 if (tx_pending) {
4403 /* NAPI Poll didn't run and clear since it was set */
4404 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4405 &tx_ring->q_vector->hung_detected)) {
4406 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4407 vsi->seid, q_idx, tx_pending,
4408 tx_ring->next_to_clean, head,
4409 tx_ring->next_to_use,
4410 readl(tx_ring->tail));
4411 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4412 vsi->seid, q_idx, val);
4413 i40e_force_wb(vsi, tx_ring->q_vector);
4414 } else {
4415 /* First Chance - detected possible hung */
4416 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4417 &tx_ring->q_vector->hung_detected);
4418 }
4419 }
4420 }
4421
4422 /**
4423 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4424 * @pf: pointer to PF struct
4425 *
4426 * LAN VSI has netdev and netdev has TX queues. This function is to check
4427 * each of those TX queues if they are hung, trigger recovery by issuing
4428 * SW interrupt.
4429 **/
4430 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4431 {
4432 struct net_device *netdev;
4433 struct i40e_vsi *vsi;
4434 int i;
4435
4436 /* Only for LAN VSI */
4437 vsi = pf->vsi[pf->lan_vsi];
4438
4439 if (!vsi)
4440 return;
4441
4442 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4443 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4444 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4445 return;
4446
4447 /* Make sure type is MAIN VSI */
4448 if (vsi->type != I40E_VSI_MAIN)
4449 return;
4450
4451 netdev = vsi->netdev;
4452 if (!netdev)
4453 return;
4454
4455 /* Bail out if netif_carrier is not OK */
4456 if (!netif_carrier_ok(netdev))
4457 return;
4458
4459 /* Go thru' TX queues for netdev */
4460 for (i = 0; i < netdev->num_tx_queues; i++) {
4461 struct netdev_queue *q;
4462
4463 q = netdev_get_tx_queue(netdev, i);
4464 if (q)
4465 i40e_detect_recover_hung_queue(i, vsi);
4466 }
4467 }
4468
4469 /**
4470 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4471 * @pf: pointer to PF
4472 *
4473 * Get TC map for ISCSI PF type that will include iSCSI TC
4474 * and LAN TC.
4475 **/
4476 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4477 {
4478 struct i40e_dcb_app_priority_table app;
4479 struct i40e_hw *hw = &pf->hw;
4480 u8 enabled_tc = 1; /* TC0 is always enabled */
4481 u8 tc, i;
4482 /* Get the iSCSI APP TLV */
4483 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4484
4485 for (i = 0; i < dcbcfg->numapps; i++) {
4486 app = dcbcfg->app[i];
4487 if (app.selector == I40E_APP_SEL_TCPIP &&
4488 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4489 tc = dcbcfg->etscfg.prioritytable[app.priority];
4490 enabled_tc |= BIT(tc);
4491 break;
4492 }
4493 }
4494
4495 return enabled_tc;
4496 }
4497
4498 /**
4499 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4500 * @dcbcfg: the corresponding DCBx configuration structure
4501 *
4502 * Return the number of TCs from given DCBx configuration
4503 **/
4504 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4505 {
4506 u8 num_tc = 0;
4507 int i;
4508
4509 /* Scan the ETS Config Priority Table to find
4510 * traffic class enabled for a given priority
4511 * and use the traffic class index to get the
4512 * number of traffic classes enabled
4513 */
4514 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4515 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4516 num_tc = dcbcfg->etscfg.prioritytable[i];
4517 }
4518
4519 /* Traffic class index starts from zero so
4520 * increment to return the actual count
4521 */
4522 return num_tc + 1;
4523 }
4524
4525 /**
4526 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4527 * @dcbcfg: the corresponding DCBx configuration structure
4528 *
4529 * Query the current DCB configuration and return the number of
4530 * traffic classes enabled from the given DCBX config
4531 **/
4532 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4533 {
4534 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4535 u8 enabled_tc = 1;
4536 u8 i;
4537
4538 for (i = 0; i < num_tc; i++)
4539 enabled_tc |= BIT(i);
4540
4541 return enabled_tc;
4542 }
4543
4544 /**
4545 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4546 * @pf: PF being queried
4547 *
4548 * Return number of traffic classes enabled for the given PF
4549 **/
4550 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4551 {
4552 struct i40e_hw *hw = &pf->hw;
4553 u8 i, enabled_tc;
4554 u8 num_tc = 0;
4555 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4556
4557 /* If DCB is not enabled then always in single TC */
4558 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4559 return 1;
4560
4561 /* SFP mode will be enabled for all TCs on port */
4562 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4563 return i40e_dcb_get_num_tc(dcbcfg);
4564
4565 /* MFP mode return count of enabled TCs for this PF */
4566 if (pf->hw.func_caps.iscsi)
4567 enabled_tc = i40e_get_iscsi_tc_map(pf);
4568 else
4569 return 1; /* Only TC0 */
4570
4571 /* At least have TC0 */
4572 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4573 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4574 if (enabled_tc & BIT(i))
4575 num_tc++;
4576 }
4577 return num_tc;
4578 }
4579
4580 /**
4581 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4582 * @pf: PF being queried
4583 *
4584 * Return a bitmap for first enabled traffic class for this PF.
4585 **/
4586 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4587 {
4588 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4589 u8 i = 0;
4590
4591 if (!enabled_tc)
4592 return 0x1; /* TC0 */
4593
4594 /* Find the first enabled TC */
4595 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4596 if (enabled_tc & BIT(i))
4597 break;
4598 }
4599
4600 return BIT(i);
4601 }
4602
4603 /**
4604 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4605 * @pf: PF being queried
4606 *
4607 * Return a bitmap for enabled traffic classes for this PF.
4608 **/
4609 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4610 {
4611 /* If DCB is not enabled for this PF then just return default TC */
4612 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4613 return i40e_pf_get_default_tc(pf);
4614
4615 /* SFP mode we want PF to be enabled for all TCs */
4616 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4617 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4618
4619 /* MFP enabled and iSCSI PF type */
4620 if (pf->hw.func_caps.iscsi)
4621 return i40e_get_iscsi_tc_map(pf);
4622 else
4623 return i40e_pf_get_default_tc(pf);
4624 }
4625
4626 /**
4627 * i40e_vsi_get_bw_info - Query VSI BW Information
4628 * @vsi: the VSI being queried
4629 *
4630 * Returns 0 on success, negative value on failure
4631 **/
4632 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4633 {
4634 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4635 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4636 struct i40e_pf *pf = vsi->back;
4637 struct i40e_hw *hw = &pf->hw;
4638 i40e_status ret;
4639 u32 tc_bw_max;
4640 int i;
4641
4642 /* Get the VSI level BW configuration */
4643 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4644 if (ret) {
4645 dev_info(&pf->pdev->dev,
4646 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4647 i40e_stat_str(&pf->hw, ret),
4648 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4649 return -EINVAL;
4650 }
4651
4652 /* Get the VSI level BW configuration per TC */
4653 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4654 NULL);
4655 if (ret) {
4656 dev_info(&pf->pdev->dev,
4657 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4658 i40e_stat_str(&pf->hw, ret),
4659 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4660 return -EINVAL;
4661 }
4662
4663 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4664 dev_info(&pf->pdev->dev,
4665 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4666 bw_config.tc_valid_bits,
4667 bw_ets_config.tc_valid_bits);
4668 /* Still continuing */
4669 }
4670
4671 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4672 vsi->bw_max_quanta = bw_config.max_bw;
4673 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4674 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4675 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4676 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4677 vsi->bw_ets_limit_credits[i] =
4678 le16_to_cpu(bw_ets_config.credits[i]);
4679 /* 3 bits out of 4 for each TC */
4680 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4681 }
4682
4683 return 0;
4684 }
4685
4686 /**
4687 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4688 * @vsi: the VSI being configured
4689 * @enabled_tc: TC bitmap
4690 * @bw_credits: BW shared credits per TC
4691 *
4692 * Returns 0 on success, negative value on failure
4693 **/
4694 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4695 u8 *bw_share)
4696 {
4697 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4698 i40e_status ret;
4699 int i;
4700
4701 bw_data.tc_valid_bits = enabled_tc;
4702 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4703 bw_data.tc_bw_credits[i] = bw_share[i];
4704
4705 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4706 NULL);
4707 if (ret) {
4708 dev_info(&vsi->back->pdev->dev,
4709 "AQ command Config VSI BW allocation per TC failed = %d\n",
4710 vsi->back->hw.aq.asq_last_status);
4711 return -EINVAL;
4712 }
4713
4714 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4715 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4716
4717 return 0;
4718 }
4719
4720 /**
4721 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4722 * @vsi: the VSI being configured
4723 * @enabled_tc: TC map to be enabled
4724 *
4725 **/
4726 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4727 {
4728 struct net_device *netdev = vsi->netdev;
4729 struct i40e_pf *pf = vsi->back;
4730 struct i40e_hw *hw = &pf->hw;
4731 u8 netdev_tc = 0;
4732 int i;
4733 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4734
4735 if (!netdev)
4736 return;
4737
4738 if (!enabled_tc) {
4739 netdev_reset_tc(netdev);
4740 return;
4741 }
4742
4743 /* Set up actual enabled TCs on the VSI */
4744 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4745 return;
4746
4747 /* set per TC queues for the VSI */
4748 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4749 /* Only set TC queues for enabled tcs
4750 *
4751 * e.g. For a VSI that has TC0 and TC3 enabled the
4752 * enabled_tc bitmap would be 0x00001001; the driver
4753 * will set the numtc for netdev as 2 that will be
4754 * referenced by the netdev layer as TC 0 and 1.
4755 */
4756 if (vsi->tc_config.enabled_tc & BIT(i))
4757 netdev_set_tc_queue(netdev,
4758 vsi->tc_config.tc_info[i].netdev_tc,
4759 vsi->tc_config.tc_info[i].qcount,
4760 vsi->tc_config.tc_info[i].qoffset);
4761 }
4762
4763 /* Assign UP2TC map for the VSI */
4764 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4765 /* Get the actual TC# for the UP */
4766 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4767 /* Get the mapped netdev TC# for the UP */
4768 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4769 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4770 }
4771 }
4772
4773 /**
4774 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4775 * @vsi: the VSI being configured
4776 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4777 **/
4778 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4779 struct i40e_vsi_context *ctxt)
4780 {
4781 /* copy just the sections touched not the entire info
4782 * since not all sections are valid as returned by
4783 * update vsi params
4784 */
4785 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4786 memcpy(&vsi->info.queue_mapping,
4787 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4788 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4789 sizeof(vsi->info.tc_mapping));
4790 }
4791
4792 /**
4793 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4794 * @vsi: VSI to be configured
4795 * @enabled_tc: TC bitmap
4796 *
4797 * This configures a particular VSI for TCs that are mapped to the
4798 * given TC bitmap. It uses default bandwidth share for TCs across
4799 * VSIs to configure TC for a particular VSI.
4800 *
4801 * NOTE:
4802 * It is expected that the VSI queues have been quisced before calling
4803 * this function.
4804 **/
4805 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4806 {
4807 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4808 struct i40e_vsi_context ctxt;
4809 int ret = 0;
4810 int i;
4811
4812 /* Check if enabled_tc is same as existing or new TCs */
4813 if (vsi->tc_config.enabled_tc == enabled_tc)
4814 return ret;
4815
4816 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4817 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4818 if (enabled_tc & BIT(i))
4819 bw_share[i] = 1;
4820 }
4821
4822 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4823 if (ret) {
4824 dev_info(&vsi->back->pdev->dev,
4825 "Failed configuring TC map %d for VSI %d\n",
4826 enabled_tc, vsi->seid);
4827 goto out;
4828 }
4829
4830 /* Update Queue Pairs Mapping for currently enabled UPs */
4831 ctxt.seid = vsi->seid;
4832 ctxt.pf_num = vsi->back->hw.pf_id;
4833 ctxt.vf_num = 0;
4834 ctxt.uplink_seid = vsi->uplink_seid;
4835 ctxt.info = vsi->info;
4836 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4837
4838 /* Update the VSI after updating the VSI queue-mapping information */
4839 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4840 if (ret) {
4841 dev_info(&vsi->back->pdev->dev,
4842 "Update vsi tc config failed, err %s aq_err %s\n",
4843 i40e_stat_str(&vsi->back->hw, ret),
4844 i40e_aq_str(&vsi->back->hw,
4845 vsi->back->hw.aq.asq_last_status));
4846 goto out;
4847 }
4848 /* update the local VSI info with updated queue map */
4849 i40e_vsi_update_queue_map(vsi, &ctxt);
4850 vsi->info.valid_sections = 0;
4851
4852 /* Update current VSI BW information */
4853 ret = i40e_vsi_get_bw_info(vsi);
4854 if (ret) {
4855 dev_info(&vsi->back->pdev->dev,
4856 "Failed updating vsi bw info, err %s aq_err %s\n",
4857 i40e_stat_str(&vsi->back->hw, ret),
4858 i40e_aq_str(&vsi->back->hw,
4859 vsi->back->hw.aq.asq_last_status));
4860 goto out;
4861 }
4862
4863 /* Update the netdev TC setup */
4864 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4865 out:
4866 return ret;
4867 }
4868
4869 /**
4870 * i40e_veb_config_tc - Configure TCs for given VEB
4871 * @veb: given VEB
4872 * @enabled_tc: TC bitmap
4873 *
4874 * Configures given TC bitmap for VEB (switching) element
4875 **/
4876 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4877 {
4878 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4879 struct i40e_pf *pf = veb->pf;
4880 int ret = 0;
4881 int i;
4882
4883 /* No TCs or already enabled TCs just return */
4884 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4885 return ret;
4886
4887 bw_data.tc_valid_bits = enabled_tc;
4888 /* bw_data.absolute_credits is not set (relative) */
4889
4890 /* Enable ETS TCs with equal BW Share for now */
4891 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4892 if (enabled_tc & BIT(i))
4893 bw_data.tc_bw_share_credits[i] = 1;
4894 }
4895
4896 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4897 &bw_data, NULL);
4898 if (ret) {
4899 dev_info(&pf->pdev->dev,
4900 "VEB bw config failed, err %s aq_err %s\n",
4901 i40e_stat_str(&pf->hw, ret),
4902 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4903 goto out;
4904 }
4905
4906 /* Update the BW information */
4907 ret = i40e_veb_get_bw_info(veb);
4908 if (ret) {
4909 dev_info(&pf->pdev->dev,
4910 "Failed getting veb bw config, err %s aq_err %s\n",
4911 i40e_stat_str(&pf->hw, ret),
4912 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4913 }
4914
4915 out:
4916 return ret;
4917 }
4918
4919 #ifdef CONFIG_I40E_DCB
4920 /**
4921 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4922 * @pf: PF struct
4923 *
4924 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4925 * the caller would've quiesce all the VSIs before calling
4926 * this function
4927 **/
4928 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4929 {
4930 u8 tc_map = 0;
4931 int ret;
4932 u8 v;
4933
4934 /* Enable the TCs available on PF to all VEBs */
4935 tc_map = i40e_pf_get_tc_map(pf);
4936 for (v = 0; v < I40E_MAX_VEB; v++) {
4937 if (!pf->veb[v])
4938 continue;
4939 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4940 if (ret) {
4941 dev_info(&pf->pdev->dev,
4942 "Failed configuring TC for VEB seid=%d\n",
4943 pf->veb[v]->seid);
4944 /* Will try to configure as many components */
4945 }
4946 }
4947
4948 /* Update each VSI */
4949 for (v = 0; v < pf->num_alloc_vsi; v++) {
4950 if (!pf->vsi[v])
4951 continue;
4952
4953 /* - Enable all TCs for the LAN VSI
4954 #ifdef I40E_FCOE
4955 * - For FCoE VSI only enable the TC configured
4956 * as per the APP TLV
4957 #endif
4958 * - For all others keep them at TC0 for now
4959 */
4960 if (v == pf->lan_vsi)
4961 tc_map = i40e_pf_get_tc_map(pf);
4962 else
4963 tc_map = i40e_pf_get_default_tc(pf);
4964 #ifdef I40E_FCOE
4965 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4966 tc_map = i40e_get_fcoe_tc_map(pf);
4967 #endif /* #ifdef I40E_FCOE */
4968
4969 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4970 if (ret) {
4971 dev_info(&pf->pdev->dev,
4972 "Failed configuring TC for VSI seid=%d\n",
4973 pf->vsi[v]->seid);
4974 /* Will try to configure as many components */
4975 } else {
4976 /* Re-configure VSI vectors based on updated TC map */
4977 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4978 if (pf->vsi[v]->netdev)
4979 i40e_dcbnl_set_all(pf->vsi[v]);
4980 }
4981 }
4982 }
4983
4984 /**
4985 * i40e_resume_port_tx - Resume port Tx
4986 * @pf: PF struct
4987 *
4988 * Resume a port's Tx and issue a PF reset in case of failure to
4989 * resume.
4990 **/
4991 static int i40e_resume_port_tx(struct i40e_pf *pf)
4992 {
4993 struct i40e_hw *hw = &pf->hw;
4994 int ret;
4995
4996 ret = i40e_aq_resume_port_tx(hw, NULL);
4997 if (ret) {
4998 dev_info(&pf->pdev->dev,
4999 "Resume Port Tx failed, err %s aq_err %s\n",
5000 i40e_stat_str(&pf->hw, ret),
5001 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5002 /* Schedule PF reset to recover */
5003 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5004 i40e_service_event_schedule(pf);
5005 }
5006
5007 return ret;
5008 }
5009
5010 /**
5011 * i40e_init_pf_dcb - Initialize DCB configuration
5012 * @pf: PF being configured
5013 *
5014 * Query the current DCB configuration and cache it
5015 * in the hardware structure
5016 **/
5017 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5018 {
5019 struct i40e_hw *hw = &pf->hw;
5020 int err = 0;
5021
5022 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5023 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
5024 (pf->hw.aq.fw_maj_ver < 4))
5025 goto out;
5026
5027 /* Get the initial DCB configuration */
5028 err = i40e_init_dcb(hw);
5029 if (!err) {
5030 /* Device/Function is not DCBX capable */
5031 if ((!hw->func_caps.dcb) ||
5032 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5033 dev_info(&pf->pdev->dev,
5034 "DCBX offload is not supported or is disabled for this PF.\n");
5035
5036 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5037 goto out;
5038
5039 } else {
5040 /* When status is not DISABLED then DCBX in FW */
5041 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5042 DCB_CAP_DCBX_VER_IEEE;
5043
5044 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5045 /* Enable DCB tagging only when more than one TC */
5046 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5047 pf->flags |= I40E_FLAG_DCB_ENABLED;
5048 dev_dbg(&pf->pdev->dev,
5049 "DCBX offload is supported for this PF.\n");
5050 }
5051 } else {
5052 dev_info(&pf->pdev->dev,
5053 "Query for DCB configuration failed, err %s aq_err %s\n",
5054 i40e_stat_str(&pf->hw, err),
5055 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5056 }
5057
5058 out:
5059 return err;
5060 }
5061 #endif /* CONFIG_I40E_DCB */
5062 #define SPEED_SIZE 14
5063 #define FC_SIZE 8
5064 /**
5065 * i40e_print_link_message - print link up or down
5066 * @vsi: the VSI for which link needs a message
5067 */
5068 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5069 {
5070 char *speed = "Unknown";
5071 char *fc = "Unknown";
5072
5073 if (vsi->current_isup == isup)
5074 return;
5075 vsi->current_isup = isup;
5076 if (!isup) {
5077 netdev_info(vsi->netdev, "NIC Link is Down\n");
5078 return;
5079 }
5080
5081 /* Warn user if link speed on NPAR enabled partition is not at
5082 * least 10GB
5083 */
5084 if (vsi->back->hw.func_caps.npar_enable &&
5085 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5086 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5087 netdev_warn(vsi->netdev,
5088 "The partition detected link speed that is less than 10Gbps\n");
5089
5090 switch (vsi->back->hw.phy.link_info.link_speed) {
5091 case I40E_LINK_SPEED_40GB:
5092 speed = "40 G";
5093 break;
5094 case I40E_LINK_SPEED_20GB:
5095 speed = "20 G";
5096 break;
5097 case I40E_LINK_SPEED_10GB:
5098 speed = "10 G";
5099 break;
5100 case I40E_LINK_SPEED_1GB:
5101 speed = "1000 M";
5102 break;
5103 case I40E_LINK_SPEED_100MB:
5104 speed = "100 M";
5105 break;
5106 default:
5107 break;
5108 }
5109
5110 switch (vsi->back->hw.fc.current_mode) {
5111 case I40E_FC_FULL:
5112 fc = "RX/TX";
5113 break;
5114 case I40E_FC_TX_PAUSE:
5115 fc = "TX";
5116 break;
5117 case I40E_FC_RX_PAUSE:
5118 fc = "RX";
5119 break;
5120 default:
5121 fc = "None";
5122 break;
5123 }
5124
5125 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5126 speed, fc);
5127 }
5128
5129 /**
5130 * i40e_up_complete - Finish the last steps of bringing up a connection
5131 * @vsi: the VSI being configured
5132 **/
5133 static int i40e_up_complete(struct i40e_vsi *vsi)
5134 {
5135 struct i40e_pf *pf = vsi->back;
5136 int err;
5137
5138 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5139 i40e_vsi_configure_msix(vsi);
5140 else
5141 i40e_configure_msi_and_legacy(vsi);
5142
5143 /* start rings */
5144 err = i40e_vsi_control_rings(vsi, true);
5145 if (err)
5146 return err;
5147
5148 clear_bit(__I40E_DOWN, &vsi->state);
5149 i40e_napi_enable_all(vsi);
5150 i40e_vsi_enable_irq(vsi);
5151
5152 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5153 (vsi->netdev)) {
5154 i40e_print_link_message(vsi, true);
5155 netif_tx_start_all_queues(vsi->netdev);
5156 netif_carrier_on(vsi->netdev);
5157 } else if (vsi->netdev) {
5158 i40e_print_link_message(vsi, false);
5159 /* need to check for qualified module here*/
5160 if ((pf->hw.phy.link_info.link_info &
5161 I40E_AQ_MEDIA_AVAILABLE) &&
5162 (!(pf->hw.phy.link_info.an_info &
5163 I40E_AQ_QUALIFIED_MODULE)))
5164 netdev_err(vsi->netdev,
5165 "the driver failed to link because an unqualified module was detected.");
5166 }
5167
5168 /* replay FDIR SB filters */
5169 if (vsi->type == I40E_VSI_FDIR) {
5170 /* reset fd counters */
5171 pf->fd_add_err = pf->fd_atr_cnt = 0;
5172 if (pf->fd_tcp_rule > 0) {
5173 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5174 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5175 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5176 pf->fd_tcp_rule = 0;
5177 }
5178 i40e_fdir_filter_restore(vsi);
5179 }
5180 i40e_service_event_schedule(pf);
5181
5182 return 0;
5183 }
5184
5185 /**
5186 * i40e_vsi_reinit_locked - Reset the VSI
5187 * @vsi: the VSI being configured
5188 *
5189 * Rebuild the ring structs after some configuration
5190 * has changed, e.g. MTU size.
5191 **/
5192 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5193 {
5194 struct i40e_pf *pf = vsi->back;
5195
5196 WARN_ON(in_interrupt());
5197 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5198 usleep_range(1000, 2000);
5199 i40e_down(vsi);
5200
5201 /* Give a VF some time to respond to the reset. The
5202 * two second wait is based upon the watchdog cycle in
5203 * the VF driver.
5204 */
5205 if (vsi->type == I40E_VSI_SRIOV)
5206 msleep(2000);
5207 i40e_up(vsi);
5208 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5209 }
5210
5211 /**
5212 * i40e_up - Bring the connection back up after being down
5213 * @vsi: the VSI being configured
5214 **/
5215 int i40e_up(struct i40e_vsi *vsi)
5216 {
5217 int err;
5218
5219 err = i40e_vsi_configure(vsi);
5220 if (!err)
5221 err = i40e_up_complete(vsi);
5222
5223 return err;
5224 }
5225
5226 /**
5227 * i40e_down - Shutdown the connection processing
5228 * @vsi: the VSI being stopped
5229 **/
5230 void i40e_down(struct i40e_vsi *vsi)
5231 {
5232 int i;
5233
5234 /* It is assumed that the caller of this function
5235 * sets the vsi->state __I40E_DOWN bit.
5236 */
5237 if (vsi->netdev) {
5238 netif_carrier_off(vsi->netdev);
5239 netif_tx_disable(vsi->netdev);
5240 }
5241 i40e_vsi_disable_irq(vsi);
5242 i40e_vsi_control_rings(vsi, false);
5243 i40e_napi_disable_all(vsi);
5244
5245 for (i = 0; i < vsi->num_queue_pairs; i++) {
5246 i40e_clean_tx_ring(vsi->tx_rings[i]);
5247 i40e_clean_rx_ring(vsi->rx_rings[i]);
5248 }
5249 }
5250
5251 /**
5252 * i40e_setup_tc - configure multiple traffic classes
5253 * @netdev: net device to configure
5254 * @tc: number of traffic classes to enable
5255 **/
5256 #ifdef I40E_FCOE
5257 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5258 #else
5259 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5260 #endif
5261 {
5262 struct i40e_netdev_priv *np = netdev_priv(netdev);
5263 struct i40e_vsi *vsi = np->vsi;
5264 struct i40e_pf *pf = vsi->back;
5265 u8 enabled_tc = 0;
5266 int ret = -EINVAL;
5267 int i;
5268
5269 /* Check if DCB enabled to continue */
5270 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5271 netdev_info(netdev, "DCB is not enabled for adapter\n");
5272 goto exit;
5273 }
5274
5275 /* Check if MFP enabled */
5276 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5277 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5278 goto exit;
5279 }
5280
5281 /* Check whether tc count is within enabled limit */
5282 if (tc > i40e_pf_get_num_tc(pf)) {
5283 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5284 goto exit;
5285 }
5286
5287 /* Generate TC map for number of tc requested */
5288 for (i = 0; i < tc; i++)
5289 enabled_tc |= BIT(i);
5290
5291 /* Requesting same TC configuration as already enabled */
5292 if (enabled_tc == vsi->tc_config.enabled_tc)
5293 return 0;
5294
5295 /* Quiesce VSI queues */
5296 i40e_quiesce_vsi(vsi);
5297
5298 /* Configure VSI for enabled TCs */
5299 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5300 if (ret) {
5301 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5302 vsi->seid);
5303 goto exit;
5304 }
5305
5306 /* Unquiesce VSI */
5307 i40e_unquiesce_vsi(vsi);
5308
5309 exit:
5310 return ret;
5311 }
5312
5313 /**
5314 * i40e_open - Called when a network interface is made active
5315 * @netdev: network interface device structure
5316 *
5317 * The open entry point is called when a network interface is made
5318 * active by the system (IFF_UP). At this point all resources needed
5319 * for transmit and receive operations are allocated, the interrupt
5320 * handler is registered with the OS, the netdev watchdog subtask is
5321 * enabled, and the stack is notified that the interface is ready.
5322 *
5323 * Returns 0 on success, negative value on failure
5324 **/
5325 int i40e_open(struct net_device *netdev)
5326 {
5327 struct i40e_netdev_priv *np = netdev_priv(netdev);
5328 struct i40e_vsi *vsi = np->vsi;
5329 struct i40e_pf *pf = vsi->back;
5330 int err;
5331
5332 /* disallow open during test or if eeprom is broken */
5333 if (test_bit(__I40E_TESTING, &pf->state) ||
5334 test_bit(__I40E_BAD_EEPROM, &pf->state))
5335 return -EBUSY;
5336
5337 netif_carrier_off(netdev);
5338
5339 err = i40e_vsi_open(vsi);
5340 if (err)
5341 return err;
5342
5343 /* configure global TSO hardware offload settings */
5344 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5345 TCP_FLAG_FIN) >> 16);
5346 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5347 TCP_FLAG_FIN |
5348 TCP_FLAG_CWR) >> 16);
5349 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5350
5351 #ifdef CONFIG_I40E_VXLAN
5352 vxlan_get_rx_port(netdev);
5353 #endif
5354 #ifdef CONFIG_I40E_GENEVE
5355 geneve_get_rx_port(netdev);
5356 #endif
5357
5358 return 0;
5359 }
5360
5361 /**
5362 * i40e_vsi_open -
5363 * @vsi: the VSI to open
5364 *
5365 * Finish initialization of the VSI.
5366 *
5367 * Returns 0 on success, negative value on failure
5368 **/
5369 int i40e_vsi_open(struct i40e_vsi *vsi)
5370 {
5371 struct i40e_pf *pf = vsi->back;
5372 char int_name[I40E_INT_NAME_STR_LEN];
5373 int err;
5374
5375 /* allocate descriptors */
5376 err = i40e_vsi_setup_tx_resources(vsi);
5377 if (err)
5378 goto err_setup_tx;
5379 err = i40e_vsi_setup_rx_resources(vsi);
5380 if (err)
5381 goto err_setup_rx;
5382
5383 err = i40e_vsi_configure(vsi);
5384 if (err)
5385 goto err_setup_rx;
5386
5387 if (vsi->netdev) {
5388 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5389 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5390 err = i40e_vsi_request_irq(vsi, int_name);
5391 if (err)
5392 goto err_setup_rx;
5393
5394 /* Notify the stack of the actual queue counts. */
5395 err = netif_set_real_num_tx_queues(vsi->netdev,
5396 vsi->num_queue_pairs);
5397 if (err)
5398 goto err_set_queues;
5399
5400 err = netif_set_real_num_rx_queues(vsi->netdev,
5401 vsi->num_queue_pairs);
5402 if (err)
5403 goto err_set_queues;
5404
5405 } else if (vsi->type == I40E_VSI_FDIR) {
5406 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5407 dev_driver_string(&pf->pdev->dev),
5408 dev_name(&pf->pdev->dev));
5409 err = i40e_vsi_request_irq(vsi, int_name);
5410
5411 } else {
5412 err = -EINVAL;
5413 goto err_setup_rx;
5414 }
5415
5416 err = i40e_up_complete(vsi);
5417 if (err)
5418 goto err_up_complete;
5419
5420 return 0;
5421
5422 err_up_complete:
5423 i40e_down(vsi);
5424 err_set_queues:
5425 i40e_vsi_free_irq(vsi);
5426 err_setup_rx:
5427 i40e_vsi_free_rx_resources(vsi);
5428 err_setup_tx:
5429 i40e_vsi_free_tx_resources(vsi);
5430 if (vsi == pf->vsi[pf->lan_vsi])
5431 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5432
5433 return err;
5434 }
5435
5436 /**
5437 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5438 * @pf: Pointer to PF
5439 *
5440 * This function destroys the hlist where all the Flow Director
5441 * filters were saved.
5442 **/
5443 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5444 {
5445 struct i40e_fdir_filter *filter;
5446 struct hlist_node *node2;
5447
5448 hlist_for_each_entry_safe(filter, node2,
5449 &pf->fdir_filter_list, fdir_node) {
5450 hlist_del(&filter->fdir_node);
5451 kfree(filter);
5452 }
5453 pf->fdir_pf_active_filters = 0;
5454 }
5455
5456 /**
5457 * i40e_close - Disables a network interface
5458 * @netdev: network interface device structure
5459 *
5460 * The close entry point is called when an interface is de-activated
5461 * by the OS. The hardware is still under the driver's control, but
5462 * this netdev interface is disabled.
5463 *
5464 * Returns 0, this is not allowed to fail
5465 **/
5466 #ifdef I40E_FCOE
5467 int i40e_close(struct net_device *netdev)
5468 #else
5469 static int i40e_close(struct net_device *netdev)
5470 #endif
5471 {
5472 struct i40e_netdev_priv *np = netdev_priv(netdev);
5473 struct i40e_vsi *vsi = np->vsi;
5474
5475 i40e_vsi_close(vsi);
5476
5477 return 0;
5478 }
5479
5480 /**
5481 * i40e_do_reset - Start a PF or Core Reset sequence
5482 * @pf: board private structure
5483 * @reset_flags: which reset is requested
5484 *
5485 * The essential difference in resets is that the PF Reset
5486 * doesn't clear the packet buffers, doesn't reset the PE
5487 * firmware, and doesn't bother the other PFs on the chip.
5488 **/
5489 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5490 {
5491 u32 val;
5492
5493 WARN_ON(in_interrupt());
5494
5495 if (i40e_check_asq_alive(&pf->hw))
5496 i40e_vc_notify_reset(pf);
5497
5498 /* do the biggest reset indicated */
5499 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5500
5501 /* Request a Global Reset
5502 *
5503 * This will start the chip's countdown to the actual full
5504 * chip reset event, and a warning interrupt to be sent
5505 * to all PFs, including the requestor. Our handler
5506 * for the warning interrupt will deal with the shutdown
5507 * and recovery of the switch setup.
5508 */
5509 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5510 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5511 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5512 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5513
5514 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5515
5516 /* Request a Core Reset
5517 *
5518 * Same as Global Reset, except does *not* include the MAC/PHY
5519 */
5520 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5521 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5522 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5523 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5524 i40e_flush(&pf->hw);
5525
5526 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5527
5528 /* Request a PF Reset
5529 *
5530 * Resets only the PF-specific registers
5531 *
5532 * This goes directly to the tear-down and rebuild of
5533 * the switch, since we need to do all the recovery as
5534 * for the Core Reset.
5535 */
5536 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5537 i40e_handle_reset_warning(pf);
5538
5539 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5540 int v;
5541
5542 /* Find the VSI(s) that requested a re-init */
5543 dev_info(&pf->pdev->dev,
5544 "VSI reinit requested\n");
5545 for (v = 0; v < pf->num_alloc_vsi; v++) {
5546 struct i40e_vsi *vsi = pf->vsi[v];
5547
5548 if (vsi != NULL &&
5549 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5550 i40e_vsi_reinit_locked(pf->vsi[v]);
5551 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5552 }
5553 }
5554 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5555 int v;
5556
5557 /* Find the VSI(s) that needs to be brought down */
5558 dev_info(&pf->pdev->dev, "VSI down requested\n");
5559 for (v = 0; v < pf->num_alloc_vsi; v++) {
5560 struct i40e_vsi *vsi = pf->vsi[v];
5561
5562 if (vsi != NULL &&
5563 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5564 set_bit(__I40E_DOWN, &vsi->state);
5565 i40e_down(vsi);
5566 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5567 }
5568 }
5569 } else {
5570 dev_info(&pf->pdev->dev,
5571 "bad reset request 0x%08x\n", reset_flags);
5572 }
5573 }
5574
5575 #ifdef CONFIG_I40E_DCB
5576 /**
5577 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5578 * @pf: board private structure
5579 * @old_cfg: current DCB config
5580 * @new_cfg: new DCB config
5581 **/
5582 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5583 struct i40e_dcbx_config *old_cfg,
5584 struct i40e_dcbx_config *new_cfg)
5585 {
5586 bool need_reconfig = false;
5587
5588 /* Check if ETS configuration has changed */
5589 if (memcmp(&new_cfg->etscfg,
5590 &old_cfg->etscfg,
5591 sizeof(new_cfg->etscfg))) {
5592 /* If Priority Table has changed reconfig is needed */
5593 if (memcmp(&new_cfg->etscfg.prioritytable,
5594 &old_cfg->etscfg.prioritytable,
5595 sizeof(new_cfg->etscfg.prioritytable))) {
5596 need_reconfig = true;
5597 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5598 }
5599
5600 if (memcmp(&new_cfg->etscfg.tcbwtable,
5601 &old_cfg->etscfg.tcbwtable,
5602 sizeof(new_cfg->etscfg.tcbwtable)))
5603 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5604
5605 if (memcmp(&new_cfg->etscfg.tsatable,
5606 &old_cfg->etscfg.tsatable,
5607 sizeof(new_cfg->etscfg.tsatable)))
5608 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5609 }
5610
5611 /* Check if PFC configuration has changed */
5612 if (memcmp(&new_cfg->pfc,
5613 &old_cfg->pfc,
5614 sizeof(new_cfg->pfc))) {
5615 need_reconfig = true;
5616 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5617 }
5618
5619 /* Check if APP Table has changed */
5620 if (memcmp(&new_cfg->app,
5621 &old_cfg->app,
5622 sizeof(new_cfg->app))) {
5623 need_reconfig = true;
5624 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5625 }
5626
5627 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5628 return need_reconfig;
5629 }
5630
5631 /**
5632 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5633 * @pf: board private structure
5634 * @e: event info posted on ARQ
5635 **/
5636 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5637 struct i40e_arq_event_info *e)
5638 {
5639 struct i40e_aqc_lldp_get_mib *mib =
5640 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5641 struct i40e_hw *hw = &pf->hw;
5642 struct i40e_dcbx_config tmp_dcbx_cfg;
5643 bool need_reconfig = false;
5644 int ret = 0;
5645 u8 type;
5646
5647 /* Not DCB capable or capability disabled */
5648 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5649 return ret;
5650
5651 /* Ignore if event is not for Nearest Bridge */
5652 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5653 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5654 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5655 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5656 return ret;
5657
5658 /* Check MIB Type and return if event for Remote MIB update */
5659 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5660 dev_dbg(&pf->pdev->dev,
5661 "LLDP event mib type %s\n", type ? "remote" : "local");
5662 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5663 /* Update the remote cached instance and return */
5664 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5665 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5666 &hw->remote_dcbx_config);
5667 goto exit;
5668 }
5669
5670 /* Store the old configuration */
5671 tmp_dcbx_cfg = hw->local_dcbx_config;
5672
5673 /* Reset the old DCBx configuration data */
5674 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5675 /* Get updated DCBX data from firmware */
5676 ret = i40e_get_dcb_config(&pf->hw);
5677 if (ret) {
5678 dev_info(&pf->pdev->dev,
5679 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5680 i40e_stat_str(&pf->hw, ret),
5681 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5682 goto exit;
5683 }
5684
5685 /* No change detected in DCBX configs */
5686 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5687 sizeof(tmp_dcbx_cfg))) {
5688 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5689 goto exit;
5690 }
5691
5692 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5693 &hw->local_dcbx_config);
5694
5695 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5696
5697 if (!need_reconfig)
5698 goto exit;
5699
5700 /* Enable DCB tagging only when more than one TC */
5701 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5702 pf->flags |= I40E_FLAG_DCB_ENABLED;
5703 else
5704 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5705
5706 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5707 /* Reconfiguration needed quiesce all VSIs */
5708 i40e_pf_quiesce_all_vsi(pf);
5709
5710 /* Changes in configuration update VEB/VSI */
5711 i40e_dcb_reconfigure(pf);
5712
5713 ret = i40e_resume_port_tx(pf);
5714
5715 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5716 /* In case of error no point in resuming VSIs */
5717 if (ret)
5718 goto exit;
5719
5720 /* Wait for the PF's Tx queues to be disabled */
5721 ret = i40e_pf_wait_txq_disabled(pf);
5722 if (ret) {
5723 /* Schedule PF reset to recover */
5724 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5725 i40e_service_event_schedule(pf);
5726 } else {
5727 i40e_pf_unquiesce_all_vsi(pf);
5728 }
5729
5730 exit:
5731 return ret;
5732 }
5733 #endif /* CONFIG_I40E_DCB */
5734
5735 /**
5736 * i40e_do_reset_safe - Protected reset path for userland calls.
5737 * @pf: board private structure
5738 * @reset_flags: which reset is requested
5739 *
5740 **/
5741 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5742 {
5743 rtnl_lock();
5744 i40e_do_reset(pf, reset_flags);
5745 rtnl_unlock();
5746 }
5747
5748 /**
5749 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5750 * @pf: board private structure
5751 * @e: event info posted on ARQ
5752 *
5753 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5754 * and VF queues
5755 **/
5756 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5757 struct i40e_arq_event_info *e)
5758 {
5759 struct i40e_aqc_lan_overflow *data =
5760 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5761 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5762 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5763 struct i40e_hw *hw = &pf->hw;
5764 struct i40e_vf *vf;
5765 u16 vf_id;
5766
5767 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5768 queue, qtx_ctl);
5769
5770 /* Queue belongs to VF, find the VF and issue VF reset */
5771 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5772 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5773 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5774 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5775 vf_id -= hw->func_caps.vf_base_id;
5776 vf = &pf->vf[vf_id];
5777 i40e_vc_notify_vf_reset(vf);
5778 /* Allow VF to process pending reset notification */
5779 msleep(20);
5780 i40e_reset_vf(vf, false);
5781 }
5782 }
5783
5784 /**
5785 * i40e_service_event_complete - Finish up the service event
5786 * @pf: board private structure
5787 **/
5788 static void i40e_service_event_complete(struct i40e_pf *pf)
5789 {
5790 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5791
5792 /* flush memory to make sure state is correct before next watchog */
5793 smp_mb__before_atomic();
5794 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5795 }
5796
5797 /**
5798 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5799 * @pf: board private structure
5800 **/
5801 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5802 {
5803 u32 val, fcnt_prog;
5804
5805 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5806 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5807 return fcnt_prog;
5808 }
5809
5810 /**
5811 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5812 * @pf: board private structure
5813 **/
5814 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5815 {
5816 u32 val, fcnt_prog;
5817
5818 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5819 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5820 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5821 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5822 return fcnt_prog;
5823 }
5824
5825 /**
5826 * i40e_get_global_fd_count - Get total FD filters programmed on device
5827 * @pf: board private structure
5828 **/
5829 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5830 {
5831 u32 val, fcnt_prog;
5832
5833 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5834 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5835 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5836 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5837 return fcnt_prog;
5838 }
5839
5840 /**
5841 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5842 * @pf: board private structure
5843 **/
5844 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5845 {
5846 struct i40e_fdir_filter *filter;
5847 u32 fcnt_prog, fcnt_avail;
5848 struct hlist_node *node;
5849
5850 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5851 return;
5852
5853 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5854 * to re-enable
5855 */
5856 fcnt_prog = i40e_get_global_fd_count(pf);
5857 fcnt_avail = pf->fdir_pf_filter_count;
5858 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5859 (pf->fd_add_err == 0) ||
5860 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5861 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5862 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5863 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5864 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5865 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5866 }
5867 }
5868 /* Wait for some more space to be available to turn on ATR */
5869 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5870 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5871 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5872 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5873 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5874 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5875 }
5876 }
5877
5878 /* if hw had a problem adding a filter, delete it */
5879 if (pf->fd_inv > 0) {
5880 hlist_for_each_entry_safe(filter, node,
5881 &pf->fdir_filter_list, fdir_node) {
5882 if (filter->fd_id == pf->fd_inv) {
5883 hlist_del(&filter->fdir_node);
5884 kfree(filter);
5885 pf->fdir_pf_active_filters--;
5886 }
5887 }
5888 }
5889 }
5890
5891 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5892 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5893 /**
5894 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5895 * @pf: board private structure
5896 **/
5897 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5898 {
5899 unsigned long min_flush_time;
5900 int flush_wait_retry = 50;
5901 bool disable_atr = false;
5902 int fd_room;
5903 int reg;
5904
5905 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5906 return;
5907
5908 if (!time_after(jiffies, pf->fd_flush_timestamp +
5909 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5910 return;
5911
5912 /* If the flush is happening too quick and we have mostly SB rules we
5913 * should not re-enable ATR for some time.
5914 */
5915 min_flush_time = pf->fd_flush_timestamp +
5916 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5917 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5918
5919 if (!(time_after(jiffies, min_flush_time)) &&
5920 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5921 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5922 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5923 disable_atr = true;
5924 }
5925
5926 pf->fd_flush_timestamp = jiffies;
5927 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5928 /* flush all filters */
5929 wr32(&pf->hw, I40E_PFQF_CTL_1,
5930 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5931 i40e_flush(&pf->hw);
5932 pf->fd_flush_cnt++;
5933 pf->fd_add_err = 0;
5934 do {
5935 /* Check FD flush status every 5-6msec */
5936 usleep_range(5000, 6000);
5937 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5938 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5939 break;
5940 } while (flush_wait_retry--);
5941 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5942 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5943 } else {
5944 /* replay sideband filters */
5945 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5946 if (!disable_atr)
5947 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5948 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5949 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5950 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5951 }
5952
5953 }
5954
5955 /**
5956 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5957 * @pf: board private structure
5958 **/
5959 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5960 {
5961 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5962 }
5963
5964 /* We can see up to 256 filter programming desc in transit if the filters are
5965 * being applied really fast; before we see the first
5966 * filter miss error on Rx queue 0. Accumulating enough error messages before
5967 * reacting will make sure we don't cause flush too often.
5968 */
5969 #define I40E_MAX_FD_PROGRAM_ERROR 256
5970
5971 /**
5972 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5973 * @pf: board private structure
5974 **/
5975 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5976 {
5977
5978 /* if interface is down do nothing */
5979 if (test_bit(__I40E_DOWN, &pf->state))
5980 return;
5981
5982 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5983 return;
5984
5985 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5986 i40e_fdir_flush_and_replay(pf);
5987
5988 i40e_fdir_check_and_reenable(pf);
5989
5990 }
5991
5992 /**
5993 * i40e_vsi_link_event - notify VSI of a link event
5994 * @vsi: vsi to be notified
5995 * @link_up: link up or down
5996 **/
5997 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5998 {
5999 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6000 return;
6001
6002 switch (vsi->type) {
6003 case I40E_VSI_MAIN:
6004 #ifdef I40E_FCOE
6005 case I40E_VSI_FCOE:
6006 #endif
6007 if (!vsi->netdev || !vsi->netdev_registered)
6008 break;
6009
6010 if (link_up) {
6011 netif_carrier_on(vsi->netdev);
6012 netif_tx_wake_all_queues(vsi->netdev);
6013 } else {
6014 netif_carrier_off(vsi->netdev);
6015 netif_tx_stop_all_queues(vsi->netdev);
6016 }
6017 break;
6018
6019 case I40E_VSI_SRIOV:
6020 case I40E_VSI_VMDQ2:
6021 case I40E_VSI_CTRL:
6022 case I40E_VSI_MIRROR:
6023 default:
6024 /* there is no notification for other VSIs */
6025 break;
6026 }
6027 }
6028
6029 /**
6030 * i40e_veb_link_event - notify elements on the veb of a link event
6031 * @veb: veb to be notified
6032 * @link_up: link up or down
6033 **/
6034 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6035 {
6036 struct i40e_pf *pf;
6037 int i;
6038
6039 if (!veb || !veb->pf)
6040 return;
6041 pf = veb->pf;
6042
6043 /* depth first... */
6044 for (i = 0; i < I40E_MAX_VEB; i++)
6045 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6046 i40e_veb_link_event(pf->veb[i], link_up);
6047
6048 /* ... now the local VSIs */
6049 for (i = 0; i < pf->num_alloc_vsi; i++)
6050 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6051 i40e_vsi_link_event(pf->vsi[i], link_up);
6052 }
6053
6054 /**
6055 * i40e_link_event - Update netif_carrier status
6056 * @pf: board private structure
6057 **/
6058 static void i40e_link_event(struct i40e_pf *pf)
6059 {
6060 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6061 u8 new_link_speed, old_link_speed;
6062 i40e_status status;
6063 bool new_link, old_link;
6064
6065 /* save off old link status information */
6066 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6067
6068 /* set this to force the get_link_status call to refresh state */
6069 pf->hw.phy.get_link_info = true;
6070
6071 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6072
6073 status = i40e_get_link_status(&pf->hw, &new_link);
6074 if (status) {
6075 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6076 status);
6077 return;
6078 }
6079
6080 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6081 new_link_speed = pf->hw.phy.link_info.link_speed;
6082
6083 if (new_link == old_link &&
6084 new_link_speed == old_link_speed &&
6085 (test_bit(__I40E_DOWN, &vsi->state) ||
6086 new_link == netif_carrier_ok(vsi->netdev)))
6087 return;
6088
6089 if (!test_bit(__I40E_DOWN, &vsi->state))
6090 i40e_print_link_message(vsi, new_link);
6091
6092 /* Notify the base of the switch tree connected to
6093 * the link. Floating VEBs are not notified.
6094 */
6095 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6096 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6097 else
6098 i40e_vsi_link_event(vsi, new_link);
6099
6100 if (pf->vf)
6101 i40e_vc_notify_link_state(pf);
6102
6103 if (pf->flags & I40E_FLAG_PTP)
6104 i40e_ptp_set_increment(pf);
6105 }
6106
6107 /**
6108 * i40e_watchdog_subtask - periodic checks not using event driven response
6109 * @pf: board private structure
6110 **/
6111 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6112 {
6113 int i;
6114
6115 /* if interface is down do nothing */
6116 if (test_bit(__I40E_DOWN, &pf->state) ||
6117 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6118 return;
6119
6120 /* make sure we don't do these things too often */
6121 if (time_before(jiffies, (pf->service_timer_previous +
6122 pf->service_timer_period)))
6123 return;
6124 pf->service_timer_previous = jiffies;
6125
6126 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6127 i40e_link_event(pf);
6128
6129 /* Update the stats for active netdevs so the network stack
6130 * can look at updated numbers whenever it cares to
6131 */
6132 for (i = 0; i < pf->num_alloc_vsi; i++)
6133 if (pf->vsi[i] && pf->vsi[i]->netdev)
6134 i40e_update_stats(pf->vsi[i]);
6135
6136 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6137 /* Update the stats for the active switching components */
6138 for (i = 0; i < I40E_MAX_VEB; i++)
6139 if (pf->veb[i])
6140 i40e_update_veb_stats(pf->veb[i]);
6141 }
6142
6143 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6144 }
6145
6146 /**
6147 * i40e_reset_subtask - Set up for resetting the device and driver
6148 * @pf: board private structure
6149 **/
6150 static void i40e_reset_subtask(struct i40e_pf *pf)
6151 {
6152 u32 reset_flags = 0;
6153
6154 rtnl_lock();
6155 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6156 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6157 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6158 }
6159 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6160 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6161 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6162 }
6163 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6164 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6165 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6166 }
6167 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6168 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6169 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6170 }
6171 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6172 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6173 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6174 }
6175
6176 /* If there's a recovery already waiting, it takes
6177 * precedence before starting a new reset sequence.
6178 */
6179 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6180 i40e_handle_reset_warning(pf);
6181 goto unlock;
6182 }
6183
6184 /* If we're already down or resetting, just bail */
6185 if (reset_flags &&
6186 !test_bit(__I40E_DOWN, &pf->state) &&
6187 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6188 i40e_do_reset(pf, reset_flags);
6189
6190 unlock:
6191 rtnl_unlock();
6192 }
6193
6194 /**
6195 * i40e_handle_link_event - Handle link event
6196 * @pf: board private structure
6197 * @e: event info posted on ARQ
6198 **/
6199 static void i40e_handle_link_event(struct i40e_pf *pf,
6200 struct i40e_arq_event_info *e)
6201 {
6202 struct i40e_aqc_get_link_status *status =
6203 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6204
6205 /* Do a new status request to re-enable LSE reporting
6206 * and load new status information into the hw struct
6207 * This completely ignores any state information
6208 * in the ARQ event info, instead choosing to always
6209 * issue the AQ update link status command.
6210 */
6211 i40e_link_event(pf);
6212
6213 /* check for unqualified module, if link is down */
6214 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6215 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6216 (!(status->link_info & I40E_AQ_LINK_UP)))
6217 dev_err(&pf->pdev->dev,
6218 "The driver failed to link because an unqualified module was detected.\n");
6219 }
6220
6221 /**
6222 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6223 * @pf: board private structure
6224 **/
6225 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6226 {
6227 struct i40e_arq_event_info event;
6228 struct i40e_hw *hw = &pf->hw;
6229 u16 pending, i = 0;
6230 i40e_status ret;
6231 u16 opcode;
6232 u32 oldval;
6233 u32 val;
6234
6235 /* Do not run clean AQ when PF reset fails */
6236 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6237 return;
6238
6239 /* check for error indications */
6240 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6241 oldval = val;
6242 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6243 if (hw->debug_mask & I40E_DEBUG_AQ)
6244 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6245 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6246 }
6247 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6248 if (hw->debug_mask & I40E_DEBUG_AQ)
6249 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6250 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6251 pf->arq_overflows++;
6252 }
6253 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6254 if (hw->debug_mask & I40E_DEBUG_AQ)
6255 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6256 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6257 }
6258 if (oldval != val)
6259 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6260
6261 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6262 oldval = val;
6263 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6264 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6265 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6266 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6267 }
6268 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6269 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6270 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6271 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6272 }
6273 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6274 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6275 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6276 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6277 }
6278 if (oldval != val)
6279 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6280
6281 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6282 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6283 if (!event.msg_buf)
6284 return;
6285
6286 do {
6287 ret = i40e_clean_arq_element(hw, &event, &pending);
6288 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6289 break;
6290 else if (ret) {
6291 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6292 break;
6293 }
6294
6295 opcode = le16_to_cpu(event.desc.opcode);
6296 switch (opcode) {
6297
6298 case i40e_aqc_opc_get_link_status:
6299 i40e_handle_link_event(pf, &event);
6300 break;
6301 case i40e_aqc_opc_send_msg_to_pf:
6302 ret = i40e_vc_process_vf_msg(pf,
6303 le16_to_cpu(event.desc.retval),
6304 le32_to_cpu(event.desc.cookie_high),
6305 le32_to_cpu(event.desc.cookie_low),
6306 event.msg_buf,
6307 event.msg_len);
6308 break;
6309 case i40e_aqc_opc_lldp_update_mib:
6310 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6311 #ifdef CONFIG_I40E_DCB
6312 rtnl_lock();
6313 ret = i40e_handle_lldp_event(pf, &event);
6314 rtnl_unlock();
6315 #endif /* CONFIG_I40E_DCB */
6316 break;
6317 case i40e_aqc_opc_event_lan_overflow:
6318 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6319 i40e_handle_lan_overflow_event(pf, &event);
6320 break;
6321 case i40e_aqc_opc_send_msg_to_peer:
6322 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6323 break;
6324 case i40e_aqc_opc_nvm_erase:
6325 case i40e_aqc_opc_nvm_update:
6326 case i40e_aqc_opc_oem_post_update:
6327 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6328 break;
6329 default:
6330 dev_info(&pf->pdev->dev,
6331 "ARQ Error: Unknown event 0x%04x received\n",
6332 opcode);
6333 break;
6334 }
6335 } while (pending && (i++ < pf->adminq_work_limit));
6336
6337 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6338 /* re-enable Admin queue interrupt cause */
6339 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6340 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6341 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6342 i40e_flush(hw);
6343
6344 kfree(event.msg_buf);
6345 }
6346
6347 /**
6348 * i40e_verify_eeprom - make sure eeprom is good to use
6349 * @pf: board private structure
6350 **/
6351 static void i40e_verify_eeprom(struct i40e_pf *pf)
6352 {
6353 int err;
6354
6355 err = i40e_diag_eeprom_test(&pf->hw);
6356 if (err) {
6357 /* retry in case of garbage read */
6358 err = i40e_diag_eeprom_test(&pf->hw);
6359 if (err) {
6360 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6361 err);
6362 set_bit(__I40E_BAD_EEPROM, &pf->state);
6363 }
6364 }
6365
6366 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6367 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6368 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6369 }
6370 }
6371
6372 /**
6373 * i40e_enable_pf_switch_lb
6374 * @pf: pointer to the PF structure
6375 *
6376 * enable switch loop back or die - no point in a return value
6377 **/
6378 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6379 {
6380 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6381 struct i40e_vsi_context ctxt;
6382 int ret;
6383
6384 ctxt.seid = pf->main_vsi_seid;
6385 ctxt.pf_num = pf->hw.pf_id;
6386 ctxt.vf_num = 0;
6387 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6388 if (ret) {
6389 dev_info(&pf->pdev->dev,
6390 "couldn't get PF vsi config, err %s aq_err %s\n",
6391 i40e_stat_str(&pf->hw, ret),
6392 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6393 return;
6394 }
6395 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6396 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6397 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6398
6399 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6400 if (ret) {
6401 dev_info(&pf->pdev->dev,
6402 "update vsi switch failed, err %s aq_err %s\n",
6403 i40e_stat_str(&pf->hw, ret),
6404 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6405 }
6406 }
6407
6408 /**
6409 * i40e_disable_pf_switch_lb
6410 * @pf: pointer to the PF structure
6411 *
6412 * disable switch loop back or die - no point in a return value
6413 **/
6414 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6415 {
6416 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6417 struct i40e_vsi_context ctxt;
6418 int ret;
6419
6420 ctxt.seid = pf->main_vsi_seid;
6421 ctxt.pf_num = pf->hw.pf_id;
6422 ctxt.vf_num = 0;
6423 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6424 if (ret) {
6425 dev_info(&pf->pdev->dev,
6426 "couldn't get PF vsi config, err %s aq_err %s\n",
6427 i40e_stat_str(&pf->hw, ret),
6428 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6429 return;
6430 }
6431 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6432 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6433 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6434
6435 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6436 if (ret) {
6437 dev_info(&pf->pdev->dev,
6438 "update vsi switch failed, err %s aq_err %s\n",
6439 i40e_stat_str(&pf->hw, ret),
6440 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6441 }
6442 }
6443
6444 /**
6445 * i40e_config_bridge_mode - Configure the HW bridge mode
6446 * @veb: pointer to the bridge instance
6447 *
6448 * Configure the loop back mode for the LAN VSI that is downlink to the
6449 * specified HW bridge instance. It is expected this function is called
6450 * when a new HW bridge is instantiated.
6451 **/
6452 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6453 {
6454 struct i40e_pf *pf = veb->pf;
6455
6456 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6457 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6458 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6459 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6460 i40e_disable_pf_switch_lb(pf);
6461 else
6462 i40e_enable_pf_switch_lb(pf);
6463 }
6464
6465 /**
6466 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6467 * @veb: pointer to the VEB instance
6468 *
6469 * This is a recursive function that first builds the attached VSIs then
6470 * recurses in to build the next layer of VEB. We track the connections
6471 * through our own index numbers because the seid's from the HW could
6472 * change across the reset.
6473 **/
6474 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6475 {
6476 struct i40e_vsi *ctl_vsi = NULL;
6477 struct i40e_pf *pf = veb->pf;
6478 int v, veb_idx;
6479 int ret;
6480
6481 /* build VSI that owns this VEB, temporarily attached to base VEB */
6482 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6483 if (pf->vsi[v] &&
6484 pf->vsi[v]->veb_idx == veb->idx &&
6485 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6486 ctl_vsi = pf->vsi[v];
6487 break;
6488 }
6489 }
6490 if (!ctl_vsi) {
6491 dev_info(&pf->pdev->dev,
6492 "missing owner VSI for veb_idx %d\n", veb->idx);
6493 ret = -ENOENT;
6494 goto end_reconstitute;
6495 }
6496 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6497 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6498 ret = i40e_add_vsi(ctl_vsi);
6499 if (ret) {
6500 dev_info(&pf->pdev->dev,
6501 "rebuild of veb_idx %d owner VSI failed: %d\n",
6502 veb->idx, ret);
6503 goto end_reconstitute;
6504 }
6505 i40e_vsi_reset_stats(ctl_vsi);
6506
6507 /* create the VEB in the switch and move the VSI onto the VEB */
6508 ret = i40e_add_veb(veb, ctl_vsi);
6509 if (ret)
6510 goto end_reconstitute;
6511
6512 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6513 veb->bridge_mode = BRIDGE_MODE_VEB;
6514 else
6515 veb->bridge_mode = BRIDGE_MODE_VEPA;
6516 i40e_config_bridge_mode(veb);
6517
6518 /* create the remaining VSIs attached to this VEB */
6519 for (v = 0; v < pf->num_alloc_vsi; v++) {
6520 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6521 continue;
6522
6523 if (pf->vsi[v]->veb_idx == veb->idx) {
6524 struct i40e_vsi *vsi = pf->vsi[v];
6525
6526 vsi->uplink_seid = veb->seid;
6527 ret = i40e_add_vsi(vsi);
6528 if (ret) {
6529 dev_info(&pf->pdev->dev,
6530 "rebuild of vsi_idx %d failed: %d\n",
6531 v, ret);
6532 goto end_reconstitute;
6533 }
6534 i40e_vsi_reset_stats(vsi);
6535 }
6536 }
6537
6538 /* create any VEBs attached to this VEB - RECURSION */
6539 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6540 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6541 pf->veb[veb_idx]->uplink_seid = veb->seid;
6542 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6543 if (ret)
6544 break;
6545 }
6546 }
6547
6548 end_reconstitute:
6549 return ret;
6550 }
6551
6552 /**
6553 * i40e_get_capabilities - get info about the HW
6554 * @pf: the PF struct
6555 **/
6556 static int i40e_get_capabilities(struct i40e_pf *pf)
6557 {
6558 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6559 u16 data_size;
6560 int buf_len;
6561 int err;
6562
6563 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6564 do {
6565 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6566 if (!cap_buf)
6567 return -ENOMEM;
6568
6569 /* this loads the data into the hw struct for us */
6570 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6571 &data_size,
6572 i40e_aqc_opc_list_func_capabilities,
6573 NULL);
6574 /* data loaded, buffer no longer needed */
6575 kfree(cap_buf);
6576
6577 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6578 /* retry with a larger buffer */
6579 buf_len = data_size;
6580 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6581 dev_info(&pf->pdev->dev,
6582 "capability discovery failed, err %s aq_err %s\n",
6583 i40e_stat_str(&pf->hw, err),
6584 i40e_aq_str(&pf->hw,
6585 pf->hw.aq.asq_last_status));
6586 return -ENODEV;
6587 }
6588 } while (err);
6589
6590 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6591 dev_info(&pf->pdev->dev,
6592 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6593 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6594 pf->hw.func_caps.num_msix_vectors,
6595 pf->hw.func_caps.num_msix_vectors_vf,
6596 pf->hw.func_caps.fd_filters_guaranteed,
6597 pf->hw.func_caps.fd_filters_best_effort,
6598 pf->hw.func_caps.num_tx_qp,
6599 pf->hw.func_caps.num_vsis);
6600
6601 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6602 + pf->hw.func_caps.num_vfs)
6603 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6604 dev_info(&pf->pdev->dev,
6605 "got num_vsis %d, setting num_vsis to %d\n",
6606 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6607 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6608 }
6609
6610 return 0;
6611 }
6612
6613 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6614
6615 /**
6616 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6617 * @pf: board private structure
6618 **/
6619 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6620 {
6621 struct i40e_vsi *vsi;
6622 int i;
6623
6624 /* quick workaround for an NVM issue that leaves a critical register
6625 * uninitialized
6626 */
6627 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6628 static const u32 hkey[] = {
6629 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6630 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6631 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6632 0x95b3a76d};
6633
6634 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6635 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6636 }
6637
6638 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6639 return;
6640
6641 /* find existing VSI and see if it needs configuring */
6642 vsi = NULL;
6643 for (i = 0; i < pf->num_alloc_vsi; i++) {
6644 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6645 vsi = pf->vsi[i];
6646 break;
6647 }
6648 }
6649
6650 /* create a new VSI if none exists */
6651 if (!vsi) {
6652 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6653 pf->vsi[pf->lan_vsi]->seid, 0);
6654 if (!vsi) {
6655 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6656 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6657 return;
6658 }
6659 }
6660
6661 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6662 }
6663
6664 /**
6665 * i40e_fdir_teardown - release the Flow Director resources
6666 * @pf: board private structure
6667 **/
6668 static void i40e_fdir_teardown(struct i40e_pf *pf)
6669 {
6670 int i;
6671
6672 i40e_fdir_filter_exit(pf);
6673 for (i = 0; i < pf->num_alloc_vsi; i++) {
6674 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6675 i40e_vsi_release(pf->vsi[i]);
6676 break;
6677 }
6678 }
6679 }
6680
6681 /**
6682 * i40e_prep_for_reset - prep for the core to reset
6683 * @pf: board private structure
6684 *
6685 * Close up the VFs and other things in prep for PF Reset.
6686 **/
6687 static void i40e_prep_for_reset(struct i40e_pf *pf)
6688 {
6689 struct i40e_hw *hw = &pf->hw;
6690 i40e_status ret = 0;
6691 u32 v;
6692
6693 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6694 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6695 return;
6696
6697 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6698
6699 /* quiesce the VSIs and their queues that are not already DOWN */
6700 i40e_pf_quiesce_all_vsi(pf);
6701
6702 for (v = 0; v < pf->num_alloc_vsi; v++) {
6703 if (pf->vsi[v])
6704 pf->vsi[v]->seid = 0;
6705 }
6706
6707 i40e_shutdown_adminq(&pf->hw);
6708
6709 /* call shutdown HMC */
6710 if (hw->hmc.hmc_obj) {
6711 ret = i40e_shutdown_lan_hmc(hw);
6712 if (ret)
6713 dev_warn(&pf->pdev->dev,
6714 "shutdown_lan_hmc failed: %d\n", ret);
6715 }
6716 }
6717
6718 /**
6719 * i40e_send_version - update firmware with driver version
6720 * @pf: PF struct
6721 */
6722 static void i40e_send_version(struct i40e_pf *pf)
6723 {
6724 struct i40e_driver_version dv;
6725
6726 dv.major_version = DRV_VERSION_MAJOR;
6727 dv.minor_version = DRV_VERSION_MINOR;
6728 dv.build_version = DRV_VERSION_BUILD;
6729 dv.subbuild_version = 0;
6730 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6731 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6732 }
6733
6734 /**
6735 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6736 * @pf: board private structure
6737 * @reinit: if the Main VSI needs to re-initialized.
6738 **/
6739 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6740 {
6741 struct i40e_hw *hw = &pf->hw;
6742 u8 set_fc_aq_fail = 0;
6743 i40e_status ret;
6744 u32 val;
6745 u32 v;
6746
6747 /* Now we wait for GRST to settle out.
6748 * We don't have to delete the VEBs or VSIs from the hw switch
6749 * because the reset will make them disappear.
6750 */
6751 ret = i40e_pf_reset(hw);
6752 if (ret) {
6753 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6754 set_bit(__I40E_RESET_FAILED, &pf->state);
6755 goto clear_recovery;
6756 }
6757 pf->pfr_count++;
6758
6759 if (test_bit(__I40E_DOWN, &pf->state))
6760 goto clear_recovery;
6761 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6762
6763 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6764 ret = i40e_init_adminq(&pf->hw);
6765 if (ret) {
6766 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6767 i40e_stat_str(&pf->hw, ret),
6768 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6769 goto clear_recovery;
6770 }
6771
6772 /* re-verify the eeprom if we just had an EMP reset */
6773 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6774 i40e_verify_eeprom(pf);
6775
6776 i40e_clear_pxe_mode(hw);
6777 ret = i40e_get_capabilities(pf);
6778 if (ret)
6779 goto end_core_reset;
6780
6781 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6782 hw->func_caps.num_rx_qp,
6783 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6784 if (ret) {
6785 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6786 goto end_core_reset;
6787 }
6788 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6789 if (ret) {
6790 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6791 goto end_core_reset;
6792 }
6793
6794 #ifdef CONFIG_I40E_DCB
6795 ret = i40e_init_pf_dcb(pf);
6796 if (ret) {
6797 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6798 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6799 /* Continue without DCB enabled */
6800 }
6801 #endif /* CONFIG_I40E_DCB */
6802 #ifdef I40E_FCOE
6803 i40e_init_pf_fcoe(pf);
6804
6805 #endif
6806 /* do basic switch setup */
6807 ret = i40e_setup_pf_switch(pf, reinit);
6808 if (ret)
6809 goto end_core_reset;
6810
6811 /* driver is only interested in link up/down and module qualification
6812 * reports from firmware
6813 */
6814 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6815 I40E_AQ_EVENT_LINK_UPDOWN |
6816 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6817 if (ret)
6818 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6819 i40e_stat_str(&pf->hw, ret),
6820 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6821
6822 /* make sure our flow control settings are restored */
6823 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6824 if (ret)
6825 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6826 i40e_stat_str(&pf->hw, ret),
6827 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6828
6829 /* Rebuild the VSIs and VEBs that existed before reset.
6830 * They are still in our local switch element arrays, so only
6831 * need to rebuild the switch model in the HW.
6832 *
6833 * If there were VEBs but the reconstitution failed, we'll try
6834 * try to recover minimal use by getting the basic PF VSI working.
6835 */
6836 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6837 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6838 /* find the one VEB connected to the MAC, and find orphans */
6839 for (v = 0; v < I40E_MAX_VEB; v++) {
6840 if (!pf->veb[v])
6841 continue;
6842
6843 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6844 pf->veb[v]->uplink_seid == 0) {
6845 ret = i40e_reconstitute_veb(pf->veb[v]);
6846
6847 if (!ret)
6848 continue;
6849
6850 /* If Main VEB failed, we're in deep doodoo,
6851 * so give up rebuilding the switch and set up
6852 * for minimal rebuild of PF VSI.
6853 * If orphan failed, we'll report the error
6854 * but try to keep going.
6855 */
6856 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6857 dev_info(&pf->pdev->dev,
6858 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6859 ret);
6860 pf->vsi[pf->lan_vsi]->uplink_seid
6861 = pf->mac_seid;
6862 break;
6863 } else if (pf->veb[v]->uplink_seid == 0) {
6864 dev_info(&pf->pdev->dev,
6865 "rebuild of orphan VEB failed: %d\n",
6866 ret);
6867 }
6868 }
6869 }
6870 }
6871
6872 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6873 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6874 /* no VEB, so rebuild only the Main VSI */
6875 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6876 if (ret) {
6877 dev_info(&pf->pdev->dev,
6878 "rebuild of Main VSI failed: %d\n", ret);
6879 goto end_core_reset;
6880 }
6881 }
6882
6883 /* Reconfigure hardware for allowing smaller MSS in the case
6884 * of TSO, so that we avoid the MDD being fired and causing
6885 * a reset in the case of small MSS+TSO.
6886 */
6887 #define I40E_REG_MSS 0x000E64DC
6888 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6889 #define I40E_64BYTE_MSS 0x400000
6890 val = rd32(hw, I40E_REG_MSS);
6891 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6892 val &= ~I40E_REG_MSS_MIN_MASK;
6893 val |= I40E_64BYTE_MSS;
6894 wr32(hw, I40E_REG_MSS, val);
6895 }
6896
6897 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6898 msleep(75);
6899 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6900 if (ret)
6901 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6902 i40e_stat_str(&pf->hw, ret),
6903 i40e_aq_str(&pf->hw,
6904 pf->hw.aq.asq_last_status));
6905 }
6906 /* reinit the misc interrupt */
6907 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6908 ret = i40e_setup_misc_vector(pf);
6909
6910 /* Add a filter to drop all Flow control frames from any VSI from being
6911 * transmitted. By doing so we stop a malicious VF from sending out
6912 * PAUSE or PFC frames and potentially controlling traffic for other
6913 * PF/VF VSIs.
6914 * The FW can still send Flow control frames if enabled.
6915 */
6916 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6917 pf->main_vsi_seid);
6918
6919 /* restart the VSIs that were rebuilt and running before the reset */
6920 i40e_pf_unquiesce_all_vsi(pf);
6921
6922 if (pf->num_alloc_vfs) {
6923 for (v = 0; v < pf->num_alloc_vfs; v++)
6924 i40e_reset_vf(&pf->vf[v], true);
6925 }
6926
6927 /* tell the firmware that we're starting */
6928 i40e_send_version(pf);
6929
6930 end_core_reset:
6931 clear_bit(__I40E_RESET_FAILED, &pf->state);
6932 clear_recovery:
6933 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6934 }
6935
6936 /**
6937 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6938 * @pf: board private structure
6939 *
6940 * Close up the VFs and other things in prep for a Core Reset,
6941 * then get ready to rebuild the world.
6942 **/
6943 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6944 {
6945 i40e_prep_for_reset(pf);
6946 i40e_reset_and_rebuild(pf, false);
6947 }
6948
6949 /**
6950 * i40e_handle_mdd_event
6951 * @pf: pointer to the PF structure
6952 *
6953 * Called from the MDD irq handler to identify possibly malicious vfs
6954 **/
6955 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6956 {
6957 struct i40e_hw *hw = &pf->hw;
6958 bool mdd_detected = false;
6959 bool pf_mdd_detected = false;
6960 struct i40e_vf *vf;
6961 u32 reg;
6962 int i;
6963
6964 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6965 return;
6966
6967 /* find what triggered the MDD event */
6968 reg = rd32(hw, I40E_GL_MDET_TX);
6969 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6970 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6971 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6972 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6973 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6974 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6975 I40E_GL_MDET_TX_EVENT_SHIFT;
6976 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6977 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6978 pf->hw.func_caps.base_queue;
6979 if (netif_msg_tx_err(pf))
6980 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6981 event, queue, pf_num, vf_num);
6982 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6983 mdd_detected = true;
6984 }
6985 reg = rd32(hw, I40E_GL_MDET_RX);
6986 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6987 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6988 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6989 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6990 I40E_GL_MDET_RX_EVENT_SHIFT;
6991 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6992 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6993 pf->hw.func_caps.base_queue;
6994 if (netif_msg_rx_err(pf))
6995 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6996 event, queue, func);
6997 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6998 mdd_detected = true;
6999 }
7000
7001 if (mdd_detected) {
7002 reg = rd32(hw, I40E_PF_MDET_TX);
7003 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7004 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7005 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7006 pf_mdd_detected = true;
7007 }
7008 reg = rd32(hw, I40E_PF_MDET_RX);
7009 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7010 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7011 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7012 pf_mdd_detected = true;
7013 }
7014 /* Queue belongs to the PF, initiate a reset */
7015 if (pf_mdd_detected) {
7016 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7017 i40e_service_event_schedule(pf);
7018 }
7019 }
7020
7021 /* see if one of the VFs needs its hand slapped */
7022 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7023 vf = &(pf->vf[i]);
7024 reg = rd32(hw, I40E_VP_MDET_TX(i));
7025 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7026 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7027 vf->num_mdd_events++;
7028 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7029 i);
7030 }
7031
7032 reg = rd32(hw, I40E_VP_MDET_RX(i));
7033 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7034 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7035 vf->num_mdd_events++;
7036 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7037 i);
7038 }
7039
7040 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7041 dev_info(&pf->pdev->dev,
7042 "Too many MDD events on VF %d, disabled\n", i);
7043 dev_info(&pf->pdev->dev,
7044 "Use PF Control I/F to re-enable the VF\n");
7045 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7046 }
7047 }
7048
7049 /* re-enable mdd interrupt cause */
7050 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7051 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7052 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7053 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7054 i40e_flush(hw);
7055 }
7056
7057 /**
7058 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7059 * @pf: board private structure
7060 **/
7061 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7062 {
7063 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
7064 struct i40e_hw *hw = &pf->hw;
7065 i40e_status ret;
7066 __be16 port;
7067 int i;
7068
7069 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7070 return;
7071
7072 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7073
7074 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7075 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7076 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7077 port = pf->udp_ports[i].index;
7078 if (port)
7079 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7080 pf->udp_ports[i].type,
7081 NULL, NULL);
7082 else
7083 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7084
7085 if (ret) {
7086 dev_info(&pf->pdev->dev,
7087 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
7088 port ? "add" : "delete",
7089 ntohs(port), i,
7090 i40e_stat_str(&pf->hw, ret),
7091 i40e_aq_str(&pf->hw,
7092 pf->hw.aq.asq_last_status));
7093 pf->udp_ports[i].index = 0;
7094 }
7095 }
7096 }
7097 #endif
7098 }
7099
7100 /**
7101 * i40e_service_task - Run the driver's async subtasks
7102 * @work: pointer to work_struct containing our data
7103 **/
7104 static void i40e_service_task(struct work_struct *work)
7105 {
7106 struct i40e_pf *pf = container_of(work,
7107 struct i40e_pf,
7108 service_task);
7109 unsigned long start_time = jiffies;
7110
7111 /* don't bother with service tasks if a reset is in progress */
7112 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7113 i40e_service_event_complete(pf);
7114 return;
7115 }
7116
7117 i40e_detect_recover_hung(pf);
7118 i40e_reset_subtask(pf);
7119 i40e_handle_mdd_event(pf);
7120 i40e_vc_process_vflr_event(pf);
7121 i40e_watchdog_subtask(pf);
7122 i40e_fdir_reinit_subtask(pf);
7123 i40e_sync_filters_subtask(pf);
7124 i40e_sync_udp_filters_subtask(pf);
7125 i40e_clean_adminq_subtask(pf);
7126
7127 i40e_service_event_complete(pf);
7128
7129 /* If the tasks have taken longer than one timer cycle or there
7130 * is more work to be done, reschedule the service task now
7131 * rather than wait for the timer to tick again.
7132 */
7133 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7134 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7135 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7136 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7137 i40e_service_event_schedule(pf);
7138 }
7139
7140 /**
7141 * i40e_service_timer - timer callback
7142 * @data: pointer to PF struct
7143 **/
7144 static void i40e_service_timer(unsigned long data)
7145 {
7146 struct i40e_pf *pf = (struct i40e_pf *)data;
7147
7148 mod_timer(&pf->service_timer,
7149 round_jiffies(jiffies + pf->service_timer_period));
7150 i40e_service_event_schedule(pf);
7151 }
7152
7153 /**
7154 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7155 * @vsi: the VSI being configured
7156 **/
7157 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7158 {
7159 struct i40e_pf *pf = vsi->back;
7160
7161 switch (vsi->type) {
7162 case I40E_VSI_MAIN:
7163 vsi->alloc_queue_pairs = pf->num_lan_qps;
7164 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7165 I40E_REQ_DESCRIPTOR_MULTIPLE);
7166 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7167 vsi->num_q_vectors = pf->num_lan_msix;
7168 else
7169 vsi->num_q_vectors = 1;
7170
7171 break;
7172
7173 case I40E_VSI_FDIR:
7174 vsi->alloc_queue_pairs = 1;
7175 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7176 I40E_REQ_DESCRIPTOR_MULTIPLE);
7177 vsi->num_q_vectors = 1;
7178 break;
7179
7180 case I40E_VSI_VMDQ2:
7181 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7182 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7183 I40E_REQ_DESCRIPTOR_MULTIPLE);
7184 vsi->num_q_vectors = pf->num_vmdq_msix;
7185 break;
7186
7187 case I40E_VSI_SRIOV:
7188 vsi->alloc_queue_pairs = pf->num_vf_qps;
7189 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7190 I40E_REQ_DESCRIPTOR_MULTIPLE);
7191 break;
7192
7193 #ifdef I40E_FCOE
7194 case I40E_VSI_FCOE:
7195 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7196 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7197 I40E_REQ_DESCRIPTOR_MULTIPLE);
7198 vsi->num_q_vectors = pf->num_fcoe_msix;
7199 break;
7200
7201 #endif /* I40E_FCOE */
7202 default:
7203 WARN_ON(1);
7204 return -ENODATA;
7205 }
7206
7207 return 0;
7208 }
7209
7210 /**
7211 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7212 * @type: VSI pointer
7213 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7214 *
7215 * On error: returns error code (negative)
7216 * On success: returns 0
7217 **/
7218 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7219 {
7220 int size;
7221 int ret = 0;
7222
7223 /* allocate memory for both Tx and Rx ring pointers */
7224 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7225 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7226 if (!vsi->tx_rings)
7227 return -ENOMEM;
7228 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7229
7230 if (alloc_qvectors) {
7231 /* allocate memory for q_vector pointers */
7232 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7233 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7234 if (!vsi->q_vectors) {
7235 ret = -ENOMEM;
7236 goto err_vectors;
7237 }
7238 }
7239 return ret;
7240
7241 err_vectors:
7242 kfree(vsi->tx_rings);
7243 return ret;
7244 }
7245
7246 /**
7247 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7248 * @pf: board private structure
7249 * @type: type of VSI
7250 *
7251 * On error: returns error code (negative)
7252 * On success: returns vsi index in PF (positive)
7253 **/
7254 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7255 {
7256 int ret = -ENODEV;
7257 struct i40e_vsi *vsi;
7258 int vsi_idx;
7259 int i;
7260
7261 /* Need to protect the allocation of the VSIs at the PF level */
7262 mutex_lock(&pf->switch_mutex);
7263
7264 /* VSI list may be fragmented if VSI creation/destruction has
7265 * been happening. We can afford to do a quick scan to look
7266 * for any free VSIs in the list.
7267 *
7268 * find next empty vsi slot, looping back around if necessary
7269 */
7270 i = pf->next_vsi;
7271 while (i < pf->num_alloc_vsi && pf->vsi[i])
7272 i++;
7273 if (i >= pf->num_alloc_vsi) {
7274 i = 0;
7275 while (i < pf->next_vsi && pf->vsi[i])
7276 i++;
7277 }
7278
7279 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7280 vsi_idx = i; /* Found one! */
7281 } else {
7282 ret = -ENODEV;
7283 goto unlock_pf; /* out of VSI slots! */
7284 }
7285 pf->next_vsi = ++i;
7286
7287 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7288 if (!vsi) {
7289 ret = -ENOMEM;
7290 goto unlock_pf;
7291 }
7292 vsi->type = type;
7293 vsi->back = pf;
7294 set_bit(__I40E_DOWN, &vsi->state);
7295 vsi->flags = 0;
7296 vsi->idx = vsi_idx;
7297 vsi->rx_itr_setting = pf->rx_itr_default;
7298 vsi->tx_itr_setting = pf->tx_itr_default;
7299 vsi->int_rate_limit = 0;
7300 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7301 pf->rss_table_size : 64;
7302 vsi->netdev_registered = false;
7303 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7304 INIT_LIST_HEAD(&vsi->mac_filter_list);
7305 vsi->irqs_ready = false;
7306
7307 ret = i40e_set_num_rings_in_vsi(vsi);
7308 if (ret)
7309 goto err_rings;
7310
7311 ret = i40e_vsi_alloc_arrays(vsi, true);
7312 if (ret)
7313 goto err_rings;
7314
7315 /* Setup default MSIX irq handler for VSI */
7316 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7317
7318 /* Initialize VSI lock */
7319 spin_lock_init(&vsi->mac_filter_list_lock);
7320 pf->vsi[vsi_idx] = vsi;
7321 ret = vsi_idx;
7322 goto unlock_pf;
7323
7324 err_rings:
7325 pf->next_vsi = i - 1;
7326 kfree(vsi);
7327 unlock_pf:
7328 mutex_unlock(&pf->switch_mutex);
7329 return ret;
7330 }
7331
7332 /**
7333 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7334 * @type: VSI pointer
7335 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7336 *
7337 * On error: returns error code (negative)
7338 * On success: returns 0
7339 **/
7340 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7341 {
7342 /* free the ring and vector containers */
7343 if (free_qvectors) {
7344 kfree(vsi->q_vectors);
7345 vsi->q_vectors = NULL;
7346 }
7347 kfree(vsi->tx_rings);
7348 vsi->tx_rings = NULL;
7349 vsi->rx_rings = NULL;
7350 }
7351
7352 /**
7353 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7354 * and lookup table
7355 * @vsi: Pointer to VSI structure
7356 */
7357 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7358 {
7359 if (!vsi)
7360 return;
7361
7362 kfree(vsi->rss_hkey_user);
7363 vsi->rss_hkey_user = NULL;
7364
7365 kfree(vsi->rss_lut_user);
7366 vsi->rss_lut_user = NULL;
7367 }
7368
7369 /**
7370 * i40e_vsi_clear - Deallocate the VSI provided
7371 * @vsi: the VSI being un-configured
7372 **/
7373 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7374 {
7375 struct i40e_pf *pf;
7376
7377 if (!vsi)
7378 return 0;
7379
7380 if (!vsi->back)
7381 goto free_vsi;
7382 pf = vsi->back;
7383
7384 mutex_lock(&pf->switch_mutex);
7385 if (!pf->vsi[vsi->idx]) {
7386 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7387 vsi->idx, vsi->idx, vsi, vsi->type);
7388 goto unlock_vsi;
7389 }
7390
7391 if (pf->vsi[vsi->idx] != vsi) {
7392 dev_err(&pf->pdev->dev,
7393 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7394 pf->vsi[vsi->idx]->idx,
7395 pf->vsi[vsi->idx],
7396 pf->vsi[vsi->idx]->type,
7397 vsi->idx, vsi, vsi->type);
7398 goto unlock_vsi;
7399 }
7400
7401 /* updates the PF for this cleared vsi */
7402 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7403 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7404
7405 i40e_vsi_free_arrays(vsi, true);
7406 i40e_clear_rss_config_user(vsi);
7407
7408 pf->vsi[vsi->idx] = NULL;
7409 if (vsi->idx < pf->next_vsi)
7410 pf->next_vsi = vsi->idx;
7411
7412 unlock_vsi:
7413 mutex_unlock(&pf->switch_mutex);
7414 free_vsi:
7415 kfree(vsi);
7416
7417 return 0;
7418 }
7419
7420 /**
7421 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7422 * @vsi: the VSI being cleaned
7423 **/
7424 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7425 {
7426 int i;
7427
7428 if (vsi->tx_rings && vsi->tx_rings[0]) {
7429 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7430 kfree_rcu(vsi->tx_rings[i], rcu);
7431 vsi->tx_rings[i] = NULL;
7432 vsi->rx_rings[i] = NULL;
7433 }
7434 }
7435 }
7436
7437 /**
7438 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7439 * @vsi: the VSI being configured
7440 **/
7441 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7442 {
7443 struct i40e_ring *tx_ring, *rx_ring;
7444 struct i40e_pf *pf = vsi->back;
7445 int i;
7446
7447 /* Set basic values in the rings to be used later during open() */
7448 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7449 /* allocate space for both Tx and Rx in one shot */
7450 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7451 if (!tx_ring)
7452 goto err_out;
7453
7454 tx_ring->queue_index = i;
7455 tx_ring->reg_idx = vsi->base_queue + i;
7456 tx_ring->ring_active = false;
7457 tx_ring->vsi = vsi;
7458 tx_ring->netdev = vsi->netdev;
7459 tx_ring->dev = &pf->pdev->dev;
7460 tx_ring->count = vsi->num_desc;
7461 tx_ring->size = 0;
7462 tx_ring->dcb_tc = 0;
7463 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7464 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7465 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7466 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7467 vsi->tx_rings[i] = tx_ring;
7468
7469 rx_ring = &tx_ring[1];
7470 rx_ring->queue_index = i;
7471 rx_ring->reg_idx = vsi->base_queue + i;
7472 rx_ring->ring_active = false;
7473 rx_ring->vsi = vsi;
7474 rx_ring->netdev = vsi->netdev;
7475 rx_ring->dev = &pf->pdev->dev;
7476 rx_ring->count = vsi->num_desc;
7477 rx_ring->size = 0;
7478 rx_ring->dcb_tc = 0;
7479 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7480 set_ring_16byte_desc_enabled(rx_ring);
7481 else
7482 clear_ring_16byte_desc_enabled(rx_ring);
7483 vsi->rx_rings[i] = rx_ring;
7484 }
7485
7486 return 0;
7487
7488 err_out:
7489 i40e_vsi_clear_rings(vsi);
7490 return -ENOMEM;
7491 }
7492
7493 /**
7494 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7495 * @pf: board private structure
7496 * @vectors: the number of MSI-X vectors to request
7497 *
7498 * Returns the number of vectors reserved, or error
7499 **/
7500 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7501 {
7502 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7503 I40E_MIN_MSIX, vectors);
7504 if (vectors < 0) {
7505 dev_info(&pf->pdev->dev,
7506 "MSI-X vector reservation failed: %d\n", vectors);
7507 vectors = 0;
7508 }
7509
7510 return vectors;
7511 }
7512
7513 /**
7514 * i40e_init_msix - Setup the MSIX capability
7515 * @pf: board private structure
7516 *
7517 * Work with the OS to set up the MSIX vectors needed.
7518 *
7519 * Returns the number of vectors reserved or negative on failure
7520 **/
7521 static int i40e_init_msix(struct i40e_pf *pf)
7522 {
7523 struct i40e_hw *hw = &pf->hw;
7524 int vectors_left;
7525 int v_budget, i;
7526 int v_actual;
7527
7528 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7529 return -ENODEV;
7530
7531 /* The number of vectors we'll request will be comprised of:
7532 * - Add 1 for "other" cause for Admin Queue events, etc.
7533 * - The number of LAN queue pairs
7534 * - Queues being used for RSS.
7535 * We don't need as many as max_rss_size vectors.
7536 * use rss_size instead in the calculation since that
7537 * is governed by number of cpus in the system.
7538 * - assumes symmetric Tx/Rx pairing
7539 * - The number of VMDq pairs
7540 #ifdef I40E_FCOE
7541 * - The number of FCOE qps.
7542 #endif
7543 * Once we count this up, try the request.
7544 *
7545 * If we can't get what we want, we'll simplify to nearly nothing
7546 * and try again. If that still fails, we punt.
7547 */
7548 vectors_left = hw->func_caps.num_msix_vectors;
7549 v_budget = 0;
7550
7551 /* reserve one vector for miscellaneous handler */
7552 if (vectors_left) {
7553 v_budget++;
7554 vectors_left--;
7555 }
7556
7557 /* reserve vectors for the main PF traffic queues */
7558 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7559 vectors_left -= pf->num_lan_msix;
7560 v_budget += pf->num_lan_msix;
7561
7562 /* reserve one vector for sideband flow director */
7563 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7564 if (vectors_left) {
7565 v_budget++;
7566 vectors_left--;
7567 } else {
7568 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7569 }
7570 }
7571
7572 #ifdef I40E_FCOE
7573 /* can we reserve enough for FCoE? */
7574 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7575 if (!vectors_left)
7576 pf->num_fcoe_msix = 0;
7577 else if (vectors_left >= pf->num_fcoe_qps)
7578 pf->num_fcoe_msix = pf->num_fcoe_qps;
7579 else
7580 pf->num_fcoe_msix = 1;
7581 v_budget += pf->num_fcoe_msix;
7582 vectors_left -= pf->num_fcoe_msix;
7583 }
7584
7585 #endif
7586 /* any vectors left over go for VMDq support */
7587 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7588 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7589 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7590
7591 /* if we're short on vectors for what's desired, we limit
7592 * the queues per vmdq. If this is still more than are
7593 * available, the user will need to change the number of
7594 * queues/vectors used by the PF later with the ethtool
7595 * channels command
7596 */
7597 if (vmdq_vecs < vmdq_vecs_wanted)
7598 pf->num_vmdq_qps = 1;
7599 pf->num_vmdq_msix = pf->num_vmdq_qps;
7600
7601 v_budget += vmdq_vecs;
7602 vectors_left -= vmdq_vecs;
7603 }
7604
7605 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7606 GFP_KERNEL);
7607 if (!pf->msix_entries)
7608 return -ENOMEM;
7609
7610 for (i = 0; i < v_budget; i++)
7611 pf->msix_entries[i].entry = i;
7612 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7613
7614 if (v_actual != v_budget) {
7615 /* If we have limited resources, we will start with no vectors
7616 * for the special features and then allocate vectors to some
7617 * of these features based on the policy and at the end disable
7618 * the features that did not get any vectors.
7619 */
7620 #ifdef I40E_FCOE
7621 pf->num_fcoe_qps = 0;
7622 pf->num_fcoe_msix = 0;
7623 #endif
7624 pf->num_vmdq_msix = 0;
7625 }
7626
7627 if (v_actual < I40E_MIN_MSIX) {
7628 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7629 kfree(pf->msix_entries);
7630 pf->msix_entries = NULL;
7631 return -ENODEV;
7632
7633 } else if (v_actual == I40E_MIN_MSIX) {
7634 /* Adjust for minimal MSIX use */
7635 pf->num_vmdq_vsis = 0;
7636 pf->num_vmdq_qps = 0;
7637 pf->num_lan_qps = 1;
7638 pf->num_lan_msix = 1;
7639
7640 } else if (v_actual != v_budget) {
7641 int vec;
7642
7643 /* reserve the misc vector */
7644 vec = v_actual - 1;
7645
7646 /* Scale vector usage down */
7647 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7648 pf->num_vmdq_vsis = 1;
7649 pf->num_vmdq_qps = 1;
7650 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7651
7652 /* partition out the remaining vectors */
7653 switch (vec) {
7654 case 2:
7655 pf->num_lan_msix = 1;
7656 break;
7657 case 3:
7658 #ifdef I40E_FCOE
7659 /* give one vector to FCoE */
7660 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7661 pf->num_lan_msix = 1;
7662 pf->num_fcoe_msix = 1;
7663 }
7664 #else
7665 pf->num_lan_msix = 2;
7666 #endif
7667 break;
7668 default:
7669 #ifdef I40E_FCOE
7670 /* give one vector to FCoE */
7671 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7672 pf->num_fcoe_msix = 1;
7673 vec--;
7674 }
7675 #endif
7676 /* give the rest to the PF */
7677 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7678 break;
7679 }
7680 }
7681
7682 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7683 (pf->num_vmdq_msix == 0)) {
7684 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7685 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7686 }
7687 #ifdef I40E_FCOE
7688
7689 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7690 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7691 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7692 }
7693 #endif
7694 return v_actual;
7695 }
7696
7697 /**
7698 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7699 * @vsi: the VSI being configured
7700 * @v_idx: index of the vector in the vsi struct
7701 *
7702 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7703 **/
7704 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7705 {
7706 struct i40e_q_vector *q_vector;
7707
7708 /* allocate q_vector */
7709 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7710 if (!q_vector)
7711 return -ENOMEM;
7712
7713 q_vector->vsi = vsi;
7714 q_vector->v_idx = v_idx;
7715 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7716 if (vsi->netdev)
7717 netif_napi_add(vsi->netdev, &q_vector->napi,
7718 i40e_napi_poll, NAPI_POLL_WEIGHT);
7719
7720 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7721 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7722
7723 /* tie q_vector and vsi together */
7724 vsi->q_vectors[v_idx] = q_vector;
7725
7726 return 0;
7727 }
7728
7729 /**
7730 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7731 * @vsi: the VSI being configured
7732 *
7733 * We allocate one q_vector per queue interrupt. If allocation fails we
7734 * return -ENOMEM.
7735 **/
7736 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7737 {
7738 struct i40e_pf *pf = vsi->back;
7739 int v_idx, num_q_vectors;
7740 int err;
7741
7742 /* if not MSIX, give the one vector only to the LAN VSI */
7743 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7744 num_q_vectors = vsi->num_q_vectors;
7745 else if (vsi == pf->vsi[pf->lan_vsi])
7746 num_q_vectors = 1;
7747 else
7748 return -EINVAL;
7749
7750 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7751 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7752 if (err)
7753 goto err_out;
7754 }
7755
7756 return 0;
7757
7758 err_out:
7759 while (v_idx--)
7760 i40e_free_q_vector(vsi, v_idx);
7761
7762 return err;
7763 }
7764
7765 /**
7766 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7767 * @pf: board private structure to initialize
7768 **/
7769 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7770 {
7771 int vectors = 0;
7772 ssize_t size;
7773
7774 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7775 vectors = i40e_init_msix(pf);
7776 if (vectors < 0) {
7777 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7778 #ifdef I40E_FCOE
7779 I40E_FLAG_FCOE_ENABLED |
7780 #endif
7781 I40E_FLAG_RSS_ENABLED |
7782 I40E_FLAG_DCB_CAPABLE |
7783 I40E_FLAG_SRIOV_ENABLED |
7784 I40E_FLAG_FD_SB_ENABLED |
7785 I40E_FLAG_FD_ATR_ENABLED |
7786 I40E_FLAG_VMDQ_ENABLED);
7787
7788 /* rework the queue expectations without MSIX */
7789 i40e_determine_queue_usage(pf);
7790 }
7791 }
7792
7793 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7794 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7795 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7796 vectors = pci_enable_msi(pf->pdev);
7797 if (vectors < 0) {
7798 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7799 vectors);
7800 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7801 }
7802 vectors = 1; /* one MSI or Legacy vector */
7803 }
7804
7805 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7806 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7807
7808 /* set up vector assignment tracking */
7809 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7810 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7811 if (!pf->irq_pile) {
7812 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7813 return -ENOMEM;
7814 }
7815 pf->irq_pile->num_entries = vectors;
7816 pf->irq_pile->search_hint = 0;
7817
7818 /* track first vector for misc interrupts, ignore return */
7819 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7820
7821 return 0;
7822 }
7823
7824 /**
7825 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7826 * @pf: board private structure
7827 *
7828 * This sets up the handler for MSIX 0, which is used to manage the
7829 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7830 * when in MSI or Legacy interrupt mode.
7831 **/
7832 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7833 {
7834 struct i40e_hw *hw = &pf->hw;
7835 int err = 0;
7836
7837 /* Only request the irq if this is the first time through, and
7838 * not when we're rebuilding after a Reset
7839 */
7840 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7841 err = request_irq(pf->msix_entries[0].vector,
7842 i40e_intr, 0, pf->int_name, pf);
7843 if (err) {
7844 dev_info(&pf->pdev->dev,
7845 "request_irq for %s failed: %d\n",
7846 pf->int_name, err);
7847 return -EFAULT;
7848 }
7849 }
7850
7851 i40e_enable_misc_int_causes(pf);
7852
7853 /* associate no queues to the misc vector */
7854 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7855 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7856
7857 i40e_flush(hw);
7858
7859 i40e_irq_dynamic_enable_icr0(pf);
7860
7861 return err;
7862 }
7863
7864 /**
7865 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7866 * @vsi: vsi structure
7867 * @seed: RSS hash seed
7868 **/
7869 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7870 u8 *lut, u16 lut_size)
7871 {
7872 struct i40e_aqc_get_set_rss_key_data rss_key;
7873 struct i40e_pf *pf = vsi->back;
7874 struct i40e_hw *hw = &pf->hw;
7875 bool pf_lut = false;
7876 u8 *rss_lut;
7877 int ret, i;
7878
7879 memset(&rss_key, 0, sizeof(rss_key));
7880 memcpy(&rss_key, seed, sizeof(rss_key));
7881
7882 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7883 if (!rss_lut)
7884 return -ENOMEM;
7885
7886 /* Populate the LUT with max no. of queues in round robin fashion */
7887 for (i = 0; i < vsi->rss_table_size; i++)
7888 rss_lut[i] = i % vsi->rss_size;
7889
7890 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7891 if (ret) {
7892 dev_info(&pf->pdev->dev,
7893 "Cannot set RSS key, err %s aq_err %s\n",
7894 i40e_stat_str(&pf->hw, ret),
7895 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7896 goto config_rss_aq_out;
7897 }
7898
7899 if (vsi->type == I40E_VSI_MAIN)
7900 pf_lut = true;
7901
7902 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7903 vsi->rss_table_size);
7904 if (ret)
7905 dev_info(&pf->pdev->dev,
7906 "Cannot set RSS lut, err %s aq_err %s\n",
7907 i40e_stat_str(&pf->hw, ret),
7908 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7909
7910 config_rss_aq_out:
7911 kfree(rss_lut);
7912 return ret;
7913 }
7914
7915 /**
7916 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7917 * @vsi: VSI structure
7918 **/
7919 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7920 {
7921 u8 seed[I40E_HKEY_ARRAY_SIZE];
7922 struct i40e_pf *pf = vsi->back;
7923 u8 *lut;
7924 int ret;
7925
7926 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7927 return 0;
7928
7929 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7930 if (!lut)
7931 return -ENOMEM;
7932
7933 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7934 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7935 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7936 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7937 kfree(lut);
7938
7939 return ret;
7940 }
7941
7942 /**
7943 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
7944 * @vsi: Pointer to vsi structure
7945 * @seed: Buffter to store the hash keys
7946 * @lut: Buffer to store the lookup table entries
7947 * @lut_size: Size of buffer to store the lookup table entries
7948 *
7949 * Return 0 on success, negative on failure
7950 */
7951 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7952 u8 *lut, u16 lut_size)
7953 {
7954 struct i40e_pf *pf = vsi->back;
7955 struct i40e_hw *hw = &pf->hw;
7956 int ret = 0;
7957
7958 if (seed) {
7959 ret = i40e_aq_get_rss_key(hw, vsi->id,
7960 (struct i40e_aqc_get_set_rss_key_data *)seed);
7961 if (ret) {
7962 dev_info(&pf->pdev->dev,
7963 "Cannot get RSS key, err %s aq_err %s\n",
7964 i40e_stat_str(&pf->hw, ret),
7965 i40e_aq_str(&pf->hw,
7966 pf->hw.aq.asq_last_status));
7967 return ret;
7968 }
7969 }
7970
7971 if (lut) {
7972 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
7973
7974 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
7975 if (ret) {
7976 dev_info(&pf->pdev->dev,
7977 "Cannot get RSS lut, err %s aq_err %s\n",
7978 i40e_stat_str(&pf->hw, ret),
7979 i40e_aq_str(&pf->hw,
7980 pf->hw.aq.asq_last_status));
7981 return ret;
7982 }
7983 }
7984
7985 return ret;
7986 }
7987
7988 /**
7989 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
7990 * @vsi: Pointer to vsi structure
7991 * @seed: RSS hash seed
7992 * @lut: Lookup table
7993 * @lut_size: Lookup table size
7994 *
7995 * Returns 0 on success, negative on failure
7996 **/
7997 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
7998 const u8 *lut, u16 lut_size)
7999 {
8000 struct i40e_pf *pf = vsi->back;
8001 struct i40e_hw *hw = &pf->hw;
8002 u8 i;
8003
8004 /* Fill out hash function seed */
8005 if (seed) {
8006 u32 *seed_dw = (u32 *)seed;
8007
8008 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8009 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
8010 }
8011
8012 if (lut) {
8013 u32 *lut_dw = (u32 *)lut;
8014
8015 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8016 return -EINVAL;
8017
8018 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8019 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8020 }
8021 i40e_flush(hw);
8022
8023 return 0;
8024 }
8025
8026 /**
8027 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8028 * @vsi: Pointer to VSI structure
8029 * @seed: Buffer to store the keys
8030 * @lut: Buffer to store the lookup table entries
8031 * @lut_size: Size of buffer to store the lookup table entries
8032 *
8033 * Returns 0 on success, negative on failure
8034 */
8035 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8036 u8 *lut, u16 lut_size)
8037 {
8038 struct i40e_pf *pf = vsi->back;
8039 struct i40e_hw *hw = &pf->hw;
8040 u16 i;
8041
8042 if (seed) {
8043 u32 *seed_dw = (u32 *)seed;
8044
8045 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8046 seed_dw[i] = rd32(hw, I40E_PFQF_HKEY(i));
8047 }
8048 if (lut) {
8049 u32 *lut_dw = (u32 *)lut;
8050
8051 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8052 return -EINVAL;
8053 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8054 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8055 }
8056
8057 return 0;
8058 }
8059
8060 /**
8061 * i40e_config_rss - Configure RSS keys and lut
8062 * @vsi: Pointer to VSI structure
8063 * @seed: RSS hash seed
8064 * @lut: Lookup table
8065 * @lut_size: Lookup table size
8066 *
8067 * Returns 0 on success, negative on failure
8068 */
8069 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8070 {
8071 struct i40e_pf *pf = vsi->back;
8072
8073 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8074 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8075 else
8076 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8077 }
8078
8079 /**
8080 * i40e_get_rss - Get RSS keys and lut
8081 * @vsi: Pointer to VSI structure
8082 * @seed: Buffer to store the keys
8083 * @lut: Buffer to store the lookup table entries
8084 * lut_size: Size of buffer to store the lookup table entries
8085 *
8086 * Returns 0 on success, negative on failure
8087 */
8088 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8089 {
8090 struct i40e_pf *pf = vsi->back;
8091
8092 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8093 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8094 else
8095 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8096 }
8097
8098 /**
8099 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8100 * @pf: Pointer to board private structure
8101 * @lut: Lookup table
8102 * @rss_table_size: Lookup table size
8103 * @rss_size: Range of queue number for hashing
8104 */
8105 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8106 u16 rss_table_size, u16 rss_size)
8107 {
8108 u16 i;
8109
8110 for (i = 0; i < rss_table_size; i++)
8111 lut[i] = i % rss_size;
8112 }
8113
8114 /**
8115 * i40e_pf_config_rss - Prepare for RSS if used
8116 * @pf: board private structure
8117 **/
8118 static int i40e_pf_config_rss(struct i40e_pf *pf)
8119 {
8120 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8121 u8 seed[I40E_HKEY_ARRAY_SIZE];
8122 u8 *lut;
8123 struct i40e_hw *hw = &pf->hw;
8124 u32 reg_val;
8125 u64 hena;
8126 int ret;
8127
8128 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8129 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
8130 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
8131 hena |= i40e_pf_get_default_rss_hena(pf);
8132
8133 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
8134 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8135
8136 /* Determine the RSS table size based on the hardware capabilities */
8137 reg_val = rd32(hw, I40E_PFQF_CTL_0);
8138 reg_val = (pf->rss_table_size == 512) ?
8139 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8140 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8141 wr32(hw, I40E_PFQF_CTL_0, reg_val);
8142
8143 /* Determine the RSS size of the VSI */
8144 if (!vsi->rss_size)
8145 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8146 vsi->num_queue_pairs);
8147
8148 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8149 if (!lut)
8150 return -ENOMEM;
8151
8152 /* Use user configured lut if there is one, otherwise use default */
8153 if (vsi->rss_lut_user)
8154 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8155 else
8156 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8157
8158 /* Use user configured hash key if there is one, otherwise
8159 * use default.
8160 */
8161 if (vsi->rss_hkey_user)
8162 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8163 else
8164 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8165 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8166 kfree(lut);
8167
8168 return ret;
8169 }
8170
8171 /**
8172 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8173 * @pf: board private structure
8174 * @queue_count: the requested queue count for rss.
8175 *
8176 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8177 * count which may be different from the requested queue count.
8178 **/
8179 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8180 {
8181 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8182 int new_rss_size;
8183
8184 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8185 return 0;
8186
8187 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8188
8189 if (queue_count != vsi->num_queue_pairs) {
8190 vsi->req_queue_pairs = queue_count;
8191 i40e_prep_for_reset(pf);
8192
8193 pf->alloc_rss_size = new_rss_size;
8194
8195 i40e_reset_and_rebuild(pf, true);
8196
8197 /* Discard the user configured hash keys and lut, if less
8198 * queues are enabled.
8199 */
8200 if (queue_count < vsi->rss_size) {
8201 i40e_clear_rss_config_user(vsi);
8202 dev_dbg(&pf->pdev->dev,
8203 "discard user configured hash keys and lut\n");
8204 }
8205
8206 /* Reset vsi->rss_size, as number of enabled queues changed */
8207 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8208 vsi->num_queue_pairs);
8209
8210 i40e_pf_config_rss(pf);
8211 }
8212 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8213 pf->alloc_rss_size, pf->rss_size_max);
8214 return pf->alloc_rss_size;
8215 }
8216
8217 /**
8218 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8219 * @pf: board private structure
8220 **/
8221 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8222 {
8223 i40e_status status;
8224 bool min_valid, max_valid;
8225 u32 max_bw, min_bw;
8226
8227 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8228 &min_valid, &max_valid);
8229
8230 if (!status) {
8231 if (min_valid)
8232 pf->npar_min_bw = min_bw;
8233 if (max_valid)
8234 pf->npar_max_bw = max_bw;
8235 }
8236
8237 return status;
8238 }
8239
8240 /**
8241 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8242 * @pf: board private structure
8243 **/
8244 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8245 {
8246 struct i40e_aqc_configure_partition_bw_data bw_data;
8247 i40e_status status;
8248
8249 /* Set the valid bit for this PF */
8250 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8251 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8252 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8253
8254 /* Set the new bandwidths */
8255 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8256
8257 return status;
8258 }
8259
8260 /**
8261 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8262 * @pf: board private structure
8263 **/
8264 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8265 {
8266 /* Commit temporary BW setting to permanent NVM image */
8267 enum i40e_admin_queue_err last_aq_status;
8268 i40e_status ret;
8269 u16 nvm_word;
8270
8271 if (pf->hw.partition_id != 1) {
8272 dev_info(&pf->pdev->dev,
8273 "Commit BW only works on partition 1! This is partition %d",
8274 pf->hw.partition_id);
8275 ret = I40E_NOT_SUPPORTED;
8276 goto bw_commit_out;
8277 }
8278
8279 /* Acquire NVM for read access */
8280 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8281 last_aq_status = pf->hw.aq.asq_last_status;
8282 if (ret) {
8283 dev_info(&pf->pdev->dev,
8284 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8285 i40e_stat_str(&pf->hw, ret),
8286 i40e_aq_str(&pf->hw, last_aq_status));
8287 goto bw_commit_out;
8288 }
8289
8290 /* Read word 0x10 of NVM - SW compatibility word 1 */
8291 ret = i40e_aq_read_nvm(&pf->hw,
8292 I40E_SR_NVM_CONTROL_WORD,
8293 0x10, sizeof(nvm_word), &nvm_word,
8294 false, NULL);
8295 /* Save off last admin queue command status before releasing
8296 * the NVM
8297 */
8298 last_aq_status = pf->hw.aq.asq_last_status;
8299 i40e_release_nvm(&pf->hw);
8300 if (ret) {
8301 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8302 i40e_stat_str(&pf->hw, ret),
8303 i40e_aq_str(&pf->hw, last_aq_status));
8304 goto bw_commit_out;
8305 }
8306
8307 /* Wait a bit for NVM release to complete */
8308 msleep(50);
8309
8310 /* Acquire NVM for write access */
8311 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8312 last_aq_status = pf->hw.aq.asq_last_status;
8313 if (ret) {
8314 dev_info(&pf->pdev->dev,
8315 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8316 i40e_stat_str(&pf->hw, ret),
8317 i40e_aq_str(&pf->hw, last_aq_status));
8318 goto bw_commit_out;
8319 }
8320 /* Write it back out unchanged to initiate update NVM,
8321 * which will force a write of the shadow (alt) RAM to
8322 * the NVM - thus storing the bandwidth values permanently.
8323 */
8324 ret = i40e_aq_update_nvm(&pf->hw,
8325 I40E_SR_NVM_CONTROL_WORD,
8326 0x10, sizeof(nvm_word),
8327 &nvm_word, true, NULL);
8328 /* Save off last admin queue command status before releasing
8329 * the NVM
8330 */
8331 last_aq_status = pf->hw.aq.asq_last_status;
8332 i40e_release_nvm(&pf->hw);
8333 if (ret)
8334 dev_info(&pf->pdev->dev,
8335 "BW settings NOT SAVED, err %s aq_err %s\n",
8336 i40e_stat_str(&pf->hw, ret),
8337 i40e_aq_str(&pf->hw, last_aq_status));
8338 bw_commit_out:
8339
8340 return ret;
8341 }
8342
8343 /**
8344 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8345 * @pf: board private structure to initialize
8346 *
8347 * i40e_sw_init initializes the Adapter private data structure.
8348 * Fields are initialized based on PCI device information and
8349 * OS network device settings (MTU size).
8350 **/
8351 static int i40e_sw_init(struct i40e_pf *pf)
8352 {
8353 int err = 0;
8354 int size;
8355
8356 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8357 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8358 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
8359 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8360 if (I40E_DEBUG_USER & debug)
8361 pf->hw.debug_mask = debug;
8362 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8363 I40E_DEFAULT_MSG_ENABLE);
8364 }
8365
8366 /* Set default capability flags */
8367 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8368 I40E_FLAG_MSI_ENABLED |
8369 I40E_FLAG_LINK_POLLING_ENABLED |
8370 I40E_FLAG_MSIX_ENABLED;
8371
8372 if (iommu_present(&pci_bus_type))
8373 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
8374 else
8375 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
8376
8377 /* Set default ITR */
8378 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8379 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8380
8381 /* Depending on PF configurations, it is possible that the RSS
8382 * maximum might end up larger than the available queues
8383 */
8384 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8385 pf->alloc_rss_size = 1;
8386 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8387 pf->rss_size_max = min_t(int, pf->rss_size_max,
8388 pf->hw.func_caps.num_tx_qp);
8389 if (pf->hw.func_caps.rss) {
8390 pf->flags |= I40E_FLAG_RSS_ENABLED;
8391 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8392 num_online_cpus());
8393 }
8394
8395 /* MFP mode enabled */
8396 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8397 pf->flags |= I40E_FLAG_MFP_ENABLED;
8398 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8399 if (i40e_get_npar_bw_setting(pf))
8400 dev_warn(&pf->pdev->dev,
8401 "Could not get NPAR bw settings\n");
8402 else
8403 dev_info(&pf->pdev->dev,
8404 "Min BW = %8.8x, Max BW = %8.8x\n",
8405 pf->npar_min_bw, pf->npar_max_bw);
8406 }
8407
8408 /* FW/NVM is not yet fixed in this regard */
8409 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8410 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8411 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8412 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8413 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8414 pf->hw.num_partitions > 1)
8415 dev_info(&pf->pdev->dev,
8416 "Flow Director Sideband mode Disabled in MFP mode\n");
8417 else
8418 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8419 pf->fdir_pf_filter_count =
8420 pf->hw.func_caps.fd_filters_guaranteed;
8421 pf->hw.fdir_shared_filter_count =
8422 pf->hw.func_caps.fd_filters_best_effort;
8423 }
8424
8425 if (((pf->hw.mac.type == I40E_MAC_X710) ||
8426 (pf->hw.mac.type == I40E_MAC_XL710)) &&
8427 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8428 (pf->hw.aq.fw_maj_ver < 4)))
8429 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8430
8431 if (pf->hw.func_caps.vmdq) {
8432 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8433 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8434 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8435 }
8436
8437 #ifdef I40E_FCOE
8438 i40e_init_pf_fcoe(pf);
8439
8440 #endif /* I40E_FCOE */
8441 #ifdef CONFIG_PCI_IOV
8442 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8443 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8444 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8445 pf->num_req_vfs = min_t(int,
8446 pf->hw.func_caps.num_vfs,
8447 I40E_MAX_VF_COUNT);
8448 }
8449 #endif /* CONFIG_PCI_IOV */
8450 if (pf->hw.mac.type == I40E_MAC_X722) {
8451 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8452 I40E_FLAG_128_QP_RSS_CAPABLE |
8453 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8454 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8455 I40E_FLAG_WB_ON_ITR_CAPABLE |
8456 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8457 I40E_FLAG_100M_SGMII_CAPABLE |
8458 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8459 }
8460 pf->eeprom_version = 0xDEAD;
8461 pf->lan_veb = I40E_NO_VEB;
8462 pf->lan_vsi = I40E_NO_VSI;
8463
8464 /* By default FW has this off for performance reasons */
8465 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8466
8467 /* set up queue assignment tracking */
8468 size = sizeof(struct i40e_lump_tracking)
8469 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8470 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8471 if (!pf->qp_pile) {
8472 err = -ENOMEM;
8473 goto sw_init_done;
8474 }
8475 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8476 pf->qp_pile->search_hint = 0;
8477
8478 pf->tx_timeout_recovery_level = 1;
8479
8480 mutex_init(&pf->switch_mutex);
8481
8482 /* If NPAR is enabled nudge the Tx scheduler */
8483 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8484 i40e_set_npar_bw_setting(pf);
8485
8486 sw_init_done:
8487 return err;
8488 }
8489
8490 /**
8491 * i40e_set_ntuple - set the ntuple feature flag and take action
8492 * @pf: board private structure to initialize
8493 * @features: the feature set that the stack is suggesting
8494 *
8495 * returns a bool to indicate if reset needs to happen
8496 **/
8497 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8498 {
8499 bool need_reset = false;
8500
8501 /* Check if Flow Director n-tuple support was enabled or disabled. If
8502 * the state changed, we need to reset.
8503 */
8504 if (features & NETIF_F_NTUPLE) {
8505 /* Enable filters and mark for reset */
8506 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8507 need_reset = true;
8508 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8509 } else {
8510 /* turn off filters, mark for reset and clear SW filter list */
8511 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8512 need_reset = true;
8513 i40e_fdir_filter_exit(pf);
8514 }
8515 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8516 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8517 /* reset fd counters */
8518 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8519 pf->fdir_pf_active_filters = 0;
8520 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8521 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8522 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8523 /* if ATR was auto disabled it can be re-enabled. */
8524 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8525 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8526 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8527 }
8528 return need_reset;
8529 }
8530
8531 /**
8532 * i40e_set_features - set the netdev feature flags
8533 * @netdev: ptr to the netdev being adjusted
8534 * @features: the feature set that the stack is suggesting
8535 **/
8536 static int i40e_set_features(struct net_device *netdev,
8537 netdev_features_t features)
8538 {
8539 struct i40e_netdev_priv *np = netdev_priv(netdev);
8540 struct i40e_vsi *vsi = np->vsi;
8541 struct i40e_pf *pf = vsi->back;
8542 bool need_reset;
8543
8544 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8545 i40e_vlan_stripping_enable(vsi);
8546 else
8547 i40e_vlan_stripping_disable(vsi);
8548
8549 need_reset = i40e_set_ntuple(pf, features);
8550
8551 if (need_reset)
8552 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8553
8554 return 0;
8555 }
8556
8557 #if IS_ENABLED(CONFIG_VXLAN) || IS_ENABLED(CONFIG_GENEVE)
8558 /**
8559 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8560 * @pf: board private structure
8561 * @port: The UDP port to look up
8562 *
8563 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8564 **/
8565 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8566 {
8567 u8 i;
8568
8569 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8570 if (pf->udp_ports[i].index == port)
8571 return i;
8572 }
8573
8574 return i;
8575 }
8576
8577 #endif
8578
8579 #if IS_ENABLED(CONFIG_VXLAN)
8580 /**
8581 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8582 * @netdev: This physical port's netdev
8583 * @sa_family: Socket Family that VXLAN is notifying us about
8584 * @port: New UDP port number that VXLAN started listening to
8585 **/
8586 static void i40e_add_vxlan_port(struct net_device *netdev,
8587 sa_family_t sa_family, __be16 port)
8588 {
8589 struct i40e_netdev_priv *np = netdev_priv(netdev);
8590 struct i40e_vsi *vsi = np->vsi;
8591 struct i40e_pf *pf = vsi->back;
8592 u8 next_idx;
8593 u8 idx;
8594
8595 if (sa_family == AF_INET6)
8596 return;
8597
8598 idx = i40e_get_udp_port_idx(pf, port);
8599
8600 /* Check if port already exists */
8601 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8602 netdev_info(netdev, "vxlan port %d already offloaded\n",
8603 ntohs(port));
8604 return;
8605 }
8606
8607 /* Now check if there is space to add the new port */
8608 next_idx = i40e_get_udp_port_idx(pf, 0);
8609
8610 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8611 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8612 ntohs(port));
8613 return;
8614 }
8615
8616 /* New port: add it and mark its index in the bitmap */
8617 pf->udp_ports[next_idx].index = port;
8618 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8619 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8620 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8621 }
8622
8623 /**
8624 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8625 * @netdev: This physical port's netdev
8626 * @sa_family: Socket Family that VXLAN is notifying us about
8627 * @port: UDP port number that VXLAN stopped listening to
8628 **/
8629 static void i40e_del_vxlan_port(struct net_device *netdev,
8630 sa_family_t sa_family, __be16 port)
8631 {
8632 struct i40e_netdev_priv *np = netdev_priv(netdev);
8633 struct i40e_vsi *vsi = np->vsi;
8634 struct i40e_pf *pf = vsi->back;
8635 u8 idx;
8636
8637 if (sa_family == AF_INET6)
8638 return;
8639
8640 idx = i40e_get_udp_port_idx(pf, port);
8641
8642 /* Check if port already exists */
8643 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8644 /* if port exists, set it to 0 (mark for deletion)
8645 * and make it pending
8646 */
8647 pf->udp_ports[idx].index = 0;
8648 pf->pending_udp_bitmap |= BIT_ULL(idx);
8649 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8650 } else {
8651 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8652 ntohs(port));
8653 }
8654 }
8655 #endif
8656
8657 #if IS_ENABLED(CONFIG_GENEVE)
8658 /**
8659 * i40e_add_geneve_port - Get notifications about GENEVE ports that come up
8660 * @netdev: This physical port's netdev
8661 * @sa_family: Socket Family that GENEVE is notifying us about
8662 * @port: New UDP port number that GENEVE started listening to
8663 **/
8664 static void i40e_add_geneve_port(struct net_device *netdev,
8665 sa_family_t sa_family, __be16 port)
8666 {
8667 struct i40e_netdev_priv *np = netdev_priv(netdev);
8668 struct i40e_vsi *vsi = np->vsi;
8669 struct i40e_pf *pf = vsi->back;
8670 u8 next_idx;
8671 u8 idx;
8672
8673 if (sa_family == AF_INET6)
8674 return;
8675
8676 idx = i40e_get_udp_port_idx(pf, port);
8677
8678 /* Check if port already exists */
8679 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8680 netdev_info(netdev, "udp port %d already offloaded\n",
8681 ntohs(port));
8682 return;
8683 }
8684
8685 /* Now check if there is space to add the new port */
8686 next_idx = i40e_get_udp_port_idx(pf, 0);
8687
8688 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8689 netdev_info(netdev, "maximum number of UDP ports reached, not adding port %d\n",
8690 ntohs(port));
8691 return;
8692 }
8693
8694 /* New port: add it and mark its index in the bitmap */
8695 pf->udp_ports[next_idx].index = port;
8696 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8697 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8698 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8699
8700 dev_info(&pf->pdev->dev, "adding geneve port %d\n", ntohs(port));
8701 }
8702
8703 /**
8704 * i40e_del_geneve_port - Get notifications about GENEVE ports that go away
8705 * @netdev: This physical port's netdev
8706 * @sa_family: Socket Family that GENEVE is notifying us about
8707 * @port: UDP port number that GENEVE stopped listening to
8708 **/
8709 static void i40e_del_geneve_port(struct net_device *netdev,
8710 sa_family_t sa_family, __be16 port)
8711 {
8712 struct i40e_netdev_priv *np = netdev_priv(netdev);
8713 struct i40e_vsi *vsi = np->vsi;
8714 struct i40e_pf *pf = vsi->back;
8715 u8 idx;
8716
8717 if (sa_family == AF_INET6)
8718 return;
8719
8720 idx = i40e_get_udp_port_idx(pf, port);
8721
8722 /* Check if port already exists */
8723 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8724 /* if port exists, set it to 0 (mark for deletion)
8725 * and make it pending
8726 */
8727 pf->udp_ports[idx].index = 0;
8728 pf->pending_udp_bitmap |= BIT_ULL(idx);
8729 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8730
8731 dev_info(&pf->pdev->dev, "deleting geneve port %d\n",
8732 ntohs(port));
8733 } else {
8734 netdev_warn(netdev, "geneve port %d was not found, not deleting\n",
8735 ntohs(port));
8736 }
8737 }
8738 #endif
8739
8740 static int i40e_get_phys_port_id(struct net_device *netdev,
8741 struct netdev_phys_item_id *ppid)
8742 {
8743 struct i40e_netdev_priv *np = netdev_priv(netdev);
8744 struct i40e_pf *pf = np->vsi->back;
8745 struct i40e_hw *hw = &pf->hw;
8746
8747 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8748 return -EOPNOTSUPP;
8749
8750 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8751 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8752
8753 return 0;
8754 }
8755
8756 /**
8757 * i40e_ndo_fdb_add - add an entry to the hardware database
8758 * @ndm: the input from the stack
8759 * @tb: pointer to array of nladdr (unused)
8760 * @dev: the net device pointer
8761 * @addr: the MAC address entry being added
8762 * @flags: instructions from stack about fdb operation
8763 */
8764 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8765 struct net_device *dev,
8766 const unsigned char *addr, u16 vid,
8767 u16 flags)
8768 {
8769 struct i40e_netdev_priv *np = netdev_priv(dev);
8770 struct i40e_pf *pf = np->vsi->back;
8771 int err = 0;
8772
8773 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8774 return -EOPNOTSUPP;
8775
8776 if (vid) {
8777 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8778 return -EINVAL;
8779 }
8780
8781 /* Hardware does not support aging addresses so if a
8782 * ndm_state is given only allow permanent addresses
8783 */
8784 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8785 netdev_info(dev, "FDB only supports static addresses\n");
8786 return -EINVAL;
8787 }
8788
8789 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8790 err = dev_uc_add_excl(dev, addr);
8791 else if (is_multicast_ether_addr(addr))
8792 err = dev_mc_add_excl(dev, addr);
8793 else
8794 err = -EINVAL;
8795
8796 /* Only return duplicate errors if NLM_F_EXCL is set */
8797 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8798 err = 0;
8799
8800 return err;
8801 }
8802
8803 /**
8804 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8805 * @dev: the netdev being configured
8806 * @nlh: RTNL message
8807 *
8808 * Inserts a new hardware bridge if not already created and
8809 * enables the bridging mode requested (VEB or VEPA). If the
8810 * hardware bridge has already been inserted and the request
8811 * is to change the mode then that requires a PF reset to
8812 * allow rebuild of the components with required hardware
8813 * bridge mode enabled.
8814 **/
8815 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8816 struct nlmsghdr *nlh,
8817 u16 flags)
8818 {
8819 struct i40e_netdev_priv *np = netdev_priv(dev);
8820 struct i40e_vsi *vsi = np->vsi;
8821 struct i40e_pf *pf = vsi->back;
8822 struct i40e_veb *veb = NULL;
8823 struct nlattr *attr, *br_spec;
8824 int i, rem;
8825
8826 /* Only for PF VSI for now */
8827 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8828 return -EOPNOTSUPP;
8829
8830 /* Find the HW bridge for PF VSI */
8831 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8832 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8833 veb = pf->veb[i];
8834 }
8835
8836 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8837
8838 nla_for_each_nested(attr, br_spec, rem) {
8839 __u16 mode;
8840
8841 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8842 continue;
8843
8844 mode = nla_get_u16(attr);
8845 if ((mode != BRIDGE_MODE_VEPA) &&
8846 (mode != BRIDGE_MODE_VEB))
8847 return -EINVAL;
8848
8849 /* Insert a new HW bridge */
8850 if (!veb) {
8851 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8852 vsi->tc_config.enabled_tc);
8853 if (veb) {
8854 veb->bridge_mode = mode;
8855 i40e_config_bridge_mode(veb);
8856 } else {
8857 /* No Bridge HW offload available */
8858 return -ENOENT;
8859 }
8860 break;
8861 } else if (mode != veb->bridge_mode) {
8862 /* Existing HW bridge but different mode needs reset */
8863 veb->bridge_mode = mode;
8864 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8865 if (mode == BRIDGE_MODE_VEB)
8866 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8867 else
8868 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8869 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8870 break;
8871 }
8872 }
8873
8874 return 0;
8875 }
8876
8877 /**
8878 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8879 * @skb: skb buff
8880 * @pid: process id
8881 * @seq: RTNL message seq #
8882 * @dev: the netdev being configured
8883 * @filter_mask: unused
8884 * @nlflags: netlink flags passed in
8885 *
8886 * Return the mode in which the hardware bridge is operating in
8887 * i.e VEB or VEPA.
8888 **/
8889 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8890 struct net_device *dev,
8891 u32 __always_unused filter_mask,
8892 int nlflags)
8893 {
8894 struct i40e_netdev_priv *np = netdev_priv(dev);
8895 struct i40e_vsi *vsi = np->vsi;
8896 struct i40e_pf *pf = vsi->back;
8897 struct i40e_veb *veb = NULL;
8898 int i;
8899
8900 /* Only for PF VSI for now */
8901 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8902 return -EOPNOTSUPP;
8903
8904 /* Find the HW bridge for the PF VSI */
8905 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8906 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8907 veb = pf->veb[i];
8908 }
8909
8910 if (!veb)
8911 return 0;
8912
8913 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8914 nlflags, 0, 0, filter_mask, NULL);
8915 }
8916
8917 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8918 * inner mac plus all inner ethertypes.
8919 */
8920 #define I40E_MAX_TUNNEL_HDR_LEN 128
8921 /**
8922 * i40e_features_check - Validate encapsulated packet conforms to limits
8923 * @skb: skb buff
8924 * @dev: This physical port's netdev
8925 * @features: Offload features that the stack believes apply
8926 **/
8927 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8928 struct net_device *dev,
8929 netdev_features_t features)
8930 {
8931 if (skb->encapsulation &&
8932 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8933 I40E_MAX_TUNNEL_HDR_LEN))
8934 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8935
8936 return features;
8937 }
8938
8939 static const struct net_device_ops i40e_netdev_ops = {
8940 .ndo_open = i40e_open,
8941 .ndo_stop = i40e_close,
8942 .ndo_start_xmit = i40e_lan_xmit_frame,
8943 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8944 .ndo_set_rx_mode = i40e_set_rx_mode,
8945 .ndo_validate_addr = eth_validate_addr,
8946 .ndo_set_mac_address = i40e_set_mac,
8947 .ndo_change_mtu = i40e_change_mtu,
8948 .ndo_do_ioctl = i40e_ioctl,
8949 .ndo_tx_timeout = i40e_tx_timeout,
8950 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8951 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8952 #ifdef CONFIG_NET_POLL_CONTROLLER
8953 .ndo_poll_controller = i40e_netpoll,
8954 #endif
8955 .ndo_setup_tc = i40e_setup_tc,
8956 #ifdef I40E_FCOE
8957 .ndo_fcoe_enable = i40e_fcoe_enable,
8958 .ndo_fcoe_disable = i40e_fcoe_disable,
8959 #endif
8960 .ndo_set_features = i40e_set_features,
8961 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8962 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8963 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8964 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8965 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8966 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8967 #if IS_ENABLED(CONFIG_VXLAN)
8968 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8969 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8970 #endif
8971 #if IS_ENABLED(CONFIG_GENEVE)
8972 .ndo_add_geneve_port = i40e_add_geneve_port,
8973 .ndo_del_geneve_port = i40e_del_geneve_port,
8974 #endif
8975 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8976 .ndo_fdb_add = i40e_ndo_fdb_add,
8977 .ndo_features_check = i40e_features_check,
8978 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8979 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8980 };
8981
8982 /**
8983 * i40e_config_netdev - Setup the netdev flags
8984 * @vsi: the VSI being configured
8985 *
8986 * Returns 0 on success, negative value on failure
8987 **/
8988 static int i40e_config_netdev(struct i40e_vsi *vsi)
8989 {
8990 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8991 struct i40e_pf *pf = vsi->back;
8992 struct i40e_hw *hw = &pf->hw;
8993 struct i40e_netdev_priv *np;
8994 struct net_device *netdev;
8995 u8 mac_addr[ETH_ALEN];
8996 int etherdev_size;
8997
8998 etherdev_size = sizeof(struct i40e_netdev_priv);
8999 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9000 if (!netdev)
9001 return -ENOMEM;
9002
9003 vsi->netdev = netdev;
9004 np = netdev_priv(netdev);
9005 np->vsi = vsi;
9006
9007 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
9008 NETIF_F_GSO_UDP_TUNNEL |
9009 NETIF_F_GSO_GRE |
9010 NETIF_F_TSO |
9011 0;
9012
9013 netdev->features = NETIF_F_SG |
9014 NETIF_F_IP_CSUM |
9015 NETIF_F_SCTP_CRC |
9016 NETIF_F_HIGHDMA |
9017 NETIF_F_GSO_UDP_TUNNEL |
9018 NETIF_F_GSO_GRE |
9019 NETIF_F_HW_VLAN_CTAG_TX |
9020 NETIF_F_HW_VLAN_CTAG_RX |
9021 NETIF_F_HW_VLAN_CTAG_FILTER |
9022 NETIF_F_IPV6_CSUM |
9023 NETIF_F_TSO |
9024 NETIF_F_TSO_ECN |
9025 NETIF_F_TSO6 |
9026 NETIF_F_RXCSUM |
9027 NETIF_F_RXHASH |
9028 0;
9029
9030 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9031 netdev->features |= NETIF_F_NTUPLE;
9032
9033 /* copy netdev features into list of user selectable features */
9034 netdev->hw_features |= netdev->features;
9035
9036 if (vsi->type == I40E_VSI_MAIN) {
9037 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9038 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9039 /* The following steps are necessary to prevent reception
9040 * of tagged packets - some older NVM configurations load a
9041 * default a MAC-VLAN filter that accepts any tagged packet
9042 * which must be replaced by a normal filter.
9043 */
9044 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9045 spin_lock_bh(&vsi->mac_filter_list_lock);
9046 i40e_add_filter(vsi, mac_addr,
9047 I40E_VLAN_ANY, false, true);
9048 spin_unlock_bh(&vsi->mac_filter_list_lock);
9049 }
9050 } else {
9051 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9052 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9053 pf->vsi[pf->lan_vsi]->netdev->name);
9054 random_ether_addr(mac_addr);
9055
9056 spin_lock_bh(&vsi->mac_filter_list_lock);
9057 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9058 spin_unlock_bh(&vsi->mac_filter_list_lock);
9059 }
9060
9061 spin_lock_bh(&vsi->mac_filter_list_lock);
9062 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9063 spin_unlock_bh(&vsi->mac_filter_list_lock);
9064
9065 ether_addr_copy(netdev->dev_addr, mac_addr);
9066 ether_addr_copy(netdev->perm_addr, mac_addr);
9067 /* vlan gets same features (except vlan offload)
9068 * after any tweaks for specific VSI types
9069 */
9070 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
9071 NETIF_F_HW_VLAN_CTAG_RX |
9072 NETIF_F_HW_VLAN_CTAG_FILTER);
9073 netdev->priv_flags |= IFF_UNICAST_FLT;
9074 netdev->priv_flags |= IFF_SUPP_NOFCS;
9075 /* Setup netdev TC information */
9076 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9077
9078 netdev->netdev_ops = &i40e_netdev_ops;
9079 netdev->watchdog_timeo = 5 * HZ;
9080 i40e_set_ethtool_ops(netdev);
9081 #ifdef I40E_FCOE
9082 i40e_fcoe_config_netdev(netdev, vsi);
9083 #endif
9084
9085 return 0;
9086 }
9087
9088 /**
9089 * i40e_vsi_delete - Delete a VSI from the switch
9090 * @vsi: the VSI being removed
9091 *
9092 * Returns 0 on success, negative value on failure
9093 **/
9094 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9095 {
9096 /* remove default VSI is not allowed */
9097 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9098 return;
9099
9100 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9101 }
9102
9103 /**
9104 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9105 * @vsi: the VSI being queried
9106 *
9107 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9108 **/
9109 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9110 {
9111 struct i40e_veb *veb;
9112 struct i40e_pf *pf = vsi->back;
9113
9114 /* Uplink is not a bridge so default to VEB */
9115 if (vsi->veb_idx == I40E_NO_VEB)
9116 return 1;
9117
9118 veb = pf->veb[vsi->veb_idx];
9119 if (!veb) {
9120 dev_info(&pf->pdev->dev,
9121 "There is no veb associated with the bridge\n");
9122 return -ENOENT;
9123 }
9124
9125 /* Uplink is a bridge in VEPA mode */
9126 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9127 return 0;
9128 } else {
9129 /* Uplink is a bridge in VEB mode */
9130 return 1;
9131 }
9132
9133 /* VEPA is now default bridge, so return 0 */
9134 return 0;
9135 }
9136
9137 /**
9138 * i40e_add_vsi - Add a VSI to the switch
9139 * @vsi: the VSI being configured
9140 *
9141 * This initializes a VSI context depending on the VSI type to be added and
9142 * passes it down to the add_vsi aq command.
9143 **/
9144 static int i40e_add_vsi(struct i40e_vsi *vsi)
9145 {
9146 int ret = -ENODEV;
9147 u8 laa_macaddr[ETH_ALEN];
9148 bool found_laa_mac_filter = false;
9149 struct i40e_pf *pf = vsi->back;
9150 struct i40e_hw *hw = &pf->hw;
9151 struct i40e_vsi_context ctxt;
9152 struct i40e_mac_filter *f, *ftmp;
9153
9154 u8 enabled_tc = 0x1; /* TC0 enabled */
9155 int f_count = 0;
9156
9157 memset(&ctxt, 0, sizeof(ctxt));
9158 switch (vsi->type) {
9159 case I40E_VSI_MAIN:
9160 /* The PF's main VSI is already setup as part of the
9161 * device initialization, so we'll not bother with
9162 * the add_vsi call, but we will retrieve the current
9163 * VSI context.
9164 */
9165 ctxt.seid = pf->main_vsi_seid;
9166 ctxt.pf_num = pf->hw.pf_id;
9167 ctxt.vf_num = 0;
9168 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9169 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9170 if (ret) {
9171 dev_info(&pf->pdev->dev,
9172 "couldn't get PF vsi config, err %s aq_err %s\n",
9173 i40e_stat_str(&pf->hw, ret),
9174 i40e_aq_str(&pf->hw,
9175 pf->hw.aq.asq_last_status));
9176 return -ENOENT;
9177 }
9178 vsi->info = ctxt.info;
9179 vsi->info.valid_sections = 0;
9180
9181 vsi->seid = ctxt.seid;
9182 vsi->id = ctxt.vsi_number;
9183
9184 enabled_tc = i40e_pf_get_tc_map(pf);
9185
9186 /* MFP mode setup queue map and update VSI */
9187 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9188 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9189 memset(&ctxt, 0, sizeof(ctxt));
9190 ctxt.seid = pf->main_vsi_seid;
9191 ctxt.pf_num = pf->hw.pf_id;
9192 ctxt.vf_num = 0;
9193 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9194 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9195 if (ret) {
9196 dev_info(&pf->pdev->dev,
9197 "update vsi failed, err %s aq_err %s\n",
9198 i40e_stat_str(&pf->hw, ret),
9199 i40e_aq_str(&pf->hw,
9200 pf->hw.aq.asq_last_status));
9201 ret = -ENOENT;
9202 goto err;
9203 }
9204 /* update the local VSI info queue map */
9205 i40e_vsi_update_queue_map(vsi, &ctxt);
9206 vsi->info.valid_sections = 0;
9207 } else {
9208 /* Default/Main VSI is only enabled for TC0
9209 * reconfigure it to enable all TCs that are
9210 * available on the port in SFP mode.
9211 * For MFP case the iSCSI PF would use this
9212 * flow to enable LAN+iSCSI TC.
9213 */
9214 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9215 if (ret) {
9216 dev_info(&pf->pdev->dev,
9217 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9218 enabled_tc,
9219 i40e_stat_str(&pf->hw, ret),
9220 i40e_aq_str(&pf->hw,
9221 pf->hw.aq.asq_last_status));
9222 ret = -ENOENT;
9223 }
9224 }
9225 break;
9226
9227 case I40E_VSI_FDIR:
9228 ctxt.pf_num = hw->pf_id;
9229 ctxt.vf_num = 0;
9230 ctxt.uplink_seid = vsi->uplink_seid;
9231 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9232 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9233 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9234 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9235 ctxt.info.valid_sections |=
9236 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9237 ctxt.info.switch_id =
9238 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9239 }
9240 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9241 break;
9242
9243 case I40E_VSI_VMDQ2:
9244 ctxt.pf_num = hw->pf_id;
9245 ctxt.vf_num = 0;
9246 ctxt.uplink_seid = vsi->uplink_seid;
9247 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9248 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9249
9250 /* This VSI is connected to VEB so the switch_id
9251 * should be set to zero by default.
9252 */
9253 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9254 ctxt.info.valid_sections |=
9255 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9256 ctxt.info.switch_id =
9257 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9258 }
9259
9260 /* Setup the VSI tx/rx queue map for TC0 only for now */
9261 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9262 break;
9263
9264 case I40E_VSI_SRIOV:
9265 ctxt.pf_num = hw->pf_id;
9266 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9267 ctxt.uplink_seid = vsi->uplink_seid;
9268 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9269 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9270
9271 /* This VSI is connected to VEB so the switch_id
9272 * should be set to zero by default.
9273 */
9274 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9275 ctxt.info.valid_sections |=
9276 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9277 ctxt.info.switch_id =
9278 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9279 }
9280
9281 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9282 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9283 if (pf->vf[vsi->vf_id].spoofchk) {
9284 ctxt.info.valid_sections |=
9285 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9286 ctxt.info.sec_flags |=
9287 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9288 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9289 }
9290 /* Setup the VSI tx/rx queue map for TC0 only for now */
9291 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9292 break;
9293
9294 #ifdef I40E_FCOE
9295 case I40E_VSI_FCOE:
9296 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9297 if (ret) {
9298 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9299 return ret;
9300 }
9301 break;
9302
9303 #endif /* I40E_FCOE */
9304 default:
9305 return -ENODEV;
9306 }
9307
9308 if (vsi->type != I40E_VSI_MAIN) {
9309 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9310 if (ret) {
9311 dev_info(&vsi->back->pdev->dev,
9312 "add vsi failed, err %s aq_err %s\n",
9313 i40e_stat_str(&pf->hw, ret),
9314 i40e_aq_str(&pf->hw,
9315 pf->hw.aq.asq_last_status));
9316 ret = -ENOENT;
9317 goto err;
9318 }
9319 vsi->info = ctxt.info;
9320 vsi->info.valid_sections = 0;
9321 vsi->seid = ctxt.seid;
9322 vsi->id = ctxt.vsi_number;
9323 }
9324
9325 spin_lock_bh(&vsi->mac_filter_list_lock);
9326 /* If macvlan filters already exist, force them to get loaded */
9327 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9328 f->changed = true;
9329 f_count++;
9330
9331 /* Expected to have only one MAC filter entry for LAA in list */
9332 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9333 ether_addr_copy(laa_macaddr, f->macaddr);
9334 found_laa_mac_filter = true;
9335 }
9336 }
9337 spin_unlock_bh(&vsi->mac_filter_list_lock);
9338
9339 if (found_laa_mac_filter) {
9340 struct i40e_aqc_remove_macvlan_element_data element;
9341
9342 memset(&element, 0, sizeof(element));
9343 ether_addr_copy(element.mac_addr, laa_macaddr);
9344 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9345 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9346 &element, 1, NULL);
9347 if (ret) {
9348 /* some older FW has a different default */
9349 element.flags |=
9350 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9351 i40e_aq_remove_macvlan(hw, vsi->seid,
9352 &element, 1, NULL);
9353 }
9354
9355 i40e_aq_mac_address_write(hw,
9356 I40E_AQC_WRITE_TYPE_LAA_WOL,
9357 laa_macaddr, NULL);
9358 }
9359
9360 if (f_count) {
9361 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9362 pf->flags |= I40E_FLAG_FILTER_SYNC;
9363 }
9364
9365 /* Update VSI BW information */
9366 ret = i40e_vsi_get_bw_info(vsi);
9367 if (ret) {
9368 dev_info(&pf->pdev->dev,
9369 "couldn't get vsi bw info, err %s aq_err %s\n",
9370 i40e_stat_str(&pf->hw, ret),
9371 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9372 /* VSI is already added so not tearing that up */
9373 ret = 0;
9374 }
9375
9376 err:
9377 return ret;
9378 }
9379
9380 /**
9381 * i40e_vsi_release - Delete a VSI and free its resources
9382 * @vsi: the VSI being removed
9383 *
9384 * Returns 0 on success or < 0 on error
9385 **/
9386 int i40e_vsi_release(struct i40e_vsi *vsi)
9387 {
9388 struct i40e_mac_filter *f, *ftmp;
9389 struct i40e_veb *veb = NULL;
9390 struct i40e_pf *pf;
9391 u16 uplink_seid;
9392 int i, n;
9393
9394 pf = vsi->back;
9395
9396 /* release of a VEB-owner or last VSI is not allowed */
9397 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9398 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9399 vsi->seid, vsi->uplink_seid);
9400 return -ENODEV;
9401 }
9402 if (vsi == pf->vsi[pf->lan_vsi] &&
9403 !test_bit(__I40E_DOWN, &pf->state)) {
9404 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9405 return -ENODEV;
9406 }
9407
9408 uplink_seid = vsi->uplink_seid;
9409 if (vsi->type != I40E_VSI_SRIOV) {
9410 if (vsi->netdev_registered) {
9411 vsi->netdev_registered = false;
9412 if (vsi->netdev) {
9413 /* results in a call to i40e_close() */
9414 unregister_netdev(vsi->netdev);
9415 }
9416 } else {
9417 i40e_vsi_close(vsi);
9418 }
9419 i40e_vsi_disable_irq(vsi);
9420 }
9421
9422 spin_lock_bh(&vsi->mac_filter_list_lock);
9423 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9424 i40e_del_filter(vsi, f->macaddr, f->vlan,
9425 f->is_vf, f->is_netdev);
9426 spin_unlock_bh(&vsi->mac_filter_list_lock);
9427
9428 i40e_sync_vsi_filters(vsi);
9429
9430 i40e_vsi_delete(vsi);
9431 i40e_vsi_free_q_vectors(vsi);
9432 if (vsi->netdev) {
9433 free_netdev(vsi->netdev);
9434 vsi->netdev = NULL;
9435 }
9436 i40e_vsi_clear_rings(vsi);
9437 i40e_vsi_clear(vsi);
9438
9439 /* If this was the last thing on the VEB, except for the
9440 * controlling VSI, remove the VEB, which puts the controlling
9441 * VSI onto the next level down in the switch.
9442 *
9443 * Well, okay, there's one more exception here: don't remove
9444 * the orphan VEBs yet. We'll wait for an explicit remove request
9445 * from up the network stack.
9446 */
9447 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9448 if (pf->vsi[i] &&
9449 pf->vsi[i]->uplink_seid == uplink_seid &&
9450 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9451 n++; /* count the VSIs */
9452 }
9453 }
9454 for (i = 0; i < I40E_MAX_VEB; i++) {
9455 if (!pf->veb[i])
9456 continue;
9457 if (pf->veb[i]->uplink_seid == uplink_seid)
9458 n++; /* count the VEBs */
9459 if (pf->veb[i]->seid == uplink_seid)
9460 veb = pf->veb[i];
9461 }
9462 if (n == 0 && veb && veb->uplink_seid != 0)
9463 i40e_veb_release(veb);
9464
9465 return 0;
9466 }
9467
9468 /**
9469 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9470 * @vsi: ptr to the VSI
9471 *
9472 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9473 * corresponding SW VSI structure and initializes num_queue_pairs for the
9474 * newly allocated VSI.
9475 *
9476 * Returns 0 on success or negative on failure
9477 **/
9478 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9479 {
9480 int ret = -ENOENT;
9481 struct i40e_pf *pf = vsi->back;
9482
9483 if (vsi->q_vectors[0]) {
9484 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9485 vsi->seid);
9486 return -EEXIST;
9487 }
9488
9489 if (vsi->base_vector) {
9490 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9491 vsi->seid, vsi->base_vector);
9492 return -EEXIST;
9493 }
9494
9495 ret = i40e_vsi_alloc_q_vectors(vsi);
9496 if (ret) {
9497 dev_info(&pf->pdev->dev,
9498 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9499 vsi->num_q_vectors, vsi->seid, ret);
9500 vsi->num_q_vectors = 0;
9501 goto vector_setup_out;
9502 }
9503
9504 /* In Legacy mode, we do not have to get any other vector since we
9505 * piggyback on the misc/ICR0 for queue interrupts.
9506 */
9507 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9508 return ret;
9509 if (vsi->num_q_vectors)
9510 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9511 vsi->num_q_vectors, vsi->idx);
9512 if (vsi->base_vector < 0) {
9513 dev_info(&pf->pdev->dev,
9514 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9515 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9516 i40e_vsi_free_q_vectors(vsi);
9517 ret = -ENOENT;
9518 goto vector_setup_out;
9519 }
9520
9521 vector_setup_out:
9522 return ret;
9523 }
9524
9525 /**
9526 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9527 * @vsi: pointer to the vsi.
9528 *
9529 * This re-allocates a vsi's queue resources.
9530 *
9531 * Returns pointer to the successfully allocated and configured VSI sw struct
9532 * on success, otherwise returns NULL on failure.
9533 **/
9534 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9535 {
9536 struct i40e_pf *pf = vsi->back;
9537 u8 enabled_tc;
9538 int ret;
9539
9540 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9541 i40e_vsi_clear_rings(vsi);
9542
9543 i40e_vsi_free_arrays(vsi, false);
9544 i40e_set_num_rings_in_vsi(vsi);
9545 ret = i40e_vsi_alloc_arrays(vsi, false);
9546 if (ret)
9547 goto err_vsi;
9548
9549 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9550 if (ret < 0) {
9551 dev_info(&pf->pdev->dev,
9552 "failed to get tracking for %d queues for VSI %d err %d\n",
9553 vsi->alloc_queue_pairs, vsi->seid, ret);
9554 goto err_vsi;
9555 }
9556 vsi->base_queue = ret;
9557
9558 /* Update the FW view of the VSI. Force a reset of TC and queue
9559 * layout configurations.
9560 */
9561 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9562 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9563 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9564 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9565
9566 /* assign it some queues */
9567 ret = i40e_alloc_rings(vsi);
9568 if (ret)
9569 goto err_rings;
9570
9571 /* map all of the rings to the q_vectors */
9572 i40e_vsi_map_rings_to_vectors(vsi);
9573 return vsi;
9574
9575 err_rings:
9576 i40e_vsi_free_q_vectors(vsi);
9577 if (vsi->netdev_registered) {
9578 vsi->netdev_registered = false;
9579 unregister_netdev(vsi->netdev);
9580 free_netdev(vsi->netdev);
9581 vsi->netdev = NULL;
9582 }
9583 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9584 err_vsi:
9585 i40e_vsi_clear(vsi);
9586 return NULL;
9587 }
9588
9589 /**
9590 * i40e_macaddr_init - explicitly write the mac address filters.
9591 *
9592 * @vsi: pointer to the vsi.
9593 * @macaddr: the MAC address
9594 *
9595 * This is needed when the macaddr has been obtained by other
9596 * means than the default, e.g., from Open Firmware or IDPROM.
9597 * Returns 0 on success, negative on failure
9598 **/
9599 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9600 {
9601 int ret;
9602 struct i40e_aqc_add_macvlan_element_data element;
9603
9604 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9605 I40E_AQC_WRITE_TYPE_LAA_WOL,
9606 macaddr, NULL);
9607 if (ret) {
9608 dev_info(&vsi->back->pdev->dev,
9609 "Addr change for VSI failed: %d\n", ret);
9610 return -EADDRNOTAVAIL;
9611 }
9612
9613 memset(&element, 0, sizeof(element));
9614 ether_addr_copy(element.mac_addr, macaddr);
9615 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9616 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9617 if (ret) {
9618 dev_info(&vsi->back->pdev->dev,
9619 "add filter failed err %s aq_err %s\n",
9620 i40e_stat_str(&vsi->back->hw, ret),
9621 i40e_aq_str(&vsi->back->hw,
9622 vsi->back->hw.aq.asq_last_status));
9623 }
9624 return ret;
9625 }
9626
9627 /**
9628 * i40e_vsi_setup - Set up a VSI by a given type
9629 * @pf: board private structure
9630 * @type: VSI type
9631 * @uplink_seid: the switch element to link to
9632 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9633 *
9634 * This allocates the sw VSI structure and its queue resources, then add a VSI
9635 * to the identified VEB.
9636 *
9637 * Returns pointer to the successfully allocated and configure VSI sw struct on
9638 * success, otherwise returns NULL on failure.
9639 **/
9640 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9641 u16 uplink_seid, u32 param1)
9642 {
9643 struct i40e_vsi *vsi = NULL;
9644 struct i40e_veb *veb = NULL;
9645 int ret, i;
9646 int v_idx;
9647
9648 /* The requested uplink_seid must be either
9649 * - the PF's port seid
9650 * no VEB is needed because this is the PF
9651 * or this is a Flow Director special case VSI
9652 * - seid of an existing VEB
9653 * - seid of a VSI that owns an existing VEB
9654 * - seid of a VSI that doesn't own a VEB
9655 * a new VEB is created and the VSI becomes the owner
9656 * - seid of the PF VSI, which is what creates the first VEB
9657 * this is a special case of the previous
9658 *
9659 * Find which uplink_seid we were given and create a new VEB if needed
9660 */
9661 for (i = 0; i < I40E_MAX_VEB; i++) {
9662 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9663 veb = pf->veb[i];
9664 break;
9665 }
9666 }
9667
9668 if (!veb && uplink_seid != pf->mac_seid) {
9669
9670 for (i = 0; i < pf->num_alloc_vsi; i++) {
9671 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9672 vsi = pf->vsi[i];
9673 break;
9674 }
9675 }
9676 if (!vsi) {
9677 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9678 uplink_seid);
9679 return NULL;
9680 }
9681
9682 if (vsi->uplink_seid == pf->mac_seid)
9683 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9684 vsi->tc_config.enabled_tc);
9685 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9686 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9687 vsi->tc_config.enabled_tc);
9688 if (veb) {
9689 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9690 dev_info(&vsi->back->pdev->dev,
9691 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9692 return NULL;
9693 }
9694 /* We come up by default in VEPA mode if SRIOV is not
9695 * already enabled, in which case we can't force VEPA
9696 * mode.
9697 */
9698 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9699 veb->bridge_mode = BRIDGE_MODE_VEPA;
9700 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9701 }
9702 i40e_config_bridge_mode(veb);
9703 }
9704 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9705 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9706 veb = pf->veb[i];
9707 }
9708 if (!veb) {
9709 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9710 return NULL;
9711 }
9712
9713 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9714 uplink_seid = veb->seid;
9715 }
9716
9717 /* get vsi sw struct */
9718 v_idx = i40e_vsi_mem_alloc(pf, type);
9719 if (v_idx < 0)
9720 goto err_alloc;
9721 vsi = pf->vsi[v_idx];
9722 if (!vsi)
9723 goto err_alloc;
9724 vsi->type = type;
9725 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9726
9727 if (type == I40E_VSI_MAIN)
9728 pf->lan_vsi = v_idx;
9729 else if (type == I40E_VSI_SRIOV)
9730 vsi->vf_id = param1;
9731 /* assign it some queues */
9732 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9733 vsi->idx);
9734 if (ret < 0) {
9735 dev_info(&pf->pdev->dev,
9736 "failed to get tracking for %d queues for VSI %d err=%d\n",
9737 vsi->alloc_queue_pairs, vsi->seid, ret);
9738 goto err_vsi;
9739 }
9740 vsi->base_queue = ret;
9741
9742 /* get a VSI from the hardware */
9743 vsi->uplink_seid = uplink_seid;
9744 ret = i40e_add_vsi(vsi);
9745 if (ret)
9746 goto err_vsi;
9747
9748 switch (vsi->type) {
9749 /* setup the netdev if needed */
9750 case I40E_VSI_MAIN:
9751 /* Apply relevant filters if a platform-specific mac
9752 * address was selected.
9753 */
9754 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9755 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9756 if (ret) {
9757 dev_warn(&pf->pdev->dev,
9758 "could not set up macaddr; err %d\n",
9759 ret);
9760 }
9761 }
9762 case I40E_VSI_VMDQ2:
9763 case I40E_VSI_FCOE:
9764 ret = i40e_config_netdev(vsi);
9765 if (ret)
9766 goto err_netdev;
9767 ret = register_netdev(vsi->netdev);
9768 if (ret)
9769 goto err_netdev;
9770 vsi->netdev_registered = true;
9771 netif_carrier_off(vsi->netdev);
9772 #ifdef CONFIG_I40E_DCB
9773 /* Setup DCB netlink interface */
9774 i40e_dcbnl_setup(vsi);
9775 #endif /* CONFIG_I40E_DCB */
9776 /* fall through */
9777
9778 case I40E_VSI_FDIR:
9779 /* set up vectors and rings if needed */
9780 ret = i40e_vsi_setup_vectors(vsi);
9781 if (ret)
9782 goto err_msix;
9783
9784 ret = i40e_alloc_rings(vsi);
9785 if (ret)
9786 goto err_rings;
9787
9788 /* map all of the rings to the q_vectors */
9789 i40e_vsi_map_rings_to_vectors(vsi);
9790
9791 i40e_vsi_reset_stats(vsi);
9792 break;
9793
9794 default:
9795 /* no netdev or rings for the other VSI types */
9796 break;
9797 }
9798
9799 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9800 (vsi->type == I40E_VSI_VMDQ2)) {
9801 ret = i40e_vsi_config_rss(vsi);
9802 }
9803 return vsi;
9804
9805 err_rings:
9806 i40e_vsi_free_q_vectors(vsi);
9807 err_msix:
9808 if (vsi->netdev_registered) {
9809 vsi->netdev_registered = false;
9810 unregister_netdev(vsi->netdev);
9811 free_netdev(vsi->netdev);
9812 vsi->netdev = NULL;
9813 }
9814 err_netdev:
9815 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9816 err_vsi:
9817 i40e_vsi_clear(vsi);
9818 err_alloc:
9819 return NULL;
9820 }
9821
9822 /**
9823 * i40e_veb_get_bw_info - Query VEB BW information
9824 * @veb: the veb to query
9825 *
9826 * Query the Tx scheduler BW configuration data for given VEB
9827 **/
9828 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9829 {
9830 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9831 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9832 struct i40e_pf *pf = veb->pf;
9833 struct i40e_hw *hw = &pf->hw;
9834 u32 tc_bw_max;
9835 int ret = 0;
9836 int i;
9837
9838 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9839 &bw_data, NULL);
9840 if (ret) {
9841 dev_info(&pf->pdev->dev,
9842 "query veb bw config failed, err %s aq_err %s\n",
9843 i40e_stat_str(&pf->hw, ret),
9844 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9845 goto out;
9846 }
9847
9848 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9849 &ets_data, NULL);
9850 if (ret) {
9851 dev_info(&pf->pdev->dev,
9852 "query veb bw ets config failed, err %s aq_err %s\n",
9853 i40e_stat_str(&pf->hw, ret),
9854 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9855 goto out;
9856 }
9857
9858 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9859 veb->bw_max_quanta = ets_data.tc_bw_max;
9860 veb->is_abs_credits = bw_data.absolute_credits_enable;
9861 veb->enabled_tc = ets_data.tc_valid_bits;
9862 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9863 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9864 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9865 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9866 veb->bw_tc_limit_credits[i] =
9867 le16_to_cpu(bw_data.tc_bw_limits[i]);
9868 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9869 }
9870
9871 out:
9872 return ret;
9873 }
9874
9875 /**
9876 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9877 * @pf: board private structure
9878 *
9879 * On error: returns error code (negative)
9880 * On success: returns vsi index in PF (positive)
9881 **/
9882 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9883 {
9884 int ret = -ENOENT;
9885 struct i40e_veb *veb;
9886 int i;
9887
9888 /* Need to protect the allocation of switch elements at the PF level */
9889 mutex_lock(&pf->switch_mutex);
9890
9891 /* VEB list may be fragmented if VEB creation/destruction has
9892 * been happening. We can afford to do a quick scan to look
9893 * for any free slots in the list.
9894 *
9895 * find next empty veb slot, looping back around if necessary
9896 */
9897 i = 0;
9898 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9899 i++;
9900 if (i >= I40E_MAX_VEB) {
9901 ret = -ENOMEM;
9902 goto err_alloc_veb; /* out of VEB slots! */
9903 }
9904
9905 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9906 if (!veb) {
9907 ret = -ENOMEM;
9908 goto err_alloc_veb;
9909 }
9910 veb->pf = pf;
9911 veb->idx = i;
9912 veb->enabled_tc = 1;
9913
9914 pf->veb[i] = veb;
9915 ret = i;
9916 err_alloc_veb:
9917 mutex_unlock(&pf->switch_mutex);
9918 return ret;
9919 }
9920
9921 /**
9922 * i40e_switch_branch_release - Delete a branch of the switch tree
9923 * @branch: where to start deleting
9924 *
9925 * This uses recursion to find the tips of the branch to be
9926 * removed, deleting until we get back to and can delete this VEB.
9927 **/
9928 static void i40e_switch_branch_release(struct i40e_veb *branch)
9929 {
9930 struct i40e_pf *pf = branch->pf;
9931 u16 branch_seid = branch->seid;
9932 u16 veb_idx = branch->idx;
9933 int i;
9934
9935 /* release any VEBs on this VEB - RECURSION */
9936 for (i = 0; i < I40E_MAX_VEB; i++) {
9937 if (!pf->veb[i])
9938 continue;
9939 if (pf->veb[i]->uplink_seid == branch->seid)
9940 i40e_switch_branch_release(pf->veb[i]);
9941 }
9942
9943 /* Release the VSIs on this VEB, but not the owner VSI.
9944 *
9945 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9946 * the VEB itself, so don't use (*branch) after this loop.
9947 */
9948 for (i = 0; i < pf->num_alloc_vsi; i++) {
9949 if (!pf->vsi[i])
9950 continue;
9951 if (pf->vsi[i]->uplink_seid == branch_seid &&
9952 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9953 i40e_vsi_release(pf->vsi[i]);
9954 }
9955 }
9956
9957 /* There's one corner case where the VEB might not have been
9958 * removed, so double check it here and remove it if needed.
9959 * This case happens if the veb was created from the debugfs
9960 * commands and no VSIs were added to it.
9961 */
9962 if (pf->veb[veb_idx])
9963 i40e_veb_release(pf->veb[veb_idx]);
9964 }
9965
9966 /**
9967 * i40e_veb_clear - remove veb struct
9968 * @veb: the veb to remove
9969 **/
9970 static void i40e_veb_clear(struct i40e_veb *veb)
9971 {
9972 if (!veb)
9973 return;
9974
9975 if (veb->pf) {
9976 struct i40e_pf *pf = veb->pf;
9977
9978 mutex_lock(&pf->switch_mutex);
9979 if (pf->veb[veb->idx] == veb)
9980 pf->veb[veb->idx] = NULL;
9981 mutex_unlock(&pf->switch_mutex);
9982 }
9983
9984 kfree(veb);
9985 }
9986
9987 /**
9988 * i40e_veb_release - Delete a VEB and free its resources
9989 * @veb: the VEB being removed
9990 **/
9991 void i40e_veb_release(struct i40e_veb *veb)
9992 {
9993 struct i40e_vsi *vsi = NULL;
9994 struct i40e_pf *pf;
9995 int i, n = 0;
9996
9997 pf = veb->pf;
9998
9999 /* find the remaining VSI and check for extras */
10000 for (i = 0; i < pf->num_alloc_vsi; i++) {
10001 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10002 n++;
10003 vsi = pf->vsi[i];
10004 }
10005 }
10006 if (n != 1) {
10007 dev_info(&pf->pdev->dev,
10008 "can't remove VEB %d with %d VSIs left\n",
10009 veb->seid, n);
10010 return;
10011 }
10012
10013 /* move the remaining VSI to uplink veb */
10014 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10015 if (veb->uplink_seid) {
10016 vsi->uplink_seid = veb->uplink_seid;
10017 if (veb->uplink_seid == pf->mac_seid)
10018 vsi->veb_idx = I40E_NO_VEB;
10019 else
10020 vsi->veb_idx = veb->veb_idx;
10021 } else {
10022 /* floating VEB */
10023 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10024 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10025 }
10026
10027 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10028 i40e_veb_clear(veb);
10029 }
10030
10031 /**
10032 * i40e_add_veb - create the VEB in the switch
10033 * @veb: the VEB to be instantiated
10034 * @vsi: the controlling VSI
10035 **/
10036 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10037 {
10038 struct i40e_pf *pf = veb->pf;
10039 bool is_default = veb->pf->cur_promisc;
10040 bool is_cloud = false;
10041 int ret;
10042
10043 /* get a VEB from the hardware */
10044 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10045 veb->enabled_tc, is_default,
10046 is_cloud, &veb->seid, NULL);
10047 if (ret) {
10048 dev_info(&pf->pdev->dev,
10049 "couldn't add VEB, err %s aq_err %s\n",
10050 i40e_stat_str(&pf->hw, ret),
10051 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10052 return -EPERM;
10053 }
10054
10055 /* get statistics counter */
10056 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10057 &veb->stats_idx, NULL, NULL, NULL);
10058 if (ret) {
10059 dev_info(&pf->pdev->dev,
10060 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10061 i40e_stat_str(&pf->hw, ret),
10062 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10063 return -EPERM;
10064 }
10065 ret = i40e_veb_get_bw_info(veb);
10066 if (ret) {
10067 dev_info(&pf->pdev->dev,
10068 "couldn't get VEB bw info, err %s aq_err %s\n",
10069 i40e_stat_str(&pf->hw, ret),
10070 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10071 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10072 return -ENOENT;
10073 }
10074
10075 vsi->uplink_seid = veb->seid;
10076 vsi->veb_idx = veb->idx;
10077 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10078
10079 return 0;
10080 }
10081
10082 /**
10083 * i40e_veb_setup - Set up a VEB
10084 * @pf: board private structure
10085 * @flags: VEB setup flags
10086 * @uplink_seid: the switch element to link to
10087 * @vsi_seid: the initial VSI seid
10088 * @enabled_tc: Enabled TC bit-map
10089 *
10090 * This allocates the sw VEB structure and links it into the switch
10091 * It is possible and legal for this to be a duplicate of an already
10092 * existing VEB. It is also possible for both uplink and vsi seids
10093 * to be zero, in order to create a floating VEB.
10094 *
10095 * Returns pointer to the successfully allocated VEB sw struct on
10096 * success, otherwise returns NULL on failure.
10097 **/
10098 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10099 u16 uplink_seid, u16 vsi_seid,
10100 u8 enabled_tc)
10101 {
10102 struct i40e_veb *veb, *uplink_veb = NULL;
10103 int vsi_idx, veb_idx;
10104 int ret;
10105
10106 /* if one seid is 0, the other must be 0 to create a floating relay */
10107 if ((uplink_seid == 0 || vsi_seid == 0) &&
10108 (uplink_seid + vsi_seid != 0)) {
10109 dev_info(&pf->pdev->dev,
10110 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10111 uplink_seid, vsi_seid);
10112 return NULL;
10113 }
10114
10115 /* make sure there is such a vsi and uplink */
10116 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10117 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10118 break;
10119 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10120 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10121 vsi_seid);
10122 return NULL;
10123 }
10124
10125 if (uplink_seid && uplink_seid != pf->mac_seid) {
10126 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10127 if (pf->veb[veb_idx] &&
10128 pf->veb[veb_idx]->seid == uplink_seid) {
10129 uplink_veb = pf->veb[veb_idx];
10130 break;
10131 }
10132 }
10133 if (!uplink_veb) {
10134 dev_info(&pf->pdev->dev,
10135 "uplink seid %d not found\n", uplink_seid);
10136 return NULL;
10137 }
10138 }
10139
10140 /* get veb sw struct */
10141 veb_idx = i40e_veb_mem_alloc(pf);
10142 if (veb_idx < 0)
10143 goto err_alloc;
10144 veb = pf->veb[veb_idx];
10145 veb->flags = flags;
10146 veb->uplink_seid = uplink_seid;
10147 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10148 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10149
10150 /* create the VEB in the switch */
10151 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10152 if (ret)
10153 goto err_veb;
10154 if (vsi_idx == pf->lan_vsi)
10155 pf->lan_veb = veb->idx;
10156
10157 return veb;
10158
10159 err_veb:
10160 i40e_veb_clear(veb);
10161 err_alloc:
10162 return NULL;
10163 }
10164
10165 /**
10166 * i40e_setup_pf_switch_element - set PF vars based on switch type
10167 * @pf: board private structure
10168 * @ele: element we are building info from
10169 * @num_reported: total number of elements
10170 * @printconfig: should we print the contents
10171 *
10172 * helper function to assist in extracting a few useful SEID values.
10173 **/
10174 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10175 struct i40e_aqc_switch_config_element_resp *ele,
10176 u16 num_reported, bool printconfig)
10177 {
10178 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10179 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10180 u8 element_type = ele->element_type;
10181 u16 seid = le16_to_cpu(ele->seid);
10182
10183 if (printconfig)
10184 dev_info(&pf->pdev->dev,
10185 "type=%d seid=%d uplink=%d downlink=%d\n",
10186 element_type, seid, uplink_seid, downlink_seid);
10187
10188 switch (element_type) {
10189 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10190 pf->mac_seid = seid;
10191 break;
10192 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10193 /* Main VEB? */
10194 if (uplink_seid != pf->mac_seid)
10195 break;
10196 if (pf->lan_veb == I40E_NO_VEB) {
10197 int v;
10198
10199 /* find existing or else empty VEB */
10200 for (v = 0; v < I40E_MAX_VEB; v++) {
10201 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10202 pf->lan_veb = v;
10203 break;
10204 }
10205 }
10206 if (pf->lan_veb == I40E_NO_VEB) {
10207 v = i40e_veb_mem_alloc(pf);
10208 if (v < 0)
10209 break;
10210 pf->lan_veb = v;
10211 }
10212 }
10213
10214 pf->veb[pf->lan_veb]->seid = seid;
10215 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10216 pf->veb[pf->lan_veb]->pf = pf;
10217 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10218 break;
10219 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10220 if (num_reported != 1)
10221 break;
10222 /* This is immediately after a reset so we can assume this is
10223 * the PF's VSI
10224 */
10225 pf->mac_seid = uplink_seid;
10226 pf->pf_seid = downlink_seid;
10227 pf->main_vsi_seid = seid;
10228 if (printconfig)
10229 dev_info(&pf->pdev->dev,
10230 "pf_seid=%d main_vsi_seid=%d\n",
10231 pf->pf_seid, pf->main_vsi_seid);
10232 break;
10233 case I40E_SWITCH_ELEMENT_TYPE_PF:
10234 case I40E_SWITCH_ELEMENT_TYPE_VF:
10235 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10236 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10237 case I40E_SWITCH_ELEMENT_TYPE_PE:
10238 case I40E_SWITCH_ELEMENT_TYPE_PA:
10239 /* ignore these for now */
10240 break;
10241 default:
10242 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10243 element_type, seid);
10244 break;
10245 }
10246 }
10247
10248 /**
10249 * i40e_fetch_switch_configuration - Get switch config from firmware
10250 * @pf: board private structure
10251 * @printconfig: should we print the contents
10252 *
10253 * Get the current switch configuration from the device and
10254 * extract a few useful SEID values.
10255 **/
10256 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10257 {
10258 struct i40e_aqc_get_switch_config_resp *sw_config;
10259 u16 next_seid = 0;
10260 int ret = 0;
10261 u8 *aq_buf;
10262 int i;
10263
10264 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10265 if (!aq_buf)
10266 return -ENOMEM;
10267
10268 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10269 do {
10270 u16 num_reported, num_total;
10271
10272 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10273 I40E_AQ_LARGE_BUF,
10274 &next_seid, NULL);
10275 if (ret) {
10276 dev_info(&pf->pdev->dev,
10277 "get switch config failed err %s aq_err %s\n",
10278 i40e_stat_str(&pf->hw, ret),
10279 i40e_aq_str(&pf->hw,
10280 pf->hw.aq.asq_last_status));
10281 kfree(aq_buf);
10282 return -ENOENT;
10283 }
10284
10285 num_reported = le16_to_cpu(sw_config->header.num_reported);
10286 num_total = le16_to_cpu(sw_config->header.num_total);
10287
10288 if (printconfig)
10289 dev_info(&pf->pdev->dev,
10290 "header: %d reported %d total\n",
10291 num_reported, num_total);
10292
10293 for (i = 0; i < num_reported; i++) {
10294 struct i40e_aqc_switch_config_element_resp *ele =
10295 &sw_config->element[i];
10296
10297 i40e_setup_pf_switch_element(pf, ele, num_reported,
10298 printconfig);
10299 }
10300 } while (next_seid != 0);
10301
10302 kfree(aq_buf);
10303 return ret;
10304 }
10305
10306 /**
10307 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10308 * @pf: board private structure
10309 * @reinit: if the Main VSI needs to re-initialized.
10310 *
10311 * Returns 0 on success, negative value on failure
10312 **/
10313 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10314 {
10315 int ret;
10316
10317 /* find out what's out there already */
10318 ret = i40e_fetch_switch_configuration(pf, false);
10319 if (ret) {
10320 dev_info(&pf->pdev->dev,
10321 "couldn't fetch switch config, err %s aq_err %s\n",
10322 i40e_stat_str(&pf->hw, ret),
10323 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10324 return ret;
10325 }
10326 i40e_pf_reset_stats(pf);
10327
10328 /* first time setup */
10329 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10330 struct i40e_vsi *vsi = NULL;
10331 u16 uplink_seid;
10332
10333 /* Set up the PF VSI associated with the PF's main VSI
10334 * that is already in the HW switch
10335 */
10336 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10337 uplink_seid = pf->veb[pf->lan_veb]->seid;
10338 else
10339 uplink_seid = pf->mac_seid;
10340 if (pf->lan_vsi == I40E_NO_VSI)
10341 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10342 else if (reinit)
10343 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10344 if (!vsi) {
10345 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10346 i40e_fdir_teardown(pf);
10347 return -EAGAIN;
10348 }
10349 } else {
10350 /* force a reset of TC and queue layout configurations */
10351 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10352
10353 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10354 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10355 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10356 }
10357 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10358
10359 i40e_fdir_sb_setup(pf);
10360
10361 /* Setup static PF queue filter control settings */
10362 ret = i40e_setup_pf_filter_control(pf);
10363 if (ret) {
10364 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10365 ret);
10366 /* Failure here should not stop continuing other steps */
10367 }
10368
10369 /* enable RSS in the HW, even for only one queue, as the stack can use
10370 * the hash
10371 */
10372 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10373 i40e_pf_config_rss(pf);
10374
10375 /* fill in link information and enable LSE reporting */
10376 i40e_update_link_info(&pf->hw);
10377 i40e_link_event(pf);
10378
10379 /* Initialize user-specific link properties */
10380 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10381 I40E_AQ_AN_COMPLETED) ? true : false);
10382
10383 i40e_ptp_init(pf);
10384
10385 return ret;
10386 }
10387
10388 /**
10389 * i40e_determine_queue_usage - Work out queue distribution
10390 * @pf: board private structure
10391 **/
10392 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10393 {
10394 int queues_left;
10395
10396 pf->num_lan_qps = 0;
10397 #ifdef I40E_FCOE
10398 pf->num_fcoe_qps = 0;
10399 #endif
10400
10401 /* Find the max queues to be put into basic use. We'll always be
10402 * using TC0, whether or not DCB is running, and TC0 will get the
10403 * big RSS set.
10404 */
10405 queues_left = pf->hw.func_caps.num_tx_qp;
10406
10407 if ((queues_left == 1) ||
10408 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10409 /* one qp for PF, no queues for anything else */
10410 queues_left = 0;
10411 pf->alloc_rss_size = pf->num_lan_qps = 1;
10412
10413 /* make sure all the fancies are disabled */
10414 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10415 #ifdef I40E_FCOE
10416 I40E_FLAG_FCOE_ENABLED |
10417 #endif
10418 I40E_FLAG_FD_SB_ENABLED |
10419 I40E_FLAG_FD_ATR_ENABLED |
10420 I40E_FLAG_DCB_CAPABLE |
10421 I40E_FLAG_SRIOV_ENABLED |
10422 I40E_FLAG_VMDQ_ENABLED);
10423 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10424 I40E_FLAG_FD_SB_ENABLED |
10425 I40E_FLAG_FD_ATR_ENABLED |
10426 I40E_FLAG_DCB_CAPABLE))) {
10427 /* one qp for PF */
10428 pf->alloc_rss_size = pf->num_lan_qps = 1;
10429 queues_left -= pf->num_lan_qps;
10430
10431 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10432 #ifdef I40E_FCOE
10433 I40E_FLAG_FCOE_ENABLED |
10434 #endif
10435 I40E_FLAG_FD_SB_ENABLED |
10436 I40E_FLAG_FD_ATR_ENABLED |
10437 I40E_FLAG_DCB_ENABLED |
10438 I40E_FLAG_VMDQ_ENABLED);
10439 } else {
10440 /* Not enough queues for all TCs */
10441 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10442 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10443 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10444 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10445 }
10446 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10447 num_online_cpus());
10448 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10449 pf->hw.func_caps.num_tx_qp);
10450
10451 queues_left -= pf->num_lan_qps;
10452 }
10453
10454 #ifdef I40E_FCOE
10455 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10456 if (I40E_DEFAULT_FCOE <= queues_left) {
10457 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10458 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10459 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10460 } else {
10461 pf->num_fcoe_qps = 0;
10462 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10463 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10464 }
10465
10466 queues_left -= pf->num_fcoe_qps;
10467 }
10468
10469 #endif
10470 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10471 if (queues_left > 1) {
10472 queues_left -= 1; /* save 1 queue for FD */
10473 } else {
10474 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10475 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10476 }
10477 }
10478
10479 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10480 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10481 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10482 (queues_left / pf->num_vf_qps));
10483 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10484 }
10485
10486 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10487 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10488 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10489 (queues_left / pf->num_vmdq_qps));
10490 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10491 }
10492
10493 pf->queues_left = queues_left;
10494 dev_dbg(&pf->pdev->dev,
10495 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10496 pf->hw.func_caps.num_tx_qp,
10497 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10498 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10499 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10500 queues_left);
10501 #ifdef I40E_FCOE
10502 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10503 #endif
10504 }
10505
10506 /**
10507 * i40e_setup_pf_filter_control - Setup PF static filter control
10508 * @pf: PF to be setup
10509 *
10510 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10511 * settings. If PE/FCoE are enabled then it will also set the per PF
10512 * based filter sizes required for them. It also enables Flow director,
10513 * ethertype and macvlan type filter settings for the pf.
10514 *
10515 * Returns 0 on success, negative on failure
10516 **/
10517 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10518 {
10519 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10520
10521 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10522
10523 /* Flow Director is enabled */
10524 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10525 settings->enable_fdir = true;
10526
10527 /* Ethtype and MACVLAN filters enabled for PF */
10528 settings->enable_ethtype = true;
10529 settings->enable_macvlan = true;
10530
10531 if (i40e_set_filter_control(&pf->hw, settings))
10532 return -ENOENT;
10533
10534 return 0;
10535 }
10536
10537 #define INFO_STRING_LEN 255
10538 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10539 static void i40e_print_features(struct i40e_pf *pf)
10540 {
10541 struct i40e_hw *hw = &pf->hw;
10542 char *buf;
10543 int i;
10544
10545 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10546 if (!buf)
10547 return;
10548
10549 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10550 #ifdef CONFIG_PCI_IOV
10551 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10552 #endif
10553 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d RX: %s",
10554 pf->hw.func_caps.num_vsis,
10555 pf->vsi[pf->lan_vsi]->num_queue_pairs,
10556 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
10557
10558 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10559 i += snprintf(&buf[i], REMAIN(i), " RSS");
10560 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10561 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10562 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10563 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10564 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10565 }
10566 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10567 i += snprintf(&buf[i], REMAIN(i), " DCB");
10568 #if IS_ENABLED(CONFIG_VXLAN)
10569 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10570 #endif
10571 #if IS_ENABLED(CONFIG_GENEVE)
10572 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10573 #endif
10574 if (pf->flags & I40E_FLAG_PTP)
10575 i += snprintf(&buf[i], REMAIN(i), " PTP");
10576 #ifdef I40E_FCOE
10577 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10578 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10579 #endif
10580 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10581 i += snprintf(&buf[i], REMAIN(i), " VEB");
10582 else
10583 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10584
10585 dev_info(&pf->pdev->dev, "%s\n", buf);
10586 kfree(buf);
10587 WARN_ON(i > INFO_STRING_LEN);
10588 }
10589
10590 /**
10591 * i40e_get_platform_mac_addr - get platform-specific MAC address
10592 *
10593 * @pdev: PCI device information struct
10594 * @pf: board private structure
10595 *
10596 * Look up the MAC address in Open Firmware on systems that support it,
10597 * and use IDPROM on SPARC if no OF address is found. On return, the
10598 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10599 * has been selected.
10600 **/
10601 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10602 {
10603 struct device_node *dp = pci_device_to_OF_node(pdev);
10604 const unsigned char *addr;
10605 u8 *mac_addr = pf->hw.mac.addr;
10606
10607 pf->flags &= ~I40E_FLAG_PF_MAC;
10608 addr = of_get_mac_address(dp);
10609 if (addr) {
10610 ether_addr_copy(mac_addr, addr);
10611 pf->flags |= I40E_FLAG_PF_MAC;
10612 #ifdef CONFIG_SPARC
10613 } else {
10614 ether_addr_copy(mac_addr, idprom->id_ethaddr);
10615 pf->flags |= I40E_FLAG_PF_MAC;
10616 #endif /* CONFIG_SPARC */
10617 }
10618 }
10619
10620 /**
10621 * i40e_probe - Device initialization routine
10622 * @pdev: PCI device information struct
10623 * @ent: entry in i40e_pci_tbl
10624 *
10625 * i40e_probe initializes a PF identified by a pci_dev structure.
10626 * The OS initialization, configuring of the PF private structure,
10627 * and a hardware reset occur.
10628 *
10629 * Returns 0 on success, negative on failure
10630 **/
10631 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10632 {
10633 struct i40e_aq_get_phy_abilities_resp abilities;
10634 struct i40e_pf *pf;
10635 struct i40e_hw *hw;
10636 static u16 pfs_found;
10637 u16 wol_nvm_bits;
10638 u16 link_status;
10639 int err;
10640 u32 val;
10641 u32 i;
10642 u8 set_fc_aq_fail;
10643
10644 err = pci_enable_device_mem(pdev);
10645 if (err)
10646 return err;
10647
10648 /* set up for high or low dma */
10649 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10650 if (err) {
10651 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10652 if (err) {
10653 dev_err(&pdev->dev,
10654 "DMA configuration failed: 0x%x\n", err);
10655 goto err_dma;
10656 }
10657 }
10658
10659 /* set up pci connections */
10660 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10661 IORESOURCE_MEM), i40e_driver_name);
10662 if (err) {
10663 dev_info(&pdev->dev,
10664 "pci_request_selected_regions failed %d\n", err);
10665 goto err_pci_reg;
10666 }
10667
10668 pci_enable_pcie_error_reporting(pdev);
10669 pci_set_master(pdev);
10670
10671 /* Now that we have a PCI connection, we need to do the
10672 * low level device setup. This is primarily setting up
10673 * the Admin Queue structures and then querying for the
10674 * device's current profile information.
10675 */
10676 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10677 if (!pf) {
10678 err = -ENOMEM;
10679 goto err_pf_alloc;
10680 }
10681 pf->next_vsi = 0;
10682 pf->pdev = pdev;
10683 set_bit(__I40E_DOWN, &pf->state);
10684
10685 hw = &pf->hw;
10686 hw->back = pf;
10687
10688 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10689 I40E_MAX_CSR_SPACE);
10690
10691 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10692 if (!hw->hw_addr) {
10693 err = -EIO;
10694 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10695 (unsigned int)pci_resource_start(pdev, 0),
10696 pf->ioremap_len, err);
10697 goto err_ioremap;
10698 }
10699 hw->vendor_id = pdev->vendor;
10700 hw->device_id = pdev->device;
10701 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10702 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10703 hw->subsystem_device_id = pdev->subsystem_device;
10704 hw->bus.device = PCI_SLOT(pdev->devfn);
10705 hw->bus.func = PCI_FUNC(pdev->devfn);
10706 pf->instance = pfs_found;
10707
10708 if (debug != -1) {
10709 pf->msg_enable = pf->hw.debug_mask;
10710 pf->msg_enable = debug;
10711 }
10712
10713 /* do a special CORER for clearing PXE mode once at init */
10714 if (hw->revision_id == 0 &&
10715 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10716 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10717 i40e_flush(hw);
10718 msleep(200);
10719 pf->corer_count++;
10720
10721 i40e_clear_pxe_mode(hw);
10722 }
10723
10724 /* Reset here to make sure all is clean and to define PF 'n' */
10725 i40e_clear_hw(hw);
10726 err = i40e_pf_reset(hw);
10727 if (err) {
10728 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10729 goto err_pf_reset;
10730 }
10731 pf->pfr_count++;
10732
10733 hw->aq.num_arq_entries = I40E_AQ_LEN;
10734 hw->aq.num_asq_entries = I40E_AQ_LEN;
10735 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10736 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10737 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10738
10739 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10740 "%s-%s:misc",
10741 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10742
10743 err = i40e_init_shared_code(hw);
10744 if (err) {
10745 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10746 err);
10747 goto err_pf_reset;
10748 }
10749
10750 /* set up a default setting for link flow control */
10751 pf->hw.fc.requested_mode = I40E_FC_NONE;
10752
10753 /* set up the locks for the AQ, do this only once in probe
10754 * and destroy them only once in remove
10755 */
10756 mutex_init(&hw->aq.asq_mutex);
10757 mutex_init(&hw->aq.arq_mutex);
10758
10759 err = i40e_init_adminq(hw);
10760 if (err) {
10761 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10762 dev_info(&pdev->dev,
10763 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10764 else
10765 dev_info(&pdev->dev,
10766 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10767
10768 goto err_pf_reset;
10769 }
10770
10771 /* provide nvm, fw, api versions */
10772 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10773 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10774 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10775 i40e_nvm_version_str(hw));
10776
10777 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10778 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10779 dev_info(&pdev->dev,
10780 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10781 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10782 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10783 dev_info(&pdev->dev,
10784 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10785
10786 i40e_verify_eeprom(pf);
10787
10788 /* Rev 0 hardware was never productized */
10789 if (hw->revision_id < 1)
10790 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10791
10792 i40e_clear_pxe_mode(hw);
10793 err = i40e_get_capabilities(pf);
10794 if (err)
10795 goto err_adminq_setup;
10796
10797 err = i40e_sw_init(pf);
10798 if (err) {
10799 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10800 goto err_sw_init;
10801 }
10802
10803 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10804 hw->func_caps.num_rx_qp,
10805 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10806 if (err) {
10807 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10808 goto err_init_lan_hmc;
10809 }
10810
10811 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10812 if (err) {
10813 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10814 err = -ENOENT;
10815 goto err_configure_lan_hmc;
10816 }
10817
10818 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10819 * Ignore error return codes because if it was already disabled via
10820 * hardware settings this will fail
10821 */
10822 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10823 (pf->hw.aq.fw_maj_ver < 4)) {
10824 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10825 i40e_aq_stop_lldp(hw, true, NULL);
10826 }
10827
10828 i40e_get_mac_addr(hw, hw->mac.addr);
10829 /* allow a platform config to override the HW addr */
10830 i40e_get_platform_mac_addr(pdev, pf);
10831 if (!is_valid_ether_addr(hw->mac.addr)) {
10832 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10833 err = -EIO;
10834 goto err_mac_addr;
10835 }
10836 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10837 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10838 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10839 if (is_valid_ether_addr(hw->mac.port_addr))
10840 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10841 #ifdef I40E_FCOE
10842 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10843 if (err)
10844 dev_info(&pdev->dev,
10845 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10846 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10847 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10848 hw->mac.san_addr);
10849 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10850 }
10851 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10852 #endif /* I40E_FCOE */
10853
10854 pci_set_drvdata(pdev, pf);
10855 pci_save_state(pdev);
10856 #ifdef CONFIG_I40E_DCB
10857 err = i40e_init_pf_dcb(pf);
10858 if (err) {
10859 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10860 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10861 /* Continue without DCB enabled */
10862 }
10863 #endif /* CONFIG_I40E_DCB */
10864
10865 /* set up periodic task facility */
10866 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10867 pf->service_timer_period = HZ;
10868
10869 INIT_WORK(&pf->service_task, i40e_service_task);
10870 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10871 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10872
10873 /* NVM bit on means WoL disabled for the port */
10874 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10875 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10876 pf->wol_en = false;
10877 else
10878 pf->wol_en = true;
10879 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10880
10881 /* set up the main switch operations */
10882 i40e_determine_queue_usage(pf);
10883 err = i40e_init_interrupt_scheme(pf);
10884 if (err)
10885 goto err_switch_setup;
10886
10887 /* The number of VSIs reported by the FW is the minimum guaranteed
10888 * to us; HW supports far more and we share the remaining pool with
10889 * the other PFs. We allocate space for more than the guarantee with
10890 * the understanding that we might not get them all later.
10891 */
10892 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10893 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10894 else
10895 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10896
10897 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10898 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10899 GFP_KERNEL);
10900 if (!pf->vsi) {
10901 err = -ENOMEM;
10902 goto err_switch_setup;
10903 }
10904
10905 #ifdef CONFIG_PCI_IOV
10906 /* prep for VF support */
10907 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10908 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10909 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10910 if (pci_num_vf(pdev))
10911 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10912 }
10913 #endif
10914 err = i40e_setup_pf_switch(pf, false);
10915 if (err) {
10916 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10917 goto err_vsis;
10918 }
10919
10920 /* Make sure flow control is set according to current settings */
10921 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10922 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10923 dev_dbg(&pf->pdev->dev,
10924 "Set fc with err %s aq_err %s on get_phy_cap\n",
10925 i40e_stat_str(hw, err),
10926 i40e_aq_str(hw, hw->aq.asq_last_status));
10927 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10928 dev_dbg(&pf->pdev->dev,
10929 "Set fc with err %s aq_err %s on set_phy_config\n",
10930 i40e_stat_str(hw, err),
10931 i40e_aq_str(hw, hw->aq.asq_last_status));
10932 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10933 dev_dbg(&pf->pdev->dev,
10934 "Set fc with err %s aq_err %s on get_link_info\n",
10935 i40e_stat_str(hw, err),
10936 i40e_aq_str(hw, hw->aq.asq_last_status));
10937
10938 /* if FDIR VSI was set up, start it now */
10939 for (i = 0; i < pf->num_alloc_vsi; i++) {
10940 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10941 i40e_vsi_open(pf->vsi[i]);
10942 break;
10943 }
10944 }
10945
10946 /* driver is only interested in link up/down and module qualification
10947 * reports from firmware
10948 */
10949 err = i40e_aq_set_phy_int_mask(&pf->hw,
10950 I40E_AQ_EVENT_LINK_UPDOWN |
10951 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10952 if (err)
10953 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10954 i40e_stat_str(&pf->hw, err),
10955 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10956
10957 /* Reconfigure hardware for allowing smaller MSS in the case
10958 * of TSO, so that we avoid the MDD being fired and causing
10959 * a reset in the case of small MSS+TSO.
10960 */
10961 val = rd32(hw, I40E_REG_MSS);
10962 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10963 val &= ~I40E_REG_MSS_MIN_MASK;
10964 val |= I40E_64BYTE_MSS;
10965 wr32(hw, I40E_REG_MSS, val);
10966 }
10967
10968 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
10969 msleep(75);
10970 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10971 if (err)
10972 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10973 i40e_stat_str(&pf->hw, err),
10974 i40e_aq_str(&pf->hw,
10975 pf->hw.aq.asq_last_status));
10976 }
10977 /* The main driver is (mostly) up and happy. We need to set this state
10978 * before setting up the misc vector or we get a race and the vector
10979 * ends up disabled forever.
10980 */
10981 clear_bit(__I40E_DOWN, &pf->state);
10982
10983 /* In case of MSIX we are going to setup the misc vector right here
10984 * to handle admin queue events etc. In case of legacy and MSI
10985 * the misc functionality and queue processing is combined in
10986 * the same vector and that gets setup at open.
10987 */
10988 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10989 err = i40e_setup_misc_vector(pf);
10990 if (err) {
10991 dev_info(&pdev->dev,
10992 "setup of misc vector failed: %d\n", err);
10993 goto err_vsis;
10994 }
10995 }
10996
10997 #ifdef CONFIG_PCI_IOV
10998 /* prep for VF support */
10999 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11000 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11001 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11002 u32 val;
11003
11004 /* disable link interrupts for VFs */
11005 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11006 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11007 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11008 i40e_flush(hw);
11009
11010 if (pci_num_vf(pdev)) {
11011 dev_info(&pdev->dev,
11012 "Active VFs found, allocating resources.\n");
11013 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11014 if (err)
11015 dev_info(&pdev->dev,
11016 "Error %d allocating resources for existing VFs\n",
11017 err);
11018 }
11019 }
11020 #endif /* CONFIG_PCI_IOV */
11021
11022 pfs_found++;
11023
11024 i40e_dbg_pf_init(pf);
11025
11026 /* tell the firmware that we're starting */
11027 i40e_send_version(pf);
11028
11029 /* since everything's happy, start the service_task timer */
11030 mod_timer(&pf->service_timer,
11031 round_jiffies(jiffies + pf->service_timer_period));
11032
11033 #ifdef I40E_FCOE
11034 /* create FCoE interface */
11035 i40e_fcoe_vsi_setup(pf);
11036
11037 #endif
11038 #define PCI_SPEED_SIZE 8
11039 #define PCI_WIDTH_SIZE 8
11040 /* Devices on the IOSF bus do not have this information
11041 * and will report PCI Gen 1 x 1 by default so don't bother
11042 * checking them.
11043 */
11044 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11045 char speed[PCI_SPEED_SIZE] = "Unknown";
11046 char width[PCI_WIDTH_SIZE] = "Unknown";
11047
11048 /* Get the negotiated link width and speed from PCI config
11049 * space
11050 */
11051 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11052 &link_status);
11053
11054 i40e_set_pci_config_data(hw, link_status);
11055
11056 switch (hw->bus.speed) {
11057 case i40e_bus_speed_8000:
11058 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11059 case i40e_bus_speed_5000:
11060 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11061 case i40e_bus_speed_2500:
11062 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11063 default:
11064 break;
11065 }
11066 switch (hw->bus.width) {
11067 case i40e_bus_width_pcie_x8:
11068 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11069 case i40e_bus_width_pcie_x4:
11070 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11071 case i40e_bus_width_pcie_x2:
11072 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11073 case i40e_bus_width_pcie_x1:
11074 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11075 default:
11076 break;
11077 }
11078
11079 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11080 speed, width);
11081
11082 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11083 hw->bus.speed < i40e_bus_speed_8000) {
11084 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11085 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11086 }
11087 }
11088
11089 /* get the requested speeds from the fw */
11090 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11091 if (err)
11092 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11093 i40e_stat_str(&pf->hw, err),
11094 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11095 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11096
11097 /* get the supported phy types from the fw */
11098 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11099 if (err)
11100 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11101 i40e_stat_str(&pf->hw, err),
11102 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11103 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11104
11105 /* Add a filter to drop all Flow control frames from any VSI from being
11106 * transmitted. By doing so we stop a malicious VF from sending out
11107 * PAUSE or PFC frames and potentially controlling traffic for other
11108 * PF/VF VSIs.
11109 * The FW can still send Flow control frames if enabled.
11110 */
11111 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11112 pf->main_vsi_seid);
11113
11114 /* print a string summarizing features */
11115 i40e_print_features(pf);
11116
11117 return 0;
11118
11119 /* Unwind what we've done if something failed in the setup */
11120 err_vsis:
11121 set_bit(__I40E_DOWN, &pf->state);
11122 i40e_clear_interrupt_scheme(pf);
11123 kfree(pf->vsi);
11124 err_switch_setup:
11125 i40e_reset_interrupt_capability(pf);
11126 del_timer_sync(&pf->service_timer);
11127 err_mac_addr:
11128 err_configure_lan_hmc:
11129 (void)i40e_shutdown_lan_hmc(hw);
11130 err_init_lan_hmc:
11131 kfree(pf->qp_pile);
11132 err_sw_init:
11133 err_adminq_setup:
11134 (void)i40e_shutdown_adminq(hw);
11135 err_pf_reset:
11136 iounmap(hw->hw_addr);
11137 err_ioremap:
11138 kfree(pf);
11139 err_pf_alloc:
11140 pci_disable_pcie_error_reporting(pdev);
11141 pci_release_selected_regions(pdev,
11142 pci_select_bars(pdev, IORESOURCE_MEM));
11143 err_pci_reg:
11144 err_dma:
11145 pci_disable_device(pdev);
11146 return err;
11147 }
11148
11149 /**
11150 * i40e_remove - Device removal routine
11151 * @pdev: PCI device information struct
11152 *
11153 * i40e_remove is called by the PCI subsystem to alert the driver
11154 * that is should release a PCI device. This could be caused by a
11155 * Hot-Plug event, or because the driver is going to be removed from
11156 * memory.
11157 **/
11158 static void i40e_remove(struct pci_dev *pdev)
11159 {
11160 struct i40e_pf *pf = pci_get_drvdata(pdev);
11161 struct i40e_hw *hw = &pf->hw;
11162 i40e_status ret_code;
11163 int i;
11164
11165 i40e_dbg_pf_exit(pf);
11166
11167 i40e_ptp_stop(pf);
11168
11169 /* Disable RSS in hw */
11170 wr32(hw, I40E_PFQF_HENA(0), 0);
11171 wr32(hw, I40E_PFQF_HENA(1), 0);
11172
11173 /* no more scheduling of any task */
11174 set_bit(__I40E_DOWN, &pf->state);
11175 del_timer_sync(&pf->service_timer);
11176 cancel_work_sync(&pf->service_task);
11177
11178 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11179 i40e_free_vfs(pf);
11180 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11181 }
11182
11183 i40e_fdir_teardown(pf);
11184
11185 /* If there is a switch structure or any orphans, remove them.
11186 * This will leave only the PF's VSI remaining.
11187 */
11188 for (i = 0; i < I40E_MAX_VEB; i++) {
11189 if (!pf->veb[i])
11190 continue;
11191
11192 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11193 pf->veb[i]->uplink_seid == 0)
11194 i40e_switch_branch_release(pf->veb[i]);
11195 }
11196
11197 /* Now we can shutdown the PF's VSI, just before we kill
11198 * adminq and hmc.
11199 */
11200 if (pf->vsi[pf->lan_vsi])
11201 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11202
11203 /* shutdown and destroy the HMC */
11204 if (pf->hw.hmc.hmc_obj) {
11205 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
11206 if (ret_code)
11207 dev_warn(&pdev->dev,
11208 "Failed to destroy the HMC resources: %d\n",
11209 ret_code);
11210 }
11211
11212 /* shutdown the adminq */
11213 ret_code = i40e_shutdown_adminq(&pf->hw);
11214 if (ret_code)
11215 dev_warn(&pdev->dev,
11216 "Failed to destroy the Admin Queue resources: %d\n",
11217 ret_code);
11218
11219 /* destroy the locks only once, here */
11220 mutex_destroy(&hw->aq.arq_mutex);
11221 mutex_destroy(&hw->aq.asq_mutex);
11222
11223 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11224 i40e_clear_interrupt_scheme(pf);
11225 for (i = 0; i < pf->num_alloc_vsi; i++) {
11226 if (pf->vsi[i]) {
11227 i40e_vsi_clear_rings(pf->vsi[i]);
11228 i40e_vsi_clear(pf->vsi[i]);
11229 pf->vsi[i] = NULL;
11230 }
11231 }
11232
11233 for (i = 0; i < I40E_MAX_VEB; i++) {
11234 kfree(pf->veb[i]);
11235 pf->veb[i] = NULL;
11236 }
11237
11238 kfree(pf->qp_pile);
11239 kfree(pf->vsi);
11240
11241 iounmap(pf->hw.hw_addr);
11242 kfree(pf);
11243 pci_release_selected_regions(pdev,
11244 pci_select_bars(pdev, IORESOURCE_MEM));
11245
11246 pci_disable_pcie_error_reporting(pdev);
11247 pci_disable_device(pdev);
11248 }
11249
11250 /**
11251 * i40e_pci_error_detected - warning that something funky happened in PCI land
11252 * @pdev: PCI device information struct
11253 *
11254 * Called to warn that something happened and the error handling steps
11255 * are in progress. Allows the driver to quiesce things, be ready for
11256 * remediation.
11257 **/
11258 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11259 enum pci_channel_state error)
11260 {
11261 struct i40e_pf *pf = pci_get_drvdata(pdev);
11262
11263 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11264
11265 /* shutdown all operations */
11266 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11267 rtnl_lock();
11268 i40e_prep_for_reset(pf);
11269 rtnl_unlock();
11270 }
11271
11272 /* Request a slot reset */
11273 return PCI_ERS_RESULT_NEED_RESET;
11274 }
11275
11276 /**
11277 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11278 * @pdev: PCI device information struct
11279 *
11280 * Called to find if the driver can work with the device now that
11281 * the pci slot has been reset. If a basic connection seems good
11282 * (registers are readable and have sane content) then return a
11283 * happy little PCI_ERS_RESULT_xxx.
11284 **/
11285 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11286 {
11287 struct i40e_pf *pf = pci_get_drvdata(pdev);
11288 pci_ers_result_t result;
11289 int err;
11290 u32 reg;
11291
11292 dev_dbg(&pdev->dev, "%s\n", __func__);
11293 if (pci_enable_device_mem(pdev)) {
11294 dev_info(&pdev->dev,
11295 "Cannot re-enable PCI device after reset.\n");
11296 result = PCI_ERS_RESULT_DISCONNECT;
11297 } else {
11298 pci_set_master(pdev);
11299 pci_restore_state(pdev);
11300 pci_save_state(pdev);
11301 pci_wake_from_d3(pdev, false);
11302
11303 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11304 if (reg == 0)
11305 result = PCI_ERS_RESULT_RECOVERED;
11306 else
11307 result = PCI_ERS_RESULT_DISCONNECT;
11308 }
11309
11310 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11311 if (err) {
11312 dev_info(&pdev->dev,
11313 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11314 err);
11315 /* non-fatal, continue */
11316 }
11317
11318 return result;
11319 }
11320
11321 /**
11322 * i40e_pci_error_resume - restart operations after PCI error recovery
11323 * @pdev: PCI device information struct
11324 *
11325 * Called to allow the driver to bring things back up after PCI error
11326 * and/or reset recovery has finished.
11327 **/
11328 static void i40e_pci_error_resume(struct pci_dev *pdev)
11329 {
11330 struct i40e_pf *pf = pci_get_drvdata(pdev);
11331
11332 dev_dbg(&pdev->dev, "%s\n", __func__);
11333 if (test_bit(__I40E_SUSPENDED, &pf->state))
11334 return;
11335
11336 rtnl_lock();
11337 i40e_handle_reset_warning(pf);
11338 rtnl_unlock();
11339 }
11340
11341 /**
11342 * i40e_shutdown - PCI callback for shutting down
11343 * @pdev: PCI device information struct
11344 **/
11345 static void i40e_shutdown(struct pci_dev *pdev)
11346 {
11347 struct i40e_pf *pf = pci_get_drvdata(pdev);
11348 struct i40e_hw *hw = &pf->hw;
11349
11350 set_bit(__I40E_SUSPENDED, &pf->state);
11351 set_bit(__I40E_DOWN, &pf->state);
11352 rtnl_lock();
11353 i40e_prep_for_reset(pf);
11354 rtnl_unlock();
11355
11356 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11357 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11358
11359 del_timer_sync(&pf->service_timer);
11360 cancel_work_sync(&pf->service_task);
11361 i40e_fdir_teardown(pf);
11362
11363 rtnl_lock();
11364 i40e_prep_for_reset(pf);
11365 rtnl_unlock();
11366
11367 wr32(hw, I40E_PFPM_APM,
11368 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11369 wr32(hw, I40E_PFPM_WUFC,
11370 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11371
11372 i40e_clear_interrupt_scheme(pf);
11373
11374 if (system_state == SYSTEM_POWER_OFF) {
11375 pci_wake_from_d3(pdev, pf->wol_en);
11376 pci_set_power_state(pdev, PCI_D3hot);
11377 }
11378 }
11379
11380 #ifdef CONFIG_PM
11381 /**
11382 * i40e_suspend - PCI callback for moving to D3
11383 * @pdev: PCI device information struct
11384 **/
11385 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11386 {
11387 struct i40e_pf *pf = pci_get_drvdata(pdev);
11388 struct i40e_hw *hw = &pf->hw;
11389
11390 set_bit(__I40E_SUSPENDED, &pf->state);
11391 set_bit(__I40E_DOWN, &pf->state);
11392
11393 rtnl_lock();
11394 i40e_prep_for_reset(pf);
11395 rtnl_unlock();
11396
11397 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11398 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11399
11400 pci_wake_from_d3(pdev, pf->wol_en);
11401 pci_set_power_state(pdev, PCI_D3hot);
11402
11403 return 0;
11404 }
11405
11406 /**
11407 * i40e_resume - PCI callback for waking up from D3
11408 * @pdev: PCI device information struct
11409 **/
11410 static int i40e_resume(struct pci_dev *pdev)
11411 {
11412 struct i40e_pf *pf = pci_get_drvdata(pdev);
11413 u32 err;
11414
11415 pci_set_power_state(pdev, PCI_D0);
11416 pci_restore_state(pdev);
11417 /* pci_restore_state() clears dev->state_saves, so
11418 * call pci_save_state() again to restore it.
11419 */
11420 pci_save_state(pdev);
11421
11422 err = pci_enable_device_mem(pdev);
11423 if (err) {
11424 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11425 return err;
11426 }
11427 pci_set_master(pdev);
11428
11429 /* no wakeup events while running */
11430 pci_wake_from_d3(pdev, false);
11431
11432 /* handling the reset will rebuild the device state */
11433 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11434 clear_bit(__I40E_DOWN, &pf->state);
11435 rtnl_lock();
11436 i40e_reset_and_rebuild(pf, false);
11437 rtnl_unlock();
11438 }
11439
11440 return 0;
11441 }
11442
11443 #endif
11444 static const struct pci_error_handlers i40e_err_handler = {
11445 .error_detected = i40e_pci_error_detected,
11446 .slot_reset = i40e_pci_error_slot_reset,
11447 .resume = i40e_pci_error_resume,
11448 };
11449
11450 static struct pci_driver i40e_driver = {
11451 .name = i40e_driver_name,
11452 .id_table = i40e_pci_tbl,
11453 .probe = i40e_probe,
11454 .remove = i40e_remove,
11455 #ifdef CONFIG_PM
11456 .suspend = i40e_suspend,
11457 .resume = i40e_resume,
11458 #endif
11459 .shutdown = i40e_shutdown,
11460 .err_handler = &i40e_err_handler,
11461 .sriov_configure = i40e_pci_sriov_configure,
11462 };
11463
11464 /**
11465 * i40e_init_module - Driver registration routine
11466 *
11467 * i40e_init_module is the first routine called when the driver is
11468 * loaded. All it does is register with the PCI subsystem.
11469 **/
11470 static int __init i40e_init_module(void)
11471 {
11472 pr_info("%s: %s - version %s\n", i40e_driver_name,
11473 i40e_driver_string, i40e_driver_version_str);
11474 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11475
11476 /* we will see if single thread per module is enough for now,
11477 * it can't be any worse than using the system workqueue which
11478 * was already single threaded
11479 */
11480 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11481 if (!i40e_wq) {
11482 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11483 return -ENOMEM;
11484 }
11485
11486 i40e_dbg_init();
11487 return pci_register_driver(&i40e_driver);
11488 }
11489 module_init(i40e_init_module);
11490
11491 /**
11492 * i40e_exit_module - Driver exit cleanup routine
11493 *
11494 * i40e_exit_module is called just before the driver is removed
11495 * from memory.
11496 **/
11497 static void __exit i40e_exit_module(void)
11498 {
11499 pci_unregister_driver(&i40e_driver);
11500 destroy_workqueue(i40e_wq);
11501 i40e_dbg_exit();
11502 }
11503 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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