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i40e: refactor interrupt enable
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
84 /* required last entry */
85 {0, }
86 };
87 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
88
89 #define I40E_MAX_VF_COUNT 128
90 static int debug = -1;
91 module_param(debug, int, 0);
92 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
93
94 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
95 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
96 MODULE_LICENSE("GPL");
97 MODULE_VERSION(DRV_VERSION);
98
99 /**
100 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
101 * @hw: pointer to the HW structure
102 * @mem: ptr to mem struct to fill out
103 * @size: size of memory requested
104 * @alignment: what to align the allocation to
105 **/
106 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
107 u64 size, u32 alignment)
108 {
109 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
110
111 mem->size = ALIGN(size, alignment);
112 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
113 &mem->pa, GFP_KERNEL);
114 if (!mem->va)
115 return -ENOMEM;
116
117 return 0;
118 }
119
120 /**
121 * i40e_free_dma_mem_d - OS specific memory free for shared code
122 * @hw: pointer to the HW structure
123 * @mem: ptr to mem struct to free
124 **/
125 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
126 {
127 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
128
129 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
130 mem->va = NULL;
131 mem->pa = 0;
132 mem->size = 0;
133
134 return 0;
135 }
136
137 /**
138 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
139 * @hw: pointer to the HW structure
140 * @mem: ptr to mem struct to fill out
141 * @size: size of memory requested
142 **/
143 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
144 u32 size)
145 {
146 mem->size = size;
147 mem->va = kzalloc(size, GFP_KERNEL);
148
149 if (!mem->va)
150 return -ENOMEM;
151
152 return 0;
153 }
154
155 /**
156 * i40e_free_virt_mem_d - OS specific memory free for shared code
157 * @hw: pointer to the HW structure
158 * @mem: ptr to mem struct to free
159 **/
160 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
161 {
162 /* it's ok to kfree a NULL pointer */
163 kfree(mem->va);
164 mem->va = NULL;
165 mem->size = 0;
166
167 return 0;
168 }
169
170 /**
171 * i40e_get_lump - find a lump of free generic resource
172 * @pf: board private structure
173 * @pile: the pile of resource to search
174 * @needed: the number of items needed
175 * @id: an owner id to stick on the items assigned
176 *
177 * Returns the base item index of the lump, or negative for error
178 *
179 * The search_hint trick and lack of advanced fit-finding only work
180 * because we're highly likely to have all the same size lump requests.
181 * Linear search time and any fragmentation should be minimal.
182 **/
183 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
184 u16 needed, u16 id)
185 {
186 int ret = -ENOMEM;
187 int i, j;
188
189 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
190 dev_info(&pf->pdev->dev,
191 "param err: pile=%p needed=%d id=0x%04x\n",
192 pile, needed, id);
193 return -EINVAL;
194 }
195
196 /* start the linear search with an imperfect hint */
197 i = pile->search_hint;
198 while (i < pile->num_entries) {
199 /* skip already allocated entries */
200 if (pile->list[i] & I40E_PILE_VALID_BIT) {
201 i++;
202 continue;
203 }
204
205 /* do we have enough in this lump? */
206 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
207 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
208 break;
209 }
210
211 if (j == needed) {
212 /* there was enough, so assign it to the requestor */
213 for (j = 0; j < needed; j++)
214 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
215 ret = i;
216 pile->search_hint = i + j;
217 break;
218 } else {
219 /* not enough, so skip over it and continue looking */
220 i += j;
221 }
222 }
223
224 return ret;
225 }
226
227 /**
228 * i40e_put_lump - return a lump of generic resource
229 * @pile: the pile of resource to search
230 * @index: the base item index
231 * @id: the owner id of the items assigned
232 *
233 * Returns the count of items in the lump
234 **/
235 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
236 {
237 int valid_id = (id | I40E_PILE_VALID_BIT);
238 int count = 0;
239 int i;
240
241 if (!pile || index >= pile->num_entries)
242 return -EINVAL;
243
244 for (i = index;
245 i < pile->num_entries && pile->list[i] == valid_id;
246 i++) {
247 pile->list[i] = 0;
248 count++;
249 }
250
251 if (count && index < pile->search_hint)
252 pile->search_hint = index;
253
254 return count;
255 }
256
257 /**
258 * i40e_find_vsi_from_id - searches for the vsi with the given id
259 * @pf - the pf structure to search for the vsi
260 * @id - id of the vsi it is searching for
261 **/
262 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
263 {
264 int i;
265
266 for (i = 0; i < pf->num_alloc_vsi; i++)
267 if (pf->vsi[i] && (pf->vsi[i]->id == id))
268 return pf->vsi[i];
269
270 return NULL;
271 }
272
273 /**
274 * i40e_service_event_schedule - Schedule the service task to wake up
275 * @pf: board private structure
276 *
277 * If not already scheduled, this puts the task into the work queue
278 **/
279 static void i40e_service_event_schedule(struct i40e_pf *pf)
280 {
281 if (!test_bit(__I40E_DOWN, &pf->state) &&
282 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
283 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
284 schedule_work(&pf->service_task);
285 }
286
287 /**
288 * i40e_tx_timeout - Respond to a Tx Hang
289 * @netdev: network interface device structure
290 *
291 * If any port has noticed a Tx timeout, it is likely that the whole
292 * device is munged, not just the one netdev port, so go for the full
293 * reset.
294 **/
295 #ifdef I40E_FCOE
296 void i40e_tx_timeout(struct net_device *netdev)
297 #else
298 static void i40e_tx_timeout(struct net_device *netdev)
299 #endif
300 {
301 struct i40e_netdev_priv *np = netdev_priv(netdev);
302 struct i40e_vsi *vsi = np->vsi;
303 struct i40e_pf *pf = vsi->back;
304 struct i40e_ring *tx_ring = NULL;
305 unsigned int i, hung_queue = 0;
306 u32 head, val;
307
308 pf->tx_timeout_count++;
309
310 /* find the stopped queue the same way the stack does */
311 for (i = 0; i < netdev->num_tx_queues; i++) {
312 struct netdev_queue *q;
313 unsigned long trans_start;
314
315 q = netdev_get_tx_queue(netdev, i);
316 trans_start = q->trans_start ? : netdev->trans_start;
317 if (netif_xmit_stopped(q) &&
318 time_after(jiffies,
319 (trans_start + netdev->watchdog_timeo))) {
320 hung_queue = i;
321 break;
322 }
323 }
324
325 if (i == netdev->num_tx_queues) {
326 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
327 } else {
328 /* now that we have an index, find the tx_ring struct */
329 for (i = 0; i < vsi->num_queue_pairs; i++) {
330 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
331 if (hung_queue ==
332 vsi->tx_rings[i]->queue_index) {
333 tx_ring = vsi->tx_rings[i];
334 break;
335 }
336 }
337 }
338 }
339
340 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
341 pf->tx_timeout_recovery_level = 1; /* reset after some time */
342 else if (time_before(jiffies,
343 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
344 return; /* don't do any new action before the next timeout */
345
346 if (tx_ring) {
347 head = i40e_get_head(tx_ring);
348 /* Read interrupt register */
349 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
350 val = rd32(&pf->hw,
351 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
352 tx_ring->vsi->base_vector - 1));
353 else
354 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
355
356 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
357 vsi->seid, hung_queue, tx_ring->next_to_clean,
358 head, tx_ring->next_to_use,
359 readl(tx_ring->tail), val);
360 }
361
362 pf->tx_timeout_last_recovery = jiffies;
363 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
364 pf->tx_timeout_recovery_level, hung_queue);
365
366 switch (pf->tx_timeout_recovery_level) {
367 case 1:
368 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
369 break;
370 case 2:
371 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
372 break;
373 case 3:
374 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
375 break;
376 default:
377 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
378 break;
379 }
380
381 i40e_service_event_schedule(pf);
382 pf->tx_timeout_recovery_level++;
383 }
384
385 /**
386 * i40e_release_rx_desc - Store the new tail and head values
387 * @rx_ring: ring to bump
388 * @val: new head index
389 **/
390 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
391 {
392 rx_ring->next_to_use = val;
393
394 /* Force memory writes to complete before letting h/w
395 * know there are new descriptors to fetch. (Only
396 * applicable for weak-ordered memory model archs,
397 * such as IA-64).
398 */
399 wmb();
400 writel(val, rx_ring->tail);
401 }
402
403 /**
404 * i40e_get_vsi_stats_struct - Get System Network Statistics
405 * @vsi: the VSI we care about
406 *
407 * Returns the address of the device statistics structure.
408 * The statistics are actually updated from the service task.
409 **/
410 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
411 {
412 return &vsi->net_stats;
413 }
414
415 /**
416 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
417 * @netdev: network interface device structure
418 *
419 * Returns the address of the device statistics structure.
420 * The statistics are actually updated from the service task.
421 **/
422 #ifdef I40E_FCOE
423 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
424 struct net_device *netdev,
425 struct rtnl_link_stats64 *stats)
426 #else
427 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
428 struct net_device *netdev,
429 struct rtnl_link_stats64 *stats)
430 #endif
431 {
432 struct i40e_netdev_priv *np = netdev_priv(netdev);
433 struct i40e_ring *tx_ring, *rx_ring;
434 struct i40e_vsi *vsi = np->vsi;
435 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
436 int i;
437
438 if (test_bit(__I40E_DOWN, &vsi->state))
439 return stats;
440
441 if (!vsi->tx_rings)
442 return stats;
443
444 rcu_read_lock();
445 for (i = 0; i < vsi->num_queue_pairs; i++) {
446 u64 bytes, packets;
447 unsigned int start;
448
449 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
450 if (!tx_ring)
451 continue;
452
453 do {
454 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
455 packets = tx_ring->stats.packets;
456 bytes = tx_ring->stats.bytes;
457 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
458
459 stats->tx_packets += packets;
460 stats->tx_bytes += bytes;
461 rx_ring = &tx_ring[1];
462
463 do {
464 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
465 packets = rx_ring->stats.packets;
466 bytes = rx_ring->stats.bytes;
467 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
468
469 stats->rx_packets += packets;
470 stats->rx_bytes += bytes;
471 }
472 rcu_read_unlock();
473
474 /* following stats updated by i40e_watchdog_subtask() */
475 stats->multicast = vsi_stats->multicast;
476 stats->tx_errors = vsi_stats->tx_errors;
477 stats->tx_dropped = vsi_stats->tx_dropped;
478 stats->rx_errors = vsi_stats->rx_errors;
479 stats->rx_dropped = vsi_stats->rx_dropped;
480 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
481 stats->rx_length_errors = vsi_stats->rx_length_errors;
482
483 return stats;
484 }
485
486 /**
487 * i40e_vsi_reset_stats - Resets all stats of the given vsi
488 * @vsi: the VSI to have its stats reset
489 **/
490 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
491 {
492 struct rtnl_link_stats64 *ns;
493 int i;
494
495 if (!vsi)
496 return;
497
498 ns = i40e_get_vsi_stats_struct(vsi);
499 memset(ns, 0, sizeof(*ns));
500 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
501 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
502 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
503 if (vsi->rx_rings && vsi->rx_rings[0]) {
504 for (i = 0; i < vsi->num_queue_pairs; i++) {
505 memset(&vsi->rx_rings[i]->stats, 0 ,
506 sizeof(vsi->rx_rings[i]->stats));
507 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
508 sizeof(vsi->rx_rings[i]->rx_stats));
509 memset(&vsi->tx_rings[i]->stats, 0 ,
510 sizeof(vsi->tx_rings[i]->stats));
511 memset(&vsi->tx_rings[i]->tx_stats, 0,
512 sizeof(vsi->tx_rings[i]->tx_stats));
513 }
514 }
515 vsi->stat_offsets_loaded = false;
516 }
517
518 /**
519 * i40e_pf_reset_stats - Reset all of the stats for the given PF
520 * @pf: the PF to be reset
521 **/
522 void i40e_pf_reset_stats(struct i40e_pf *pf)
523 {
524 int i;
525
526 memset(&pf->stats, 0, sizeof(pf->stats));
527 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
528 pf->stat_offsets_loaded = false;
529
530 for (i = 0; i < I40E_MAX_VEB; i++) {
531 if (pf->veb[i]) {
532 memset(&pf->veb[i]->stats, 0,
533 sizeof(pf->veb[i]->stats));
534 memset(&pf->veb[i]->stats_offsets, 0,
535 sizeof(pf->veb[i]->stats_offsets));
536 pf->veb[i]->stat_offsets_loaded = false;
537 }
538 }
539 }
540
541 /**
542 * i40e_stat_update48 - read and update a 48 bit stat from the chip
543 * @hw: ptr to the hardware info
544 * @hireg: the high 32 bit reg to read
545 * @loreg: the low 32 bit reg to read
546 * @offset_loaded: has the initial offset been loaded yet
547 * @offset: ptr to current offset value
548 * @stat: ptr to the stat
549 *
550 * Since the device stats are not reset at PFReset, they likely will not
551 * be zeroed when the driver starts. We'll save the first values read
552 * and use them as offsets to be subtracted from the raw values in order
553 * to report stats that count from zero. In the process, we also manage
554 * the potential roll-over.
555 **/
556 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
557 bool offset_loaded, u64 *offset, u64 *stat)
558 {
559 u64 new_data;
560
561 if (hw->device_id == I40E_DEV_ID_QEMU) {
562 new_data = rd32(hw, loreg);
563 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
564 } else {
565 new_data = rd64(hw, loreg);
566 }
567 if (!offset_loaded)
568 *offset = new_data;
569 if (likely(new_data >= *offset))
570 *stat = new_data - *offset;
571 else
572 *stat = (new_data + BIT_ULL(48)) - *offset;
573 *stat &= 0xFFFFFFFFFFFFULL;
574 }
575
576 /**
577 * i40e_stat_update32 - read and update a 32 bit stat from the chip
578 * @hw: ptr to the hardware info
579 * @reg: the hw reg to read
580 * @offset_loaded: has the initial offset been loaded yet
581 * @offset: ptr to current offset value
582 * @stat: ptr to the stat
583 **/
584 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
585 bool offset_loaded, u64 *offset, u64 *stat)
586 {
587 u32 new_data;
588
589 new_data = rd32(hw, reg);
590 if (!offset_loaded)
591 *offset = new_data;
592 if (likely(new_data >= *offset))
593 *stat = (u32)(new_data - *offset);
594 else
595 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
596 }
597
598 /**
599 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
600 * @vsi: the VSI to be updated
601 **/
602 void i40e_update_eth_stats(struct i40e_vsi *vsi)
603 {
604 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
605 struct i40e_pf *pf = vsi->back;
606 struct i40e_hw *hw = &pf->hw;
607 struct i40e_eth_stats *oes;
608 struct i40e_eth_stats *es; /* device's eth stats */
609
610 es = &vsi->eth_stats;
611 oes = &vsi->eth_stats_offsets;
612
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->tx_errors, &es->tx_errors);
617 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->rx_discards, &es->rx_discards);
620 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
623 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
624 vsi->stat_offsets_loaded,
625 &oes->tx_errors, &es->tx_errors);
626
627 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
628 I40E_GLV_GORCL(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->rx_bytes, &es->rx_bytes);
631 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
632 I40E_GLV_UPRCL(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->rx_unicast, &es->rx_unicast);
635 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
636 I40E_GLV_MPRCL(stat_idx),
637 vsi->stat_offsets_loaded,
638 &oes->rx_multicast, &es->rx_multicast);
639 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
640 I40E_GLV_BPRCL(stat_idx),
641 vsi->stat_offsets_loaded,
642 &oes->rx_broadcast, &es->rx_broadcast);
643
644 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
645 I40E_GLV_GOTCL(stat_idx),
646 vsi->stat_offsets_loaded,
647 &oes->tx_bytes, &es->tx_bytes);
648 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
649 I40E_GLV_UPTCL(stat_idx),
650 vsi->stat_offsets_loaded,
651 &oes->tx_unicast, &es->tx_unicast);
652 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
653 I40E_GLV_MPTCL(stat_idx),
654 vsi->stat_offsets_loaded,
655 &oes->tx_multicast, &es->tx_multicast);
656 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
657 I40E_GLV_BPTCL(stat_idx),
658 vsi->stat_offsets_loaded,
659 &oes->tx_broadcast, &es->tx_broadcast);
660 vsi->stat_offsets_loaded = true;
661 }
662
663 /**
664 * i40e_update_veb_stats - Update Switch component statistics
665 * @veb: the VEB being updated
666 **/
667 static void i40e_update_veb_stats(struct i40e_veb *veb)
668 {
669 struct i40e_pf *pf = veb->pf;
670 struct i40e_hw *hw = &pf->hw;
671 struct i40e_eth_stats *oes;
672 struct i40e_eth_stats *es; /* device's eth stats */
673 struct i40e_veb_tc_stats *veb_oes;
674 struct i40e_veb_tc_stats *veb_es;
675 int i, idx = 0;
676
677 idx = veb->stats_idx;
678 es = &veb->stats;
679 oes = &veb->stats_offsets;
680 veb_es = &veb->tc_stats;
681 veb_oes = &veb->tc_stats_offsets;
682
683 /* Gather up the stats that the hw collects */
684 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
685 veb->stat_offsets_loaded,
686 &oes->tx_discards, &es->tx_discards);
687 if (hw->revision_id > 0)
688 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
689 veb->stat_offsets_loaded,
690 &oes->rx_unknown_protocol,
691 &es->rx_unknown_protocol);
692 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->rx_bytes, &es->rx_bytes);
695 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_unicast, &es->rx_unicast);
698 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_multicast, &es->rx_multicast);
701 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->rx_broadcast, &es->rx_broadcast);
704
705 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->tx_bytes, &es->tx_bytes);
708 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_unicast, &es->tx_unicast);
711 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_multicast, &es->tx_multicast);
714 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
715 veb->stat_offsets_loaded,
716 &oes->tx_broadcast, &es->tx_broadcast);
717 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
718 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
719 I40E_GLVEBTC_RPCL(i, idx),
720 veb->stat_offsets_loaded,
721 &veb_oes->tc_rx_packets[i],
722 &veb_es->tc_rx_packets[i]);
723 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
724 I40E_GLVEBTC_RBCL(i, idx),
725 veb->stat_offsets_loaded,
726 &veb_oes->tc_rx_bytes[i],
727 &veb_es->tc_rx_bytes[i]);
728 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
729 I40E_GLVEBTC_TPCL(i, idx),
730 veb->stat_offsets_loaded,
731 &veb_oes->tc_tx_packets[i],
732 &veb_es->tc_tx_packets[i]);
733 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
734 I40E_GLVEBTC_TBCL(i, idx),
735 veb->stat_offsets_loaded,
736 &veb_oes->tc_tx_bytes[i],
737 &veb_es->tc_tx_bytes[i]);
738 }
739 veb->stat_offsets_loaded = true;
740 }
741
742 #ifdef I40E_FCOE
743 /**
744 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
745 * @vsi: the VSI that is capable of doing FCoE
746 **/
747 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
748 {
749 struct i40e_pf *pf = vsi->back;
750 struct i40e_hw *hw = &pf->hw;
751 struct i40e_fcoe_stats *ofs;
752 struct i40e_fcoe_stats *fs; /* device's eth stats */
753 int idx;
754
755 if (vsi->type != I40E_VSI_FCOE)
756 return;
757
758 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
759 fs = &vsi->fcoe_stats;
760 ofs = &vsi->fcoe_stats_offsets;
761
762 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
763 vsi->fcoe_stat_offsets_loaded,
764 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
765 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
768 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
771 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
774 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
777 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
780 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_last_error, &fs->fcoe_last_error);
783 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
784 vsi->fcoe_stat_offsets_loaded,
785 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
786
787 vsi->fcoe_stat_offsets_loaded = true;
788 }
789
790 #endif
791 /**
792 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
793 * @pf: the corresponding PF
794 *
795 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
796 **/
797 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
798 {
799 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
800 struct i40e_hw_port_stats *nsd = &pf->stats;
801 struct i40e_hw *hw = &pf->hw;
802 u64 xoff = 0;
803
804 if ((hw->fc.current_mode != I40E_FC_FULL) &&
805 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
806 return;
807
808 xoff = nsd->link_xoff_rx;
809 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
810 pf->stat_offsets_loaded,
811 &osd->link_xoff_rx, &nsd->link_xoff_rx);
812
813 /* No new LFC xoff rx */
814 if (!(nsd->link_xoff_rx - xoff))
815 return;
816
817 }
818
819 /**
820 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
821 * @pf: the corresponding PF
822 *
823 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
824 **/
825 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
826 {
827 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
828 struct i40e_hw_port_stats *nsd = &pf->stats;
829 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
830 struct i40e_dcbx_config *dcb_cfg;
831 struct i40e_hw *hw = &pf->hw;
832 u16 i;
833 u8 tc;
834
835 dcb_cfg = &hw->local_dcbx_config;
836
837 /* Collect Link XOFF stats when PFC is disabled */
838 if (!dcb_cfg->pfc.pfcenable) {
839 i40e_update_link_xoff_rx(pf);
840 return;
841 }
842
843 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
844 u64 prio_xoff = nsd->priority_xoff_rx[i];
845 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
846 pf->stat_offsets_loaded,
847 &osd->priority_xoff_rx[i],
848 &nsd->priority_xoff_rx[i]);
849
850 /* No new PFC xoff rx */
851 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
852 continue;
853 /* Get the TC for given priority */
854 tc = dcb_cfg->etscfg.prioritytable[i];
855 xoff[tc] = true;
856 }
857 }
858
859 /**
860 * i40e_update_vsi_stats - Update the vsi statistics counters.
861 * @vsi: the VSI to be updated
862 *
863 * There are a few instances where we store the same stat in a
864 * couple of different structs. This is partly because we have
865 * the netdev stats that need to be filled out, which is slightly
866 * different from the "eth_stats" defined by the chip and used in
867 * VF communications. We sort it out here.
868 **/
869 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
870 {
871 struct i40e_pf *pf = vsi->back;
872 struct rtnl_link_stats64 *ons;
873 struct rtnl_link_stats64 *ns; /* netdev stats */
874 struct i40e_eth_stats *oes;
875 struct i40e_eth_stats *es; /* device's eth stats */
876 u32 tx_restart, tx_busy;
877 struct i40e_ring *p;
878 u32 rx_page, rx_buf;
879 u64 bytes, packets;
880 unsigned int start;
881 u64 rx_p, rx_b;
882 u64 tx_p, tx_b;
883 u16 q;
884
885 if (test_bit(__I40E_DOWN, &vsi->state) ||
886 test_bit(__I40E_CONFIG_BUSY, &pf->state))
887 return;
888
889 ns = i40e_get_vsi_stats_struct(vsi);
890 ons = &vsi->net_stats_offsets;
891 es = &vsi->eth_stats;
892 oes = &vsi->eth_stats_offsets;
893
894 /* Gather up the netdev and vsi stats that the driver collects
895 * on the fly during packet processing
896 */
897 rx_b = rx_p = 0;
898 tx_b = tx_p = 0;
899 tx_restart = tx_busy = 0;
900 rx_page = 0;
901 rx_buf = 0;
902 rcu_read_lock();
903 for (q = 0; q < vsi->num_queue_pairs; q++) {
904 /* locate Tx ring */
905 p = ACCESS_ONCE(vsi->tx_rings[q]);
906
907 do {
908 start = u64_stats_fetch_begin_irq(&p->syncp);
909 packets = p->stats.packets;
910 bytes = p->stats.bytes;
911 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
912 tx_b += bytes;
913 tx_p += packets;
914 tx_restart += p->tx_stats.restart_queue;
915 tx_busy += p->tx_stats.tx_busy;
916
917 /* Rx queue is part of the same block as Tx queue */
918 p = &p[1];
919 do {
920 start = u64_stats_fetch_begin_irq(&p->syncp);
921 packets = p->stats.packets;
922 bytes = p->stats.bytes;
923 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
924 rx_b += bytes;
925 rx_p += packets;
926 rx_buf += p->rx_stats.alloc_buff_failed;
927 rx_page += p->rx_stats.alloc_page_failed;
928 }
929 rcu_read_unlock();
930 vsi->tx_restart = tx_restart;
931 vsi->tx_busy = tx_busy;
932 vsi->rx_page_failed = rx_page;
933 vsi->rx_buf_failed = rx_buf;
934
935 ns->rx_packets = rx_p;
936 ns->rx_bytes = rx_b;
937 ns->tx_packets = tx_p;
938 ns->tx_bytes = tx_b;
939
940 /* update netdev stats from eth stats */
941 i40e_update_eth_stats(vsi);
942 ons->tx_errors = oes->tx_errors;
943 ns->tx_errors = es->tx_errors;
944 ons->multicast = oes->rx_multicast;
945 ns->multicast = es->rx_multicast;
946 ons->rx_dropped = oes->rx_discards;
947 ns->rx_dropped = es->rx_discards;
948 ons->tx_dropped = oes->tx_discards;
949 ns->tx_dropped = es->tx_discards;
950
951 /* pull in a couple PF stats if this is the main vsi */
952 if (vsi == pf->vsi[pf->lan_vsi]) {
953 ns->rx_crc_errors = pf->stats.crc_errors;
954 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
955 ns->rx_length_errors = pf->stats.rx_length_errors;
956 }
957 }
958
959 /**
960 * i40e_update_pf_stats - Update the PF statistics counters.
961 * @pf: the PF to be updated
962 **/
963 static void i40e_update_pf_stats(struct i40e_pf *pf)
964 {
965 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
966 struct i40e_hw_port_stats *nsd = &pf->stats;
967 struct i40e_hw *hw = &pf->hw;
968 u32 val;
969 int i;
970
971 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
972 I40E_GLPRT_GORCL(hw->port),
973 pf->stat_offsets_loaded,
974 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
975 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
976 I40E_GLPRT_GOTCL(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
979 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->eth.rx_discards,
982 &nsd->eth.rx_discards);
983 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
984 I40E_GLPRT_UPRCL(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->eth.rx_unicast,
987 &nsd->eth.rx_unicast);
988 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
989 I40E_GLPRT_MPRCL(hw->port),
990 pf->stat_offsets_loaded,
991 &osd->eth.rx_multicast,
992 &nsd->eth.rx_multicast);
993 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
994 I40E_GLPRT_BPRCL(hw->port),
995 pf->stat_offsets_loaded,
996 &osd->eth.rx_broadcast,
997 &nsd->eth.rx_broadcast);
998 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
999 I40E_GLPRT_UPTCL(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->eth.tx_unicast,
1002 &nsd->eth.tx_unicast);
1003 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1004 I40E_GLPRT_MPTCL(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.tx_multicast,
1007 &nsd->eth.tx_multicast);
1008 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1009 I40E_GLPRT_BPTCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.tx_broadcast,
1012 &nsd->eth.tx_broadcast);
1013
1014 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->tx_dropped_link_down,
1017 &nsd->tx_dropped_link_down);
1018
1019 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->crc_errors, &nsd->crc_errors);
1022
1023 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->illegal_bytes, &nsd->illegal_bytes);
1026
1027 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->mac_local_faults,
1030 &nsd->mac_local_faults);
1031 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->mac_remote_faults,
1034 &nsd->mac_remote_faults);
1035
1036 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_length_errors,
1039 &nsd->rx_length_errors);
1040
1041 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->link_xon_rx, &nsd->link_xon_rx);
1044 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->link_xon_tx, &nsd->link_xon_tx);
1047 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1048 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1051
1052 for (i = 0; i < 8; i++) {
1053 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1054 pf->stat_offsets_loaded,
1055 &osd->priority_xon_rx[i],
1056 &nsd->priority_xon_rx[i]);
1057 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1058 pf->stat_offsets_loaded,
1059 &osd->priority_xon_tx[i],
1060 &nsd->priority_xon_tx[i]);
1061 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1062 pf->stat_offsets_loaded,
1063 &osd->priority_xoff_tx[i],
1064 &nsd->priority_xoff_tx[i]);
1065 i40e_stat_update32(hw,
1066 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1067 pf->stat_offsets_loaded,
1068 &osd->priority_xon_2_xoff[i],
1069 &nsd->priority_xon_2_xoff[i]);
1070 }
1071
1072 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1073 I40E_GLPRT_PRC64L(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->rx_size_64, &nsd->rx_size_64);
1076 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1077 I40E_GLPRT_PRC127L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_size_127, &nsd->rx_size_127);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1081 I40E_GLPRT_PRC255L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_255, &nsd->rx_size_255);
1084 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1085 I40E_GLPRT_PRC511L(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_size_511, &nsd->rx_size_511);
1088 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1089 I40E_GLPRT_PRC1023L(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_size_1023, &nsd->rx_size_1023);
1092 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1093 I40E_GLPRT_PRC1522L(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_size_1522, &nsd->rx_size_1522);
1096 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1097 I40E_GLPRT_PRC9522L(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_size_big, &nsd->rx_size_big);
1100
1101 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1102 I40E_GLPRT_PTC64L(hw->port),
1103 pf->stat_offsets_loaded,
1104 &osd->tx_size_64, &nsd->tx_size_64);
1105 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1106 I40E_GLPRT_PTC127L(hw->port),
1107 pf->stat_offsets_loaded,
1108 &osd->tx_size_127, &nsd->tx_size_127);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1110 I40E_GLPRT_PTC255L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_255, &nsd->tx_size_255);
1113 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1114 I40E_GLPRT_PTC511L(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->tx_size_511, &nsd->tx_size_511);
1117 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1118 I40E_GLPRT_PTC1023L(hw->port),
1119 pf->stat_offsets_loaded,
1120 &osd->tx_size_1023, &nsd->tx_size_1023);
1121 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1122 I40E_GLPRT_PTC1522L(hw->port),
1123 pf->stat_offsets_loaded,
1124 &osd->tx_size_1522, &nsd->tx_size_1522);
1125 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1126 I40E_GLPRT_PTC9522L(hw->port),
1127 pf->stat_offsets_loaded,
1128 &osd->tx_size_big, &nsd->tx_size_big);
1129
1130 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->rx_undersize, &nsd->rx_undersize);
1133 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->rx_fragments, &nsd->rx_fragments);
1136 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->rx_oversize, &nsd->rx_oversize);
1139 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1140 pf->stat_offsets_loaded,
1141 &osd->rx_jabber, &nsd->rx_jabber);
1142
1143 /* FDIR stats */
1144 i40e_stat_update32(hw,
1145 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1146 pf->stat_offsets_loaded,
1147 &osd->fd_atr_match, &nsd->fd_atr_match);
1148 i40e_stat_update32(hw,
1149 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1150 pf->stat_offsets_loaded,
1151 &osd->fd_sb_match, &nsd->fd_sb_match);
1152 i40e_stat_update32(hw,
1153 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1154 pf->stat_offsets_loaded,
1155 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1156
1157 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1158 nsd->tx_lpi_status =
1159 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1160 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1161 nsd->rx_lpi_status =
1162 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1163 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1164 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1165 pf->stat_offsets_loaded,
1166 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1167 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1168 pf->stat_offsets_loaded,
1169 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1170
1171 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1172 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1173 nsd->fd_sb_status = true;
1174 else
1175 nsd->fd_sb_status = false;
1176
1177 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1178 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1179 nsd->fd_atr_status = true;
1180 else
1181 nsd->fd_atr_status = false;
1182
1183 pf->stat_offsets_loaded = true;
1184 }
1185
1186 /**
1187 * i40e_update_stats - Update the various statistics counters.
1188 * @vsi: the VSI to be updated
1189 *
1190 * Update the various stats for this VSI and its related entities.
1191 **/
1192 void i40e_update_stats(struct i40e_vsi *vsi)
1193 {
1194 struct i40e_pf *pf = vsi->back;
1195
1196 if (vsi == pf->vsi[pf->lan_vsi])
1197 i40e_update_pf_stats(pf);
1198
1199 i40e_update_vsi_stats(vsi);
1200 #ifdef I40E_FCOE
1201 i40e_update_fcoe_stats(vsi);
1202 #endif
1203 }
1204
1205 /**
1206 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1207 * @vsi: the VSI to be searched
1208 * @macaddr: the MAC address
1209 * @vlan: the vlan
1210 * @is_vf: make sure its a VF filter, else doesn't matter
1211 * @is_netdev: make sure its a netdev filter, else doesn't matter
1212 *
1213 * Returns ptr to the filter object or NULL
1214 **/
1215 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1216 u8 *macaddr, s16 vlan,
1217 bool is_vf, bool is_netdev)
1218 {
1219 struct i40e_mac_filter *f;
1220
1221 if (!vsi || !macaddr)
1222 return NULL;
1223
1224 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1225 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1226 (vlan == f->vlan) &&
1227 (!is_vf || f->is_vf) &&
1228 (!is_netdev || f->is_netdev))
1229 return f;
1230 }
1231 return NULL;
1232 }
1233
1234 /**
1235 * i40e_find_mac - Find a mac addr in the macvlan filters list
1236 * @vsi: the VSI to be searched
1237 * @macaddr: the MAC address we are searching for
1238 * @is_vf: make sure its a VF filter, else doesn't matter
1239 * @is_netdev: make sure its a netdev filter, else doesn't matter
1240 *
1241 * Returns the first filter with the provided MAC address or NULL if
1242 * MAC address was not found
1243 **/
1244 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1245 bool is_vf, bool is_netdev)
1246 {
1247 struct i40e_mac_filter *f;
1248
1249 if (!vsi || !macaddr)
1250 return NULL;
1251
1252 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1253 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1254 (!is_vf || f->is_vf) &&
1255 (!is_netdev || f->is_netdev))
1256 return f;
1257 }
1258 return NULL;
1259 }
1260
1261 /**
1262 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1263 * @vsi: the VSI to be searched
1264 *
1265 * Returns true if VSI is in vlan mode or false otherwise
1266 **/
1267 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1268 {
1269 struct i40e_mac_filter *f;
1270
1271 /* Only -1 for all the filters denotes not in vlan mode
1272 * so we have to go through all the list in order to make sure
1273 */
1274 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1275 if (f->vlan >= 0 || vsi->info.pvid)
1276 return true;
1277 }
1278
1279 return false;
1280 }
1281
1282 /**
1283 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1284 * @vsi: the VSI to be searched
1285 * @macaddr: the mac address to be filtered
1286 * @is_vf: true if it is a VF
1287 * @is_netdev: true if it is a netdev
1288 *
1289 * Goes through all the macvlan filters and adds a
1290 * macvlan filter for each unique vlan that already exists
1291 *
1292 * Returns first filter found on success, else NULL
1293 **/
1294 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1295 bool is_vf, bool is_netdev)
1296 {
1297 struct i40e_mac_filter *f;
1298
1299 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1300 if (vsi->info.pvid)
1301 f->vlan = le16_to_cpu(vsi->info.pvid);
1302 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1303 is_vf, is_netdev)) {
1304 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1305 is_vf, is_netdev))
1306 return NULL;
1307 }
1308 }
1309
1310 return list_first_entry_or_null(&vsi->mac_filter_list,
1311 struct i40e_mac_filter, list);
1312 }
1313
1314 /**
1315 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1316 * @vsi: the PF Main VSI - inappropriate for any other VSI
1317 * @macaddr: the MAC address
1318 *
1319 * Some older firmware configurations set up a default promiscuous VLAN
1320 * filter that needs to be removed.
1321 **/
1322 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1323 {
1324 struct i40e_aqc_remove_macvlan_element_data element;
1325 struct i40e_pf *pf = vsi->back;
1326 i40e_status ret;
1327
1328 /* Only appropriate for the PF main VSI */
1329 if (vsi->type != I40E_VSI_MAIN)
1330 return -EINVAL;
1331
1332 memset(&element, 0, sizeof(element));
1333 ether_addr_copy(element.mac_addr, macaddr);
1334 element.vlan_tag = 0;
1335 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1336 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1337 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1338 if (ret)
1339 return -ENOENT;
1340
1341 return 0;
1342 }
1343
1344 /**
1345 * i40e_add_filter - Add a mac/vlan filter to the VSI
1346 * @vsi: the VSI to be searched
1347 * @macaddr: the MAC address
1348 * @vlan: the vlan
1349 * @is_vf: make sure its a VF filter, else doesn't matter
1350 * @is_netdev: make sure its a netdev filter, else doesn't matter
1351 *
1352 * Returns ptr to the filter object or NULL when no memory available.
1353 **/
1354 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1355 u8 *macaddr, s16 vlan,
1356 bool is_vf, bool is_netdev)
1357 {
1358 struct i40e_mac_filter *f;
1359
1360 if (!vsi || !macaddr)
1361 return NULL;
1362
1363 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1364 if (!f) {
1365 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1366 if (!f)
1367 goto add_filter_out;
1368
1369 ether_addr_copy(f->macaddr, macaddr);
1370 f->vlan = vlan;
1371 f->changed = true;
1372
1373 INIT_LIST_HEAD(&f->list);
1374 list_add(&f->list, &vsi->mac_filter_list);
1375 }
1376
1377 /* increment counter and add a new flag if needed */
1378 if (is_vf) {
1379 if (!f->is_vf) {
1380 f->is_vf = true;
1381 f->counter++;
1382 }
1383 } else if (is_netdev) {
1384 if (!f->is_netdev) {
1385 f->is_netdev = true;
1386 f->counter++;
1387 }
1388 } else {
1389 f->counter++;
1390 }
1391
1392 /* changed tells sync_filters_subtask to
1393 * push the filter down to the firmware
1394 */
1395 if (f->changed) {
1396 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1397 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1398 }
1399
1400 add_filter_out:
1401 return f;
1402 }
1403
1404 /**
1405 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1406 * @vsi: the VSI to be searched
1407 * @macaddr: the MAC address
1408 * @vlan: the vlan
1409 * @is_vf: make sure it's a VF filter, else doesn't matter
1410 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1411 **/
1412 void i40e_del_filter(struct i40e_vsi *vsi,
1413 u8 *macaddr, s16 vlan,
1414 bool is_vf, bool is_netdev)
1415 {
1416 struct i40e_mac_filter *f;
1417
1418 if (!vsi || !macaddr)
1419 return;
1420
1421 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1422 if (!f || f->counter == 0)
1423 return;
1424
1425 if (is_vf) {
1426 if (f->is_vf) {
1427 f->is_vf = false;
1428 f->counter--;
1429 }
1430 } else if (is_netdev) {
1431 if (f->is_netdev) {
1432 f->is_netdev = false;
1433 f->counter--;
1434 }
1435 } else {
1436 /* make sure we don't remove a filter in use by VF or netdev */
1437 int min_f = 0;
1438 min_f += (f->is_vf ? 1 : 0);
1439 min_f += (f->is_netdev ? 1 : 0);
1440
1441 if (f->counter > min_f)
1442 f->counter--;
1443 }
1444
1445 /* counter == 0 tells sync_filters_subtask to
1446 * remove the filter from the firmware's list
1447 */
1448 if (f->counter == 0) {
1449 f->changed = true;
1450 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1451 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1452 }
1453 }
1454
1455 /**
1456 * i40e_set_mac - NDO callback to set mac address
1457 * @netdev: network interface device structure
1458 * @p: pointer to an address structure
1459 *
1460 * Returns 0 on success, negative on failure
1461 **/
1462 #ifdef I40E_FCOE
1463 int i40e_set_mac(struct net_device *netdev, void *p)
1464 #else
1465 static int i40e_set_mac(struct net_device *netdev, void *p)
1466 #endif
1467 {
1468 struct i40e_netdev_priv *np = netdev_priv(netdev);
1469 struct i40e_vsi *vsi = np->vsi;
1470 struct i40e_pf *pf = vsi->back;
1471 struct i40e_hw *hw = &pf->hw;
1472 struct sockaddr *addr = p;
1473 struct i40e_mac_filter *f;
1474
1475 if (!is_valid_ether_addr(addr->sa_data))
1476 return -EADDRNOTAVAIL;
1477
1478 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1479 netdev_info(netdev, "already using mac address %pM\n",
1480 addr->sa_data);
1481 return 0;
1482 }
1483
1484 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1485 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1486 return -EADDRNOTAVAIL;
1487
1488 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1489 netdev_info(netdev, "returning to hw mac address %pM\n",
1490 hw->mac.addr);
1491 else
1492 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1493
1494 if (vsi->type == I40E_VSI_MAIN) {
1495 i40e_status ret;
1496 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1497 I40E_AQC_WRITE_TYPE_LAA_WOL,
1498 addr->sa_data, NULL);
1499 if (ret) {
1500 netdev_info(netdev,
1501 "Addr change for Main VSI failed: %d\n",
1502 ret);
1503 return -EADDRNOTAVAIL;
1504 }
1505 }
1506
1507 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1508 struct i40e_aqc_remove_macvlan_element_data element;
1509
1510 memset(&element, 0, sizeof(element));
1511 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1512 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1513 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1514 } else {
1515 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1516 false, false);
1517 }
1518
1519 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1520 struct i40e_aqc_add_macvlan_element_data element;
1521
1522 memset(&element, 0, sizeof(element));
1523 ether_addr_copy(element.mac_addr, hw->mac.addr);
1524 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1525 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1526 } else {
1527 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1528 false, false);
1529 if (f)
1530 f->is_laa = true;
1531 }
1532
1533 i40e_sync_vsi_filters(vsi, false);
1534 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1535
1536 return 0;
1537 }
1538
1539 /**
1540 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1541 * @vsi: the VSI being setup
1542 * @ctxt: VSI context structure
1543 * @enabled_tc: Enabled TCs bitmap
1544 * @is_add: True if called before Add VSI
1545 *
1546 * Setup VSI queue mapping for enabled traffic classes.
1547 **/
1548 #ifdef I40E_FCOE
1549 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1550 struct i40e_vsi_context *ctxt,
1551 u8 enabled_tc,
1552 bool is_add)
1553 #else
1554 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1555 struct i40e_vsi_context *ctxt,
1556 u8 enabled_tc,
1557 bool is_add)
1558 #endif
1559 {
1560 struct i40e_pf *pf = vsi->back;
1561 u16 sections = 0;
1562 u8 netdev_tc = 0;
1563 u16 numtc = 0;
1564 u16 qcount;
1565 u8 offset;
1566 u16 qmap;
1567 int i;
1568 u16 num_tc_qps = 0;
1569
1570 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1571 offset = 0;
1572
1573 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1574 /* Find numtc from enabled TC bitmap */
1575 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1576 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1577 numtc++;
1578 }
1579 if (!numtc) {
1580 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1581 numtc = 1;
1582 }
1583 } else {
1584 /* At least TC0 is enabled in case of non-DCB case */
1585 numtc = 1;
1586 }
1587
1588 vsi->tc_config.numtc = numtc;
1589 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1590 /* Number of queues per enabled TC */
1591 /* In MFP case we can have a much lower count of MSIx
1592 * vectors available and so we need to lower the used
1593 * q count.
1594 */
1595 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1596 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1597 else
1598 qcount = vsi->alloc_queue_pairs;
1599 num_tc_qps = qcount / numtc;
1600 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1601
1602 /* Setup queue offset/count for all TCs for given VSI */
1603 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1604 /* See if the given TC is enabled for the given VSI */
1605 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1606 /* TC is enabled */
1607 int pow, num_qps;
1608
1609 switch (vsi->type) {
1610 case I40E_VSI_MAIN:
1611 qcount = min_t(int, pf->rss_size, num_tc_qps);
1612 break;
1613 #ifdef I40E_FCOE
1614 case I40E_VSI_FCOE:
1615 qcount = num_tc_qps;
1616 break;
1617 #endif
1618 case I40E_VSI_FDIR:
1619 case I40E_VSI_SRIOV:
1620 case I40E_VSI_VMDQ2:
1621 default:
1622 qcount = num_tc_qps;
1623 WARN_ON(i != 0);
1624 break;
1625 }
1626 vsi->tc_config.tc_info[i].qoffset = offset;
1627 vsi->tc_config.tc_info[i].qcount = qcount;
1628
1629 /* find the next higher power-of-2 of num queue pairs */
1630 num_qps = qcount;
1631 pow = 0;
1632 while (num_qps && (BIT_ULL(pow) < qcount)) {
1633 pow++;
1634 num_qps >>= 1;
1635 }
1636
1637 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1638 qmap =
1639 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1640 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1641
1642 offset += qcount;
1643 } else {
1644 /* TC is not enabled so set the offset to
1645 * default queue and allocate one queue
1646 * for the given TC.
1647 */
1648 vsi->tc_config.tc_info[i].qoffset = 0;
1649 vsi->tc_config.tc_info[i].qcount = 1;
1650 vsi->tc_config.tc_info[i].netdev_tc = 0;
1651
1652 qmap = 0;
1653 }
1654 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1655 }
1656
1657 /* Set actual Tx/Rx queue pairs */
1658 vsi->num_queue_pairs = offset;
1659 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1660 if (vsi->req_queue_pairs > 0)
1661 vsi->num_queue_pairs = vsi->req_queue_pairs;
1662 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1663 vsi->num_queue_pairs = pf->num_lan_msix;
1664 }
1665
1666 /* Scheduler section valid can only be set for ADD VSI */
1667 if (is_add) {
1668 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1669
1670 ctxt->info.up_enable_bits = enabled_tc;
1671 }
1672 if (vsi->type == I40E_VSI_SRIOV) {
1673 ctxt->info.mapping_flags |=
1674 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1675 for (i = 0; i < vsi->num_queue_pairs; i++)
1676 ctxt->info.queue_mapping[i] =
1677 cpu_to_le16(vsi->base_queue + i);
1678 } else {
1679 ctxt->info.mapping_flags |=
1680 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1681 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1682 }
1683 ctxt->info.valid_sections |= cpu_to_le16(sections);
1684 }
1685
1686 /**
1687 * i40e_set_rx_mode - NDO callback to set the netdev filters
1688 * @netdev: network interface device structure
1689 **/
1690 #ifdef I40E_FCOE
1691 void i40e_set_rx_mode(struct net_device *netdev)
1692 #else
1693 static void i40e_set_rx_mode(struct net_device *netdev)
1694 #endif
1695 {
1696 struct i40e_netdev_priv *np = netdev_priv(netdev);
1697 struct i40e_mac_filter *f, *ftmp;
1698 struct i40e_vsi *vsi = np->vsi;
1699 struct netdev_hw_addr *uca;
1700 struct netdev_hw_addr *mca;
1701 struct netdev_hw_addr *ha;
1702
1703 /* add addr if not already in the filter list */
1704 netdev_for_each_uc_addr(uca, netdev) {
1705 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1706 if (i40e_is_vsi_in_vlan(vsi))
1707 i40e_put_mac_in_vlan(vsi, uca->addr,
1708 false, true);
1709 else
1710 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1711 false, true);
1712 }
1713 }
1714
1715 netdev_for_each_mc_addr(mca, netdev) {
1716 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1717 if (i40e_is_vsi_in_vlan(vsi))
1718 i40e_put_mac_in_vlan(vsi, mca->addr,
1719 false, true);
1720 else
1721 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1722 false, true);
1723 }
1724 }
1725
1726 /* remove filter if not in netdev list */
1727 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1728 bool found = false;
1729
1730 if (!f->is_netdev)
1731 continue;
1732
1733 if (is_multicast_ether_addr(f->macaddr)) {
1734 netdev_for_each_mc_addr(mca, netdev) {
1735 if (ether_addr_equal(mca->addr, f->macaddr)) {
1736 found = true;
1737 break;
1738 }
1739 }
1740 } else {
1741 netdev_for_each_uc_addr(uca, netdev) {
1742 if (ether_addr_equal(uca->addr, f->macaddr)) {
1743 found = true;
1744 break;
1745 }
1746 }
1747
1748 for_each_dev_addr(netdev, ha) {
1749 if (ether_addr_equal(ha->addr, f->macaddr)) {
1750 found = true;
1751 break;
1752 }
1753 }
1754 }
1755 if (!found)
1756 i40e_del_filter(
1757 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1758 }
1759
1760 /* check for other flag changes */
1761 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1762 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1763 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1764 }
1765 }
1766
1767 /**
1768 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1769 * @vsi: ptr to the VSI
1770 * @grab_rtnl: whether RTNL needs to be grabbed
1771 *
1772 * Push any outstanding VSI filter changes through the AdminQ.
1773 *
1774 * Returns 0 or error value
1775 **/
1776 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1777 {
1778 struct i40e_mac_filter *f, *ftmp;
1779 bool promisc_forced_on = false;
1780 bool add_happened = false;
1781 int filter_list_len = 0;
1782 u32 changed_flags = 0;
1783 i40e_status ret = 0;
1784 struct i40e_pf *pf;
1785 int num_add = 0;
1786 int num_del = 0;
1787 int aq_err = 0;
1788 u16 cmd_flags;
1789
1790 /* empty array typed pointers, kcalloc later */
1791 struct i40e_aqc_add_macvlan_element_data *add_list;
1792 struct i40e_aqc_remove_macvlan_element_data *del_list;
1793
1794 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1795 usleep_range(1000, 2000);
1796 pf = vsi->back;
1797
1798 if (vsi->netdev) {
1799 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1800 vsi->current_netdev_flags = vsi->netdev->flags;
1801 }
1802
1803 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1804 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1805
1806 filter_list_len = pf->hw.aq.asq_buf_size /
1807 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1808 del_list = kcalloc(filter_list_len,
1809 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1810 GFP_KERNEL);
1811 if (!del_list)
1812 return -ENOMEM;
1813
1814 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1815 if (!f->changed)
1816 continue;
1817
1818 if (f->counter != 0)
1819 continue;
1820 f->changed = false;
1821 cmd_flags = 0;
1822
1823 /* add to delete list */
1824 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1825 del_list[num_del].vlan_tag =
1826 cpu_to_le16((u16)(f->vlan ==
1827 I40E_VLAN_ANY ? 0 : f->vlan));
1828
1829 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1830 del_list[num_del].flags = cmd_flags;
1831 num_del++;
1832
1833 /* unlink from filter list */
1834 list_del(&f->list);
1835 kfree(f);
1836
1837 /* flush a full buffer */
1838 if (num_del == filter_list_len) {
1839 ret = i40e_aq_remove_macvlan(&pf->hw,
1840 vsi->seid, del_list, num_del,
1841 NULL);
1842 aq_err = pf->hw.aq.asq_last_status;
1843 num_del = 0;
1844 memset(del_list, 0, sizeof(*del_list));
1845
1846 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1847 dev_info(&pf->pdev->dev,
1848 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1849 i40e_stat_str(&pf->hw, ret),
1850 i40e_aq_str(&pf->hw, aq_err));
1851 }
1852 }
1853 if (num_del) {
1854 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1855 del_list, num_del, NULL);
1856 aq_err = pf->hw.aq.asq_last_status;
1857 num_del = 0;
1858
1859 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1860 dev_info(&pf->pdev->dev,
1861 "ignoring delete macvlan error, err %s aq_err %s\n",
1862 i40e_stat_str(&pf->hw, ret),
1863 i40e_aq_str(&pf->hw, aq_err));
1864 }
1865
1866 kfree(del_list);
1867 del_list = NULL;
1868
1869 /* do all the adds now */
1870 filter_list_len = pf->hw.aq.asq_buf_size /
1871 sizeof(struct i40e_aqc_add_macvlan_element_data),
1872 add_list = kcalloc(filter_list_len,
1873 sizeof(struct i40e_aqc_add_macvlan_element_data),
1874 GFP_KERNEL);
1875 if (!add_list)
1876 return -ENOMEM;
1877
1878 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1879 if (!f->changed)
1880 continue;
1881
1882 if (f->counter == 0)
1883 continue;
1884 f->changed = false;
1885 add_happened = true;
1886 cmd_flags = 0;
1887
1888 /* add to add array */
1889 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1890 add_list[num_add].vlan_tag =
1891 cpu_to_le16(
1892 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1893 add_list[num_add].queue_number = 0;
1894
1895 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1896 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1897 num_add++;
1898
1899 /* flush a full buffer */
1900 if (num_add == filter_list_len) {
1901 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1902 add_list, num_add,
1903 NULL);
1904 aq_err = pf->hw.aq.asq_last_status;
1905 num_add = 0;
1906
1907 if (ret)
1908 break;
1909 memset(add_list, 0, sizeof(*add_list));
1910 }
1911 }
1912 if (num_add) {
1913 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1914 add_list, num_add, NULL);
1915 aq_err = pf->hw.aq.asq_last_status;
1916 num_add = 0;
1917 }
1918 kfree(add_list);
1919 add_list = NULL;
1920
1921 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1922 dev_info(&pf->pdev->dev,
1923 "add filter failed, err %s aq_err %s\n",
1924 i40e_stat_str(&pf->hw, ret),
1925 i40e_aq_str(&pf->hw, aq_err));
1926 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1927 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1928 &vsi->state)) {
1929 promisc_forced_on = true;
1930 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1931 &vsi->state);
1932 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1933 }
1934 }
1935 }
1936
1937 /* check for changes in promiscuous modes */
1938 if (changed_flags & IFF_ALLMULTI) {
1939 bool cur_multipromisc;
1940 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1941 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1942 vsi->seid,
1943 cur_multipromisc,
1944 NULL);
1945 if (ret)
1946 dev_info(&pf->pdev->dev,
1947 "set multi promisc failed, err %s aq_err %s\n",
1948 i40e_stat_str(&pf->hw, ret),
1949 i40e_aq_str(&pf->hw,
1950 pf->hw.aq.asq_last_status));
1951 }
1952 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1953 bool cur_promisc;
1954 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1955 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1956 &vsi->state));
1957 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1958 /* set defport ON for Main VSI instead of true promisc
1959 * this way we will get all unicast/multicast and VLAN
1960 * promisc behavior but will not get VF or VMDq traffic
1961 * replicated on the Main VSI.
1962 */
1963 if (pf->cur_promisc != cur_promisc) {
1964 pf->cur_promisc = cur_promisc;
1965 if (grab_rtnl)
1966 i40e_do_reset_safe(pf,
1967 BIT(__I40E_PF_RESET_REQUESTED));
1968 else
1969 i40e_do_reset(pf,
1970 BIT(__I40E_PF_RESET_REQUESTED));
1971 }
1972 } else {
1973 ret = i40e_aq_set_vsi_unicast_promiscuous(
1974 &vsi->back->hw,
1975 vsi->seid,
1976 cur_promisc, NULL);
1977 if (ret)
1978 dev_info(&pf->pdev->dev,
1979 "set unicast promisc failed, err %d, aq_err %d\n",
1980 ret, pf->hw.aq.asq_last_status);
1981 ret = i40e_aq_set_vsi_multicast_promiscuous(
1982 &vsi->back->hw,
1983 vsi->seid,
1984 cur_promisc, NULL);
1985 if (ret)
1986 dev_info(&pf->pdev->dev,
1987 "set multicast promisc failed, err %d, aq_err %d\n",
1988 ret, pf->hw.aq.asq_last_status);
1989 }
1990 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1991 vsi->seid,
1992 cur_promisc, NULL);
1993 if (ret)
1994 dev_info(&pf->pdev->dev,
1995 "set brdcast promisc failed, err %s, aq_err %s\n",
1996 i40e_stat_str(&pf->hw, ret),
1997 i40e_aq_str(&pf->hw,
1998 pf->hw.aq.asq_last_status));
1999 }
2000
2001 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2002 return 0;
2003 }
2004
2005 /**
2006 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2007 * @pf: board private structure
2008 **/
2009 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2010 {
2011 int v;
2012
2013 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2014 return;
2015 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2016
2017 for (v = 0; v < pf->num_alloc_vsi; v++) {
2018 if (pf->vsi[v] &&
2019 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2020 i40e_sync_vsi_filters(pf->vsi[v], true);
2021 }
2022 }
2023
2024 /**
2025 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2026 * @netdev: network interface device structure
2027 * @new_mtu: new value for maximum frame size
2028 *
2029 * Returns 0 on success, negative on failure
2030 **/
2031 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2032 {
2033 struct i40e_netdev_priv *np = netdev_priv(netdev);
2034 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2035 struct i40e_vsi *vsi = np->vsi;
2036
2037 /* MTU < 68 is an error and causes problems on some kernels */
2038 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2039 return -EINVAL;
2040
2041 netdev_info(netdev, "changing MTU from %d to %d\n",
2042 netdev->mtu, new_mtu);
2043 netdev->mtu = new_mtu;
2044 if (netif_running(netdev))
2045 i40e_vsi_reinit_locked(vsi);
2046
2047 return 0;
2048 }
2049
2050 /**
2051 * i40e_ioctl - Access the hwtstamp interface
2052 * @netdev: network interface device structure
2053 * @ifr: interface request data
2054 * @cmd: ioctl command
2055 **/
2056 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2057 {
2058 struct i40e_netdev_priv *np = netdev_priv(netdev);
2059 struct i40e_pf *pf = np->vsi->back;
2060
2061 switch (cmd) {
2062 case SIOCGHWTSTAMP:
2063 return i40e_ptp_get_ts_config(pf, ifr);
2064 case SIOCSHWTSTAMP:
2065 return i40e_ptp_set_ts_config(pf, ifr);
2066 default:
2067 return -EOPNOTSUPP;
2068 }
2069 }
2070
2071 /**
2072 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2073 * @vsi: the vsi being adjusted
2074 **/
2075 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2076 {
2077 struct i40e_vsi_context ctxt;
2078 i40e_status ret;
2079
2080 if ((vsi->info.valid_sections &
2081 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2082 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2083 return; /* already enabled */
2084
2085 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2086 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2087 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2088
2089 ctxt.seid = vsi->seid;
2090 ctxt.info = vsi->info;
2091 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2092 if (ret) {
2093 dev_info(&vsi->back->pdev->dev,
2094 "update vlan stripping failed, err %s aq_err %s\n",
2095 i40e_stat_str(&vsi->back->hw, ret),
2096 i40e_aq_str(&vsi->back->hw,
2097 vsi->back->hw.aq.asq_last_status));
2098 }
2099 }
2100
2101 /**
2102 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2103 * @vsi: the vsi being adjusted
2104 **/
2105 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2106 {
2107 struct i40e_vsi_context ctxt;
2108 i40e_status ret;
2109
2110 if ((vsi->info.valid_sections &
2111 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2112 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2113 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2114 return; /* already disabled */
2115
2116 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2117 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2118 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2119
2120 ctxt.seid = vsi->seid;
2121 ctxt.info = vsi->info;
2122 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2123 if (ret) {
2124 dev_info(&vsi->back->pdev->dev,
2125 "update vlan stripping failed, err %s aq_err %s\n",
2126 i40e_stat_str(&vsi->back->hw, ret),
2127 i40e_aq_str(&vsi->back->hw,
2128 vsi->back->hw.aq.asq_last_status));
2129 }
2130 }
2131
2132 /**
2133 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2134 * @netdev: network interface to be adjusted
2135 * @features: netdev features to test if VLAN offload is enabled or not
2136 **/
2137 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2138 {
2139 struct i40e_netdev_priv *np = netdev_priv(netdev);
2140 struct i40e_vsi *vsi = np->vsi;
2141
2142 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2143 i40e_vlan_stripping_enable(vsi);
2144 else
2145 i40e_vlan_stripping_disable(vsi);
2146 }
2147
2148 /**
2149 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2150 * @vsi: the vsi being configured
2151 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2152 **/
2153 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2154 {
2155 struct i40e_mac_filter *f, *add_f;
2156 bool is_netdev, is_vf;
2157
2158 is_vf = (vsi->type == I40E_VSI_SRIOV);
2159 is_netdev = !!(vsi->netdev);
2160
2161 if (is_netdev) {
2162 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2163 is_vf, is_netdev);
2164 if (!add_f) {
2165 dev_info(&vsi->back->pdev->dev,
2166 "Could not add vlan filter %d for %pM\n",
2167 vid, vsi->netdev->dev_addr);
2168 return -ENOMEM;
2169 }
2170 }
2171
2172 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2173 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2174 if (!add_f) {
2175 dev_info(&vsi->back->pdev->dev,
2176 "Could not add vlan filter %d for %pM\n",
2177 vid, f->macaddr);
2178 return -ENOMEM;
2179 }
2180 }
2181
2182 /* Now if we add a vlan tag, make sure to check if it is the first
2183 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2184 * with 0, so we now accept untagged and specified tagged traffic
2185 * (and not any taged and untagged)
2186 */
2187 if (vid > 0) {
2188 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2189 I40E_VLAN_ANY,
2190 is_vf, is_netdev)) {
2191 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2192 I40E_VLAN_ANY, is_vf, is_netdev);
2193 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2194 is_vf, is_netdev);
2195 if (!add_f) {
2196 dev_info(&vsi->back->pdev->dev,
2197 "Could not add filter 0 for %pM\n",
2198 vsi->netdev->dev_addr);
2199 return -ENOMEM;
2200 }
2201 }
2202 }
2203
2204 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2205 if (vid > 0 && !vsi->info.pvid) {
2206 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2207 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2208 is_vf, is_netdev)) {
2209 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2210 is_vf, is_netdev);
2211 add_f = i40e_add_filter(vsi, f->macaddr,
2212 0, is_vf, is_netdev);
2213 if (!add_f) {
2214 dev_info(&vsi->back->pdev->dev,
2215 "Could not add filter 0 for %pM\n",
2216 f->macaddr);
2217 return -ENOMEM;
2218 }
2219 }
2220 }
2221 }
2222
2223 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2224 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2225 return 0;
2226
2227 return i40e_sync_vsi_filters(vsi, false);
2228 }
2229
2230 /**
2231 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2232 * @vsi: the vsi being configured
2233 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2234 *
2235 * Return: 0 on success or negative otherwise
2236 **/
2237 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2238 {
2239 struct net_device *netdev = vsi->netdev;
2240 struct i40e_mac_filter *f, *add_f;
2241 bool is_vf, is_netdev;
2242 int filter_count = 0;
2243
2244 is_vf = (vsi->type == I40E_VSI_SRIOV);
2245 is_netdev = !!(netdev);
2246
2247 if (is_netdev)
2248 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2249
2250 list_for_each_entry(f, &vsi->mac_filter_list, list)
2251 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2252
2253 /* go through all the filters for this VSI and if there is only
2254 * vid == 0 it means there are no other filters, so vid 0 must
2255 * be replaced with -1. This signifies that we should from now
2256 * on accept any traffic (with any tag present, or untagged)
2257 */
2258 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2259 if (is_netdev) {
2260 if (f->vlan &&
2261 ether_addr_equal(netdev->dev_addr, f->macaddr))
2262 filter_count++;
2263 }
2264
2265 if (f->vlan)
2266 filter_count++;
2267 }
2268
2269 if (!filter_count && is_netdev) {
2270 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2271 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2272 is_vf, is_netdev);
2273 if (!f) {
2274 dev_info(&vsi->back->pdev->dev,
2275 "Could not add filter %d for %pM\n",
2276 I40E_VLAN_ANY, netdev->dev_addr);
2277 return -ENOMEM;
2278 }
2279 }
2280
2281 if (!filter_count) {
2282 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2283 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2284 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2285 is_vf, is_netdev);
2286 if (!add_f) {
2287 dev_info(&vsi->back->pdev->dev,
2288 "Could not add filter %d for %pM\n",
2289 I40E_VLAN_ANY, f->macaddr);
2290 return -ENOMEM;
2291 }
2292 }
2293 }
2294
2295 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2296 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2297 return 0;
2298
2299 return i40e_sync_vsi_filters(vsi, false);
2300 }
2301
2302 /**
2303 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2304 * @netdev: network interface to be adjusted
2305 * @vid: vlan id to be added
2306 *
2307 * net_device_ops implementation for adding vlan ids
2308 **/
2309 #ifdef I40E_FCOE
2310 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2311 __always_unused __be16 proto, u16 vid)
2312 #else
2313 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2314 __always_unused __be16 proto, u16 vid)
2315 #endif
2316 {
2317 struct i40e_netdev_priv *np = netdev_priv(netdev);
2318 struct i40e_vsi *vsi = np->vsi;
2319 int ret = 0;
2320
2321 if (vid > 4095)
2322 return -EINVAL;
2323
2324 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2325
2326 /* If the network stack called us with vid = 0 then
2327 * it is asking to receive priority tagged packets with
2328 * vlan id 0. Our HW receives them by default when configured
2329 * to receive untagged packets so there is no need to add an
2330 * extra filter for vlan 0 tagged packets.
2331 */
2332 if (vid)
2333 ret = i40e_vsi_add_vlan(vsi, vid);
2334
2335 if (!ret && (vid < VLAN_N_VID))
2336 set_bit(vid, vsi->active_vlans);
2337
2338 return ret;
2339 }
2340
2341 /**
2342 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2343 * @netdev: network interface to be adjusted
2344 * @vid: vlan id to be removed
2345 *
2346 * net_device_ops implementation for removing vlan ids
2347 **/
2348 #ifdef I40E_FCOE
2349 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2350 __always_unused __be16 proto, u16 vid)
2351 #else
2352 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2353 __always_unused __be16 proto, u16 vid)
2354 #endif
2355 {
2356 struct i40e_netdev_priv *np = netdev_priv(netdev);
2357 struct i40e_vsi *vsi = np->vsi;
2358
2359 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2360
2361 /* return code is ignored as there is nothing a user
2362 * can do about failure to remove and a log message was
2363 * already printed from the other function
2364 */
2365 i40e_vsi_kill_vlan(vsi, vid);
2366
2367 clear_bit(vid, vsi->active_vlans);
2368
2369 return 0;
2370 }
2371
2372 /**
2373 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2374 * @vsi: the vsi being brought back up
2375 **/
2376 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2377 {
2378 u16 vid;
2379
2380 if (!vsi->netdev)
2381 return;
2382
2383 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2384
2385 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2386 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2387 vid);
2388 }
2389
2390 /**
2391 * i40e_vsi_add_pvid - Add pvid for the VSI
2392 * @vsi: the vsi being adjusted
2393 * @vid: the vlan id to set as a PVID
2394 **/
2395 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2396 {
2397 struct i40e_vsi_context ctxt;
2398 i40e_status ret;
2399
2400 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2401 vsi->info.pvid = cpu_to_le16(vid);
2402 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2403 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2404 I40E_AQ_VSI_PVLAN_EMOD_STR;
2405
2406 ctxt.seid = vsi->seid;
2407 ctxt.info = vsi->info;
2408 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2409 if (ret) {
2410 dev_info(&vsi->back->pdev->dev,
2411 "add pvid failed, err %s aq_err %s\n",
2412 i40e_stat_str(&vsi->back->hw, ret),
2413 i40e_aq_str(&vsi->back->hw,
2414 vsi->back->hw.aq.asq_last_status));
2415 return -ENOENT;
2416 }
2417
2418 return 0;
2419 }
2420
2421 /**
2422 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2423 * @vsi: the vsi being adjusted
2424 *
2425 * Just use the vlan_rx_register() service to put it back to normal
2426 **/
2427 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2428 {
2429 i40e_vlan_stripping_disable(vsi);
2430
2431 vsi->info.pvid = 0;
2432 }
2433
2434 /**
2435 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2436 * @vsi: ptr to the VSI
2437 *
2438 * If this function returns with an error, then it's possible one or
2439 * more of the rings is populated (while the rest are not). It is the
2440 * callers duty to clean those orphaned rings.
2441 *
2442 * Return 0 on success, negative on failure
2443 **/
2444 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2445 {
2446 int i, err = 0;
2447
2448 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2449 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2450
2451 return err;
2452 }
2453
2454 /**
2455 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2456 * @vsi: ptr to the VSI
2457 *
2458 * Free VSI's transmit software resources
2459 **/
2460 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2461 {
2462 int i;
2463
2464 if (!vsi->tx_rings)
2465 return;
2466
2467 for (i = 0; i < vsi->num_queue_pairs; i++)
2468 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2469 i40e_free_tx_resources(vsi->tx_rings[i]);
2470 }
2471
2472 /**
2473 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2474 * @vsi: ptr to the VSI
2475 *
2476 * If this function returns with an error, then it's possible one or
2477 * more of the rings is populated (while the rest are not). It is the
2478 * callers duty to clean those orphaned rings.
2479 *
2480 * Return 0 on success, negative on failure
2481 **/
2482 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2483 {
2484 int i, err = 0;
2485
2486 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2487 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2488 #ifdef I40E_FCOE
2489 i40e_fcoe_setup_ddp_resources(vsi);
2490 #endif
2491 return err;
2492 }
2493
2494 /**
2495 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2496 * @vsi: ptr to the VSI
2497 *
2498 * Free all receive software resources
2499 **/
2500 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2501 {
2502 int i;
2503
2504 if (!vsi->rx_rings)
2505 return;
2506
2507 for (i = 0; i < vsi->num_queue_pairs; i++)
2508 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2509 i40e_free_rx_resources(vsi->rx_rings[i]);
2510 #ifdef I40E_FCOE
2511 i40e_fcoe_free_ddp_resources(vsi);
2512 #endif
2513 }
2514
2515 /**
2516 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2517 * @ring: The Tx ring to configure
2518 *
2519 * This enables/disables XPS for a given Tx descriptor ring
2520 * based on the TCs enabled for the VSI that ring belongs to.
2521 **/
2522 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2523 {
2524 struct i40e_vsi *vsi = ring->vsi;
2525 cpumask_var_t mask;
2526
2527 if (!ring->q_vector || !ring->netdev)
2528 return;
2529
2530 /* Single TC mode enable XPS */
2531 if (vsi->tc_config.numtc <= 1) {
2532 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2533 netif_set_xps_queue(ring->netdev,
2534 &ring->q_vector->affinity_mask,
2535 ring->queue_index);
2536 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2537 /* Disable XPS to allow selection based on TC */
2538 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2539 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2540 free_cpumask_var(mask);
2541 }
2542 }
2543
2544 /**
2545 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2546 * @ring: The Tx ring to configure
2547 *
2548 * Configure the Tx descriptor ring in the HMC context.
2549 **/
2550 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2551 {
2552 struct i40e_vsi *vsi = ring->vsi;
2553 u16 pf_q = vsi->base_queue + ring->queue_index;
2554 struct i40e_hw *hw = &vsi->back->hw;
2555 struct i40e_hmc_obj_txq tx_ctx;
2556 i40e_status err = 0;
2557 u32 qtx_ctl = 0;
2558
2559 /* some ATR related tx ring init */
2560 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2561 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2562 ring->atr_count = 0;
2563 } else {
2564 ring->atr_sample_rate = 0;
2565 }
2566
2567 /* configure XPS */
2568 i40e_config_xps_tx_ring(ring);
2569
2570 /* clear the context structure first */
2571 memset(&tx_ctx, 0, sizeof(tx_ctx));
2572
2573 tx_ctx.new_context = 1;
2574 tx_ctx.base = (ring->dma / 128);
2575 tx_ctx.qlen = ring->count;
2576 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2577 I40E_FLAG_FD_ATR_ENABLED));
2578 #ifdef I40E_FCOE
2579 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2580 #endif
2581 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2582 /* FDIR VSI tx ring can still use RS bit and writebacks */
2583 if (vsi->type != I40E_VSI_FDIR)
2584 tx_ctx.head_wb_ena = 1;
2585 tx_ctx.head_wb_addr = ring->dma +
2586 (ring->count * sizeof(struct i40e_tx_desc));
2587
2588 /* As part of VSI creation/update, FW allocates certain
2589 * Tx arbitration queue sets for each TC enabled for
2590 * the VSI. The FW returns the handles to these queue
2591 * sets as part of the response buffer to Add VSI,
2592 * Update VSI, etc. AQ commands. It is expected that
2593 * these queue set handles be associated with the Tx
2594 * queues by the driver as part of the TX queue context
2595 * initialization. This has to be done regardless of
2596 * DCB as by default everything is mapped to TC0.
2597 */
2598 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2599 tx_ctx.rdylist_act = 0;
2600
2601 /* clear the context in the HMC */
2602 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2603 if (err) {
2604 dev_info(&vsi->back->pdev->dev,
2605 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2606 ring->queue_index, pf_q, err);
2607 return -ENOMEM;
2608 }
2609
2610 /* set the context in the HMC */
2611 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2612 if (err) {
2613 dev_info(&vsi->back->pdev->dev,
2614 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2615 ring->queue_index, pf_q, err);
2616 return -ENOMEM;
2617 }
2618
2619 /* Now associate this queue with this PCI function */
2620 if (vsi->type == I40E_VSI_VMDQ2) {
2621 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2622 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2623 I40E_QTX_CTL_VFVM_INDX_MASK;
2624 } else {
2625 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2626 }
2627
2628 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2629 I40E_QTX_CTL_PF_INDX_MASK);
2630 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2631 i40e_flush(hw);
2632
2633 /* cache tail off for easier writes later */
2634 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2635
2636 return 0;
2637 }
2638
2639 /**
2640 * i40e_configure_rx_ring - Configure a receive ring context
2641 * @ring: The Rx ring to configure
2642 *
2643 * Configure the Rx descriptor ring in the HMC context.
2644 **/
2645 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2646 {
2647 struct i40e_vsi *vsi = ring->vsi;
2648 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2649 u16 pf_q = vsi->base_queue + ring->queue_index;
2650 struct i40e_hw *hw = &vsi->back->hw;
2651 struct i40e_hmc_obj_rxq rx_ctx;
2652 i40e_status err = 0;
2653
2654 ring->state = 0;
2655
2656 /* clear the context structure first */
2657 memset(&rx_ctx, 0, sizeof(rx_ctx));
2658
2659 ring->rx_buf_len = vsi->rx_buf_len;
2660 ring->rx_hdr_len = vsi->rx_hdr_len;
2661
2662 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2663 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2664
2665 rx_ctx.base = (ring->dma / 128);
2666 rx_ctx.qlen = ring->count;
2667
2668 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2669 set_ring_16byte_desc_enabled(ring);
2670 rx_ctx.dsize = 0;
2671 } else {
2672 rx_ctx.dsize = 1;
2673 }
2674
2675 rx_ctx.dtype = vsi->dtype;
2676 if (vsi->dtype) {
2677 set_ring_ps_enabled(ring);
2678 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2679 I40E_RX_SPLIT_IP |
2680 I40E_RX_SPLIT_TCP_UDP |
2681 I40E_RX_SPLIT_SCTP;
2682 } else {
2683 rx_ctx.hsplit_0 = 0;
2684 }
2685
2686 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2687 (chain_len * ring->rx_buf_len));
2688 if (hw->revision_id == 0)
2689 rx_ctx.lrxqthresh = 0;
2690 else
2691 rx_ctx.lrxqthresh = 2;
2692 rx_ctx.crcstrip = 1;
2693 rx_ctx.l2tsel = 1;
2694 rx_ctx.showiv = 1;
2695 #ifdef I40E_FCOE
2696 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2697 #endif
2698 /* set the prefena field to 1 because the manual says to */
2699 rx_ctx.prefena = 1;
2700
2701 /* clear the context in the HMC */
2702 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2703 if (err) {
2704 dev_info(&vsi->back->pdev->dev,
2705 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2706 ring->queue_index, pf_q, err);
2707 return -ENOMEM;
2708 }
2709
2710 /* set the context in the HMC */
2711 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2712 if (err) {
2713 dev_info(&vsi->back->pdev->dev,
2714 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2715 ring->queue_index, pf_q, err);
2716 return -ENOMEM;
2717 }
2718
2719 /* cache tail for quicker writes, and clear the reg before use */
2720 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2721 writel(0, ring->tail);
2722
2723 if (ring_is_ps_enabled(ring)) {
2724 i40e_alloc_rx_headers(ring);
2725 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2726 } else {
2727 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2728 }
2729
2730 return 0;
2731 }
2732
2733 /**
2734 * i40e_vsi_configure_tx - Configure the VSI for Tx
2735 * @vsi: VSI structure describing this set of rings and resources
2736 *
2737 * Configure the Tx VSI for operation.
2738 **/
2739 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2740 {
2741 int err = 0;
2742 u16 i;
2743
2744 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2745 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2746
2747 return err;
2748 }
2749
2750 /**
2751 * i40e_vsi_configure_rx - Configure the VSI for Rx
2752 * @vsi: the VSI being configured
2753 *
2754 * Configure the Rx VSI for operation.
2755 **/
2756 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2757 {
2758 int err = 0;
2759 u16 i;
2760
2761 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2762 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2763 + ETH_FCS_LEN + VLAN_HLEN;
2764 else
2765 vsi->max_frame = I40E_RXBUFFER_2048;
2766
2767 /* figure out correct receive buffer length */
2768 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2769 I40E_FLAG_RX_PS_ENABLED)) {
2770 case I40E_FLAG_RX_1BUF_ENABLED:
2771 vsi->rx_hdr_len = 0;
2772 vsi->rx_buf_len = vsi->max_frame;
2773 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2774 break;
2775 case I40E_FLAG_RX_PS_ENABLED:
2776 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2777 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2778 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2779 break;
2780 default:
2781 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2782 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2783 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2784 break;
2785 }
2786
2787 #ifdef I40E_FCOE
2788 /* setup rx buffer for FCoE */
2789 if ((vsi->type == I40E_VSI_FCOE) &&
2790 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2791 vsi->rx_hdr_len = 0;
2792 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2793 vsi->max_frame = I40E_RXBUFFER_3072;
2794 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2795 }
2796
2797 #endif /* I40E_FCOE */
2798 /* round up for the chip's needs */
2799 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2800 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2801 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2802 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2803
2804 /* set up individual rings */
2805 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2806 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2807
2808 return err;
2809 }
2810
2811 /**
2812 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2813 * @vsi: ptr to the VSI
2814 **/
2815 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2816 {
2817 struct i40e_ring *tx_ring, *rx_ring;
2818 u16 qoffset, qcount;
2819 int i, n;
2820
2821 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2822 /* Reset the TC information */
2823 for (i = 0; i < vsi->num_queue_pairs; i++) {
2824 rx_ring = vsi->rx_rings[i];
2825 tx_ring = vsi->tx_rings[i];
2826 rx_ring->dcb_tc = 0;
2827 tx_ring->dcb_tc = 0;
2828 }
2829 }
2830
2831 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2832 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2833 continue;
2834
2835 qoffset = vsi->tc_config.tc_info[n].qoffset;
2836 qcount = vsi->tc_config.tc_info[n].qcount;
2837 for (i = qoffset; i < (qoffset + qcount); i++) {
2838 rx_ring = vsi->rx_rings[i];
2839 tx_ring = vsi->tx_rings[i];
2840 rx_ring->dcb_tc = n;
2841 tx_ring->dcb_tc = n;
2842 }
2843 }
2844 }
2845
2846 /**
2847 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2848 * @vsi: ptr to the VSI
2849 **/
2850 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2851 {
2852 if (vsi->netdev)
2853 i40e_set_rx_mode(vsi->netdev);
2854 }
2855
2856 /**
2857 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2858 * @vsi: Pointer to the targeted VSI
2859 *
2860 * This function replays the hlist on the hw where all the SB Flow Director
2861 * filters were saved.
2862 **/
2863 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2864 {
2865 struct i40e_fdir_filter *filter;
2866 struct i40e_pf *pf = vsi->back;
2867 struct hlist_node *node;
2868
2869 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2870 return;
2871
2872 hlist_for_each_entry_safe(filter, node,
2873 &pf->fdir_filter_list, fdir_node) {
2874 i40e_add_del_fdir(vsi, filter, true);
2875 }
2876 }
2877
2878 /**
2879 * i40e_vsi_configure - Set up the VSI for action
2880 * @vsi: the VSI being configured
2881 **/
2882 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2883 {
2884 int err;
2885
2886 i40e_set_vsi_rx_mode(vsi);
2887 i40e_restore_vlan(vsi);
2888 i40e_vsi_config_dcb_rings(vsi);
2889 err = i40e_vsi_configure_tx(vsi);
2890 if (!err)
2891 err = i40e_vsi_configure_rx(vsi);
2892
2893 return err;
2894 }
2895
2896 /**
2897 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2898 * @vsi: the VSI being configured
2899 **/
2900 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2901 {
2902 struct i40e_pf *pf = vsi->back;
2903 struct i40e_q_vector *q_vector;
2904 struct i40e_hw *hw = &pf->hw;
2905 u16 vector;
2906 int i, q;
2907 u32 val;
2908 u32 qp;
2909
2910 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2911 * and PFINT_LNKLSTn registers, e.g.:
2912 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2913 */
2914 qp = vsi->base_queue;
2915 vector = vsi->base_vector;
2916 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2917 q_vector = vsi->q_vectors[i];
2918 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2919 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2920 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2921 q_vector->rx.itr);
2922 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2923 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2924 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2925 q_vector->tx.itr);
2926
2927 /* Linked list for the queuepairs assigned to this vector */
2928 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2929 for (q = 0; q < q_vector->num_ringpairs; q++) {
2930 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2931 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2932 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2933 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2934 (I40E_QUEUE_TYPE_TX
2935 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2936
2937 wr32(hw, I40E_QINT_RQCTL(qp), val);
2938
2939 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2940 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2941 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2942 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2943 (I40E_QUEUE_TYPE_RX
2944 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2945
2946 /* Terminate the linked list */
2947 if (q == (q_vector->num_ringpairs - 1))
2948 val |= (I40E_QUEUE_END_OF_LIST
2949 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2950
2951 wr32(hw, I40E_QINT_TQCTL(qp), val);
2952 qp++;
2953 }
2954 }
2955
2956 i40e_flush(hw);
2957 }
2958
2959 /**
2960 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2961 * @hw: ptr to the hardware info
2962 **/
2963 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2964 {
2965 struct i40e_hw *hw = &pf->hw;
2966 u32 val;
2967
2968 /* clear things first */
2969 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2970 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2971
2972 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2973 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2974 I40E_PFINT_ICR0_ENA_GRST_MASK |
2975 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2976 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2977 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2978 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2979 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2980
2981 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2982 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2983
2984 if (pf->flags & I40E_FLAG_PTP)
2985 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2986
2987 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2988
2989 /* SW_ITR_IDX = 0, but don't change INTENA */
2990 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2991 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2992
2993 /* OTHER_ITR_IDX = 0 */
2994 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2995 }
2996
2997 /**
2998 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2999 * @vsi: the VSI being configured
3000 **/
3001 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3002 {
3003 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3004 struct i40e_pf *pf = vsi->back;
3005 struct i40e_hw *hw = &pf->hw;
3006 u32 val;
3007
3008 /* set the ITR configuration */
3009 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3010 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3011 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3012 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3013 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3014 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3015
3016 i40e_enable_misc_int_causes(pf);
3017
3018 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3019 wr32(hw, I40E_PFINT_LNKLST0, 0);
3020
3021 /* Associate the queue pair to the vector and enable the queue int */
3022 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3023 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3024 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3025
3026 wr32(hw, I40E_QINT_RQCTL(0), val);
3027
3028 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3029 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3030 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3031
3032 wr32(hw, I40E_QINT_TQCTL(0), val);
3033 i40e_flush(hw);
3034 }
3035
3036 /**
3037 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3038 * @pf: board private structure
3039 **/
3040 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3041 {
3042 struct i40e_hw *hw = &pf->hw;
3043
3044 wr32(hw, I40E_PFINT_DYN_CTL0,
3045 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3046 i40e_flush(hw);
3047 }
3048
3049 /**
3050 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3051 * @pf: board private structure
3052 **/
3053 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3054 {
3055 struct i40e_hw *hw = &pf->hw;
3056 u32 val;
3057
3058 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3059 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3060 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3061
3062 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3063 i40e_flush(hw);
3064 }
3065
3066 /**
3067 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3068 * @vsi: pointer to a vsi
3069 * @vector: enable a particular Hw Interrupt vector, without base_vector
3070 **/
3071 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3072 {
3073 struct i40e_pf *pf = vsi->back;
3074 struct i40e_hw *hw = &pf->hw;
3075 u32 val;
3076
3077 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3078 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3079 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3080 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
3081 /* skip the flush */
3082 }
3083
3084 /**
3085 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3086 * @vsi: pointer to a vsi
3087 * @vector: disable a particular Hw Interrupt vector
3088 **/
3089 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3090 {
3091 struct i40e_pf *pf = vsi->back;
3092 struct i40e_hw *hw = &pf->hw;
3093 u32 val;
3094
3095 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3096 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3097 i40e_flush(hw);
3098 }
3099
3100 /**
3101 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3102 * @irq: interrupt number
3103 * @data: pointer to a q_vector
3104 **/
3105 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3106 {
3107 struct i40e_q_vector *q_vector = data;
3108
3109 if (!q_vector->tx.ring && !q_vector->rx.ring)
3110 return IRQ_HANDLED;
3111
3112 napi_schedule(&q_vector->napi);
3113
3114 return IRQ_HANDLED;
3115 }
3116
3117 /**
3118 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3119 * @vsi: the VSI being configured
3120 * @basename: name for the vector
3121 *
3122 * Allocates MSI-X vectors and requests interrupts from the kernel.
3123 **/
3124 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3125 {
3126 int q_vectors = vsi->num_q_vectors;
3127 struct i40e_pf *pf = vsi->back;
3128 int base = vsi->base_vector;
3129 int rx_int_idx = 0;
3130 int tx_int_idx = 0;
3131 int vector, err;
3132
3133 for (vector = 0; vector < q_vectors; vector++) {
3134 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3135
3136 if (q_vector->tx.ring && q_vector->rx.ring) {
3137 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3138 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3139 tx_int_idx++;
3140 } else if (q_vector->rx.ring) {
3141 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3142 "%s-%s-%d", basename, "rx", rx_int_idx++);
3143 } else if (q_vector->tx.ring) {
3144 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3145 "%s-%s-%d", basename, "tx", tx_int_idx++);
3146 } else {
3147 /* skip this unused q_vector */
3148 continue;
3149 }
3150 err = request_irq(pf->msix_entries[base + vector].vector,
3151 vsi->irq_handler,
3152 0,
3153 q_vector->name,
3154 q_vector);
3155 if (err) {
3156 dev_info(&pf->pdev->dev,
3157 "%s: request_irq failed, error: %d\n",
3158 __func__, err);
3159 goto free_queue_irqs;
3160 }
3161 /* assign the mask for this irq */
3162 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3163 &q_vector->affinity_mask);
3164 }
3165
3166 vsi->irqs_ready = true;
3167 return 0;
3168
3169 free_queue_irqs:
3170 while (vector) {
3171 vector--;
3172 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3173 NULL);
3174 free_irq(pf->msix_entries[base + vector].vector,
3175 &(vsi->q_vectors[vector]));
3176 }
3177 return err;
3178 }
3179
3180 /**
3181 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3182 * @vsi: the VSI being un-configured
3183 **/
3184 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3185 {
3186 struct i40e_pf *pf = vsi->back;
3187 struct i40e_hw *hw = &pf->hw;
3188 int base = vsi->base_vector;
3189 int i;
3190
3191 for (i = 0; i < vsi->num_queue_pairs; i++) {
3192 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3193 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3194 }
3195
3196 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3197 for (i = vsi->base_vector;
3198 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3199 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3200
3201 i40e_flush(hw);
3202 for (i = 0; i < vsi->num_q_vectors; i++)
3203 synchronize_irq(pf->msix_entries[i + base].vector);
3204 } else {
3205 /* Legacy and MSI mode - this stops all interrupt handling */
3206 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3207 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3208 i40e_flush(hw);
3209 synchronize_irq(pf->pdev->irq);
3210 }
3211 }
3212
3213 /**
3214 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3215 * @vsi: the VSI being configured
3216 **/
3217 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3218 {
3219 struct i40e_pf *pf = vsi->back;
3220 int i;
3221
3222 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3223 for (i = 0; i < vsi->num_q_vectors; i++)
3224 i40e_irq_dynamic_enable(vsi, i);
3225 } else {
3226 i40e_irq_dynamic_enable_icr0(pf);
3227 }
3228
3229 i40e_flush(&pf->hw);
3230 return 0;
3231 }
3232
3233 /**
3234 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3235 * @pf: board private structure
3236 **/
3237 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3238 {
3239 /* Disable ICR 0 */
3240 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3241 i40e_flush(&pf->hw);
3242 }
3243
3244 /**
3245 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3246 * @irq: interrupt number
3247 * @data: pointer to a q_vector
3248 *
3249 * This is the handler used for all MSI/Legacy interrupts, and deals
3250 * with both queue and non-queue interrupts. This is also used in
3251 * MSIX mode to handle the non-queue interrupts.
3252 **/
3253 static irqreturn_t i40e_intr(int irq, void *data)
3254 {
3255 struct i40e_pf *pf = (struct i40e_pf *)data;
3256 struct i40e_hw *hw = &pf->hw;
3257 irqreturn_t ret = IRQ_NONE;
3258 u32 icr0, icr0_remaining;
3259 u32 val, ena_mask;
3260
3261 icr0 = rd32(hw, I40E_PFINT_ICR0);
3262 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3263
3264 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3265 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3266 goto enable_intr;
3267
3268 /* if interrupt but no bits showing, must be SWINT */
3269 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3270 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3271 pf->sw_int_count++;
3272
3273 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3274 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3275 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3276 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3277 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3278 }
3279
3280 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3281 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3282
3283 /* temporarily disable queue cause for NAPI processing */
3284 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3285 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3286 wr32(hw, I40E_QINT_RQCTL(0), qval);
3287
3288 qval = rd32(hw, I40E_QINT_TQCTL(0));
3289 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3290 wr32(hw, I40E_QINT_TQCTL(0), qval);
3291
3292 if (!test_bit(__I40E_DOWN, &pf->state))
3293 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3294 }
3295
3296 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3297 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3298 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3299 }
3300
3301 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3302 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3303 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3304 }
3305
3306 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3307 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3308 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3309 }
3310
3311 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3312 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3313 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3314 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3315 val = rd32(hw, I40E_GLGEN_RSTAT);
3316 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3317 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3318 if (val == I40E_RESET_CORER) {
3319 pf->corer_count++;
3320 } else if (val == I40E_RESET_GLOBR) {
3321 pf->globr_count++;
3322 } else if (val == I40E_RESET_EMPR) {
3323 pf->empr_count++;
3324 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3325 }
3326 }
3327
3328 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3329 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3330 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3331 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3332 rd32(hw, I40E_PFHMC_ERRORINFO),
3333 rd32(hw, I40E_PFHMC_ERRORDATA));
3334 }
3335
3336 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3337 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3338
3339 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3340 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3341 i40e_ptp_tx_hwtstamp(pf);
3342 }
3343 }
3344
3345 /* If a critical error is pending we have no choice but to reset the
3346 * device.
3347 * Report and mask out any remaining unexpected interrupts.
3348 */
3349 icr0_remaining = icr0 & ena_mask;
3350 if (icr0_remaining) {
3351 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3352 icr0_remaining);
3353 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3354 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3355 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3356 dev_info(&pf->pdev->dev, "device will be reset\n");
3357 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3358 i40e_service_event_schedule(pf);
3359 }
3360 ena_mask &= ~icr0_remaining;
3361 }
3362 ret = IRQ_HANDLED;
3363
3364 enable_intr:
3365 /* re-enable interrupt causes */
3366 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3367 if (!test_bit(__I40E_DOWN, &pf->state)) {
3368 i40e_service_event_schedule(pf);
3369 i40e_irq_dynamic_enable_icr0(pf);
3370 }
3371
3372 return ret;
3373 }
3374
3375 /**
3376 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3377 * @tx_ring: tx ring to clean
3378 * @budget: how many cleans we're allowed
3379 *
3380 * Returns true if there's any budget left (e.g. the clean is finished)
3381 **/
3382 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3383 {
3384 struct i40e_vsi *vsi = tx_ring->vsi;
3385 u16 i = tx_ring->next_to_clean;
3386 struct i40e_tx_buffer *tx_buf;
3387 struct i40e_tx_desc *tx_desc;
3388
3389 tx_buf = &tx_ring->tx_bi[i];
3390 tx_desc = I40E_TX_DESC(tx_ring, i);
3391 i -= tx_ring->count;
3392
3393 do {
3394 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3395
3396 /* if next_to_watch is not set then there is no work pending */
3397 if (!eop_desc)
3398 break;
3399
3400 /* prevent any other reads prior to eop_desc */
3401 read_barrier_depends();
3402
3403 /* if the descriptor isn't done, no work yet to do */
3404 if (!(eop_desc->cmd_type_offset_bsz &
3405 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3406 break;
3407
3408 /* clear next_to_watch to prevent false hangs */
3409 tx_buf->next_to_watch = NULL;
3410
3411 tx_desc->buffer_addr = 0;
3412 tx_desc->cmd_type_offset_bsz = 0;
3413 /* move past filter desc */
3414 tx_buf++;
3415 tx_desc++;
3416 i++;
3417 if (unlikely(!i)) {
3418 i -= tx_ring->count;
3419 tx_buf = tx_ring->tx_bi;
3420 tx_desc = I40E_TX_DESC(tx_ring, 0);
3421 }
3422 /* unmap skb header data */
3423 dma_unmap_single(tx_ring->dev,
3424 dma_unmap_addr(tx_buf, dma),
3425 dma_unmap_len(tx_buf, len),
3426 DMA_TO_DEVICE);
3427 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3428 kfree(tx_buf->raw_buf);
3429
3430 tx_buf->raw_buf = NULL;
3431 tx_buf->tx_flags = 0;
3432 tx_buf->next_to_watch = NULL;
3433 dma_unmap_len_set(tx_buf, len, 0);
3434 tx_desc->buffer_addr = 0;
3435 tx_desc->cmd_type_offset_bsz = 0;
3436
3437 /* move us past the eop_desc for start of next FD desc */
3438 tx_buf++;
3439 tx_desc++;
3440 i++;
3441 if (unlikely(!i)) {
3442 i -= tx_ring->count;
3443 tx_buf = tx_ring->tx_bi;
3444 tx_desc = I40E_TX_DESC(tx_ring, 0);
3445 }
3446
3447 /* update budget accounting */
3448 budget--;
3449 } while (likely(budget));
3450
3451 i += tx_ring->count;
3452 tx_ring->next_to_clean = i;
3453
3454 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3455 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3456 }
3457 return budget > 0;
3458 }
3459
3460 /**
3461 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3462 * @irq: interrupt number
3463 * @data: pointer to a q_vector
3464 **/
3465 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3466 {
3467 struct i40e_q_vector *q_vector = data;
3468 struct i40e_vsi *vsi;
3469
3470 if (!q_vector->tx.ring)
3471 return IRQ_HANDLED;
3472
3473 vsi = q_vector->tx.ring->vsi;
3474 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3475
3476 return IRQ_HANDLED;
3477 }
3478
3479 /**
3480 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3481 * @vsi: the VSI being configured
3482 * @v_idx: vector index
3483 * @qp_idx: queue pair index
3484 **/
3485 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3486 {
3487 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3488 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3489 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3490
3491 tx_ring->q_vector = q_vector;
3492 tx_ring->next = q_vector->tx.ring;
3493 q_vector->tx.ring = tx_ring;
3494 q_vector->tx.count++;
3495
3496 rx_ring->q_vector = q_vector;
3497 rx_ring->next = q_vector->rx.ring;
3498 q_vector->rx.ring = rx_ring;
3499 q_vector->rx.count++;
3500 }
3501
3502 /**
3503 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3504 * @vsi: the VSI being configured
3505 *
3506 * This function maps descriptor rings to the queue-specific vectors
3507 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3508 * one vector per queue pair, but on a constrained vector budget, we
3509 * group the queue pairs as "efficiently" as possible.
3510 **/
3511 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3512 {
3513 int qp_remaining = vsi->num_queue_pairs;
3514 int q_vectors = vsi->num_q_vectors;
3515 int num_ringpairs;
3516 int v_start = 0;
3517 int qp_idx = 0;
3518
3519 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3520 * group them so there are multiple queues per vector.
3521 * It is also important to go through all the vectors available to be
3522 * sure that if we don't use all the vectors, that the remaining vectors
3523 * are cleared. This is especially important when decreasing the
3524 * number of queues in use.
3525 */
3526 for (; v_start < q_vectors; v_start++) {
3527 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3528
3529 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3530
3531 q_vector->num_ringpairs = num_ringpairs;
3532
3533 q_vector->rx.count = 0;
3534 q_vector->tx.count = 0;
3535 q_vector->rx.ring = NULL;
3536 q_vector->tx.ring = NULL;
3537
3538 while (num_ringpairs--) {
3539 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3540 qp_idx++;
3541 qp_remaining--;
3542 }
3543 }
3544 }
3545
3546 /**
3547 * i40e_vsi_request_irq - Request IRQ from the OS
3548 * @vsi: the VSI being configured
3549 * @basename: name for the vector
3550 **/
3551 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3552 {
3553 struct i40e_pf *pf = vsi->back;
3554 int err;
3555
3556 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3557 err = i40e_vsi_request_irq_msix(vsi, basename);
3558 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3559 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3560 pf->int_name, pf);
3561 else
3562 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3563 pf->int_name, pf);
3564
3565 if (err)
3566 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3567
3568 return err;
3569 }
3570
3571 #ifdef CONFIG_NET_POLL_CONTROLLER
3572 /**
3573 * i40e_netpoll - A Polling 'interrupt'handler
3574 * @netdev: network interface device structure
3575 *
3576 * This is used by netconsole to send skbs without having to re-enable
3577 * interrupts. It's not called while the normal interrupt routine is executing.
3578 **/
3579 #ifdef I40E_FCOE
3580 void i40e_netpoll(struct net_device *netdev)
3581 #else
3582 static void i40e_netpoll(struct net_device *netdev)
3583 #endif
3584 {
3585 struct i40e_netdev_priv *np = netdev_priv(netdev);
3586 struct i40e_vsi *vsi = np->vsi;
3587 struct i40e_pf *pf = vsi->back;
3588 int i;
3589
3590 /* if interface is down do nothing */
3591 if (test_bit(__I40E_DOWN, &vsi->state))
3592 return;
3593
3594 pf->flags |= I40E_FLAG_IN_NETPOLL;
3595 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3596 for (i = 0; i < vsi->num_q_vectors; i++)
3597 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3598 } else {
3599 i40e_intr(pf->pdev->irq, netdev);
3600 }
3601 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3602 }
3603 #endif
3604
3605 /**
3606 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3607 * @pf: the PF being configured
3608 * @pf_q: the PF queue
3609 * @enable: enable or disable state of the queue
3610 *
3611 * This routine will wait for the given Tx queue of the PF to reach the
3612 * enabled or disabled state.
3613 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3614 * multiple retries; else will return 0 in case of success.
3615 **/
3616 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3617 {
3618 int i;
3619 u32 tx_reg;
3620
3621 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3622 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3623 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3624 break;
3625
3626 usleep_range(10, 20);
3627 }
3628 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3629 return -ETIMEDOUT;
3630
3631 return 0;
3632 }
3633
3634 /**
3635 * i40e_vsi_control_tx - Start or stop a VSI's rings
3636 * @vsi: the VSI being configured
3637 * @enable: start or stop the rings
3638 **/
3639 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3640 {
3641 struct i40e_pf *pf = vsi->back;
3642 struct i40e_hw *hw = &pf->hw;
3643 int i, j, pf_q, ret = 0;
3644 u32 tx_reg;
3645
3646 pf_q = vsi->base_queue;
3647 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3648
3649 /* warn the TX unit of coming changes */
3650 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3651 if (!enable)
3652 usleep_range(10, 20);
3653
3654 for (j = 0; j < 50; j++) {
3655 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3656 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3657 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3658 break;
3659 usleep_range(1000, 2000);
3660 }
3661 /* Skip if the queue is already in the requested state */
3662 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3663 continue;
3664
3665 /* turn on/off the queue */
3666 if (enable) {
3667 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3668 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3669 } else {
3670 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3671 }
3672
3673 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3674 /* No waiting for the Tx queue to disable */
3675 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3676 continue;
3677
3678 /* wait for the change to finish */
3679 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3680 if (ret) {
3681 dev_info(&pf->pdev->dev,
3682 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3683 __func__, vsi->seid, pf_q,
3684 (enable ? "en" : "dis"));
3685 break;
3686 }
3687 }
3688
3689 if (hw->revision_id == 0)
3690 mdelay(50);
3691 return ret;
3692 }
3693
3694 /**
3695 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3696 * @pf: the PF being configured
3697 * @pf_q: the PF queue
3698 * @enable: enable or disable state of the queue
3699 *
3700 * This routine will wait for the given Rx queue of the PF to reach the
3701 * enabled or disabled state.
3702 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3703 * multiple retries; else will return 0 in case of success.
3704 **/
3705 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3706 {
3707 int i;
3708 u32 rx_reg;
3709
3710 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3711 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3712 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3713 break;
3714
3715 usleep_range(10, 20);
3716 }
3717 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3718 return -ETIMEDOUT;
3719
3720 return 0;
3721 }
3722
3723 /**
3724 * i40e_vsi_control_rx - Start or stop a VSI's rings
3725 * @vsi: the VSI being configured
3726 * @enable: start or stop the rings
3727 **/
3728 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3729 {
3730 struct i40e_pf *pf = vsi->back;
3731 struct i40e_hw *hw = &pf->hw;
3732 int i, j, pf_q, ret = 0;
3733 u32 rx_reg;
3734
3735 pf_q = vsi->base_queue;
3736 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3737 for (j = 0; j < 50; j++) {
3738 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3739 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3740 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3741 break;
3742 usleep_range(1000, 2000);
3743 }
3744
3745 /* Skip if the queue is already in the requested state */
3746 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3747 continue;
3748
3749 /* turn on/off the queue */
3750 if (enable)
3751 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3752 else
3753 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3754 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3755
3756 /* wait for the change to finish */
3757 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3758 if (ret) {
3759 dev_info(&pf->pdev->dev,
3760 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3761 __func__, vsi->seid, pf_q,
3762 (enable ? "en" : "dis"));
3763 break;
3764 }
3765 }
3766
3767 return ret;
3768 }
3769
3770 /**
3771 * i40e_vsi_control_rings - Start or stop a VSI's rings
3772 * @vsi: the VSI being configured
3773 * @enable: start or stop the rings
3774 **/
3775 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3776 {
3777 int ret = 0;
3778
3779 /* do rx first for enable and last for disable */
3780 if (request) {
3781 ret = i40e_vsi_control_rx(vsi, request);
3782 if (ret)
3783 return ret;
3784 ret = i40e_vsi_control_tx(vsi, request);
3785 } else {
3786 /* Ignore return value, we need to shutdown whatever we can */
3787 i40e_vsi_control_tx(vsi, request);
3788 i40e_vsi_control_rx(vsi, request);
3789 }
3790
3791 return ret;
3792 }
3793
3794 /**
3795 * i40e_vsi_free_irq - Free the irq association with the OS
3796 * @vsi: the VSI being configured
3797 **/
3798 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3799 {
3800 struct i40e_pf *pf = vsi->back;
3801 struct i40e_hw *hw = &pf->hw;
3802 int base = vsi->base_vector;
3803 u32 val, qp;
3804 int i;
3805
3806 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3807 if (!vsi->q_vectors)
3808 return;
3809
3810 if (!vsi->irqs_ready)
3811 return;
3812
3813 vsi->irqs_ready = false;
3814 for (i = 0; i < vsi->num_q_vectors; i++) {
3815 u16 vector = i + base;
3816
3817 /* free only the irqs that were actually requested */
3818 if (!vsi->q_vectors[i] ||
3819 !vsi->q_vectors[i]->num_ringpairs)
3820 continue;
3821
3822 /* clear the affinity_mask in the IRQ descriptor */
3823 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3824 NULL);
3825 free_irq(pf->msix_entries[vector].vector,
3826 vsi->q_vectors[i]);
3827
3828 /* Tear down the interrupt queue link list
3829 *
3830 * We know that they come in pairs and always
3831 * the Rx first, then the Tx. To clear the
3832 * link list, stick the EOL value into the
3833 * next_q field of the registers.
3834 */
3835 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3836 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3837 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3838 val |= I40E_QUEUE_END_OF_LIST
3839 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3840 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3841
3842 while (qp != I40E_QUEUE_END_OF_LIST) {
3843 u32 next;
3844
3845 val = rd32(hw, I40E_QINT_RQCTL(qp));
3846
3847 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3848 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3849 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3850 I40E_QINT_RQCTL_INTEVENT_MASK);
3851
3852 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3853 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3854
3855 wr32(hw, I40E_QINT_RQCTL(qp), val);
3856
3857 val = rd32(hw, I40E_QINT_TQCTL(qp));
3858
3859 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3860 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3861
3862 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3863 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3864 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3865 I40E_QINT_TQCTL_INTEVENT_MASK);
3866
3867 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3868 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3869
3870 wr32(hw, I40E_QINT_TQCTL(qp), val);
3871 qp = next;
3872 }
3873 }
3874 } else {
3875 free_irq(pf->pdev->irq, pf);
3876
3877 val = rd32(hw, I40E_PFINT_LNKLST0);
3878 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3879 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3880 val |= I40E_QUEUE_END_OF_LIST
3881 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3882 wr32(hw, I40E_PFINT_LNKLST0, val);
3883
3884 val = rd32(hw, I40E_QINT_RQCTL(qp));
3885 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3886 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3887 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3888 I40E_QINT_RQCTL_INTEVENT_MASK);
3889
3890 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3891 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3892
3893 wr32(hw, I40E_QINT_RQCTL(qp), val);
3894
3895 val = rd32(hw, I40E_QINT_TQCTL(qp));
3896
3897 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3898 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3899 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3900 I40E_QINT_TQCTL_INTEVENT_MASK);
3901
3902 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3903 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3904
3905 wr32(hw, I40E_QINT_TQCTL(qp), val);
3906 }
3907 }
3908
3909 /**
3910 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3911 * @vsi: the VSI being configured
3912 * @v_idx: Index of vector to be freed
3913 *
3914 * This function frees the memory allocated to the q_vector. In addition if
3915 * NAPI is enabled it will delete any references to the NAPI struct prior
3916 * to freeing the q_vector.
3917 **/
3918 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3919 {
3920 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3921 struct i40e_ring *ring;
3922
3923 if (!q_vector)
3924 return;
3925
3926 /* disassociate q_vector from rings */
3927 i40e_for_each_ring(ring, q_vector->tx)
3928 ring->q_vector = NULL;
3929
3930 i40e_for_each_ring(ring, q_vector->rx)
3931 ring->q_vector = NULL;
3932
3933 /* only VSI w/ an associated netdev is set up w/ NAPI */
3934 if (vsi->netdev)
3935 netif_napi_del(&q_vector->napi);
3936
3937 vsi->q_vectors[v_idx] = NULL;
3938
3939 kfree_rcu(q_vector, rcu);
3940 }
3941
3942 /**
3943 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3944 * @vsi: the VSI being un-configured
3945 *
3946 * This frees the memory allocated to the q_vectors and
3947 * deletes references to the NAPI struct.
3948 **/
3949 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3950 {
3951 int v_idx;
3952
3953 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3954 i40e_free_q_vector(vsi, v_idx);
3955 }
3956
3957 /**
3958 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3959 * @pf: board private structure
3960 **/
3961 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3962 {
3963 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3964 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3965 pci_disable_msix(pf->pdev);
3966 kfree(pf->msix_entries);
3967 pf->msix_entries = NULL;
3968 kfree(pf->irq_pile);
3969 pf->irq_pile = NULL;
3970 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3971 pci_disable_msi(pf->pdev);
3972 }
3973 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3974 }
3975
3976 /**
3977 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3978 * @pf: board private structure
3979 *
3980 * We go through and clear interrupt specific resources and reset the structure
3981 * to pre-load conditions
3982 **/
3983 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3984 {
3985 int i;
3986
3987 i40e_stop_misc_vector(pf);
3988 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3989 synchronize_irq(pf->msix_entries[0].vector);
3990 free_irq(pf->msix_entries[0].vector, pf);
3991 }
3992
3993 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3994 for (i = 0; i < pf->num_alloc_vsi; i++)
3995 if (pf->vsi[i])
3996 i40e_vsi_free_q_vectors(pf->vsi[i]);
3997 i40e_reset_interrupt_capability(pf);
3998 }
3999
4000 /**
4001 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4002 * @vsi: the VSI being configured
4003 **/
4004 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4005 {
4006 int q_idx;
4007
4008 if (!vsi->netdev)
4009 return;
4010
4011 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4012 napi_enable(&vsi->q_vectors[q_idx]->napi);
4013 }
4014
4015 /**
4016 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4017 * @vsi: the VSI being configured
4018 **/
4019 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4020 {
4021 int q_idx;
4022
4023 if (!vsi->netdev)
4024 return;
4025
4026 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4027 napi_disable(&vsi->q_vectors[q_idx]->napi);
4028 }
4029
4030 /**
4031 * i40e_vsi_close - Shut down a VSI
4032 * @vsi: the vsi to be quelled
4033 **/
4034 static void i40e_vsi_close(struct i40e_vsi *vsi)
4035 {
4036 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4037 i40e_down(vsi);
4038 i40e_vsi_free_irq(vsi);
4039 i40e_vsi_free_tx_resources(vsi);
4040 i40e_vsi_free_rx_resources(vsi);
4041 vsi->current_netdev_flags = 0;
4042 }
4043
4044 /**
4045 * i40e_quiesce_vsi - Pause a given VSI
4046 * @vsi: the VSI being paused
4047 **/
4048 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4049 {
4050 if (test_bit(__I40E_DOWN, &vsi->state))
4051 return;
4052
4053 /* No need to disable FCoE VSI when Tx suspended */
4054 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4055 vsi->type == I40E_VSI_FCOE) {
4056 dev_dbg(&vsi->back->pdev->dev,
4057 "%s: VSI seid %d skipping FCoE VSI disable\n",
4058 __func__, vsi->seid);
4059 return;
4060 }
4061
4062 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4063 if (vsi->netdev && netif_running(vsi->netdev)) {
4064 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4065 } else {
4066 i40e_vsi_close(vsi);
4067 }
4068 }
4069
4070 /**
4071 * i40e_unquiesce_vsi - Resume a given VSI
4072 * @vsi: the VSI being resumed
4073 **/
4074 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4075 {
4076 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4077 return;
4078
4079 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4080 if (vsi->netdev && netif_running(vsi->netdev))
4081 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4082 else
4083 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4084 }
4085
4086 /**
4087 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4088 * @pf: the PF
4089 **/
4090 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4091 {
4092 int v;
4093
4094 for (v = 0; v < pf->num_alloc_vsi; v++) {
4095 if (pf->vsi[v])
4096 i40e_quiesce_vsi(pf->vsi[v]);
4097 }
4098 }
4099
4100 /**
4101 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4102 * @pf: the PF
4103 **/
4104 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4105 {
4106 int v;
4107
4108 for (v = 0; v < pf->num_alloc_vsi; v++) {
4109 if (pf->vsi[v])
4110 i40e_unquiesce_vsi(pf->vsi[v]);
4111 }
4112 }
4113
4114 #ifdef CONFIG_I40E_DCB
4115 /**
4116 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4117 * @vsi: the VSI being configured
4118 *
4119 * This function waits for the given VSI's Tx queues to be disabled.
4120 **/
4121 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4122 {
4123 struct i40e_pf *pf = vsi->back;
4124 int i, pf_q, ret;
4125
4126 pf_q = vsi->base_queue;
4127 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4128 /* Check and wait for the disable status of the queue */
4129 ret = i40e_pf_txq_wait(pf, pf_q, false);
4130 if (ret) {
4131 dev_info(&pf->pdev->dev,
4132 "%s: VSI seid %d Tx ring %d disable timeout\n",
4133 __func__, vsi->seid, pf_q);
4134 return ret;
4135 }
4136 }
4137
4138 return 0;
4139 }
4140
4141 /**
4142 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4143 * @pf: the PF
4144 *
4145 * This function waits for the Tx queues to be in disabled state for all the
4146 * VSIs that are managed by this PF.
4147 **/
4148 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4149 {
4150 int v, ret = 0;
4151
4152 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4153 /* No need to wait for FCoE VSI queues */
4154 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4155 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4156 if (ret)
4157 break;
4158 }
4159 }
4160
4161 return ret;
4162 }
4163
4164 #endif
4165
4166 /**
4167 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4168 * @q_idx: TX queue number
4169 * @vsi: Pointer to VSI struct
4170 *
4171 * This function checks specified queue for given VSI. Detects hung condition.
4172 * Sets hung bit since it is two step process. Before next run of service task
4173 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4174 * hung condition remain unchanged and during subsequent run, this function
4175 * issues SW interrupt to recover from hung condition.
4176 **/
4177 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4178 {
4179 struct i40e_ring *tx_ring = NULL;
4180 struct i40e_pf *pf;
4181 u32 head, val, tx_pending;
4182 int i;
4183
4184 pf = vsi->back;
4185
4186 /* now that we have an index, find the tx_ring struct */
4187 for (i = 0; i < vsi->num_queue_pairs; i++) {
4188 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4189 if (q_idx == vsi->tx_rings[i]->queue_index) {
4190 tx_ring = vsi->tx_rings[i];
4191 break;
4192 }
4193 }
4194 }
4195
4196 if (!tx_ring)
4197 return;
4198
4199 /* Read interrupt register */
4200 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4201 val = rd32(&pf->hw,
4202 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4203 tx_ring->vsi->base_vector - 1));
4204 else
4205 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4206
4207 head = i40e_get_head(tx_ring);
4208
4209 tx_pending = i40e_get_tx_pending(tx_ring);
4210
4211 /* Interrupts are disabled and TX pending is non-zero,
4212 * trigger the SW interrupt (don't wait). Worst case
4213 * there will be one extra interrupt which may result
4214 * into not cleaning any queues because queues are cleaned.
4215 */
4216 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4217 i40e_force_wb(vsi, tx_ring->q_vector);
4218 }
4219
4220 /**
4221 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4222 * @pf: pointer to PF struct
4223 *
4224 * LAN VSI has netdev and netdev has TX queues. This function is to check
4225 * each of those TX queues if they are hung, trigger recovery by issuing
4226 * SW interrupt.
4227 **/
4228 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4229 {
4230 struct net_device *netdev;
4231 struct i40e_vsi *vsi;
4232 int i;
4233
4234 /* Only for LAN VSI */
4235 vsi = pf->vsi[pf->lan_vsi];
4236
4237 if (!vsi)
4238 return;
4239
4240 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4241 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4242 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4243 return;
4244
4245 /* Make sure type is MAIN VSI */
4246 if (vsi->type != I40E_VSI_MAIN)
4247 return;
4248
4249 netdev = vsi->netdev;
4250 if (!netdev)
4251 return;
4252
4253 /* Bail out if netif_carrier is not OK */
4254 if (!netif_carrier_ok(netdev))
4255 return;
4256
4257 /* Go thru' TX queues for netdev */
4258 for (i = 0; i < netdev->num_tx_queues; i++) {
4259 struct netdev_queue *q;
4260
4261 q = netdev_get_tx_queue(netdev, i);
4262 if (q)
4263 i40e_detect_recover_hung_queue(i, vsi);
4264 }
4265 }
4266
4267 /**
4268 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4269 * @pf: pointer to PF
4270 *
4271 * Get TC map for ISCSI PF type that will include iSCSI TC
4272 * and LAN TC.
4273 **/
4274 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4275 {
4276 struct i40e_dcb_app_priority_table app;
4277 struct i40e_hw *hw = &pf->hw;
4278 u8 enabled_tc = 1; /* TC0 is always enabled */
4279 u8 tc, i;
4280 /* Get the iSCSI APP TLV */
4281 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4282
4283 for (i = 0; i < dcbcfg->numapps; i++) {
4284 app = dcbcfg->app[i];
4285 if (app.selector == I40E_APP_SEL_TCPIP &&
4286 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4287 tc = dcbcfg->etscfg.prioritytable[app.priority];
4288 enabled_tc |= BIT_ULL(tc);
4289 break;
4290 }
4291 }
4292
4293 return enabled_tc;
4294 }
4295
4296 /**
4297 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4298 * @dcbcfg: the corresponding DCBx configuration structure
4299 *
4300 * Return the number of TCs from given DCBx configuration
4301 **/
4302 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4303 {
4304 u8 num_tc = 0;
4305 int i;
4306
4307 /* Scan the ETS Config Priority Table to find
4308 * traffic class enabled for a given priority
4309 * and use the traffic class index to get the
4310 * number of traffic classes enabled
4311 */
4312 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4313 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4314 num_tc = dcbcfg->etscfg.prioritytable[i];
4315 }
4316
4317 /* Traffic class index starts from zero so
4318 * increment to return the actual count
4319 */
4320 return num_tc + 1;
4321 }
4322
4323 /**
4324 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4325 * @dcbcfg: the corresponding DCBx configuration structure
4326 *
4327 * Query the current DCB configuration and return the number of
4328 * traffic classes enabled from the given DCBX config
4329 **/
4330 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4331 {
4332 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4333 u8 enabled_tc = 1;
4334 u8 i;
4335
4336 for (i = 0; i < num_tc; i++)
4337 enabled_tc |= BIT(i);
4338
4339 return enabled_tc;
4340 }
4341
4342 /**
4343 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4344 * @pf: PF being queried
4345 *
4346 * Return number of traffic classes enabled for the given PF
4347 **/
4348 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4349 {
4350 struct i40e_hw *hw = &pf->hw;
4351 u8 i, enabled_tc;
4352 u8 num_tc = 0;
4353 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4354
4355 /* If DCB is not enabled then always in single TC */
4356 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4357 return 1;
4358
4359 /* SFP mode will be enabled for all TCs on port */
4360 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4361 return i40e_dcb_get_num_tc(dcbcfg);
4362
4363 /* MFP mode return count of enabled TCs for this PF */
4364 if (pf->hw.func_caps.iscsi)
4365 enabled_tc = i40e_get_iscsi_tc_map(pf);
4366 else
4367 return 1; /* Only TC0 */
4368
4369 /* At least have TC0 */
4370 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4371 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4372 if (enabled_tc & BIT_ULL(i))
4373 num_tc++;
4374 }
4375 return num_tc;
4376 }
4377
4378 /**
4379 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4380 * @pf: PF being queried
4381 *
4382 * Return a bitmap for first enabled traffic class for this PF.
4383 **/
4384 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4385 {
4386 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4387 u8 i = 0;
4388
4389 if (!enabled_tc)
4390 return 0x1; /* TC0 */
4391
4392 /* Find the first enabled TC */
4393 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4394 if (enabled_tc & BIT_ULL(i))
4395 break;
4396 }
4397
4398 return BIT(i);
4399 }
4400
4401 /**
4402 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4403 * @pf: PF being queried
4404 *
4405 * Return a bitmap for enabled traffic classes for this PF.
4406 **/
4407 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4408 {
4409 /* If DCB is not enabled for this PF then just return default TC */
4410 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4411 return i40e_pf_get_default_tc(pf);
4412
4413 /* SFP mode we want PF to be enabled for all TCs */
4414 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4415 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4416
4417 /* MFP enabled and iSCSI PF type */
4418 if (pf->hw.func_caps.iscsi)
4419 return i40e_get_iscsi_tc_map(pf);
4420 else
4421 return i40e_pf_get_default_tc(pf);
4422 }
4423
4424 /**
4425 * i40e_vsi_get_bw_info - Query VSI BW Information
4426 * @vsi: the VSI being queried
4427 *
4428 * Returns 0 on success, negative value on failure
4429 **/
4430 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4431 {
4432 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4433 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4434 struct i40e_pf *pf = vsi->back;
4435 struct i40e_hw *hw = &pf->hw;
4436 i40e_status ret;
4437 u32 tc_bw_max;
4438 int i;
4439
4440 /* Get the VSI level BW configuration */
4441 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4442 if (ret) {
4443 dev_info(&pf->pdev->dev,
4444 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4445 i40e_stat_str(&pf->hw, ret),
4446 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4447 return -EINVAL;
4448 }
4449
4450 /* Get the VSI level BW configuration per TC */
4451 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4452 NULL);
4453 if (ret) {
4454 dev_info(&pf->pdev->dev,
4455 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4456 i40e_stat_str(&pf->hw, ret),
4457 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4458 return -EINVAL;
4459 }
4460
4461 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4462 dev_info(&pf->pdev->dev,
4463 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4464 bw_config.tc_valid_bits,
4465 bw_ets_config.tc_valid_bits);
4466 /* Still continuing */
4467 }
4468
4469 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4470 vsi->bw_max_quanta = bw_config.max_bw;
4471 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4472 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4473 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4474 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4475 vsi->bw_ets_limit_credits[i] =
4476 le16_to_cpu(bw_ets_config.credits[i]);
4477 /* 3 bits out of 4 for each TC */
4478 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4479 }
4480
4481 return 0;
4482 }
4483
4484 /**
4485 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4486 * @vsi: the VSI being configured
4487 * @enabled_tc: TC bitmap
4488 * @bw_credits: BW shared credits per TC
4489 *
4490 * Returns 0 on success, negative value on failure
4491 **/
4492 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4493 u8 *bw_share)
4494 {
4495 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4496 i40e_status ret;
4497 int i;
4498
4499 bw_data.tc_valid_bits = enabled_tc;
4500 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4501 bw_data.tc_bw_credits[i] = bw_share[i];
4502
4503 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4504 NULL);
4505 if (ret) {
4506 dev_info(&vsi->back->pdev->dev,
4507 "AQ command Config VSI BW allocation per TC failed = %d\n",
4508 vsi->back->hw.aq.asq_last_status);
4509 return -EINVAL;
4510 }
4511
4512 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4513 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4514
4515 return 0;
4516 }
4517
4518 /**
4519 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4520 * @vsi: the VSI being configured
4521 * @enabled_tc: TC map to be enabled
4522 *
4523 **/
4524 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4525 {
4526 struct net_device *netdev = vsi->netdev;
4527 struct i40e_pf *pf = vsi->back;
4528 struct i40e_hw *hw = &pf->hw;
4529 u8 netdev_tc = 0;
4530 int i;
4531 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4532
4533 if (!netdev)
4534 return;
4535
4536 if (!enabled_tc) {
4537 netdev_reset_tc(netdev);
4538 return;
4539 }
4540
4541 /* Set up actual enabled TCs on the VSI */
4542 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4543 return;
4544
4545 /* set per TC queues for the VSI */
4546 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4547 /* Only set TC queues for enabled tcs
4548 *
4549 * e.g. For a VSI that has TC0 and TC3 enabled the
4550 * enabled_tc bitmap would be 0x00001001; the driver
4551 * will set the numtc for netdev as 2 that will be
4552 * referenced by the netdev layer as TC 0 and 1.
4553 */
4554 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4555 netdev_set_tc_queue(netdev,
4556 vsi->tc_config.tc_info[i].netdev_tc,
4557 vsi->tc_config.tc_info[i].qcount,
4558 vsi->tc_config.tc_info[i].qoffset);
4559 }
4560
4561 /* Assign UP2TC map for the VSI */
4562 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4563 /* Get the actual TC# for the UP */
4564 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4565 /* Get the mapped netdev TC# for the UP */
4566 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4567 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4568 }
4569 }
4570
4571 /**
4572 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4573 * @vsi: the VSI being configured
4574 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4575 **/
4576 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4577 struct i40e_vsi_context *ctxt)
4578 {
4579 /* copy just the sections touched not the entire info
4580 * since not all sections are valid as returned by
4581 * update vsi params
4582 */
4583 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4584 memcpy(&vsi->info.queue_mapping,
4585 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4586 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4587 sizeof(vsi->info.tc_mapping));
4588 }
4589
4590 /**
4591 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4592 * @vsi: VSI to be configured
4593 * @enabled_tc: TC bitmap
4594 *
4595 * This configures a particular VSI for TCs that are mapped to the
4596 * given TC bitmap. It uses default bandwidth share for TCs across
4597 * VSIs to configure TC for a particular VSI.
4598 *
4599 * NOTE:
4600 * It is expected that the VSI queues have been quisced before calling
4601 * this function.
4602 **/
4603 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4604 {
4605 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4606 struct i40e_vsi_context ctxt;
4607 int ret = 0;
4608 int i;
4609
4610 /* Check if enabled_tc is same as existing or new TCs */
4611 if (vsi->tc_config.enabled_tc == enabled_tc)
4612 return ret;
4613
4614 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4615 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4616 if (enabled_tc & BIT_ULL(i))
4617 bw_share[i] = 1;
4618 }
4619
4620 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4621 if (ret) {
4622 dev_info(&vsi->back->pdev->dev,
4623 "Failed configuring TC map %d for VSI %d\n",
4624 enabled_tc, vsi->seid);
4625 goto out;
4626 }
4627
4628 /* Update Queue Pairs Mapping for currently enabled UPs */
4629 ctxt.seid = vsi->seid;
4630 ctxt.pf_num = vsi->back->hw.pf_id;
4631 ctxt.vf_num = 0;
4632 ctxt.uplink_seid = vsi->uplink_seid;
4633 ctxt.info = vsi->info;
4634 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4635
4636 /* Update the VSI after updating the VSI queue-mapping information */
4637 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4638 if (ret) {
4639 dev_info(&vsi->back->pdev->dev,
4640 "Update vsi tc config failed, err %s aq_err %s\n",
4641 i40e_stat_str(&vsi->back->hw, ret),
4642 i40e_aq_str(&vsi->back->hw,
4643 vsi->back->hw.aq.asq_last_status));
4644 goto out;
4645 }
4646 /* update the local VSI info with updated queue map */
4647 i40e_vsi_update_queue_map(vsi, &ctxt);
4648 vsi->info.valid_sections = 0;
4649
4650 /* Update current VSI BW information */
4651 ret = i40e_vsi_get_bw_info(vsi);
4652 if (ret) {
4653 dev_info(&vsi->back->pdev->dev,
4654 "Failed updating vsi bw info, err %s aq_err %s\n",
4655 i40e_stat_str(&vsi->back->hw, ret),
4656 i40e_aq_str(&vsi->back->hw,
4657 vsi->back->hw.aq.asq_last_status));
4658 goto out;
4659 }
4660
4661 /* Update the netdev TC setup */
4662 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4663 out:
4664 return ret;
4665 }
4666
4667 /**
4668 * i40e_veb_config_tc - Configure TCs for given VEB
4669 * @veb: given VEB
4670 * @enabled_tc: TC bitmap
4671 *
4672 * Configures given TC bitmap for VEB (switching) element
4673 **/
4674 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4675 {
4676 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4677 struct i40e_pf *pf = veb->pf;
4678 int ret = 0;
4679 int i;
4680
4681 /* No TCs or already enabled TCs just return */
4682 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4683 return ret;
4684
4685 bw_data.tc_valid_bits = enabled_tc;
4686 /* bw_data.absolute_credits is not set (relative) */
4687
4688 /* Enable ETS TCs with equal BW Share for now */
4689 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4690 if (enabled_tc & BIT_ULL(i))
4691 bw_data.tc_bw_share_credits[i] = 1;
4692 }
4693
4694 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4695 &bw_data, NULL);
4696 if (ret) {
4697 dev_info(&pf->pdev->dev,
4698 "VEB bw config failed, err %s aq_err %s\n",
4699 i40e_stat_str(&pf->hw, ret),
4700 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4701 goto out;
4702 }
4703
4704 /* Update the BW information */
4705 ret = i40e_veb_get_bw_info(veb);
4706 if (ret) {
4707 dev_info(&pf->pdev->dev,
4708 "Failed getting veb bw config, err %s aq_err %s\n",
4709 i40e_stat_str(&pf->hw, ret),
4710 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4711 }
4712
4713 out:
4714 return ret;
4715 }
4716
4717 #ifdef CONFIG_I40E_DCB
4718 /**
4719 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4720 * @pf: PF struct
4721 *
4722 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4723 * the caller would've quiesce all the VSIs before calling
4724 * this function
4725 **/
4726 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4727 {
4728 u8 tc_map = 0;
4729 int ret;
4730 u8 v;
4731
4732 /* Enable the TCs available on PF to all VEBs */
4733 tc_map = i40e_pf_get_tc_map(pf);
4734 for (v = 0; v < I40E_MAX_VEB; v++) {
4735 if (!pf->veb[v])
4736 continue;
4737 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4738 if (ret) {
4739 dev_info(&pf->pdev->dev,
4740 "Failed configuring TC for VEB seid=%d\n",
4741 pf->veb[v]->seid);
4742 /* Will try to configure as many components */
4743 }
4744 }
4745
4746 /* Update each VSI */
4747 for (v = 0; v < pf->num_alloc_vsi; v++) {
4748 if (!pf->vsi[v])
4749 continue;
4750
4751 /* - Enable all TCs for the LAN VSI
4752 #ifdef I40E_FCOE
4753 * - For FCoE VSI only enable the TC configured
4754 * as per the APP TLV
4755 #endif
4756 * - For all others keep them at TC0 for now
4757 */
4758 if (v == pf->lan_vsi)
4759 tc_map = i40e_pf_get_tc_map(pf);
4760 else
4761 tc_map = i40e_pf_get_default_tc(pf);
4762 #ifdef I40E_FCOE
4763 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4764 tc_map = i40e_get_fcoe_tc_map(pf);
4765 #endif /* #ifdef I40E_FCOE */
4766
4767 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4768 if (ret) {
4769 dev_info(&pf->pdev->dev,
4770 "Failed configuring TC for VSI seid=%d\n",
4771 pf->vsi[v]->seid);
4772 /* Will try to configure as many components */
4773 } else {
4774 /* Re-configure VSI vectors based on updated TC map */
4775 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4776 if (pf->vsi[v]->netdev)
4777 i40e_dcbnl_set_all(pf->vsi[v]);
4778 }
4779 }
4780 }
4781
4782 /**
4783 * i40e_resume_port_tx - Resume port Tx
4784 * @pf: PF struct
4785 *
4786 * Resume a port's Tx and issue a PF reset in case of failure to
4787 * resume.
4788 **/
4789 static int i40e_resume_port_tx(struct i40e_pf *pf)
4790 {
4791 struct i40e_hw *hw = &pf->hw;
4792 int ret;
4793
4794 ret = i40e_aq_resume_port_tx(hw, NULL);
4795 if (ret) {
4796 dev_info(&pf->pdev->dev,
4797 "Resume Port Tx failed, err %s aq_err %s\n",
4798 i40e_stat_str(&pf->hw, ret),
4799 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4800 /* Schedule PF reset to recover */
4801 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4802 i40e_service_event_schedule(pf);
4803 }
4804
4805 return ret;
4806 }
4807
4808 /**
4809 * i40e_init_pf_dcb - Initialize DCB configuration
4810 * @pf: PF being configured
4811 *
4812 * Query the current DCB configuration and cache it
4813 * in the hardware structure
4814 **/
4815 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4816 {
4817 struct i40e_hw *hw = &pf->hw;
4818 int err = 0;
4819
4820 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4821 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4822 (pf->hw.aq.fw_maj_ver < 4))
4823 goto out;
4824
4825 /* Get the initial DCB configuration */
4826 err = i40e_init_dcb(hw);
4827 if (!err) {
4828 /* Device/Function is not DCBX capable */
4829 if ((!hw->func_caps.dcb) ||
4830 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4831 dev_info(&pf->pdev->dev,
4832 "DCBX offload is not supported or is disabled for this PF.\n");
4833
4834 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4835 goto out;
4836
4837 } else {
4838 /* When status is not DISABLED then DCBX in FW */
4839 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4840 DCB_CAP_DCBX_VER_IEEE;
4841
4842 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4843 /* Enable DCB tagging only when more than one TC */
4844 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4845 pf->flags |= I40E_FLAG_DCB_ENABLED;
4846 dev_dbg(&pf->pdev->dev,
4847 "DCBX offload is supported for this PF.\n");
4848 }
4849 } else {
4850 dev_info(&pf->pdev->dev,
4851 "Query for DCB configuration failed, err %s aq_err %s\n",
4852 i40e_stat_str(&pf->hw, err),
4853 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4854 }
4855
4856 out:
4857 return err;
4858 }
4859 #endif /* CONFIG_I40E_DCB */
4860 #define SPEED_SIZE 14
4861 #define FC_SIZE 8
4862 /**
4863 * i40e_print_link_message - print link up or down
4864 * @vsi: the VSI for which link needs a message
4865 */
4866 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4867 {
4868 char speed[SPEED_SIZE] = "Unknown";
4869 char fc[FC_SIZE] = "RX/TX";
4870
4871 if (!isup) {
4872 netdev_info(vsi->netdev, "NIC Link is Down\n");
4873 return;
4874 }
4875
4876 /* Warn user if link speed on NPAR enabled partition is not at
4877 * least 10GB
4878 */
4879 if (vsi->back->hw.func_caps.npar_enable &&
4880 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4881 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4882 netdev_warn(vsi->netdev,
4883 "The partition detected link speed that is less than 10Gbps\n");
4884
4885 switch (vsi->back->hw.phy.link_info.link_speed) {
4886 case I40E_LINK_SPEED_40GB:
4887 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4888 break;
4889 case I40E_LINK_SPEED_20GB:
4890 strncpy(speed, "20 Gbps", SPEED_SIZE);
4891 break;
4892 case I40E_LINK_SPEED_10GB:
4893 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4894 break;
4895 case I40E_LINK_SPEED_1GB:
4896 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4897 break;
4898 case I40E_LINK_SPEED_100MB:
4899 strncpy(speed, "100 Mbps", SPEED_SIZE);
4900 break;
4901 default:
4902 break;
4903 }
4904
4905 switch (vsi->back->hw.fc.current_mode) {
4906 case I40E_FC_FULL:
4907 strlcpy(fc, "RX/TX", FC_SIZE);
4908 break;
4909 case I40E_FC_TX_PAUSE:
4910 strlcpy(fc, "TX", FC_SIZE);
4911 break;
4912 case I40E_FC_RX_PAUSE:
4913 strlcpy(fc, "RX", FC_SIZE);
4914 break;
4915 default:
4916 strlcpy(fc, "None", FC_SIZE);
4917 break;
4918 }
4919
4920 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4921 speed, fc);
4922 }
4923
4924 /**
4925 * i40e_up_complete - Finish the last steps of bringing up a connection
4926 * @vsi: the VSI being configured
4927 **/
4928 static int i40e_up_complete(struct i40e_vsi *vsi)
4929 {
4930 struct i40e_pf *pf = vsi->back;
4931 int err;
4932
4933 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4934 i40e_vsi_configure_msix(vsi);
4935 else
4936 i40e_configure_msi_and_legacy(vsi);
4937
4938 /* start rings */
4939 err = i40e_vsi_control_rings(vsi, true);
4940 if (err)
4941 return err;
4942
4943 clear_bit(__I40E_DOWN, &vsi->state);
4944 i40e_napi_enable_all(vsi);
4945 i40e_vsi_enable_irq(vsi);
4946
4947 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4948 (vsi->netdev)) {
4949 i40e_print_link_message(vsi, true);
4950 netif_tx_start_all_queues(vsi->netdev);
4951 netif_carrier_on(vsi->netdev);
4952 } else if (vsi->netdev) {
4953 i40e_print_link_message(vsi, false);
4954 /* need to check for qualified module here*/
4955 if ((pf->hw.phy.link_info.link_info &
4956 I40E_AQ_MEDIA_AVAILABLE) &&
4957 (!(pf->hw.phy.link_info.an_info &
4958 I40E_AQ_QUALIFIED_MODULE)))
4959 netdev_err(vsi->netdev,
4960 "the driver failed to link because an unqualified module was detected.");
4961 }
4962
4963 /* replay FDIR SB filters */
4964 if (vsi->type == I40E_VSI_FDIR) {
4965 /* reset fd counters */
4966 pf->fd_add_err = pf->fd_atr_cnt = 0;
4967 if (pf->fd_tcp_rule > 0) {
4968 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4969 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4970 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4971 pf->fd_tcp_rule = 0;
4972 }
4973 i40e_fdir_filter_restore(vsi);
4974 }
4975 i40e_service_event_schedule(pf);
4976
4977 return 0;
4978 }
4979
4980 /**
4981 * i40e_vsi_reinit_locked - Reset the VSI
4982 * @vsi: the VSI being configured
4983 *
4984 * Rebuild the ring structs after some configuration
4985 * has changed, e.g. MTU size.
4986 **/
4987 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4988 {
4989 struct i40e_pf *pf = vsi->back;
4990
4991 WARN_ON(in_interrupt());
4992 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4993 usleep_range(1000, 2000);
4994 i40e_down(vsi);
4995
4996 /* Give a VF some time to respond to the reset. The
4997 * two second wait is based upon the watchdog cycle in
4998 * the VF driver.
4999 */
5000 if (vsi->type == I40E_VSI_SRIOV)
5001 msleep(2000);
5002 i40e_up(vsi);
5003 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5004 }
5005
5006 /**
5007 * i40e_up - Bring the connection back up after being down
5008 * @vsi: the VSI being configured
5009 **/
5010 int i40e_up(struct i40e_vsi *vsi)
5011 {
5012 int err;
5013
5014 err = i40e_vsi_configure(vsi);
5015 if (!err)
5016 err = i40e_up_complete(vsi);
5017
5018 return err;
5019 }
5020
5021 /**
5022 * i40e_down - Shutdown the connection processing
5023 * @vsi: the VSI being stopped
5024 **/
5025 void i40e_down(struct i40e_vsi *vsi)
5026 {
5027 int i;
5028
5029 /* It is assumed that the caller of this function
5030 * sets the vsi->state __I40E_DOWN bit.
5031 */
5032 if (vsi->netdev) {
5033 netif_carrier_off(vsi->netdev);
5034 netif_tx_disable(vsi->netdev);
5035 }
5036 i40e_vsi_disable_irq(vsi);
5037 i40e_vsi_control_rings(vsi, false);
5038 i40e_napi_disable_all(vsi);
5039
5040 for (i = 0; i < vsi->num_queue_pairs; i++) {
5041 i40e_clean_tx_ring(vsi->tx_rings[i]);
5042 i40e_clean_rx_ring(vsi->rx_rings[i]);
5043 }
5044 }
5045
5046 /**
5047 * i40e_setup_tc - configure multiple traffic classes
5048 * @netdev: net device to configure
5049 * @tc: number of traffic classes to enable
5050 **/
5051 #ifdef I40E_FCOE
5052 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5053 #else
5054 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5055 #endif
5056 {
5057 struct i40e_netdev_priv *np = netdev_priv(netdev);
5058 struct i40e_vsi *vsi = np->vsi;
5059 struct i40e_pf *pf = vsi->back;
5060 u8 enabled_tc = 0;
5061 int ret = -EINVAL;
5062 int i;
5063
5064 /* Check if DCB enabled to continue */
5065 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5066 netdev_info(netdev, "DCB is not enabled for adapter\n");
5067 goto exit;
5068 }
5069
5070 /* Check if MFP enabled */
5071 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5072 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5073 goto exit;
5074 }
5075
5076 /* Check whether tc count is within enabled limit */
5077 if (tc > i40e_pf_get_num_tc(pf)) {
5078 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5079 goto exit;
5080 }
5081
5082 /* Generate TC map for number of tc requested */
5083 for (i = 0; i < tc; i++)
5084 enabled_tc |= BIT_ULL(i);
5085
5086 /* Requesting same TC configuration as already enabled */
5087 if (enabled_tc == vsi->tc_config.enabled_tc)
5088 return 0;
5089
5090 /* Quiesce VSI queues */
5091 i40e_quiesce_vsi(vsi);
5092
5093 /* Configure VSI for enabled TCs */
5094 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5095 if (ret) {
5096 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5097 vsi->seid);
5098 goto exit;
5099 }
5100
5101 /* Unquiesce VSI */
5102 i40e_unquiesce_vsi(vsi);
5103
5104 exit:
5105 return ret;
5106 }
5107
5108 /**
5109 * i40e_open - Called when a network interface is made active
5110 * @netdev: network interface device structure
5111 *
5112 * The open entry point is called when a network interface is made
5113 * active by the system (IFF_UP). At this point all resources needed
5114 * for transmit and receive operations are allocated, the interrupt
5115 * handler is registered with the OS, the netdev watchdog subtask is
5116 * enabled, and the stack is notified that the interface is ready.
5117 *
5118 * Returns 0 on success, negative value on failure
5119 **/
5120 int i40e_open(struct net_device *netdev)
5121 {
5122 struct i40e_netdev_priv *np = netdev_priv(netdev);
5123 struct i40e_vsi *vsi = np->vsi;
5124 struct i40e_pf *pf = vsi->back;
5125 int err;
5126
5127 /* disallow open during test or if eeprom is broken */
5128 if (test_bit(__I40E_TESTING, &pf->state) ||
5129 test_bit(__I40E_BAD_EEPROM, &pf->state))
5130 return -EBUSY;
5131
5132 netif_carrier_off(netdev);
5133
5134 err = i40e_vsi_open(vsi);
5135 if (err)
5136 return err;
5137
5138 /* configure global TSO hardware offload settings */
5139 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5140 TCP_FLAG_FIN) >> 16);
5141 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5142 TCP_FLAG_FIN |
5143 TCP_FLAG_CWR) >> 16);
5144 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5145
5146 #ifdef CONFIG_I40E_VXLAN
5147 vxlan_get_rx_port(netdev);
5148 #endif
5149
5150 return 0;
5151 }
5152
5153 /**
5154 * i40e_vsi_open -
5155 * @vsi: the VSI to open
5156 *
5157 * Finish initialization of the VSI.
5158 *
5159 * Returns 0 on success, negative value on failure
5160 **/
5161 int i40e_vsi_open(struct i40e_vsi *vsi)
5162 {
5163 struct i40e_pf *pf = vsi->back;
5164 char int_name[I40E_INT_NAME_STR_LEN];
5165 int err;
5166
5167 /* allocate descriptors */
5168 err = i40e_vsi_setup_tx_resources(vsi);
5169 if (err)
5170 goto err_setup_tx;
5171 err = i40e_vsi_setup_rx_resources(vsi);
5172 if (err)
5173 goto err_setup_rx;
5174
5175 err = i40e_vsi_configure(vsi);
5176 if (err)
5177 goto err_setup_rx;
5178
5179 if (vsi->netdev) {
5180 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5181 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5182 err = i40e_vsi_request_irq(vsi, int_name);
5183 if (err)
5184 goto err_setup_rx;
5185
5186 /* Notify the stack of the actual queue counts. */
5187 err = netif_set_real_num_tx_queues(vsi->netdev,
5188 vsi->num_queue_pairs);
5189 if (err)
5190 goto err_set_queues;
5191
5192 err = netif_set_real_num_rx_queues(vsi->netdev,
5193 vsi->num_queue_pairs);
5194 if (err)
5195 goto err_set_queues;
5196
5197 } else if (vsi->type == I40E_VSI_FDIR) {
5198 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5199 dev_driver_string(&pf->pdev->dev),
5200 dev_name(&pf->pdev->dev));
5201 err = i40e_vsi_request_irq(vsi, int_name);
5202
5203 } else {
5204 err = -EINVAL;
5205 goto err_setup_rx;
5206 }
5207
5208 err = i40e_up_complete(vsi);
5209 if (err)
5210 goto err_up_complete;
5211
5212 return 0;
5213
5214 err_up_complete:
5215 i40e_down(vsi);
5216 err_set_queues:
5217 i40e_vsi_free_irq(vsi);
5218 err_setup_rx:
5219 i40e_vsi_free_rx_resources(vsi);
5220 err_setup_tx:
5221 i40e_vsi_free_tx_resources(vsi);
5222 if (vsi == pf->vsi[pf->lan_vsi])
5223 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5224
5225 return err;
5226 }
5227
5228 /**
5229 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5230 * @pf: Pointer to PF
5231 *
5232 * This function destroys the hlist where all the Flow Director
5233 * filters were saved.
5234 **/
5235 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5236 {
5237 struct i40e_fdir_filter *filter;
5238 struct hlist_node *node2;
5239
5240 hlist_for_each_entry_safe(filter, node2,
5241 &pf->fdir_filter_list, fdir_node) {
5242 hlist_del(&filter->fdir_node);
5243 kfree(filter);
5244 }
5245 pf->fdir_pf_active_filters = 0;
5246 }
5247
5248 /**
5249 * i40e_close - Disables a network interface
5250 * @netdev: network interface device structure
5251 *
5252 * The close entry point is called when an interface is de-activated
5253 * by the OS. The hardware is still under the driver's control, but
5254 * this netdev interface is disabled.
5255 *
5256 * Returns 0, this is not allowed to fail
5257 **/
5258 #ifdef I40E_FCOE
5259 int i40e_close(struct net_device *netdev)
5260 #else
5261 static int i40e_close(struct net_device *netdev)
5262 #endif
5263 {
5264 struct i40e_netdev_priv *np = netdev_priv(netdev);
5265 struct i40e_vsi *vsi = np->vsi;
5266
5267 i40e_vsi_close(vsi);
5268
5269 return 0;
5270 }
5271
5272 /**
5273 * i40e_do_reset - Start a PF or Core Reset sequence
5274 * @pf: board private structure
5275 * @reset_flags: which reset is requested
5276 *
5277 * The essential difference in resets is that the PF Reset
5278 * doesn't clear the packet buffers, doesn't reset the PE
5279 * firmware, and doesn't bother the other PFs on the chip.
5280 **/
5281 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5282 {
5283 u32 val;
5284
5285 WARN_ON(in_interrupt());
5286
5287 if (i40e_check_asq_alive(&pf->hw))
5288 i40e_vc_notify_reset(pf);
5289
5290 /* do the biggest reset indicated */
5291 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5292
5293 /* Request a Global Reset
5294 *
5295 * This will start the chip's countdown to the actual full
5296 * chip reset event, and a warning interrupt to be sent
5297 * to all PFs, including the requestor. Our handler
5298 * for the warning interrupt will deal with the shutdown
5299 * and recovery of the switch setup.
5300 */
5301 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5302 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5303 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5304 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5305
5306 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5307
5308 /* Request a Core Reset
5309 *
5310 * Same as Global Reset, except does *not* include the MAC/PHY
5311 */
5312 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5313 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5314 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5315 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5316 i40e_flush(&pf->hw);
5317
5318 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5319
5320 /* Request a PF Reset
5321 *
5322 * Resets only the PF-specific registers
5323 *
5324 * This goes directly to the tear-down and rebuild of
5325 * the switch, since we need to do all the recovery as
5326 * for the Core Reset.
5327 */
5328 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5329 i40e_handle_reset_warning(pf);
5330
5331 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5332 int v;
5333
5334 /* Find the VSI(s) that requested a re-init */
5335 dev_info(&pf->pdev->dev,
5336 "VSI reinit requested\n");
5337 for (v = 0; v < pf->num_alloc_vsi; v++) {
5338 struct i40e_vsi *vsi = pf->vsi[v];
5339 if (vsi != NULL &&
5340 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5341 i40e_vsi_reinit_locked(pf->vsi[v]);
5342 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5343 }
5344 }
5345
5346 /* no further action needed, so return now */
5347 return;
5348 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5349 int v;
5350
5351 /* Find the VSI(s) that needs to be brought down */
5352 dev_info(&pf->pdev->dev, "VSI down requested\n");
5353 for (v = 0; v < pf->num_alloc_vsi; v++) {
5354 struct i40e_vsi *vsi = pf->vsi[v];
5355 if (vsi != NULL &&
5356 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5357 set_bit(__I40E_DOWN, &vsi->state);
5358 i40e_down(vsi);
5359 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5360 }
5361 }
5362
5363 /* no further action needed, so return now */
5364 return;
5365 } else {
5366 dev_info(&pf->pdev->dev,
5367 "bad reset request 0x%08x\n", reset_flags);
5368 return;
5369 }
5370 }
5371
5372 #ifdef CONFIG_I40E_DCB
5373 /**
5374 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5375 * @pf: board private structure
5376 * @old_cfg: current DCB config
5377 * @new_cfg: new DCB config
5378 **/
5379 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5380 struct i40e_dcbx_config *old_cfg,
5381 struct i40e_dcbx_config *new_cfg)
5382 {
5383 bool need_reconfig = false;
5384
5385 /* Check if ETS configuration has changed */
5386 if (memcmp(&new_cfg->etscfg,
5387 &old_cfg->etscfg,
5388 sizeof(new_cfg->etscfg))) {
5389 /* If Priority Table has changed reconfig is needed */
5390 if (memcmp(&new_cfg->etscfg.prioritytable,
5391 &old_cfg->etscfg.prioritytable,
5392 sizeof(new_cfg->etscfg.prioritytable))) {
5393 need_reconfig = true;
5394 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5395 }
5396
5397 if (memcmp(&new_cfg->etscfg.tcbwtable,
5398 &old_cfg->etscfg.tcbwtable,
5399 sizeof(new_cfg->etscfg.tcbwtable)))
5400 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5401
5402 if (memcmp(&new_cfg->etscfg.tsatable,
5403 &old_cfg->etscfg.tsatable,
5404 sizeof(new_cfg->etscfg.tsatable)))
5405 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5406 }
5407
5408 /* Check if PFC configuration has changed */
5409 if (memcmp(&new_cfg->pfc,
5410 &old_cfg->pfc,
5411 sizeof(new_cfg->pfc))) {
5412 need_reconfig = true;
5413 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5414 }
5415
5416 /* Check if APP Table has changed */
5417 if (memcmp(&new_cfg->app,
5418 &old_cfg->app,
5419 sizeof(new_cfg->app))) {
5420 need_reconfig = true;
5421 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5422 }
5423
5424 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5425 need_reconfig);
5426 return need_reconfig;
5427 }
5428
5429 /**
5430 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5431 * @pf: board private structure
5432 * @e: event info posted on ARQ
5433 **/
5434 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5435 struct i40e_arq_event_info *e)
5436 {
5437 struct i40e_aqc_lldp_get_mib *mib =
5438 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5439 struct i40e_hw *hw = &pf->hw;
5440 struct i40e_dcbx_config tmp_dcbx_cfg;
5441 bool need_reconfig = false;
5442 int ret = 0;
5443 u8 type;
5444
5445 /* Not DCB capable or capability disabled */
5446 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5447 return ret;
5448
5449 /* Ignore if event is not for Nearest Bridge */
5450 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5451 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5452 dev_dbg(&pf->pdev->dev,
5453 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5454 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5455 return ret;
5456
5457 /* Check MIB Type and return if event for Remote MIB update */
5458 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5459 dev_dbg(&pf->pdev->dev,
5460 "%s: LLDP event mib type %s\n", __func__,
5461 type ? "remote" : "local");
5462 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5463 /* Update the remote cached instance and return */
5464 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5465 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5466 &hw->remote_dcbx_config);
5467 goto exit;
5468 }
5469
5470 /* Store the old configuration */
5471 tmp_dcbx_cfg = hw->local_dcbx_config;
5472
5473 /* Reset the old DCBx configuration data */
5474 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5475 /* Get updated DCBX data from firmware */
5476 ret = i40e_get_dcb_config(&pf->hw);
5477 if (ret) {
5478 dev_info(&pf->pdev->dev,
5479 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5480 i40e_stat_str(&pf->hw, ret),
5481 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5482 goto exit;
5483 }
5484
5485 /* No change detected in DCBX configs */
5486 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5487 sizeof(tmp_dcbx_cfg))) {
5488 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5489 goto exit;
5490 }
5491
5492 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5493 &hw->local_dcbx_config);
5494
5495 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5496
5497 if (!need_reconfig)
5498 goto exit;
5499
5500 /* Enable DCB tagging only when more than one TC */
5501 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5502 pf->flags |= I40E_FLAG_DCB_ENABLED;
5503 else
5504 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5505
5506 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5507 /* Reconfiguration needed quiesce all VSIs */
5508 i40e_pf_quiesce_all_vsi(pf);
5509
5510 /* Changes in configuration update VEB/VSI */
5511 i40e_dcb_reconfigure(pf);
5512
5513 ret = i40e_resume_port_tx(pf);
5514
5515 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5516 /* In case of error no point in resuming VSIs */
5517 if (ret)
5518 goto exit;
5519
5520 /* Wait for the PF's Tx queues to be disabled */
5521 ret = i40e_pf_wait_txq_disabled(pf);
5522 if (ret) {
5523 /* Schedule PF reset to recover */
5524 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5525 i40e_service_event_schedule(pf);
5526 } else {
5527 i40e_pf_unquiesce_all_vsi(pf);
5528 }
5529
5530 exit:
5531 return ret;
5532 }
5533 #endif /* CONFIG_I40E_DCB */
5534
5535 /**
5536 * i40e_do_reset_safe - Protected reset path for userland calls.
5537 * @pf: board private structure
5538 * @reset_flags: which reset is requested
5539 *
5540 **/
5541 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5542 {
5543 rtnl_lock();
5544 i40e_do_reset(pf, reset_flags);
5545 rtnl_unlock();
5546 }
5547
5548 /**
5549 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5550 * @pf: board private structure
5551 * @e: event info posted on ARQ
5552 *
5553 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5554 * and VF queues
5555 **/
5556 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5557 struct i40e_arq_event_info *e)
5558 {
5559 struct i40e_aqc_lan_overflow *data =
5560 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5561 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5562 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5563 struct i40e_hw *hw = &pf->hw;
5564 struct i40e_vf *vf;
5565 u16 vf_id;
5566
5567 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5568 queue, qtx_ctl);
5569
5570 /* Queue belongs to VF, find the VF and issue VF reset */
5571 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5572 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5573 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5574 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5575 vf_id -= hw->func_caps.vf_base_id;
5576 vf = &pf->vf[vf_id];
5577 i40e_vc_notify_vf_reset(vf);
5578 /* Allow VF to process pending reset notification */
5579 msleep(20);
5580 i40e_reset_vf(vf, false);
5581 }
5582 }
5583
5584 /**
5585 * i40e_service_event_complete - Finish up the service event
5586 * @pf: board private structure
5587 **/
5588 static void i40e_service_event_complete(struct i40e_pf *pf)
5589 {
5590 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5591
5592 /* flush memory to make sure state is correct before next watchog */
5593 smp_mb__before_atomic();
5594 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5595 }
5596
5597 /**
5598 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5599 * @pf: board private structure
5600 **/
5601 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5602 {
5603 u32 val, fcnt_prog;
5604
5605 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5606 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5607 return fcnt_prog;
5608 }
5609
5610 /**
5611 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5612 * @pf: board private structure
5613 **/
5614 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5615 {
5616 u32 val, fcnt_prog;
5617
5618 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5619 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5620 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5621 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5622 return fcnt_prog;
5623 }
5624
5625 /**
5626 * i40e_get_global_fd_count - Get total FD filters programmed on device
5627 * @pf: board private structure
5628 **/
5629 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5630 {
5631 u32 val, fcnt_prog;
5632
5633 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5634 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5635 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5636 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5637 return fcnt_prog;
5638 }
5639
5640 /**
5641 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5642 * @pf: board private structure
5643 **/
5644 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5645 {
5646 u32 fcnt_prog, fcnt_avail;
5647
5648 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5649 return;
5650
5651 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5652 * to re-enable
5653 */
5654 fcnt_prog = i40e_get_global_fd_count(pf);
5655 fcnt_avail = pf->fdir_pf_filter_count;
5656 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5657 (pf->fd_add_err == 0) ||
5658 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5659 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5660 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5661 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5662 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5663 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5664 }
5665 }
5666 /* Wait for some more space to be available to turn on ATR */
5667 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5668 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5669 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5670 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5671 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5672 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5673 }
5674 }
5675 }
5676
5677 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5678 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5679 /**
5680 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5681 * @pf: board private structure
5682 **/
5683 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5684 {
5685 unsigned long min_flush_time;
5686 int flush_wait_retry = 50;
5687 bool disable_atr = false;
5688 int fd_room;
5689 int reg;
5690
5691 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5692 return;
5693
5694 if (time_after(jiffies, pf->fd_flush_timestamp +
5695 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5696 /* If the flush is happening too quick and we have mostly
5697 * SB rules we should not re-enable ATR for some time.
5698 */
5699 min_flush_time = pf->fd_flush_timestamp
5700 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5701 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5702
5703 if (!(time_after(jiffies, min_flush_time)) &&
5704 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5705 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5706 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5707 disable_atr = true;
5708 }
5709
5710 pf->fd_flush_timestamp = jiffies;
5711 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5712 /* flush all filters */
5713 wr32(&pf->hw, I40E_PFQF_CTL_1,
5714 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5715 i40e_flush(&pf->hw);
5716 pf->fd_flush_cnt++;
5717 pf->fd_add_err = 0;
5718 do {
5719 /* Check FD flush status every 5-6msec */
5720 usleep_range(5000, 6000);
5721 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5722 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5723 break;
5724 } while (flush_wait_retry--);
5725 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5726 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5727 } else {
5728 /* replay sideband filters */
5729 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5730 if (!disable_atr)
5731 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5732 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5733 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5734 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5735 }
5736 }
5737 }
5738
5739 /**
5740 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5741 * @pf: board private structure
5742 **/
5743 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5744 {
5745 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5746 }
5747
5748 /* We can see up to 256 filter programming desc in transit if the filters are
5749 * being applied really fast; before we see the first
5750 * filter miss error on Rx queue 0. Accumulating enough error messages before
5751 * reacting will make sure we don't cause flush too often.
5752 */
5753 #define I40E_MAX_FD_PROGRAM_ERROR 256
5754
5755 /**
5756 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5757 * @pf: board private structure
5758 **/
5759 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5760 {
5761
5762 /* if interface is down do nothing */
5763 if (test_bit(__I40E_DOWN, &pf->state))
5764 return;
5765
5766 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5767 return;
5768
5769 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5770 i40e_fdir_flush_and_replay(pf);
5771
5772 i40e_fdir_check_and_reenable(pf);
5773
5774 }
5775
5776 /**
5777 * i40e_vsi_link_event - notify VSI of a link event
5778 * @vsi: vsi to be notified
5779 * @link_up: link up or down
5780 **/
5781 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5782 {
5783 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5784 return;
5785
5786 switch (vsi->type) {
5787 case I40E_VSI_MAIN:
5788 #ifdef I40E_FCOE
5789 case I40E_VSI_FCOE:
5790 #endif
5791 if (!vsi->netdev || !vsi->netdev_registered)
5792 break;
5793
5794 if (link_up) {
5795 netif_carrier_on(vsi->netdev);
5796 netif_tx_wake_all_queues(vsi->netdev);
5797 } else {
5798 netif_carrier_off(vsi->netdev);
5799 netif_tx_stop_all_queues(vsi->netdev);
5800 }
5801 break;
5802
5803 case I40E_VSI_SRIOV:
5804 case I40E_VSI_VMDQ2:
5805 case I40E_VSI_CTRL:
5806 case I40E_VSI_MIRROR:
5807 default:
5808 /* there is no notification for other VSIs */
5809 break;
5810 }
5811 }
5812
5813 /**
5814 * i40e_veb_link_event - notify elements on the veb of a link event
5815 * @veb: veb to be notified
5816 * @link_up: link up or down
5817 **/
5818 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5819 {
5820 struct i40e_pf *pf;
5821 int i;
5822
5823 if (!veb || !veb->pf)
5824 return;
5825 pf = veb->pf;
5826
5827 /* depth first... */
5828 for (i = 0; i < I40E_MAX_VEB; i++)
5829 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5830 i40e_veb_link_event(pf->veb[i], link_up);
5831
5832 /* ... now the local VSIs */
5833 for (i = 0; i < pf->num_alloc_vsi; i++)
5834 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5835 i40e_vsi_link_event(pf->vsi[i], link_up);
5836 }
5837
5838 /**
5839 * i40e_link_event - Update netif_carrier status
5840 * @pf: board private structure
5841 **/
5842 static void i40e_link_event(struct i40e_pf *pf)
5843 {
5844 bool new_link, old_link;
5845 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5846 u8 new_link_speed, old_link_speed;
5847
5848 /* set this to force the get_link_status call to refresh state */
5849 pf->hw.phy.get_link_info = true;
5850
5851 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5852 new_link = i40e_get_link_status(&pf->hw);
5853 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5854 new_link_speed = pf->hw.phy.link_info.link_speed;
5855
5856 if (new_link == old_link &&
5857 new_link_speed == old_link_speed &&
5858 (test_bit(__I40E_DOWN, &vsi->state) ||
5859 new_link == netif_carrier_ok(vsi->netdev)))
5860 return;
5861
5862 if (!test_bit(__I40E_DOWN, &vsi->state))
5863 i40e_print_link_message(vsi, new_link);
5864
5865 /* Notify the base of the switch tree connected to
5866 * the link. Floating VEBs are not notified.
5867 */
5868 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5869 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5870 else
5871 i40e_vsi_link_event(vsi, new_link);
5872
5873 if (pf->vf)
5874 i40e_vc_notify_link_state(pf);
5875
5876 if (pf->flags & I40E_FLAG_PTP)
5877 i40e_ptp_set_increment(pf);
5878 }
5879
5880 /**
5881 * i40e_watchdog_subtask - periodic checks not using event driven response
5882 * @pf: board private structure
5883 **/
5884 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5885 {
5886 int i;
5887
5888 /* if interface is down do nothing */
5889 if (test_bit(__I40E_DOWN, &pf->state) ||
5890 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5891 return;
5892
5893 /* make sure we don't do these things too often */
5894 if (time_before(jiffies, (pf->service_timer_previous +
5895 pf->service_timer_period)))
5896 return;
5897 pf->service_timer_previous = jiffies;
5898
5899 i40e_link_event(pf);
5900
5901 /* Update the stats for active netdevs so the network stack
5902 * can look at updated numbers whenever it cares to
5903 */
5904 for (i = 0; i < pf->num_alloc_vsi; i++)
5905 if (pf->vsi[i] && pf->vsi[i]->netdev)
5906 i40e_update_stats(pf->vsi[i]);
5907
5908 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5909 /* Update the stats for the active switching components */
5910 for (i = 0; i < I40E_MAX_VEB; i++)
5911 if (pf->veb[i])
5912 i40e_update_veb_stats(pf->veb[i]);
5913 }
5914
5915 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5916 }
5917
5918 /**
5919 * i40e_reset_subtask - Set up for resetting the device and driver
5920 * @pf: board private structure
5921 **/
5922 static void i40e_reset_subtask(struct i40e_pf *pf)
5923 {
5924 u32 reset_flags = 0;
5925
5926 rtnl_lock();
5927 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5928 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5929 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5930 }
5931 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5932 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5933 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5934 }
5935 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5936 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5937 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5938 }
5939 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5940 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5941 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5942 }
5943 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5944 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5945 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5946 }
5947
5948 /* If there's a recovery already waiting, it takes
5949 * precedence before starting a new reset sequence.
5950 */
5951 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5952 i40e_handle_reset_warning(pf);
5953 goto unlock;
5954 }
5955
5956 /* If we're already down or resetting, just bail */
5957 if (reset_flags &&
5958 !test_bit(__I40E_DOWN, &pf->state) &&
5959 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5960 i40e_do_reset(pf, reset_flags);
5961
5962 unlock:
5963 rtnl_unlock();
5964 }
5965
5966 /**
5967 * i40e_handle_link_event - Handle link event
5968 * @pf: board private structure
5969 * @e: event info posted on ARQ
5970 **/
5971 static void i40e_handle_link_event(struct i40e_pf *pf,
5972 struct i40e_arq_event_info *e)
5973 {
5974 struct i40e_hw *hw = &pf->hw;
5975 struct i40e_aqc_get_link_status *status =
5976 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5977
5978 /* save off old link status information */
5979 hw->phy.link_info_old = hw->phy.link_info;
5980
5981 /* Do a new status request to re-enable LSE reporting
5982 * and load new status information into the hw struct
5983 * This completely ignores any state information
5984 * in the ARQ event info, instead choosing to always
5985 * issue the AQ update link status command.
5986 */
5987 i40e_link_event(pf);
5988
5989 /* check for unqualified module, if link is down */
5990 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5991 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5992 (!(status->link_info & I40E_AQ_LINK_UP)))
5993 dev_err(&pf->pdev->dev,
5994 "The driver failed to link because an unqualified module was detected.\n");
5995 }
5996
5997 /**
5998 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5999 * @pf: board private structure
6000 **/
6001 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6002 {
6003 struct i40e_arq_event_info event;
6004 struct i40e_hw *hw = &pf->hw;
6005 u16 pending, i = 0;
6006 i40e_status ret;
6007 u16 opcode;
6008 u32 oldval;
6009 u32 val;
6010
6011 /* Do not run clean AQ when PF reset fails */
6012 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6013 return;
6014
6015 /* check for error indications */
6016 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6017 oldval = val;
6018 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6019 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6020 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6021 }
6022 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6023 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6024 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6025 }
6026 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6027 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6028 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6029 }
6030 if (oldval != val)
6031 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6032
6033 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6034 oldval = val;
6035 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6036 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6037 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6038 }
6039 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6040 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6041 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6042 }
6043 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6044 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6045 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6046 }
6047 if (oldval != val)
6048 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6049
6050 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6051 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6052 if (!event.msg_buf)
6053 return;
6054
6055 do {
6056 ret = i40e_clean_arq_element(hw, &event, &pending);
6057 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6058 break;
6059 else if (ret) {
6060 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6061 break;
6062 }
6063
6064 opcode = le16_to_cpu(event.desc.opcode);
6065 switch (opcode) {
6066
6067 case i40e_aqc_opc_get_link_status:
6068 i40e_handle_link_event(pf, &event);
6069 break;
6070 case i40e_aqc_opc_send_msg_to_pf:
6071 ret = i40e_vc_process_vf_msg(pf,
6072 le16_to_cpu(event.desc.retval),
6073 le32_to_cpu(event.desc.cookie_high),
6074 le32_to_cpu(event.desc.cookie_low),
6075 event.msg_buf,
6076 event.msg_len);
6077 break;
6078 case i40e_aqc_opc_lldp_update_mib:
6079 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6080 #ifdef CONFIG_I40E_DCB
6081 rtnl_lock();
6082 ret = i40e_handle_lldp_event(pf, &event);
6083 rtnl_unlock();
6084 #endif /* CONFIG_I40E_DCB */
6085 break;
6086 case i40e_aqc_opc_event_lan_overflow:
6087 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6088 i40e_handle_lan_overflow_event(pf, &event);
6089 break;
6090 case i40e_aqc_opc_send_msg_to_peer:
6091 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6092 break;
6093 case i40e_aqc_opc_nvm_erase:
6094 case i40e_aqc_opc_nvm_update:
6095 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6096 break;
6097 default:
6098 dev_info(&pf->pdev->dev,
6099 "ARQ Error: Unknown event 0x%04x received\n",
6100 opcode);
6101 break;
6102 }
6103 } while (pending && (i++ < pf->adminq_work_limit));
6104
6105 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6106 /* re-enable Admin queue interrupt cause */
6107 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6108 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6109 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6110 i40e_flush(hw);
6111
6112 kfree(event.msg_buf);
6113 }
6114
6115 /**
6116 * i40e_verify_eeprom - make sure eeprom is good to use
6117 * @pf: board private structure
6118 **/
6119 static void i40e_verify_eeprom(struct i40e_pf *pf)
6120 {
6121 int err;
6122
6123 err = i40e_diag_eeprom_test(&pf->hw);
6124 if (err) {
6125 /* retry in case of garbage read */
6126 err = i40e_diag_eeprom_test(&pf->hw);
6127 if (err) {
6128 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6129 err);
6130 set_bit(__I40E_BAD_EEPROM, &pf->state);
6131 }
6132 }
6133
6134 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6135 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6136 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6137 }
6138 }
6139
6140 /**
6141 * i40e_enable_pf_switch_lb
6142 * @pf: pointer to the PF structure
6143 *
6144 * enable switch loop back or die - no point in a return value
6145 **/
6146 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6147 {
6148 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6149 struct i40e_vsi_context ctxt;
6150 int ret;
6151
6152 ctxt.seid = pf->main_vsi_seid;
6153 ctxt.pf_num = pf->hw.pf_id;
6154 ctxt.vf_num = 0;
6155 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6156 if (ret) {
6157 dev_info(&pf->pdev->dev,
6158 "couldn't get PF vsi config, err %s aq_err %s\n",
6159 i40e_stat_str(&pf->hw, ret),
6160 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6161 return;
6162 }
6163 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6164 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6165 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6166
6167 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6168 if (ret) {
6169 dev_info(&pf->pdev->dev,
6170 "update vsi switch failed, err %s aq_err %s\n",
6171 i40e_stat_str(&pf->hw, ret),
6172 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6173 }
6174 }
6175
6176 /**
6177 * i40e_disable_pf_switch_lb
6178 * @pf: pointer to the PF structure
6179 *
6180 * disable switch loop back or die - no point in a return value
6181 **/
6182 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6183 {
6184 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6185 struct i40e_vsi_context ctxt;
6186 int ret;
6187
6188 ctxt.seid = pf->main_vsi_seid;
6189 ctxt.pf_num = pf->hw.pf_id;
6190 ctxt.vf_num = 0;
6191 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6192 if (ret) {
6193 dev_info(&pf->pdev->dev,
6194 "couldn't get PF vsi config, err %s aq_err %s\n",
6195 i40e_stat_str(&pf->hw, ret),
6196 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6197 return;
6198 }
6199 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6200 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6201 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6202
6203 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6204 if (ret) {
6205 dev_info(&pf->pdev->dev,
6206 "update vsi switch failed, err %s aq_err %s\n",
6207 i40e_stat_str(&pf->hw, ret),
6208 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6209 }
6210 }
6211
6212 /**
6213 * i40e_config_bridge_mode - Configure the HW bridge mode
6214 * @veb: pointer to the bridge instance
6215 *
6216 * Configure the loop back mode for the LAN VSI that is downlink to the
6217 * specified HW bridge instance. It is expected this function is called
6218 * when a new HW bridge is instantiated.
6219 **/
6220 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6221 {
6222 struct i40e_pf *pf = veb->pf;
6223
6224 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6225 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6226 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6227 i40e_disable_pf_switch_lb(pf);
6228 else
6229 i40e_enable_pf_switch_lb(pf);
6230 }
6231
6232 /**
6233 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6234 * @veb: pointer to the VEB instance
6235 *
6236 * This is a recursive function that first builds the attached VSIs then
6237 * recurses in to build the next layer of VEB. We track the connections
6238 * through our own index numbers because the seid's from the HW could
6239 * change across the reset.
6240 **/
6241 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6242 {
6243 struct i40e_vsi *ctl_vsi = NULL;
6244 struct i40e_pf *pf = veb->pf;
6245 int v, veb_idx;
6246 int ret;
6247
6248 /* build VSI that owns this VEB, temporarily attached to base VEB */
6249 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6250 if (pf->vsi[v] &&
6251 pf->vsi[v]->veb_idx == veb->idx &&
6252 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6253 ctl_vsi = pf->vsi[v];
6254 break;
6255 }
6256 }
6257 if (!ctl_vsi) {
6258 dev_info(&pf->pdev->dev,
6259 "missing owner VSI for veb_idx %d\n", veb->idx);
6260 ret = -ENOENT;
6261 goto end_reconstitute;
6262 }
6263 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6264 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6265 ret = i40e_add_vsi(ctl_vsi);
6266 if (ret) {
6267 dev_info(&pf->pdev->dev,
6268 "rebuild of veb_idx %d owner VSI failed: %d\n",
6269 veb->idx, ret);
6270 goto end_reconstitute;
6271 }
6272 i40e_vsi_reset_stats(ctl_vsi);
6273
6274 /* create the VEB in the switch and move the VSI onto the VEB */
6275 ret = i40e_add_veb(veb, ctl_vsi);
6276 if (ret)
6277 goto end_reconstitute;
6278
6279 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6280 veb->bridge_mode = BRIDGE_MODE_VEB;
6281 else
6282 veb->bridge_mode = BRIDGE_MODE_VEPA;
6283 i40e_config_bridge_mode(veb);
6284
6285 /* create the remaining VSIs attached to this VEB */
6286 for (v = 0; v < pf->num_alloc_vsi; v++) {
6287 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6288 continue;
6289
6290 if (pf->vsi[v]->veb_idx == veb->idx) {
6291 struct i40e_vsi *vsi = pf->vsi[v];
6292 vsi->uplink_seid = veb->seid;
6293 ret = i40e_add_vsi(vsi);
6294 if (ret) {
6295 dev_info(&pf->pdev->dev,
6296 "rebuild of vsi_idx %d failed: %d\n",
6297 v, ret);
6298 goto end_reconstitute;
6299 }
6300 i40e_vsi_reset_stats(vsi);
6301 }
6302 }
6303
6304 /* create any VEBs attached to this VEB - RECURSION */
6305 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6306 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6307 pf->veb[veb_idx]->uplink_seid = veb->seid;
6308 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6309 if (ret)
6310 break;
6311 }
6312 }
6313
6314 end_reconstitute:
6315 return ret;
6316 }
6317
6318 /**
6319 * i40e_get_capabilities - get info about the HW
6320 * @pf: the PF struct
6321 **/
6322 static int i40e_get_capabilities(struct i40e_pf *pf)
6323 {
6324 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6325 u16 data_size;
6326 int buf_len;
6327 int err;
6328
6329 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6330 do {
6331 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6332 if (!cap_buf)
6333 return -ENOMEM;
6334
6335 /* this loads the data into the hw struct for us */
6336 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6337 &data_size,
6338 i40e_aqc_opc_list_func_capabilities,
6339 NULL);
6340 /* data loaded, buffer no longer needed */
6341 kfree(cap_buf);
6342
6343 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6344 /* retry with a larger buffer */
6345 buf_len = data_size;
6346 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6347 dev_info(&pf->pdev->dev,
6348 "capability discovery failed, err %s aq_err %s\n",
6349 i40e_stat_str(&pf->hw, err),
6350 i40e_aq_str(&pf->hw,
6351 pf->hw.aq.asq_last_status));
6352 return -ENODEV;
6353 }
6354 } while (err);
6355
6356 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6357 (pf->hw.aq.fw_maj_ver < 2)) {
6358 pf->hw.func_caps.num_msix_vectors++;
6359 pf->hw.func_caps.num_msix_vectors_vf++;
6360 }
6361
6362 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6363 dev_info(&pf->pdev->dev,
6364 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6365 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6366 pf->hw.func_caps.num_msix_vectors,
6367 pf->hw.func_caps.num_msix_vectors_vf,
6368 pf->hw.func_caps.fd_filters_guaranteed,
6369 pf->hw.func_caps.fd_filters_best_effort,
6370 pf->hw.func_caps.num_tx_qp,
6371 pf->hw.func_caps.num_vsis);
6372
6373 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6374 + pf->hw.func_caps.num_vfs)
6375 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6376 dev_info(&pf->pdev->dev,
6377 "got num_vsis %d, setting num_vsis to %d\n",
6378 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6379 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6380 }
6381
6382 return 0;
6383 }
6384
6385 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6386
6387 /**
6388 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6389 * @pf: board private structure
6390 **/
6391 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6392 {
6393 struct i40e_vsi *vsi;
6394 int i;
6395
6396 /* quick workaround for an NVM issue that leaves a critical register
6397 * uninitialized
6398 */
6399 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6400 static const u32 hkey[] = {
6401 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6402 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6403 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6404 0x95b3a76d};
6405
6406 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6407 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6408 }
6409
6410 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6411 return;
6412
6413 /* find existing VSI and see if it needs configuring */
6414 vsi = NULL;
6415 for (i = 0; i < pf->num_alloc_vsi; i++) {
6416 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6417 vsi = pf->vsi[i];
6418 break;
6419 }
6420 }
6421
6422 /* create a new VSI if none exists */
6423 if (!vsi) {
6424 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6425 pf->vsi[pf->lan_vsi]->seid, 0);
6426 if (!vsi) {
6427 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6428 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6429 return;
6430 }
6431 }
6432
6433 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6434 }
6435
6436 /**
6437 * i40e_fdir_teardown - release the Flow Director resources
6438 * @pf: board private structure
6439 **/
6440 static void i40e_fdir_teardown(struct i40e_pf *pf)
6441 {
6442 int i;
6443
6444 i40e_fdir_filter_exit(pf);
6445 for (i = 0; i < pf->num_alloc_vsi; i++) {
6446 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6447 i40e_vsi_release(pf->vsi[i]);
6448 break;
6449 }
6450 }
6451 }
6452
6453 /**
6454 * i40e_prep_for_reset - prep for the core to reset
6455 * @pf: board private structure
6456 *
6457 * Close up the VFs and other things in prep for PF Reset.
6458 **/
6459 static void i40e_prep_for_reset(struct i40e_pf *pf)
6460 {
6461 struct i40e_hw *hw = &pf->hw;
6462 i40e_status ret = 0;
6463 u32 v;
6464
6465 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6466 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6467 return;
6468
6469 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6470
6471 /* quiesce the VSIs and their queues that are not already DOWN */
6472 i40e_pf_quiesce_all_vsi(pf);
6473
6474 for (v = 0; v < pf->num_alloc_vsi; v++) {
6475 if (pf->vsi[v])
6476 pf->vsi[v]->seid = 0;
6477 }
6478
6479 i40e_shutdown_adminq(&pf->hw);
6480
6481 /* call shutdown HMC */
6482 if (hw->hmc.hmc_obj) {
6483 ret = i40e_shutdown_lan_hmc(hw);
6484 if (ret)
6485 dev_warn(&pf->pdev->dev,
6486 "shutdown_lan_hmc failed: %d\n", ret);
6487 }
6488 }
6489
6490 /**
6491 * i40e_send_version - update firmware with driver version
6492 * @pf: PF struct
6493 */
6494 static void i40e_send_version(struct i40e_pf *pf)
6495 {
6496 struct i40e_driver_version dv;
6497
6498 dv.major_version = DRV_VERSION_MAJOR;
6499 dv.minor_version = DRV_VERSION_MINOR;
6500 dv.build_version = DRV_VERSION_BUILD;
6501 dv.subbuild_version = 0;
6502 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6503 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6504 }
6505
6506 /**
6507 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6508 * @pf: board private structure
6509 * @reinit: if the Main VSI needs to re-initialized.
6510 **/
6511 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6512 {
6513 struct i40e_hw *hw = &pf->hw;
6514 u8 set_fc_aq_fail = 0;
6515 i40e_status ret;
6516 u32 v;
6517
6518 /* Now we wait for GRST to settle out.
6519 * We don't have to delete the VEBs or VSIs from the hw switch
6520 * because the reset will make them disappear.
6521 */
6522 ret = i40e_pf_reset(hw);
6523 if (ret) {
6524 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6525 set_bit(__I40E_RESET_FAILED, &pf->state);
6526 goto clear_recovery;
6527 }
6528 pf->pfr_count++;
6529
6530 if (test_bit(__I40E_DOWN, &pf->state))
6531 goto clear_recovery;
6532 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6533
6534 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6535 ret = i40e_init_adminq(&pf->hw);
6536 if (ret) {
6537 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6538 i40e_stat_str(&pf->hw, ret),
6539 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6540 goto clear_recovery;
6541 }
6542
6543 /* re-verify the eeprom if we just had an EMP reset */
6544 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6545 i40e_verify_eeprom(pf);
6546
6547 i40e_clear_pxe_mode(hw);
6548 ret = i40e_get_capabilities(pf);
6549 if (ret)
6550 goto end_core_reset;
6551
6552 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6553 hw->func_caps.num_rx_qp,
6554 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6555 if (ret) {
6556 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6557 goto end_core_reset;
6558 }
6559 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6560 if (ret) {
6561 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6562 goto end_core_reset;
6563 }
6564
6565 #ifdef CONFIG_I40E_DCB
6566 ret = i40e_init_pf_dcb(pf);
6567 if (ret) {
6568 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6569 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6570 /* Continue without DCB enabled */
6571 }
6572 #endif /* CONFIG_I40E_DCB */
6573 #ifdef I40E_FCOE
6574 ret = i40e_init_pf_fcoe(pf);
6575 if (ret)
6576 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6577
6578 #endif
6579 /* do basic switch setup */
6580 ret = i40e_setup_pf_switch(pf, reinit);
6581 if (ret)
6582 goto end_core_reset;
6583
6584 /* driver is only interested in link up/down and module qualification
6585 * reports from firmware
6586 */
6587 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6588 I40E_AQ_EVENT_LINK_UPDOWN |
6589 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6590 if (ret)
6591 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6592 i40e_stat_str(&pf->hw, ret),
6593 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6594
6595 /* make sure our flow control settings are restored */
6596 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6597 if (ret)
6598 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6599 i40e_stat_str(&pf->hw, ret),
6600 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6601
6602 /* Rebuild the VSIs and VEBs that existed before reset.
6603 * They are still in our local switch element arrays, so only
6604 * need to rebuild the switch model in the HW.
6605 *
6606 * If there were VEBs but the reconstitution failed, we'll try
6607 * try to recover minimal use by getting the basic PF VSI working.
6608 */
6609 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6610 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6611 /* find the one VEB connected to the MAC, and find orphans */
6612 for (v = 0; v < I40E_MAX_VEB; v++) {
6613 if (!pf->veb[v])
6614 continue;
6615
6616 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6617 pf->veb[v]->uplink_seid == 0) {
6618 ret = i40e_reconstitute_veb(pf->veb[v]);
6619
6620 if (!ret)
6621 continue;
6622
6623 /* If Main VEB failed, we're in deep doodoo,
6624 * so give up rebuilding the switch and set up
6625 * for minimal rebuild of PF VSI.
6626 * If orphan failed, we'll report the error
6627 * but try to keep going.
6628 */
6629 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6630 dev_info(&pf->pdev->dev,
6631 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6632 ret);
6633 pf->vsi[pf->lan_vsi]->uplink_seid
6634 = pf->mac_seid;
6635 break;
6636 } else if (pf->veb[v]->uplink_seid == 0) {
6637 dev_info(&pf->pdev->dev,
6638 "rebuild of orphan VEB failed: %d\n",
6639 ret);
6640 }
6641 }
6642 }
6643 }
6644
6645 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6646 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6647 /* no VEB, so rebuild only the Main VSI */
6648 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6649 if (ret) {
6650 dev_info(&pf->pdev->dev,
6651 "rebuild of Main VSI failed: %d\n", ret);
6652 goto end_core_reset;
6653 }
6654 }
6655
6656 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6657 (pf->hw.aq.fw_maj_ver < 4)) {
6658 msleep(75);
6659 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6660 if (ret)
6661 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6662 i40e_stat_str(&pf->hw, ret),
6663 i40e_aq_str(&pf->hw,
6664 pf->hw.aq.asq_last_status));
6665 }
6666 /* reinit the misc interrupt */
6667 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6668 ret = i40e_setup_misc_vector(pf);
6669
6670 /* restart the VSIs that were rebuilt and running before the reset */
6671 i40e_pf_unquiesce_all_vsi(pf);
6672
6673 if (pf->num_alloc_vfs) {
6674 for (v = 0; v < pf->num_alloc_vfs; v++)
6675 i40e_reset_vf(&pf->vf[v], true);
6676 }
6677
6678 /* tell the firmware that we're starting */
6679 i40e_send_version(pf);
6680
6681 end_core_reset:
6682 clear_bit(__I40E_RESET_FAILED, &pf->state);
6683 clear_recovery:
6684 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6685 }
6686
6687 /**
6688 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6689 * @pf: board private structure
6690 *
6691 * Close up the VFs and other things in prep for a Core Reset,
6692 * then get ready to rebuild the world.
6693 **/
6694 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6695 {
6696 i40e_prep_for_reset(pf);
6697 i40e_reset_and_rebuild(pf, false);
6698 }
6699
6700 /**
6701 * i40e_handle_mdd_event
6702 * @pf: pointer to the PF structure
6703 *
6704 * Called from the MDD irq handler to identify possibly malicious vfs
6705 **/
6706 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6707 {
6708 struct i40e_hw *hw = &pf->hw;
6709 bool mdd_detected = false;
6710 bool pf_mdd_detected = false;
6711 struct i40e_vf *vf;
6712 u32 reg;
6713 int i;
6714
6715 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6716 return;
6717
6718 /* find what triggered the MDD event */
6719 reg = rd32(hw, I40E_GL_MDET_TX);
6720 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6721 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6722 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6723 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6724 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6725 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6726 I40E_GL_MDET_TX_EVENT_SHIFT;
6727 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6728 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6729 pf->hw.func_caps.base_queue;
6730 if (netif_msg_tx_err(pf))
6731 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6732 event, queue, pf_num, vf_num);
6733 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6734 mdd_detected = true;
6735 }
6736 reg = rd32(hw, I40E_GL_MDET_RX);
6737 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6738 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6739 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6740 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6741 I40E_GL_MDET_RX_EVENT_SHIFT;
6742 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6743 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6744 pf->hw.func_caps.base_queue;
6745 if (netif_msg_rx_err(pf))
6746 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6747 event, queue, func);
6748 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6749 mdd_detected = true;
6750 }
6751
6752 if (mdd_detected) {
6753 reg = rd32(hw, I40E_PF_MDET_TX);
6754 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6755 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6756 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6757 pf_mdd_detected = true;
6758 }
6759 reg = rd32(hw, I40E_PF_MDET_RX);
6760 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6761 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6762 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6763 pf_mdd_detected = true;
6764 }
6765 /* Queue belongs to the PF, initiate a reset */
6766 if (pf_mdd_detected) {
6767 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6768 i40e_service_event_schedule(pf);
6769 }
6770 }
6771
6772 /* see if one of the VFs needs its hand slapped */
6773 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6774 vf = &(pf->vf[i]);
6775 reg = rd32(hw, I40E_VP_MDET_TX(i));
6776 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6777 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6778 vf->num_mdd_events++;
6779 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6780 i);
6781 }
6782
6783 reg = rd32(hw, I40E_VP_MDET_RX(i));
6784 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6785 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6786 vf->num_mdd_events++;
6787 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6788 i);
6789 }
6790
6791 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6792 dev_info(&pf->pdev->dev,
6793 "Too many MDD events on VF %d, disabled\n", i);
6794 dev_info(&pf->pdev->dev,
6795 "Use PF Control I/F to re-enable the VF\n");
6796 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6797 }
6798 }
6799
6800 /* re-enable mdd interrupt cause */
6801 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6802 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6803 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6804 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6805 i40e_flush(hw);
6806 }
6807
6808 #ifdef CONFIG_I40E_VXLAN
6809 /**
6810 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6811 * @pf: board private structure
6812 **/
6813 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6814 {
6815 struct i40e_hw *hw = &pf->hw;
6816 i40e_status ret;
6817 __be16 port;
6818 int i;
6819
6820 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6821 return;
6822
6823 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6824
6825 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6826 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6827 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6828 port = pf->vxlan_ports[i];
6829 if (port)
6830 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6831 I40E_AQC_TUNNEL_TYPE_VXLAN,
6832 NULL, NULL);
6833 else
6834 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6835
6836 if (ret) {
6837 dev_info(&pf->pdev->dev,
6838 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6839 port ? "add" : "delete",
6840 ntohs(port), i,
6841 i40e_stat_str(&pf->hw, ret),
6842 i40e_aq_str(&pf->hw,
6843 pf->hw.aq.asq_last_status));
6844 pf->vxlan_ports[i] = 0;
6845 }
6846 }
6847 }
6848 }
6849
6850 #endif
6851 /**
6852 * i40e_service_task - Run the driver's async subtasks
6853 * @work: pointer to work_struct containing our data
6854 **/
6855 static void i40e_service_task(struct work_struct *work)
6856 {
6857 struct i40e_pf *pf = container_of(work,
6858 struct i40e_pf,
6859 service_task);
6860 unsigned long start_time = jiffies;
6861
6862 /* don't bother with service tasks if a reset is in progress */
6863 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6864 i40e_service_event_complete(pf);
6865 return;
6866 }
6867
6868 i40e_detect_recover_hung(pf);
6869 i40e_reset_subtask(pf);
6870 i40e_handle_mdd_event(pf);
6871 i40e_vc_process_vflr_event(pf);
6872 i40e_watchdog_subtask(pf);
6873 i40e_fdir_reinit_subtask(pf);
6874 i40e_sync_filters_subtask(pf);
6875 #ifdef CONFIG_I40E_VXLAN
6876 i40e_sync_vxlan_filters_subtask(pf);
6877 #endif
6878 i40e_clean_adminq_subtask(pf);
6879
6880 i40e_service_event_complete(pf);
6881
6882 /* If the tasks have taken longer than one timer cycle or there
6883 * is more work to be done, reschedule the service task now
6884 * rather than wait for the timer to tick again.
6885 */
6886 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6887 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6888 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6889 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6890 i40e_service_event_schedule(pf);
6891 }
6892
6893 /**
6894 * i40e_service_timer - timer callback
6895 * @data: pointer to PF struct
6896 **/
6897 static void i40e_service_timer(unsigned long data)
6898 {
6899 struct i40e_pf *pf = (struct i40e_pf *)data;
6900
6901 mod_timer(&pf->service_timer,
6902 round_jiffies(jiffies + pf->service_timer_period));
6903 i40e_service_event_schedule(pf);
6904 }
6905
6906 /**
6907 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6908 * @vsi: the VSI being configured
6909 **/
6910 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6911 {
6912 struct i40e_pf *pf = vsi->back;
6913
6914 switch (vsi->type) {
6915 case I40E_VSI_MAIN:
6916 vsi->alloc_queue_pairs = pf->num_lan_qps;
6917 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6918 I40E_REQ_DESCRIPTOR_MULTIPLE);
6919 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6920 vsi->num_q_vectors = pf->num_lan_msix;
6921 else
6922 vsi->num_q_vectors = 1;
6923
6924 break;
6925
6926 case I40E_VSI_FDIR:
6927 vsi->alloc_queue_pairs = 1;
6928 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6929 I40E_REQ_DESCRIPTOR_MULTIPLE);
6930 vsi->num_q_vectors = 1;
6931 break;
6932
6933 case I40E_VSI_VMDQ2:
6934 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6935 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6936 I40E_REQ_DESCRIPTOR_MULTIPLE);
6937 vsi->num_q_vectors = pf->num_vmdq_msix;
6938 break;
6939
6940 case I40E_VSI_SRIOV:
6941 vsi->alloc_queue_pairs = pf->num_vf_qps;
6942 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6943 I40E_REQ_DESCRIPTOR_MULTIPLE);
6944 break;
6945
6946 #ifdef I40E_FCOE
6947 case I40E_VSI_FCOE:
6948 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6949 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6950 I40E_REQ_DESCRIPTOR_MULTIPLE);
6951 vsi->num_q_vectors = pf->num_fcoe_msix;
6952 break;
6953
6954 #endif /* I40E_FCOE */
6955 default:
6956 WARN_ON(1);
6957 return -ENODATA;
6958 }
6959
6960 return 0;
6961 }
6962
6963 /**
6964 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6965 * @type: VSI pointer
6966 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6967 *
6968 * On error: returns error code (negative)
6969 * On success: returns 0
6970 **/
6971 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6972 {
6973 int size;
6974 int ret = 0;
6975
6976 /* allocate memory for both Tx and Rx ring pointers */
6977 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6978 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6979 if (!vsi->tx_rings)
6980 return -ENOMEM;
6981 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6982
6983 if (alloc_qvectors) {
6984 /* allocate memory for q_vector pointers */
6985 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6986 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6987 if (!vsi->q_vectors) {
6988 ret = -ENOMEM;
6989 goto err_vectors;
6990 }
6991 }
6992 return ret;
6993
6994 err_vectors:
6995 kfree(vsi->tx_rings);
6996 return ret;
6997 }
6998
6999 /**
7000 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7001 * @pf: board private structure
7002 * @type: type of VSI
7003 *
7004 * On error: returns error code (negative)
7005 * On success: returns vsi index in PF (positive)
7006 **/
7007 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7008 {
7009 int ret = -ENODEV;
7010 struct i40e_vsi *vsi;
7011 int vsi_idx;
7012 int i;
7013
7014 /* Need to protect the allocation of the VSIs at the PF level */
7015 mutex_lock(&pf->switch_mutex);
7016
7017 /* VSI list may be fragmented if VSI creation/destruction has
7018 * been happening. We can afford to do a quick scan to look
7019 * for any free VSIs in the list.
7020 *
7021 * find next empty vsi slot, looping back around if necessary
7022 */
7023 i = pf->next_vsi;
7024 while (i < pf->num_alloc_vsi && pf->vsi[i])
7025 i++;
7026 if (i >= pf->num_alloc_vsi) {
7027 i = 0;
7028 while (i < pf->next_vsi && pf->vsi[i])
7029 i++;
7030 }
7031
7032 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7033 vsi_idx = i; /* Found one! */
7034 } else {
7035 ret = -ENODEV;
7036 goto unlock_pf; /* out of VSI slots! */
7037 }
7038 pf->next_vsi = ++i;
7039
7040 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7041 if (!vsi) {
7042 ret = -ENOMEM;
7043 goto unlock_pf;
7044 }
7045 vsi->type = type;
7046 vsi->back = pf;
7047 set_bit(__I40E_DOWN, &vsi->state);
7048 vsi->flags = 0;
7049 vsi->idx = vsi_idx;
7050 vsi->rx_itr_setting = pf->rx_itr_default;
7051 vsi->tx_itr_setting = pf->tx_itr_default;
7052 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7053 pf->rss_table_size : 64;
7054 vsi->netdev_registered = false;
7055 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7056 INIT_LIST_HEAD(&vsi->mac_filter_list);
7057 vsi->irqs_ready = false;
7058
7059 ret = i40e_set_num_rings_in_vsi(vsi);
7060 if (ret)
7061 goto err_rings;
7062
7063 ret = i40e_vsi_alloc_arrays(vsi, true);
7064 if (ret)
7065 goto err_rings;
7066
7067 /* Setup default MSIX irq handler for VSI */
7068 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7069
7070 pf->vsi[vsi_idx] = vsi;
7071 ret = vsi_idx;
7072 goto unlock_pf;
7073
7074 err_rings:
7075 pf->next_vsi = i - 1;
7076 kfree(vsi);
7077 unlock_pf:
7078 mutex_unlock(&pf->switch_mutex);
7079 return ret;
7080 }
7081
7082 /**
7083 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7084 * @type: VSI pointer
7085 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7086 *
7087 * On error: returns error code (negative)
7088 * On success: returns 0
7089 **/
7090 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7091 {
7092 /* free the ring and vector containers */
7093 if (free_qvectors) {
7094 kfree(vsi->q_vectors);
7095 vsi->q_vectors = NULL;
7096 }
7097 kfree(vsi->tx_rings);
7098 vsi->tx_rings = NULL;
7099 vsi->rx_rings = NULL;
7100 }
7101
7102 /**
7103 * i40e_vsi_clear - Deallocate the VSI provided
7104 * @vsi: the VSI being un-configured
7105 **/
7106 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7107 {
7108 struct i40e_pf *pf;
7109
7110 if (!vsi)
7111 return 0;
7112
7113 if (!vsi->back)
7114 goto free_vsi;
7115 pf = vsi->back;
7116
7117 mutex_lock(&pf->switch_mutex);
7118 if (!pf->vsi[vsi->idx]) {
7119 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7120 vsi->idx, vsi->idx, vsi, vsi->type);
7121 goto unlock_vsi;
7122 }
7123
7124 if (pf->vsi[vsi->idx] != vsi) {
7125 dev_err(&pf->pdev->dev,
7126 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7127 pf->vsi[vsi->idx]->idx,
7128 pf->vsi[vsi->idx],
7129 pf->vsi[vsi->idx]->type,
7130 vsi->idx, vsi, vsi->type);
7131 goto unlock_vsi;
7132 }
7133
7134 /* updates the PF for this cleared vsi */
7135 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7136 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7137
7138 i40e_vsi_free_arrays(vsi, true);
7139
7140 pf->vsi[vsi->idx] = NULL;
7141 if (vsi->idx < pf->next_vsi)
7142 pf->next_vsi = vsi->idx;
7143
7144 unlock_vsi:
7145 mutex_unlock(&pf->switch_mutex);
7146 free_vsi:
7147 kfree(vsi);
7148
7149 return 0;
7150 }
7151
7152 /**
7153 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7154 * @vsi: the VSI being cleaned
7155 **/
7156 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7157 {
7158 int i;
7159
7160 if (vsi->tx_rings && vsi->tx_rings[0]) {
7161 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7162 kfree_rcu(vsi->tx_rings[i], rcu);
7163 vsi->tx_rings[i] = NULL;
7164 vsi->rx_rings[i] = NULL;
7165 }
7166 }
7167 }
7168
7169 /**
7170 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7171 * @vsi: the VSI being configured
7172 **/
7173 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7174 {
7175 struct i40e_ring *tx_ring, *rx_ring;
7176 struct i40e_pf *pf = vsi->back;
7177 int i;
7178
7179 /* Set basic values in the rings to be used later during open() */
7180 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7181 /* allocate space for both Tx and Rx in one shot */
7182 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7183 if (!tx_ring)
7184 goto err_out;
7185
7186 tx_ring->queue_index = i;
7187 tx_ring->reg_idx = vsi->base_queue + i;
7188 tx_ring->ring_active = false;
7189 tx_ring->vsi = vsi;
7190 tx_ring->netdev = vsi->netdev;
7191 tx_ring->dev = &pf->pdev->dev;
7192 tx_ring->count = vsi->num_desc;
7193 tx_ring->size = 0;
7194 tx_ring->dcb_tc = 0;
7195 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7196 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7197 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7198 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7199 vsi->tx_rings[i] = tx_ring;
7200
7201 rx_ring = &tx_ring[1];
7202 rx_ring->queue_index = i;
7203 rx_ring->reg_idx = vsi->base_queue + i;
7204 rx_ring->ring_active = false;
7205 rx_ring->vsi = vsi;
7206 rx_ring->netdev = vsi->netdev;
7207 rx_ring->dev = &pf->pdev->dev;
7208 rx_ring->count = vsi->num_desc;
7209 rx_ring->size = 0;
7210 rx_ring->dcb_tc = 0;
7211 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7212 set_ring_16byte_desc_enabled(rx_ring);
7213 else
7214 clear_ring_16byte_desc_enabled(rx_ring);
7215 vsi->rx_rings[i] = rx_ring;
7216 }
7217
7218 return 0;
7219
7220 err_out:
7221 i40e_vsi_clear_rings(vsi);
7222 return -ENOMEM;
7223 }
7224
7225 /**
7226 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7227 * @pf: board private structure
7228 * @vectors: the number of MSI-X vectors to request
7229 *
7230 * Returns the number of vectors reserved, or error
7231 **/
7232 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7233 {
7234 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7235 I40E_MIN_MSIX, vectors);
7236 if (vectors < 0) {
7237 dev_info(&pf->pdev->dev,
7238 "MSI-X vector reservation failed: %d\n", vectors);
7239 vectors = 0;
7240 }
7241
7242 return vectors;
7243 }
7244
7245 /**
7246 * i40e_init_msix - Setup the MSIX capability
7247 * @pf: board private structure
7248 *
7249 * Work with the OS to set up the MSIX vectors needed.
7250 *
7251 * Returns the number of vectors reserved or negative on failure
7252 **/
7253 static int i40e_init_msix(struct i40e_pf *pf)
7254 {
7255 struct i40e_hw *hw = &pf->hw;
7256 int vectors_left;
7257 int v_budget, i;
7258 int v_actual;
7259
7260 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7261 return -ENODEV;
7262
7263 /* The number of vectors we'll request will be comprised of:
7264 * - Add 1 for "other" cause for Admin Queue events, etc.
7265 * - The number of LAN queue pairs
7266 * - Queues being used for RSS.
7267 * We don't need as many as max_rss_size vectors.
7268 * use rss_size instead in the calculation since that
7269 * is governed by number of cpus in the system.
7270 * - assumes symmetric Tx/Rx pairing
7271 * - The number of VMDq pairs
7272 #ifdef I40E_FCOE
7273 * - The number of FCOE qps.
7274 #endif
7275 * Once we count this up, try the request.
7276 *
7277 * If we can't get what we want, we'll simplify to nearly nothing
7278 * and try again. If that still fails, we punt.
7279 */
7280 vectors_left = hw->func_caps.num_msix_vectors;
7281 v_budget = 0;
7282
7283 /* reserve one vector for miscellaneous handler */
7284 if (vectors_left) {
7285 v_budget++;
7286 vectors_left--;
7287 }
7288
7289 /* reserve vectors for the main PF traffic queues */
7290 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7291 vectors_left -= pf->num_lan_msix;
7292 v_budget += pf->num_lan_msix;
7293
7294 /* reserve one vector for sideband flow director */
7295 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7296 if (vectors_left) {
7297 v_budget++;
7298 vectors_left--;
7299 } else {
7300 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7301 }
7302 }
7303
7304 #ifdef I40E_FCOE
7305 /* can we reserve enough for FCoE? */
7306 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7307 if (!vectors_left)
7308 pf->num_fcoe_msix = 0;
7309 else if (vectors_left >= pf->num_fcoe_qps)
7310 pf->num_fcoe_msix = pf->num_fcoe_qps;
7311 else
7312 pf->num_fcoe_msix = 1;
7313 v_budget += pf->num_fcoe_msix;
7314 vectors_left -= pf->num_fcoe_msix;
7315 }
7316
7317 #endif
7318 /* any vectors left over go for VMDq support */
7319 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7320 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7321 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7322
7323 /* if we're short on vectors for what's desired, we limit
7324 * the queues per vmdq. If this is still more than are
7325 * available, the user will need to change the number of
7326 * queues/vectors used by the PF later with the ethtool
7327 * channels command
7328 */
7329 if (vmdq_vecs < vmdq_vecs_wanted)
7330 pf->num_vmdq_qps = 1;
7331 pf->num_vmdq_msix = pf->num_vmdq_qps;
7332
7333 v_budget += vmdq_vecs;
7334 vectors_left -= vmdq_vecs;
7335 }
7336
7337 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7338 GFP_KERNEL);
7339 if (!pf->msix_entries)
7340 return -ENOMEM;
7341
7342 for (i = 0; i < v_budget; i++)
7343 pf->msix_entries[i].entry = i;
7344 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7345
7346 if (v_actual != v_budget) {
7347 /* If we have limited resources, we will start with no vectors
7348 * for the special features and then allocate vectors to some
7349 * of these features based on the policy and at the end disable
7350 * the features that did not get any vectors.
7351 */
7352 #ifdef I40E_FCOE
7353 pf->num_fcoe_qps = 0;
7354 pf->num_fcoe_msix = 0;
7355 #endif
7356 pf->num_vmdq_msix = 0;
7357 }
7358
7359 if (v_actual < I40E_MIN_MSIX) {
7360 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7361 kfree(pf->msix_entries);
7362 pf->msix_entries = NULL;
7363 return -ENODEV;
7364
7365 } else if (v_actual == I40E_MIN_MSIX) {
7366 /* Adjust for minimal MSIX use */
7367 pf->num_vmdq_vsis = 0;
7368 pf->num_vmdq_qps = 0;
7369 pf->num_lan_qps = 1;
7370 pf->num_lan_msix = 1;
7371
7372 } else if (v_actual != v_budget) {
7373 int vec;
7374
7375 /* reserve the misc vector */
7376 vec = v_actual - 1;
7377
7378 /* Scale vector usage down */
7379 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7380 pf->num_vmdq_vsis = 1;
7381 pf->num_vmdq_qps = 1;
7382 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7383
7384 /* partition out the remaining vectors */
7385 switch (vec) {
7386 case 2:
7387 pf->num_lan_msix = 1;
7388 break;
7389 case 3:
7390 #ifdef I40E_FCOE
7391 /* give one vector to FCoE */
7392 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7393 pf->num_lan_msix = 1;
7394 pf->num_fcoe_msix = 1;
7395 }
7396 #else
7397 pf->num_lan_msix = 2;
7398 #endif
7399 break;
7400 default:
7401 #ifdef I40E_FCOE
7402 /* give one vector to FCoE */
7403 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7404 pf->num_fcoe_msix = 1;
7405 vec--;
7406 }
7407 #endif
7408 /* give the rest to the PF */
7409 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7410 break;
7411 }
7412 }
7413
7414 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7415 (pf->num_vmdq_msix == 0)) {
7416 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7417 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7418 }
7419 #ifdef I40E_FCOE
7420
7421 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7422 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7423 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7424 }
7425 #endif
7426 return v_actual;
7427 }
7428
7429 /**
7430 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7431 * @vsi: the VSI being configured
7432 * @v_idx: index of the vector in the vsi struct
7433 *
7434 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7435 **/
7436 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7437 {
7438 struct i40e_q_vector *q_vector;
7439
7440 /* allocate q_vector */
7441 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7442 if (!q_vector)
7443 return -ENOMEM;
7444
7445 q_vector->vsi = vsi;
7446 q_vector->v_idx = v_idx;
7447 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7448 if (vsi->netdev)
7449 netif_napi_add(vsi->netdev, &q_vector->napi,
7450 i40e_napi_poll, NAPI_POLL_WEIGHT);
7451
7452 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7453 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7454
7455 /* tie q_vector and vsi together */
7456 vsi->q_vectors[v_idx] = q_vector;
7457
7458 return 0;
7459 }
7460
7461 /**
7462 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7463 * @vsi: the VSI being configured
7464 *
7465 * We allocate one q_vector per queue interrupt. If allocation fails we
7466 * return -ENOMEM.
7467 **/
7468 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7469 {
7470 struct i40e_pf *pf = vsi->back;
7471 int v_idx, num_q_vectors;
7472 int err;
7473
7474 /* if not MSIX, give the one vector only to the LAN VSI */
7475 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7476 num_q_vectors = vsi->num_q_vectors;
7477 else if (vsi == pf->vsi[pf->lan_vsi])
7478 num_q_vectors = 1;
7479 else
7480 return -EINVAL;
7481
7482 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7483 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7484 if (err)
7485 goto err_out;
7486 }
7487
7488 return 0;
7489
7490 err_out:
7491 while (v_idx--)
7492 i40e_free_q_vector(vsi, v_idx);
7493
7494 return err;
7495 }
7496
7497 /**
7498 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7499 * @pf: board private structure to initialize
7500 **/
7501 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7502 {
7503 int vectors = 0;
7504 ssize_t size;
7505
7506 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7507 vectors = i40e_init_msix(pf);
7508 if (vectors < 0) {
7509 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7510 #ifdef I40E_FCOE
7511 I40E_FLAG_FCOE_ENABLED |
7512 #endif
7513 I40E_FLAG_RSS_ENABLED |
7514 I40E_FLAG_DCB_CAPABLE |
7515 I40E_FLAG_SRIOV_ENABLED |
7516 I40E_FLAG_FD_SB_ENABLED |
7517 I40E_FLAG_FD_ATR_ENABLED |
7518 I40E_FLAG_VMDQ_ENABLED);
7519
7520 /* rework the queue expectations without MSIX */
7521 i40e_determine_queue_usage(pf);
7522 }
7523 }
7524
7525 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7526 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7527 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7528 vectors = pci_enable_msi(pf->pdev);
7529 if (vectors < 0) {
7530 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7531 vectors);
7532 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7533 }
7534 vectors = 1; /* one MSI or Legacy vector */
7535 }
7536
7537 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7538 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7539
7540 /* set up vector assignment tracking */
7541 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7542 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7543 if (!pf->irq_pile) {
7544 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7545 return -ENOMEM;
7546 }
7547 pf->irq_pile->num_entries = vectors;
7548 pf->irq_pile->search_hint = 0;
7549
7550 /* track first vector for misc interrupts, ignore return */
7551 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7552
7553 return 0;
7554 }
7555
7556 /**
7557 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7558 * @pf: board private structure
7559 *
7560 * This sets up the handler for MSIX 0, which is used to manage the
7561 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7562 * when in MSI or Legacy interrupt mode.
7563 **/
7564 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7565 {
7566 struct i40e_hw *hw = &pf->hw;
7567 int err = 0;
7568
7569 /* Only request the irq if this is the first time through, and
7570 * not when we're rebuilding after a Reset
7571 */
7572 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7573 err = request_irq(pf->msix_entries[0].vector,
7574 i40e_intr, 0, pf->int_name, pf);
7575 if (err) {
7576 dev_info(&pf->pdev->dev,
7577 "request_irq for %s failed: %d\n",
7578 pf->int_name, err);
7579 return -EFAULT;
7580 }
7581 }
7582
7583 i40e_enable_misc_int_causes(pf);
7584
7585 /* associate no queues to the misc vector */
7586 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7587 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7588
7589 i40e_flush(hw);
7590
7591 i40e_irq_dynamic_enable_icr0(pf);
7592
7593 return err;
7594 }
7595
7596 /**
7597 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7598 * @vsi: vsi structure
7599 * @seed: RSS hash seed
7600 **/
7601 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7602 {
7603 struct i40e_aqc_get_set_rss_key_data rss_key;
7604 struct i40e_pf *pf = vsi->back;
7605 struct i40e_hw *hw = &pf->hw;
7606 bool pf_lut = false;
7607 u8 *rss_lut;
7608 int ret, i;
7609
7610 memset(&rss_key, 0, sizeof(rss_key));
7611 memcpy(&rss_key, seed, sizeof(rss_key));
7612
7613 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7614 if (!rss_lut)
7615 return -ENOMEM;
7616
7617 /* Populate the LUT with max no. of queues in round robin fashion */
7618 for (i = 0; i < vsi->rss_table_size; i++)
7619 rss_lut[i] = i % vsi->rss_size;
7620
7621 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7622 if (ret) {
7623 dev_info(&pf->pdev->dev,
7624 "Cannot set RSS key, err %s aq_err %s\n",
7625 i40e_stat_str(&pf->hw, ret),
7626 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7627 return ret;
7628 }
7629
7630 if (vsi->type == I40E_VSI_MAIN)
7631 pf_lut = true;
7632
7633 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7634 vsi->rss_table_size);
7635 if (ret)
7636 dev_info(&pf->pdev->dev,
7637 "Cannot set RSS lut, err %s aq_err %s\n",
7638 i40e_stat_str(&pf->hw, ret),
7639 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7640
7641 return ret;
7642 }
7643
7644 /**
7645 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7646 * @vsi: VSI structure
7647 **/
7648 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7649 {
7650 u8 seed[I40E_HKEY_ARRAY_SIZE];
7651 struct i40e_pf *pf = vsi->back;
7652
7653 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7654 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7655
7656 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7657 return i40e_config_rss_aq(vsi, seed);
7658
7659 return 0;
7660 }
7661
7662 /**
7663 * i40e_config_rss_reg - Prepare for RSS if used
7664 * @pf: board private structure
7665 * @seed: RSS hash seed
7666 **/
7667 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7668 {
7669 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7670 struct i40e_hw *hw = &pf->hw;
7671 u32 *seed_dw = (u32 *)seed;
7672 u32 current_queue = 0;
7673 u32 lut = 0;
7674 int i, j;
7675
7676 /* Fill out hash function seed */
7677 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7678 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7679
7680 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7681 lut = 0;
7682 for (j = 0; j < 4; j++) {
7683 if (current_queue == vsi->rss_size)
7684 current_queue = 0;
7685 lut |= ((current_queue) << (8 * j));
7686 current_queue++;
7687 }
7688 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7689 }
7690 i40e_flush(hw);
7691
7692 return 0;
7693 }
7694
7695 /**
7696 * i40e_config_rss - Prepare for RSS if used
7697 * @pf: board private structure
7698 **/
7699 static int i40e_config_rss(struct i40e_pf *pf)
7700 {
7701 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7702 u8 seed[I40E_HKEY_ARRAY_SIZE];
7703 struct i40e_hw *hw = &pf->hw;
7704 u32 reg_val;
7705 u64 hena;
7706
7707 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7708
7709 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7710 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7711 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7712 hena |= i40e_pf_get_default_rss_hena(pf);
7713
7714 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7715 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7716
7717 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7718
7719 /* Determine the RSS table size based on the hardware capabilities */
7720 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7721 reg_val = (pf->rss_table_size == 512) ?
7722 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7723 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7724 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7725
7726 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7727 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7728 else
7729 return i40e_config_rss_reg(pf, seed);
7730 }
7731
7732 /**
7733 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7734 * @pf: board private structure
7735 * @queue_count: the requested queue count for rss.
7736 *
7737 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7738 * count which may be different from the requested queue count.
7739 **/
7740 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7741 {
7742 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7743 int new_rss_size;
7744
7745 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7746 return 0;
7747
7748 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7749
7750 if (queue_count != vsi->num_queue_pairs) {
7751 vsi->req_queue_pairs = queue_count;
7752 i40e_prep_for_reset(pf);
7753
7754 pf->rss_size = new_rss_size;
7755
7756 i40e_reset_and_rebuild(pf, true);
7757 i40e_config_rss(pf);
7758 }
7759 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7760 return pf->rss_size;
7761 }
7762
7763 /**
7764 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7765 * @pf: board private structure
7766 **/
7767 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7768 {
7769 i40e_status status;
7770 bool min_valid, max_valid;
7771 u32 max_bw, min_bw;
7772
7773 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7774 &min_valid, &max_valid);
7775
7776 if (!status) {
7777 if (min_valid)
7778 pf->npar_min_bw = min_bw;
7779 if (max_valid)
7780 pf->npar_max_bw = max_bw;
7781 }
7782
7783 return status;
7784 }
7785
7786 /**
7787 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7788 * @pf: board private structure
7789 **/
7790 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7791 {
7792 struct i40e_aqc_configure_partition_bw_data bw_data;
7793 i40e_status status;
7794
7795 /* Set the valid bit for this PF */
7796 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7797 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7798 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7799
7800 /* Set the new bandwidths */
7801 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7802
7803 return status;
7804 }
7805
7806 /**
7807 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7808 * @pf: board private structure
7809 **/
7810 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7811 {
7812 /* Commit temporary BW setting to permanent NVM image */
7813 enum i40e_admin_queue_err last_aq_status;
7814 i40e_status ret;
7815 u16 nvm_word;
7816
7817 if (pf->hw.partition_id != 1) {
7818 dev_info(&pf->pdev->dev,
7819 "Commit BW only works on partition 1! This is partition %d",
7820 pf->hw.partition_id);
7821 ret = I40E_NOT_SUPPORTED;
7822 goto bw_commit_out;
7823 }
7824
7825 /* Acquire NVM for read access */
7826 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7827 last_aq_status = pf->hw.aq.asq_last_status;
7828 if (ret) {
7829 dev_info(&pf->pdev->dev,
7830 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7831 i40e_stat_str(&pf->hw, ret),
7832 i40e_aq_str(&pf->hw, last_aq_status));
7833 goto bw_commit_out;
7834 }
7835
7836 /* Read word 0x10 of NVM - SW compatibility word 1 */
7837 ret = i40e_aq_read_nvm(&pf->hw,
7838 I40E_SR_NVM_CONTROL_WORD,
7839 0x10, sizeof(nvm_word), &nvm_word,
7840 false, NULL);
7841 /* Save off last admin queue command status before releasing
7842 * the NVM
7843 */
7844 last_aq_status = pf->hw.aq.asq_last_status;
7845 i40e_release_nvm(&pf->hw);
7846 if (ret) {
7847 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7848 i40e_stat_str(&pf->hw, ret),
7849 i40e_aq_str(&pf->hw, last_aq_status));
7850 goto bw_commit_out;
7851 }
7852
7853 /* Wait a bit for NVM release to complete */
7854 msleep(50);
7855
7856 /* Acquire NVM for write access */
7857 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7858 last_aq_status = pf->hw.aq.asq_last_status;
7859 if (ret) {
7860 dev_info(&pf->pdev->dev,
7861 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7862 i40e_stat_str(&pf->hw, ret),
7863 i40e_aq_str(&pf->hw, last_aq_status));
7864 goto bw_commit_out;
7865 }
7866 /* Write it back out unchanged to initiate update NVM,
7867 * which will force a write of the shadow (alt) RAM to
7868 * the NVM - thus storing the bandwidth values permanently.
7869 */
7870 ret = i40e_aq_update_nvm(&pf->hw,
7871 I40E_SR_NVM_CONTROL_WORD,
7872 0x10, sizeof(nvm_word),
7873 &nvm_word, true, NULL);
7874 /* Save off last admin queue command status before releasing
7875 * the NVM
7876 */
7877 last_aq_status = pf->hw.aq.asq_last_status;
7878 i40e_release_nvm(&pf->hw);
7879 if (ret)
7880 dev_info(&pf->pdev->dev,
7881 "BW settings NOT SAVED, err %s aq_err %s\n",
7882 i40e_stat_str(&pf->hw, ret),
7883 i40e_aq_str(&pf->hw, last_aq_status));
7884 bw_commit_out:
7885
7886 return ret;
7887 }
7888
7889 /**
7890 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7891 * @pf: board private structure to initialize
7892 *
7893 * i40e_sw_init initializes the Adapter private data structure.
7894 * Fields are initialized based on PCI device information and
7895 * OS network device settings (MTU size).
7896 **/
7897 static int i40e_sw_init(struct i40e_pf *pf)
7898 {
7899 int err = 0;
7900 int size;
7901
7902 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7903 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7904 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7905 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7906 if (I40E_DEBUG_USER & debug)
7907 pf->hw.debug_mask = debug;
7908 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7909 I40E_DEFAULT_MSG_ENABLE);
7910 }
7911
7912 /* Set default capability flags */
7913 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7914 I40E_FLAG_MSI_ENABLED |
7915 I40E_FLAG_MSIX_ENABLED;
7916
7917 if (iommu_present(&pci_bus_type))
7918 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7919 else
7920 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7921
7922 /* Set default ITR */
7923 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7924 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7925
7926 /* Depending on PF configurations, it is possible that the RSS
7927 * maximum might end up larger than the available queues
7928 */
7929 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7930 pf->rss_size = 1;
7931 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7932 pf->rss_size_max = min_t(int, pf->rss_size_max,
7933 pf->hw.func_caps.num_tx_qp);
7934 if (pf->hw.func_caps.rss) {
7935 pf->flags |= I40E_FLAG_RSS_ENABLED;
7936 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7937 }
7938
7939 /* MFP mode enabled */
7940 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7941 pf->flags |= I40E_FLAG_MFP_ENABLED;
7942 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7943 if (i40e_get_npar_bw_setting(pf))
7944 dev_warn(&pf->pdev->dev,
7945 "Could not get NPAR bw settings\n");
7946 else
7947 dev_info(&pf->pdev->dev,
7948 "Min BW = %8.8x, Max BW = %8.8x\n",
7949 pf->npar_min_bw, pf->npar_max_bw);
7950 }
7951
7952 /* FW/NVM is not yet fixed in this regard */
7953 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7954 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7955 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7956 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7957 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7958 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7959 } else {
7960 dev_info(&pf->pdev->dev,
7961 "Flow Director Sideband mode Disabled in MFP mode\n");
7962 }
7963 pf->fdir_pf_filter_count =
7964 pf->hw.func_caps.fd_filters_guaranteed;
7965 pf->hw.fdir_shared_filter_count =
7966 pf->hw.func_caps.fd_filters_best_effort;
7967 }
7968
7969 if (pf->hw.func_caps.vmdq) {
7970 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7971 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7972 }
7973
7974 #ifdef I40E_FCOE
7975 err = i40e_init_pf_fcoe(pf);
7976 if (err)
7977 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7978
7979 #endif /* I40E_FCOE */
7980 #ifdef CONFIG_PCI_IOV
7981 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7982 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7983 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7984 pf->num_req_vfs = min_t(int,
7985 pf->hw.func_caps.num_vfs,
7986 I40E_MAX_VF_COUNT);
7987 }
7988 #endif /* CONFIG_PCI_IOV */
7989 if (pf->hw.mac.type == I40E_MAC_X722) {
7990 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7991 I40E_FLAG_128_QP_RSS_CAPABLE |
7992 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7993 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7994 I40E_FLAG_WB_ON_ITR_CAPABLE |
7995 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7996 }
7997 pf->eeprom_version = 0xDEAD;
7998 pf->lan_veb = I40E_NO_VEB;
7999 pf->lan_vsi = I40E_NO_VSI;
8000
8001 /* By default FW has this off for performance reasons */
8002 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8003
8004 /* set up queue assignment tracking */
8005 size = sizeof(struct i40e_lump_tracking)
8006 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8007 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8008 if (!pf->qp_pile) {
8009 err = -ENOMEM;
8010 goto sw_init_done;
8011 }
8012 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8013 pf->qp_pile->search_hint = 0;
8014
8015 pf->tx_timeout_recovery_level = 1;
8016
8017 mutex_init(&pf->switch_mutex);
8018
8019 /* If NPAR is enabled nudge the Tx scheduler */
8020 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8021 i40e_set_npar_bw_setting(pf);
8022
8023 sw_init_done:
8024 return err;
8025 }
8026
8027 /**
8028 * i40e_set_ntuple - set the ntuple feature flag and take action
8029 * @pf: board private structure to initialize
8030 * @features: the feature set that the stack is suggesting
8031 *
8032 * returns a bool to indicate if reset needs to happen
8033 **/
8034 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8035 {
8036 bool need_reset = false;
8037
8038 /* Check if Flow Director n-tuple support was enabled or disabled. If
8039 * the state changed, we need to reset.
8040 */
8041 if (features & NETIF_F_NTUPLE) {
8042 /* Enable filters and mark for reset */
8043 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8044 need_reset = true;
8045 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8046 } else {
8047 /* turn off filters, mark for reset and clear SW filter list */
8048 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8049 need_reset = true;
8050 i40e_fdir_filter_exit(pf);
8051 }
8052 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8053 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8054 /* reset fd counters */
8055 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8056 pf->fdir_pf_active_filters = 0;
8057 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8058 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8059 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8060 /* if ATR was auto disabled it can be re-enabled. */
8061 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8062 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8063 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8064 }
8065 return need_reset;
8066 }
8067
8068 /**
8069 * i40e_set_features - set the netdev feature flags
8070 * @netdev: ptr to the netdev being adjusted
8071 * @features: the feature set that the stack is suggesting
8072 **/
8073 static int i40e_set_features(struct net_device *netdev,
8074 netdev_features_t features)
8075 {
8076 struct i40e_netdev_priv *np = netdev_priv(netdev);
8077 struct i40e_vsi *vsi = np->vsi;
8078 struct i40e_pf *pf = vsi->back;
8079 bool need_reset;
8080
8081 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8082 i40e_vlan_stripping_enable(vsi);
8083 else
8084 i40e_vlan_stripping_disable(vsi);
8085
8086 need_reset = i40e_set_ntuple(pf, features);
8087
8088 if (need_reset)
8089 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8090
8091 return 0;
8092 }
8093
8094 #ifdef CONFIG_I40E_VXLAN
8095 /**
8096 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8097 * @pf: board private structure
8098 * @port: The UDP port to look up
8099 *
8100 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8101 **/
8102 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8103 {
8104 u8 i;
8105
8106 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8107 if (pf->vxlan_ports[i] == port)
8108 return i;
8109 }
8110
8111 return i;
8112 }
8113
8114 /**
8115 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8116 * @netdev: This physical port's netdev
8117 * @sa_family: Socket Family that VXLAN is notifying us about
8118 * @port: New UDP port number that VXLAN started listening to
8119 **/
8120 static void i40e_add_vxlan_port(struct net_device *netdev,
8121 sa_family_t sa_family, __be16 port)
8122 {
8123 struct i40e_netdev_priv *np = netdev_priv(netdev);
8124 struct i40e_vsi *vsi = np->vsi;
8125 struct i40e_pf *pf = vsi->back;
8126 u8 next_idx;
8127 u8 idx;
8128
8129 if (sa_family == AF_INET6)
8130 return;
8131
8132 idx = i40e_get_vxlan_port_idx(pf, port);
8133
8134 /* Check if port already exists */
8135 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8136 netdev_info(netdev, "vxlan port %d already offloaded\n",
8137 ntohs(port));
8138 return;
8139 }
8140
8141 /* Now check if there is space to add the new port */
8142 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8143
8144 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8145 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8146 ntohs(port));
8147 return;
8148 }
8149
8150 /* New port: add it and mark its index in the bitmap */
8151 pf->vxlan_ports[next_idx] = port;
8152 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8153 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8154 }
8155
8156 /**
8157 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8158 * @netdev: This physical port's netdev
8159 * @sa_family: Socket Family that VXLAN is notifying us about
8160 * @port: UDP port number that VXLAN stopped listening to
8161 **/
8162 static void i40e_del_vxlan_port(struct net_device *netdev,
8163 sa_family_t sa_family, __be16 port)
8164 {
8165 struct i40e_netdev_priv *np = netdev_priv(netdev);
8166 struct i40e_vsi *vsi = np->vsi;
8167 struct i40e_pf *pf = vsi->back;
8168 u8 idx;
8169
8170 if (sa_family == AF_INET6)
8171 return;
8172
8173 idx = i40e_get_vxlan_port_idx(pf, port);
8174
8175 /* Check if port already exists */
8176 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8177 /* if port exists, set it to 0 (mark for deletion)
8178 * and make it pending
8179 */
8180 pf->vxlan_ports[idx] = 0;
8181 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8182 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8183 } else {
8184 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8185 ntohs(port));
8186 }
8187 }
8188
8189 #endif
8190 static int i40e_get_phys_port_id(struct net_device *netdev,
8191 struct netdev_phys_item_id *ppid)
8192 {
8193 struct i40e_netdev_priv *np = netdev_priv(netdev);
8194 struct i40e_pf *pf = np->vsi->back;
8195 struct i40e_hw *hw = &pf->hw;
8196
8197 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8198 return -EOPNOTSUPP;
8199
8200 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8201 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8202
8203 return 0;
8204 }
8205
8206 /**
8207 * i40e_ndo_fdb_add - add an entry to the hardware database
8208 * @ndm: the input from the stack
8209 * @tb: pointer to array of nladdr (unused)
8210 * @dev: the net device pointer
8211 * @addr: the MAC address entry being added
8212 * @flags: instructions from stack about fdb operation
8213 */
8214 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8215 struct net_device *dev,
8216 const unsigned char *addr, u16 vid,
8217 u16 flags)
8218 {
8219 struct i40e_netdev_priv *np = netdev_priv(dev);
8220 struct i40e_pf *pf = np->vsi->back;
8221 int err = 0;
8222
8223 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8224 return -EOPNOTSUPP;
8225
8226 if (vid) {
8227 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8228 return -EINVAL;
8229 }
8230
8231 /* Hardware does not support aging addresses so if a
8232 * ndm_state is given only allow permanent addresses
8233 */
8234 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8235 netdev_info(dev, "FDB only supports static addresses\n");
8236 return -EINVAL;
8237 }
8238
8239 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8240 err = dev_uc_add_excl(dev, addr);
8241 else if (is_multicast_ether_addr(addr))
8242 err = dev_mc_add_excl(dev, addr);
8243 else
8244 err = -EINVAL;
8245
8246 /* Only return duplicate errors if NLM_F_EXCL is set */
8247 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8248 err = 0;
8249
8250 return err;
8251 }
8252
8253 /**
8254 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8255 * @dev: the netdev being configured
8256 * @nlh: RTNL message
8257 *
8258 * Inserts a new hardware bridge if not already created and
8259 * enables the bridging mode requested (VEB or VEPA). If the
8260 * hardware bridge has already been inserted and the request
8261 * is to change the mode then that requires a PF reset to
8262 * allow rebuild of the components with required hardware
8263 * bridge mode enabled.
8264 **/
8265 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8266 struct nlmsghdr *nlh,
8267 u16 flags)
8268 {
8269 struct i40e_netdev_priv *np = netdev_priv(dev);
8270 struct i40e_vsi *vsi = np->vsi;
8271 struct i40e_pf *pf = vsi->back;
8272 struct i40e_veb *veb = NULL;
8273 struct nlattr *attr, *br_spec;
8274 int i, rem;
8275
8276 /* Only for PF VSI for now */
8277 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8278 return -EOPNOTSUPP;
8279
8280 /* Find the HW bridge for PF VSI */
8281 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8282 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8283 veb = pf->veb[i];
8284 }
8285
8286 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8287
8288 nla_for_each_nested(attr, br_spec, rem) {
8289 __u16 mode;
8290
8291 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8292 continue;
8293
8294 mode = nla_get_u16(attr);
8295 if ((mode != BRIDGE_MODE_VEPA) &&
8296 (mode != BRIDGE_MODE_VEB))
8297 return -EINVAL;
8298
8299 /* Insert a new HW bridge */
8300 if (!veb) {
8301 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8302 vsi->tc_config.enabled_tc);
8303 if (veb) {
8304 veb->bridge_mode = mode;
8305 i40e_config_bridge_mode(veb);
8306 } else {
8307 /* No Bridge HW offload available */
8308 return -ENOENT;
8309 }
8310 break;
8311 } else if (mode != veb->bridge_mode) {
8312 /* Existing HW bridge but different mode needs reset */
8313 veb->bridge_mode = mode;
8314 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8315 if (mode == BRIDGE_MODE_VEB)
8316 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8317 else
8318 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8319 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8320 break;
8321 }
8322 }
8323
8324 return 0;
8325 }
8326
8327 /**
8328 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8329 * @skb: skb buff
8330 * @pid: process id
8331 * @seq: RTNL message seq #
8332 * @dev: the netdev being configured
8333 * @filter_mask: unused
8334 *
8335 * Return the mode in which the hardware bridge is operating in
8336 * i.e VEB or VEPA.
8337 **/
8338 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8339 struct net_device *dev,
8340 u32 filter_mask, int nlflags)
8341 {
8342 struct i40e_netdev_priv *np = netdev_priv(dev);
8343 struct i40e_vsi *vsi = np->vsi;
8344 struct i40e_pf *pf = vsi->back;
8345 struct i40e_veb *veb = NULL;
8346 int i;
8347
8348 /* Only for PF VSI for now */
8349 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8350 return -EOPNOTSUPP;
8351
8352 /* Find the HW bridge for the PF VSI */
8353 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8354 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8355 veb = pf->veb[i];
8356 }
8357
8358 if (!veb)
8359 return 0;
8360
8361 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8362 nlflags, 0, 0, filter_mask, NULL);
8363 }
8364
8365 #define I40E_MAX_TUNNEL_HDR_LEN 80
8366 /**
8367 * i40e_features_check - Validate encapsulated packet conforms to limits
8368 * @skb: skb buff
8369 * @netdev: This physical port's netdev
8370 * @features: Offload features that the stack believes apply
8371 **/
8372 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8373 struct net_device *dev,
8374 netdev_features_t features)
8375 {
8376 if (skb->encapsulation &&
8377 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8378 I40E_MAX_TUNNEL_HDR_LEN))
8379 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8380
8381 return features;
8382 }
8383
8384 static const struct net_device_ops i40e_netdev_ops = {
8385 .ndo_open = i40e_open,
8386 .ndo_stop = i40e_close,
8387 .ndo_start_xmit = i40e_lan_xmit_frame,
8388 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8389 .ndo_set_rx_mode = i40e_set_rx_mode,
8390 .ndo_validate_addr = eth_validate_addr,
8391 .ndo_set_mac_address = i40e_set_mac,
8392 .ndo_change_mtu = i40e_change_mtu,
8393 .ndo_do_ioctl = i40e_ioctl,
8394 .ndo_tx_timeout = i40e_tx_timeout,
8395 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8396 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8397 #ifdef CONFIG_NET_POLL_CONTROLLER
8398 .ndo_poll_controller = i40e_netpoll,
8399 #endif
8400 .ndo_setup_tc = i40e_setup_tc,
8401 #ifdef I40E_FCOE
8402 .ndo_fcoe_enable = i40e_fcoe_enable,
8403 .ndo_fcoe_disable = i40e_fcoe_disable,
8404 #endif
8405 .ndo_set_features = i40e_set_features,
8406 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8407 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8408 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8409 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8410 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8411 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8412 #ifdef CONFIG_I40E_VXLAN
8413 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8414 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8415 #endif
8416 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8417 .ndo_fdb_add = i40e_ndo_fdb_add,
8418 .ndo_features_check = i40e_features_check,
8419 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8420 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8421 };
8422
8423 /**
8424 * i40e_config_netdev - Setup the netdev flags
8425 * @vsi: the VSI being configured
8426 *
8427 * Returns 0 on success, negative value on failure
8428 **/
8429 static int i40e_config_netdev(struct i40e_vsi *vsi)
8430 {
8431 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8432 struct i40e_pf *pf = vsi->back;
8433 struct i40e_hw *hw = &pf->hw;
8434 struct i40e_netdev_priv *np;
8435 struct net_device *netdev;
8436 u8 mac_addr[ETH_ALEN];
8437 int etherdev_size;
8438
8439 etherdev_size = sizeof(struct i40e_netdev_priv);
8440 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8441 if (!netdev)
8442 return -ENOMEM;
8443
8444 vsi->netdev = netdev;
8445 np = netdev_priv(netdev);
8446 np->vsi = vsi;
8447
8448 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8449 NETIF_F_GSO_UDP_TUNNEL |
8450 NETIF_F_TSO;
8451
8452 netdev->features = NETIF_F_SG |
8453 NETIF_F_IP_CSUM |
8454 NETIF_F_SCTP_CSUM |
8455 NETIF_F_HIGHDMA |
8456 NETIF_F_GSO_UDP_TUNNEL |
8457 NETIF_F_HW_VLAN_CTAG_TX |
8458 NETIF_F_HW_VLAN_CTAG_RX |
8459 NETIF_F_HW_VLAN_CTAG_FILTER |
8460 NETIF_F_IPV6_CSUM |
8461 NETIF_F_TSO |
8462 NETIF_F_TSO_ECN |
8463 NETIF_F_TSO6 |
8464 NETIF_F_RXCSUM |
8465 NETIF_F_RXHASH |
8466 0;
8467
8468 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8469 netdev->features |= NETIF_F_NTUPLE;
8470
8471 /* copy netdev features into list of user selectable features */
8472 netdev->hw_features |= netdev->features;
8473
8474 if (vsi->type == I40E_VSI_MAIN) {
8475 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8476 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8477 /* The following steps are necessary to prevent reception
8478 * of tagged packets - some older NVM configurations load a
8479 * default a MAC-VLAN filter that accepts any tagged packet
8480 * which must be replaced by a normal filter.
8481 */
8482 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8483 i40e_add_filter(vsi, mac_addr,
8484 I40E_VLAN_ANY, false, true);
8485 } else {
8486 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8487 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8488 pf->vsi[pf->lan_vsi]->netdev->name);
8489 random_ether_addr(mac_addr);
8490 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8491 }
8492 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8493
8494 ether_addr_copy(netdev->dev_addr, mac_addr);
8495 ether_addr_copy(netdev->perm_addr, mac_addr);
8496 /* vlan gets same features (except vlan offload)
8497 * after any tweaks for specific VSI types
8498 */
8499 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8500 NETIF_F_HW_VLAN_CTAG_RX |
8501 NETIF_F_HW_VLAN_CTAG_FILTER);
8502 netdev->priv_flags |= IFF_UNICAST_FLT;
8503 netdev->priv_flags |= IFF_SUPP_NOFCS;
8504 /* Setup netdev TC information */
8505 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8506
8507 netdev->netdev_ops = &i40e_netdev_ops;
8508 netdev->watchdog_timeo = 5 * HZ;
8509 i40e_set_ethtool_ops(netdev);
8510 #ifdef I40E_FCOE
8511 i40e_fcoe_config_netdev(netdev, vsi);
8512 #endif
8513
8514 return 0;
8515 }
8516
8517 /**
8518 * i40e_vsi_delete - Delete a VSI from the switch
8519 * @vsi: the VSI being removed
8520 *
8521 * Returns 0 on success, negative value on failure
8522 **/
8523 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8524 {
8525 /* remove default VSI is not allowed */
8526 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8527 return;
8528
8529 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8530 }
8531
8532 /**
8533 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8534 * @vsi: the VSI being queried
8535 *
8536 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8537 **/
8538 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8539 {
8540 struct i40e_veb *veb;
8541 struct i40e_pf *pf = vsi->back;
8542
8543 /* Uplink is not a bridge so default to VEB */
8544 if (vsi->veb_idx == I40E_NO_VEB)
8545 return 1;
8546
8547 veb = pf->veb[vsi->veb_idx];
8548 /* Uplink is a bridge in VEPA mode */
8549 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8550 return 0;
8551
8552 /* Uplink is a bridge in VEB mode */
8553 return 1;
8554 }
8555
8556 /**
8557 * i40e_add_vsi - Add a VSI to the switch
8558 * @vsi: the VSI being configured
8559 *
8560 * This initializes a VSI context depending on the VSI type to be added and
8561 * passes it down to the add_vsi aq command.
8562 **/
8563 static int i40e_add_vsi(struct i40e_vsi *vsi)
8564 {
8565 int ret = -ENODEV;
8566 struct i40e_mac_filter *f, *ftmp;
8567 struct i40e_pf *pf = vsi->back;
8568 struct i40e_hw *hw = &pf->hw;
8569 struct i40e_vsi_context ctxt;
8570 u8 enabled_tc = 0x1; /* TC0 enabled */
8571 int f_count = 0;
8572
8573 memset(&ctxt, 0, sizeof(ctxt));
8574 switch (vsi->type) {
8575 case I40E_VSI_MAIN:
8576 /* The PF's main VSI is already setup as part of the
8577 * device initialization, so we'll not bother with
8578 * the add_vsi call, but we will retrieve the current
8579 * VSI context.
8580 */
8581 ctxt.seid = pf->main_vsi_seid;
8582 ctxt.pf_num = pf->hw.pf_id;
8583 ctxt.vf_num = 0;
8584 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8585 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8586 if (ret) {
8587 dev_info(&pf->pdev->dev,
8588 "couldn't get PF vsi config, err %s aq_err %s\n",
8589 i40e_stat_str(&pf->hw, ret),
8590 i40e_aq_str(&pf->hw,
8591 pf->hw.aq.asq_last_status));
8592 return -ENOENT;
8593 }
8594 vsi->info = ctxt.info;
8595 vsi->info.valid_sections = 0;
8596
8597 vsi->seid = ctxt.seid;
8598 vsi->id = ctxt.vsi_number;
8599
8600 enabled_tc = i40e_pf_get_tc_map(pf);
8601
8602 /* MFP mode setup queue map and update VSI */
8603 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8604 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8605 memset(&ctxt, 0, sizeof(ctxt));
8606 ctxt.seid = pf->main_vsi_seid;
8607 ctxt.pf_num = pf->hw.pf_id;
8608 ctxt.vf_num = 0;
8609 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8610 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8611 if (ret) {
8612 dev_info(&pf->pdev->dev,
8613 "update vsi failed, err %s aq_err %s\n",
8614 i40e_stat_str(&pf->hw, ret),
8615 i40e_aq_str(&pf->hw,
8616 pf->hw.aq.asq_last_status));
8617 ret = -ENOENT;
8618 goto err;
8619 }
8620 /* update the local VSI info queue map */
8621 i40e_vsi_update_queue_map(vsi, &ctxt);
8622 vsi->info.valid_sections = 0;
8623 } else {
8624 /* Default/Main VSI is only enabled for TC0
8625 * reconfigure it to enable all TCs that are
8626 * available on the port in SFP mode.
8627 * For MFP case the iSCSI PF would use this
8628 * flow to enable LAN+iSCSI TC.
8629 */
8630 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8631 if (ret) {
8632 dev_info(&pf->pdev->dev,
8633 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8634 enabled_tc,
8635 i40e_stat_str(&pf->hw, ret),
8636 i40e_aq_str(&pf->hw,
8637 pf->hw.aq.asq_last_status));
8638 ret = -ENOENT;
8639 }
8640 }
8641 break;
8642
8643 case I40E_VSI_FDIR:
8644 ctxt.pf_num = hw->pf_id;
8645 ctxt.vf_num = 0;
8646 ctxt.uplink_seid = vsi->uplink_seid;
8647 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8648 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8649 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8650 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8651 ctxt.info.valid_sections |=
8652 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8653 ctxt.info.switch_id =
8654 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8655 }
8656 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8657 break;
8658
8659 case I40E_VSI_VMDQ2:
8660 ctxt.pf_num = hw->pf_id;
8661 ctxt.vf_num = 0;
8662 ctxt.uplink_seid = vsi->uplink_seid;
8663 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8664 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8665
8666 /* This VSI is connected to VEB so the switch_id
8667 * should be set to zero by default.
8668 */
8669 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8670 ctxt.info.valid_sections |=
8671 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8672 ctxt.info.switch_id =
8673 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8674 }
8675
8676 /* Setup the VSI tx/rx queue map for TC0 only for now */
8677 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8678 break;
8679
8680 case I40E_VSI_SRIOV:
8681 ctxt.pf_num = hw->pf_id;
8682 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8683 ctxt.uplink_seid = vsi->uplink_seid;
8684 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8685 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8686
8687 /* This VSI is connected to VEB so the switch_id
8688 * should be set to zero by default.
8689 */
8690 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8691 ctxt.info.valid_sections |=
8692 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8693 ctxt.info.switch_id =
8694 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8695 }
8696
8697 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8698 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8699 if (pf->vf[vsi->vf_id].spoofchk) {
8700 ctxt.info.valid_sections |=
8701 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8702 ctxt.info.sec_flags |=
8703 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8704 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8705 }
8706 /* Setup the VSI tx/rx queue map for TC0 only for now */
8707 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8708 break;
8709
8710 #ifdef I40E_FCOE
8711 case I40E_VSI_FCOE:
8712 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8713 if (ret) {
8714 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8715 return ret;
8716 }
8717 break;
8718
8719 #endif /* I40E_FCOE */
8720 default:
8721 return -ENODEV;
8722 }
8723
8724 if (vsi->type != I40E_VSI_MAIN) {
8725 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8726 if (ret) {
8727 dev_info(&vsi->back->pdev->dev,
8728 "add vsi failed, err %s aq_err %s\n",
8729 i40e_stat_str(&pf->hw, ret),
8730 i40e_aq_str(&pf->hw,
8731 pf->hw.aq.asq_last_status));
8732 ret = -ENOENT;
8733 goto err;
8734 }
8735 vsi->info = ctxt.info;
8736 vsi->info.valid_sections = 0;
8737 vsi->seid = ctxt.seid;
8738 vsi->id = ctxt.vsi_number;
8739 }
8740
8741 /* If macvlan filters already exist, force them to get loaded */
8742 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8743 f->changed = true;
8744 f_count++;
8745
8746 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8747 struct i40e_aqc_remove_macvlan_element_data element;
8748
8749 memset(&element, 0, sizeof(element));
8750 ether_addr_copy(element.mac_addr, f->macaddr);
8751 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8752 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8753 &element, 1, NULL);
8754 if (ret) {
8755 /* some older FW has a different default */
8756 element.flags |=
8757 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8758 i40e_aq_remove_macvlan(hw, vsi->seid,
8759 &element, 1, NULL);
8760 }
8761
8762 i40e_aq_mac_address_write(hw,
8763 I40E_AQC_WRITE_TYPE_LAA_WOL,
8764 f->macaddr, NULL);
8765 }
8766 }
8767 if (f_count) {
8768 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8769 pf->flags |= I40E_FLAG_FILTER_SYNC;
8770 }
8771
8772 /* Update VSI BW information */
8773 ret = i40e_vsi_get_bw_info(vsi);
8774 if (ret) {
8775 dev_info(&pf->pdev->dev,
8776 "couldn't get vsi bw info, err %s aq_err %s\n",
8777 i40e_stat_str(&pf->hw, ret),
8778 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8779 /* VSI is already added so not tearing that up */
8780 ret = 0;
8781 }
8782
8783 err:
8784 return ret;
8785 }
8786
8787 /**
8788 * i40e_vsi_release - Delete a VSI and free its resources
8789 * @vsi: the VSI being removed
8790 *
8791 * Returns 0 on success or < 0 on error
8792 **/
8793 int i40e_vsi_release(struct i40e_vsi *vsi)
8794 {
8795 struct i40e_mac_filter *f, *ftmp;
8796 struct i40e_veb *veb = NULL;
8797 struct i40e_pf *pf;
8798 u16 uplink_seid;
8799 int i, n;
8800
8801 pf = vsi->back;
8802
8803 /* release of a VEB-owner or last VSI is not allowed */
8804 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8805 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8806 vsi->seid, vsi->uplink_seid);
8807 return -ENODEV;
8808 }
8809 if (vsi == pf->vsi[pf->lan_vsi] &&
8810 !test_bit(__I40E_DOWN, &pf->state)) {
8811 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8812 return -ENODEV;
8813 }
8814
8815 uplink_seid = vsi->uplink_seid;
8816 if (vsi->type != I40E_VSI_SRIOV) {
8817 if (vsi->netdev_registered) {
8818 vsi->netdev_registered = false;
8819 if (vsi->netdev) {
8820 /* results in a call to i40e_close() */
8821 unregister_netdev(vsi->netdev);
8822 }
8823 } else {
8824 i40e_vsi_close(vsi);
8825 }
8826 i40e_vsi_disable_irq(vsi);
8827 }
8828
8829 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8830 i40e_del_filter(vsi, f->macaddr, f->vlan,
8831 f->is_vf, f->is_netdev);
8832 i40e_sync_vsi_filters(vsi, false);
8833
8834 i40e_vsi_delete(vsi);
8835 i40e_vsi_free_q_vectors(vsi);
8836 if (vsi->netdev) {
8837 free_netdev(vsi->netdev);
8838 vsi->netdev = NULL;
8839 }
8840 i40e_vsi_clear_rings(vsi);
8841 i40e_vsi_clear(vsi);
8842
8843 /* If this was the last thing on the VEB, except for the
8844 * controlling VSI, remove the VEB, which puts the controlling
8845 * VSI onto the next level down in the switch.
8846 *
8847 * Well, okay, there's one more exception here: don't remove
8848 * the orphan VEBs yet. We'll wait for an explicit remove request
8849 * from up the network stack.
8850 */
8851 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8852 if (pf->vsi[i] &&
8853 pf->vsi[i]->uplink_seid == uplink_seid &&
8854 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8855 n++; /* count the VSIs */
8856 }
8857 }
8858 for (i = 0; i < I40E_MAX_VEB; i++) {
8859 if (!pf->veb[i])
8860 continue;
8861 if (pf->veb[i]->uplink_seid == uplink_seid)
8862 n++; /* count the VEBs */
8863 if (pf->veb[i]->seid == uplink_seid)
8864 veb = pf->veb[i];
8865 }
8866 if (n == 0 && veb && veb->uplink_seid != 0)
8867 i40e_veb_release(veb);
8868
8869 return 0;
8870 }
8871
8872 /**
8873 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8874 * @vsi: ptr to the VSI
8875 *
8876 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8877 * corresponding SW VSI structure and initializes num_queue_pairs for the
8878 * newly allocated VSI.
8879 *
8880 * Returns 0 on success or negative on failure
8881 **/
8882 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8883 {
8884 int ret = -ENOENT;
8885 struct i40e_pf *pf = vsi->back;
8886
8887 if (vsi->q_vectors[0]) {
8888 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8889 vsi->seid);
8890 return -EEXIST;
8891 }
8892
8893 if (vsi->base_vector) {
8894 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8895 vsi->seid, vsi->base_vector);
8896 return -EEXIST;
8897 }
8898
8899 ret = i40e_vsi_alloc_q_vectors(vsi);
8900 if (ret) {
8901 dev_info(&pf->pdev->dev,
8902 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8903 vsi->num_q_vectors, vsi->seid, ret);
8904 vsi->num_q_vectors = 0;
8905 goto vector_setup_out;
8906 }
8907
8908 /* In Legacy mode, we do not have to get any other vector since we
8909 * piggyback on the misc/ICR0 for queue interrupts.
8910 */
8911 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8912 return ret;
8913 if (vsi->num_q_vectors)
8914 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8915 vsi->num_q_vectors, vsi->idx);
8916 if (vsi->base_vector < 0) {
8917 dev_info(&pf->pdev->dev,
8918 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8919 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8920 i40e_vsi_free_q_vectors(vsi);
8921 ret = -ENOENT;
8922 goto vector_setup_out;
8923 }
8924
8925 vector_setup_out:
8926 return ret;
8927 }
8928
8929 /**
8930 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8931 * @vsi: pointer to the vsi.
8932 *
8933 * This re-allocates a vsi's queue resources.
8934 *
8935 * Returns pointer to the successfully allocated and configured VSI sw struct
8936 * on success, otherwise returns NULL on failure.
8937 **/
8938 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8939 {
8940 struct i40e_pf *pf = vsi->back;
8941 u8 enabled_tc;
8942 int ret;
8943
8944 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8945 i40e_vsi_clear_rings(vsi);
8946
8947 i40e_vsi_free_arrays(vsi, false);
8948 i40e_set_num_rings_in_vsi(vsi);
8949 ret = i40e_vsi_alloc_arrays(vsi, false);
8950 if (ret)
8951 goto err_vsi;
8952
8953 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8954 if (ret < 0) {
8955 dev_info(&pf->pdev->dev,
8956 "failed to get tracking for %d queues for VSI %d err %d\n",
8957 vsi->alloc_queue_pairs, vsi->seid, ret);
8958 goto err_vsi;
8959 }
8960 vsi->base_queue = ret;
8961
8962 /* Update the FW view of the VSI. Force a reset of TC and queue
8963 * layout configurations.
8964 */
8965 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8966 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8967 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8968 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8969
8970 /* assign it some queues */
8971 ret = i40e_alloc_rings(vsi);
8972 if (ret)
8973 goto err_rings;
8974
8975 /* map all of the rings to the q_vectors */
8976 i40e_vsi_map_rings_to_vectors(vsi);
8977 return vsi;
8978
8979 err_rings:
8980 i40e_vsi_free_q_vectors(vsi);
8981 if (vsi->netdev_registered) {
8982 vsi->netdev_registered = false;
8983 unregister_netdev(vsi->netdev);
8984 free_netdev(vsi->netdev);
8985 vsi->netdev = NULL;
8986 }
8987 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8988 err_vsi:
8989 i40e_vsi_clear(vsi);
8990 return NULL;
8991 }
8992
8993 /**
8994 * i40e_vsi_setup - Set up a VSI by a given type
8995 * @pf: board private structure
8996 * @type: VSI type
8997 * @uplink_seid: the switch element to link to
8998 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8999 *
9000 * This allocates the sw VSI structure and its queue resources, then add a VSI
9001 * to the identified VEB.
9002 *
9003 * Returns pointer to the successfully allocated and configure VSI sw struct on
9004 * success, otherwise returns NULL on failure.
9005 **/
9006 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9007 u16 uplink_seid, u32 param1)
9008 {
9009 struct i40e_vsi *vsi = NULL;
9010 struct i40e_veb *veb = NULL;
9011 int ret, i;
9012 int v_idx;
9013
9014 /* The requested uplink_seid must be either
9015 * - the PF's port seid
9016 * no VEB is needed because this is the PF
9017 * or this is a Flow Director special case VSI
9018 * - seid of an existing VEB
9019 * - seid of a VSI that owns an existing VEB
9020 * - seid of a VSI that doesn't own a VEB
9021 * a new VEB is created and the VSI becomes the owner
9022 * - seid of the PF VSI, which is what creates the first VEB
9023 * this is a special case of the previous
9024 *
9025 * Find which uplink_seid we were given and create a new VEB if needed
9026 */
9027 for (i = 0; i < I40E_MAX_VEB; i++) {
9028 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9029 veb = pf->veb[i];
9030 break;
9031 }
9032 }
9033
9034 if (!veb && uplink_seid != pf->mac_seid) {
9035
9036 for (i = 0; i < pf->num_alloc_vsi; i++) {
9037 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9038 vsi = pf->vsi[i];
9039 break;
9040 }
9041 }
9042 if (!vsi) {
9043 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9044 uplink_seid);
9045 return NULL;
9046 }
9047
9048 if (vsi->uplink_seid == pf->mac_seid)
9049 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9050 vsi->tc_config.enabled_tc);
9051 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9052 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9053 vsi->tc_config.enabled_tc);
9054 if (veb) {
9055 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9056 dev_info(&vsi->back->pdev->dev,
9057 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
9058 __func__);
9059 return NULL;
9060 }
9061 /* We come up by default in VEPA mode if SRIOV is not
9062 * already enabled, in which case we can't force VEPA
9063 * mode.
9064 */
9065 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9066 veb->bridge_mode = BRIDGE_MODE_VEPA;
9067 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9068 }
9069 i40e_config_bridge_mode(veb);
9070 }
9071 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9072 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9073 veb = pf->veb[i];
9074 }
9075 if (!veb) {
9076 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9077 return NULL;
9078 }
9079
9080 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9081 uplink_seid = veb->seid;
9082 }
9083
9084 /* get vsi sw struct */
9085 v_idx = i40e_vsi_mem_alloc(pf, type);
9086 if (v_idx < 0)
9087 goto err_alloc;
9088 vsi = pf->vsi[v_idx];
9089 if (!vsi)
9090 goto err_alloc;
9091 vsi->type = type;
9092 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9093
9094 if (type == I40E_VSI_MAIN)
9095 pf->lan_vsi = v_idx;
9096 else if (type == I40E_VSI_SRIOV)
9097 vsi->vf_id = param1;
9098 /* assign it some queues */
9099 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9100 vsi->idx);
9101 if (ret < 0) {
9102 dev_info(&pf->pdev->dev,
9103 "failed to get tracking for %d queues for VSI %d err=%d\n",
9104 vsi->alloc_queue_pairs, vsi->seid, ret);
9105 goto err_vsi;
9106 }
9107 vsi->base_queue = ret;
9108
9109 /* get a VSI from the hardware */
9110 vsi->uplink_seid = uplink_seid;
9111 ret = i40e_add_vsi(vsi);
9112 if (ret)
9113 goto err_vsi;
9114
9115 switch (vsi->type) {
9116 /* setup the netdev if needed */
9117 case I40E_VSI_MAIN:
9118 case I40E_VSI_VMDQ2:
9119 case I40E_VSI_FCOE:
9120 ret = i40e_config_netdev(vsi);
9121 if (ret)
9122 goto err_netdev;
9123 ret = register_netdev(vsi->netdev);
9124 if (ret)
9125 goto err_netdev;
9126 vsi->netdev_registered = true;
9127 netif_carrier_off(vsi->netdev);
9128 #ifdef CONFIG_I40E_DCB
9129 /* Setup DCB netlink interface */
9130 i40e_dcbnl_setup(vsi);
9131 #endif /* CONFIG_I40E_DCB */
9132 /* fall through */
9133
9134 case I40E_VSI_FDIR:
9135 /* set up vectors and rings if needed */
9136 ret = i40e_vsi_setup_vectors(vsi);
9137 if (ret)
9138 goto err_msix;
9139
9140 ret = i40e_alloc_rings(vsi);
9141 if (ret)
9142 goto err_rings;
9143
9144 /* map all of the rings to the q_vectors */
9145 i40e_vsi_map_rings_to_vectors(vsi);
9146
9147 i40e_vsi_reset_stats(vsi);
9148 break;
9149
9150 default:
9151 /* no netdev or rings for the other VSI types */
9152 break;
9153 }
9154
9155 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9156 (vsi->type == I40E_VSI_VMDQ2)) {
9157 ret = i40e_vsi_config_rss(vsi);
9158 }
9159 return vsi;
9160
9161 err_rings:
9162 i40e_vsi_free_q_vectors(vsi);
9163 err_msix:
9164 if (vsi->netdev_registered) {
9165 vsi->netdev_registered = false;
9166 unregister_netdev(vsi->netdev);
9167 free_netdev(vsi->netdev);
9168 vsi->netdev = NULL;
9169 }
9170 err_netdev:
9171 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9172 err_vsi:
9173 i40e_vsi_clear(vsi);
9174 err_alloc:
9175 return NULL;
9176 }
9177
9178 /**
9179 * i40e_veb_get_bw_info - Query VEB BW information
9180 * @veb: the veb to query
9181 *
9182 * Query the Tx scheduler BW configuration data for given VEB
9183 **/
9184 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9185 {
9186 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9187 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9188 struct i40e_pf *pf = veb->pf;
9189 struct i40e_hw *hw = &pf->hw;
9190 u32 tc_bw_max;
9191 int ret = 0;
9192 int i;
9193
9194 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9195 &bw_data, NULL);
9196 if (ret) {
9197 dev_info(&pf->pdev->dev,
9198 "query veb bw config failed, err %s aq_err %s\n",
9199 i40e_stat_str(&pf->hw, ret),
9200 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9201 goto out;
9202 }
9203
9204 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9205 &ets_data, NULL);
9206 if (ret) {
9207 dev_info(&pf->pdev->dev,
9208 "query veb bw ets config failed, err %s aq_err %s\n",
9209 i40e_stat_str(&pf->hw, ret),
9210 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9211 goto out;
9212 }
9213
9214 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9215 veb->bw_max_quanta = ets_data.tc_bw_max;
9216 veb->is_abs_credits = bw_data.absolute_credits_enable;
9217 veb->enabled_tc = ets_data.tc_valid_bits;
9218 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9219 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9220 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9221 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9222 veb->bw_tc_limit_credits[i] =
9223 le16_to_cpu(bw_data.tc_bw_limits[i]);
9224 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9225 }
9226
9227 out:
9228 return ret;
9229 }
9230
9231 /**
9232 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9233 * @pf: board private structure
9234 *
9235 * On error: returns error code (negative)
9236 * On success: returns vsi index in PF (positive)
9237 **/
9238 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9239 {
9240 int ret = -ENOENT;
9241 struct i40e_veb *veb;
9242 int i;
9243
9244 /* Need to protect the allocation of switch elements at the PF level */
9245 mutex_lock(&pf->switch_mutex);
9246
9247 /* VEB list may be fragmented if VEB creation/destruction has
9248 * been happening. We can afford to do a quick scan to look
9249 * for any free slots in the list.
9250 *
9251 * find next empty veb slot, looping back around if necessary
9252 */
9253 i = 0;
9254 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9255 i++;
9256 if (i >= I40E_MAX_VEB) {
9257 ret = -ENOMEM;
9258 goto err_alloc_veb; /* out of VEB slots! */
9259 }
9260
9261 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9262 if (!veb) {
9263 ret = -ENOMEM;
9264 goto err_alloc_veb;
9265 }
9266 veb->pf = pf;
9267 veb->idx = i;
9268 veb->enabled_tc = 1;
9269
9270 pf->veb[i] = veb;
9271 ret = i;
9272 err_alloc_veb:
9273 mutex_unlock(&pf->switch_mutex);
9274 return ret;
9275 }
9276
9277 /**
9278 * i40e_switch_branch_release - Delete a branch of the switch tree
9279 * @branch: where to start deleting
9280 *
9281 * This uses recursion to find the tips of the branch to be
9282 * removed, deleting until we get back to and can delete this VEB.
9283 **/
9284 static void i40e_switch_branch_release(struct i40e_veb *branch)
9285 {
9286 struct i40e_pf *pf = branch->pf;
9287 u16 branch_seid = branch->seid;
9288 u16 veb_idx = branch->idx;
9289 int i;
9290
9291 /* release any VEBs on this VEB - RECURSION */
9292 for (i = 0; i < I40E_MAX_VEB; i++) {
9293 if (!pf->veb[i])
9294 continue;
9295 if (pf->veb[i]->uplink_seid == branch->seid)
9296 i40e_switch_branch_release(pf->veb[i]);
9297 }
9298
9299 /* Release the VSIs on this VEB, but not the owner VSI.
9300 *
9301 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9302 * the VEB itself, so don't use (*branch) after this loop.
9303 */
9304 for (i = 0; i < pf->num_alloc_vsi; i++) {
9305 if (!pf->vsi[i])
9306 continue;
9307 if (pf->vsi[i]->uplink_seid == branch_seid &&
9308 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9309 i40e_vsi_release(pf->vsi[i]);
9310 }
9311 }
9312
9313 /* There's one corner case where the VEB might not have been
9314 * removed, so double check it here and remove it if needed.
9315 * This case happens if the veb was created from the debugfs
9316 * commands and no VSIs were added to it.
9317 */
9318 if (pf->veb[veb_idx])
9319 i40e_veb_release(pf->veb[veb_idx]);
9320 }
9321
9322 /**
9323 * i40e_veb_clear - remove veb struct
9324 * @veb: the veb to remove
9325 **/
9326 static void i40e_veb_clear(struct i40e_veb *veb)
9327 {
9328 if (!veb)
9329 return;
9330
9331 if (veb->pf) {
9332 struct i40e_pf *pf = veb->pf;
9333
9334 mutex_lock(&pf->switch_mutex);
9335 if (pf->veb[veb->idx] == veb)
9336 pf->veb[veb->idx] = NULL;
9337 mutex_unlock(&pf->switch_mutex);
9338 }
9339
9340 kfree(veb);
9341 }
9342
9343 /**
9344 * i40e_veb_release - Delete a VEB and free its resources
9345 * @veb: the VEB being removed
9346 **/
9347 void i40e_veb_release(struct i40e_veb *veb)
9348 {
9349 struct i40e_vsi *vsi = NULL;
9350 struct i40e_pf *pf;
9351 int i, n = 0;
9352
9353 pf = veb->pf;
9354
9355 /* find the remaining VSI and check for extras */
9356 for (i = 0; i < pf->num_alloc_vsi; i++) {
9357 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9358 n++;
9359 vsi = pf->vsi[i];
9360 }
9361 }
9362 if (n != 1) {
9363 dev_info(&pf->pdev->dev,
9364 "can't remove VEB %d with %d VSIs left\n",
9365 veb->seid, n);
9366 return;
9367 }
9368
9369 /* move the remaining VSI to uplink veb */
9370 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9371 if (veb->uplink_seid) {
9372 vsi->uplink_seid = veb->uplink_seid;
9373 if (veb->uplink_seid == pf->mac_seid)
9374 vsi->veb_idx = I40E_NO_VEB;
9375 else
9376 vsi->veb_idx = veb->veb_idx;
9377 } else {
9378 /* floating VEB */
9379 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9380 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9381 }
9382
9383 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9384 i40e_veb_clear(veb);
9385 }
9386
9387 /**
9388 * i40e_add_veb - create the VEB in the switch
9389 * @veb: the VEB to be instantiated
9390 * @vsi: the controlling VSI
9391 **/
9392 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9393 {
9394 struct i40e_pf *pf = veb->pf;
9395 bool is_default = veb->pf->cur_promisc;
9396 bool is_cloud = false;
9397 int ret;
9398
9399 /* get a VEB from the hardware */
9400 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9401 veb->enabled_tc, is_default,
9402 is_cloud, &veb->seid, NULL);
9403 if (ret) {
9404 dev_info(&pf->pdev->dev,
9405 "couldn't add VEB, err %s aq_err %s\n",
9406 i40e_stat_str(&pf->hw, ret),
9407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9408 return -EPERM;
9409 }
9410
9411 /* get statistics counter */
9412 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9413 &veb->stats_idx, NULL, NULL, NULL);
9414 if (ret) {
9415 dev_info(&pf->pdev->dev,
9416 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9417 i40e_stat_str(&pf->hw, ret),
9418 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9419 return -EPERM;
9420 }
9421 ret = i40e_veb_get_bw_info(veb);
9422 if (ret) {
9423 dev_info(&pf->pdev->dev,
9424 "couldn't get VEB bw info, err %s aq_err %s\n",
9425 i40e_stat_str(&pf->hw, ret),
9426 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9427 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9428 return -ENOENT;
9429 }
9430
9431 vsi->uplink_seid = veb->seid;
9432 vsi->veb_idx = veb->idx;
9433 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9434
9435 return 0;
9436 }
9437
9438 /**
9439 * i40e_veb_setup - Set up a VEB
9440 * @pf: board private structure
9441 * @flags: VEB setup flags
9442 * @uplink_seid: the switch element to link to
9443 * @vsi_seid: the initial VSI seid
9444 * @enabled_tc: Enabled TC bit-map
9445 *
9446 * This allocates the sw VEB structure and links it into the switch
9447 * It is possible and legal for this to be a duplicate of an already
9448 * existing VEB. It is also possible for both uplink and vsi seids
9449 * to be zero, in order to create a floating VEB.
9450 *
9451 * Returns pointer to the successfully allocated VEB sw struct on
9452 * success, otherwise returns NULL on failure.
9453 **/
9454 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9455 u16 uplink_seid, u16 vsi_seid,
9456 u8 enabled_tc)
9457 {
9458 struct i40e_veb *veb, *uplink_veb = NULL;
9459 int vsi_idx, veb_idx;
9460 int ret;
9461
9462 /* if one seid is 0, the other must be 0 to create a floating relay */
9463 if ((uplink_seid == 0 || vsi_seid == 0) &&
9464 (uplink_seid + vsi_seid != 0)) {
9465 dev_info(&pf->pdev->dev,
9466 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9467 uplink_seid, vsi_seid);
9468 return NULL;
9469 }
9470
9471 /* make sure there is such a vsi and uplink */
9472 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9473 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9474 break;
9475 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9476 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9477 vsi_seid);
9478 return NULL;
9479 }
9480
9481 if (uplink_seid && uplink_seid != pf->mac_seid) {
9482 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9483 if (pf->veb[veb_idx] &&
9484 pf->veb[veb_idx]->seid == uplink_seid) {
9485 uplink_veb = pf->veb[veb_idx];
9486 break;
9487 }
9488 }
9489 if (!uplink_veb) {
9490 dev_info(&pf->pdev->dev,
9491 "uplink seid %d not found\n", uplink_seid);
9492 return NULL;
9493 }
9494 }
9495
9496 /* get veb sw struct */
9497 veb_idx = i40e_veb_mem_alloc(pf);
9498 if (veb_idx < 0)
9499 goto err_alloc;
9500 veb = pf->veb[veb_idx];
9501 veb->flags = flags;
9502 veb->uplink_seid = uplink_seid;
9503 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9504 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9505
9506 /* create the VEB in the switch */
9507 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9508 if (ret)
9509 goto err_veb;
9510 if (vsi_idx == pf->lan_vsi)
9511 pf->lan_veb = veb->idx;
9512
9513 return veb;
9514
9515 err_veb:
9516 i40e_veb_clear(veb);
9517 err_alloc:
9518 return NULL;
9519 }
9520
9521 /**
9522 * i40e_setup_pf_switch_element - set PF vars based on switch type
9523 * @pf: board private structure
9524 * @ele: element we are building info from
9525 * @num_reported: total number of elements
9526 * @printconfig: should we print the contents
9527 *
9528 * helper function to assist in extracting a few useful SEID values.
9529 **/
9530 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9531 struct i40e_aqc_switch_config_element_resp *ele,
9532 u16 num_reported, bool printconfig)
9533 {
9534 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9535 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9536 u8 element_type = ele->element_type;
9537 u16 seid = le16_to_cpu(ele->seid);
9538
9539 if (printconfig)
9540 dev_info(&pf->pdev->dev,
9541 "type=%d seid=%d uplink=%d downlink=%d\n",
9542 element_type, seid, uplink_seid, downlink_seid);
9543
9544 switch (element_type) {
9545 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9546 pf->mac_seid = seid;
9547 break;
9548 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9549 /* Main VEB? */
9550 if (uplink_seid != pf->mac_seid)
9551 break;
9552 if (pf->lan_veb == I40E_NO_VEB) {
9553 int v;
9554
9555 /* find existing or else empty VEB */
9556 for (v = 0; v < I40E_MAX_VEB; v++) {
9557 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9558 pf->lan_veb = v;
9559 break;
9560 }
9561 }
9562 if (pf->lan_veb == I40E_NO_VEB) {
9563 v = i40e_veb_mem_alloc(pf);
9564 if (v < 0)
9565 break;
9566 pf->lan_veb = v;
9567 }
9568 }
9569
9570 pf->veb[pf->lan_veb]->seid = seid;
9571 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9572 pf->veb[pf->lan_veb]->pf = pf;
9573 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9574 break;
9575 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9576 if (num_reported != 1)
9577 break;
9578 /* This is immediately after a reset so we can assume this is
9579 * the PF's VSI
9580 */
9581 pf->mac_seid = uplink_seid;
9582 pf->pf_seid = downlink_seid;
9583 pf->main_vsi_seid = seid;
9584 if (printconfig)
9585 dev_info(&pf->pdev->dev,
9586 "pf_seid=%d main_vsi_seid=%d\n",
9587 pf->pf_seid, pf->main_vsi_seid);
9588 break;
9589 case I40E_SWITCH_ELEMENT_TYPE_PF:
9590 case I40E_SWITCH_ELEMENT_TYPE_VF:
9591 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9592 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9593 case I40E_SWITCH_ELEMENT_TYPE_PE:
9594 case I40E_SWITCH_ELEMENT_TYPE_PA:
9595 /* ignore these for now */
9596 break;
9597 default:
9598 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9599 element_type, seid);
9600 break;
9601 }
9602 }
9603
9604 /**
9605 * i40e_fetch_switch_configuration - Get switch config from firmware
9606 * @pf: board private structure
9607 * @printconfig: should we print the contents
9608 *
9609 * Get the current switch configuration from the device and
9610 * extract a few useful SEID values.
9611 **/
9612 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9613 {
9614 struct i40e_aqc_get_switch_config_resp *sw_config;
9615 u16 next_seid = 0;
9616 int ret = 0;
9617 u8 *aq_buf;
9618 int i;
9619
9620 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9621 if (!aq_buf)
9622 return -ENOMEM;
9623
9624 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9625 do {
9626 u16 num_reported, num_total;
9627
9628 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9629 I40E_AQ_LARGE_BUF,
9630 &next_seid, NULL);
9631 if (ret) {
9632 dev_info(&pf->pdev->dev,
9633 "get switch config failed err %s aq_err %s\n",
9634 i40e_stat_str(&pf->hw, ret),
9635 i40e_aq_str(&pf->hw,
9636 pf->hw.aq.asq_last_status));
9637 kfree(aq_buf);
9638 return -ENOENT;
9639 }
9640
9641 num_reported = le16_to_cpu(sw_config->header.num_reported);
9642 num_total = le16_to_cpu(sw_config->header.num_total);
9643
9644 if (printconfig)
9645 dev_info(&pf->pdev->dev,
9646 "header: %d reported %d total\n",
9647 num_reported, num_total);
9648
9649 for (i = 0; i < num_reported; i++) {
9650 struct i40e_aqc_switch_config_element_resp *ele =
9651 &sw_config->element[i];
9652
9653 i40e_setup_pf_switch_element(pf, ele, num_reported,
9654 printconfig);
9655 }
9656 } while (next_seid != 0);
9657
9658 kfree(aq_buf);
9659 return ret;
9660 }
9661
9662 /**
9663 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9664 * @pf: board private structure
9665 * @reinit: if the Main VSI needs to re-initialized.
9666 *
9667 * Returns 0 on success, negative value on failure
9668 **/
9669 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9670 {
9671 int ret;
9672
9673 /* find out what's out there already */
9674 ret = i40e_fetch_switch_configuration(pf, false);
9675 if (ret) {
9676 dev_info(&pf->pdev->dev,
9677 "couldn't fetch switch config, err %s aq_err %s\n",
9678 i40e_stat_str(&pf->hw, ret),
9679 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9680 return ret;
9681 }
9682 i40e_pf_reset_stats(pf);
9683
9684 /* first time setup */
9685 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9686 struct i40e_vsi *vsi = NULL;
9687 u16 uplink_seid;
9688
9689 /* Set up the PF VSI associated with the PF's main VSI
9690 * that is already in the HW switch
9691 */
9692 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9693 uplink_seid = pf->veb[pf->lan_veb]->seid;
9694 else
9695 uplink_seid = pf->mac_seid;
9696 if (pf->lan_vsi == I40E_NO_VSI)
9697 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9698 else if (reinit)
9699 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9700 if (!vsi) {
9701 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9702 i40e_fdir_teardown(pf);
9703 return -EAGAIN;
9704 }
9705 } else {
9706 /* force a reset of TC and queue layout configurations */
9707 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9708 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9709 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9710 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9711 }
9712 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9713
9714 i40e_fdir_sb_setup(pf);
9715
9716 /* Setup static PF queue filter control settings */
9717 ret = i40e_setup_pf_filter_control(pf);
9718 if (ret) {
9719 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9720 ret);
9721 /* Failure here should not stop continuing other steps */
9722 }
9723
9724 /* enable RSS in the HW, even for only one queue, as the stack can use
9725 * the hash
9726 */
9727 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9728 i40e_config_rss(pf);
9729
9730 /* fill in link information and enable LSE reporting */
9731 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9732 i40e_link_event(pf);
9733
9734 /* Initialize user-specific link properties */
9735 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9736 I40E_AQ_AN_COMPLETED) ? true : false);
9737
9738 i40e_ptp_init(pf);
9739
9740 return ret;
9741 }
9742
9743 /**
9744 * i40e_determine_queue_usage - Work out queue distribution
9745 * @pf: board private structure
9746 **/
9747 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9748 {
9749 int queues_left;
9750
9751 pf->num_lan_qps = 0;
9752 #ifdef I40E_FCOE
9753 pf->num_fcoe_qps = 0;
9754 #endif
9755
9756 /* Find the max queues to be put into basic use. We'll always be
9757 * using TC0, whether or not DCB is running, and TC0 will get the
9758 * big RSS set.
9759 */
9760 queues_left = pf->hw.func_caps.num_tx_qp;
9761
9762 if ((queues_left == 1) ||
9763 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9764 /* one qp for PF, no queues for anything else */
9765 queues_left = 0;
9766 pf->rss_size = pf->num_lan_qps = 1;
9767
9768 /* make sure all the fancies are disabled */
9769 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9770 #ifdef I40E_FCOE
9771 I40E_FLAG_FCOE_ENABLED |
9772 #endif
9773 I40E_FLAG_FD_SB_ENABLED |
9774 I40E_FLAG_FD_ATR_ENABLED |
9775 I40E_FLAG_DCB_CAPABLE |
9776 I40E_FLAG_SRIOV_ENABLED |
9777 I40E_FLAG_VMDQ_ENABLED);
9778 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9779 I40E_FLAG_FD_SB_ENABLED |
9780 I40E_FLAG_FD_ATR_ENABLED |
9781 I40E_FLAG_DCB_CAPABLE))) {
9782 /* one qp for PF */
9783 pf->rss_size = pf->num_lan_qps = 1;
9784 queues_left -= pf->num_lan_qps;
9785
9786 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9787 #ifdef I40E_FCOE
9788 I40E_FLAG_FCOE_ENABLED |
9789 #endif
9790 I40E_FLAG_FD_SB_ENABLED |
9791 I40E_FLAG_FD_ATR_ENABLED |
9792 I40E_FLAG_DCB_ENABLED |
9793 I40E_FLAG_VMDQ_ENABLED);
9794 } else {
9795 /* Not enough queues for all TCs */
9796 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9797 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9798 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9799 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9800 }
9801 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9802 num_online_cpus());
9803 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9804 pf->hw.func_caps.num_tx_qp);
9805
9806 queues_left -= pf->num_lan_qps;
9807 }
9808
9809 #ifdef I40E_FCOE
9810 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9811 if (I40E_DEFAULT_FCOE <= queues_left) {
9812 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9813 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9814 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9815 } else {
9816 pf->num_fcoe_qps = 0;
9817 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9818 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9819 }
9820
9821 queues_left -= pf->num_fcoe_qps;
9822 }
9823
9824 #endif
9825 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9826 if (queues_left > 1) {
9827 queues_left -= 1; /* save 1 queue for FD */
9828 } else {
9829 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9830 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9831 }
9832 }
9833
9834 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9835 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9836 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9837 (queues_left / pf->num_vf_qps));
9838 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9839 }
9840
9841 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9842 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9843 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9844 (queues_left / pf->num_vmdq_qps));
9845 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9846 }
9847
9848 pf->queues_left = queues_left;
9849 #ifdef I40E_FCOE
9850 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9851 #endif
9852 }
9853
9854 /**
9855 * i40e_setup_pf_filter_control - Setup PF static filter control
9856 * @pf: PF to be setup
9857 *
9858 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9859 * settings. If PE/FCoE are enabled then it will also set the per PF
9860 * based filter sizes required for them. It also enables Flow director,
9861 * ethertype and macvlan type filter settings for the pf.
9862 *
9863 * Returns 0 on success, negative on failure
9864 **/
9865 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9866 {
9867 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9868
9869 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9870
9871 /* Flow Director is enabled */
9872 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9873 settings->enable_fdir = true;
9874
9875 /* Ethtype and MACVLAN filters enabled for PF */
9876 settings->enable_ethtype = true;
9877 settings->enable_macvlan = true;
9878
9879 if (i40e_set_filter_control(&pf->hw, settings))
9880 return -ENOENT;
9881
9882 return 0;
9883 }
9884
9885 #define INFO_STRING_LEN 255
9886 static void i40e_print_features(struct i40e_pf *pf)
9887 {
9888 struct i40e_hw *hw = &pf->hw;
9889 char *buf, *string;
9890
9891 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9892 if (!string) {
9893 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9894 return;
9895 }
9896
9897 buf = string;
9898
9899 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9900 #ifdef CONFIG_PCI_IOV
9901 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9902 #endif
9903 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9904 pf->hw.func_caps.num_vsis,
9905 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9906 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9907
9908 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9909 buf += sprintf(buf, "RSS ");
9910 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9911 buf += sprintf(buf, "FD_ATR ");
9912 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9913 buf += sprintf(buf, "FD_SB ");
9914 buf += sprintf(buf, "NTUPLE ");
9915 }
9916 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9917 buf += sprintf(buf, "DCB ");
9918 if (pf->flags & I40E_FLAG_PTP)
9919 buf += sprintf(buf, "PTP ");
9920 #ifdef I40E_FCOE
9921 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9922 buf += sprintf(buf, "FCOE ");
9923 #endif
9924
9925 BUG_ON(buf > (string + INFO_STRING_LEN));
9926 dev_info(&pf->pdev->dev, "%s\n", string);
9927 kfree(string);
9928 }
9929
9930 /**
9931 * i40e_probe - Device initialization routine
9932 * @pdev: PCI device information struct
9933 * @ent: entry in i40e_pci_tbl
9934 *
9935 * i40e_probe initializes a PF identified by a pci_dev structure.
9936 * The OS initialization, configuring of the PF private structure,
9937 * and a hardware reset occur.
9938 *
9939 * Returns 0 on success, negative on failure
9940 **/
9941 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9942 {
9943 struct i40e_aq_get_phy_abilities_resp abilities;
9944 struct i40e_pf *pf;
9945 struct i40e_hw *hw;
9946 static u16 pfs_found;
9947 u16 link_status;
9948 int err = 0;
9949 u32 len;
9950 u32 i;
9951
9952 err = pci_enable_device_mem(pdev);
9953 if (err)
9954 return err;
9955
9956 /* set up for high or low dma */
9957 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9958 if (err) {
9959 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9960 if (err) {
9961 dev_err(&pdev->dev,
9962 "DMA configuration failed: 0x%x\n", err);
9963 goto err_dma;
9964 }
9965 }
9966
9967 /* set up pci connections */
9968 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9969 IORESOURCE_MEM), i40e_driver_name);
9970 if (err) {
9971 dev_info(&pdev->dev,
9972 "pci_request_selected_regions failed %d\n", err);
9973 goto err_pci_reg;
9974 }
9975
9976 pci_enable_pcie_error_reporting(pdev);
9977 pci_set_master(pdev);
9978
9979 /* Now that we have a PCI connection, we need to do the
9980 * low level device setup. This is primarily setting up
9981 * the Admin Queue structures and then querying for the
9982 * device's current profile information.
9983 */
9984 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9985 if (!pf) {
9986 err = -ENOMEM;
9987 goto err_pf_alloc;
9988 }
9989 pf->next_vsi = 0;
9990 pf->pdev = pdev;
9991 set_bit(__I40E_DOWN, &pf->state);
9992
9993 hw = &pf->hw;
9994 hw->back = pf;
9995
9996 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9997 I40E_MAX_CSR_SPACE);
9998
9999 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10000 if (!hw->hw_addr) {
10001 err = -EIO;
10002 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10003 (unsigned int)pci_resource_start(pdev, 0),
10004 pf->ioremap_len, err);
10005 goto err_ioremap;
10006 }
10007 hw->vendor_id = pdev->vendor;
10008 hw->device_id = pdev->device;
10009 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10010 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10011 hw->subsystem_device_id = pdev->subsystem_device;
10012 hw->bus.device = PCI_SLOT(pdev->devfn);
10013 hw->bus.func = PCI_FUNC(pdev->devfn);
10014 pf->instance = pfs_found;
10015
10016 if (debug != -1) {
10017 pf->msg_enable = pf->hw.debug_mask;
10018 pf->msg_enable = debug;
10019 }
10020
10021 /* do a special CORER for clearing PXE mode once at init */
10022 if (hw->revision_id == 0 &&
10023 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10024 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10025 i40e_flush(hw);
10026 msleep(200);
10027 pf->corer_count++;
10028
10029 i40e_clear_pxe_mode(hw);
10030 }
10031
10032 /* Reset here to make sure all is clean and to define PF 'n' */
10033 i40e_clear_hw(hw);
10034 err = i40e_pf_reset(hw);
10035 if (err) {
10036 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10037 goto err_pf_reset;
10038 }
10039 pf->pfr_count++;
10040
10041 hw->aq.num_arq_entries = I40E_AQ_LEN;
10042 hw->aq.num_asq_entries = I40E_AQ_LEN;
10043 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10044 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10045 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10046
10047 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10048 "%s-%s:misc",
10049 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10050
10051 err = i40e_init_shared_code(hw);
10052 if (err) {
10053 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10054 err);
10055 goto err_pf_reset;
10056 }
10057
10058 /* set up a default setting for link flow control */
10059 pf->hw.fc.requested_mode = I40E_FC_NONE;
10060
10061 err = i40e_init_adminq(hw);
10062 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10063 if (err) {
10064 dev_info(&pdev->dev,
10065 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10066 goto err_pf_reset;
10067 }
10068
10069 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10070 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10071 dev_info(&pdev->dev,
10072 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10073 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10074 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10075 dev_info(&pdev->dev,
10076 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10077
10078 i40e_verify_eeprom(pf);
10079
10080 /* Rev 0 hardware was never productized */
10081 if (hw->revision_id < 1)
10082 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10083
10084 i40e_clear_pxe_mode(hw);
10085 err = i40e_get_capabilities(pf);
10086 if (err)
10087 goto err_adminq_setup;
10088
10089 err = i40e_sw_init(pf);
10090 if (err) {
10091 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10092 goto err_sw_init;
10093 }
10094
10095 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10096 hw->func_caps.num_rx_qp,
10097 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10098 if (err) {
10099 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10100 goto err_init_lan_hmc;
10101 }
10102
10103 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10104 if (err) {
10105 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10106 err = -ENOENT;
10107 goto err_configure_lan_hmc;
10108 }
10109
10110 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10111 * Ignore error return codes because if it was already disabled via
10112 * hardware settings this will fail
10113 */
10114 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10115 (pf->hw.aq.fw_maj_ver < 4)) {
10116 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10117 i40e_aq_stop_lldp(hw, true, NULL);
10118 }
10119
10120 i40e_get_mac_addr(hw, hw->mac.addr);
10121 if (!is_valid_ether_addr(hw->mac.addr)) {
10122 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10123 err = -EIO;
10124 goto err_mac_addr;
10125 }
10126 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10127 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10128 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10129 if (is_valid_ether_addr(hw->mac.port_addr))
10130 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10131 #ifdef I40E_FCOE
10132 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10133 if (err)
10134 dev_info(&pdev->dev,
10135 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10136 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10137 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10138 hw->mac.san_addr);
10139 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10140 }
10141 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10142 #endif /* I40E_FCOE */
10143
10144 pci_set_drvdata(pdev, pf);
10145 pci_save_state(pdev);
10146 #ifdef CONFIG_I40E_DCB
10147 err = i40e_init_pf_dcb(pf);
10148 if (err) {
10149 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10150 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10151 /* Continue without DCB enabled */
10152 }
10153 #endif /* CONFIG_I40E_DCB */
10154
10155 /* set up periodic task facility */
10156 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10157 pf->service_timer_period = HZ;
10158
10159 INIT_WORK(&pf->service_task, i40e_service_task);
10160 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10161 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10162
10163 /* WoL defaults to disabled */
10164 pf->wol_en = false;
10165 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10166
10167 /* set up the main switch operations */
10168 i40e_determine_queue_usage(pf);
10169 err = i40e_init_interrupt_scheme(pf);
10170 if (err)
10171 goto err_switch_setup;
10172
10173 /* The number of VSIs reported by the FW is the minimum guaranteed
10174 * to us; HW supports far more and we share the remaining pool with
10175 * the other PFs. We allocate space for more than the guarantee with
10176 * the understanding that we might not get them all later.
10177 */
10178 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10179 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10180 else
10181 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10182
10183 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10184 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10185 pf->vsi = kzalloc(len, GFP_KERNEL);
10186 if (!pf->vsi) {
10187 err = -ENOMEM;
10188 goto err_switch_setup;
10189 }
10190
10191 #ifdef CONFIG_PCI_IOV
10192 /* prep for VF support */
10193 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10194 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10195 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10196 if (pci_num_vf(pdev))
10197 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10198 }
10199 #endif
10200 err = i40e_setup_pf_switch(pf, false);
10201 if (err) {
10202 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10203 goto err_vsis;
10204 }
10205 /* if FDIR VSI was set up, start it now */
10206 for (i = 0; i < pf->num_alloc_vsi; i++) {
10207 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10208 i40e_vsi_open(pf->vsi[i]);
10209 break;
10210 }
10211 }
10212
10213 /* driver is only interested in link up/down and module qualification
10214 * reports from firmware
10215 */
10216 err = i40e_aq_set_phy_int_mask(&pf->hw,
10217 I40E_AQ_EVENT_LINK_UPDOWN |
10218 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10219 if (err)
10220 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10221 i40e_stat_str(&pf->hw, err),
10222 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10223
10224 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10225 (pf->hw.aq.fw_maj_ver < 4)) {
10226 msleep(75);
10227 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10228 if (err)
10229 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10230 i40e_stat_str(&pf->hw, err),
10231 i40e_aq_str(&pf->hw,
10232 pf->hw.aq.asq_last_status));
10233 }
10234 /* The main driver is (mostly) up and happy. We need to set this state
10235 * before setting up the misc vector or we get a race and the vector
10236 * ends up disabled forever.
10237 */
10238 clear_bit(__I40E_DOWN, &pf->state);
10239
10240 /* In case of MSIX we are going to setup the misc vector right here
10241 * to handle admin queue events etc. In case of legacy and MSI
10242 * the misc functionality and queue processing is combined in
10243 * the same vector and that gets setup at open.
10244 */
10245 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10246 err = i40e_setup_misc_vector(pf);
10247 if (err) {
10248 dev_info(&pdev->dev,
10249 "setup of misc vector failed: %d\n", err);
10250 goto err_vsis;
10251 }
10252 }
10253
10254 #ifdef CONFIG_PCI_IOV
10255 /* prep for VF support */
10256 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10257 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10258 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10259 u32 val;
10260
10261 /* disable link interrupts for VFs */
10262 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10263 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10264 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10265 i40e_flush(hw);
10266
10267 if (pci_num_vf(pdev)) {
10268 dev_info(&pdev->dev,
10269 "Active VFs found, allocating resources.\n");
10270 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10271 if (err)
10272 dev_info(&pdev->dev,
10273 "Error %d allocating resources for existing VFs\n",
10274 err);
10275 }
10276 }
10277 #endif /* CONFIG_PCI_IOV */
10278
10279 pfs_found++;
10280
10281 i40e_dbg_pf_init(pf);
10282
10283 /* tell the firmware that we're starting */
10284 i40e_send_version(pf);
10285
10286 /* since everything's happy, start the service_task timer */
10287 mod_timer(&pf->service_timer,
10288 round_jiffies(jiffies + pf->service_timer_period));
10289
10290 #ifdef I40E_FCOE
10291 /* create FCoE interface */
10292 i40e_fcoe_vsi_setup(pf);
10293
10294 #endif
10295 /* Get the negotiated link width and speed from PCI config space */
10296 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10297
10298 i40e_set_pci_config_data(hw, link_status);
10299
10300 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10301 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10302 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10303 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10304 "Unknown"),
10305 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10306 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10307 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10308 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10309 "Unknown"));
10310
10311 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10312 hw->bus.speed < i40e_bus_speed_8000) {
10313 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10314 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10315 }
10316
10317 /* get the requested speeds from the fw */
10318 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10319 if (err)
10320 dev_info(&pf->pdev->dev,
10321 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10322 i40e_stat_str(&pf->hw, err),
10323 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10324 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10325
10326 /* print a string summarizing features */
10327 i40e_print_features(pf);
10328
10329 return 0;
10330
10331 /* Unwind what we've done if something failed in the setup */
10332 err_vsis:
10333 set_bit(__I40E_DOWN, &pf->state);
10334 i40e_clear_interrupt_scheme(pf);
10335 kfree(pf->vsi);
10336 err_switch_setup:
10337 i40e_reset_interrupt_capability(pf);
10338 del_timer_sync(&pf->service_timer);
10339 err_mac_addr:
10340 err_configure_lan_hmc:
10341 (void)i40e_shutdown_lan_hmc(hw);
10342 err_init_lan_hmc:
10343 kfree(pf->qp_pile);
10344 err_sw_init:
10345 err_adminq_setup:
10346 (void)i40e_shutdown_adminq(hw);
10347 err_pf_reset:
10348 iounmap(hw->hw_addr);
10349 err_ioremap:
10350 kfree(pf);
10351 err_pf_alloc:
10352 pci_disable_pcie_error_reporting(pdev);
10353 pci_release_selected_regions(pdev,
10354 pci_select_bars(pdev, IORESOURCE_MEM));
10355 err_pci_reg:
10356 err_dma:
10357 pci_disable_device(pdev);
10358 return err;
10359 }
10360
10361 /**
10362 * i40e_remove - Device removal routine
10363 * @pdev: PCI device information struct
10364 *
10365 * i40e_remove is called by the PCI subsystem to alert the driver
10366 * that is should release a PCI device. This could be caused by a
10367 * Hot-Plug event, or because the driver is going to be removed from
10368 * memory.
10369 **/
10370 static void i40e_remove(struct pci_dev *pdev)
10371 {
10372 struct i40e_pf *pf = pci_get_drvdata(pdev);
10373 i40e_status ret_code;
10374 int i;
10375
10376 i40e_dbg_pf_exit(pf);
10377
10378 i40e_ptp_stop(pf);
10379
10380 /* no more scheduling of any task */
10381 set_bit(__I40E_DOWN, &pf->state);
10382 del_timer_sync(&pf->service_timer);
10383 cancel_work_sync(&pf->service_task);
10384 i40e_fdir_teardown(pf);
10385
10386 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10387 i40e_free_vfs(pf);
10388 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10389 }
10390
10391 i40e_fdir_teardown(pf);
10392
10393 /* If there is a switch structure or any orphans, remove them.
10394 * This will leave only the PF's VSI remaining.
10395 */
10396 for (i = 0; i < I40E_MAX_VEB; i++) {
10397 if (!pf->veb[i])
10398 continue;
10399
10400 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10401 pf->veb[i]->uplink_seid == 0)
10402 i40e_switch_branch_release(pf->veb[i]);
10403 }
10404
10405 /* Now we can shutdown the PF's VSI, just before we kill
10406 * adminq and hmc.
10407 */
10408 if (pf->vsi[pf->lan_vsi])
10409 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10410
10411 /* shutdown and destroy the HMC */
10412 if (pf->hw.hmc.hmc_obj) {
10413 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10414 if (ret_code)
10415 dev_warn(&pdev->dev,
10416 "Failed to destroy the HMC resources: %d\n",
10417 ret_code);
10418 }
10419
10420 /* shutdown the adminq */
10421 ret_code = i40e_shutdown_adminq(&pf->hw);
10422 if (ret_code)
10423 dev_warn(&pdev->dev,
10424 "Failed to destroy the Admin Queue resources: %d\n",
10425 ret_code);
10426
10427 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10428 i40e_clear_interrupt_scheme(pf);
10429 for (i = 0; i < pf->num_alloc_vsi; i++) {
10430 if (pf->vsi[i]) {
10431 i40e_vsi_clear_rings(pf->vsi[i]);
10432 i40e_vsi_clear(pf->vsi[i]);
10433 pf->vsi[i] = NULL;
10434 }
10435 }
10436
10437 for (i = 0; i < I40E_MAX_VEB; i++) {
10438 kfree(pf->veb[i]);
10439 pf->veb[i] = NULL;
10440 }
10441
10442 kfree(pf->qp_pile);
10443 kfree(pf->vsi);
10444
10445 iounmap(pf->hw.hw_addr);
10446 kfree(pf);
10447 pci_release_selected_regions(pdev,
10448 pci_select_bars(pdev, IORESOURCE_MEM));
10449
10450 pci_disable_pcie_error_reporting(pdev);
10451 pci_disable_device(pdev);
10452 }
10453
10454 /**
10455 * i40e_pci_error_detected - warning that something funky happened in PCI land
10456 * @pdev: PCI device information struct
10457 *
10458 * Called to warn that something happened and the error handling steps
10459 * are in progress. Allows the driver to quiesce things, be ready for
10460 * remediation.
10461 **/
10462 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10463 enum pci_channel_state error)
10464 {
10465 struct i40e_pf *pf = pci_get_drvdata(pdev);
10466
10467 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10468
10469 /* shutdown all operations */
10470 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10471 rtnl_lock();
10472 i40e_prep_for_reset(pf);
10473 rtnl_unlock();
10474 }
10475
10476 /* Request a slot reset */
10477 return PCI_ERS_RESULT_NEED_RESET;
10478 }
10479
10480 /**
10481 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10482 * @pdev: PCI device information struct
10483 *
10484 * Called to find if the driver can work with the device now that
10485 * the pci slot has been reset. If a basic connection seems good
10486 * (registers are readable and have sane content) then return a
10487 * happy little PCI_ERS_RESULT_xxx.
10488 **/
10489 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10490 {
10491 struct i40e_pf *pf = pci_get_drvdata(pdev);
10492 pci_ers_result_t result;
10493 int err;
10494 u32 reg;
10495
10496 dev_info(&pdev->dev, "%s\n", __func__);
10497 if (pci_enable_device_mem(pdev)) {
10498 dev_info(&pdev->dev,
10499 "Cannot re-enable PCI device after reset.\n");
10500 result = PCI_ERS_RESULT_DISCONNECT;
10501 } else {
10502 pci_set_master(pdev);
10503 pci_restore_state(pdev);
10504 pci_save_state(pdev);
10505 pci_wake_from_d3(pdev, false);
10506
10507 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10508 if (reg == 0)
10509 result = PCI_ERS_RESULT_RECOVERED;
10510 else
10511 result = PCI_ERS_RESULT_DISCONNECT;
10512 }
10513
10514 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10515 if (err) {
10516 dev_info(&pdev->dev,
10517 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10518 err);
10519 /* non-fatal, continue */
10520 }
10521
10522 return result;
10523 }
10524
10525 /**
10526 * i40e_pci_error_resume - restart operations after PCI error recovery
10527 * @pdev: PCI device information struct
10528 *
10529 * Called to allow the driver to bring things back up after PCI error
10530 * and/or reset recovery has finished.
10531 **/
10532 static void i40e_pci_error_resume(struct pci_dev *pdev)
10533 {
10534 struct i40e_pf *pf = pci_get_drvdata(pdev);
10535
10536 dev_info(&pdev->dev, "%s\n", __func__);
10537 if (test_bit(__I40E_SUSPENDED, &pf->state))
10538 return;
10539
10540 rtnl_lock();
10541 i40e_handle_reset_warning(pf);
10542 rtnl_unlock();
10543 }
10544
10545 /**
10546 * i40e_shutdown - PCI callback for shutting down
10547 * @pdev: PCI device information struct
10548 **/
10549 static void i40e_shutdown(struct pci_dev *pdev)
10550 {
10551 struct i40e_pf *pf = pci_get_drvdata(pdev);
10552 struct i40e_hw *hw = &pf->hw;
10553
10554 set_bit(__I40E_SUSPENDED, &pf->state);
10555 set_bit(__I40E_DOWN, &pf->state);
10556 rtnl_lock();
10557 i40e_prep_for_reset(pf);
10558 rtnl_unlock();
10559
10560 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10561 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10562
10563 del_timer_sync(&pf->service_timer);
10564 cancel_work_sync(&pf->service_task);
10565 i40e_fdir_teardown(pf);
10566
10567 rtnl_lock();
10568 i40e_prep_for_reset(pf);
10569 rtnl_unlock();
10570
10571 wr32(hw, I40E_PFPM_APM,
10572 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10573 wr32(hw, I40E_PFPM_WUFC,
10574 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10575
10576 i40e_clear_interrupt_scheme(pf);
10577
10578 if (system_state == SYSTEM_POWER_OFF) {
10579 pci_wake_from_d3(pdev, pf->wol_en);
10580 pci_set_power_state(pdev, PCI_D3hot);
10581 }
10582 }
10583
10584 #ifdef CONFIG_PM
10585 /**
10586 * i40e_suspend - PCI callback for moving to D3
10587 * @pdev: PCI device information struct
10588 **/
10589 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10590 {
10591 struct i40e_pf *pf = pci_get_drvdata(pdev);
10592 struct i40e_hw *hw = &pf->hw;
10593
10594 set_bit(__I40E_SUSPENDED, &pf->state);
10595 set_bit(__I40E_DOWN, &pf->state);
10596
10597 rtnl_lock();
10598 i40e_prep_for_reset(pf);
10599 rtnl_unlock();
10600
10601 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10602 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10603
10604 pci_wake_from_d3(pdev, pf->wol_en);
10605 pci_set_power_state(pdev, PCI_D3hot);
10606
10607 return 0;
10608 }
10609
10610 /**
10611 * i40e_resume - PCI callback for waking up from D3
10612 * @pdev: PCI device information struct
10613 **/
10614 static int i40e_resume(struct pci_dev *pdev)
10615 {
10616 struct i40e_pf *pf = pci_get_drvdata(pdev);
10617 u32 err;
10618
10619 pci_set_power_state(pdev, PCI_D0);
10620 pci_restore_state(pdev);
10621 /* pci_restore_state() clears dev->state_saves, so
10622 * call pci_save_state() again to restore it.
10623 */
10624 pci_save_state(pdev);
10625
10626 err = pci_enable_device_mem(pdev);
10627 if (err) {
10628 dev_err(&pdev->dev,
10629 "%s: Cannot enable PCI device from suspend\n",
10630 __func__);
10631 return err;
10632 }
10633 pci_set_master(pdev);
10634
10635 /* no wakeup events while running */
10636 pci_wake_from_d3(pdev, false);
10637
10638 /* handling the reset will rebuild the device state */
10639 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10640 clear_bit(__I40E_DOWN, &pf->state);
10641 rtnl_lock();
10642 i40e_reset_and_rebuild(pf, false);
10643 rtnl_unlock();
10644 }
10645
10646 return 0;
10647 }
10648
10649 #endif
10650 static const struct pci_error_handlers i40e_err_handler = {
10651 .error_detected = i40e_pci_error_detected,
10652 .slot_reset = i40e_pci_error_slot_reset,
10653 .resume = i40e_pci_error_resume,
10654 };
10655
10656 static struct pci_driver i40e_driver = {
10657 .name = i40e_driver_name,
10658 .id_table = i40e_pci_tbl,
10659 .probe = i40e_probe,
10660 .remove = i40e_remove,
10661 #ifdef CONFIG_PM
10662 .suspend = i40e_suspend,
10663 .resume = i40e_resume,
10664 #endif
10665 .shutdown = i40e_shutdown,
10666 .err_handler = &i40e_err_handler,
10667 .sriov_configure = i40e_pci_sriov_configure,
10668 };
10669
10670 /**
10671 * i40e_init_module - Driver registration routine
10672 *
10673 * i40e_init_module is the first routine called when the driver is
10674 * loaded. All it does is register with the PCI subsystem.
10675 **/
10676 static int __init i40e_init_module(void)
10677 {
10678 pr_info("%s: %s - version %s\n", i40e_driver_name,
10679 i40e_driver_string, i40e_driver_version_str);
10680 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10681
10682 i40e_dbg_init();
10683 return pci_register_driver(&i40e_driver);
10684 }
10685 module_init(i40e_init_module);
10686
10687 /**
10688 * i40e_exit_module - Driver exit cleanup routine
10689 *
10690 * i40e_exit_module is called just before the driver is removed
10691 * from memory.
10692 **/
10693 static void __exit i40e_exit_module(void)
10694 {
10695 pci_unregister_driver(&i40e_driver);
10696 i40e_dbg_exit();
10697 }
10698 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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