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i40e: Move RSS table size for VSIs to the VSI struct
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 2
42 #define DRV_VERSION_BUILD 9
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 /* required last entry */
79 {0, }
80 };
81 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
82
83 #define I40E_MAX_VF_COUNT 128
84 static int debug = -1;
85 module_param(debug, int, 0);
86 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
87
88 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
89 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
90 MODULE_LICENSE("GPL");
91 MODULE_VERSION(DRV_VERSION);
92
93 /**
94 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
95 * @hw: pointer to the HW structure
96 * @mem: ptr to mem struct to fill out
97 * @size: size of memory requested
98 * @alignment: what to align the allocation to
99 **/
100 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
101 u64 size, u32 alignment)
102 {
103 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
104
105 mem->size = ALIGN(size, alignment);
106 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
107 &mem->pa, GFP_KERNEL);
108 if (!mem->va)
109 return -ENOMEM;
110
111 return 0;
112 }
113
114 /**
115 * i40e_free_dma_mem_d - OS specific memory free for shared code
116 * @hw: pointer to the HW structure
117 * @mem: ptr to mem struct to free
118 **/
119 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
120 {
121 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
122
123 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
124 mem->va = NULL;
125 mem->pa = 0;
126 mem->size = 0;
127
128 return 0;
129 }
130
131 /**
132 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
133 * @hw: pointer to the HW structure
134 * @mem: ptr to mem struct to fill out
135 * @size: size of memory requested
136 **/
137 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
138 u32 size)
139 {
140 mem->size = size;
141 mem->va = kzalloc(size, GFP_KERNEL);
142
143 if (!mem->va)
144 return -ENOMEM;
145
146 return 0;
147 }
148
149 /**
150 * i40e_free_virt_mem_d - OS specific memory free for shared code
151 * @hw: pointer to the HW structure
152 * @mem: ptr to mem struct to free
153 **/
154 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
155 {
156 /* it's ok to kfree a NULL pointer */
157 kfree(mem->va);
158 mem->va = NULL;
159 mem->size = 0;
160
161 return 0;
162 }
163
164 /**
165 * i40e_get_lump - find a lump of free generic resource
166 * @pf: board private structure
167 * @pile: the pile of resource to search
168 * @needed: the number of items needed
169 * @id: an owner id to stick on the items assigned
170 *
171 * Returns the base item index of the lump, or negative for error
172 *
173 * The search_hint trick and lack of advanced fit-finding only work
174 * because we're highly likely to have all the same size lump requests.
175 * Linear search time and any fragmentation should be minimal.
176 **/
177 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
178 u16 needed, u16 id)
179 {
180 int ret = -ENOMEM;
181 int i, j;
182
183 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
184 dev_info(&pf->pdev->dev,
185 "param err: pile=%p needed=%d id=0x%04x\n",
186 pile, needed, id);
187 return -EINVAL;
188 }
189
190 /* start the linear search with an imperfect hint */
191 i = pile->search_hint;
192 while (i < pile->num_entries) {
193 /* skip already allocated entries */
194 if (pile->list[i] & I40E_PILE_VALID_BIT) {
195 i++;
196 continue;
197 }
198
199 /* do we have enough in this lump? */
200 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
201 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
202 break;
203 }
204
205 if (j == needed) {
206 /* there was enough, so assign it to the requestor */
207 for (j = 0; j < needed; j++)
208 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
209 ret = i;
210 pile->search_hint = i + j;
211 break;
212 } else {
213 /* not enough, so skip over it and continue looking */
214 i += j;
215 }
216 }
217
218 return ret;
219 }
220
221 /**
222 * i40e_put_lump - return a lump of generic resource
223 * @pile: the pile of resource to search
224 * @index: the base item index
225 * @id: the owner id of the items assigned
226 *
227 * Returns the count of items in the lump
228 **/
229 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
230 {
231 int valid_id = (id | I40E_PILE_VALID_BIT);
232 int count = 0;
233 int i;
234
235 if (!pile || index >= pile->num_entries)
236 return -EINVAL;
237
238 for (i = index;
239 i < pile->num_entries && pile->list[i] == valid_id;
240 i++) {
241 pile->list[i] = 0;
242 count++;
243 }
244
245 if (count && index < pile->search_hint)
246 pile->search_hint = index;
247
248 return count;
249 }
250
251 /**
252 * i40e_service_event_schedule - Schedule the service task to wake up
253 * @pf: board private structure
254 *
255 * If not already scheduled, this puts the task into the work queue
256 **/
257 static void i40e_service_event_schedule(struct i40e_pf *pf)
258 {
259 if (!test_bit(__I40E_DOWN, &pf->state) &&
260 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
261 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
262 schedule_work(&pf->service_task);
263 }
264
265 /**
266 * i40e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
268 *
269 * If any port has noticed a Tx timeout, it is likely that the whole
270 * device is munged, not just the one netdev port, so go for the full
271 * reset.
272 **/
273 #ifdef I40E_FCOE
274 void i40e_tx_timeout(struct net_device *netdev)
275 #else
276 static void i40e_tx_timeout(struct net_device *netdev)
277 #endif
278 {
279 struct i40e_netdev_priv *np = netdev_priv(netdev);
280 struct i40e_vsi *vsi = np->vsi;
281 struct i40e_pf *pf = vsi->back;
282
283 pf->tx_timeout_count++;
284
285 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
286 pf->tx_timeout_recovery_level = 1;
287 pf->tx_timeout_last_recovery = jiffies;
288 netdev_info(netdev, "tx_timeout recovery level %d\n",
289 pf->tx_timeout_recovery_level);
290
291 switch (pf->tx_timeout_recovery_level) {
292 case 0:
293 /* disable and re-enable queues for the VSI */
294 if (in_interrupt()) {
295 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
296 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
297 } else {
298 i40e_vsi_reinit_locked(vsi);
299 }
300 break;
301 case 1:
302 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
303 break;
304 case 2:
305 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
306 break;
307 case 3:
308 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
309 break;
310 default:
311 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
312 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
313 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
314 break;
315 }
316 i40e_service_event_schedule(pf);
317 pf->tx_timeout_recovery_level++;
318 }
319
320 /**
321 * i40e_release_rx_desc - Store the new tail and head values
322 * @rx_ring: ring to bump
323 * @val: new head index
324 **/
325 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
326 {
327 rx_ring->next_to_use = val;
328
329 /* Force memory writes to complete before letting h/w
330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
332 * such as IA-64).
333 */
334 wmb();
335 writel(val, rx_ring->tail);
336 }
337
338 /**
339 * i40e_get_vsi_stats_struct - Get System Network Statistics
340 * @vsi: the VSI we care about
341 *
342 * Returns the address of the device statistics structure.
343 * The statistics are actually updated from the service task.
344 **/
345 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
346 {
347 return &vsi->net_stats;
348 }
349
350 /**
351 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
352 * @netdev: network interface device structure
353 *
354 * Returns the address of the device statistics structure.
355 * The statistics are actually updated from the service task.
356 **/
357 #ifdef I40E_FCOE
358 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
359 struct net_device *netdev,
360 struct rtnl_link_stats64 *stats)
361 #else
362 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
363 struct net_device *netdev,
364 struct rtnl_link_stats64 *stats)
365 #endif
366 {
367 struct i40e_netdev_priv *np = netdev_priv(netdev);
368 struct i40e_ring *tx_ring, *rx_ring;
369 struct i40e_vsi *vsi = np->vsi;
370 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
371 int i;
372
373 if (test_bit(__I40E_DOWN, &vsi->state))
374 return stats;
375
376 if (!vsi->tx_rings)
377 return stats;
378
379 rcu_read_lock();
380 for (i = 0; i < vsi->num_queue_pairs; i++) {
381 u64 bytes, packets;
382 unsigned int start;
383
384 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
385 if (!tx_ring)
386 continue;
387
388 do {
389 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
390 packets = tx_ring->stats.packets;
391 bytes = tx_ring->stats.bytes;
392 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
393
394 stats->tx_packets += packets;
395 stats->tx_bytes += bytes;
396 rx_ring = &tx_ring[1];
397
398 do {
399 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
400 packets = rx_ring->stats.packets;
401 bytes = rx_ring->stats.bytes;
402 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
403
404 stats->rx_packets += packets;
405 stats->rx_bytes += bytes;
406 }
407 rcu_read_unlock();
408
409 /* following stats updated by i40e_watchdog_subtask() */
410 stats->multicast = vsi_stats->multicast;
411 stats->tx_errors = vsi_stats->tx_errors;
412 stats->tx_dropped = vsi_stats->tx_dropped;
413 stats->rx_errors = vsi_stats->rx_errors;
414 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
415 stats->rx_length_errors = vsi_stats->rx_length_errors;
416
417 return stats;
418 }
419
420 /**
421 * i40e_vsi_reset_stats - Resets all stats of the given vsi
422 * @vsi: the VSI to have its stats reset
423 **/
424 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
425 {
426 struct rtnl_link_stats64 *ns;
427 int i;
428
429 if (!vsi)
430 return;
431
432 ns = i40e_get_vsi_stats_struct(vsi);
433 memset(ns, 0, sizeof(*ns));
434 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
435 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
436 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
437 if (vsi->rx_rings && vsi->rx_rings[0]) {
438 for (i = 0; i < vsi->num_queue_pairs; i++) {
439 memset(&vsi->rx_rings[i]->stats, 0 ,
440 sizeof(vsi->rx_rings[i]->stats));
441 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
442 sizeof(vsi->rx_rings[i]->rx_stats));
443 memset(&vsi->tx_rings[i]->stats, 0 ,
444 sizeof(vsi->tx_rings[i]->stats));
445 memset(&vsi->tx_rings[i]->tx_stats, 0,
446 sizeof(vsi->tx_rings[i]->tx_stats));
447 }
448 }
449 vsi->stat_offsets_loaded = false;
450 }
451
452 /**
453 * i40e_pf_reset_stats - Reset all of the stats for the given pf
454 * @pf: the PF to be reset
455 **/
456 void i40e_pf_reset_stats(struct i40e_pf *pf)
457 {
458 int i;
459
460 memset(&pf->stats, 0, sizeof(pf->stats));
461 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
462 pf->stat_offsets_loaded = false;
463
464 for (i = 0; i < I40E_MAX_VEB; i++) {
465 if (pf->veb[i]) {
466 memset(&pf->veb[i]->stats, 0,
467 sizeof(pf->veb[i]->stats));
468 memset(&pf->veb[i]->stats_offsets, 0,
469 sizeof(pf->veb[i]->stats_offsets));
470 pf->veb[i]->stat_offsets_loaded = false;
471 }
472 }
473 }
474
475 /**
476 * i40e_stat_update48 - read and update a 48 bit stat from the chip
477 * @hw: ptr to the hardware info
478 * @hireg: the high 32 bit reg to read
479 * @loreg: the low 32 bit reg to read
480 * @offset_loaded: has the initial offset been loaded yet
481 * @offset: ptr to current offset value
482 * @stat: ptr to the stat
483 *
484 * Since the device stats are not reset at PFReset, they likely will not
485 * be zeroed when the driver starts. We'll save the first values read
486 * and use them as offsets to be subtracted from the raw values in order
487 * to report stats that count from zero. In the process, we also manage
488 * the potential roll-over.
489 **/
490 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
491 bool offset_loaded, u64 *offset, u64 *stat)
492 {
493 u64 new_data;
494
495 if (hw->device_id == I40E_DEV_ID_QEMU) {
496 new_data = rd32(hw, loreg);
497 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
498 } else {
499 new_data = rd64(hw, loreg);
500 }
501 if (!offset_loaded)
502 *offset = new_data;
503 if (likely(new_data >= *offset))
504 *stat = new_data - *offset;
505 else
506 *stat = (new_data + ((u64)1 << 48)) - *offset;
507 *stat &= 0xFFFFFFFFFFFFULL;
508 }
509
510 /**
511 * i40e_stat_update32 - read and update a 32 bit stat from the chip
512 * @hw: ptr to the hardware info
513 * @reg: the hw reg to read
514 * @offset_loaded: has the initial offset been loaded yet
515 * @offset: ptr to current offset value
516 * @stat: ptr to the stat
517 **/
518 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
519 bool offset_loaded, u64 *offset, u64 *stat)
520 {
521 u32 new_data;
522
523 new_data = rd32(hw, reg);
524 if (!offset_loaded)
525 *offset = new_data;
526 if (likely(new_data >= *offset))
527 *stat = (u32)(new_data - *offset);
528 else
529 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
530 }
531
532 /**
533 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
534 * @vsi: the VSI to be updated
535 **/
536 void i40e_update_eth_stats(struct i40e_vsi *vsi)
537 {
538 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
539 struct i40e_pf *pf = vsi->back;
540 struct i40e_hw *hw = &pf->hw;
541 struct i40e_eth_stats *oes;
542 struct i40e_eth_stats *es; /* device's eth stats */
543
544 es = &vsi->eth_stats;
545 oes = &vsi->eth_stats_offsets;
546
547 /* Gather up the stats that the hw collects */
548 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
549 vsi->stat_offsets_loaded,
550 &oes->tx_errors, &es->tx_errors);
551 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
552 vsi->stat_offsets_loaded,
553 &oes->rx_discards, &es->rx_discards);
554 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
555 vsi->stat_offsets_loaded,
556 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
557 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
558 vsi->stat_offsets_loaded,
559 &oes->tx_errors, &es->tx_errors);
560
561 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
562 I40E_GLV_GORCL(stat_idx),
563 vsi->stat_offsets_loaded,
564 &oes->rx_bytes, &es->rx_bytes);
565 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
566 I40E_GLV_UPRCL(stat_idx),
567 vsi->stat_offsets_loaded,
568 &oes->rx_unicast, &es->rx_unicast);
569 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
570 I40E_GLV_MPRCL(stat_idx),
571 vsi->stat_offsets_loaded,
572 &oes->rx_multicast, &es->rx_multicast);
573 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
574 I40E_GLV_BPRCL(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->rx_broadcast, &es->rx_broadcast);
577
578 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
579 I40E_GLV_GOTCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->tx_bytes, &es->tx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
583 I40E_GLV_UPTCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->tx_unicast, &es->tx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
587 I40E_GLV_MPTCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->tx_multicast, &es->tx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
591 I40E_GLV_BPTCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->tx_broadcast, &es->tx_broadcast);
594 vsi->stat_offsets_loaded = true;
595 }
596
597 /**
598 * i40e_update_veb_stats - Update Switch component statistics
599 * @veb: the VEB being updated
600 **/
601 static void i40e_update_veb_stats(struct i40e_veb *veb)
602 {
603 struct i40e_pf *pf = veb->pf;
604 struct i40e_hw *hw = &pf->hw;
605 struct i40e_eth_stats *oes;
606 struct i40e_eth_stats *es; /* device's eth stats */
607 int idx = 0;
608
609 idx = veb->stats_idx;
610 es = &veb->stats;
611 oes = &veb->stats_offsets;
612
613 /* Gather up the stats that the hw collects */
614 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_discards, &es->tx_discards);
617 if (hw->revision_id > 0)
618 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
619 veb->stat_offsets_loaded,
620 &oes->rx_unknown_protocol,
621 &es->rx_unknown_protocol);
622 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
623 veb->stat_offsets_loaded,
624 &oes->rx_bytes, &es->rx_bytes);
625 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
626 veb->stat_offsets_loaded,
627 &oes->rx_unicast, &es->rx_unicast);
628 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
629 veb->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
632 veb->stat_offsets_loaded,
633 &oes->rx_broadcast, &es->rx_broadcast);
634
635 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
636 veb->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
639 veb->stat_offsets_loaded,
640 &oes->tx_unicast, &es->tx_unicast);
641 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
642 veb->stat_offsets_loaded,
643 &oes->tx_multicast, &es->tx_multicast);
644 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
645 veb->stat_offsets_loaded,
646 &oes->tx_broadcast, &es->tx_broadcast);
647 veb->stat_offsets_loaded = true;
648 }
649
650 #ifdef I40E_FCOE
651 /**
652 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
653 * @vsi: the VSI that is capable of doing FCoE
654 **/
655 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
656 {
657 struct i40e_pf *pf = vsi->back;
658 struct i40e_hw *hw = &pf->hw;
659 struct i40e_fcoe_stats *ofs;
660 struct i40e_fcoe_stats *fs; /* device's eth stats */
661 int idx;
662
663 if (vsi->type != I40E_VSI_FCOE)
664 return;
665
666 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
667 fs = &vsi->fcoe_stats;
668 ofs = &vsi->fcoe_stats_offsets;
669
670 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
671 vsi->fcoe_stat_offsets_loaded,
672 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
673 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
674 vsi->fcoe_stat_offsets_loaded,
675 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
676 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
677 vsi->fcoe_stat_offsets_loaded,
678 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
679 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
680 vsi->fcoe_stat_offsets_loaded,
681 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
682 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
683 vsi->fcoe_stat_offsets_loaded,
684 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
685 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
686 vsi->fcoe_stat_offsets_loaded,
687 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
688 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
689 vsi->fcoe_stat_offsets_loaded,
690 &ofs->fcoe_last_error, &fs->fcoe_last_error);
691 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
692 vsi->fcoe_stat_offsets_loaded,
693 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
694
695 vsi->fcoe_stat_offsets_loaded = true;
696 }
697
698 #endif
699 /**
700 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
701 * @pf: the corresponding PF
702 *
703 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
704 **/
705 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
706 {
707 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
708 struct i40e_hw_port_stats *nsd = &pf->stats;
709 struct i40e_hw *hw = &pf->hw;
710 u64 xoff = 0;
711 u16 i, v;
712
713 if ((hw->fc.current_mode != I40E_FC_FULL) &&
714 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
715 return;
716
717 xoff = nsd->link_xoff_rx;
718 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
719 pf->stat_offsets_loaded,
720 &osd->link_xoff_rx, &nsd->link_xoff_rx);
721
722 /* No new LFC xoff rx */
723 if (!(nsd->link_xoff_rx - xoff))
724 return;
725
726 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
727 for (v = 0; v < pf->num_alloc_vsi; v++) {
728 struct i40e_vsi *vsi = pf->vsi[v];
729
730 if (!vsi || !vsi->tx_rings[0])
731 continue;
732
733 for (i = 0; i < vsi->num_queue_pairs; i++) {
734 struct i40e_ring *ring = vsi->tx_rings[i];
735 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
736 }
737 }
738 }
739
740 /**
741 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
742 * @pf: the corresponding PF
743 *
744 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
745 **/
746 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
747 {
748 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
749 struct i40e_hw_port_stats *nsd = &pf->stats;
750 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
751 struct i40e_dcbx_config *dcb_cfg;
752 struct i40e_hw *hw = &pf->hw;
753 u16 i, v;
754 u8 tc;
755
756 dcb_cfg = &hw->local_dcbx_config;
757
758 /* See if DCB enabled with PFC TC */
759 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
760 !(dcb_cfg->pfc.pfcenable)) {
761 i40e_update_link_xoff_rx(pf);
762 return;
763 }
764
765 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
766 u64 prio_xoff = nsd->priority_xoff_rx[i];
767 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
768 pf->stat_offsets_loaded,
769 &osd->priority_xoff_rx[i],
770 &nsd->priority_xoff_rx[i]);
771
772 /* No new PFC xoff rx */
773 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
774 continue;
775 /* Get the TC for given priority */
776 tc = dcb_cfg->etscfg.prioritytable[i];
777 xoff[tc] = true;
778 }
779
780 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
781 for (v = 0; v < pf->num_alloc_vsi; v++) {
782 struct i40e_vsi *vsi = pf->vsi[v];
783
784 if (!vsi || !vsi->tx_rings[0])
785 continue;
786
787 for (i = 0; i < vsi->num_queue_pairs; i++) {
788 struct i40e_ring *ring = vsi->tx_rings[i];
789
790 tc = ring->dcb_tc;
791 if (xoff[tc])
792 clear_bit(__I40E_HANG_CHECK_ARMED,
793 &ring->state);
794 }
795 }
796 }
797
798 /**
799 * i40e_update_vsi_stats - Update the vsi statistics counters.
800 * @vsi: the VSI to be updated
801 *
802 * There are a few instances where we store the same stat in a
803 * couple of different structs. This is partly because we have
804 * the netdev stats that need to be filled out, which is slightly
805 * different from the "eth_stats" defined by the chip and used in
806 * VF communications. We sort it out here.
807 **/
808 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
809 {
810 struct i40e_pf *pf = vsi->back;
811 struct rtnl_link_stats64 *ons;
812 struct rtnl_link_stats64 *ns; /* netdev stats */
813 struct i40e_eth_stats *oes;
814 struct i40e_eth_stats *es; /* device's eth stats */
815 u32 tx_restart, tx_busy;
816 struct i40e_ring *p;
817 u32 rx_page, rx_buf;
818 u64 bytes, packets;
819 unsigned int start;
820 u64 rx_p, rx_b;
821 u64 tx_p, tx_b;
822 u16 q;
823
824 if (test_bit(__I40E_DOWN, &vsi->state) ||
825 test_bit(__I40E_CONFIG_BUSY, &pf->state))
826 return;
827
828 ns = i40e_get_vsi_stats_struct(vsi);
829 ons = &vsi->net_stats_offsets;
830 es = &vsi->eth_stats;
831 oes = &vsi->eth_stats_offsets;
832
833 /* Gather up the netdev and vsi stats that the driver collects
834 * on the fly during packet processing
835 */
836 rx_b = rx_p = 0;
837 tx_b = tx_p = 0;
838 tx_restart = tx_busy = 0;
839 rx_page = 0;
840 rx_buf = 0;
841 rcu_read_lock();
842 for (q = 0; q < vsi->num_queue_pairs; q++) {
843 /* locate Tx ring */
844 p = ACCESS_ONCE(vsi->tx_rings[q]);
845
846 do {
847 start = u64_stats_fetch_begin_irq(&p->syncp);
848 packets = p->stats.packets;
849 bytes = p->stats.bytes;
850 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
851 tx_b += bytes;
852 tx_p += packets;
853 tx_restart += p->tx_stats.restart_queue;
854 tx_busy += p->tx_stats.tx_busy;
855
856 /* Rx queue is part of the same block as Tx queue */
857 p = &p[1];
858 do {
859 start = u64_stats_fetch_begin_irq(&p->syncp);
860 packets = p->stats.packets;
861 bytes = p->stats.bytes;
862 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
863 rx_b += bytes;
864 rx_p += packets;
865 rx_buf += p->rx_stats.alloc_buff_failed;
866 rx_page += p->rx_stats.alloc_page_failed;
867 }
868 rcu_read_unlock();
869 vsi->tx_restart = tx_restart;
870 vsi->tx_busy = tx_busy;
871 vsi->rx_page_failed = rx_page;
872 vsi->rx_buf_failed = rx_buf;
873
874 ns->rx_packets = rx_p;
875 ns->rx_bytes = rx_b;
876 ns->tx_packets = tx_p;
877 ns->tx_bytes = tx_b;
878
879 /* update netdev stats from eth stats */
880 i40e_update_eth_stats(vsi);
881 ons->tx_errors = oes->tx_errors;
882 ns->tx_errors = es->tx_errors;
883 ons->multicast = oes->rx_multicast;
884 ns->multicast = es->rx_multicast;
885 ons->rx_dropped = oes->rx_discards;
886 ns->rx_dropped = es->rx_discards;
887 ons->tx_dropped = oes->tx_discards;
888 ns->tx_dropped = es->tx_discards;
889
890 /* pull in a couple PF stats if this is the main vsi */
891 if (vsi == pf->vsi[pf->lan_vsi]) {
892 ns->rx_crc_errors = pf->stats.crc_errors;
893 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
894 ns->rx_length_errors = pf->stats.rx_length_errors;
895 }
896 }
897
898 /**
899 * i40e_update_pf_stats - Update the pf statistics counters.
900 * @pf: the PF to be updated
901 **/
902 static void i40e_update_pf_stats(struct i40e_pf *pf)
903 {
904 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
905 struct i40e_hw_port_stats *nsd = &pf->stats;
906 struct i40e_hw *hw = &pf->hw;
907 u32 val;
908 int i;
909
910 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
911 I40E_GLPRT_GORCL(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
914 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
915 I40E_GLPRT_GOTCL(hw->port),
916 pf->stat_offsets_loaded,
917 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
918 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_discards,
921 &nsd->eth.rx_discards);
922 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
923 I40E_GLPRT_UPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_unicast,
926 &nsd->eth.rx_unicast);
927 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
928 I40E_GLPRT_MPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_multicast,
931 &nsd->eth.rx_multicast);
932 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
933 I40E_GLPRT_BPRCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.rx_broadcast,
936 &nsd->eth.rx_broadcast);
937 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
938 I40E_GLPRT_UPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_unicast,
941 &nsd->eth.tx_unicast);
942 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
943 I40E_GLPRT_MPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_multicast,
946 &nsd->eth.tx_multicast);
947 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
948 I40E_GLPRT_BPTCL(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->eth.tx_broadcast,
951 &nsd->eth.tx_broadcast);
952
953 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_dropped_link_down,
956 &nsd->tx_dropped_link_down);
957
958 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
959 pf->stat_offsets_loaded,
960 &osd->crc_errors, &nsd->crc_errors);
961
962 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
963 pf->stat_offsets_loaded,
964 &osd->illegal_bytes, &nsd->illegal_bytes);
965
966 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
967 pf->stat_offsets_loaded,
968 &osd->mac_local_faults,
969 &nsd->mac_local_faults);
970 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->mac_remote_faults,
973 &nsd->mac_remote_faults);
974
975 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->rx_length_errors,
978 &nsd->rx_length_errors);
979
980 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->link_xon_rx, &nsd->link_xon_rx);
983 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->link_xon_tx, &nsd->link_xon_tx);
986 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
987 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
988 pf->stat_offsets_loaded,
989 &osd->link_xoff_tx, &nsd->link_xoff_tx);
990
991 for (i = 0; i < 8; i++) {
992 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
993 pf->stat_offsets_loaded,
994 &osd->priority_xon_rx[i],
995 &nsd->priority_xon_rx[i]);
996 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
997 pf->stat_offsets_loaded,
998 &osd->priority_xon_tx[i],
999 &nsd->priority_xon_tx[i]);
1000 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1001 pf->stat_offsets_loaded,
1002 &osd->priority_xoff_tx[i],
1003 &nsd->priority_xoff_tx[i]);
1004 i40e_stat_update32(hw,
1005 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1006 pf->stat_offsets_loaded,
1007 &osd->priority_xon_2_xoff[i],
1008 &nsd->priority_xon_2_xoff[i]);
1009 }
1010
1011 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1012 I40E_GLPRT_PRC64L(hw->port),
1013 pf->stat_offsets_loaded,
1014 &osd->rx_size_64, &nsd->rx_size_64);
1015 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1016 I40E_GLPRT_PRC127L(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->rx_size_127, &nsd->rx_size_127);
1019 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1020 I40E_GLPRT_PRC255L(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->rx_size_255, &nsd->rx_size_255);
1023 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1024 I40E_GLPRT_PRC511L(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->rx_size_511, &nsd->rx_size_511);
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1028 I40E_GLPRT_PRC1023L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_1023, &nsd->rx_size_1023);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1032 I40E_GLPRT_PRC1522L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_1522, &nsd->rx_size_1522);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1036 I40E_GLPRT_PRC9522L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_big, &nsd->rx_size_big);
1039
1040 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1041 I40E_GLPRT_PTC64L(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->tx_size_64, &nsd->tx_size_64);
1044 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1045 I40E_GLPRT_PTC127L(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->tx_size_127, &nsd->tx_size_127);
1048 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1049 I40E_GLPRT_PTC255L(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->tx_size_255, &nsd->tx_size_255);
1052 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1053 I40E_GLPRT_PTC511L(hw->port),
1054 pf->stat_offsets_loaded,
1055 &osd->tx_size_511, &nsd->tx_size_511);
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1057 I40E_GLPRT_PTC1023L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_1023, &nsd->tx_size_1023);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1061 I40E_GLPRT_PTC1522L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_1522, &nsd->tx_size_1522);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1065 I40E_GLPRT_PTC9522L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_big, &nsd->tx_size_big);
1068
1069 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->rx_undersize, &nsd->rx_undersize);
1072 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->rx_fragments, &nsd->rx_fragments);
1075 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->rx_oversize, &nsd->rx_oversize);
1078 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_jabber, &nsd->rx_jabber);
1081
1082 /* FDIR stats */
1083 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_atr_cnt_idx),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw, I40E_GLQF_PCNT(pf->fd_sb_cnt_idx),
1087 pf->stat_offsets_loaded,
1088 &osd->fd_sb_match, &nsd->fd_sb_match);
1089
1090 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1091 nsd->tx_lpi_status =
1092 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1093 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1094 nsd->rx_lpi_status =
1095 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1096 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1097 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1098 pf->stat_offsets_loaded,
1099 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1100 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1101 pf->stat_offsets_loaded,
1102 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1103
1104 pf->stat_offsets_loaded = true;
1105 }
1106
1107 /**
1108 * i40e_update_stats - Update the various statistics counters.
1109 * @vsi: the VSI to be updated
1110 *
1111 * Update the various stats for this VSI and its related entities.
1112 **/
1113 void i40e_update_stats(struct i40e_vsi *vsi)
1114 {
1115 struct i40e_pf *pf = vsi->back;
1116
1117 if (vsi == pf->vsi[pf->lan_vsi])
1118 i40e_update_pf_stats(pf);
1119
1120 i40e_update_vsi_stats(vsi);
1121 #ifdef I40E_FCOE
1122 i40e_update_fcoe_stats(vsi);
1123 #endif
1124 }
1125
1126 /**
1127 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1128 * @vsi: the VSI to be searched
1129 * @macaddr: the MAC address
1130 * @vlan: the vlan
1131 * @is_vf: make sure its a vf filter, else doesn't matter
1132 * @is_netdev: make sure its a netdev filter, else doesn't matter
1133 *
1134 * Returns ptr to the filter object or NULL
1135 **/
1136 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1137 u8 *macaddr, s16 vlan,
1138 bool is_vf, bool is_netdev)
1139 {
1140 struct i40e_mac_filter *f;
1141
1142 if (!vsi || !macaddr)
1143 return NULL;
1144
1145 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1146 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1147 (vlan == f->vlan) &&
1148 (!is_vf || f->is_vf) &&
1149 (!is_netdev || f->is_netdev))
1150 return f;
1151 }
1152 return NULL;
1153 }
1154
1155 /**
1156 * i40e_find_mac - Find a mac addr in the macvlan filters list
1157 * @vsi: the VSI to be searched
1158 * @macaddr: the MAC address we are searching for
1159 * @is_vf: make sure its a vf filter, else doesn't matter
1160 * @is_netdev: make sure its a netdev filter, else doesn't matter
1161 *
1162 * Returns the first filter with the provided MAC address or NULL if
1163 * MAC address was not found
1164 **/
1165 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1166 bool is_vf, bool is_netdev)
1167 {
1168 struct i40e_mac_filter *f;
1169
1170 if (!vsi || !macaddr)
1171 return NULL;
1172
1173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1174 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1175 (!is_vf || f->is_vf) &&
1176 (!is_netdev || f->is_netdev))
1177 return f;
1178 }
1179 return NULL;
1180 }
1181
1182 /**
1183 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1184 * @vsi: the VSI to be searched
1185 *
1186 * Returns true if VSI is in vlan mode or false otherwise
1187 **/
1188 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1189 {
1190 struct i40e_mac_filter *f;
1191
1192 /* Only -1 for all the filters denotes not in vlan mode
1193 * so we have to go through all the list in order to make sure
1194 */
1195 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1196 if (f->vlan >= 0)
1197 return true;
1198 }
1199
1200 return false;
1201 }
1202
1203 /**
1204 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1205 * @vsi: the VSI to be searched
1206 * @macaddr: the mac address to be filtered
1207 * @is_vf: true if it is a vf
1208 * @is_netdev: true if it is a netdev
1209 *
1210 * Goes through all the macvlan filters and adds a
1211 * macvlan filter for each unique vlan that already exists
1212 *
1213 * Returns first filter found on success, else NULL
1214 **/
1215 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1216 bool is_vf, bool is_netdev)
1217 {
1218 struct i40e_mac_filter *f;
1219
1220 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1221 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1222 is_vf, is_netdev)) {
1223 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1224 is_vf, is_netdev))
1225 return NULL;
1226 }
1227 }
1228
1229 return list_first_entry_or_null(&vsi->mac_filter_list,
1230 struct i40e_mac_filter, list);
1231 }
1232
1233 /**
1234 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1235 * @vsi: the PF Main VSI - inappropriate for any other VSI
1236 * @macaddr: the MAC address
1237 *
1238 * Some older firmware configurations set up a default promiscuous VLAN
1239 * filter that needs to be removed.
1240 **/
1241 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1242 {
1243 struct i40e_aqc_remove_macvlan_element_data element;
1244 struct i40e_pf *pf = vsi->back;
1245 i40e_status aq_ret;
1246
1247 /* Only appropriate for the PF main VSI */
1248 if (vsi->type != I40E_VSI_MAIN)
1249 return -EINVAL;
1250
1251 memset(&element, 0, sizeof(element));
1252 ether_addr_copy(element.mac_addr, macaddr);
1253 element.vlan_tag = 0;
1254 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1255 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1256 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1257 if (aq_ret)
1258 return -ENOENT;
1259
1260 return 0;
1261 }
1262
1263 /**
1264 * i40e_add_filter - Add a mac/vlan filter to the VSI
1265 * @vsi: the VSI to be searched
1266 * @macaddr: the MAC address
1267 * @vlan: the vlan
1268 * @is_vf: make sure its a vf filter, else doesn't matter
1269 * @is_netdev: make sure its a netdev filter, else doesn't matter
1270 *
1271 * Returns ptr to the filter object or NULL when no memory available.
1272 **/
1273 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1274 u8 *macaddr, s16 vlan,
1275 bool is_vf, bool is_netdev)
1276 {
1277 struct i40e_mac_filter *f;
1278
1279 if (!vsi || !macaddr)
1280 return NULL;
1281
1282 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1283 if (!f) {
1284 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1285 if (!f)
1286 goto add_filter_out;
1287
1288 ether_addr_copy(f->macaddr, macaddr);
1289 f->vlan = vlan;
1290 f->changed = true;
1291
1292 INIT_LIST_HEAD(&f->list);
1293 list_add(&f->list, &vsi->mac_filter_list);
1294 }
1295
1296 /* increment counter and add a new flag if needed */
1297 if (is_vf) {
1298 if (!f->is_vf) {
1299 f->is_vf = true;
1300 f->counter++;
1301 }
1302 } else if (is_netdev) {
1303 if (!f->is_netdev) {
1304 f->is_netdev = true;
1305 f->counter++;
1306 }
1307 } else {
1308 f->counter++;
1309 }
1310
1311 /* changed tells sync_filters_subtask to
1312 * push the filter down to the firmware
1313 */
1314 if (f->changed) {
1315 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1316 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1317 }
1318
1319 add_filter_out:
1320 return f;
1321 }
1322
1323 /**
1324 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1325 * @vsi: the VSI to be searched
1326 * @macaddr: the MAC address
1327 * @vlan: the vlan
1328 * @is_vf: make sure it's a vf filter, else doesn't matter
1329 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1330 **/
1331 void i40e_del_filter(struct i40e_vsi *vsi,
1332 u8 *macaddr, s16 vlan,
1333 bool is_vf, bool is_netdev)
1334 {
1335 struct i40e_mac_filter *f;
1336
1337 if (!vsi || !macaddr)
1338 return;
1339
1340 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1341 if (!f || f->counter == 0)
1342 return;
1343
1344 if (is_vf) {
1345 if (f->is_vf) {
1346 f->is_vf = false;
1347 f->counter--;
1348 }
1349 } else if (is_netdev) {
1350 if (f->is_netdev) {
1351 f->is_netdev = false;
1352 f->counter--;
1353 }
1354 } else {
1355 /* make sure we don't remove a filter in use by vf or netdev */
1356 int min_f = 0;
1357 min_f += (f->is_vf ? 1 : 0);
1358 min_f += (f->is_netdev ? 1 : 0);
1359
1360 if (f->counter > min_f)
1361 f->counter--;
1362 }
1363
1364 /* counter == 0 tells sync_filters_subtask to
1365 * remove the filter from the firmware's list
1366 */
1367 if (f->counter == 0) {
1368 f->changed = true;
1369 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1370 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1371 }
1372 }
1373
1374 /**
1375 * i40e_set_mac - NDO callback to set mac address
1376 * @netdev: network interface device structure
1377 * @p: pointer to an address structure
1378 *
1379 * Returns 0 on success, negative on failure
1380 **/
1381 #ifdef I40E_FCOE
1382 int i40e_set_mac(struct net_device *netdev, void *p)
1383 #else
1384 static int i40e_set_mac(struct net_device *netdev, void *p)
1385 #endif
1386 {
1387 struct i40e_netdev_priv *np = netdev_priv(netdev);
1388 struct i40e_vsi *vsi = np->vsi;
1389 struct i40e_pf *pf = vsi->back;
1390 struct i40e_hw *hw = &pf->hw;
1391 struct sockaddr *addr = p;
1392 struct i40e_mac_filter *f;
1393
1394 if (!is_valid_ether_addr(addr->sa_data))
1395 return -EADDRNOTAVAIL;
1396
1397 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1398 netdev_info(netdev, "already using mac address %pM\n",
1399 addr->sa_data);
1400 return 0;
1401 }
1402
1403 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1404 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1405 return -EADDRNOTAVAIL;
1406
1407 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1408 netdev_info(netdev, "returning to hw mac address %pM\n",
1409 hw->mac.addr);
1410 else
1411 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1412
1413 if (vsi->type == I40E_VSI_MAIN) {
1414 i40e_status ret;
1415 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1416 I40E_AQC_WRITE_TYPE_LAA_WOL,
1417 addr->sa_data, NULL);
1418 if (ret) {
1419 netdev_info(netdev,
1420 "Addr change for Main VSI failed: %d\n",
1421 ret);
1422 return -EADDRNOTAVAIL;
1423 }
1424 }
1425
1426 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1427 struct i40e_aqc_remove_macvlan_element_data element;
1428
1429 memset(&element, 0, sizeof(element));
1430 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1431 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1432 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1433 } else {
1434 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1435 false, false);
1436 }
1437
1438 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1439 struct i40e_aqc_add_macvlan_element_data element;
1440
1441 memset(&element, 0, sizeof(element));
1442 ether_addr_copy(element.mac_addr, hw->mac.addr);
1443 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1444 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1445 } else {
1446 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1447 false, false);
1448 if (f)
1449 f->is_laa = true;
1450 }
1451
1452 i40e_sync_vsi_filters(vsi);
1453 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1454
1455 return 0;
1456 }
1457
1458 /**
1459 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1460 * @vsi: the VSI being setup
1461 * @ctxt: VSI context structure
1462 * @enabled_tc: Enabled TCs bitmap
1463 * @is_add: True if called before Add VSI
1464 *
1465 * Setup VSI queue mapping for enabled traffic classes.
1466 **/
1467 #ifdef I40E_FCOE
1468 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1469 struct i40e_vsi_context *ctxt,
1470 u8 enabled_tc,
1471 bool is_add)
1472 #else
1473 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1474 struct i40e_vsi_context *ctxt,
1475 u8 enabled_tc,
1476 bool is_add)
1477 #endif
1478 {
1479 struct i40e_pf *pf = vsi->back;
1480 u16 sections = 0;
1481 u8 netdev_tc = 0;
1482 u16 numtc = 0;
1483 u16 qcount;
1484 u8 offset;
1485 u16 qmap;
1486 int i;
1487 u16 num_tc_qps = 0;
1488
1489 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1490 offset = 0;
1491
1492 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1493 /* Find numtc from enabled TC bitmap */
1494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1495 if (enabled_tc & (1 << i)) /* TC is enabled */
1496 numtc++;
1497 }
1498 if (!numtc) {
1499 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1500 numtc = 1;
1501 }
1502 } else {
1503 /* At least TC0 is enabled in case of non-DCB case */
1504 numtc = 1;
1505 }
1506
1507 vsi->tc_config.numtc = numtc;
1508 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1509 /* Number of queues per enabled TC */
1510 num_tc_qps = vsi->alloc_queue_pairs/numtc;
1511 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1512
1513 /* Setup queue offset/count for all TCs for given VSI */
1514 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1515 /* See if the given TC is enabled for the given VSI */
1516 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1517 int pow, num_qps;
1518
1519 switch (vsi->type) {
1520 case I40E_VSI_MAIN:
1521 qcount = min_t(int, pf->rss_size, num_tc_qps);
1522 break;
1523 #ifdef I40E_FCOE
1524 case I40E_VSI_FCOE:
1525 qcount = num_tc_qps;
1526 break;
1527 #endif
1528 case I40E_VSI_FDIR:
1529 case I40E_VSI_SRIOV:
1530 case I40E_VSI_VMDQ2:
1531 default:
1532 qcount = num_tc_qps;
1533 WARN_ON(i != 0);
1534 break;
1535 }
1536 vsi->tc_config.tc_info[i].qoffset = offset;
1537 vsi->tc_config.tc_info[i].qcount = qcount;
1538
1539 /* find the power-of-2 of the number of queue pairs */
1540 num_qps = qcount;
1541 pow = 0;
1542 while (num_qps && ((1 << pow) < qcount)) {
1543 pow++;
1544 num_qps >>= 1;
1545 }
1546
1547 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1548 qmap =
1549 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1550 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1551
1552 offset += qcount;
1553 } else {
1554 /* TC is not enabled so set the offset to
1555 * default queue and allocate one queue
1556 * for the given TC.
1557 */
1558 vsi->tc_config.tc_info[i].qoffset = 0;
1559 vsi->tc_config.tc_info[i].qcount = 1;
1560 vsi->tc_config.tc_info[i].netdev_tc = 0;
1561
1562 qmap = 0;
1563 }
1564 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1565 }
1566
1567 /* Set actual Tx/Rx queue pairs */
1568 vsi->num_queue_pairs = offset;
1569 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1570 if (vsi->req_queue_pairs > 0)
1571 vsi->num_queue_pairs = vsi->req_queue_pairs;
1572 else
1573 vsi->num_queue_pairs = pf->num_lan_msix;
1574 }
1575
1576 /* Scheduler section valid can only be set for ADD VSI */
1577 if (is_add) {
1578 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1579
1580 ctxt->info.up_enable_bits = enabled_tc;
1581 }
1582 if (vsi->type == I40E_VSI_SRIOV) {
1583 ctxt->info.mapping_flags |=
1584 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1585 for (i = 0; i < vsi->num_queue_pairs; i++)
1586 ctxt->info.queue_mapping[i] =
1587 cpu_to_le16(vsi->base_queue + i);
1588 } else {
1589 ctxt->info.mapping_flags |=
1590 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1591 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1592 }
1593 ctxt->info.valid_sections |= cpu_to_le16(sections);
1594 }
1595
1596 /**
1597 * i40e_set_rx_mode - NDO callback to set the netdev filters
1598 * @netdev: network interface device structure
1599 **/
1600 #ifdef I40E_FCOE
1601 void i40e_set_rx_mode(struct net_device *netdev)
1602 #else
1603 static void i40e_set_rx_mode(struct net_device *netdev)
1604 #endif
1605 {
1606 struct i40e_netdev_priv *np = netdev_priv(netdev);
1607 struct i40e_mac_filter *f, *ftmp;
1608 struct i40e_vsi *vsi = np->vsi;
1609 struct netdev_hw_addr *uca;
1610 struct netdev_hw_addr *mca;
1611 struct netdev_hw_addr *ha;
1612
1613 /* add addr if not already in the filter list */
1614 netdev_for_each_uc_addr(uca, netdev) {
1615 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1616 if (i40e_is_vsi_in_vlan(vsi))
1617 i40e_put_mac_in_vlan(vsi, uca->addr,
1618 false, true);
1619 else
1620 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1621 false, true);
1622 }
1623 }
1624
1625 netdev_for_each_mc_addr(mca, netdev) {
1626 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1627 if (i40e_is_vsi_in_vlan(vsi))
1628 i40e_put_mac_in_vlan(vsi, mca->addr,
1629 false, true);
1630 else
1631 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1632 false, true);
1633 }
1634 }
1635
1636 /* remove filter if not in netdev list */
1637 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1638 bool found = false;
1639
1640 if (!f->is_netdev)
1641 continue;
1642
1643 if (is_multicast_ether_addr(f->macaddr)) {
1644 netdev_for_each_mc_addr(mca, netdev) {
1645 if (ether_addr_equal(mca->addr, f->macaddr)) {
1646 found = true;
1647 break;
1648 }
1649 }
1650 } else {
1651 netdev_for_each_uc_addr(uca, netdev) {
1652 if (ether_addr_equal(uca->addr, f->macaddr)) {
1653 found = true;
1654 break;
1655 }
1656 }
1657
1658 for_each_dev_addr(netdev, ha) {
1659 if (ether_addr_equal(ha->addr, f->macaddr)) {
1660 found = true;
1661 break;
1662 }
1663 }
1664 }
1665 if (!found)
1666 i40e_del_filter(
1667 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1668 }
1669
1670 /* check for other flag changes */
1671 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1672 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1673 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1674 }
1675 }
1676
1677 /**
1678 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1679 * @vsi: ptr to the VSI
1680 *
1681 * Push any outstanding VSI filter changes through the AdminQ.
1682 *
1683 * Returns 0 or error value
1684 **/
1685 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1686 {
1687 struct i40e_mac_filter *f, *ftmp;
1688 bool promisc_forced_on = false;
1689 bool add_happened = false;
1690 int filter_list_len = 0;
1691 u32 changed_flags = 0;
1692 i40e_status aq_ret = 0;
1693 struct i40e_pf *pf;
1694 int num_add = 0;
1695 int num_del = 0;
1696 u16 cmd_flags;
1697
1698 /* empty array typed pointers, kcalloc later */
1699 struct i40e_aqc_add_macvlan_element_data *add_list;
1700 struct i40e_aqc_remove_macvlan_element_data *del_list;
1701
1702 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1703 usleep_range(1000, 2000);
1704 pf = vsi->back;
1705
1706 if (vsi->netdev) {
1707 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1708 vsi->current_netdev_flags = vsi->netdev->flags;
1709 }
1710
1711 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1712 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1713
1714 filter_list_len = pf->hw.aq.asq_buf_size /
1715 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1716 del_list = kcalloc(filter_list_len,
1717 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1718 GFP_KERNEL);
1719 if (!del_list)
1720 return -ENOMEM;
1721
1722 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1723 if (!f->changed)
1724 continue;
1725
1726 if (f->counter != 0)
1727 continue;
1728 f->changed = false;
1729 cmd_flags = 0;
1730
1731 /* add to delete list */
1732 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1733 del_list[num_del].vlan_tag =
1734 cpu_to_le16((u16)(f->vlan ==
1735 I40E_VLAN_ANY ? 0 : f->vlan));
1736
1737 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1738 del_list[num_del].flags = cmd_flags;
1739 num_del++;
1740
1741 /* unlink from filter list */
1742 list_del(&f->list);
1743 kfree(f);
1744
1745 /* flush a full buffer */
1746 if (num_del == filter_list_len) {
1747 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1748 vsi->seid, del_list, num_del,
1749 NULL);
1750 num_del = 0;
1751 memset(del_list, 0, sizeof(*del_list));
1752
1753 if (aq_ret &&
1754 pf->hw.aq.asq_last_status !=
1755 I40E_AQ_RC_ENOENT)
1756 dev_info(&pf->pdev->dev,
1757 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1758 aq_ret,
1759 pf->hw.aq.asq_last_status);
1760 }
1761 }
1762 if (num_del) {
1763 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1764 del_list, num_del, NULL);
1765 num_del = 0;
1766
1767 if (aq_ret &&
1768 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1769 dev_info(&pf->pdev->dev,
1770 "ignoring delete macvlan error, err %d, aq_err %d\n",
1771 aq_ret, pf->hw.aq.asq_last_status);
1772 }
1773
1774 kfree(del_list);
1775 del_list = NULL;
1776
1777 /* do all the adds now */
1778 filter_list_len = pf->hw.aq.asq_buf_size /
1779 sizeof(struct i40e_aqc_add_macvlan_element_data),
1780 add_list = kcalloc(filter_list_len,
1781 sizeof(struct i40e_aqc_add_macvlan_element_data),
1782 GFP_KERNEL);
1783 if (!add_list)
1784 return -ENOMEM;
1785
1786 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1787 if (!f->changed)
1788 continue;
1789
1790 if (f->counter == 0)
1791 continue;
1792 f->changed = false;
1793 add_happened = true;
1794 cmd_flags = 0;
1795
1796 /* add to add array */
1797 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1798 add_list[num_add].vlan_tag =
1799 cpu_to_le16(
1800 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1801 add_list[num_add].queue_number = 0;
1802
1803 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1804 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1805 num_add++;
1806
1807 /* flush a full buffer */
1808 if (num_add == filter_list_len) {
1809 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1810 add_list, num_add,
1811 NULL);
1812 num_add = 0;
1813
1814 if (aq_ret)
1815 break;
1816 memset(add_list, 0, sizeof(*add_list));
1817 }
1818 }
1819 if (num_add) {
1820 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1821 add_list, num_add, NULL);
1822 num_add = 0;
1823 }
1824 kfree(add_list);
1825 add_list = NULL;
1826
1827 if (add_happened && aq_ret &&
1828 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1829 dev_info(&pf->pdev->dev,
1830 "add filter failed, err %d, aq_err %d\n",
1831 aq_ret, pf->hw.aq.asq_last_status);
1832 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1833 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1834 &vsi->state)) {
1835 promisc_forced_on = true;
1836 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1837 &vsi->state);
1838 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1839 }
1840 }
1841 }
1842
1843 /* check for changes in promiscuous modes */
1844 if (changed_flags & IFF_ALLMULTI) {
1845 bool cur_multipromisc;
1846 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1847 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1848 vsi->seid,
1849 cur_multipromisc,
1850 NULL);
1851 if (aq_ret)
1852 dev_info(&pf->pdev->dev,
1853 "set multi promisc failed, err %d, aq_err %d\n",
1854 aq_ret, pf->hw.aq.asq_last_status);
1855 }
1856 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1857 bool cur_promisc;
1858 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1859 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1860 &vsi->state));
1861 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1862 vsi->seid,
1863 cur_promisc, NULL);
1864 if (aq_ret)
1865 dev_info(&pf->pdev->dev,
1866 "set uni promisc failed, err %d, aq_err %d\n",
1867 aq_ret, pf->hw.aq.asq_last_status);
1868 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1869 vsi->seid,
1870 cur_promisc, NULL);
1871 if (aq_ret)
1872 dev_info(&pf->pdev->dev,
1873 "set brdcast promisc failed, err %d, aq_err %d\n",
1874 aq_ret, pf->hw.aq.asq_last_status);
1875 }
1876
1877 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1878 return 0;
1879 }
1880
1881 /**
1882 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1883 * @pf: board private structure
1884 **/
1885 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1886 {
1887 int v;
1888
1889 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1890 return;
1891 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1892
1893 for (v = 0; v < pf->num_alloc_vsi; v++) {
1894 if (pf->vsi[v] &&
1895 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1896 i40e_sync_vsi_filters(pf->vsi[v]);
1897 }
1898 }
1899
1900 /**
1901 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1902 * @netdev: network interface device structure
1903 * @new_mtu: new value for maximum frame size
1904 *
1905 * Returns 0 on success, negative on failure
1906 **/
1907 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1908 {
1909 struct i40e_netdev_priv *np = netdev_priv(netdev);
1910 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1911 struct i40e_vsi *vsi = np->vsi;
1912
1913 /* MTU < 68 is an error and causes problems on some kernels */
1914 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1915 return -EINVAL;
1916
1917 netdev_info(netdev, "changing MTU from %d to %d\n",
1918 netdev->mtu, new_mtu);
1919 netdev->mtu = new_mtu;
1920 if (netif_running(netdev))
1921 i40e_vsi_reinit_locked(vsi);
1922
1923 return 0;
1924 }
1925
1926 /**
1927 * i40e_ioctl - Access the hwtstamp interface
1928 * @netdev: network interface device structure
1929 * @ifr: interface request data
1930 * @cmd: ioctl command
1931 **/
1932 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1933 {
1934 struct i40e_netdev_priv *np = netdev_priv(netdev);
1935 struct i40e_pf *pf = np->vsi->back;
1936
1937 switch (cmd) {
1938 case SIOCGHWTSTAMP:
1939 return i40e_ptp_get_ts_config(pf, ifr);
1940 case SIOCSHWTSTAMP:
1941 return i40e_ptp_set_ts_config(pf, ifr);
1942 default:
1943 return -EOPNOTSUPP;
1944 }
1945 }
1946
1947 /**
1948 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1949 * @vsi: the vsi being adjusted
1950 **/
1951 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1952 {
1953 struct i40e_vsi_context ctxt;
1954 i40e_status ret;
1955
1956 if ((vsi->info.valid_sections &
1957 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1958 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1959 return; /* already enabled */
1960
1961 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1962 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1963 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1964
1965 ctxt.seid = vsi->seid;
1966 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1967 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1968 if (ret) {
1969 dev_info(&vsi->back->pdev->dev,
1970 "%s: update vsi failed, aq_err=%d\n",
1971 __func__, vsi->back->hw.aq.asq_last_status);
1972 }
1973 }
1974
1975 /**
1976 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1977 * @vsi: the vsi being adjusted
1978 **/
1979 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1980 {
1981 struct i40e_vsi_context ctxt;
1982 i40e_status ret;
1983
1984 if ((vsi->info.valid_sections &
1985 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1986 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1987 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1988 return; /* already disabled */
1989
1990 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1991 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1992 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1993
1994 ctxt.seid = vsi->seid;
1995 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1996 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1997 if (ret) {
1998 dev_info(&vsi->back->pdev->dev,
1999 "%s: update vsi failed, aq_err=%d\n",
2000 __func__, vsi->back->hw.aq.asq_last_status);
2001 }
2002 }
2003
2004 /**
2005 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2006 * @netdev: network interface to be adjusted
2007 * @features: netdev features to test if VLAN offload is enabled or not
2008 **/
2009 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2010 {
2011 struct i40e_netdev_priv *np = netdev_priv(netdev);
2012 struct i40e_vsi *vsi = np->vsi;
2013
2014 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2015 i40e_vlan_stripping_enable(vsi);
2016 else
2017 i40e_vlan_stripping_disable(vsi);
2018 }
2019
2020 /**
2021 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2022 * @vsi: the vsi being configured
2023 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2024 **/
2025 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2026 {
2027 struct i40e_mac_filter *f, *add_f;
2028 bool is_netdev, is_vf;
2029
2030 is_vf = (vsi->type == I40E_VSI_SRIOV);
2031 is_netdev = !!(vsi->netdev);
2032
2033 if (is_netdev) {
2034 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2035 is_vf, is_netdev);
2036 if (!add_f) {
2037 dev_info(&vsi->back->pdev->dev,
2038 "Could not add vlan filter %d for %pM\n",
2039 vid, vsi->netdev->dev_addr);
2040 return -ENOMEM;
2041 }
2042 }
2043
2044 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2045 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2046 if (!add_f) {
2047 dev_info(&vsi->back->pdev->dev,
2048 "Could not add vlan filter %d for %pM\n",
2049 vid, f->macaddr);
2050 return -ENOMEM;
2051 }
2052 }
2053
2054 /* Now if we add a vlan tag, make sure to check if it is the first
2055 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2056 * with 0, so we now accept untagged and specified tagged traffic
2057 * (and not any taged and untagged)
2058 */
2059 if (vid > 0) {
2060 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2061 I40E_VLAN_ANY,
2062 is_vf, is_netdev)) {
2063 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2064 I40E_VLAN_ANY, is_vf, is_netdev);
2065 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2066 is_vf, is_netdev);
2067 if (!add_f) {
2068 dev_info(&vsi->back->pdev->dev,
2069 "Could not add filter 0 for %pM\n",
2070 vsi->netdev->dev_addr);
2071 return -ENOMEM;
2072 }
2073 }
2074 }
2075
2076 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2077 if (vid > 0 && !vsi->info.pvid) {
2078 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2079 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2080 is_vf, is_netdev)) {
2081 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2082 is_vf, is_netdev);
2083 add_f = i40e_add_filter(vsi, f->macaddr,
2084 0, is_vf, is_netdev);
2085 if (!add_f) {
2086 dev_info(&vsi->back->pdev->dev,
2087 "Could not add filter 0 for %pM\n",
2088 f->macaddr);
2089 return -ENOMEM;
2090 }
2091 }
2092 }
2093 }
2094
2095 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2096 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2097 return 0;
2098
2099 return i40e_sync_vsi_filters(vsi);
2100 }
2101
2102 /**
2103 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2104 * @vsi: the vsi being configured
2105 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2106 *
2107 * Return: 0 on success or negative otherwise
2108 **/
2109 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2110 {
2111 struct net_device *netdev = vsi->netdev;
2112 struct i40e_mac_filter *f, *add_f;
2113 bool is_vf, is_netdev;
2114 int filter_count = 0;
2115
2116 is_vf = (vsi->type == I40E_VSI_SRIOV);
2117 is_netdev = !!(netdev);
2118
2119 if (is_netdev)
2120 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2121
2122 list_for_each_entry(f, &vsi->mac_filter_list, list)
2123 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2124
2125 /* go through all the filters for this VSI and if there is only
2126 * vid == 0 it means there are no other filters, so vid 0 must
2127 * be replaced with -1. This signifies that we should from now
2128 * on accept any traffic (with any tag present, or untagged)
2129 */
2130 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2131 if (is_netdev) {
2132 if (f->vlan &&
2133 ether_addr_equal(netdev->dev_addr, f->macaddr))
2134 filter_count++;
2135 }
2136
2137 if (f->vlan)
2138 filter_count++;
2139 }
2140
2141 if (!filter_count && is_netdev) {
2142 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2143 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2144 is_vf, is_netdev);
2145 if (!f) {
2146 dev_info(&vsi->back->pdev->dev,
2147 "Could not add filter %d for %pM\n",
2148 I40E_VLAN_ANY, netdev->dev_addr);
2149 return -ENOMEM;
2150 }
2151 }
2152
2153 if (!filter_count) {
2154 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2155 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2156 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2157 is_vf, is_netdev);
2158 if (!add_f) {
2159 dev_info(&vsi->back->pdev->dev,
2160 "Could not add filter %d for %pM\n",
2161 I40E_VLAN_ANY, f->macaddr);
2162 return -ENOMEM;
2163 }
2164 }
2165 }
2166
2167 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2168 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2169 return 0;
2170
2171 return i40e_sync_vsi_filters(vsi);
2172 }
2173
2174 /**
2175 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2176 * @netdev: network interface to be adjusted
2177 * @vid: vlan id to be added
2178 *
2179 * net_device_ops implementation for adding vlan ids
2180 **/
2181 #ifdef I40E_FCOE
2182 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2183 __always_unused __be16 proto, u16 vid)
2184 #else
2185 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2186 __always_unused __be16 proto, u16 vid)
2187 #endif
2188 {
2189 struct i40e_netdev_priv *np = netdev_priv(netdev);
2190 struct i40e_vsi *vsi = np->vsi;
2191 int ret = 0;
2192
2193 if (vid > 4095)
2194 return -EINVAL;
2195
2196 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2197
2198 /* If the network stack called us with vid = 0 then
2199 * it is asking to receive priority tagged packets with
2200 * vlan id 0. Our HW receives them by default when configured
2201 * to receive untagged packets so there is no need to add an
2202 * extra filter for vlan 0 tagged packets.
2203 */
2204 if (vid)
2205 ret = i40e_vsi_add_vlan(vsi, vid);
2206
2207 if (!ret && (vid < VLAN_N_VID))
2208 set_bit(vid, vsi->active_vlans);
2209
2210 return ret;
2211 }
2212
2213 /**
2214 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2215 * @netdev: network interface to be adjusted
2216 * @vid: vlan id to be removed
2217 *
2218 * net_device_ops implementation for removing vlan ids
2219 **/
2220 #ifdef I40E_FCOE
2221 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2222 __always_unused __be16 proto, u16 vid)
2223 #else
2224 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2225 __always_unused __be16 proto, u16 vid)
2226 #endif
2227 {
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
2229 struct i40e_vsi *vsi = np->vsi;
2230
2231 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2232
2233 /* return code is ignored as there is nothing a user
2234 * can do about failure to remove and a log message was
2235 * already printed from the other function
2236 */
2237 i40e_vsi_kill_vlan(vsi, vid);
2238
2239 clear_bit(vid, vsi->active_vlans);
2240
2241 return 0;
2242 }
2243
2244 /**
2245 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2246 * @vsi: the vsi being brought back up
2247 **/
2248 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2249 {
2250 u16 vid;
2251
2252 if (!vsi->netdev)
2253 return;
2254
2255 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2256
2257 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2258 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2259 vid);
2260 }
2261
2262 /**
2263 * i40e_vsi_add_pvid - Add pvid for the VSI
2264 * @vsi: the vsi being adjusted
2265 * @vid: the vlan id to set as a PVID
2266 **/
2267 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2268 {
2269 struct i40e_vsi_context ctxt;
2270 i40e_status aq_ret;
2271
2272 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2273 vsi->info.pvid = cpu_to_le16(vid);
2274 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2275 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2276 I40E_AQ_VSI_PVLAN_EMOD_STR;
2277
2278 ctxt.seid = vsi->seid;
2279 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2280 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2281 if (aq_ret) {
2282 dev_info(&vsi->back->pdev->dev,
2283 "%s: update vsi failed, aq_err=%d\n",
2284 __func__, vsi->back->hw.aq.asq_last_status);
2285 return -ENOENT;
2286 }
2287
2288 return 0;
2289 }
2290
2291 /**
2292 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2293 * @vsi: the vsi being adjusted
2294 *
2295 * Just use the vlan_rx_register() service to put it back to normal
2296 **/
2297 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2298 {
2299 i40e_vlan_stripping_disable(vsi);
2300
2301 vsi->info.pvid = 0;
2302 }
2303
2304 /**
2305 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2306 * @vsi: ptr to the VSI
2307 *
2308 * If this function returns with an error, then it's possible one or
2309 * more of the rings is populated (while the rest are not). It is the
2310 * callers duty to clean those orphaned rings.
2311 *
2312 * Return 0 on success, negative on failure
2313 **/
2314 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2315 {
2316 int i, err = 0;
2317
2318 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2319 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2320
2321 return err;
2322 }
2323
2324 /**
2325 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2326 * @vsi: ptr to the VSI
2327 *
2328 * Free VSI's transmit software resources
2329 **/
2330 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2331 {
2332 int i;
2333
2334 if (!vsi->tx_rings)
2335 return;
2336
2337 for (i = 0; i < vsi->num_queue_pairs; i++)
2338 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2339 i40e_free_tx_resources(vsi->tx_rings[i]);
2340 }
2341
2342 /**
2343 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2344 * @vsi: ptr to the VSI
2345 *
2346 * If this function returns with an error, then it's possible one or
2347 * more of the rings is populated (while the rest are not). It is the
2348 * callers duty to clean those orphaned rings.
2349 *
2350 * Return 0 on success, negative on failure
2351 **/
2352 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2353 {
2354 int i, err = 0;
2355
2356 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2357 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2358 #ifdef I40E_FCOE
2359 i40e_fcoe_setup_ddp_resources(vsi);
2360 #endif
2361 return err;
2362 }
2363
2364 /**
2365 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2366 * @vsi: ptr to the VSI
2367 *
2368 * Free all receive software resources
2369 **/
2370 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2371 {
2372 int i;
2373
2374 if (!vsi->rx_rings)
2375 return;
2376
2377 for (i = 0; i < vsi->num_queue_pairs; i++)
2378 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2379 i40e_free_rx_resources(vsi->rx_rings[i]);
2380 #ifdef I40E_FCOE
2381 i40e_fcoe_free_ddp_resources(vsi);
2382 #endif
2383 }
2384
2385 /**
2386 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2387 * @ring: The Tx ring to configure
2388 *
2389 * This enables/disables XPS for a given Tx descriptor ring
2390 * based on the TCs enabled for the VSI that ring belongs to.
2391 **/
2392 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2393 {
2394 struct i40e_vsi *vsi = ring->vsi;
2395 cpumask_var_t mask;
2396
2397 if (ring->q_vector && ring->netdev) {
2398 /* Single TC mode enable XPS */
2399 if (vsi->tc_config.numtc <= 1 &&
2400 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state)) {
2401 netif_set_xps_queue(ring->netdev,
2402 &ring->q_vector->affinity_mask,
2403 ring->queue_index);
2404 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2405 /* Disable XPS to allow selection based on TC */
2406 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2407 netif_set_xps_queue(ring->netdev, mask,
2408 ring->queue_index);
2409 free_cpumask_var(mask);
2410 }
2411 }
2412 }
2413
2414 /**
2415 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2416 * @ring: The Tx ring to configure
2417 *
2418 * Configure the Tx descriptor ring in the HMC context.
2419 **/
2420 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2421 {
2422 struct i40e_vsi *vsi = ring->vsi;
2423 u16 pf_q = vsi->base_queue + ring->queue_index;
2424 struct i40e_hw *hw = &vsi->back->hw;
2425 struct i40e_hmc_obj_txq tx_ctx;
2426 i40e_status err = 0;
2427 u32 qtx_ctl = 0;
2428
2429 /* some ATR related tx ring init */
2430 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2431 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2432 ring->atr_count = 0;
2433 } else {
2434 ring->atr_sample_rate = 0;
2435 }
2436
2437 /* configure XPS */
2438 i40e_config_xps_tx_ring(ring);
2439
2440 /* clear the context structure first */
2441 memset(&tx_ctx, 0, sizeof(tx_ctx));
2442
2443 tx_ctx.new_context = 1;
2444 tx_ctx.base = (ring->dma / 128);
2445 tx_ctx.qlen = ring->count;
2446 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2447 I40E_FLAG_FD_ATR_ENABLED));
2448 #ifdef I40E_FCOE
2449 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2450 #endif
2451 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2452 /* FDIR VSI tx ring can still use RS bit and writebacks */
2453 if (vsi->type != I40E_VSI_FDIR)
2454 tx_ctx.head_wb_ena = 1;
2455 tx_ctx.head_wb_addr = ring->dma +
2456 (ring->count * sizeof(struct i40e_tx_desc));
2457
2458 /* As part of VSI creation/update, FW allocates certain
2459 * Tx arbitration queue sets for each TC enabled for
2460 * the VSI. The FW returns the handles to these queue
2461 * sets as part of the response buffer to Add VSI,
2462 * Update VSI, etc. AQ commands. It is expected that
2463 * these queue set handles be associated with the Tx
2464 * queues by the driver as part of the TX queue context
2465 * initialization. This has to be done regardless of
2466 * DCB as by default everything is mapped to TC0.
2467 */
2468 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2469 tx_ctx.rdylist_act = 0;
2470
2471 /* clear the context in the HMC */
2472 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2473 if (err) {
2474 dev_info(&vsi->back->pdev->dev,
2475 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2476 ring->queue_index, pf_q, err);
2477 return -ENOMEM;
2478 }
2479
2480 /* set the context in the HMC */
2481 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2482 if (err) {
2483 dev_info(&vsi->back->pdev->dev,
2484 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2485 ring->queue_index, pf_q, err);
2486 return -ENOMEM;
2487 }
2488
2489 /* Now associate this queue with this PCI function */
2490 if (vsi->type == I40E_VSI_VMDQ2) {
2491 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2492 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2493 I40E_QTX_CTL_VFVM_INDX_MASK;
2494 } else {
2495 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2496 }
2497
2498 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2499 I40E_QTX_CTL_PF_INDX_MASK);
2500 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2501 i40e_flush(hw);
2502
2503 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2504
2505 /* cache tail off for easier writes later */
2506 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2507
2508 return 0;
2509 }
2510
2511 /**
2512 * i40e_configure_rx_ring - Configure a receive ring context
2513 * @ring: The Rx ring to configure
2514 *
2515 * Configure the Rx descriptor ring in the HMC context.
2516 **/
2517 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2518 {
2519 struct i40e_vsi *vsi = ring->vsi;
2520 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2521 u16 pf_q = vsi->base_queue + ring->queue_index;
2522 struct i40e_hw *hw = &vsi->back->hw;
2523 struct i40e_hmc_obj_rxq rx_ctx;
2524 i40e_status err = 0;
2525
2526 ring->state = 0;
2527
2528 /* clear the context structure first */
2529 memset(&rx_ctx, 0, sizeof(rx_ctx));
2530
2531 ring->rx_buf_len = vsi->rx_buf_len;
2532 ring->rx_hdr_len = vsi->rx_hdr_len;
2533
2534 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2535 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2536
2537 rx_ctx.base = (ring->dma / 128);
2538 rx_ctx.qlen = ring->count;
2539
2540 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2541 set_ring_16byte_desc_enabled(ring);
2542 rx_ctx.dsize = 0;
2543 } else {
2544 rx_ctx.dsize = 1;
2545 }
2546
2547 rx_ctx.dtype = vsi->dtype;
2548 if (vsi->dtype) {
2549 set_ring_ps_enabled(ring);
2550 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2551 I40E_RX_SPLIT_IP |
2552 I40E_RX_SPLIT_TCP_UDP |
2553 I40E_RX_SPLIT_SCTP;
2554 } else {
2555 rx_ctx.hsplit_0 = 0;
2556 }
2557
2558 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2559 (chain_len * ring->rx_buf_len));
2560 if (hw->revision_id == 0)
2561 rx_ctx.lrxqthresh = 0;
2562 else
2563 rx_ctx.lrxqthresh = 2;
2564 rx_ctx.crcstrip = 1;
2565 rx_ctx.l2tsel = 1;
2566 rx_ctx.showiv = 1;
2567 #ifdef I40E_FCOE
2568 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2569 #endif
2570 /* set the prefena field to 1 because the manual says to */
2571 rx_ctx.prefena = 1;
2572
2573 /* clear the context in the HMC */
2574 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2575 if (err) {
2576 dev_info(&vsi->back->pdev->dev,
2577 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2578 ring->queue_index, pf_q, err);
2579 return -ENOMEM;
2580 }
2581
2582 /* set the context in the HMC */
2583 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2584 if (err) {
2585 dev_info(&vsi->back->pdev->dev,
2586 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2587 ring->queue_index, pf_q, err);
2588 return -ENOMEM;
2589 }
2590
2591 /* cache tail for quicker writes, and clear the reg before use */
2592 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2593 writel(0, ring->tail);
2594
2595 if (ring_is_ps_enabled(ring)) {
2596 i40e_alloc_rx_headers(ring);
2597 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2598 } else {
2599 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2600 }
2601
2602 return 0;
2603 }
2604
2605 /**
2606 * i40e_vsi_configure_tx - Configure the VSI for Tx
2607 * @vsi: VSI structure describing this set of rings and resources
2608 *
2609 * Configure the Tx VSI for operation.
2610 **/
2611 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2612 {
2613 int err = 0;
2614 u16 i;
2615
2616 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2617 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2618
2619 return err;
2620 }
2621
2622 /**
2623 * i40e_vsi_configure_rx - Configure the VSI for Rx
2624 * @vsi: the VSI being configured
2625 *
2626 * Configure the Rx VSI for operation.
2627 **/
2628 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2629 {
2630 int err = 0;
2631 u16 i;
2632
2633 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2634 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2635 + ETH_FCS_LEN + VLAN_HLEN;
2636 else
2637 vsi->max_frame = I40E_RXBUFFER_2048;
2638
2639 /* figure out correct receive buffer length */
2640 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2641 I40E_FLAG_RX_PS_ENABLED)) {
2642 case I40E_FLAG_RX_1BUF_ENABLED:
2643 vsi->rx_hdr_len = 0;
2644 vsi->rx_buf_len = vsi->max_frame;
2645 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2646 break;
2647 case I40E_FLAG_RX_PS_ENABLED:
2648 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2649 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2650 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2651 break;
2652 default:
2653 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2654 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2655 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2656 break;
2657 }
2658
2659 #ifdef I40E_FCOE
2660 /* setup rx buffer for FCoE */
2661 if ((vsi->type == I40E_VSI_FCOE) &&
2662 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2663 vsi->rx_hdr_len = 0;
2664 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2665 vsi->max_frame = I40E_RXBUFFER_3072;
2666 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2667 }
2668
2669 #endif /* I40E_FCOE */
2670 /* round up for the chip's needs */
2671 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2672 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2673 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2674 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2675
2676 /* set up individual rings */
2677 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2678 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2679
2680 return err;
2681 }
2682
2683 /**
2684 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2685 * @vsi: ptr to the VSI
2686 **/
2687 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2688 {
2689 struct i40e_ring *tx_ring, *rx_ring;
2690 u16 qoffset, qcount;
2691 int i, n;
2692
2693 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2694 return;
2695
2696 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2697 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2698 continue;
2699
2700 qoffset = vsi->tc_config.tc_info[n].qoffset;
2701 qcount = vsi->tc_config.tc_info[n].qcount;
2702 for (i = qoffset; i < (qoffset + qcount); i++) {
2703 rx_ring = vsi->rx_rings[i];
2704 tx_ring = vsi->tx_rings[i];
2705 rx_ring->dcb_tc = n;
2706 tx_ring->dcb_tc = n;
2707 }
2708 }
2709 }
2710
2711 /**
2712 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2713 * @vsi: ptr to the VSI
2714 **/
2715 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2716 {
2717 if (vsi->netdev)
2718 i40e_set_rx_mode(vsi->netdev);
2719 }
2720
2721 /**
2722 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2723 * @vsi: Pointer to the targeted VSI
2724 *
2725 * This function replays the hlist on the hw where all the SB Flow Director
2726 * filters were saved.
2727 **/
2728 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2729 {
2730 struct i40e_fdir_filter *filter;
2731 struct i40e_pf *pf = vsi->back;
2732 struct hlist_node *node;
2733
2734 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2735 return;
2736
2737 hlist_for_each_entry_safe(filter, node,
2738 &pf->fdir_filter_list, fdir_node) {
2739 i40e_add_del_fdir(vsi, filter, true);
2740 }
2741 }
2742
2743 /**
2744 * i40e_vsi_configure - Set up the VSI for action
2745 * @vsi: the VSI being configured
2746 **/
2747 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2748 {
2749 int err;
2750
2751 i40e_set_vsi_rx_mode(vsi);
2752 i40e_restore_vlan(vsi);
2753 i40e_vsi_config_dcb_rings(vsi);
2754 err = i40e_vsi_configure_tx(vsi);
2755 if (!err)
2756 err = i40e_vsi_configure_rx(vsi);
2757
2758 return err;
2759 }
2760
2761 /**
2762 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2763 * @vsi: the VSI being configured
2764 **/
2765 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2766 {
2767 struct i40e_pf *pf = vsi->back;
2768 struct i40e_q_vector *q_vector;
2769 struct i40e_hw *hw = &pf->hw;
2770 u16 vector;
2771 int i, q;
2772 u32 val;
2773 u32 qp;
2774
2775 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2776 * and PFINT_LNKLSTn registers, e.g.:
2777 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2778 */
2779 qp = vsi->base_queue;
2780 vector = vsi->base_vector;
2781 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2782 q_vector = vsi->q_vectors[i];
2783 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2784 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2785 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2786 q_vector->rx.itr);
2787 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2788 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2789 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2790 q_vector->tx.itr);
2791
2792 /* Linked list for the queuepairs assigned to this vector */
2793 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2794 for (q = 0; q < q_vector->num_ringpairs; q++) {
2795 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2796 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2797 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2798 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2799 (I40E_QUEUE_TYPE_TX
2800 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2801
2802 wr32(hw, I40E_QINT_RQCTL(qp), val);
2803
2804 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2805 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2806 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2807 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2808 (I40E_QUEUE_TYPE_RX
2809 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2810
2811 /* Terminate the linked list */
2812 if (q == (q_vector->num_ringpairs - 1))
2813 val |= (I40E_QUEUE_END_OF_LIST
2814 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2815
2816 wr32(hw, I40E_QINT_TQCTL(qp), val);
2817 qp++;
2818 }
2819 }
2820
2821 i40e_flush(hw);
2822 }
2823
2824 /**
2825 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2826 * @hw: ptr to the hardware info
2827 **/
2828 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2829 {
2830 struct i40e_hw *hw = &pf->hw;
2831 u32 val;
2832
2833 /* clear things first */
2834 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2835 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2836
2837 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2838 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2839 I40E_PFINT_ICR0_ENA_GRST_MASK |
2840 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2841 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2842 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2843 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2844 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2845
2846 if (pf->flags & I40E_FLAG_PTP)
2847 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2848
2849 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2850
2851 /* SW_ITR_IDX = 0, but don't change INTENA */
2852 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2853 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2854
2855 /* OTHER_ITR_IDX = 0 */
2856 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2857 }
2858
2859 /**
2860 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2861 * @vsi: the VSI being configured
2862 **/
2863 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2864 {
2865 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2866 struct i40e_pf *pf = vsi->back;
2867 struct i40e_hw *hw = &pf->hw;
2868 u32 val;
2869
2870 /* set the ITR configuration */
2871 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2872 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2873 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2874 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2875 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2876 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2877
2878 i40e_enable_misc_int_causes(pf);
2879
2880 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2881 wr32(hw, I40E_PFINT_LNKLST0, 0);
2882
2883 /* Associate the queue pair to the vector and enable the queue int */
2884 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2885 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2886 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2887
2888 wr32(hw, I40E_QINT_RQCTL(0), val);
2889
2890 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2891 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2892 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2893
2894 wr32(hw, I40E_QINT_TQCTL(0), val);
2895 i40e_flush(hw);
2896 }
2897
2898 /**
2899 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2900 * @pf: board private structure
2901 **/
2902 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2903 {
2904 struct i40e_hw *hw = &pf->hw;
2905
2906 wr32(hw, I40E_PFINT_DYN_CTL0,
2907 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2908 i40e_flush(hw);
2909 }
2910
2911 /**
2912 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2913 * @pf: board private structure
2914 **/
2915 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2916 {
2917 struct i40e_hw *hw = &pf->hw;
2918 u32 val;
2919
2920 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2921 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2922 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2923
2924 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2925 i40e_flush(hw);
2926 }
2927
2928 /**
2929 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2930 * @vsi: pointer to a vsi
2931 * @vector: enable a particular Hw Interrupt vector
2932 **/
2933 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2934 {
2935 struct i40e_pf *pf = vsi->back;
2936 struct i40e_hw *hw = &pf->hw;
2937 u32 val;
2938
2939 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2940 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2941 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2942 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2943 /* skip the flush */
2944 }
2945
2946 /**
2947 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2948 * @vsi: pointer to a vsi
2949 * @vector: disable a particular Hw Interrupt vector
2950 **/
2951 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2952 {
2953 struct i40e_pf *pf = vsi->back;
2954 struct i40e_hw *hw = &pf->hw;
2955 u32 val;
2956
2957 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
2958 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2959 i40e_flush(hw);
2960 }
2961
2962 /**
2963 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2964 * @irq: interrupt number
2965 * @data: pointer to a q_vector
2966 **/
2967 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2968 {
2969 struct i40e_q_vector *q_vector = data;
2970
2971 if (!q_vector->tx.ring && !q_vector->rx.ring)
2972 return IRQ_HANDLED;
2973
2974 napi_schedule(&q_vector->napi);
2975
2976 return IRQ_HANDLED;
2977 }
2978
2979 /**
2980 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2981 * @vsi: the VSI being configured
2982 * @basename: name for the vector
2983 *
2984 * Allocates MSI-X vectors and requests interrupts from the kernel.
2985 **/
2986 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2987 {
2988 int q_vectors = vsi->num_q_vectors;
2989 struct i40e_pf *pf = vsi->back;
2990 int base = vsi->base_vector;
2991 int rx_int_idx = 0;
2992 int tx_int_idx = 0;
2993 int vector, err;
2994
2995 for (vector = 0; vector < q_vectors; vector++) {
2996 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2997
2998 if (q_vector->tx.ring && q_vector->rx.ring) {
2999 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3000 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3001 tx_int_idx++;
3002 } else if (q_vector->rx.ring) {
3003 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3004 "%s-%s-%d", basename, "rx", rx_int_idx++);
3005 } else if (q_vector->tx.ring) {
3006 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3007 "%s-%s-%d", basename, "tx", tx_int_idx++);
3008 } else {
3009 /* skip this unused q_vector */
3010 continue;
3011 }
3012 err = request_irq(pf->msix_entries[base + vector].vector,
3013 vsi->irq_handler,
3014 0,
3015 q_vector->name,
3016 q_vector);
3017 if (err) {
3018 dev_info(&pf->pdev->dev,
3019 "%s: request_irq failed, error: %d\n",
3020 __func__, err);
3021 goto free_queue_irqs;
3022 }
3023 /* assign the mask for this irq */
3024 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3025 &q_vector->affinity_mask);
3026 }
3027
3028 vsi->irqs_ready = true;
3029 return 0;
3030
3031 free_queue_irqs:
3032 while (vector) {
3033 vector--;
3034 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3035 NULL);
3036 free_irq(pf->msix_entries[base + vector].vector,
3037 &(vsi->q_vectors[vector]));
3038 }
3039 return err;
3040 }
3041
3042 /**
3043 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3044 * @vsi: the VSI being un-configured
3045 **/
3046 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3047 {
3048 struct i40e_pf *pf = vsi->back;
3049 struct i40e_hw *hw = &pf->hw;
3050 int base = vsi->base_vector;
3051 int i;
3052
3053 for (i = 0; i < vsi->num_queue_pairs; i++) {
3054 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3055 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3056 }
3057
3058 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3059 for (i = vsi->base_vector;
3060 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3061 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3062
3063 i40e_flush(hw);
3064 for (i = 0; i < vsi->num_q_vectors; i++)
3065 synchronize_irq(pf->msix_entries[i + base].vector);
3066 } else {
3067 /* Legacy and MSI mode - this stops all interrupt handling */
3068 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3069 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3070 i40e_flush(hw);
3071 synchronize_irq(pf->pdev->irq);
3072 }
3073 }
3074
3075 /**
3076 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3077 * @vsi: the VSI being configured
3078 **/
3079 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3080 {
3081 struct i40e_pf *pf = vsi->back;
3082 int i;
3083
3084 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3085 for (i = vsi->base_vector;
3086 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3087 i40e_irq_dynamic_enable(vsi, i);
3088 } else {
3089 i40e_irq_dynamic_enable_icr0(pf);
3090 }
3091
3092 i40e_flush(&pf->hw);
3093 return 0;
3094 }
3095
3096 /**
3097 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3098 * @pf: board private structure
3099 **/
3100 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3101 {
3102 /* Disable ICR 0 */
3103 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3104 i40e_flush(&pf->hw);
3105 }
3106
3107 /**
3108 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3109 * @irq: interrupt number
3110 * @data: pointer to a q_vector
3111 *
3112 * This is the handler used for all MSI/Legacy interrupts, and deals
3113 * with both queue and non-queue interrupts. This is also used in
3114 * MSIX mode to handle the non-queue interrupts.
3115 **/
3116 static irqreturn_t i40e_intr(int irq, void *data)
3117 {
3118 struct i40e_pf *pf = (struct i40e_pf *)data;
3119 struct i40e_hw *hw = &pf->hw;
3120 irqreturn_t ret = IRQ_NONE;
3121 u32 icr0, icr0_remaining;
3122 u32 val, ena_mask;
3123
3124 icr0 = rd32(hw, I40E_PFINT_ICR0);
3125 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3126
3127 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3128 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3129 goto enable_intr;
3130
3131 /* if interrupt but no bits showing, must be SWINT */
3132 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3133 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3134 pf->sw_int_count++;
3135
3136 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3137 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3138
3139 /* temporarily disable queue cause for NAPI processing */
3140 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3141 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3142 wr32(hw, I40E_QINT_RQCTL(0), qval);
3143
3144 qval = rd32(hw, I40E_QINT_TQCTL(0));
3145 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3146 wr32(hw, I40E_QINT_TQCTL(0), qval);
3147
3148 if (!test_bit(__I40E_DOWN, &pf->state))
3149 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3150 }
3151
3152 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3153 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3154 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3155 }
3156
3157 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3158 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3159 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3160 }
3161
3162 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3163 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3164 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3165 }
3166
3167 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3168 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3169 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3170 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3171 val = rd32(hw, I40E_GLGEN_RSTAT);
3172 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3173 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3174 if (val == I40E_RESET_CORER) {
3175 pf->corer_count++;
3176 } else if (val == I40E_RESET_GLOBR) {
3177 pf->globr_count++;
3178 } else if (val == I40E_RESET_EMPR) {
3179 pf->empr_count++;
3180 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3181 }
3182 }
3183
3184 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3185 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3186 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3187 }
3188
3189 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3190 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3191
3192 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3193 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3194 i40e_ptp_tx_hwtstamp(pf);
3195 }
3196 }
3197
3198 /* If a critical error is pending we have no choice but to reset the
3199 * device.
3200 * Report and mask out any remaining unexpected interrupts.
3201 */
3202 icr0_remaining = icr0 & ena_mask;
3203 if (icr0_remaining) {
3204 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3205 icr0_remaining);
3206 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3207 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3208 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3209 dev_info(&pf->pdev->dev, "device will be reset\n");
3210 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3211 i40e_service_event_schedule(pf);
3212 }
3213 ena_mask &= ~icr0_remaining;
3214 }
3215 ret = IRQ_HANDLED;
3216
3217 enable_intr:
3218 /* re-enable interrupt causes */
3219 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3220 if (!test_bit(__I40E_DOWN, &pf->state)) {
3221 i40e_service_event_schedule(pf);
3222 i40e_irq_dynamic_enable_icr0(pf);
3223 }
3224
3225 return ret;
3226 }
3227
3228 /**
3229 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3230 * @tx_ring: tx ring to clean
3231 * @budget: how many cleans we're allowed
3232 *
3233 * Returns true if there's any budget left (e.g. the clean is finished)
3234 **/
3235 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3236 {
3237 struct i40e_vsi *vsi = tx_ring->vsi;
3238 u16 i = tx_ring->next_to_clean;
3239 struct i40e_tx_buffer *tx_buf;
3240 struct i40e_tx_desc *tx_desc;
3241
3242 tx_buf = &tx_ring->tx_bi[i];
3243 tx_desc = I40E_TX_DESC(tx_ring, i);
3244 i -= tx_ring->count;
3245
3246 do {
3247 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3248
3249 /* if next_to_watch is not set then there is no work pending */
3250 if (!eop_desc)
3251 break;
3252
3253 /* prevent any other reads prior to eop_desc */
3254 read_barrier_depends();
3255
3256 /* if the descriptor isn't done, no work yet to do */
3257 if (!(eop_desc->cmd_type_offset_bsz &
3258 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3259 break;
3260
3261 /* clear next_to_watch to prevent false hangs */
3262 tx_buf->next_to_watch = NULL;
3263
3264 tx_desc->buffer_addr = 0;
3265 tx_desc->cmd_type_offset_bsz = 0;
3266 /* move past filter desc */
3267 tx_buf++;
3268 tx_desc++;
3269 i++;
3270 if (unlikely(!i)) {
3271 i -= tx_ring->count;
3272 tx_buf = tx_ring->tx_bi;
3273 tx_desc = I40E_TX_DESC(tx_ring, 0);
3274 }
3275 /* unmap skb header data */
3276 dma_unmap_single(tx_ring->dev,
3277 dma_unmap_addr(tx_buf, dma),
3278 dma_unmap_len(tx_buf, len),
3279 DMA_TO_DEVICE);
3280 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3281 kfree(tx_buf->raw_buf);
3282
3283 tx_buf->raw_buf = NULL;
3284 tx_buf->tx_flags = 0;
3285 tx_buf->next_to_watch = NULL;
3286 dma_unmap_len_set(tx_buf, len, 0);
3287 tx_desc->buffer_addr = 0;
3288 tx_desc->cmd_type_offset_bsz = 0;
3289
3290 /* move us past the eop_desc for start of next FD desc */
3291 tx_buf++;
3292 tx_desc++;
3293 i++;
3294 if (unlikely(!i)) {
3295 i -= tx_ring->count;
3296 tx_buf = tx_ring->tx_bi;
3297 tx_desc = I40E_TX_DESC(tx_ring, 0);
3298 }
3299
3300 /* update budget accounting */
3301 budget--;
3302 } while (likely(budget));
3303
3304 i += tx_ring->count;
3305 tx_ring->next_to_clean = i;
3306
3307 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3308 i40e_irq_dynamic_enable(vsi,
3309 tx_ring->q_vector->v_idx + vsi->base_vector);
3310 }
3311 return budget > 0;
3312 }
3313
3314 /**
3315 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3316 * @irq: interrupt number
3317 * @data: pointer to a q_vector
3318 **/
3319 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3320 {
3321 struct i40e_q_vector *q_vector = data;
3322 struct i40e_vsi *vsi;
3323
3324 if (!q_vector->tx.ring)
3325 return IRQ_HANDLED;
3326
3327 vsi = q_vector->tx.ring->vsi;
3328 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3329
3330 return IRQ_HANDLED;
3331 }
3332
3333 /**
3334 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3335 * @vsi: the VSI being configured
3336 * @v_idx: vector index
3337 * @qp_idx: queue pair index
3338 **/
3339 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3340 {
3341 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3342 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3343 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3344
3345 tx_ring->q_vector = q_vector;
3346 tx_ring->next = q_vector->tx.ring;
3347 q_vector->tx.ring = tx_ring;
3348 q_vector->tx.count++;
3349
3350 rx_ring->q_vector = q_vector;
3351 rx_ring->next = q_vector->rx.ring;
3352 q_vector->rx.ring = rx_ring;
3353 q_vector->rx.count++;
3354 }
3355
3356 /**
3357 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3358 * @vsi: the VSI being configured
3359 *
3360 * This function maps descriptor rings to the queue-specific vectors
3361 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3362 * one vector per queue pair, but on a constrained vector budget, we
3363 * group the queue pairs as "efficiently" as possible.
3364 **/
3365 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3366 {
3367 int qp_remaining = vsi->num_queue_pairs;
3368 int q_vectors = vsi->num_q_vectors;
3369 int num_ringpairs;
3370 int v_start = 0;
3371 int qp_idx = 0;
3372
3373 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3374 * group them so there are multiple queues per vector.
3375 * It is also important to go through all the vectors available to be
3376 * sure that if we don't use all the vectors, that the remaining vectors
3377 * are cleared. This is especially important when decreasing the
3378 * number of queues in use.
3379 */
3380 for (; v_start < q_vectors; v_start++) {
3381 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3382
3383 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3384
3385 q_vector->num_ringpairs = num_ringpairs;
3386
3387 q_vector->rx.count = 0;
3388 q_vector->tx.count = 0;
3389 q_vector->rx.ring = NULL;
3390 q_vector->tx.ring = NULL;
3391
3392 while (num_ringpairs--) {
3393 map_vector_to_qp(vsi, v_start, qp_idx);
3394 qp_idx++;
3395 qp_remaining--;
3396 }
3397 }
3398 }
3399
3400 /**
3401 * i40e_vsi_request_irq - Request IRQ from the OS
3402 * @vsi: the VSI being configured
3403 * @basename: name for the vector
3404 **/
3405 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3406 {
3407 struct i40e_pf *pf = vsi->back;
3408 int err;
3409
3410 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3411 err = i40e_vsi_request_irq_msix(vsi, basename);
3412 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3413 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3414 pf->int_name, pf);
3415 else
3416 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3417 pf->int_name, pf);
3418
3419 if (err)
3420 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3421
3422 return err;
3423 }
3424
3425 #ifdef CONFIG_NET_POLL_CONTROLLER
3426 /**
3427 * i40e_netpoll - A Polling 'interrupt'handler
3428 * @netdev: network interface device structure
3429 *
3430 * This is used by netconsole to send skbs without having to re-enable
3431 * interrupts. It's not called while the normal interrupt routine is executing.
3432 **/
3433 #ifdef I40E_FCOE
3434 void i40e_netpoll(struct net_device *netdev)
3435 #else
3436 static void i40e_netpoll(struct net_device *netdev)
3437 #endif
3438 {
3439 struct i40e_netdev_priv *np = netdev_priv(netdev);
3440 struct i40e_vsi *vsi = np->vsi;
3441 struct i40e_pf *pf = vsi->back;
3442 int i;
3443
3444 /* if interface is down do nothing */
3445 if (test_bit(__I40E_DOWN, &vsi->state))
3446 return;
3447
3448 pf->flags |= I40E_FLAG_IN_NETPOLL;
3449 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3450 for (i = 0; i < vsi->num_q_vectors; i++)
3451 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3452 } else {
3453 i40e_intr(pf->pdev->irq, netdev);
3454 }
3455 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3456 }
3457 #endif
3458
3459 /**
3460 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3461 * @pf: the PF being configured
3462 * @pf_q: the PF queue
3463 * @enable: enable or disable state of the queue
3464 *
3465 * This routine will wait for the given Tx queue of the PF to reach the
3466 * enabled or disabled state.
3467 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3468 * multiple retries; else will return 0 in case of success.
3469 **/
3470 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3471 {
3472 int i;
3473 u32 tx_reg;
3474
3475 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3476 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3477 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3478 break;
3479
3480 usleep_range(10, 20);
3481 }
3482 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3483 return -ETIMEDOUT;
3484
3485 return 0;
3486 }
3487
3488 /**
3489 * i40e_vsi_control_tx - Start or stop a VSI's rings
3490 * @vsi: the VSI being configured
3491 * @enable: start or stop the rings
3492 **/
3493 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3494 {
3495 struct i40e_pf *pf = vsi->back;
3496 struct i40e_hw *hw = &pf->hw;
3497 int i, j, pf_q, ret = 0;
3498 u32 tx_reg;
3499
3500 pf_q = vsi->base_queue;
3501 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3502
3503 /* warn the TX unit of coming changes */
3504 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3505 if (!enable)
3506 usleep_range(10, 20);
3507
3508 for (j = 0; j < 50; j++) {
3509 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3510 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3511 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3512 break;
3513 usleep_range(1000, 2000);
3514 }
3515 /* Skip if the queue is already in the requested state */
3516 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3517 continue;
3518
3519 /* turn on/off the queue */
3520 if (enable) {
3521 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3522 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3523 } else {
3524 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3525 }
3526
3527 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3528 /* No waiting for the Tx queue to disable */
3529 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3530 continue;
3531
3532 /* wait for the change to finish */
3533 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3534 if (ret) {
3535 dev_info(&pf->pdev->dev,
3536 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3537 __func__, vsi->seid, pf_q,
3538 (enable ? "en" : "dis"));
3539 break;
3540 }
3541 }
3542
3543 if (hw->revision_id == 0)
3544 mdelay(50);
3545 return ret;
3546 }
3547
3548 /**
3549 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3550 * @pf: the PF being configured
3551 * @pf_q: the PF queue
3552 * @enable: enable or disable state of the queue
3553 *
3554 * This routine will wait for the given Rx queue of the PF to reach the
3555 * enabled or disabled state.
3556 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3557 * multiple retries; else will return 0 in case of success.
3558 **/
3559 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3560 {
3561 int i;
3562 u32 rx_reg;
3563
3564 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3565 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3566 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3567 break;
3568
3569 usleep_range(10, 20);
3570 }
3571 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3572 return -ETIMEDOUT;
3573
3574 return 0;
3575 }
3576
3577 /**
3578 * i40e_vsi_control_rx - Start or stop a VSI's rings
3579 * @vsi: the VSI being configured
3580 * @enable: start or stop the rings
3581 **/
3582 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3583 {
3584 struct i40e_pf *pf = vsi->back;
3585 struct i40e_hw *hw = &pf->hw;
3586 int i, j, pf_q, ret = 0;
3587 u32 rx_reg;
3588
3589 pf_q = vsi->base_queue;
3590 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3591 for (j = 0; j < 50; j++) {
3592 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3593 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3594 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3595 break;
3596 usleep_range(1000, 2000);
3597 }
3598
3599 /* Skip if the queue is already in the requested state */
3600 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3601 continue;
3602
3603 /* turn on/off the queue */
3604 if (enable)
3605 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3606 else
3607 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3608 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3609
3610 /* wait for the change to finish */
3611 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3612 if (ret) {
3613 dev_info(&pf->pdev->dev,
3614 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3615 __func__, vsi->seid, pf_q,
3616 (enable ? "en" : "dis"));
3617 break;
3618 }
3619 }
3620
3621 return ret;
3622 }
3623
3624 /**
3625 * i40e_vsi_control_rings - Start or stop a VSI's rings
3626 * @vsi: the VSI being configured
3627 * @enable: start or stop the rings
3628 **/
3629 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3630 {
3631 int ret = 0;
3632
3633 /* do rx first for enable and last for disable */
3634 if (request) {
3635 ret = i40e_vsi_control_rx(vsi, request);
3636 if (ret)
3637 return ret;
3638 ret = i40e_vsi_control_tx(vsi, request);
3639 } else {
3640 /* Ignore return value, we need to shutdown whatever we can */
3641 i40e_vsi_control_tx(vsi, request);
3642 i40e_vsi_control_rx(vsi, request);
3643 }
3644
3645 return ret;
3646 }
3647
3648 /**
3649 * i40e_vsi_free_irq - Free the irq association with the OS
3650 * @vsi: the VSI being configured
3651 **/
3652 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3653 {
3654 struct i40e_pf *pf = vsi->back;
3655 struct i40e_hw *hw = &pf->hw;
3656 int base = vsi->base_vector;
3657 u32 val, qp;
3658 int i;
3659
3660 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3661 if (!vsi->q_vectors)
3662 return;
3663
3664 if (!vsi->irqs_ready)
3665 return;
3666
3667 vsi->irqs_ready = false;
3668 for (i = 0; i < vsi->num_q_vectors; i++) {
3669 u16 vector = i + base;
3670
3671 /* free only the irqs that were actually requested */
3672 if (!vsi->q_vectors[i] ||
3673 !vsi->q_vectors[i]->num_ringpairs)
3674 continue;
3675
3676 /* clear the affinity_mask in the IRQ descriptor */
3677 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3678 NULL);
3679 free_irq(pf->msix_entries[vector].vector,
3680 vsi->q_vectors[i]);
3681
3682 /* Tear down the interrupt queue link list
3683 *
3684 * We know that they come in pairs and always
3685 * the Rx first, then the Tx. To clear the
3686 * link list, stick the EOL value into the
3687 * next_q field of the registers.
3688 */
3689 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3690 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3691 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3692 val |= I40E_QUEUE_END_OF_LIST
3693 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3694 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3695
3696 while (qp != I40E_QUEUE_END_OF_LIST) {
3697 u32 next;
3698
3699 val = rd32(hw, I40E_QINT_RQCTL(qp));
3700
3701 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3702 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3703 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3704 I40E_QINT_RQCTL_INTEVENT_MASK);
3705
3706 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3707 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3708
3709 wr32(hw, I40E_QINT_RQCTL(qp), val);
3710
3711 val = rd32(hw, I40E_QINT_TQCTL(qp));
3712
3713 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3714 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3715
3716 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3717 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3718 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3719 I40E_QINT_TQCTL_INTEVENT_MASK);
3720
3721 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3722 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3723
3724 wr32(hw, I40E_QINT_TQCTL(qp), val);
3725 qp = next;
3726 }
3727 }
3728 } else {
3729 free_irq(pf->pdev->irq, pf);
3730
3731 val = rd32(hw, I40E_PFINT_LNKLST0);
3732 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3733 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3734 val |= I40E_QUEUE_END_OF_LIST
3735 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3736 wr32(hw, I40E_PFINT_LNKLST0, val);
3737
3738 val = rd32(hw, I40E_QINT_RQCTL(qp));
3739 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3740 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3741 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3742 I40E_QINT_RQCTL_INTEVENT_MASK);
3743
3744 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3745 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3746
3747 wr32(hw, I40E_QINT_RQCTL(qp), val);
3748
3749 val = rd32(hw, I40E_QINT_TQCTL(qp));
3750
3751 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3752 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3753 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3754 I40E_QINT_TQCTL_INTEVENT_MASK);
3755
3756 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3757 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3758
3759 wr32(hw, I40E_QINT_TQCTL(qp), val);
3760 }
3761 }
3762
3763 /**
3764 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3765 * @vsi: the VSI being configured
3766 * @v_idx: Index of vector to be freed
3767 *
3768 * This function frees the memory allocated to the q_vector. In addition if
3769 * NAPI is enabled it will delete any references to the NAPI struct prior
3770 * to freeing the q_vector.
3771 **/
3772 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3773 {
3774 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3775 struct i40e_ring *ring;
3776
3777 if (!q_vector)
3778 return;
3779
3780 /* disassociate q_vector from rings */
3781 i40e_for_each_ring(ring, q_vector->tx)
3782 ring->q_vector = NULL;
3783
3784 i40e_for_each_ring(ring, q_vector->rx)
3785 ring->q_vector = NULL;
3786
3787 /* only VSI w/ an associated netdev is set up w/ NAPI */
3788 if (vsi->netdev)
3789 netif_napi_del(&q_vector->napi);
3790
3791 vsi->q_vectors[v_idx] = NULL;
3792
3793 kfree_rcu(q_vector, rcu);
3794 }
3795
3796 /**
3797 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3798 * @vsi: the VSI being un-configured
3799 *
3800 * This frees the memory allocated to the q_vectors and
3801 * deletes references to the NAPI struct.
3802 **/
3803 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3804 {
3805 int v_idx;
3806
3807 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3808 i40e_free_q_vector(vsi, v_idx);
3809 }
3810
3811 /**
3812 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3813 * @pf: board private structure
3814 **/
3815 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3816 {
3817 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3818 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3819 pci_disable_msix(pf->pdev);
3820 kfree(pf->msix_entries);
3821 pf->msix_entries = NULL;
3822 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3823 pci_disable_msi(pf->pdev);
3824 }
3825 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3826 }
3827
3828 /**
3829 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3830 * @pf: board private structure
3831 *
3832 * We go through and clear interrupt specific resources and reset the structure
3833 * to pre-load conditions
3834 **/
3835 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3836 {
3837 int i;
3838
3839 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3840 for (i = 0; i < pf->num_alloc_vsi; i++)
3841 if (pf->vsi[i])
3842 i40e_vsi_free_q_vectors(pf->vsi[i]);
3843 i40e_reset_interrupt_capability(pf);
3844 }
3845
3846 /**
3847 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3848 * @vsi: the VSI being configured
3849 **/
3850 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3851 {
3852 int q_idx;
3853
3854 if (!vsi->netdev)
3855 return;
3856
3857 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3858 napi_enable(&vsi->q_vectors[q_idx]->napi);
3859 }
3860
3861 /**
3862 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3863 * @vsi: the VSI being configured
3864 **/
3865 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3866 {
3867 int q_idx;
3868
3869 if (!vsi->netdev)
3870 return;
3871
3872 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3873 napi_disable(&vsi->q_vectors[q_idx]->napi);
3874 }
3875
3876 /**
3877 * i40e_vsi_close - Shut down a VSI
3878 * @vsi: the vsi to be quelled
3879 **/
3880 static void i40e_vsi_close(struct i40e_vsi *vsi)
3881 {
3882 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3883 i40e_down(vsi);
3884 i40e_vsi_free_irq(vsi);
3885 i40e_vsi_free_tx_resources(vsi);
3886 i40e_vsi_free_rx_resources(vsi);
3887 }
3888
3889 /**
3890 * i40e_quiesce_vsi - Pause a given VSI
3891 * @vsi: the VSI being paused
3892 **/
3893 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3894 {
3895 if (test_bit(__I40E_DOWN, &vsi->state))
3896 return;
3897
3898 /* No need to disable FCoE VSI when Tx suspended */
3899 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3900 vsi->type == I40E_VSI_FCOE) {
3901 dev_dbg(&vsi->back->pdev->dev,
3902 "%s: VSI seid %d skipping FCoE VSI disable\n",
3903 __func__, vsi->seid);
3904 return;
3905 }
3906
3907 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3908 if (vsi->netdev && netif_running(vsi->netdev)) {
3909 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3910 } else {
3911 i40e_vsi_close(vsi);
3912 }
3913 }
3914
3915 /**
3916 * i40e_unquiesce_vsi - Resume a given VSI
3917 * @vsi: the VSI being resumed
3918 **/
3919 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3920 {
3921 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3922 return;
3923
3924 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3925 if (vsi->netdev && netif_running(vsi->netdev))
3926 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3927 else
3928 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3929 }
3930
3931 /**
3932 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3933 * @pf: the PF
3934 **/
3935 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3936 {
3937 int v;
3938
3939 for (v = 0; v < pf->num_alloc_vsi; v++) {
3940 if (pf->vsi[v])
3941 i40e_quiesce_vsi(pf->vsi[v]);
3942 }
3943 }
3944
3945 /**
3946 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3947 * @pf: the PF
3948 **/
3949 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3950 {
3951 int v;
3952
3953 for (v = 0; v < pf->num_alloc_vsi; v++) {
3954 if (pf->vsi[v])
3955 i40e_unquiesce_vsi(pf->vsi[v]);
3956 }
3957 }
3958
3959 #ifdef CONFIG_I40E_DCB
3960 /**
3961 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
3962 * @vsi: the VSI being configured
3963 *
3964 * This function waits for the given VSI's Tx queues to be disabled.
3965 **/
3966 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
3967 {
3968 struct i40e_pf *pf = vsi->back;
3969 int i, pf_q, ret;
3970
3971 pf_q = vsi->base_queue;
3972 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3973 /* Check and wait for the disable status of the queue */
3974 ret = i40e_pf_txq_wait(pf, pf_q, false);
3975 if (ret) {
3976 dev_info(&pf->pdev->dev,
3977 "%s: VSI seid %d Tx ring %d disable timeout\n",
3978 __func__, vsi->seid, pf_q);
3979 return ret;
3980 }
3981 }
3982
3983 return 0;
3984 }
3985
3986 /**
3987 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
3988 * @pf: the PF
3989 *
3990 * This function waits for the Tx queues to be in disabled state for all the
3991 * VSIs that are managed by this PF.
3992 **/
3993 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
3994 {
3995 int v, ret = 0;
3996
3997 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3998 /* No need to wait for FCoE VSI queues */
3999 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4000 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4001 if (ret)
4002 break;
4003 }
4004 }
4005
4006 return ret;
4007 }
4008
4009 #endif
4010 /**
4011 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4012 * @pf: pointer to pf
4013 *
4014 * Get TC map for ISCSI PF type that will include iSCSI TC
4015 * and LAN TC.
4016 **/
4017 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4018 {
4019 struct i40e_dcb_app_priority_table app;
4020 struct i40e_hw *hw = &pf->hw;
4021 u8 enabled_tc = 1; /* TC0 is always enabled */
4022 u8 tc, i;
4023 /* Get the iSCSI APP TLV */
4024 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4025
4026 for (i = 0; i < dcbcfg->numapps; i++) {
4027 app = dcbcfg->app[i];
4028 if (app.selector == I40E_APP_SEL_TCPIP &&
4029 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4030 tc = dcbcfg->etscfg.prioritytable[app.priority];
4031 enabled_tc |= (1 << tc);
4032 break;
4033 }
4034 }
4035
4036 return enabled_tc;
4037 }
4038
4039 /**
4040 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4041 * @dcbcfg: the corresponding DCBx configuration structure
4042 *
4043 * Return the number of TCs from given DCBx configuration
4044 **/
4045 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4046 {
4047 u8 num_tc = 0;
4048 int i;
4049
4050 /* Scan the ETS Config Priority Table to find
4051 * traffic class enabled for a given priority
4052 * and use the traffic class index to get the
4053 * number of traffic classes enabled
4054 */
4055 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4056 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4057 num_tc = dcbcfg->etscfg.prioritytable[i];
4058 }
4059
4060 /* Traffic class index starts from zero so
4061 * increment to return the actual count
4062 */
4063 return num_tc + 1;
4064 }
4065
4066 /**
4067 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4068 * @dcbcfg: the corresponding DCBx configuration structure
4069 *
4070 * Query the current DCB configuration and return the number of
4071 * traffic classes enabled from the given DCBX config
4072 **/
4073 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4074 {
4075 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4076 u8 enabled_tc = 1;
4077 u8 i;
4078
4079 for (i = 0; i < num_tc; i++)
4080 enabled_tc |= 1 << i;
4081
4082 return enabled_tc;
4083 }
4084
4085 /**
4086 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4087 * @pf: PF being queried
4088 *
4089 * Return number of traffic classes enabled for the given PF
4090 **/
4091 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4092 {
4093 struct i40e_hw *hw = &pf->hw;
4094 u8 i, enabled_tc;
4095 u8 num_tc = 0;
4096 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4097
4098 /* If DCB is not enabled then always in single TC */
4099 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4100 return 1;
4101
4102 /* SFP mode will be enabled for all TCs on port */
4103 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4104 return i40e_dcb_get_num_tc(dcbcfg);
4105
4106 /* MFP mode return count of enabled TCs for this PF */
4107 if (pf->hw.func_caps.iscsi)
4108 enabled_tc = i40e_get_iscsi_tc_map(pf);
4109 else
4110 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4111
4112 /* At least have TC0 */
4113 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4114 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4115 if (enabled_tc & (1 << i))
4116 num_tc++;
4117 }
4118 return num_tc;
4119 }
4120
4121 /**
4122 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4123 * @pf: PF being queried
4124 *
4125 * Return a bitmap for first enabled traffic class for this PF.
4126 **/
4127 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4128 {
4129 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4130 u8 i = 0;
4131
4132 if (!enabled_tc)
4133 return 0x1; /* TC0 */
4134
4135 /* Find the first enabled TC */
4136 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4137 if (enabled_tc & (1 << i))
4138 break;
4139 }
4140
4141 return 1 << i;
4142 }
4143
4144 /**
4145 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4146 * @pf: PF being queried
4147 *
4148 * Return a bitmap for enabled traffic classes for this PF.
4149 **/
4150 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4151 {
4152 /* If DCB is not enabled for this PF then just return default TC */
4153 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4154 return i40e_pf_get_default_tc(pf);
4155
4156 /* SFP mode we want PF to be enabled for all TCs */
4157 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4158 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4159
4160 /* MPF enabled and iSCSI PF type */
4161 if (pf->hw.func_caps.iscsi)
4162 return i40e_get_iscsi_tc_map(pf);
4163 else
4164 return pf->hw.func_caps.enabled_tcmap;
4165 }
4166
4167 /**
4168 * i40e_vsi_get_bw_info - Query VSI BW Information
4169 * @vsi: the VSI being queried
4170 *
4171 * Returns 0 on success, negative value on failure
4172 **/
4173 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4174 {
4175 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4176 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4177 struct i40e_pf *pf = vsi->back;
4178 struct i40e_hw *hw = &pf->hw;
4179 i40e_status aq_ret;
4180 u32 tc_bw_max;
4181 int i;
4182
4183 /* Get the VSI level BW configuration */
4184 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4185 if (aq_ret) {
4186 dev_info(&pf->pdev->dev,
4187 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
4188 aq_ret, pf->hw.aq.asq_last_status);
4189 return -EINVAL;
4190 }
4191
4192 /* Get the VSI level BW configuration per TC */
4193 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4194 NULL);
4195 if (aq_ret) {
4196 dev_info(&pf->pdev->dev,
4197 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
4198 aq_ret, pf->hw.aq.asq_last_status);
4199 return -EINVAL;
4200 }
4201
4202 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4203 dev_info(&pf->pdev->dev,
4204 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4205 bw_config.tc_valid_bits,
4206 bw_ets_config.tc_valid_bits);
4207 /* Still continuing */
4208 }
4209
4210 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4211 vsi->bw_max_quanta = bw_config.max_bw;
4212 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4213 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4214 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4215 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4216 vsi->bw_ets_limit_credits[i] =
4217 le16_to_cpu(bw_ets_config.credits[i]);
4218 /* 3 bits out of 4 for each TC */
4219 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4220 }
4221
4222 return 0;
4223 }
4224
4225 /**
4226 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4227 * @vsi: the VSI being configured
4228 * @enabled_tc: TC bitmap
4229 * @bw_credits: BW shared credits per TC
4230 *
4231 * Returns 0 on success, negative value on failure
4232 **/
4233 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4234 u8 *bw_share)
4235 {
4236 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4237 i40e_status aq_ret;
4238 int i;
4239
4240 bw_data.tc_valid_bits = enabled_tc;
4241 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4242 bw_data.tc_bw_credits[i] = bw_share[i];
4243
4244 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4245 NULL);
4246 if (aq_ret) {
4247 dev_info(&vsi->back->pdev->dev,
4248 "AQ command Config VSI BW allocation per TC failed = %d\n",
4249 vsi->back->hw.aq.asq_last_status);
4250 return -EINVAL;
4251 }
4252
4253 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4254 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4255
4256 return 0;
4257 }
4258
4259 /**
4260 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4261 * @vsi: the VSI being configured
4262 * @enabled_tc: TC map to be enabled
4263 *
4264 **/
4265 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4266 {
4267 struct net_device *netdev = vsi->netdev;
4268 struct i40e_pf *pf = vsi->back;
4269 struct i40e_hw *hw = &pf->hw;
4270 u8 netdev_tc = 0;
4271 int i;
4272 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4273
4274 if (!netdev)
4275 return;
4276
4277 if (!enabled_tc) {
4278 netdev_reset_tc(netdev);
4279 return;
4280 }
4281
4282 /* Set up actual enabled TCs on the VSI */
4283 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4284 return;
4285
4286 /* set per TC queues for the VSI */
4287 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4288 /* Only set TC queues for enabled tcs
4289 *
4290 * e.g. For a VSI that has TC0 and TC3 enabled the
4291 * enabled_tc bitmap would be 0x00001001; the driver
4292 * will set the numtc for netdev as 2 that will be
4293 * referenced by the netdev layer as TC 0 and 1.
4294 */
4295 if (vsi->tc_config.enabled_tc & (1 << i))
4296 netdev_set_tc_queue(netdev,
4297 vsi->tc_config.tc_info[i].netdev_tc,
4298 vsi->tc_config.tc_info[i].qcount,
4299 vsi->tc_config.tc_info[i].qoffset);
4300 }
4301
4302 /* Assign UP2TC map for the VSI */
4303 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4304 /* Get the actual TC# for the UP */
4305 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4306 /* Get the mapped netdev TC# for the UP */
4307 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4308 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4309 }
4310 }
4311
4312 /**
4313 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4314 * @vsi: the VSI being configured
4315 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4316 **/
4317 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4318 struct i40e_vsi_context *ctxt)
4319 {
4320 /* copy just the sections touched not the entire info
4321 * since not all sections are valid as returned by
4322 * update vsi params
4323 */
4324 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4325 memcpy(&vsi->info.queue_mapping,
4326 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4327 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4328 sizeof(vsi->info.tc_mapping));
4329 }
4330
4331 /**
4332 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4333 * @vsi: VSI to be configured
4334 * @enabled_tc: TC bitmap
4335 *
4336 * This configures a particular VSI for TCs that are mapped to the
4337 * given TC bitmap. It uses default bandwidth share for TCs across
4338 * VSIs to configure TC for a particular VSI.
4339 *
4340 * NOTE:
4341 * It is expected that the VSI queues have been quisced before calling
4342 * this function.
4343 **/
4344 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4345 {
4346 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4347 struct i40e_vsi_context ctxt;
4348 int ret = 0;
4349 int i;
4350
4351 /* Check if enabled_tc is same as existing or new TCs */
4352 if (vsi->tc_config.enabled_tc == enabled_tc)
4353 return ret;
4354
4355 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4356 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4357 if (enabled_tc & (1 << i))
4358 bw_share[i] = 1;
4359 }
4360
4361 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4362 if (ret) {
4363 dev_info(&vsi->back->pdev->dev,
4364 "Failed configuring TC map %d for VSI %d\n",
4365 enabled_tc, vsi->seid);
4366 goto out;
4367 }
4368
4369 /* Update Queue Pairs Mapping for currently enabled UPs */
4370 ctxt.seid = vsi->seid;
4371 ctxt.pf_num = vsi->back->hw.pf_id;
4372 ctxt.vf_num = 0;
4373 ctxt.uplink_seid = vsi->uplink_seid;
4374 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
4375 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4376
4377 /* Update the VSI after updating the VSI queue-mapping information */
4378 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4379 if (ret) {
4380 dev_info(&vsi->back->pdev->dev,
4381 "update vsi failed, aq_err=%d\n",
4382 vsi->back->hw.aq.asq_last_status);
4383 goto out;
4384 }
4385 /* update the local VSI info with updated queue map */
4386 i40e_vsi_update_queue_map(vsi, &ctxt);
4387 vsi->info.valid_sections = 0;
4388
4389 /* Update current VSI BW information */
4390 ret = i40e_vsi_get_bw_info(vsi);
4391 if (ret) {
4392 dev_info(&vsi->back->pdev->dev,
4393 "Failed updating vsi bw info, aq_err=%d\n",
4394 vsi->back->hw.aq.asq_last_status);
4395 goto out;
4396 }
4397
4398 /* Update the netdev TC setup */
4399 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4400 out:
4401 return ret;
4402 }
4403
4404 /**
4405 * i40e_veb_config_tc - Configure TCs for given VEB
4406 * @veb: given VEB
4407 * @enabled_tc: TC bitmap
4408 *
4409 * Configures given TC bitmap for VEB (switching) element
4410 **/
4411 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4412 {
4413 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4414 struct i40e_pf *pf = veb->pf;
4415 int ret = 0;
4416 int i;
4417
4418 /* No TCs or already enabled TCs just return */
4419 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4420 return ret;
4421
4422 bw_data.tc_valid_bits = enabled_tc;
4423 /* bw_data.absolute_credits is not set (relative) */
4424
4425 /* Enable ETS TCs with equal BW Share for now */
4426 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4427 if (enabled_tc & (1 << i))
4428 bw_data.tc_bw_share_credits[i] = 1;
4429 }
4430
4431 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4432 &bw_data, NULL);
4433 if (ret) {
4434 dev_info(&pf->pdev->dev,
4435 "veb bw config failed, aq_err=%d\n",
4436 pf->hw.aq.asq_last_status);
4437 goto out;
4438 }
4439
4440 /* Update the BW information */
4441 ret = i40e_veb_get_bw_info(veb);
4442 if (ret) {
4443 dev_info(&pf->pdev->dev,
4444 "Failed getting veb bw config, aq_err=%d\n",
4445 pf->hw.aq.asq_last_status);
4446 }
4447
4448 out:
4449 return ret;
4450 }
4451
4452 #ifdef CONFIG_I40E_DCB
4453 /**
4454 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4455 * @pf: PF struct
4456 *
4457 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4458 * the caller would've quiesce all the VSIs before calling
4459 * this function
4460 **/
4461 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4462 {
4463 u8 tc_map = 0;
4464 int ret;
4465 u8 v;
4466
4467 /* Enable the TCs available on PF to all VEBs */
4468 tc_map = i40e_pf_get_tc_map(pf);
4469 for (v = 0; v < I40E_MAX_VEB; v++) {
4470 if (!pf->veb[v])
4471 continue;
4472 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4473 if (ret) {
4474 dev_info(&pf->pdev->dev,
4475 "Failed configuring TC for VEB seid=%d\n",
4476 pf->veb[v]->seid);
4477 /* Will try to configure as many components */
4478 }
4479 }
4480
4481 /* Update each VSI */
4482 for (v = 0; v < pf->num_alloc_vsi; v++) {
4483 if (!pf->vsi[v])
4484 continue;
4485
4486 /* - Enable all TCs for the LAN VSI
4487 #ifdef I40E_FCOE
4488 * - For FCoE VSI only enable the TC configured
4489 * as per the APP TLV
4490 #endif
4491 * - For all others keep them at TC0 for now
4492 */
4493 if (v == pf->lan_vsi)
4494 tc_map = i40e_pf_get_tc_map(pf);
4495 else
4496 tc_map = i40e_pf_get_default_tc(pf);
4497 #ifdef I40E_FCOE
4498 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4499 tc_map = i40e_get_fcoe_tc_map(pf);
4500 #endif /* #ifdef I40E_FCOE */
4501
4502 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4503 if (ret) {
4504 dev_info(&pf->pdev->dev,
4505 "Failed configuring TC for VSI seid=%d\n",
4506 pf->vsi[v]->seid);
4507 /* Will try to configure as many components */
4508 } else {
4509 /* Re-configure VSI vectors based on updated TC map */
4510 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4511 if (pf->vsi[v]->netdev)
4512 i40e_dcbnl_set_all(pf->vsi[v]);
4513 }
4514 }
4515 }
4516
4517 /**
4518 * i40e_resume_port_tx - Resume port Tx
4519 * @pf: PF struct
4520 *
4521 * Resume a port's Tx and issue a PF reset in case of failure to
4522 * resume.
4523 **/
4524 static int i40e_resume_port_tx(struct i40e_pf *pf)
4525 {
4526 struct i40e_hw *hw = &pf->hw;
4527 int ret;
4528
4529 ret = i40e_aq_resume_port_tx(hw, NULL);
4530 if (ret) {
4531 dev_info(&pf->pdev->dev,
4532 "AQ command Resume Port Tx failed = %d\n",
4533 pf->hw.aq.asq_last_status);
4534 /* Schedule PF reset to recover */
4535 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4536 i40e_service_event_schedule(pf);
4537 }
4538
4539 return ret;
4540 }
4541
4542 /**
4543 * i40e_init_pf_dcb - Initialize DCB configuration
4544 * @pf: PF being configured
4545 *
4546 * Query the current DCB configuration and cache it
4547 * in the hardware structure
4548 **/
4549 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4550 {
4551 struct i40e_hw *hw = &pf->hw;
4552 int err = 0;
4553
4554 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4555 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4556 (pf->hw.aq.fw_maj_ver < 4))
4557 goto out;
4558
4559 /* Get the initial DCB configuration */
4560 err = i40e_init_dcb(hw);
4561 if (!err) {
4562 /* Device/Function is not DCBX capable */
4563 if ((!hw->func_caps.dcb) ||
4564 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4565 dev_info(&pf->pdev->dev,
4566 "DCBX offload is not supported or is disabled for this PF.\n");
4567
4568 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4569 goto out;
4570
4571 } else {
4572 /* When status is not DISABLED then DCBX in FW */
4573 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4574 DCB_CAP_DCBX_VER_IEEE;
4575
4576 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4577 /* Enable DCB tagging only when more than one TC */
4578 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4579 pf->flags |= I40E_FLAG_DCB_ENABLED;
4580 dev_dbg(&pf->pdev->dev,
4581 "DCBX offload is supported for this PF.\n");
4582 }
4583 } else {
4584 dev_info(&pf->pdev->dev,
4585 "AQ Querying DCB configuration failed: aq_err %d\n",
4586 pf->hw.aq.asq_last_status);
4587 }
4588
4589 out:
4590 return err;
4591 }
4592 #endif /* CONFIG_I40E_DCB */
4593 #define SPEED_SIZE 14
4594 #define FC_SIZE 8
4595 /**
4596 * i40e_print_link_message - print link up or down
4597 * @vsi: the VSI for which link needs a message
4598 */
4599 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4600 {
4601 char speed[SPEED_SIZE] = "Unknown";
4602 char fc[FC_SIZE] = "RX/TX";
4603
4604 if (!isup) {
4605 netdev_info(vsi->netdev, "NIC Link is Down\n");
4606 return;
4607 }
4608
4609 /* Warn user if link speed on NPAR enabled partition is not at
4610 * least 10GB
4611 */
4612 if (vsi->back->hw.func_caps.npar_enable &&
4613 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4614 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4615 netdev_warn(vsi->netdev,
4616 "The partition detected link speed that is less than 10Gbps\n");
4617
4618 switch (vsi->back->hw.phy.link_info.link_speed) {
4619 case I40E_LINK_SPEED_40GB:
4620 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4621 break;
4622 case I40E_LINK_SPEED_10GB:
4623 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4624 break;
4625 case I40E_LINK_SPEED_1GB:
4626 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4627 break;
4628 case I40E_LINK_SPEED_100MB:
4629 strncpy(speed, "100 Mbps", SPEED_SIZE);
4630 break;
4631 default:
4632 break;
4633 }
4634
4635 switch (vsi->back->hw.fc.current_mode) {
4636 case I40E_FC_FULL:
4637 strlcpy(fc, "RX/TX", FC_SIZE);
4638 break;
4639 case I40E_FC_TX_PAUSE:
4640 strlcpy(fc, "TX", FC_SIZE);
4641 break;
4642 case I40E_FC_RX_PAUSE:
4643 strlcpy(fc, "RX", FC_SIZE);
4644 break;
4645 default:
4646 strlcpy(fc, "None", FC_SIZE);
4647 break;
4648 }
4649
4650 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4651 speed, fc);
4652 }
4653
4654 /**
4655 * i40e_up_complete - Finish the last steps of bringing up a connection
4656 * @vsi: the VSI being configured
4657 **/
4658 static int i40e_up_complete(struct i40e_vsi *vsi)
4659 {
4660 struct i40e_pf *pf = vsi->back;
4661 int err;
4662
4663 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4664 i40e_vsi_configure_msix(vsi);
4665 else
4666 i40e_configure_msi_and_legacy(vsi);
4667
4668 /* start rings */
4669 err = i40e_vsi_control_rings(vsi, true);
4670 if (err)
4671 return err;
4672
4673 clear_bit(__I40E_DOWN, &vsi->state);
4674 i40e_napi_enable_all(vsi);
4675 i40e_vsi_enable_irq(vsi);
4676
4677 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4678 (vsi->netdev)) {
4679 i40e_print_link_message(vsi, true);
4680 netif_tx_start_all_queues(vsi->netdev);
4681 netif_carrier_on(vsi->netdev);
4682 } else if (vsi->netdev) {
4683 i40e_print_link_message(vsi, false);
4684 /* need to check for qualified module here*/
4685 if ((pf->hw.phy.link_info.link_info &
4686 I40E_AQ_MEDIA_AVAILABLE) &&
4687 (!(pf->hw.phy.link_info.an_info &
4688 I40E_AQ_QUALIFIED_MODULE)))
4689 netdev_err(vsi->netdev,
4690 "the driver failed to link because an unqualified module was detected.");
4691 }
4692
4693 /* replay FDIR SB filters */
4694 if (vsi->type == I40E_VSI_FDIR) {
4695 /* reset fd counters */
4696 pf->fd_add_err = pf->fd_atr_cnt = 0;
4697 if (pf->fd_tcp_rule > 0) {
4698 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4699 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4700 pf->fd_tcp_rule = 0;
4701 }
4702 i40e_fdir_filter_restore(vsi);
4703 }
4704 i40e_service_event_schedule(pf);
4705
4706 return 0;
4707 }
4708
4709 /**
4710 * i40e_vsi_reinit_locked - Reset the VSI
4711 * @vsi: the VSI being configured
4712 *
4713 * Rebuild the ring structs after some configuration
4714 * has changed, e.g. MTU size.
4715 **/
4716 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4717 {
4718 struct i40e_pf *pf = vsi->back;
4719
4720 WARN_ON(in_interrupt());
4721 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4722 usleep_range(1000, 2000);
4723 i40e_down(vsi);
4724
4725 /* Give a VF some time to respond to the reset. The
4726 * two second wait is based upon the watchdog cycle in
4727 * the VF driver.
4728 */
4729 if (vsi->type == I40E_VSI_SRIOV)
4730 msleep(2000);
4731 i40e_up(vsi);
4732 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4733 }
4734
4735 /**
4736 * i40e_up - Bring the connection back up after being down
4737 * @vsi: the VSI being configured
4738 **/
4739 int i40e_up(struct i40e_vsi *vsi)
4740 {
4741 int err;
4742
4743 err = i40e_vsi_configure(vsi);
4744 if (!err)
4745 err = i40e_up_complete(vsi);
4746
4747 return err;
4748 }
4749
4750 /**
4751 * i40e_down - Shutdown the connection processing
4752 * @vsi: the VSI being stopped
4753 **/
4754 void i40e_down(struct i40e_vsi *vsi)
4755 {
4756 int i;
4757
4758 /* It is assumed that the caller of this function
4759 * sets the vsi->state __I40E_DOWN bit.
4760 */
4761 if (vsi->netdev) {
4762 netif_carrier_off(vsi->netdev);
4763 netif_tx_disable(vsi->netdev);
4764 }
4765 i40e_vsi_disable_irq(vsi);
4766 i40e_vsi_control_rings(vsi, false);
4767 i40e_napi_disable_all(vsi);
4768
4769 for (i = 0; i < vsi->num_queue_pairs; i++) {
4770 i40e_clean_tx_ring(vsi->tx_rings[i]);
4771 i40e_clean_rx_ring(vsi->rx_rings[i]);
4772 }
4773 }
4774
4775 /**
4776 * i40e_setup_tc - configure multiple traffic classes
4777 * @netdev: net device to configure
4778 * @tc: number of traffic classes to enable
4779 **/
4780 #ifdef I40E_FCOE
4781 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4782 #else
4783 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4784 #endif
4785 {
4786 struct i40e_netdev_priv *np = netdev_priv(netdev);
4787 struct i40e_vsi *vsi = np->vsi;
4788 struct i40e_pf *pf = vsi->back;
4789 u8 enabled_tc = 0;
4790 int ret = -EINVAL;
4791 int i;
4792
4793 /* Check if DCB enabled to continue */
4794 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4795 netdev_info(netdev, "DCB is not enabled for adapter\n");
4796 goto exit;
4797 }
4798
4799 /* Check if MFP enabled */
4800 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4801 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4802 goto exit;
4803 }
4804
4805 /* Check whether tc count is within enabled limit */
4806 if (tc > i40e_pf_get_num_tc(pf)) {
4807 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4808 goto exit;
4809 }
4810
4811 /* Generate TC map for number of tc requested */
4812 for (i = 0; i < tc; i++)
4813 enabled_tc |= (1 << i);
4814
4815 /* Requesting same TC configuration as already enabled */
4816 if (enabled_tc == vsi->tc_config.enabled_tc)
4817 return 0;
4818
4819 /* Quiesce VSI queues */
4820 i40e_quiesce_vsi(vsi);
4821
4822 /* Configure VSI for enabled TCs */
4823 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4824 if (ret) {
4825 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4826 vsi->seid);
4827 goto exit;
4828 }
4829
4830 /* Unquiesce VSI */
4831 i40e_unquiesce_vsi(vsi);
4832
4833 exit:
4834 return ret;
4835 }
4836
4837 /**
4838 * i40e_open - Called when a network interface is made active
4839 * @netdev: network interface device structure
4840 *
4841 * The open entry point is called when a network interface is made
4842 * active by the system (IFF_UP). At this point all resources needed
4843 * for transmit and receive operations are allocated, the interrupt
4844 * handler is registered with the OS, the netdev watchdog subtask is
4845 * enabled, and the stack is notified that the interface is ready.
4846 *
4847 * Returns 0 on success, negative value on failure
4848 **/
4849 int i40e_open(struct net_device *netdev)
4850 {
4851 struct i40e_netdev_priv *np = netdev_priv(netdev);
4852 struct i40e_vsi *vsi = np->vsi;
4853 struct i40e_pf *pf = vsi->back;
4854 int err;
4855
4856 /* disallow open during test or if eeprom is broken */
4857 if (test_bit(__I40E_TESTING, &pf->state) ||
4858 test_bit(__I40E_BAD_EEPROM, &pf->state))
4859 return -EBUSY;
4860
4861 netif_carrier_off(netdev);
4862
4863 err = i40e_vsi_open(vsi);
4864 if (err)
4865 return err;
4866
4867 /* configure global TSO hardware offload settings */
4868 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4869 TCP_FLAG_FIN) >> 16);
4870 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4871 TCP_FLAG_FIN |
4872 TCP_FLAG_CWR) >> 16);
4873 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4874
4875 #ifdef CONFIG_I40E_VXLAN
4876 vxlan_get_rx_port(netdev);
4877 #endif
4878
4879 return 0;
4880 }
4881
4882 /**
4883 * i40e_vsi_open -
4884 * @vsi: the VSI to open
4885 *
4886 * Finish initialization of the VSI.
4887 *
4888 * Returns 0 on success, negative value on failure
4889 **/
4890 int i40e_vsi_open(struct i40e_vsi *vsi)
4891 {
4892 struct i40e_pf *pf = vsi->back;
4893 char int_name[I40E_INT_NAME_STR_LEN];
4894 int err;
4895
4896 /* allocate descriptors */
4897 err = i40e_vsi_setup_tx_resources(vsi);
4898 if (err)
4899 goto err_setup_tx;
4900 err = i40e_vsi_setup_rx_resources(vsi);
4901 if (err)
4902 goto err_setup_rx;
4903
4904 err = i40e_vsi_configure(vsi);
4905 if (err)
4906 goto err_setup_rx;
4907
4908 if (vsi->netdev) {
4909 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4910 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4911 err = i40e_vsi_request_irq(vsi, int_name);
4912 if (err)
4913 goto err_setup_rx;
4914
4915 /* Notify the stack of the actual queue counts. */
4916 err = netif_set_real_num_tx_queues(vsi->netdev,
4917 vsi->num_queue_pairs);
4918 if (err)
4919 goto err_set_queues;
4920
4921 err = netif_set_real_num_rx_queues(vsi->netdev,
4922 vsi->num_queue_pairs);
4923 if (err)
4924 goto err_set_queues;
4925
4926 } else if (vsi->type == I40E_VSI_FDIR) {
4927 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
4928 dev_driver_string(&pf->pdev->dev),
4929 dev_name(&pf->pdev->dev));
4930 err = i40e_vsi_request_irq(vsi, int_name);
4931
4932 } else {
4933 err = -EINVAL;
4934 goto err_setup_rx;
4935 }
4936
4937 err = i40e_up_complete(vsi);
4938 if (err)
4939 goto err_up_complete;
4940
4941 return 0;
4942
4943 err_up_complete:
4944 i40e_down(vsi);
4945 err_set_queues:
4946 i40e_vsi_free_irq(vsi);
4947 err_setup_rx:
4948 i40e_vsi_free_rx_resources(vsi);
4949 err_setup_tx:
4950 i40e_vsi_free_tx_resources(vsi);
4951 if (vsi == pf->vsi[pf->lan_vsi])
4952 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4953
4954 return err;
4955 }
4956
4957 /**
4958 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4959 * @pf: Pointer to pf
4960 *
4961 * This function destroys the hlist where all the Flow Director
4962 * filters were saved.
4963 **/
4964 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4965 {
4966 struct i40e_fdir_filter *filter;
4967 struct hlist_node *node2;
4968
4969 hlist_for_each_entry_safe(filter, node2,
4970 &pf->fdir_filter_list, fdir_node) {
4971 hlist_del(&filter->fdir_node);
4972 kfree(filter);
4973 }
4974 pf->fdir_pf_active_filters = 0;
4975 }
4976
4977 /**
4978 * i40e_close - Disables a network interface
4979 * @netdev: network interface device structure
4980 *
4981 * The close entry point is called when an interface is de-activated
4982 * by the OS. The hardware is still under the driver's control, but
4983 * this netdev interface is disabled.
4984 *
4985 * Returns 0, this is not allowed to fail
4986 **/
4987 #ifdef I40E_FCOE
4988 int i40e_close(struct net_device *netdev)
4989 #else
4990 static int i40e_close(struct net_device *netdev)
4991 #endif
4992 {
4993 struct i40e_netdev_priv *np = netdev_priv(netdev);
4994 struct i40e_vsi *vsi = np->vsi;
4995
4996 i40e_vsi_close(vsi);
4997
4998 return 0;
4999 }
5000
5001 /**
5002 * i40e_do_reset - Start a PF or Core Reset sequence
5003 * @pf: board private structure
5004 * @reset_flags: which reset is requested
5005 *
5006 * The essential difference in resets is that the PF Reset
5007 * doesn't clear the packet buffers, doesn't reset the PE
5008 * firmware, and doesn't bother the other PFs on the chip.
5009 **/
5010 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5011 {
5012 u32 val;
5013
5014 WARN_ON(in_interrupt());
5015
5016 if (i40e_check_asq_alive(&pf->hw))
5017 i40e_vc_notify_reset(pf);
5018
5019 /* do the biggest reset indicated */
5020 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
5021
5022 /* Request a Global Reset
5023 *
5024 * This will start the chip's countdown to the actual full
5025 * chip reset event, and a warning interrupt to be sent
5026 * to all PFs, including the requestor. Our handler
5027 * for the warning interrupt will deal with the shutdown
5028 * and recovery of the switch setup.
5029 */
5030 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5031 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5032 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5033 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5034
5035 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
5036
5037 /* Request a Core Reset
5038 *
5039 * Same as Global Reset, except does *not* include the MAC/PHY
5040 */
5041 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5042 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5043 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5044 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5045 i40e_flush(&pf->hw);
5046
5047 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5048
5049 /* Request a PF Reset
5050 *
5051 * Resets only the PF-specific registers
5052 *
5053 * This goes directly to the tear-down and rebuild of
5054 * the switch, since we need to do all the recovery as
5055 * for the Core Reset.
5056 */
5057 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5058 i40e_handle_reset_warning(pf);
5059
5060 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5061 int v;
5062
5063 /* Find the VSI(s) that requested a re-init */
5064 dev_info(&pf->pdev->dev,
5065 "VSI reinit requested\n");
5066 for (v = 0; v < pf->num_alloc_vsi; v++) {
5067 struct i40e_vsi *vsi = pf->vsi[v];
5068 if (vsi != NULL &&
5069 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5070 i40e_vsi_reinit_locked(pf->vsi[v]);
5071 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5072 }
5073 }
5074
5075 /* no further action needed, so return now */
5076 return;
5077 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5078 int v;
5079
5080 /* Find the VSI(s) that needs to be brought down */
5081 dev_info(&pf->pdev->dev, "VSI down requested\n");
5082 for (v = 0; v < pf->num_alloc_vsi; v++) {
5083 struct i40e_vsi *vsi = pf->vsi[v];
5084 if (vsi != NULL &&
5085 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5086 set_bit(__I40E_DOWN, &vsi->state);
5087 i40e_down(vsi);
5088 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5089 }
5090 }
5091
5092 /* no further action needed, so return now */
5093 return;
5094 } else {
5095 dev_info(&pf->pdev->dev,
5096 "bad reset request 0x%08x\n", reset_flags);
5097 return;
5098 }
5099 }
5100
5101 #ifdef CONFIG_I40E_DCB
5102 /**
5103 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5104 * @pf: board private structure
5105 * @old_cfg: current DCB config
5106 * @new_cfg: new DCB config
5107 **/
5108 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5109 struct i40e_dcbx_config *old_cfg,
5110 struct i40e_dcbx_config *new_cfg)
5111 {
5112 bool need_reconfig = false;
5113
5114 /* Check if ETS configuration has changed */
5115 if (memcmp(&new_cfg->etscfg,
5116 &old_cfg->etscfg,
5117 sizeof(new_cfg->etscfg))) {
5118 /* If Priority Table has changed reconfig is needed */
5119 if (memcmp(&new_cfg->etscfg.prioritytable,
5120 &old_cfg->etscfg.prioritytable,
5121 sizeof(new_cfg->etscfg.prioritytable))) {
5122 need_reconfig = true;
5123 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5124 }
5125
5126 if (memcmp(&new_cfg->etscfg.tcbwtable,
5127 &old_cfg->etscfg.tcbwtable,
5128 sizeof(new_cfg->etscfg.tcbwtable)))
5129 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5130
5131 if (memcmp(&new_cfg->etscfg.tsatable,
5132 &old_cfg->etscfg.tsatable,
5133 sizeof(new_cfg->etscfg.tsatable)))
5134 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5135 }
5136
5137 /* Check if PFC configuration has changed */
5138 if (memcmp(&new_cfg->pfc,
5139 &old_cfg->pfc,
5140 sizeof(new_cfg->pfc))) {
5141 need_reconfig = true;
5142 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5143 }
5144
5145 /* Check if APP Table has changed */
5146 if (memcmp(&new_cfg->app,
5147 &old_cfg->app,
5148 sizeof(new_cfg->app))) {
5149 need_reconfig = true;
5150 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5151 }
5152
5153 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5154 need_reconfig);
5155 return need_reconfig;
5156 }
5157
5158 /**
5159 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5160 * @pf: board private structure
5161 * @e: event info posted on ARQ
5162 **/
5163 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5164 struct i40e_arq_event_info *e)
5165 {
5166 struct i40e_aqc_lldp_get_mib *mib =
5167 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5168 struct i40e_hw *hw = &pf->hw;
5169 struct i40e_dcbx_config tmp_dcbx_cfg;
5170 bool need_reconfig = false;
5171 int ret = 0;
5172 u8 type;
5173
5174 /* Not DCB capable or capability disabled */
5175 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5176 return ret;
5177
5178 /* Ignore if event is not for Nearest Bridge */
5179 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5180 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5181 dev_dbg(&pf->pdev->dev,
5182 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5183 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5184 return ret;
5185
5186 /* Check MIB Type and return if event for Remote MIB update */
5187 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5188 dev_dbg(&pf->pdev->dev,
5189 "%s: LLDP event mib type %s\n", __func__,
5190 type ? "remote" : "local");
5191 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5192 /* Update the remote cached instance and return */
5193 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5194 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5195 &hw->remote_dcbx_config);
5196 goto exit;
5197 }
5198
5199 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
5200 /* Store the old configuration */
5201 memcpy(&tmp_dcbx_cfg, &hw->local_dcbx_config, sizeof(tmp_dcbx_cfg));
5202
5203 /* Reset the old DCBx configuration data */
5204 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5205 /* Get updated DCBX data from firmware */
5206 ret = i40e_get_dcb_config(&pf->hw);
5207 if (ret) {
5208 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5209 goto exit;
5210 }
5211
5212 /* No change detected in DCBX configs */
5213 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5214 sizeof(tmp_dcbx_cfg))) {
5215 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5216 goto exit;
5217 }
5218
5219 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5220 &hw->local_dcbx_config);
5221
5222 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5223
5224 if (!need_reconfig)
5225 goto exit;
5226
5227 /* Enable DCB tagging only when more than one TC */
5228 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5229 pf->flags |= I40E_FLAG_DCB_ENABLED;
5230 else
5231 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5232
5233 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5234 /* Reconfiguration needed quiesce all VSIs */
5235 i40e_pf_quiesce_all_vsi(pf);
5236
5237 /* Changes in configuration update VEB/VSI */
5238 i40e_dcb_reconfigure(pf);
5239
5240 ret = i40e_resume_port_tx(pf);
5241
5242 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5243 /* In case of error no point in resuming VSIs */
5244 if (ret)
5245 goto exit;
5246
5247 /* Wait for the PF's Tx queues to be disabled */
5248 ret = i40e_pf_wait_txq_disabled(pf);
5249 if (!ret)
5250 i40e_pf_unquiesce_all_vsi(pf);
5251 exit:
5252 return ret;
5253 }
5254 #endif /* CONFIG_I40E_DCB */
5255
5256 /**
5257 * i40e_do_reset_safe - Protected reset path for userland calls.
5258 * @pf: board private structure
5259 * @reset_flags: which reset is requested
5260 *
5261 **/
5262 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5263 {
5264 rtnl_lock();
5265 i40e_do_reset(pf, reset_flags);
5266 rtnl_unlock();
5267 }
5268
5269 /**
5270 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5271 * @pf: board private structure
5272 * @e: event info posted on ARQ
5273 *
5274 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5275 * and VF queues
5276 **/
5277 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5278 struct i40e_arq_event_info *e)
5279 {
5280 struct i40e_aqc_lan_overflow *data =
5281 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5282 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5283 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5284 struct i40e_hw *hw = &pf->hw;
5285 struct i40e_vf *vf;
5286 u16 vf_id;
5287
5288 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5289 queue, qtx_ctl);
5290
5291 /* Queue belongs to VF, find the VF and issue VF reset */
5292 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5293 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5294 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5295 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5296 vf_id -= hw->func_caps.vf_base_id;
5297 vf = &pf->vf[vf_id];
5298 i40e_vc_notify_vf_reset(vf);
5299 /* Allow VF to process pending reset notification */
5300 msleep(20);
5301 i40e_reset_vf(vf, false);
5302 }
5303 }
5304
5305 /**
5306 * i40e_service_event_complete - Finish up the service event
5307 * @pf: board private structure
5308 **/
5309 static void i40e_service_event_complete(struct i40e_pf *pf)
5310 {
5311 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5312
5313 /* flush memory to make sure state is correct before next watchog */
5314 smp_mb__before_atomic();
5315 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5316 }
5317
5318 /**
5319 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5320 * @pf: board private structure
5321 **/
5322 int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5323 {
5324 int val, fcnt_prog;
5325
5326 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5327 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5328 return fcnt_prog;
5329 }
5330
5331 /**
5332 * i40e_get_current_fd_count - Get the count of total FD filters programmed
5333 * @pf: board private structure
5334 **/
5335 int i40e_get_current_fd_count(struct i40e_pf *pf)
5336 {
5337 int val, fcnt_prog;
5338 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5339 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5340 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5341 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5342 return fcnt_prog;
5343 }
5344
5345 /**
5346 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5347 * @pf: board private structure
5348 **/
5349 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5350 {
5351 u32 fcnt_prog, fcnt_avail;
5352
5353 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5354 return;
5355
5356 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5357 * to re-enable
5358 */
5359 fcnt_prog = i40e_get_cur_guaranteed_fd_count(pf);
5360 fcnt_avail = pf->fdir_pf_filter_count;
5361 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5362 (pf->fd_add_err == 0) ||
5363 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5364 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5365 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5366 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5367 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5368 }
5369 }
5370 /* Wait for some more space to be available to turn on ATR */
5371 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5372 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5373 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5374 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5375 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5376 }
5377 }
5378 }
5379
5380 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5381 /**
5382 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5383 * @pf: board private structure
5384 **/
5385 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5386 {
5387 int flush_wait_retry = 50;
5388 int reg;
5389
5390 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5391 return;
5392
5393 if (time_after(jiffies, pf->fd_flush_timestamp +
5394 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5395 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5396 pf->fd_flush_timestamp = jiffies;
5397 pf->auto_disable_flags |= I40E_FLAG_FD_SB_ENABLED;
5398 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5399 /* flush all filters */
5400 wr32(&pf->hw, I40E_PFQF_CTL_1,
5401 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5402 i40e_flush(&pf->hw);
5403 pf->fd_flush_cnt++;
5404 pf->fd_add_err = 0;
5405 do {
5406 /* Check FD flush status every 5-6msec */
5407 usleep_range(5000, 6000);
5408 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5409 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5410 break;
5411 } while (flush_wait_retry--);
5412 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5413 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5414 } else {
5415 /* replay sideband filters */
5416 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5417
5418 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5419 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5420 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5421 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5422 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5423 }
5424 }
5425 }
5426
5427 /**
5428 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5429 * @pf: board private structure
5430 **/
5431 int i40e_get_current_atr_cnt(struct i40e_pf *pf)
5432 {
5433 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5434 }
5435
5436 /* We can see up to 256 filter programming desc in transit if the filters are
5437 * being applied really fast; before we see the first
5438 * filter miss error on Rx queue 0. Accumulating enough error messages before
5439 * reacting will make sure we don't cause flush too often.
5440 */
5441 #define I40E_MAX_FD_PROGRAM_ERROR 256
5442
5443 /**
5444 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5445 * @pf: board private structure
5446 **/
5447 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5448 {
5449
5450 /* if interface is down do nothing */
5451 if (test_bit(__I40E_DOWN, &pf->state))
5452 return;
5453
5454 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5455 return;
5456
5457 if ((pf->fd_add_err >= I40E_MAX_FD_PROGRAM_ERROR) &&
5458 (i40e_get_current_atr_cnt(pf) >= pf->fd_atr_cnt) &&
5459 (i40e_get_current_atr_cnt(pf) > pf->fdir_pf_filter_count))
5460 i40e_fdir_flush_and_replay(pf);
5461
5462 i40e_fdir_check_and_reenable(pf);
5463
5464 }
5465
5466 /**
5467 * i40e_vsi_link_event - notify VSI of a link event
5468 * @vsi: vsi to be notified
5469 * @link_up: link up or down
5470 **/
5471 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5472 {
5473 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5474 return;
5475
5476 switch (vsi->type) {
5477 case I40E_VSI_MAIN:
5478 #ifdef I40E_FCOE
5479 case I40E_VSI_FCOE:
5480 #endif
5481 if (!vsi->netdev || !vsi->netdev_registered)
5482 break;
5483
5484 if (link_up) {
5485 netif_carrier_on(vsi->netdev);
5486 netif_tx_wake_all_queues(vsi->netdev);
5487 } else {
5488 netif_carrier_off(vsi->netdev);
5489 netif_tx_stop_all_queues(vsi->netdev);
5490 }
5491 break;
5492
5493 case I40E_VSI_SRIOV:
5494 case I40E_VSI_VMDQ2:
5495 case I40E_VSI_CTRL:
5496 case I40E_VSI_MIRROR:
5497 default:
5498 /* there is no notification for other VSIs */
5499 break;
5500 }
5501 }
5502
5503 /**
5504 * i40e_veb_link_event - notify elements on the veb of a link event
5505 * @veb: veb to be notified
5506 * @link_up: link up or down
5507 **/
5508 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5509 {
5510 struct i40e_pf *pf;
5511 int i;
5512
5513 if (!veb || !veb->pf)
5514 return;
5515 pf = veb->pf;
5516
5517 /* depth first... */
5518 for (i = 0; i < I40E_MAX_VEB; i++)
5519 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5520 i40e_veb_link_event(pf->veb[i], link_up);
5521
5522 /* ... now the local VSIs */
5523 for (i = 0; i < pf->num_alloc_vsi; i++)
5524 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5525 i40e_vsi_link_event(pf->vsi[i], link_up);
5526 }
5527
5528 /**
5529 * i40e_link_event - Update netif_carrier status
5530 * @pf: board private structure
5531 **/
5532 static void i40e_link_event(struct i40e_pf *pf)
5533 {
5534 bool new_link, old_link;
5535 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5536 u8 new_link_speed, old_link_speed;
5537
5538 /* set this to force the get_link_status call to refresh state */
5539 pf->hw.phy.get_link_info = true;
5540
5541 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5542 new_link = i40e_get_link_status(&pf->hw);
5543 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5544 new_link_speed = pf->hw.phy.link_info.link_speed;
5545
5546 if (new_link == old_link &&
5547 new_link_speed == old_link_speed &&
5548 (test_bit(__I40E_DOWN, &vsi->state) ||
5549 new_link == netif_carrier_ok(vsi->netdev)))
5550 return;
5551
5552 if (!test_bit(__I40E_DOWN, &vsi->state))
5553 i40e_print_link_message(vsi, new_link);
5554
5555 /* Notify the base of the switch tree connected to
5556 * the link. Floating VEBs are not notified.
5557 */
5558 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5559 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5560 else
5561 i40e_vsi_link_event(vsi, new_link);
5562
5563 if (pf->vf)
5564 i40e_vc_notify_link_state(pf);
5565
5566 if (pf->flags & I40E_FLAG_PTP)
5567 i40e_ptp_set_increment(pf);
5568 }
5569
5570 /**
5571 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5572 * @pf: board private structure
5573 *
5574 * Set the per-queue flags to request a check for stuck queues in the irq
5575 * clean functions, then force interrupts to be sure the irq clean is called.
5576 **/
5577 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5578 {
5579 int i, v;
5580
5581 /* If we're down or resetting, just bail */
5582 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
5583 return;
5584
5585 /* for each VSI/netdev
5586 * for each Tx queue
5587 * set the check flag
5588 * for each q_vector
5589 * force an interrupt
5590 */
5591 for (v = 0; v < pf->num_alloc_vsi; v++) {
5592 struct i40e_vsi *vsi = pf->vsi[v];
5593 int armed = 0;
5594
5595 if (!pf->vsi[v] ||
5596 test_bit(__I40E_DOWN, &vsi->state) ||
5597 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5598 continue;
5599
5600 for (i = 0; i < vsi->num_queue_pairs; i++) {
5601 set_check_for_tx_hang(vsi->tx_rings[i]);
5602 if (test_bit(__I40E_HANG_CHECK_ARMED,
5603 &vsi->tx_rings[i]->state))
5604 armed++;
5605 }
5606
5607 if (armed) {
5608 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5609 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5610 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5611 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5612 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5613 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5614 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5615 } else {
5616 u16 vec = vsi->base_vector - 1;
5617 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5618 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5619 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5620 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5621 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5622 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5623 wr32(&vsi->back->hw,
5624 I40E_PFINT_DYN_CTLN(vec), val);
5625 }
5626 i40e_flush(&vsi->back->hw);
5627 }
5628 }
5629 }
5630
5631 /**
5632 * i40e_watchdog_subtask - periodic checks not using event driven response
5633 * @pf: board private structure
5634 **/
5635 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5636 {
5637 int i;
5638
5639 /* if interface is down do nothing */
5640 if (test_bit(__I40E_DOWN, &pf->state) ||
5641 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5642 return;
5643
5644 /* make sure we don't do these things too often */
5645 if (time_before(jiffies, (pf->service_timer_previous +
5646 pf->service_timer_period)))
5647 return;
5648 pf->service_timer_previous = jiffies;
5649
5650 i40e_check_hang_subtask(pf);
5651 i40e_link_event(pf);
5652
5653 /* Update the stats for active netdevs so the network stack
5654 * can look at updated numbers whenever it cares to
5655 */
5656 for (i = 0; i < pf->num_alloc_vsi; i++)
5657 if (pf->vsi[i] && pf->vsi[i]->netdev)
5658 i40e_update_stats(pf->vsi[i]);
5659
5660 /* Update the stats for the active switching components */
5661 for (i = 0; i < I40E_MAX_VEB; i++)
5662 if (pf->veb[i])
5663 i40e_update_veb_stats(pf->veb[i]);
5664
5665 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5666 }
5667
5668 /**
5669 * i40e_reset_subtask - Set up for resetting the device and driver
5670 * @pf: board private structure
5671 **/
5672 static void i40e_reset_subtask(struct i40e_pf *pf)
5673 {
5674 u32 reset_flags = 0;
5675
5676 rtnl_lock();
5677 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5678 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5679 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5680 }
5681 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5682 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5683 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5684 }
5685 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5686 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5687 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5688 }
5689 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5690 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5691 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5692 }
5693 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5694 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5695 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5696 }
5697
5698 /* If there's a recovery already waiting, it takes
5699 * precedence before starting a new reset sequence.
5700 */
5701 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5702 i40e_handle_reset_warning(pf);
5703 goto unlock;
5704 }
5705
5706 /* If we're already down or resetting, just bail */
5707 if (reset_flags &&
5708 !test_bit(__I40E_DOWN, &pf->state) &&
5709 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5710 i40e_do_reset(pf, reset_flags);
5711
5712 unlock:
5713 rtnl_unlock();
5714 }
5715
5716 /**
5717 * i40e_handle_link_event - Handle link event
5718 * @pf: board private structure
5719 * @e: event info posted on ARQ
5720 **/
5721 static void i40e_handle_link_event(struct i40e_pf *pf,
5722 struct i40e_arq_event_info *e)
5723 {
5724 struct i40e_hw *hw = &pf->hw;
5725 struct i40e_aqc_get_link_status *status =
5726 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5727 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
5728
5729 /* save off old link status information */
5730 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
5731 sizeof(pf->hw.phy.link_info_old));
5732
5733 /* Do a new status request to re-enable LSE reporting
5734 * and load new status information into the hw struct
5735 * This completely ignores any state information
5736 * in the ARQ event info, instead choosing to always
5737 * issue the AQ update link status command.
5738 */
5739 i40e_link_event(pf);
5740
5741 /* check for unqualified module, if link is down */
5742 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5743 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5744 (!(status->link_info & I40E_AQ_LINK_UP)))
5745 dev_err(&pf->pdev->dev,
5746 "The driver failed to link because an unqualified module was detected.\n");
5747 }
5748
5749 /**
5750 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5751 * @pf: board private structure
5752 **/
5753 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5754 {
5755 struct i40e_arq_event_info event;
5756 struct i40e_hw *hw = &pf->hw;
5757 u16 pending, i = 0;
5758 i40e_status ret;
5759 u16 opcode;
5760 u32 oldval;
5761 u32 val;
5762
5763 /* Do not run clean AQ when PF reset fails */
5764 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5765 return;
5766
5767 /* check for error indications */
5768 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5769 oldval = val;
5770 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5771 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5772 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5773 }
5774 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5775 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5776 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5777 }
5778 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5779 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5780 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5781 }
5782 if (oldval != val)
5783 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5784
5785 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5786 oldval = val;
5787 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5788 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5789 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5790 }
5791 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5792 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5793 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5794 }
5795 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5796 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5797 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5798 }
5799 if (oldval != val)
5800 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5801
5802 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5803 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5804 if (!event.msg_buf)
5805 return;
5806
5807 do {
5808 ret = i40e_clean_arq_element(hw, &event, &pending);
5809 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5810 break;
5811 else if (ret) {
5812 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5813 break;
5814 }
5815
5816 opcode = le16_to_cpu(event.desc.opcode);
5817 switch (opcode) {
5818
5819 case i40e_aqc_opc_get_link_status:
5820 i40e_handle_link_event(pf, &event);
5821 break;
5822 case i40e_aqc_opc_send_msg_to_pf:
5823 ret = i40e_vc_process_vf_msg(pf,
5824 le16_to_cpu(event.desc.retval),
5825 le32_to_cpu(event.desc.cookie_high),
5826 le32_to_cpu(event.desc.cookie_low),
5827 event.msg_buf,
5828 event.msg_len);
5829 break;
5830 case i40e_aqc_opc_lldp_update_mib:
5831 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5832 #ifdef CONFIG_I40E_DCB
5833 rtnl_lock();
5834 ret = i40e_handle_lldp_event(pf, &event);
5835 rtnl_unlock();
5836 #endif /* CONFIG_I40E_DCB */
5837 break;
5838 case i40e_aqc_opc_event_lan_overflow:
5839 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5840 i40e_handle_lan_overflow_event(pf, &event);
5841 break;
5842 case i40e_aqc_opc_send_msg_to_peer:
5843 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5844 break;
5845 default:
5846 dev_info(&pf->pdev->dev,
5847 "ARQ Error: Unknown event 0x%04x received\n",
5848 opcode);
5849 break;
5850 }
5851 } while (pending && (i++ < pf->adminq_work_limit));
5852
5853 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5854 /* re-enable Admin queue interrupt cause */
5855 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5856 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5857 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5858 i40e_flush(hw);
5859
5860 kfree(event.msg_buf);
5861 }
5862
5863 /**
5864 * i40e_verify_eeprom - make sure eeprom is good to use
5865 * @pf: board private structure
5866 **/
5867 static void i40e_verify_eeprom(struct i40e_pf *pf)
5868 {
5869 int err;
5870
5871 err = i40e_diag_eeprom_test(&pf->hw);
5872 if (err) {
5873 /* retry in case of garbage read */
5874 err = i40e_diag_eeprom_test(&pf->hw);
5875 if (err) {
5876 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5877 err);
5878 set_bit(__I40E_BAD_EEPROM, &pf->state);
5879 }
5880 }
5881
5882 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5883 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5884 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5885 }
5886 }
5887
5888 /**
5889 * i40e_config_bridge_mode - Configure the HW bridge mode
5890 * @veb: pointer to the bridge instance
5891 *
5892 * Configure the loop back mode for the LAN VSI that is downlink to the
5893 * specified HW bridge instance. It is expected this function is called
5894 * when a new HW bridge is instantiated.
5895 **/
5896 static void i40e_config_bridge_mode(struct i40e_veb *veb)
5897 {
5898 struct i40e_pf *pf = veb->pf;
5899
5900 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
5901 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
5902 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
5903 i40e_disable_pf_switch_lb(pf);
5904 else
5905 i40e_enable_pf_switch_lb(pf);
5906 }
5907
5908 /**
5909 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5910 * @veb: pointer to the VEB instance
5911 *
5912 * This is a recursive function that first builds the attached VSIs then
5913 * recurses in to build the next layer of VEB. We track the connections
5914 * through our own index numbers because the seid's from the HW could
5915 * change across the reset.
5916 **/
5917 static int i40e_reconstitute_veb(struct i40e_veb *veb)
5918 {
5919 struct i40e_vsi *ctl_vsi = NULL;
5920 struct i40e_pf *pf = veb->pf;
5921 int v, veb_idx;
5922 int ret;
5923
5924 /* build VSI that owns this VEB, temporarily attached to base VEB */
5925 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
5926 if (pf->vsi[v] &&
5927 pf->vsi[v]->veb_idx == veb->idx &&
5928 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5929 ctl_vsi = pf->vsi[v];
5930 break;
5931 }
5932 }
5933 if (!ctl_vsi) {
5934 dev_info(&pf->pdev->dev,
5935 "missing owner VSI for veb_idx %d\n", veb->idx);
5936 ret = -ENOENT;
5937 goto end_reconstitute;
5938 }
5939 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5940 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5941 ret = i40e_add_vsi(ctl_vsi);
5942 if (ret) {
5943 dev_info(&pf->pdev->dev,
5944 "rebuild of owner VSI failed: %d\n", ret);
5945 goto end_reconstitute;
5946 }
5947 i40e_vsi_reset_stats(ctl_vsi);
5948
5949 /* create the VEB in the switch and move the VSI onto the VEB */
5950 ret = i40e_add_veb(veb, ctl_vsi);
5951 if (ret)
5952 goto end_reconstitute;
5953
5954 i40e_config_bridge_mode(veb);
5955
5956 /* create the remaining VSIs attached to this VEB */
5957 for (v = 0; v < pf->num_alloc_vsi; v++) {
5958 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5959 continue;
5960
5961 if (pf->vsi[v]->veb_idx == veb->idx) {
5962 struct i40e_vsi *vsi = pf->vsi[v];
5963 vsi->uplink_seid = veb->seid;
5964 ret = i40e_add_vsi(vsi);
5965 if (ret) {
5966 dev_info(&pf->pdev->dev,
5967 "rebuild of vsi_idx %d failed: %d\n",
5968 v, ret);
5969 goto end_reconstitute;
5970 }
5971 i40e_vsi_reset_stats(vsi);
5972 }
5973 }
5974
5975 /* create any VEBs attached to this VEB - RECURSION */
5976 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5977 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5978 pf->veb[veb_idx]->uplink_seid = veb->seid;
5979 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5980 if (ret)
5981 break;
5982 }
5983 }
5984
5985 end_reconstitute:
5986 return ret;
5987 }
5988
5989 /**
5990 * i40e_get_capabilities - get info about the HW
5991 * @pf: the PF struct
5992 **/
5993 static int i40e_get_capabilities(struct i40e_pf *pf)
5994 {
5995 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5996 u16 data_size;
5997 int buf_len;
5998 int err;
5999
6000 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6001 do {
6002 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6003 if (!cap_buf)
6004 return -ENOMEM;
6005
6006 /* this loads the data into the hw struct for us */
6007 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6008 &data_size,
6009 i40e_aqc_opc_list_func_capabilities,
6010 NULL);
6011 /* data loaded, buffer no longer needed */
6012 kfree(cap_buf);
6013
6014 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6015 /* retry with a larger buffer */
6016 buf_len = data_size;
6017 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6018 dev_info(&pf->pdev->dev,
6019 "capability discovery failed: aq=%d\n",
6020 pf->hw.aq.asq_last_status);
6021 return -ENODEV;
6022 }
6023 } while (err);
6024
6025 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6026 (pf->hw.aq.fw_maj_ver < 2)) {
6027 pf->hw.func_caps.num_msix_vectors++;
6028 pf->hw.func_caps.num_msix_vectors_vf++;
6029 }
6030
6031 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6032 dev_info(&pf->pdev->dev,
6033 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6034 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6035 pf->hw.func_caps.num_msix_vectors,
6036 pf->hw.func_caps.num_msix_vectors_vf,
6037 pf->hw.func_caps.fd_filters_guaranteed,
6038 pf->hw.func_caps.fd_filters_best_effort,
6039 pf->hw.func_caps.num_tx_qp,
6040 pf->hw.func_caps.num_vsis);
6041
6042 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6043 + pf->hw.func_caps.num_vfs)
6044 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6045 dev_info(&pf->pdev->dev,
6046 "got num_vsis %d, setting num_vsis to %d\n",
6047 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6048 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6049 }
6050
6051 return 0;
6052 }
6053
6054 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6055
6056 /**
6057 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6058 * @pf: board private structure
6059 **/
6060 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6061 {
6062 struct i40e_vsi *vsi;
6063 int i;
6064
6065 /* quick workaround for an NVM issue that leaves a critical register
6066 * uninitialized
6067 */
6068 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6069 static const u32 hkey[] = {
6070 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6071 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6072 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6073 0x95b3a76d};
6074
6075 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6076 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6077 }
6078
6079 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6080 return;
6081
6082 /* find existing VSI and see if it needs configuring */
6083 vsi = NULL;
6084 for (i = 0; i < pf->num_alloc_vsi; i++) {
6085 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6086 vsi = pf->vsi[i];
6087 break;
6088 }
6089 }
6090
6091 /* create a new VSI if none exists */
6092 if (!vsi) {
6093 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6094 pf->vsi[pf->lan_vsi]->seid, 0);
6095 if (!vsi) {
6096 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6097 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6098 return;
6099 }
6100 }
6101
6102 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6103 }
6104
6105 /**
6106 * i40e_fdir_teardown - release the Flow Director resources
6107 * @pf: board private structure
6108 **/
6109 static void i40e_fdir_teardown(struct i40e_pf *pf)
6110 {
6111 int i;
6112
6113 i40e_fdir_filter_exit(pf);
6114 for (i = 0; i < pf->num_alloc_vsi; i++) {
6115 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6116 i40e_vsi_release(pf->vsi[i]);
6117 break;
6118 }
6119 }
6120 }
6121
6122 /**
6123 * i40e_prep_for_reset - prep for the core to reset
6124 * @pf: board private structure
6125 *
6126 * Close up the VFs and other things in prep for pf Reset.
6127 **/
6128 static void i40e_prep_for_reset(struct i40e_pf *pf)
6129 {
6130 struct i40e_hw *hw = &pf->hw;
6131 i40e_status ret = 0;
6132 u32 v;
6133
6134 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6135 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6136 return;
6137
6138 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6139
6140 /* quiesce the VSIs and their queues that are not already DOWN */
6141 i40e_pf_quiesce_all_vsi(pf);
6142
6143 for (v = 0; v < pf->num_alloc_vsi; v++) {
6144 if (pf->vsi[v])
6145 pf->vsi[v]->seid = 0;
6146 }
6147
6148 i40e_shutdown_adminq(&pf->hw);
6149
6150 /* call shutdown HMC */
6151 if (hw->hmc.hmc_obj) {
6152 ret = i40e_shutdown_lan_hmc(hw);
6153 if (ret)
6154 dev_warn(&pf->pdev->dev,
6155 "shutdown_lan_hmc failed: %d\n", ret);
6156 }
6157 }
6158
6159 /**
6160 * i40e_send_version - update firmware with driver version
6161 * @pf: PF struct
6162 */
6163 static void i40e_send_version(struct i40e_pf *pf)
6164 {
6165 struct i40e_driver_version dv;
6166
6167 dv.major_version = DRV_VERSION_MAJOR;
6168 dv.minor_version = DRV_VERSION_MINOR;
6169 dv.build_version = DRV_VERSION_BUILD;
6170 dv.subbuild_version = 0;
6171 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6172 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6173 }
6174
6175 /**
6176 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6177 * @pf: board private structure
6178 * @reinit: if the Main VSI needs to re-initialized.
6179 **/
6180 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6181 {
6182 struct i40e_hw *hw = &pf->hw;
6183 u8 set_fc_aq_fail = 0;
6184 i40e_status ret;
6185 u32 v;
6186
6187 /* Now we wait for GRST to settle out.
6188 * We don't have to delete the VEBs or VSIs from the hw switch
6189 * because the reset will make them disappear.
6190 */
6191 ret = i40e_pf_reset(hw);
6192 if (ret) {
6193 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6194 set_bit(__I40E_RESET_FAILED, &pf->state);
6195 goto clear_recovery;
6196 }
6197 pf->pfr_count++;
6198
6199 if (test_bit(__I40E_DOWN, &pf->state))
6200 goto clear_recovery;
6201 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6202
6203 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6204 ret = i40e_init_adminq(&pf->hw);
6205 if (ret) {
6206 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6207 goto clear_recovery;
6208 }
6209
6210 /* re-verify the eeprom if we just had an EMP reset */
6211 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6212 i40e_verify_eeprom(pf);
6213
6214 i40e_clear_pxe_mode(hw);
6215 ret = i40e_get_capabilities(pf);
6216 if (ret) {
6217 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6218 ret);
6219 goto end_core_reset;
6220 }
6221
6222 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6223 hw->func_caps.num_rx_qp,
6224 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6225 if (ret) {
6226 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6227 goto end_core_reset;
6228 }
6229 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6230 if (ret) {
6231 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6232 goto end_core_reset;
6233 }
6234
6235 #ifdef CONFIG_I40E_DCB
6236 ret = i40e_init_pf_dcb(pf);
6237 if (ret) {
6238 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6239 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6240 /* Continue without DCB enabled */
6241 }
6242 #endif /* CONFIG_I40E_DCB */
6243 #ifdef I40E_FCOE
6244 ret = i40e_init_pf_fcoe(pf);
6245 if (ret)
6246 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6247
6248 #endif
6249 /* do basic switch setup */
6250 ret = i40e_setup_pf_switch(pf, reinit);
6251 if (ret)
6252 goto end_core_reset;
6253
6254 /* driver is only interested in link up/down and module qualification
6255 * reports from firmware
6256 */
6257 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6258 I40E_AQ_EVENT_LINK_UPDOWN |
6259 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6260 if (ret)
6261 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6262
6263 /* make sure our flow control settings are restored */
6264 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6265 if (ret)
6266 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6267
6268 /* Rebuild the VSIs and VEBs that existed before reset.
6269 * They are still in our local switch element arrays, so only
6270 * need to rebuild the switch model in the HW.
6271 *
6272 * If there were VEBs but the reconstitution failed, we'll try
6273 * try to recover minimal use by getting the basic PF VSI working.
6274 */
6275 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6276 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6277 /* find the one VEB connected to the MAC, and find orphans */
6278 for (v = 0; v < I40E_MAX_VEB; v++) {
6279 if (!pf->veb[v])
6280 continue;
6281
6282 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6283 pf->veb[v]->uplink_seid == 0) {
6284 ret = i40e_reconstitute_veb(pf->veb[v]);
6285
6286 if (!ret)
6287 continue;
6288
6289 /* If Main VEB failed, we're in deep doodoo,
6290 * so give up rebuilding the switch and set up
6291 * for minimal rebuild of PF VSI.
6292 * If orphan failed, we'll report the error
6293 * but try to keep going.
6294 */
6295 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6296 dev_info(&pf->pdev->dev,
6297 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6298 ret);
6299 pf->vsi[pf->lan_vsi]->uplink_seid
6300 = pf->mac_seid;
6301 break;
6302 } else if (pf->veb[v]->uplink_seid == 0) {
6303 dev_info(&pf->pdev->dev,
6304 "rebuild of orphan VEB failed: %d\n",
6305 ret);
6306 }
6307 }
6308 }
6309 }
6310
6311 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6312 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6313 /* no VEB, so rebuild only the Main VSI */
6314 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6315 if (ret) {
6316 dev_info(&pf->pdev->dev,
6317 "rebuild of Main VSI failed: %d\n", ret);
6318 goto end_core_reset;
6319 }
6320 }
6321
6322 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6323 (pf->hw.aq.fw_maj_ver < 4)) {
6324 msleep(75);
6325 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6326 if (ret)
6327 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6328 pf->hw.aq.asq_last_status);
6329 }
6330 /* reinit the misc interrupt */
6331 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6332 ret = i40e_setup_misc_vector(pf);
6333
6334 /* restart the VSIs that were rebuilt and running before the reset */
6335 i40e_pf_unquiesce_all_vsi(pf);
6336
6337 if (pf->num_alloc_vfs) {
6338 for (v = 0; v < pf->num_alloc_vfs; v++)
6339 i40e_reset_vf(&pf->vf[v], true);
6340 }
6341
6342 /* tell the firmware that we're starting */
6343 i40e_send_version(pf);
6344
6345 end_core_reset:
6346 clear_bit(__I40E_RESET_FAILED, &pf->state);
6347 clear_recovery:
6348 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6349 }
6350
6351 /**
6352 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
6353 * @pf: board private structure
6354 *
6355 * Close up the VFs and other things in prep for a Core Reset,
6356 * then get ready to rebuild the world.
6357 **/
6358 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6359 {
6360 i40e_prep_for_reset(pf);
6361 i40e_reset_and_rebuild(pf, false);
6362 }
6363
6364 /**
6365 * i40e_handle_mdd_event
6366 * @pf: pointer to the pf structure
6367 *
6368 * Called from the MDD irq handler to identify possibly malicious vfs
6369 **/
6370 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6371 {
6372 struct i40e_hw *hw = &pf->hw;
6373 bool mdd_detected = false;
6374 bool pf_mdd_detected = false;
6375 struct i40e_vf *vf;
6376 u32 reg;
6377 int i;
6378
6379 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6380 return;
6381
6382 /* find what triggered the MDD event */
6383 reg = rd32(hw, I40E_GL_MDET_TX);
6384 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6385 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6386 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6387 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6388 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6389 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6390 I40E_GL_MDET_TX_EVENT_SHIFT;
6391 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6392 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6393 pf->hw.func_caps.base_queue;
6394 if (netif_msg_tx_err(pf))
6395 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d pf number 0x%02x vf number 0x%02x\n",
6396 event, queue, pf_num, vf_num);
6397 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6398 mdd_detected = true;
6399 }
6400 reg = rd32(hw, I40E_GL_MDET_RX);
6401 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6402 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6403 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6404 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6405 I40E_GL_MDET_RX_EVENT_SHIFT;
6406 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6407 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6408 pf->hw.func_caps.base_queue;
6409 if (netif_msg_rx_err(pf))
6410 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6411 event, queue, func);
6412 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6413 mdd_detected = true;
6414 }
6415
6416 if (mdd_detected) {
6417 reg = rd32(hw, I40E_PF_MDET_TX);
6418 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6419 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6420 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6421 pf_mdd_detected = true;
6422 }
6423 reg = rd32(hw, I40E_PF_MDET_RX);
6424 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6425 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6426 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6427 pf_mdd_detected = true;
6428 }
6429 /* Queue belongs to the PF, initiate a reset */
6430 if (pf_mdd_detected) {
6431 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6432 i40e_service_event_schedule(pf);
6433 }
6434 }
6435
6436 /* see if one of the VFs needs its hand slapped */
6437 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6438 vf = &(pf->vf[i]);
6439 reg = rd32(hw, I40E_VP_MDET_TX(i));
6440 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6441 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6442 vf->num_mdd_events++;
6443 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6444 i);
6445 }
6446
6447 reg = rd32(hw, I40E_VP_MDET_RX(i));
6448 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6449 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6450 vf->num_mdd_events++;
6451 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6452 i);
6453 }
6454
6455 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6456 dev_info(&pf->pdev->dev,
6457 "Too many MDD events on VF %d, disabled\n", i);
6458 dev_info(&pf->pdev->dev,
6459 "Use PF Control I/F to re-enable the VF\n");
6460 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6461 }
6462 }
6463
6464 /* re-enable mdd interrupt cause */
6465 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6466 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6467 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6468 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6469 i40e_flush(hw);
6470 }
6471
6472 #ifdef CONFIG_I40E_VXLAN
6473 /**
6474 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6475 * @pf: board private structure
6476 **/
6477 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6478 {
6479 struct i40e_hw *hw = &pf->hw;
6480 i40e_status ret;
6481 u8 filter_index;
6482 __be16 port;
6483 int i;
6484
6485 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6486 return;
6487
6488 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6489
6490 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6491 if (pf->pending_vxlan_bitmap & (1 << i)) {
6492 pf->pending_vxlan_bitmap &= ~(1 << i);
6493 port = pf->vxlan_ports[i];
6494 ret = port ?
6495 i40e_aq_add_udp_tunnel(hw, ntohs(port),
6496 I40E_AQC_TUNNEL_TYPE_VXLAN,
6497 &filter_index, NULL)
6498 : i40e_aq_del_udp_tunnel(hw, i, NULL);
6499
6500 if (ret) {
6501 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
6502 port ? "adding" : "deleting",
6503 ntohs(port), port ? i : i);
6504
6505 pf->vxlan_ports[i] = 0;
6506 } else {
6507 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
6508 port ? "Added" : "Deleted",
6509 ntohs(port), port ? i : filter_index);
6510 }
6511 }
6512 }
6513 }
6514
6515 #endif
6516 /**
6517 * i40e_service_task - Run the driver's async subtasks
6518 * @work: pointer to work_struct containing our data
6519 **/
6520 static void i40e_service_task(struct work_struct *work)
6521 {
6522 struct i40e_pf *pf = container_of(work,
6523 struct i40e_pf,
6524 service_task);
6525 unsigned long start_time = jiffies;
6526
6527 /* don't bother with service tasks if a reset is in progress */
6528 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6529 i40e_service_event_complete(pf);
6530 return;
6531 }
6532
6533 i40e_reset_subtask(pf);
6534 i40e_handle_mdd_event(pf);
6535 i40e_vc_process_vflr_event(pf);
6536 i40e_watchdog_subtask(pf);
6537 i40e_fdir_reinit_subtask(pf);
6538 i40e_sync_filters_subtask(pf);
6539 #ifdef CONFIG_I40E_VXLAN
6540 i40e_sync_vxlan_filters_subtask(pf);
6541 #endif
6542 i40e_clean_adminq_subtask(pf);
6543
6544 i40e_service_event_complete(pf);
6545
6546 /* If the tasks have taken longer than one timer cycle or there
6547 * is more work to be done, reschedule the service task now
6548 * rather than wait for the timer to tick again.
6549 */
6550 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6551 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6552 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6553 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6554 i40e_service_event_schedule(pf);
6555 }
6556
6557 /**
6558 * i40e_service_timer - timer callback
6559 * @data: pointer to PF struct
6560 **/
6561 static void i40e_service_timer(unsigned long data)
6562 {
6563 struct i40e_pf *pf = (struct i40e_pf *)data;
6564
6565 mod_timer(&pf->service_timer,
6566 round_jiffies(jiffies + pf->service_timer_period));
6567 i40e_service_event_schedule(pf);
6568 }
6569
6570 /**
6571 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6572 * @vsi: the VSI being configured
6573 **/
6574 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6575 {
6576 struct i40e_pf *pf = vsi->back;
6577
6578 switch (vsi->type) {
6579 case I40E_VSI_MAIN:
6580 vsi->alloc_queue_pairs = pf->num_lan_qps;
6581 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6582 I40E_REQ_DESCRIPTOR_MULTIPLE);
6583 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6584 vsi->num_q_vectors = pf->num_lan_msix;
6585 else
6586 vsi->num_q_vectors = 1;
6587
6588 break;
6589
6590 case I40E_VSI_FDIR:
6591 vsi->alloc_queue_pairs = 1;
6592 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6593 I40E_REQ_DESCRIPTOR_MULTIPLE);
6594 vsi->num_q_vectors = 1;
6595 break;
6596
6597 case I40E_VSI_VMDQ2:
6598 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6599 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6600 I40E_REQ_DESCRIPTOR_MULTIPLE);
6601 vsi->num_q_vectors = pf->num_vmdq_msix;
6602 break;
6603
6604 case I40E_VSI_SRIOV:
6605 vsi->alloc_queue_pairs = pf->num_vf_qps;
6606 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6607 I40E_REQ_DESCRIPTOR_MULTIPLE);
6608 break;
6609
6610 #ifdef I40E_FCOE
6611 case I40E_VSI_FCOE:
6612 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6613 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6614 I40E_REQ_DESCRIPTOR_MULTIPLE);
6615 vsi->num_q_vectors = pf->num_fcoe_msix;
6616 break;
6617
6618 #endif /* I40E_FCOE */
6619 default:
6620 WARN_ON(1);
6621 return -ENODATA;
6622 }
6623
6624 return 0;
6625 }
6626
6627 /**
6628 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6629 * @type: VSI pointer
6630 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6631 *
6632 * On error: returns error code (negative)
6633 * On success: returns 0
6634 **/
6635 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6636 {
6637 int size;
6638 int ret = 0;
6639
6640 /* allocate memory for both Tx and Rx ring pointers */
6641 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6642 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6643 if (!vsi->tx_rings)
6644 return -ENOMEM;
6645 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6646
6647 if (alloc_qvectors) {
6648 /* allocate memory for q_vector pointers */
6649 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6650 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6651 if (!vsi->q_vectors) {
6652 ret = -ENOMEM;
6653 goto err_vectors;
6654 }
6655 }
6656 return ret;
6657
6658 err_vectors:
6659 kfree(vsi->tx_rings);
6660 return ret;
6661 }
6662
6663 /**
6664 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6665 * @pf: board private structure
6666 * @type: type of VSI
6667 *
6668 * On error: returns error code (negative)
6669 * On success: returns vsi index in PF (positive)
6670 **/
6671 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6672 {
6673 int ret = -ENODEV;
6674 struct i40e_vsi *vsi;
6675 int vsi_idx;
6676 int i;
6677
6678 /* Need to protect the allocation of the VSIs at the PF level */
6679 mutex_lock(&pf->switch_mutex);
6680
6681 /* VSI list may be fragmented if VSI creation/destruction has
6682 * been happening. We can afford to do a quick scan to look
6683 * for any free VSIs in the list.
6684 *
6685 * find next empty vsi slot, looping back around if necessary
6686 */
6687 i = pf->next_vsi;
6688 while (i < pf->num_alloc_vsi && pf->vsi[i])
6689 i++;
6690 if (i >= pf->num_alloc_vsi) {
6691 i = 0;
6692 while (i < pf->next_vsi && pf->vsi[i])
6693 i++;
6694 }
6695
6696 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6697 vsi_idx = i; /* Found one! */
6698 } else {
6699 ret = -ENODEV;
6700 goto unlock_pf; /* out of VSI slots! */
6701 }
6702 pf->next_vsi = ++i;
6703
6704 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6705 if (!vsi) {
6706 ret = -ENOMEM;
6707 goto unlock_pf;
6708 }
6709 vsi->type = type;
6710 vsi->back = pf;
6711 set_bit(__I40E_DOWN, &vsi->state);
6712 vsi->flags = 0;
6713 vsi->idx = vsi_idx;
6714 vsi->rx_itr_setting = pf->rx_itr_default;
6715 vsi->tx_itr_setting = pf->tx_itr_default;
6716 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6717 pf->rss_table_size : 64;
6718 vsi->netdev_registered = false;
6719 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6720 INIT_LIST_HEAD(&vsi->mac_filter_list);
6721 vsi->irqs_ready = false;
6722
6723 ret = i40e_set_num_rings_in_vsi(vsi);
6724 if (ret)
6725 goto err_rings;
6726
6727 ret = i40e_vsi_alloc_arrays(vsi, true);
6728 if (ret)
6729 goto err_rings;
6730
6731 /* Setup default MSIX irq handler for VSI */
6732 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6733
6734 pf->vsi[vsi_idx] = vsi;
6735 ret = vsi_idx;
6736 goto unlock_pf;
6737
6738 err_rings:
6739 pf->next_vsi = i - 1;
6740 kfree(vsi);
6741 unlock_pf:
6742 mutex_unlock(&pf->switch_mutex);
6743 return ret;
6744 }
6745
6746 /**
6747 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6748 * @type: VSI pointer
6749 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6750 *
6751 * On error: returns error code (negative)
6752 * On success: returns 0
6753 **/
6754 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6755 {
6756 /* free the ring and vector containers */
6757 if (free_qvectors) {
6758 kfree(vsi->q_vectors);
6759 vsi->q_vectors = NULL;
6760 }
6761 kfree(vsi->tx_rings);
6762 vsi->tx_rings = NULL;
6763 vsi->rx_rings = NULL;
6764 }
6765
6766 /**
6767 * i40e_vsi_clear - Deallocate the VSI provided
6768 * @vsi: the VSI being un-configured
6769 **/
6770 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6771 {
6772 struct i40e_pf *pf;
6773
6774 if (!vsi)
6775 return 0;
6776
6777 if (!vsi->back)
6778 goto free_vsi;
6779 pf = vsi->back;
6780
6781 mutex_lock(&pf->switch_mutex);
6782 if (!pf->vsi[vsi->idx]) {
6783 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6784 vsi->idx, vsi->idx, vsi, vsi->type);
6785 goto unlock_vsi;
6786 }
6787
6788 if (pf->vsi[vsi->idx] != vsi) {
6789 dev_err(&pf->pdev->dev,
6790 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6791 pf->vsi[vsi->idx]->idx,
6792 pf->vsi[vsi->idx],
6793 pf->vsi[vsi->idx]->type,
6794 vsi->idx, vsi, vsi->type);
6795 goto unlock_vsi;
6796 }
6797
6798 /* updates the pf for this cleared vsi */
6799 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6800 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6801
6802 i40e_vsi_free_arrays(vsi, true);
6803
6804 pf->vsi[vsi->idx] = NULL;
6805 if (vsi->idx < pf->next_vsi)
6806 pf->next_vsi = vsi->idx;
6807
6808 unlock_vsi:
6809 mutex_unlock(&pf->switch_mutex);
6810 free_vsi:
6811 kfree(vsi);
6812
6813 return 0;
6814 }
6815
6816 /**
6817 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6818 * @vsi: the VSI being cleaned
6819 **/
6820 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6821 {
6822 int i;
6823
6824 if (vsi->tx_rings && vsi->tx_rings[0]) {
6825 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6826 kfree_rcu(vsi->tx_rings[i], rcu);
6827 vsi->tx_rings[i] = NULL;
6828 vsi->rx_rings[i] = NULL;
6829 }
6830 }
6831 }
6832
6833 /**
6834 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
6835 * @vsi: the VSI being configured
6836 **/
6837 static int i40e_alloc_rings(struct i40e_vsi *vsi)
6838 {
6839 struct i40e_ring *tx_ring, *rx_ring;
6840 struct i40e_pf *pf = vsi->back;
6841 int i;
6842
6843 /* Set basic values in the rings to be used later during open() */
6844 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6845 /* allocate space for both Tx and Rx in one shot */
6846 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6847 if (!tx_ring)
6848 goto err_out;
6849
6850 tx_ring->queue_index = i;
6851 tx_ring->reg_idx = vsi->base_queue + i;
6852 tx_ring->ring_active = false;
6853 tx_ring->vsi = vsi;
6854 tx_ring->netdev = vsi->netdev;
6855 tx_ring->dev = &pf->pdev->dev;
6856 tx_ring->count = vsi->num_desc;
6857 tx_ring->size = 0;
6858 tx_ring->dcb_tc = 0;
6859 vsi->tx_rings[i] = tx_ring;
6860
6861 rx_ring = &tx_ring[1];
6862 rx_ring->queue_index = i;
6863 rx_ring->reg_idx = vsi->base_queue + i;
6864 rx_ring->ring_active = false;
6865 rx_ring->vsi = vsi;
6866 rx_ring->netdev = vsi->netdev;
6867 rx_ring->dev = &pf->pdev->dev;
6868 rx_ring->count = vsi->num_desc;
6869 rx_ring->size = 0;
6870 rx_ring->dcb_tc = 0;
6871 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6872 set_ring_16byte_desc_enabled(rx_ring);
6873 else
6874 clear_ring_16byte_desc_enabled(rx_ring);
6875 vsi->rx_rings[i] = rx_ring;
6876 }
6877
6878 return 0;
6879
6880 err_out:
6881 i40e_vsi_clear_rings(vsi);
6882 return -ENOMEM;
6883 }
6884
6885 /**
6886 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6887 * @pf: board private structure
6888 * @vectors: the number of MSI-X vectors to request
6889 *
6890 * Returns the number of vectors reserved, or error
6891 **/
6892 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6893 {
6894 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6895 I40E_MIN_MSIX, vectors);
6896 if (vectors < 0) {
6897 dev_info(&pf->pdev->dev,
6898 "MSI-X vector reservation failed: %d\n", vectors);
6899 vectors = 0;
6900 }
6901
6902 return vectors;
6903 }
6904
6905 /**
6906 * i40e_init_msix - Setup the MSIX capability
6907 * @pf: board private structure
6908 *
6909 * Work with the OS to set up the MSIX vectors needed.
6910 *
6911 * Returns 0 on success, negative on failure
6912 **/
6913 static int i40e_init_msix(struct i40e_pf *pf)
6914 {
6915 i40e_status err = 0;
6916 struct i40e_hw *hw = &pf->hw;
6917 int other_vecs = 0;
6918 int v_budget, i;
6919 int vec;
6920
6921 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6922 return -ENODEV;
6923
6924 /* The number of vectors we'll request will be comprised of:
6925 * - Add 1 for "other" cause for Admin Queue events, etc.
6926 * - The number of LAN queue pairs
6927 * - Queues being used for RSS.
6928 * We don't need as many as max_rss_size vectors.
6929 * use rss_size instead in the calculation since that
6930 * is governed by number of cpus in the system.
6931 * - assumes symmetric Tx/Rx pairing
6932 * - The number of VMDq pairs
6933 #ifdef I40E_FCOE
6934 * - The number of FCOE qps.
6935 #endif
6936 * Once we count this up, try the request.
6937 *
6938 * If we can't get what we want, we'll simplify to nearly nothing
6939 * and try again. If that still fails, we punt.
6940 */
6941 pf->num_lan_msix = min_t(int, num_online_cpus(),
6942 hw->func_caps.num_msix_vectors);
6943 pf->num_vmdq_msix = pf->num_vmdq_qps;
6944 other_vecs = 1;
6945 other_vecs += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6946 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6947 other_vecs++;
6948
6949 /* Scale down if necessary, and the rings will share vectors */
6950 pf->num_lan_msix = min_t(int, pf->num_lan_msix,
6951 (hw->func_caps.num_msix_vectors - other_vecs));
6952 v_budget = pf->num_lan_msix + other_vecs;
6953
6954 #ifdef I40E_FCOE
6955 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
6956 pf->num_fcoe_msix = pf->num_fcoe_qps;
6957 v_budget += pf->num_fcoe_msix;
6958 }
6959 #endif
6960
6961 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6962 GFP_KERNEL);
6963 if (!pf->msix_entries)
6964 return -ENOMEM;
6965
6966 for (i = 0; i < v_budget; i++)
6967 pf->msix_entries[i].entry = i;
6968 vec = i40e_reserve_msix_vectors(pf, v_budget);
6969
6970 if (vec != v_budget) {
6971 /* If we have limited resources, we will start with no vectors
6972 * for the special features and then allocate vectors to some
6973 * of these features based on the policy and at the end disable
6974 * the features that did not get any vectors.
6975 */
6976 #ifdef I40E_FCOE
6977 pf->num_fcoe_qps = 0;
6978 pf->num_fcoe_msix = 0;
6979 #endif
6980 pf->num_vmdq_msix = 0;
6981 }
6982
6983 if (vec < I40E_MIN_MSIX) {
6984 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6985 kfree(pf->msix_entries);
6986 pf->msix_entries = NULL;
6987 return -ENODEV;
6988
6989 } else if (vec == I40E_MIN_MSIX) {
6990 /* Adjust for minimal MSIX use */
6991 pf->num_vmdq_vsis = 0;
6992 pf->num_vmdq_qps = 0;
6993 pf->num_lan_qps = 1;
6994 pf->num_lan_msix = 1;
6995
6996 } else if (vec != v_budget) {
6997 /* reserve the misc vector */
6998 vec--;
6999
7000 /* Scale vector usage down */
7001 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7002 pf->num_vmdq_vsis = 1;
7003
7004 /* partition out the remaining vectors */
7005 switch (vec) {
7006 case 2:
7007 pf->num_lan_msix = 1;
7008 break;
7009 case 3:
7010 #ifdef I40E_FCOE
7011 /* give one vector to FCoE */
7012 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7013 pf->num_lan_msix = 1;
7014 pf->num_fcoe_msix = 1;
7015 }
7016 #else
7017 pf->num_lan_msix = 2;
7018 #endif
7019 break;
7020 default:
7021 #ifdef I40E_FCOE
7022 /* give one vector to FCoE */
7023 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7024 pf->num_fcoe_msix = 1;
7025 vec--;
7026 }
7027 #endif
7028 pf->num_lan_msix = min_t(int, (vec / 2),
7029 pf->num_lan_qps);
7030 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
7031 I40E_DEFAULT_NUM_VMDQ_VSI);
7032 break;
7033 }
7034 }
7035
7036 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7037 (pf->num_vmdq_msix == 0)) {
7038 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7039 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7040 }
7041 #ifdef I40E_FCOE
7042
7043 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7044 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7045 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7046 }
7047 #endif
7048 return err;
7049 }
7050
7051 /**
7052 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7053 * @vsi: the VSI being configured
7054 * @v_idx: index of the vector in the vsi struct
7055 *
7056 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7057 **/
7058 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7059 {
7060 struct i40e_q_vector *q_vector;
7061
7062 /* allocate q_vector */
7063 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7064 if (!q_vector)
7065 return -ENOMEM;
7066
7067 q_vector->vsi = vsi;
7068 q_vector->v_idx = v_idx;
7069 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7070 if (vsi->netdev)
7071 netif_napi_add(vsi->netdev, &q_vector->napi,
7072 i40e_napi_poll, NAPI_POLL_WEIGHT);
7073
7074 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7075 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7076
7077 /* tie q_vector and vsi together */
7078 vsi->q_vectors[v_idx] = q_vector;
7079
7080 return 0;
7081 }
7082
7083 /**
7084 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7085 * @vsi: the VSI being configured
7086 *
7087 * We allocate one q_vector per queue interrupt. If allocation fails we
7088 * return -ENOMEM.
7089 **/
7090 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7091 {
7092 struct i40e_pf *pf = vsi->back;
7093 int v_idx, num_q_vectors;
7094 int err;
7095
7096 /* if not MSIX, give the one vector only to the LAN VSI */
7097 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7098 num_q_vectors = vsi->num_q_vectors;
7099 else if (vsi == pf->vsi[pf->lan_vsi])
7100 num_q_vectors = 1;
7101 else
7102 return -EINVAL;
7103
7104 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7105 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7106 if (err)
7107 goto err_out;
7108 }
7109
7110 return 0;
7111
7112 err_out:
7113 while (v_idx--)
7114 i40e_free_q_vector(vsi, v_idx);
7115
7116 return err;
7117 }
7118
7119 /**
7120 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7121 * @pf: board private structure to initialize
7122 **/
7123 static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
7124 {
7125 int err = 0;
7126
7127 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7128 err = i40e_init_msix(pf);
7129 if (err) {
7130 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7131 #ifdef I40E_FCOE
7132 I40E_FLAG_FCOE_ENABLED |
7133 #endif
7134 I40E_FLAG_RSS_ENABLED |
7135 I40E_FLAG_DCB_CAPABLE |
7136 I40E_FLAG_SRIOV_ENABLED |
7137 I40E_FLAG_FD_SB_ENABLED |
7138 I40E_FLAG_FD_ATR_ENABLED |
7139 I40E_FLAG_VMDQ_ENABLED);
7140
7141 /* rework the queue expectations without MSIX */
7142 i40e_determine_queue_usage(pf);
7143 }
7144 }
7145
7146 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7147 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7148 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7149 err = pci_enable_msi(pf->pdev);
7150 if (err) {
7151 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
7152 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7153 }
7154 }
7155
7156 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7157 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7158
7159 /* track first vector for misc interrupts */
7160 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
7161 }
7162
7163 /**
7164 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7165 * @pf: board private structure
7166 *
7167 * This sets up the handler for MSIX 0, which is used to manage the
7168 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7169 * when in MSI or Legacy interrupt mode.
7170 **/
7171 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7172 {
7173 struct i40e_hw *hw = &pf->hw;
7174 int err = 0;
7175
7176 /* Only request the irq if this is the first time through, and
7177 * not when we're rebuilding after a Reset
7178 */
7179 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7180 err = request_irq(pf->msix_entries[0].vector,
7181 i40e_intr, 0, pf->int_name, pf);
7182 if (err) {
7183 dev_info(&pf->pdev->dev,
7184 "request_irq for %s failed: %d\n",
7185 pf->int_name, err);
7186 return -EFAULT;
7187 }
7188 }
7189
7190 i40e_enable_misc_int_causes(pf);
7191
7192 /* associate no queues to the misc vector */
7193 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7194 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7195
7196 i40e_flush(hw);
7197
7198 i40e_irq_dynamic_enable_icr0(pf);
7199
7200 return err;
7201 }
7202
7203 /**
7204 * i40e_config_rss - Prepare for RSS if used
7205 * @pf: board private structure
7206 **/
7207 static int i40e_config_rss(struct i40e_pf *pf)
7208 {
7209 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7210 struct i40e_hw *hw = &pf->hw;
7211 u32 lut = 0;
7212 int i, j;
7213 u64 hena;
7214 u32 reg_val;
7215
7216 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7217 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7218 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7219
7220 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7221 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7222 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7223 hena |= I40E_DEFAULT_RSS_HENA;
7224 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7225 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7226
7227 /* Check capability and Set table size and register per hw expectation*/
7228 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7229 if (hw->func_caps.rss_table_size == 512) {
7230 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7231 pf->rss_table_size = 512;
7232 } else {
7233 pf->rss_table_size = 128;
7234 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7235 }
7236 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7237
7238 /* Populate the LUT with max no. of queues in round robin fashion */
7239 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7240
7241 /* The assumption is that lan qp count will be the highest
7242 * qp count for any PF VSI that needs RSS.
7243 * If multiple VSIs need RSS support, all the qp counts
7244 * for those VSIs should be a power of 2 for RSS to work.
7245 * If LAN VSI is the only consumer for RSS then this requirement
7246 * is not necessary.
7247 */
7248 if (j == pf->rss_size)
7249 j = 0;
7250 /* lut = 4-byte sliding window of 4 lut entries */
7251 lut = (lut << 8) | (j &
7252 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7253 /* On i = 3, we have 4 entries in lut; write to the register */
7254 if ((i & 3) == 3)
7255 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7256 }
7257 i40e_flush(hw);
7258
7259 return 0;
7260 }
7261
7262 /**
7263 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7264 * @pf: board private structure
7265 * @queue_count: the requested queue count for rss.
7266 *
7267 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7268 * count which may be different from the requested queue count.
7269 **/
7270 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7271 {
7272 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7273 int new_rss_size;
7274
7275 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7276 return 0;
7277
7278 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7279
7280 if (queue_count != vsi->num_queue_pairs) {
7281 vsi->req_queue_pairs = queue_count;
7282 i40e_prep_for_reset(pf);
7283
7284 pf->rss_size = new_rss_size;
7285
7286 i40e_reset_and_rebuild(pf, true);
7287 i40e_config_rss(pf);
7288 }
7289 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7290 return pf->rss_size;
7291 }
7292
7293 /**
7294 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7295 * @pf: board private structure
7296 **/
7297 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7298 {
7299 i40e_status status;
7300 bool min_valid, max_valid;
7301 u32 max_bw, min_bw;
7302
7303 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7304 &min_valid, &max_valid);
7305
7306 if (!status) {
7307 if (min_valid)
7308 pf->npar_min_bw = min_bw;
7309 if (max_valid)
7310 pf->npar_max_bw = max_bw;
7311 }
7312
7313 return status;
7314 }
7315
7316 /**
7317 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7318 * @pf: board private structure
7319 **/
7320 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7321 {
7322 struct i40e_aqc_configure_partition_bw_data bw_data;
7323 i40e_status status;
7324
7325 /* Set the valid bit for this pf */
7326 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id);
7327 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7328 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7329
7330 /* Set the new bandwidths */
7331 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7332
7333 return status;
7334 }
7335
7336 /**
7337 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7338 * @pf: board private structure
7339 **/
7340 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7341 {
7342 /* Commit temporary BW setting to permanent NVM image */
7343 enum i40e_admin_queue_err last_aq_status;
7344 i40e_status ret;
7345 u16 nvm_word;
7346
7347 if (pf->hw.partition_id != 1) {
7348 dev_info(&pf->pdev->dev,
7349 "Commit BW only works on partition 1! This is partition %d",
7350 pf->hw.partition_id);
7351 ret = I40E_NOT_SUPPORTED;
7352 goto bw_commit_out;
7353 }
7354
7355 /* Acquire NVM for read access */
7356 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7357 last_aq_status = pf->hw.aq.asq_last_status;
7358 if (ret) {
7359 dev_info(&pf->pdev->dev,
7360 "Cannot acquire NVM for read access, err %d: aq_err %d\n",
7361 ret, last_aq_status);
7362 goto bw_commit_out;
7363 }
7364
7365 /* Read word 0x10 of NVM - SW compatibility word 1 */
7366 ret = i40e_aq_read_nvm(&pf->hw,
7367 I40E_SR_NVM_CONTROL_WORD,
7368 0x10, sizeof(nvm_word), &nvm_word,
7369 false, NULL);
7370 /* Save off last admin queue command status before releasing
7371 * the NVM
7372 */
7373 last_aq_status = pf->hw.aq.asq_last_status;
7374 i40e_release_nvm(&pf->hw);
7375 if (ret) {
7376 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n",
7377 ret, last_aq_status);
7378 goto bw_commit_out;
7379 }
7380
7381 /* Wait a bit for NVM release to complete */
7382 msleep(50);
7383
7384 /* Acquire NVM for write access */
7385 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7386 last_aq_status = pf->hw.aq.asq_last_status;
7387 if (ret) {
7388 dev_info(&pf->pdev->dev,
7389 "Cannot acquire NVM for write access, err %d: aq_err %d\n",
7390 ret, last_aq_status);
7391 goto bw_commit_out;
7392 }
7393 /* Write it back out unchanged to initiate update NVM,
7394 * which will force a write of the shadow (alt) RAM to
7395 * the NVM - thus storing the bandwidth values permanently.
7396 */
7397 ret = i40e_aq_update_nvm(&pf->hw,
7398 I40E_SR_NVM_CONTROL_WORD,
7399 0x10, sizeof(nvm_word),
7400 &nvm_word, true, NULL);
7401 /* Save off last admin queue command status before releasing
7402 * the NVM
7403 */
7404 last_aq_status = pf->hw.aq.asq_last_status;
7405 i40e_release_nvm(&pf->hw);
7406 if (ret)
7407 dev_info(&pf->pdev->dev,
7408 "BW settings NOT SAVED, err %d aq_err %d\n",
7409 ret, last_aq_status);
7410 bw_commit_out:
7411
7412 return ret;
7413 }
7414
7415 /**
7416 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7417 * @pf: board private structure to initialize
7418 *
7419 * i40e_sw_init initializes the Adapter private data structure.
7420 * Fields are initialized based on PCI device information and
7421 * OS network device settings (MTU size).
7422 **/
7423 static int i40e_sw_init(struct i40e_pf *pf)
7424 {
7425 int err = 0;
7426 int size;
7427
7428 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7429 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7430 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7431 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7432 if (I40E_DEBUG_USER & debug)
7433 pf->hw.debug_mask = debug;
7434 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7435 I40E_DEFAULT_MSG_ENABLE);
7436 }
7437
7438 /* Set default capability flags */
7439 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7440 I40E_FLAG_MSI_ENABLED |
7441 I40E_FLAG_MSIX_ENABLED;
7442
7443 if (iommu_present(&pci_bus_type))
7444 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7445 else
7446 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7447
7448 /* Set default ITR */
7449 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7450 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7451
7452 /* Depending on PF configurations, it is possible that the RSS
7453 * maximum might end up larger than the available queues
7454 */
7455 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7456 pf->rss_size = 1;
7457 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7458 pf->rss_size_max = min_t(int, pf->rss_size_max,
7459 pf->hw.func_caps.num_tx_qp);
7460 if (pf->hw.func_caps.rss) {
7461 pf->flags |= I40E_FLAG_RSS_ENABLED;
7462 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7463 }
7464
7465 /* MFP mode enabled */
7466 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
7467 pf->flags |= I40E_FLAG_MFP_ENABLED;
7468 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7469 if (i40e_get_npar_bw_setting(pf))
7470 dev_warn(&pf->pdev->dev,
7471 "Could not get NPAR bw settings\n");
7472 else
7473 dev_info(&pf->pdev->dev,
7474 "Min BW = %8.8x, Max BW = %8.8x\n",
7475 pf->npar_min_bw, pf->npar_max_bw);
7476 }
7477
7478 /* FW/NVM is not yet fixed in this regard */
7479 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7480 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7481 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7482 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7483 /* Setup a counter for fd_atr per pf */
7484 pf->fd_atr_cnt_idx = I40E_FD_ATR_STAT_IDX(pf->hw.pf_id);
7485 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7486 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7487 /* Setup a counter for fd_sb per pf */
7488 pf->fd_sb_cnt_idx = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
7489 } else {
7490 dev_info(&pf->pdev->dev,
7491 "Flow Director Sideband mode Disabled in MFP mode\n");
7492 }
7493 pf->fdir_pf_filter_count =
7494 pf->hw.func_caps.fd_filters_guaranteed;
7495 pf->hw.fdir_shared_filter_count =
7496 pf->hw.func_caps.fd_filters_best_effort;
7497 }
7498
7499 if (pf->hw.func_caps.vmdq) {
7500 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7501 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7502 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7503 }
7504
7505 #ifdef I40E_FCOE
7506 err = i40e_init_pf_fcoe(pf);
7507 if (err)
7508 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7509
7510 #endif /* I40E_FCOE */
7511 #ifdef CONFIG_PCI_IOV
7512 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7513 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7514 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7515 pf->num_req_vfs = min_t(int,
7516 pf->hw.func_caps.num_vfs,
7517 I40E_MAX_VF_COUNT);
7518 }
7519 #endif /* CONFIG_PCI_IOV */
7520 pf->eeprom_version = 0xDEAD;
7521 pf->lan_veb = I40E_NO_VEB;
7522 pf->lan_vsi = I40E_NO_VSI;
7523
7524 /* set up queue assignment tracking */
7525 size = sizeof(struct i40e_lump_tracking)
7526 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7527 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7528 if (!pf->qp_pile) {
7529 err = -ENOMEM;
7530 goto sw_init_done;
7531 }
7532 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7533 pf->qp_pile->search_hint = 0;
7534
7535 /* set up vector assignment tracking */
7536 size = sizeof(struct i40e_lump_tracking)
7537 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
7538 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7539 if (!pf->irq_pile) {
7540 kfree(pf->qp_pile);
7541 err = -ENOMEM;
7542 goto sw_init_done;
7543 }
7544 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
7545 pf->irq_pile->search_hint = 0;
7546
7547 pf->tx_timeout_recovery_level = 1;
7548
7549 mutex_init(&pf->switch_mutex);
7550
7551 sw_init_done:
7552 return err;
7553 }
7554
7555 /**
7556 * i40e_set_ntuple - set the ntuple feature flag and take action
7557 * @pf: board private structure to initialize
7558 * @features: the feature set that the stack is suggesting
7559 *
7560 * returns a bool to indicate if reset needs to happen
7561 **/
7562 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7563 {
7564 bool need_reset = false;
7565
7566 /* Check if Flow Director n-tuple support was enabled or disabled. If
7567 * the state changed, we need to reset.
7568 */
7569 if (features & NETIF_F_NTUPLE) {
7570 /* Enable filters and mark for reset */
7571 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7572 need_reset = true;
7573 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7574 } else {
7575 /* turn off filters, mark for reset and clear SW filter list */
7576 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7577 need_reset = true;
7578 i40e_fdir_filter_exit(pf);
7579 }
7580 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7581 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7582 /* reset fd counters */
7583 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7584 pf->fdir_pf_active_filters = 0;
7585 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7586 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7587 /* if ATR was auto disabled it can be re-enabled. */
7588 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7589 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7590 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7591 }
7592 return need_reset;
7593 }
7594
7595 /**
7596 * i40e_set_features - set the netdev feature flags
7597 * @netdev: ptr to the netdev being adjusted
7598 * @features: the feature set that the stack is suggesting
7599 **/
7600 static int i40e_set_features(struct net_device *netdev,
7601 netdev_features_t features)
7602 {
7603 struct i40e_netdev_priv *np = netdev_priv(netdev);
7604 struct i40e_vsi *vsi = np->vsi;
7605 struct i40e_pf *pf = vsi->back;
7606 bool need_reset;
7607
7608 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7609 i40e_vlan_stripping_enable(vsi);
7610 else
7611 i40e_vlan_stripping_disable(vsi);
7612
7613 need_reset = i40e_set_ntuple(pf, features);
7614
7615 if (need_reset)
7616 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7617
7618 return 0;
7619 }
7620
7621 #ifdef CONFIG_I40E_VXLAN
7622 /**
7623 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7624 * @pf: board private structure
7625 * @port: The UDP port to look up
7626 *
7627 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7628 **/
7629 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7630 {
7631 u8 i;
7632
7633 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7634 if (pf->vxlan_ports[i] == port)
7635 return i;
7636 }
7637
7638 return i;
7639 }
7640
7641 /**
7642 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7643 * @netdev: This physical port's netdev
7644 * @sa_family: Socket Family that VXLAN is notifying us about
7645 * @port: New UDP port number that VXLAN started listening to
7646 **/
7647 static void i40e_add_vxlan_port(struct net_device *netdev,
7648 sa_family_t sa_family, __be16 port)
7649 {
7650 struct i40e_netdev_priv *np = netdev_priv(netdev);
7651 struct i40e_vsi *vsi = np->vsi;
7652 struct i40e_pf *pf = vsi->back;
7653 u8 next_idx;
7654 u8 idx;
7655
7656 if (sa_family == AF_INET6)
7657 return;
7658
7659 idx = i40e_get_vxlan_port_idx(pf, port);
7660
7661 /* Check if port already exists */
7662 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7663 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
7664 return;
7665 }
7666
7667 /* Now check if there is space to add the new port */
7668 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7669
7670 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7671 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
7672 ntohs(port));
7673 return;
7674 }
7675
7676 /* New port: add it and mark its index in the bitmap */
7677 pf->vxlan_ports[next_idx] = port;
7678 pf->pending_vxlan_bitmap |= (1 << next_idx);
7679
7680 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7681 }
7682
7683 /**
7684 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7685 * @netdev: This physical port's netdev
7686 * @sa_family: Socket Family that VXLAN is notifying us about
7687 * @port: UDP port number that VXLAN stopped listening to
7688 **/
7689 static void i40e_del_vxlan_port(struct net_device *netdev,
7690 sa_family_t sa_family, __be16 port)
7691 {
7692 struct i40e_netdev_priv *np = netdev_priv(netdev);
7693 struct i40e_vsi *vsi = np->vsi;
7694 struct i40e_pf *pf = vsi->back;
7695 u8 idx;
7696
7697 if (sa_family == AF_INET6)
7698 return;
7699
7700 idx = i40e_get_vxlan_port_idx(pf, port);
7701
7702 /* Check if port already exists */
7703 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7704 /* if port exists, set it to 0 (mark for deletion)
7705 * and make it pending
7706 */
7707 pf->vxlan_ports[idx] = 0;
7708
7709 pf->pending_vxlan_bitmap |= (1 << idx);
7710
7711 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7712 } else {
7713 netdev_warn(netdev, "Port %d was not found, not deleting\n",
7714 ntohs(port));
7715 }
7716 }
7717
7718 #endif
7719 static int i40e_get_phys_port_id(struct net_device *netdev,
7720 struct netdev_phys_item_id *ppid)
7721 {
7722 struct i40e_netdev_priv *np = netdev_priv(netdev);
7723 struct i40e_pf *pf = np->vsi->back;
7724 struct i40e_hw *hw = &pf->hw;
7725
7726 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7727 return -EOPNOTSUPP;
7728
7729 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7730 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7731
7732 return 0;
7733 }
7734
7735 /**
7736 * i40e_ndo_fdb_add - add an entry to the hardware database
7737 * @ndm: the input from the stack
7738 * @tb: pointer to array of nladdr (unused)
7739 * @dev: the net device pointer
7740 * @addr: the MAC address entry being added
7741 * @flags: instructions from stack about fdb operation
7742 */
7743 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7744 struct net_device *dev,
7745 const unsigned char *addr, u16 vid,
7746 u16 flags)
7747 {
7748 struct i40e_netdev_priv *np = netdev_priv(dev);
7749 struct i40e_pf *pf = np->vsi->back;
7750 int err = 0;
7751
7752 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7753 return -EOPNOTSUPP;
7754
7755 if (vid) {
7756 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
7757 return -EINVAL;
7758 }
7759
7760 /* Hardware does not support aging addresses so if a
7761 * ndm_state is given only allow permanent addresses
7762 */
7763 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7764 netdev_info(dev, "FDB only supports static addresses\n");
7765 return -EINVAL;
7766 }
7767
7768 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7769 err = dev_uc_add_excl(dev, addr);
7770 else if (is_multicast_ether_addr(addr))
7771 err = dev_mc_add_excl(dev, addr);
7772 else
7773 err = -EINVAL;
7774
7775 /* Only return duplicate errors if NLM_F_EXCL is set */
7776 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7777 err = 0;
7778
7779 return err;
7780 }
7781
7782 #ifdef HAVE_BRIDGE_ATTRIBS
7783 /**
7784 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
7785 * @dev: the netdev being configured
7786 * @nlh: RTNL message
7787 *
7788 * Inserts a new hardware bridge if not already created and
7789 * enables the bridging mode requested (VEB or VEPA). If the
7790 * hardware bridge has already been inserted and the request
7791 * is to change the mode then that requires a PF reset to
7792 * allow rebuild of the components with required hardware
7793 * bridge mode enabled.
7794 **/
7795 static int i40e_ndo_bridge_setlink(struct net_device *dev,
7796 struct nlmsghdr *nlh)
7797 {
7798 struct i40e_netdev_priv *np = netdev_priv(dev);
7799 struct i40e_vsi *vsi = np->vsi;
7800 struct i40e_pf *pf = vsi->back;
7801 struct i40e_veb *veb = NULL;
7802 struct nlattr *attr, *br_spec;
7803 int i, rem;
7804
7805 /* Only for PF VSI for now */
7806 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7807 return -EOPNOTSUPP;
7808
7809 /* Find the HW bridge for PF VSI */
7810 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7811 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7812 veb = pf->veb[i];
7813 }
7814
7815 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7816
7817 nla_for_each_nested(attr, br_spec, rem) {
7818 __u16 mode;
7819
7820 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7821 continue;
7822
7823 mode = nla_get_u16(attr);
7824 if ((mode != BRIDGE_MODE_VEPA) &&
7825 (mode != BRIDGE_MODE_VEB))
7826 return -EINVAL;
7827
7828 /* Insert a new HW bridge */
7829 if (!veb) {
7830 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7831 vsi->tc_config.enabled_tc);
7832 if (veb) {
7833 veb->bridge_mode = mode;
7834 i40e_config_bridge_mode(veb);
7835 } else {
7836 /* No Bridge HW offload available */
7837 return -ENOENT;
7838 }
7839 break;
7840 } else if (mode != veb->bridge_mode) {
7841 /* Existing HW bridge but different mode needs reset */
7842 veb->bridge_mode = mode;
7843 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7844 break;
7845 }
7846 }
7847
7848 return 0;
7849 }
7850
7851 /**
7852 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
7853 * @skb: skb buff
7854 * @pid: process id
7855 * @seq: RTNL message seq #
7856 * @dev: the netdev being configured
7857 * @filter_mask: unused
7858 *
7859 * Return the mode in which the hardware bridge is operating in
7860 * i.e VEB or VEPA.
7861 **/
7862 #ifdef HAVE_BRIDGE_FILTER
7863 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7864 struct net_device *dev,
7865 u32 __always_unused filter_mask)
7866 #else
7867 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7868 struct net_device *dev)
7869 #endif /* HAVE_BRIDGE_FILTER */
7870 {
7871 struct i40e_netdev_priv *np = netdev_priv(dev);
7872 struct i40e_vsi *vsi = np->vsi;
7873 struct i40e_pf *pf = vsi->back;
7874 struct i40e_veb *veb = NULL;
7875 int i;
7876
7877 /* Only for PF VSI for now */
7878 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
7879 return -EOPNOTSUPP;
7880
7881 /* Find the HW bridge for the PF VSI */
7882 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7883 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7884 veb = pf->veb[i];
7885 }
7886
7887 if (!veb)
7888 return 0;
7889
7890 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode);
7891 }
7892 #endif /* HAVE_BRIDGE_ATTRIBS */
7893
7894 const struct net_device_ops i40e_netdev_ops = {
7895 .ndo_open = i40e_open,
7896 .ndo_stop = i40e_close,
7897 .ndo_start_xmit = i40e_lan_xmit_frame,
7898 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
7899 .ndo_set_rx_mode = i40e_set_rx_mode,
7900 .ndo_validate_addr = eth_validate_addr,
7901 .ndo_set_mac_address = i40e_set_mac,
7902 .ndo_change_mtu = i40e_change_mtu,
7903 .ndo_do_ioctl = i40e_ioctl,
7904 .ndo_tx_timeout = i40e_tx_timeout,
7905 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
7906 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
7907 #ifdef CONFIG_NET_POLL_CONTROLLER
7908 .ndo_poll_controller = i40e_netpoll,
7909 #endif
7910 .ndo_setup_tc = i40e_setup_tc,
7911 #ifdef I40E_FCOE
7912 .ndo_fcoe_enable = i40e_fcoe_enable,
7913 .ndo_fcoe_disable = i40e_fcoe_disable,
7914 #endif
7915 .ndo_set_features = i40e_set_features,
7916 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
7917 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
7918 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
7919 .ndo_get_vf_config = i40e_ndo_get_vf_config,
7920 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
7921 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
7922 #ifdef CONFIG_I40E_VXLAN
7923 .ndo_add_vxlan_port = i40e_add_vxlan_port,
7924 .ndo_del_vxlan_port = i40e_del_vxlan_port,
7925 #endif
7926 .ndo_get_phys_port_id = i40e_get_phys_port_id,
7927 .ndo_fdb_add = i40e_ndo_fdb_add,
7928 #ifdef HAVE_BRIDGE_ATTRIBS
7929 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
7930 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
7931 #endif /* HAVE_BRIDGE_ATTRIBS */
7932 };
7933
7934 /**
7935 * i40e_config_netdev - Setup the netdev flags
7936 * @vsi: the VSI being configured
7937 *
7938 * Returns 0 on success, negative value on failure
7939 **/
7940 static int i40e_config_netdev(struct i40e_vsi *vsi)
7941 {
7942 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
7943 struct i40e_pf *pf = vsi->back;
7944 struct i40e_hw *hw = &pf->hw;
7945 struct i40e_netdev_priv *np;
7946 struct net_device *netdev;
7947 u8 mac_addr[ETH_ALEN];
7948 int etherdev_size;
7949
7950 etherdev_size = sizeof(struct i40e_netdev_priv);
7951 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
7952 if (!netdev)
7953 return -ENOMEM;
7954
7955 vsi->netdev = netdev;
7956 np = netdev_priv(netdev);
7957 np->vsi = vsi;
7958
7959 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
7960 NETIF_F_GSO_UDP_TUNNEL |
7961 NETIF_F_TSO;
7962
7963 netdev->features = NETIF_F_SG |
7964 NETIF_F_IP_CSUM |
7965 NETIF_F_SCTP_CSUM |
7966 NETIF_F_HIGHDMA |
7967 NETIF_F_GSO_UDP_TUNNEL |
7968 NETIF_F_HW_VLAN_CTAG_TX |
7969 NETIF_F_HW_VLAN_CTAG_RX |
7970 NETIF_F_HW_VLAN_CTAG_FILTER |
7971 NETIF_F_IPV6_CSUM |
7972 NETIF_F_TSO |
7973 NETIF_F_TSO_ECN |
7974 NETIF_F_TSO6 |
7975 NETIF_F_RXCSUM |
7976 NETIF_F_RXHASH |
7977 0;
7978
7979 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
7980 netdev->features |= NETIF_F_NTUPLE;
7981
7982 /* copy netdev features into list of user selectable features */
7983 netdev->hw_features |= netdev->features;
7984
7985 if (vsi->type == I40E_VSI_MAIN) {
7986 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
7987 ether_addr_copy(mac_addr, hw->mac.perm_addr);
7988 /* The following steps are necessary to prevent reception
7989 * of tagged packets - some older NVM configurations load a
7990 * default a MAC-VLAN filter that accepts any tagged packet
7991 * which must be replaced by a normal filter.
7992 */
7993 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
7994 i40e_add_filter(vsi, mac_addr,
7995 I40E_VLAN_ANY, false, true);
7996 } else {
7997 /* relate the VSI_VMDQ name to the VSI_MAIN name */
7998 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
7999 pf->vsi[pf->lan_vsi]->netdev->name);
8000 random_ether_addr(mac_addr);
8001 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8002 }
8003 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8004
8005 ether_addr_copy(netdev->dev_addr, mac_addr);
8006 ether_addr_copy(netdev->perm_addr, mac_addr);
8007 /* vlan gets same features (except vlan offload)
8008 * after any tweaks for specific VSI types
8009 */
8010 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8011 NETIF_F_HW_VLAN_CTAG_RX |
8012 NETIF_F_HW_VLAN_CTAG_FILTER);
8013 netdev->priv_flags |= IFF_UNICAST_FLT;
8014 netdev->priv_flags |= IFF_SUPP_NOFCS;
8015 /* Setup netdev TC information */
8016 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8017
8018 netdev->netdev_ops = &i40e_netdev_ops;
8019 netdev->watchdog_timeo = 5 * HZ;
8020 i40e_set_ethtool_ops(netdev);
8021 #ifdef I40E_FCOE
8022 i40e_fcoe_config_netdev(netdev, vsi);
8023 #endif
8024
8025 return 0;
8026 }
8027
8028 /**
8029 * i40e_vsi_delete - Delete a VSI from the switch
8030 * @vsi: the VSI being removed
8031 *
8032 * Returns 0 on success, negative value on failure
8033 **/
8034 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8035 {
8036 /* remove default VSI is not allowed */
8037 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8038 return;
8039
8040 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8041 }
8042
8043 /**
8044 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8045 * @vsi: the VSI being queried
8046 *
8047 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8048 **/
8049 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8050 {
8051 struct i40e_veb *veb;
8052 struct i40e_pf *pf = vsi->back;
8053
8054 /* Uplink is not a bridge so default to VEB */
8055 if (vsi->veb_idx == I40E_NO_VEB)
8056 return 1;
8057
8058 veb = pf->veb[vsi->veb_idx];
8059 /* Uplink is a bridge in VEPA mode */
8060 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8061 return 0;
8062
8063 /* Uplink is a bridge in VEB mode */
8064 return 1;
8065 }
8066
8067 /**
8068 * i40e_add_vsi - Add a VSI to the switch
8069 * @vsi: the VSI being configured
8070 *
8071 * This initializes a VSI context depending on the VSI type to be added and
8072 * passes it down to the add_vsi aq command.
8073 **/
8074 static int i40e_add_vsi(struct i40e_vsi *vsi)
8075 {
8076 int ret = -ENODEV;
8077 struct i40e_mac_filter *f, *ftmp;
8078 struct i40e_pf *pf = vsi->back;
8079 struct i40e_hw *hw = &pf->hw;
8080 struct i40e_vsi_context ctxt;
8081 u8 enabled_tc = 0x1; /* TC0 enabled */
8082 int f_count = 0;
8083
8084 memset(&ctxt, 0, sizeof(ctxt));
8085 switch (vsi->type) {
8086 case I40E_VSI_MAIN:
8087 /* The PF's main VSI is already setup as part of the
8088 * device initialization, so we'll not bother with
8089 * the add_vsi call, but we will retrieve the current
8090 * VSI context.
8091 */
8092 ctxt.seid = pf->main_vsi_seid;
8093 ctxt.pf_num = pf->hw.pf_id;
8094 ctxt.vf_num = 0;
8095 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8096 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8097 if (ret) {
8098 dev_info(&pf->pdev->dev,
8099 "couldn't get pf vsi config, err %d, aq_err %d\n",
8100 ret, pf->hw.aq.asq_last_status);
8101 return -ENOENT;
8102 }
8103 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8104 vsi->info.valid_sections = 0;
8105
8106 vsi->seid = ctxt.seid;
8107 vsi->id = ctxt.vsi_number;
8108
8109 enabled_tc = i40e_pf_get_tc_map(pf);
8110
8111 /* MFP mode setup queue map and update VSI */
8112 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8113 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8114 memset(&ctxt, 0, sizeof(ctxt));
8115 ctxt.seid = pf->main_vsi_seid;
8116 ctxt.pf_num = pf->hw.pf_id;
8117 ctxt.vf_num = 0;
8118 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8119 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8120 if (ret) {
8121 dev_info(&pf->pdev->dev,
8122 "update vsi failed, aq_err=%d\n",
8123 pf->hw.aq.asq_last_status);
8124 ret = -ENOENT;
8125 goto err;
8126 }
8127 /* update the local VSI info queue map */
8128 i40e_vsi_update_queue_map(vsi, &ctxt);
8129 vsi->info.valid_sections = 0;
8130 } else {
8131 /* Default/Main VSI is only enabled for TC0
8132 * reconfigure it to enable all TCs that are
8133 * available on the port in SFP mode.
8134 * For MFP case the iSCSI PF would use this
8135 * flow to enable LAN+iSCSI TC.
8136 */
8137 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8138 if (ret) {
8139 dev_info(&pf->pdev->dev,
8140 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
8141 enabled_tc, ret,
8142 pf->hw.aq.asq_last_status);
8143 ret = -ENOENT;
8144 }
8145 }
8146 break;
8147
8148 case I40E_VSI_FDIR:
8149 ctxt.pf_num = hw->pf_id;
8150 ctxt.vf_num = 0;
8151 ctxt.uplink_seid = vsi->uplink_seid;
8152 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8153 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8154 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8155 ctxt.info.valid_sections |=
8156 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8157 ctxt.info.switch_id =
8158 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8159 }
8160 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8161 break;
8162
8163 case I40E_VSI_VMDQ2:
8164 ctxt.pf_num = hw->pf_id;
8165 ctxt.vf_num = 0;
8166 ctxt.uplink_seid = vsi->uplink_seid;
8167 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8168 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8169
8170 /* This VSI is connected to VEB so the switch_id
8171 * should be set to zero by default.
8172 */
8173 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8174 ctxt.info.valid_sections |=
8175 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8176 ctxt.info.switch_id =
8177 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8178 }
8179
8180 /* Setup the VSI tx/rx queue map for TC0 only for now */
8181 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8182 break;
8183
8184 case I40E_VSI_SRIOV:
8185 ctxt.pf_num = hw->pf_id;
8186 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8187 ctxt.uplink_seid = vsi->uplink_seid;
8188 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8189 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8190
8191 /* This VSI is connected to VEB so the switch_id
8192 * should be set to zero by default.
8193 */
8194 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8195 ctxt.info.valid_sections |=
8196 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8197 ctxt.info.switch_id =
8198 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8199 }
8200
8201 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8202 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8203 if (pf->vf[vsi->vf_id].spoofchk) {
8204 ctxt.info.valid_sections |=
8205 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8206 ctxt.info.sec_flags |=
8207 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8208 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8209 }
8210 /* Setup the VSI tx/rx queue map for TC0 only for now */
8211 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8212 break;
8213
8214 #ifdef I40E_FCOE
8215 case I40E_VSI_FCOE:
8216 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8217 if (ret) {
8218 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8219 return ret;
8220 }
8221 break;
8222
8223 #endif /* I40E_FCOE */
8224 default:
8225 return -ENODEV;
8226 }
8227
8228 if (vsi->type != I40E_VSI_MAIN) {
8229 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8230 if (ret) {
8231 dev_info(&vsi->back->pdev->dev,
8232 "add vsi failed, aq_err=%d\n",
8233 vsi->back->hw.aq.asq_last_status);
8234 ret = -ENOENT;
8235 goto err;
8236 }
8237 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
8238 vsi->info.valid_sections = 0;
8239 vsi->seid = ctxt.seid;
8240 vsi->id = ctxt.vsi_number;
8241 }
8242
8243 /* If macvlan filters already exist, force them to get loaded */
8244 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8245 f->changed = true;
8246 f_count++;
8247
8248 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8249 struct i40e_aqc_remove_macvlan_element_data element;
8250
8251 memset(&element, 0, sizeof(element));
8252 ether_addr_copy(element.mac_addr, f->macaddr);
8253 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8254 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8255 &element, 1, NULL);
8256 if (ret) {
8257 /* some older FW has a different default */
8258 element.flags |=
8259 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8260 i40e_aq_remove_macvlan(hw, vsi->seid,
8261 &element, 1, NULL);
8262 }
8263
8264 i40e_aq_mac_address_write(hw,
8265 I40E_AQC_WRITE_TYPE_LAA_WOL,
8266 f->macaddr, NULL);
8267 }
8268 }
8269 if (f_count) {
8270 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8271 pf->flags |= I40E_FLAG_FILTER_SYNC;
8272 }
8273
8274 /* Update VSI BW information */
8275 ret = i40e_vsi_get_bw_info(vsi);
8276 if (ret) {
8277 dev_info(&pf->pdev->dev,
8278 "couldn't get vsi bw info, err %d, aq_err %d\n",
8279 ret, pf->hw.aq.asq_last_status);
8280 /* VSI is already added so not tearing that up */
8281 ret = 0;
8282 }
8283
8284 err:
8285 return ret;
8286 }
8287
8288 /**
8289 * i40e_vsi_release - Delete a VSI and free its resources
8290 * @vsi: the VSI being removed
8291 *
8292 * Returns 0 on success or < 0 on error
8293 **/
8294 int i40e_vsi_release(struct i40e_vsi *vsi)
8295 {
8296 struct i40e_mac_filter *f, *ftmp;
8297 struct i40e_veb *veb = NULL;
8298 struct i40e_pf *pf;
8299 u16 uplink_seid;
8300 int i, n;
8301
8302 pf = vsi->back;
8303
8304 /* release of a VEB-owner or last VSI is not allowed */
8305 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8306 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8307 vsi->seid, vsi->uplink_seid);
8308 return -ENODEV;
8309 }
8310 if (vsi == pf->vsi[pf->lan_vsi] &&
8311 !test_bit(__I40E_DOWN, &pf->state)) {
8312 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8313 return -ENODEV;
8314 }
8315
8316 uplink_seid = vsi->uplink_seid;
8317 if (vsi->type != I40E_VSI_SRIOV) {
8318 if (vsi->netdev_registered) {
8319 vsi->netdev_registered = false;
8320 if (vsi->netdev) {
8321 /* results in a call to i40e_close() */
8322 unregister_netdev(vsi->netdev);
8323 }
8324 } else {
8325 i40e_vsi_close(vsi);
8326 }
8327 i40e_vsi_disable_irq(vsi);
8328 }
8329
8330 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8331 i40e_del_filter(vsi, f->macaddr, f->vlan,
8332 f->is_vf, f->is_netdev);
8333 i40e_sync_vsi_filters(vsi);
8334
8335 i40e_vsi_delete(vsi);
8336 i40e_vsi_free_q_vectors(vsi);
8337 if (vsi->netdev) {
8338 free_netdev(vsi->netdev);
8339 vsi->netdev = NULL;
8340 }
8341 i40e_vsi_clear_rings(vsi);
8342 i40e_vsi_clear(vsi);
8343
8344 /* If this was the last thing on the VEB, except for the
8345 * controlling VSI, remove the VEB, which puts the controlling
8346 * VSI onto the next level down in the switch.
8347 *
8348 * Well, okay, there's one more exception here: don't remove
8349 * the orphan VEBs yet. We'll wait for an explicit remove request
8350 * from up the network stack.
8351 */
8352 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8353 if (pf->vsi[i] &&
8354 pf->vsi[i]->uplink_seid == uplink_seid &&
8355 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8356 n++; /* count the VSIs */
8357 }
8358 }
8359 for (i = 0; i < I40E_MAX_VEB; i++) {
8360 if (!pf->veb[i])
8361 continue;
8362 if (pf->veb[i]->uplink_seid == uplink_seid)
8363 n++; /* count the VEBs */
8364 if (pf->veb[i]->seid == uplink_seid)
8365 veb = pf->veb[i];
8366 }
8367 if (n == 0 && veb && veb->uplink_seid != 0)
8368 i40e_veb_release(veb);
8369
8370 return 0;
8371 }
8372
8373 /**
8374 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8375 * @vsi: ptr to the VSI
8376 *
8377 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8378 * corresponding SW VSI structure and initializes num_queue_pairs for the
8379 * newly allocated VSI.
8380 *
8381 * Returns 0 on success or negative on failure
8382 **/
8383 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8384 {
8385 int ret = -ENOENT;
8386 struct i40e_pf *pf = vsi->back;
8387
8388 if (vsi->q_vectors[0]) {
8389 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8390 vsi->seid);
8391 return -EEXIST;
8392 }
8393
8394 if (vsi->base_vector) {
8395 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8396 vsi->seid, vsi->base_vector);
8397 return -EEXIST;
8398 }
8399
8400 ret = i40e_vsi_alloc_q_vectors(vsi);
8401 if (ret) {
8402 dev_info(&pf->pdev->dev,
8403 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8404 vsi->num_q_vectors, vsi->seid, ret);
8405 vsi->num_q_vectors = 0;
8406 goto vector_setup_out;
8407 }
8408
8409 if (vsi->num_q_vectors)
8410 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8411 vsi->num_q_vectors, vsi->idx);
8412 if (vsi->base_vector < 0) {
8413 dev_info(&pf->pdev->dev,
8414 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8415 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8416 i40e_vsi_free_q_vectors(vsi);
8417 ret = -ENOENT;
8418 goto vector_setup_out;
8419 }
8420
8421 vector_setup_out:
8422 return ret;
8423 }
8424
8425 /**
8426 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8427 * @vsi: pointer to the vsi.
8428 *
8429 * This re-allocates a vsi's queue resources.
8430 *
8431 * Returns pointer to the successfully allocated and configured VSI sw struct
8432 * on success, otherwise returns NULL on failure.
8433 **/
8434 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8435 {
8436 struct i40e_pf *pf = vsi->back;
8437 u8 enabled_tc;
8438 int ret;
8439
8440 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8441 i40e_vsi_clear_rings(vsi);
8442
8443 i40e_vsi_free_arrays(vsi, false);
8444 i40e_set_num_rings_in_vsi(vsi);
8445 ret = i40e_vsi_alloc_arrays(vsi, false);
8446 if (ret)
8447 goto err_vsi;
8448
8449 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8450 if (ret < 0) {
8451 dev_info(&pf->pdev->dev,
8452 "failed to get tracking for %d queues for VSI %d err=%d\n",
8453 vsi->alloc_queue_pairs, vsi->seid, ret);
8454 goto err_vsi;
8455 }
8456 vsi->base_queue = ret;
8457
8458 /* Update the FW view of the VSI. Force a reset of TC and queue
8459 * layout configurations.
8460 */
8461 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8462 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8463 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8464 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8465
8466 /* assign it some queues */
8467 ret = i40e_alloc_rings(vsi);
8468 if (ret)
8469 goto err_rings;
8470
8471 /* map all of the rings to the q_vectors */
8472 i40e_vsi_map_rings_to_vectors(vsi);
8473 return vsi;
8474
8475 err_rings:
8476 i40e_vsi_free_q_vectors(vsi);
8477 if (vsi->netdev_registered) {
8478 vsi->netdev_registered = false;
8479 unregister_netdev(vsi->netdev);
8480 free_netdev(vsi->netdev);
8481 vsi->netdev = NULL;
8482 }
8483 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8484 err_vsi:
8485 i40e_vsi_clear(vsi);
8486 return NULL;
8487 }
8488
8489 /**
8490 * i40e_vsi_setup - Set up a VSI by a given type
8491 * @pf: board private structure
8492 * @type: VSI type
8493 * @uplink_seid: the switch element to link to
8494 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8495 *
8496 * This allocates the sw VSI structure and its queue resources, then add a VSI
8497 * to the identified VEB.
8498 *
8499 * Returns pointer to the successfully allocated and configure VSI sw struct on
8500 * success, otherwise returns NULL on failure.
8501 **/
8502 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8503 u16 uplink_seid, u32 param1)
8504 {
8505 struct i40e_vsi *vsi = NULL;
8506 struct i40e_veb *veb = NULL;
8507 int ret, i;
8508 int v_idx;
8509
8510 /* The requested uplink_seid must be either
8511 * - the PF's port seid
8512 * no VEB is needed because this is the PF
8513 * or this is a Flow Director special case VSI
8514 * - seid of an existing VEB
8515 * - seid of a VSI that owns an existing VEB
8516 * - seid of a VSI that doesn't own a VEB
8517 * a new VEB is created and the VSI becomes the owner
8518 * - seid of the PF VSI, which is what creates the first VEB
8519 * this is a special case of the previous
8520 *
8521 * Find which uplink_seid we were given and create a new VEB if needed
8522 */
8523 for (i = 0; i < I40E_MAX_VEB; i++) {
8524 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8525 veb = pf->veb[i];
8526 break;
8527 }
8528 }
8529
8530 if (!veb && uplink_seid != pf->mac_seid) {
8531
8532 for (i = 0; i < pf->num_alloc_vsi; i++) {
8533 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8534 vsi = pf->vsi[i];
8535 break;
8536 }
8537 }
8538 if (!vsi) {
8539 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8540 uplink_seid);
8541 return NULL;
8542 }
8543
8544 if (vsi->uplink_seid == pf->mac_seid)
8545 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8546 vsi->tc_config.enabled_tc);
8547 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8548 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8549 vsi->tc_config.enabled_tc);
8550 if (veb) {
8551 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8552 dev_info(&vsi->back->pdev->dev,
8553 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8554 __func__);
8555 return NULL;
8556 }
8557 i40e_config_bridge_mode(veb);
8558 }
8559 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8560 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8561 veb = pf->veb[i];
8562 }
8563 if (!veb) {
8564 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8565 return NULL;
8566 }
8567
8568 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8569 uplink_seid = veb->seid;
8570 }
8571
8572 /* get vsi sw struct */
8573 v_idx = i40e_vsi_mem_alloc(pf, type);
8574 if (v_idx < 0)
8575 goto err_alloc;
8576 vsi = pf->vsi[v_idx];
8577 if (!vsi)
8578 goto err_alloc;
8579 vsi->type = type;
8580 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8581
8582 if (type == I40E_VSI_MAIN)
8583 pf->lan_vsi = v_idx;
8584 else if (type == I40E_VSI_SRIOV)
8585 vsi->vf_id = param1;
8586 /* assign it some queues */
8587 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8588 vsi->idx);
8589 if (ret < 0) {
8590 dev_info(&pf->pdev->dev,
8591 "failed to get tracking for %d queues for VSI %d err=%d\n",
8592 vsi->alloc_queue_pairs, vsi->seid, ret);
8593 goto err_vsi;
8594 }
8595 vsi->base_queue = ret;
8596
8597 /* get a VSI from the hardware */
8598 vsi->uplink_seid = uplink_seid;
8599 ret = i40e_add_vsi(vsi);
8600 if (ret)
8601 goto err_vsi;
8602
8603 switch (vsi->type) {
8604 /* setup the netdev if needed */
8605 case I40E_VSI_MAIN:
8606 case I40E_VSI_VMDQ2:
8607 case I40E_VSI_FCOE:
8608 ret = i40e_config_netdev(vsi);
8609 if (ret)
8610 goto err_netdev;
8611 ret = register_netdev(vsi->netdev);
8612 if (ret)
8613 goto err_netdev;
8614 vsi->netdev_registered = true;
8615 netif_carrier_off(vsi->netdev);
8616 #ifdef CONFIG_I40E_DCB
8617 /* Setup DCB netlink interface */
8618 i40e_dcbnl_setup(vsi);
8619 #endif /* CONFIG_I40E_DCB */
8620 /* fall through */
8621
8622 case I40E_VSI_FDIR:
8623 /* set up vectors and rings if needed */
8624 ret = i40e_vsi_setup_vectors(vsi);
8625 if (ret)
8626 goto err_msix;
8627
8628 ret = i40e_alloc_rings(vsi);
8629 if (ret)
8630 goto err_rings;
8631
8632 /* map all of the rings to the q_vectors */
8633 i40e_vsi_map_rings_to_vectors(vsi);
8634
8635 i40e_vsi_reset_stats(vsi);
8636 break;
8637
8638 default:
8639 /* no netdev or rings for the other VSI types */
8640 break;
8641 }
8642
8643 return vsi;
8644
8645 err_rings:
8646 i40e_vsi_free_q_vectors(vsi);
8647 err_msix:
8648 if (vsi->netdev_registered) {
8649 vsi->netdev_registered = false;
8650 unregister_netdev(vsi->netdev);
8651 free_netdev(vsi->netdev);
8652 vsi->netdev = NULL;
8653 }
8654 err_netdev:
8655 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8656 err_vsi:
8657 i40e_vsi_clear(vsi);
8658 err_alloc:
8659 return NULL;
8660 }
8661
8662 /**
8663 * i40e_veb_get_bw_info - Query VEB BW information
8664 * @veb: the veb to query
8665 *
8666 * Query the Tx scheduler BW configuration data for given VEB
8667 **/
8668 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8669 {
8670 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8671 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8672 struct i40e_pf *pf = veb->pf;
8673 struct i40e_hw *hw = &pf->hw;
8674 u32 tc_bw_max;
8675 int ret = 0;
8676 int i;
8677
8678 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8679 &bw_data, NULL);
8680 if (ret) {
8681 dev_info(&pf->pdev->dev,
8682 "query veb bw config failed, aq_err=%d\n",
8683 hw->aq.asq_last_status);
8684 goto out;
8685 }
8686
8687 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8688 &ets_data, NULL);
8689 if (ret) {
8690 dev_info(&pf->pdev->dev,
8691 "query veb bw ets config failed, aq_err=%d\n",
8692 hw->aq.asq_last_status);
8693 goto out;
8694 }
8695
8696 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8697 veb->bw_max_quanta = ets_data.tc_bw_max;
8698 veb->is_abs_credits = bw_data.absolute_credits_enable;
8699 veb->enabled_tc = ets_data.tc_valid_bits;
8700 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8701 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8702 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8703 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8704 veb->bw_tc_limit_credits[i] =
8705 le16_to_cpu(bw_data.tc_bw_limits[i]);
8706 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8707 }
8708
8709 out:
8710 return ret;
8711 }
8712
8713 /**
8714 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8715 * @pf: board private structure
8716 *
8717 * On error: returns error code (negative)
8718 * On success: returns vsi index in PF (positive)
8719 **/
8720 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8721 {
8722 int ret = -ENOENT;
8723 struct i40e_veb *veb;
8724 int i;
8725
8726 /* Need to protect the allocation of switch elements at the PF level */
8727 mutex_lock(&pf->switch_mutex);
8728
8729 /* VEB list may be fragmented if VEB creation/destruction has
8730 * been happening. We can afford to do a quick scan to look
8731 * for any free slots in the list.
8732 *
8733 * find next empty veb slot, looping back around if necessary
8734 */
8735 i = 0;
8736 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8737 i++;
8738 if (i >= I40E_MAX_VEB) {
8739 ret = -ENOMEM;
8740 goto err_alloc_veb; /* out of VEB slots! */
8741 }
8742
8743 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8744 if (!veb) {
8745 ret = -ENOMEM;
8746 goto err_alloc_veb;
8747 }
8748 veb->pf = pf;
8749 veb->idx = i;
8750 veb->enabled_tc = 1;
8751
8752 pf->veb[i] = veb;
8753 ret = i;
8754 err_alloc_veb:
8755 mutex_unlock(&pf->switch_mutex);
8756 return ret;
8757 }
8758
8759 /**
8760 * i40e_switch_branch_release - Delete a branch of the switch tree
8761 * @branch: where to start deleting
8762 *
8763 * This uses recursion to find the tips of the branch to be
8764 * removed, deleting until we get back to and can delete this VEB.
8765 **/
8766 static void i40e_switch_branch_release(struct i40e_veb *branch)
8767 {
8768 struct i40e_pf *pf = branch->pf;
8769 u16 branch_seid = branch->seid;
8770 u16 veb_idx = branch->idx;
8771 int i;
8772
8773 /* release any VEBs on this VEB - RECURSION */
8774 for (i = 0; i < I40E_MAX_VEB; i++) {
8775 if (!pf->veb[i])
8776 continue;
8777 if (pf->veb[i]->uplink_seid == branch->seid)
8778 i40e_switch_branch_release(pf->veb[i]);
8779 }
8780
8781 /* Release the VSIs on this VEB, but not the owner VSI.
8782 *
8783 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
8784 * the VEB itself, so don't use (*branch) after this loop.
8785 */
8786 for (i = 0; i < pf->num_alloc_vsi; i++) {
8787 if (!pf->vsi[i])
8788 continue;
8789 if (pf->vsi[i]->uplink_seid == branch_seid &&
8790 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8791 i40e_vsi_release(pf->vsi[i]);
8792 }
8793 }
8794
8795 /* There's one corner case where the VEB might not have been
8796 * removed, so double check it here and remove it if needed.
8797 * This case happens if the veb was created from the debugfs
8798 * commands and no VSIs were added to it.
8799 */
8800 if (pf->veb[veb_idx])
8801 i40e_veb_release(pf->veb[veb_idx]);
8802 }
8803
8804 /**
8805 * i40e_veb_clear - remove veb struct
8806 * @veb: the veb to remove
8807 **/
8808 static void i40e_veb_clear(struct i40e_veb *veb)
8809 {
8810 if (!veb)
8811 return;
8812
8813 if (veb->pf) {
8814 struct i40e_pf *pf = veb->pf;
8815
8816 mutex_lock(&pf->switch_mutex);
8817 if (pf->veb[veb->idx] == veb)
8818 pf->veb[veb->idx] = NULL;
8819 mutex_unlock(&pf->switch_mutex);
8820 }
8821
8822 kfree(veb);
8823 }
8824
8825 /**
8826 * i40e_veb_release - Delete a VEB and free its resources
8827 * @veb: the VEB being removed
8828 **/
8829 void i40e_veb_release(struct i40e_veb *veb)
8830 {
8831 struct i40e_vsi *vsi = NULL;
8832 struct i40e_pf *pf;
8833 int i, n = 0;
8834
8835 pf = veb->pf;
8836
8837 /* find the remaining VSI and check for extras */
8838 for (i = 0; i < pf->num_alloc_vsi; i++) {
8839 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
8840 n++;
8841 vsi = pf->vsi[i];
8842 }
8843 }
8844 if (n != 1) {
8845 dev_info(&pf->pdev->dev,
8846 "can't remove VEB %d with %d VSIs left\n",
8847 veb->seid, n);
8848 return;
8849 }
8850
8851 /* move the remaining VSI to uplink veb */
8852 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
8853 if (veb->uplink_seid) {
8854 vsi->uplink_seid = veb->uplink_seid;
8855 if (veb->uplink_seid == pf->mac_seid)
8856 vsi->veb_idx = I40E_NO_VEB;
8857 else
8858 vsi->veb_idx = veb->veb_idx;
8859 } else {
8860 /* floating VEB */
8861 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
8862 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
8863 }
8864
8865 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
8866 i40e_veb_clear(veb);
8867 }
8868
8869 /**
8870 * i40e_add_veb - create the VEB in the switch
8871 * @veb: the VEB to be instantiated
8872 * @vsi: the controlling VSI
8873 **/
8874 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
8875 {
8876 bool is_default = false;
8877 bool is_cloud = false;
8878 int ret;
8879
8880 /* get a VEB from the hardware */
8881 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
8882 veb->enabled_tc, is_default,
8883 is_cloud, &veb->seid, NULL);
8884 if (ret) {
8885 dev_info(&veb->pf->pdev->dev,
8886 "couldn't add VEB, err %d, aq_err %d\n",
8887 ret, veb->pf->hw.aq.asq_last_status);
8888 return -EPERM;
8889 }
8890
8891 /* get statistics counter */
8892 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
8893 &veb->stats_idx, NULL, NULL, NULL);
8894 if (ret) {
8895 dev_info(&veb->pf->pdev->dev,
8896 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
8897 ret, veb->pf->hw.aq.asq_last_status);
8898 return -EPERM;
8899 }
8900 ret = i40e_veb_get_bw_info(veb);
8901 if (ret) {
8902 dev_info(&veb->pf->pdev->dev,
8903 "couldn't get VEB bw info, err %d, aq_err %d\n",
8904 ret, veb->pf->hw.aq.asq_last_status);
8905 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
8906 return -ENOENT;
8907 }
8908
8909 vsi->uplink_seid = veb->seid;
8910 vsi->veb_idx = veb->idx;
8911 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8912
8913 return 0;
8914 }
8915
8916 /**
8917 * i40e_veb_setup - Set up a VEB
8918 * @pf: board private structure
8919 * @flags: VEB setup flags
8920 * @uplink_seid: the switch element to link to
8921 * @vsi_seid: the initial VSI seid
8922 * @enabled_tc: Enabled TC bit-map
8923 *
8924 * This allocates the sw VEB structure and links it into the switch
8925 * It is possible and legal for this to be a duplicate of an already
8926 * existing VEB. It is also possible for both uplink and vsi seids
8927 * to be zero, in order to create a floating VEB.
8928 *
8929 * Returns pointer to the successfully allocated VEB sw struct on
8930 * success, otherwise returns NULL on failure.
8931 **/
8932 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
8933 u16 uplink_seid, u16 vsi_seid,
8934 u8 enabled_tc)
8935 {
8936 struct i40e_veb *veb, *uplink_veb = NULL;
8937 int vsi_idx, veb_idx;
8938 int ret;
8939
8940 /* if one seid is 0, the other must be 0 to create a floating relay */
8941 if ((uplink_seid == 0 || vsi_seid == 0) &&
8942 (uplink_seid + vsi_seid != 0)) {
8943 dev_info(&pf->pdev->dev,
8944 "one, not both seid's are 0: uplink=%d vsi=%d\n",
8945 uplink_seid, vsi_seid);
8946 return NULL;
8947 }
8948
8949 /* make sure there is such a vsi and uplink */
8950 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
8951 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
8952 break;
8953 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
8954 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
8955 vsi_seid);
8956 return NULL;
8957 }
8958
8959 if (uplink_seid && uplink_seid != pf->mac_seid) {
8960 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
8961 if (pf->veb[veb_idx] &&
8962 pf->veb[veb_idx]->seid == uplink_seid) {
8963 uplink_veb = pf->veb[veb_idx];
8964 break;
8965 }
8966 }
8967 if (!uplink_veb) {
8968 dev_info(&pf->pdev->dev,
8969 "uplink seid %d not found\n", uplink_seid);
8970 return NULL;
8971 }
8972 }
8973
8974 /* get veb sw struct */
8975 veb_idx = i40e_veb_mem_alloc(pf);
8976 if (veb_idx < 0)
8977 goto err_alloc;
8978 veb = pf->veb[veb_idx];
8979 veb->flags = flags;
8980 veb->uplink_seid = uplink_seid;
8981 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
8982 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
8983
8984 /* create the VEB in the switch */
8985 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
8986 if (ret)
8987 goto err_veb;
8988 if (vsi_idx == pf->lan_vsi)
8989 pf->lan_veb = veb->idx;
8990
8991 return veb;
8992
8993 err_veb:
8994 i40e_veb_clear(veb);
8995 err_alloc:
8996 return NULL;
8997 }
8998
8999 /**
9000 * i40e_setup_pf_switch_element - set pf vars based on switch type
9001 * @pf: board private structure
9002 * @ele: element we are building info from
9003 * @num_reported: total number of elements
9004 * @printconfig: should we print the contents
9005 *
9006 * helper function to assist in extracting a few useful SEID values.
9007 **/
9008 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9009 struct i40e_aqc_switch_config_element_resp *ele,
9010 u16 num_reported, bool printconfig)
9011 {
9012 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9013 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9014 u8 element_type = ele->element_type;
9015 u16 seid = le16_to_cpu(ele->seid);
9016
9017 if (printconfig)
9018 dev_info(&pf->pdev->dev,
9019 "type=%d seid=%d uplink=%d downlink=%d\n",
9020 element_type, seid, uplink_seid, downlink_seid);
9021
9022 switch (element_type) {
9023 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9024 pf->mac_seid = seid;
9025 break;
9026 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9027 /* Main VEB? */
9028 if (uplink_seid != pf->mac_seid)
9029 break;
9030 if (pf->lan_veb == I40E_NO_VEB) {
9031 int v;
9032
9033 /* find existing or else empty VEB */
9034 for (v = 0; v < I40E_MAX_VEB; v++) {
9035 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9036 pf->lan_veb = v;
9037 break;
9038 }
9039 }
9040 if (pf->lan_veb == I40E_NO_VEB) {
9041 v = i40e_veb_mem_alloc(pf);
9042 if (v < 0)
9043 break;
9044 pf->lan_veb = v;
9045 }
9046 }
9047
9048 pf->veb[pf->lan_veb]->seid = seid;
9049 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9050 pf->veb[pf->lan_veb]->pf = pf;
9051 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9052 break;
9053 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9054 if (num_reported != 1)
9055 break;
9056 /* This is immediately after a reset so we can assume this is
9057 * the PF's VSI
9058 */
9059 pf->mac_seid = uplink_seid;
9060 pf->pf_seid = downlink_seid;
9061 pf->main_vsi_seid = seid;
9062 if (printconfig)
9063 dev_info(&pf->pdev->dev,
9064 "pf_seid=%d main_vsi_seid=%d\n",
9065 pf->pf_seid, pf->main_vsi_seid);
9066 break;
9067 case I40E_SWITCH_ELEMENT_TYPE_PF:
9068 case I40E_SWITCH_ELEMENT_TYPE_VF:
9069 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9070 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9071 case I40E_SWITCH_ELEMENT_TYPE_PE:
9072 case I40E_SWITCH_ELEMENT_TYPE_PA:
9073 /* ignore these for now */
9074 break;
9075 default:
9076 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9077 element_type, seid);
9078 break;
9079 }
9080 }
9081
9082 /**
9083 * i40e_fetch_switch_configuration - Get switch config from firmware
9084 * @pf: board private structure
9085 * @printconfig: should we print the contents
9086 *
9087 * Get the current switch configuration from the device and
9088 * extract a few useful SEID values.
9089 **/
9090 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9091 {
9092 struct i40e_aqc_get_switch_config_resp *sw_config;
9093 u16 next_seid = 0;
9094 int ret = 0;
9095 u8 *aq_buf;
9096 int i;
9097
9098 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9099 if (!aq_buf)
9100 return -ENOMEM;
9101
9102 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9103 do {
9104 u16 num_reported, num_total;
9105
9106 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9107 I40E_AQ_LARGE_BUF,
9108 &next_seid, NULL);
9109 if (ret) {
9110 dev_info(&pf->pdev->dev,
9111 "get switch config failed %d aq_err=%x\n",
9112 ret, pf->hw.aq.asq_last_status);
9113 kfree(aq_buf);
9114 return -ENOENT;
9115 }
9116
9117 num_reported = le16_to_cpu(sw_config->header.num_reported);
9118 num_total = le16_to_cpu(sw_config->header.num_total);
9119
9120 if (printconfig)
9121 dev_info(&pf->pdev->dev,
9122 "header: %d reported %d total\n",
9123 num_reported, num_total);
9124
9125 for (i = 0; i < num_reported; i++) {
9126 struct i40e_aqc_switch_config_element_resp *ele =
9127 &sw_config->element[i];
9128
9129 i40e_setup_pf_switch_element(pf, ele, num_reported,
9130 printconfig);
9131 }
9132 } while (next_seid != 0);
9133
9134 kfree(aq_buf);
9135 return ret;
9136 }
9137
9138 /**
9139 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9140 * @pf: board private structure
9141 * @reinit: if the Main VSI needs to re-initialized.
9142 *
9143 * Returns 0 on success, negative value on failure
9144 **/
9145 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9146 {
9147 int ret;
9148
9149 /* find out what's out there already */
9150 ret = i40e_fetch_switch_configuration(pf, false);
9151 if (ret) {
9152 dev_info(&pf->pdev->dev,
9153 "couldn't fetch switch config, err %d, aq_err %d\n",
9154 ret, pf->hw.aq.asq_last_status);
9155 return ret;
9156 }
9157 i40e_pf_reset_stats(pf);
9158
9159 /* first time setup */
9160 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9161 struct i40e_vsi *vsi = NULL;
9162 u16 uplink_seid;
9163
9164 /* Set up the PF VSI associated with the PF's main VSI
9165 * that is already in the HW switch
9166 */
9167 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9168 uplink_seid = pf->veb[pf->lan_veb]->seid;
9169 else
9170 uplink_seid = pf->mac_seid;
9171 if (pf->lan_vsi == I40E_NO_VSI)
9172 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9173 else if (reinit)
9174 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9175 if (!vsi) {
9176 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9177 i40e_fdir_teardown(pf);
9178 return -EAGAIN;
9179 }
9180 } else {
9181 /* force a reset of TC and queue layout configurations */
9182 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9183 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9184 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9185 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9186 }
9187 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9188
9189 i40e_fdir_sb_setup(pf);
9190
9191 /* Setup static PF queue filter control settings */
9192 ret = i40e_setup_pf_filter_control(pf);
9193 if (ret) {
9194 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9195 ret);
9196 /* Failure here should not stop continuing other steps */
9197 }
9198
9199 /* enable RSS in the HW, even for only one queue, as the stack can use
9200 * the hash
9201 */
9202 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9203 i40e_config_rss(pf);
9204
9205 /* fill in link information and enable LSE reporting */
9206 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9207 i40e_link_event(pf);
9208
9209 /* Initialize user-specific link properties */
9210 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9211 I40E_AQ_AN_COMPLETED) ? true : false);
9212
9213 /* fill in link information and enable LSE reporting */
9214 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9215 i40e_link_event(pf);
9216
9217 /* Initialize user-specific link properties */
9218 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9219 I40E_AQ_AN_COMPLETED) ? true : false);
9220
9221 i40e_ptp_init(pf);
9222
9223 return ret;
9224 }
9225
9226 /**
9227 * i40e_determine_queue_usage - Work out queue distribution
9228 * @pf: board private structure
9229 **/
9230 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9231 {
9232 int queues_left;
9233
9234 pf->num_lan_qps = 0;
9235 #ifdef I40E_FCOE
9236 pf->num_fcoe_qps = 0;
9237 #endif
9238
9239 /* Find the max queues to be put into basic use. We'll always be
9240 * using TC0, whether or not DCB is running, and TC0 will get the
9241 * big RSS set.
9242 */
9243 queues_left = pf->hw.func_caps.num_tx_qp;
9244
9245 if ((queues_left == 1) ||
9246 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9247 /* one qp for PF, no queues for anything else */
9248 queues_left = 0;
9249 pf->rss_size = pf->num_lan_qps = 1;
9250
9251 /* make sure all the fancies are disabled */
9252 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9253 #ifdef I40E_FCOE
9254 I40E_FLAG_FCOE_ENABLED |
9255 #endif
9256 I40E_FLAG_FD_SB_ENABLED |
9257 I40E_FLAG_FD_ATR_ENABLED |
9258 I40E_FLAG_DCB_CAPABLE |
9259 I40E_FLAG_SRIOV_ENABLED |
9260 I40E_FLAG_VMDQ_ENABLED);
9261 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9262 I40E_FLAG_FD_SB_ENABLED |
9263 I40E_FLAG_FD_ATR_ENABLED |
9264 I40E_FLAG_DCB_CAPABLE))) {
9265 /* one qp for PF */
9266 pf->rss_size = pf->num_lan_qps = 1;
9267 queues_left -= pf->num_lan_qps;
9268
9269 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9270 #ifdef I40E_FCOE
9271 I40E_FLAG_FCOE_ENABLED |
9272 #endif
9273 I40E_FLAG_FD_SB_ENABLED |
9274 I40E_FLAG_FD_ATR_ENABLED |
9275 I40E_FLAG_DCB_ENABLED |
9276 I40E_FLAG_VMDQ_ENABLED);
9277 } else {
9278 /* Not enough queues for all TCs */
9279 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9280 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9281 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9282 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9283 }
9284 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9285 num_online_cpus());
9286 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9287 pf->hw.func_caps.num_tx_qp);
9288
9289 queues_left -= pf->num_lan_qps;
9290 }
9291
9292 #ifdef I40E_FCOE
9293 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9294 if (I40E_DEFAULT_FCOE <= queues_left) {
9295 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9296 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9297 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9298 } else {
9299 pf->num_fcoe_qps = 0;
9300 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9301 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9302 }
9303
9304 queues_left -= pf->num_fcoe_qps;
9305 }
9306
9307 #endif
9308 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9309 if (queues_left > 1) {
9310 queues_left -= 1; /* save 1 queue for FD */
9311 } else {
9312 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9313 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9314 }
9315 }
9316
9317 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9318 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9319 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9320 (queues_left / pf->num_vf_qps));
9321 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9322 }
9323
9324 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9325 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9326 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9327 (queues_left / pf->num_vmdq_qps));
9328 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9329 }
9330
9331 pf->queues_left = queues_left;
9332 #ifdef I40E_FCOE
9333 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9334 #endif
9335 }
9336
9337 /**
9338 * i40e_setup_pf_filter_control - Setup PF static filter control
9339 * @pf: PF to be setup
9340 *
9341 * i40e_setup_pf_filter_control sets up a pf's initial filter control
9342 * settings. If PE/FCoE are enabled then it will also set the per PF
9343 * based filter sizes required for them. It also enables Flow director,
9344 * ethertype and macvlan type filter settings for the pf.
9345 *
9346 * Returns 0 on success, negative on failure
9347 **/
9348 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9349 {
9350 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9351
9352 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9353
9354 /* Flow Director is enabled */
9355 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9356 settings->enable_fdir = true;
9357
9358 /* Ethtype and MACVLAN filters enabled for PF */
9359 settings->enable_ethtype = true;
9360 settings->enable_macvlan = true;
9361
9362 if (i40e_set_filter_control(&pf->hw, settings))
9363 return -ENOENT;
9364
9365 return 0;
9366 }
9367
9368 #define INFO_STRING_LEN 255
9369 static void i40e_print_features(struct i40e_pf *pf)
9370 {
9371 struct i40e_hw *hw = &pf->hw;
9372 char *buf, *string;
9373
9374 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9375 if (!string) {
9376 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9377 return;
9378 }
9379
9380 buf = string;
9381
9382 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9383 #ifdef CONFIG_PCI_IOV
9384 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9385 #endif
9386 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9387 pf->hw.func_caps.num_vsis,
9388 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9389 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9390
9391 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9392 buf += sprintf(buf, "RSS ");
9393 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9394 buf += sprintf(buf, "FD_ATR ");
9395 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9396 buf += sprintf(buf, "FD_SB ");
9397 buf += sprintf(buf, "NTUPLE ");
9398 }
9399 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9400 buf += sprintf(buf, "DCB ");
9401 if (pf->flags & I40E_FLAG_PTP)
9402 buf += sprintf(buf, "PTP ");
9403 #ifdef I40E_FCOE
9404 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9405 buf += sprintf(buf, "FCOE ");
9406 #endif
9407
9408 BUG_ON(buf > (string + INFO_STRING_LEN));
9409 dev_info(&pf->pdev->dev, "%s\n", string);
9410 kfree(string);
9411 }
9412
9413 /**
9414 * i40e_probe - Device initialization routine
9415 * @pdev: PCI device information struct
9416 * @ent: entry in i40e_pci_tbl
9417 *
9418 * i40e_probe initializes a pf identified by a pci_dev structure.
9419 * The OS initialization, configuring of the pf private structure,
9420 * and a hardware reset occur.
9421 *
9422 * Returns 0 on success, negative on failure
9423 **/
9424 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9425 {
9426 struct i40e_aq_get_phy_abilities_resp abilities;
9427 struct i40e_pf *pf;
9428 struct i40e_hw *hw;
9429 static u16 pfs_found;
9430 u16 link_status;
9431 int err = 0;
9432 u32 len;
9433 u32 i;
9434
9435 err = pci_enable_device_mem(pdev);
9436 if (err)
9437 return err;
9438
9439 /* set up for high or low dma */
9440 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9441 if (err) {
9442 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9443 if (err) {
9444 dev_err(&pdev->dev,
9445 "DMA configuration failed: 0x%x\n", err);
9446 goto err_dma;
9447 }
9448 }
9449
9450 /* set up pci connections */
9451 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9452 IORESOURCE_MEM), i40e_driver_name);
9453 if (err) {
9454 dev_info(&pdev->dev,
9455 "pci_request_selected_regions failed %d\n", err);
9456 goto err_pci_reg;
9457 }
9458
9459 pci_enable_pcie_error_reporting(pdev);
9460 pci_set_master(pdev);
9461
9462 /* Now that we have a PCI connection, we need to do the
9463 * low level device setup. This is primarily setting up
9464 * the Admin Queue structures and then querying for the
9465 * device's current profile information.
9466 */
9467 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9468 if (!pf) {
9469 err = -ENOMEM;
9470 goto err_pf_alloc;
9471 }
9472 pf->next_vsi = 0;
9473 pf->pdev = pdev;
9474 set_bit(__I40E_DOWN, &pf->state);
9475
9476 hw = &pf->hw;
9477 hw->back = pf;
9478 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9479 pci_resource_len(pdev, 0));
9480 if (!hw->hw_addr) {
9481 err = -EIO;
9482 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9483 (unsigned int)pci_resource_start(pdev, 0),
9484 (unsigned int)pci_resource_len(pdev, 0), err);
9485 goto err_ioremap;
9486 }
9487 hw->vendor_id = pdev->vendor;
9488 hw->device_id = pdev->device;
9489 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9490 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9491 hw->subsystem_device_id = pdev->subsystem_device;
9492 hw->bus.device = PCI_SLOT(pdev->devfn);
9493 hw->bus.func = PCI_FUNC(pdev->devfn);
9494 pf->instance = pfs_found;
9495
9496 if (debug != -1) {
9497 pf->msg_enable = pf->hw.debug_mask;
9498 pf->msg_enable = debug;
9499 }
9500
9501 /* do a special CORER for clearing PXE mode once at init */
9502 if (hw->revision_id == 0 &&
9503 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9504 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9505 i40e_flush(hw);
9506 msleep(200);
9507 pf->corer_count++;
9508
9509 i40e_clear_pxe_mode(hw);
9510 }
9511
9512 /* Reset here to make sure all is clean and to define PF 'n' */
9513 i40e_clear_hw(hw);
9514 err = i40e_pf_reset(hw);
9515 if (err) {
9516 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9517 goto err_pf_reset;
9518 }
9519 pf->pfr_count++;
9520
9521 hw->aq.num_arq_entries = I40E_AQ_LEN;
9522 hw->aq.num_asq_entries = I40E_AQ_LEN;
9523 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9524 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9525 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9526
9527 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9528 "%s-%s:misc",
9529 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9530
9531 err = i40e_init_shared_code(hw);
9532 if (err) {
9533 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
9534 goto err_pf_reset;
9535 }
9536
9537 /* set up a default setting for link flow control */
9538 pf->hw.fc.requested_mode = I40E_FC_NONE;
9539
9540 err = i40e_init_adminq(hw);
9541 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9542 if (err) {
9543 dev_info(&pdev->dev,
9544 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9545 goto err_pf_reset;
9546 }
9547
9548 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9549 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9550 dev_info(&pdev->dev,
9551 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9552 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9553 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9554 dev_info(&pdev->dev,
9555 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9556
9557
9558 i40e_verify_eeprom(pf);
9559
9560 /* Rev 0 hardware was never productized */
9561 if (hw->revision_id < 1)
9562 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9563
9564 i40e_clear_pxe_mode(hw);
9565 err = i40e_get_capabilities(pf);
9566 if (err)
9567 goto err_adminq_setup;
9568
9569 err = i40e_sw_init(pf);
9570 if (err) {
9571 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9572 goto err_sw_init;
9573 }
9574
9575 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9576 hw->func_caps.num_rx_qp,
9577 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9578 if (err) {
9579 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9580 goto err_init_lan_hmc;
9581 }
9582
9583 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9584 if (err) {
9585 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9586 err = -ENOENT;
9587 goto err_configure_lan_hmc;
9588 }
9589
9590 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9591 * Ignore error return codes because if it was already disabled via
9592 * hardware settings this will fail
9593 */
9594 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
9595 (pf->hw.aq.fw_maj_ver < 4)) {
9596 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
9597 i40e_aq_stop_lldp(hw, true, NULL);
9598 }
9599
9600 i40e_get_mac_addr(hw, hw->mac.addr);
9601 if (!is_valid_ether_addr(hw->mac.addr)) {
9602 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9603 err = -EIO;
9604 goto err_mac_addr;
9605 }
9606 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9607 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9608 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9609 if (is_valid_ether_addr(hw->mac.port_addr))
9610 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9611 #ifdef I40E_FCOE
9612 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9613 if (err)
9614 dev_info(&pdev->dev,
9615 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9616 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9617 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9618 hw->mac.san_addr);
9619 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9620 }
9621 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9622 #endif /* I40E_FCOE */
9623
9624 pci_set_drvdata(pdev, pf);
9625 pci_save_state(pdev);
9626 #ifdef CONFIG_I40E_DCB
9627 err = i40e_init_pf_dcb(pf);
9628 if (err) {
9629 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
9630 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9631 /* Continue without DCB enabled */
9632 }
9633 #endif /* CONFIG_I40E_DCB */
9634
9635 /* set up periodic task facility */
9636 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9637 pf->service_timer_period = HZ;
9638
9639 INIT_WORK(&pf->service_task, i40e_service_task);
9640 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9641 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9642 pf->link_check_timeout = jiffies;
9643
9644 /* WoL defaults to disabled */
9645 pf->wol_en = false;
9646 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9647
9648 /* set up the main switch operations */
9649 i40e_determine_queue_usage(pf);
9650 i40e_init_interrupt_scheme(pf);
9651
9652 /* The number of VSIs reported by the FW is the minimum guaranteed
9653 * to us; HW supports far more and we share the remaining pool with
9654 * the other PFs. We allocate space for more than the guarantee with
9655 * the understanding that we might not get them all later.
9656 */
9657 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9658 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9659 else
9660 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9661
9662 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9663 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9664 pf->vsi = kzalloc(len, GFP_KERNEL);
9665 if (!pf->vsi) {
9666 err = -ENOMEM;
9667 goto err_switch_setup;
9668 }
9669
9670 err = i40e_setup_pf_switch(pf, false);
9671 if (err) {
9672 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9673 goto err_vsis;
9674 }
9675 /* if FDIR VSI was set up, start it now */
9676 for (i = 0; i < pf->num_alloc_vsi; i++) {
9677 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9678 i40e_vsi_open(pf->vsi[i]);
9679 break;
9680 }
9681 }
9682
9683 /* driver is only interested in link up/down and module qualification
9684 * reports from firmware
9685 */
9686 err = i40e_aq_set_phy_int_mask(&pf->hw,
9687 I40E_AQ_EVENT_LINK_UPDOWN |
9688 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9689 if (err)
9690 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9691
9692 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
9693 (pf->hw.aq.fw_maj_ver < 4)) {
9694 msleep(75);
9695 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9696 if (err)
9697 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9698 pf->hw.aq.asq_last_status);
9699 }
9700 /* The main driver is (mostly) up and happy. We need to set this state
9701 * before setting up the misc vector or we get a race and the vector
9702 * ends up disabled forever.
9703 */
9704 clear_bit(__I40E_DOWN, &pf->state);
9705
9706 /* In case of MSIX we are going to setup the misc vector right here
9707 * to handle admin queue events etc. In case of legacy and MSI
9708 * the misc functionality and queue processing is combined in
9709 * the same vector and that gets setup at open.
9710 */
9711 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9712 err = i40e_setup_misc_vector(pf);
9713 if (err) {
9714 dev_info(&pdev->dev,
9715 "setup of misc vector failed: %d\n", err);
9716 goto err_vsis;
9717 }
9718 }
9719
9720 #ifdef CONFIG_PCI_IOV
9721 /* prep for VF support */
9722 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9723 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9724 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9725 u32 val;
9726
9727 /* disable link interrupts for VFs */
9728 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9729 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9730 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9731 i40e_flush(hw);
9732
9733 if (pci_num_vf(pdev)) {
9734 dev_info(&pdev->dev,
9735 "Active VFs found, allocating resources.\n");
9736 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9737 if (err)
9738 dev_info(&pdev->dev,
9739 "Error %d allocating resources for existing VFs\n",
9740 err);
9741 }
9742 }
9743 #endif /* CONFIG_PCI_IOV */
9744
9745 pfs_found++;
9746
9747 i40e_dbg_pf_init(pf);
9748
9749 /* tell the firmware that we're starting */
9750 i40e_send_version(pf);
9751
9752 /* since everything's happy, start the service_task timer */
9753 mod_timer(&pf->service_timer,
9754 round_jiffies(jiffies + pf->service_timer_period));
9755
9756 #ifdef I40E_FCOE
9757 /* create FCoE interface */
9758 i40e_fcoe_vsi_setup(pf);
9759
9760 #endif
9761 /* Get the negotiated link width and speed from PCI config space */
9762 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
9763
9764 i40e_set_pci_config_data(hw, link_status);
9765
9766 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
9767 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
9768 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
9769 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
9770 "Unknown"),
9771 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
9772 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
9773 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
9774 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
9775 "Unknown"));
9776
9777 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
9778 hw->bus.speed < i40e_bus_speed_8000) {
9779 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
9780 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
9781 }
9782
9783 /* get the requested speeds from the fw */
9784 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
9785 if (err)
9786 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n",
9787 err);
9788 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
9789
9790 /* print a string summarizing features */
9791 i40e_print_features(pf);
9792
9793 return 0;
9794
9795 /* Unwind what we've done if something failed in the setup */
9796 err_vsis:
9797 set_bit(__I40E_DOWN, &pf->state);
9798 i40e_clear_interrupt_scheme(pf);
9799 kfree(pf->vsi);
9800 err_switch_setup:
9801 i40e_reset_interrupt_capability(pf);
9802 del_timer_sync(&pf->service_timer);
9803 err_mac_addr:
9804 err_configure_lan_hmc:
9805 (void)i40e_shutdown_lan_hmc(hw);
9806 err_init_lan_hmc:
9807 kfree(pf->qp_pile);
9808 kfree(pf->irq_pile);
9809 err_sw_init:
9810 err_adminq_setup:
9811 (void)i40e_shutdown_adminq(hw);
9812 err_pf_reset:
9813 iounmap(hw->hw_addr);
9814 err_ioremap:
9815 kfree(pf);
9816 err_pf_alloc:
9817 pci_disable_pcie_error_reporting(pdev);
9818 pci_release_selected_regions(pdev,
9819 pci_select_bars(pdev, IORESOURCE_MEM));
9820 err_pci_reg:
9821 err_dma:
9822 pci_disable_device(pdev);
9823 return err;
9824 }
9825
9826 /**
9827 * i40e_remove - Device removal routine
9828 * @pdev: PCI device information struct
9829 *
9830 * i40e_remove is called by the PCI subsystem to alert the driver
9831 * that is should release a PCI device. This could be caused by a
9832 * Hot-Plug event, or because the driver is going to be removed from
9833 * memory.
9834 **/
9835 static void i40e_remove(struct pci_dev *pdev)
9836 {
9837 struct i40e_pf *pf = pci_get_drvdata(pdev);
9838 i40e_status ret_code;
9839 int i;
9840
9841 i40e_dbg_pf_exit(pf);
9842
9843 i40e_ptp_stop(pf);
9844
9845 /* no more scheduling of any task */
9846 set_bit(__I40E_DOWN, &pf->state);
9847 del_timer_sync(&pf->service_timer);
9848 cancel_work_sync(&pf->service_task);
9849
9850 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9851 i40e_free_vfs(pf);
9852 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
9853 }
9854
9855 i40e_fdir_teardown(pf);
9856
9857 /* If there is a switch structure or any orphans, remove them.
9858 * This will leave only the PF's VSI remaining.
9859 */
9860 for (i = 0; i < I40E_MAX_VEB; i++) {
9861 if (!pf->veb[i])
9862 continue;
9863
9864 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
9865 pf->veb[i]->uplink_seid == 0)
9866 i40e_switch_branch_release(pf->veb[i]);
9867 }
9868
9869 /* Now we can shutdown the PF's VSI, just before we kill
9870 * adminq and hmc.
9871 */
9872 if (pf->vsi[pf->lan_vsi])
9873 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9874
9875 i40e_stop_misc_vector(pf);
9876 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9877 synchronize_irq(pf->msix_entries[0].vector);
9878 free_irq(pf->msix_entries[0].vector, pf);
9879 }
9880
9881 /* shutdown and destroy the HMC */
9882 if (pf->hw.hmc.hmc_obj) {
9883 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
9884 if (ret_code)
9885 dev_warn(&pdev->dev,
9886 "Failed to destroy the HMC resources: %d\n",
9887 ret_code);
9888 }
9889
9890 /* shutdown the adminq */
9891 ret_code = i40e_shutdown_adminq(&pf->hw);
9892 if (ret_code)
9893 dev_warn(&pdev->dev,
9894 "Failed to destroy the Admin Queue resources: %d\n",
9895 ret_code);
9896
9897 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
9898 i40e_clear_interrupt_scheme(pf);
9899 for (i = 0; i < pf->num_alloc_vsi; i++) {
9900 if (pf->vsi[i]) {
9901 i40e_vsi_clear_rings(pf->vsi[i]);
9902 i40e_vsi_clear(pf->vsi[i]);
9903 pf->vsi[i] = NULL;
9904 }
9905 }
9906
9907 for (i = 0; i < I40E_MAX_VEB; i++) {
9908 kfree(pf->veb[i]);
9909 pf->veb[i] = NULL;
9910 }
9911
9912 kfree(pf->qp_pile);
9913 kfree(pf->irq_pile);
9914 kfree(pf->vsi);
9915
9916 iounmap(pf->hw.hw_addr);
9917 kfree(pf);
9918 pci_release_selected_regions(pdev,
9919 pci_select_bars(pdev, IORESOURCE_MEM));
9920
9921 pci_disable_pcie_error_reporting(pdev);
9922 pci_disable_device(pdev);
9923 }
9924
9925 /**
9926 * i40e_pci_error_detected - warning that something funky happened in PCI land
9927 * @pdev: PCI device information struct
9928 *
9929 * Called to warn that something happened and the error handling steps
9930 * are in progress. Allows the driver to quiesce things, be ready for
9931 * remediation.
9932 **/
9933 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
9934 enum pci_channel_state error)
9935 {
9936 struct i40e_pf *pf = pci_get_drvdata(pdev);
9937
9938 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
9939
9940 /* shutdown all operations */
9941 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
9942 rtnl_lock();
9943 i40e_prep_for_reset(pf);
9944 rtnl_unlock();
9945 }
9946
9947 /* Request a slot reset */
9948 return PCI_ERS_RESULT_NEED_RESET;
9949 }
9950
9951 /**
9952 * i40e_pci_error_slot_reset - a PCI slot reset just happened
9953 * @pdev: PCI device information struct
9954 *
9955 * Called to find if the driver can work with the device now that
9956 * the pci slot has been reset. If a basic connection seems good
9957 * (registers are readable and have sane content) then return a
9958 * happy little PCI_ERS_RESULT_xxx.
9959 **/
9960 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
9961 {
9962 struct i40e_pf *pf = pci_get_drvdata(pdev);
9963 pci_ers_result_t result;
9964 int err;
9965 u32 reg;
9966
9967 dev_info(&pdev->dev, "%s\n", __func__);
9968 if (pci_enable_device_mem(pdev)) {
9969 dev_info(&pdev->dev,
9970 "Cannot re-enable PCI device after reset.\n");
9971 result = PCI_ERS_RESULT_DISCONNECT;
9972 } else {
9973 pci_set_master(pdev);
9974 pci_restore_state(pdev);
9975 pci_save_state(pdev);
9976 pci_wake_from_d3(pdev, false);
9977
9978 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9979 if (reg == 0)
9980 result = PCI_ERS_RESULT_RECOVERED;
9981 else
9982 result = PCI_ERS_RESULT_DISCONNECT;
9983 }
9984
9985 err = pci_cleanup_aer_uncorrect_error_status(pdev);
9986 if (err) {
9987 dev_info(&pdev->dev,
9988 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
9989 err);
9990 /* non-fatal, continue */
9991 }
9992
9993 return result;
9994 }
9995
9996 /**
9997 * i40e_pci_error_resume - restart operations after PCI error recovery
9998 * @pdev: PCI device information struct
9999 *
10000 * Called to allow the driver to bring things back up after PCI error
10001 * and/or reset recovery has finished.
10002 **/
10003 static void i40e_pci_error_resume(struct pci_dev *pdev)
10004 {
10005 struct i40e_pf *pf = pci_get_drvdata(pdev);
10006
10007 dev_info(&pdev->dev, "%s\n", __func__);
10008 if (test_bit(__I40E_SUSPENDED, &pf->state))
10009 return;
10010
10011 rtnl_lock();
10012 i40e_handle_reset_warning(pf);
10013 rtnl_lock();
10014 }
10015
10016 /**
10017 * i40e_shutdown - PCI callback for shutting down
10018 * @pdev: PCI device information struct
10019 **/
10020 static void i40e_shutdown(struct pci_dev *pdev)
10021 {
10022 struct i40e_pf *pf = pci_get_drvdata(pdev);
10023 struct i40e_hw *hw = &pf->hw;
10024
10025 set_bit(__I40E_SUSPENDED, &pf->state);
10026 set_bit(__I40E_DOWN, &pf->state);
10027 rtnl_lock();
10028 i40e_prep_for_reset(pf);
10029 rtnl_unlock();
10030
10031 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10032 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10033
10034 if (system_state == SYSTEM_POWER_OFF) {
10035 pci_wake_from_d3(pdev, pf->wol_en);
10036 pci_set_power_state(pdev, PCI_D3hot);
10037 }
10038 }
10039
10040 #ifdef CONFIG_PM
10041 /**
10042 * i40e_suspend - PCI callback for moving to D3
10043 * @pdev: PCI device information struct
10044 **/
10045 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10046 {
10047 struct i40e_pf *pf = pci_get_drvdata(pdev);
10048 struct i40e_hw *hw = &pf->hw;
10049
10050 set_bit(__I40E_SUSPENDED, &pf->state);
10051 set_bit(__I40E_DOWN, &pf->state);
10052 del_timer_sync(&pf->service_timer);
10053 cancel_work_sync(&pf->service_task);
10054 rtnl_lock();
10055 i40e_prep_for_reset(pf);
10056 rtnl_unlock();
10057
10058 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10059 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10060
10061 pci_wake_from_d3(pdev, pf->wol_en);
10062 pci_set_power_state(pdev, PCI_D3hot);
10063
10064 return 0;
10065 }
10066
10067 /**
10068 * i40e_resume - PCI callback for waking up from D3
10069 * @pdev: PCI device information struct
10070 **/
10071 static int i40e_resume(struct pci_dev *pdev)
10072 {
10073 struct i40e_pf *pf = pci_get_drvdata(pdev);
10074 u32 err;
10075
10076 pci_set_power_state(pdev, PCI_D0);
10077 pci_restore_state(pdev);
10078 /* pci_restore_state() clears dev->state_saves, so
10079 * call pci_save_state() again to restore it.
10080 */
10081 pci_save_state(pdev);
10082
10083 err = pci_enable_device_mem(pdev);
10084 if (err) {
10085 dev_err(&pdev->dev,
10086 "%s: Cannot enable PCI device from suspend\n",
10087 __func__);
10088 return err;
10089 }
10090 pci_set_master(pdev);
10091
10092 /* no wakeup events while running */
10093 pci_wake_from_d3(pdev, false);
10094
10095 /* handling the reset will rebuild the device state */
10096 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10097 clear_bit(__I40E_DOWN, &pf->state);
10098 rtnl_lock();
10099 i40e_reset_and_rebuild(pf, false);
10100 rtnl_unlock();
10101 }
10102
10103 return 0;
10104 }
10105
10106 #endif
10107 static const struct pci_error_handlers i40e_err_handler = {
10108 .error_detected = i40e_pci_error_detected,
10109 .slot_reset = i40e_pci_error_slot_reset,
10110 .resume = i40e_pci_error_resume,
10111 };
10112
10113 static struct pci_driver i40e_driver = {
10114 .name = i40e_driver_name,
10115 .id_table = i40e_pci_tbl,
10116 .probe = i40e_probe,
10117 .remove = i40e_remove,
10118 #ifdef CONFIG_PM
10119 .suspend = i40e_suspend,
10120 .resume = i40e_resume,
10121 #endif
10122 .shutdown = i40e_shutdown,
10123 .err_handler = &i40e_err_handler,
10124 .sriov_configure = i40e_pci_sriov_configure,
10125 };
10126
10127 /**
10128 * i40e_init_module - Driver registration routine
10129 *
10130 * i40e_init_module is the first routine called when the driver is
10131 * loaded. All it does is register with the PCI subsystem.
10132 **/
10133 static int __init i40e_init_module(void)
10134 {
10135 pr_info("%s: %s - version %s\n", i40e_driver_name,
10136 i40e_driver_string, i40e_driver_version_str);
10137 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10138
10139 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
10140 i40e_configfs_init();
10141 #endif /* CONFIG_CONFIGFS_FS */
10142 i40e_dbg_init();
10143 return pci_register_driver(&i40e_driver);
10144 }
10145 module_init(i40e_init_module);
10146
10147 /**
10148 * i40e_exit_module - Driver exit cleanup routine
10149 *
10150 * i40e_exit_module is called just before the driver is removed
10151 * from memory.
10152 **/
10153 static void __exit i40e_exit_module(void)
10154 {
10155 pci_unregister_driver(&i40e_driver);
10156 i40e_dbg_exit();
10157 #if IS_ENABLED(CONFIG_CONFIGFS_FS)
10158 i40e_configfs_exit();
10159 #endif /* CONFIG_CONFIGFS_FS */
10160 }
10161 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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