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i40e/i40evf: Add a stat to keep track of linearization count
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
86 {0, }
87 };
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
89
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
94
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
99
100 /**
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
106 **/
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
109 {
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
111
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
115 if (!mem->va)
116 return -ENOMEM;
117
118 return 0;
119 }
120
121 /**
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
125 **/
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
127 {
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
129
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
131 mem->va = NULL;
132 mem->pa = 0;
133 mem->size = 0;
134
135 return 0;
136 }
137
138 /**
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
143 **/
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 u32 size)
146 {
147 mem->size = size;
148 mem->va = kzalloc(size, GFP_KERNEL);
149
150 if (!mem->va)
151 return -ENOMEM;
152
153 return 0;
154 }
155
156 /**
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
160 **/
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
162 {
163 /* it's ok to kfree a NULL pointer */
164 kfree(mem->va);
165 mem->va = NULL;
166 mem->size = 0;
167
168 return 0;
169 }
170
171 /**
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
177 *
178 * Returns the base item index of the lump, or negative for error
179 *
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
183 **/
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
185 u16 needed, u16 id)
186 {
187 int ret = -ENOMEM;
188 int i, j;
189
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
193 pile, needed, id);
194 return -EINVAL;
195 }
196
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
202 i++;
203 continue;
204 }
205
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
209 break;
210 }
211
212 if (j == needed) {
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
216 ret = i;
217 pile->search_hint = i + j;
218 break;
219 } else {
220 /* not enough, so skip over it and continue looking */
221 i += j;
222 }
223 }
224
225 return ret;
226 }
227
228 /**
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
233 *
234 * Returns the count of items in the lump
235 **/
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
237 {
238 int valid_id = (id | I40E_PILE_VALID_BIT);
239 int count = 0;
240 int i;
241
242 if (!pile || index >= pile->num_entries)
243 return -EINVAL;
244
245 for (i = index;
246 i < pile->num_entries && pile->list[i] == valid_id;
247 i++) {
248 pile->list[i] = 0;
249 count++;
250 }
251
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
254
255 return count;
256 }
257
258 /**
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
262 **/
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 {
265 int i;
266
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
269 return pf->vsi[i];
270
271 return NULL;
272 }
273
274 /**
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
277 *
278 * If not already scheduled, this puts the task into the work queue
279 **/
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
281 {
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
286 }
287
288 /**
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
291 *
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
294 * reset.
295 **/
296 #ifdef I40E_FCOE
297 void i40e_tx_timeout(struct net_device *netdev)
298 #else
299 static void i40e_tx_timeout(struct net_device *netdev)
300 #endif
301 {
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
307 u32 head, val;
308
309 pf->tx_timeout_count++;
310
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
315
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
319 time_after(jiffies,
320 (trans_start + netdev->watchdog_timeo))) {
321 hung_queue = i;
322 break;
323 }
324 }
325
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
328 } else {
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
332 if (hung_queue ==
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
335 break;
336 }
337 }
338 }
339 }
340
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
346
347 if (tx_ring) {
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
351 val = rd32(&pf->hw,
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
354 else
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
356
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
361 }
362
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
366
367 switch (pf->tx_timeout_recovery_level) {
368 case 1:
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
370 break;
371 case 2:
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
373 break;
374 case 3:
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
376 break;
377 default:
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
379 break;
380 }
381
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
384 }
385
386 /**
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
390 **/
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
392 {
393 rx_ring->next_to_use = val;
394
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
398 * such as IA-64).
399 */
400 wmb();
401 writel(val, rx_ring->tail);
402 }
403
404 /**
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
407 *
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
410 **/
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
412 {
413 return &vsi->net_stats;
414 }
415
416 /**
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
419 *
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
422 **/
423 #ifdef I40E_FCOE
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
427 #else
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
431 #endif
432 {
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
437 int i;
438
439 if (test_bit(__I40E_DOWN, &vsi->state))
440 return stats;
441
442 if (!vsi->tx_rings)
443 return stats;
444
445 rcu_read_lock();
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
447 u64 bytes, packets;
448 unsigned int start;
449
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
451 if (!tx_ring)
452 continue;
453
454 do {
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
459
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
463
464 do {
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
469
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
472 }
473 rcu_read_unlock();
474
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
483
484 return stats;
485 }
486
487 /**
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
490 **/
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
492 {
493 struct rtnl_link_stats64 *ns;
494 int i;
495
496 if (!vsi)
497 return;
498
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
514 }
515 }
516 vsi->stat_offsets_loaded = false;
517 }
518
519 /**
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
522 **/
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
524 {
525 int i;
526
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
530
531 for (i = 0; i < I40E_MAX_VEB; i++) {
532 if (pf->veb[i]) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
538 }
539 }
540 }
541
542 /**
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
550 *
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
556 **/
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
559 {
560 u64 new_data;
561
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
565 } else {
566 new_data = rd64(hw, loreg);
567 }
568 if (!offset_loaded)
569 *offset = new_data;
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
572 else
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
575 }
576
577 /**
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
584 **/
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
587 {
588 u32 new_data;
589
590 new_data = rd32(hw, reg);
591 if (!offset_loaded)
592 *offset = new_data;
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
595 else
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
597 }
598
599 /**
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
602 **/
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
604 {
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
610
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
613
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
627
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
644
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
662 }
663
664 /**
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
667 **/
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
669 {
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
676 int i, idx = 0;
677
678 idx = veb->stats_idx;
679 es = &veb->stats;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
683
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
705
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
739 }
740 veb->stat_offsets_loaded = true;
741 }
742
743 #ifdef I40E_FCOE
744 /**
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
747 **/
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
749 {
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
754 int idx;
755
756 if (vsi->type != I40E_VSI_FCOE)
757 return;
758
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
762
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
787
788 vsi->fcoe_stat_offsets_loaded = true;
789 }
790
791 #endif
792 /**
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
795 *
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
797 **/
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
799 {
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
803 u64 xoff = 0;
804
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
807 return;
808
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
813
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
816 return;
817
818 }
819
820 /**
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
823 *
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
825 **/
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
827 {
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
833 u16 i;
834 u8 tc;
835
836 dcb_cfg = &hw->local_dcbx_config;
837
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
841 return;
842 }
843
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
850
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
853 continue;
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
856 xoff[tc] = true;
857 }
858 }
859
860 /**
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
863 *
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
869 **/
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
871 {
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
878 struct i40e_ring *p;
879 u32 rx_page, rx_buf;
880 u64 bytes, packets;
881 unsigned int start;
882 u64 tx_linearize;
883 u64 rx_p, rx_b;
884 u64 tx_p, tx_b;
885 u16 q;
886
887 if (test_bit(__I40E_DOWN, &vsi->state) ||
888 test_bit(__I40E_CONFIG_BUSY, &pf->state))
889 return;
890
891 ns = i40e_get_vsi_stats_struct(vsi);
892 ons = &vsi->net_stats_offsets;
893 es = &vsi->eth_stats;
894 oes = &vsi->eth_stats_offsets;
895
896 /* Gather up the netdev and vsi stats that the driver collects
897 * on the fly during packet processing
898 */
899 rx_b = rx_p = 0;
900 tx_b = tx_p = 0;
901 tx_restart = tx_busy = tx_linearize = 0;
902 rx_page = 0;
903 rx_buf = 0;
904 rcu_read_lock();
905 for (q = 0; q < vsi->num_queue_pairs; q++) {
906 /* locate Tx ring */
907 p = ACCESS_ONCE(vsi->tx_rings[q]);
908
909 do {
910 start = u64_stats_fetch_begin_irq(&p->syncp);
911 packets = p->stats.packets;
912 bytes = p->stats.bytes;
913 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
914 tx_b += bytes;
915 tx_p += packets;
916 tx_restart += p->tx_stats.restart_queue;
917 tx_busy += p->tx_stats.tx_busy;
918 tx_linearize += p->tx_stats.tx_linearize;
919
920 /* Rx queue is part of the same block as Tx queue */
921 p = &p[1];
922 do {
923 start = u64_stats_fetch_begin_irq(&p->syncp);
924 packets = p->stats.packets;
925 bytes = p->stats.bytes;
926 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
927 rx_b += bytes;
928 rx_p += packets;
929 rx_buf += p->rx_stats.alloc_buff_failed;
930 rx_page += p->rx_stats.alloc_page_failed;
931 }
932 rcu_read_unlock();
933 vsi->tx_restart = tx_restart;
934 vsi->tx_busy = tx_busy;
935 vsi->tx_linearize = tx_linearize;
936 vsi->rx_page_failed = rx_page;
937 vsi->rx_buf_failed = rx_buf;
938
939 ns->rx_packets = rx_p;
940 ns->rx_bytes = rx_b;
941 ns->tx_packets = tx_p;
942 ns->tx_bytes = tx_b;
943
944 /* update netdev stats from eth stats */
945 i40e_update_eth_stats(vsi);
946 ons->tx_errors = oes->tx_errors;
947 ns->tx_errors = es->tx_errors;
948 ons->multicast = oes->rx_multicast;
949 ns->multicast = es->rx_multicast;
950 ons->rx_dropped = oes->rx_discards;
951 ns->rx_dropped = es->rx_discards;
952 ons->tx_dropped = oes->tx_discards;
953 ns->tx_dropped = es->tx_discards;
954
955 /* pull in a couple PF stats if this is the main vsi */
956 if (vsi == pf->vsi[pf->lan_vsi]) {
957 ns->rx_crc_errors = pf->stats.crc_errors;
958 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
959 ns->rx_length_errors = pf->stats.rx_length_errors;
960 }
961 }
962
963 /**
964 * i40e_update_pf_stats - Update the PF statistics counters.
965 * @pf: the PF to be updated
966 **/
967 static void i40e_update_pf_stats(struct i40e_pf *pf)
968 {
969 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
970 struct i40e_hw_port_stats *nsd = &pf->stats;
971 struct i40e_hw *hw = &pf->hw;
972 u32 val;
973 int i;
974
975 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
976 I40E_GLPRT_GORCL(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
979 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
980 I40E_GLPRT_GOTCL(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
983 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->eth.rx_discards,
986 &nsd->eth.rx_discards);
987 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
988 I40E_GLPRT_UPRCL(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->eth.rx_unicast,
991 &nsd->eth.rx_unicast);
992 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
993 I40E_GLPRT_MPRCL(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->eth.rx_multicast,
996 &nsd->eth.rx_multicast);
997 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
998 I40E_GLPRT_BPRCL(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->eth.rx_broadcast,
1001 &nsd->eth.rx_broadcast);
1002 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1003 I40E_GLPRT_UPTCL(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->eth.tx_unicast,
1006 &nsd->eth.tx_unicast);
1007 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1008 I40E_GLPRT_MPTCL(hw->port),
1009 pf->stat_offsets_loaded,
1010 &osd->eth.tx_multicast,
1011 &nsd->eth.tx_multicast);
1012 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1013 I40E_GLPRT_BPTCL(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->eth.tx_broadcast,
1016 &nsd->eth.tx_broadcast);
1017
1018 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->tx_dropped_link_down,
1021 &nsd->tx_dropped_link_down);
1022
1023 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->crc_errors, &nsd->crc_errors);
1026
1027 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->illegal_bytes, &nsd->illegal_bytes);
1030
1031 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->mac_local_faults,
1034 &nsd->mac_local_faults);
1035 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->mac_remote_faults,
1038 &nsd->mac_remote_faults);
1039
1040 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->rx_length_errors,
1043 &nsd->rx_length_errors);
1044
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_rx, &nsd->link_xon_rx);
1048 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->link_xon_tx, &nsd->link_xon_tx);
1051 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1052 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1055
1056 for (i = 0; i < 8; i++) {
1057 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1058 pf->stat_offsets_loaded,
1059 &osd->priority_xon_rx[i],
1060 &nsd->priority_xon_rx[i]);
1061 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1062 pf->stat_offsets_loaded,
1063 &osd->priority_xon_tx[i],
1064 &nsd->priority_xon_tx[i]);
1065 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1066 pf->stat_offsets_loaded,
1067 &osd->priority_xoff_tx[i],
1068 &nsd->priority_xoff_tx[i]);
1069 i40e_stat_update32(hw,
1070 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1071 pf->stat_offsets_loaded,
1072 &osd->priority_xon_2_xoff[i],
1073 &nsd->priority_xon_2_xoff[i]);
1074 }
1075
1076 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1077 I40E_GLPRT_PRC64L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_size_64, &nsd->rx_size_64);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1081 I40E_GLPRT_PRC127L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_127, &nsd->rx_size_127);
1084 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1085 I40E_GLPRT_PRC255L(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_size_255, &nsd->rx_size_255);
1088 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1089 I40E_GLPRT_PRC511L(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_size_511, &nsd->rx_size_511);
1092 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1093 I40E_GLPRT_PRC1023L(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_size_1023, &nsd->rx_size_1023);
1096 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1097 I40E_GLPRT_PRC1522L(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_size_1522, &nsd->rx_size_1522);
1100 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1101 I40E_GLPRT_PRC9522L(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_size_big, &nsd->rx_size_big);
1104
1105 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1106 I40E_GLPRT_PTC64L(hw->port),
1107 pf->stat_offsets_loaded,
1108 &osd->tx_size_64, &nsd->tx_size_64);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1110 I40E_GLPRT_PTC127L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_127, &nsd->tx_size_127);
1113 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1114 I40E_GLPRT_PTC255L(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->tx_size_255, &nsd->tx_size_255);
1117 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1118 I40E_GLPRT_PTC511L(hw->port),
1119 pf->stat_offsets_loaded,
1120 &osd->tx_size_511, &nsd->tx_size_511);
1121 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1122 I40E_GLPRT_PTC1023L(hw->port),
1123 pf->stat_offsets_loaded,
1124 &osd->tx_size_1023, &nsd->tx_size_1023);
1125 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1126 I40E_GLPRT_PTC1522L(hw->port),
1127 pf->stat_offsets_loaded,
1128 &osd->tx_size_1522, &nsd->tx_size_1522);
1129 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1130 I40E_GLPRT_PTC9522L(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->tx_size_big, &nsd->tx_size_big);
1133
1134 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_undersize, &nsd->rx_undersize);
1137 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_fragments, &nsd->rx_fragments);
1140 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_oversize, &nsd->rx_oversize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_jabber, &nsd->rx_jabber);
1146
1147 /* FDIR stats */
1148 i40e_stat_update32(hw,
1149 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1150 pf->stat_offsets_loaded,
1151 &osd->fd_atr_match, &nsd->fd_atr_match);
1152 i40e_stat_update32(hw,
1153 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1154 pf->stat_offsets_loaded,
1155 &osd->fd_sb_match, &nsd->fd_sb_match);
1156 i40e_stat_update32(hw,
1157 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1158 pf->stat_offsets_loaded,
1159 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1160
1161 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1162 nsd->tx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1165 nsd->rx_lpi_status =
1166 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1167 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1168 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1171 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1172 pf->stat_offsets_loaded,
1173 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1174
1175 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1176 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1177 nsd->fd_sb_status = true;
1178 else
1179 nsd->fd_sb_status = false;
1180
1181 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1183 nsd->fd_atr_status = true;
1184 else
1185 nsd->fd_atr_status = false;
1186
1187 pf->stat_offsets_loaded = true;
1188 }
1189
1190 /**
1191 * i40e_update_stats - Update the various statistics counters.
1192 * @vsi: the VSI to be updated
1193 *
1194 * Update the various stats for this VSI and its related entities.
1195 **/
1196 void i40e_update_stats(struct i40e_vsi *vsi)
1197 {
1198 struct i40e_pf *pf = vsi->back;
1199
1200 if (vsi == pf->vsi[pf->lan_vsi])
1201 i40e_update_pf_stats(pf);
1202
1203 i40e_update_vsi_stats(vsi);
1204 #ifdef I40E_FCOE
1205 i40e_update_fcoe_stats(vsi);
1206 #endif
1207 }
1208
1209 /**
1210 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1211 * @vsi: the VSI to be searched
1212 * @macaddr: the MAC address
1213 * @vlan: the vlan
1214 * @is_vf: make sure its a VF filter, else doesn't matter
1215 * @is_netdev: make sure its a netdev filter, else doesn't matter
1216 *
1217 * Returns ptr to the filter object or NULL
1218 **/
1219 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1220 u8 *macaddr, s16 vlan,
1221 bool is_vf, bool is_netdev)
1222 {
1223 struct i40e_mac_filter *f;
1224
1225 if (!vsi || !macaddr)
1226 return NULL;
1227
1228 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1229 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1230 (vlan == f->vlan) &&
1231 (!is_vf || f->is_vf) &&
1232 (!is_netdev || f->is_netdev))
1233 return f;
1234 }
1235 return NULL;
1236 }
1237
1238 /**
1239 * i40e_find_mac - Find a mac addr in the macvlan filters list
1240 * @vsi: the VSI to be searched
1241 * @macaddr: the MAC address we are searching for
1242 * @is_vf: make sure its a VF filter, else doesn't matter
1243 * @is_netdev: make sure its a netdev filter, else doesn't matter
1244 *
1245 * Returns the first filter with the provided MAC address or NULL if
1246 * MAC address was not found
1247 **/
1248 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1249 bool is_vf, bool is_netdev)
1250 {
1251 struct i40e_mac_filter *f;
1252
1253 if (!vsi || !macaddr)
1254 return NULL;
1255
1256 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1257 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1258 (!is_vf || f->is_vf) &&
1259 (!is_netdev || f->is_netdev))
1260 return f;
1261 }
1262 return NULL;
1263 }
1264
1265 /**
1266 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1267 * @vsi: the VSI to be searched
1268 *
1269 * Returns true if VSI is in vlan mode or false otherwise
1270 **/
1271 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1272 {
1273 struct i40e_mac_filter *f;
1274
1275 /* Only -1 for all the filters denotes not in vlan mode
1276 * so we have to go through all the list in order to make sure
1277 */
1278 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1279 if (f->vlan >= 0 || vsi->info.pvid)
1280 return true;
1281 }
1282
1283 return false;
1284 }
1285
1286 /**
1287 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1288 * @vsi: the VSI to be searched
1289 * @macaddr: the mac address to be filtered
1290 * @is_vf: true if it is a VF
1291 * @is_netdev: true if it is a netdev
1292 *
1293 * Goes through all the macvlan filters and adds a
1294 * macvlan filter for each unique vlan that already exists
1295 *
1296 * Returns first filter found on success, else NULL
1297 **/
1298 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1299 bool is_vf, bool is_netdev)
1300 {
1301 struct i40e_mac_filter *f;
1302
1303 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1304 if (vsi->info.pvid)
1305 f->vlan = le16_to_cpu(vsi->info.pvid);
1306 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1307 is_vf, is_netdev)) {
1308 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1309 is_vf, is_netdev))
1310 return NULL;
1311 }
1312 }
1313
1314 return list_first_entry_or_null(&vsi->mac_filter_list,
1315 struct i40e_mac_filter, list);
1316 }
1317
1318 /**
1319 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1320 * @vsi: the PF Main VSI - inappropriate for any other VSI
1321 * @macaddr: the MAC address
1322 *
1323 * Some older firmware configurations set up a default promiscuous VLAN
1324 * filter that needs to be removed.
1325 **/
1326 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1327 {
1328 struct i40e_aqc_remove_macvlan_element_data element;
1329 struct i40e_pf *pf = vsi->back;
1330 i40e_status ret;
1331
1332 /* Only appropriate for the PF main VSI */
1333 if (vsi->type != I40E_VSI_MAIN)
1334 return -EINVAL;
1335
1336 memset(&element, 0, sizeof(element));
1337 ether_addr_copy(element.mac_addr, macaddr);
1338 element.vlan_tag = 0;
1339 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1340 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1341 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1342 if (ret)
1343 return -ENOENT;
1344
1345 return 0;
1346 }
1347
1348 /**
1349 * i40e_add_filter - Add a mac/vlan filter to the VSI
1350 * @vsi: the VSI to be searched
1351 * @macaddr: the MAC address
1352 * @vlan: the vlan
1353 * @is_vf: make sure its a VF filter, else doesn't matter
1354 * @is_netdev: make sure its a netdev filter, else doesn't matter
1355 *
1356 * Returns ptr to the filter object or NULL when no memory available.
1357 **/
1358 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1359 u8 *macaddr, s16 vlan,
1360 bool is_vf, bool is_netdev)
1361 {
1362 struct i40e_mac_filter *f;
1363
1364 if (!vsi || !macaddr)
1365 return NULL;
1366
1367 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1368 if (!f) {
1369 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1370 if (!f)
1371 goto add_filter_out;
1372
1373 ether_addr_copy(f->macaddr, macaddr);
1374 f->vlan = vlan;
1375 f->changed = true;
1376
1377 INIT_LIST_HEAD(&f->list);
1378 list_add(&f->list, &vsi->mac_filter_list);
1379 }
1380
1381 /* increment counter and add a new flag if needed */
1382 if (is_vf) {
1383 if (!f->is_vf) {
1384 f->is_vf = true;
1385 f->counter++;
1386 }
1387 } else if (is_netdev) {
1388 if (!f->is_netdev) {
1389 f->is_netdev = true;
1390 f->counter++;
1391 }
1392 } else {
1393 f->counter++;
1394 }
1395
1396 /* changed tells sync_filters_subtask to
1397 * push the filter down to the firmware
1398 */
1399 if (f->changed) {
1400 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1401 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1402 }
1403
1404 add_filter_out:
1405 return f;
1406 }
1407
1408 /**
1409 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1410 * @vsi: the VSI to be searched
1411 * @macaddr: the MAC address
1412 * @vlan: the vlan
1413 * @is_vf: make sure it's a VF filter, else doesn't matter
1414 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1415 **/
1416 void i40e_del_filter(struct i40e_vsi *vsi,
1417 u8 *macaddr, s16 vlan,
1418 bool is_vf, bool is_netdev)
1419 {
1420 struct i40e_mac_filter *f;
1421
1422 if (!vsi || !macaddr)
1423 return;
1424
1425 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1426 if (!f || f->counter == 0)
1427 return;
1428
1429 if (is_vf) {
1430 if (f->is_vf) {
1431 f->is_vf = false;
1432 f->counter--;
1433 }
1434 } else if (is_netdev) {
1435 if (f->is_netdev) {
1436 f->is_netdev = false;
1437 f->counter--;
1438 }
1439 } else {
1440 /* make sure we don't remove a filter in use by VF or netdev */
1441 int min_f = 0;
1442 min_f += (f->is_vf ? 1 : 0);
1443 min_f += (f->is_netdev ? 1 : 0);
1444
1445 if (f->counter > min_f)
1446 f->counter--;
1447 }
1448
1449 /* counter == 0 tells sync_filters_subtask to
1450 * remove the filter from the firmware's list
1451 */
1452 if (f->counter == 0) {
1453 f->changed = true;
1454 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1455 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1456 }
1457 }
1458
1459 /**
1460 * i40e_set_mac - NDO callback to set mac address
1461 * @netdev: network interface device structure
1462 * @p: pointer to an address structure
1463 *
1464 * Returns 0 on success, negative on failure
1465 **/
1466 #ifdef I40E_FCOE
1467 int i40e_set_mac(struct net_device *netdev, void *p)
1468 #else
1469 static int i40e_set_mac(struct net_device *netdev, void *p)
1470 #endif
1471 {
1472 struct i40e_netdev_priv *np = netdev_priv(netdev);
1473 struct i40e_vsi *vsi = np->vsi;
1474 struct i40e_pf *pf = vsi->back;
1475 struct i40e_hw *hw = &pf->hw;
1476 struct sockaddr *addr = p;
1477 struct i40e_mac_filter *f;
1478
1479 if (!is_valid_ether_addr(addr->sa_data))
1480 return -EADDRNOTAVAIL;
1481
1482 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1483 netdev_info(netdev, "already using mac address %pM\n",
1484 addr->sa_data);
1485 return 0;
1486 }
1487
1488 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1489 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1490 return -EADDRNOTAVAIL;
1491
1492 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1493 netdev_info(netdev, "returning to hw mac address %pM\n",
1494 hw->mac.addr);
1495 else
1496 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1497
1498 if (vsi->type == I40E_VSI_MAIN) {
1499 i40e_status ret;
1500 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1501 I40E_AQC_WRITE_TYPE_LAA_WOL,
1502 addr->sa_data, NULL);
1503 if (ret) {
1504 netdev_info(netdev,
1505 "Addr change for Main VSI failed: %d\n",
1506 ret);
1507 return -EADDRNOTAVAIL;
1508 }
1509 }
1510
1511 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1512 struct i40e_aqc_remove_macvlan_element_data element;
1513
1514 memset(&element, 0, sizeof(element));
1515 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1516 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1517 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1518 } else {
1519 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 false, false);
1521 }
1522
1523 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1524 struct i40e_aqc_add_macvlan_element_data element;
1525
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, hw->mac.addr);
1528 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1529 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1530 } else {
1531 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1532 false, false);
1533 if (f)
1534 f->is_laa = true;
1535 }
1536
1537 i40e_sync_vsi_filters(vsi, false);
1538 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1539
1540 return 0;
1541 }
1542
1543 /**
1544 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1545 * @vsi: the VSI being setup
1546 * @ctxt: VSI context structure
1547 * @enabled_tc: Enabled TCs bitmap
1548 * @is_add: True if called before Add VSI
1549 *
1550 * Setup VSI queue mapping for enabled traffic classes.
1551 **/
1552 #ifdef I40E_FCOE
1553 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1554 struct i40e_vsi_context *ctxt,
1555 u8 enabled_tc,
1556 bool is_add)
1557 #else
1558 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1559 struct i40e_vsi_context *ctxt,
1560 u8 enabled_tc,
1561 bool is_add)
1562 #endif
1563 {
1564 struct i40e_pf *pf = vsi->back;
1565 u16 sections = 0;
1566 u8 netdev_tc = 0;
1567 u16 numtc = 0;
1568 u16 qcount;
1569 u8 offset;
1570 u16 qmap;
1571 int i;
1572 u16 num_tc_qps = 0;
1573
1574 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1575 offset = 0;
1576
1577 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1578 /* Find numtc from enabled TC bitmap */
1579 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1580 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1581 numtc++;
1582 }
1583 if (!numtc) {
1584 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1585 numtc = 1;
1586 }
1587 } else {
1588 /* At least TC0 is enabled in case of non-DCB case */
1589 numtc = 1;
1590 }
1591
1592 vsi->tc_config.numtc = numtc;
1593 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1594 /* Number of queues per enabled TC */
1595 /* In MFP case we can have a much lower count of MSIx
1596 * vectors available and so we need to lower the used
1597 * q count.
1598 */
1599 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1600 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1601 else
1602 qcount = vsi->alloc_queue_pairs;
1603 num_tc_qps = qcount / numtc;
1604 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1605
1606 /* Setup queue offset/count for all TCs for given VSI */
1607 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1608 /* See if the given TC is enabled for the given VSI */
1609 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1610 /* TC is enabled */
1611 int pow, num_qps;
1612
1613 switch (vsi->type) {
1614 case I40E_VSI_MAIN:
1615 qcount = min_t(int, pf->rss_size, num_tc_qps);
1616 break;
1617 #ifdef I40E_FCOE
1618 case I40E_VSI_FCOE:
1619 qcount = num_tc_qps;
1620 break;
1621 #endif
1622 case I40E_VSI_FDIR:
1623 case I40E_VSI_SRIOV:
1624 case I40E_VSI_VMDQ2:
1625 default:
1626 qcount = num_tc_qps;
1627 WARN_ON(i != 0);
1628 break;
1629 }
1630 vsi->tc_config.tc_info[i].qoffset = offset;
1631 vsi->tc_config.tc_info[i].qcount = qcount;
1632
1633 /* find the next higher power-of-2 of num queue pairs */
1634 num_qps = qcount;
1635 pow = 0;
1636 while (num_qps && (BIT_ULL(pow) < qcount)) {
1637 pow++;
1638 num_qps >>= 1;
1639 }
1640
1641 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1642 qmap =
1643 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1644 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1645
1646 offset += qcount;
1647 } else {
1648 /* TC is not enabled so set the offset to
1649 * default queue and allocate one queue
1650 * for the given TC.
1651 */
1652 vsi->tc_config.tc_info[i].qoffset = 0;
1653 vsi->tc_config.tc_info[i].qcount = 1;
1654 vsi->tc_config.tc_info[i].netdev_tc = 0;
1655
1656 qmap = 0;
1657 }
1658 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1659 }
1660
1661 /* Set actual Tx/Rx queue pairs */
1662 vsi->num_queue_pairs = offset;
1663 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1664 if (vsi->req_queue_pairs > 0)
1665 vsi->num_queue_pairs = vsi->req_queue_pairs;
1666 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1667 vsi->num_queue_pairs = pf->num_lan_msix;
1668 }
1669
1670 /* Scheduler section valid can only be set for ADD VSI */
1671 if (is_add) {
1672 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1673
1674 ctxt->info.up_enable_bits = enabled_tc;
1675 }
1676 if (vsi->type == I40E_VSI_SRIOV) {
1677 ctxt->info.mapping_flags |=
1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1679 for (i = 0; i < vsi->num_queue_pairs; i++)
1680 ctxt->info.queue_mapping[i] =
1681 cpu_to_le16(vsi->base_queue + i);
1682 } else {
1683 ctxt->info.mapping_flags |=
1684 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1685 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1686 }
1687 ctxt->info.valid_sections |= cpu_to_le16(sections);
1688 }
1689
1690 /**
1691 * i40e_set_rx_mode - NDO callback to set the netdev filters
1692 * @netdev: network interface device structure
1693 **/
1694 #ifdef I40E_FCOE
1695 void i40e_set_rx_mode(struct net_device *netdev)
1696 #else
1697 static void i40e_set_rx_mode(struct net_device *netdev)
1698 #endif
1699 {
1700 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 struct i40e_mac_filter *f, *ftmp;
1702 struct i40e_vsi *vsi = np->vsi;
1703 struct netdev_hw_addr *uca;
1704 struct netdev_hw_addr *mca;
1705 struct netdev_hw_addr *ha;
1706
1707 /* add addr if not already in the filter list */
1708 netdev_for_each_uc_addr(uca, netdev) {
1709 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1710 if (i40e_is_vsi_in_vlan(vsi))
1711 i40e_put_mac_in_vlan(vsi, uca->addr,
1712 false, true);
1713 else
1714 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1715 false, true);
1716 }
1717 }
1718
1719 netdev_for_each_mc_addr(mca, netdev) {
1720 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1721 if (i40e_is_vsi_in_vlan(vsi))
1722 i40e_put_mac_in_vlan(vsi, mca->addr,
1723 false, true);
1724 else
1725 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1726 false, true);
1727 }
1728 }
1729
1730 /* remove filter if not in netdev list */
1731 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1732
1733 if (!f->is_netdev)
1734 continue;
1735
1736 netdev_for_each_mc_addr(mca, netdev)
1737 if (ether_addr_equal(mca->addr, f->macaddr))
1738 goto bottom_of_search_loop;
1739
1740 netdev_for_each_uc_addr(uca, netdev)
1741 if (ether_addr_equal(uca->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1743
1744 for_each_dev_addr(netdev, ha)
1745 if (ether_addr_equal(ha->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1747
1748 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1749 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1750
1751 bottom_of_search_loop:
1752 continue;
1753 }
1754
1755 /* check for other flag changes */
1756 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1757 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1758 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1759 }
1760 }
1761
1762 /**
1763 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1764 * @vsi: ptr to the VSI
1765 * @grab_rtnl: whether RTNL needs to be grabbed
1766 *
1767 * Push any outstanding VSI filter changes through the AdminQ.
1768 *
1769 * Returns 0 or error value
1770 **/
1771 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1772 {
1773 struct i40e_mac_filter *f, *ftmp;
1774 bool promisc_forced_on = false;
1775 bool add_happened = false;
1776 int filter_list_len = 0;
1777 u32 changed_flags = 0;
1778 i40e_status ret = 0;
1779 struct i40e_pf *pf;
1780 int num_add = 0;
1781 int num_del = 0;
1782 int aq_err = 0;
1783 u16 cmd_flags;
1784
1785 /* empty array typed pointers, kcalloc later */
1786 struct i40e_aqc_add_macvlan_element_data *add_list;
1787 struct i40e_aqc_remove_macvlan_element_data *del_list;
1788
1789 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1790 usleep_range(1000, 2000);
1791 pf = vsi->back;
1792
1793 if (vsi->netdev) {
1794 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1795 vsi->current_netdev_flags = vsi->netdev->flags;
1796 }
1797
1798 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1799 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1800
1801 filter_list_len = pf->hw.aq.asq_buf_size /
1802 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1803 del_list = kcalloc(filter_list_len,
1804 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1805 GFP_KERNEL);
1806 if (!del_list)
1807 return -ENOMEM;
1808
1809 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1810 if (!f->changed)
1811 continue;
1812
1813 if (f->counter != 0)
1814 continue;
1815 f->changed = false;
1816 cmd_flags = 0;
1817
1818 /* add to delete list */
1819 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1820 del_list[num_del].vlan_tag =
1821 cpu_to_le16((u16)(f->vlan ==
1822 I40E_VLAN_ANY ? 0 : f->vlan));
1823
1824 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1825 del_list[num_del].flags = cmd_flags;
1826 num_del++;
1827
1828 /* unlink from filter list */
1829 list_del(&f->list);
1830 kfree(f);
1831
1832 /* flush a full buffer */
1833 if (num_del == filter_list_len) {
1834 ret = i40e_aq_remove_macvlan(&pf->hw,
1835 vsi->seid, del_list, num_del,
1836 NULL);
1837 aq_err = pf->hw.aq.asq_last_status;
1838 num_del = 0;
1839 memset(del_list, 0, sizeof(*del_list));
1840
1841 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1842 dev_info(&pf->pdev->dev,
1843 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1844 i40e_stat_str(&pf->hw, ret),
1845 i40e_aq_str(&pf->hw, aq_err));
1846 }
1847 }
1848 if (num_del) {
1849 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1850 del_list, num_del, NULL);
1851 aq_err = pf->hw.aq.asq_last_status;
1852 num_del = 0;
1853
1854 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1855 dev_info(&pf->pdev->dev,
1856 "ignoring delete macvlan error, err %s aq_err %s\n",
1857 i40e_stat_str(&pf->hw, ret),
1858 i40e_aq_str(&pf->hw, aq_err));
1859 }
1860
1861 kfree(del_list);
1862 del_list = NULL;
1863
1864 /* do all the adds now */
1865 filter_list_len = pf->hw.aq.asq_buf_size /
1866 sizeof(struct i40e_aqc_add_macvlan_element_data),
1867 add_list = kcalloc(filter_list_len,
1868 sizeof(struct i40e_aqc_add_macvlan_element_data),
1869 GFP_KERNEL);
1870 if (!add_list)
1871 return -ENOMEM;
1872
1873 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1874 if (!f->changed)
1875 continue;
1876
1877 if (f->counter == 0)
1878 continue;
1879 f->changed = false;
1880 add_happened = true;
1881 cmd_flags = 0;
1882
1883 /* add to add array */
1884 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1885 add_list[num_add].vlan_tag =
1886 cpu_to_le16(
1887 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1888 add_list[num_add].queue_number = 0;
1889
1890 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1891 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1892 num_add++;
1893
1894 /* flush a full buffer */
1895 if (num_add == filter_list_len) {
1896 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1897 add_list, num_add,
1898 NULL);
1899 aq_err = pf->hw.aq.asq_last_status;
1900 num_add = 0;
1901
1902 if (ret)
1903 break;
1904 memset(add_list, 0, sizeof(*add_list));
1905 }
1906 }
1907 if (num_add) {
1908 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1909 add_list, num_add, NULL);
1910 aq_err = pf->hw.aq.asq_last_status;
1911 num_add = 0;
1912 }
1913 kfree(add_list);
1914 add_list = NULL;
1915
1916 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1917 dev_info(&pf->pdev->dev,
1918 "add filter failed, err %s aq_err %s\n",
1919 i40e_stat_str(&pf->hw, ret),
1920 i40e_aq_str(&pf->hw, aq_err));
1921 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1922 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1923 &vsi->state)) {
1924 promisc_forced_on = true;
1925 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1926 &vsi->state);
1927 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1928 }
1929 }
1930 }
1931
1932 /* check for changes in promiscuous modes */
1933 if (changed_flags & IFF_ALLMULTI) {
1934 bool cur_multipromisc;
1935 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1936 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1937 vsi->seid,
1938 cur_multipromisc,
1939 NULL);
1940 if (ret)
1941 dev_info(&pf->pdev->dev,
1942 "set multi promisc failed, err %s aq_err %s\n",
1943 i40e_stat_str(&pf->hw, ret),
1944 i40e_aq_str(&pf->hw,
1945 pf->hw.aq.asq_last_status));
1946 }
1947 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1948 bool cur_promisc;
1949 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1950 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1951 &vsi->state));
1952 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1953 /* set defport ON for Main VSI instead of true promisc
1954 * this way we will get all unicast/multicast and VLAN
1955 * promisc behavior but will not get VF or VMDq traffic
1956 * replicated on the Main VSI.
1957 */
1958 if (pf->cur_promisc != cur_promisc) {
1959 pf->cur_promisc = cur_promisc;
1960 if (grab_rtnl)
1961 i40e_do_reset_safe(pf,
1962 BIT(__I40E_PF_RESET_REQUESTED));
1963 else
1964 i40e_do_reset(pf,
1965 BIT(__I40E_PF_RESET_REQUESTED));
1966 }
1967 } else {
1968 ret = i40e_aq_set_vsi_unicast_promiscuous(
1969 &vsi->back->hw,
1970 vsi->seid,
1971 cur_promisc, NULL);
1972 if (ret)
1973 dev_info(&pf->pdev->dev,
1974 "set unicast promisc failed, err %d, aq_err %d\n",
1975 ret, pf->hw.aq.asq_last_status);
1976 ret = i40e_aq_set_vsi_multicast_promiscuous(
1977 &vsi->back->hw,
1978 vsi->seid,
1979 cur_promisc, NULL);
1980 if (ret)
1981 dev_info(&pf->pdev->dev,
1982 "set multicast promisc failed, err %d, aq_err %d\n",
1983 ret, pf->hw.aq.asq_last_status);
1984 }
1985 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1986 vsi->seid,
1987 cur_promisc, NULL);
1988 if (ret)
1989 dev_info(&pf->pdev->dev,
1990 "set brdcast promisc failed, err %s, aq_err %s\n",
1991 i40e_stat_str(&pf->hw, ret),
1992 i40e_aq_str(&pf->hw,
1993 pf->hw.aq.asq_last_status));
1994 }
1995
1996 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1997 return 0;
1998 }
1999
2000 /**
2001 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2002 * @pf: board private structure
2003 **/
2004 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2005 {
2006 int v;
2007
2008 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2009 return;
2010 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2011
2012 for (v = 0; v < pf->num_alloc_vsi; v++) {
2013 if (pf->vsi[v] &&
2014 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2015 i40e_sync_vsi_filters(pf->vsi[v], true);
2016 }
2017 }
2018
2019 /**
2020 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2021 * @netdev: network interface device structure
2022 * @new_mtu: new value for maximum frame size
2023 *
2024 * Returns 0 on success, negative on failure
2025 **/
2026 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2027 {
2028 struct i40e_netdev_priv *np = netdev_priv(netdev);
2029 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2030 struct i40e_vsi *vsi = np->vsi;
2031
2032 /* MTU < 68 is an error and causes problems on some kernels */
2033 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2034 return -EINVAL;
2035
2036 netdev_info(netdev, "changing MTU from %d to %d\n",
2037 netdev->mtu, new_mtu);
2038 netdev->mtu = new_mtu;
2039 if (netif_running(netdev))
2040 i40e_vsi_reinit_locked(vsi);
2041
2042 return 0;
2043 }
2044
2045 /**
2046 * i40e_ioctl - Access the hwtstamp interface
2047 * @netdev: network interface device structure
2048 * @ifr: interface request data
2049 * @cmd: ioctl command
2050 **/
2051 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2052 {
2053 struct i40e_netdev_priv *np = netdev_priv(netdev);
2054 struct i40e_pf *pf = np->vsi->back;
2055
2056 switch (cmd) {
2057 case SIOCGHWTSTAMP:
2058 return i40e_ptp_get_ts_config(pf, ifr);
2059 case SIOCSHWTSTAMP:
2060 return i40e_ptp_set_ts_config(pf, ifr);
2061 default:
2062 return -EOPNOTSUPP;
2063 }
2064 }
2065
2066 /**
2067 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2068 * @vsi: the vsi being adjusted
2069 **/
2070 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2071 {
2072 struct i40e_vsi_context ctxt;
2073 i40e_status ret;
2074
2075 if ((vsi->info.valid_sections &
2076 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2077 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2078 return; /* already enabled */
2079
2080 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2081 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2082 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2083
2084 ctxt.seid = vsi->seid;
2085 ctxt.info = vsi->info;
2086 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2087 if (ret) {
2088 dev_info(&vsi->back->pdev->dev,
2089 "update vlan stripping failed, err %s aq_err %s\n",
2090 i40e_stat_str(&vsi->back->hw, ret),
2091 i40e_aq_str(&vsi->back->hw,
2092 vsi->back->hw.aq.asq_last_status));
2093 }
2094 }
2095
2096 /**
2097 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2098 * @vsi: the vsi being adjusted
2099 **/
2100 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2101 {
2102 struct i40e_vsi_context ctxt;
2103 i40e_status ret;
2104
2105 if ((vsi->info.valid_sections &
2106 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2107 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2108 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2109 return; /* already disabled */
2110
2111 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2112 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2113 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2114
2115 ctxt.seid = vsi->seid;
2116 ctxt.info = vsi->info;
2117 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2118 if (ret) {
2119 dev_info(&vsi->back->pdev->dev,
2120 "update vlan stripping failed, err %s aq_err %s\n",
2121 i40e_stat_str(&vsi->back->hw, ret),
2122 i40e_aq_str(&vsi->back->hw,
2123 vsi->back->hw.aq.asq_last_status));
2124 }
2125 }
2126
2127 /**
2128 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2129 * @netdev: network interface to be adjusted
2130 * @features: netdev features to test if VLAN offload is enabled or not
2131 **/
2132 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2133 {
2134 struct i40e_netdev_priv *np = netdev_priv(netdev);
2135 struct i40e_vsi *vsi = np->vsi;
2136
2137 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2138 i40e_vlan_stripping_enable(vsi);
2139 else
2140 i40e_vlan_stripping_disable(vsi);
2141 }
2142
2143 /**
2144 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2145 * @vsi: the vsi being configured
2146 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2147 **/
2148 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2149 {
2150 struct i40e_mac_filter *f, *add_f;
2151 bool is_netdev, is_vf;
2152
2153 is_vf = (vsi->type == I40E_VSI_SRIOV);
2154 is_netdev = !!(vsi->netdev);
2155
2156 if (is_netdev) {
2157 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2158 is_vf, is_netdev);
2159 if (!add_f) {
2160 dev_info(&vsi->back->pdev->dev,
2161 "Could not add vlan filter %d for %pM\n",
2162 vid, vsi->netdev->dev_addr);
2163 return -ENOMEM;
2164 }
2165 }
2166
2167 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2168 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2169 if (!add_f) {
2170 dev_info(&vsi->back->pdev->dev,
2171 "Could not add vlan filter %d for %pM\n",
2172 vid, f->macaddr);
2173 return -ENOMEM;
2174 }
2175 }
2176
2177 /* Now if we add a vlan tag, make sure to check if it is the first
2178 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2179 * with 0, so we now accept untagged and specified tagged traffic
2180 * (and not any taged and untagged)
2181 */
2182 if (vid > 0) {
2183 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2184 I40E_VLAN_ANY,
2185 is_vf, is_netdev)) {
2186 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2187 I40E_VLAN_ANY, is_vf, is_netdev);
2188 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2189 is_vf, is_netdev);
2190 if (!add_f) {
2191 dev_info(&vsi->back->pdev->dev,
2192 "Could not add filter 0 for %pM\n",
2193 vsi->netdev->dev_addr);
2194 return -ENOMEM;
2195 }
2196 }
2197 }
2198
2199 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2200 if (vid > 0 && !vsi->info.pvid) {
2201 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2202 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2203 is_vf, is_netdev)) {
2204 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2205 is_vf, is_netdev);
2206 add_f = i40e_add_filter(vsi, f->macaddr,
2207 0, is_vf, is_netdev);
2208 if (!add_f) {
2209 dev_info(&vsi->back->pdev->dev,
2210 "Could not add filter 0 for %pM\n",
2211 f->macaddr);
2212 return -ENOMEM;
2213 }
2214 }
2215 }
2216 }
2217
2218 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2219 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2220 return 0;
2221
2222 return i40e_sync_vsi_filters(vsi, false);
2223 }
2224
2225 /**
2226 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2227 * @vsi: the vsi being configured
2228 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2229 *
2230 * Return: 0 on success or negative otherwise
2231 **/
2232 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2233 {
2234 struct net_device *netdev = vsi->netdev;
2235 struct i40e_mac_filter *f, *add_f;
2236 bool is_vf, is_netdev;
2237 int filter_count = 0;
2238
2239 is_vf = (vsi->type == I40E_VSI_SRIOV);
2240 is_netdev = !!(netdev);
2241
2242 if (is_netdev)
2243 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2244
2245 list_for_each_entry(f, &vsi->mac_filter_list, list)
2246 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2247
2248 /* go through all the filters for this VSI and if there is only
2249 * vid == 0 it means there are no other filters, so vid 0 must
2250 * be replaced with -1. This signifies that we should from now
2251 * on accept any traffic (with any tag present, or untagged)
2252 */
2253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2254 if (is_netdev) {
2255 if (f->vlan &&
2256 ether_addr_equal(netdev->dev_addr, f->macaddr))
2257 filter_count++;
2258 }
2259
2260 if (f->vlan)
2261 filter_count++;
2262 }
2263
2264 if (!filter_count && is_netdev) {
2265 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2266 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2267 is_vf, is_netdev);
2268 if (!f) {
2269 dev_info(&vsi->back->pdev->dev,
2270 "Could not add filter %d for %pM\n",
2271 I40E_VLAN_ANY, netdev->dev_addr);
2272 return -ENOMEM;
2273 }
2274 }
2275
2276 if (!filter_count) {
2277 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2278 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2279 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2280 is_vf, is_netdev);
2281 if (!add_f) {
2282 dev_info(&vsi->back->pdev->dev,
2283 "Could not add filter %d for %pM\n",
2284 I40E_VLAN_ANY, f->macaddr);
2285 return -ENOMEM;
2286 }
2287 }
2288 }
2289
2290 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2291 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2292 return 0;
2293
2294 return i40e_sync_vsi_filters(vsi, false);
2295 }
2296
2297 /**
2298 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2299 * @netdev: network interface to be adjusted
2300 * @vid: vlan id to be added
2301 *
2302 * net_device_ops implementation for adding vlan ids
2303 **/
2304 #ifdef I40E_FCOE
2305 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2306 __always_unused __be16 proto, u16 vid)
2307 #else
2308 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2309 __always_unused __be16 proto, u16 vid)
2310 #endif
2311 {
2312 struct i40e_netdev_priv *np = netdev_priv(netdev);
2313 struct i40e_vsi *vsi = np->vsi;
2314 int ret = 0;
2315
2316 if (vid > 4095)
2317 return -EINVAL;
2318
2319 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2320
2321 /* If the network stack called us with vid = 0 then
2322 * it is asking to receive priority tagged packets with
2323 * vlan id 0. Our HW receives them by default when configured
2324 * to receive untagged packets so there is no need to add an
2325 * extra filter for vlan 0 tagged packets.
2326 */
2327 if (vid)
2328 ret = i40e_vsi_add_vlan(vsi, vid);
2329
2330 if (!ret && (vid < VLAN_N_VID))
2331 set_bit(vid, vsi->active_vlans);
2332
2333 return ret;
2334 }
2335
2336 /**
2337 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2338 * @netdev: network interface to be adjusted
2339 * @vid: vlan id to be removed
2340 *
2341 * net_device_ops implementation for removing vlan ids
2342 **/
2343 #ifdef I40E_FCOE
2344 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2345 __always_unused __be16 proto, u16 vid)
2346 #else
2347 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2348 __always_unused __be16 proto, u16 vid)
2349 #endif
2350 {
2351 struct i40e_netdev_priv *np = netdev_priv(netdev);
2352 struct i40e_vsi *vsi = np->vsi;
2353
2354 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2355
2356 /* return code is ignored as there is nothing a user
2357 * can do about failure to remove and a log message was
2358 * already printed from the other function
2359 */
2360 i40e_vsi_kill_vlan(vsi, vid);
2361
2362 clear_bit(vid, vsi->active_vlans);
2363
2364 return 0;
2365 }
2366
2367 /**
2368 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2369 * @vsi: the vsi being brought back up
2370 **/
2371 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2372 {
2373 u16 vid;
2374
2375 if (!vsi->netdev)
2376 return;
2377
2378 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2379
2380 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2381 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2382 vid);
2383 }
2384
2385 /**
2386 * i40e_vsi_add_pvid - Add pvid for the VSI
2387 * @vsi: the vsi being adjusted
2388 * @vid: the vlan id to set as a PVID
2389 **/
2390 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2391 {
2392 struct i40e_vsi_context ctxt;
2393 i40e_status ret;
2394
2395 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2396 vsi->info.pvid = cpu_to_le16(vid);
2397 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2398 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2399 I40E_AQ_VSI_PVLAN_EMOD_STR;
2400
2401 ctxt.seid = vsi->seid;
2402 ctxt.info = vsi->info;
2403 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2404 if (ret) {
2405 dev_info(&vsi->back->pdev->dev,
2406 "add pvid failed, err %s aq_err %s\n",
2407 i40e_stat_str(&vsi->back->hw, ret),
2408 i40e_aq_str(&vsi->back->hw,
2409 vsi->back->hw.aq.asq_last_status));
2410 return -ENOENT;
2411 }
2412
2413 return 0;
2414 }
2415
2416 /**
2417 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2418 * @vsi: the vsi being adjusted
2419 *
2420 * Just use the vlan_rx_register() service to put it back to normal
2421 **/
2422 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2423 {
2424 i40e_vlan_stripping_disable(vsi);
2425
2426 vsi->info.pvid = 0;
2427 }
2428
2429 /**
2430 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2431 * @vsi: ptr to the VSI
2432 *
2433 * If this function returns with an error, then it's possible one or
2434 * more of the rings is populated (while the rest are not). It is the
2435 * callers duty to clean those orphaned rings.
2436 *
2437 * Return 0 on success, negative on failure
2438 **/
2439 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2440 {
2441 int i, err = 0;
2442
2443 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2444 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2445
2446 return err;
2447 }
2448
2449 /**
2450 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2451 * @vsi: ptr to the VSI
2452 *
2453 * Free VSI's transmit software resources
2454 **/
2455 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2456 {
2457 int i;
2458
2459 if (!vsi->tx_rings)
2460 return;
2461
2462 for (i = 0; i < vsi->num_queue_pairs; i++)
2463 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2464 i40e_free_tx_resources(vsi->tx_rings[i]);
2465 }
2466
2467 /**
2468 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2469 * @vsi: ptr to the VSI
2470 *
2471 * If this function returns with an error, then it's possible one or
2472 * more of the rings is populated (while the rest are not). It is the
2473 * callers duty to clean those orphaned rings.
2474 *
2475 * Return 0 on success, negative on failure
2476 **/
2477 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2478 {
2479 int i, err = 0;
2480
2481 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2482 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2483 #ifdef I40E_FCOE
2484 i40e_fcoe_setup_ddp_resources(vsi);
2485 #endif
2486 return err;
2487 }
2488
2489 /**
2490 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2491 * @vsi: ptr to the VSI
2492 *
2493 * Free all receive software resources
2494 **/
2495 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2496 {
2497 int i;
2498
2499 if (!vsi->rx_rings)
2500 return;
2501
2502 for (i = 0; i < vsi->num_queue_pairs; i++)
2503 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2504 i40e_free_rx_resources(vsi->rx_rings[i]);
2505 #ifdef I40E_FCOE
2506 i40e_fcoe_free_ddp_resources(vsi);
2507 #endif
2508 }
2509
2510 /**
2511 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2512 * @ring: The Tx ring to configure
2513 *
2514 * This enables/disables XPS for a given Tx descriptor ring
2515 * based on the TCs enabled for the VSI that ring belongs to.
2516 **/
2517 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2518 {
2519 struct i40e_vsi *vsi = ring->vsi;
2520 cpumask_var_t mask;
2521
2522 if (!ring->q_vector || !ring->netdev)
2523 return;
2524
2525 /* Single TC mode enable XPS */
2526 if (vsi->tc_config.numtc <= 1) {
2527 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2528 netif_set_xps_queue(ring->netdev,
2529 &ring->q_vector->affinity_mask,
2530 ring->queue_index);
2531 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2532 /* Disable XPS to allow selection based on TC */
2533 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2534 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2535 free_cpumask_var(mask);
2536 }
2537 }
2538
2539 /**
2540 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2541 * @ring: The Tx ring to configure
2542 *
2543 * Configure the Tx descriptor ring in the HMC context.
2544 **/
2545 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2546 {
2547 struct i40e_vsi *vsi = ring->vsi;
2548 u16 pf_q = vsi->base_queue + ring->queue_index;
2549 struct i40e_hw *hw = &vsi->back->hw;
2550 struct i40e_hmc_obj_txq tx_ctx;
2551 i40e_status err = 0;
2552 u32 qtx_ctl = 0;
2553
2554 /* some ATR related tx ring init */
2555 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2556 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2557 ring->atr_count = 0;
2558 } else {
2559 ring->atr_sample_rate = 0;
2560 }
2561
2562 /* configure XPS */
2563 i40e_config_xps_tx_ring(ring);
2564
2565 /* clear the context structure first */
2566 memset(&tx_ctx, 0, sizeof(tx_ctx));
2567
2568 tx_ctx.new_context = 1;
2569 tx_ctx.base = (ring->dma / 128);
2570 tx_ctx.qlen = ring->count;
2571 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2572 I40E_FLAG_FD_ATR_ENABLED));
2573 #ifdef I40E_FCOE
2574 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2575 #endif
2576 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2577 /* FDIR VSI tx ring can still use RS bit and writebacks */
2578 if (vsi->type != I40E_VSI_FDIR)
2579 tx_ctx.head_wb_ena = 1;
2580 tx_ctx.head_wb_addr = ring->dma +
2581 (ring->count * sizeof(struct i40e_tx_desc));
2582
2583 /* As part of VSI creation/update, FW allocates certain
2584 * Tx arbitration queue sets for each TC enabled for
2585 * the VSI. The FW returns the handles to these queue
2586 * sets as part of the response buffer to Add VSI,
2587 * Update VSI, etc. AQ commands. It is expected that
2588 * these queue set handles be associated with the Tx
2589 * queues by the driver as part of the TX queue context
2590 * initialization. This has to be done regardless of
2591 * DCB as by default everything is mapped to TC0.
2592 */
2593 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2594 tx_ctx.rdylist_act = 0;
2595
2596 /* clear the context in the HMC */
2597 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2598 if (err) {
2599 dev_info(&vsi->back->pdev->dev,
2600 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2601 ring->queue_index, pf_q, err);
2602 return -ENOMEM;
2603 }
2604
2605 /* set the context in the HMC */
2606 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2607 if (err) {
2608 dev_info(&vsi->back->pdev->dev,
2609 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2610 ring->queue_index, pf_q, err);
2611 return -ENOMEM;
2612 }
2613
2614 /* Now associate this queue with this PCI function */
2615 if (vsi->type == I40E_VSI_VMDQ2) {
2616 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2617 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2618 I40E_QTX_CTL_VFVM_INDX_MASK;
2619 } else {
2620 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2621 }
2622
2623 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2624 I40E_QTX_CTL_PF_INDX_MASK);
2625 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2626 i40e_flush(hw);
2627
2628 /* cache tail off for easier writes later */
2629 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2630
2631 return 0;
2632 }
2633
2634 /**
2635 * i40e_configure_rx_ring - Configure a receive ring context
2636 * @ring: The Rx ring to configure
2637 *
2638 * Configure the Rx descriptor ring in the HMC context.
2639 **/
2640 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2641 {
2642 struct i40e_vsi *vsi = ring->vsi;
2643 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2644 u16 pf_q = vsi->base_queue + ring->queue_index;
2645 struct i40e_hw *hw = &vsi->back->hw;
2646 struct i40e_hmc_obj_rxq rx_ctx;
2647 i40e_status err = 0;
2648
2649 ring->state = 0;
2650
2651 /* clear the context structure first */
2652 memset(&rx_ctx, 0, sizeof(rx_ctx));
2653
2654 ring->rx_buf_len = vsi->rx_buf_len;
2655 ring->rx_hdr_len = vsi->rx_hdr_len;
2656
2657 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2658 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2659
2660 rx_ctx.base = (ring->dma / 128);
2661 rx_ctx.qlen = ring->count;
2662
2663 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2664 set_ring_16byte_desc_enabled(ring);
2665 rx_ctx.dsize = 0;
2666 } else {
2667 rx_ctx.dsize = 1;
2668 }
2669
2670 rx_ctx.dtype = vsi->dtype;
2671 if (vsi->dtype) {
2672 set_ring_ps_enabled(ring);
2673 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2674 I40E_RX_SPLIT_IP |
2675 I40E_RX_SPLIT_TCP_UDP |
2676 I40E_RX_SPLIT_SCTP;
2677 } else {
2678 rx_ctx.hsplit_0 = 0;
2679 }
2680
2681 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2682 (chain_len * ring->rx_buf_len));
2683 if (hw->revision_id == 0)
2684 rx_ctx.lrxqthresh = 0;
2685 else
2686 rx_ctx.lrxqthresh = 2;
2687 rx_ctx.crcstrip = 1;
2688 rx_ctx.l2tsel = 1;
2689 /* this controls whether VLAN is stripped from inner headers */
2690 rx_ctx.showiv = 0;
2691 #ifdef I40E_FCOE
2692 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2693 #endif
2694 /* set the prefena field to 1 because the manual says to */
2695 rx_ctx.prefena = 1;
2696
2697 /* clear the context in the HMC */
2698 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2699 if (err) {
2700 dev_info(&vsi->back->pdev->dev,
2701 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2702 ring->queue_index, pf_q, err);
2703 return -ENOMEM;
2704 }
2705
2706 /* set the context in the HMC */
2707 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2708 if (err) {
2709 dev_info(&vsi->back->pdev->dev,
2710 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2711 ring->queue_index, pf_q, err);
2712 return -ENOMEM;
2713 }
2714
2715 /* cache tail for quicker writes, and clear the reg before use */
2716 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2717 writel(0, ring->tail);
2718
2719 if (ring_is_ps_enabled(ring)) {
2720 i40e_alloc_rx_headers(ring);
2721 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2722 } else {
2723 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2724 }
2725
2726 return 0;
2727 }
2728
2729 /**
2730 * i40e_vsi_configure_tx - Configure the VSI for Tx
2731 * @vsi: VSI structure describing this set of rings and resources
2732 *
2733 * Configure the Tx VSI for operation.
2734 **/
2735 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2736 {
2737 int err = 0;
2738 u16 i;
2739
2740 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2741 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2742
2743 return err;
2744 }
2745
2746 /**
2747 * i40e_vsi_configure_rx - Configure the VSI for Rx
2748 * @vsi: the VSI being configured
2749 *
2750 * Configure the Rx VSI for operation.
2751 **/
2752 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2753 {
2754 int err = 0;
2755 u16 i;
2756
2757 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2758 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2759 + ETH_FCS_LEN + VLAN_HLEN;
2760 else
2761 vsi->max_frame = I40E_RXBUFFER_2048;
2762
2763 /* figure out correct receive buffer length */
2764 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2765 I40E_FLAG_RX_PS_ENABLED)) {
2766 case I40E_FLAG_RX_1BUF_ENABLED:
2767 vsi->rx_hdr_len = 0;
2768 vsi->rx_buf_len = vsi->max_frame;
2769 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2770 break;
2771 case I40E_FLAG_RX_PS_ENABLED:
2772 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2773 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2774 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2775 break;
2776 default:
2777 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2778 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2779 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2780 break;
2781 }
2782
2783 #ifdef I40E_FCOE
2784 /* setup rx buffer for FCoE */
2785 if ((vsi->type == I40E_VSI_FCOE) &&
2786 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2787 vsi->rx_hdr_len = 0;
2788 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2789 vsi->max_frame = I40E_RXBUFFER_3072;
2790 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2791 }
2792
2793 #endif /* I40E_FCOE */
2794 /* round up for the chip's needs */
2795 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2796 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2797 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2798 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2799
2800 /* set up individual rings */
2801 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2802 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2803
2804 return err;
2805 }
2806
2807 /**
2808 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2809 * @vsi: ptr to the VSI
2810 **/
2811 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2812 {
2813 struct i40e_ring *tx_ring, *rx_ring;
2814 u16 qoffset, qcount;
2815 int i, n;
2816
2817 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2818 /* Reset the TC information */
2819 for (i = 0; i < vsi->num_queue_pairs; i++) {
2820 rx_ring = vsi->rx_rings[i];
2821 tx_ring = vsi->tx_rings[i];
2822 rx_ring->dcb_tc = 0;
2823 tx_ring->dcb_tc = 0;
2824 }
2825 }
2826
2827 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2828 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2829 continue;
2830
2831 qoffset = vsi->tc_config.tc_info[n].qoffset;
2832 qcount = vsi->tc_config.tc_info[n].qcount;
2833 for (i = qoffset; i < (qoffset + qcount); i++) {
2834 rx_ring = vsi->rx_rings[i];
2835 tx_ring = vsi->tx_rings[i];
2836 rx_ring->dcb_tc = n;
2837 tx_ring->dcb_tc = n;
2838 }
2839 }
2840 }
2841
2842 /**
2843 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2844 * @vsi: ptr to the VSI
2845 **/
2846 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2847 {
2848 if (vsi->netdev)
2849 i40e_set_rx_mode(vsi->netdev);
2850 }
2851
2852 /**
2853 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2854 * @vsi: Pointer to the targeted VSI
2855 *
2856 * This function replays the hlist on the hw where all the SB Flow Director
2857 * filters were saved.
2858 **/
2859 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2860 {
2861 struct i40e_fdir_filter *filter;
2862 struct i40e_pf *pf = vsi->back;
2863 struct hlist_node *node;
2864
2865 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2866 return;
2867
2868 hlist_for_each_entry_safe(filter, node,
2869 &pf->fdir_filter_list, fdir_node) {
2870 i40e_add_del_fdir(vsi, filter, true);
2871 }
2872 }
2873
2874 /**
2875 * i40e_vsi_configure - Set up the VSI for action
2876 * @vsi: the VSI being configured
2877 **/
2878 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2879 {
2880 int err;
2881
2882 i40e_set_vsi_rx_mode(vsi);
2883 i40e_restore_vlan(vsi);
2884 i40e_vsi_config_dcb_rings(vsi);
2885 err = i40e_vsi_configure_tx(vsi);
2886 if (!err)
2887 err = i40e_vsi_configure_rx(vsi);
2888
2889 return err;
2890 }
2891
2892 /**
2893 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2894 * @vsi: the VSI being configured
2895 **/
2896 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2897 {
2898 struct i40e_pf *pf = vsi->back;
2899 struct i40e_q_vector *q_vector;
2900 struct i40e_hw *hw = &pf->hw;
2901 u16 vector;
2902 int i, q;
2903 u32 val;
2904 u32 qp;
2905
2906 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2907 * and PFINT_LNKLSTn registers, e.g.:
2908 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2909 */
2910 qp = vsi->base_queue;
2911 vector = vsi->base_vector;
2912 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2913 q_vector = vsi->q_vectors[i];
2914 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2915 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2916 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2917 q_vector->rx.itr);
2918 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2919 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2920 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2921 q_vector->tx.itr);
2922
2923 /* Linked list for the queuepairs assigned to this vector */
2924 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2925 for (q = 0; q < q_vector->num_ringpairs; q++) {
2926 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2927 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2928 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2929 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2930 (I40E_QUEUE_TYPE_TX
2931 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2932
2933 wr32(hw, I40E_QINT_RQCTL(qp), val);
2934
2935 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2936 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2937 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2938 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2939 (I40E_QUEUE_TYPE_RX
2940 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2941
2942 /* Terminate the linked list */
2943 if (q == (q_vector->num_ringpairs - 1))
2944 val |= (I40E_QUEUE_END_OF_LIST
2945 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2946
2947 wr32(hw, I40E_QINT_TQCTL(qp), val);
2948 qp++;
2949 }
2950 }
2951
2952 i40e_flush(hw);
2953 }
2954
2955 /**
2956 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2957 * @hw: ptr to the hardware info
2958 **/
2959 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2960 {
2961 struct i40e_hw *hw = &pf->hw;
2962 u32 val;
2963
2964 /* clear things first */
2965 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2966 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2967
2968 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2969 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2970 I40E_PFINT_ICR0_ENA_GRST_MASK |
2971 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2972 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2973 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2974 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2975 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2976
2977 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2978 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2979
2980 if (pf->flags & I40E_FLAG_PTP)
2981 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2982
2983 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2984
2985 /* SW_ITR_IDX = 0, but don't change INTENA */
2986 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2987 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2988
2989 /* OTHER_ITR_IDX = 0 */
2990 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2991 }
2992
2993 /**
2994 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2995 * @vsi: the VSI being configured
2996 **/
2997 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2998 {
2999 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3000 struct i40e_pf *pf = vsi->back;
3001 struct i40e_hw *hw = &pf->hw;
3002 u32 val;
3003
3004 /* set the ITR configuration */
3005 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3006 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3007 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3008 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3009 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3010 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3011
3012 i40e_enable_misc_int_causes(pf);
3013
3014 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3015 wr32(hw, I40E_PFINT_LNKLST0, 0);
3016
3017 /* Associate the queue pair to the vector and enable the queue int */
3018 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3019 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3020 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3021
3022 wr32(hw, I40E_QINT_RQCTL(0), val);
3023
3024 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3025 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3026 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3027
3028 wr32(hw, I40E_QINT_TQCTL(0), val);
3029 i40e_flush(hw);
3030 }
3031
3032 /**
3033 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3034 * @pf: board private structure
3035 **/
3036 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3037 {
3038 struct i40e_hw *hw = &pf->hw;
3039
3040 wr32(hw, I40E_PFINT_DYN_CTL0,
3041 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3042 i40e_flush(hw);
3043 }
3044
3045 /**
3046 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3047 * @pf: board private structure
3048 **/
3049 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3050 {
3051 struct i40e_hw *hw = &pf->hw;
3052 u32 val;
3053
3054 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3055 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3056 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3057
3058 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3059 i40e_flush(hw);
3060 }
3061
3062 /**
3063 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3064 * @vsi: pointer to a vsi
3065 * @vector: enable a particular Hw Interrupt vector, without base_vector
3066 **/
3067 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3068 {
3069 struct i40e_pf *pf = vsi->back;
3070 struct i40e_hw *hw = &pf->hw;
3071 u32 val;
3072
3073 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3074 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3075 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3076 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
3077 /* skip the flush */
3078 }
3079
3080 /**
3081 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3082 * @vsi: pointer to a vsi
3083 * @vector: disable a particular Hw Interrupt vector
3084 **/
3085 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3086 {
3087 struct i40e_pf *pf = vsi->back;
3088 struct i40e_hw *hw = &pf->hw;
3089 u32 val;
3090
3091 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3092 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3093 i40e_flush(hw);
3094 }
3095
3096 /**
3097 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3098 * @irq: interrupt number
3099 * @data: pointer to a q_vector
3100 **/
3101 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3102 {
3103 struct i40e_q_vector *q_vector = data;
3104
3105 if (!q_vector->tx.ring && !q_vector->rx.ring)
3106 return IRQ_HANDLED;
3107
3108 napi_schedule(&q_vector->napi);
3109
3110 return IRQ_HANDLED;
3111 }
3112
3113 /**
3114 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3115 * @vsi: the VSI being configured
3116 * @basename: name for the vector
3117 *
3118 * Allocates MSI-X vectors and requests interrupts from the kernel.
3119 **/
3120 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3121 {
3122 int q_vectors = vsi->num_q_vectors;
3123 struct i40e_pf *pf = vsi->back;
3124 int base = vsi->base_vector;
3125 int rx_int_idx = 0;
3126 int tx_int_idx = 0;
3127 int vector, err;
3128
3129 for (vector = 0; vector < q_vectors; vector++) {
3130 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3131
3132 if (q_vector->tx.ring && q_vector->rx.ring) {
3133 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3134 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3135 tx_int_idx++;
3136 } else if (q_vector->rx.ring) {
3137 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3138 "%s-%s-%d", basename, "rx", rx_int_idx++);
3139 } else if (q_vector->tx.ring) {
3140 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3141 "%s-%s-%d", basename, "tx", tx_int_idx++);
3142 } else {
3143 /* skip this unused q_vector */
3144 continue;
3145 }
3146 err = request_irq(pf->msix_entries[base + vector].vector,
3147 vsi->irq_handler,
3148 0,
3149 q_vector->name,
3150 q_vector);
3151 if (err) {
3152 dev_info(&pf->pdev->dev,
3153 "MSIX request_irq failed, error: %d\n", err);
3154 goto free_queue_irqs;
3155 }
3156 /* assign the mask for this irq */
3157 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3158 &q_vector->affinity_mask);
3159 }
3160
3161 vsi->irqs_ready = true;
3162 return 0;
3163
3164 free_queue_irqs:
3165 while (vector) {
3166 vector--;
3167 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3168 NULL);
3169 free_irq(pf->msix_entries[base + vector].vector,
3170 &(vsi->q_vectors[vector]));
3171 }
3172 return err;
3173 }
3174
3175 /**
3176 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3177 * @vsi: the VSI being un-configured
3178 **/
3179 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3180 {
3181 struct i40e_pf *pf = vsi->back;
3182 struct i40e_hw *hw = &pf->hw;
3183 int base = vsi->base_vector;
3184 int i;
3185
3186 for (i = 0; i < vsi->num_queue_pairs; i++) {
3187 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3188 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3189 }
3190
3191 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3192 for (i = vsi->base_vector;
3193 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3194 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3195
3196 i40e_flush(hw);
3197 for (i = 0; i < vsi->num_q_vectors; i++)
3198 synchronize_irq(pf->msix_entries[i + base].vector);
3199 } else {
3200 /* Legacy and MSI mode - this stops all interrupt handling */
3201 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3202 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3203 i40e_flush(hw);
3204 synchronize_irq(pf->pdev->irq);
3205 }
3206 }
3207
3208 /**
3209 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3210 * @vsi: the VSI being configured
3211 **/
3212 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3213 {
3214 struct i40e_pf *pf = vsi->back;
3215 int i;
3216
3217 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3218 for (i = 0; i < vsi->num_q_vectors; i++)
3219 i40e_irq_dynamic_enable(vsi, i);
3220 } else {
3221 i40e_irq_dynamic_enable_icr0(pf);
3222 }
3223
3224 i40e_flush(&pf->hw);
3225 return 0;
3226 }
3227
3228 /**
3229 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3230 * @pf: board private structure
3231 **/
3232 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3233 {
3234 /* Disable ICR 0 */
3235 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3236 i40e_flush(&pf->hw);
3237 }
3238
3239 /**
3240 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3241 * @irq: interrupt number
3242 * @data: pointer to a q_vector
3243 *
3244 * This is the handler used for all MSI/Legacy interrupts, and deals
3245 * with both queue and non-queue interrupts. This is also used in
3246 * MSIX mode to handle the non-queue interrupts.
3247 **/
3248 static irqreturn_t i40e_intr(int irq, void *data)
3249 {
3250 struct i40e_pf *pf = (struct i40e_pf *)data;
3251 struct i40e_hw *hw = &pf->hw;
3252 irqreturn_t ret = IRQ_NONE;
3253 u32 icr0, icr0_remaining;
3254 u32 val, ena_mask;
3255
3256 icr0 = rd32(hw, I40E_PFINT_ICR0);
3257 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3258
3259 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3260 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3261 goto enable_intr;
3262
3263 /* if interrupt but no bits showing, must be SWINT */
3264 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3265 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3266 pf->sw_int_count++;
3267
3268 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3269 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3270 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3271 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3272 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3273 }
3274
3275 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3276 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3277
3278 /* temporarily disable queue cause for NAPI processing */
3279 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3280 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3281 wr32(hw, I40E_QINT_RQCTL(0), qval);
3282
3283 qval = rd32(hw, I40E_QINT_TQCTL(0));
3284 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3285 wr32(hw, I40E_QINT_TQCTL(0), qval);
3286
3287 if (!test_bit(__I40E_DOWN, &pf->state))
3288 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3289 }
3290
3291 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3292 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3293 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3294 }
3295
3296 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3297 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3298 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3299 }
3300
3301 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3302 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3303 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3304 }
3305
3306 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3307 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3308 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3309 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3310 val = rd32(hw, I40E_GLGEN_RSTAT);
3311 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3312 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3313 if (val == I40E_RESET_CORER) {
3314 pf->corer_count++;
3315 } else if (val == I40E_RESET_GLOBR) {
3316 pf->globr_count++;
3317 } else if (val == I40E_RESET_EMPR) {
3318 pf->empr_count++;
3319 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3320 }
3321 }
3322
3323 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3324 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3325 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3326 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3327 rd32(hw, I40E_PFHMC_ERRORINFO),
3328 rd32(hw, I40E_PFHMC_ERRORDATA));
3329 }
3330
3331 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3332 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3333
3334 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3335 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3336 i40e_ptp_tx_hwtstamp(pf);
3337 }
3338 }
3339
3340 /* If a critical error is pending we have no choice but to reset the
3341 * device.
3342 * Report and mask out any remaining unexpected interrupts.
3343 */
3344 icr0_remaining = icr0 & ena_mask;
3345 if (icr0_remaining) {
3346 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3347 icr0_remaining);
3348 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3349 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3350 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3351 dev_info(&pf->pdev->dev, "device will be reset\n");
3352 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3353 i40e_service_event_schedule(pf);
3354 }
3355 ena_mask &= ~icr0_remaining;
3356 }
3357 ret = IRQ_HANDLED;
3358
3359 enable_intr:
3360 /* re-enable interrupt causes */
3361 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3362 if (!test_bit(__I40E_DOWN, &pf->state)) {
3363 i40e_service_event_schedule(pf);
3364 i40e_irq_dynamic_enable_icr0(pf);
3365 }
3366
3367 return ret;
3368 }
3369
3370 /**
3371 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3372 * @tx_ring: tx ring to clean
3373 * @budget: how many cleans we're allowed
3374 *
3375 * Returns true if there's any budget left (e.g. the clean is finished)
3376 **/
3377 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3378 {
3379 struct i40e_vsi *vsi = tx_ring->vsi;
3380 u16 i = tx_ring->next_to_clean;
3381 struct i40e_tx_buffer *tx_buf;
3382 struct i40e_tx_desc *tx_desc;
3383
3384 tx_buf = &tx_ring->tx_bi[i];
3385 tx_desc = I40E_TX_DESC(tx_ring, i);
3386 i -= tx_ring->count;
3387
3388 do {
3389 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3390
3391 /* if next_to_watch is not set then there is no work pending */
3392 if (!eop_desc)
3393 break;
3394
3395 /* prevent any other reads prior to eop_desc */
3396 read_barrier_depends();
3397
3398 /* if the descriptor isn't done, no work yet to do */
3399 if (!(eop_desc->cmd_type_offset_bsz &
3400 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3401 break;
3402
3403 /* clear next_to_watch to prevent false hangs */
3404 tx_buf->next_to_watch = NULL;
3405
3406 tx_desc->buffer_addr = 0;
3407 tx_desc->cmd_type_offset_bsz = 0;
3408 /* move past filter desc */
3409 tx_buf++;
3410 tx_desc++;
3411 i++;
3412 if (unlikely(!i)) {
3413 i -= tx_ring->count;
3414 tx_buf = tx_ring->tx_bi;
3415 tx_desc = I40E_TX_DESC(tx_ring, 0);
3416 }
3417 /* unmap skb header data */
3418 dma_unmap_single(tx_ring->dev,
3419 dma_unmap_addr(tx_buf, dma),
3420 dma_unmap_len(tx_buf, len),
3421 DMA_TO_DEVICE);
3422 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3423 kfree(tx_buf->raw_buf);
3424
3425 tx_buf->raw_buf = NULL;
3426 tx_buf->tx_flags = 0;
3427 tx_buf->next_to_watch = NULL;
3428 dma_unmap_len_set(tx_buf, len, 0);
3429 tx_desc->buffer_addr = 0;
3430 tx_desc->cmd_type_offset_bsz = 0;
3431
3432 /* move us past the eop_desc for start of next FD desc */
3433 tx_buf++;
3434 tx_desc++;
3435 i++;
3436 if (unlikely(!i)) {
3437 i -= tx_ring->count;
3438 tx_buf = tx_ring->tx_bi;
3439 tx_desc = I40E_TX_DESC(tx_ring, 0);
3440 }
3441
3442 /* update budget accounting */
3443 budget--;
3444 } while (likely(budget));
3445
3446 i += tx_ring->count;
3447 tx_ring->next_to_clean = i;
3448
3449 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3450 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3451 }
3452 return budget > 0;
3453 }
3454
3455 /**
3456 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3457 * @irq: interrupt number
3458 * @data: pointer to a q_vector
3459 **/
3460 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3461 {
3462 struct i40e_q_vector *q_vector = data;
3463 struct i40e_vsi *vsi;
3464
3465 if (!q_vector->tx.ring)
3466 return IRQ_HANDLED;
3467
3468 vsi = q_vector->tx.ring->vsi;
3469 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3470
3471 return IRQ_HANDLED;
3472 }
3473
3474 /**
3475 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3476 * @vsi: the VSI being configured
3477 * @v_idx: vector index
3478 * @qp_idx: queue pair index
3479 **/
3480 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3481 {
3482 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3483 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3484 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3485
3486 tx_ring->q_vector = q_vector;
3487 tx_ring->next = q_vector->tx.ring;
3488 q_vector->tx.ring = tx_ring;
3489 q_vector->tx.count++;
3490
3491 rx_ring->q_vector = q_vector;
3492 rx_ring->next = q_vector->rx.ring;
3493 q_vector->rx.ring = rx_ring;
3494 q_vector->rx.count++;
3495 }
3496
3497 /**
3498 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3499 * @vsi: the VSI being configured
3500 *
3501 * This function maps descriptor rings to the queue-specific vectors
3502 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3503 * one vector per queue pair, but on a constrained vector budget, we
3504 * group the queue pairs as "efficiently" as possible.
3505 **/
3506 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3507 {
3508 int qp_remaining = vsi->num_queue_pairs;
3509 int q_vectors = vsi->num_q_vectors;
3510 int num_ringpairs;
3511 int v_start = 0;
3512 int qp_idx = 0;
3513
3514 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3515 * group them so there are multiple queues per vector.
3516 * It is also important to go through all the vectors available to be
3517 * sure that if we don't use all the vectors, that the remaining vectors
3518 * are cleared. This is especially important when decreasing the
3519 * number of queues in use.
3520 */
3521 for (; v_start < q_vectors; v_start++) {
3522 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3523
3524 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3525
3526 q_vector->num_ringpairs = num_ringpairs;
3527
3528 q_vector->rx.count = 0;
3529 q_vector->tx.count = 0;
3530 q_vector->rx.ring = NULL;
3531 q_vector->tx.ring = NULL;
3532
3533 while (num_ringpairs--) {
3534 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3535 qp_idx++;
3536 qp_remaining--;
3537 }
3538 }
3539 }
3540
3541 /**
3542 * i40e_vsi_request_irq - Request IRQ from the OS
3543 * @vsi: the VSI being configured
3544 * @basename: name for the vector
3545 **/
3546 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3547 {
3548 struct i40e_pf *pf = vsi->back;
3549 int err;
3550
3551 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3552 err = i40e_vsi_request_irq_msix(vsi, basename);
3553 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3554 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3555 pf->int_name, pf);
3556 else
3557 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3558 pf->int_name, pf);
3559
3560 if (err)
3561 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3562
3563 return err;
3564 }
3565
3566 #ifdef CONFIG_NET_POLL_CONTROLLER
3567 /**
3568 * i40e_netpoll - A Polling 'interrupt'handler
3569 * @netdev: network interface device structure
3570 *
3571 * This is used by netconsole to send skbs without having to re-enable
3572 * interrupts. It's not called while the normal interrupt routine is executing.
3573 **/
3574 #ifdef I40E_FCOE
3575 void i40e_netpoll(struct net_device *netdev)
3576 #else
3577 static void i40e_netpoll(struct net_device *netdev)
3578 #endif
3579 {
3580 struct i40e_netdev_priv *np = netdev_priv(netdev);
3581 struct i40e_vsi *vsi = np->vsi;
3582 struct i40e_pf *pf = vsi->back;
3583 int i;
3584
3585 /* if interface is down do nothing */
3586 if (test_bit(__I40E_DOWN, &vsi->state))
3587 return;
3588
3589 pf->flags |= I40E_FLAG_IN_NETPOLL;
3590 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3591 for (i = 0; i < vsi->num_q_vectors; i++)
3592 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3593 } else {
3594 i40e_intr(pf->pdev->irq, netdev);
3595 }
3596 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3597 }
3598 #endif
3599
3600 /**
3601 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3602 * @pf: the PF being configured
3603 * @pf_q: the PF queue
3604 * @enable: enable or disable state of the queue
3605 *
3606 * This routine will wait for the given Tx queue of the PF to reach the
3607 * enabled or disabled state.
3608 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3609 * multiple retries; else will return 0 in case of success.
3610 **/
3611 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3612 {
3613 int i;
3614 u32 tx_reg;
3615
3616 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3617 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3618 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3619 break;
3620
3621 usleep_range(10, 20);
3622 }
3623 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3624 return -ETIMEDOUT;
3625
3626 return 0;
3627 }
3628
3629 /**
3630 * i40e_vsi_control_tx - Start or stop a VSI's rings
3631 * @vsi: the VSI being configured
3632 * @enable: start or stop the rings
3633 **/
3634 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3635 {
3636 struct i40e_pf *pf = vsi->back;
3637 struct i40e_hw *hw = &pf->hw;
3638 int i, j, pf_q, ret = 0;
3639 u32 tx_reg;
3640
3641 pf_q = vsi->base_queue;
3642 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3643
3644 /* warn the TX unit of coming changes */
3645 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3646 if (!enable)
3647 usleep_range(10, 20);
3648
3649 for (j = 0; j < 50; j++) {
3650 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3651 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3652 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3653 break;
3654 usleep_range(1000, 2000);
3655 }
3656 /* Skip if the queue is already in the requested state */
3657 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3658 continue;
3659
3660 /* turn on/off the queue */
3661 if (enable) {
3662 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3663 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3664 } else {
3665 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3666 }
3667
3668 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3669 /* No waiting for the Tx queue to disable */
3670 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3671 continue;
3672
3673 /* wait for the change to finish */
3674 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3675 if (ret) {
3676 dev_info(&pf->pdev->dev,
3677 "VSI seid %d Tx ring %d %sable timeout\n",
3678 vsi->seid, pf_q, (enable ? "en" : "dis"));
3679 break;
3680 }
3681 }
3682
3683 if (hw->revision_id == 0)
3684 mdelay(50);
3685 return ret;
3686 }
3687
3688 /**
3689 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3690 * @pf: the PF being configured
3691 * @pf_q: the PF queue
3692 * @enable: enable or disable state of the queue
3693 *
3694 * This routine will wait for the given Rx queue of the PF to reach the
3695 * enabled or disabled state.
3696 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3697 * multiple retries; else will return 0 in case of success.
3698 **/
3699 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3700 {
3701 int i;
3702 u32 rx_reg;
3703
3704 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3705 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3706 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3707 break;
3708
3709 usleep_range(10, 20);
3710 }
3711 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3712 return -ETIMEDOUT;
3713
3714 return 0;
3715 }
3716
3717 /**
3718 * i40e_vsi_control_rx - Start or stop a VSI's rings
3719 * @vsi: the VSI being configured
3720 * @enable: start or stop the rings
3721 **/
3722 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3723 {
3724 struct i40e_pf *pf = vsi->back;
3725 struct i40e_hw *hw = &pf->hw;
3726 int i, j, pf_q, ret = 0;
3727 u32 rx_reg;
3728
3729 pf_q = vsi->base_queue;
3730 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3731 for (j = 0; j < 50; j++) {
3732 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3733 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3734 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3735 break;
3736 usleep_range(1000, 2000);
3737 }
3738
3739 /* Skip if the queue is already in the requested state */
3740 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3741 continue;
3742
3743 /* turn on/off the queue */
3744 if (enable)
3745 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3746 else
3747 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3748 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3749
3750 /* wait for the change to finish */
3751 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3752 if (ret) {
3753 dev_info(&pf->pdev->dev,
3754 "VSI seid %d Rx ring %d %sable timeout\n",
3755 vsi->seid, pf_q, (enable ? "en" : "dis"));
3756 break;
3757 }
3758 }
3759
3760 return ret;
3761 }
3762
3763 /**
3764 * i40e_vsi_control_rings - Start or stop a VSI's rings
3765 * @vsi: the VSI being configured
3766 * @enable: start or stop the rings
3767 **/
3768 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3769 {
3770 int ret = 0;
3771
3772 /* do rx first for enable and last for disable */
3773 if (request) {
3774 ret = i40e_vsi_control_rx(vsi, request);
3775 if (ret)
3776 return ret;
3777 ret = i40e_vsi_control_tx(vsi, request);
3778 } else {
3779 /* Ignore return value, we need to shutdown whatever we can */
3780 i40e_vsi_control_tx(vsi, request);
3781 i40e_vsi_control_rx(vsi, request);
3782 }
3783
3784 return ret;
3785 }
3786
3787 /**
3788 * i40e_vsi_free_irq - Free the irq association with the OS
3789 * @vsi: the VSI being configured
3790 **/
3791 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3792 {
3793 struct i40e_pf *pf = vsi->back;
3794 struct i40e_hw *hw = &pf->hw;
3795 int base = vsi->base_vector;
3796 u32 val, qp;
3797 int i;
3798
3799 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3800 if (!vsi->q_vectors)
3801 return;
3802
3803 if (!vsi->irqs_ready)
3804 return;
3805
3806 vsi->irqs_ready = false;
3807 for (i = 0; i < vsi->num_q_vectors; i++) {
3808 u16 vector = i + base;
3809
3810 /* free only the irqs that were actually requested */
3811 if (!vsi->q_vectors[i] ||
3812 !vsi->q_vectors[i]->num_ringpairs)
3813 continue;
3814
3815 /* clear the affinity_mask in the IRQ descriptor */
3816 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3817 NULL);
3818 free_irq(pf->msix_entries[vector].vector,
3819 vsi->q_vectors[i]);
3820
3821 /* Tear down the interrupt queue link list
3822 *
3823 * We know that they come in pairs and always
3824 * the Rx first, then the Tx. To clear the
3825 * link list, stick the EOL value into the
3826 * next_q field of the registers.
3827 */
3828 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3829 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3830 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3831 val |= I40E_QUEUE_END_OF_LIST
3832 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3833 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3834
3835 while (qp != I40E_QUEUE_END_OF_LIST) {
3836 u32 next;
3837
3838 val = rd32(hw, I40E_QINT_RQCTL(qp));
3839
3840 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3841 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3842 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3843 I40E_QINT_RQCTL_INTEVENT_MASK);
3844
3845 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3846 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3847
3848 wr32(hw, I40E_QINT_RQCTL(qp), val);
3849
3850 val = rd32(hw, I40E_QINT_TQCTL(qp));
3851
3852 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3853 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3854
3855 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3856 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3857 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3858 I40E_QINT_TQCTL_INTEVENT_MASK);
3859
3860 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3861 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3862
3863 wr32(hw, I40E_QINT_TQCTL(qp), val);
3864 qp = next;
3865 }
3866 }
3867 } else {
3868 free_irq(pf->pdev->irq, pf);
3869
3870 val = rd32(hw, I40E_PFINT_LNKLST0);
3871 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3872 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3873 val |= I40E_QUEUE_END_OF_LIST
3874 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3875 wr32(hw, I40E_PFINT_LNKLST0, val);
3876
3877 val = rd32(hw, I40E_QINT_RQCTL(qp));
3878 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3879 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3880 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3881 I40E_QINT_RQCTL_INTEVENT_MASK);
3882
3883 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3884 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3885
3886 wr32(hw, I40E_QINT_RQCTL(qp), val);
3887
3888 val = rd32(hw, I40E_QINT_TQCTL(qp));
3889
3890 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3891 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3892 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3893 I40E_QINT_TQCTL_INTEVENT_MASK);
3894
3895 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3896 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3897
3898 wr32(hw, I40E_QINT_TQCTL(qp), val);
3899 }
3900 }
3901
3902 /**
3903 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3904 * @vsi: the VSI being configured
3905 * @v_idx: Index of vector to be freed
3906 *
3907 * This function frees the memory allocated to the q_vector. In addition if
3908 * NAPI is enabled it will delete any references to the NAPI struct prior
3909 * to freeing the q_vector.
3910 **/
3911 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3912 {
3913 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3914 struct i40e_ring *ring;
3915
3916 if (!q_vector)
3917 return;
3918
3919 /* disassociate q_vector from rings */
3920 i40e_for_each_ring(ring, q_vector->tx)
3921 ring->q_vector = NULL;
3922
3923 i40e_for_each_ring(ring, q_vector->rx)
3924 ring->q_vector = NULL;
3925
3926 /* only VSI w/ an associated netdev is set up w/ NAPI */
3927 if (vsi->netdev)
3928 netif_napi_del(&q_vector->napi);
3929
3930 vsi->q_vectors[v_idx] = NULL;
3931
3932 kfree_rcu(q_vector, rcu);
3933 }
3934
3935 /**
3936 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3937 * @vsi: the VSI being un-configured
3938 *
3939 * This frees the memory allocated to the q_vectors and
3940 * deletes references to the NAPI struct.
3941 **/
3942 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3943 {
3944 int v_idx;
3945
3946 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3947 i40e_free_q_vector(vsi, v_idx);
3948 }
3949
3950 /**
3951 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3952 * @pf: board private structure
3953 **/
3954 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3955 {
3956 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3957 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3958 pci_disable_msix(pf->pdev);
3959 kfree(pf->msix_entries);
3960 pf->msix_entries = NULL;
3961 kfree(pf->irq_pile);
3962 pf->irq_pile = NULL;
3963 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3964 pci_disable_msi(pf->pdev);
3965 }
3966 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3967 }
3968
3969 /**
3970 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3971 * @pf: board private structure
3972 *
3973 * We go through and clear interrupt specific resources and reset the structure
3974 * to pre-load conditions
3975 **/
3976 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3977 {
3978 int i;
3979
3980 i40e_stop_misc_vector(pf);
3981 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3982 synchronize_irq(pf->msix_entries[0].vector);
3983 free_irq(pf->msix_entries[0].vector, pf);
3984 }
3985
3986 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3987 for (i = 0; i < pf->num_alloc_vsi; i++)
3988 if (pf->vsi[i])
3989 i40e_vsi_free_q_vectors(pf->vsi[i]);
3990 i40e_reset_interrupt_capability(pf);
3991 }
3992
3993 /**
3994 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3995 * @vsi: the VSI being configured
3996 **/
3997 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3998 {
3999 int q_idx;
4000
4001 if (!vsi->netdev)
4002 return;
4003
4004 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4005 napi_enable(&vsi->q_vectors[q_idx]->napi);
4006 }
4007
4008 /**
4009 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4010 * @vsi: the VSI being configured
4011 **/
4012 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4013 {
4014 int q_idx;
4015
4016 if (!vsi->netdev)
4017 return;
4018
4019 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4020 napi_disable(&vsi->q_vectors[q_idx]->napi);
4021 }
4022
4023 /**
4024 * i40e_vsi_close - Shut down a VSI
4025 * @vsi: the vsi to be quelled
4026 **/
4027 static void i40e_vsi_close(struct i40e_vsi *vsi)
4028 {
4029 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4030 i40e_down(vsi);
4031 i40e_vsi_free_irq(vsi);
4032 i40e_vsi_free_tx_resources(vsi);
4033 i40e_vsi_free_rx_resources(vsi);
4034 vsi->current_netdev_flags = 0;
4035 }
4036
4037 /**
4038 * i40e_quiesce_vsi - Pause a given VSI
4039 * @vsi: the VSI being paused
4040 **/
4041 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4042 {
4043 if (test_bit(__I40E_DOWN, &vsi->state))
4044 return;
4045
4046 /* No need to disable FCoE VSI when Tx suspended */
4047 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4048 vsi->type == I40E_VSI_FCOE) {
4049 dev_dbg(&vsi->back->pdev->dev,
4050 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4051 return;
4052 }
4053
4054 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4055 if (vsi->netdev && netif_running(vsi->netdev)) {
4056 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4057 } else {
4058 i40e_vsi_close(vsi);
4059 }
4060 }
4061
4062 /**
4063 * i40e_unquiesce_vsi - Resume a given VSI
4064 * @vsi: the VSI being resumed
4065 **/
4066 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4067 {
4068 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4069 return;
4070
4071 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4072 if (vsi->netdev && netif_running(vsi->netdev))
4073 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4074 else
4075 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4076 }
4077
4078 /**
4079 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4080 * @pf: the PF
4081 **/
4082 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4083 {
4084 int v;
4085
4086 for (v = 0; v < pf->num_alloc_vsi; v++) {
4087 if (pf->vsi[v])
4088 i40e_quiesce_vsi(pf->vsi[v]);
4089 }
4090 }
4091
4092 /**
4093 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4094 * @pf: the PF
4095 **/
4096 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4097 {
4098 int v;
4099
4100 for (v = 0; v < pf->num_alloc_vsi; v++) {
4101 if (pf->vsi[v])
4102 i40e_unquiesce_vsi(pf->vsi[v]);
4103 }
4104 }
4105
4106 #ifdef CONFIG_I40E_DCB
4107 /**
4108 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4109 * @vsi: the VSI being configured
4110 *
4111 * This function waits for the given VSI's Tx queues to be disabled.
4112 **/
4113 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4114 {
4115 struct i40e_pf *pf = vsi->back;
4116 int i, pf_q, ret;
4117
4118 pf_q = vsi->base_queue;
4119 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4120 /* Check and wait for the disable status of the queue */
4121 ret = i40e_pf_txq_wait(pf, pf_q, false);
4122 if (ret) {
4123 dev_info(&pf->pdev->dev,
4124 "VSI seid %d Tx ring %d disable timeout\n",
4125 vsi->seid, pf_q);
4126 return ret;
4127 }
4128 }
4129
4130 return 0;
4131 }
4132
4133 /**
4134 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4135 * @pf: the PF
4136 *
4137 * This function waits for the Tx queues to be in disabled state for all the
4138 * VSIs that are managed by this PF.
4139 **/
4140 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4141 {
4142 int v, ret = 0;
4143
4144 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4145 /* No need to wait for FCoE VSI queues */
4146 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4147 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4148 if (ret)
4149 break;
4150 }
4151 }
4152
4153 return ret;
4154 }
4155
4156 #endif
4157
4158 /**
4159 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4160 * @q_idx: TX queue number
4161 * @vsi: Pointer to VSI struct
4162 *
4163 * This function checks specified queue for given VSI. Detects hung condition.
4164 * Sets hung bit since it is two step process. Before next run of service task
4165 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4166 * hung condition remain unchanged and during subsequent run, this function
4167 * issues SW interrupt to recover from hung condition.
4168 **/
4169 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4170 {
4171 struct i40e_ring *tx_ring = NULL;
4172 struct i40e_pf *pf;
4173 u32 head, val, tx_pending;
4174 int i;
4175
4176 pf = vsi->back;
4177
4178 /* now that we have an index, find the tx_ring struct */
4179 for (i = 0; i < vsi->num_queue_pairs; i++) {
4180 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4181 if (q_idx == vsi->tx_rings[i]->queue_index) {
4182 tx_ring = vsi->tx_rings[i];
4183 break;
4184 }
4185 }
4186 }
4187
4188 if (!tx_ring)
4189 return;
4190
4191 /* Read interrupt register */
4192 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4193 val = rd32(&pf->hw,
4194 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4195 tx_ring->vsi->base_vector - 1));
4196 else
4197 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4198
4199 head = i40e_get_head(tx_ring);
4200
4201 tx_pending = i40e_get_tx_pending(tx_ring);
4202
4203 /* Interrupts are disabled and TX pending is non-zero,
4204 * trigger the SW interrupt (don't wait). Worst case
4205 * there will be one extra interrupt which may result
4206 * into not cleaning any queues because queues are cleaned.
4207 */
4208 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4209 i40e_force_wb(vsi, tx_ring->q_vector);
4210 }
4211
4212 /**
4213 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4214 * @pf: pointer to PF struct
4215 *
4216 * LAN VSI has netdev and netdev has TX queues. This function is to check
4217 * each of those TX queues if they are hung, trigger recovery by issuing
4218 * SW interrupt.
4219 **/
4220 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4221 {
4222 struct net_device *netdev;
4223 struct i40e_vsi *vsi;
4224 int i;
4225
4226 /* Only for LAN VSI */
4227 vsi = pf->vsi[pf->lan_vsi];
4228
4229 if (!vsi)
4230 return;
4231
4232 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4233 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4234 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4235 return;
4236
4237 /* Make sure type is MAIN VSI */
4238 if (vsi->type != I40E_VSI_MAIN)
4239 return;
4240
4241 netdev = vsi->netdev;
4242 if (!netdev)
4243 return;
4244
4245 /* Bail out if netif_carrier is not OK */
4246 if (!netif_carrier_ok(netdev))
4247 return;
4248
4249 /* Go thru' TX queues for netdev */
4250 for (i = 0; i < netdev->num_tx_queues; i++) {
4251 struct netdev_queue *q;
4252
4253 q = netdev_get_tx_queue(netdev, i);
4254 if (q)
4255 i40e_detect_recover_hung_queue(i, vsi);
4256 }
4257 }
4258
4259 /**
4260 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4261 * @pf: pointer to PF
4262 *
4263 * Get TC map for ISCSI PF type that will include iSCSI TC
4264 * and LAN TC.
4265 **/
4266 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4267 {
4268 struct i40e_dcb_app_priority_table app;
4269 struct i40e_hw *hw = &pf->hw;
4270 u8 enabled_tc = 1; /* TC0 is always enabled */
4271 u8 tc, i;
4272 /* Get the iSCSI APP TLV */
4273 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4274
4275 for (i = 0; i < dcbcfg->numapps; i++) {
4276 app = dcbcfg->app[i];
4277 if (app.selector == I40E_APP_SEL_TCPIP &&
4278 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4279 tc = dcbcfg->etscfg.prioritytable[app.priority];
4280 enabled_tc |= BIT_ULL(tc);
4281 break;
4282 }
4283 }
4284
4285 return enabled_tc;
4286 }
4287
4288 /**
4289 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4290 * @dcbcfg: the corresponding DCBx configuration structure
4291 *
4292 * Return the number of TCs from given DCBx configuration
4293 **/
4294 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4295 {
4296 u8 num_tc = 0;
4297 int i;
4298
4299 /* Scan the ETS Config Priority Table to find
4300 * traffic class enabled for a given priority
4301 * and use the traffic class index to get the
4302 * number of traffic classes enabled
4303 */
4304 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4305 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4306 num_tc = dcbcfg->etscfg.prioritytable[i];
4307 }
4308
4309 /* Traffic class index starts from zero so
4310 * increment to return the actual count
4311 */
4312 return num_tc + 1;
4313 }
4314
4315 /**
4316 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4317 * @dcbcfg: the corresponding DCBx configuration structure
4318 *
4319 * Query the current DCB configuration and return the number of
4320 * traffic classes enabled from the given DCBX config
4321 **/
4322 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4323 {
4324 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4325 u8 enabled_tc = 1;
4326 u8 i;
4327
4328 for (i = 0; i < num_tc; i++)
4329 enabled_tc |= BIT(i);
4330
4331 return enabled_tc;
4332 }
4333
4334 /**
4335 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4336 * @pf: PF being queried
4337 *
4338 * Return number of traffic classes enabled for the given PF
4339 **/
4340 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4341 {
4342 struct i40e_hw *hw = &pf->hw;
4343 u8 i, enabled_tc;
4344 u8 num_tc = 0;
4345 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4346
4347 /* If DCB is not enabled then always in single TC */
4348 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4349 return 1;
4350
4351 /* SFP mode will be enabled for all TCs on port */
4352 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4353 return i40e_dcb_get_num_tc(dcbcfg);
4354
4355 /* MFP mode return count of enabled TCs for this PF */
4356 if (pf->hw.func_caps.iscsi)
4357 enabled_tc = i40e_get_iscsi_tc_map(pf);
4358 else
4359 return 1; /* Only TC0 */
4360
4361 /* At least have TC0 */
4362 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4363 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4364 if (enabled_tc & BIT_ULL(i))
4365 num_tc++;
4366 }
4367 return num_tc;
4368 }
4369
4370 /**
4371 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4372 * @pf: PF being queried
4373 *
4374 * Return a bitmap for first enabled traffic class for this PF.
4375 **/
4376 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4377 {
4378 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4379 u8 i = 0;
4380
4381 if (!enabled_tc)
4382 return 0x1; /* TC0 */
4383
4384 /* Find the first enabled TC */
4385 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4386 if (enabled_tc & BIT_ULL(i))
4387 break;
4388 }
4389
4390 return BIT(i);
4391 }
4392
4393 /**
4394 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4395 * @pf: PF being queried
4396 *
4397 * Return a bitmap for enabled traffic classes for this PF.
4398 **/
4399 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4400 {
4401 /* If DCB is not enabled for this PF then just return default TC */
4402 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4403 return i40e_pf_get_default_tc(pf);
4404
4405 /* SFP mode we want PF to be enabled for all TCs */
4406 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4407 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4408
4409 /* MFP enabled and iSCSI PF type */
4410 if (pf->hw.func_caps.iscsi)
4411 return i40e_get_iscsi_tc_map(pf);
4412 else
4413 return i40e_pf_get_default_tc(pf);
4414 }
4415
4416 /**
4417 * i40e_vsi_get_bw_info - Query VSI BW Information
4418 * @vsi: the VSI being queried
4419 *
4420 * Returns 0 on success, negative value on failure
4421 **/
4422 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4423 {
4424 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4425 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4426 struct i40e_pf *pf = vsi->back;
4427 struct i40e_hw *hw = &pf->hw;
4428 i40e_status ret;
4429 u32 tc_bw_max;
4430 int i;
4431
4432 /* Get the VSI level BW configuration */
4433 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4434 if (ret) {
4435 dev_info(&pf->pdev->dev,
4436 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4437 i40e_stat_str(&pf->hw, ret),
4438 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4439 return -EINVAL;
4440 }
4441
4442 /* Get the VSI level BW configuration per TC */
4443 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4444 NULL);
4445 if (ret) {
4446 dev_info(&pf->pdev->dev,
4447 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4448 i40e_stat_str(&pf->hw, ret),
4449 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4450 return -EINVAL;
4451 }
4452
4453 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4454 dev_info(&pf->pdev->dev,
4455 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4456 bw_config.tc_valid_bits,
4457 bw_ets_config.tc_valid_bits);
4458 /* Still continuing */
4459 }
4460
4461 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4462 vsi->bw_max_quanta = bw_config.max_bw;
4463 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4464 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4465 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4466 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4467 vsi->bw_ets_limit_credits[i] =
4468 le16_to_cpu(bw_ets_config.credits[i]);
4469 /* 3 bits out of 4 for each TC */
4470 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4471 }
4472
4473 return 0;
4474 }
4475
4476 /**
4477 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4478 * @vsi: the VSI being configured
4479 * @enabled_tc: TC bitmap
4480 * @bw_credits: BW shared credits per TC
4481 *
4482 * Returns 0 on success, negative value on failure
4483 **/
4484 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4485 u8 *bw_share)
4486 {
4487 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4488 i40e_status ret;
4489 int i;
4490
4491 bw_data.tc_valid_bits = enabled_tc;
4492 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4493 bw_data.tc_bw_credits[i] = bw_share[i];
4494
4495 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4496 NULL);
4497 if (ret) {
4498 dev_info(&vsi->back->pdev->dev,
4499 "AQ command Config VSI BW allocation per TC failed = %d\n",
4500 vsi->back->hw.aq.asq_last_status);
4501 return -EINVAL;
4502 }
4503
4504 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4505 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4506
4507 return 0;
4508 }
4509
4510 /**
4511 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4512 * @vsi: the VSI being configured
4513 * @enabled_tc: TC map to be enabled
4514 *
4515 **/
4516 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4517 {
4518 struct net_device *netdev = vsi->netdev;
4519 struct i40e_pf *pf = vsi->back;
4520 struct i40e_hw *hw = &pf->hw;
4521 u8 netdev_tc = 0;
4522 int i;
4523 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4524
4525 if (!netdev)
4526 return;
4527
4528 if (!enabled_tc) {
4529 netdev_reset_tc(netdev);
4530 return;
4531 }
4532
4533 /* Set up actual enabled TCs on the VSI */
4534 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4535 return;
4536
4537 /* set per TC queues for the VSI */
4538 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4539 /* Only set TC queues for enabled tcs
4540 *
4541 * e.g. For a VSI that has TC0 and TC3 enabled the
4542 * enabled_tc bitmap would be 0x00001001; the driver
4543 * will set the numtc for netdev as 2 that will be
4544 * referenced by the netdev layer as TC 0 and 1.
4545 */
4546 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4547 netdev_set_tc_queue(netdev,
4548 vsi->tc_config.tc_info[i].netdev_tc,
4549 vsi->tc_config.tc_info[i].qcount,
4550 vsi->tc_config.tc_info[i].qoffset);
4551 }
4552
4553 /* Assign UP2TC map for the VSI */
4554 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4555 /* Get the actual TC# for the UP */
4556 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4557 /* Get the mapped netdev TC# for the UP */
4558 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4559 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4560 }
4561 }
4562
4563 /**
4564 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4565 * @vsi: the VSI being configured
4566 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4567 **/
4568 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4569 struct i40e_vsi_context *ctxt)
4570 {
4571 /* copy just the sections touched not the entire info
4572 * since not all sections are valid as returned by
4573 * update vsi params
4574 */
4575 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4576 memcpy(&vsi->info.queue_mapping,
4577 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4578 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4579 sizeof(vsi->info.tc_mapping));
4580 }
4581
4582 /**
4583 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4584 * @vsi: VSI to be configured
4585 * @enabled_tc: TC bitmap
4586 *
4587 * This configures a particular VSI for TCs that are mapped to the
4588 * given TC bitmap. It uses default bandwidth share for TCs across
4589 * VSIs to configure TC for a particular VSI.
4590 *
4591 * NOTE:
4592 * It is expected that the VSI queues have been quisced before calling
4593 * this function.
4594 **/
4595 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4596 {
4597 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4598 struct i40e_vsi_context ctxt;
4599 int ret = 0;
4600 int i;
4601
4602 /* Check if enabled_tc is same as existing or new TCs */
4603 if (vsi->tc_config.enabled_tc == enabled_tc)
4604 return ret;
4605
4606 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4607 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4608 if (enabled_tc & BIT_ULL(i))
4609 bw_share[i] = 1;
4610 }
4611
4612 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4613 if (ret) {
4614 dev_info(&vsi->back->pdev->dev,
4615 "Failed configuring TC map %d for VSI %d\n",
4616 enabled_tc, vsi->seid);
4617 goto out;
4618 }
4619
4620 /* Update Queue Pairs Mapping for currently enabled UPs */
4621 ctxt.seid = vsi->seid;
4622 ctxt.pf_num = vsi->back->hw.pf_id;
4623 ctxt.vf_num = 0;
4624 ctxt.uplink_seid = vsi->uplink_seid;
4625 ctxt.info = vsi->info;
4626 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4627
4628 /* Update the VSI after updating the VSI queue-mapping information */
4629 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4630 if (ret) {
4631 dev_info(&vsi->back->pdev->dev,
4632 "Update vsi tc config failed, err %s aq_err %s\n",
4633 i40e_stat_str(&vsi->back->hw, ret),
4634 i40e_aq_str(&vsi->back->hw,
4635 vsi->back->hw.aq.asq_last_status));
4636 goto out;
4637 }
4638 /* update the local VSI info with updated queue map */
4639 i40e_vsi_update_queue_map(vsi, &ctxt);
4640 vsi->info.valid_sections = 0;
4641
4642 /* Update current VSI BW information */
4643 ret = i40e_vsi_get_bw_info(vsi);
4644 if (ret) {
4645 dev_info(&vsi->back->pdev->dev,
4646 "Failed updating vsi bw info, err %s aq_err %s\n",
4647 i40e_stat_str(&vsi->back->hw, ret),
4648 i40e_aq_str(&vsi->back->hw,
4649 vsi->back->hw.aq.asq_last_status));
4650 goto out;
4651 }
4652
4653 /* Update the netdev TC setup */
4654 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4655 out:
4656 return ret;
4657 }
4658
4659 /**
4660 * i40e_veb_config_tc - Configure TCs for given VEB
4661 * @veb: given VEB
4662 * @enabled_tc: TC bitmap
4663 *
4664 * Configures given TC bitmap for VEB (switching) element
4665 **/
4666 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4667 {
4668 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4669 struct i40e_pf *pf = veb->pf;
4670 int ret = 0;
4671 int i;
4672
4673 /* No TCs or already enabled TCs just return */
4674 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4675 return ret;
4676
4677 bw_data.tc_valid_bits = enabled_tc;
4678 /* bw_data.absolute_credits is not set (relative) */
4679
4680 /* Enable ETS TCs with equal BW Share for now */
4681 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4682 if (enabled_tc & BIT_ULL(i))
4683 bw_data.tc_bw_share_credits[i] = 1;
4684 }
4685
4686 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4687 &bw_data, NULL);
4688 if (ret) {
4689 dev_info(&pf->pdev->dev,
4690 "VEB bw config failed, err %s aq_err %s\n",
4691 i40e_stat_str(&pf->hw, ret),
4692 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4693 goto out;
4694 }
4695
4696 /* Update the BW information */
4697 ret = i40e_veb_get_bw_info(veb);
4698 if (ret) {
4699 dev_info(&pf->pdev->dev,
4700 "Failed getting veb bw config, err %s aq_err %s\n",
4701 i40e_stat_str(&pf->hw, ret),
4702 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4703 }
4704
4705 out:
4706 return ret;
4707 }
4708
4709 #ifdef CONFIG_I40E_DCB
4710 /**
4711 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4712 * @pf: PF struct
4713 *
4714 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4715 * the caller would've quiesce all the VSIs before calling
4716 * this function
4717 **/
4718 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4719 {
4720 u8 tc_map = 0;
4721 int ret;
4722 u8 v;
4723
4724 /* Enable the TCs available on PF to all VEBs */
4725 tc_map = i40e_pf_get_tc_map(pf);
4726 for (v = 0; v < I40E_MAX_VEB; v++) {
4727 if (!pf->veb[v])
4728 continue;
4729 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4730 if (ret) {
4731 dev_info(&pf->pdev->dev,
4732 "Failed configuring TC for VEB seid=%d\n",
4733 pf->veb[v]->seid);
4734 /* Will try to configure as many components */
4735 }
4736 }
4737
4738 /* Update each VSI */
4739 for (v = 0; v < pf->num_alloc_vsi; v++) {
4740 if (!pf->vsi[v])
4741 continue;
4742
4743 /* - Enable all TCs for the LAN VSI
4744 #ifdef I40E_FCOE
4745 * - For FCoE VSI only enable the TC configured
4746 * as per the APP TLV
4747 #endif
4748 * - For all others keep them at TC0 for now
4749 */
4750 if (v == pf->lan_vsi)
4751 tc_map = i40e_pf_get_tc_map(pf);
4752 else
4753 tc_map = i40e_pf_get_default_tc(pf);
4754 #ifdef I40E_FCOE
4755 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4756 tc_map = i40e_get_fcoe_tc_map(pf);
4757 #endif /* #ifdef I40E_FCOE */
4758
4759 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4760 if (ret) {
4761 dev_info(&pf->pdev->dev,
4762 "Failed configuring TC for VSI seid=%d\n",
4763 pf->vsi[v]->seid);
4764 /* Will try to configure as many components */
4765 } else {
4766 /* Re-configure VSI vectors based on updated TC map */
4767 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4768 if (pf->vsi[v]->netdev)
4769 i40e_dcbnl_set_all(pf->vsi[v]);
4770 }
4771 }
4772 }
4773
4774 /**
4775 * i40e_resume_port_tx - Resume port Tx
4776 * @pf: PF struct
4777 *
4778 * Resume a port's Tx and issue a PF reset in case of failure to
4779 * resume.
4780 **/
4781 static int i40e_resume_port_tx(struct i40e_pf *pf)
4782 {
4783 struct i40e_hw *hw = &pf->hw;
4784 int ret;
4785
4786 ret = i40e_aq_resume_port_tx(hw, NULL);
4787 if (ret) {
4788 dev_info(&pf->pdev->dev,
4789 "Resume Port Tx failed, err %s aq_err %s\n",
4790 i40e_stat_str(&pf->hw, ret),
4791 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4792 /* Schedule PF reset to recover */
4793 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4794 i40e_service_event_schedule(pf);
4795 }
4796
4797 return ret;
4798 }
4799
4800 /**
4801 * i40e_init_pf_dcb - Initialize DCB configuration
4802 * @pf: PF being configured
4803 *
4804 * Query the current DCB configuration and cache it
4805 * in the hardware structure
4806 **/
4807 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4808 {
4809 struct i40e_hw *hw = &pf->hw;
4810 int err = 0;
4811
4812 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4813 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4814 (pf->hw.aq.fw_maj_ver < 4))
4815 goto out;
4816
4817 /* Get the initial DCB configuration */
4818 err = i40e_init_dcb(hw);
4819 if (!err) {
4820 /* Device/Function is not DCBX capable */
4821 if ((!hw->func_caps.dcb) ||
4822 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4823 dev_info(&pf->pdev->dev,
4824 "DCBX offload is not supported or is disabled for this PF.\n");
4825
4826 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4827 goto out;
4828
4829 } else {
4830 /* When status is not DISABLED then DCBX in FW */
4831 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4832 DCB_CAP_DCBX_VER_IEEE;
4833
4834 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4835 /* Enable DCB tagging only when more than one TC */
4836 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4837 pf->flags |= I40E_FLAG_DCB_ENABLED;
4838 dev_dbg(&pf->pdev->dev,
4839 "DCBX offload is supported for this PF.\n");
4840 }
4841 } else {
4842 dev_info(&pf->pdev->dev,
4843 "Query for DCB configuration failed, err %s aq_err %s\n",
4844 i40e_stat_str(&pf->hw, err),
4845 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4846 }
4847
4848 out:
4849 return err;
4850 }
4851 #endif /* CONFIG_I40E_DCB */
4852 #define SPEED_SIZE 14
4853 #define FC_SIZE 8
4854 /**
4855 * i40e_print_link_message - print link up or down
4856 * @vsi: the VSI for which link needs a message
4857 */
4858 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4859 {
4860 char speed[SPEED_SIZE] = "Unknown";
4861 char fc[FC_SIZE] = "RX/TX";
4862
4863 if (!isup) {
4864 netdev_info(vsi->netdev, "NIC Link is Down\n");
4865 return;
4866 }
4867
4868 /* Warn user if link speed on NPAR enabled partition is not at
4869 * least 10GB
4870 */
4871 if (vsi->back->hw.func_caps.npar_enable &&
4872 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4873 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4874 netdev_warn(vsi->netdev,
4875 "The partition detected link speed that is less than 10Gbps\n");
4876
4877 switch (vsi->back->hw.phy.link_info.link_speed) {
4878 case I40E_LINK_SPEED_40GB:
4879 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4880 break;
4881 case I40E_LINK_SPEED_20GB:
4882 strncpy(speed, "20 Gbps", SPEED_SIZE);
4883 break;
4884 case I40E_LINK_SPEED_10GB:
4885 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4886 break;
4887 case I40E_LINK_SPEED_1GB:
4888 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4889 break;
4890 case I40E_LINK_SPEED_100MB:
4891 strncpy(speed, "100 Mbps", SPEED_SIZE);
4892 break;
4893 default:
4894 break;
4895 }
4896
4897 switch (vsi->back->hw.fc.current_mode) {
4898 case I40E_FC_FULL:
4899 strlcpy(fc, "RX/TX", FC_SIZE);
4900 break;
4901 case I40E_FC_TX_PAUSE:
4902 strlcpy(fc, "TX", FC_SIZE);
4903 break;
4904 case I40E_FC_RX_PAUSE:
4905 strlcpy(fc, "RX", FC_SIZE);
4906 break;
4907 default:
4908 strlcpy(fc, "None", FC_SIZE);
4909 break;
4910 }
4911
4912 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4913 speed, fc);
4914 }
4915
4916 /**
4917 * i40e_up_complete - Finish the last steps of bringing up a connection
4918 * @vsi: the VSI being configured
4919 **/
4920 static int i40e_up_complete(struct i40e_vsi *vsi)
4921 {
4922 struct i40e_pf *pf = vsi->back;
4923 int err;
4924
4925 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4926 i40e_vsi_configure_msix(vsi);
4927 else
4928 i40e_configure_msi_and_legacy(vsi);
4929
4930 /* start rings */
4931 err = i40e_vsi_control_rings(vsi, true);
4932 if (err)
4933 return err;
4934
4935 clear_bit(__I40E_DOWN, &vsi->state);
4936 i40e_napi_enable_all(vsi);
4937 i40e_vsi_enable_irq(vsi);
4938
4939 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4940 (vsi->netdev)) {
4941 i40e_print_link_message(vsi, true);
4942 netif_tx_start_all_queues(vsi->netdev);
4943 netif_carrier_on(vsi->netdev);
4944 } else if (vsi->netdev) {
4945 i40e_print_link_message(vsi, false);
4946 /* need to check for qualified module here*/
4947 if ((pf->hw.phy.link_info.link_info &
4948 I40E_AQ_MEDIA_AVAILABLE) &&
4949 (!(pf->hw.phy.link_info.an_info &
4950 I40E_AQ_QUALIFIED_MODULE)))
4951 netdev_err(vsi->netdev,
4952 "the driver failed to link because an unqualified module was detected.");
4953 }
4954
4955 /* replay FDIR SB filters */
4956 if (vsi->type == I40E_VSI_FDIR) {
4957 /* reset fd counters */
4958 pf->fd_add_err = pf->fd_atr_cnt = 0;
4959 if (pf->fd_tcp_rule > 0) {
4960 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4961 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4962 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4963 pf->fd_tcp_rule = 0;
4964 }
4965 i40e_fdir_filter_restore(vsi);
4966 }
4967 i40e_service_event_schedule(pf);
4968
4969 return 0;
4970 }
4971
4972 /**
4973 * i40e_vsi_reinit_locked - Reset the VSI
4974 * @vsi: the VSI being configured
4975 *
4976 * Rebuild the ring structs after some configuration
4977 * has changed, e.g. MTU size.
4978 **/
4979 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4980 {
4981 struct i40e_pf *pf = vsi->back;
4982
4983 WARN_ON(in_interrupt());
4984 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4985 usleep_range(1000, 2000);
4986 i40e_down(vsi);
4987
4988 /* Give a VF some time to respond to the reset. The
4989 * two second wait is based upon the watchdog cycle in
4990 * the VF driver.
4991 */
4992 if (vsi->type == I40E_VSI_SRIOV)
4993 msleep(2000);
4994 i40e_up(vsi);
4995 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4996 }
4997
4998 /**
4999 * i40e_up - Bring the connection back up after being down
5000 * @vsi: the VSI being configured
5001 **/
5002 int i40e_up(struct i40e_vsi *vsi)
5003 {
5004 int err;
5005
5006 err = i40e_vsi_configure(vsi);
5007 if (!err)
5008 err = i40e_up_complete(vsi);
5009
5010 return err;
5011 }
5012
5013 /**
5014 * i40e_down - Shutdown the connection processing
5015 * @vsi: the VSI being stopped
5016 **/
5017 void i40e_down(struct i40e_vsi *vsi)
5018 {
5019 int i;
5020
5021 /* It is assumed that the caller of this function
5022 * sets the vsi->state __I40E_DOWN bit.
5023 */
5024 if (vsi->netdev) {
5025 netif_carrier_off(vsi->netdev);
5026 netif_tx_disable(vsi->netdev);
5027 }
5028 i40e_vsi_disable_irq(vsi);
5029 i40e_vsi_control_rings(vsi, false);
5030 i40e_napi_disable_all(vsi);
5031
5032 for (i = 0; i < vsi->num_queue_pairs; i++) {
5033 i40e_clean_tx_ring(vsi->tx_rings[i]);
5034 i40e_clean_rx_ring(vsi->rx_rings[i]);
5035 }
5036 }
5037
5038 /**
5039 * i40e_setup_tc - configure multiple traffic classes
5040 * @netdev: net device to configure
5041 * @tc: number of traffic classes to enable
5042 **/
5043 #ifdef I40E_FCOE
5044 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5045 #else
5046 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5047 #endif
5048 {
5049 struct i40e_netdev_priv *np = netdev_priv(netdev);
5050 struct i40e_vsi *vsi = np->vsi;
5051 struct i40e_pf *pf = vsi->back;
5052 u8 enabled_tc = 0;
5053 int ret = -EINVAL;
5054 int i;
5055
5056 /* Check if DCB enabled to continue */
5057 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5058 netdev_info(netdev, "DCB is not enabled for adapter\n");
5059 goto exit;
5060 }
5061
5062 /* Check if MFP enabled */
5063 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5064 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5065 goto exit;
5066 }
5067
5068 /* Check whether tc count is within enabled limit */
5069 if (tc > i40e_pf_get_num_tc(pf)) {
5070 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5071 goto exit;
5072 }
5073
5074 /* Generate TC map for number of tc requested */
5075 for (i = 0; i < tc; i++)
5076 enabled_tc |= BIT_ULL(i);
5077
5078 /* Requesting same TC configuration as already enabled */
5079 if (enabled_tc == vsi->tc_config.enabled_tc)
5080 return 0;
5081
5082 /* Quiesce VSI queues */
5083 i40e_quiesce_vsi(vsi);
5084
5085 /* Configure VSI for enabled TCs */
5086 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5087 if (ret) {
5088 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5089 vsi->seid);
5090 goto exit;
5091 }
5092
5093 /* Unquiesce VSI */
5094 i40e_unquiesce_vsi(vsi);
5095
5096 exit:
5097 return ret;
5098 }
5099
5100 /**
5101 * i40e_open - Called when a network interface is made active
5102 * @netdev: network interface device structure
5103 *
5104 * The open entry point is called when a network interface is made
5105 * active by the system (IFF_UP). At this point all resources needed
5106 * for transmit and receive operations are allocated, the interrupt
5107 * handler is registered with the OS, the netdev watchdog subtask is
5108 * enabled, and the stack is notified that the interface is ready.
5109 *
5110 * Returns 0 on success, negative value on failure
5111 **/
5112 int i40e_open(struct net_device *netdev)
5113 {
5114 struct i40e_netdev_priv *np = netdev_priv(netdev);
5115 struct i40e_vsi *vsi = np->vsi;
5116 struct i40e_pf *pf = vsi->back;
5117 int err;
5118
5119 /* disallow open during test or if eeprom is broken */
5120 if (test_bit(__I40E_TESTING, &pf->state) ||
5121 test_bit(__I40E_BAD_EEPROM, &pf->state))
5122 return -EBUSY;
5123
5124 netif_carrier_off(netdev);
5125
5126 err = i40e_vsi_open(vsi);
5127 if (err)
5128 return err;
5129
5130 /* configure global TSO hardware offload settings */
5131 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5132 TCP_FLAG_FIN) >> 16);
5133 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5134 TCP_FLAG_FIN |
5135 TCP_FLAG_CWR) >> 16);
5136 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5137
5138 #ifdef CONFIG_I40E_VXLAN
5139 vxlan_get_rx_port(netdev);
5140 #endif
5141
5142 return 0;
5143 }
5144
5145 /**
5146 * i40e_vsi_open -
5147 * @vsi: the VSI to open
5148 *
5149 * Finish initialization of the VSI.
5150 *
5151 * Returns 0 on success, negative value on failure
5152 **/
5153 int i40e_vsi_open(struct i40e_vsi *vsi)
5154 {
5155 struct i40e_pf *pf = vsi->back;
5156 char int_name[I40E_INT_NAME_STR_LEN];
5157 int err;
5158
5159 /* allocate descriptors */
5160 err = i40e_vsi_setup_tx_resources(vsi);
5161 if (err)
5162 goto err_setup_tx;
5163 err = i40e_vsi_setup_rx_resources(vsi);
5164 if (err)
5165 goto err_setup_rx;
5166
5167 err = i40e_vsi_configure(vsi);
5168 if (err)
5169 goto err_setup_rx;
5170
5171 if (vsi->netdev) {
5172 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5173 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5174 err = i40e_vsi_request_irq(vsi, int_name);
5175 if (err)
5176 goto err_setup_rx;
5177
5178 /* Notify the stack of the actual queue counts. */
5179 err = netif_set_real_num_tx_queues(vsi->netdev,
5180 vsi->num_queue_pairs);
5181 if (err)
5182 goto err_set_queues;
5183
5184 err = netif_set_real_num_rx_queues(vsi->netdev,
5185 vsi->num_queue_pairs);
5186 if (err)
5187 goto err_set_queues;
5188
5189 } else if (vsi->type == I40E_VSI_FDIR) {
5190 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5191 dev_driver_string(&pf->pdev->dev),
5192 dev_name(&pf->pdev->dev));
5193 err = i40e_vsi_request_irq(vsi, int_name);
5194
5195 } else {
5196 err = -EINVAL;
5197 goto err_setup_rx;
5198 }
5199
5200 err = i40e_up_complete(vsi);
5201 if (err)
5202 goto err_up_complete;
5203
5204 return 0;
5205
5206 err_up_complete:
5207 i40e_down(vsi);
5208 err_set_queues:
5209 i40e_vsi_free_irq(vsi);
5210 err_setup_rx:
5211 i40e_vsi_free_rx_resources(vsi);
5212 err_setup_tx:
5213 i40e_vsi_free_tx_resources(vsi);
5214 if (vsi == pf->vsi[pf->lan_vsi])
5215 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5216
5217 return err;
5218 }
5219
5220 /**
5221 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5222 * @pf: Pointer to PF
5223 *
5224 * This function destroys the hlist where all the Flow Director
5225 * filters were saved.
5226 **/
5227 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5228 {
5229 struct i40e_fdir_filter *filter;
5230 struct hlist_node *node2;
5231
5232 hlist_for_each_entry_safe(filter, node2,
5233 &pf->fdir_filter_list, fdir_node) {
5234 hlist_del(&filter->fdir_node);
5235 kfree(filter);
5236 }
5237 pf->fdir_pf_active_filters = 0;
5238 }
5239
5240 /**
5241 * i40e_close - Disables a network interface
5242 * @netdev: network interface device structure
5243 *
5244 * The close entry point is called when an interface is de-activated
5245 * by the OS. The hardware is still under the driver's control, but
5246 * this netdev interface is disabled.
5247 *
5248 * Returns 0, this is not allowed to fail
5249 **/
5250 #ifdef I40E_FCOE
5251 int i40e_close(struct net_device *netdev)
5252 #else
5253 static int i40e_close(struct net_device *netdev)
5254 #endif
5255 {
5256 struct i40e_netdev_priv *np = netdev_priv(netdev);
5257 struct i40e_vsi *vsi = np->vsi;
5258
5259 i40e_vsi_close(vsi);
5260
5261 return 0;
5262 }
5263
5264 /**
5265 * i40e_do_reset - Start a PF or Core Reset sequence
5266 * @pf: board private structure
5267 * @reset_flags: which reset is requested
5268 *
5269 * The essential difference in resets is that the PF Reset
5270 * doesn't clear the packet buffers, doesn't reset the PE
5271 * firmware, and doesn't bother the other PFs on the chip.
5272 **/
5273 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5274 {
5275 u32 val;
5276
5277 WARN_ON(in_interrupt());
5278
5279 if (i40e_check_asq_alive(&pf->hw))
5280 i40e_vc_notify_reset(pf);
5281
5282 /* do the biggest reset indicated */
5283 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5284
5285 /* Request a Global Reset
5286 *
5287 * This will start the chip's countdown to the actual full
5288 * chip reset event, and a warning interrupt to be sent
5289 * to all PFs, including the requestor. Our handler
5290 * for the warning interrupt will deal with the shutdown
5291 * and recovery of the switch setup.
5292 */
5293 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5294 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5295 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5296 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5297
5298 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5299
5300 /* Request a Core Reset
5301 *
5302 * Same as Global Reset, except does *not* include the MAC/PHY
5303 */
5304 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5305 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5306 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5307 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5308 i40e_flush(&pf->hw);
5309
5310 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5311
5312 /* Request a PF Reset
5313 *
5314 * Resets only the PF-specific registers
5315 *
5316 * This goes directly to the tear-down and rebuild of
5317 * the switch, since we need to do all the recovery as
5318 * for the Core Reset.
5319 */
5320 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5321 i40e_handle_reset_warning(pf);
5322
5323 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5324 int v;
5325
5326 /* Find the VSI(s) that requested a re-init */
5327 dev_info(&pf->pdev->dev,
5328 "VSI reinit requested\n");
5329 for (v = 0; v < pf->num_alloc_vsi; v++) {
5330 struct i40e_vsi *vsi = pf->vsi[v];
5331 if (vsi != NULL &&
5332 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5333 i40e_vsi_reinit_locked(pf->vsi[v]);
5334 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5335 }
5336 }
5337
5338 /* no further action needed, so return now */
5339 return;
5340 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5341 int v;
5342
5343 /* Find the VSI(s) that needs to be brought down */
5344 dev_info(&pf->pdev->dev, "VSI down requested\n");
5345 for (v = 0; v < pf->num_alloc_vsi; v++) {
5346 struct i40e_vsi *vsi = pf->vsi[v];
5347 if (vsi != NULL &&
5348 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5349 set_bit(__I40E_DOWN, &vsi->state);
5350 i40e_down(vsi);
5351 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5352 }
5353 }
5354
5355 /* no further action needed, so return now */
5356 return;
5357 } else {
5358 dev_info(&pf->pdev->dev,
5359 "bad reset request 0x%08x\n", reset_flags);
5360 return;
5361 }
5362 }
5363
5364 #ifdef CONFIG_I40E_DCB
5365 /**
5366 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5367 * @pf: board private structure
5368 * @old_cfg: current DCB config
5369 * @new_cfg: new DCB config
5370 **/
5371 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5372 struct i40e_dcbx_config *old_cfg,
5373 struct i40e_dcbx_config *new_cfg)
5374 {
5375 bool need_reconfig = false;
5376
5377 /* Check if ETS configuration has changed */
5378 if (memcmp(&new_cfg->etscfg,
5379 &old_cfg->etscfg,
5380 sizeof(new_cfg->etscfg))) {
5381 /* If Priority Table has changed reconfig is needed */
5382 if (memcmp(&new_cfg->etscfg.prioritytable,
5383 &old_cfg->etscfg.prioritytable,
5384 sizeof(new_cfg->etscfg.prioritytable))) {
5385 need_reconfig = true;
5386 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5387 }
5388
5389 if (memcmp(&new_cfg->etscfg.tcbwtable,
5390 &old_cfg->etscfg.tcbwtable,
5391 sizeof(new_cfg->etscfg.tcbwtable)))
5392 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5393
5394 if (memcmp(&new_cfg->etscfg.tsatable,
5395 &old_cfg->etscfg.tsatable,
5396 sizeof(new_cfg->etscfg.tsatable)))
5397 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5398 }
5399
5400 /* Check if PFC configuration has changed */
5401 if (memcmp(&new_cfg->pfc,
5402 &old_cfg->pfc,
5403 sizeof(new_cfg->pfc))) {
5404 need_reconfig = true;
5405 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5406 }
5407
5408 /* Check if APP Table has changed */
5409 if (memcmp(&new_cfg->app,
5410 &old_cfg->app,
5411 sizeof(new_cfg->app))) {
5412 need_reconfig = true;
5413 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5414 }
5415
5416 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5417 return need_reconfig;
5418 }
5419
5420 /**
5421 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5422 * @pf: board private structure
5423 * @e: event info posted on ARQ
5424 **/
5425 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5426 struct i40e_arq_event_info *e)
5427 {
5428 struct i40e_aqc_lldp_get_mib *mib =
5429 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5430 struct i40e_hw *hw = &pf->hw;
5431 struct i40e_dcbx_config tmp_dcbx_cfg;
5432 bool need_reconfig = false;
5433 int ret = 0;
5434 u8 type;
5435
5436 /* Not DCB capable or capability disabled */
5437 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5438 return ret;
5439
5440 /* Ignore if event is not for Nearest Bridge */
5441 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5442 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5443 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5444 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5445 return ret;
5446
5447 /* Check MIB Type and return if event for Remote MIB update */
5448 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5449 dev_dbg(&pf->pdev->dev,
5450 "LLDP event mib type %s\n", type ? "remote" : "local");
5451 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5452 /* Update the remote cached instance and return */
5453 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5454 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5455 &hw->remote_dcbx_config);
5456 goto exit;
5457 }
5458
5459 /* Store the old configuration */
5460 tmp_dcbx_cfg = hw->local_dcbx_config;
5461
5462 /* Reset the old DCBx configuration data */
5463 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5464 /* Get updated DCBX data from firmware */
5465 ret = i40e_get_dcb_config(&pf->hw);
5466 if (ret) {
5467 dev_info(&pf->pdev->dev,
5468 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5469 i40e_stat_str(&pf->hw, ret),
5470 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5471 goto exit;
5472 }
5473
5474 /* No change detected in DCBX configs */
5475 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5476 sizeof(tmp_dcbx_cfg))) {
5477 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5478 goto exit;
5479 }
5480
5481 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5482 &hw->local_dcbx_config);
5483
5484 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5485
5486 if (!need_reconfig)
5487 goto exit;
5488
5489 /* Enable DCB tagging only when more than one TC */
5490 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5491 pf->flags |= I40E_FLAG_DCB_ENABLED;
5492 else
5493 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5494
5495 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5496 /* Reconfiguration needed quiesce all VSIs */
5497 i40e_pf_quiesce_all_vsi(pf);
5498
5499 /* Changes in configuration update VEB/VSI */
5500 i40e_dcb_reconfigure(pf);
5501
5502 ret = i40e_resume_port_tx(pf);
5503
5504 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5505 /* In case of error no point in resuming VSIs */
5506 if (ret)
5507 goto exit;
5508
5509 /* Wait for the PF's Tx queues to be disabled */
5510 ret = i40e_pf_wait_txq_disabled(pf);
5511 if (ret) {
5512 /* Schedule PF reset to recover */
5513 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5514 i40e_service_event_schedule(pf);
5515 } else {
5516 i40e_pf_unquiesce_all_vsi(pf);
5517 }
5518
5519 exit:
5520 return ret;
5521 }
5522 #endif /* CONFIG_I40E_DCB */
5523
5524 /**
5525 * i40e_do_reset_safe - Protected reset path for userland calls.
5526 * @pf: board private structure
5527 * @reset_flags: which reset is requested
5528 *
5529 **/
5530 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5531 {
5532 rtnl_lock();
5533 i40e_do_reset(pf, reset_flags);
5534 rtnl_unlock();
5535 }
5536
5537 /**
5538 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5539 * @pf: board private structure
5540 * @e: event info posted on ARQ
5541 *
5542 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5543 * and VF queues
5544 **/
5545 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5546 struct i40e_arq_event_info *e)
5547 {
5548 struct i40e_aqc_lan_overflow *data =
5549 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5550 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5551 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5552 struct i40e_hw *hw = &pf->hw;
5553 struct i40e_vf *vf;
5554 u16 vf_id;
5555
5556 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5557 queue, qtx_ctl);
5558
5559 /* Queue belongs to VF, find the VF and issue VF reset */
5560 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5561 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5562 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5563 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5564 vf_id -= hw->func_caps.vf_base_id;
5565 vf = &pf->vf[vf_id];
5566 i40e_vc_notify_vf_reset(vf);
5567 /* Allow VF to process pending reset notification */
5568 msleep(20);
5569 i40e_reset_vf(vf, false);
5570 }
5571 }
5572
5573 /**
5574 * i40e_service_event_complete - Finish up the service event
5575 * @pf: board private structure
5576 **/
5577 static void i40e_service_event_complete(struct i40e_pf *pf)
5578 {
5579 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5580
5581 /* flush memory to make sure state is correct before next watchog */
5582 smp_mb__before_atomic();
5583 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5584 }
5585
5586 /**
5587 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5588 * @pf: board private structure
5589 **/
5590 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5591 {
5592 u32 val, fcnt_prog;
5593
5594 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5595 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5596 return fcnt_prog;
5597 }
5598
5599 /**
5600 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5601 * @pf: board private structure
5602 **/
5603 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5604 {
5605 u32 val, fcnt_prog;
5606
5607 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5608 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5609 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5610 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5611 return fcnt_prog;
5612 }
5613
5614 /**
5615 * i40e_get_global_fd_count - Get total FD filters programmed on device
5616 * @pf: board private structure
5617 **/
5618 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5619 {
5620 u32 val, fcnt_prog;
5621
5622 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5623 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5624 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5625 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5626 return fcnt_prog;
5627 }
5628
5629 /**
5630 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5631 * @pf: board private structure
5632 **/
5633 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5634 {
5635 u32 fcnt_prog, fcnt_avail;
5636
5637 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5638 return;
5639
5640 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5641 * to re-enable
5642 */
5643 fcnt_prog = i40e_get_global_fd_count(pf);
5644 fcnt_avail = pf->fdir_pf_filter_count;
5645 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5646 (pf->fd_add_err == 0) ||
5647 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5648 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5649 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5650 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5651 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5652 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5653 }
5654 }
5655 /* Wait for some more space to be available to turn on ATR */
5656 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5657 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5658 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5659 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5660 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5661 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5662 }
5663 }
5664 }
5665
5666 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5667 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5668 /**
5669 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5670 * @pf: board private structure
5671 **/
5672 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5673 {
5674 unsigned long min_flush_time;
5675 int flush_wait_retry = 50;
5676 bool disable_atr = false;
5677 int fd_room;
5678 int reg;
5679
5680 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5681 return;
5682
5683 if (time_after(jiffies, pf->fd_flush_timestamp +
5684 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5685 /* If the flush is happening too quick and we have mostly
5686 * SB rules we should not re-enable ATR for some time.
5687 */
5688 min_flush_time = pf->fd_flush_timestamp
5689 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5690 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5691
5692 if (!(time_after(jiffies, min_flush_time)) &&
5693 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5694 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5695 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5696 disable_atr = true;
5697 }
5698
5699 pf->fd_flush_timestamp = jiffies;
5700 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5701 /* flush all filters */
5702 wr32(&pf->hw, I40E_PFQF_CTL_1,
5703 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5704 i40e_flush(&pf->hw);
5705 pf->fd_flush_cnt++;
5706 pf->fd_add_err = 0;
5707 do {
5708 /* Check FD flush status every 5-6msec */
5709 usleep_range(5000, 6000);
5710 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5711 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5712 break;
5713 } while (flush_wait_retry--);
5714 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5715 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5716 } else {
5717 /* replay sideband filters */
5718 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5719 if (!disable_atr)
5720 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5721 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5722 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5723 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5724 }
5725 }
5726 }
5727
5728 /**
5729 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5730 * @pf: board private structure
5731 **/
5732 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5733 {
5734 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5735 }
5736
5737 /* We can see up to 256 filter programming desc in transit if the filters are
5738 * being applied really fast; before we see the first
5739 * filter miss error on Rx queue 0. Accumulating enough error messages before
5740 * reacting will make sure we don't cause flush too often.
5741 */
5742 #define I40E_MAX_FD_PROGRAM_ERROR 256
5743
5744 /**
5745 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5746 * @pf: board private structure
5747 **/
5748 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5749 {
5750
5751 /* if interface is down do nothing */
5752 if (test_bit(__I40E_DOWN, &pf->state))
5753 return;
5754
5755 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5756 return;
5757
5758 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5759 i40e_fdir_flush_and_replay(pf);
5760
5761 i40e_fdir_check_and_reenable(pf);
5762
5763 }
5764
5765 /**
5766 * i40e_vsi_link_event - notify VSI of a link event
5767 * @vsi: vsi to be notified
5768 * @link_up: link up or down
5769 **/
5770 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5771 {
5772 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5773 return;
5774
5775 switch (vsi->type) {
5776 case I40E_VSI_MAIN:
5777 #ifdef I40E_FCOE
5778 case I40E_VSI_FCOE:
5779 #endif
5780 if (!vsi->netdev || !vsi->netdev_registered)
5781 break;
5782
5783 if (link_up) {
5784 netif_carrier_on(vsi->netdev);
5785 netif_tx_wake_all_queues(vsi->netdev);
5786 } else {
5787 netif_carrier_off(vsi->netdev);
5788 netif_tx_stop_all_queues(vsi->netdev);
5789 }
5790 break;
5791
5792 case I40E_VSI_SRIOV:
5793 case I40E_VSI_VMDQ2:
5794 case I40E_VSI_CTRL:
5795 case I40E_VSI_MIRROR:
5796 default:
5797 /* there is no notification for other VSIs */
5798 break;
5799 }
5800 }
5801
5802 /**
5803 * i40e_veb_link_event - notify elements on the veb of a link event
5804 * @veb: veb to be notified
5805 * @link_up: link up or down
5806 **/
5807 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5808 {
5809 struct i40e_pf *pf;
5810 int i;
5811
5812 if (!veb || !veb->pf)
5813 return;
5814 pf = veb->pf;
5815
5816 /* depth first... */
5817 for (i = 0; i < I40E_MAX_VEB; i++)
5818 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5819 i40e_veb_link_event(pf->veb[i], link_up);
5820
5821 /* ... now the local VSIs */
5822 for (i = 0; i < pf->num_alloc_vsi; i++)
5823 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5824 i40e_vsi_link_event(pf->vsi[i], link_up);
5825 }
5826
5827 /**
5828 * i40e_link_event - Update netif_carrier status
5829 * @pf: board private structure
5830 **/
5831 static void i40e_link_event(struct i40e_pf *pf)
5832 {
5833 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5834 u8 new_link_speed, old_link_speed;
5835 i40e_status status;
5836 bool new_link, old_link;
5837
5838 /* set this to force the get_link_status call to refresh state */
5839 pf->hw.phy.get_link_info = true;
5840
5841 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5842
5843 status = i40e_get_link_status(&pf->hw, &new_link);
5844 if (status) {
5845 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5846 status);
5847 return;
5848 }
5849
5850 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5851 new_link_speed = pf->hw.phy.link_info.link_speed;
5852
5853 if (new_link == old_link &&
5854 new_link_speed == old_link_speed &&
5855 (test_bit(__I40E_DOWN, &vsi->state) ||
5856 new_link == netif_carrier_ok(vsi->netdev)))
5857 return;
5858
5859 if (!test_bit(__I40E_DOWN, &vsi->state))
5860 i40e_print_link_message(vsi, new_link);
5861
5862 /* Notify the base of the switch tree connected to
5863 * the link. Floating VEBs are not notified.
5864 */
5865 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5866 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5867 else
5868 i40e_vsi_link_event(vsi, new_link);
5869
5870 if (pf->vf)
5871 i40e_vc_notify_link_state(pf);
5872
5873 if (pf->flags & I40E_FLAG_PTP)
5874 i40e_ptp_set_increment(pf);
5875 }
5876
5877 /**
5878 * i40e_watchdog_subtask - periodic checks not using event driven response
5879 * @pf: board private structure
5880 **/
5881 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5882 {
5883 int i;
5884
5885 /* if interface is down do nothing */
5886 if (test_bit(__I40E_DOWN, &pf->state) ||
5887 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5888 return;
5889
5890 /* make sure we don't do these things too often */
5891 if (time_before(jiffies, (pf->service_timer_previous +
5892 pf->service_timer_period)))
5893 return;
5894 pf->service_timer_previous = jiffies;
5895
5896 i40e_link_event(pf);
5897
5898 /* Update the stats for active netdevs so the network stack
5899 * can look at updated numbers whenever it cares to
5900 */
5901 for (i = 0; i < pf->num_alloc_vsi; i++)
5902 if (pf->vsi[i] && pf->vsi[i]->netdev)
5903 i40e_update_stats(pf->vsi[i]);
5904
5905 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5906 /* Update the stats for the active switching components */
5907 for (i = 0; i < I40E_MAX_VEB; i++)
5908 if (pf->veb[i])
5909 i40e_update_veb_stats(pf->veb[i]);
5910 }
5911
5912 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5913 }
5914
5915 /**
5916 * i40e_reset_subtask - Set up for resetting the device and driver
5917 * @pf: board private structure
5918 **/
5919 static void i40e_reset_subtask(struct i40e_pf *pf)
5920 {
5921 u32 reset_flags = 0;
5922
5923 rtnl_lock();
5924 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5925 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5926 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5927 }
5928 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5929 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5930 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5931 }
5932 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5933 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5934 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5935 }
5936 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5937 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5938 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5939 }
5940 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5941 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5942 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5943 }
5944
5945 /* If there's a recovery already waiting, it takes
5946 * precedence before starting a new reset sequence.
5947 */
5948 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5949 i40e_handle_reset_warning(pf);
5950 goto unlock;
5951 }
5952
5953 /* If we're already down or resetting, just bail */
5954 if (reset_flags &&
5955 !test_bit(__I40E_DOWN, &pf->state) &&
5956 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5957 i40e_do_reset(pf, reset_flags);
5958
5959 unlock:
5960 rtnl_unlock();
5961 }
5962
5963 /**
5964 * i40e_handle_link_event - Handle link event
5965 * @pf: board private structure
5966 * @e: event info posted on ARQ
5967 **/
5968 static void i40e_handle_link_event(struct i40e_pf *pf,
5969 struct i40e_arq_event_info *e)
5970 {
5971 struct i40e_hw *hw = &pf->hw;
5972 struct i40e_aqc_get_link_status *status =
5973 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5974
5975 /* save off old link status information */
5976 hw->phy.link_info_old = hw->phy.link_info;
5977
5978 /* Do a new status request to re-enable LSE reporting
5979 * and load new status information into the hw struct
5980 * This completely ignores any state information
5981 * in the ARQ event info, instead choosing to always
5982 * issue the AQ update link status command.
5983 */
5984 i40e_link_event(pf);
5985
5986 /* check for unqualified module, if link is down */
5987 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5988 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5989 (!(status->link_info & I40E_AQ_LINK_UP)))
5990 dev_err(&pf->pdev->dev,
5991 "The driver failed to link because an unqualified module was detected.\n");
5992 }
5993
5994 /**
5995 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5996 * @pf: board private structure
5997 **/
5998 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5999 {
6000 struct i40e_arq_event_info event;
6001 struct i40e_hw *hw = &pf->hw;
6002 u16 pending, i = 0;
6003 i40e_status ret;
6004 u16 opcode;
6005 u32 oldval;
6006 u32 val;
6007
6008 /* Do not run clean AQ when PF reset fails */
6009 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6010 return;
6011
6012 /* check for error indications */
6013 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6014 oldval = val;
6015 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6016 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6017 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6018 }
6019 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6020 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6021 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6022 }
6023 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6024 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6025 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6026 }
6027 if (oldval != val)
6028 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6029
6030 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6031 oldval = val;
6032 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6033 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6034 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6035 }
6036 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6037 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6038 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6039 }
6040 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6041 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6042 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6043 }
6044 if (oldval != val)
6045 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6046
6047 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6048 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6049 if (!event.msg_buf)
6050 return;
6051
6052 do {
6053 ret = i40e_clean_arq_element(hw, &event, &pending);
6054 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6055 break;
6056 else if (ret) {
6057 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6058 break;
6059 }
6060
6061 opcode = le16_to_cpu(event.desc.opcode);
6062 switch (opcode) {
6063
6064 case i40e_aqc_opc_get_link_status:
6065 i40e_handle_link_event(pf, &event);
6066 break;
6067 case i40e_aqc_opc_send_msg_to_pf:
6068 ret = i40e_vc_process_vf_msg(pf,
6069 le16_to_cpu(event.desc.retval),
6070 le32_to_cpu(event.desc.cookie_high),
6071 le32_to_cpu(event.desc.cookie_low),
6072 event.msg_buf,
6073 event.msg_len);
6074 break;
6075 case i40e_aqc_opc_lldp_update_mib:
6076 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6077 #ifdef CONFIG_I40E_DCB
6078 rtnl_lock();
6079 ret = i40e_handle_lldp_event(pf, &event);
6080 rtnl_unlock();
6081 #endif /* CONFIG_I40E_DCB */
6082 break;
6083 case i40e_aqc_opc_event_lan_overflow:
6084 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6085 i40e_handle_lan_overflow_event(pf, &event);
6086 break;
6087 case i40e_aqc_opc_send_msg_to_peer:
6088 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6089 break;
6090 case i40e_aqc_opc_nvm_erase:
6091 case i40e_aqc_opc_nvm_update:
6092 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6093 break;
6094 default:
6095 dev_info(&pf->pdev->dev,
6096 "ARQ Error: Unknown event 0x%04x received\n",
6097 opcode);
6098 break;
6099 }
6100 } while (pending && (i++ < pf->adminq_work_limit));
6101
6102 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6103 /* re-enable Admin queue interrupt cause */
6104 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6105 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6106 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6107 i40e_flush(hw);
6108
6109 kfree(event.msg_buf);
6110 }
6111
6112 /**
6113 * i40e_verify_eeprom - make sure eeprom is good to use
6114 * @pf: board private structure
6115 **/
6116 static void i40e_verify_eeprom(struct i40e_pf *pf)
6117 {
6118 int err;
6119
6120 err = i40e_diag_eeprom_test(&pf->hw);
6121 if (err) {
6122 /* retry in case of garbage read */
6123 err = i40e_diag_eeprom_test(&pf->hw);
6124 if (err) {
6125 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6126 err);
6127 set_bit(__I40E_BAD_EEPROM, &pf->state);
6128 }
6129 }
6130
6131 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6132 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6133 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6134 }
6135 }
6136
6137 /**
6138 * i40e_enable_pf_switch_lb
6139 * @pf: pointer to the PF structure
6140 *
6141 * enable switch loop back or die - no point in a return value
6142 **/
6143 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6144 {
6145 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6146 struct i40e_vsi_context ctxt;
6147 int ret;
6148
6149 ctxt.seid = pf->main_vsi_seid;
6150 ctxt.pf_num = pf->hw.pf_id;
6151 ctxt.vf_num = 0;
6152 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6153 if (ret) {
6154 dev_info(&pf->pdev->dev,
6155 "couldn't get PF vsi config, err %s aq_err %s\n",
6156 i40e_stat_str(&pf->hw, ret),
6157 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6158 return;
6159 }
6160 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6161 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6162 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6163
6164 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6165 if (ret) {
6166 dev_info(&pf->pdev->dev,
6167 "update vsi switch failed, err %s aq_err %s\n",
6168 i40e_stat_str(&pf->hw, ret),
6169 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6170 }
6171 }
6172
6173 /**
6174 * i40e_disable_pf_switch_lb
6175 * @pf: pointer to the PF structure
6176 *
6177 * disable switch loop back or die - no point in a return value
6178 **/
6179 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6180 {
6181 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6182 struct i40e_vsi_context ctxt;
6183 int ret;
6184
6185 ctxt.seid = pf->main_vsi_seid;
6186 ctxt.pf_num = pf->hw.pf_id;
6187 ctxt.vf_num = 0;
6188 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6189 if (ret) {
6190 dev_info(&pf->pdev->dev,
6191 "couldn't get PF vsi config, err %s aq_err %s\n",
6192 i40e_stat_str(&pf->hw, ret),
6193 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6194 return;
6195 }
6196 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6197 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6198 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6199
6200 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6201 if (ret) {
6202 dev_info(&pf->pdev->dev,
6203 "update vsi switch failed, err %s aq_err %s\n",
6204 i40e_stat_str(&pf->hw, ret),
6205 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6206 }
6207 }
6208
6209 /**
6210 * i40e_config_bridge_mode - Configure the HW bridge mode
6211 * @veb: pointer to the bridge instance
6212 *
6213 * Configure the loop back mode for the LAN VSI that is downlink to the
6214 * specified HW bridge instance. It is expected this function is called
6215 * when a new HW bridge is instantiated.
6216 **/
6217 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6218 {
6219 struct i40e_pf *pf = veb->pf;
6220
6221 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6222 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6223 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6224 i40e_disable_pf_switch_lb(pf);
6225 else
6226 i40e_enable_pf_switch_lb(pf);
6227 }
6228
6229 /**
6230 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6231 * @veb: pointer to the VEB instance
6232 *
6233 * This is a recursive function that first builds the attached VSIs then
6234 * recurses in to build the next layer of VEB. We track the connections
6235 * through our own index numbers because the seid's from the HW could
6236 * change across the reset.
6237 **/
6238 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6239 {
6240 struct i40e_vsi *ctl_vsi = NULL;
6241 struct i40e_pf *pf = veb->pf;
6242 int v, veb_idx;
6243 int ret;
6244
6245 /* build VSI that owns this VEB, temporarily attached to base VEB */
6246 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6247 if (pf->vsi[v] &&
6248 pf->vsi[v]->veb_idx == veb->idx &&
6249 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6250 ctl_vsi = pf->vsi[v];
6251 break;
6252 }
6253 }
6254 if (!ctl_vsi) {
6255 dev_info(&pf->pdev->dev,
6256 "missing owner VSI for veb_idx %d\n", veb->idx);
6257 ret = -ENOENT;
6258 goto end_reconstitute;
6259 }
6260 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6261 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6262 ret = i40e_add_vsi(ctl_vsi);
6263 if (ret) {
6264 dev_info(&pf->pdev->dev,
6265 "rebuild of veb_idx %d owner VSI failed: %d\n",
6266 veb->idx, ret);
6267 goto end_reconstitute;
6268 }
6269 i40e_vsi_reset_stats(ctl_vsi);
6270
6271 /* create the VEB in the switch and move the VSI onto the VEB */
6272 ret = i40e_add_veb(veb, ctl_vsi);
6273 if (ret)
6274 goto end_reconstitute;
6275
6276 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6277 veb->bridge_mode = BRIDGE_MODE_VEB;
6278 else
6279 veb->bridge_mode = BRIDGE_MODE_VEPA;
6280 i40e_config_bridge_mode(veb);
6281
6282 /* create the remaining VSIs attached to this VEB */
6283 for (v = 0; v < pf->num_alloc_vsi; v++) {
6284 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6285 continue;
6286
6287 if (pf->vsi[v]->veb_idx == veb->idx) {
6288 struct i40e_vsi *vsi = pf->vsi[v];
6289 vsi->uplink_seid = veb->seid;
6290 ret = i40e_add_vsi(vsi);
6291 if (ret) {
6292 dev_info(&pf->pdev->dev,
6293 "rebuild of vsi_idx %d failed: %d\n",
6294 v, ret);
6295 goto end_reconstitute;
6296 }
6297 i40e_vsi_reset_stats(vsi);
6298 }
6299 }
6300
6301 /* create any VEBs attached to this VEB - RECURSION */
6302 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6303 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6304 pf->veb[veb_idx]->uplink_seid = veb->seid;
6305 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6306 if (ret)
6307 break;
6308 }
6309 }
6310
6311 end_reconstitute:
6312 return ret;
6313 }
6314
6315 /**
6316 * i40e_get_capabilities - get info about the HW
6317 * @pf: the PF struct
6318 **/
6319 static int i40e_get_capabilities(struct i40e_pf *pf)
6320 {
6321 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6322 u16 data_size;
6323 int buf_len;
6324 int err;
6325
6326 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6327 do {
6328 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6329 if (!cap_buf)
6330 return -ENOMEM;
6331
6332 /* this loads the data into the hw struct for us */
6333 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6334 &data_size,
6335 i40e_aqc_opc_list_func_capabilities,
6336 NULL);
6337 /* data loaded, buffer no longer needed */
6338 kfree(cap_buf);
6339
6340 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6341 /* retry with a larger buffer */
6342 buf_len = data_size;
6343 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6344 dev_info(&pf->pdev->dev,
6345 "capability discovery failed, err %s aq_err %s\n",
6346 i40e_stat_str(&pf->hw, err),
6347 i40e_aq_str(&pf->hw,
6348 pf->hw.aq.asq_last_status));
6349 return -ENODEV;
6350 }
6351 } while (err);
6352
6353 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6354 (pf->hw.aq.fw_maj_ver < 2)) {
6355 pf->hw.func_caps.num_msix_vectors++;
6356 pf->hw.func_caps.num_msix_vectors_vf++;
6357 }
6358
6359 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6360 dev_info(&pf->pdev->dev,
6361 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6362 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6363 pf->hw.func_caps.num_msix_vectors,
6364 pf->hw.func_caps.num_msix_vectors_vf,
6365 pf->hw.func_caps.fd_filters_guaranteed,
6366 pf->hw.func_caps.fd_filters_best_effort,
6367 pf->hw.func_caps.num_tx_qp,
6368 pf->hw.func_caps.num_vsis);
6369
6370 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6371 + pf->hw.func_caps.num_vfs)
6372 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6373 dev_info(&pf->pdev->dev,
6374 "got num_vsis %d, setting num_vsis to %d\n",
6375 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6376 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6377 }
6378
6379 return 0;
6380 }
6381
6382 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6383
6384 /**
6385 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6386 * @pf: board private structure
6387 **/
6388 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6389 {
6390 struct i40e_vsi *vsi;
6391 int i;
6392
6393 /* quick workaround for an NVM issue that leaves a critical register
6394 * uninitialized
6395 */
6396 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6397 static const u32 hkey[] = {
6398 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6399 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6400 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6401 0x95b3a76d};
6402
6403 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6404 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6405 }
6406
6407 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6408 return;
6409
6410 /* find existing VSI and see if it needs configuring */
6411 vsi = NULL;
6412 for (i = 0; i < pf->num_alloc_vsi; i++) {
6413 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6414 vsi = pf->vsi[i];
6415 break;
6416 }
6417 }
6418
6419 /* create a new VSI if none exists */
6420 if (!vsi) {
6421 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6422 pf->vsi[pf->lan_vsi]->seid, 0);
6423 if (!vsi) {
6424 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6425 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6426 return;
6427 }
6428 }
6429
6430 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6431 }
6432
6433 /**
6434 * i40e_fdir_teardown - release the Flow Director resources
6435 * @pf: board private structure
6436 **/
6437 static void i40e_fdir_teardown(struct i40e_pf *pf)
6438 {
6439 int i;
6440
6441 i40e_fdir_filter_exit(pf);
6442 for (i = 0; i < pf->num_alloc_vsi; i++) {
6443 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6444 i40e_vsi_release(pf->vsi[i]);
6445 break;
6446 }
6447 }
6448 }
6449
6450 /**
6451 * i40e_prep_for_reset - prep for the core to reset
6452 * @pf: board private structure
6453 *
6454 * Close up the VFs and other things in prep for PF Reset.
6455 **/
6456 static void i40e_prep_for_reset(struct i40e_pf *pf)
6457 {
6458 struct i40e_hw *hw = &pf->hw;
6459 i40e_status ret = 0;
6460 u32 v;
6461
6462 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6463 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6464 return;
6465
6466 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6467
6468 /* quiesce the VSIs and their queues that are not already DOWN */
6469 i40e_pf_quiesce_all_vsi(pf);
6470
6471 for (v = 0; v < pf->num_alloc_vsi; v++) {
6472 if (pf->vsi[v])
6473 pf->vsi[v]->seid = 0;
6474 }
6475
6476 i40e_shutdown_adminq(&pf->hw);
6477
6478 /* call shutdown HMC */
6479 if (hw->hmc.hmc_obj) {
6480 ret = i40e_shutdown_lan_hmc(hw);
6481 if (ret)
6482 dev_warn(&pf->pdev->dev,
6483 "shutdown_lan_hmc failed: %d\n", ret);
6484 }
6485 }
6486
6487 /**
6488 * i40e_send_version - update firmware with driver version
6489 * @pf: PF struct
6490 */
6491 static void i40e_send_version(struct i40e_pf *pf)
6492 {
6493 struct i40e_driver_version dv;
6494
6495 dv.major_version = DRV_VERSION_MAJOR;
6496 dv.minor_version = DRV_VERSION_MINOR;
6497 dv.build_version = DRV_VERSION_BUILD;
6498 dv.subbuild_version = 0;
6499 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6500 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6501 }
6502
6503 /**
6504 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6505 * @pf: board private structure
6506 * @reinit: if the Main VSI needs to re-initialized.
6507 **/
6508 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6509 {
6510 struct i40e_hw *hw = &pf->hw;
6511 u8 set_fc_aq_fail = 0;
6512 i40e_status ret;
6513 u32 v;
6514
6515 /* Now we wait for GRST to settle out.
6516 * We don't have to delete the VEBs or VSIs from the hw switch
6517 * because the reset will make them disappear.
6518 */
6519 ret = i40e_pf_reset(hw);
6520 if (ret) {
6521 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6522 set_bit(__I40E_RESET_FAILED, &pf->state);
6523 goto clear_recovery;
6524 }
6525 pf->pfr_count++;
6526
6527 if (test_bit(__I40E_DOWN, &pf->state))
6528 goto clear_recovery;
6529 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6530
6531 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6532 ret = i40e_init_adminq(&pf->hw);
6533 if (ret) {
6534 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6535 i40e_stat_str(&pf->hw, ret),
6536 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6537 goto clear_recovery;
6538 }
6539
6540 /* re-verify the eeprom if we just had an EMP reset */
6541 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6542 i40e_verify_eeprom(pf);
6543
6544 i40e_clear_pxe_mode(hw);
6545 ret = i40e_get_capabilities(pf);
6546 if (ret)
6547 goto end_core_reset;
6548
6549 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6550 hw->func_caps.num_rx_qp,
6551 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6552 if (ret) {
6553 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6554 goto end_core_reset;
6555 }
6556 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6557 if (ret) {
6558 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6559 goto end_core_reset;
6560 }
6561
6562 #ifdef CONFIG_I40E_DCB
6563 ret = i40e_init_pf_dcb(pf);
6564 if (ret) {
6565 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6566 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6567 /* Continue without DCB enabled */
6568 }
6569 #endif /* CONFIG_I40E_DCB */
6570 #ifdef I40E_FCOE
6571 i40e_init_pf_fcoe(pf);
6572
6573 #endif
6574 /* do basic switch setup */
6575 ret = i40e_setup_pf_switch(pf, reinit);
6576 if (ret)
6577 goto end_core_reset;
6578
6579 /* driver is only interested in link up/down and module qualification
6580 * reports from firmware
6581 */
6582 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6583 I40E_AQ_EVENT_LINK_UPDOWN |
6584 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6585 if (ret)
6586 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6587 i40e_stat_str(&pf->hw, ret),
6588 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6589
6590 /* make sure our flow control settings are restored */
6591 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6592 if (ret)
6593 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6594 i40e_stat_str(&pf->hw, ret),
6595 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6596
6597 /* Rebuild the VSIs and VEBs that existed before reset.
6598 * They are still in our local switch element arrays, so only
6599 * need to rebuild the switch model in the HW.
6600 *
6601 * If there were VEBs but the reconstitution failed, we'll try
6602 * try to recover minimal use by getting the basic PF VSI working.
6603 */
6604 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6605 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6606 /* find the one VEB connected to the MAC, and find orphans */
6607 for (v = 0; v < I40E_MAX_VEB; v++) {
6608 if (!pf->veb[v])
6609 continue;
6610
6611 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6612 pf->veb[v]->uplink_seid == 0) {
6613 ret = i40e_reconstitute_veb(pf->veb[v]);
6614
6615 if (!ret)
6616 continue;
6617
6618 /* If Main VEB failed, we're in deep doodoo,
6619 * so give up rebuilding the switch and set up
6620 * for minimal rebuild of PF VSI.
6621 * If orphan failed, we'll report the error
6622 * but try to keep going.
6623 */
6624 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6625 dev_info(&pf->pdev->dev,
6626 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6627 ret);
6628 pf->vsi[pf->lan_vsi]->uplink_seid
6629 = pf->mac_seid;
6630 break;
6631 } else if (pf->veb[v]->uplink_seid == 0) {
6632 dev_info(&pf->pdev->dev,
6633 "rebuild of orphan VEB failed: %d\n",
6634 ret);
6635 }
6636 }
6637 }
6638 }
6639
6640 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6641 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6642 /* no VEB, so rebuild only the Main VSI */
6643 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6644 if (ret) {
6645 dev_info(&pf->pdev->dev,
6646 "rebuild of Main VSI failed: %d\n", ret);
6647 goto end_core_reset;
6648 }
6649 }
6650
6651 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6652 (pf->hw.aq.fw_maj_ver < 4)) {
6653 msleep(75);
6654 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6655 if (ret)
6656 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6657 i40e_stat_str(&pf->hw, ret),
6658 i40e_aq_str(&pf->hw,
6659 pf->hw.aq.asq_last_status));
6660 }
6661 /* reinit the misc interrupt */
6662 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6663 ret = i40e_setup_misc_vector(pf);
6664
6665 /* restart the VSIs that were rebuilt and running before the reset */
6666 i40e_pf_unquiesce_all_vsi(pf);
6667
6668 if (pf->num_alloc_vfs) {
6669 for (v = 0; v < pf->num_alloc_vfs; v++)
6670 i40e_reset_vf(&pf->vf[v], true);
6671 }
6672
6673 /* tell the firmware that we're starting */
6674 i40e_send_version(pf);
6675
6676 end_core_reset:
6677 clear_bit(__I40E_RESET_FAILED, &pf->state);
6678 clear_recovery:
6679 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6680 }
6681
6682 /**
6683 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6684 * @pf: board private structure
6685 *
6686 * Close up the VFs and other things in prep for a Core Reset,
6687 * then get ready to rebuild the world.
6688 **/
6689 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6690 {
6691 i40e_prep_for_reset(pf);
6692 i40e_reset_and_rebuild(pf, false);
6693 }
6694
6695 /**
6696 * i40e_handle_mdd_event
6697 * @pf: pointer to the PF structure
6698 *
6699 * Called from the MDD irq handler to identify possibly malicious vfs
6700 **/
6701 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6702 {
6703 struct i40e_hw *hw = &pf->hw;
6704 bool mdd_detected = false;
6705 bool pf_mdd_detected = false;
6706 struct i40e_vf *vf;
6707 u32 reg;
6708 int i;
6709
6710 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6711 return;
6712
6713 /* find what triggered the MDD event */
6714 reg = rd32(hw, I40E_GL_MDET_TX);
6715 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6716 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6717 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6718 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6719 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6720 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6721 I40E_GL_MDET_TX_EVENT_SHIFT;
6722 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6723 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6724 pf->hw.func_caps.base_queue;
6725 if (netif_msg_tx_err(pf))
6726 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6727 event, queue, pf_num, vf_num);
6728 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6729 mdd_detected = true;
6730 }
6731 reg = rd32(hw, I40E_GL_MDET_RX);
6732 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6733 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6734 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6735 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6736 I40E_GL_MDET_RX_EVENT_SHIFT;
6737 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6738 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6739 pf->hw.func_caps.base_queue;
6740 if (netif_msg_rx_err(pf))
6741 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6742 event, queue, func);
6743 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6744 mdd_detected = true;
6745 }
6746
6747 if (mdd_detected) {
6748 reg = rd32(hw, I40E_PF_MDET_TX);
6749 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6750 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6751 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6752 pf_mdd_detected = true;
6753 }
6754 reg = rd32(hw, I40E_PF_MDET_RX);
6755 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6756 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6757 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6758 pf_mdd_detected = true;
6759 }
6760 /* Queue belongs to the PF, initiate a reset */
6761 if (pf_mdd_detected) {
6762 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6763 i40e_service_event_schedule(pf);
6764 }
6765 }
6766
6767 /* see if one of the VFs needs its hand slapped */
6768 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6769 vf = &(pf->vf[i]);
6770 reg = rd32(hw, I40E_VP_MDET_TX(i));
6771 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6772 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6773 vf->num_mdd_events++;
6774 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6775 i);
6776 }
6777
6778 reg = rd32(hw, I40E_VP_MDET_RX(i));
6779 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6780 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6781 vf->num_mdd_events++;
6782 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6783 i);
6784 }
6785
6786 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6787 dev_info(&pf->pdev->dev,
6788 "Too many MDD events on VF %d, disabled\n", i);
6789 dev_info(&pf->pdev->dev,
6790 "Use PF Control I/F to re-enable the VF\n");
6791 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6792 }
6793 }
6794
6795 /* re-enable mdd interrupt cause */
6796 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6797 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6798 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6799 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6800 i40e_flush(hw);
6801 }
6802
6803 #ifdef CONFIG_I40E_VXLAN
6804 /**
6805 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6806 * @pf: board private structure
6807 **/
6808 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6809 {
6810 struct i40e_hw *hw = &pf->hw;
6811 i40e_status ret;
6812 __be16 port;
6813 int i;
6814
6815 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6816 return;
6817
6818 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6819
6820 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6821 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6822 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6823 port = pf->vxlan_ports[i];
6824 if (port)
6825 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6826 I40E_AQC_TUNNEL_TYPE_VXLAN,
6827 NULL, NULL);
6828 else
6829 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6830
6831 if (ret) {
6832 dev_info(&pf->pdev->dev,
6833 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6834 port ? "add" : "delete",
6835 ntohs(port), i,
6836 i40e_stat_str(&pf->hw, ret),
6837 i40e_aq_str(&pf->hw,
6838 pf->hw.aq.asq_last_status));
6839 pf->vxlan_ports[i] = 0;
6840 }
6841 }
6842 }
6843 }
6844
6845 #endif
6846 /**
6847 * i40e_service_task - Run the driver's async subtasks
6848 * @work: pointer to work_struct containing our data
6849 **/
6850 static void i40e_service_task(struct work_struct *work)
6851 {
6852 struct i40e_pf *pf = container_of(work,
6853 struct i40e_pf,
6854 service_task);
6855 unsigned long start_time = jiffies;
6856
6857 /* don't bother with service tasks if a reset is in progress */
6858 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6859 i40e_service_event_complete(pf);
6860 return;
6861 }
6862
6863 i40e_detect_recover_hung(pf);
6864 i40e_reset_subtask(pf);
6865 i40e_handle_mdd_event(pf);
6866 i40e_vc_process_vflr_event(pf);
6867 i40e_watchdog_subtask(pf);
6868 i40e_fdir_reinit_subtask(pf);
6869 i40e_sync_filters_subtask(pf);
6870 #ifdef CONFIG_I40E_VXLAN
6871 i40e_sync_vxlan_filters_subtask(pf);
6872 #endif
6873 i40e_clean_adminq_subtask(pf);
6874
6875 i40e_service_event_complete(pf);
6876
6877 /* If the tasks have taken longer than one timer cycle or there
6878 * is more work to be done, reschedule the service task now
6879 * rather than wait for the timer to tick again.
6880 */
6881 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6882 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6883 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6884 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6885 i40e_service_event_schedule(pf);
6886 }
6887
6888 /**
6889 * i40e_service_timer - timer callback
6890 * @data: pointer to PF struct
6891 **/
6892 static void i40e_service_timer(unsigned long data)
6893 {
6894 struct i40e_pf *pf = (struct i40e_pf *)data;
6895
6896 mod_timer(&pf->service_timer,
6897 round_jiffies(jiffies + pf->service_timer_period));
6898 i40e_service_event_schedule(pf);
6899 }
6900
6901 /**
6902 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6903 * @vsi: the VSI being configured
6904 **/
6905 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6906 {
6907 struct i40e_pf *pf = vsi->back;
6908
6909 switch (vsi->type) {
6910 case I40E_VSI_MAIN:
6911 vsi->alloc_queue_pairs = pf->num_lan_qps;
6912 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6913 I40E_REQ_DESCRIPTOR_MULTIPLE);
6914 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6915 vsi->num_q_vectors = pf->num_lan_msix;
6916 else
6917 vsi->num_q_vectors = 1;
6918
6919 break;
6920
6921 case I40E_VSI_FDIR:
6922 vsi->alloc_queue_pairs = 1;
6923 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6924 I40E_REQ_DESCRIPTOR_MULTIPLE);
6925 vsi->num_q_vectors = 1;
6926 break;
6927
6928 case I40E_VSI_VMDQ2:
6929 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6930 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6931 I40E_REQ_DESCRIPTOR_MULTIPLE);
6932 vsi->num_q_vectors = pf->num_vmdq_msix;
6933 break;
6934
6935 case I40E_VSI_SRIOV:
6936 vsi->alloc_queue_pairs = pf->num_vf_qps;
6937 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6938 I40E_REQ_DESCRIPTOR_MULTIPLE);
6939 break;
6940
6941 #ifdef I40E_FCOE
6942 case I40E_VSI_FCOE:
6943 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6944 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6945 I40E_REQ_DESCRIPTOR_MULTIPLE);
6946 vsi->num_q_vectors = pf->num_fcoe_msix;
6947 break;
6948
6949 #endif /* I40E_FCOE */
6950 default:
6951 WARN_ON(1);
6952 return -ENODATA;
6953 }
6954
6955 return 0;
6956 }
6957
6958 /**
6959 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6960 * @type: VSI pointer
6961 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6962 *
6963 * On error: returns error code (negative)
6964 * On success: returns 0
6965 **/
6966 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6967 {
6968 int size;
6969 int ret = 0;
6970
6971 /* allocate memory for both Tx and Rx ring pointers */
6972 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6973 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6974 if (!vsi->tx_rings)
6975 return -ENOMEM;
6976 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6977
6978 if (alloc_qvectors) {
6979 /* allocate memory for q_vector pointers */
6980 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6981 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6982 if (!vsi->q_vectors) {
6983 ret = -ENOMEM;
6984 goto err_vectors;
6985 }
6986 }
6987 return ret;
6988
6989 err_vectors:
6990 kfree(vsi->tx_rings);
6991 return ret;
6992 }
6993
6994 /**
6995 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6996 * @pf: board private structure
6997 * @type: type of VSI
6998 *
6999 * On error: returns error code (negative)
7000 * On success: returns vsi index in PF (positive)
7001 **/
7002 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7003 {
7004 int ret = -ENODEV;
7005 struct i40e_vsi *vsi;
7006 int vsi_idx;
7007 int i;
7008
7009 /* Need to protect the allocation of the VSIs at the PF level */
7010 mutex_lock(&pf->switch_mutex);
7011
7012 /* VSI list may be fragmented if VSI creation/destruction has
7013 * been happening. We can afford to do a quick scan to look
7014 * for any free VSIs in the list.
7015 *
7016 * find next empty vsi slot, looping back around if necessary
7017 */
7018 i = pf->next_vsi;
7019 while (i < pf->num_alloc_vsi && pf->vsi[i])
7020 i++;
7021 if (i >= pf->num_alloc_vsi) {
7022 i = 0;
7023 while (i < pf->next_vsi && pf->vsi[i])
7024 i++;
7025 }
7026
7027 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7028 vsi_idx = i; /* Found one! */
7029 } else {
7030 ret = -ENODEV;
7031 goto unlock_pf; /* out of VSI slots! */
7032 }
7033 pf->next_vsi = ++i;
7034
7035 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7036 if (!vsi) {
7037 ret = -ENOMEM;
7038 goto unlock_pf;
7039 }
7040 vsi->type = type;
7041 vsi->back = pf;
7042 set_bit(__I40E_DOWN, &vsi->state);
7043 vsi->flags = 0;
7044 vsi->idx = vsi_idx;
7045 vsi->rx_itr_setting = pf->rx_itr_default;
7046 vsi->tx_itr_setting = pf->tx_itr_default;
7047 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7048 pf->rss_table_size : 64;
7049 vsi->netdev_registered = false;
7050 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7051 INIT_LIST_HEAD(&vsi->mac_filter_list);
7052 vsi->irqs_ready = false;
7053
7054 ret = i40e_set_num_rings_in_vsi(vsi);
7055 if (ret)
7056 goto err_rings;
7057
7058 ret = i40e_vsi_alloc_arrays(vsi, true);
7059 if (ret)
7060 goto err_rings;
7061
7062 /* Setup default MSIX irq handler for VSI */
7063 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7064
7065 pf->vsi[vsi_idx] = vsi;
7066 ret = vsi_idx;
7067 goto unlock_pf;
7068
7069 err_rings:
7070 pf->next_vsi = i - 1;
7071 kfree(vsi);
7072 unlock_pf:
7073 mutex_unlock(&pf->switch_mutex);
7074 return ret;
7075 }
7076
7077 /**
7078 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7079 * @type: VSI pointer
7080 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7081 *
7082 * On error: returns error code (negative)
7083 * On success: returns 0
7084 **/
7085 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7086 {
7087 /* free the ring and vector containers */
7088 if (free_qvectors) {
7089 kfree(vsi->q_vectors);
7090 vsi->q_vectors = NULL;
7091 }
7092 kfree(vsi->tx_rings);
7093 vsi->tx_rings = NULL;
7094 vsi->rx_rings = NULL;
7095 }
7096
7097 /**
7098 * i40e_vsi_clear - Deallocate the VSI provided
7099 * @vsi: the VSI being un-configured
7100 **/
7101 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7102 {
7103 struct i40e_pf *pf;
7104
7105 if (!vsi)
7106 return 0;
7107
7108 if (!vsi->back)
7109 goto free_vsi;
7110 pf = vsi->back;
7111
7112 mutex_lock(&pf->switch_mutex);
7113 if (!pf->vsi[vsi->idx]) {
7114 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7115 vsi->idx, vsi->idx, vsi, vsi->type);
7116 goto unlock_vsi;
7117 }
7118
7119 if (pf->vsi[vsi->idx] != vsi) {
7120 dev_err(&pf->pdev->dev,
7121 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7122 pf->vsi[vsi->idx]->idx,
7123 pf->vsi[vsi->idx],
7124 pf->vsi[vsi->idx]->type,
7125 vsi->idx, vsi, vsi->type);
7126 goto unlock_vsi;
7127 }
7128
7129 /* updates the PF for this cleared vsi */
7130 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7131 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7132
7133 i40e_vsi_free_arrays(vsi, true);
7134
7135 pf->vsi[vsi->idx] = NULL;
7136 if (vsi->idx < pf->next_vsi)
7137 pf->next_vsi = vsi->idx;
7138
7139 unlock_vsi:
7140 mutex_unlock(&pf->switch_mutex);
7141 free_vsi:
7142 kfree(vsi);
7143
7144 return 0;
7145 }
7146
7147 /**
7148 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7149 * @vsi: the VSI being cleaned
7150 **/
7151 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7152 {
7153 int i;
7154
7155 if (vsi->tx_rings && vsi->tx_rings[0]) {
7156 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7157 kfree_rcu(vsi->tx_rings[i], rcu);
7158 vsi->tx_rings[i] = NULL;
7159 vsi->rx_rings[i] = NULL;
7160 }
7161 }
7162 }
7163
7164 /**
7165 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7166 * @vsi: the VSI being configured
7167 **/
7168 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7169 {
7170 struct i40e_ring *tx_ring, *rx_ring;
7171 struct i40e_pf *pf = vsi->back;
7172 int i;
7173
7174 /* Set basic values in the rings to be used later during open() */
7175 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7176 /* allocate space for both Tx and Rx in one shot */
7177 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7178 if (!tx_ring)
7179 goto err_out;
7180
7181 tx_ring->queue_index = i;
7182 tx_ring->reg_idx = vsi->base_queue + i;
7183 tx_ring->ring_active = false;
7184 tx_ring->vsi = vsi;
7185 tx_ring->netdev = vsi->netdev;
7186 tx_ring->dev = &pf->pdev->dev;
7187 tx_ring->count = vsi->num_desc;
7188 tx_ring->size = 0;
7189 tx_ring->dcb_tc = 0;
7190 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7191 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7192 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7193 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7194 vsi->tx_rings[i] = tx_ring;
7195
7196 rx_ring = &tx_ring[1];
7197 rx_ring->queue_index = i;
7198 rx_ring->reg_idx = vsi->base_queue + i;
7199 rx_ring->ring_active = false;
7200 rx_ring->vsi = vsi;
7201 rx_ring->netdev = vsi->netdev;
7202 rx_ring->dev = &pf->pdev->dev;
7203 rx_ring->count = vsi->num_desc;
7204 rx_ring->size = 0;
7205 rx_ring->dcb_tc = 0;
7206 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7207 set_ring_16byte_desc_enabled(rx_ring);
7208 else
7209 clear_ring_16byte_desc_enabled(rx_ring);
7210 vsi->rx_rings[i] = rx_ring;
7211 }
7212
7213 return 0;
7214
7215 err_out:
7216 i40e_vsi_clear_rings(vsi);
7217 return -ENOMEM;
7218 }
7219
7220 /**
7221 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7222 * @pf: board private structure
7223 * @vectors: the number of MSI-X vectors to request
7224 *
7225 * Returns the number of vectors reserved, or error
7226 **/
7227 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7228 {
7229 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7230 I40E_MIN_MSIX, vectors);
7231 if (vectors < 0) {
7232 dev_info(&pf->pdev->dev,
7233 "MSI-X vector reservation failed: %d\n", vectors);
7234 vectors = 0;
7235 }
7236
7237 return vectors;
7238 }
7239
7240 /**
7241 * i40e_init_msix - Setup the MSIX capability
7242 * @pf: board private structure
7243 *
7244 * Work with the OS to set up the MSIX vectors needed.
7245 *
7246 * Returns the number of vectors reserved or negative on failure
7247 **/
7248 static int i40e_init_msix(struct i40e_pf *pf)
7249 {
7250 struct i40e_hw *hw = &pf->hw;
7251 int vectors_left;
7252 int v_budget, i;
7253 int v_actual;
7254
7255 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7256 return -ENODEV;
7257
7258 /* The number of vectors we'll request will be comprised of:
7259 * - Add 1 for "other" cause for Admin Queue events, etc.
7260 * - The number of LAN queue pairs
7261 * - Queues being used for RSS.
7262 * We don't need as many as max_rss_size vectors.
7263 * use rss_size instead in the calculation since that
7264 * is governed by number of cpus in the system.
7265 * - assumes symmetric Tx/Rx pairing
7266 * - The number of VMDq pairs
7267 #ifdef I40E_FCOE
7268 * - The number of FCOE qps.
7269 #endif
7270 * Once we count this up, try the request.
7271 *
7272 * If we can't get what we want, we'll simplify to nearly nothing
7273 * and try again. If that still fails, we punt.
7274 */
7275 vectors_left = hw->func_caps.num_msix_vectors;
7276 v_budget = 0;
7277
7278 /* reserve one vector for miscellaneous handler */
7279 if (vectors_left) {
7280 v_budget++;
7281 vectors_left--;
7282 }
7283
7284 /* reserve vectors for the main PF traffic queues */
7285 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7286 vectors_left -= pf->num_lan_msix;
7287 v_budget += pf->num_lan_msix;
7288
7289 /* reserve one vector for sideband flow director */
7290 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7291 if (vectors_left) {
7292 v_budget++;
7293 vectors_left--;
7294 } else {
7295 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7296 }
7297 }
7298
7299 #ifdef I40E_FCOE
7300 /* can we reserve enough for FCoE? */
7301 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7302 if (!vectors_left)
7303 pf->num_fcoe_msix = 0;
7304 else if (vectors_left >= pf->num_fcoe_qps)
7305 pf->num_fcoe_msix = pf->num_fcoe_qps;
7306 else
7307 pf->num_fcoe_msix = 1;
7308 v_budget += pf->num_fcoe_msix;
7309 vectors_left -= pf->num_fcoe_msix;
7310 }
7311
7312 #endif
7313 /* any vectors left over go for VMDq support */
7314 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7315 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7316 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7317
7318 /* if we're short on vectors for what's desired, we limit
7319 * the queues per vmdq. If this is still more than are
7320 * available, the user will need to change the number of
7321 * queues/vectors used by the PF later with the ethtool
7322 * channels command
7323 */
7324 if (vmdq_vecs < vmdq_vecs_wanted)
7325 pf->num_vmdq_qps = 1;
7326 pf->num_vmdq_msix = pf->num_vmdq_qps;
7327
7328 v_budget += vmdq_vecs;
7329 vectors_left -= vmdq_vecs;
7330 }
7331
7332 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7333 GFP_KERNEL);
7334 if (!pf->msix_entries)
7335 return -ENOMEM;
7336
7337 for (i = 0; i < v_budget; i++)
7338 pf->msix_entries[i].entry = i;
7339 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7340
7341 if (v_actual != v_budget) {
7342 /* If we have limited resources, we will start with no vectors
7343 * for the special features and then allocate vectors to some
7344 * of these features based on the policy and at the end disable
7345 * the features that did not get any vectors.
7346 */
7347 #ifdef I40E_FCOE
7348 pf->num_fcoe_qps = 0;
7349 pf->num_fcoe_msix = 0;
7350 #endif
7351 pf->num_vmdq_msix = 0;
7352 }
7353
7354 if (v_actual < I40E_MIN_MSIX) {
7355 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7356 kfree(pf->msix_entries);
7357 pf->msix_entries = NULL;
7358 return -ENODEV;
7359
7360 } else if (v_actual == I40E_MIN_MSIX) {
7361 /* Adjust for minimal MSIX use */
7362 pf->num_vmdq_vsis = 0;
7363 pf->num_vmdq_qps = 0;
7364 pf->num_lan_qps = 1;
7365 pf->num_lan_msix = 1;
7366
7367 } else if (v_actual != v_budget) {
7368 int vec;
7369
7370 /* reserve the misc vector */
7371 vec = v_actual - 1;
7372
7373 /* Scale vector usage down */
7374 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7375 pf->num_vmdq_vsis = 1;
7376 pf->num_vmdq_qps = 1;
7377 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7378
7379 /* partition out the remaining vectors */
7380 switch (vec) {
7381 case 2:
7382 pf->num_lan_msix = 1;
7383 break;
7384 case 3:
7385 #ifdef I40E_FCOE
7386 /* give one vector to FCoE */
7387 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7388 pf->num_lan_msix = 1;
7389 pf->num_fcoe_msix = 1;
7390 }
7391 #else
7392 pf->num_lan_msix = 2;
7393 #endif
7394 break;
7395 default:
7396 #ifdef I40E_FCOE
7397 /* give one vector to FCoE */
7398 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7399 pf->num_fcoe_msix = 1;
7400 vec--;
7401 }
7402 #endif
7403 /* give the rest to the PF */
7404 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7405 break;
7406 }
7407 }
7408
7409 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7410 (pf->num_vmdq_msix == 0)) {
7411 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7412 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7413 }
7414 #ifdef I40E_FCOE
7415
7416 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7417 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7418 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7419 }
7420 #endif
7421 return v_actual;
7422 }
7423
7424 /**
7425 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7426 * @vsi: the VSI being configured
7427 * @v_idx: index of the vector in the vsi struct
7428 *
7429 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7430 **/
7431 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7432 {
7433 struct i40e_q_vector *q_vector;
7434
7435 /* allocate q_vector */
7436 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7437 if (!q_vector)
7438 return -ENOMEM;
7439
7440 q_vector->vsi = vsi;
7441 q_vector->v_idx = v_idx;
7442 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7443 if (vsi->netdev)
7444 netif_napi_add(vsi->netdev, &q_vector->napi,
7445 i40e_napi_poll, NAPI_POLL_WEIGHT);
7446
7447 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7448 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7449
7450 /* tie q_vector and vsi together */
7451 vsi->q_vectors[v_idx] = q_vector;
7452
7453 return 0;
7454 }
7455
7456 /**
7457 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7458 * @vsi: the VSI being configured
7459 *
7460 * We allocate one q_vector per queue interrupt. If allocation fails we
7461 * return -ENOMEM.
7462 **/
7463 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7464 {
7465 struct i40e_pf *pf = vsi->back;
7466 int v_idx, num_q_vectors;
7467 int err;
7468
7469 /* if not MSIX, give the one vector only to the LAN VSI */
7470 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7471 num_q_vectors = vsi->num_q_vectors;
7472 else if (vsi == pf->vsi[pf->lan_vsi])
7473 num_q_vectors = 1;
7474 else
7475 return -EINVAL;
7476
7477 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7478 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7479 if (err)
7480 goto err_out;
7481 }
7482
7483 return 0;
7484
7485 err_out:
7486 while (v_idx--)
7487 i40e_free_q_vector(vsi, v_idx);
7488
7489 return err;
7490 }
7491
7492 /**
7493 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7494 * @pf: board private structure to initialize
7495 **/
7496 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7497 {
7498 int vectors = 0;
7499 ssize_t size;
7500
7501 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7502 vectors = i40e_init_msix(pf);
7503 if (vectors < 0) {
7504 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7505 #ifdef I40E_FCOE
7506 I40E_FLAG_FCOE_ENABLED |
7507 #endif
7508 I40E_FLAG_RSS_ENABLED |
7509 I40E_FLAG_DCB_CAPABLE |
7510 I40E_FLAG_SRIOV_ENABLED |
7511 I40E_FLAG_FD_SB_ENABLED |
7512 I40E_FLAG_FD_ATR_ENABLED |
7513 I40E_FLAG_VMDQ_ENABLED);
7514
7515 /* rework the queue expectations without MSIX */
7516 i40e_determine_queue_usage(pf);
7517 }
7518 }
7519
7520 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7521 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7522 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7523 vectors = pci_enable_msi(pf->pdev);
7524 if (vectors < 0) {
7525 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7526 vectors);
7527 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7528 }
7529 vectors = 1; /* one MSI or Legacy vector */
7530 }
7531
7532 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7533 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7534
7535 /* set up vector assignment tracking */
7536 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7537 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7538 if (!pf->irq_pile) {
7539 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7540 return -ENOMEM;
7541 }
7542 pf->irq_pile->num_entries = vectors;
7543 pf->irq_pile->search_hint = 0;
7544
7545 /* track first vector for misc interrupts, ignore return */
7546 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7547
7548 return 0;
7549 }
7550
7551 /**
7552 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7553 * @pf: board private structure
7554 *
7555 * This sets up the handler for MSIX 0, which is used to manage the
7556 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7557 * when in MSI or Legacy interrupt mode.
7558 **/
7559 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7560 {
7561 struct i40e_hw *hw = &pf->hw;
7562 int err = 0;
7563
7564 /* Only request the irq if this is the first time through, and
7565 * not when we're rebuilding after a Reset
7566 */
7567 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7568 err = request_irq(pf->msix_entries[0].vector,
7569 i40e_intr, 0, pf->int_name, pf);
7570 if (err) {
7571 dev_info(&pf->pdev->dev,
7572 "request_irq for %s failed: %d\n",
7573 pf->int_name, err);
7574 return -EFAULT;
7575 }
7576 }
7577
7578 i40e_enable_misc_int_causes(pf);
7579
7580 /* associate no queues to the misc vector */
7581 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7582 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7583
7584 i40e_flush(hw);
7585
7586 i40e_irq_dynamic_enable_icr0(pf);
7587
7588 return err;
7589 }
7590
7591 /**
7592 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7593 * @vsi: vsi structure
7594 * @seed: RSS hash seed
7595 **/
7596 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7597 {
7598 struct i40e_aqc_get_set_rss_key_data rss_key;
7599 struct i40e_pf *pf = vsi->back;
7600 struct i40e_hw *hw = &pf->hw;
7601 bool pf_lut = false;
7602 u8 *rss_lut;
7603 int ret, i;
7604
7605 memset(&rss_key, 0, sizeof(rss_key));
7606 memcpy(&rss_key, seed, sizeof(rss_key));
7607
7608 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7609 if (!rss_lut)
7610 return -ENOMEM;
7611
7612 /* Populate the LUT with max no. of queues in round robin fashion */
7613 for (i = 0; i < vsi->rss_table_size; i++)
7614 rss_lut[i] = i % vsi->rss_size;
7615
7616 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7617 if (ret) {
7618 dev_info(&pf->pdev->dev,
7619 "Cannot set RSS key, err %s aq_err %s\n",
7620 i40e_stat_str(&pf->hw, ret),
7621 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7622 goto config_rss_aq_out;
7623 }
7624
7625 if (vsi->type == I40E_VSI_MAIN)
7626 pf_lut = true;
7627
7628 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7629 vsi->rss_table_size);
7630 if (ret)
7631 dev_info(&pf->pdev->dev,
7632 "Cannot set RSS lut, err %s aq_err %s\n",
7633 i40e_stat_str(&pf->hw, ret),
7634 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7635
7636 config_rss_aq_out:
7637 kfree(rss_lut);
7638 return ret;
7639 }
7640
7641 /**
7642 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7643 * @vsi: VSI structure
7644 **/
7645 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7646 {
7647 u8 seed[I40E_HKEY_ARRAY_SIZE];
7648 struct i40e_pf *pf = vsi->back;
7649
7650 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7651 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7652
7653 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7654 return i40e_config_rss_aq(vsi, seed);
7655
7656 return 0;
7657 }
7658
7659 /**
7660 * i40e_config_rss_reg - Prepare for RSS if used
7661 * @pf: board private structure
7662 * @seed: RSS hash seed
7663 **/
7664 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7665 {
7666 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7667 struct i40e_hw *hw = &pf->hw;
7668 u32 *seed_dw = (u32 *)seed;
7669 u32 current_queue = 0;
7670 u32 lut = 0;
7671 int i, j;
7672
7673 /* Fill out hash function seed */
7674 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7675 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7676
7677 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7678 lut = 0;
7679 for (j = 0; j < 4; j++) {
7680 if (current_queue == vsi->rss_size)
7681 current_queue = 0;
7682 lut |= ((current_queue) << (8 * j));
7683 current_queue++;
7684 }
7685 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7686 }
7687 i40e_flush(hw);
7688
7689 return 0;
7690 }
7691
7692 /**
7693 * i40e_config_rss - Prepare for RSS if used
7694 * @pf: board private structure
7695 **/
7696 static int i40e_config_rss(struct i40e_pf *pf)
7697 {
7698 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7699 u8 seed[I40E_HKEY_ARRAY_SIZE];
7700 struct i40e_hw *hw = &pf->hw;
7701 u32 reg_val;
7702 u64 hena;
7703
7704 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7705
7706 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7707 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7708 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7709 hena |= i40e_pf_get_default_rss_hena(pf);
7710
7711 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7712 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7713
7714 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7715
7716 /* Determine the RSS table size based on the hardware capabilities */
7717 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7718 reg_val = (pf->rss_table_size == 512) ?
7719 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7720 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7721 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7722
7723 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7724 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7725 else
7726 return i40e_config_rss_reg(pf, seed);
7727 }
7728
7729 /**
7730 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7731 * @pf: board private structure
7732 * @queue_count: the requested queue count for rss.
7733 *
7734 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7735 * count which may be different from the requested queue count.
7736 **/
7737 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7738 {
7739 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7740 int new_rss_size;
7741
7742 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7743 return 0;
7744
7745 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7746
7747 if (queue_count != vsi->num_queue_pairs) {
7748 vsi->req_queue_pairs = queue_count;
7749 i40e_prep_for_reset(pf);
7750
7751 pf->rss_size = new_rss_size;
7752
7753 i40e_reset_and_rebuild(pf, true);
7754 i40e_config_rss(pf);
7755 }
7756 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7757 return pf->rss_size;
7758 }
7759
7760 /**
7761 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7762 * @pf: board private structure
7763 **/
7764 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7765 {
7766 i40e_status status;
7767 bool min_valid, max_valid;
7768 u32 max_bw, min_bw;
7769
7770 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7771 &min_valid, &max_valid);
7772
7773 if (!status) {
7774 if (min_valid)
7775 pf->npar_min_bw = min_bw;
7776 if (max_valid)
7777 pf->npar_max_bw = max_bw;
7778 }
7779
7780 return status;
7781 }
7782
7783 /**
7784 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7785 * @pf: board private structure
7786 **/
7787 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7788 {
7789 struct i40e_aqc_configure_partition_bw_data bw_data;
7790 i40e_status status;
7791
7792 /* Set the valid bit for this PF */
7793 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7794 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7795 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7796
7797 /* Set the new bandwidths */
7798 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7799
7800 return status;
7801 }
7802
7803 /**
7804 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7805 * @pf: board private structure
7806 **/
7807 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7808 {
7809 /* Commit temporary BW setting to permanent NVM image */
7810 enum i40e_admin_queue_err last_aq_status;
7811 i40e_status ret;
7812 u16 nvm_word;
7813
7814 if (pf->hw.partition_id != 1) {
7815 dev_info(&pf->pdev->dev,
7816 "Commit BW only works on partition 1! This is partition %d",
7817 pf->hw.partition_id);
7818 ret = I40E_NOT_SUPPORTED;
7819 goto bw_commit_out;
7820 }
7821
7822 /* Acquire NVM for read access */
7823 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7824 last_aq_status = pf->hw.aq.asq_last_status;
7825 if (ret) {
7826 dev_info(&pf->pdev->dev,
7827 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7828 i40e_stat_str(&pf->hw, ret),
7829 i40e_aq_str(&pf->hw, last_aq_status));
7830 goto bw_commit_out;
7831 }
7832
7833 /* Read word 0x10 of NVM - SW compatibility word 1 */
7834 ret = i40e_aq_read_nvm(&pf->hw,
7835 I40E_SR_NVM_CONTROL_WORD,
7836 0x10, sizeof(nvm_word), &nvm_word,
7837 false, NULL);
7838 /* Save off last admin queue command status before releasing
7839 * the NVM
7840 */
7841 last_aq_status = pf->hw.aq.asq_last_status;
7842 i40e_release_nvm(&pf->hw);
7843 if (ret) {
7844 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7845 i40e_stat_str(&pf->hw, ret),
7846 i40e_aq_str(&pf->hw, last_aq_status));
7847 goto bw_commit_out;
7848 }
7849
7850 /* Wait a bit for NVM release to complete */
7851 msleep(50);
7852
7853 /* Acquire NVM for write access */
7854 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7855 last_aq_status = pf->hw.aq.asq_last_status;
7856 if (ret) {
7857 dev_info(&pf->pdev->dev,
7858 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7859 i40e_stat_str(&pf->hw, ret),
7860 i40e_aq_str(&pf->hw, last_aq_status));
7861 goto bw_commit_out;
7862 }
7863 /* Write it back out unchanged to initiate update NVM,
7864 * which will force a write of the shadow (alt) RAM to
7865 * the NVM - thus storing the bandwidth values permanently.
7866 */
7867 ret = i40e_aq_update_nvm(&pf->hw,
7868 I40E_SR_NVM_CONTROL_WORD,
7869 0x10, sizeof(nvm_word),
7870 &nvm_word, true, NULL);
7871 /* Save off last admin queue command status before releasing
7872 * the NVM
7873 */
7874 last_aq_status = pf->hw.aq.asq_last_status;
7875 i40e_release_nvm(&pf->hw);
7876 if (ret)
7877 dev_info(&pf->pdev->dev,
7878 "BW settings NOT SAVED, err %s aq_err %s\n",
7879 i40e_stat_str(&pf->hw, ret),
7880 i40e_aq_str(&pf->hw, last_aq_status));
7881 bw_commit_out:
7882
7883 return ret;
7884 }
7885
7886 /**
7887 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7888 * @pf: board private structure to initialize
7889 *
7890 * i40e_sw_init initializes the Adapter private data structure.
7891 * Fields are initialized based on PCI device information and
7892 * OS network device settings (MTU size).
7893 **/
7894 static int i40e_sw_init(struct i40e_pf *pf)
7895 {
7896 int err = 0;
7897 int size;
7898
7899 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7900 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7901 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7902 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7903 if (I40E_DEBUG_USER & debug)
7904 pf->hw.debug_mask = debug;
7905 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7906 I40E_DEFAULT_MSG_ENABLE);
7907 }
7908
7909 /* Set default capability flags */
7910 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7911 I40E_FLAG_MSI_ENABLED |
7912 I40E_FLAG_MSIX_ENABLED;
7913
7914 if (iommu_present(&pci_bus_type))
7915 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7916 else
7917 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7918
7919 /* Set default ITR */
7920 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7921 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7922
7923 /* Depending on PF configurations, it is possible that the RSS
7924 * maximum might end up larger than the available queues
7925 */
7926 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7927 pf->rss_size = 1;
7928 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7929 pf->rss_size_max = min_t(int, pf->rss_size_max,
7930 pf->hw.func_caps.num_tx_qp);
7931 if (pf->hw.func_caps.rss) {
7932 pf->flags |= I40E_FLAG_RSS_ENABLED;
7933 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7934 }
7935
7936 /* MFP mode enabled */
7937 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7938 pf->flags |= I40E_FLAG_MFP_ENABLED;
7939 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7940 if (i40e_get_npar_bw_setting(pf))
7941 dev_warn(&pf->pdev->dev,
7942 "Could not get NPAR bw settings\n");
7943 else
7944 dev_info(&pf->pdev->dev,
7945 "Min BW = %8.8x, Max BW = %8.8x\n",
7946 pf->npar_min_bw, pf->npar_max_bw);
7947 }
7948
7949 /* FW/NVM is not yet fixed in this regard */
7950 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7951 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7952 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7953 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7954 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7955 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7956 } else {
7957 dev_info(&pf->pdev->dev,
7958 "Flow Director Sideband mode Disabled in MFP mode\n");
7959 }
7960 pf->fdir_pf_filter_count =
7961 pf->hw.func_caps.fd_filters_guaranteed;
7962 pf->hw.fdir_shared_filter_count =
7963 pf->hw.func_caps.fd_filters_best_effort;
7964 }
7965
7966 if (pf->hw.func_caps.vmdq) {
7967 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7968 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7969 }
7970
7971 #ifdef I40E_FCOE
7972 i40e_init_pf_fcoe(pf);
7973
7974 #endif /* I40E_FCOE */
7975 #ifdef CONFIG_PCI_IOV
7976 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7977 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7978 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7979 pf->num_req_vfs = min_t(int,
7980 pf->hw.func_caps.num_vfs,
7981 I40E_MAX_VF_COUNT);
7982 }
7983 #endif /* CONFIG_PCI_IOV */
7984 if (pf->hw.mac.type == I40E_MAC_X722) {
7985 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7986 I40E_FLAG_128_QP_RSS_CAPABLE |
7987 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7988 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7989 I40E_FLAG_WB_ON_ITR_CAPABLE |
7990 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7991 }
7992 pf->eeprom_version = 0xDEAD;
7993 pf->lan_veb = I40E_NO_VEB;
7994 pf->lan_vsi = I40E_NO_VSI;
7995
7996 /* By default FW has this off for performance reasons */
7997 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7998
7999 /* set up queue assignment tracking */
8000 size = sizeof(struct i40e_lump_tracking)
8001 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8002 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8003 if (!pf->qp_pile) {
8004 err = -ENOMEM;
8005 goto sw_init_done;
8006 }
8007 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8008 pf->qp_pile->search_hint = 0;
8009
8010 pf->tx_timeout_recovery_level = 1;
8011
8012 mutex_init(&pf->switch_mutex);
8013
8014 /* If NPAR is enabled nudge the Tx scheduler */
8015 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8016 i40e_set_npar_bw_setting(pf);
8017
8018 sw_init_done:
8019 return err;
8020 }
8021
8022 /**
8023 * i40e_set_ntuple - set the ntuple feature flag and take action
8024 * @pf: board private structure to initialize
8025 * @features: the feature set that the stack is suggesting
8026 *
8027 * returns a bool to indicate if reset needs to happen
8028 **/
8029 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8030 {
8031 bool need_reset = false;
8032
8033 /* Check if Flow Director n-tuple support was enabled or disabled. If
8034 * the state changed, we need to reset.
8035 */
8036 if (features & NETIF_F_NTUPLE) {
8037 /* Enable filters and mark for reset */
8038 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8039 need_reset = true;
8040 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8041 } else {
8042 /* turn off filters, mark for reset and clear SW filter list */
8043 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8044 need_reset = true;
8045 i40e_fdir_filter_exit(pf);
8046 }
8047 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8048 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8049 /* reset fd counters */
8050 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8051 pf->fdir_pf_active_filters = 0;
8052 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8053 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8054 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8055 /* if ATR was auto disabled it can be re-enabled. */
8056 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8057 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8058 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8059 }
8060 return need_reset;
8061 }
8062
8063 /**
8064 * i40e_set_features - set the netdev feature flags
8065 * @netdev: ptr to the netdev being adjusted
8066 * @features: the feature set that the stack is suggesting
8067 **/
8068 static int i40e_set_features(struct net_device *netdev,
8069 netdev_features_t features)
8070 {
8071 struct i40e_netdev_priv *np = netdev_priv(netdev);
8072 struct i40e_vsi *vsi = np->vsi;
8073 struct i40e_pf *pf = vsi->back;
8074 bool need_reset;
8075
8076 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8077 i40e_vlan_stripping_enable(vsi);
8078 else
8079 i40e_vlan_stripping_disable(vsi);
8080
8081 need_reset = i40e_set_ntuple(pf, features);
8082
8083 if (need_reset)
8084 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8085
8086 return 0;
8087 }
8088
8089 #ifdef CONFIG_I40E_VXLAN
8090 /**
8091 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8092 * @pf: board private structure
8093 * @port: The UDP port to look up
8094 *
8095 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8096 **/
8097 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8098 {
8099 u8 i;
8100
8101 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8102 if (pf->vxlan_ports[i] == port)
8103 return i;
8104 }
8105
8106 return i;
8107 }
8108
8109 /**
8110 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8111 * @netdev: This physical port's netdev
8112 * @sa_family: Socket Family that VXLAN is notifying us about
8113 * @port: New UDP port number that VXLAN started listening to
8114 **/
8115 static void i40e_add_vxlan_port(struct net_device *netdev,
8116 sa_family_t sa_family, __be16 port)
8117 {
8118 struct i40e_netdev_priv *np = netdev_priv(netdev);
8119 struct i40e_vsi *vsi = np->vsi;
8120 struct i40e_pf *pf = vsi->back;
8121 u8 next_idx;
8122 u8 idx;
8123
8124 if (sa_family == AF_INET6)
8125 return;
8126
8127 idx = i40e_get_vxlan_port_idx(pf, port);
8128
8129 /* Check if port already exists */
8130 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8131 netdev_info(netdev, "vxlan port %d already offloaded\n",
8132 ntohs(port));
8133 return;
8134 }
8135
8136 /* Now check if there is space to add the new port */
8137 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8138
8139 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8140 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8141 ntohs(port));
8142 return;
8143 }
8144
8145 /* New port: add it and mark its index in the bitmap */
8146 pf->vxlan_ports[next_idx] = port;
8147 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8148 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8149 }
8150
8151 /**
8152 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8153 * @netdev: This physical port's netdev
8154 * @sa_family: Socket Family that VXLAN is notifying us about
8155 * @port: UDP port number that VXLAN stopped listening to
8156 **/
8157 static void i40e_del_vxlan_port(struct net_device *netdev,
8158 sa_family_t sa_family, __be16 port)
8159 {
8160 struct i40e_netdev_priv *np = netdev_priv(netdev);
8161 struct i40e_vsi *vsi = np->vsi;
8162 struct i40e_pf *pf = vsi->back;
8163 u8 idx;
8164
8165 if (sa_family == AF_INET6)
8166 return;
8167
8168 idx = i40e_get_vxlan_port_idx(pf, port);
8169
8170 /* Check if port already exists */
8171 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8172 /* if port exists, set it to 0 (mark for deletion)
8173 * and make it pending
8174 */
8175 pf->vxlan_ports[idx] = 0;
8176 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8177 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8178 } else {
8179 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8180 ntohs(port));
8181 }
8182 }
8183
8184 #endif
8185 static int i40e_get_phys_port_id(struct net_device *netdev,
8186 struct netdev_phys_item_id *ppid)
8187 {
8188 struct i40e_netdev_priv *np = netdev_priv(netdev);
8189 struct i40e_pf *pf = np->vsi->back;
8190 struct i40e_hw *hw = &pf->hw;
8191
8192 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8193 return -EOPNOTSUPP;
8194
8195 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8196 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8197
8198 return 0;
8199 }
8200
8201 /**
8202 * i40e_ndo_fdb_add - add an entry to the hardware database
8203 * @ndm: the input from the stack
8204 * @tb: pointer to array of nladdr (unused)
8205 * @dev: the net device pointer
8206 * @addr: the MAC address entry being added
8207 * @flags: instructions from stack about fdb operation
8208 */
8209 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8210 struct net_device *dev,
8211 const unsigned char *addr, u16 vid,
8212 u16 flags)
8213 {
8214 struct i40e_netdev_priv *np = netdev_priv(dev);
8215 struct i40e_pf *pf = np->vsi->back;
8216 int err = 0;
8217
8218 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8219 return -EOPNOTSUPP;
8220
8221 if (vid) {
8222 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8223 return -EINVAL;
8224 }
8225
8226 /* Hardware does not support aging addresses so if a
8227 * ndm_state is given only allow permanent addresses
8228 */
8229 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8230 netdev_info(dev, "FDB only supports static addresses\n");
8231 return -EINVAL;
8232 }
8233
8234 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8235 err = dev_uc_add_excl(dev, addr);
8236 else if (is_multicast_ether_addr(addr))
8237 err = dev_mc_add_excl(dev, addr);
8238 else
8239 err = -EINVAL;
8240
8241 /* Only return duplicate errors if NLM_F_EXCL is set */
8242 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8243 err = 0;
8244
8245 return err;
8246 }
8247
8248 /**
8249 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8250 * @dev: the netdev being configured
8251 * @nlh: RTNL message
8252 *
8253 * Inserts a new hardware bridge if not already created and
8254 * enables the bridging mode requested (VEB or VEPA). If the
8255 * hardware bridge has already been inserted and the request
8256 * is to change the mode then that requires a PF reset to
8257 * allow rebuild of the components with required hardware
8258 * bridge mode enabled.
8259 **/
8260 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8261 struct nlmsghdr *nlh,
8262 u16 flags)
8263 {
8264 struct i40e_netdev_priv *np = netdev_priv(dev);
8265 struct i40e_vsi *vsi = np->vsi;
8266 struct i40e_pf *pf = vsi->back;
8267 struct i40e_veb *veb = NULL;
8268 struct nlattr *attr, *br_spec;
8269 int i, rem;
8270
8271 /* Only for PF VSI for now */
8272 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8273 return -EOPNOTSUPP;
8274
8275 /* Find the HW bridge for PF VSI */
8276 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8277 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8278 veb = pf->veb[i];
8279 }
8280
8281 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8282
8283 nla_for_each_nested(attr, br_spec, rem) {
8284 __u16 mode;
8285
8286 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8287 continue;
8288
8289 mode = nla_get_u16(attr);
8290 if ((mode != BRIDGE_MODE_VEPA) &&
8291 (mode != BRIDGE_MODE_VEB))
8292 return -EINVAL;
8293
8294 /* Insert a new HW bridge */
8295 if (!veb) {
8296 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8297 vsi->tc_config.enabled_tc);
8298 if (veb) {
8299 veb->bridge_mode = mode;
8300 i40e_config_bridge_mode(veb);
8301 } else {
8302 /* No Bridge HW offload available */
8303 return -ENOENT;
8304 }
8305 break;
8306 } else if (mode != veb->bridge_mode) {
8307 /* Existing HW bridge but different mode needs reset */
8308 veb->bridge_mode = mode;
8309 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8310 if (mode == BRIDGE_MODE_VEB)
8311 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8312 else
8313 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8314 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8315 break;
8316 }
8317 }
8318
8319 return 0;
8320 }
8321
8322 /**
8323 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8324 * @skb: skb buff
8325 * @pid: process id
8326 * @seq: RTNL message seq #
8327 * @dev: the netdev being configured
8328 * @filter_mask: unused
8329 *
8330 * Return the mode in which the hardware bridge is operating in
8331 * i.e VEB or VEPA.
8332 **/
8333 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8334 struct net_device *dev,
8335 u32 filter_mask, int nlflags)
8336 {
8337 struct i40e_netdev_priv *np = netdev_priv(dev);
8338 struct i40e_vsi *vsi = np->vsi;
8339 struct i40e_pf *pf = vsi->back;
8340 struct i40e_veb *veb = NULL;
8341 int i;
8342
8343 /* Only for PF VSI for now */
8344 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8345 return -EOPNOTSUPP;
8346
8347 /* Find the HW bridge for the PF VSI */
8348 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8349 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8350 veb = pf->veb[i];
8351 }
8352
8353 if (!veb)
8354 return 0;
8355
8356 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8357 nlflags, 0, 0, filter_mask, NULL);
8358 }
8359
8360 #define I40E_MAX_TUNNEL_HDR_LEN 80
8361 /**
8362 * i40e_features_check - Validate encapsulated packet conforms to limits
8363 * @skb: skb buff
8364 * @netdev: This physical port's netdev
8365 * @features: Offload features that the stack believes apply
8366 **/
8367 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8368 struct net_device *dev,
8369 netdev_features_t features)
8370 {
8371 if (skb->encapsulation &&
8372 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8373 I40E_MAX_TUNNEL_HDR_LEN))
8374 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8375
8376 return features;
8377 }
8378
8379 static const struct net_device_ops i40e_netdev_ops = {
8380 .ndo_open = i40e_open,
8381 .ndo_stop = i40e_close,
8382 .ndo_start_xmit = i40e_lan_xmit_frame,
8383 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8384 .ndo_set_rx_mode = i40e_set_rx_mode,
8385 .ndo_validate_addr = eth_validate_addr,
8386 .ndo_set_mac_address = i40e_set_mac,
8387 .ndo_change_mtu = i40e_change_mtu,
8388 .ndo_do_ioctl = i40e_ioctl,
8389 .ndo_tx_timeout = i40e_tx_timeout,
8390 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8391 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8392 #ifdef CONFIG_NET_POLL_CONTROLLER
8393 .ndo_poll_controller = i40e_netpoll,
8394 #endif
8395 .ndo_setup_tc = i40e_setup_tc,
8396 #ifdef I40E_FCOE
8397 .ndo_fcoe_enable = i40e_fcoe_enable,
8398 .ndo_fcoe_disable = i40e_fcoe_disable,
8399 #endif
8400 .ndo_set_features = i40e_set_features,
8401 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8402 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8403 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8404 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8405 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8406 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8407 #ifdef CONFIG_I40E_VXLAN
8408 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8409 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8410 #endif
8411 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8412 .ndo_fdb_add = i40e_ndo_fdb_add,
8413 .ndo_features_check = i40e_features_check,
8414 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8415 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8416 };
8417
8418 /**
8419 * i40e_config_netdev - Setup the netdev flags
8420 * @vsi: the VSI being configured
8421 *
8422 * Returns 0 on success, negative value on failure
8423 **/
8424 static int i40e_config_netdev(struct i40e_vsi *vsi)
8425 {
8426 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8427 struct i40e_pf *pf = vsi->back;
8428 struct i40e_hw *hw = &pf->hw;
8429 struct i40e_netdev_priv *np;
8430 struct net_device *netdev;
8431 u8 mac_addr[ETH_ALEN];
8432 int etherdev_size;
8433
8434 etherdev_size = sizeof(struct i40e_netdev_priv);
8435 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8436 if (!netdev)
8437 return -ENOMEM;
8438
8439 vsi->netdev = netdev;
8440 np = netdev_priv(netdev);
8441 np->vsi = vsi;
8442
8443 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8444 NETIF_F_GSO_UDP_TUNNEL |
8445 NETIF_F_TSO;
8446
8447 netdev->features = NETIF_F_SG |
8448 NETIF_F_IP_CSUM |
8449 NETIF_F_SCTP_CSUM |
8450 NETIF_F_HIGHDMA |
8451 NETIF_F_GSO_UDP_TUNNEL |
8452 NETIF_F_HW_VLAN_CTAG_TX |
8453 NETIF_F_HW_VLAN_CTAG_RX |
8454 NETIF_F_HW_VLAN_CTAG_FILTER |
8455 NETIF_F_IPV6_CSUM |
8456 NETIF_F_TSO |
8457 NETIF_F_TSO_ECN |
8458 NETIF_F_TSO6 |
8459 NETIF_F_RXCSUM |
8460 NETIF_F_RXHASH |
8461 0;
8462
8463 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8464 netdev->features |= NETIF_F_NTUPLE;
8465
8466 /* copy netdev features into list of user selectable features */
8467 netdev->hw_features |= netdev->features;
8468
8469 if (vsi->type == I40E_VSI_MAIN) {
8470 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8471 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8472 /* The following steps are necessary to prevent reception
8473 * of tagged packets - some older NVM configurations load a
8474 * default a MAC-VLAN filter that accepts any tagged packet
8475 * which must be replaced by a normal filter.
8476 */
8477 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8478 i40e_add_filter(vsi, mac_addr,
8479 I40E_VLAN_ANY, false, true);
8480 } else {
8481 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8482 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8483 pf->vsi[pf->lan_vsi]->netdev->name);
8484 random_ether_addr(mac_addr);
8485 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8486 }
8487 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8488
8489 ether_addr_copy(netdev->dev_addr, mac_addr);
8490 ether_addr_copy(netdev->perm_addr, mac_addr);
8491 /* vlan gets same features (except vlan offload)
8492 * after any tweaks for specific VSI types
8493 */
8494 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8495 NETIF_F_HW_VLAN_CTAG_RX |
8496 NETIF_F_HW_VLAN_CTAG_FILTER);
8497 netdev->priv_flags |= IFF_UNICAST_FLT;
8498 netdev->priv_flags |= IFF_SUPP_NOFCS;
8499 /* Setup netdev TC information */
8500 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8501
8502 netdev->netdev_ops = &i40e_netdev_ops;
8503 netdev->watchdog_timeo = 5 * HZ;
8504 i40e_set_ethtool_ops(netdev);
8505 #ifdef I40E_FCOE
8506 i40e_fcoe_config_netdev(netdev, vsi);
8507 #endif
8508
8509 return 0;
8510 }
8511
8512 /**
8513 * i40e_vsi_delete - Delete a VSI from the switch
8514 * @vsi: the VSI being removed
8515 *
8516 * Returns 0 on success, negative value on failure
8517 **/
8518 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8519 {
8520 /* remove default VSI is not allowed */
8521 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8522 return;
8523
8524 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8525 }
8526
8527 /**
8528 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8529 * @vsi: the VSI being queried
8530 *
8531 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8532 **/
8533 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8534 {
8535 struct i40e_veb *veb;
8536 struct i40e_pf *pf = vsi->back;
8537
8538 /* Uplink is not a bridge so default to VEB */
8539 if (vsi->veb_idx == I40E_NO_VEB)
8540 return 1;
8541
8542 veb = pf->veb[vsi->veb_idx];
8543 /* Uplink is a bridge in VEPA mode */
8544 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8545 return 0;
8546
8547 /* Uplink is a bridge in VEB mode */
8548 return 1;
8549 }
8550
8551 /**
8552 * i40e_add_vsi - Add a VSI to the switch
8553 * @vsi: the VSI being configured
8554 *
8555 * This initializes a VSI context depending on the VSI type to be added and
8556 * passes it down to the add_vsi aq command.
8557 **/
8558 static int i40e_add_vsi(struct i40e_vsi *vsi)
8559 {
8560 int ret = -ENODEV;
8561 struct i40e_mac_filter *f, *ftmp;
8562 struct i40e_pf *pf = vsi->back;
8563 struct i40e_hw *hw = &pf->hw;
8564 struct i40e_vsi_context ctxt;
8565 u8 enabled_tc = 0x1; /* TC0 enabled */
8566 int f_count = 0;
8567
8568 memset(&ctxt, 0, sizeof(ctxt));
8569 switch (vsi->type) {
8570 case I40E_VSI_MAIN:
8571 /* The PF's main VSI is already setup as part of the
8572 * device initialization, so we'll not bother with
8573 * the add_vsi call, but we will retrieve the current
8574 * VSI context.
8575 */
8576 ctxt.seid = pf->main_vsi_seid;
8577 ctxt.pf_num = pf->hw.pf_id;
8578 ctxt.vf_num = 0;
8579 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8580 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8581 if (ret) {
8582 dev_info(&pf->pdev->dev,
8583 "couldn't get PF vsi config, err %s aq_err %s\n",
8584 i40e_stat_str(&pf->hw, ret),
8585 i40e_aq_str(&pf->hw,
8586 pf->hw.aq.asq_last_status));
8587 return -ENOENT;
8588 }
8589 vsi->info = ctxt.info;
8590 vsi->info.valid_sections = 0;
8591
8592 vsi->seid = ctxt.seid;
8593 vsi->id = ctxt.vsi_number;
8594
8595 enabled_tc = i40e_pf_get_tc_map(pf);
8596
8597 /* MFP mode setup queue map and update VSI */
8598 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8599 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8600 memset(&ctxt, 0, sizeof(ctxt));
8601 ctxt.seid = pf->main_vsi_seid;
8602 ctxt.pf_num = pf->hw.pf_id;
8603 ctxt.vf_num = 0;
8604 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8605 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8606 if (ret) {
8607 dev_info(&pf->pdev->dev,
8608 "update vsi failed, err %s aq_err %s\n",
8609 i40e_stat_str(&pf->hw, ret),
8610 i40e_aq_str(&pf->hw,
8611 pf->hw.aq.asq_last_status));
8612 ret = -ENOENT;
8613 goto err;
8614 }
8615 /* update the local VSI info queue map */
8616 i40e_vsi_update_queue_map(vsi, &ctxt);
8617 vsi->info.valid_sections = 0;
8618 } else {
8619 /* Default/Main VSI is only enabled for TC0
8620 * reconfigure it to enable all TCs that are
8621 * available on the port in SFP mode.
8622 * For MFP case the iSCSI PF would use this
8623 * flow to enable LAN+iSCSI TC.
8624 */
8625 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8626 if (ret) {
8627 dev_info(&pf->pdev->dev,
8628 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8629 enabled_tc,
8630 i40e_stat_str(&pf->hw, ret),
8631 i40e_aq_str(&pf->hw,
8632 pf->hw.aq.asq_last_status));
8633 ret = -ENOENT;
8634 }
8635 }
8636 break;
8637
8638 case I40E_VSI_FDIR:
8639 ctxt.pf_num = hw->pf_id;
8640 ctxt.vf_num = 0;
8641 ctxt.uplink_seid = vsi->uplink_seid;
8642 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8643 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8644 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8645 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8646 ctxt.info.valid_sections |=
8647 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8648 ctxt.info.switch_id =
8649 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8650 }
8651 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8652 break;
8653
8654 case I40E_VSI_VMDQ2:
8655 ctxt.pf_num = hw->pf_id;
8656 ctxt.vf_num = 0;
8657 ctxt.uplink_seid = vsi->uplink_seid;
8658 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8659 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8660
8661 /* This VSI is connected to VEB so the switch_id
8662 * should be set to zero by default.
8663 */
8664 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8665 ctxt.info.valid_sections |=
8666 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8667 ctxt.info.switch_id =
8668 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8669 }
8670
8671 /* Setup the VSI tx/rx queue map for TC0 only for now */
8672 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8673 break;
8674
8675 case I40E_VSI_SRIOV:
8676 ctxt.pf_num = hw->pf_id;
8677 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8678 ctxt.uplink_seid = vsi->uplink_seid;
8679 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8680 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8681
8682 /* This VSI is connected to VEB so the switch_id
8683 * should be set to zero by default.
8684 */
8685 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8686 ctxt.info.valid_sections |=
8687 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8688 ctxt.info.switch_id =
8689 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8690 }
8691
8692 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8693 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8694 if (pf->vf[vsi->vf_id].spoofchk) {
8695 ctxt.info.valid_sections |=
8696 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8697 ctxt.info.sec_flags |=
8698 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8699 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8700 }
8701 /* Setup the VSI tx/rx queue map for TC0 only for now */
8702 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8703 break;
8704
8705 #ifdef I40E_FCOE
8706 case I40E_VSI_FCOE:
8707 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8708 if (ret) {
8709 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8710 return ret;
8711 }
8712 break;
8713
8714 #endif /* I40E_FCOE */
8715 default:
8716 return -ENODEV;
8717 }
8718
8719 if (vsi->type != I40E_VSI_MAIN) {
8720 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8721 if (ret) {
8722 dev_info(&vsi->back->pdev->dev,
8723 "add vsi failed, err %s aq_err %s\n",
8724 i40e_stat_str(&pf->hw, ret),
8725 i40e_aq_str(&pf->hw,
8726 pf->hw.aq.asq_last_status));
8727 ret = -ENOENT;
8728 goto err;
8729 }
8730 vsi->info = ctxt.info;
8731 vsi->info.valid_sections = 0;
8732 vsi->seid = ctxt.seid;
8733 vsi->id = ctxt.vsi_number;
8734 }
8735
8736 /* If macvlan filters already exist, force them to get loaded */
8737 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8738 f->changed = true;
8739 f_count++;
8740
8741 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8742 struct i40e_aqc_remove_macvlan_element_data element;
8743
8744 memset(&element, 0, sizeof(element));
8745 ether_addr_copy(element.mac_addr, f->macaddr);
8746 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8747 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8748 &element, 1, NULL);
8749 if (ret) {
8750 /* some older FW has a different default */
8751 element.flags |=
8752 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8753 i40e_aq_remove_macvlan(hw, vsi->seid,
8754 &element, 1, NULL);
8755 }
8756
8757 i40e_aq_mac_address_write(hw,
8758 I40E_AQC_WRITE_TYPE_LAA_WOL,
8759 f->macaddr, NULL);
8760 }
8761 }
8762 if (f_count) {
8763 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8764 pf->flags |= I40E_FLAG_FILTER_SYNC;
8765 }
8766
8767 /* Update VSI BW information */
8768 ret = i40e_vsi_get_bw_info(vsi);
8769 if (ret) {
8770 dev_info(&pf->pdev->dev,
8771 "couldn't get vsi bw info, err %s aq_err %s\n",
8772 i40e_stat_str(&pf->hw, ret),
8773 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8774 /* VSI is already added so not tearing that up */
8775 ret = 0;
8776 }
8777
8778 err:
8779 return ret;
8780 }
8781
8782 /**
8783 * i40e_vsi_release - Delete a VSI and free its resources
8784 * @vsi: the VSI being removed
8785 *
8786 * Returns 0 on success or < 0 on error
8787 **/
8788 int i40e_vsi_release(struct i40e_vsi *vsi)
8789 {
8790 struct i40e_mac_filter *f, *ftmp;
8791 struct i40e_veb *veb = NULL;
8792 struct i40e_pf *pf;
8793 u16 uplink_seid;
8794 int i, n;
8795
8796 pf = vsi->back;
8797
8798 /* release of a VEB-owner or last VSI is not allowed */
8799 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8800 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8801 vsi->seid, vsi->uplink_seid);
8802 return -ENODEV;
8803 }
8804 if (vsi == pf->vsi[pf->lan_vsi] &&
8805 !test_bit(__I40E_DOWN, &pf->state)) {
8806 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8807 return -ENODEV;
8808 }
8809
8810 uplink_seid = vsi->uplink_seid;
8811 if (vsi->type != I40E_VSI_SRIOV) {
8812 if (vsi->netdev_registered) {
8813 vsi->netdev_registered = false;
8814 if (vsi->netdev) {
8815 /* results in a call to i40e_close() */
8816 unregister_netdev(vsi->netdev);
8817 }
8818 } else {
8819 i40e_vsi_close(vsi);
8820 }
8821 i40e_vsi_disable_irq(vsi);
8822 }
8823
8824 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8825 i40e_del_filter(vsi, f->macaddr, f->vlan,
8826 f->is_vf, f->is_netdev);
8827 i40e_sync_vsi_filters(vsi, false);
8828
8829 i40e_vsi_delete(vsi);
8830 i40e_vsi_free_q_vectors(vsi);
8831 if (vsi->netdev) {
8832 free_netdev(vsi->netdev);
8833 vsi->netdev = NULL;
8834 }
8835 i40e_vsi_clear_rings(vsi);
8836 i40e_vsi_clear(vsi);
8837
8838 /* If this was the last thing on the VEB, except for the
8839 * controlling VSI, remove the VEB, which puts the controlling
8840 * VSI onto the next level down in the switch.
8841 *
8842 * Well, okay, there's one more exception here: don't remove
8843 * the orphan VEBs yet. We'll wait for an explicit remove request
8844 * from up the network stack.
8845 */
8846 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8847 if (pf->vsi[i] &&
8848 pf->vsi[i]->uplink_seid == uplink_seid &&
8849 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8850 n++; /* count the VSIs */
8851 }
8852 }
8853 for (i = 0; i < I40E_MAX_VEB; i++) {
8854 if (!pf->veb[i])
8855 continue;
8856 if (pf->veb[i]->uplink_seid == uplink_seid)
8857 n++; /* count the VEBs */
8858 if (pf->veb[i]->seid == uplink_seid)
8859 veb = pf->veb[i];
8860 }
8861 if (n == 0 && veb && veb->uplink_seid != 0)
8862 i40e_veb_release(veb);
8863
8864 return 0;
8865 }
8866
8867 /**
8868 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8869 * @vsi: ptr to the VSI
8870 *
8871 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8872 * corresponding SW VSI structure and initializes num_queue_pairs for the
8873 * newly allocated VSI.
8874 *
8875 * Returns 0 on success or negative on failure
8876 **/
8877 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8878 {
8879 int ret = -ENOENT;
8880 struct i40e_pf *pf = vsi->back;
8881
8882 if (vsi->q_vectors[0]) {
8883 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8884 vsi->seid);
8885 return -EEXIST;
8886 }
8887
8888 if (vsi->base_vector) {
8889 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8890 vsi->seid, vsi->base_vector);
8891 return -EEXIST;
8892 }
8893
8894 ret = i40e_vsi_alloc_q_vectors(vsi);
8895 if (ret) {
8896 dev_info(&pf->pdev->dev,
8897 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8898 vsi->num_q_vectors, vsi->seid, ret);
8899 vsi->num_q_vectors = 0;
8900 goto vector_setup_out;
8901 }
8902
8903 /* In Legacy mode, we do not have to get any other vector since we
8904 * piggyback on the misc/ICR0 for queue interrupts.
8905 */
8906 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8907 return ret;
8908 if (vsi->num_q_vectors)
8909 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8910 vsi->num_q_vectors, vsi->idx);
8911 if (vsi->base_vector < 0) {
8912 dev_info(&pf->pdev->dev,
8913 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8914 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8915 i40e_vsi_free_q_vectors(vsi);
8916 ret = -ENOENT;
8917 goto vector_setup_out;
8918 }
8919
8920 vector_setup_out:
8921 return ret;
8922 }
8923
8924 /**
8925 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8926 * @vsi: pointer to the vsi.
8927 *
8928 * This re-allocates a vsi's queue resources.
8929 *
8930 * Returns pointer to the successfully allocated and configured VSI sw struct
8931 * on success, otherwise returns NULL on failure.
8932 **/
8933 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8934 {
8935 struct i40e_pf *pf = vsi->back;
8936 u8 enabled_tc;
8937 int ret;
8938
8939 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8940 i40e_vsi_clear_rings(vsi);
8941
8942 i40e_vsi_free_arrays(vsi, false);
8943 i40e_set_num_rings_in_vsi(vsi);
8944 ret = i40e_vsi_alloc_arrays(vsi, false);
8945 if (ret)
8946 goto err_vsi;
8947
8948 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8949 if (ret < 0) {
8950 dev_info(&pf->pdev->dev,
8951 "failed to get tracking for %d queues for VSI %d err %d\n",
8952 vsi->alloc_queue_pairs, vsi->seid, ret);
8953 goto err_vsi;
8954 }
8955 vsi->base_queue = ret;
8956
8957 /* Update the FW view of the VSI. Force a reset of TC and queue
8958 * layout configurations.
8959 */
8960 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8961 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8962 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8963 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8964
8965 /* assign it some queues */
8966 ret = i40e_alloc_rings(vsi);
8967 if (ret)
8968 goto err_rings;
8969
8970 /* map all of the rings to the q_vectors */
8971 i40e_vsi_map_rings_to_vectors(vsi);
8972 return vsi;
8973
8974 err_rings:
8975 i40e_vsi_free_q_vectors(vsi);
8976 if (vsi->netdev_registered) {
8977 vsi->netdev_registered = false;
8978 unregister_netdev(vsi->netdev);
8979 free_netdev(vsi->netdev);
8980 vsi->netdev = NULL;
8981 }
8982 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8983 err_vsi:
8984 i40e_vsi_clear(vsi);
8985 return NULL;
8986 }
8987
8988 /**
8989 * i40e_vsi_setup - Set up a VSI by a given type
8990 * @pf: board private structure
8991 * @type: VSI type
8992 * @uplink_seid: the switch element to link to
8993 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8994 *
8995 * This allocates the sw VSI structure and its queue resources, then add a VSI
8996 * to the identified VEB.
8997 *
8998 * Returns pointer to the successfully allocated and configure VSI sw struct on
8999 * success, otherwise returns NULL on failure.
9000 **/
9001 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9002 u16 uplink_seid, u32 param1)
9003 {
9004 struct i40e_vsi *vsi = NULL;
9005 struct i40e_veb *veb = NULL;
9006 int ret, i;
9007 int v_idx;
9008
9009 /* The requested uplink_seid must be either
9010 * - the PF's port seid
9011 * no VEB is needed because this is the PF
9012 * or this is a Flow Director special case VSI
9013 * - seid of an existing VEB
9014 * - seid of a VSI that owns an existing VEB
9015 * - seid of a VSI that doesn't own a VEB
9016 * a new VEB is created and the VSI becomes the owner
9017 * - seid of the PF VSI, which is what creates the first VEB
9018 * this is a special case of the previous
9019 *
9020 * Find which uplink_seid we were given and create a new VEB if needed
9021 */
9022 for (i = 0; i < I40E_MAX_VEB; i++) {
9023 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9024 veb = pf->veb[i];
9025 break;
9026 }
9027 }
9028
9029 if (!veb && uplink_seid != pf->mac_seid) {
9030
9031 for (i = 0; i < pf->num_alloc_vsi; i++) {
9032 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9033 vsi = pf->vsi[i];
9034 break;
9035 }
9036 }
9037 if (!vsi) {
9038 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9039 uplink_seid);
9040 return NULL;
9041 }
9042
9043 if (vsi->uplink_seid == pf->mac_seid)
9044 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9045 vsi->tc_config.enabled_tc);
9046 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9047 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9048 vsi->tc_config.enabled_tc);
9049 if (veb) {
9050 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9051 dev_info(&vsi->back->pdev->dev,
9052 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9053 return NULL;
9054 }
9055 /* We come up by default in VEPA mode if SRIOV is not
9056 * already enabled, in which case we can't force VEPA
9057 * mode.
9058 */
9059 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9060 veb->bridge_mode = BRIDGE_MODE_VEPA;
9061 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9062 }
9063 i40e_config_bridge_mode(veb);
9064 }
9065 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9066 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9067 veb = pf->veb[i];
9068 }
9069 if (!veb) {
9070 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9071 return NULL;
9072 }
9073
9074 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9075 uplink_seid = veb->seid;
9076 }
9077
9078 /* get vsi sw struct */
9079 v_idx = i40e_vsi_mem_alloc(pf, type);
9080 if (v_idx < 0)
9081 goto err_alloc;
9082 vsi = pf->vsi[v_idx];
9083 if (!vsi)
9084 goto err_alloc;
9085 vsi->type = type;
9086 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9087
9088 if (type == I40E_VSI_MAIN)
9089 pf->lan_vsi = v_idx;
9090 else if (type == I40E_VSI_SRIOV)
9091 vsi->vf_id = param1;
9092 /* assign it some queues */
9093 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9094 vsi->idx);
9095 if (ret < 0) {
9096 dev_info(&pf->pdev->dev,
9097 "failed to get tracking for %d queues for VSI %d err=%d\n",
9098 vsi->alloc_queue_pairs, vsi->seid, ret);
9099 goto err_vsi;
9100 }
9101 vsi->base_queue = ret;
9102
9103 /* get a VSI from the hardware */
9104 vsi->uplink_seid = uplink_seid;
9105 ret = i40e_add_vsi(vsi);
9106 if (ret)
9107 goto err_vsi;
9108
9109 switch (vsi->type) {
9110 /* setup the netdev if needed */
9111 case I40E_VSI_MAIN:
9112 case I40E_VSI_VMDQ2:
9113 case I40E_VSI_FCOE:
9114 ret = i40e_config_netdev(vsi);
9115 if (ret)
9116 goto err_netdev;
9117 ret = register_netdev(vsi->netdev);
9118 if (ret)
9119 goto err_netdev;
9120 vsi->netdev_registered = true;
9121 netif_carrier_off(vsi->netdev);
9122 #ifdef CONFIG_I40E_DCB
9123 /* Setup DCB netlink interface */
9124 i40e_dcbnl_setup(vsi);
9125 #endif /* CONFIG_I40E_DCB */
9126 /* fall through */
9127
9128 case I40E_VSI_FDIR:
9129 /* set up vectors and rings if needed */
9130 ret = i40e_vsi_setup_vectors(vsi);
9131 if (ret)
9132 goto err_msix;
9133
9134 ret = i40e_alloc_rings(vsi);
9135 if (ret)
9136 goto err_rings;
9137
9138 /* map all of the rings to the q_vectors */
9139 i40e_vsi_map_rings_to_vectors(vsi);
9140
9141 i40e_vsi_reset_stats(vsi);
9142 break;
9143
9144 default:
9145 /* no netdev or rings for the other VSI types */
9146 break;
9147 }
9148
9149 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9150 (vsi->type == I40E_VSI_VMDQ2)) {
9151 ret = i40e_vsi_config_rss(vsi);
9152 }
9153 return vsi;
9154
9155 err_rings:
9156 i40e_vsi_free_q_vectors(vsi);
9157 err_msix:
9158 if (vsi->netdev_registered) {
9159 vsi->netdev_registered = false;
9160 unregister_netdev(vsi->netdev);
9161 free_netdev(vsi->netdev);
9162 vsi->netdev = NULL;
9163 }
9164 err_netdev:
9165 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9166 err_vsi:
9167 i40e_vsi_clear(vsi);
9168 err_alloc:
9169 return NULL;
9170 }
9171
9172 /**
9173 * i40e_veb_get_bw_info - Query VEB BW information
9174 * @veb: the veb to query
9175 *
9176 * Query the Tx scheduler BW configuration data for given VEB
9177 **/
9178 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9179 {
9180 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9181 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9182 struct i40e_pf *pf = veb->pf;
9183 struct i40e_hw *hw = &pf->hw;
9184 u32 tc_bw_max;
9185 int ret = 0;
9186 int i;
9187
9188 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9189 &bw_data, NULL);
9190 if (ret) {
9191 dev_info(&pf->pdev->dev,
9192 "query veb bw config failed, err %s aq_err %s\n",
9193 i40e_stat_str(&pf->hw, ret),
9194 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9195 goto out;
9196 }
9197
9198 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9199 &ets_data, NULL);
9200 if (ret) {
9201 dev_info(&pf->pdev->dev,
9202 "query veb bw ets config failed, err %s aq_err %s\n",
9203 i40e_stat_str(&pf->hw, ret),
9204 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9205 goto out;
9206 }
9207
9208 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9209 veb->bw_max_quanta = ets_data.tc_bw_max;
9210 veb->is_abs_credits = bw_data.absolute_credits_enable;
9211 veb->enabled_tc = ets_data.tc_valid_bits;
9212 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9213 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9214 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9215 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9216 veb->bw_tc_limit_credits[i] =
9217 le16_to_cpu(bw_data.tc_bw_limits[i]);
9218 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9219 }
9220
9221 out:
9222 return ret;
9223 }
9224
9225 /**
9226 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9227 * @pf: board private structure
9228 *
9229 * On error: returns error code (negative)
9230 * On success: returns vsi index in PF (positive)
9231 **/
9232 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9233 {
9234 int ret = -ENOENT;
9235 struct i40e_veb *veb;
9236 int i;
9237
9238 /* Need to protect the allocation of switch elements at the PF level */
9239 mutex_lock(&pf->switch_mutex);
9240
9241 /* VEB list may be fragmented if VEB creation/destruction has
9242 * been happening. We can afford to do a quick scan to look
9243 * for any free slots in the list.
9244 *
9245 * find next empty veb slot, looping back around if necessary
9246 */
9247 i = 0;
9248 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9249 i++;
9250 if (i >= I40E_MAX_VEB) {
9251 ret = -ENOMEM;
9252 goto err_alloc_veb; /* out of VEB slots! */
9253 }
9254
9255 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9256 if (!veb) {
9257 ret = -ENOMEM;
9258 goto err_alloc_veb;
9259 }
9260 veb->pf = pf;
9261 veb->idx = i;
9262 veb->enabled_tc = 1;
9263
9264 pf->veb[i] = veb;
9265 ret = i;
9266 err_alloc_veb:
9267 mutex_unlock(&pf->switch_mutex);
9268 return ret;
9269 }
9270
9271 /**
9272 * i40e_switch_branch_release - Delete a branch of the switch tree
9273 * @branch: where to start deleting
9274 *
9275 * This uses recursion to find the tips of the branch to be
9276 * removed, deleting until we get back to and can delete this VEB.
9277 **/
9278 static void i40e_switch_branch_release(struct i40e_veb *branch)
9279 {
9280 struct i40e_pf *pf = branch->pf;
9281 u16 branch_seid = branch->seid;
9282 u16 veb_idx = branch->idx;
9283 int i;
9284
9285 /* release any VEBs on this VEB - RECURSION */
9286 for (i = 0; i < I40E_MAX_VEB; i++) {
9287 if (!pf->veb[i])
9288 continue;
9289 if (pf->veb[i]->uplink_seid == branch->seid)
9290 i40e_switch_branch_release(pf->veb[i]);
9291 }
9292
9293 /* Release the VSIs on this VEB, but not the owner VSI.
9294 *
9295 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9296 * the VEB itself, so don't use (*branch) after this loop.
9297 */
9298 for (i = 0; i < pf->num_alloc_vsi; i++) {
9299 if (!pf->vsi[i])
9300 continue;
9301 if (pf->vsi[i]->uplink_seid == branch_seid &&
9302 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9303 i40e_vsi_release(pf->vsi[i]);
9304 }
9305 }
9306
9307 /* There's one corner case where the VEB might not have been
9308 * removed, so double check it here and remove it if needed.
9309 * This case happens if the veb was created from the debugfs
9310 * commands and no VSIs were added to it.
9311 */
9312 if (pf->veb[veb_idx])
9313 i40e_veb_release(pf->veb[veb_idx]);
9314 }
9315
9316 /**
9317 * i40e_veb_clear - remove veb struct
9318 * @veb: the veb to remove
9319 **/
9320 static void i40e_veb_clear(struct i40e_veb *veb)
9321 {
9322 if (!veb)
9323 return;
9324
9325 if (veb->pf) {
9326 struct i40e_pf *pf = veb->pf;
9327
9328 mutex_lock(&pf->switch_mutex);
9329 if (pf->veb[veb->idx] == veb)
9330 pf->veb[veb->idx] = NULL;
9331 mutex_unlock(&pf->switch_mutex);
9332 }
9333
9334 kfree(veb);
9335 }
9336
9337 /**
9338 * i40e_veb_release - Delete a VEB and free its resources
9339 * @veb: the VEB being removed
9340 **/
9341 void i40e_veb_release(struct i40e_veb *veb)
9342 {
9343 struct i40e_vsi *vsi = NULL;
9344 struct i40e_pf *pf;
9345 int i, n = 0;
9346
9347 pf = veb->pf;
9348
9349 /* find the remaining VSI and check for extras */
9350 for (i = 0; i < pf->num_alloc_vsi; i++) {
9351 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9352 n++;
9353 vsi = pf->vsi[i];
9354 }
9355 }
9356 if (n != 1) {
9357 dev_info(&pf->pdev->dev,
9358 "can't remove VEB %d with %d VSIs left\n",
9359 veb->seid, n);
9360 return;
9361 }
9362
9363 /* move the remaining VSI to uplink veb */
9364 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9365 if (veb->uplink_seid) {
9366 vsi->uplink_seid = veb->uplink_seid;
9367 if (veb->uplink_seid == pf->mac_seid)
9368 vsi->veb_idx = I40E_NO_VEB;
9369 else
9370 vsi->veb_idx = veb->veb_idx;
9371 } else {
9372 /* floating VEB */
9373 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9374 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9375 }
9376
9377 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9378 i40e_veb_clear(veb);
9379 }
9380
9381 /**
9382 * i40e_add_veb - create the VEB in the switch
9383 * @veb: the VEB to be instantiated
9384 * @vsi: the controlling VSI
9385 **/
9386 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9387 {
9388 struct i40e_pf *pf = veb->pf;
9389 bool is_default = veb->pf->cur_promisc;
9390 bool is_cloud = false;
9391 int ret;
9392
9393 /* get a VEB from the hardware */
9394 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9395 veb->enabled_tc, is_default,
9396 is_cloud, &veb->seid, NULL);
9397 if (ret) {
9398 dev_info(&pf->pdev->dev,
9399 "couldn't add VEB, err %s aq_err %s\n",
9400 i40e_stat_str(&pf->hw, ret),
9401 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9402 return -EPERM;
9403 }
9404
9405 /* get statistics counter */
9406 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9407 &veb->stats_idx, NULL, NULL, NULL);
9408 if (ret) {
9409 dev_info(&pf->pdev->dev,
9410 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9411 i40e_stat_str(&pf->hw, ret),
9412 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9413 return -EPERM;
9414 }
9415 ret = i40e_veb_get_bw_info(veb);
9416 if (ret) {
9417 dev_info(&pf->pdev->dev,
9418 "couldn't get VEB bw info, err %s aq_err %s\n",
9419 i40e_stat_str(&pf->hw, ret),
9420 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9421 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9422 return -ENOENT;
9423 }
9424
9425 vsi->uplink_seid = veb->seid;
9426 vsi->veb_idx = veb->idx;
9427 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9428
9429 return 0;
9430 }
9431
9432 /**
9433 * i40e_veb_setup - Set up a VEB
9434 * @pf: board private structure
9435 * @flags: VEB setup flags
9436 * @uplink_seid: the switch element to link to
9437 * @vsi_seid: the initial VSI seid
9438 * @enabled_tc: Enabled TC bit-map
9439 *
9440 * This allocates the sw VEB structure and links it into the switch
9441 * It is possible and legal for this to be a duplicate of an already
9442 * existing VEB. It is also possible for both uplink and vsi seids
9443 * to be zero, in order to create a floating VEB.
9444 *
9445 * Returns pointer to the successfully allocated VEB sw struct on
9446 * success, otherwise returns NULL on failure.
9447 **/
9448 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9449 u16 uplink_seid, u16 vsi_seid,
9450 u8 enabled_tc)
9451 {
9452 struct i40e_veb *veb, *uplink_veb = NULL;
9453 int vsi_idx, veb_idx;
9454 int ret;
9455
9456 /* if one seid is 0, the other must be 0 to create a floating relay */
9457 if ((uplink_seid == 0 || vsi_seid == 0) &&
9458 (uplink_seid + vsi_seid != 0)) {
9459 dev_info(&pf->pdev->dev,
9460 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9461 uplink_seid, vsi_seid);
9462 return NULL;
9463 }
9464
9465 /* make sure there is such a vsi and uplink */
9466 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9467 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9468 break;
9469 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9470 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9471 vsi_seid);
9472 return NULL;
9473 }
9474
9475 if (uplink_seid && uplink_seid != pf->mac_seid) {
9476 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9477 if (pf->veb[veb_idx] &&
9478 pf->veb[veb_idx]->seid == uplink_seid) {
9479 uplink_veb = pf->veb[veb_idx];
9480 break;
9481 }
9482 }
9483 if (!uplink_veb) {
9484 dev_info(&pf->pdev->dev,
9485 "uplink seid %d not found\n", uplink_seid);
9486 return NULL;
9487 }
9488 }
9489
9490 /* get veb sw struct */
9491 veb_idx = i40e_veb_mem_alloc(pf);
9492 if (veb_idx < 0)
9493 goto err_alloc;
9494 veb = pf->veb[veb_idx];
9495 veb->flags = flags;
9496 veb->uplink_seid = uplink_seid;
9497 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9498 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9499
9500 /* create the VEB in the switch */
9501 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9502 if (ret)
9503 goto err_veb;
9504 if (vsi_idx == pf->lan_vsi)
9505 pf->lan_veb = veb->idx;
9506
9507 return veb;
9508
9509 err_veb:
9510 i40e_veb_clear(veb);
9511 err_alloc:
9512 return NULL;
9513 }
9514
9515 /**
9516 * i40e_setup_pf_switch_element - set PF vars based on switch type
9517 * @pf: board private structure
9518 * @ele: element we are building info from
9519 * @num_reported: total number of elements
9520 * @printconfig: should we print the contents
9521 *
9522 * helper function to assist in extracting a few useful SEID values.
9523 **/
9524 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9525 struct i40e_aqc_switch_config_element_resp *ele,
9526 u16 num_reported, bool printconfig)
9527 {
9528 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9529 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9530 u8 element_type = ele->element_type;
9531 u16 seid = le16_to_cpu(ele->seid);
9532
9533 if (printconfig)
9534 dev_info(&pf->pdev->dev,
9535 "type=%d seid=%d uplink=%d downlink=%d\n",
9536 element_type, seid, uplink_seid, downlink_seid);
9537
9538 switch (element_type) {
9539 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9540 pf->mac_seid = seid;
9541 break;
9542 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9543 /* Main VEB? */
9544 if (uplink_seid != pf->mac_seid)
9545 break;
9546 if (pf->lan_veb == I40E_NO_VEB) {
9547 int v;
9548
9549 /* find existing or else empty VEB */
9550 for (v = 0; v < I40E_MAX_VEB; v++) {
9551 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9552 pf->lan_veb = v;
9553 break;
9554 }
9555 }
9556 if (pf->lan_veb == I40E_NO_VEB) {
9557 v = i40e_veb_mem_alloc(pf);
9558 if (v < 0)
9559 break;
9560 pf->lan_veb = v;
9561 }
9562 }
9563
9564 pf->veb[pf->lan_veb]->seid = seid;
9565 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9566 pf->veb[pf->lan_veb]->pf = pf;
9567 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9568 break;
9569 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9570 if (num_reported != 1)
9571 break;
9572 /* This is immediately after a reset so we can assume this is
9573 * the PF's VSI
9574 */
9575 pf->mac_seid = uplink_seid;
9576 pf->pf_seid = downlink_seid;
9577 pf->main_vsi_seid = seid;
9578 if (printconfig)
9579 dev_info(&pf->pdev->dev,
9580 "pf_seid=%d main_vsi_seid=%d\n",
9581 pf->pf_seid, pf->main_vsi_seid);
9582 break;
9583 case I40E_SWITCH_ELEMENT_TYPE_PF:
9584 case I40E_SWITCH_ELEMENT_TYPE_VF:
9585 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9586 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9587 case I40E_SWITCH_ELEMENT_TYPE_PE:
9588 case I40E_SWITCH_ELEMENT_TYPE_PA:
9589 /* ignore these for now */
9590 break;
9591 default:
9592 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9593 element_type, seid);
9594 break;
9595 }
9596 }
9597
9598 /**
9599 * i40e_fetch_switch_configuration - Get switch config from firmware
9600 * @pf: board private structure
9601 * @printconfig: should we print the contents
9602 *
9603 * Get the current switch configuration from the device and
9604 * extract a few useful SEID values.
9605 **/
9606 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9607 {
9608 struct i40e_aqc_get_switch_config_resp *sw_config;
9609 u16 next_seid = 0;
9610 int ret = 0;
9611 u8 *aq_buf;
9612 int i;
9613
9614 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9615 if (!aq_buf)
9616 return -ENOMEM;
9617
9618 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9619 do {
9620 u16 num_reported, num_total;
9621
9622 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9623 I40E_AQ_LARGE_BUF,
9624 &next_seid, NULL);
9625 if (ret) {
9626 dev_info(&pf->pdev->dev,
9627 "get switch config failed err %s aq_err %s\n",
9628 i40e_stat_str(&pf->hw, ret),
9629 i40e_aq_str(&pf->hw,
9630 pf->hw.aq.asq_last_status));
9631 kfree(aq_buf);
9632 return -ENOENT;
9633 }
9634
9635 num_reported = le16_to_cpu(sw_config->header.num_reported);
9636 num_total = le16_to_cpu(sw_config->header.num_total);
9637
9638 if (printconfig)
9639 dev_info(&pf->pdev->dev,
9640 "header: %d reported %d total\n",
9641 num_reported, num_total);
9642
9643 for (i = 0; i < num_reported; i++) {
9644 struct i40e_aqc_switch_config_element_resp *ele =
9645 &sw_config->element[i];
9646
9647 i40e_setup_pf_switch_element(pf, ele, num_reported,
9648 printconfig);
9649 }
9650 } while (next_seid != 0);
9651
9652 kfree(aq_buf);
9653 return ret;
9654 }
9655
9656 /**
9657 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9658 * @pf: board private structure
9659 * @reinit: if the Main VSI needs to re-initialized.
9660 *
9661 * Returns 0 on success, negative value on failure
9662 **/
9663 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9664 {
9665 int ret;
9666
9667 /* find out what's out there already */
9668 ret = i40e_fetch_switch_configuration(pf, false);
9669 if (ret) {
9670 dev_info(&pf->pdev->dev,
9671 "couldn't fetch switch config, err %s aq_err %s\n",
9672 i40e_stat_str(&pf->hw, ret),
9673 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9674 return ret;
9675 }
9676 i40e_pf_reset_stats(pf);
9677
9678 /* first time setup */
9679 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9680 struct i40e_vsi *vsi = NULL;
9681 u16 uplink_seid;
9682
9683 /* Set up the PF VSI associated with the PF's main VSI
9684 * that is already in the HW switch
9685 */
9686 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9687 uplink_seid = pf->veb[pf->lan_veb]->seid;
9688 else
9689 uplink_seid = pf->mac_seid;
9690 if (pf->lan_vsi == I40E_NO_VSI)
9691 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9692 else if (reinit)
9693 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9694 if (!vsi) {
9695 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9696 i40e_fdir_teardown(pf);
9697 return -EAGAIN;
9698 }
9699 } else {
9700 /* force a reset of TC and queue layout configurations */
9701 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9702 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9703 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9704 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9705 }
9706 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9707
9708 i40e_fdir_sb_setup(pf);
9709
9710 /* Setup static PF queue filter control settings */
9711 ret = i40e_setup_pf_filter_control(pf);
9712 if (ret) {
9713 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9714 ret);
9715 /* Failure here should not stop continuing other steps */
9716 }
9717
9718 /* enable RSS in the HW, even for only one queue, as the stack can use
9719 * the hash
9720 */
9721 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9722 i40e_config_rss(pf);
9723
9724 /* fill in link information and enable LSE reporting */
9725 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9726 i40e_link_event(pf);
9727
9728 /* Initialize user-specific link properties */
9729 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9730 I40E_AQ_AN_COMPLETED) ? true : false);
9731
9732 i40e_ptp_init(pf);
9733
9734 return ret;
9735 }
9736
9737 /**
9738 * i40e_determine_queue_usage - Work out queue distribution
9739 * @pf: board private structure
9740 **/
9741 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9742 {
9743 int queues_left;
9744
9745 pf->num_lan_qps = 0;
9746 #ifdef I40E_FCOE
9747 pf->num_fcoe_qps = 0;
9748 #endif
9749
9750 /* Find the max queues to be put into basic use. We'll always be
9751 * using TC0, whether or not DCB is running, and TC0 will get the
9752 * big RSS set.
9753 */
9754 queues_left = pf->hw.func_caps.num_tx_qp;
9755
9756 if ((queues_left == 1) ||
9757 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9758 /* one qp for PF, no queues for anything else */
9759 queues_left = 0;
9760 pf->rss_size = pf->num_lan_qps = 1;
9761
9762 /* make sure all the fancies are disabled */
9763 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9764 #ifdef I40E_FCOE
9765 I40E_FLAG_FCOE_ENABLED |
9766 #endif
9767 I40E_FLAG_FD_SB_ENABLED |
9768 I40E_FLAG_FD_ATR_ENABLED |
9769 I40E_FLAG_DCB_CAPABLE |
9770 I40E_FLAG_SRIOV_ENABLED |
9771 I40E_FLAG_VMDQ_ENABLED);
9772 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9773 I40E_FLAG_FD_SB_ENABLED |
9774 I40E_FLAG_FD_ATR_ENABLED |
9775 I40E_FLAG_DCB_CAPABLE))) {
9776 /* one qp for PF */
9777 pf->rss_size = pf->num_lan_qps = 1;
9778 queues_left -= pf->num_lan_qps;
9779
9780 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9781 #ifdef I40E_FCOE
9782 I40E_FLAG_FCOE_ENABLED |
9783 #endif
9784 I40E_FLAG_FD_SB_ENABLED |
9785 I40E_FLAG_FD_ATR_ENABLED |
9786 I40E_FLAG_DCB_ENABLED |
9787 I40E_FLAG_VMDQ_ENABLED);
9788 } else {
9789 /* Not enough queues for all TCs */
9790 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9791 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9792 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9793 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9794 }
9795 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9796 num_online_cpus());
9797 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9798 pf->hw.func_caps.num_tx_qp);
9799
9800 queues_left -= pf->num_lan_qps;
9801 }
9802
9803 #ifdef I40E_FCOE
9804 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9805 if (I40E_DEFAULT_FCOE <= queues_left) {
9806 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9807 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9808 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9809 } else {
9810 pf->num_fcoe_qps = 0;
9811 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9812 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9813 }
9814
9815 queues_left -= pf->num_fcoe_qps;
9816 }
9817
9818 #endif
9819 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9820 if (queues_left > 1) {
9821 queues_left -= 1; /* save 1 queue for FD */
9822 } else {
9823 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9824 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9825 }
9826 }
9827
9828 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9829 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9830 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9831 (queues_left / pf->num_vf_qps));
9832 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9833 }
9834
9835 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9836 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9837 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9838 (queues_left / pf->num_vmdq_qps));
9839 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9840 }
9841
9842 pf->queues_left = queues_left;
9843 #ifdef I40E_FCOE
9844 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9845 #endif
9846 }
9847
9848 /**
9849 * i40e_setup_pf_filter_control - Setup PF static filter control
9850 * @pf: PF to be setup
9851 *
9852 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9853 * settings. If PE/FCoE are enabled then it will also set the per PF
9854 * based filter sizes required for them. It also enables Flow director,
9855 * ethertype and macvlan type filter settings for the pf.
9856 *
9857 * Returns 0 on success, negative on failure
9858 **/
9859 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9860 {
9861 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9862
9863 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9864
9865 /* Flow Director is enabled */
9866 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9867 settings->enable_fdir = true;
9868
9869 /* Ethtype and MACVLAN filters enabled for PF */
9870 settings->enable_ethtype = true;
9871 settings->enable_macvlan = true;
9872
9873 if (i40e_set_filter_control(&pf->hw, settings))
9874 return -ENOENT;
9875
9876 return 0;
9877 }
9878
9879 #define INFO_STRING_LEN 255
9880 static void i40e_print_features(struct i40e_pf *pf)
9881 {
9882 struct i40e_hw *hw = &pf->hw;
9883 char *buf, *string;
9884
9885 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9886 if (!string) {
9887 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9888 return;
9889 }
9890
9891 buf = string;
9892
9893 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9894 #ifdef CONFIG_PCI_IOV
9895 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9896 #endif
9897 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9898 pf->hw.func_caps.num_vsis,
9899 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9900 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9901
9902 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9903 buf += sprintf(buf, "RSS ");
9904 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9905 buf += sprintf(buf, "FD_ATR ");
9906 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9907 buf += sprintf(buf, "FD_SB ");
9908 buf += sprintf(buf, "NTUPLE ");
9909 }
9910 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9911 buf += sprintf(buf, "DCB ");
9912 if (pf->flags & I40E_FLAG_PTP)
9913 buf += sprintf(buf, "PTP ");
9914 #ifdef I40E_FCOE
9915 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9916 buf += sprintf(buf, "FCOE ");
9917 #endif
9918
9919 BUG_ON(buf > (string + INFO_STRING_LEN));
9920 dev_info(&pf->pdev->dev, "%s\n", string);
9921 kfree(string);
9922 }
9923
9924 /**
9925 * i40e_probe - Device initialization routine
9926 * @pdev: PCI device information struct
9927 * @ent: entry in i40e_pci_tbl
9928 *
9929 * i40e_probe initializes a PF identified by a pci_dev structure.
9930 * The OS initialization, configuring of the PF private structure,
9931 * and a hardware reset occur.
9932 *
9933 * Returns 0 on success, negative on failure
9934 **/
9935 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9936 {
9937 struct i40e_aq_get_phy_abilities_resp abilities;
9938 struct i40e_pf *pf;
9939 struct i40e_hw *hw;
9940 static u16 pfs_found;
9941 u16 wol_nvm_bits;
9942 u16 link_status;
9943 int err = 0;
9944 u32 len;
9945 u32 i;
9946
9947 err = pci_enable_device_mem(pdev);
9948 if (err)
9949 return err;
9950
9951 /* set up for high or low dma */
9952 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9953 if (err) {
9954 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9955 if (err) {
9956 dev_err(&pdev->dev,
9957 "DMA configuration failed: 0x%x\n", err);
9958 goto err_dma;
9959 }
9960 }
9961
9962 /* set up pci connections */
9963 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9964 IORESOURCE_MEM), i40e_driver_name);
9965 if (err) {
9966 dev_info(&pdev->dev,
9967 "pci_request_selected_regions failed %d\n", err);
9968 goto err_pci_reg;
9969 }
9970
9971 pci_enable_pcie_error_reporting(pdev);
9972 pci_set_master(pdev);
9973
9974 /* Now that we have a PCI connection, we need to do the
9975 * low level device setup. This is primarily setting up
9976 * the Admin Queue structures and then querying for the
9977 * device's current profile information.
9978 */
9979 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9980 if (!pf) {
9981 err = -ENOMEM;
9982 goto err_pf_alloc;
9983 }
9984 pf->next_vsi = 0;
9985 pf->pdev = pdev;
9986 set_bit(__I40E_DOWN, &pf->state);
9987
9988 hw = &pf->hw;
9989 hw->back = pf;
9990
9991 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9992 I40E_MAX_CSR_SPACE);
9993
9994 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9995 if (!hw->hw_addr) {
9996 err = -EIO;
9997 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9998 (unsigned int)pci_resource_start(pdev, 0),
9999 pf->ioremap_len, err);
10000 goto err_ioremap;
10001 }
10002 hw->vendor_id = pdev->vendor;
10003 hw->device_id = pdev->device;
10004 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10005 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10006 hw->subsystem_device_id = pdev->subsystem_device;
10007 hw->bus.device = PCI_SLOT(pdev->devfn);
10008 hw->bus.func = PCI_FUNC(pdev->devfn);
10009 pf->instance = pfs_found;
10010
10011 if (debug != -1) {
10012 pf->msg_enable = pf->hw.debug_mask;
10013 pf->msg_enable = debug;
10014 }
10015
10016 /* do a special CORER for clearing PXE mode once at init */
10017 if (hw->revision_id == 0 &&
10018 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10019 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10020 i40e_flush(hw);
10021 msleep(200);
10022 pf->corer_count++;
10023
10024 i40e_clear_pxe_mode(hw);
10025 }
10026
10027 /* Reset here to make sure all is clean and to define PF 'n' */
10028 i40e_clear_hw(hw);
10029 err = i40e_pf_reset(hw);
10030 if (err) {
10031 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10032 goto err_pf_reset;
10033 }
10034 pf->pfr_count++;
10035
10036 hw->aq.num_arq_entries = I40E_AQ_LEN;
10037 hw->aq.num_asq_entries = I40E_AQ_LEN;
10038 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10039 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10040 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10041
10042 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10043 "%s-%s:misc",
10044 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10045
10046 err = i40e_init_shared_code(hw);
10047 if (err) {
10048 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10049 err);
10050 goto err_pf_reset;
10051 }
10052
10053 /* set up a default setting for link flow control */
10054 pf->hw.fc.requested_mode = I40E_FC_NONE;
10055
10056 err = i40e_init_adminq(hw);
10057 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10058 if (err) {
10059 dev_info(&pdev->dev,
10060 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10061 goto err_pf_reset;
10062 }
10063
10064 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10065 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10066 dev_info(&pdev->dev,
10067 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10068 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10069 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10070 dev_info(&pdev->dev,
10071 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10072
10073 i40e_verify_eeprom(pf);
10074
10075 /* Rev 0 hardware was never productized */
10076 if (hw->revision_id < 1)
10077 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10078
10079 i40e_clear_pxe_mode(hw);
10080 err = i40e_get_capabilities(pf);
10081 if (err)
10082 goto err_adminq_setup;
10083
10084 err = i40e_sw_init(pf);
10085 if (err) {
10086 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10087 goto err_sw_init;
10088 }
10089
10090 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10091 hw->func_caps.num_rx_qp,
10092 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10093 if (err) {
10094 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10095 goto err_init_lan_hmc;
10096 }
10097
10098 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10099 if (err) {
10100 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10101 err = -ENOENT;
10102 goto err_configure_lan_hmc;
10103 }
10104
10105 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10106 * Ignore error return codes because if it was already disabled via
10107 * hardware settings this will fail
10108 */
10109 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10110 (pf->hw.aq.fw_maj_ver < 4)) {
10111 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10112 i40e_aq_stop_lldp(hw, true, NULL);
10113 }
10114
10115 i40e_get_mac_addr(hw, hw->mac.addr);
10116 if (!is_valid_ether_addr(hw->mac.addr)) {
10117 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10118 err = -EIO;
10119 goto err_mac_addr;
10120 }
10121 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10122 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10123 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10124 if (is_valid_ether_addr(hw->mac.port_addr))
10125 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10126 #ifdef I40E_FCOE
10127 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10128 if (err)
10129 dev_info(&pdev->dev,
10130 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10131 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10132 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10133 hw->mac.san_addr);
10134 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10135 }
10136 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10137 #endif /* I40E_FCOE */
10138
10139 pci_set_drvdata(pdev, pf);
10140 pci_save_state(pdev);
10141 #ifdef CONFIG_I40E_DCB
10142 err = i40e_init_pf_dcb(pf);
10143 if (err) {
10144 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10145 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10146 /* Continue without DCB enabled */
10147 }
10148 #endif /* CONFIG_I40E_DCB */
10149
10150 /* set up periodic task facility */
10151 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10152 pf->service_timer_period = HZ;
10153
10154 INIT_WORK(&pf->service_task, i40e_service_task);
10155 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10156 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10157
10158 /* NVM bit on means WoL disabled for the port */
10159 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10160 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10161 pf->wol_en = false;
10162 else
10163 pf->wol_en = true;
10164 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10165
10166 /* set up the main switch operations */
10167 i40e_determine_queue_usage(pf);
10168 err = i40e_init_interrupt_scheme(pf);
10169 if (err)
10170 goto err_switch_setup;
10171
10172 /* The number of VSIs reported by the FW is the minimum guaranteed
10173 * to us; HW supports far more and we share the remaining pool with
10174 * the other PFs. We allocate space for more than the guarantee with
10175 * the understanding that we might not get them all later.
10176 */
10177 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10178 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10179 else
10180 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10181
10182 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10183 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10184 pf->vsi = kzalloc(len, GFP_KERNEL);
10185 if (!pf->vsi) {
10186 err = -ENOMEM;
10187 goto err_switch_setup;
10188 }
10189
10190 #ifdef CONFIG_PCI_IOV
10191 /* prep for VF support */
10192 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10193 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10194 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10195 if (pci_num_vf(pdev))
10196 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10197 }
10198 #endif
10199 err = i40e_setup_pf_switch(pf, false);
10200 if (err) {
10201 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10202 goto err_vsis;
10203 }
10204 /* if FDIR VSI was set up, start it now */
10205 for (i = 0; i < pf->num_alloc_vsi; i++) {
10206 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10207 i40e_vsi_open(pf->vsi[i]);
10208 break;
10209 }
10210 }
10211
10212 /* driver is only interested in link up/down and module qualification
10213 * reports from firmware
10214 */
10215 err = i40e_aq_set_phy_int_mask(&pf->hw,
10216 I40E_AQ_EVENT_LINK_UPDOWN |
10217 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10218 if (err)
10219 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10220 i40e_stat_str(&pf->hw, err),
10221 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10222
10223 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10224 (pf->hw.aq.fw_maj_ver < 4)) {
10225 msleep(75);
10226 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10227 if (err)
10228 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10229 i40e_stat_str(&pf->hw, err),
10230 i40e_aq_str(&pf->hw,
10231 pf->hw.aq.asq_last_status));
10232 }
10233 /* The main driver is (mostly) up and happy. We need to set this state
10234 * before setting up the misc vector or we get a race and the vector
10235 * ends up disabled forever.
10236 */
10237 clear_bit(__I40E_DOWN, &pf->state);
10238
10239 /* In case of MSIX we are going to setup the misc vector right here
10240 * to handle admin queue events etc. In case of legacy and MSI
10241 * the misc functionality and queue processing is combined in
10242 * the same vector and that gets setup at open.
10243 */
10244 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10245 err = i40e_setup_misc_vector(pf);
10246 if (err) {
10247 dev_info(&pdev->dev,
10248 "setup of misc vector failed: %d\n", err);
10249 goto err_vsis;
10250 }
10251 }
10252
10253 #ifdef CONFIG_PCI_IOV
10254 /* prep for VF support */
10255 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10256 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10257 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10258 u32 val;
10259
10260 /* disable link interrupts for VFs */
10261 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10262 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10263 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10264 i40e_flush(hw);
10265
10266 if (pci_num_vf(pdev)) {
10267 dev_info(&pdev->dev,
10268 "Active VFs found, allocating resources.\n");
10269 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10270 if (err)
10271 dev_info(&pdev->dev,
10272 "Error %d allocating resources for existing VFs\n",
10273 err);
10274 }
10275 }
10276 #endif /* CONFIG_PCI_IOV */
10277
10278 pfs_found++;
10279
10280 i40e_dbg_pf_init(pf);
10281
10282 /* tell the firmware that we're starting */
10283 i40e_send_version(pf);
10284
10285 /* since everything's happy, start the service_task timer */
10286 mod_timer(&pf->service_timer,
10287 round_jiffies(jiffies + pf->service_timer_period));
10288
10289 #ifdef I40E_FCOE
10290 /* create FCoE interface */
10291 i40e_fcoe_vsi_setup(pf);
10292
10293 #endif
10294 /* Get the negotiated link width and speed from PCI config space */
10295 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10296
10297 i40e_set_pci_config_data(hw, link_status);
10298
10299 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10300 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10301 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10302 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10303 "Unknown"),
10304 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10305 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10306 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10307 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10308 "Unknown"));
10309
10310 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10311 hw->bus.speed < i40e_bus_speed_8000) {
10312 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10313 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10314 }
10315
10316 /* get the requested speeds from the fw */
10317 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10318 if (err)
10319 dev_info(&pf->pdev->dev,
10320 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10321 i40e_stat_str(&pf->hw, err),
10322 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10323 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10324
10325 /* print a string summarizing features */
10326 i40e_print_features(pf);
10327
10328 return 0;
10329
10330 /* Unwind what we've done if something failed in the setup */
10331 err_vsis:
10332 set_bit(__I40E_DOWN, &pf->state);
10333 i40e_clear_interrupt_scheme(pf);
10334 kfree(pf->vsi);
10335 err_switch_setup:
10336 i40e_reset_interrupt_capability(pf);
10337 del_timer_sync(&pf->service_timer);
10338 err_mac_addr:
10339 err_configure_lan_hmc:
10340 (void)i40e_shutdown_lan_hmc(hw);
10341 err_init_lan_hmc:
10342 kfree(pf->qp_pile);
10343 err_sw_init:
10344 err_adminq_setup:
10345 (void)i40e_shutdown_adminq(hw);
10346 err_pf_reset:
10347 iounmap(hw->hw_addr);
10348 err_ioremap:
10349 kfree(pf);
10350 err_pf_alloc:
10351 pci_disable_pcie_error_reporting(pdev);
10352 pci_release_selected_regions(pdev,
10353 pci_select_bars(pdev, IORESOURCE_MEM));
10354 err_pci_reg:
10355 err_dma:
10356 pci_disable_device(pdev);
10357 return err;
10358 }
10359
10360 /**
10361 * i40e_remove - Device removal routine
10362 * @pdev: PCI device information struct
10363 *
10364 * i40e_remove is called by the PCI subsystem to alert the driver
10365 * that is should release a PCI device. This could be caused by a
10366 * Hot-Plug event, or because the driver is going to be removed from
10367 * memory.
10368 **/
10369 static void i40e_remove(struct pci_dev *pdev)
10370 {
10371 struct i40e_pf *pf = pci_get_drvdata(pdev);
10372 i40e_status ret_code;
10373 int i;
10374
10375 i40e_dbg_pf_exit(pf);
10376
10377 i40e_ptp_stop(pf);
10378
10379 /* no more scheduling of any task */
10380 set_bit(__I40E_DOWN, &pf->state);
10381 del_timer_sync(&pf->service_timer);
10382 cancel_work_sync(&pf->service_task);
10383 i40e_fdir_teardown(pf);
10384
10385 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10386 i40e_free_vfs(pf);
10387 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10388 }
10389
10390 i40e_fdir_teardown(pf);
10391
10392 /* If there is a switch structure or any orphans, remove them.
10393 * This will leave only the PF's VSI remaining.
10394 */
10395 for (i = 0; i < I40E_MAX_VEB; i++) {
10396 if (!pf->veb[i])
10397 continue;
10398
10399 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10400 pf->veb[i]->uplink_seid == 0)
10401 i40e_switch_branch_release(pf->veb[i]);
10402 }
10403
10404 /* Now we can shutdown the PF's VSI, just before we kill
10405 * adminq and hmc.
10406 */
10407 if (pf->vsi[pf->lan_vsi])
10408 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10409
10410 /* shutdown and destroy the HMC */
10411 if (pf->hw.hmc.hmc_obj) {
10412 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10413 if (ret_code)
10414 dev_warn(&pdev->dev,
10415 "Failed to destroy the HMC resources: %d\n",
10416 ret_code);
10417 }
10418
10419 /* shutdown the adminq */
10420 ret_code = i40e_shutdown_adminq(&pf->hw);
10421 if (ret_code)
10422 dev_warn(&pdev->dev,
10423 "Failed to destroy the Admin Queue resources: %d\n",
10424 ret_code);
10425
10426 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10427 i40e_clear_interrupt_scheme(pf);
10428 for (i = 0; i < pf->num_alloc_vsi; i++) {
10429 if (pf->vsi[i]) {
10430 i40e_vsi_clear_rings(pf->vsi[i]);
10431 i40e_vsi_clear(pf->vsi[i]);
10432 pf->vsi[i] = NULL;
10433 }
10434 }
10435
10436 for (i = 0; i < I40E_MAX_VEB; i++) {
10437 kfree(pf->veb[i]);
10438 pf->veb[i] = NULL;
10439 }
10440
10441 kfree(pf->qp_pile);
10442 kfree(pf->vsi);
10443
10444 iounmap(pf->hw.hw_addr);
10445 kfree(pf);
10446 pci_release_selected_regions(pdev,
10447 pci_select_bars(pdev, IORESOURCE_MEM));
10448
10449 pci_disable_pcie_error_reporting(pdev);
10450 pci_disable_device(pdev);
10451 }
10452
10453 /**
10454 * i40e_pci_error_detected - warning that something funky happened in PCI land
10455 * @pdev: PCI device information struct
10456 *
10457 * Called to warn that something happened and the error handling steps
10458 * are in progress. Allows the driver to quiesce things, be ready for
10459 * remediation.
10460 **/
10461 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10462 enum pci_channel_state error)
10463 {
10464 struct i40e_pf *pf = pci_get_drvdata(pdev);
10465
10466 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10467
10468 /* shutdown all operations */
10469 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10470 rtnl_lock();
10471 i40e_prep_for_reset(pf);
10472 rtnl_unlock();
10473 }
10474
10475 /* Request a slot reset */
10476 return PCI_ERS_RESULT_NEED_RESET;
10477 }
10478
10479 /**
10480 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10481 * @pdev: PCI device information struct
10482 *
10483 * Called to find if the driver can work with the device now that
10484 * the pci slot has been reset. If a basic connection seems good
10485 * (registers are readable and have sane content) then return a
10486 * happy little PCI_ERS_RESULT_xxx.
10487 **/
10488 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10489 {
10490 struct i40e_pf *pf = pci_get_drvdata(pdev);
10491 pci_ers_result_t result;
10492 int err;
10493 u32 reg;
10494
10495 dev_dbg(&pdev->dev, "%s\n", __func__);
10496 if (pci_enable_device_mem(pdev)) {
10497 dev_info(&pdev->dev,
10498 "Cannot re-enable PCI device after reset.\n");
10499 result = PCI_ERS_RESULT_DISCONNECT;
10500 } else {
10501 pci_set_master(pdev);
10502 pci_restore_state(pdev);
10503 pci_save_state(pdev);
10504 pci_wake_from_d3(pdev, false);
10505
10506 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10507 if (reg == 0)
10508 result = PCI_ERS_RESULT_RECOVERED;
10509 else
10510 result = PCI_ERS_RESULT_DISCONNECT;
10511 }
10512
10513 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10514 if (err) {
10515 dev_info(&pdev->dev,
10516 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10517 err);
10518 /* non-fatal, continue */
10519 }
10520
10521 return result;
10522 }
10523
10524 /**
10525 * i40e_pci_error_resume - restart operations after PCI error recovery
10526 * @pdev: PCI device information struct
10527 *
10528 * Called to allow the driver to bring things back up after PCI error
10529 * and/or reset recovery has finished.
10530 **/
10531 static void i40e_pci_error_resume(struct pci_dev *pdev)
10532 {
10533 struct i40e_pf *pf = pci_get_drvdata(pdev);
10534
10535 dev_dbg(&pdev->dev, "%s\n", __func__);
10536 if (test_bit(__I40E_SUSPENDED, &pf->state))
10537 return;
10538
10539 rtnl_lock();
10540 i40e_handle_reset_warning(pf);
10541 rtnl_unlock();
10542 }
10543
10544 /**
10545 * i40e_shutdown - PCI callback for shutting down
10546 * @pdev: PCI device information struct
10547 **/
10548 static void i40e_shutdown(struct pci_dev *pdev)
10549 {
10550 struct i40e_pf *pf = pci_get_drvdata(pdev);
10551 struct i40e_hw *hw = &pf->hw;
10552
10553 set_bit(__I40E_SUSPENDED, &pf->state);
10554 set_bit(__I40E_DOWN, &pf->state);
10555 rtnl_lock();
10556 i40e_prep_for_reset(pf);
10557 rtnl_unlock();
10558
10559 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10560 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10561
10562 del_timer_sync(&pf->service_timer);
10563 cancel_work_sync(&pf->service_task);
10564 i40e_fdir_teardown(pf);
10565
10566 rtnl_lock();
10567 i40e_prep_for_reset(pf);
10568 rtnl_unlock();
10569
10570 wr32(hw, I40E_PFPM_APM,
10571 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10572 wr32(hw, I40E_PFPM_WUFC,
10573 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10574
10575 i40e_clear_interrupt_scheme(pf);
10576
10577 if (system_state == SYSTEM_POWER_OFF) {
10578 pci_wake_from_d3(pdev, pf->wol_en);
10579 pci_set_power_state(pdev, PCI_D3hot);
10580 }
10581 }
10582
10583 #ifdef CONFIG_PM
10584 /**
10585 * i40e_suspend - PCI callback for moving to D3
10586 * @pdev: PCI device information struct
10587 **/
10588 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10589 {
10590 struct i40e_pf *pf = pci_get_drvdata(pdev);
10591 struct i40e_hw *hw = &pf->hw;
10592
10593 set_bit(__I40E_SUSPENDED, &pf->state);
10594 set_bit(__I40E_DOWN, &pf->state);
10595
10596 rtnl_lock();
10597 i40e_prep_for_reset(pf);
10598 rtnl_unlock();
10599
10600 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10601 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10602
10603 pci_wake_from_d3(pdev, pf->wol_en);
10604 pci_set_power_state(pdev, PCI_D3hot);
10605
10606 return 0;
10607 }
10608
10609 /**
10610 * i40e_resume - PCI callback for waking up from D3
10611 * @pdev: PCI device information struct
10612 **/
10613 static int i40e_resume(struct pci_dev *pdev)
10614 {
10615 struct i40e_pf *pf = pci_get_drvdata(pdev);
10616 u32 err;
10617
10618 pci_set_power_state(pdev, PCI_D0);
10619 pci_restore_state(pdev);
10620 /* pci_restore_state() clears dev->state_saves, so
10621 * call pci_save_state() again to restore it.
10622 */
10623 pci_save_state(pdev);
10624
10625 err = pci_enable_device_mem(pdev);
10626 if (err) {
10627 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10628 return err;
10629 }
10630 pci_set_master(pdev);
10631
10632 /* no wakeup events while running */
10633 pci_wake_from_d3(pdev, false);
10634
10635 /* handling the reset will rebuild the device state */
10636 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10637 clear_bit(__I40E_DOWN, &pf->state);
10638 rtnl_lock();
10639 i40e_reset_and_rebuild(pf, false);
10640 rtnl_unlock();
10641 }
10642
10643 return 0;
10644 }
10645
10646 #endif
10647 static const struct pci_error_handlers i40e_err_handler = {
10648 .error_detected = i40e_pci_error_detected,
10649 .slot_reset = i40e_pci_error_slot_reset,
10650 .resume = i40e_pci_error_resume,
10651 };
10652
10653 static struct pci_driver i40e_driver = {
10654 .name = i40e_driver_name,
10655 .id_table = i40e_pci_tbl,
10656 .probe = i40e_probe,
10657 .remove = i40e_remove,
10658 #ifdef CONFIG_PM
10659 .suspend = i40e_suspend,
10660 .resume = i40e_resume,
10661 #endif
10662 .shutdown = i40e_shutdown,
10663 .err_handler = &i40e_err_handler,
10664 .sriov_configure = i40e_pci_sriov_configure,
10665 };
10666
10667 /**
10668 * i40e_init_module - Driver registration routine
10669 *
10670 * i40e_init_module is the first routine called when the driver is
10671 * loaded. All it does is register with the PCI subsystem.
10672 **/
10673 static int __init i40e_init_module(void)
10674 {
10675 pr_info("%s: %s - version %s\n", i40e_driver_name,
10676 i40e_driver_string, i40e_driver_version_str);
10677 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10678
10679 i40e_dbg_init();
10680 return pci_register_driver(&i40e_driver);
10681 }
10682 module_init(i40e_init_module);
10683
10684 /**
10685 * i40e_exit_module - Driver exit cleanup routine
10686 *
10687 * i40e_exit_module is called just before the driver is removed
10688 * from memory.
10689 **/
10690 static void __exit i40e_exit_module(void)
10691 {
10692 pci_unregister_driver(&i40e_driver);
10693 i40e_dbg_exit();
10694 }
10695 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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