projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
i40e: fix bug in return from get_link_status and avoid spurious link messages
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
86 {0, }
87 };
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
89
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
94
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
99
100 /**
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
106 **/
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
109 {
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
111
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
115 if (!mem->va)
116 return -ENOMEM;
117
118 return 0;
119 }
120
121 /**
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
125 **/
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
127 {
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
129
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
131 mem->va = NULL;
132 mem->pa = 0;
133 mem->size = 0;
134
135 return 0;
136 }
137
138 /**
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
143 **/
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 u32 size)
146 {
147 mem->size = size;
148 mem->va = kzalloc(size, GFP_KERNEL);
149
150 if (!mem->va)
151 return -ENOMEM;
152
153 return 0;
154 }
155
156 /**
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
160 **/
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
162 {
163 /* it's ok to kfree a NULL pointer */
164 kfree(mem->va);
165 mem->va = NULL;
166 mem->size = 0;
167
168 return 0;
169 }
170
171 /**
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
177 *
178 * Returns the base item index of the lump, or negative for error
179 *
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
183 **/
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
185 u16 needed, u16 id)
186 {
187 int ret = -ENOMEM;
188 int i, j;
189
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
193 pile, needed, id);
194 return -EINVAL;
195 }
196
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
202 i++;
203 continue;
204 }
205
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
209 break;
210 }
211
212 if (j == needed) {
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
216 ret = i;
217 pile->search_hint = i + j;
218 break;
219 } else {
220 /* not enough, so skip over it and continue looking */
221 i += j;
222 }
223 }
224
225 return ret;
226 }
227
228 /**
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
233 *
234 * Returns the count of items in the lump
235 **/
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
237 {
238 int valid_id = (id | I40E_PILE_VALID_BIT);
239 int count = 0;
240 int i;
241
242 if (!pile || index >= pile->num_entries)
243 return -EINVAL;
244
245 for (i = index;
246 i < pile->num_entries && pile->list[i] == valid_id;
247 i++) {
248 pile->list[i] = 0;
249 count++;
250 }
251
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
254
255 return count;
256 }
257
258 /**
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
262 **/
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 {
265 int i;
266
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
269 return pf->vsi[i];
270
271 return NULL;
272 }
273
274 /**
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
277 *
278 * If not already scheduled, this puts the task into the work queue
279 **/
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
281 {
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
286 }
287
288 /**
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
291 *
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
294 * reset.
295 **/
296 #ifdef I40E_FCOE
297 void i40e_tx_timeout(struct net_device *netdev)
298 #else
299 static void i40e_tx_timeout(struct net_device *netdev)
300 #endif
301 {
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
307 u32 head, val;
308
309 pf->tx_timeout_count++;
310
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
315
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
319 time_after(jiffies,
320 (trans_start + netdev->watchdog_timeo))) {
321 hung_queue = i;
322 break;
323 }
324 }
325
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
328 } else {
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
332 if (hung_queue ==
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
335 break;
336 }
337 }
338 }
339 }
340
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
346
347 if (tx_ring) {
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
351 val = rd32(&pf->hw,
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
354 else
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
356
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
361 }
362
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
366
367 switch (pf->tx_timeout_recovery_level) {
368 case 1:
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
370 break;
371 case 2:
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
373 break;
374 case 3:
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
376 break;
377 default:
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
379 break;
380 }
381
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
384 }
385
386 /**
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
390 **/
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
392 {
393 rx_ring->next_to_use = val;
394
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
398 * such as IA-64).
399 */
400 wmb();
401 writel(val, rx_ring->tail);
402 }
403
404 /**
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
407 *
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
410 **/
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
412 {
413 return &vsi->net_stats;
414 }
415
416 /**
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
419 *
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
422 **/
423 #ifdef I40E_FCOE
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
427 #else
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
431 #endif
432 {
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
437 int i;
438
439 if (test_bit(__I40E_DOWN, &vsi->state))
440 return stats;
441
442 if (!vsi->tx_rings)
443 return stats;
444
445 rcu_read_lock();
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
447 u64 bytes, packets;
448 unsigned int start;
449
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
451 if (!tx_ring)
452 continue;
453
454 do {
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
459
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
463
464 do {
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
469
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
472 }
473 rcu_read_unlock();
474
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
483
484 return stats;
485 }
486
487 /**
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
490 **/
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
492 {
493 struct rtnl_link_stats64 *ns;
494 int i;
495
496 if (!vsi)
497 return;
498
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
514 }
515 }
516 vsi->stat_offsets_loaded = false;
517 }
518
519 /**
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
522 **/
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
524 {
525 int i;
526
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
530
531 for (i = 0; i < I40E_MAX_VEB; i++) {
532 if (pf->veb[i]) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
538 }
539 }
540 }
541
542 /**
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
550 *
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
556 **/
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
559 {
560 u64 new_data;
561
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
565 } else {
566 new_data = rd64(hw, loreg);
567 }
568 if (!offset_loaded)
569 *offset = new_data;
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
572 else
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
575 }
576
577 /**
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
584 **/
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
587 {
588 u32 new_data;
589
590 new_data = rd32(hw, reg);
591 if (!offset_loaded)
592 *offset = new_data;
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
595 else
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
597 }
598
599 /**
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
602 **/
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
604 {
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
610
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
613
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
627
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
644
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
662 }
663
664 /**
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
667 **/
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
669 {
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
676 int i, idx = 0;
677
678 idx = veb->stats_idx;
679 es = &veb->stats;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
683
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
705
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
739 }
740 veb->stat_offsets_loaded = true;
741 }
742
743 #ifdef I40E_FCOE
744 /**
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
747 **/
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
749 {
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
754 int idx;
755
756 if (vsi->type != I40E_VSI_FCOE)
757 return;
758
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
762
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
787
788 vsi->fcoe_stat_offsets_loaded = true;
789 }
790
791 #endif
792 /**
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
795 *
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
797 **/
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
799 {
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
803 u64 xoff = 0;
804
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
807 return;
808
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
813
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
816 return;
817
818 }
819
820 /**
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
823 *
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
825 **/
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
827 {
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
833 u16 i;
834 u8 tc;
835
836 dcb_cfg = &hw->local_dcbx_config;
837
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
841 return;
842 }
843
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
850
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
853 continue;
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
856 xoff[tc] = true;
857 }
858 }
859
860 /**
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
863 *
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
869 **/
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
871 {
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
878 struct i40e_ring *p;
879 u32 rx_page, rx_buf;
880 u64 bytes, packets;
881 unsigned int start;
882 u64 rx_p, rx_b;
883 u64 tx_p, tx_b;
884 u16 q;
885
886 if (test_bit(__I40E_DOWN, &vsi->state) ||
887 test_bit(__I40E_CONFIG_BUSY, &pf->state))
888 return;
889
890 ns = i40e_get_vsi_stats_struct(vsi);
891 ons = &vsi->net_stats_offsets;
892 es = &vsi->eth_stats;
893 oes = &vsi->eth_stats_offsets;
894
895 /* Gather up the netdev and vsi stats that the driver collects
896 * on the fly during packet processing
897 */
898 rx_b = rx_p = 0;
899 tx_b = tx_p = 0;
900 tx_restart = tx_busy = 0;
901 rx_page = 0;
902 rx_buf = 0;
903 rcu_read_lock();
904 for (q = 0; q < vsi->num_queue_pairs; q++) {
905 /* locate Tx ring */
906 p = ACCESS_ONCE(vsi->tx_rings[q]);
907
908 do {
909 start = u64_stats_fetch_begin_irq(&p->syncp);
910 packets = p->stats.packets;
911 bytes = p->stats.bytes;
912 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
913 tx_b += bytes;
914 tx_p += packets;
915 tx_restart += p->tx_stats.restart_queue;
916 tx_busy += p->tx_stats.tx_busy;
917
918 /* Rx queue is part of the same block as Tx queue */
919 p = &p[1];
920 do {
921 start = u64_stats_fetch_begin_irq(&p->syncp);
922 packets = p->stats.packets;
923 bytes = p->stats.bytes;
924 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
925 rx_b += bytes;
926 rx_p += packets;
927 rx_buf += p->rx_stats.alloc_buff_failed;
928 rx_page += p->rx_stats.alloc_page_failed;
929 }
930 rcu_read_unlock();
931 vsi->tx_restart = tx_restart;
932 vsi->tx_busy = tx_busy;
933 vsi->rx_page_failed = rx_page;
934 vsi->rx_buf_failed = rx_buf;
935
936 ns->rx_packets = rx_p;
937 ns->rx_bytes = rx_b;
938 ns->tx_packets = tx_p;
939 ns->tx_bytes = tx_b;
940
941 /* update netdev stats from eth stats */
942 i40e_update_eth_stats(vsi);
943 ons->tx_errors = oes->tx_errors;
944 ns->tx_errors = es->tx_errors;
945 ons->multicast = oes->rx_multicast;
946 ns->multicast = es->rx_multicast;
947 ons->rx_dropped = oes->rx_discards;
948 ns->rx_dropped = es->rx_discards;
949 ons->tx_dropped = oes->tx_discards;
950 ns->tx_dropped = es->tx_discards;
951
952 /* pull in a couple PF stats if this is the main vsi */
953 if (vsi == pf->vsi[pf->lan_vsi]) {
954 ns->rx_crc_errors = pf->stats.crc_errors;
955 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
956 ns->rx_length_errors = pf->stats.rx_length_errors;
957 }
958 }
959
960 /**
961 * i40e_update_pf_stats - Update the PF statistics counters.
962 * @pf: the PF to be updated
963 **/
964 static void i40e_update_pf_stats(struct i40e_pf *pf)
965 {
966 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
967 struct i40e_hw_port_stats *nsd = &pf->stats;
968 struct i40e_hw *hw = &pf->hw;
969 u32 val;
970 int i;
971
972 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
973 I40E_GLPRT_GORCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
976 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
977 I40E_GLPRT_GOTCL(hw->port),
978 pf->stat_offsets_loaded,
979 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
980 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.rx_discards,
983 &nsd->eth.rx_discards);
984 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
985 I40E_GLPRT_UPRCL(hw->port),
986 pf->stat_offsets_loaded,
987 &osd->eth.rx_unicast,
988 &nsd->eth.rx_unicast);
989 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
990 I40E_GLPRT_MPRCL(hw->port),
991 pf->stat_offsets_loaded,
992 &osd->eth.rx_multicast,
993 &nsd->eth.rx_multicast);
994 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
995 I40E_GLPRT_BPRCL(hw->port),
996 pf->stat_offsets_loaded,
997 &osd->eth.rx_broadcast,
998 &nsd->eth.rx_broadcast);
999 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1000 I40E_GLPRT_UPTCL(hw->port),
1001 pf->stat_offsets_loaded,
1002 &osd->eth.tx_unicast,
1003 &nsd->eth.tx_unicast);
1004 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1005 I40E_GLPRT_MPTCL(hw->port),
1006 pf->stat_offsets_loaded,
1007 &osd->eth.tx_multicast,
1008 &nsd->eth.tx_multicast);
1009 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1010 I40E_GLPRT_BPTCL(hw->port),
1011 pf->stat_offsets_loaded,
1012 &osd->eth.tx_broadcast,
1013 &nsd->eth.tx_broadcast);
1014
1015 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->tx_dropped_link_down,
1018 &nsd->tx_dropped_link_down);
1019
1020 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->crc_errors, &nsd->crc_errors);
1023
1024 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->illegal_bytes, &nsd->illegal_bytes);
1027
1028 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->mac_local_faults,
1031 &nsd->mac_local_faults);
1032 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->mac_remote_faults,
1035 &nsd->mac_remote_faults);
1036
1037 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_length_errors,
1040 &nsd->rx_length_errors);
1041
1042 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->link_xon_rx, &nsd->link_xon_rx);
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_tx, &nsd->link_xon_tx);
1048 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1049 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1050 pf->stat_offsets_loaded,
1051 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1052
1053 for (i = 0; i < 8; i++) {
1054 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1055 pf->stat_offsets_loaded,
1056 &osd->priority_xon_rx[i],
1057 &nsd->priority_xon_rx[i]);
1058 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xon_tx[i],
1061 &nsd->priority_xon_tx[i]);
1062 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1063 pf->stat_offsets_loaded,
1064 &osd->priority_xoff_tx[i],
1065 &nsd->priority_xoff_tx[i]);
1066 i40e_stat_update32(hw,
1067 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1068 pf->stat_offsets_loaded,
1069 &osd->priority_xon_2_xoff[i],
1070 &nsd->priority_xon_2_xoff[i]);
1071 }
1072
1073 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1074 I40E_GLPRT_PRC64L(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_size_64, &nsd->rx_size_64);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1078 I40E_GLPRT_PRC127L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_127, &nsd->rx_size_127);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1082 I40E_GLPRT_PRC255L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_255, &nsd->rx_size_255);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1086 I40E_GLPRT_PRC511L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_511, &nsd->rx_size_511);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1090 I40E_GLPRT_PRC1023L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_1023, &nsd->rx_size_1023);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1094 I40E_GLPRT_PRC1522L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_1522, &nsd->rx_size_1522);
1097 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1098 I40E_GLPRT_PRC9522L(hw->port),
1099 pf->stat_offsets_loaded,
1100 &osd->rx_size_big, &nsd->rx_size_big);
1101
1102 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1103 I40E_GLPRT_PTC64L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->tx_size_64, &nsd->tx_size_64);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1107 I40E_GLPRT_PTC127L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_127, &nsd->tx_size_127);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1111 I40E_GLPRT_PTC255L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_255, &nsd->tx_size_255);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1115 I40E_GLPRT_PTC511L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_511, &nsd->tx_size_511);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1119 I40E_GLPRT_PTC1023L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_1023, &nsd->tx_size_1023);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1123 I40E_GLPRT_PTC1522L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_1522, &nsd->tx_size_1522);
1126 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1127 I40E_GLPRT_PTC9522L(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->tx_size_big, &nsd->tx_size_big);
1130
1131 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1132 pf->stat_offsets_loaded,
1133 &osd->rx_undersize, &nsd->rx_undersize);
1134 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_fragments, &nsd->rx_fragments);
1137 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_oversize, &nsd->rx_oversize);
1140 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_jabber, &nsd->rx_jabber);
1143
1144 /* FDIR stats */
1145 i40e_stat_update32(hw,
1146 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1147 pf->stat_offsets_loaded,
1148 &osd->fd_atr_match, &nsd->fd_atr_match);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_sb_match, &nsd->fd_sb_match);
1153 i40e_stat_update32(hw,
1154 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1155 pf->stat_offsets_loaded,
1156 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1157
1158 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1159 nsd->tx_lpi_status =
1160 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1161 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1162 nsd->rx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1165 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1166 pf->stat_offsets_loaded,
1167 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1168 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1171
1172 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1173 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1174 nsd->fd_sb_status = true;
1175 else
1176 nsd->fd_sb_status = false;
1177
1178 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1179 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1180 nsd->fd_atr_status = true;
1181 else
1182 nsd->fd_atr_status = false;
1183
1184 pf->stat_offsets_loaded = true;
1185 }
1186
1187 /**
1188 * i40e_update_stats - Update the various statistics counters.
1189 * @vsi: the VSI to be updated
1190 *
1191 * Update the various stats for this VSI and its related entities.
1192 **/
1193 void i40e_update_stats(struct i40e_vsi *vsi)
1194 {
1195 struct i40e_pf *pf = vsi->back;
1196
1197 if (vsi == pf->vsi[pf->lan_vsi])
1198 i40e_update_pf_stats(pf);
1199
1200 i40e_update_vsi_stats(vsi);
1201 #ifdef I40E_FCOE
1202 i40e_update_fcoe_stats(vsi);
1203 #endif
1204 }
1205
1206 /**
1207 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1208 * @vsi: the VSI to be searched
1209 * @macaddr: the MAC address
1210 * @vlan: the vlan
1211 * @is_vf: make sure its a VF filter, else doesn't matter
1212 * @is_netdev: make sure its a netdev filter, else doesn't matter
1213 *
1214 * Returns ptr to the filter object or NULL
1215 **/
1216 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1217 u8 *macaddr, s16 vlan,
1218 bool is_vf, bool is_netdev)
1219 {
1220 struct i40e_mac_filter *f;
1221
1222 if (!vsi || !macaddr)
1223 return NULL;
1224
1225 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1226 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1227 (vlan == f->vlan) &&
1228 (!is_vf || f->is_vf) &&
1229 (!is_netdev || f->is_netdev))
1230 return f;
1231 }
1232 return NULL;
1233 }
1234
1235 /**
1236 * i40e_find_mac - Find a mac addr in the macvlan filters list
1237 * @vsi: the VSI to be searched
1238 * @macaddr: the MAC address we are searching for
1239 * @is_vf: make sure its a VF filter, else doesn't matter
1240 * @is_netdev: make sure its a netdev filter, else doesn't matter
1241 *
1242 * Returns the first filter with the provided MAC address or NULL if
1243 * MAC address was not found
1244 **/
1245 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1246 bool is_vf, bool is_netdev)
1247 {
1248 struct i40e_mac_filter *f;
1249
1250 if (!vsi || !macaddr)
1251 return NULL;
1252
1253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1254 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1255 (!is_vf || f->is_vf) &&
1256 (!is_netdev || f->is_netdev))
1257 return f;
1258 }
1259 return NULL;
1260 }
1261
1262 /**
1263 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1264 * @vsi: the VSI to be searched
1265 *
1266 * Returns true if VSI is in vlan mode or false otherwise
1267 **/
1268 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1269 {
1270 struct i40e_mac_filter *f;
1271
1272 /* Only -1 for all the filters denotes not in vlan mode
1273 * so we have to go through all the list in order to make sure
1274 */
1275 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1276 if (f->vlan >= 0 || vsi->info.pvid)
1277 return true;
1278 }
1279
1280 return false;
1281 }
1282
1283 /**
1284 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1285 * @vsi: the VSI to be searched
1286 * @macaddr: the mac address to be filtered
1287 * @is_vf: true if it is a VF
1288 * @is_netdev: true if it is a netdev
1289 *
1290 * Goes through all the macvlan filters and adds a
1291 * macvlan filter for each unique vlan that already exists
1292 *
1293 * Returns first filter found on success, else NULL
1294 **/
1295 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1296 bool is_vf, bool is_netdev)
1297 {
1298 struct i40e_mac_filter *f;
1299
1300 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1301 if (vsi->info.pvid)
1302 f->vlan = le16_to_cpu(vsi->info.pvid);
1303 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1304 is_vf, is_netdev)) {
1305 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1306 is_vf, is_netdev))
1307 return NULL;
1308 }
1309 }
1310
1311 return list_first_entry_or_null(&vsi->mac_filter_list,
1312 struct i40e_mac_filter, list);
1313 }
1314
1315 /**
1316 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1317 * @vsi: the PF Main VSI - inappropriate for any other VSI
1318 * @macaddr: the MAC address
1319 *
1320 * Some older firmware configurations set up a default promiscuous VLAN
1321 * filter that needs to be removed.
1322 **/
1323 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1324 {
1325 struct i40e_aqc_remove_macvlan_element_data element;
1326 struct i40e_pf *pf = vsi->back;
1327 i40e_status ret;
1328
1329 /* Only appropriate for the PF main VSI */
1330 if (vsi->type != I40E_VSI_MAIN)
1331 return -EINVAL;
1332
1333 memset(&element, 0, sizeof(element));
1334 ether_addr_copy(element.mac_addr, macaddr);
1335 element.vlan_tag = 0;
1336 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1337 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1338 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1339 if (ret)
1340 return -ENOENT;
1341
1342 return 0;
1343 }
1344
1345 /**
1346 * i40e_add_filter - Add a mac/vlan filter to the VSI
1347 * @vsi: the VSI to be searched
1348 * @macaddr: the MAC address
1349 * @vlan: the vlan
1350 * @is_vf: make sure its a VF filter, else doesn't matter
1351 * @is_netdev: make sure its a netdev filter, else doesn't matter
1352 *
1353 * Returns ptr to the filter object or NULL when no memory available.
1354 **/
1355 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1356 u8 *macaddr, s16 vlan,
1357 bool is_vf, bool is_netdev)
1358 {
1359 struct i40e_mac_filter *f;
1360
1361 if (!vsi || !macaddr)
1362 return NULL;
1363
1364 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1365 if (!f) {
1366 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1367 if (!f)
1368 goto add_filter_out;
1369
1370 ether_addr_copy(f->macaddr, macaddr);
1371 f->vlan = vlan;
1372 f->changed = true;
1373
1374 INIT_LIST_HEAD(&f->list);
1375 list_add(&f->list, &vsi->mac_filter_list);
1376 }
1377
1378 /* increment counter and add a new flag if needed */
1379 if (is_vf) {
1380 if (!f->is_vf) {
1381 f->is_vf = true;
1382 f->counter++;
1383 }
1384 } else if (is_netdev) {
1385 if (!f->is_netdev) {
1386 f->is_netdev = true;
1387 f->counter++;
1388 }
1389 } else {
1390 f->counter++;
1391 }
1392
1393 /* changed tells sync_filters_subtask to
1394 * push the filter down to the firmware
1395 */
1396 if (f->changed) {
1397 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1398 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1399 }
1400
1401 add_filter_out:
1402 return f;
1403 }
1404
1405 /**
1406 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1407 * @vsi: the VSI to be searched
1408 * @macaddr: the MAC address
1409 * @vlan: the vlan
1410 * @is_vf: make sure it's a VF filter, else doesn't matter
1411 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1412 **/
1413 void i40e_del_filter(struct i40e_vsi *vsi,
1414 u8 *macaddr, s16 vlan,
1415 bool is_vf, bool is_netdev)
1416 {
1417 struct i40e_mac_filter *f;
1418
1419 if (!vsi || !macaddr)
1420 return;
1421
1422 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1423 if (!f || f->counter == 0)
1424 return;
1425
1426 if (is_vf) {
1427 if (f->is_vf) {
1428 f->is_vf = false;
1429 f->counter--;
1430 }
1431 } else if (is_netdev) {
1432 if (f->is_netdev) {
1433 f->is_netdev = false;
1434 f->counter--;
1435 }
1436 } else {
1437 /* make sure we don't remove a filter in use by VF or netdev */
1438 int min_f = 0;
1439 min_f += (f->is_vf ? 1 : 0);
1440 min_f += (f->is_netdev ? 1 : 0);
1441
1442 if (f->counter > min_f)
1443 f->counter--;
1444 }
1445
1446 /* counter == 0 tells sync_filters_subtask to
1447 * remove the filter from the firmware's list
1448 */
1449 if (f->counter == 0) {
1450 f->changed = true;
1451 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1452 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1453 }
1454 }
1455
1456 /**
1457 * i40e_set_mac - NDO callback to set mac address
1458 * @netdev: network interface device structure
1459 * @p: pointer to an address structure
1460 *
1461 * Returns 0 on success, negative on failure
1462 **/
1463 #ifdef I40E_FCOE
1464 int i40e_set_mac(struct net_device *netdev, void *p)
1465 #else
1466 static int i40e_set_mac(struct net_device *netdev, void *p)
1467 #endif
1468 {
1469 struct i40e_netdev_priv *np = netdev_priv(netdev);
1470 struct i40e_vsi *vsi = np->vsi;
1471 struct i40e_pf *pf = vsi->back;
1472 struct i40e_hw *hw = &pf->hw;
1473 struct sockaddr *addr = p;
1474 struct i40e_mac_filter *f;
1475
1476 if (!is_valid_ether_addr(addr->sa_data))
1477 return -EADDRNOTAVAIL;
1478
1479 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1480 netdev_info(netdev, "already using mac address %pM\n",
1481 addr->sa_data);
1482 return 0;
1483 }
1484
1485 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1486 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1487 return -EADDRNOTAVAIL;
1488
1489 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1490 netdev_info(netdev, "returning to hw mac address %pM\n",
1491 hw->mac.addr);
1492 else
1493 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1494
1495 if (vsi->type == I40E_VSI_MAIN) {
1496 i40e_status ret;
1497 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1498 I40E_AQC_WRITE_TYPE_LAA_WOL,
1499 addr->sa_data, NULL);
1500 if (ret) {
1501 netdev_info(netdev,
1502 "Addr change for Main VSI failed: %d\n",
1503 ret);
1504 return -EADDRNOTAVAIL;
1505 }
1506 }
1507
1508 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1509 struct i40e_aqc_remove_macvlan_element_data element;
1510
1511 memset(&element, 0, sizeof(element));
1512 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1513 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1514 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1515 } else {
1516 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1517 false, false);
1518 }
1519
1520 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1521 struct i40e_aqc_add_macvlan_element_data element;
1522
1523 memset(&element, 0, sizeof(element));
1524 ether_addr_copy(element.mac_addr, hw->mac.addr);
1525 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1526 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1527 } else {
1528 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1529 false, false);
1530 if (f)
1531 f->is_laa = true;
1532 }
1533
1534 i40e_sync_vsi_filters(vsi, false);
1535 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1536
1537 return 0;
1538 }
1539
1540 /**
1541 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1542 * @vsi: the VSI being setup
1543 * @ctxt: VSI context structure
1544 * @enabled_tc: Enabled TCs bitmap
1545 * @is_add: True if called before Add VSI
1546 *
1547 * Setup VSI queue mapping for enabled traffic classes.
1548 **/
1549 #ifdef I40E_FCOE
1550 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1551 struct i40e_vsi_context *ctxt,
1552 u8 enabled_tc,
1553 bool is_add)
1554 #else
1555 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1556 struct i40e_vsi_context *ctxt,
1557 u8 enabled_tc,
1558 bool is_add)
1559 #endif
1560 {
1561 struct i40e_pf *pf = vsi->back;
1562 u16 sections = 0;
1563 u8 netdev_tc = 0;
1564 u16 numtc = 0;
1565 u16 qcount;
1566 u8 offset;
1567 u16 qmap;
1568 int i;
1569 u16 num_tc_qps = 0;
1570
1571 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1572 offset = 0;
1573
1574 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1575 /* Find numtc from enabled TC bitmap */
1576 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1577 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1578 numtc++;
1579 }
1580 if (!numtc) {
1581 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1582 numtc = 1;
1583 }
1584 } else {
1585 /* At least TC0 is enabled in case of non-DCB case */
1586 numtc = 1;
1587 }
1588
1589 vsi->tc_config.numtc = numtc;
1590 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1591 /* Number of queues per enabled TC */
1592 /* In MFP case we can have a much lower count of MSIx
1593 * vectors available and so we need to lower the used
1594 * q count.
1595 */
1596 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1597 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1598 else
1599 qcount = vsi->alloc_queue_pairs;
1600 num_tc_qps = qcount / numtc;
1601 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1602
1603 /* Setup queue offset/count for all TCs for given VSI */
1604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1605 /* See if the given TC is enabled for the given VSI */
1606 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1607 /* TC is enabled */
1608 int pow, num_qps;
1609
1610 switch (vsi->type) {
1611 case I40E_VSI_MAIN:
1612 qcount = min_t(int, pf->rss_size, num_tc_qps);
1613 break;
1614 #ifdef I40E_FCOE
1615 case I40E_VSI_FCOE:
1616 qcount = num_tc_qps;
1617 break;
1618 #endif
1619 case I40E_VSI_FDIR:
1620 case I40E_VSI_SRIOV:
1621 case I40E_VSI_VMDQ2:
1622 default:
1623 qcount = num_tc_qps;
1624 WARN_ON(i != 0);
1625 break;
1626 }
1627 vsi->tc_config.tc_info[i].qoffset = offset;
1628 vsi->tc_config.tc_info[i].qcount = qcount;
1629
1630 /* find the next higher power-of-2 of num queue pairs */
1631 num_qps = qcount;
1632 pow = 0;
1633 while (num_qps && (BIT_ULL(pow) < qcount)) {
1634 pow++;
1635 num_qps >>= 1;
1636 }
1637
1638 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1639 qmap =
1640 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1641 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1642
1643 offset += qcount;
1644 } else {
1645 /* TC is not enabled so set the offset to
1646 * default queue and allocate one queue
1647 * for the given TC.
1648 */
1649 vsi->tc_config.tc_info[i].qoffset = 0;
1650 vsi->tc_config.tc_info[i].qcount = 1;
1651 vsi->tc_config.tc_info[i].netdev_tc = 0;
1652
1653 qmap = 0;
1654 }
1655 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1656 }
1657
1658 /* Set actual Tx/Rx queue pairs */
1659 vsi->num_queue_pairs = offset;
1660 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1661 if (vsi->req_queue_pairs > 0)
1662 vsi->num_queue_pairs = vsi->req_queue_pairs;
1663 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1664 vsi->num_queue_pairs = pf->num_lan_msix;
1665 }
1666
1667 /* Scheduler section valid can only be set for ADD VSI */
1668 if (is_add) {
1669 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1670
1671 ctxt->info.up_enable_bits = enabled_tc;
1672 }
1673 if (vsi->type == I40E_VSI_SRIOV) {
1674 ctxt->info.mapping_flags |=
1675 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1676 for (i = 0; i < vsi->num_queue_pairs; i++)
1677 ctxt->info.queue_mapping[i] =
1678 cpu_to_le16(vsi->base_queue + i);
1679 } else {
1680 ctxt->info.mapping_flags |=
1681 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1682 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1683 }
1684 ctxt->info.valid_sections |= cpu_to_le16(sections);
1685 }
1686
1687 /**
1688 * i40e_set_rx_mode - NDO callback to set the netdev filters
1689 * @netdev: network interface device structure
1690 **/
1691 #ifdef I40E_FCOE
1692 void i40e_set_rx_mode(struct net_device *netdev)
1693 #else
1694 static void i40e_set_rx_mode(struct net_device *netdev)
1695 #endif
1696 {
1697 struct i40e_netdev_priv *np = netdev_priv(netdev);
1698 struct i40e_mac_filter *f, *ftmp;
1699 struct i40e_vsi *vsi = np->vsi;
1700 struct netdev_hw_addr *uca;
1701 struct netdev_hw_addr *mca;
1702 struct netdev_hw_addr *ha;
1703
1704 /* add addr if not already in the filter list */
1705 netdev_for_each_uc_addr(uca, netdev) {
1706 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1707 if (i40e_is_vsi_in_vlan(vsi))
1708 i40e_put_mac_in_vlan(vsi, uca->addr,
1709 false, true);
1710 else
1711 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1712 false, true);
1713 }
1714 }
1715
1716 netdev_for_each_mc_addr(mca, netdev) {
1717 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1718 if (i40e_is_vsi_in_vlan(vsi))
1719 i40e_put_mac_in_vlan(vsi, mca->addr,
1720 false, true);
1721 else
1722 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1723 false, true);
1724 }
1725 }
1726
1727 /* remove filter if not in netdev list */
1728 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1729 bool found = false;
1730
1731 if (!f->is_netdev)
1732 continue;
1733
1734 if (is_multicast_ether_addr(f->macaddr)) {
1735 netdev_for_each_mc_addr(mca, netdev) {
1736 if (ether_addr_equal(mca->addr, f->macaddr)) {
1737 found = true;
1738 break;
1739 }
1740 }
1741 } else {
1742 netdev_for_each_uc_addr(uca, netdev) {
1743 if (ether_addr_equal(uca->addr, f->macaddr)) {
1744 found = true;
1745 break;
1746 }
1747 }
1748
1749 for_each_dev_addr(netdev, ha) {
1750 if (ether_addr_equal(ha->addr, f->macaddr)) {
1751 found = true;
1752 break;
1753 }
1754 }
1755 }
1756 if (!found)
1757 i40e_del_filter(
1758 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1759 }
1760
1761 /* check for other flag changes */
1762 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1763 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1764 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1765 }
1766 }
1767
1768 /**
1769 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1770 * @vsi: ptr to the VSI
1771 * @grab_rtnl: whether RTNL needs to be grabbed
1772 *
1773 * Push any outstanding VSI filter changes through the AdminQ.
1774 *
1775 * Returns 0 or error value
1776 **/
1777 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1778 {
1779 struct i40e_mac_filter *f, *ftmp;
1780 bool promisc_forced_on = false;
1781 bool add_happened = false;
1782 int filter_list_len = 0;
1783 u32 changed_flags = 0;
1784 i40e_status ret = 0;
1785 struct i40e_pf *pf;
1786 int num_add = 0;
1787 int num_del = 0;
1788 int aq_err = 0;
1789 u16 cmd_flags;
1790
1791 /* empty array typed pointers, kcalloc later */
1792 struct i40e_aqc_add_macvlan_element_data *add_list;
1793 struct i40e_aqc_remove_macvlan_element_data *del_list;
1794
1795 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1796 usleep_range(1000, 2000);
1797 pf = vsi->back;
1798
1799 if (vsi->netdev) {
1800 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1801 vsi->current_netdev_flags = vsi->netdev->flags;
1802 }
1803
1804 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1805 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1806
1807 filter_list_len = pf->hw.aq.asq_buf_size /
1808 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1809 del_list = kcalloc(filter_list_len,
1810 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1811 GFP_KERNEL);
1812 if (!del_list)
1813 return -ENOMEM;
1814
1815 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1816 if (!f->changed)
1817 continue;
1818
1819 if (f->counter != 0)
1820 continue;
1821 f->changed = false;
1822 cmd_flags = 0;
1823
1824 /* add to delete list */
1825 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1826 del_list[num_del].vlan_tag =
1827 cpu_to_le16((u16)(f->vlan ==
1828 I40E_VLAN_ANY ? 0 : f->vlan));
1829
1830 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1831 del_list[num_del].flags = cmd_flags;
1832 num_del++;
1833
1834 /* unlink from filter list */
1835 list_del(&f->list);
1836 kfree(f);
1837
1838 /* flush a full buffer */
1839 if (num_del == filter_list_len) {
1840 ret = i40e_aq_remove_macvlan(&pf->hw,
1841 vsi->seid, del_list, num_del,
1842 NULL);
1843 aq_err = pf->hw.aq.asq_last_status;
1844 num_del = 0;
1845 memset(del_list, 0, sizeof(*del_list));
1846
1847 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1848 dev_info(&pf->pdev->dev,
1849 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1850 i40e_stat_str(&pf->hw, ret),
1851 i40e_aq_str(&pf->hw, aq_err));
1852 }
1853 }
1854 if (num_del) {
1855 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1856 del_list, num_del, NULL);
1857 aq_err = pf->hw.aq.asq_last_status;
1858 num_del = 0;
1859
1860 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1861 dev_info(&pf->pdev->dev,
1862 "ignoring delete macvlan error, err %s aq_err %s\n",
1863 i40e_stat_str(&pf->hw, ret),
1864 i40e_aq_str(&pf->hw, aq_err));
1865 }
1866
1867 kfree(del_list);
1868 del_list = NULL;
1869
1870 /* do all the adds now */
1871 filter_list_len = pf->hw.aq.asq_buf_size /
1872 sizeof(struct i40e_aqc_add_macvlan_element_data),
1873 add_list = kcalloc(filter_list_len,
1874 sizeof(struct i40e_aqc_add_macvlan_element_data),
1875 GFP_KERNEL);
1876 if (!add_list)
1877 return -ENOMEM;
1878
1879 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1880 if (!f->changed)
1881 continue;
1882
1883 if (f->counter == 0)
1884 continue;
1885 f->changed = false;
1886 add_happened = true;
1887 cmd_flags = 0;
1888
1889 /* add to add array */
1890 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1891 add_list[num_add].vlan_tag =
1892 cpu_to_le16(
1893 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1894 add_list[num_add].queue_number = 0;
1895
1896 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1897 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1898 num_add++;
1899
1900 /* flush a full buffer */
1901 if (num_add == filter_list_len) {
1902 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1903 add_list, num_add,
1904 NULL);
1905 aq_err = pf->hw.aq.asq_last_status;
1906 num_add = 0;
1907
1908 if (ret)
1909 break;
1910 memset(add_list, 0, sizeof(*add_list));
1911 }
1912 }
1913 if (num_add) {
1914 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1915 add_list, num_add, NULL);
1916 aq_err = pf->hw.aq.asq_last_status;
1917 num_add = 0;
1918 }
1919 kfree(add_list);
1920 add_list = NULL;
1921
1922 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1923 dev_info(&pf->pdev->dev,
1924 "add filter failed, err %s aq_err %s\n",
1925 i40e_stat_str(&pf->hw, ret),
1926 i40e_aq_str(&pf->hw, aq_err));
1927 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1928 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1929 &vsi->state)) {
1930 promisc_forced_on = true;
1931 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1932 &vsi->state);
1933 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1934 }
1935 }
1936 }
1937
1938 /* check for changes in promiscuous modes */
1939 if (changed_flags & IFF_ALLMULTI) {
1940 bool cur_multipromisc;
1941 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1942 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1943 vsi->seid,
1944 cur_multipromisc,
1945 NULL);
1946 if (ret)
1947 dev_info(&pf->pdev->dev,
1948 "set multi promisc failed, err %s aq_err %s\n",
1949 i40e_stat_str(&pf->hw, ret),
1950 i40e_aq_str(&pf->hw,
1951 pf->hw.aq.asq_last_status));
1952 }
1953 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1954 bool cur_promisc;
1955 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1956 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1957 &vsi->state));
1958 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1959 /* set defport ON for Main VSI instead of true promisc
1960 * this way we will get all unicast/multicast and VLAN
1961 * promisc behavior but will not get VF or VMDq traffic
1962 * replicated on the Main VSI.
1963 */
1964 if (pf->cur_promisc != cur_promisc) {
1965 pf->cur_promisc = cur_promisc;
1966 if (grab_rtnl)
1967 i40e_do_reset_safe(pf,
1968 BIT(__I40E_PF_RESET_REQUESTED));
1969 else
1970 i40e_do_reset(pf,
1971 BIT(__I40E_PF_RESET_REQUESTED));
1972 }
1973 } else {
1974 ret = i40e_aq_set_vsi_unicast_promiscuous(
1975 &vsi->back->hw,
1976 vsi->seid,
1977 cur_promisc, NULL);
1978 if (ret)
1979 dev_info(&pf->pdev->dev,
1980 "set unicast promisc failed, err %d, aq_err %d\n",
1981 ret, pf->hw.aq.asq_last_status);
1982 ret = i40e_aq_set_vsi_multicast_promiscuous(
1983 &vsi->back->hw,
1984 vsi->seid,
1985 cur_promisc, NULL);
1986 if (ret)
1987 dev_info(&pf->pdev->dev,
1988 "set multicast promisc failed, err %d, aq_err %d\n",
1989 ret, pf->hw.aq.asq_last_status);
1990 }
1991 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1992 vsi->seid,
1993 cur_promisc, NULL);
1994 if (ret)
1995 dev_info(&pf->pdev->dev,
1996 "set brdcast promisc failed, err %s, aq_err %s\n",
1997 i40e_stat_str(&pf->hw, ret),
1998 i40e_aq_str(&pf->hw,
1999 pf->hw.aq.asq_last_status));
2000 }
2001
2002 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2003 return 0;
2004 }
2005
2006 /**
2007 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2008 * @pf: board private structure
2009 **/
2010 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2011 {
2012 int v;
2013
2014 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2015 return;
2016 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2017
2018 for (v = 0; v < pf->num_alloc_vsi; v++) {
2019 if (pf->vsi[v] &&
2020 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2021 i40e_sync_vsi_filters(pf->vsi[v], true);
2022 }
2023 }
2024
2025 /**
2026 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2027 * @netdev: network interface device structure
2028 * @new_mtu: new value for maximum frame size
2029 *
2030 * Returns 0 on success, negative on failure
2031 **/
2032 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2033 {
2034 struct i40e_netdev_priv *np = netdev_priv(netdev);
2035 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2036 struct i40e_vsi *vsi = np->vsi;
2037
2038 /* MTU < 68 is an error and causes problems on some kernels */
2039 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2040 return -EINVAL;
2041
2042 netdev_info(netdev, "changing MTU from %d to %d\n",
2043 netdev->mtu, new_mtu);
2044 netdev->mtu = new_mtu;
2045 if (netif_running(netdev))
2046 i40e_vsi_reinit_locked(vsi);
2047
2048 return 0;
2049 }
2050
2051 /**
2052 * i40e_ioctl - Access the hwtstamp interface
2053 * @netdev: network interface device structure
2054 * @ifr: interface request data
2055 * @cmd: ioctl command
2056 **/
2057 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2058 {
2059 struct i40e_netdev_priv *np = netdev_priv(netdev);
2060 struct i40e_pf *pf = np->vsi->back;
2061
2062 switch (cmd) {
2063 case SIOCGHWTSTAMP:
2064 return i40e_ptp_get_ts_config(pf, ifr);
2065 case SIOCSHWTSTAMP:
2066 return i40e_ptp_set_ts_config(pf, ifr);
2067 default:
2068 return -EOPNOTSUPP;
2069 }
2070 }
2071
2072 /**
2073 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2074 * @vsi: the vsi being adjusted
2075 **/
2076 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2077 {
2078 struct i40e_vsi_context ctxt;
2079 i40e_status ret;
2080
2081 if ((vsi->info.valid_sections &
2082 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2083 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2084 return; /* already enabled */
2085
2086 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2087 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2088 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2089
2090 ctxt.seid = vsi->seid;
2091 ctxt.info = vsi->info;
2092 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2093 if (ret) {
2094 dev_info(&vsi->back->pdev->dev,
2095 "update vlan stripping failed, err %s aq_err %s\n",
2096 i40e_stat_str(&vsi->back->hw, ret),
2097 i40e_aq_str(&vsi->back->hw,
2098 vsi->back->hw.aq.asq_last_status));
2099 }
2100 }
2101
2102 /**
2103 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2104 * @vsi: the vsi being adjusted
2105 **/
2106 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2107 {
2108 struct i40e_vsi_context ctxt;
2109 i40e_status ret;
2110
2111 if ((vsi->info.valid_sections &
2112 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2113 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2114 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2115 return; /* already disabled */
2116
2117 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2118 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2119 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2120
2121 ctxt.seid = vsi->seid;
2122 ctxt.info = vsi->info;
2123 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2124 if (ret) {
2125 dev_info(&vsi->back->pdev->dev,
2126 "update vlan stripping failed, err %s aq_err %s\n",
2127 i40e_stat_str(&vsi->back->hw, ret),
2128 i40e_aq_str(&vsi->back->hw,
2129 vsi->back->hw.aq.asq_last_status));
2130 }
2131 }
2132
2133 /**
2134 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2135 * @netdev: network interface to be adjusted
2136 * @features: netdev features to test if VLAN offload is enabled or not
2137 **/
2138 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2139 {
2140 struct i40e_netdev_priv *np = netdev_priv(netdev);
2141 struct i40e_vsi *vsi = np->vsi;
2142
2143 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2144 i40e_vlan_stripping_enable(vsi);
2145 else
2146 i40e_vlan_stripping_disable(vsi);
2147 }
2148
2149 /**
2150 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2151 * @vsi: the vsi being configured
2152 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2153 **/
2154 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2155 {
2156 struct i40e_mac_filter *f, *add_f;
2157 bool is_netdev, is_vf;
2158
2159 is_vf = (vsi->type == I40E_VSI_SRIOV);
2160 is_netdev = !!(vsi->netdev);
2161
2162 if (is_netdev) {
2163 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2164 is_vf, is_netdev);
2165 if (!add_f) {
2166 dev_info(&vsi->back->pdev->dev,
2167 "Could not add vlan filter %d for %pM\n",
2168 vid, vsi->netdev->dev_addr);
2169 return -ENOMEM;
2170 }
2171 }
2172
2173 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2174 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2175 if (!add_f) {
2176 dev_info(&vsi->back->pdev->dev,
2177 "Could not add vlan filter %d for %pM\n",
2178 vid, f->macaddr);
2179 return -ENOMEM;
2180 }
2181 }
2182
2183 /* Now if we add a vlan tag, make sure to check if it is the first
2184 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2185 * with 0, so we now accept untagged and specified tagged traffic
2186 * (and not any taged and untagged)
2187 */
2188 if (vid > 0) {
2189 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2190 I40E_VLAN_ANY,
2191 is_vf, is_netdev)) {
2192 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2193 I40E_VLAN_ANY, is_vf, is_netdev);
2194 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2195 is_vf, is_netdev);
2196 if (!add_f) {
2197 dev_info(&vsi->back->pdev->dev,
2198 "Could not add filter 0 for %pM\n",
2199 vsi->netdev->dev_addr);
2200 return -ENOMEM;
2201 }
2202 }
2203 }
2204
2205 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2206 if (vid > 0 && !vsi->info.pvid) {
2207 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2208 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2209 is_vf, is_netdev)) {
2210 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2211 is_vf, is_netdev);
2212 add_f = i40e_add_filter(vsi, f->macaddr,
2213 0, is_vf, is_netdev);
2214 if (!add_f) {
2215 dev_info(&vsi->back->pdev->dev,
2216 "Could not add filter 0 for %pM\n",
2217 f->macaddr);
2218 return -ENOMEM;
2219 }
2220 }
2221 }
2222 }
2223
2224 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2225 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2226 return 0;
2227
2228 return i40e_sync_vsi_filters(vsi, false);
2229 }
2230
2231 /**
2232 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2233 * @vsi: the vsi being configured
2234 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2235 *
2236 * Return: 0 on success or negative otherwise
2237 **/
2238 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2239 {
2240 struct net_device *netdev = vsi->netdev;
2241 struct i40e_mac_filter *f, *add_f;
2242 bool is_vf, is_netdev;
2243 int filter_count = 0;
2244
2245 is_vf = (vsi->type == I40E_VSI_SRIOV);
2246 is_netdev = !!(netdev);
2247
2248 if (is_netdev)
2249 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2250
2251 list_for_each_entry(f, &vsi->mac_filter_list, list)
2252 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2253
2254 /* go through all the filters for this VSI and if there is only
2255 * vid == 0 it means there are no other filters, so vid 0 must
2256 * be replaced with -1. This signifies that we should from now
2257 * on accept any traffic (with any tag present, or untagged)
2258 */
2259 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2260 if (is_netdev) {
2261 if (f->vlan &&
2262 ether_addr_equal(netdev->dev_addr, f->macaddr))
2263 filter_count++;
2264 }
2265
2266 if (f->vlan)
2267 filter_count++;
2268 }
2269
2270 if (!filter_count && is_netdev) {
2271 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2272 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2273 is_vf, is_netdev);
2274 if (!f) {
2275 dev_info(&vsi->back->pdev->dev,
2276 "Could not add filter %d for %pM\n",
2277 I40E_VLAN_ANY, netdev->dev_addr);
2278 return -ENOMEM;
2279 }
2280 }
2281
2282 if (!filter_count) {
2283 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2284 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2285 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2286 is_vf, is_netdev);
2287 if (!add_f) {
2288 dev_info(&vsi->back->pdev->dev,
2289 "Could not add filter %d for %pM\n",
2290 I40E_VLAN_ANY, f->macaddr);
2291 return -ENOMEM;
2292 }
2293 }
2294 }
2295
2296 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2297 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2298 return 0;
2299
2300 return i40e_sync_vsi_filters(vsi, false);
2301 }
2302
2303 /**
2304 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2305 * @netdev: network interface to be adjusted
2306 * @vid: vlan id to be added
2307 *
2308 * net_device_ops implementation for adding vlan ids
2309 **/
2310 #ifdef I40E_FCOE
2311 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2312 __always_unused __be16 proto, u16 vid)
2313 #else
2314 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2315 __always_unused __be16 proto, u16 vid)
2316 #endif
2317 {
2318 struct i40e_netdev_priv *np = netdev_priv(netdev);
2319 struct i40e_vsi *vsi = np->vsi;
2320 int ret = 0;
2321
2322 if (vid > 4095)
2323 return -EINVAL;
2324
2325 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2326
2327 /* If the network stack called us with vid = 0 then
2328 * it is asking to receive priority tagged packets with
2329 * vlan id 0. Our HW receives them by default when configured
2330 * to receive untagged packets so there is no need to add an
2331 * extra filter for vlan 0 tagged packets.
2332 */
2333 if (vid)
2334 ret = i40e_vsi_add_vlan(vsi, vid);
2335
2336 if (!ret && (vid < VLAN_N_VID))
2337 set_bit(vid, vsi->active_vlans);
2338
2339 return ret;
2340 }
2341
2342 /**
2343 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2344 * @netdev: network interface to be adjusted
2345 * @vid: vlan id to be removed
2346 *
2347 * net_device_ops implementation for removing vlan ids
2348 **/
2349 #ifdef I40E_FCOE
2350 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2351 __always_unused __be16 proto, u16 vid)
2352 #else
2353 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2354 __always_unused __be16 proto, u16 vid)
2355 #endif
2356 {
2357 struct i40e_netdev_priv *np = netdev_priv(netdev);
2358 struct i40e_vsi *vsi = np->vsi;
2359
2360 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2361
2362 /* return code is ignored as there is nothing a user
2363 * can do about failure to remove and a log message was
2364 * already printed from the other function
2365 */
2366 i40e_vsi_kill_vlan(vsi, vid);
2367
2368 clear_bit(vid, vsi->active_vlans);
2369
2370 return 0;
2371 }
2372
2373 /**
2374 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2375 * @vsi: the vsi being brought back up
2376 **/
2377 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2378 {
2379 u16 vid;
2380
2381 if (!vsi->netdev)
2382 return;
2383
2384 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2385
2386 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2387 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2388 vid);
2389 }
2390
2391 /**
2392 * i40e_vsi_add_pvid - Add pvid for the VSI
2393 * @vsi: the vsi being adjusted
2394 * @vid: the vlan id to set as a PVID
2395 **/
2396 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2397 {
2398 struct i40e_vsi_context ctxt;
2399 i40e_status ret;
2400
2401 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2402 vsi->info.pvid = cpu_to_le16(vid);
2403 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2404 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2405 I40E_AQ_VSI_PVLAN_EMOD_STR;
2406
2407 ctxt.seid = vsi->seid;
2408 ctxt.info = vsi->info;
2409 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2410 if (ret) {
2411 dev_info(&vsi->back->pdev->dev,
2412 "add pvid failed, err %s aq_err %s\n",
2413 i40e_stat_str(&vsi->back->hw, ret),
2414 i40e_aq_str(&vsi->back->hw,
2415 vsi->back->hw.aq.asq_last_status));
2416 return -ENOENT;
2417 }
2418
2419 return 0;
2420 }
2421
2422 /**
2423 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2424 * @vsi: the vsi being adjusted
2425 *
2426 * Just use the vlan_rx_register() service to put it back to normal
2427 **/
2428 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2429 {
2430 i40e_vlan_stripping_disable(vsi);
2431
2432 vsi->info.pvid = 0;
2433 }
2434
2435 /**
2436 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2437 * @vsi: ptr to the VSI
2438 *
2439 * If this function returns with an error, then it's possible one or
2440 * more of the rings is populated (while the rest are not). It is the
2441 * callers duty to clean those orphaned rings.
2442 *
2443 * Return 0 on success, negative on failure
2444 **/
2445 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2446 {
2447 int i, err = 0;
2448
2449 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2450 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2451
2452 return err;
2453 }
2454
2455 /**
2456 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2457 * @vsi: ptr to the VSI
2458 *
2459 * Free VSI's transmit software resources
2460 **/
2461 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2462 {
2463 int i;
2464
2465 if (!vsi->tx_rings)
2466 return;
2467
2468 for (i = 0; i < vsi->num_queue_pairs; i++)
2469 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2470 i40e_free_tx_resources(vsi->tx_rings[i]);
2471 }
2472
2473 /**
2474 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2475 * @vsi: ptr to the VSI
2476 *
2477 * If this function returns with an error, then it's possible one or
2478 * more of the rings is populated (while the rest are not). It is the
2479 * callers duty to clean those orphaned rings.
2480 *
2481 * Return 0 on success, negative on failure
2482 **/
2483 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2484 {
2485 int i, err = 0;
2486
2487 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2488 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2489 #ifdef I40E_FCOE
2490 i40e_fcoe_setup_ddp_resources(vsi);
2491 #endif
2492 return err;
2493 }
2494
2495 /**
2496 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2497 * @vsi: ptr to the VSI
2498 *
2499 * Free all receive software resources
2500 **/
2501 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2502 {
2503 int i;
2504
2505 if (!vsi->rx_rings)
2506 return;
2507
2508 for (i = 0; i < vsi->num_queue_pairs; i++)
2509 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2510 i40e_free_rx_resources(vsi->rx_rings[i]);
2511 #ifdef I40E_FCOE
2512 i40e_fcoe_free_ddp_resources(vsi);
2513 #endif
2514 }
2515
2516 /**
2517 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2518 * @ring: The Tx ring to configure
2519 *
2520 * This enables/disables XPS for a given Tx descriptor ring
2521 * based on the TCs enabled for the VSI that ring belongs to.
2522 **/
2523 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2524 {
2525 struct i40e_vsi *vsi = ring->vsi;
2526 cpumask_var_t mask;
2527
2528 if (!ring->q_vector || !ring->netdev)
2529 return;
2530
2531 /* Single TC mode enable XPS */
2532 if (vsi->tc_config.numtc <= 1) {
2533 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2534 netif_set_xps_queue(ring->netdev,
2535 &ring->q_vector->affinity_mask,
2536 ring->queue_index);
2537 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2538 /* Disable XPS to allow selection based on TC */
2539 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2540 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2541 free_cpumask_var(mask);
2542 }
2543 }
2544
2545 /**
2546 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2547 * @ring: The Tx ring to configure
2548 *
2549 * Configure the Tx descriptor ring in the HMC context.
2550 **/
2551 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2552 {
2553 struct i40e_vsi *vsi = ring->vsi;
2554 u16 pf_q = vsi->base_queue + ring->queue_index;
2555 struct i40e_hw *hw = &vsi->back->hw;
2556 struct i40e_hmc_obj_txq tx_ctx;
2557 i40e_status err = 0;
2558 u32 qtx_ctl = 0;
2559
2560 /* some ATR related tx ring init */
2561 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2562 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2563 ring->atr_count = 0;
2564 } else {
2565 ring->atr_sample_rate = 0;
2566 }
2567
2568 /* configure XPS */
2569 i40e_config_xps_tx_ring(ring);
2570
2571 /* clear the context structure first */
2572 memset(&tx_ctx, 0, sizeof(tx_ctx));
2573
2574 tx_ctx.new_context = 1;
2575 tx_ctx.base = (ring->dma / 128);
2576 tx_ctx.qlen = ring->count;
2577 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2578 I40E_FLAG_FD_ATR_ENABLED));
2579 #ifdef I40E_FCOE
2580 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2581 #endif
2582 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2583 /* FDIR VSI tx ring can still use RS bit and writebacks */
2584 if (vsi->type != I40E_VSI_FDIR)
2585 tx_ctx.head_wb_ena = 1;
2586 tx_ctx.head_wb_addr = ring->dma +
2587 (ring->count * sizeof(struct i40e_tx_desc));
2588
2589 /* As part of VSI creation/update, FW allocates certain
2590 * Tx arbitration queue sets for each TC enabled for
2591 * the VSI. The FW returns the handles to these queue
2592 * sets as part of the response buffer to Add VSI,
2593 * Update VSI, etc. AQ commands. It is expected that
2594 * these queue set handles be associated with the Tx
2595 * queues by the driver as part of the TX queue context
2596 * initialization. This has to be done regardless of
2597 * DCB as by default everything is mapped to TC0.
2598 */
2599 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2600 tx_ctx.rdylist_act = 0;
2601
2602 /* clear the context in the HMC */
2603 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2604 if (err) {
2605 dev_info(&vsi->back->pdev->dev,
2606 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2607 ring->queue_index, pf_q, err);
2608 return -ENOMEM;
2609 }
2610
2611 /* set the context in the HMC */
2612 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2613 if (err) {
2614 dev_info(&vsi->back->pdev->dev,
2615 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2616 ring->queue_index, pf_q, err);
2617 return -ENOMEM;
2618 }
2619
2620 /* Now associate this queue with this PCI function */
2621 if (vsi->type == I40E_VSI_VMDQ2) {
2622 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2623 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2624 I40E_QTX_CTL_VFVM_INDX_MASK;
2625 } else {
2626 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2627 }
2628
2629 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2630 I40E_QTX_CTL_PF_INDX_MASK);
2631 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2632 i40e_flush(hw);
2633
2634 /* cache tail off for easier writes later */
2635 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2636
2637 return 0;
2638 }
2639
2640 /**
2641 * i40e_configure_rx_ring - Configure a receive ring context
2642 * @ring: The Rx ring to configure
2643 *
2644 * Configure the Rx descriptor ring in the HMC context.
2645 **/
2646 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2647 {
2648 struct i40e_vsi *vsi = ring->vsi;
2649 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2650 u16 pf_q = vsi->base_queue + ring->queue_index;
2651 struct i40e_hw *hw = &vsi->back->hw;
2652 struct i40e_hmc_obj_rxq rx_ctx;
2653 i40e_status err = 0;
2654
2655 ring->state = 0;
2656
2657 /* clear the context structure first */
2658 memset(&rx_ctx, 0, sizeof(rx_ctx));
2659
2660 ring->rx_buf_len = vsi->rx_buf_len;
2661 ring->rx_hdr_len = vsi->rx_hdr_len;
2662
2663 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2664 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2665
2666 rx_ctx.base = (ring->dma / 128);
2667 rx_ctx.qlen = ring->count;
2668
2669 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2670 set_ring_16byte_desc_enabled(ring);
2671 rx_ctx.dsize = 0;
2672 } else {
2673 rx_ctx.dsize = 1;
2674 }
2675
2676 rx_ctx.dtype = vsi->dtype;
2677 if (vsi->dtype) {
2678 set_ring_ps_enabled(ring);
2679 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2680 I40E_RX_SPLIT_IP |
2681 I40E_RX_SPLIT_TCP_UDP |
2682 I40E_RX_SPLIT_SCTP;
2683 } else {
2684 rx_ctx.hsplit_0 = 0;
2685 }
2686
2687 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2688 (chain_len * ring->rx_buf_len));
2689 if (hw->revision_id == 0)
2690 rx_ctx.lrxqthresh = 0;
2691 else
2692 rx_ctx.lrxqthresh = 2;
2693 rx_ctx.crcstrip = 1;
2694 rx_ctx.l2tsel = 1;
2695 /* this controls whether VLAN is stripped from inner headers */
2696 rx_ctx.showiv = 0;
2697 #ifdef I40E_FCOE
2698 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2699 #endif
2700 /* set the prefena field to 1 because the manual says to */
2701 rx_ctx.prefena = 1;
2702
2703 /* clear the context in the HMC */
2704 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2705 if (err) {
2706 dev_info(&vsi->back->pdev->dev,
2707 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2708 ring->queue_index, pf_q, err);
2709 return -ENOMEM;
2710 }
2711
2712 /* set the context in the HMC */
2713 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2714 if (err) {
2715 dev_info(&vsi->back->pdev->dev,
2716 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2717 ring->queue_index, pf_q, err);
2718 return -ENOMEM;
2719 }
2720
2721 /* cache tail for quicker writes, and clear the reg before use */
2722 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2723 writel(0, ring->tail);
2724
2725 if (ring_is_ps_enabled(ring)) {
2726 i40e_alloc_rx_headers(ring);
2727 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2728 } else {
2729 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2730 }
2731
2732 return 0;
2733 }
2734
2735 /**
2736 * i40e_vsi_configure_tx - Configure the VSI for Tx
2737 * @vsi: VSI structure describing this set of rings and resources
2738 *
2739 * Configure the Tx VSI for operation.
2740 **/
2741 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2742 {
2743 int err = 0;
2744 u16 i;
2745
2746 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2747 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2748
2749 return err;
2750 }
2751
2752 /**
2753 * i40e_vsi_configure_rx - Configure the VSI for Rx
2754 * @vsi: the VSI being configured
2755 *
2756 * Configure the Rx VSI for operation.
2757 **/
2758 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2759 {
2760 int err = 0;
2761 u16 i;
2762
2763 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2764 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2765 + ETH_FCS_LEN + VLAN_HLEN;
2766 else
2767 vsi->max_frame = I40E_RXBUFFER_2048;
2768
2769 /* figure out correct receive buffer length */
2770 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2771 I40E_FLAG_RX_PS_ENABLED)) {
2772 case I40E_FLAG_RX_1BUF_ENABLED:
2773 vsi->rx_hdr_len = 0;
2774 vsi->rx_buf_len = vsi->max_frame;
2775 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2776 break;
2777 case I40E_FLAG_RX_PS_ENABLED:
2778 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2779 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2780 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2781 break;
2782 default:
2783 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2784 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2785 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2786 break;
2787 }
2788
2789 #ifdef I40E_FCOE
2790 /* setup rx buffer for FCoE */
2791 if ((vsi->type == I40E_VSI_FCOE) &&
2792 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2793 vsi->rx_hdr_len = 0;
2794 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2795 vsi->max_frame = I40E_RXBUFFER_3072;
2796 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2797 }
2798
2799 #endif /* I40E_FCOE */
2800 /* round up for the chip's needs */
2801 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2802 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2803 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2804 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2805
2806 /* set up individual rings */
2807 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2808 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2809
2810 return err;
2811 }
2812
2813 /**
2814 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2815 * @vsi: ptr to the VSI
2816 **/
2817 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2818 {
2819 struct i40e_ring *tx_ring, *rx_ring;
2820 u16 qoffset, qcount;
2821 int i, n;
2822
2823 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2824 /* Reset the TC information */
2825 for (i = 0; i < vsi->num_queue_pairs; i++) {
2826 rx_ring = vsi->rx_rings[i];
2827 tx_ring = vsi->tx_rings[i];
2828 rx_ring->dcb_tc = 0;
2829 tx_ring->dcb_tc = 0;
2830 }
2831 }
2832
2833 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2834 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2835 continue;
2836
2837 qoffset = vsi->tc_config.tc_info[n].qoffset;
2838 qcount = vsi->tc_config.tc_info[n].qcount;
2839 for (i = qoffset; i < (qoffset + qcount); i++) {
2840 rx_ring = vsi->rx_rings[i];
2841 tx_ring = vsi->tx_rings[i];
2842 rx_ring->dcb_tc = n;
2843 tx_ring->dcb_tc = n;
2844 }
2845 }
2846 }
2847
2848 /**
2849 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2850 * @vsi: ptr to the VSI
2851 **/
2852 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2853 {
2854 if (vsi->netdev)
2855 i40e_set_rx_mode(vsi->netdev);
2856 }
2857
2858 /**
2859 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2860 * @vsi: Pointer to the targeted VSI
2861 *
2862 * This function replays the hlist on the hw where all the SB Flow Director
2863 * filters were saved.
2864 **/
2865 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2866 {
2867 struct i40e_fdir_filter *filter;
2868 struct i40e_pf *pf = vsi->back;
2869 struct hlist_node *node;
2870
2871 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2872 return;
2873
2874 hlist_for_each_entry_safe(filter, node,
2875 &pf->fdir_filter_list, fdir_node) {
2876 i40e_add_del_fdir(vsi, filter, true);
2877 }
2878 }
2879
2880 /**
2881 * i40e_vsi_configure - Set up the VSI for action
2882 * @vsi: the VSI being configured
2883 **/
2884 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2885 {
2886 int err;
2887
2888 i40e_set_vsi_rx_mode(vsi);
2889 i40e_restore_vlan(vsi);
2890 i40e_vsi_config_dcb_rings(vsi);
2891 err = i40e_vsi_configure_tx(vsi);
2892 if (!err)
2893 err = i40e_vsi_configure_rx(vsi);
2894
2895 return err;
2896 }
2897
2898 /**
2899 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2900 * @vsi: the VSI being configured
2901 **/
2902 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2903 {
2904 struct i40e_pf *pf = vsi->back;
2905 struct i40e_q_vector *q_vector;
2906 struct i40e_hw *hw = &pf->hw;
2907 u16 vector;
2908 int i, q;
2909 u32 val;
2910 u32 qp;
2911
2912 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2913 * and PFINT_LNKLSTn registers, e.g.:
2914 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2915 */
2916 qp = vsi->base_queue;
2917 vector = vsi->base_vector;
2918 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2919 q_vector = vsi->q_vectors[i];
2920 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2921 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2922 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2923 q_vector->rx.itr);
2924 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2925 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2926 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2927 q_vector->tx.itr);
2928
2929 /* Linked list for the queuepairs assigned to this vector */
2930 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2931 for (q = 0; q < q_vector->num_ringpairs; q++) {
2932 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2933 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2934 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2935 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2936 (I40E_QUEUE_TYPE_TX
2937 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2938
2939 wr32(hw, I40E_QINT_RQCTL(qp), val);
2940
2941 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2942 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2943 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2944 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2945 (I40E_QUEUE_TYPE_RX
2946 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2947
2948 /* Terminate the linked list */
2949 if (q == (q_vector->num_ringpairs - 1))
2950 val |= (I40E_QUEUE_END_OF_LIST
2951 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2952
2953 wr32(hw, I40E_QINT_TQCTL(qp), val);
2954 qp++;
2955 }
2956 }
2957
2958 i40e_flush(hw);
2959 }
2960
2961 /**
2962 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2963 * @hw: ptr to the hardware info
2964 **/
2965 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2966 {
2967 struct i40e_hw *hw = &pf->hw;
2968 u32 val;
2969
2970 /* clear things first */
2971 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2972 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2973
2974 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2975 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2976 I40E_PFINT_ICR0_ENA_GRST_MASK |
2977 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2978 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2979 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2980 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2981 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2982
2983 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2984 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2985
2986 if (pf->flags & I40E_FLAG_PTP)
2987 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2988
2989 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2990
2991 /* SW_ITR_IDX = 0, but don't change INTENA */
2992 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2993 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2994
2995 /* OTHER_ITR_IDX = 0 */
2996 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2997 }
2998
2999 /**
3000 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3001 * @vsi: the VSI being configured
3002 **/
3003 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3004 {
3005 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3006 struct i40e_pf *pf = vsi->back;
3007 struct i40e_hw *hw = &pf->hw;
3008 u32 val;
3009
3010 /* set the ITR configuration */
3011 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3012 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3013 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3014 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3015 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3016 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3017
3018 i40e_enable_misc_int_causes(pf);
3019
3020 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3021 wr32(hw, I40E_PFINT_LNKLST0, 0);
3022
3023 /* Associate the queue pair to the vector and enable the queue int */
3024 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3025 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3026 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3027
3028 wr32(hw, I40E_QINT_RQCTL(0), val);
3029
3030 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3031 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3032 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3033
3034 wr32(hw, I40E_QINT_TQCTL(0), val);
3035 i40e_flush(hw);
3036 }
3037
3038 /**
3039 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3040 * @pf: board private structure
3041 **/
3042 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3043 {
3044 struct i40e_hw *hw = &pf->hw;
3045
3046 wr32(hw, I40E_PFINT_DYN_CTL0,
3047 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3048 i40e_flush(hw);
3049 }
3050
3051 /**
3052 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3053 * @pf: board private structure
3054 **/
3055 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3056 {
3057 struct i40e_hw *hw = &pf->hw;
3058 u32 val;
3059
3060 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3061 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3062 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3063
3064 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3065 i40e_flush(hw);
3066 }
3067
3068 /**
3069 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3070 * @vsi: pointer to a vsi
3071 * @vector: enable a particular Hw Interrupt vector, without base_vector
3072 **/
3073 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3074 {
3075 struct i40e_pf *pf = vsi->back;
3076 struct i40e_hw *hw = &pf->hw;
3077 u32 val;
3078
3079 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3080 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3081 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3082 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
3083 /* skip the flush */
3084 }
3085
3086 /**
3087 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3088 * @vsi: pointer to a vsi
3089 * @vector: disable a particular Hw Interrupt vector
3090 **/
3091 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3092 {
3093 struct i40e_pf *pf = vsi->back;
3094 struct i40e_hw *hw = &pf->hw;
3095 u32 val;
3096
3097 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3098 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3099 i40e_flush(hw);
3100 }
3101
3102 /**
3103 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3104 * @irq: interrupt number
3105 * @data: pointer to a q_vector
3106 **/
3107 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3108 {
3109 struct i40e_q_vector *q_vector = data;
3110
3111 if (!q_vector->tx.ring && !q_vector->rx.ring)
3112 return IRQ_HANDLED;
3113
3114 napi_schedule(&q_vector->napi);
3115
3116 return IRQ_HANDLED;
3117 }
3118
3119 /**
3120 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3121 * @vsi: the VSI being configured
3122 * @basename: name for the vector
3123 *
3124 * Allocates MSI-X vectors and requests interrupts from the kernel.
3125 **/
3126 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3127 {
3128 int q_vectors = vsi->num_q_vectors;
3129 struct i40e_pf *pf = vsi->back;
3130 int base = vsi->base_vector;
3131 int rx_int_idx = 0;
3132 int tx_int_idx = 0;
3133 int vector, err;
3134
3135 for (vector = 0; vector < q_vectors; vector++) {
3136 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3137
3138 if (q_vector->tx.ring && q_vector->rx.ring) {
3139 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3140 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3141 tx_int_idx++;
3142 } else if (q_vector->rx.ring) {
3143 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3144 "%s-%s-%d", basename, "rx", rx_int_idx++);
3145 } else if (q_vector->tx.ring) {
3146 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3147 "%s-%s-%d", basename, "tx", tx_int_idx++);
3148 } else {
3149 /* skip this unused q_vector */
3150 continue;
3151 }
3152 err = request_irq(pf->msix_entries[base + vector].vector,
3153 vsi->irq_handler,
3154 0,
3155 q_vector->name,
3156 q_vector);
3157 if (err) {
3158 dev_info(&pf->pdev->dev,
3159 "MSIX request_irq failed, error: %d\n", err);
3160 goto free_queue_irqs;
3161 }
3162 /* assign the mask for this irq */
3163 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3164 &q_vector->affinity_mask);
3165 }
3166
3167 vsi->irqs_ready = true;
3168 return 0;
3169
3170 free_queue_irqs:
3171 while (vector) {
3172 vector--;
3173 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3174 NULL);
3175 free_irq(pf->msix_entries[base + vector].vector,
3176 &(vsi->q_vectors[vector]));
3177 }
3178 return err;
3179 }
3180
3181 /**
3182 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3183 * @vsi: the VSI being un-configured
3184 **/
3185 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3186 {
3187 struct i40e_pf *pf = vsi->back;
3188 struct i40e_hw *hw = &pf->hw;
3189 int base = vsi->base_vector;
3190 int i;
3191
3192 for (i = 0; i < vsi->num_queue_pairs; i++) {
3193 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3194 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3195 }
3196
3197 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3198 for (i = vsi->base_vector;
3199 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3200 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3201
3202 i40e_flush(hw);
3203 for (i = 0; i < vsi->num_q_vectors; i++)
3204 synchronize_irq(pf->msix_entries[i + base].vector);
3205 } else {
3206 /* Legacy and MSI mode - this stops all interrupt handling */
3207 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3208 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3209 i40e_flush(hw);
3210 synchronize_irq(pf->pdev->irq);
3211 }
3212 }
3213
3214 /**
3215 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3216 * @vsi: the VSI being configured
3217 **/
3218 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3219 {
3220 struct i40e_pf *pf = vsi->back;
3221 int i;
3222
3223 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3224 for (i = 0; i < vsi->num_q_vectors; i++)
3225 i40e_irq_dynamic_enable(vsi, i);
3226 } else {
3227 i40e_irq_dynamic_enable_icr0(pf);
3228 }
3229
3230 i40e_flush(&pf->hw);
3231 return 0;
3232 }
3233
3234 /**
3235 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3236 * @pf: board private structure
3237 **/
3238 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3239 {
3240 /* Disable ICR 0 */
3241 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3242 i40e_flush(&pf->hw);
3243 }
3244
3245 /**
3246 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3247 * @irq: interrupt number
3248 * @data: pointer to a q_vector
3249 *
3250 * This is the handler used for all MSI/Legacy interrupts, and deals
3251 * with both queue and non-queue interrupts. This is also used in
3252 * MSIX mode to handle the non-queue interrupts.
3253 **/
3254 static irqreturn_t i40e_intr(int irq, void *data)
3255 {
3256 struct i40e_pf *pf = (struct i40e_pf *)data;
3257 struct i40e_hw *hw = &pf->hw;
3258 irqreturn_t ret = IRQ_NONE;
3259 u32 icr0, icr0_remaining;
3260 u32 val, ena_mask;
3261
3262 icr0 = rd32(hw, I40E_PFINT_ICR0);
3263 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3264
3265 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3266 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3267 goto enable_intr;
3268
3269 /* if interrupt but no bits showing, must be SWINT */
3270 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3271 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3272 pf->sw_int_count++;
3273
3274 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3275 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3276 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3277 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3278 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3279 }
3280
3281 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3282 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3283
3284 /* temporarily disable queue cause for NAPI processing */
3285 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3286 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3287 wr32(hw, I40E_QINT_RQCTL(0), qval);
3288
3289 qval = rd32(hw, I40E_QINT_TQCTL(0));
3290 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3291 wr32(hw, I40E_QINT_TQCTL(0), qval);
3292
3293 if (!test_bit(__I40E_DOWN, &pf->state))
3294 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3295 }
3296
3297 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3298 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3299 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3300 }
3301
3302 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3303 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3304 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3305 }
3306
3307 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3308 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3309 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3310 }
3311
3312 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3313 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3314 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3315 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3316 val = rd32(hw, I40E_GLGEN_RSTAT);
3317 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3318 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3319 if (val == I40E_RESET_CORER) {
3320 pf->corer_count++;
3321 } else if (val == I40E_RESET_GLOBR) {
3322 pf->globr_count++;
3323 } else if (val == I40E_RESET_EMPR) {
3324 pf->empr_count++;
3325 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3326 }
3327 }
3328
3329 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3330 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3331 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3332 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3333 rd32(hw, I40E_PFHMC_ERRORINFO),
3334 rd32(hw, I40E_PFHMC_ERRORDATA));
3335 }
3336
3337 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3338 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3339
3340 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3341 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3342 i40e_ptp_tx_hwtstamp(pf);
3343 }
3344 }
3345
3346 /* If a critical error is pending we have no choice but to reset the
3347 * device.
3348 * Report and mask out any remaining unexpected interrupts.
3349 */
3350 icr0_remaining = icr0 & ena_mask;
3351 if (icr0_remaining) {
3352 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3353 icr0_remaining);
3354 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3355 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3356 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3357 dev_info(&pf->pdev->dev, "device will be reset\n");
3358 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3359 i40e_service_event_schedule(pf);
3360 }
3361 ena_mask &= ~icr0_remaining;
3362 }
3363 ret = IRQ_HANDLED;
3364
3365 enable_intr:
3366 /* re-enable interrupt causes */
3367 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3368 if (!test_bit(__I40E_DOWN, &pf->state)) {
3369 i40e_service_event_schedule(pf);
3370 i40e_irq_dynamic_enable_icr0(pf);
3371 }
3372
3373 return ret;
3374 }
3375
3376 /**
3377 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3378 * @tx_ring: tx ring to clean
3379 * @budget: how many cleans we're allowed
3380 *
3381 * Returns true if there's any budget left (e.g. the clean is finished)
3382 **/
3383 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3384 {
3385 struct i40e_vsi *vsi = tx_ring->vsi;
3386 u16 i = tx_ring->next_to_clean;
3387 struct i40e_tx_buffer *tx_buf;
3388 struct i40e_tx_desc *tx_desc;
3389
3390 tx_buf = &tx_ring->tx_bi[i];
3391 tx_desc = I40E_TX_DESC(tx_ring, i);
3392 i -= tx_ring->count;
3393
3394 do {
3395 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3396
3397 /* if next_to_watch is not set then there is no work pending */
3398 if (!eop_desc)
3399 break;
3400
3401 /* prevent any other reads prior to eop_desc */
3402 read_barrier_depends();
3403
3404 /* if the descriptor isn't done, no work yet to do */
3405 if (!(eop_desc->cmd_type_offset_bsz &
3406 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3407 break;
3408
3409 /* clear next_to_watch to prevent false hangs */
3410 tx_buf->next_to_watch = NULL;
3411
3412 tx_desc->buffer_addr = 0;
3413 tx_desc->cmd_type_offset_bsz = 0;
3414 /* move past filter desc */
3415 tx_buf++;
3416 tx_desc++;
3417 i++;
3418 if (unlikely(!i)) {
3419 i -= tx_ring->count;
3420 tx_buf = tx_ring->tx_bi;
3421 tx_desc = I40E_TX_DESC(tx_ring, 0);
3422 }
3423 /* unmap skb header data */
3424 dma_unmap_single(tx_ring->dev,
3425 dma_unmap_addr(tx_buf, dma),
3426 dma_unmap_len(tx_buf, len),
3427 DMA_TO_DEVICE);
3428 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3429 kfree(tx_buf->raw_buf);
3430
3431 tx_buf->raw_buf = NULL;
3432 tx_buf->tx_flags = 0;
3433 tx_buf->next_to_watch = NULL;
3434 dma_unmap_len_set(tx_buf, len, 0);
3435 tx_desc->buffer_addr = 0;
3436 tx_desc->cmd_type_offset_bsz = 0;
3437
3438 /* move us past the eop_desc for start of next FD desc */
3439 tx_buf++;
3440 tx_desc++;
3441 i++;
3442 if (unlikely(!i)) {
3443 i -= tx_ring->count;
3444 tx_buf = tx_ring->tx_bi;
3445 tx_desc = I40E_TX_DESC(tx_ring, 0);
3446 }
3447
3448 /* update budget accounting */
3449 budget--;
3450 } while (likely(budget));
3451
3452 i += tx_ring->count;
3453 tx_ring->next_to_clean = i;
3454
3455 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3456 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3457 }
3458 return budget > 0;
3459 }
3460
3461 /**
3462 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3463 * @irq: interrupt number
3464 * @data: pointer to a q_vector
3465 **/
3466 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3467 {
3468 struct i40e_q_vector *q_vector = data;
3469 struct i40e_vsi *vsi;
3470
3471 if (!q_vector->tx.ring)
3472 return IRQ_HANDLED;
3473
3474 vsi = q_vector->tx.ring->vsi;
3475 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3476
3477 return IRQ_HANDLED;
3478 }
3479
3480 /**
3481 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3482 * @vsi: the VSI being configured
3483 * @v_idx: vector index
3484 * @qp_idx: queue pair index
3485 **/
3486 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3487 {
3488 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3489 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3490 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3491
3492 tx_ring->q_vector = q_vector;
3493 tx_ring->next = q_vector->tx.ring;
3494 q_vector->tx.ring = tx_ring;
3495 q_vector->tx.count++;
3496
3497 rx_ring->q_vector = q_vector;
3498 rx_ring->next = q_vector->rx.ring;
3499 q_vector->rx.ring = rx_ring;
3500 q_vector->rx.count++;
3501 }
3502
3503 /**
3504 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3505 * @vsi: the VSI being configured
3506 *
3507 * This function maps descriptor rings to the queue-specific vectors
3508 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3509 * one vector per queue pair, but on a constrained vector budget, we
3510 * group the queue pairs as "efficiently" as possible.
3511 **/
3512 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3513 {
3514 int qp_remaining = vsi->num_queue_pairs;
3515 int q_vectors = vsi->num_q_vectors;
3516 int num_ringpairs;
3517 int v_start = 0;
3518 int qp_idx = 0;
3519
3520 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3521 * group them so there are multiple queues per vector.
3522 * It is also important to go through all the vectors available to be
3523 * sure that if we don't use all the vectors, that the remaining vectors
3524 * are cleared. This is especially important when decreasing the
3525 * number of queues in use.
3526 */
3527 for (; v_start < q_vectors; v_start++) {
3528 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3529
3530 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3531
3532 q_vector->num_ringpairs = num_ringpairs;
3533
3534 q_vector->rx.count = 0;
3535 q_vector->tx.count = 0;
3536 q_vector->rx.ring = NULL;
3537 q_vector->tx.ring = NULL;
3538
3539 while (num_ringpairs--) {
3540 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3541 qp_idx++;
3542 qp_remaining--;
3543 }
3544 }
3545 }
3546
3547 /**
3548 * i40e_vsi_request_irq - Request IRQ from the OS
3549 * @vsi: the VSI being configured
3550 * @basename: name for the vector
3551 **/
3552 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3553 {
3554 struct i40e_pf *pf = vsi->back;
3555 int err;
3556
3557 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3558 err = i40e_vsi_request_irq_msix(vsi, basename);
3559 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3560 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3561 pf->int_name, pf);
3562 else
3563 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3564 pf->int_name, pf);
3565
3566 if (err)
3567 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3568
3569 return err;
3570 }
3571
3572 #ifdef CONFIG_NET_POLL_CONTROLLER
3573 /**
3574 * i40e_netpoll - A Polling 'interrupt'handler
3575 * @netdev: network interface device structure
3576 *
3577 * This is used by netconsole to send skbs without having to re-enable
3578 * interrupts. It's not called while the normal interrupt routine is executing.
3579 **/
3580 #ifdef I40E_FCOE
3581 void i40e_netpoll(struct net_device *netdev)
3582 #else
3583 static void i40e_netpoll(struct net_device *netdev)
3584 #endif
3585 {
3586 struct i40e_netdev_priv *np = netdev_priv(netdev);
3587 struct i40e_vsi *vsi = np->vsi;
3588 struct i40e_pf *pf = vsi->back;
3589 int i;
3590
3591 /* if interface is down do nothing */
3592 if (test_bit(__I40E_DOWN, &vsi->state))
3593 return;
3594
3595 pf->flags |= I40E_FLAG_IN_NETPOLL;
3596 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3597 for (i = 0; i < vsi->num_q_vectors; i++)
3598 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3599 } else {
3600 i40e_intr(pf->pdev->irq, netdev);
3601 }
3602 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3603 }
3604 #endif
3605
3606 /**
3607 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3608 * @pf: the PF being configured
3609 * @pf_q: the PF queue
3610 * @enable: enable or disable state of the queue
3611 *
3612 * This routine will wait for the given Tx queue of the PF to reach the
3613 * enabled or disabled state.
3614 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3615 * multiple retries; else will return 0 in case of success.
3616 **/
3617 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3618 {
3619 int i;
3620 u32 tx_reg;
3621
3622 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3623 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3624 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3625 break;
3626
3627 usleep_range(10, 20);
3628 }
3629 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3630 return -ETIMEDOUT;
3631
3632 return 0;
3633 }
3634
3635 /**
3636 * i40e_vsi_control_tx - Start or stop a VSI's rings
3637 * @vsi: the VSI being configured
3638 * @enable: start or stop the rings
3639 **/
3640 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3641 {
3642 struct i40e_pf *pf = vsi->back;
3643 struct i40e_hw *hw = &pf->hw;
3644 int i, j, pf_q, ret = 0;
3645 u32 tx_reg;
3646
3647 pf_q = vsi->base_queue;
3648 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3649
3650 /* warn the TX unit of coming changes */
3651 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3652 if (!enable)
3653 usleep_range(10, 20);
3654
3655 for (j = 0; j < 50; j++) {
3656 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3657 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3658 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3659 break;
3660 usleep_range(1000, 2000);
3661 }
3662 /* Skip if the queue is already in the requested state */
3663 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3664 continue;
3665
3666 /* turn on/off the queue */
3667 if (enable) {
3668 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3669 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3670 } else {
3671 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3672 }
3673
3674 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3675 /* No waiting for the Tx queue to disable */
3676 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3677 continue;
3678
3679 /* wait for the change to finish */
3680 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3681 if (ret) {
3682 dev_info(&pf->pdev->dev,
3683 "VSI seid %d Tx ring %d %sable timeout\n",
3684 vsi->seid, pf_q, (enable ? "en" : "dis"));
3685 break;
3686 }
3687 }
3688
3689 if (hw->revision_id == 0)
3690 mdelay(50);
3691 return ret;
3692 }
3693
3694 /**
3695 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3696 * @pf: the PF being configured
3697 * @pf_q: the PF queue
3698 * @enable: enable or disable state of the queue
3699 *
3700 * This routine will wait for the given Rx queue of the PF to reach the
3701 * enabled or disabled state.
3702 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3703 * multiple retries; else will return 0 in case of success.
3704 **/
3705 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3706 {
3707 int i;
3708 u32 rx_reg;
3709
3710 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3711 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3712 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3713 break;
3714
3715 usleep_range(10, 20);
3716 }
3717 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3718 return -ETIMEDOUT;
3719
3720 return 0;
3721 }
3722
3723 /**
3724 * i40e_vsi_control_rx - Start or stop a VSI's rings
3725 * @vsi: the VSI being configured
3726 * @enable: start or stop the rings
3727 **/
3728 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3729 {
3730 struct i40e_pf *pf = vsi->back;
3731 struct i40e_hw *hw = &pf->hw;
3732 int i, j, pf_q, ret = 0;
3733 u32 rx_reg;
3734
3735 pf_q = vsi->base_queue;
3736 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3737 for (j = 0; j < 50; j++) {
3738 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3739 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3740 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3741 break;
3742 usleep_range(1000, 2000);
3743 }
3744
3745 /* Skip if the queue is already in the requested state */
3746 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3747 continue;
3748
3749 /* turn on/off the queue */
3750 if (enable)
3751 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3752 else
3753 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3754 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3755
3756 /* wait for the change to finish */
3757 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3758 if (ret) {
3759 dev_info(&pf->pdev->dev,
3760 "VSI seid %d Rx ring %d %sable timeout\n",
3761 vsi->seid, pf_q, (enable ? "en" : "dis"));
3762 break;
3763 }
3764 }
3765
3766 return ret;
3767 }
3768
3769 /**
3770 * i40e_vsi_control_rings - Start or stop a VSI's rings
3771 * @vsi: the VSI being configured
3772 * @enable: start or stop the rings
3773 **/
3774 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3775 {
3776 int ret = 0;
3777
3778 /* do rx first for enable and last for disable */
3779 if (request) {
3780 ret = i40e_vsi_control_rx(vsi, request);
3781 if (ret)
3782 return ret;
3783 ret = i40e_vsi_control_tx(vsi, request);
3784 } else {
3785 /* Ignore return value, we need to shutdown whatever we can */
3786 i40e_vsi_control_tx(vsi, request);
3787 i40e_vsi_control_rx(vsi, request);
3788 }
3789
3790 return ret;
3791 }
3792
3793 /**
3794 * i40e_vsi_free_irq - Free the irq association with the OS
3795 * @vsi: the VSI being configured
3796 **/
3797 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3798 {
3799 struct i40e_pf *pf = vsi->back;
3800 struct i40e_hw *hw = &pf->hw;
3801 int base = vsi->base_vector;
3802 u32 val, qp;
3803 int i;
3804
3805 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3806 if (!vsi->q_vectors)
3807 return;
3808
3809 if (!vsi->irqs_ready)
3810 return;
3811
3812 vsi->irqs_ready = false;
3813 for (i = 0; i < vsi->num_q_vectors; i++) {
3814 u16 vector = i + base;
3815
3816 /* free only the irqs that were actually requested */
3817 if (!vsi->q_vectors[i] ||
3818 !vsi->q_vectors[i]->num_ringpairs)
3819 continue;
3820
3821 /* clear the affinity_mask in the IRQ descriptor */
3822 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3823 NULL);
3824 free_irq(pf->msix_entries[vector].vector,
3825 vsi->q_vectors[i]);
3826
3827 /* Tear down the interrupt queue link list
3828 *
3829 * We know that they come in pairs and always
3830 * the Rx first, then the Tx. To clear the
3831 * link list, stick the EOL value into the
3832 * next_q field of the registers.
3833 */
3834 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3835 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3836 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3837 val |= I40E_QUEUE_END_OF_LIST
3838 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3839 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3840
3841 while (qp != I40E_QUEUE_END_OF_LIST) {
3842 u32 next;
3843
3844 val = rd32(hw, I40E_QINT_RQCTL(qp));
3845
3846 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3847 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3848 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3849 I40E_QINT_RQCTL_INTEVENT_MASK);
3850
3851 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3852 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3853
3854 wr32(hw, I40E_QINT_RQCTL(qp), val);
3855
3856 val = rd32(hw, I40E_QINT_TQCTL(qp));
3857
3858 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3859 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3860
3861 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3862 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3863 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3864 I40E_QINT_TQCTL_INTEVENT_MASK);
3865
3866 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3867 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3868
3869 wr32(hw, I40E_QINT_TQCTL(qp), val);
3870 qp = next;
3871 }
3872 }
3873 } else {
3874 free_irq(pf->pdev->irq, pf);
3875
3876 val = rd32(hw, I40E_PFINT_LNKLST0);
3877 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3878 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3879 val |= I40E_QUEUE_END_OF_LIST
3880 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3881 wr32(hw, I40E_PFINT_LNKLST0, val);
3882
3883 val = rd32(hw, I40E_QINT_RQCTL(qp));
3884 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3885 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3886 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3887 I40E_QINT_RQCTL_INTEVENT_MASK);
3888
3889 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3890 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3891
3892 wr32(hw, I40E_QINT_RQCTL(qp), val);
3893
3894 val = rd32(hw, I40E_QINT_TQCTL(qp));
3895
3896 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3897 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3898 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3899 I40E_QINT_TQCTL_INTEVENT_MASK);
3900
3901 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3902 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3903
3904 wr32(hw, I40E_QINT_TQCTL(qp), val);
3905 }
3906 }
3907
3908 /**
3909 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3910 * @vsi: the VSI being configured
3911 * @v_idx: Index of vector to be freed
3912 *
3913 * This function frees the memory allocated to the q_vector. In addition if
3914 * NAPI is enabled it will delete any references to the NAPI struct prior
3915 * to freeing the q_vector.
3916 **/
3917 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3918 {
3919 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3920 struct i40e_ring *ring;
3921
3922 if (!q_vector)
3923 return;
3924
3925 /* disassociate q_vector from rings */
3926 i40e_for_each_ring(ring, q_vector->tx)
3927 ring->q_vector = NULL;
3928
3929 i40e_for_each_ring(ring, q_vector->rx)
3930 ring->q_vector = NULL;
3931
3932 /* only VSI w/ an associated netdev is set up w/ NAPI */
3933 if (vsi->netdev)
3934 netif_napi_del(&q_vector->napi);
3935
3936 vsi->q_vectors[v_idx] = NULL;
3937
3938 kfree_rcu(q_vector, rcu);
3939 }
3940
3941 /**
3942 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3943 * @vsi: the VSI being un-configured
3944 *
3945 * This frees the memory allocated to the q_vectors and
3946 * deletes references to the NAPI struct.
3947 **/
3948 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3949 {
3950 int v_idx;
3951
3952 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3953 i40e_free_q_vector(vsi, v_idx);
3954 }
3955
3956 /**
3957 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3958 * @pf: board private structure
3959 **/
3960 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3961 {
3962 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3963 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3964 pci_disable_msix(pf->pdev);
3965 kfree(pf->msix_entries);
3966 pf->msix_entries = NULL;
3967 kfree(pf->irq_pile);
3968 pf->irq_pile = NULL;
3969 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3970 pci_disable_msi(pf->pdev);
3971 }
3972 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3973 }
3974
3975 /**
3976 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3977 * @pf: board private structure
3978 *
3979 * We go through and clear interrupt specific resources and reset the structure
3980 * to pre-load conditions
3981 **/
3982 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3983 {
3984 int i;
3985
3986 i40e_stop_misc_vector(pf);
3987 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3988 synchronize_irq(pf->msix_entries[0].vector);
3989 free_irq(pf->msix_entries[0].vector, pf);
3990 }
3991
3992 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3993 for (i = 0; i < pf->num_alloc_vsi; i++)
3994 if (pf->vsi[i])
3995 i40e_vsi_free_q_vectors(pf->vsi[i]);
3996 i40e_reset_interrupt_capability(pf);
3997 }
3998
3999 /**
4000 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4001 * @vsi: the VSI being configured
4002 **/
4003 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4004 {
4005 int q_idx;
4006
4007 if (!vsi->netdev)
4008 return;
4009
4010 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4011 napi_enable(&vsi->q_vectors[q_idx]->napi);
4012 }
4013
4014 /**
4015 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4016 * @vsi: the VSI being configured
4017 **/
4018 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4019 {
4020 int q_idx;
4021
4022 if (!vsi->netdev)
4023 return;
4024
4025 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4026 napi_disable(&vsi->q_vectors[q_idx]->napi);
4027 }
4028
4029 /**
4030 * i40e_vsi_close - Shut down a VSI
4031 * @vsi: the vsi to be quelled
4032 **/
4033 static void i40e_vsi_close(struct i40e_vsi *vsi)
4034 {
4035 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4036 i40e_down(vsi);
4037 i40e_vsi_free_irq(vsi);
4038 i40e_vsi_free_tx_resources(vsi);
4039 i40e_vsi_free_rx_resources(vsi);
4040 vsi->current_netdev_flags = 0;
4041 }
4042
4043 /**
4044 * i40e_quiesce_vsi - Pause a given VSI
4045 * @vsi: the VSI being paused
4046 **/
4047 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4048 {
4049 if (test_bit(__I40E_DOWN, &vsi->state))
4050 return;
4051
4052 /* No need to disable FCoE VSI when Tx suspended */
4053 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4054 vsi->type == I40E_VSI_FCOE) {
4055 dev_dbg(&vsi->back->pdev->dev,
4056 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4057 return;
4058 }
4059
4060 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4061 if (vsi->netdev && netif_running(vsi->netdev)) {
4062 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4063 } else {
4064 i40e_vsi_close(vsi);
4065 }
4066 }
4067
4068 /**
4069 * i40e_unquiesce_vsi - Resume a given VSI
4070 * @vsi: the VSI being resumed
4071 **/
4072 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4073 {
4074 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4075 return;
4076
4077 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4078 if (vsi->netdev && netif_running(vsi->netdev))
4079 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4080 else
4081 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4082 }
4083
4084 /**
4085 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4086 * @pf: the PF
4087 **/
4088 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4089 {
4090 int v;
4091
4092 for (v = 0; v < pf->num_alloc_vsi; v++) {
4093 if (pf->vsi[v])
4094 i40e_quiesce_vsi(pf->vsi[v]);
4095 }
4096 }
4097
4098 /**
4099 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4100 * @pf: the PF
4101 **/
4102 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4103 {
4104 int v;
4105
4106 for (v = 0; v < pf->num_alloc_vsi; v++) {
4107 if (pf->vsi[v])
4108 i40e_unquiesce_vsi(pf->vsi[v]);
4109 }
4110 }
4111
4112 #ifdef CONFIG_I40E_DCB
4113 /**
4114 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4115 * @vsi: the VSI being configured
4116 *
4117 * This function waits for the given VSI's Tx queues to be disabled.
4118 **/
4119 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4120 {
4121 struct i40e_pf *pf = vsi->back;
4122 int i, pf_q, ret;
4123
4124 pf_q = vsi->base_queue;
4125 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4126 /* Check and wait for the disable status of the queue */
4127 ret = i40e_pf_txq_wait(pf, pf_q, false);
4128 if (ret) {
4129 dev_info(&pf->pdev->dev,
4130 "VSI seid %d Tx ring %d disable timeout\n",
4131 vsi->seid, pf_q);
4132 return ret;
4133 }
4134 }
4135
4136 return 0;
4137 }
4138
4139 /**
4140 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4141 * @pf: the PF
4142 *
4143 * This function waits for the Tx queues to be in disabled state for all the
4144 * VSIs that are managed by this PF.
4145 **/
4146 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4147 {
4148 int v, ret = 0;
4149
4150 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4151 /* No need to wait for FCoE VSI queues */
4152 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4153 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4154 if (ret)
4155 break;
4156 }
4157 }
4158
4159 return ret;
4160 }
4161
4162 #endif
4163
4164 /**
4165 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4166 * @q_idx: TX queue number
4167 * @vsi: Pointer to VSI struct
4168 *
4169 * This function checks specified queue for given VSI. Detects hung condition.
4170 * Sets hung bit since it is two step process. Before next run of service task
4171 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4172 * hung condition remain unchanged and during subsequent run, this function
4173 * issues SW interrupt to recover from hung condition.
4174 **/
4175 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4176 {
4177 struct i40e_ring *tx_ring = NULL;
4178 struct i40e_pf *pf;
4179 u32 head, val, tx_pending;
4180 int i;
4181
4182 pf = vsi->back;
4183
4184 /* now that we have an index, find the tx_ring struct */
4185 for (i = 0; i < vsi->num_queue_pairs; i++) {
4186 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4187 if (q_idx == vsi->tx_rings[i]->queue_index) {
4188 tx_ring = vsi->tx_rings[i];
4189 break;
4190 }
4191 }
4192 }
4193
4194 if (!tx_ring)
4195 return;
4196
4197 /* Read interrupt register */
4198 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4199 val = rd32(&pf->hw,
4200 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4201 tx_ring->vsi->base_vector - 1));
4202 else
4203 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4204
4205 head = i40e_get_head(tx_ring);
4206
4207 tx_pending = i40e_get_tx_pending(tx_ring);
4208
4209 /* Interrupts are disabled and TX pending is non-zero,
4210 * trigger the SW interrupt (don't wait). Worst case
4211 * there will be one extra interrupt which may result
4212 * into not cleaning any queues because queues are cleaned.
4213 */
4214 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4215 i40e_force_wb(vsi, tx_ring->q_vector);
4216 }
4217
4218 /**
4219 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4220 * @pf: pointer to PF struct
4221 *
4222 * LAN VSI has netdev and netdev has TX queues. This function is to check
4223 * each of those TX queues if they are hung, trigger recovery by issuing
4224 * SW interrupt.
4225 **/
4226 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4227 {
4228 struct net_device *netdev;
4229 struct i40e_vsi *vsi;
4230 int i;
4231
4232 /* Only for LAN VSI */
4233 vsi = pf->vsi[pf->lan_vsi];
4234
4235 if (!vsi)
4236 return;
4237
4238 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4239 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4240 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4241 return;
4242
4243 /* Make sure type is MAIN VSI */
4244 if (vsi->type != I40E_VSI_MAIN)
4245 return;
4246
4247 netdev = vsi->netdev;
4248 if (!netdev)
4249 return;
4250
4251 /* Bail out if netif_carrier is not OK */
4252 if (!netif_carrier_ok(netdev))
4253 return;
4254
4255 /* Go thru' TX queues for netdev */
4256 for (i = 0; i < netdev->num_tx_queues; i++) {
4257 struct netdev_queue *q;
4258
4259 q = netdev_get_tx_queue(netdev, i);
4260 if (q)
4261 i40e_detect_recover_hung_queue(i, vsi);
4262 }
4263 }
4264
4265 /**
4266 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4267 * @pf: pointer to PF
4268 *
4269 * Get TC map for ISCSI PF type that will include iSCSI TC
4270 * and LAN TC.
4271 **/
4272 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4273 {
4274 struct i40e_dcb_app_priority_table app;
4275 struct i40e_hw *hw = &pf->hw;
4276 u8 enabled_tc = 1; /* TC0 is always enabled */
4277 u8 tc, i;
4278 /* Get the iSCSI APP TLV */
4279 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4280
4281 for (i = 0; i < dcbcfg->numapps; i++) {
4282 app = dcbcfg->app[i];
4283 if (app.selector == I40E_APP_SEL_TCPIP &&
4284 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4285 tc = dcbcfg->etscfg.prioritytable[app.priority];
4286 enabled_tc |= BIT_ULL(tc);
4287 break;
4288 }
4289 }
4290
4291 return enabled_tc;
4292 }
4293
4294 /**
4295 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4296 * @dcbcfg: the corresponding DCBx configuration structure
4297 *
4298 * Return the number of TCs from given DCBx configuration
4299 **/
4300 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4301 {
4302 u8 num_tc = 0;
4303 int i;
4304
4305 /* Scan the ETS Config Priority Table to find
4306 * traffic class enabled for a given priority
4307 * and use the traffic class index to get the
4308 * number of traffic classes enabled
4309 */
4310 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4311 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4312 num_tc = dcbcfg->etscfg.prioritytable[i];
4313 }
4314
4315 /* Traffic class index starts from zero so
4316 * increment to return the actual count
4317 */
4318 return num_tc + 1;
4319 }
4320
4321 /**
4322 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4323 * @dcbcfg: the corresponding DCBx configuration structure
4324 *
4325 * Query the current DCB configuration and return the number of
4326 * traffic classes enabled from the given DCBX config
4327 **/
4328 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4329 {
4330 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4331 u8 enabled_tc = 1;
4332 u8 i;
4333
4334 for (i = 0; i < num_tc; i++)
4335 enabled_tc |= BIT(i);
4336
4337 return enabled_tc;
4338 }
4339
4340 /**
4341 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4342 * @pf: PF being queried
4343 *
4344 * Return number of traffic classes enabled for the given PF
4345 **/
4346 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4347 {
4348 struct i40e_hw *hw = &pf->hw;
4349 u8 i, enabled_tc;
4350 u8 num_tc = 0;
4351 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4352
4353 /* If DCB is not enabled then always in single TC */
4354 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4355 return 1;
4356
4357 /* SFP mode will be enabled for all TCs on port */
4358 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4359 return i40e_dcb_get_num_tc(dcbcfg);
4360
4361 /* MFP mode return count of enabled TCs for this PF */
4362 if (pf->hw.func_caps.iscsi)
4363 enabled_tc = i40e_get_iscsi_tc_map(pf);
4364 else
4365 return 1; /* Only TC0 */
4366
4367 /* At least have TC0 */
4368 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4369 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4370 if (enabled_tc & BIT_ULL(i))
4371 num_tc++;
4372 }
4373 return num_tc;
4374 }
4375
4376 /**
4377 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4378 * @pf: PF being queried
4379 *
4380 * Return a bitmap for first enabled traffic class for this PF.
4381 **/
4382 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4383 {
4384 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4385 u8 i = 0;
4386
4387 if (!enabled_tc)
4388 return 0x1; /* TC0 */
4389
4390 /* Find the first enabled TC */
4391 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4392 if (enabled_tc & BIT_ULL(i))
4393 break;
4394 }
4395
4396 return BIT(i);
4397 }
4398
4399 /**
4400 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4401 * @pf: PF being queried
4402 *
4403 * Return a bitmap for enabled traffic classes for this PF.
4404 **/
4405 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4406 {
4407 /* If DCB is not enabled for this PF then just return default TC */
4408 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4409 return i40e_pf_get_default_tc(pf);
4410
4411 /* SFP mode we want PF to be enabled for all TCs */
4412 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4413 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4414
4415 /* MFP enabled and iSCSI PF type */
4416 if (pf->hw.func_caps.iscsi)
4417 return i40e_get_iscsi_tc_map(pf);
4418 else
4419 return i40e_pf_get_default_tc(pf);
4420 }
4421
4422 /**
4423 * i40e_vsi_get_bw_info - Query VSI BW Information
4424 * @vsi: the VSI being queried
4425 *
4426 * Returns 0 on success, negative value on failure
4427 **/
4428 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4429 {
4430 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4431 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4432 struct i40e_pf *pf = vsi->back;
4433 struct i40e_hw *hw = &pf->hw;
4434 i40e_status ret;
4435 u32 tc_bw_max;
4436 int i;
4437
4438 /* Get the VSI level BW configuration */
4439 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4440 if (ret) {
4441 dev_info(&pf->pdev->dev,
4442 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4443 i40e_stat_str(&pf->hw, ret),
4444 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4445 return -EINVAL;
4446 }
4447
4448 /* Get the VSI level BW configuration per TC */
4449 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4450 NULL);
4451 if (ret) {
4452 dev_info(&pf->pdev->dev,
4453 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4454 i40e_stat_str(&pf->hw, ret),
4455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4456 return -EINVAL;
4457 }
4458
4459 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4460 dev_info(&pf->pdev->dev,
4461 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4462 bw_config.tc_valid_bits,
4463 bw_ets_config.tc_valid_bits);
4464 /* Still continuing */
4465 }
4466
4467 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4468 vsi->bw_max_quanta = bw_config.max_bw;
4469 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4470 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4471 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4472 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4473 vsi->bw_ets_limit_credits[i] =
4474 le16_to_cpu(bw_ets_config.credits[i]);
4475 /* 3 bits out of 4 for each TC */
4476 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4477 }
4478
4479 return 0;
4480 }
4481
4482 /**
4483 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4484 * @vsi: the VSI being configured
4485 * @enabled_tc: TC bitmap
4486 * @bw_credits: BW shared credits per TC
4487 *
4488 * Returns 0 on success, negative value on failure
4489 **/
4490 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4491 u8 *bw_share)
4492 {
4493 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4494 i40e_status ret;
4495 int i;
4496
4497 bw_data.tc_valid_bits = enabled_tc;
4498 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4499 bw_data.tc_bw_credits[i] = bw_share[i];
4500
4501 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4502 NULL);
4503 if (ret) {
4504 dev_info(&vsi->back->pdev->dev,
4505 "AQ command Config VSI BW allocation per TC failed = %d\n",
4506 vsi->back->hw.aq.asq_last_status);
4507 return -EINVAL;
4508 }
4509
4510 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4511 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4512
4513 return 0;
4514 }
4515
4516 /**
4517 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4518 * @vsi: the VSI being configured
4519 * @enabled_tc: TC map to be enabled
4520 *
4521 **/
4522 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4523 {
4524 struct net_device *netdev = vsi->netdev;
4525 struct i40e_pf *pf = vsi->back;
4526 struct i40e_hw *hw = &pf->hw;
4527 u8 netdev_tc = 0;
4528 int i;
4529 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4530
4531 if (!netdev)
4532 return;
4533
4534 if (!enabled_tc) {
4535 netdev_reset_tc(netdev);
4536 return;
4537 }
4538
4539 /* Set up actual enabled TCs on the VSI */
4540 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4541 return;
4542
4543 /* set per TC queues for the VSI */
4544 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4545 /* Only set TC queues for enabled tcs
4546 *
4547 * e.g. For a VSI that has TC0 and TC3 enabled the
4548 * enabled_tc bitmap would be 0x00001001; the driver
4549 * will set the numtc for netdev as 2 that will be
4550 * referenced by the netdev layer as TC 0 and 1.
4551 */
4552 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4553 netdev_set_tc_queue(netdev,
4554 vsi->tc_config.tc_info[i].netdev_tc,
4555 vsi->tc_config.tc_info[i].qcount,
4556 vsi->tc_config.tc_info[i].qoffset);
4557 }
4558
4559 /* Assign UP2TC map for the VSI */
4560 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4561 /* Get the actual TC# for the UP */
4562 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4563 /* Get the mapped netdev TC# for the UP */
4564 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4565 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4566 }
4567 }
4568
4569 /**
4570 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4571 * @vsi: the VSI being configured
4572 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4573 **/
4574 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4575 struct i40e_vsi_context *ctxt)
4576 {
4577 /* copy just the sections touched not the entire info
4578 * since not all sections are valid as returned by
4579 * update vsi params
4580 */
4581 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4582 memcpy(&vsi->info.queue_mapping,
4583 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4584 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4585 sizeof(vsi->info.tc_mapping));
4586 }
4587
4588 /**
4589 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4590 * @vsi: VSI to be configured
4591 * @enabled_tc: TC bitmap
4592 *
4593 * This configures a particular VSI for TCs that are mapped to the
4594 * given TC bitmap. It uses default bandwidth share for TCs across
4595 * VSIs to configure TC for a particular VSI.
4596 *
4597 * NOTE:
4598 * It is expected that the VSI queues have been quisced before calling
4599 * this function.
4600 **/
4601 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4602 {
4603 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4604 struct i40e_vsi_context ctxt;
4605 int ret = 0;
4606 int i;
4607
4608 /* Check if enabled_tc is same as existing or new TCs */
4609 if (vsi->tc_config.enabled_tc == enabled_tc)
4610 return ret;
4611
4612 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4613 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4614 if (enabled_tc & BIT_ULL(i))
4615 bw_share[i] = 1;
4616 }
4617
4618 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4619 if (ret) {
4620 dev_info(&vsi->back->pdev->dev,
4621 "Failed configuring TC map %d for VSI %d\n",
4622 enabled_tc, vsi->seid);
4623 goto out;
4624 }
4625
4626 /* Update Queue Pairs Mapping for currently enabled UPs */
4627 ctxt.seid = vsi->seid;
4628 ctxt.pf_num = vsi->back->hw.pf_id;
4629 ctxt.vf_num = 0;
4630 ctxt.uplink_seid = vsi->uplink_seid;
4631 ctxt.info = vsi->info;
4632 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4633
4634 /* Update the VSI after updating the VSI queue-mapping information */
4635 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4636 if (ret) {
4637 dev_info(&vsi->back->pdev->dev,
4638 "Update vsi tc config failed, err %s aq_err %s\n",
4639 i40e_stat_str(&vsi->back->hw, ret),
4640 i40e_aq_str(&vsi->back->hw,
4641 vsi->back->hw.aq.asq_last_status));
4642 goto out;
4643 }
4644 /* update the local VSI info with updated queue map */
4645 i40e_vsi_update_queue_map(vsi, &ctxt);
4646 vsi->info.valid_sections = 0;
4647
4648 /* Update current VSI BW information */
4649 ret = i40e_vsi_get_bw_info(vsi);
4650 if (ret) {
4651 dev_info(&vsi->back->pdev->dev,
4652 "Failed updating vsi bw info, err %s aq_err %s\n",
4653 i40e_stat_str(&vsi->back->hw, ret),
4654 i40e_aq_str(&vsi->back->hw,
4655 vsi->back->hw.aq.asq_last_status));
4656 goto out;
4657 }
4658
4659 /* Update the netdev TC setup */
4660 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4661 out:
4662 return ret;
4663 }
4664
4665 /**
4666 * i40e_veb_config_tc - Configure TCs for given VEB
4667 * @veb: given VEB
4668 * @enabled_tc: TC bitmap
4669 *
4670 * Configures given TC bitmap for VEB (switching) element
4671 **/
4672 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4673 {
4674 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4675 struct i40e_pf *pf = veb->pf;
4676 int ret = 0;
4677 int i;
4678
4679 /* No TCs or already enabled TCs just return */
4680 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4681 return ret;
4682
4683 bw_data.tc_valid_bits = enabled_tc;
4684 /* bw_data.absolute_credits is not set (relative) */
4685
4686 /* Enable ETS TCs with equal BW Share for now */
4687 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4688 if (enabled_tc & BIT_ULL(i))
4689 bw_data.tc_bw_share_credits[i] = 1;
4690 }
4691
4692 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4693 &bw_data, NULL);
4694 if (ret) {
4695 dev_info(&pf->pdev->dev,
4696 "VEB bw config failed, err %s aq_err %s\n",
4697 i40e_stat_str(&pf->hw, ret),
4698 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4699 goto out;
4700 }
4701
4702 /* Update the BW information */
4703 ret = i40e_veb_get_bw_info(veb);
4704 if (ret) {
4705 dev_info(&pf->pdev->dev,
4706 "Failed getting veb bw config, err %s aq_err %s\n",
4707 i40e_stat_str(&pf->hw, ret),
4708 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4709 }
4710
4711 out:
4712 return ret;
4713 }
4714
4715 #ifdef CONFIG_I40E_DCB
4716 /**
4717 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4718 * @pf: PF struct
4719 *
4720 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4721 * the caller would've quiesce all the VSIs before calling
4722 * this function
4723 **/
4724 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4725 {
4726 u8 tc_map = 0;
4727 int ret;
4728 u8 v;
4729
4730 /* Enable the TCs available on PF to all VEBs */
4731 tc_map = i40e_pf_get_tc_map(pf);
4732 for (v = 0; v < I40E_MAX_VEB; v++) {
4733 if (!pf->veb[v])
4734 continue;
4735 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4736 if (ret) {
4737 dev_info(&pf->pdev->dev,
4738 "Failed configuring TC for VEB seid=%d\n",
4739 pf->veb[v]->seid);
4740 /* Will try to configure as many components */
4741 }
4742 }
4743
4744 /* Update each VSI */
4745 for (v = 0; v < pf->num_alloc_vsi; v++) {
4746 if (!pf->vsi[v])
4747 continue;
4748
4749 /* - Enable all TCs for the LAN VSI
4750 #ifdef I40E_FCOE
4751 * - For FCoE VSI only enable the TC configured
4752 * as per the APP TLV
4753 #endif
4754 * - For all others keep them at TC0 for now
4755 */
4756 if (v == pf->lan_vsi)
4757 tc_map = i40e_pf_get_tc_map(pf);
4758 else
4759 tc_map = i40e_pf_get_default_tc(pf);
4760 #ifdef I40E_FCOE
4761 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4762 tc_map = i40e_get_fcoe_tc_map(pf);
4763 #endif /* #ifdef I40E_FCOE */
4764
4765 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4766 if (ret) {
4767 dev_info(&pf->pdev->dev,
4768 "Failed configuring TC for VSI seid=%d\n",
4769 pf->vsi[v]->seid);
4770 /* Will try to configure as many components */
4771 } else {
4772 /* Re-configure VSI vectors based on updated TC map */
4773 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4774 if (pf->vsi[v]->netdev)
4775 i40e_dcbnl_set_all(pf->vsi[v]);
4776 }
4777 }
4778 }
4779
4780 /**
4781 * i40e_resume_port_tx - Resume port Tx
4782 * @pf: PF struct
4783 *
4784 * Resume a port's Tx and issue a PF reset in case of failure to
4785 * resume.
4786 **/
4787 static int i40e_resume_port_tx(struct i40e_pf *pf)
4788 {
4789 struct i40e_hw *hw = &pf->hw;
4790 int ret;
4791
4792 ret = i40e_aq_resume_port_tx(hw, NULL);
4793 if (ret) {
4794 dev_info(&pf->pdev->dev,
4795 "Resume Port Tx failed, err %s aq_err %s\n",
4796 i40e_stat_str(&pf->hw, ret),
4797 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4798 /* Schedule PF reset to recover */
4799 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4800 i40e_service_event_schedule(pf);
4801 }
4802
4803 return ret;
4804 }
4805
4806 /**
4807 * i40e_init_pf_dcb - Initialize DCB configuration
4808 * @pf: PF being configured
4809 *
4810 * Query the current DCB configuration and cache it
4811 * in the hardware structure
4812 **/
4813 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4814 {
4815 struct i40e_hw *hw = &pf->hw;
4816 int err = 0;
4817
4818 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4819 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4820 (pf->hw.aq.fw_maj_ver < 4))
4821 goto out;
4822
4823 /* Get the initial DCB configuration */
4824 err = i40e_init_dcb(hw);
4825 if (!err) {
4826 /* Device/Function is not DCBX capable */
4827 if ((!hw->func_caps.dcb) ||
4828 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4829 dev_info(&pf->pdev->dev,
4830 "DCBX offload is not supported or is disabled for this PF.\n");
4831
4832 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4833 goto out;
4834
4835 } else {
4836 /* When status is not DISABLED then DCBX in FW */
4837 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4838 DCB_CAP_DCBX_VER_IEEE;
4839
4840 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4841 /* Enable DCB tagging only when more than one TC */
4842 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4843 pf->flags |= I40E_FLAG_DCB_ENABLED;
4844 dev_dbg(&pf->pdev->dev,
4845 "DCBX offload is supported for this PF.\n");
4846 }
4847 } else {
4848 dev_info(&pf->pdev->dev,
4849 "Query for DCB configuration failed, err %s aq_err %s\n",
4850 i40e_stat_str(&pf->hw, err),
4851 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4852 }
4853
4854 out:
4855 return err;
4856 }
4857 #endif /* CONFIG_I40E_DCB */
4858 #define SPEED_SIZE 14
4859 #define FC_SIZE 8
4860 /**
4861 * i40e_print_link_message - print link up or down
4862 * @vsi: the VSI for which link needs a message
4863 */
4864 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4865 {
4866 char speed[SPEED_SIZE] = "Unknown";
4867 char fc[FC_SIZE] = "RX/TX";
4868
4869 if (!isup) {
4870 netdev_info(vsi->netdev, "NIC Link is Down\n");
4871 return;
4872 }
4873
4874 /* Warn user if link speed on NPAR enabled partition is not at
4875 * least 10GB
4876 */
4877 if (vsi->back->hw.func_caps.npar_enable &&
4878 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4879 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4880 netdev_warn(vsi->netdev,
4881 "The partition detected link speed that is less than 10Gbps\n");
4882
4883 switch (vsi->back->hw.phy.link_info.link_speed) {
4884 case I40E_LINK_SPEED_40GB:
4885 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4886 break;
4887 case I40E_LINK_SPEED_20GB:
4888 strncpy(speed, "20 Gbps", SPEED_SIZE);
4889 break;
4890 case I40E_LINK_SPEED_10GB:
4891 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4892 break;
4893 case I40E_LINK_SPEED_1GB:
4894 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4895 break;
4896 case I40E_LINK_SPEED_100MB:
4897 strncpy(speed, "100 Mbps", SPEED_SIZE);
4898 break;
4899 default:
4900 break;
4901 }
4902
4903 switch (vsi->back->hw.fc.current_mode) {
4904 case I40E_FC_FULL:
4905 strlcpy(fc, "RX/TX", FC_SIZE);
4906 break;
4907 case I40E_FC_TX_PAUSE:
4908 strlcpy(fc, "TX", FC_SIZE);
4909 break;
4910 case I40E_FC_RX_PAUSE:
4911 strlcpy(fc, "RX", FC_SIZE);
4912 break;
4913 default:
4914 strlcpy(fc, "None", FC_SIZE);
4915 break;
4916 }
4917
4918 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4919 speed, fc);
4920 }
4921
4922 /**
4923 * i40e_up_complete - Finish the last steps of bringing up a connection
4924 * @vsi: the VSI being configured
4925 **/
4926 static int i40e_up_complete(struct i40e_vsi *vsi)
4927 {
4928 struct i40e_pf *pf = vsi->back;
4929 int err;
4930
4931 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4932 i40e_vsi_configure_msix(vsi);
4933 else
4934 i40e_configure_msi_and_legacy(vsi);
4935
4936 /* start rings */
4937 err = i40e_vsi_control_rings(vsi, true);
4938 if (err)
4939 return err;
4940
4941 clear_bit(__I40E_DOWN, &vsi->state);
4942 i40e_napi_enable_all(vsi);
4943 i40e_vsi_enable_irq(vsi);
4944
4945 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4946 (vsi->netdev)) {
4947 i40e_print_link_message(vsi, true);
4948 netif_tx_start_all_queues(vsi->netdev);
4949 netif_carrier_on(vsi->netdev);
4950 } else if (vsi->netdev) {
4951 i40e_print_link_message(vsi, false);
4952 /* need to check for qualified module here*/
4953 if ((pf->hw.phy.link_info.link_info &
4954 I40E_AQ_MEDIA_AVAILABLE) &&
4955 (!(pf->hw.phy.link_info.an_info &
4956 I40E_AQ_QUALIFIED_MODULE)))
4957 netdev_err(vsi->netdev,
4958 "the driver failed to link because an unqualified module was detected.");
4959 }
4960
4961 /* replay FDIR SB filters */
4962 if (vsi->type == I40E_VSI_FDIR) {
4963 /* reset fd counters */
4964 pf->fd_add_err = pf->fd_atr_cnt = 0;
4965 if (pf->fd_tcp_rule > 0) {
4966 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4967 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4968 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4969 pf->fd_tcp_rule = 0;
4970 }
4971 i40e_fdir_filter_restore(vsi);
4972 }
4973 i40e_service_event_schedule(pf);
4974
4975 return 0;
4976 }
4977
4978 /**
4979 * i40e_vsi_reinit_locked - Reset the VSI
4980 * @vsi: the VSI being configured
4981 *
4982 * Rebuild the ring structs after some configuration
4983 * has changed, e.g. MTU size.
4984 **/
4985 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4986 {
4987 struct i40e_pf *pf = vsi->back;
4988
4989 WARN_ON(in_interrupt());
4990 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4991 usleep_range(1000, 2000);
4992 i40e_down(vsi);
4993
4994 /* Give a VF some time to respond to the reset. The
4995 * two second wait is based upon the watchdog cycle in
4996 * the VF driver.
4997 */
4998 if (vsi->type == I40E_VSI_SRIOV)
4999 msleep(2000);
5000 i40e_up(vsi);
5001 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5002 }
5003
5004 /**
5005 * i40e_up - Bring the connection back up after being down
5006 * @vsi: the VSI being configured
5007 **/
5008 int i40e_up(struct i40e_vsi *vsi)
5009 {
5010 int err;
5011
5012 err = i40e_vsi_configure(vsi);
5013 if (!err)
5014 err = i40e_up_complete(vsi);
5015
5016 return err;
5017 }
5018
5019 /**
5020 * i40e_down - Shutdown the connection processing
5021 * @vsi: the VSI being stopped
5022 **/
5023 void i40e_down(struct i40e_vsi *vsi)
5024 {
5025 int i;
5026
5027 /* It is assumed that the caller of this function
5028 * sets the vsi->state __I40E_DOWN bit.
5029 */
5030 if (vsi->netdev) {
5031 netif_carrier_off(vsi->netdev);
5032 netif_tx_disable(vsi->netdev);
5033 }
5034 i40e_vsi_disable_irq(vsi);
5035 i40e_vsi_control_rings(vsi, false);
5036 i40e_napi_disable_all(vsi);
5037
5038 for (i = 0; i < vsi->num_queue_pairs; i++) {
5039 i40e_clean_tx_ring(vsi->tx_rings[i]);
5040 i40e_clean_rx_ring(vsi->rx_rings[i]);
5041 }
5042 }
5043
5044 /**
5045 * i40e_setup_tc - configure multiple traffic classes
5046 * @netdev: net device to configure
5047 * @tc: number of traffic classes to enable
5048 **/
5049 #ifdef I40E_FCOE
5050 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5051 #else
5052 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5053 #endif
5054 {
5055 struct i40e_netdev_priv *np = netdev_priv(netdev);
5056 struct i40e_vsi *vsi = np->vsi;
5057 struct i40e_pf *pf = vsi->back;
5058 u8 enabled_tc = 0;
5059 int ret = -EINVAL;
5060 int i;
5061
5062 /* Check if DCB enabled to continue */
5063 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5064 netdev_info(netdev, "DCB is not enabled for adapter\n");
5065 goto exit;
5066 }
5067
5068 /* Check if MFP enabled */
5069 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5070 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5071 goto exit;
5072 }
5073
5074 /* Check whether tc count is within enabled limit */
5075 if (tc > i40e_pf_get_num_tc(pf)) {
5076 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5077 goto exit;
5078 }
5079
5080 /* Generate TC map for number of tc requested */
5081 for (i = 0; i < tc; i++)
5082 enabled_tc |= BIT_ULL(i);
5083
5084 /* Requesting same TC configuration as already enabled */
5085 if (enabled_tc == vsi->tc_config.enabled_tc)
5086 return 0;
5087
5088 /* Quiesce VSI queues */
5089 i40e_quiesce_vsi(vsi);
5090
5091 /* Configure VSI for enabled TCs */
5092 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5093 if (ret) {
5094 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5095 vsi->seid);
5096 goto exit;
5097 }
5098
5099 /* Unquiesce VSI */
5100 i40e_unquiesce_vsi(vsi);
5101
5102 exit:
5103 return ret;
5104 }
5105
5106 /**
5107 * i40e_open - Called when a network interface is made active
5108 * @netdev: network interface device structure
5109 *
5110 * The open entry point is called when a network interface is made
5111 * active by the system (IFF_UP). At this point all resources needed
5112 * for transmit and receive operations are allocated, the interrupt
5113 * handler is registered with the OS, the netdev watchdog subtask is
5114 * enabled, and the stack is notified that the interface is ready.
5115 *
5116 * Returns 0 on success, negative value on failure
5117 **/
5118 int i40e_open(struct net_device *netdev)
5119 {
5120 struct i40e_netdev_priv *np = netdev_priv(netdev);
5121 struct i40e_vsi *vsi = np->vsi;
5122 struct i40e_pf *pf = vsi->back;
5123 int err;
5124
5125 /* disallow open during test or if eeprom is broken */
5126 if (test_bit(__I40E_TESTING, &pf->state) ||
5127 test_bit(__I40E_BAD_EEPROM, &pf->state))
5128 return -EBUSY;
5129
5130 netif_carrier_off(netdev);
5131
5132 err = i40e_vsi_open(vsi);
5133 if (err)
5134 return err;
5135
5136 /* configure global TSO hardware offload settings */
5137 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5138 TCP_FLAG_FIN) >> 16);
5139 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5140 TCP_FLAG_FIN |
5141 TCP_FLAG_CWR) >> 16);
5142 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5143
5144 #ifdef CONFIG_I40E_VXLAN
5145 vxlan_get_rx_port(netdev);
5146 #endif
5147
5148 return 0;
5149 }
5150
5151 /**
5152 * i40e_vsi_open -
5153 * @vsi: the VSI to open
5154 *
5155 * Finish initialization of the VSI.
5156 *
5157 * Returns 0 on success, negative value on failure
5158 **/
5159 int i40e_vsi_open(struct i40e_vsi *vsi)
5160 {
5161 struct i40e_pf *pf = vsi->back;
5162 char int_name[I40E_INT_NAME_STR_LEN];
5163 int err;
5164
5165 /* allocate descriptors */
5166 err = i40e_vsi_setup_tx_resources(vsi);
5167 if (err)
5168 goto err_setup_tx;
5169 err = i40e_vsi_setup_rx_resources(vsi);
5170 if (err)
5171 goto err_setup_rx;
5172
5173 err = i40e_vsi_configure(vsi);
5174 if (err)
5175 goto err_setup_rx;
5176
5177 if (vsi->netdev) {
5178 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5179 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5180 err = i40e_vsi_request_irq(vsi, int_name);
5181 if (err)
5182 goto err_setup_rx;
5183
5184 /* Notify the stack of the actual queue counts. */
5185 err = netif_set_real_num_tx_queues(vsi->netdev,
5186 vsi->num_queue_pairs);
5187 if (err)
5188 goto err_set_queues;
5189
5190 err = netif_set_real_num_rx_queues(vsi->netdev,
5191 vsi->num_queue_pairs);
5192 if (err)
5193 goto err_set_queues;
5194
5195 } else if (vsi->type == I40E_VSI_FDIR) {
5196 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5197 dev_driver_string(&pf->pdev->dev),
5198 dev_name(&pf->pdev->dev));
5199 err = i40e_vsi_request_irq(vsi, int_name);
5200
5201 } else {
5202 err = -EINVAL;
5203 goto err_setup_rx;
5204 }
5205
5206 err = i40e_up_complete(vsi);
5207 if (err)
5208 goto err_up_complete;
5209
5210 return 0;
5211
5212 err_up_complete:
5213 i40e_down(vsi);
5214 err_set_queues:
5215 i40e_vsi_free_irq(vsi);
5216 err_setup_rx:
5217 i40e_vsi_free_rx_resources(vsi);
5218 err_setup_tx:
5219 i40e_vsi_free_tx_resources(vsi);
5220 if (vsi == pf->vsi[pf->lan_vsi])
5221 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5222
5223 return err;
5224 }
5225
5226 /**
5227 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5228 * @pf: Pointer to PF
5229 *
5230 * This function destroys the hlist where all the Flow Director
5231 * filters were saved.
5232 **/
5233 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5234 {
5235 struct i40e_fdir_filter *filter;
5236 struct hlist_node *node2;
5237
5238 hlist_for_each_entry_safe(filter, node2,
5239 &pf->fdir_filter_list, fdir_node) {
5240 hlist_del(&filter->fdir_node);
5241 kfree(filter);
5242 }
5243 pf->fdir_pf_active_filters = 0;
5244 }
5245
5246 /**
5247 * i40e_close - Disables a network interface
5248 * @netdev: network interface device structure
5249 *
5250 * The close entry point is called when an interface is de-activated
5251 * by the OS. The hardware is still under the driver's control, but
5252 * this netdev interface is disabled.
5253 *
5254 * Returns 0, this is not allowed to fail
5255 **/
5256 #ifdef I40E_FCOE
5257 int i40e_close(struct net_device *netdev)
5258 #else
5259 static int i40e_close(struct net_device *netdev)
5260 #endif
5261 {
5262 struct i40e_netdev_priv *np = netdev_priv(netdev);
5263 struct i40e_vsi *vsi = np->vsi;
5264
5265 i40e_vsi_close(vsi);
5266
5267 return 0;
5268 }
5269
5270 /**
5271 * i40e_do_reset - Start a PF or Core Reset sequence
5272 * @pf: board private structure
5273 * @reset_flags: which reset is requested
5274 *
5275 * The essential difference in resets is that the PF Reset
5276 * doesn't clear the packet buffers, doesn't reset the PE
5277 * firmware, and doesn't bother the other PFs on the chip.
5278 **/
5279 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5280 {
5281 u32 val;
5282
5283 WARN_ON(in_interrupt());
5284
5285 if (i40e_check_asq_alive(&pf->hw))
5286 i40e_vc_notify_reset(pf);
5287
5288 /* do the biggest reset indicated */
5289 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5290
5291 /* Request a Global Reset
5292 *
5293 * This will start the chip's countdown to the actual full
5294 * chip reset event, and a warning interrupt to be sent
5295 * to all PFs, including the requestor. Our handler
5296 * for the warning interrupt will deal with the shutdown
5297 * and recovery of the switch setup.
5298 */
5299 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5300 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5301 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5302 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5303
5304 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5305
5306 /* Request a Core Reset
5307 *
5308 * Same as Global Reset, except does *not* include the MAC/PHY
5309 */
5310 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5311 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5312 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5313 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5314 i40e_flush(&pf->hw);
5315
5316 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5317
5318 /* Request a PF Reset
5319 *
5320 * Resets only the PF-specific registers
5321 *
5322 * This goes directly to the tear-down and rebuild of
5323 * the switch, since we need to do all the recovery as
5324 * for the Core Reset.
5325 */
5326 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5327 i40e_handle_reset_warning(pf);
5328
5329 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5330 int v;
5331
5332 /* Find the VSI(s) that requested a re-init */
5333 dev_info(&pf->pdev->dev,
5334 "VSI reinit requested\n");
5335 for (v = 0; v < pf->num_alloc_vsi; v++) {
5336 struct i40e_vsi *vsi = pf->vsi[v];
5337 if (vsi != NULL &&
5338 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5339 i40e_vsi_reinit_locked(pf->vsi[v]);
5340 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5341 }
5342 }
5343
5344 /* no further action needed, so return now */
5345 return;
5346 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5347 int v;
5348
5349 /* Find the VSI(s) that needs to be brought down */
5350 dev_info(&pf->pdev->dev, "VSI down requested\n");
5351 for (v = 0; v < pf->num_alloc_vsi; v++) {
5352 struct i40e_vsi *vsi = pf->vsi[v];
5353 if (vsi != NULL &&
5354 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5355 set_bit(__I40E_DOWN, &vsi->state);
5356 i40e_down(vsi);
5357 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5358 }
5359 }
5360
5361 /* no further action needed, so return now */
5362 return;
5363 } else {
5364 dev_info(&pf->pdev->dev,
5365 "bad reset request 0x%08x\n", reset_flags);
5366 return;
5367 }
5368 }
5369
5370 #ifdef CONFIG_I40E_DCB
5371 /**
5372 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5373 * @pf: board private structure
5374 * @old_cfg: current DCB config
5375 * @new_cfg: new DCB config
5376 **/
5377 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5378 struct i40e_dcbx_config *old_cfg,
5379 struct i40e_dcbx_config *new_cfg)
5380 {
5381 bool need_reconfig = false;
5382
5383 /* Check if ETS configuration has changed */
5384 if (memcmp(&new_cfg->etscfg,
5385 &old_cfg->etscfg,
5386 sizeof(new_cfg->etscfg))) {
5387 /* If Priority Table has changed reconfig is needed */
5388 if (memcmp(&new_cfg->etscfg.prioritytable,
5389 &old_cfg->etscfg.prioritytable,
5390 sizeof(new_cfg->etscfg.prioritytable))) {
5391 need_reconfig = true;
5392 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5393 }
5394
5395 if (memcmp(&new_cfg->etscfg.tcbwtable,
5396 &old_cfg->etscfg.tcbwtable,
5397 sizeof(new_cfg->etscfg.tcbwtable)))
5398 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5399
5400 if (memcmp(&new_cfg->etscfg.tsatable,
5401 &old_cfg->etscfg.tsatable,
5402 sizeof(new_cfg->etscfg.tsatable)))
5403 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5404 }
5405
5406 /* Check if PFC configuration has changed */
5407 if (memcmp(&new_cfg->pfc,
5408 &old_cfg->pfc,
5409 sizeof(new_cfg->pfc))) {
5410 need_reconfig = true;
5411 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5412 }
5413
5414 /* Check if APP Table has changed */
5415 if (memcmp(&new_cfg->app,
5416 &old_cfg->app,
5417 sizeof(new_cfg->app))) {
5418 need_reconfig = true;
5419 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5420 }
5421
5422 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5423 return need_reconfig;
5424 }
5425
5426 /**
5427 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5428 * @pf: board private structure
5429 * @e: event info posted on ARQ
5430 **/
5431 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5432 struct i40e_arq_event_info *e)
5433 {
5434 struct i40e_aqc_lldp_get_mib *mib =
5435 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5436 struct i40e_hw *hw = &pf->hw;
5437 struct i40e_dcbx_config tmp_dcbx_cfg;
5438 bool need_reconfig = false;
5439 int ret = 0;
5440 u8 type;
5441
5442 /* Not DCB capable or capability disabled */
5443 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5444 return ret;
5445
5446 /* Ignore if event is not for Nearest Bridge */
5447 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5448 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5449 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5450 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5451 return ret;
5452
5453 /* Check MIB Type and return if event for Remote MIB update */
5454 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5455 dev_dbg(&pf->pdev->dev,
5456 "LLDP event mib type %s\n", type ? "remote" : "local");
5457 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5458 /* Update the remote cached instance and return */
5459 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5460 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5461 &hw->remote_dcbx_config);
5462 goto exit;
5463 }
5464
5465 /* Store the old configuration */
5466 tmp_dcbx_cfg = hw->local_dcbx_config;
5467
5468 /* Reset the old DCBx configuration data */
5469 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5470 /* Get updated DCBX data from firmware */
5471 ret = i40e_get_dcb_config(&pf->hw);
5472 if (ret) {
5473 dev_info(&pf->pdev->dev,
5474 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5475 i40e_stat_str(&pf->hw, ret),
5476 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5477 goto exit;
5478 }
5479
5480 /* No change detected in DCBX configs */
5481 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5482 sizeof(tmp_dcbx_cfg))) {
5483 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5484 goto exit;
5485 }
5486
5487 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5488 &hw->local_dcbx_config);
5489
5490 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5491
5492 if (!need_reconfig)
5493 goto exit;
5494
5495 /* Enable DCB tagging only when more than one TC */
5496 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5497 pf->flags |= I40E_FLAG_DCB_ENABLED;
5498 else
5499 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5500
5501 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5502 /* Reconfiguration needed quiesce all VSIs */
5503 i40e_pf_quiesce_all_vsi(pf);
5504
5505 /* Changes in configuration update VEB/VSI */
5506 i40e_dcb_reconfigure(pf);
5507
5508 ret = i40e_resume_port_tx(pf);
5509
5510 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5511 /* In case of error no point in resuming VSIs */
5512 if (ret)
5513 goto exit;
5514
5515 /* Wait for the PF's Tx queues to be disabled */
5516 ret = i40e_pf_wait_txq_disabled(pf);
5517 if (ret) {
5518 /* Schedule PF reset to recover */
5519 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5520 i40e_service_event_schedule(pf);
5521 } else {
5522 i40e_pf_unquiesce_all_vsi(pf);
5523 }
5524
5525 exit:
5526 return ret;
5527 }
5528 #endif /* CONFIG_I40E_DCB */
5529
5530 /**
5531 * i40e_do_reset_safe - Protected reset path for userland calls.
5532 * @pf: board private structure
5533 * @reset_flags: which reset is requested
5534 *
5535 **/
5536 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5537 {
5538 rtnl_lock();
5539 i40e_do_reset(pf, reset_flags);
5540 rtnl_unlock();
5541 }
5542
5543 /**
5544 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5545 * @pf: board private structure
5546 * @e: event info posted on ARQ
5547 *
5548 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5549 * and VF queues
5550 **/
5551 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5552 struct i40e_arq_event_info *e)
5553 {
5554 struct i40e_aqc_lan_overflow *data =
5555 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5556 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5557 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5558 struct i40e_hw *hw = &pf->hw;
5559 struct i40e_vf *vf;
5560 u16 vf_id;
5561
5562 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5563 queue, qtx_ctl);
5564
5565 /* Queue belongs to VF, find the VF and issue VF reset */
5566 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5567 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5568 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5569 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5570 vf_id -= hw->func_caps.vf_base_id;
5571 vf = &pf->vf[vf_id];
5572 i40e_vc_notify_vf_reset(vf);
5573 /* Allow VF to process pending reset notification */
5574 msleep(20);
5575 i40e_reset_vf(vf, false);
5576 }
5577 }
5578
5579 /**
5580 * i40e_service_event_complete - Finish up the service event
5581 * @pf: board private structure
5582 **/
5583 static void i40e_service_event_complete(struct i40e_pf *pf)
5584 {
5585 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5586
5587 /* flush memory to make sure state is correct before next watchog */
5588 smp_mb__before_atomic();
5589 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5590 }
5591
5592 /**
5593 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5594 * @pf: board private structure
5595 **/
5596 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5597 {
5598 u32 val, fcnt_prog;
5599
5600 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5601 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5602 return fcnt_prog;
5603 }
5604
5605 /**
5606 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5607 * @pf: board private structure
5608 **/
5609 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5610 {
5611 u32 val, fcnt_prog;
5612
5613 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5614 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5615 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5616 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5617 return fcnt_prog;
5618 }
5619
5620 /**
5621 * i40e_get_global_fd_count - Get total FD filters programmed on device
5622 * @pf: board private structure
5623 **/
5624 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5625 {
5626 u32 val, fcnt_prog;
5627
5628 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5629 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5630 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5631 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5632 return fcnt_prog;
5633 }
5634
5635 /**
5636 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5637 * @pf: board private structure
5638 **/
5639 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5640 {
5641 u32 fcnt_prog, fcnt_avail;
5642
5643 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5644 return;
5645
5646 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5647 * to re-enable
5648 */
5649 fcnt_prog = i40e_get_global_fd_count(pf);
5650 fcnt_avail = pf->fdir_pf_filter_count;
5651 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5652 (pf->fd_add_err == 0) ||
5653 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5654 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5655 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5656 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5657 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5658 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5659 }
5660 }
5661 /* Wait for some more space to be available to turn on ATR */
5662 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5663 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5664 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5665 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5666 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5667 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5668 }
5669 }
5670 }
5671
5672 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5673 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5674 /**
5675 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5676 * @pf: board private structure
5677 **/
5678 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5679 {
5680 unsigned long min_flush_time;
5681 int flush_wait_retry = 50;
5682 bool disable_atr = false;
5683 int fd_room;
5684 int reg;
5685
5686 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5687 return;
5688
5689 if (time_after(jiffies, pf->fd_flush_timestamp +
5690 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5691 /* If the flush is happening too quick and we have mostly
5692 * SB rules we should not re-enable ATR for some time.
5693 */
5694 min_flush_time = pf->fd_flush_timestamp
5695 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5696 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5697
5698 if (!(time_after(jiffies, min_flush_time)) &&
5699 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5700 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5701 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5702 disable_atr = true;
5703 }
5704
5705 pf->fd_flush_timestamp = jiffies;
5706 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5707 /* flush all filters */
5708 wr32(&pf->hw, I40E_PFQF_CTL_1,
5709 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5710 i40e_flush(&pf->hw);
5711 pf->fd_flush_cnt++;
5712 pf->fd_add_err = 0;
5713 do {
5714 /* Check FD flush status every 5-6msec */
5715 usleep_range(5000, 6000);
5716 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5717 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5718 break;
5719 } while (flush_wait_retry--);
5720 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5721 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5722 } else {
5723 /* replay sideband filters */
5724 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5725 if (!disable_atr)
5726 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5727 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5728 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5729 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5730 }
5731 }
5732 }
5733
5734 /**
5735 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5736 * @pf: board private structure
5737 **/
5738 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5739 {
5740 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5741 }
5742
5743 /* We can see up to 256 filter programming desc in transit if the filters are
5744 * being applied really fast; before we see the first
5745 * filter miss error on Rx queue 0. Accumulating enough error messages before
5746 * reacting will make sure we don't cause flush too often.
5747 */
5748 #define I40E_MAX_FD_PROGRAM_ERROR 256
5749
5750 /**
5751 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5752 * @pf: board private structure
5753 **/
5754 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5755 {
5756
5757 /* if interface is down do nothing */
5758 if (test_bit(__I40E_DOWN, &pf->state))
5759 return;
5760
5761 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5762 return;
5763
5764 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5765 i40e_fdir_flush_and_replay(pf);
5766
5767 i40e_fdir_check_and_reenable(pf);
5768
5769 }
5770
5771 /**
5772 * i40e_vsi_link_event - notify VSI of a link event
5773 * @vsi: vsi to be notified
5774 * @link_up: link up or down
5775 **/
5776 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5777 {
5778 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5779 return;
5780
5781 switch (vsi->type) {
5782 case I40E_VSI_MAIN:
5783 #ifdef I40E_FCOE
5784 case I40E_VSI_FCOE:
5785 #endif
5786 if (!vsi->netdev || !vsi->netdev_registered)
5787 break;
5788
5789 if (link_up) {
5790 netif_carrier_on(vsi->netdev);
5791 netif_tx_wake_all_queues(vsi->netdev);
5792 } else {
5793 netif_carrier_off(vsi->netdev);
5794 netif_tx_stop_all_queues(vsi->netdev);
5795 }
5796 break;
5797
5798 case I40E_VSI_SRIOV:
5799 case I40E_VSI_VMDQ2:
5800 case I40E_VSI_CTRL:
5801 case I40E_VSI_MIRROR:
5802 default:
5803 /* there is no notification for other VSIs */
5804 break;
5805 }
5806 }
5807
5808 /**
5809 * i40e_veb_link_event - notify elements on the veb of a link event
5810 * @veb: veb to be notified
5811 * @link_up: link up or down
5812 **/
5813 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5814 {
5815 struct i40e_pf *pf;
5816 int i;
5817
5818 if (!veb || !veb->pf)
5819 return;
5820 pf = veb->pf;
5821
5822 /* depth first... */
5823 for (i = 0; i < I40E_MAX_VEB; i++)
5824 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5825 i40e_veb_link_event(pf->veb[i], link_up);
5826
5827 /* ... now the local VSIs */
5828 for (i = 0; i < pf->num_alloc_vsi; i++)
5829 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5830 i40e_vsi_link_event(pf->vsi[i], link_up);
5831 }
5832
5833 /**
5834 * i40e_link_event - Update netif_carrier status
5835 * @pf: board private structure
5836 **/
5837 static void i40e_link_event(struct i40e_pf *pf)
5838 {
5839 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5840 u8 new_link_speed, old_link_speed;
5841 i40e_status status;
5842 bool new_link, old_link;
5843
5844 /* set this to force the get_link_status call to refresh state */
5845 pf->hw.phy.get_link_info = true;
5846
5847 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5848
5849 status = i40e_get_link_status(&pf->hw, &new_link);
5850 if (status) {
5851 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5852 status);
5853 return;
5854 }
5855
5856 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5857 new_link_speed = pf->hw.phy.link_info.link_speed;
5858
5859 if (new_link == old_link &&
5860 new_link_speed == old_link_speed &&
5861 (test_bit(__I40E_DOWN, &vsi->state) ||
5862 new_link == netif_carrier_ok(vsi->netdev)))
5863 return;
5864
5865 if (!test_bit(__I40E_DOWN, &vsi->state))
5866 i40e_print_link_message(vsi, new_link);
5867
5868 /* Notify the base of the switch tree connected to
5869 * the link. Floating VEBs are not notified.
5870 */
5871 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5872 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5873 else
5874 i40e_vsi_link_event(vsi, new_link);
5875
5876 if (pf->vf)
5877 i40e_vc_notify_link_state(pf);
5878
5879 if (pf->flags & I40E_FLAG_PTP)
5880 i40e_ptp_set_increment(pf);
5881 }
5882
5883 /**
5884 * i40e_watchdog_subtask - periodic checks not using event driven response
5885 * @pf: board private structure
5886 **/
5887 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5888 {
5889 int i;
5890
5891 /* if interface is down do nothing */
5892 if (test_bit(__I40E_DOWN, &pf->state) ||
5893 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5894 return;
5895
5896 /* make sure we don't do these things too often */
5897 if (time_before(jiffies, (pf->service_timer_previous +
5898 pf->service_timer_period)))
5899 return;
5900 pf->service_timer_previous = jiffies;
5901
5902 i40e_link_event(pf);
5903
5904 /* Update the stats for active netdevs so the network stack
5905 * can look at updated numbers whenever it cares to
5906 */
5907 for (i = 0; i < pf->num_alloc_vsi; i++)
5908 if (pf->vsi[i] && pf->vsi[i]->netdev)
5909 i40e_update_stats(pf->vsi[i]);
5910
5911 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5912 /* Update the stats for the active switching components */
5913 for (i = 0; i < I40E_MAX_VEB; i++)
5914 if (pf->veb[i])
5915 i40e_update_veb_stats(pf->veb[i]);
5916 }
5917
5918 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5919 }
5920
5921 /**
5922 * i40e_reset_subtask - Set up for resetting the device and driver
5923 * @pf: board private structure
5924 **/
5925 static void i40e_reset_subtask(struct i40e_pf *pf)
5926 {
5927 u32 reset_flags = 0;
5928
5929 rtnl_lock();
5930 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5931 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5932 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5933 }
5934 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5935 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5936 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5937 }
5938 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5939 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5940 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5941 }
5942 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5943 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5944 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5945 }
5946 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5947 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5948 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5949 }
5950
5951 /* If there's a recovery already waiting, it takes
5952 * precedence before starting a new reset sequence.
5953 */
5954 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5955 i40e_handle_reset_warning(pf);
5956 goto unlock;
5957 }
5958
5959 /* If we're already down or resetting, just bail */
5960 if (reset_flags &&
5961 !test_bit(__I40E_DOWN, &pf->state) &&
5962 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5963 i40e_do_reset(pf, reset_flags);
5964
5965 unlock:
5966 rtnl_unlock();
5967 }
5968
5969 /**
5970 * i40e_handle_link_event - Handle link event
5971 * @pf: board private structure
5972 * @e: event info posted on ARQ
5973 **/
5974 static void i40e_handle_link_event(struct i40e_pf *pf,
5975 struct i40e_arq_event_info *e)
5976 {
5977 struct i40e_hw *hw = &pf->hw;
5978 struct i40e_aqc_get_link_status *status =
5979 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5980
5981 /* save off old link status information */
5982 hw->phy.link_info_old = hw->phy.link_info;
5983
5984 /* Do a new status request to re-enable LSE reporting
5985 * and load new status information into the hw struct
5986 * This completely ignores any state information
5987 * in the ARQ event info, instead choosing to always
5988 * issue the AQ update link status command.
5989 */
5990 i40e_link_event(pf);
5991
5992 /* check for unqualified module, if link is down */
5993 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5994 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5995 (!(status->link_info & I40E_AQ_LINK_UP)))
5996 dev_err(&pf->pdev->dev,
5997 "The driver failed to link because an unqualified module was detected.\n");
5998 }
5999
6000 /**
6001 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6002 * @pf: board private structure
6003 **/
6004 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6005 {
6006 struct i40e_arq_event_info event;
6007 struct i40e_hw *hw = &pf->hw;
6008 u16 pending, i = 0;
6009 i40e_status ret;
6010 u16 opcode;
6011 u32 oldval;
6012 u32 val;
6013
6014 /* Do not run clean AQ when PF reset fails */
6015 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6016 return;
6017
6018 /* check for error indications */
6019 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6020 oldval = val;
6021 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6022 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6023 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6024 }
6025 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6026 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6027 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6028 }
6029 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6030 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6031 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6032 }
6033 if (oldval != val)
6034 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6035
6036 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6037 oldval = val;
6038 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6039 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6040 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6041 }
6042 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6043 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6044 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6045 }
6046 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6047 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6048 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6049 }
6050 if (oldval != val)
6051 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6052
6053 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6054 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6055 if (!event.msg_buf)
6056 return;
6057
6058 do {
6059 ret = i40e_clean_arq_element(hw, &event, &pending);
6060 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6061 break;
6062 else if (ret) {
6063 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6064 break;
6065 }
6066
6067 opcode = le16_to_cpu(event.desc.opcode);
6068 switch (opcode) {
6069
6070 case i40e_aqc_opc_get_link_status:
6071 i40e_handle_link_event(pf, &event);
6072 break;
6073 case i40e_aqc_opc_send_msg_to_pf:
6074 ret = i40e_vc_process_vf_msg(pf,
6075 le16_to_cpu(event.desc.retval),
6076 le32_to_cpu(event.desc.cookie_high),
6077 le32_to_cpu(event.desc.cookie_low),
6078 event.msg_buf,
6079 event.msg_len);
6080 break;
6081 case i40e_aqc_opc_lldp_update_mib:
6082 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6083 #ifdef CONFIG_I40E_DCB
6084 rtnl_lock();
6085 ret = i40e_handle_lldp_event(pf, &event);
6086 rtnl_unlock();
6087 #endif /* CONFIG_I40E_DCB */
6088 break;
6089 case i40e_aqc_opc_event_lan_overflow:
6090 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6091 i40e_handle_lan_overflow_event(pf, &event);
6092 break;
6093 case i40e_aqc_opc_send_msg_to_peer:
6094 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6095 break;
6096 case i40e_aqc_opc_nvm_erase:
6097 case i40e_aqc_opc_nvm_update:
6098 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6099 break;
6100 default:
6101 dev_info(&pf->pdev->dev,
6102 "ARQ Error: Unknown event 0x%04x received\n",
6103 opcode);
6104 break;
6105 }
6106 } while (pending && (i++ < pf->adminq_work_limit));
6107
6108 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6109 /* re-enable Admin queue interrupt cause */
6110 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6111 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6112 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6113 i40e_flush(hw);
6114
6115 kfree(event.msg_buf);
6116 }
6117
6118 /**
6119 * i40e_verify_eeprom - make sure eeprom is good to use
6120 * @pf: board private structure
6121 **/
6122 static void i40e_verify_eeprom(struct i40e_pf *pf)
6123 {
6124 int err;
6125
6126 err = i40e_diag_eeprom_test(&pf->hw);
6127 if (err) {
6128 /* retry in case of garbage read */
6129 err = i40e_diag_eeprom_test(&pf->hw);
6130 if (err) {
6131 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6132 err);
6133 set_bit(__I40E_BAD_EEPROM, &pf->state);
6134 }
6135 }
6136
6137 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6138 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6139 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6140 }
6141 }
6142
6143 /**
6144 * i40e_enable_pf_switch_lb
6145 * @pf: pointer to the PF structure
6146 *
6147 * enable switch loop back or die - no point in a return value
6148 **/
6149 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6150 {
6151 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6152 struct i40e_vsi_context ctxt;
6153 int ret;
6154
6155 ctxt.seid = pf->main_vsi_seid;
6156 ctxt.pf_num = pf->hw.pf_id;
6157 ctxt.vf_num = 0;
6158 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6159 if (ret) {
6160 dev_info(&pf->pdev->dev,
6161 "couldn't get PF vsi config, err %s aq_err %s\n",
6162 i40e_stat_str(&pf->hw, ret),
6163 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6164 return;
6165 }
6166 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6167 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6168 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6169
6170 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6171 if (ret) {
6172 dev_info(&pf->pdev->dev,
6173 "update vsi switch failed, err %s aq_err %s\n",
6174 i40e_stat_str(&pf->hw, ret),
6175 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6176 }
6177 }
6178
6179 /**
6180 * i40e_disable_pf_switch_lb
6181 * @pf: pointer to the PF structure
6182 *
6183 * disable switch loop back or die - no point in a return value
6184 **/
6185 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6186 {
6187 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6188 struct i40e_vsi_context ctxt;
6189 int ret;
6190
6191 ctxt.seid = pf->main_vsi_seid;
6192 ctxt.pf_num = pf->hw.pf_id;
6193 ctxt.vf_num = 0;
6194 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6195 if (ret) {
6196 dev_info(&pf->pdev->dev,
6197 "couldn't get PF vsi config, err %s aq_err %s\n",
6198 i40e_stat_str(&pf->hw, ret),
6199 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6200 return;
6201 }
6202 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6203 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6204 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6205
6206 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6207 if (ret) {
6208 dev_info(&pf->pdev->dev,
6209 "update vsi switch failed, err %s aq_err %s\n",
6210 i40e_stat_str(&pf->hw, ret),
6211 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6212 }
6213 }
6214
6215 /**
6216 * i40e_config_bridge_mode - Configure the HW bridge mode
6217 * @veb: pointer to the bridge instance
6218 *
6219 * Configure the loop back mode for the LAN VSI that is downlink to the
6220 * specified HW bridge instance. It is expected this function is called
6221 * when a new HW bridge is instantiated.
6222 **/
6223 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6224 {
6225 struct i40e_pf *pf = veb->pf;
6226
6227 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6228 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6229 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6230 i40e_disable_pf_switch_lb(pf);
6231 else
6232 i40e_enable_pf_switch_lb(pf);
6233 }
6234
6235 /**
6236 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6237 * @veb: pointer to the VEB instance
6238 *
6239 * This is a recursive function that first builds the attached VSIs then
6240 * recurses in to build the next layer of VEB. We track the connections
6241 * through our own index numbers because the seid's from the HW could
6242 * change across the reset.
6243 **/
6244 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6245 {
6246 struct i40e_vsi *ctl_vsi = NULL;
6247 struct i40e_pf *pf = veb->pf;
6248 int v, veb_idx;
6249 int ret;
6250
6251 /* build VSI that owns this VEB, temporarily attached to base VEB */
6252 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6253 if (pf->vsi[v] &&
6254 pf->vsi[v]->veb_idx == veb->idx &&
6255 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6256 ctl_vsi = pf->vsi[v];
6257 break;
6258 }
6259 }
6260 if (!ctl_vsi) {
6261 dev_info(&pf->pdev->dev,
6262 "missing owner VSI for veb_idx %d\n", veb->idx);
6263 ret = -ENOENT;
6264 goto end_reconstitute;
6265 }
6266 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6267 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6268 ret = i40e_add_vsi(ctl_vsi);
6269 if (ret) {
6270 dev_info(&pf->pdev->dev,
6271 "rebuild of veb_idx %d owner VSI failed: %d\n",
6272 veb->idx, ret);
6273 goto end_reconstitute;
6274 }
6275 i40e_vsi_reset_stats(ctl_vsi);
6276
6277 /* create the VEB in the switch and move the VSI onto the VEB */
6278 ret = i40e_add_veb(veb, ctl_vsi);
6279 if (ret)
6280 goto end_reconstitute;
6281
6282 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6283 veb->bridge_mode = BRIDGE_MODE_VEB;
6284 else
6285 veb->bridge_mode = BRIDGE_MODE_VEPA;
6286 i40e_config_bridge_mode(veb);
6287
6288 /* create the remaining VSIs attached to this VEB */
6289 for (v = 0; v < pf->num_alloc_vsi; v++) {
6290 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6291 continue;
6292
6293 if (pf->vsi[v]->veb_idx == veb->idx) {
6294 struct i40e_vsi *vsi = pf->vsi[v];
6295 vsi->uplink_seid = veb->seid;
6296 ret = i40e_add_vsi(vsi);
6297 if (ret) {
6298 dev_info(&pf->pdev->dev,
6299 "rebuild of vsi_idx %d failed: %d\n",
6300 v, ret);
6301 goto end_reconstitute;
6302 }
6303 i40e_vsi_reset_stats(vsi);
6304 }
6305 }
6306
6307 /* create any VEBs attached to this VEB - RECURSION */
6308 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6309 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6310 pf->veb[veb_idx]->uplink_seid = veb->seid;
6311 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6312 if (ret)
6313 break;
6314 }
6315 }
6316
6317 end_reconstitute:
6318 return ret;
6319 }
6320
6321 /**
6322 * i40e_get_capabilities - get info about the HW
6323 * @pf: the PF struct
6324 **/
6325 static int i40e_get_capabilities(struct i40e_pf *pf)
6326 {
6327 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6328 u16 data_size;
6329 int buf_len;
6330 int err;
6331
6332 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6333 do {
6334 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6335 if (!cap_buf)
6336 return -ENOMEM;
6337
6338 /* this loads the data into the hw struct for us */
6339 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6340 &data_size,
6341 i40e_aqc_opc_list_func_capabilities,
6342 NULL);
6343 /* data loaded, buffer no longer needed */
6344 kfree(cap_buf);
6345
6346 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6347 /* retry with a larger buffer */
6348 buf_len = data_size;
6349 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6350 dev_info(&pf->pdev->dev,
6351 "capability discovery failed, err %s aq_err %s\n",
6352 i40e_stat_str(&pf->hw, err),
6353 i40e_aq_str(&pf->hw,
6354 pf->hw.aq.asq_last_status));
6355 return -ENODEV;
6356 }
6357 } while (err);
6358
6359 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6360 (pf->hw.aq.fw_maj_ver < 2)) {
6361 pf->hw.func_caps.num_msix_vectors++;
6362 pf->hw.func_caps.num_msix_vectors_vf++;
6363 }
6364
6365 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6366 dev_info(&pf->pdev->dev,
6367 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6368 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6369 pf->hw.func_caps.num_msix_vectors,
6370 pf->hw.func_caps.num_msix_vectors_vf,
6371 pf->hw.func_caps.fd_filters_guaranteed,
6372 pf->hw.func_caps.fd_filters_best_effort,
6373 pf->hw.func_caps.num_tx_qp,
6374 pf->hw.func_caps.num_vsis);
6375
6376 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6377 + pf->hw.func_caps.num_vfs)
6378 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6379 dev_info(&pf->pdev->dev,
6380 "got num_vsis %d, setting num_vsis to %d\n",
6381 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6382 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6383 }
6384
6385 return 0;
6386 }
6387
6388 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6389
6390 /**
6391 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6392 * @pf: board private structure
6393 **/
6394 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6395 {
6396 struct i40e_vsi *vsi;
6397 int i;
6398
6399 /* quick workaround for an NVM issue that leaves a critical register
6400 * uninitialized
6401 */
6402 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6403 static const u32 hkey[] = {
6404 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6405 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6406 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6407 0x95b3a76d};
6408
6409 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6410 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6411 }
6412
6413 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6414 return;
6415
6416 /* find existing VSI and see if it needs configuring */
6417 vsi = NULL;
6418 for (i = 0; i < pf->num_alloc_vsi; i++) {
6419 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6420 vsi = pf->vsi[i];
6421 break;
6422 }
6423 }
6424
6425 /* create a new VSI if none exists */
6426 if (!vsi) {
6427 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6428 pf->vsi[pf->lan_vsi]->seid, 0);
6429 if (!vsi) {
6430 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6431 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6432 return;
6433 }
6434 }
6435
6436 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6437 }
6438
6439 /**
6440 * i40e_fdir_teardown - release the Flow Director resources
6441 * @pf: board private structure
6442 **/
6443 static void i40e_fdir_teardown(struct i40e_pf *pf)
6444 {
6445 int i;
6446
6447 i40e_fdir_filter_exit(pf);
6448 for (i = 0; i < pf->num_alloc_vsi; i++) {
6449 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6450 i40e_vsi_release(pf->vsi[i]);
6451 break;
6452 }
6453 }
6454 }
6455
6456 /**
6457 * i40e_prep_for_reset - prep for the core to reset
6458 * @pf: board private structure
6459 *
6460 * Close up the VFs and other things in prep for PF Reset.
6461 **/
6462 static void i40e_prep_for_reset(struct i40e_pf *pf)
6463 {
6464 struct i40e_hw *hw = &pf->hw;
6465 i40e_status ret = 0;
6466 u32 v;
6467
6468 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6469 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6470 return;
6471
6472 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6473
6474 /* quiesce the VSIs and their queues that are not already DOWN */
6475 i40e_pf_quiesce_all_vsi(pf);
6476
6477 for (v = 0; v < pf->num_alloc_vsi; v++) {
6478 if (pf->vsi[v])
6479 pf->vsi[v]->seid = 0;
6480 }
6481
6482 i40e_shutdown_adminq(&pf->hw);
6483
6484 /* call shutdown HMC */
6485 if (hw->hmc.hmc_obj) {
6486 ret = i40e_shutdown_lan_hmc(hw);
6487 if (ret)
6488 dev_warn(&pf->pdev->dev,
6489 "shutdown_lan_hmc failed: %d\n", ret);
6490 }
6491 }
6492
6493 /**
6494 * i40e_send_version - update firmware with driver version
6495 * @pf: PF struct
6496 */
6497 static void i40e_send_version(struct i40e_pf *pf)
6498 {
6499 struct i40e_driver_version dv;
6500
6501 dv.major_version = DRV_VERSION_MAJOR;
6502 dv.minor_version = DRV_VERSION_MINOR;
6503 dv.build_version = DRV_VERSION_BUILD;
6504 dv.subbuild_version = 0;
6505 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6506 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6507 }
6508
6509 /**
6510 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6511 * @pf: board private structure
6512 * @reinit: if the Main VSI needs to re-initialized.
6513 **/
6514 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6515 {
6516 struct i40e_hw *hw = &pf->hw;
6517 u8 set_fc_aq_fail = 0;
6518 i40e_status ret;
6519 u32 v;
6520
6521 /* Now we wait for GRST to settle out.
6522 * We don't have to delete the VEBs or VSIs from the hw switch
6523 * because the reset will make them disappear.
6524 */
6525 ret = i40e_pf_reset(hw);
6526 if (ret) {
6527 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6528 set_bit(__I40E_RESET_FAILED, &pf->state);
6529 goto clear_recovery;
6530 }
6531 pf->pfr_count++;
6532
6533 if (test_bit(__I40E_DOWN, &pf->state))
6534 goto clear_recovery;
6535 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6536
6537 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6538 ret = i40e_init_adminq(&pf->hw);
6539 if (ret) {
6540 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6541 i40e_stat_str(&pf->hw, ret),
6542 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6543 goto clear_recovery;
6544 }
6545
6546 /* re-verify the eeprom if we just had an EMP reset */
6547 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6548 i40e_verify_eeprom(pf);
6549
6550 i40e_clear_pxe_mode(hw);
6551 ret = i40e_get_capabilities(pf);
6552 if (ret)
6553 goto end_core_reset;
6554
6555 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6556 hw->func_caps.num_rx_qp,
6557 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6558 if (ret) {
6559 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6560 goto end_core_reset;
6561 }
6562 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6563 if (ret) {
6564 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6565 goto end_core_reset;
6566 }
6567
6568 #ifdef CONFIG_I40E_DCB
6569 ret = i40e_init_pf_dcb(pf);
6570 if (ret) {
6571 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6572 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6573 /* Continue without DCB enabled */
6574 }
6575 #endif /* CONFIG_I40E_DCB */
6576 #ifdef I40E_FCOE
6577 i40e_init_pf_fcoe(pf);
6578
6579 #endif
6580 /* do basic switch setup */
6581 ret = i40e_setup_pf_switch(pf, reinit);
6582 if (ret)
6583 goto end_core_reset;
6584
6585 /* driver is only interested in link up/down and module qualification
6586 * reports from firmware
6587 */
6588 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6589 I40E_AQ_EVENT_LINK_UPDOWN |
6590 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6591 if (ret)
6592 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6593 i40e_stat_str(&pf->hw, ret),
6594 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6595
6596 /* make sure our flow control settings are restored */
6597 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6598 if (ret)
6599 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6600 i40e_stat_str(&pf->hw, ret),
6601 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6602
6603 /* Rebuild the VSIs and VEBs that existed before reset.
6604 * They are still in our local switch element arrays, so only
6605 * need to rebuild the switch model in the HW.
6606 *
6607 * If there were VEBs but the reconstitution failed, we'll try
6608 * try to recover minimal use by getting the basic PF VSI working.
6609 */
6610 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6611 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6612 /* find the one VEB connected to the MAC, and find orphans */
6613 for (v = 0; v < I40E_MAX_VEB; v++) {
6614 if (!pf->veb[v])
6615 continue;
6616
6617 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6618 pf->veb[v]->uplink_seid == 0) {
6619 ret = i40e_reconstitute_veb(pf->veb[v]);
6620
6621 if (!ret)
6622 continue;
6623
6624 /* If Main VEB failed, we're in deep doodoo,
6625 * so give up rebuilding the switch and set up
6626 * for minimal rebuild of PF VSI.
6627 * If orphan failed, we'll report the error
6628 * but try to keep going.
6629 */
6630 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6631 dev_info(&pf->pdev->dev,
6632 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6633 ret);
6634 pf->vsi[pf->lan_vsi]->uplink_seid
6635 = pf->mac_seid;
6636 break;
6637 } else if (pf->veb[v]->uplink_seid == 0) {
6638 dev_info(&pf->pdev->dev,
6639 "rebuild of orphan VEB failed: %d\n",
6640 ret);
6641 }
6642 }
6643 }
6644 }
6645
6646 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6647 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6648 /* no VEB, so rebuild only the Main VSI */
6649 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6650 if (ret) {
6651 dev_info(&pf->pdev->dev,
6652 "rebuild of Main VSI failed: %d\n", ret);
6653 goto end_core_reset;
6654 }
6655 }
6656
6657 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6658 (pf->hw.aq.fw_maj_ver < 4)) {
6659 msleep(75);
6660 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6661 if (ret)
6662 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6663 i40e_stat_str(&pf->hw, ret),
6664 i40e_aq_str(&pf->hw,
6665 pf->hw.aq.asq_last_status));
6666 }
6667 /* reinit the misc interrupt */
6668 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6669 ret = i40e_setup_misc_vector(pf);
6670
6671 /* restart the VSIs that were rebuilt and running before the reset */
6672 i40e_pf_unquiesce_all_vsi(pf);
6673
6674 if (pf->num_alloc_vfs) {
6675 for (v = 0; v < pf->num_alloc_vfs; v++)
6676 i40e_reset_vf(&pf->vf[v], true);
6677 }
6678
6679 /* tell the firmware that we're starting */
6680 i40e_send_version(pf);
6681
6682 end_core_reset:
6683 clear_bit(__I40E_RESET_FAILED, &pf->state);
6684 clear_recovery:
6685 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6686 }
6687
6688 /**
6689 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6690 * @pf: board private structure
6691 *
6692 * Close up the VFs and other things in prep for a Core Reset,
6693 * then get ready to rebuild the world.
6694 **/
6695 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6696 {
6697 i40e_prep_for_reset(pf);
6698 i40e_reset_and_rebuild(pf, false);
6699 }
6700
6701 /**
6702 * i40e_handle_mdd_event
6703 * @pf: pointer to the PF structure
6704 *
6705 * Called from the MDD irq handler to identify possibly malicious vfs
6706 **/
6707 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6708 {
6709 struct i40e_hw *hw = &pf->hw;
6710 bool mdd_detected = false;
6711 bool pf_mdd_detected = false;
6712 struct i40e_vf *vf;
6713 u32 reg;
6714 int i;
6715
6716 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6717 return;
6718
6719 /* find what triggered the MDD event */
6720 reg = rd32(hw, I40E_GL_MDET_TX);
6721 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6722 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6723 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6724 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6725 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6726 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6727 I40E_GL_MDET_TX_EVENT_SHIFT;
6728 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6729 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6730 pf->hw.func_caps.base_queue;
6731 if (netif_msg_tx_err(pf))
6732 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6733 event, queue, pf_num, vf_num);
6734 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6735 mdd_detected = true;
6736 }
6737 reg = rd32(hw, I40E_GL_MDET_RX);
6738 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6739 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6740 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6741 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6742 I40E_GL_MDET_RX_EVENT_SHIFT;
6743 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6744 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6745 pf->hw.func_caps.base_queue;
6746 if (netif_msg_rx_err(pf))
6747 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6748 event, queue, func);
6749 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6750 mdd_detected = true;
6751 }
6752
6753 if (mdd_detected) {
6754 reg = rd32(hw, I40E_PF_MDET_TX);
6755 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6756 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6757 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6758 pf_mdd_detected = true;
6759 }
6760 reg = rd32(hw, I40E_PF_MDET_RX);
6761 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6762 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6763 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6764 pf_mdd_detected = true;
6765 }
6766 /* Queue belongs to the PF, initiate a reset */
6767 if (pf_mdd_detected) {
6768 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6769 i40e_service_event_schedule(pf);
6770 }
6771 }
6772
6773 /* see if one of the VFs needs its hand slapped */
6774 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6775 vf = &(pf->vf[i]);
6776 reg = rd32(hw, I40E_VP_MDET_TX(i));
6777 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6778 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6779 vf->num_mdd_events++;
6780 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6781 i);
6782 }
6783
6784 reg = rd32(hw, I40E_VP_MDET_RX(i));
6785 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6786 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6787 vf->num_mdd_events++;
6788 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6789 i);
6790 }
6791
6792 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6793 dev_info(&pf->pdev->dev,
6794 "Too many MDD events on VF %d, disabled\n", i);
6795 dev_info(&pf->pdev->dev,
6796 "Use PF Control I/F to re-enable the VF\n");
6797 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6798 }
6799 }
6800
6801 /* re-enable mdd interrupt cause */
6802 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6803 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6804 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6805 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6806 i40e_flush(hw);
6807 }
6808
6809 #ifdef CONFIG_I40E_VXLAN
6810 /**
6811 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6812 * @pf: board private structure
6813 **/
6814 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6815 {
6816 struct i40e_hw *hw = &pf->hw;
6817 i40e_status ret;
6818 __be16 port;
6819 int i;
6820
6821 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6822 return;
6823
6824 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6825
6826 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6827 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6828 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6829 port = pf->vxlan_ports[i];
6830 if (port)
6831 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6832 I40E_AQC_TUNNEL_TYPE_VXLAN,
6833 NULL, NULL);
6834 else
6835 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6836
6837 if (ret) {
6838 dev_info(&pf->pdev->dev,
6839 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6840 port ? "add" : "delete",
6841 ntohs(port), i,
6842 i40e_stat_str(&pf->hw, ret),
6843 i40e_aq_str(&pf->hw,
6844 pf->hw.aq.asq_last_status));
6845 pf->vxlan_ports[i] = 0;
6846 }
6847 }
6848 }
6849 }
6850
6851 #endif
6852 /**
6853 * i40e_service_task - Run the driver's async subtasks
6854 * @work: pointer to work_struct containing our data
6855 **/
6856 static void i40e_service_task(struct work_struct *work)
6857 {
6858 struct i40e_pf *pf = container_of(work,
6859 struct i40e_pf,
6860 service_task);
6861 unsigned long start_time = jiffies;
6862
6863 /* don't bother with service tasks if a reset is in progress */
6864 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6865 i40e_service_event_complete(pf);
6866 return;
6867 }
6868
6869 i40e_detect_recover_hung(pf);
6870 i40e_reset_subtask(pf);
6871 i40e_handle_mdd_event(pf);
6872 i40e_vc_process_vflr_event(pf);
6873 i40e_watchdog_subtask(pf);
6874 i40e_fdir_reinit_subtask(pf);
6875 i40e_sync_filters_subtask(pf);
6876 #ifdef CONFIG_I40E_VXLAN
6877 i40e_sync_vxlan_filters_subtask(pf);
6878 #endif
6879 i40e_clean_adminq_subtask(pf);
6880
6881 i40e_service_event_complete(pf);
6882
6883 /* If the tasks have taken longer than one timer cycle or there
6884 * is more work to be done, reschedule the service task now
6885 * rather than wait for the timer to tick again.
6886 */
6887 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6888 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6889 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6890 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6891 i40e_service_event_schedule(pf);
6892 }
6893
6894 /**
6895 * i40e_service_timer - timer callback
6896 * @data: pointer to PF struct
6897 **/
6898 static void i40e_service_timer(unsigned long data)
6899 {
6900 struct i40e_pf *pf = (struct i40e_pf *)data;
6901
6902 mod_timer(&pf->service_timer,
6903 round_jiffies(jiffies + pf->service_timer_period));
6904 i40e_service_event_schedule(pf);
6905 }
6906
6907 /**
6908 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6909 * @vsi: the VSI being configured
6910 **/
6911 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6912 {
6913 struct i40e_pf *pf = vsi->back;
6914
6915 switch (vsi->type) {
6916 case I40E_VSI_MAIN:
6917 vsi->alloc_queue_pairs = pf->num_lan_qps;
6918 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6919 I40E_REQ_DESCRIPTOR_MULTIPLE);
6920 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6921 vsi->num_q_vectors = pf->num_lan_msix;
6922 else
6923 vsi->num_q_vectors = 1;
6924
6925 break;
6926
6927 case I40E_VSI_FDIR:
6928 vsi->alloc_queue_pairs = 1;
6929 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6930 I40E_REQ_DESCRIPTOR_MULTIPLE);
6931 vsi->num_q_vectors = 1;
6932 break;
6933
6934 case I40E_VSI_VMDQ2:
6935 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6936 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6937 I40E_REQ_DESCRIPTOR_MULTIPLE);
6938 vsi->num_q_vectors = pf->num_vmdq_msix;
6939 break;
6940
6941 case I40E_VSI_SRIOV:
6942 vsi->alloc_queue_pairs = pf->num_vf_qps;
6943 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6944 I40E_REQ_DESCRIPTOR_MULTIPLE);
6945 break;
6946
6947 #ifdef I40E_FCOE
6948 case I40E_VSI_FCOE:
6949 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6950 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6951 I40E_REQ_DESCRIPTOR_MULTIPLE);
6952 vsi->num_q_vectors = pf->num_fcoe_msix;
6953 break;
6954
6955 #endif /* I40E_FCOE */
6956 default:
6957 WARN_ON(1);
6958 return -ENODATA;
6959 }
6960
6961 return 0;
6962 }
6963
6964 /**
6965 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6966 * @type: VSI pointer
6967 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6968 *
6969 * On error: returns error code (negative)
6970 * On success: returns 0
6971 **/
6972 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6973 {
6974 int size;
6975 int ret = 0;
6976
6977 /* allocate memory for both Tx and Rx ring pointers */
6978 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6979 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6980 if (!vsi->tx_rings)
6981 return -ENOMEM;
6982 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6983
6984 if (alloc_qvectors) {
6985 /* allocate memory for q_vector pointers */
6986 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6987 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6988 if (!vsi->q_vectors) {
6989 ret = -ENOMEM;
6990 goto err_vectors;
6991 }
6992 }
6993 return ret;
6994
6995 err_vectors:
6996 kfree(vsi->tx_rings);
6997 return ret;
6998 }
6999
7000 /**
7001 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7002 * @pf: board private structure
7003 * @type: type of VSI
7004 *
7005 * On error: returns error code (negative)
7006 * On success: returns vsi index in PF (positive)
7007 **/
7008 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7009 {
7010 int ret = -ENODEV;
7011 struct i40e_vsi *vsi;
7012 int vsi_idx;
7013 int i;
7014
7015 /* Need to protect the allocation of the VSIs at the PF level */
7016 mutex_lock(&pf->switch_mutex);
7017
7018 /* VSI list may be fragmented if VSI creation/destruction has
7019 * been happening. We can afford to do a quick scan to look
7020 * for any free VSIs in the list.
7021 *
7022 * find next empty vsi slot, looping back around if necessary
7023 */
7024 i = pf->next_vsi;
7025 while (i < pf->num_alloc_vsi && pf->vsi[i])
7026 i++;
7027 if (i >= pf->num_alloc_vsi) {
7028 i = 0;
7029 while (i < pf->next_vsi && pf->vsi[i])
7030 i++;
7031 }
7032
7033 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7034 vsi_idx = i; /* Found one! */
7035 } else {
7036 ret = -ENODEV;
7037 goto unlock_pf; /* out of VSI slots! */
7038 }
7039 pf->next_vsi = ++i;
7040
7041 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7042 if (!vsi) {
7043 ret = -ENOMEM;
7044 goto unlock_pf;
7045 }
7046 vsi->type = type;
7047 vsi->back = pf;
7048 set_bit(__I40E_DOWN, &vsi->state);
7049 vsi->flags = 0;
7050 vsi->idx = vsi_idx;
7051 vsi->rx_itr_setting = pf->rx_itr_default;
7052 vsi->tx_itr_setting = pf->tx_itr_default;
7053 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7054 pf->rss_table_size : 64;
7055 vsi->netdev_registered = false;
7056 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7057 INIT_LIST_HEAD(&vsi->mac_filter_list);
7058 vsi->irqs_ready = false;
7059
7060 ret = i40e_set_num_rings_in_vsi(vsi);
7061 if (ret)
7062 goto err_rings;
7063
7064 ret = i40e_vsi_alloc_arrays(vsi, true);
7065 if (ret)
7066 goto err_rings;
7067
7068 /* Setup default MSIX irq handler for VSI */
7069 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7070
7071 pf->vsi[vsi_idx] = vsi;
7072 ret = vsi_idx;
7073 goto unlock_pf;
7074
7075 err_rings:
7076 pf->next_vsi = i - 1;
7077 kfree(vsi);
7078 unlock_pf:
7079 mutex_unlock(&pf->switch_mutex);
7080 return ret;
7081 }
7082
7083 /**
7084 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7085 * @type: VSI pointer
7086 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7087 *
7088 * On error: returns error code (negative)
7089 * On success: returns 0
7090 **/
7091 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7092 {
7093 /* free the ring and vector containers */
7094 if (free_qvectors) {
7095 kfree(vsi->q_vectors);
7096 vsi->q_vectors = NULL;
7097 }
7098 kfree(vsi->tx_rings);
7099 vsi->tx_rings = NULL;
7100 vsi->rx_rings = NULL;
7101 }
7102
7103 /**
7104 * i40e_vsi_clear - Deallocate the VSI provided
7105 * @vsi: the VSI being un-configured
7106 **/
7107 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7108 {
7109 struct i40e_pf *pf;
7110
7111 if (!vsi)
7112 return 0;
7113
7114 if (!vsi->back)
7115 goto free_vsi;
7116 pf = vsi->back;
7117
7118 mutex_lock(&pf->switch_mutex);
7119 if (!pf->vsi[vsi->idx]) {
7120 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7121 vsi->idx, vsi->idx, vsi, vsi->type);
7122 goto unlock_vsi;
7123 }
7124
7125 if (pf->vsi[vsi->idx] != vsi) {
7126 dev_err(&pf->pdev->dev,
7127 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7128 pf->vsi[vsi->idx]->idx,
7129 pf->vsi[vsi->idx],
7130 pf->vsi[vsi->idx]->type,
7131 vsi->idx, vsi, vsi->type);
7132 goto unlock_vsi;
7133 }
7134
7135 /* updates the PF for this cleared vsi */
7136 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7137 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7138
7139 i40e_vsi_free_arrays(vsi, true);
7140
7141 pf->vsi[vsi->idx] = NULL;
7142 if (vsi->idx < pf->next_vsi)
7143 pf->next_vsi = vsi->idx;
7144
7145 unlock_vsi:
7146 mutex_unlock(&pf->switch_mutex);
7147 free_vsi:
7148 kfree(vsi);
7149
7150 return 0;
7151 }
7152
7153 /**
7154 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7155 * @vsi: the VSI being cleaned
7156 **/
7157 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7158 {
7159 int i;
7160
7161 if (vsi->tx_rings && vsi->tx_rings[0]) {
7162 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7163 kfree_rcu(vsi->tx_rings[i], rcu);
7164 vsi->tx_rings[i] = NULL;
7165 vsi->rx_rings[i] = NULL;
7166 }
7167 }
7168 }
7169
7170 /**
7171 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7172 * @vsi: the VSI being configured
7173 **/
7174 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7175 {
7176 struct i40e_ring *tx_ring, *rx_ring;
7177 struct i40e_pf *pf = vsi->back;
7178 int i;
7179
7180 /* Set basic values in the rings to be used later during open() */
7181 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7182 /* allocate space for both Tx and Rx in one shot */
7183 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7184 if (!tx_ring)
7185 goto err_out;
7186
7187 tx_ring->queue_index = i;
7188 tx_ring->reg_idx = vsi->base_queue + i;
7189 tx_ring->ring_active = false;
7190 tx_ring->vsi = vsi;
7191 tx_ring->netdev = vsi->netdev;
7192 tx_ring->dev = &pf->pdev->dev;
7193 tx_ring->count = vsi->num_desc;
7194 tx_ring->size = 0;
7195 tx_ring->dcb_tc = 0;
7196 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7197 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7198 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7199 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7200 vsi->tx_rings[i] = tx_ring;
7201
7202 rx_ring = &tx_ring[1];
7203 rx_ring->queue_index = i;
7204 rx_ring->reg_idx = vsi->base_queue + i;
7205 rx_ring->ring_active = false;
7206 rx_ring->vsi = vsi;
7207 rx_ring->netdev = vsi->netdev;
7208 rx_ring->dev = &pf->pdev->dev;
7209 rx_ring->count = vsi->num_desc;
7210 rx_ring->size = 0;
7211 rx_ring->dcb_tc = 0;
7212 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7213 set_ring_16byte_desc_enabled(rx_ring);
7214 else
7215 clear_ring_16byte_desc_enabled(rx_ring);
7216 vsi->rx_rings[i] = rx_ring;
7217 }
7218
7219 return 0;
7220
7221 err_out:
7222 i40e_vsi_clear_rings(vsi);
7223 return -ENOMEM;
7224 }
7225
7226 /**
7227 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7228 * @pf: board private structure
7229 * @vectors: the number of MSI-X vectors to request
7230 *
7231 * Returns the number of vectors reserved, or error
7232 **/
7233 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7234 {
7235 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7236 I40E_MIN_MSIX, vectors);
7237 if (vectors < 0) {
7238 dev_info(&pf->pdev->dev,
7239 "MSI-X vector reservation failed: %d\n", vectors);
7240 vectors = 0;
7241 }
7242
7243 return vectors;
7244 }
7245
7246 /**
7247 * i40e_init_msix - Setup the MSIX capability
7248 * @pf: board private structure
7249 *
7250 * Work with the OS to set up the MSIX vectors needed.
7251 *
7252 * Returns the number of vectors reserved or negative on failure
7253 **/
7254 static int i40e_init_msix(struct i40e_pf *pf)
7255 {
7256 struct i40e_hw *hw = &pf->hw;
7257 int vectors_left;
7258 int v_budget, i;
7259 int v_actual;
7260
7261 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7262 return -ENODEV;
7263
7264 /* The number of vectors we'll request will be comprised of:
7265 * - Add 1 for "other" cause for Admin Queue events, etc.
7266 * - The number of LAN queue pairs
7267 * - Queues being used for RSS.
7268 * We don't need as many as max_rss_size vectors.
7269 * use rss_size instead in the calculation since that
7270 * is governed by number of cpus in the system.
7271 * - assumes symmetric Tx/Rx pairing
7272 * - The number of VMDq pairs
7273 #ifdef I40E_FCOE
7274 * - The number of FCOE qps.
7275 #endif
7276 * Once we count this up, try the request.
7277 *
7278 * If we can't get what we want, we'll simplify to nearly nothing
7279 * and try again. If that still fails, we punt.
7280 */
7281 vectors_left = hw->func_caps.num_msix_vectors;
7282 v_budget = 0;
7283
7284 /* reserve one vector for miscellaneous handler */
7285 if (vectors_left) {
7286 v_budget++;
7287 vectors_left--;
7288 }
7289
7290 /* reserve vectors for the main PF traffic queues */
7291 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7292 vectors_left -= pf->num_lan_msix;
7293 v_budget += pf->num_lan_msix;
7294
7295 /* reserve one vector for sideband flow director */
7296 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7297 if (vectors_left) {
7298 v_budget++;
7299 vectors_left--;
7300 } else {
7301 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7302 }
7303 }
7304
7305 #ifdef I40E_FCOE
7306 /* can we reserve enough for FCoE? */
7307 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7308 if (!vectors_left)
7309 pf->num_fcoe_msix = 0;
7310 else if (vectors_left >= pf->num_fcoe_qps)
7311 pf->num_fcoe_msix = pf->num_fcoe_qps;
7312 else
7313 pf->num_fcoe_msix = 1;
7314 v_budget += pf->num_fcoe_msix;
7315 vectors_left -= pf->num_fcoe_msix;
7316 }
7317
7318 #endif
7319 /* any vectors left over go for VMDq support */
7320 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7321 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7322 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7323
7324 /* if we're short on vectors for what's desired, we limit
7325 * the queues per vmdq. If this is still more than are
7326 * available, the user will need to change the number of
7327 * queues/vectors used by the PF later with the ethtool
7328 * channels command
7329 */
7330 if (vmdq_vecs < vmdq_vecs_wanted)
7331 pf->num_vmdq_qps = 1;
7332 pf->num_vmdq_msix = pf->num_vmdq_qps;
7333
7334 v_budget += vmdq_vecs;
7335 vectors_left -= vmdq_vecs;
7336 }
7337
7338 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7339 GFP_KERNEL);
7340 if (!pf->msix_entries)
7341 return -ENOMEM;
7342
7343 for (i = 0; i < v_budget; i++)
7344 pf->msix_entries[i].entry = i;
7345 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7346
7347 if (v_actual != v_budget) {
7348 /* If we have limited resources, we will start with no vectors
7349 * for the special features and then allocate vectors to some
7350 * of these features based on the policy and at the end disable
7351 * the features that did not get any vectors.
7352 */
7353 #ifdef I40E_FCOE
7354 pf->num_fcoe_qps = 0;
7355 pf->num_fcoe_msix = 0;
7356 #endif
7357 pf->num_vmdq_msix = 0;
7358 }
7359
7360 if (v_actual < I40E_MIN_MSIX) {
7361 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7362 kfree(pf->msix_entries);
7363 pf->msix_entries = NULL;
7364 return -ENODEV;
7365
7366 } else if (v_actual == I40E_MIN_MSIX) {
7367 /* Adjust for minimal MSIX use */
7368 pf->num_vmdq_vsis = 0;
7369 pf->num_vmdq_qps = 0;
7370 pf->num_lan_qps = 1;
7371 pf->num_lan_msix = 1;
7372
7373 } else if (v_actual != v_budget) {
7374 int vec;
7375
7376 /* reserve the misc vector */
7377 vec = v_actual - 1;
7378
7379 /* Scale vector usage down */
7380 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7381 pf->num_vmdq_vsis = 1;
7382 pf->num_vmdq_qps = 1;
7383 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7384
7385 /* partition out the remaining vectors */
7386 switch (vec) {
7387 case 2:
7388 pf->num_lan_msix = 1;
7389 break;
7390 case 3:
7391 #ifdef I40E_FCOE
7392 /* give one vector to FCoE */
7393 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7394 pf->num_lan_msix = 1;
7395 pf->num_fcoe_msix = 1;
7396 }
7397 #else
7398 pf->num_lan_msix = 2;
7399 #endif
7400 break;
7401 default:
7402 #ifdef I40E_FCOE
7403 /* give one vector to FCoE */
7404 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7405 pf->num_fcoe_msix = 1;
7406 vec--;
7407 }
7408 #endif
7409 /* give the rest to the PF */
7410 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7411 break;
7412 }
7413 }
7414
7415 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7416 (pf->num_vmdq_msix == 0)) {
7417 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7418 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7419 }
7420 #ifdef I40E_FCOE
7421
7422 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7423 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7424 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7425 }
7426 #endif
7427 return v_actual;
7428 }
7429
7430 /**
7431 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7432 * @vsi: the VSI being configured
7433 * @v_idx: index of the vector in the vsi struct
7434 *
7435 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7436 **/
7437 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7438 {
7439 struct i40e_q_vector *q_vector;
7440
7441 /* allocate q_vector */
7442 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7443 if (!q_vector)
7444 return -ENOMEM;
7445
7446 q_vector->vsi = vsi;
7447 q_vector->v_idx = v_idx;
7448 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7449 if (vsi->netdev)
7450 netif_napi_add(vsi->netdev, &q_vector->napi,
7451 i40e_napi_poll, NAPI_POLL_WEIGHT);
7452
7453 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7454 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7455
7456 /* tie q_vector and vsi together */
7457 vsi->q_vectors[v_idx] = q_vector;
7458
7459 return 0;
7460 }
7461
7462 /**
7463 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7464 * @vsi: the VSI being configured
7465 *
7466 * We allocate one q_vector per queue interrupt. If allocation fails we
7467 * return -ENOMEM.
7468 **/
7469 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7470 {
7471 struct i40e_pf *pf = vsi->back;
7472 int v_idx, num_q_vectors;
7473 int err;
7474
7475 /* if not MSIX, give the one vector only to the LAN VSI */
7476 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7477 num_q_vectors = vsi->num_q_vectors;
7478 else if (vsi == pf->vsi[pf->lan_vsi])
7479 num_q_vectors = 1;
7480 else
7481 return -EINVAL;
7482
7483 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7484 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7485 if (err)
7486 goto err_out;
7487 }
7488
7489 return 0;
7490
7491 err_out:
7492 while (v_idx--)
7493 i40e_free_q_vector(vsi, v_idx);
7494
7495 return err;
7496 }
7497
7498 /**
7499 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7500 * @pf: board private structure to initialize
7501 **/
7502 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7503 {
7504 int vectors = 0;
7505 ssize_t size;
7506
7507 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7508 vectors = i40e_init_msix(pf);
7509 if (vectors < 0) {
7510 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7511 #ifdef I40E_FCOE
7512 I40E_FLAG_FCOE_ENABLED |
7513 #endif
7514 I40E_FLAG_RSS_ENABLED |
7515 I40E_FLAG_DCB_CAPABLE |
7516 I40E_FLAG_SRIOV_ENABLED |
7517 I40E_FLAG_FD_SB_ENABLED |
7518 I40E_FLAG_FD_ATR_ENABLED |
7519 I40E_FLAG_VMDQ_ENABLED);
7520
7521 /* rework the queue expectations without MSIX */
7522 i40e_determine_queue_usage(pf);
7523 }
7524 }
7525
7526 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7527 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7528 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7529 vectors = pci_enable_msi(pf->pdev);
7530 if (vectors < 0) {
7531 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7532 vectors);
7533 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7534 }
7535 vectors = 1; /* one MSI or Legacy vector */
7536 }
7537
7538 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7539 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7540
7541 /* set up vector assignment tracking */
7542 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7543 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7544 if (!pf->irq_pile) {
7545 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7546 return -ENOMEM;
7547 }
7548 pf->irq_pile->num_entries = vectors;
7549 pf->irq_pile->search_hint = 0;
7550
7551 /* track first vector for misc interrupts, ignore return */
7552 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7553
7554 return 0;
7555 }
7556
7557 /**
7558 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7559 * @pf: board private structure
7560 *
7561 * This sets up the handler for MSIX 0, which is used to manage the
7562 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7563 * when in MSI or Legacy interrupt mode.
7564 **/
7565 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7566 {
7567 struct i40e_hw *hw = &pf->hw;
7568 int err = 0;
7569
7570 /* Only request the irq if this is the first time through, and
7571 * not when we're rebuilding after a Reset
7572 */
7573 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7574 err = request_irq(pf->msix_entries[0].vector,
7575 i40e_intr, 0, pf->int_name, pf);
7576 if (err) {
7577 dev_info(&pf->pdev->dev,
7578 "request_irq for %s failed: %d\n",
7579 pf->int_name, err);
7580 return -EFAULT;
7581 }
7582 }
7583
7584 i40e_enable_misc_int_causes(pf);
7585
7586 /* associate no queues to the misc vector */
7587 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7588 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7589
7590 i40e_flush(hw);
7591
7592 i40e_irq_dynamic_enable_icr0(pf);
7593
7594 return err;
7595 }
7596
7597 /**
7598 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7599 * @vsi: vsi structure
7600 * @seed: RSS hash seed
7601 **/
7602 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7603 {
7604 struct i40e_aqc_get_set_rss_key_data rss_key;
7605 struct i40e_pf *pf = vsi->back;
7606 struct i40e_hw *hw = &pf->hw;
7607 bool pf_lut = false;
7608 u8 *rss_lut;
7609 int ret, i;
7610
7611 memset(&rss_key, 0, sizeof(rss_key));
7612 memcpy(&rss_key, seed, sizeof(rss_key));
7613
7614 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7615 if (!rss_lut)
7616 return -ENOMEM;
7617
7618 /* Populate the LUT with max no. of queues in round robin fashion */
7619 for (i = 0; i < vsi->rss_table_size; i++)
7620 rss_lut[i] = i % vsi->rss_size;
7621
7622 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7623 if (ret) {
7624 dev_info(&pf->pdev->dev,
7625 "Cannot set RSS key, err %s aq_err %s\n",
7626 i40e_stat_str(&pf->hw, ret),
7627 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7628 goto config_rss_aq_out;
7629 }
7630
7631 if (vsi->type == I40E_VSI_MAIN)
7632 pf_lut = true;
7633
7634 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7635 vsi->rss_table_size);
7636 if (ret)
7637 dev_info(&pf->pdev->dev,
7638 "Cannot set RSS lut, err %s aq_err %s\n",
7639 i40e_stat_str(&pf->hw, ret),
7640 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7641
7642 config_rss_aq_out:
7643 kfree(rss_lut);
7644 return ret;
7645 }
7646
7647 /**
7648 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7649 * @vsi: VSI structure
7650 **/
7651 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7652 {
7653 u8 seed[I40E_HKEY_ARRAY_SIZE];
7654 struct i40e_pf *pf = vsi->back;
7655
7656 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7657 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7658
7659 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7660 return i40e_config_rss_aq(vsi, seed);
7661
7662 return 0;
7663 }
7664
7665 /**
7666 * i40e_config_rss_reg - Prepare for RSS if used
7667 * @pf: board private structure
7668 * @seed: RSS hash seed
7669 **/
7670 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7671 {
7672 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7673 struct i40e_hw *hw = &pf->hw;
7674 u32 *seed_dw = (u32 *)seed;
7675 u32 current_queue = 0;
7676 u32 lut = 0;
7677 int i, j;
7678
7679 /* Fill out hash function seed */
7680 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7681 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7682
7683 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7684 lut = 0;
7685 for (j = 0; j < 4; j++) {
7686 if (current_queue == vsi->rss_size)
7687 current_queue = 0;
7688 lut |= ((current_queue) << (8 * j));
7689 current_queue++;
7690 }
7691 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7692 }
7693 i40e_flush(hw);
7694
7695 return 0;
7696 }
7697
7698 /**
7699 * i40e_config_rss - Prepare for RSS if used
7700 * @pf: board private structure
7701 **/
7702 static int i40e_config_rss(struct i40e_pf *pf)
7703 {
7704 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7705 u8 seed[I40E_HKEY_ARRAY_SIZE];
7706 struct i40e_hw *hw = &pf->hw;
7707 u32 reg_val;
7708 u64 hena;
7709
7710 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7711
7712 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7713 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7714 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7715 hena |= i40e_pf_get_default_rss_hena(pf);
7716
7717 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7718 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7719
7720 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7721
7722 /* Determine the RSS table size based on the hardware capabilities */
7723 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7724 reg_val = (pf->rss_table_size == 512) ?
7725 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7726 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7727 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7728
7729 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7730 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7731 else
7732 return i40e_config_rss_reg(pf, seed);
7733 }
7734
7735 /**
7736 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7737 * @pf: board private structure
7738 * @queue_count: the requested queue count for rss.
7739 *
7740 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7741 * count which may be different from the requested queue count.
7742 **/
7743 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7744 {
7745 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7746 int new_rss_size;
7747
7748 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7749 return 0;
7750
7751 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7752
7753 if (queue_count != vsi->num_queue_pairs) {
7754 vsi->req_queue_pairs = queue_count;
7755 i40e_prep_for_reset(pf);
7756
7757 pf->rss_size = new_rss_size;
7758
7759 i40e_reset_and_rebuild(pf, true);
7760 i40e_config_rss(pf);
7761 }
7762 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7763 return pf->rss_size;
7764 }
7765
7766 /**
7767 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7768 * @pf: board private structure
7769 **/
7770 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7771 {
7772 i40e_status status;
7773 bool min_valid, max_valid;
7774 u32 max_bw, min_bw;
7775
7776 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7777 &min_valid, &max_valid);
7778
7779 if (!status) {
7780 if (min_valid)
7781 pf->npar_min_bw = min_bw;
7782 if (max_valid)
7783 pf->npar_max_bw = max_bw;
7784 }
7785
7786 return status;
7787 }
7788
7789 /**
7790 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7791 * @pf: board private structure
7792 **/
7793 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7794 {
7795 struct i40e_aqc_configure_partition_bw_data bw_data;
7796 i40e_status status;
7797
7798 /* Set the valid bit for this PF */
7799 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7800 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7801 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7802
7803 /* Set the new bandwidths */
7804 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7805
7806 return status;
7807 }
7808
7809 /**
7810 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7811 * @pf: board private structure
7812 **/
7813 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7814 {
7815 /* Commit temporary BW setting to permanent NVM image */
7816 enum i40e_admin_queue_err last_aq_status;
7817 i40e_status ret;
7818 u16 nvm_word;
7819
7820 if (pf->hw.partition_id != 1) {
7821 dev_info(&pf->pdev->dev,
7822 "Commit BW only works on partition 1! This is partition %d",
7823 pf->hw.partition_id);
7824 ret = I40E_NOT_SUPPORTED;
7825 goto bw_commit_out;
7826 }
7827
7828 /* Acquire NVM for read access */
7829 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7830 last_aq_status = pf->hw.aq.asq_last_status;
7831 if (ret) {
7832 dev_info(&pf->pdev->dev,
7833 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7834 i40e_stat_str(&pf->hw, ret),
7835 i40e_aq_str(&pf->hw, last_aq_status));
7836 goto bw_commit_out;
7837 }
7838
7839 /* Read word 0x10 of NVM - SW compatibility word 1 */
7840 ret = i40e_aq_read_nvm(&pf->hw,
7841 I40E_SR_NVM_CONTROL_WORD,
7842 0x10, sizeof(nvm_word), &nvm_word,
7843 false, NULL);
7844 /* Save off last admin queue command status before releasing
7845 * the NVM
7846 */
7847 last_aq_status = pf->hw.aq.asq_last_status;
7848 i40e_release_nvm(&pf->hw);
7849 if (ret) {
7850 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7851 i40e_stat_str(&pf->hw, ret),
7852 i40e_aq_str(&pf->hw, last_aq_status));
7853 goto bw_commit_out;
7854 }
7855
7856 /* Wait a bit for NVM release to complete */
7857 msleep(50);
7858
7859 /* Acquire NVM for write access */
7860 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7861 last_aq_status = pf->hw.aq.asq_last_status;
7862 if (ret) {
7863 dev_info(&pf->pdev->dev,
7864 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7865 i40e_stat_str(&pf->hw, ret),
7866 i40e_aq_str(&pf->hw, last_aq_status));
7867 goto bw_commit_out;
7868 }
7869 /* Write it back out unchanged to initiate update NVM,
7870 * which will force a write of the shadow (alt) RAM to
7871 * the NVM - thus storing the bandwidth values permanently.
7872 */
7873 ret = i40e_aq_update_nvm(&pf->hw,
7874 I40E_SR_NVM_CONTROL_WORD,
7875 0x10, sizeof(nvm_word),
7876 &nvm_word, true, NULL);
7877 /* Save off last admin queue command status before releasing
7878 * the NVM
7879 */
7880 last_aq_status = pf->hw.aq.asq_last_status;
7881 i40e_release_nvm(&pf->hw);
7882 if (ret)
7883 dev_info(&pf->pdev->dev,
7884 "BW settings NOT SAVED, err %s aq_err %s\n",
7885 i40e_stat_str(&pf->hw, ret),
7886 i40e_aq_str(&pf->hw, last_aq_status));
7887 bw_commit_out:
7888
7889 return ret;
7890 }
7891
7892 /**
7893 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7894 * @pf: board private structure to initialize
7895 *
7896 * i40e_sw_init initializes the Adapter private data structure.
7897 * Fields are initialized based on PCI device information and
7898 * OS network device settings (MTU size).
7899 **/
7900 static int i40e_sw_init(struct i40e_pf *pf)
7901 {
7902 int err = 0;
7903 int size;
7904
7905 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7906 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7907 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7908 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7909 if (I40E_DEBUG_USER & debug)
7910 pf->hw.debug_mask = debug;
7911 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7912 I40E_DEFAULT_MSG_ENABLE);
7913 }
7914
7915 /* Set default capability flags */
7916 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7917 I40E_FLAG_MSI_ENABLED |
7918 I40E_FLAG_MSIX_ENABLED;
7919
7920 if (iommu_present(&pci_bus_type))
7921 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7922 else
7923 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7924
7925 /* Set default ITR */
7926 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7927 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7928
7929 /* Depending on PF configurations, it is possible that the RSS
7930 * maximum might end up larger than the available queues
7931 */
7932 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7933 pf->rss_size = 1;
7934 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7935 pf->rss_size_max = min_t(int, pf->rss_size_max,
7936 pf->hw.func_caps.num_tx_qp);
7937 if (pf->hw.func_caps.rss) {
7938 pf->flags |= I40E_FLAG_RSS_ENABLED;
7939 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7940 }
7941
7942 /* MFP mode enabled */
7943 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7944 pf->flags |= I40E_FLAG_MFP_ENABLED;
7945 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7946 if (i40e_get_npar_bw_setting(pf))
7947 dev_warn(&pf->pdev->dev,
7948 "Could not get NPAR bw settings\n");
7949 else
7950 dev_info(&pf->pdev->dev,
7951 "Min BW = %8.8x, Max BW = %8.8x\n",
7952 pf->npar_min_bw, pf->npar_max_bw);
7953 }
7954
7955 /* FW/NVM is not yet fixed in this regard */
7956 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7957 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7958 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7959 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7960 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7961 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7962 } else {
7963 dev_info(&pf->pdev->dev,
7964 "Flow Director Sideband mode Disabled in MFP mode\n");
7965 }
7966 pf->fdir_pf_filter_count =
7967 pf->hw.func_caps.fd_filters_guaranteed;
7968 pf->hw.fdir_shared_filter_count =
7969 pf->hw.func_caps.fd_filters_best_effort;
7970 }
7971
7972 if (pf->hw.func_caps.vmdq) {
7973 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7974 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7975 }
7976
7977 #ifdef I40E_FCOE
7978 i40e_init_pf_fcoe(pf);
7979
7980 #endif /* I40E_FCOE */
7981 #ifdef CONFIG_PCI_IOV
7982 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7983 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7984 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7985 pf->num_req_vfs = min_t(int,
7986 pf->hw.func_caps.num_vfs,
7987 I40E_MAX_VF_COUNT);
7988 }
7989 #endif /* CONFIG_PCI_IOV */
7990 if (pf->hw.mac.type == I40E_MAC_X722) {
7991 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7992 I40E_FLAG_128_QP_RSS_CAPABLE |
7993 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7994 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7995 I40E_FLAG_WB_ON_ITR_CAPABLE |
7996 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7997 }
7998 pf->eeprom_version = 0xDEAD;
7999 pf->lan_veb = I40E_NO_VEB;
8000 pf->lan_vsi = I40E_NO_VSI;
8001
8002 /* By default FW has this off for performance reasons */
8003 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8004
8005 /* set up queue assignment tracking */
8006 size = sizeof(struct i40e_lump_tracking)
8007 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8008 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8009 if (!pf->qp_pile) {
8010 err = -ENOMEM;
8011 goto sw_init_done;
8012 }
8013 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8014 pf->qp_pile->search_hint = 0;
8015
8016 pf->tx_timeout_recovery_level = 1;
8017
8018 mutex_init(&pf->switch_mutex);
8019
8020 /* If NPAR is enabled nudge the Tx scheduler */
8021 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8022 i40e_set_npar_bw_setting(pf);
8023
8024 sw_init_done:
8025 return err;
8026 }
8027
8028 /**
8029 * i40e_set_ntuple - set the ntuple feature flag and take action
8030 * @pf: board private structure to initialize
8031 * @features: the feature set that the stack is suggesting
8032 *
8033 * returns a bool to indicate if reset needs to happen
8034 **/
8035 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8036 {
8037 bool need_reset = false;
8038
8039 /* Check if Flow Director n-tuple support was enabled or disabled. If
8040 * the state changed, we need to reset.
8041 */
8042 if (features & NETIF_F_NTUPLE) {
8043 /* Enable filters and mark for reset */
8044 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8045 need_reset = true;
8046 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8047 } else {
8048 /* turn off filters, mark for reset and clear SW filter list */
8049 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8050 need_reset = true;
8051 i40e_fdir_filter_exit(pf);
8052 }
8053 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8054 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8055 /* reset fd counters */
8056 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8057 pf->fdir_pf_active_filters = 0;
8058 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8059 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8060 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8061 /* if ATR was auto disabled it can be re-enabled. */
8062 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8063 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8064 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8065 }
8066 return need_reset;
8067 }
8068
8069 /**
8070 * i40e_set_features - set the netdev feature flags
8071 * @netdev: ptr to the netdev being adjusted
8072 * @features: the feature set that the stack is suggesting
8073 **/
8074 static int i40e_set_features(struct net_device *netdev,
8075 netdev_features_t features)
8076 {
8077 struct i40e_netdev_priv *np = netdev_priv(netdev);
8078 struct i40e_vsi *vsi = np->vsi;
8079 struct i40e_pf *pf = vsi->back;
8080 bool need_reset;
8081
8082 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8083 i40e_vlan_stripping_enable(vsi);
8084 else
8085 i40e_vlan_stripping_disable(vsi);
8086
8087 need_reset = i40e_set_ntuple(pf, features);
8088
8089 if (need_reset)
8090 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8091
8092 return 0;
8093 }
8094
8095 #ifdef CONFIG_I40E_VXLAN
8096 /**
8097 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8098 * @pf: board private structure
8099 * @port: The UDP port to look up
8100 *
8101 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8102 **/
8103 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8104 {
8105 u8 i;
8106
8107 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8108 if (pf->vxlan_ports[i] == port)
8109 return i;
8110 }
8111
8112 return i;
8113 }
8114
8115 /**
8116 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8117 * @netdev: This physical port's netdev
8118 * @sa_family: Socket Family that VXLAN is notifying us about
8119 * @port: New UDP port number that VXLAN started listening to
8120 **/
8121 static void i40e_add_vxlan_port(struct net_device *netdev,
8122 sa_family_t sa_family, __be16 port)
8123 {
8124 struct i40e_netdev_priv *np = netdev_priv(netdev);
8125 struct i40e_vsi *vsi = np->vsi;
8126 struct i40e_pf *pf = vsi->back;
8127 u8 next_idx;
8128 u8 idx;
8129
8130 if (sa_family == AF_INET6)
8131 return;
8132
8133 idx = i40e_get_vxlan_port_idx(pf, port);
8134
8135 /* Check if port already exists */
8136 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8137 netdev_info(netdev, "vxlan port %d already offloaded\n",
8138 ntohs(port));
8139 return;
8140 }
8141
8142 /* Now check if there is space to add the new port */
8143 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8144
8145 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8146 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8147 ntohs(port));
8148 return;
8149 }
8150
8151 /* New port: add it and mark its index in the bitmap */
8152 pf->vxlan_ports[next_idx] = port;
8153 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8154 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8155 }
8156
8157 /**
8158 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8159 * @netdev: This physical port's netdev
8160 * @sa_family: Socket Family that VXLAN is notifying us about
8161 * @port: UDP port number that VXLAN stopped listening to
8162 **/
8163 static void i40e_del_vxlan_port(struct net_device *netdev,
8164 sa_family_t sa_family, __be16 port)
8165 {
8166 struct i40e_netdev_priv *np = netdev_priv(netdev);
8167 struct i40e_vsi *vsi = np->vsi;
8168 struct i40e_pf *pf = vsi->back;
8169 u8 idx;
8170
8171 if (sa_family == AF_INET6)
8172 return;
8173
8174 idx = i40e_get_vxlan_port_idx(pf, port);
8175
8176 /* Check if port already exists */
8177 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8178 /* if port exists, set it to 0 (mark for deletion)
8179 * and make it pending
8180 */
8181 pf->vxlan_ports[idx] = 0;
8182 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8183 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8184 } else {
8185 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8186 ntohs(port));
8187 }
8188 }
8189
8190 #endif
8191 static int i40e_get_phys_port_id(struct net_device *netdev,
8192 struct netdev_phys_item_id *ppid)
8193 {
8194 struct i40e_netdev_priv *np = netdev_priv(netdev);
8195 struct i40e_pf *pf = np->vsi->back;
8196 struct i40e_hw *hw = &pf->hw;
8197
8198 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8199 return -EOPNOTSUPP;
8200
8201 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8202 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8203
8204 return 0;
8205 }
8206
8207 /**
8208 * i40e_ndo_fdb_add - add an entry to the hardware database
8209 * @ndm: the input from the stack
8210 * @tb: pointer to array of nladdr (unused)
8211 * @dev: the net device pointer
8212 * @addr: the MAC address entry being added
8213 * @flags: instructions from stack about fdb operation
8214 */
8215 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8216 struct net_device *dev,
8217 const unsigned char *addr, u16 vid,
8218 u16 flags)
8219 {
8220 struct i40e_netdev_priv *np = netdev_priv(dev);
8221 struct i40e_pf *pf = np->vsi->back;
8222 int err = 0;
8223
8224 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8225 return -EOPNOTSUPP;
8226
8227 if (vid) {
8228 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8229 return -EINVAL;
8230 }
8231
8232 /* Hardware does not support aging addresses so if a
8233 * ndm_state is given only allow permanent addresses
8234 */
8235 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8236 netdev_info(dev, "FDB only supports static addresses\n");
8237 return -EINVAL;
8238 }
8239
8240 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8241 err = dev_uc_add_excl(dev, addr);
8242 else if (is_multicast_ether_addr(addr))
8243 err = dev_mc_add_excl(dev, addr);
8244 else
8245 err = -EINVAL;
8246
8247 /* Only return duplicate errors if NLM_F_EXCL is set */
8248 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8249 err = 0;
8250
8251 return err;
8252 }
8253
8254 /**
8255 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8256 * @dev: the netdev being configured
8257 * @nlh: RTNL message
8258 *
8259 * Inserts a new hardware bridge if not already created and
8260 * enables the bridging mode requested (VEB or VEPA). If the
8261 * hardware bridge has already been inserted and the request
8262 * is to change the mode then that requires a PF reset to
8263 * allow rebuild of the components with required hardware
8264 * bridge mode enabled.
8265 **/
8266 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8267 struct nlmsghdr *nlh,
8268 u16 flags)
8269 {
8270 struct i40e_netdev_priv *np = netdev_priv(dev);
8271 struct i40e_vsi *vsi = np->vsi;
8272 struct i40e_pf *pf = vsi->back;
8273 struct i40e_veb *veb = NULL;
8274 struct nlattr *attr, *br_spec;
8275 int i, rem;
8276
8277 /* Only for PF VSI for now */
8278 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8279 return -EOPNOTSUPP;
8280
8281 /* Find the HW bridge for PF VSI */
8282 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8283 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8284 veb = pf->veb[i];
8285 }
8286
8287 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8288
8289 nla_for_each_nested(attr, br_spec, rem) {
8290 __u16 mode;
8291
8292 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8293 continue;
8294
8295 mode = nla_get_u16(attr);
8296 if ((mode != BRIDGE_MODE_VEPA) &&
8297 (mode != BRIDGE_MODE_VEB))
8298 return -EINVAL;
8299
8300 /* Insert a new HW bridge */
8301 if (!veb) {
8302 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8303 vsi->tc_config.enabled_tc);
8304 if (veb) {
8305 veb->bridge_mode = mode;
8306 i40e_config_bridge_mode(veb);
8307 } else {
8308 /* No Bridge HW offload available */
8309 return -ENOENT;
8310 }
8311 break;
8312 } else if (mode != veb->bridge_mode) {
8313 /* Existing HW bridge but different mode needs reset */
8314 veb->bridge_mode = mode;
8315 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8316 if (mode == BRIDGE_MODE_VEB)
8317 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8318 else
8319 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8320 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8321 break;
8322 }
8323 }
8324
8325 return 0;
8326 }
8327
8328 /**
8329 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8330 * @skb: skb buff
8331 * @pid: process id
8332 * @seq: RTNL message seq #
8333 * @dev: the netdev being configured
8334 * @filter_mask: unused
8335 *
8336 * Return the mode in which the hardware bridge is operating in
8337 * i.e VEB or VEPA.
8338 **/
8339 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8340 struct net_device *dev,
8341 u32 filter_mask, int nlflags)
8342 {
8343 struct i40e_netdev_priv *np = netdev_priv(dev);
8344 struct i40e_vsi *vsi = np->vsi;
8345 struct i40e_pf *pf = vsi->back;
8346 struct i40e_veb *veb = NULL;
8347 int i;
8348
8349 /* Only for PF VSI for now */
8350 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8351 return -EOPNOTSUPP;
8352
8353 /* Find the HW bridge for the PF VSI */
8354 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8355 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8356 veb = pf->veb[i];
8357 }
8358
8359 if (!veb)
8360 return 0;
8361
8362 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8363 nlflags, 0, 0, filter_mask, NULL);
8364 }
8365
8366 #define I40E_MAX_TUNNEL_HDR_LEN 80
8367 /**
8368 * i40e_features_check - Validate encapsulated packet conforms to limits
8369 * @skb: skb buff
8370 * @netdev: This physical port's netdev
8371 * @features: Offload features that the stack believes apply
8372 **/
8373 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8374 struct net_device *dev,
8375 netdev_features_t features)
8376 {
8377 if (skb->encapsulation &&
8378 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8379 I40E_MAX_TUNNEL_HDR_LEN))
8380 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8381
8382 return features;
8383 }
8384
8385 static const struct net_device_ops i40e_netdev_ops = {
8386 .ndo_open = i40e_open,
8387 .ndo_stop = i40e_close,
8388 .ndo_start_xmit = i40e_lan_xmit_frame,
8389 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8390 .ndo_set_rx_mode = i40e_set_rx_mode,
8391 .ndo_validate_addr = eth_validate_addr,
8392 .ndo_set_mac_address = i40e_set_mac,
8393 .ndo_change_mtu = i40e_change_mtu,
8394 .ndo_do_ioctl = i40e_ioctl,
8395 .ndo_tx_timeout = i40e_tx_timeout,
8396 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8397 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8398 #ifdef CONFIG_NET_POLL_CONTROLLER
8399 .ndo_poll_controller = i40e_netpoll,
8400 #endif
8401 .ndo_setup_tc = i40e_setup_tc,
8402 #ifdef I40E_FCOE
8403 .ndo_fcoe_enable = i40e_fcoe_enable,
8404 .ndo_fcoe_disable = i40e_fcoe_disable,
8405 #endif
8406 .ndo_set_features = i40e_set_features,
8407 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8408 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8409 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8410 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8411 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8412 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8413 #ifdef CONFIG_I40E_VXLAN
8414 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8415 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8416 #endif
8417 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8418 .ndo_fdb_add = i40e_ndo_fdb_add,
8419 .ndo_features_check = i40e_features_check,
8420 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8421 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8422 };
8423
8424 /**
8425 * i40e_config_netdev - Setup the netdev flags
8426 * @vsi: the VSI being configured
8427 *
8428 * Returns 0 on success, negative value on failure
8429 **/
8430 static int i40e_config_netdev(struct i40e_vsi *vsi)
8431 {
8432 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8433 struct i40e_pf *pf = vsi->back;
8434 struct i40e_hw *hw = &pf->hw;
8435 struct i40e_netdev_priv *np;
8436 struct net_device *netdev;
8437 u8 mac_addr[ETH_ALEN];
8438 int etherdev_size;
8439
8440 etherdev_size = sizeof(struct i40e_netdev_priv);
8441 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8442 if (!netdev)
8443 return -ENOMEM;
8444
8445 vsi->netdev = netdev;
8446 np = netdev_priv(netdev);
8447 np->vsi = vsi;
8448
8449 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8450 NETIF_F_GSO_UDP_TUNNEL |
8451 NETIF_F_TSO;
8452
8453 netdev->features = NETIF_F_SG |
8454 NETIF_F_IP_CSUM |
8455 NETIF_F_SCTP_CSUM |
8456 NETIF_F_HIGHDMA |
8457 NETIF_F_GSO_UDP_TUNNEL |
8458 NETIF_F_HW_VLAN_CTAG_TX |
8459 NETIF_F_HW_VLAN_CTAG_RX |
8460 NETIF_F_HW_VLAN_CTAG_FILTER |
8461 NETIF_F_IPV6_CSUM |
8462 NETIF_F_TSO |
8463 NETIF_F_TSO_ECN |
8464 NETIF_F_TSO6 |
8465 NETIF_F_RXCSUM |
8466 NETIF_F_RXHASH |
8467 0;
8468
8469 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8470 netdev->features |= NETIF_F_NTUPLE;
8471
8472 /* copy netdev features into list of user selectable features */
8473 netdev->hw_features |= netdev->features;
8474
8475 if (vsi->type == I40E_VSI_MAIN) {
8476 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8477 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8478 /* The following steps are necessary to prevent reception
8479 * of tagged packets - some older NVM configurations load a
8480 * default a MAC-VLAN filter that accepts any tagged packet
8481 * which must be replaced by a normal filter.
8482 */
8483 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8484 i40e_add_filter(vsi, mac_addr,
8485 I40E_VLAN_ANY, false, true);
8486 } else {
8487 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8488 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8489 pf->vsi[pf->lan_vsi]->netdev->name);
8490 random_ether_addr(mac_addr);
8491 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8492 }
8493 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8494
8495 ether_addr_copy(netdev->dev_addr, mac_addr);
8496 ether_addr_copy(netdev->perm_addr, mac_addr);
8497 /* vlan gets same features (except vlan offload)
8498 * after any tweaks for specific VSI types
8499 */
8500 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8501 NETIF_F_HW_VLAN_CTAG_RX |
8502 NETIF_F_HW_VLAN_CTAG_FILTER);
8503 netdev->priv_flags |= IFF_UNICAST_FLT;
8504 netdev->priv_flags |= IFF_SUPP_NOFCS;
8505 /* Setup netdev TC information */
8506 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8507
8508 netdev->netdev_ops = &i40e_netdev_ops;
8509 netdev->watchdog_timeo = 5 * HZ;
8510 i40e_set_ethtool_ops(netdev);
8511 #ifdef I40E_FCOE
8512 i40e_fcoe_config_netdev(netdev, vsi);
8513 #endif
8514
8515 return 0;
8516 }
8517
8518 /**
8519 * i40e_vsi_delete - Delete a VSI from the switch
8520 * @vsi: the VSI being removed
8521 *
8522 * Returns 0 on success, negative value on failure
8523 **/
8524 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8525 {
8526 /* remove default VSI is not allowed */
8527 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8528 return;
8529
8530 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8531 }
8532
8533 /**
8534 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8535 * @vsi: the VSI being queried
8536 *
8537 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8538 **/
8539 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8540 {
8541 struct i40e_veb *veb;
8542 struct i40e_pf *pf = vsi->back;
8543
8544 /* Uplink is not a bridge so default to VEB */
8545 if (vsi->veb_idx == I40E_NO_VEB)
8546 return 1;
8547
8548 veb = pf->veb[vsi->veb_idx];
8549 /* Uplink is a bridge in VEPA mode */
8550 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8551 return 0;
8552
8553 /* Uplink is a bridge in VEB mode */
8554 return 1;
8555 }
8556
8557 /**
8558 * i40e_add_vsi - Add a VSI to the switch
8559 * @vsi: the VSI being configured
8560 *
8561 * This initializes a VSI context depending on the VSI type to be added and
8562 * passes it down to the add_vsi aq command.
8563 **/
8564 static int i40e_add_vsi(struct i40e_vsi *vsi)
8565 {
8566 int ret = -ENODEV;
8567 struct i40e_mac_filter *f, *ftmp;
8568 struct i40e_pf *pf = vsi->back;
8569 struct i40e_hw *hw = &pf->hw;
8570 struct i40e_vsi_context ctxt;
8571 u8 enabled_tc = 0x1; /* TC0 enabled */
8572 int f_count = 0;
8573
8574 memset(&ctxt, 0, sizeof(ctxt));
8575 switch (vsi->type) {
8576 case I40E_VSI_MAIN:
8577 /* The PF's main VSI is already setup as part of the
8578 * device initialization, so we'll not bother with
8579 * the add_vsi call, but we will retrieve the current
8580 * VSI context.
8581 */
8582 ctxt.seid = pf->main_vsi_seid;
8583 ctxt.pf_num = pf->hw.pf_id;
8584 ctxt.vf_num = 0;
8585 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8586 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8587 if (ret) {
8588 dev_info(&pf->pdev->dev,
8589 "couldn't get PF vsi config, err %s aq_err %s\n",
8590 i40e_stat_str(&pf->hw, ret),
8591 i40e_aq_str(&pf->hw,
8592 pf->hw.aq.asq_last_status));
8593 return -ENOENT;
8594 }
8595 vsi->info = ctxt.info;
8596 vsi->info.valid_sections = 0;
8597
8598 vsi->seid = ctxt.seid;
8599 vsi->id = ctxt.vsi_number;
8600
8601 enabled_tc = i40e_pf_get_tc_map(pf);
8602
8603 /* MFP mode setup queue map and update VSI */
8604 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8605 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8606 memset(&ctxt, 0, sizeof(ctxt));
8607 ctxt.seid = pf->main_vsi_seid;
8608 ctxt.pf_num = pf->hw.pf_id;
8609 ctxt.vf_num = 0;
8610 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8611 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8612 if (ret) {
8613 dev_info(&pf->pdev->dev,
8614 "update vsi failed, err %s aq_err %s\n",
8615 i40e_stat_str(&pf->hw, ret),
8616 i40e_aq_str(&pf->hw,
8617 pf->hw.aq.asq_last_status));
8618 ret = -ENOENT;
8619 goto err;
8620 }
8621 /* update the local VSI info queue map */
8622 i40e_vsi_update_queue_map(vsi, &ctxt);
8623 vsi->info.valid_sections = 0;
8624 } else {
8625 /* Default/Main VSI is only enabled for TC0
8626 * reconfigure it to enable all TCs that are
8627 * available on the port in SFP mode.
8628 * For MFP case the iSCSI PF would use this
8629 * flow to enable LAN+iSCSI TC.
8630 */
8631 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8632 if (ret) {
8633 dev_info(&pf->pdev->dev,
8634 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8635 enabled_tc,
8636 i40e_stat_str(&pf->hw, ret),
8637 i40e_aq_str(&pf->hw,
8638 pf->hw.aq.asq_last_status));
8639 ret = -ENOENT;
8640 }
8641 }
8642 break;
8643
8644 case I40E_VSI_FDIR:
8645 ctxt.pf_num = hw->pf_id;
8646 ctxt.vf_num = 0;
8647 ctxt.uplink_seid = vsi->uplink_seid;
8648 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8649 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8650 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8651 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8652 ctxt.info.valid_sections |=
8653 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8654 ctxt.info.switch_id =
8655 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8656 }
8657 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8658 break;
8659
8660 case I40E_VSI_VMDQ2:
8661 ctxt.pf_num = hw->pf_id;
8662 ctxt.vf_num = 0;
8663 ctxt.uplink_seid = vsi->uplink_seid;
8664 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8665 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8666
8667 /* This VSI is connected to VEB so the switch_id
8668 * should be set to zero by default.
8669 */
8670 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8671 ctxt.info.valid_sections |=
8672 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8673 ctxt.info.switch_id =
8674 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8675 }
8676
8677 /* Setup the VSI tx/rx queue map for TC0 only for now */
8678 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8679 break;
8680
8681 case I40E_VSI_SRIOV:
8682 ctxt.pf_num = hw->pf_id;
8683 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8684 ctxt.uplink_seid = vsi->uplink_seid;
8685 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8686 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8687
8688 /* This VSI is connected to VEB so the switch_id
8689 * should be set to zero by default.
8690 */
8691 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8692 ctxt.info.valid_sections |=
8693 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8694 ctxt.info.switch_id =
8695 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8696 }
8697
8698 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8699 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8700 if (pf->vf[vsi->vf_id].spoofchk) {
8701 ctxt.info.valid_sections |=
8702 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8703 ctxt.info.sec_flags |=
8704 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8705 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8706 }
8707 /* Setup the VSI tx/rx queue map for TC0 only for now */
8708 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8709 break;
8710
8711 #ifdef I40E_FCOE
8712 case I40E_VSI_FCOE:
8713 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8714 if (ret) {
8715 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8716 return ret;
8717 }
8718 break;
8719
8720 #endif /* I40E_FCOE */
8721 default:
8722 return -ENODEV;
8723 }
8724
8725 if (vsi->type != I40E_VSI_MAIN) {
8726 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8727 if (ret) {
8728 dev_info(&vsi->back->pdev->dev,
8729 "add vsi failed, err %s aq_err %s\n",
8730 i40e_stat_str(&pf->hw, ret),
8731 i40e_aq_str(&pf->hw,
8732 pf->hw.aq.asq_last_status));
8733 ret = -ENOENT;
8734 goto err;
8735 }
8736 vsi->info = ctxt.info;
8737 vsi->info.valid_sections = 0;
8738 vsi->seid = ctxt.seid;
8739 vsi->id = ctxt.vsi_number;
8740 }
8741
8742 /* If macvlan filters already exist, force them to get loaded */
8743 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8744 f->changed = true;
8745 f_count++;
8746
8747 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8748 struct i40e_aqc_remove_macvlan_element_data element;
8749
8750 memset(&element, 0, sizeof(element));
8751 ether_addr_copy(element.mac_addr, f->macaddr);
8752 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8753 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8754 &element, 1, NULL);
8755 if (ret) {
8756 /* some older FW has a different default */
8757 element.flags |=
8758 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8759 i40e_aq_remove_macvlan(hw, vsi->seid,
8760 &element, 1, NULL);
8761 }
8762
8763 i40e_aq_mac_address_write(hw,
8764 I40E_AQC_WRITE_TYPE_LAA_WOL,
8765 f->macaddr, NULL);
8766 }
8767 }
8768 if (f_count) {
8769 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8770 pf->flags |= I40E_FLAG_FILTER_SYNC;
8771 }
8772
8773 /* Update VSI BW information */
8774 ret = i40e_vsi_get_bw_info(vsi);
8775 if (ret) {
8776 dev_info(&pf->pdev->dev,
8777 "couldn't get vsi bw info, err %s aq_err %s\n",
8778 i40e_stat_str(&pf->hw, ret),
8779 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8780 /* VSI is already added so not tearing that up */
8781 ret = 0;
8782 }
8783
8784 err:
8785 return ret;
8786 }
8787
8788 /**
8789 * i40e_vsi_release - Delete a VSI and free its resources
8790 * @vsi: the VSI being removed
8791 *
8792 * Returns 0 on success or < 0 on error
8793 **/
8794 int i40e_vsi_release(struct i40e_vsi *vsi)
8795 {
8796 struct i40e_mac_filter *f, *ftmp;
8797 struct i40e_veb *veb = NULL;
8798 struct i40e_pf *pf;
8799 u16 uplink_seid;
8800 int i, n;
8801
8802 pf = vsi->back;
8803
8804 /* release of a VEB-owner or last VSI is not allowed */
8805 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8806 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8807 vsi->seid, vsi->uplink_seid);
8808 return -ENODEV;
8809 }
8810 if (vsi == pf->vsi[pf->lan_vsi] &&
8811 !test_bit(__I40E_DOWN, &pf->state)) {
8812 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8813 return -ENODEV;
8814 }
8815
8816 uplink_seid = vsi->uplink_seid;
8817 if (vsi->type != I40E_VSI_SRIOV) {
8818 if (vsi->netdev_registered) {
8819 vsi->netdev_registered = false;
8820 if (vsi->netdev) {
8821 /* results in a call to i40e_close() */
8822 unregister_netdev(vsi->netdev);
8823 }
8824 } else {
8825 i40e_vsi_close(vsi);
8826 }
8827 i40e_vsi_disable_irq(vsi);
8828 }
8829
8830 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8831 i40e_del_filter(vsi, f->macaddr, f->vlan,
8832 f->is_vf, f->is_netdev);
8833 i40e_sync_vsi_filters(vsi, false);
8834
8835 i40e_vsi_delete(vsi);
8836 i40e_vsi_free_q_vectors(vsi);
8837 if (vsi->netdev) {
8838 free_netdev(vsi->netdev);
8839 vsi->netdev = NULL;
8840 }
8841 i40e_vsi_clear_rings(vsi);
8842 i40e_vsi_clear(vsi);
8843
8844 /* If this was the last thing on the VEB, except for the
8845 * controlling VSI, remove the VEB, which puts the controlling
8846 * VSI onto the next level down in the switch.
8847 *
8848 * Well, okay, there's one more exception here: don't remove
8849 * the orphan VEBs yet. We'll wait for an explicit remove request
8850 * from up the network stack.
8851 */
8852 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8853 if (pf->vsi[i] &&
8854 pf->vsi[i]->uplink_seid == uplink_seid &&
8855 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8856 n++; /* count the VSIs */
8857 }
8858 }
8859 for (i = 0; i < I40E_MAX_VEB; i++) {
8860 if (!pf->veb[i])
8861 continue;
8862 if (pf->veb[i]->uplink_seid == uplink_seid)
8863 n++; /* count the VEBs */
8864 if (pf->veb[i]->seid == uplink_seid)
8865 veb = pf->veb[i];
8866 }
8867 if (n == 0 && veb && veb->uplink_seid != 0)
8868 i40e_veb_release(veb);
8869
8870 return 0;
8871 }
8872
8873 /**
8874 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8875 * @vsi: ptr to the VSI
8876 *
8877 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8878 * corresponding SW VSI structure and initializes num_queue_pairs for the
8879 * newly allocated VSI.
8880 *
8881 * Returns 0 on success or negative on failure
8882 **/
8883 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8884 {
8885 int ret = -ENOENT;
8886 struct i40e_pf *pf = vsi->back;
8887
8888 if (vsi->q_vectors[0]) {
8889 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8890 vsi->seid);
8891 return -EEXIST;
8892 }
8893
8894 if (vsi->base_vector) {
8895 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8896 vsi->seid, vsi->base_vector);
8897 return -EEXIST;
8898 }
8899
8900 ret = i40e_vsi_alloc_q_vectors(vsi);
8901 if (ret) {
8902 dev_info(&pf->pdev->dev,
8903 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8904 vsi->num_q_vectors, vsi->seid, ret);
8905 vsi->num_q_vectors = 0;
8906 goto vector_setup_out;
8907 }
8908
8909 /* In Legacy mode, we do not have to get any other vector since we
8910 * piggyback on the misc/ICR0 for queue interrupts.
8911 */
8912 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8913 return ret;
8914 if (vsi->num_q_vectors)
8915 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8916 vsi->num_q_vectors, vsi->idx);
8917 if (vsi->base_vector < 0) {
8918 dev_info(&pf->pdev->dev,
8919 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8920 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8921 i40e_vsi_free_q_vectors(vsi);
8922 ret = -ENOENT;
8923 goto vector_setup_out;
8924 }
8925
8926 vector_setup_out:
8927 return ret;
8928 }
8929
8930 /**
8931 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8932 * @vsi: pointer to the vsi.
8933 *
8934 * This re-allocates a vsi's queue resources.
8935 *
8936 * Returns pointer to the successfully allocated and configured VSI sw struct
8937 * on success, otherwise returns NULL on failure.
8938 **/
8939 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8940 {
8941 struct i40e_pf *pf = vsi->back;
8942 u8 enabled_tc;
8943 int ret;
8944
8945 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8946 i40e_vsi_clear_rings(vsi);
8947
8948 i40e_vsi_free_arrays(vsi, false);
8949 i40e_set_num_rings_in_vsi(vsi);
8950 ret = i40e_vsi_alloc_arrays(vsi, false);
8951 if (ret)
8952 goto err_vsi;
8953
8954 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8955 if (ret < 0) {
8956 dev_info(&pf->pdev->dev,
8957 "failed to get tracking for %d queues for VSI %d err %d\n",
8958 vsi->alloc_queue_pairs, vsi->seid, ret);
8959 goto err_vsi;
8960 }
8961 vsi->base_queue = ret;
8962
8963 /* Update the FW view of the VSI. Force a reset of TC and queue
8964 * layout configurations.
8965 */
8966 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8967 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8968 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8969 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8970
8971 /* assign it some queues */
8972 ret = i40e_alloc_rings(vsi);
8973 if (ret)
8974 goto err_rings;
8975
8976 /* map all of the rings to the q_vectors */
8977 i40e_vsi_map_rings_to_vectors(vsi);
8978 return vsi;
8979
8980 err_rings:
8981 i40e_vsi_free_q_vectors(vsi);
8982 if (vsi->netdev_registered) {
8983 vsi->netdev_registered = false;
8984 unregister_netdev(vsi->netdev);
8985 free_netdev(vsi->netdev);
8986 vsi->netdev = NULL;
8987 }
8988 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8989 err_vsi:
8990 i40e_vsi_clear(vsi);
8991 return NULL;
8992 }
8993
8994 /**
8995 * i40e_vsi_setup - Set up a VSI by a given type
8996 * @pf: board private structure
8997 * @type: VSI type
8998 * @uplink_seid: the switch element to link to
8999 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9000 *
9001 * This allocates the sw VSI structure and its queue resources, then add a VSI
9002 * to the identified VEB.
9003 *
9004 * Returns pointer to the successfully allocated and configure VSI sw struct on
9005 * success, otherwise returns NULL on failure.
9006 **/
9007 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9008 u16 uplink_seid, u32 param1)
9009 {
9010 struct i40e_vsi *vsi = NULL;
9011 struct i40e_veb *veb = NULL;
9012 int ret, i;
9013 int v_idx;
9014
9015 /* The requested uplink_seid must be either
9016 * - the PF's port seid
9017 * no VEB is needed because this is the PF
9018 * or this is a Flow Director special case VSI
9019 * - seid of an existing VEB
9020 * - seid of a VSI that owns an existing VEB
9021 * - seid of a VSI that doesn't own a VEB
9022 * a new VEB is created and the VSI becomes the owner
9023 * - seid of the PF VSI, which is what creates the first VEB
9024 * this is a special case of the previous
9025 *
9026 * Find which uplink_seid we were given and create a new VEB if needed
9027 */
9028 for (i = 0; i < I40E_MAX_VEB; i++) {
9029 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9030 veb = pf->veb[i];
9031 break;
9032 }
9033 }
9034
9035 if (!veb && uplink_seid != pf->mac_seid) {
9036
9037 for (i = 0; i < pf->num_alloc_vsi; i++) {
9038 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9039 vsi = pf->vsi[i];
9040 break;
9041 }
9042 }
9043 if (!vsi) {
9044 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9045 uplink_seid);
9046 return NULL;
9047 }
9048
9049 if (vsi->uplink_seid == pf->mac_seid)
9050 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9051 vsi->tc_config.enabled_tc);
9052 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9053 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9054 vsi->tc_config.enabled_tc);
9055 if (veb) {
9056 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9057 dev_info(&vsi->back->pdev->dev,
9058 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9059 return NULL;
9060 }
9061 /* We come up by default in VEPA mode if SRIOV is not
9062 * already enabled, in which case we can't force VEPA
9063 * mode.
9064 */
9065 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9066 veb->bridge_mode = BRIDGE_MODE_VEPA;
9067 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9068 }
9069 i40e_config_bridge_mode(veb);
9070 }
9071 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9072 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9073 veb = pf->veb[i];
9074 }
9075 if (!veb) {
9076 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9077 return NULL;
9078 }
9079
9080 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9081 uplink_seid = veb->seid;
9082 }
9083
9084 /* get vsi sw struct */
9085 v_idx = i40e_vsi_mem_alloc(pf, type);
9086 if (v_idx < 0)
9087 goto err_alloc;
9088 vsi = pf->vsi[v_idx];
9089 if (!vsi)
9090 goto err_alloc;
9091 vsi->type = type;
9092 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9093
9094 if (type == I40E_VSI_MAIN)
9095 pf->lan_vsi = v_idx;
9096 else if (type == I40E_VSI_SRIOV)
9097 vsi->vf_id = param1;
9098 /* assign it some queues */
9099 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9100 vsi->idx);
9101 if (ret < 0) {
9102 dev_info(&pf->pdev->dev,
9103 "failed to get tracking for %d queues for VSI %d err=%d\n",
9104 vsi->alloc_queue_pairs, vsi->seid, ret);
9105 goto err_vsi;
9106 }
9107 vsi->base_queue = ret;
9108
9109 /* get a VSI from the hardware */
9110 vsi->uplink_seid = uplink_seid;
9111 ret = i40e_add_vsi(vsi);
9112 if (ret)
9113 goto err_vsi;
9114
9115 switch (vsi->type) {
9116 /* setup the netdev if needed */
9117 case I40E_VSI_MAIN:
9118 case I40E_VSI_VMDQ2:
9119 case I40E_VSI_FCOE:
9120 ret = i40e_config_netdev(vsi);
9121 if (ret)
9122 goto err_netdev;
9123 ret = register_netdev(vsi->netdev);
9124 if (ret)
9125 goto err_netdev;
9126 vsi->netdev_registered = true;
9127 netif_carrier_off(vsi->netdev);
9128 #ifdef CONFIG_I40E_DCB
9129 /* Setup DCB netlink interface */
9130 i40e_dcbnl_setup(vsi);
9131 #endif /* CONFIG_I40E_DCB */
9132 /* fall through */
9133
9134 case I40E_VSI_FDIR:
9135 /* set up vectors and rings if needed */
9136 ret = i40e_vsi_setup_vectors(vsi);
9137 if (ret)
9138 goto err_msix;
9139
9140 ret = i40e_alloc_rings(vsi);
9141 if (ret)
9142 goto err_rings;
9143
9144 /* map all of the rings to the q_vectors */
9145 i40e_vsi_map_rings_to_vectors(vsi);
9146
9147 i40e_vsi_reset_stats(vsi);
9148 break;
9149
9150 default:
9151 /* no netdev or rings for the other VSI types */
9152 break;
9153 }
9154
9155 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9156 (vsi->type == I40E_VSI_VMDQ2)) {
9157 ret = i40e_vsi_config_rss(vsi);
9158 }
9159 return vsi;
9160
9161 err_rings:
9162 i40e_vsi_free_q_vectors(vsi);
9163 err_msix:
9164 if (vsi->netdev_registered) {
9165 vsi->netdev_registered = false;
9166 unregister_netdev(vsi->netdev);
9167 free_netdev(vsi->netdev);
9168 vsi->netdev = NULL;
9169 }
9170 err_netdev:
9171 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9172 err_vsi:
9173 i40e_vsi_clear(vsi);
9174 err_alloc:
9175 return NULL;
9176 }
9177
9178 /**
9179 * i40e_veb_get_bw_info - Query VEB BW information
9180 * @veb: the veb to query
9181 *
9182 * Query the Tx scheduler BW configuration data for given VEB
9183 **/
9184 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9185 {
9186 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9187 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9188 struct i40e_pf *pf = veb->pf;
9189 struct i40e_hw *hw = &pf->hw;
9190 u32 tc_bw_max;
9191 int ret = 0;
9192 int i;
9193
9194 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9195 &bw_data, NULL);
9196 if (ret) {
9197 dev_info(&pf->pdev->dev,
9198 "query veb bw config failed, err %s aq_err %s\n",
9199 i40e_stat_str(&pf->hw, ret),
9200 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9201 goto out;
9202 }
9203
9204 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9205 &ets_data, NULL);
9206 if (ret) {
9207 dev_info(&pf->pdev->dev,
9208 "query veb bw ets config failed, err %s aq_err %s\n",
9209 i40e_stat_str(&pf->hw, ret),
9210 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9211 goto out;
9212 }
9213
9214 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9215 veb->bw_max_quanta = ets_data.tc_bw_max;
9216 veb->is_abs_credits = bw_data.absolute_credits_enable;
9217 veb->enabled_tc = ets_data.tc_valid_bits;
9218 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9219 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9220 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9221 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9222 veb->bw_tc_limit_credits[i] =
9223 le16_to_cpu(bw_data.tc_bw_limits[i]);
9224 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9225 }
9226
9227 out:
9228 return ret;
9229 }
9230
9231 /**
9232 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9233 * @pf: board private structure
9234 *
9235 * On error: returns error code (negative)
9236 * On success: returns vsi index in PF (positive)
9237 **/
9238 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9239 {
9240 int ret = -ENOENT;
9241 struct i40e_veb *veb;
9242 int i;
9243
9244 /* Need to protect the allocation of switch elements at the PF level */
9245 mutex_lock(&pf->switch_mutex);
9246
9247 /* VEB list may be fragmented if VEB creation/destruction has
9248 * been happening. We can afford to do a quick scan to look
9249 * for any free slots in the list.
9250 *
9251 * find next empty veb slot, looping back around if necessary
9252 */
9253 i = 0;
9254 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9255 i++;
9256 if (i >= I40E_MAX_VEB) {
9257 ret = -ENOMEM;
9258 goto err_alloc_veb; /* out of VEB slots! */
9259 }
9260
9261 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9262 if (!veb) {
9263 ret = -ENOMEM;
9264 goto err_alloc_veb;
9265 }
9266 veb->pf = pf;
9267 veb->idx = i;
9268 veb->enabled_tc = 1;
9269
9270 pf->veb[i] = veb;
9271 ret = i;
9272 err_alloc_veb:
9273 mutex_unlock(&pf->switch_mutex);
9274 return ret;
9275 }
9276
9277 /**
9278 * i40e_switch_branch_release - Delete a branch of the switch tree
9279 * @branch: where to start deleting
9280 *
9281 * This uses recursion to find the tips of the branch to be
9282 * removed, deleting until we get back to and can delete this VEB.
9283 **/
9284 static void i40e_switch_branch_release(struct i40e_veb *branch)
9285 {
9286 struct i40e_pf *pf = branch->pf;
9287 u16 branch_seid = branch->seid;
9288 u16 veb_idx = branch->idx;
9289 int i;
9290
9291 /* release any VEBs on this VEB - RECURSION */
9292 for (i = 0; i < I40E_MAX_VEB; i++) {
9293 if (!pf->veb[i])
9294 continue;
9295 if (pf->veb[i]->uplink_seid == branch->seid)
9296 i40e_switch_branch_release(pf->veb[i]);
9297 }
9298
9299 /* Release the VSIs on this VEB, but not the owner VSI.
9300 *
9301 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9302 * the VEB itself, so don't use (*branch) after this loop.
9303 */
9304 for (i = 0; i < pf->num_alloc_vsi; i++) {
9305 if (!pf->vsi[i])
9306 continue;
9307 if (pf->vsi[i]->uplink_seid == branch_seid &&
9308 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9309 i40e_vsi_release(pf->vsi[i]);
9310 }
9311 }
9312
9313 /* There's one corner case where the VEB might not have been
9314 * removed, so double check it here and remove it if needed.
9315 * This case happens if the veb was created from the debugfs
9316 * commands and no VSIs were added to it.
9317 */
9318 if (pf->veb[veb_idx])
9319 i40e_veb_release(pf->veb[veb_idx]);
9320 }
9321
9322 /**
9323 * i40e_veb_clear - remove veb struct
9324 * @veb: the veb to remove
9325 **/
9326 static void i40e_veb_clear(struct i40e_veb *veb)
9327 {
9328 if (!veb)
9329 return;
9330
9331 if (veb->pf) {
9332 struct i40e_pf *pf = veb->pf;
9333
9334 mutex_lock(&pf->switch_mutex);
9335 if (pf->veb[veb->idx] == veb)
9336 pf->veb[veb->idx] = NULL;
9337 mutex_unlock(&pf->switch_mutex);
9338 }
9339
9340 kfree(veb);
9341 }
9342
9343 /**
9344 * i40e_veb_release - Delete a VEB and free its resources
9345 * @veb: the VEB being removed
9346 **/
9347 void i40e_veb_release(struct i40e_veb *veb)
9348 {
9349 struct i40e_vsi *vsi = NULL;
9350 struct i40e_pf *pf;
9351 int i, n = 0;
9352
9353 pf = veb->pf;
9354
9355 /* find the remaining VSI and check for extras */
9356 for (i = 0; i < pf->num_alloc_vsi; i++) {
9357 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9358 n++;
9359 vsi = pf->vsi[i];
9360 }
9361 }
9362 if (n != 1) {
9363 dev_info(&pf->pdev->dev,
9364 "can't remove VEB %d with %d VSIs left\n",
9365 veb->seid, n);
9366 return;
9367 }
9368
9369 /* move the remaining VSI to uplink veb */
9370 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9371 if (veb->uplink_seid) {
9372 vsi->uplink_seid = veb->uplink_seid;
9373 if (veb->uplink_seid == pf->mac_seid)
9374 vsi->veb_idx = I40E_NO_VEB;
9375 else
9376 vsi->veb_idx = veb->veb_idx;
9377 } else {
9378 /* floating VEB */
9379 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9380 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9381 }
9382
9383 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9384 i40e_veb_clear(veb);
9385 }
9386
9387 /**
9388 * i40e_add_veb - create the VEB in the switch
9389 * @veb: the VEB to be instantiated
9390 * @vsi: the controlling VSI
9391 **/
9392 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9393 {
9394 struct i40e_pf *pf = veb->pf;
9395 bool is_default = veb->pf->cur_promisc;
9396 bool is_cloud = false;
9397 int ret;
9398
9399 /* get a VEB from the hardware */
9400 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9401 veb->enabled_tc, is_default,
9402 is_cloud, &veb->seid, NULL);
9403 if (ret) {
9404 dev_info(&pf->pdev->dev,
9405 "couldn't add VEB, err %s aq_err %s\n",
9406 i40e_stat_str(&pf->hw, ret),
9407 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9408 return -EPERM;
9409 }
9410
9411 /* get statistics counter */
9412 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9413 &veb->stats_idx, NULL, NULL, NULL);
9414 if (ret) {
9415 dev_info(&pf->pdev->dev,
9416 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9417 i40e_stat_str(&pf->hw, ret),
9418 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9419 return -EPERM;
9420 }
9421 ret = i40e_veb_get_bw_info(veb);
9422 if (ret) {
9423 dev_info(&pf->pdev->dev,
9424 "couldn't get VEB bw info, err %s aq_err %s\n",
9425 i40e_stat_str(&pf->hw, ret),
9426 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9427 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9428 return -ENOENT;
9429 }
9430
9431 vsi->uplink_seid = veb->seid;
9432 vsi->veb_idx = veb->idx;
9433 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9434
9435 return 0;
9436 }
9437
9438 /**
9439 * i40e_veb_setup - Set up a VEB
9440 * @pf: board private structure
9441 * @flags: VEB setup flags
9442 * @uplink_seid: the switch element to link to
9443 * @vsi_seid: the initial VSI seid
9444 * @enabled_tc: Enabled TC bit-map
9445 *
9446 * This allocates the sw VEB structure and links it into the switch
9447 * It is possible and legal for this to be a duplicate of an already
9448 * existing VEB. It is also possible for both uplink and vsi seids
9449 * to be zero, in order to create a floating VEB.
9450 *
9451 * Returns pointer to the successfully allocated VEB sw struct on
9452 * success, otherwise returns NULL on failure.
9453 **/
9454 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9455 u16 uplink_seid, u16 vsi_seid,
9456 u8 enabled_tc)
9457 {
9458 struct i40e_veb *veb, *uplink_veb = NULL;
9459 int vsi_idx, veb_idx;
9460 int ret;
9461
9462 /* if one seid is 0, the other must be 0 to create a floating relay */
9463 if ((uplink_seid == 0 || vsi_seid == 0) &&
9464 (uplink_seid + vsi_seid != 0)) {
9465 dev_info(&pf->pdev->dev,
9466 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9467 uplink_seid, vsi_seid);
9468 return NULL;
9469 }
9470
9471 /* make sure there is such a vsi and uplink */
9472 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9473 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9474 break;
9475 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9476 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9477 vsi_seid);
9478 return NULL;
9479 }
9480
9481 if (uplink_seid && uplink_seid != pf->mac_seid) {
9482 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9483 if (pf->veb[veb_idx] &&
9484 pf->veb[veb_idx]->seid == uplink_seid) {
9485 uplink_veb = pf->veb[veb_idx];
9486 break;
9487 }
9488 }
9489 if (!uplink_veb) {
9490 dev_info(&pf->pdev->dev,
9491 "uplink seid %d not found\n", uplink_seid);
9492 return NULL;
9493 }
9494 }
9495
9496 /* get veb sw struct */
9497 veb_idx = i40e_veb_mem_alloc(pf);
9498 if (veb_idx < 0)
9499 goto err_alloc;
9500 veb = pf->veb[veb_idx];
9501 veb->flags = flags;
9502 veb->uplink_seid = uplink_seid;
9503 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9504 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9505
9506 /* create the VEB in the switch */
9507 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9508 if (ret)
9509 goto err_veb;
9510 if (vsi_idx == pf->lan_vsi)
9511 pf->lan_veb = veb->idx;
9512
9513 return veb;
9514
9515 err_veb:
9516 i40e_veb_clear(veb);
9517 err_alloc:
9518 return NULL;
9519 }
9520
9521 /**
9522 * i40e_setup_pf_switch_element - set PF vars based on switch type
9523 * @pf: board private structure
9524 * @ele: element we are building info from
9525 * @num_reported: total number of elements
9526 * @printconfig: should we print the contents
9527 *
9528 * helper function to assist in extracting a few useful SEID values.
9529 **/
9530 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9531 struct i40e_aqc_switch_config_element_resp *ele,
9532 u16 num_reported, bool printconfig)
9533 {
9534 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9535 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9536 u8 element_type = ele->element_type;
9537 u16 seid = le16_to_cpu(ele->seid);
9538
9539 if (printconfig)
9540 dev_info(&pf->pdev->dev,
9541 "type=%d seid=%d uplink=%d downlink=%d\n",
9542 element_type, seid, uplink_seid, downlink_seid);
9543
9544 switch (element_type) {
9545 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9546 pf->mac_seid = seid;
9547 break;
9548 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9549 /* Main VEB? */
9550 if (uplink_seid != pf->mac_seid)
9551 break;
9552 if (pf->lan_veb == I40E_NO_VEB) {
9553 int v;
9554
9555 /* find existing or else empty VEB */
9556 for (v = 0; v < I40E_MAX_VEB; v++) {
9557 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9558 pf->lan_veb = v;
9559 break;
9560 }
9561 }
9562 if (pf->lan_veb == I40E_NO_VEB) {
9563 v = i40e_veb_mem_alloc(pf);
9564 if (v < 0)
9565 break;
9566 pf->lan_veb = v;
9567 }
9568 }
9569
9570 pf->veb[pf->lan_veb]->seid = seid;
9571 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9572 pf->veb[pf->lan_veb]->pf = pf;
9573 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9574 break;
9575 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9576 if (num_reported != 1)
9577 break;
9578 /* This is immediately after a reset so we can assume this is
9579 * the PF's VSI
9580 */
9581 pf->mac_seid = uplink_seid;
9582 pf->pf_seid = downlink_seid;
9583 pf->main_vsi_seid = seid;
9584 if (printconfig)
9585 dev_info(&pf->pdev->dev,
9586 "pf_seid=%d main_vsi_seid=%d\n",
9587 pf->pf_seid, pf->main_vsi_seid);
9588 break;
9589 case I40E_SWITCH_ELEMENT_TYPE_PF:
9590 case I40E_SWITCH_ELEMENT_TYPE_VF:
9591 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9592 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9593 case I40E_SWITCH_ELEMENT_TYPE_PE:
9594 case I40E_SWITCH_ELEMENT_TYPE_PA:
9595 /* ignore these for now */
9596 break;
9597 default:
9598 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9599 element_type, seid);
9600 break;
9601 }
9602 }
9603
9604 /**
9605 * i40e_fetch_switch_configuration - Get switch config from firmware
9606 * @pf: board private structure
9607 * @printconfig: should we print the contents
9608 *
9609 * Get the current switch configuration from the device and
9610 * extract a few useful SEID values.
9611 **/
9612 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9613 {
9614 struct i40e_aqc_get_switch_config_resp *sw_config;
9615 u16 next_seid = 0;
9616 int ret = 0;
9617 u8 *aq_buf;
9618 int i;
9619
9620 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9621 if (!aq_buf)
9622 return -ENOMEM;
9623
9624 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9625 do {
9626 u16 num_reported, num_total;
9627
9628 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9629 I40E_AQ_LARGE_BUF,
9630 &next_seid, NULL);
9631 if (ret) {
9632 dev_info(&pf->pdev->dev,
9633 "get switch config failed err %s aq_err %s\n",
9634 i40e_stat_str(&pf->hw, ret),
9635 i40e_aq_str(&pf->hw,
9636 pf->hw.aq.asq_last_status));
9637 kfree(aq_buf);
9638 return -ENOENT;
9639 }
9640
9641 num_reported = le16_to_cpu(sw_config->header.num_reported);
9642 num_total = le16_to_cpu(sw_config->header.num_total);
9643
9644 if (printconfig)
9645 dev_info(&pf->pdev->dev,
9646 "header: %d reported %d total\n",
9647 num_reported, num_total);
9648
9649 for (i = 0; i < num_reported; i++) {
9650 struct i40e_aqc_switch_config_element_resp *ele =
9651 &sw_config->element[i];
9652
9653 i40e_setup_pf_switch_element(pf, ele, num_reported,
9654 printconfig);
9655 }
9656 } while (next_seid != 0);
9657
9658 kfree(aq_buf);
9659 return ret;
9660 }
9661
9662 /**
9663 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9664 * @pf: board private structure
9665 * @reinit: if the Main VSI needs to re-initialized.
9666 *
9667 * Returns 0 on success, negative value on failure
9668 **/
9669 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9670 {
9671 int ret;
9672
9673 /* find out what's out there already */
9674 ret = i40e_fetch_switch_configuration(pf, false);
9675 if (ret) {
9676 dev_info(&pf->pdev->dev,
9677 "couldn't fetch switch config, err %s aq_err %s\n",
9678 i40e_stat_str(&pf->hw, ret),
9679 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9680 return ret;
9681 }
9682 i40e_pf_reset_stats(pf);
9683
9684 /* first time setup */
9685 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9686 struct i40e_vsi *vsi = NULL;
9687 u16 uplink_seid;
9688
9689 /* Set up the PF VSI associated with the PF's main VSI
9690 * that is already in the HW switch
9691 */
9692 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9693 uplink_seid = pf->veb[pf->lan_veb]->seid;
9694 else
9695 uplink_seid = pf->mac_seid;
9696 if (pf->lan_vsi == I40E_NO_VSI)
9697 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9698 else if (reinit)
9699 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9700 if (!vsi) {
9701 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9702 i40e_fdir_teardown(pf);
9703 return -EAGAIN;
9704 }
9705 } else {
9706 /* force a reset of TC and queue layout configurations */
9707 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9708 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9709 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9710 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9711 }
9712 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9713
9714 i40e_fdir_sb_setup(pf);
9715
9716 /* Setup static PF queue filter control settings */
9717 ret = i40e_setup_pf_filter_control(pf);
9718 if (ret) {
9719 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9720 ret);
9721 /* Failure here should not stop continuing other steps */
9722 }
9723
9724 /* enable RSS in the HW, even for only one queue, as the stack can use
9725 * the hash
9726 */
9727 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9728 i40e_config_rss(pf);
9729
9730 /* fill in link information and enable LSE reporting */
9731 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9732 i40e_link_event(pf);
9733
9734 /* Initialize user-specific link properties */
9735 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9736 I40E_AQ_AN_COMPLETED) ? true : false);
9737
9738 i40e_ptp_init(pf);
9739
9740 return ret;
9741 }
9742
9743 /**
9744 * i40e_determine_queue_usage - Work out queue distribution
9745 * @pf: board private structure
9746 **/
9747 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9748 {
9749 int queues_left;
9750
9751 pf->num_lan_qps = 0;
9752 #ifdef I40E_FCOE
9753 pf->num_fcoe_qps = 0;
9754 #endif
9755
9756 /* Find the max queues to be put into basic use. We'll always be
9757 * using TC0, whether or not DCB is running, and TC0 will get the
9758 * big RSS set.
9759 */
9760 queues_left = pf->hw.func_caps.num_tx_qp;
9761
9762 if ((queues_left == 1) ||
9763 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9764 /* one qp for PF, no queues for anything else */
9765 queues_left = 0;
9766 pf->rss_size = pf->num_lan_qps = 1;
9767
9768 /* make sure all the fancies are disabled */
9769 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9770 #ifdef I40E_FCOE
9771 I40E_FLAG_FCOE_ENABLED |
9772 #endif
9773 I40E_FLAG_FD_SB_ENABLED |
9774 I40E_FLAG_FD_ATR_ENABLED |
9775 I40E_FLAG_DCB_CAPABLE |
9776 I40E_FLAG_SRIOV_ENABLED |
9777 I40E_FLAG_VMDQ_ENABLED);
9778 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9779 I40E_FLAG_FD_SB_ENABLED |
9780 I40E_FLAG_FD_ATR_ENABLED |
9781 I40E_FLAG_DCB_CAPABLE))) {
9782 /* one qp for PF */
9783 pf->rss_size = pf->num_lan_qps = 1;
9784 queues_left -= pf->num_lan_qps;
9785
9786 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9787 #ifdef I40E_FCOE
9788 I40E_FLAG_FCOE_ENABLED |
9789 #endif
9790 I40E_FLAG_FD_SB_ENABLED |
9791 I40E_FLAG_FD_ATR_ENABLED |
9792 I40E_FLAG_DCB_ENABLED |
9793 I40E_FLAG_VMDQ_ENABLED);
9794 } else {
9795 /* Not enough queues for all TCs */
9796 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9797 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9798 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9799 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9800 }
9801 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9802 num_online_cpus());
9803 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9804 pf->hw.func_caps.num_tx_qp);
9805
9806 queues_left -= pf->num_lan_qps;
9807 }
9808
9809 #ifdef I40E_FCOE
9810 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9811 if (I40E_DEFAULT_FCOE <= queues_left) {
9812 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9813 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9814 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9815 } else {
9816 pf->num_fcoe_qps = 0;
9817 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9818 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9819 }
9820
9821 queues_left -= pf->num_fcoe_qps;
9822 }
9823
9824 #endif
9825 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9826 if (queues_left > 1) {
9827 queues_left -= 1; /* save 1 queue for FD */
9828 } else {
9829 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9830 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9831 }
9832 }
9833
9834 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9835 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9836 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9837 (queues_left / pf->num_vf_qps));
9838 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9839 }
9840
9841 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9842 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9843 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9844 (queues_left / pf->num_vmdq_qps));
9845 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9846 }
9847
9848 pf->queues_left = queues_left;
9849 #ifdef I40E_FCOE
9850 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9851 #endif
9852 }
9853
9854 /**
9855 * i40e_setup_pf_filter_control - Setup PF static filter control
9856 * @pf: PF to be setup
9857 *
9858 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9859 * settings. If PE/FCoE are enabled then it will also set the per PF
9860 * based filter sizes required for them. It also enables Flow director,
9861 * ethertype and macvlan type filter settings for the pf.
9862 *
9863 * Returns 0 on success, negative on failure
9864 **/
9865 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9866 {
9867 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9868
9869 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9870
9871 /* Flow Director is enabled */
9872 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9873 settings->enable_fdir = true;
9874
9875 /* Ethtype and MACVLAN filters enabled for PF */
9876 settings->enable_ethtype = true;
9877 settings->enable_macvlan = true;
9878
9879 if (i40e_set_filter_control(&pf->hw, settings))
9880 return -ENOENT;
9881
9882 return 0;
9883 }
9884
9885 #define INFO_STRING_LEN 255
9886 static void i40e_print_features(struct i40e_pf *pf)
9887 {
9888 struct i40e_hw *hw = &pf->hw;
9889 char *buf, *string;
9890
9891 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9892 if (!string) {
9893 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9894 return;
9895 }
9896
9897 buf = string;
9898
9899 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9900 #ifdef CONFIG_PCI_IOV
9901 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9902 #endif
9903 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9904 pf->hw.func_caps.num_vsis,
9905 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9906 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9907
9908 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9909 buf += sprintf(buf, "RSS ");
9910 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9911 buf += sprintf(buf, "FD_ATR ");
9912 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9913 buf += sprintf(buf, "FD_SB ");
9914 buf += sprintf(buf, "NTUPLE ");
9915 }
9916 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9917 buf += sprintf(buf, "DCB ");
9918 if (pf->flags & I40E_FLAG_PTP)
9919 buf += sprintf(buf, "PTP ");
9920 #ifdef I40E_FCOE
9921 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9922 buf += sprintf(buf, "FCOE ");
9923 #endif
9924
9925 BUG_ON(buf > (string + INFO_STRING_LEN));
9926 dev_info(&pf->pdev->dev, "%s\n", string);
9927 kfree(string);
9928 }
9929
9930 /**
9931 * i40e_probe - Device initialization routine
9932 * @pdev: PCI device information struct
9933 * @ent: entry in i40e_pci_tbl
9934 *
9935 * i40e_probe initializes a PF identified by a pci_dev structure.
9936 * The OS initialization, configuring of the PF private structure,
9937 * and a hardware reset occur.
9938 *
9939 * Returns 0 on success, negative on failure
9940 **/
9941 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9942 {
9943 struct i40e_aq_get_phy_abilities_resp abilities;
9944 struct i40e_pf *pf;
9945 struct i40e_hw *hw;
9946 static u16 pfs_found;
9947 u16 wol_nvm_bits;
9948 u16 link_status;
9949 int err = 0;
9950 u32 len;
9951 u32 i;
9952
9953 err = pci_enable_device_mem(pdev);
9954 if (err)
9955 return err;
9956
9957 /* set up for high or low dma */
9958 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9959 if (err) {
9960 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9961 if (err) {
9962 dev_err(&pdev->dev,
9963 "DMA configuration failed: 0x%x\n", err);
9964 goto err_dma;
9965 }
9966 }
9967
9968 /* set up pci connections */
9969 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9970 IORESOURCE_MEM), i40e_driver_name);
9971 if (err) {
9972 dev_info(&pdev->dev,
9973 "pci_request_selected_regions failed %d\n", err);
9974 goto err_pci_reg;
9975 }
9976
9977 pci_enable_pcie_error_reporting(pdev);
9978 pci_set_master(pdev);
9979
9980 /* Now that we have a PCI connection, we need to do the
9981 * low level device setup. This is primarily setting up
9982 * the Admin Queue structures and then querying for the
9983 * device's current profile information.
9984 */
9985 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9986 if (!pf) {
9987 err = -ENOMEM;
9988 goto err_pf_alloc;
9989 }
9990 pf->next_vsi = 0;
9991 pf->pdev = pdev;
9992 set_bit(__I40E_DOWN, &pf->state);
9993
9994 hw = &pf->hw;
9995 hw->back = pf;
9996
9997 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9998 I40E_MAX_CSR_SPACE);
9999
10000 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10001 if (!hw->hw_addr) {
10002 err = -EIO;
10003 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10004 (unsigned int)pci_resource_start(pdev, 0),
10005 pf->ioremap_len, err);
10006 goto err_ioremap;
10007 }
10008 hw->vendor_id = pdev->vendor;
10009 hw->device_id = pdev->device;
10010 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10011 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10012 hw->subsystem_device_id = pdev->subsystem_device;
10013 hw->bus.device = PCI_SLOT(pdev->devfn);
10014 hw->bus.func = PCI_FUNC(pdev->devfn);
10015 pf->instance = pfs_found;
10016
10017 if (debug != -1) {
10018 pf->msg_enable = pf->hw.debug_mask;
10019 pf->msg_enable = debug;
10020 }
10021
10022 /* do a special CORER for clearing PXE mode once at init */
10023 if (hw->revision_id == 0 &&
10024 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10025 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10026 i40e_flush(hw);
10027 msleep(200);
10028 pf->corer_count++;
10029
10030 i40e_clear_pxe_mode(hw);
10031 }
10032
10033 /* Reset here to make sure all is clean and to define PF 'n' */
10034 i40e_clear_hw(hw);
10035 err = i40e_pf_reset(hw);
10036 if (err) {
10037 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10038 goto err_pf_reset;
10039 }
10040 pf->pfr_count++;
10041
10042 hw->aq.num_arq_entries = I40E_AQ_LEN;
10043 hw->aq.num_asq_entries = I40E_AQ_LEN;
10044 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10045 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10046 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10047
10048 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10049 "%s-%s:misc",
10050 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10051
10052 err = i40e_init_shared_code(hw);
10053 if (err) {
10054 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10055 err);
10056 goto err_pf_reset;
10057 }
10058
10059 /* set up a default setting for link flow control */
10060 pf->hw.fc.requested_mode = I40E_FC_NONE;
10061
10062 err = i40e_init_adminq(hw);
10063 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10064 if (err) {
10065 dev_info(&pdev->dev,
10066 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10067 goto err_pf_reset;
10068 }
10069
10070 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10071 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10072 dev_info(&pdev->dev,
10073 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10074 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10075 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10076 dev_info(&pdev->dev,
10077 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10078
10079 i40e_verify_eeprom(pf);
10080
10081 /* Rev 0 hardware was never productized */
10082 if (hw->revision_id < 1)
10083 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10084
10085 i40e_clear_pxe_mode(hw);
10086 err = i40e_get_capabilities(pf);
10087 if (err)
10088 goto err_adminq_setup;
10089
10090 err = i40e_sw_init(pf);
10091 if (err) {
10092 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10093 goto err_sw_init;
10094 }
10095
10096 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10097 hw->func_caps.num_rx_qp,
10098 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10099 if (err) {
10100 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10101 goto err_init_lan_hmc;
10102 }
10103
10104 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10105 if (err) {
10106 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10107 err = -ENOENT;
10108 goto err_configure_lan_hmc;
10109 }
10110
10111 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10112 * Ignore error return codes because if it was already disabled via
10113 * hardware settings this will fail
10114 */
10115 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10116 (pf->hw.aq.fw_maj_ver < 4)) {
10117 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10118 i40e_aq_stop_lldp(hw, true, NULL);
10119 }
10120
10121 i40e_get_mac_addr(hw, hw->mac.addr);
10122 if (!is_valid_ether_addr(hw->mac.addr)) {
10123 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10124 err = -EIO;
10125 goto err_mac_addr;
10126 }
10127 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10128 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10129 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10130 if (is_valid_ether_addr(hw->mac.port_addr))
10131 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10132 #ifdef I40E_FCOE
10133 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10134 if (err)
10135 dev_info(&pdev->dev,
10136 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10137 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10138 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10139 hw->mac.san_addr);
10140 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10141 }
10142 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10143 #endif /* I40E_FCOE */
10144
10145 pci_set_drvdata(pdev, pf);
10146 pci_save_state(pdev);
10147 #ifdef CONFIG_I40E_DCB
10148 err = i40e_init_pf_dcb(pf);
10149 if (err) {
10150 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10151 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10152 /* Continue without DCB enabled */
10153 }
10154 #endif /* CONFIG_I40E_DCB */
10155
10156 /* set up periodic task facility */
10157 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10158 pf->service_timer_period = HZ;
10159
10160 INIT_WORK(&pf->service_task, i40e_service_task);
10161 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10162 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10163
10164 /* NVM bit on means WoL disabled for the port */
10165 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10166 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10167 pf->wol_en = false;
10168 else
10169 pf->wol_en = true;
10170 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10171
10172 /* set up the main switch operations */
10173 i40e_determine_queue_usage(pf);
10174 err = i40e_init_interrupt_scheme(pf);
10175 if (err)
10176 goto err_switch_setup;
10177
10178 /* The number of VSIs reported by the FW is the minimum guaranteed
10179 * to us; HW supports far more and we share the remaining pool with
10180 * the other PFs. We allocate space for more than the guarantee with
10181 * the understanding that we might not get them all later.
10182 */
10183 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10184 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10185 else
10186 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10187
10188 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10189 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10190 pf->vsi = kzalloc(len, GFP_KERNEL);
10191 if (!pf->vsi) {
10192 err = -ENOMEM;
10193 goto err_switch_setup;
10194 }
10195
10196 #ifdef CONFIG_PCI_IOV
10197 /* prep for VF support */
10198 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10199 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10200 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10201 if (pci_num_vf(pdev))
10202 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10203 }
10204 #endif
10205 err = i40e_setup_pf_switch(pf, false);
10206 if (err) {
10207 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10208 goto err_vsis;
10209 }
10210 /* if FDIR VSI was set up, start it now */
10211 for (i = 0; i < pf->num_alloc_vsi; i++) {
10212 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10213 i40e_vsi_open(pf->vsi[i]);
10214 break;
10215 }
10216 }
10217
10218 /* driver is only interested in link up/down and module qualification
10219 * reports from firmware
10220 */
10221 err = i40e_aq_set_phy_int_mask(&pf->hw,
10222 I40E_AQ_EVENT_LINK_UPDOWN |
10223 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10224 if (err)
10225 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10226 i40e_stat_str(&pf->hw, err),
10227 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10228
10229 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10230 (pf->hw.aq.fw_maj_ver < 4)) {
10231 msleep(75);
10232 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10233 if (err)
10234 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10235 i40e_stat_str(&pf->hw, err),
10236 i40e_aq_str(&pf->hw,
10237 pf->hw.aq.asq_last_status));
10238 }
10239 /* The main driver is (mostly) up and happy. We need to set this state
10240 * before setting up the misc vector or we get a race and the vector
10241 * ends up disabled forever.
10242 */
10243 clear_bit(__I40E_DOWN, &pf->state);
10244
10245 /* In case of MSIX we are going to setup the misc vector right here
10246 * to handle admin queue events etc. In case of legacy and MSI
10247 * the misc functionality and queue processing is combined in
10248 * the same vector and that gets setup at open.
10249 */
10250 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10251 err = i40e_setup_misc_vector(pf);
10252 if (err) {
10253 dev_info(&pdev->dev,
10254 "setup of misc vector failed: %d\n", err);
10255 goto err_vsis;
10256 }
10257 }
10258
10259 #ifdef CONFIG_PCI_IOV
10260 /* prep for VF support */
10261 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10262 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10263 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10264 u32 val;
10265
10266 /* disable link interrupts for VFs */
10267 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10268 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10269 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10270 i40e_flush(hw);
10271
10272 if (pci_num_vf(pdev)) {
10273 dev_info(&pdev->dev,
10274 "Active VFs found, allocating resources.\n");
10275 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10276 if (err)
10277 dev_info(&pdev->dev,
10278 "Error %d allocating resources for existing VFs\n",
10279 err);
10280 }
10281 }
10282 #endif /* CONFIG_PCI_IOV */
10283
10284 pfs_found++;
10285
10286 i40e_dbg_pf_init(pf);
10287
10288 /* tell the firmware that we're starting */
10289 i40e_send_version(pf);
10290
10291 /* since everything's happy, start the service_task timer */
10292 mod_timer(&pf->service_timer,
10293 round_jiffies(jiffies + pf->service_timer_period));
10294
10295 #ifdef I40E_FCOE
10296 /* create FCoE interface */
10297 i40e_fcoe_vsi_setup(pf);
10298
10299 #endif
10300 /* Get the negotiated link width and speed from PCI config space */
10301 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10302
10303 i40e_set_pci_config_data(hw, link_status);
10304
10305 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10306 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10307 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10308 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10309 "Unknown"),
10310 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10311 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10312 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10313 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10314 "Unknown"));
10315
10316 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10317 hw->bus.speed < i40e_bus_speed_8000) {
10318 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10319 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10320 }
10321
10322 /* get the requested speeds from the fw */
10323 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10324 if (err)
10325 dev_info(&pf->pdev->dev,
10326 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10327 i40e_stat_str(&pf->hw, err),
10328 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10329 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10330
10331 /* print a string summarizing features */
10332 i40e_print_features(pf);
10333
10334 return 0;
10335
10336 /* Unwind what we've done if something failed in the setup */
10337 err_vsis:
10338 set_bit(__I40E_DOWN, &pf->state);
10339 i40e_clear_interrupt_scheme(pf);
10340 kfree(pf->vsi);
10341 err_switch_setup:
10342 i40e_reset_interrupt_capability(pf);
10343 del_timer_sync(&pf->service_timer);
10344 err_mac_addr:
10345 err_configure_lan_hmc:
10346 (void)i40e_shutdown_lan_hmc(hw);
10347 err_init_lan_hmc:
10348 kfree(pf->qp_pile);
10349 err_sw_init:
10350 err_adminq_setup:
10351 (void)i40e_shutdown_adminq(hw);
10352 err_pf_reset:
10353 iounmap(hw->hw_addr);
10354 err_ioremap:
10355 kfree(pf);
10356 err_pf_alloc:
10357 pci_disable_pcie_error_reporting(pdev);
10358 pci_release_selected_regions(pdev,
10359 pci_select_bars(pdev, IORESOURCE_MEM));
10360 err_pci_reg:
10361 err_dma:
10362 pci_disable_device(pdev);
10363 return err;
10364 }
10365
10366 /**
10367 * i40e_remove - Device removal routine
10368 * @pdev: PCI device information struct
10369 *
10370 * i40e_remove is called by the PCI subsystem to alert the driver
10371 * that is should release a PCI device. This could be caused by a
10372 * Hot-Plug event, or because the driver is going to be removed from
10373 * memory.
10374 **/
10375 static void i40e_remove(struct pci_dev *pdev)
10376 {
10377 struct i40e_pf *pf = pci_get_drvdata(pdev);
10378 i40e_status ret_code;
10379 int i;
10380
10381 i40e_dbg_pf_exit(pf);
10382
10383 i40e_ptp_stop(pf);
10384
10385 /* no more scheduling of any task */
10386 set_bit(__I40E_DOWN, &pf->state);
10387 del_timer_sync(&pf->service_timer);
10388 cancel_work_sync(&pf->service_task);
10389 i40e_fdir_teardown(pf);
10390
10391 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10392 i40e_free_vfs(pf);
10393 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10394 }
10395
10396 i40e_fdir_teardown(pf);
10397
10398 /* If there is a switch structure or any orphans, remove them.
10399 * This will leave only the PF's VSI remaining.
10400 */
10401 for (i = 0; i < I40E_MAX_VEB; i++) {
10402 if (!pf->veb[i])
10403 continue;
10404
10405 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10406 pf->veb[i]->uplink_seid == 0)
10407 i40e_switch_branch_release(pf->veb[i]);
10408 }
10409
10410 /* Now we can shutdown the PF's VSI, just before we kill
10411 * adminq and hmc.
10412 */
10413 if (pf->vsi[pf->lan_vsi])
10414 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10415
10416 /* shutdown and destroy the HMC */
10417 if (pf->hw.hmc.hmc_obj) {
10418 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10419 if (ret_code)
10420 dev_warn(&pdev->dev,
10421 "Failed to destroy the HMC resources: %d\n",
10422 ret_code);
10423 }
10424
10425 /* shutdown the adminq */
10426 ret_code = i40e_shutdown_adminq(&pf->hw);
10427 if (ret_code)
10428 dev_warn(&pdev->dev,
10429 "Failed to destroy the Admin Queue resources: %d\n",
10430 ret_code);
10431
10432 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10433 i40e_clear_interrupt_scheme(pf);
10434 for (i = 0; i < pf->num_alloc_vsi; i++) {
10435 if (pf->vsi[i]) {
10436 i40e_vsi_clear_rings(pf->vsi[i]);
10437 i40e_vsi_clear(pf->vsi[i]);
10438 pf->vsi[i] = NULL;
10439 }
10440 }
10441
10442 for (i = 0; i < I40E_MAX_VEB; i++) {
10443 kfree(pf->veb[i]);
10444 pf->veb[i] = NULL;
10445 }
10446
10447 kfree(pf->qp_pile);
10448 kfree(pf->vsi);
10449
10450 iounmap(pf->hw.hw_addr);
10451 kfree(pf);
10452 pci_release_selected_regions(pdev,
10453 pci_select_bars(pdev, IORESOURCE_MEM));
10454
10455 pci_disable_pcie_error_reporting(pdev);
10456 pci_disable_device(pdev);
10457 }
10458
10459 /**
10460 * i40e_pci_error_detected - warning that something funky happened in PCI land
10461 * @pdev: PCI device information struct
10462 *
10463 * Called to warn that something happened and the error handling steps
10464 * are in progress. Allows the driver to quiesce things, be ready for
10465 * remediation.
10466 **/
10467 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10468 enum pci_channel_state error)
10469 {
10470 struct i40e_pf *pf = pci_get_drvdata(pdev);
10471
10472 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10473
10474 /* shutdown all operations */
10475 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10476 rtnl_lock();
10477 i40e_prep_for_reset(pf);
10478 rtnl_unlock();
10479 }
10480
10481 /* Request a slot reset */
10482 return PCI_ERS_RESULT_NEED_RESET;
10483 }
10484
10485 /**
10486 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10487 * @pdev: PCI device information struct
10488 *
10489 * Called to find if the driver can work with the device now that
10490 * the pci slot has been reset. If a basic connection seems good
10491 * (registers are readable and have sane content) then return a
10492 * happy little PCI_ERS_RESULT_xxx.
10493 **/
10494 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10495 {
10496 struct i40e_pf *pf = pci_get_drvdata(pdev);
10497 pci_ers_result_t result;
10498 int err;
10499 u32 reg;
10500
10501 dev_dbg(&pdev->dev, "%s\n", __func__);
10502 if (pci_enable_device_mem(pdev)) {
10503 dev_info(&pdev->dev,
10504 "Cannot re-enable PCI device after reset.\n");
10505 result = PCI_ERS_RESULT_DISCONNECT;
10506 } else {
10507 pci_set_master(pdev);
10508 pci_restore_state(pdev);
10509 pci_save_state(pdev);
10510 pci_wake_from_d3(pdev, false);
10511
10512 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10513 if (reg == 0)
10514 result = PCI_ERS_RESULT_RECOVERED;
10515 else
10516 result = PCI_ERS_RESULT_DISCONNECT;
10517 }
10518
10519 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10520 if (err) {
10521 dev_info(&pdev->dev,
10522 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10523 err);
10524 /* non-fatal, continue */
10525 }
10526
10527 return result;
10528 }
10529
10530 /**
10531 * i40e_pci_error_resume - restart operations after PCI error recovery
10532 * @pdev: PCI device information struct
10533 *
10534 * Called to allow the driver to bring things back up after PCI error
10535 * and/or reset recovery has finished.
10536 **/
10537 static void i40e_pci_error_resume(struct pci_dev *pdev)
10538 {
10539 struct i40e_pf *pf = pci_get_drvdata(pdev);
10540
10541 dev_dbg(&pdev->dev, "%s\n", __func__);
10542 if (test_bit(__I40E_SUSPENDED, &pf->state))
10543 return;
10544
10545 rtnl_lock();
10546 i40e_handle_reset_warning(pf);
10547 rtnl_unlock();
10548 }
10549
10550 /**
10551 * i40e_shutdown - PCI callback for shutting down
10552 * @pdev: PCI device information struct
10553 **/
10554 static void i40e_shutdown(struct pci_dev *pdev)
10555 {
10556 struct i40e_pf *pf = pci_get_drvdata(pdev);
10557 struct i40e_hw *hw = &pf->hw;
10558
10559 set_bit(__I40E_SUSPENDED, &pf->state);
10560 set_bit(__I40E_DOWN, &pf->state);
10561 rtnl_lock();
10562 i40e_prep_for_reset(pf);
10563 rtnl_unlock();
10564
10565 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10566 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10567
10568 del_timer_sync(&pf->service_timer);
10569 cancel_work_sync(&pf->service_task);
10570 i40e_fdir_teardown(pf);
10571
10572 rtnl_lock();
10573 i40e_prep_for_reset(pf);
10574 rtnl_unlock();
10575
10576 wr32(hw, I40E_PFPM_APM,
10577 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10578 wr32(hw, I40E_PFPM_WUFC,
10579 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10580
10581 i40e_clear_interrupt_scheme(pf);
10582
10583 if (system_state == SYSTEM_POWER_OFF) {
10584 pci_wake_from_d3(pdev, pf->wol_en);
10585 pci_set_power_state(pdev, PCI_D3hot);
10586 }
10587 }
10588
10589 #ifdef CONFIG_PM
10590 /**
10591 * i40e_suspend - PCI callback for moving to D3
10592 * @pdev: PCI device information struct
10593 **/
10594 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10595 {
10596 struct i40e_pf *pf = pci_get_drvdata(pdev);
10597 struct i40e_hw *hw = &pf->hw;
10598
10599 set_bit(__I40E_SUSPENDED, &pf->state);
10600 set_bit(__I40E_DOWN, &pf->state);
10601
10602 rtnl_lock();
10603 i40e_prep_for_reset(pf);
10604 rtnl_unlock();
10605
10606 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10607 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10608
10609 pci_wake_from_d3(pdev, pf->wol_en);
10610 pci_set_power_state(pdev, PCI_D3hot);
10611
10612 return 0;
10613 }
10614
10615 /**
10616 * i40e_resume - PCI callback for waking up from D3
10617 * @pdev: PCI device information struct
10618 **/
10619 static int i40e_resume(struct pci_dev *pdev)
10620 {
10621 struct i40e_pf *pf = pci_get_drvdata(pdev);
10622 u32 err;
10623
10624 pci_set_power_state(pdev, PCI_D0);
10625 pci_restore_state(pdev);
10626 /* pci_restore_state() clears dev->state_saves, so
10627 * call pci_save_state() again to restore it.
10628 */
10629 pci_save_state(pdev);
10630
10631 err = pci_enable_device_mem(pdev);
10632 if (err) {
10633 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10634 return err;
10635 }
10636 pci_set_master(pdev);
10637
10638 /* no wakeup events while running */
10639 pci_wake_from_d3(pdev, false);
10640
10641 /* handling the reset will rebuild the device state */
10642 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10643 clear_bit(__I40E_DOWN, &pf->state);
10644 rtnl_lock();
10645 i40e_reset_and_rebuild(pf, false);
10646 rtnl_unlock();
10647 }
10648
10649 return 0;
10650 }
10651
10652 #endif
10653 static const struct pci_error_handlers i40e_err_handler = {
10654 .error_detected = i40e_pci_error_detected,
10655 .slot_reset = i40e_pci_error_slot_reset,
10656 .resume = i40e_pci_error_resume,
10657 };
10658
10659 static struct pci_driver i40e_driver = {
10660 .name = i40e_driver_name,
10661 .id_table = i40e_pci_tbl,
10662 .probe = i40e_probe,
10663 .remove = i40e_remove,
10664 #ifdef CONFIG_PM
10665 .suspend = i40e_suspend,
10666 .resume = i40e_resume,
10667 #endif
10668 .shutdown = i40e_shutdown,
10669 .err_handler = &i40e_err_handler,
10670 .sriov_configure = i40e_pci_sriov_configure,
10671 };
10672
10673 /**
10674 * i40e_init_module - Driver registration routine
10675 *
10676 * i40e_init_module is the first routine called when the driver is
10677 * loaded. All it does is register with the PCI subsystem.
10678 **/
10679 static int __init i40e_init_module(void)
10680 {
10681 pr_info("%s: %s - version %s\n", i40e_driver_name,
10682 i40e_driver_string, i40e_driver_version_str);
10683 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10684
10685 i40e_dbg_init();
10686 return pci_register_driver(&i40e_driver);
10687 }
10688 module_init(i40e_init_module);
10689
10690 /**
10691 * i40e_exit_module - Driver exit cleanup routine
10692 *
10693 * i40e_exit_module is called just before the driver is removed
10694 * from memory.
10695 **/
10696 static void __exit i40e_exit_module(void)
10697 {
10698 pci_unregister_driver(&i40e_driver);
10699 i40e_dbg_exit();
10700 }
10701 module_exit(i40e_exit_module);
Linux kernel - Deliverables
This page took 0.244711 seconds and 6 git commands to generate.