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i40e/i40evf: refactor tx timeout logic
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
82 /* required last entry */
83 {0, }
84 };
85 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
86
87 #define I40E_MAX_VF_COUNT 128
88 static int debug = -1;
89 module_param(debug, int, 0);
90 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
91
92 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
93 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
94 MODULE_LICENSE("GPL");
95 MODULE_VERSION(DRV_VERSION);
96
97 /**
98 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
99 * @hw: pointer to the HW structure
100 * @mem: ptr to mem struct to fill out
101 * @size: size of memory requested
102 * @alignment: what to align the allocation to
103 **/
104 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
105 u64 size, u32 alignment)
106 {
107 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
108
109 mem->size = ALIGN(size, alignment);
110 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
111 &mem->pa, GFP_KERNEL);
112 if (!mem->va)
113 return -ENOMEM;
114
115 return 0;
116 }
117
118 /**
119 * i40e_free_dma_mem_d - OS specific memory free for shared code
120 * @hw: pointer to the HW structure
121 * @mem: ptr to mem struct to free
122 **/
123 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
124 {
125 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
126
127 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
128 mem->va = NULL;
129 mem->pa = 0;
130 mem->size = 0;
131
132 return 0;
133 }
134
135 /**
136 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
137 * @hw: pointer to the HW structure
138 * @mem: ptr to mem struct to fill out
139 * @size: size of memory requested
140 **/
141 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
142 u32 size)
143 {
144 mem->size = size;
145 mem->va = kzalloc(size, GFP_KERNEL);
146
147 if (!mem->va)
148 return -ENOMEM;
149
150 return 0;
151 }
152
153 /**
154 * i40e_free_virt_mem_d - OS specific memory free for shared code
155 * @hw: pointer to the HW structure
156 * @mem: ptr to mem struct to free
157 **/
158 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
159 {
160 /* it's ok to kfree a NULL pointer */
161 kfree(mem->va);
162 mem->va = NULL;
163 mem->size = 0;
164
165 return 0;
166 }
167
168 /**
169 * i40e_get_lump - find a lump of free generic resource
170 * @pf: board private structure
171 * @pile: the pile of resource to search
172 * @needed: the number of items needed
173 * @id: an owner id to stick on the items assigned
174 *
175 * Returns the base item index of the lump, or negative for error
176 *
177 * The search_hint trick and lack of advanced fit-finding only work
178 * because we're highly likely to have all the same size lump requests.
179 * Linear search time and any fragmentation should be minimal.
180 **/
181 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
182 u16 needed, u16 id)
183 {
184 int ret = -ENOMEM;
185 int i, j;
186
187 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
188 dev_info(&pf->pdev->dev,
189 "param err: pile=%p needed=%d id=0x%04x\n",
190 pile, needed, id);
191 return -EINVAL;
192 }
193
194 /* start the linear search with an imperfect hint */
195 i = pile->search_hint;
196 while (i < pile->num_entries) {
197 /* skip already allocated entries */
198 if (pile->list[i] & I40E_PILE_VALID_BIT) {
199 i++;
200 continue;
201 }
202
203 /* do we have enough in this lump? */
204 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
205 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
206 break;
207 }
208
209 if (j == needed) {
210 /* there was enough, so assign it to the requestor */
211 for (j = 0; j < needed; j++)
212 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
213 ret = i;
214 pile->search_hint = i + j;
215 break;
216 } else {
217 /* not enough, so skip over it and continue looking */
218 i += j;
219 }
220 }
221
222 return ret;
223 }
224
225 /**
226 * i40e_put_lump - return a lump of generic resource
227 * @pile: the pile of resource to search
228 * @index: the base item index
229 * @id: the owner id of the items assigned
230 *
231 * Returns the count of items in the lump
232 **/
233 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
234 {
235 int valid_id = (id | I40E_PILE_VALID_BIT);
236 int count = 0;
237 int i;
238
239 if (!pile || index >= pile->num_entries)
240 return -EINVAL;
241
242 for (i = index;
243 i < pile->num_entries && pile->list[i] == valid_id;
244 i++) {
245 pile->list[i] = 0;
246 count++;
247 }
248
249 if (count && index < pile->search_hint)
250 pile->search_hint = index;
251
252 return count;
253 }
254
255 /**
256 * i40e_find_vsi_from_id - searches for the vsi with the given id
257 * @pf - the pf structure to search for the vsi
258 * @id - id of the vsi it is searching for
259 **/
260 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
261 {
262 int i;
263
264 for (i = 0; i < pf->num_alloc_vsi; i++)
265 if (pf->vsi[i] && (pf->vsi[i]->id == id))
266 return pf->vsi[i];
267
268 return NULL;
269 }
270
271 /**
272 * i40e_service_event_schedule - Schedule the service task to wake up
273 * @pf: board private structure
274 *
275 * If not already scheduled, this puts the task into the work queue
276 **/
277 static void i40e_service_event_schedule(struct i40e_pf *pf)
278 {
279 if (!test_bit(__I40E_DOWN, &pf->state) &&
280 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
281 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
282 schedule_work(&pf->service_task);
283 }
284
285 /**
286 * i40e_tx_timeout - Respond to a Tx Hang
287 * @netdev: network interface device structure
288 *
289 * If any port has noticed a Tx timeout, it is likely that the whole
290 * device is munged, not just the one netdev port, so go for the full
291 * reset.
292 **/
293 #ifdef I40E_FCOE
294 void i40e_tx_timeout(struct net_device *netdev)
295 #else
296 static void i40e_tx_timeout(struct net_device *netdev)
297 #endif
298 {
299 struct i40e_netdev_priv *np = netdev_priv(netdev);
300 struct i40e_vsi *vsi = np->vsi;
301 struct i40e_pf *pf = vsi->back;
302 struct i40e_ring *tx_ring = NULL;
303 unsigned int i, hung_queue = 0;
304 u32 head, val;
305
306 pf->tx_timeout_count++;
307
308 /* find the stopped queue the same way the stack does */
309 for (i = 0; i < netdev->num_tx_queues; i++) {
310 struct netdev_queue *q;
311 unsigned long trans_start;
312
313 q = netdev_get_tx_queue(netdev, i);
314 trans_start = q->trans_start ? : netdev->trans_start;
315 if (netif_xmit_stopped(q) &&
316 time_after(jiffies,
317 (trans_start + netdev->watchdog_timeo))) {
318 hung_queue = i;
319 break;
320 }
321 }
322
323 if (i == netdev->num_tx_queues) {
324 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
325 } else {
326 /* now that we have an index, find the tx_ring struct */
327 for (i = 0; i < vsi->num_queue_pairs; i++) {
328 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
329 if (hung_queue ==
330 vsi->tx_rings[i]->queue_index) {
331 tx_ring = vsi->tx_rings[i];
332 break;
333 }
334 }
335 }
336 }
337
338 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
339 pf->tx_timeout_recovery_level = 1; /* reset after some time */
340 else if (time_before(jiffies,
341 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
342 return; /* don't do any new action before the next timeout */
343
344 if (tx_ring) {
345 head = i40e_get_head(tx_ring);
346 /* Read interrupt register */
347 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
348 val = rd32(&pf->hw,
349 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
350 tx_ring->vsi->base_vector - 1));
351 else
352 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
353
354 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
355 vsi->seid, hung_queue, tx_ring->next_to_clean,
356 head, tx_ring->next_to_use,
357 readl(tx_ring->tail), val);
358 }
359
360 pf->tx_timeout_last_recovery = jiffies;
361 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
362 pf->tx_timeout_recovery_level, hung_queue);
363
364 switch (pf->tx_timeout_recovery_level) {
365 case 1:
366 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
367 break;
368 case 2:
369 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
370 break;
371 case 3:
372 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
373 break;
374 default:
375 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
376 break;
377 }
378
379 i40e_service_event_schedule(pf);
380 pf->tx_timeout_recovery_level++;
381 }
382
383 /**
384 * i40e_release_rx_desc - Store the new tail and head values
385 * @rx_ring: ring to bump
386 * @val: new head index
387 **/
388 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
389 {
390 rx_ring->next_to_use = val;
391
392 /* Force memory writes to complete before letting h/w
393 * know there are new descriptors to fetch. (Only
394 * applicable for weak-ordered memory model archs,
395 * such as IA-64).
396 */
397 wmb();
398 writel(val, rx_ring->tail);
399 }
400
401 /**
402 * i40e_get_vsi_stats_struct - Get System Network Statistics
403 * @vsi: the VSI we care about
404 *
405 * Returns the address of the device statistics structure.
406 * The statistics are actually updated from the service task.
407 **/
408 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
409 {
410 return &vsi->net_stats;
411 }
412
413 /**
414 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
415 * @netdev: network interface device structure
416 *
417 * Returns the address of the device statistics structure.
418 * The statistics are actually updated from the service task.
419 **/
420 #ifdef I40E_FCOE
421 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
422 struct net_device *netdev,
423 struct rtnl_link_stats64 *stats)
424 #else
425 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
426 struct net_device *netdev,
427 struct rtnl_link_stats64 *stats)
428 #endif
429 {
430 struct i40e_netdev_priv *np = netdev_priv(netdev);
431 struct i40e_ring *tx_ring, *rx_ring;
432 struct i40e_vsi *vsi = np->vsi;
433 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
434 int i;
435
436 if (test_bit(__I40E_DOWN, &vsi->state))
437 return stats;
438
439 if (!vsi->tx_rings)
440 return stats;
441
442 rcu_read_lock();
443 for (i = 0; i < vsi->num_queue_pairs; i++) {
444 u64 bytes, packets;
445 unsigned int start;
446
447 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
448 if (!tx_ring)
449 continue;
450
451 do {
452 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
453 packets = tx_ring->stats.packets;
454 bytes = tx_ring->stats.bytes;
455 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
456
457 stats->tx_packets += packets;
458 stats->tx_bytes += bytes;
459 rx_ring = &tx_ring[1];
460
461 do {
462 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
463 packets = rx_ring->stats.packets;
464 bytes = rx_ring->stats.bytes;
465 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
466
467 stats->rx_packets += packets;
468 stats->rx_bytes += bytes;
469 }
470 rcu_read_unlock();
471
472 /* following stats updated by i40e_watchdog_subtask() */
473 stats->multicast = vsi_stats->multicast;
474 stats->tx_errors = vsi_stats->tx_errors;
475 stats->tx_dropped = vsi_stats->tx_dropped;
476 stats->rx_errors = vsi_stats->rx_errors;
477 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
478 stats->rx_length_errors = vsi_stats->rx_length_errors;
479
480 return stats;
481 }
482
483 /**
484 * i40e_vsi_reset_stats - Resets all stats of the given vsi
485 * @vsi: the VSI to have its stats reset
486 **/
487 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
488 {
489 struct rtnl_link_stats64 *ns;
490 int i;
491
492 if (!vsi)
493 return;
494
495 ns = i40e_get_vsi_stats_struct(vsi);
496 memset(ns, 0, sizeof(*ns));
497 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
498 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
499 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
500 if (vsi->rx_rings && vsi->rx_rings[0]) {
501 for (i = 0; i < vsi->num_queue_pairs; i++) {
502 memset(&vsi->rx_rings[i]->stats, 0 ,
503 sizeof(vsi->rx_rings[i]->stats));
504 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
505 sizeof(vsi->rx_rings[i]->rx_stats));
506 memset(&vsi->tx_rings[i]->stats, 0 ,
507 sizeof(vsi->tx_rings[i]->stats));
508 memset(&vsi->tx_rings[i]->tx_stats, 0,
509 sizeof(vsi->tx_rings[i]->tx_stats));
510 }
511 }
512 vsi->stat_offsets_loaded = false;
513 }
514
515 /**
516 * i40e_pf_reset_stats - Reset all of the stats for the given PF
517 * @pf: the PF to be reset
518 **/
519 void i40e_pf_reset_stats(struct i40e_pf *pf)
520 {
521 int i;
522
523 memset(&pf->stats, 0, sizeof(pf->stats));
524 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
525 pf->stat_offsets_loaded = false;
526
527 for (i = 0; i < I40E_MAX_VEB; i++) {
528 if (pf->veb[i]) {
529 memset(&pf->veb[i]->stats, 0,
530 sizeof(pf->veb[i]->stats));
531 memset(&pf->veb[i]->stats_offsets, 0,
532 sizeof(pf->veb[i]->stats_offsets));
533 pf->veb[i]->stat_offsets_loaded = false;
534 }
535 }
536 }
537
538 /**
539 * i40e_stat_update48 - read and update a 48 bit stat from the chip
540 * @hw: ptr to the hardware info
541 * @hireg: the high 32 bit reg to read
542 * @loreg: the low 32 bit reg to read
543 * @offset_loaded: has the initial offset been loaded yet
544 * @offset: ptr to current offset value
545 * @stat: ptr to the stat
546 *
547 * Since the device stats are not reset at PFReset, they likely will not
548 * be zeroed when the driver starts. We'll save the first values read
549 * and use them as offsets to be subtracted from the raw values in order
550 * to report stats that count from zero. In the process, we also manage
551 * the potential roll-over.
552 **/
553 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
554 bool offset_loaded, u64 *offset, u64 *stat)
555 {
556 u64 new_data;
557
558 if (hw->device_id == I40E_DEV_ID_QEMU) {
559 new_data = rd32(hw, loreg);
560 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
561 } else {
562 new_data = rd64(hw, loreg);
563 }
564 if (!offset_loaded)
565 *offset = new_data;
566 if (likely(new_data >= *offset))
567 *stat = new_data - *offset;
568 else
569 *stat = (new_data + BIT_ULL(48)) - *offset;
570 *stat &= 0xFFFFFFFFFFFFULL;
571 }
572
573 /**
574 * i40e_stat_update32 - read and update a 32 bit stat from the chip
575 * @hw: ptr to the hardware info
576 * @reg: the hw reg to read
577 * @offset_loaded: has the initial offset been loaded yet
578 * @offset: ptr to current offset value
579 * @stat: ptr to the stat
580 **/
581 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
582 bool offset_loaded, u64 *offset, u64 *stat)
583 {
584 u32 new_data;
585
586 new_data = rd32(hw, reg);
587 if (!offset_loaded)
588 *offset = new_data;
589 if (likely(new_data >= *offset))
590 *stat = (u32)(new_data - *offset);
591 else
592 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
593 }
594
595 /**
596 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
597 * @vsi: the VSI to be updated
598 **/
599 void i40e_update_eth_stats(struct i40e_vsi *vsi)
600 {
601 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
602 struct i40e_pf *pf = vsi->back;
603 struct i40e_hw *hw = &pf->hw;
604 struct i40e_eth_stats *oes;
605 struct i40e_eth_stats *es; /* device's eth stats */
606
607 es = &vsi->eth_stats;
608 oes = &vsi->eth_stats_offsets;
609
610 /* Gather up the stats that the hw collects */
611 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
612 vsi->stat_offsets_loaded,
613 &oes->tx_errors, &es->tx_errors);
614 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
615 vsi->stat_offsets_loaded,
616 &oes->rx_discards, &es->rx_discards);
617 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
618 vsi->stat_offsets_loaded,
619 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
620 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->tx_errors, &es->tx_errors);
623
624 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
625 I40E_GLV_GORCL(stat_idx),
626 vsi->stat_offsets_loaded,
627 &oes->rx_bytes, &es->rx_bytes);
628 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
629 I40E_GLV_UPRCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_unicast, &es->rx_unicast);
632 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
633 I40E_GLV_MPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_multicast, &es->rx_multicast);
636 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
637 I40E_GLV_BPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_broadcast, &es->rx_broadcast);
640
641 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
642 I40E_GLV_GOTCL(stat_idx),
643 vsi->stat_offsets_loaded,
644 &oes->tx_bytes, &es->tx_bytes);
645 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
646 I40E_GLV_UPTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_unicast, &es->tx_unicast);
649 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
650 I40E_GLV_MPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_multicast, &es->tx_multicast);
653 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
654 I40E_GLV_BPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_broadcast, &es->tx_broadcast);
657 vsi->stat_offsets_loaded = true;
658 }
659
660 /**
661 * i40e_update_veb_stats - Update Switch component statistics
662 * @veb: the VEB being updated
663 **/
664 static void i40e_update_veb_stats(struct i40e_veb *veb)
665 {
666 struct i40e_pf *pf = veb->pf;
667 struct i40e_hw *hw = &pf->hw;
668 struct i40e_eth_stats *oes;
669 struct i40e_eth_stats *es; /* device's eth stats */
670 struct i40e_veb_tc_stats *veb_oes;
671 struct i40e_veb_tc_stats *veb_es;
672 int i, idx = 0;
673
674 idx = veb->stats_idx;
675 es = &veb->stats;
676 oes = &veb->stats_offsets;
677 veb_es = &veb->tc_stats;
678 veb_oes = &veb->tc_stats_offsets;
679
680 /* Gather up the stats that the hw collects */
681 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
682 veb->stat_offsets_loaded,
683 &oes->tx_discards, &es->tx_discards);
684 if (hw->revision_id > 0)
685 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unknown_protocol,
688 &es->rx_unknown_protocol);
689 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_bytes, &es->rx_bytes);
692 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
693 veb->stat_offsets_loaded,
694 &oes->rx_unicast, &es->rx_unicast);
695 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->rx_multicast, &es->rx_multicast);
698 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->rx_broadcast, &es->rx_broadcast);
701
702 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->tx_bytes, &es->tx_bytes);
705 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
706 veb->stat_offsets_loaded,
707 &oes->tx_unicast, &es->tx_unicast);
708 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
709 veb->stat_offsets_loaded,
710 &oes->tx_multicast, &es->tx_multicast);
711 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
712 veb->stat_offsets_loaded,
713 &oes->tx_broadcast, &es->tx_broadcast);
714 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
715 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
716 I40E_GLVEBTC_RPCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_packets[i],
719 &veb_es->tc_rx_packets[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
721 I40E_GLVEBTC_RBCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_rx_bytes[i],
724 &veb_es->tc_rx_bytes[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
726 I40E_GLVEBTC_TPCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_packets[i],
729 &veb_es->tc_tx_packets[i]);
730 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
731 I40E_GLVEBTC_TBCL(i, idx),
732 veb->stat_offsets_loaded,
733 &veb_oes->tc_tx_bytes[i],
734 &veb_es->tc_tx_bytes[i]);
735 }
736 veb->stat_offsets_loaded = true;
737 }
738
739 #ifdef I40E_FCOE
740 /**
741 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
742 * @vsi: the VSI that is capable of doing FCoE
743 **/
744 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
745 {
746 struct i40e_pf *pf = vsi->back;
747 struct i40e_hw *hw = &pf->hw;
748 struct i40e_fcoe_stats *ofs;
749 struct i40e_fcoe_stats *fs; /* device's eth stats */
750 int idx;
751
752 if (vsi->type != I40E_VSI_FCOE)
753 return;
754
755 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
756 fs = &vsi->fcoe_stats;
757 ofs = &vsi->fcoe_stats_offsets;
758
759 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
760 vsi->fcoe_stat_offsets_loaded,
761 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
762 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
763 vsi->fcoe_stat_offsets_loaded,
764 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
765 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
766 vsi->fcoe_stat_offsets_loaded,
767 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
768 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
769 vsi->fcoe_stat_offsets_loaded,
770 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
771 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
772 vsi->fcoe_stat_offsets_loaded,
773 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
774 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
775 vsi->fcoe_stat_offsets_loaded,
776 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
777 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
778 vsi->fcoe_stat_offsets_loaded,
779 &ofs->fcoe_last_error, &fs->fcoe_last_error);
780 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
781 vsi->fcoe_stat_offsets_loaded,
782 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
783
784 vsi->fcoe_stat_offsets_loaded = true;
785 }
786
787 #endif
788 /**
789 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
790 * @pf: the corresponding PF
791 *
792 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
793 **/
794 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
795 {
796 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
797 struct i40e_hw_port_stats *nsd = &pf->stats;
798 struct i40e_hw *hw = &pf->hw;
799 u64 xoff = 0;
800
801 if ((hw->fc.current_mode != I40E_FC_FULL) &&
802 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
803 return;
804
805 xoff = nsd->link_xoff_rx;
806 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
807 pf->stat_offsets_loaded,
808 &osd->link_xoff_rx, &nsd->link_xoff_rx);
809
810 /* No new LFC xoff rx */
811 if (!(nsd->link_xoff_rx - xoff))
812 return;
813
814 }
815
816 /**
817 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
818 * @pf: the corresponding PF
819 *
820 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
821 **/
822 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
823 {
824 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
825 struct i40e_hw_port_stats *nsd = &pf->stats;
826 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
827 struct i40e_dcbx_config *dcb_cfg;
828 struct i40e_hw *hw = &pf->hw;
829 u16 i;
830 u8 tc;
831
832 dcb_cfg = &hw->local_dcbx_config;
833
834 /* Collect Link XOFF stats when PFC is disabled */
835 if (!dcb_cfg->pfc.pfcenable) {
836 i40e_update_link_xoff_rx(pf);
837 return;
838 }
839
840 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
841 u64 prio_xoff = nsd->priority_xoff_rx[i];
842 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
843 pf->stat_offsets_loaded,
844 &osd->priority_xoff_rx[i],
845 &nsd->priority_xoff_rx[i]);
846
847 /* No new PFC xoff rx */
848 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
849 continue;
850 /* Get the TC for given priority */
851 tc = dcb_cfg->etscfg.prioritytable[i];
852 xoff[tc] = true;
853 }
854 }
855
856 /**
857 * i40e_update_vsi_stats - Update the vsi statistics counters.
858 * @vsi: the VSI to be updated
859 *
860 * There are a few instances where we store the same stat in a
861 * couple of different structs. This is partly because we have
862 * the netdev stats that need to be filled out, which is slightly
863 * different from the "eth_stats" defined by the chip and used in
864 * VF communications. We sort it out here.
865 **/
866 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
867 {
868 struct i40e_pf *pf = vsi->back;
869 struct rtnl_link_stats64 *ons;
870 struct rtnl_link_stats64 *ns; /* netdev stats */
871 struct i40e_eth_stats *oes;
872 struct i40e_eth_stats *es; /* device's eth stats */
873 u32 tx_restart, tx_busy;
874 struct i40e_ring *p;
875 u32 rx_page, rx_buf;
876 u64 bytes, packets;
877 unsigned int start;
878 u64 rx_p, rx_b;
879 u64 tx_p, tx_b;
880 u16 q;
881
882 if (test_bit(__I40E_DOWN, &vsi->state) ||
883 test_bit(__I40E_CONFIG_BUSY, &pf->state))
884 return;
885
886 ns = i40e_get_vsi_stats_struct(vsi);
887 ons = &vsi->net_stats_offsets;
888 es = &vsi->eth_stats;
889 oes = &vsi->eth_stats_offsets;
890
891 /* Gather up the netdev and vsi stats that the driver collects
892 * on the fly during packet processing
893 */
894 rx_b = rx_p = 0;
895 tx_b = tx_p = 0;
896 tx_restart = tx_busy = 0;
897 rx_page = 0;
898 rx_buf = 0;
899 rcu_read_lock();
900 for (q = 0; q < vsi->num_queue_pairs; q++) {
901 /* locate Tx ring */
902 p = ACCESS_ONCE(vsi->tx_rings[q]);
903
904 do {
905 start = u64_stats_fetch_begin_irq(&p->syncp);
906 packets = p->stats.packets;
907 bytes = p->stats.bytes;
908 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
909 tx_b += bytes;
910 tx_p += packets;
911 tx_restart += p->tx_stats.restart_queue;
912 tx_busy += p->tx_stats.tx_busy;
913
914 /* Rx queue is part of the same block as Tx queue */
915 p = &p[1];
916 do {
917 start = u64_stats_fetch_begin_irq(&p->syncp);
918 packets = p->stats.packets;
919 bytes = p->stats.bytes;
920 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
921 rx_b += bytes;
922 rx_p += packets;
923 rx_buf += p->rx_stats.alloc_buff_failed;
924 rx_page += p->rx_stats.alloc_page_failed;
925 }
926 rcu_read_unlock();
927 vsi->tx_restart = tx_restart;
928 vsi->tx_busy = tx_busy;
929 vsi->rx_page_failed = rx_page;
930 vsi->rx_buf_failed = rx_buf;
931
932 ns->rx_packets = rx_p;
933 ns->rx_bytes = rx_b;
934 ns->tx_packets = tx_p;
935 ns->tx_bytes = tx_b;
936
937 /* update netdev stats from eth stats */
938 i40e_update_eth_stats(vsi);
939 ons->tx_errors = oes->tx_errors;
940 ns->tx_errors = es->tx_errors;
941 ons->multicast = oes->rx_multicast;
942 ns->multicast = es->rx_multicast;
943 ons->rx_dropped = oes->rx_discards;
944 ns->rx_dropped = es->rx_discards;
945 ons->tx_dropped = oes->tx_discards;
946 ns->tx_dropped = es->tx_discards;
947
948 /* pull in a couple PF stats if this is the main vsi */
949 if (vsi == pf->vsi[pf->lan_vsi]) {
950 ns->rx_crc_errors = pf->stats.crc_errors;
951 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
952 ns->rx_length_errors = pf->stats.rx_length_errors;
953 }
954 }
955
956 /**
957 * i40e_update_pf_stats - Update the PF statistics counters.
958 * @pf: the PF to be updated
959 **/
960 static void i40e_update_pf_stats(struct i40e_pf *pf)
961 {
962 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
963 struct i40e_hw_port_stats *nsd = &pf->stats;
964 struct i40e_hw *hw = &pf->hw;
965 u32 val;
966 int i;
967
968 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
969 I40E_GLPRT_GORCL(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
972 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
973 I40E_GLPRT_GOTCL(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
976 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.rx_discards,
979 &nsd->eth.rx_discards);
980 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
981 I40E_GLPRT_UPRCL(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->eth.rx_unicast,
984 &nsd->eth.rx_unicast);
985 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
986 I40E_GLPRT_MPRCL(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->eth.rx_multicast,
989 &nsd->eth.rx_multicast);
990 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
991 I40E_GLPRT_BPRCL(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->eth.rx_broadcast,
994 &nsd->eth.rx_broadcast);
995 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
996 I40E_GLPRT_UPTCL(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->eth.tx_unicast,
999 &nsd->eth.tx_unicast);
1000 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1001 I40E_GLPRT_MPTCL(hw->port),
1002 pf->stat_offsets_loaded,
1003 &osd->eth.tx_multicast,
1004 &nsd->eth.tx_multicast);
1005 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1006 I40E_GLPRT_BPTCL(hw->port),
1007 pf->stat_offsets_loaded,
1008 &osd->eth.tx_broadcast,
1009 &nsd->eth.tx_broadcast);
1010
1011 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->tx_dropped_link_down,
1014 &nsd->tx_dropped_link_down);
1015
1016 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1017 pf->stat_offsets_loaded,
1018 &osd->crc_errors, &nsd->crc_errors);
1019
1020 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1021 pf->stat_offsets_loaded,
1022 &osd->illegal_bytes, &nsd->illegal_bytes);
1023
1024 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->mac_local_faults,
1027 &nsd->mac_local_faults);
1028 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->mac_remote_faults,
1031 &nsd->mac_remote_faults);
1032
1033 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_length_errors,
1036 &nsd->rx_length_errors);
1037
1038 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1039 pf->stat_offsets_loaded,
1040 &osd->link_xon_rx, &nsd->link_xon_rx);
1041 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1042 pf->stat_offsets_loaded,
1043 &osd->link_xon_tx, &nsd->link_xon_tx);
1044 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1045 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1048
1049 for (i = 0; i < 8; i++) {
1050 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1051 pf->stat_offsets_loaded,
1052 &osd->priority_xon_rx[i],
1053 &nsd->priority_xon_rx[i]);
1054 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1055 pf->stat_offsets_loaded,
1056 &osd->priority_xon_tx[i],
1057 &nsd->priority_xon_tx[i]);
1058 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1059 pf->stat_offsets_loaded,
1060 &osd->priority_xoff_tx[i],
1061 &nsd->priority_xoff_tx[i]);
1062 i40e_stat_update32(hw,
1063 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1064 pf->stat_offsets_loaded,
1065 &osd->priority_xon_2_xoff[i],
1066 &nsd->priority_xon_2_xoff[i]);
1067 }
1068
1069 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1070 I40E_GLPRT_PRC64L(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->rx_size_64, &nsd->rx_size_64);
1073 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1074 I40E_GLPRT_PRC127L(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_size_127, &nsd->rx_size_127);
1077 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1078 I40E_GLPRT_PRC255L(hw->port),
1079 pf->stat_offsets_loaded,
1080 &osd->rx_size_255, &nsd->rx_size_255);
1081 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1082 I40E_GLPRT_PRC511L(hw->port),
1083 pf->stat_offsets_loaded,
1084 &osd->rx_size_511, &nsd->rx_size_511);
1085 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1086 I40E_GLPRT_PRC1023L(hw->port),
1087 pf->stat_offsets_loaded,
1088 &osd->rx_size_1023, &nsd->rx_size_1023);
1089 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1090 I40E_GLPRT_PRC1522L(hw->port),
1091 pf->stat_offsets_loaded,
1092 &osd->rx_size_1522, &nsd->rx_size_1522);
1093 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1094 I40E_GLPRT_PRC9522L(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_size_big, &nsd->rx_size_big);
1097
1098 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1099 I40E_GLPRT_PTC64L(hw->port),
1100 pf->stat_offsets_loaded,
1101 &osd->tx_size_64, &nsd->tx_size_64);
1102 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1103 I40E_GLPRT_PTC127L(hw->port),
1104 pf->stat_offsets_loaded,
1105 &osd->tx_size_127, &nsd->tx_size_127);
1106 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1107 I40E_GLPRT_PTC255L(hw->port),
1108 pf->stat_offsets_loaded,
1109 &osd->tx_size_255, &nsd->tx_size_255);
1110 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1111 I40E_GLPRT_PTC511L(hw->port),
1112 pf->stat_offsets_loaded,
1113 &osd->tx_size_511, &nsd->tx_size_511);
1114 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1115 I40E_GLPRT_PTC1023L(hw->port),
1116 pf->stat_offsets_loaded,
1117 &osd->tx_size_1023, &nsd->tx_size_1023);
1118 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1119 I40E_GLPRT_PTC1522L(hw->port),
1120 pf->stat_offsets_loaded,
1121 &osd->tx_size_1522, &nsd->tx_size_1522);
1122 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1123 I40E_GLPRT_PTC9522L(hw->port),
1124 pf->stat_offsets_loaded,
1125 &osd->tx_size_big, &nsd->tx_size_big);
1126
1127 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1128 pf->stat_offsets_loaded,
1129 &osd->rx_undersize, &nsd->rx_undersize);
1130 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->rx_fragments, &nsd->rx_fragments);
1133 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->rx_oversize, &nsd->rx_oversize);
1136 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1137 pf->stat_offsets_loaded,
1138 &osd->rx_jabber, &nsd->rx_jabber);
1139
1140 /* FDIR stats */
1141 i40e_stat_update32(hw,
1142 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1143 pf->stat_offsets_loaded,
1144 &osd->fd_atr_match, &nsd->fd_atr_match);
1145 i40e_stat_update32(hw,
1146 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1147 pf->stat_offsets_loaded,
1148 &osd->fd_sb_match, &nsd->fd_sb_match);
1149 i40e_stat_update32(hw,
1150 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1151 pf->stat_offsets_loaded,
1152 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1153
1154 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1155 nsd->tx_lpi_status =
1156 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1157 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1158 nsd->rx_lpi_status =
1159 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1160 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1161 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1162 pf->stat_offsets_loaded,
1163 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1164 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1165 pf->stat_offsets_loaded,
1166 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1167
1168 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1169 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1170 nsd->fd_sb_status = true;
1171 else
1172 nsd->fd_sb_status = false;
1173
1174 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1175 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1176 nsd->fd_atr_status = true;
1177 else
1178 nsd->fd_atr_status = false;
1179
1180 pf->stat_offsets_loaded = true;
1181 }
1182
1183 /**
1184 * i40e_update_stats - Update the various statistics counters.
1185 * @vsi: the VSI to be updated
1186 *
1187 * Update the various stats for this VSI and its related entities.
1188 **/
1189 void i40e_update_stats(struct i40e_vsi *vsi)
1190 {
1191 struct i40e_pf *pf = vsi->back;
1192
1193 if (vsi == pf->vsi[pf->lan_vsi])
1194 i40e_update_pf_stats(pf);
1195
1196 i40e_update_vsi_stats(vsi);
1197 #ifdef I40E_FCOE
1198 i40e_update_fcoe_stats(vsi);
1199 #endif
1200 }
1201
1202 /**
1203 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1204 * @vsi: the VSI to be searched
1205 * @macaddr: the MAC address
1206 * @vlan: the vlan
1207 * @is_vf: make sure its a VF filter, else doesn't matter
1208 * @is_netdev: make sure its a netdev filter, else doesn't matter
1209 *
1210 * Returns ptr to the filter object or NULL
1211 **/
1212 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1213 u8 *macaddr, s16 vlan,
1214 bool is_vf, bool is_netdev)
1215 {
1216 struct i40e_mac_filter *f;
1217
1218 if (!vsi || !macaddr)
1219 return NULL;
1220
1221 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1222 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1223 (vlan == f->vlan) &&
1224 (!is_vf || f->is_vf) &&
1225 (!is_netdev || f->is_netdev))
1226 return f;
1227 }
1228 return NULL;
1229 }
1230
1231 /**
1232 * i40e_find_mac - Find a mac addr in the macvlan filters list
1233 * @vsi: the VSI to be searched
1234 * @macaddr: the MAC address we are searching for
1235 * @is_vf: make sure its a VF filter, else doesn't matter
1236 * @is_netdev: make sure its a netdev filter, else doesn't matter
1237 *
1238 * Returns the first filter with the provided MAC address or NULL if
1239 * MAC address was not found
1240 **/
1241 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1242 bool is_vf, bool is_netdev)
1243 {
1244 struct i40e_mac_filter *f;
1245
1246 if (!vsi || !macaddr)
1247 return NULL;
1248
1249 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1250 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1251 (!is_vf || f->is_vf) &&
1252 (!is_netdev || f->is_netdev))
1253 return f;
1254 }
1255 return NULL;
1256 }
1257
1258 /**
1259 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1260 * @vsi: the VSI to be searched
1261 *
1262 * Returns true if VSI is in vlan mode or false otherwise
1263 **/
1264 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1265 {
1266 struct i40e_mac_filter *f;
1267
1268 /* Only -1 for all the filters denotes not in vlan mode
1269 * so we have to go through all the list in order to make sure
1270 */
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1272 if (f->vlan >= 0)
1273 return true;
1274 }
1275
1276 return false;
1277 }
1278
1279 /**
1280 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1281 * @vsi: the VSI to be searched
1282 * @macaddr: the mac address to be filtered
1283 * @is_vf: true if it is a VF
1284 * @is_netdev: true if it is a netdev
1285 *
1286 * Goes through all the macvlan filters and adds a
1287 * macvlan filter for each unique vlan that already exists
1288 *
1289 * Returns first filter found on success, else NULL
1290 **/
1291 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1292 bool is_vf, bool is_netdev)
1293 {
1294 struct i40e_mac_filter *f;
1295
1296 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1297 if (vsi->info.pvid)
1298 f->vlan = le16_to_cpu(vsi->info.pvid);
1299 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1300 is_vf, is_netdev)) {
1301 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1302 is_vf, is_netdev))
1303 return NULL;
1304 }
1305 }
1306
1307 return list_first_entry_or_null(&vsi->mac_filter_list,
1308 struct i40e_mac_filter, list);
1309 }
1310
1311 /**
1312 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1313 * @vsi: the PF Main VSI - inappropriate for any other VSI
1314 * @macaddr: the MAC address
1315 *
1316 * Some older firmware configurations set up a default promiscuous VLAN
1317 * filter that needs to be removed.
1318 **/
1319 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1320 {
1321 struct i40e_aqc_remove_macvlan_element_data element;
1322 struct i40e_pf *pf = vsi->back;
1323 i40e_status ret;
1324
1325 /* Only appropriate for the PF main VSI */
1326 if (vsi->type != I40E_VSI_MAIN)
1327 return -EINVAL;
1328
1329 memset(&element, 0, sizeof(element));
1330 ether_addr_copy(element.mac_addr, macaddr);
1331 element.vlan_tag = 0;
1332 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1333 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1334 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1335 if (ret)
1336 return -ENOENT;
1337
1338 return 0;
1339 }
1340
1341 /**
1342 * i40e_add_filter - Add a mac/vlan filter to the VSI
1343 * @vsi: the VSI to be searched
1344 * @macaddr: the MAC address
1345 * @vlan: the vlan
1346 * @is_vf: make sure its a VF filter, else doesn't matter
1347 * @is_netdev: make sure its a netdev filter, else doesn't matter
1348 *
1349 * Returns ptr to the filter object or NULL when no memory available.
1350 **/
1351 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1352 u8 *macaddr, s16 vlan,
1353 bool is_vf, bool is_netdev)
1354 {
1355 struct i40e_mac_filter *f;
1356
1357 if (!vsi || !macaddr)
1358 return NULL;
1359
1360 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1361 if (!f) {
1362 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1363 if (!f)
1364 goto add_filter_out;
1365
1366 ether_addr_copy(f->macaddr, macaddr);
1367 f->vlan = vlan;
1368 f->changed = true;
1369
1370 INIT_LIST_HEAD(&f->list);
1371 list_add(&f->list, &vsi->mac_filter_list);
1372 }
1373
1374 /* increment counter and add a new flag if needed */
1375 if (is_vf) {
1376 if (!f->is_vf) {
1377 f->is_vf = true;
1378 f->counter++;
1379 }
1380 } else if (is_netdev) {
1381 if (!f->is_netdev) {
1382 f->is_netdev = true;
1383 f->counter++;
1384 }
1385 } else {
1386 f->counter++;
1387 }
1388
1389 /* changed tells sync_filters_subtask to
1390 * push the filter down to the firmware
1391 */
1392 if (f->changed) {
1393 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1394 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1395 }
1396
1397 add_filter_out:
1398 return f;
1399 }
1400
1401 /**
1402 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1403 * @vsi: the VSI to be searched
1404 * @macaddr: the MAC address
1405 * @vlan: the vlan
1406 * @is_vf: make sure it's a VF filter, else doesn't matter
1407 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1408 **/
1409 void i40e_del_filter(struct i40e_vsi *vsi,
1410 u8 *macaddr, s16 vlan,
1411 bool is_vf, bool is_netdev)
1412 {
1413 struct i40e_mac_filter *f;
1414
1415 if (!vsi || !macaddr)
1416 return;
1417
1418 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1419 if (!f || f->counter == 0)
1420 return;
1421
1422 if (is_vf) {
1423 if (f->is_vf) {
1424 f->is_vf = false;
1425 f->counter--;
1426 }
1427 } else if (is_netdev) {
1428 if (f->is_netdev) {
1429 f->is_netdev = false;
1430 f->counter--;
1431 }
1432 } else {
1433 /* make sure we don't remove a filter in use by VF or netdev */
1434 int min_f = 0;
1435 min_f += (f->is_vf ? 1 : 0);
1436 min_f += (f->is_netdev ? 1 : 0);
1437
1438 if (f->counter > min_f)
1439 f->counter--;
1440 }
1441
1442 /* counter == 0 tells sync_filters_subtask to
1443 * remove the filter from the firmware's list
1444 */
1445 if (f->counter == 0) {
1446 f->changed = true;
1447 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1448 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1449 }
1450 }
1451
1452 /**
1453 * i40e_set_mac - NDO callback to set mac address
1454 * @netdev: network interface device structure
1455 * @p: pointer to an address structure
1456 *
1457 * Returns 0 on success, negative on failure
1458 **/
1459 #ifdef I40E_FCOE
1460 int i40e_set_mac(struct net_device *netdev, void *p)
1461 #else
1462 static int i40e_set_mac(struct net_device *netdev, void *p)
1463 #endif
1464 {
1465 struct i40e_netdev_priv *np = netdev_priv(netdev);
1466 struct i40e_vsi *vsi = np->vsi;
1467 struct i40e_pf *pf = vsi->back;
1468 struct i40e_hw *hw = &pf->hw;
1469 struct sockaddr *addr = p;
1470 struct i40e_mac_filter *f;
1471
1472 if (!is_valid_ether_addr(addr->sa_data))
1473 return -EADDRNOTAVAIL;
1474
1475 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1476 netdev_info(netdev, "already using mac address %pM\n",
1477 addr->sa_data);
1478 return 0;
1479 }
1480
1481 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1482 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1483 return -EADDRNOTAVAIL;
1484
1485 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1486 netdev_info(netdev, "returning to hw mac address %pM\n",
1487 hw->mac.addr);
1488 else
1489 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1490
1491 if (vsi->type == I40E_VSI_MAIN) {
1492 i40e_status ret;
1493 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1494 I40E_AQC_WRITE_TYPE_LAA_WOL,
1495 addr->sa_data, NULL);
1496 if (ret) {
1497 netdev_info(netdev,
1498 "Addr change for Main VSI failed: %d\n",
1499 ret);
1500 return -EADDRNOTAVAIL;
1501 }
1502 }
1503
1504 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1505 struct i40e_aqc_remove_macvlan_element_data element;
1506
1507 memset(&element, 0, sizeof(element));
1508 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1509 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1510 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1511 } else {
1512 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1513 false, false);
1514 }
1515
1516 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1517 struct i40e_aqc_add_macvlan_element_data element;
1518
1519 memset(&element, 0, sizeof(element));
1520 ether_addr_copy(element.mac_addr, hw->mac.addr);
1521 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1522 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1523 } else {
1524 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1525 false, false);
1526 if (f)
1527 f->is_laa = true;
1528 }
1529
1530 i40e_sync_vsi_filters(vsi);
1531 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1532
1533 return 0;
1534 }
1535
1536 /**
1537 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1538 * @vsi: the VSI being setup
1539 * @ctxt: VSI context structure
1540 * @enabled_tc: Enabled TCs bitmap
1541 * @is_add: True if called before Add VSI
1542 *
1543 * Setup VSI queue mapping for enabled traffic classes.
1544 **/
1545 #ifdef I40E_FCOE
1546 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1547 struct i40e_vsi_context *ctxt,
1548 u8 enabled_tc,
1549 bool is_add)
1550 #else
1551 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1552 struct i40e_vsi_context *ctxt,
1553 u8 enabled_tc,
1554 bool is_add)
1555 #endif
1556 {
1557 struct i40e_pf *pf = vsi->back;
1558 u16 sections = 0;
1559 u8 netdev_tc = 0;
1560 u16 numtc = 0;
1561 u16 qcount;
1562 u8 offset;
1563 u16 qmap;
1564 int i;
1565 u16 num_tc_qps = 0;
1566
1567 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1568 offset = 0;
1569
1570 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1571 /* Find numtc from enabled TC bitmap */
1572 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1573 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1574 numtc++;
1575 }
1576 if (!numtc) {
1577 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1578 numtc = 1;
1579 }
1580 } else {
1581 /* At least TC0 is enabled in case of non-DCB case */
1582 numtc = 1;
1583 }
1584
1585 vsi->tc_config.numtc = numtc;
1586 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1587 /* Number of queues per enabled TC */
1588 /* In MFP case we can have a much lower count of MSIx
1589 * vectors available and so we need to lower the used
1590 * q count.
1591 */
1592 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1593 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1594 else
1595 qcount = vsi->alloc_queue_pairs;
1596 num_tc_qps = qcount / numtc;
1597 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1598
1599 /* Setup queue offset/count for all TCs for given VSI */
1600 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1601 /* See if the given TC is enabled for the given VSI */
1602 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1603 /* TC is enabled */
1604 int pow, num_qps;
1605
1606 switch (vsi->type) {
1607 case I40E_VSI_MAIN:
1608 qcount = min_t(int, pf->rss_size, num_tc_qps);
1609 break;
1610 #ifdef I40E_FCOE
1611 case I40E_VSI_FCOE:
1612 qcount = num_tc_qps;
1613 break;
1614 #endif
1615 case I40E_VSI_FDIR:
1616 case I40E_VSI_SRIOV:
1617 case I40E_VSI_VMDQ2:
1618 default:
1619 qcount = num_tc_qps;
1620 WARN_ON(i != 0);
1621 break;
1622 }
1623 vsi->tc_config.tc_info[i].qoffset = offset;
1624 vsi->tc_config.tc_info[i].qcount = qcount;
1625
1626 /* find the next higher power-of-2 of num queue pairs */
1627 num_qps = qcount;
1628 pow = 0;
1629 while (num_qps && (BIT_ULL(pow) < qcount)) {
1630 pow++;
1631 num_qps >>= 1;
1632 }
1633
1634 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1635 qmap =
1636 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1637 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1638
1639 offset += qcount;
1640 } else {
1641 /* TC is not enabled so set the offset to
1642 * default queue and allocate one queue
1643 * for the given TC.
1644 */
1645 vsi->tc_config.tc_info[i].qoffset = 0;
1646 vsi->tc_config.tc_info[i].qcount = 1;
1647 vsi->tc_config.tc_info[i].netdev_tc = 0;
1648
1649 qmap = 0;
1650 }
1651 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1652 }
1653
1654 /* Set actual Tx/Rx queue pairs */
1655 vsi->num_queue_pairs = offset;
1656 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1657 if (vsi->req_queue_pairs > 0)
1658 vsi->num_queue_pairs = vsi->req_queue_pairs;
1659 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1660 vsi->num_queue_pairs = pf->num_lan_msix;
1661 }
1662
1663 /* Scheduler section valid can only be set for ADD VSI */
1664 if (is_add) {
1665 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1666
1667 ctxt->info.up_enable_bits = enabled_tc;
1668 }
1669 if (vsi->type == I40E_VSI_SRIOV) {
1670 ctxt->info.mapping_flags |=
1671 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1672 for (i = 0; i < vsi->num_queue_pairs; i++)
1673 ctxt->info.queue_mapping[i] =
1674 cpu_to_le16(vsi->base_queue + i);
1675 } else {
1676 ctxt->info.mapping_flags |=
1677 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1678 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1679 }
1680 ctxt->info.valid_sections |= cpu_to_le16(sections);
1681 }
1682
1683 /**
1684 * i40e_set_rx_mode - NDO callback to set the netdev filters
1685 * @netdev: network interface device structure
1686 **/
1687 #ifdef I40E_FCOE
1688 void i40e_set_rx_mode(struct net_device *netdev)
1689 #else
1690 static void i40e_set_rx_mode(struct net_device *netdev)
1691 #endif
1692 {
1693 struct i40e_netdev_priv *np = netdev_priv(netdev);
1694 struct i40e_mac_filter *f, *ftmp;
1695 struct i40e_vsi *vsi = np->vsi;
1696 struct netdev_hw_addr *uca;
1697 struct netdev_hw_addr *mca;
1698 struct netdev_hw_addr *ha;
1699
1700 /* add addr if not already in the filter list */
1701 netdev_for_each_uc_addr(uca, netdev) {
1702 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1703 if (i40e_is_vsi_in_vlan(vsi))
1704 i40e_put_mac_in_vlan(vsi, uca->addr,
1705 false, true);
1706 else
1707 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1708 false, true);
1709 }
1710 }
1711
1712 netdev_for_each_mc_addr(mca, netdev) {
1713 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1714 if (i40e_is_vsi_in_vlan(vsi))
1715 i40e_put_mac_in_vlan(vsi, mca->addr,
1716 false, true);
1717 else
1718 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1719 false, true);
1720 }
1721 }
1722
1723 /* remove filter if not in netdev list */
1724 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1725 bool found = false;
1726
1727 if (!f->is_netdev)
1728 continue;
1729
1730 if (is_multicast_ether_addr(f->macaddr)) {
1731 netdev_for_each_mc_addr(mca, netdev) {
1732 if (ether_addr_equal(mca->addr, f->macaddr)) {
1733 found = true;
1734 break;
1735 }
1736 }
1737 } else {
1738 netdev_for_each_uc_addr(uca, netdev) {
1739 if (ether_addr_equal(uca->addr, f->macaddr)) {
1740 found = true;
1741 break;
1742 }
1743 }
1744
1745 for_each_dev_addr(netdev, ha) {
1746 if (ether_addr_equal(ha->addr, f->macaddr)) {
1747 found = true;
1748 break;
1749 }
1750 }
1751 }
1752 if (!found)
1753 i40e_del_filter(
1754 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1755 }
1756
1757 /* check for other flag changes */
1758 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1759 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1760 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1761 }
1762 }
1763
1764 /**
1765 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1766 * @vsi: ptr to the VSI
1767 *
1768 * Push any outstanding VSI filter changes through the AdminQ.
1769 *
1770 * Returns 0 or error value
1771 **/
1772 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1773 {
1774 struct i40e_mac_filter *f, *ftmp;
1775 bool promisc_forced_on = false;
1776 bool add_happened = false;
1777 int filter_list_len = 0;
1778 u32 changed_flags = 0;
1779 i40e_status ret = 0;
1780 struct i40e_pf *pf;
1781 int num_add = 0;
1782 int num_del = 0;
1783 int aq_err = 0;
1784 u16 cmd_flags;
1785
1786 /* empty array typed pointers, kcalloc later */
1787 struct i40e_aqc_add_macvlan_element_data *add_list;
1788 struct i40e_aqc_remove_macvlan_element_data *del_list;
1789
1790 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1791 usleep_range(1000, 2000);
1792 pf = vsi->back;
1793
1794 if (vsi->netdev) {
1795 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1796 vsi->current_netdev_flags = vsi->netdev->flags;
1797 }
1798
1799 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1800 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1801
1802 filter_list_len = pf->hw.aq.asq_buf_size /
1803 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1804 del_list = kcalloc(filter_list_len,
1805 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1806 GFP_KERNEL);
1807 if (!del_list)
1808 return -ENOMEM;
1809
1810 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1811 if (!f->changed)
1812 continue;
1813
1814 if (f->counter != 0)
1815 continue;
1816 f->changed = false;
1817 cmd_flags = 0;
1818
1819 /* add to delete list */
1820 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1821 del_list[num_del].vlan_tag =
1822 cpu_to_le16((u16)(f->vlan ==
1823 I40E_VLAN_ANY ? 0 : f->vlan));
1824
1825 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1826 del_list[num_del].flags = cmd_flags;
1827 num_del++;
1828
1829 /* unlink from filter list */
1830 list_del(&f->list);
1831 kfree(f);
1832
1833 /* flush a full buffer */
1834 if (num_del == filter_list_len) {
1835 ret = i40e_aq_remove_macvlan(&pf->hw,
1836 vsi->seid, del_list, num_del,
1837 NULL);
1838 aq_err = pf->hw.aq.asq_last_status;
1839 num_del = 0;
1840 memset(del_list, 0, sizeof(*del_list));
1841
1842 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1843 dev_info(&pf->pdev->dev,
1844 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1845 i40e_stat_str(&pf->hw, ret),
1846 i40e_aq_str(&pf->hw, aq_err));
1847 }
1848 }
1849 if (num_del) {
1850 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1851 del_list, num_del, NULL);
1852 aq_err = pf->hw.aq.asq_last_status;
1853 num_del = 0;
1854
1855 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1856 dev_info(&pf->pdev->dev,
1857 "ignoring delete macvlan error, err %s aq_err %s\n",
1858 i40e_stat_str(&pf->hw, ret),
1859 i40e_aq_str(&pf->hw, aq_err));
1860 }
1861
1862 kfree(del_list);
1863 del_list = NULL;
1864
1865 /* do all the adds now */
1866 filter_list_len = pf->hw.aq.asq_buf_size /
1867 sizeof(struct i40e_aqc_add_macvlan_element_data),
1868 add_list = kcalloc(filter_list_len,
1869 sizeof(struct i40e_aqc_add_macvlan_element_data),
1870 GFP_KERNEL);
1871 if (!add_list)
1872 return -ENOMEM;
1873
1874 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1875 if (!f->changed)
1876 continue;
1877
1878 if (f->counter == 0)
1879 continue;
1880 f->changed = false;
1881 add_happened = true;
1882 cmd_flags = 0;
1883
1884 /* add to add array */
1885 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1886 add_list[num_add].vlan_tag =
1887 cpu_to_le16(
1888 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1889 add_list[num_add].queue_number = 0;
1890
1891 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1892 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1893 num_add++;
1894
1895 /* flush a full buffer */
1896 if (num_add == filter_list_len) {
1897 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1898 add_list, num_add,
1899 NULL);
1900 aq_err = pf->hw.aq.asq_last_status;
1901 num_add = 0;
1902
1903 if (ret)
1904 break;
1905 memset(add_list, 0, sizeof(*add_list));
1906 }
1907 }
1908 if (num_add) {
1909 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1910 add_list, num_add, NULL);
1911 aq_err = pf->hw.aq.asq_last_status;
1912 num_add = 0;
1913 }
1914 kfree(add_list);
1915 add_list = NULL;
1916
1917 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1918 dev_info(&pf->pdev->dev,
1919 "add filter failed, err %s aq_err %s\n",
1920 i40e_stat_str(&pf->hw, ret),
1921 i40e_aq_str(&pf->hw, aq_err));
1922 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1923 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1924 &vsi->state)) {
1925 promisc_forced_on = true;
1926 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1927 &vsi->state);
1928 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1929 }
1930 }
1931 }
1932
1933 /* check for changes in promiscuous modes */
1934 if (changed_flags & IFF_ALLMULTI) {
1935 bool cur_multipromisc;
1936 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1937 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1938 vsi->seid,
1939 cur_multipromisc,
1940 NULL);
1941 if (ret)
1942 dev_info(&pf->pdev->dev,
1943 "set multi promisc failed, err %s aq_err %s\n",
1944 i40e_stat_str(&pf->hw, ret),
1945 i40e_aq_str(&pf->hw,
1946 pf->hw.aq.asq_last_status));
1947 }
1948 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1949 bool cur_promisc;
1950 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1951 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1952 &vsi->state));
1953 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1954 /* set defport ON for Main VSI instead of true promisc
1955 * this way we will get all unicast/multicast and VLAN
1956 * promisc behavior but will not get VF or VMDq traffic
1957 * replicated on the Main VSI.
1958 */
1959 if (pf->cur_promisc != cur_promisc) {
1960 pf->cur_promisc = cur_promisc;
1961 i40e_do_reset_safe(pf,
1962 BIT(__I40E_PF_RESET_REQUESTED));
1963 }
1964 } else {
1965 ret = i40e_aq_set_vsi_unicast_promiscuous(
1966 &vsi->back->hw,
1967 vsi->seid,
1968 cur_promisc, NULL);
1969 if (ret)
1970 dev_info(&pf->pdev->dev,
1971 "set unicast promisc failed, err %d, aq_err %d\n",
1972 ret, pf->hw.aq.asq_last_status);
1973 ret = i40e_aq_set_vsi_multicast_promiscuous(
1974 &vsi->back->hw,
1975 vsi->seid,
1976 cur_promisc, NULL);
1977 if (ret)
1978 dev_info(&pf->pdev->dev,
1979 "set multicast promisc failed, err %d, aq_err %d\n",
1980 ret, pf->hw.aq.asq_last_status);
1981 }
1982 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1983 vsi->seid,
1984 cur_promisc, NULL);
1985 if (ret)
1986 dev_info(&pf->pdev->dev,
1987 "set brdcast promisc failed, err %s, aq_err %s\n",
1988 i40e_stat_str(&pf->hw, ret),
1989 i40e_aq_str(&pf->hw,
1990 pf->hw.aq.asq_last_status));
1991 }
1992
1993 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1994 return 0;
1995 }
1996
1997 /**
1998 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1999 * @pf: board private structure
2000 **/
2001 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2002 {
2003 int v;
2004
2005 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2006 return;
2007 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2008
2009 for (v = 0; v < pf->num_alloc_vsi; v++) {
2010 if (pf->vsi[v] &&
2011 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2012 i40e_sync_vsi_filters(pf->vsi[v]);
2013 }
2014 }
2015
2016 /**
2017 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2018 * @netdev: network interface device structure
2019 * @new_mtu: new value for maximum frame size
2020 *
2021 * Returns 0 on success, negative on failure
2022 **/
2023 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2024 {
2025 struct i40e_netdev_priv *np = netdev_priv(netdev);
2026 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2027 struct i40e_vsi *vsi = np->vsi;
2028
2029 /* MTU < 68 is an error and causes problems on some kernels */
2030 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2031 return -EINVAL;
2032
2033 netdev_info(netdev, "changing MTU from %d to %d\n",
2034 netdev->mtu, new_mtu);
2035 netdev->mtu = new_mtu;
2036 if (netif_running(netdev))
2037 i40e_vsi_reinit_locked(vsi);
2038
2039 return 0;
2040 }
2041
2042 /**
2043 * i40e_ioctl - Access the hwtstamp interface
2044 * @netdev: network interface device structure
2045 * @ifr: interface request data
2046 * @cmd: ioctl command
2047 **/
2048 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2049 {
2050 struct i40e_netdev_priv *np = netdev_priv(netdev);
2051 struct i40e_pf *pf = np->vsi->back;
2052
2053 switch (cmd) {
2054 case SIOCGHWTSTAMP:
2055 return i40e_ptp_get_ts_config(pf, ifr);
2056 case SIOCSHWTSTAMP:
2057 return i40e_ptp_set_ts_config(pf, ifr);
2058 default:
2059 return -EOPNOTSUPP;
2060 }
2061 }
2062
2063 /**
2064 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2065 * @vsi: the vsi being adjusted
2066 **/
2067 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2068 {
2069 struct i40e_vsi_context ctxt;
2070 i40e_status ret;
2071
2072 if ((vsi->info.valid_sections &
2073 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2074 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2075 return; /* already enabled */
2076
2077 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2078 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2079 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2080
2081 ctxt.seid = vsi->seid;
2082 ctxt.info = vsi->info;
2083 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2084 if (ret) {
2085 dev_info(&vsi->back->pdev->dev,
2086 "update vlan stripping failed, err %s aq_err %s\n",
2087 i40e_stat_str(&vsi->back->hw, ret),
2088 i40e_aq_str(&vsi->back->hw,
2089 vsi->back->hw.aq.asq_last_status));
2090 }
2091 }
2092
2093 /**
2094 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2095 * @vsi: the vsi being adjusted
2096 **/
2097 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2098 {
2099 struct i40e_vsi_context ctxt;
2100 i40e_status ret;
2101
2102 if ((vsi->info.valid_sections &
2103 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2104 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2105 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2106 return; /* already disabled */
2107
2108 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2109 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2110 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2111
2112 ctxt.seid = vsi->seid;
2113 ctxt.info = vsi->info;
2114 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2115 if (ret) {
2116 dev_info(&vsi->back->pdev->dev,
2117 "update vlan stripping failed, err %s aq_err %s\n",
2118 i40e_stat_str(&vsi->back->hw, ret),
2119 i40e_aq_str(&vsi->back->hw,
2120 vsi->back->hw.aq.asq_last_status));
2121 }
2122 }
2123
2124 /**
2125 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2126 * @netdev: network interface to be adjusted
2127 * @features: netdev features to test if VLAN offload is enabled or not
2128 **/
2129 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2130 {
2131 struct i40e_netdev_priv *np = netdev_priv(netdev);
2132 struct i40e_vsi *vsi = np->vsi;
2133
2134 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2135 i40e_vlan_stripping_enable(vsi);
2136 else
2137 i40e_vlan_stripping_disable(vsi);
2138 }
2139
2140 /**
2141 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2142 * @vsi: the vsi being configured
2143 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2144 **/
2145 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2146 {
2147 struct i40e_mac_filter *f, *add_f;
2148 bool is_netdev, is_vf;
2149
2150 is_vf = (vsi->type == I40E_VSI_SRIOV);
2151 is_netdev = !!(vsi->netdev);
2152
2153 if (is_netdev) {
2154 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2155 is_vf, is_netdev);
2156 if (!add_f) {
2157 dev_info(&vsi->back->pdev->dev,
2158 "Could not add vlan filter %d for %pM\n",
2159 vid, vsi->netdev->dev_addr);
2160 return -ENOMEM;
2161 }
2162 }
2163
2164 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2165 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2166 if (!add_f) {
2167 dev_info(&vsi->back->pdev->dev,
2168 "Could not add vlan filter %d for %pM\n",
2169 vid, f->macaddr);
2170 return -ENOMEM;
2171 }
2172 }
2173
2174 /* Now if we add a vlan tag, make sure to check if it is the first
2175 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2176 * with 0, so we now accept untagged and specified tagged traffic
2177 * (and not any taged and untagged)
2178 */
2179 if (vid > 0) {
2180 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2181 I40E_VLAN_ANY,
2182 is_vf, is_netdev)) {
2183 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2184 I40E_VLAN_ANY, is_vf, is_netdev);
2185 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2186 is_vf, is_netdev);
2187 if (!add_f) {
2188 dev_info(&vsi->back->pdev->dev,
2189 "Could not add filter 0 for %pM\n",
2190 vsi->netdev->dev_addr);
2191 return -ENOMEM;
2192 }
2193 }
2194 }
2195
2196 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2197 if (vid > 0 && !vsi->info.pvid) {
2198 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2199 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2200 is_vf, is_netdev)) {
2201 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2202 is_vf, is_netdev);
2203 add_f = i40e_add_filter(vsi, f->macaddr,
2204 0, is_vf, is_netdev);
2205 if (!add_f) {
2206 dev_info(&vsi->back->pdev->dev,
2207 "Could not add filter 0 for %pM\n",
2208 f->macaddr);
2209 return -ENOMEM;
2210 }
2211 }
2212 }
2213 }
2214
2215 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2216 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2217 return 0;
2218
2219 return i40e_sync_vsi_filters(vsi);
2220 }
2221
2222 /**
2223 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2224 * @vsi: the vsi being configured
2225 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2226 *
2227 * Return: 0 on success or negative otherwise
2228 **/
2229 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2230 {
2231 struct net_device *netdev = vsi->netdev;
2232 struct i40e_mac_filter *f, *add_f;
2233 bool is_vf, is_netdev;
2234 int filter_count = 0;
2235
2236 is_vf = (vsi->type == I40E_VSI_SRIOV);
2237 is_netdev = !!(netdev);
2238
2239 if (is_netdev)
2240 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2241
2242 list_for_each_entry(f, &vsi->mac_filter_list, list)
2243 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2244
2245 /* go through all the filters for this VSI and if there is only
2246 * vid == 0 it means there are no other filters, so vid 0 must
2247 * be replaced with -1. This signifies that we should from now
2248 * on accept any traffic (with any tag present, or untagged)
2249 */
2250 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2251 if (is_netdev) {
2252 if (f->vlan &&
2253 ether_addr_equal(netdev->dev_addr, f->macaddr))
2254 filter_count++;
2255 }
2256
2257 if (f->vlan)
2258 filter_count++;
2259 }
2260
2261 if (!filter_count && is_netdev) {
2262 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2263 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2264 is_vf, is_netdev);
2265 if (!f) {
2266 dev_info(&vsi->back->pdev->dev,
2267 "Could not add filter %d for %pM\n",
2268 I40E_VLAN_ANY, netdev->dev_addr);
2269 return -ENOMEM;
2270 }
2271 }
2272
2273 if (!filter_count) {
2274 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2275 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2276 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2277 is_vf, is_netdev);
2278 if (!add_f) {
2279 dev_info(&vsi->back->pdev->dev,
2280 "Could not add filter %d for %pM\n",
2281 I40E_VLAN_ANY, f->macaddr);
2282 return -ENOMEM;
2283 }
2284 }
2285 }
2286
2287 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2288 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2289 return 0;
2290
2291 return i40e_sync_vsi_filters(vsi);
2292 }
2293
2294 /**
2295 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2296 * @netdev: network interface to be adjusted
2297 * @vid: vlan id to be added
2298 *
2299 * net_device_ops implementation for adding vlan ids
2300 **/
2301 #ifdef I40E_FCOE
2302 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2303 __always_unused __be16 proto, u16 vid)
2304 #else
2305 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2306 __always_unused __be16 proto, u16 vid)
2307 #endif
2308 {
2309 struct i40e_netdev_priv *np = netdev_priv(netdev);
2310 struct i40e_vsi *vsi = np->vsi;
2311 int ret = 0;
2312
2313 if (vid > 4095)
2314 return -EINVAL;
2315
2316 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2317
2318 /* If the network stack called us with vid = 0 then
2319 * it is asking to receive priority tagged packets with
2320 * vlan id 0. Our HW receives them by default when configured
2321 * to receive untagged packets so there is no need to add an
2322 * extra filter for vlan 0 tagged packets.
2323 */
2324 if (vid)
2325 ret = i40e_vsi_add_vlan(vsi, vid);
2326
2327 if (!ret && (vid < VLAN_N_VID))
2328 set_bit(vid, vsi->active_vlans);
2329
2330 return ret;
2331 }
2332
2333 /**
2334 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2335 * @netdev: network interface to be adjusted
2336 * @vid: vlan id to be removed
2337 *
2338 * net_device_ops implementation for removing vlan ids
2339 **/
2340 #ifdef I40E_FCOE
2341 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2342 __always_unused __be16 proto, u16 vid)
2343 #else
2344 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2345 __always_unused __be16 proto, u16 vid)
2346 #endif
2347 {
2348 struct i40e_netdev_priv *np = netdev_priv(netdev);
2349 struct i40e_vsi *vsi = np->vsi;
2350
2351 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2352
2353 /* return code is ignored as there is nothing a user
2354 * can do about failure to remove and a log message was
2355 * already printed from the other function
2356 */
2357 i40e_vsi_kill_vlan(vsi, vid);
2358
2359 clear_bit(vid, vsi->active_vlans);
2360
2361 return 0;
2362 }
2363
2364 /**
2365 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2366 * @vsi: the vsi being brought back up
2367 **/
2368 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2369 {
2370 u16 vid;
2371
2372 if (!vsi->netdev)
2373 return;
2374
2375 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2376
2377 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2378 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2379 vid);
2380 }
2381
2382 /**
2383 * i40e_vsi_add_pvid - Add pvid for the VSI
2384 * @vsi: the vsi being adjusted
2385 * @vid: the vlan id to set as a PVID
2386 **/
2387 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2388 {
2389 struct i40e_vsi_context ctxt;
2390 i40e_status ret;
2391
2392 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2393 vsi->info.pvid = cpu_to_le16(vid);
2394 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2395 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2396 I40E_AQ_VSI_PVLAN_EMOD_STR;
2397
2398 ctxt.seid = vsi->seid;
2399 ctxt.info = vsi->info;
2400 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2401 if (ret) {
2402 dev_info(&vsi->back->pdev->dev,
2403 "add pvid failed, err %s aq_err %s\n",
2404 i40e_stat_str(&vsi->back->hw, ret),
2405 i40e_aq_str(&vsi->back->hw,
2406 vsi->back->hw.aq.asq_last_status));
2407 return -ENOENT;
2408 }
2409
2410 return 0;
2411 }
2412
2413 /**
2414 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2415 * @vsi: the vsi being adjusted
2416 *
2417 * Just use the vlan_rx_register() service to put it back to normal
2418 **/
2419 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2420 {
2421 i40e_vlan_stripping_disable(vsi);
2422
2423 vsi->info.pvid = 0;
2424 }
2425
2426 /**
2427 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2428 * @vsi: ptr to the VSI
2429 *
2430 * If this function returns with an error, then it's possible one or
2431 * more of the rings is populated (while the rest are not). It is the
2432 * callers duty to clean those orphaned rings.
2433 *
2434 * Return 0 on success, negative on failure
2435 **/
2436 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2437 {
2438 int i, err = 0;
2439
2440 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2441 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2442
2443 return err;
2444 }
2445
2446 /**
2447 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2448 * @vsi: ptr to the VSI
2449 *
2450 * Free VSI's transmit software resources
2451 **/
2452 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2453 {
2454 int i;
2455
2456 if (!vsi->tx_rings)
2457 return;
2458
2459 for (i = 0; i < vsi->num_queue_pairs; i++)
2460 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2461 i40e_free_tx_resources(vsi->tx_rings[i]);
2462 }
2463
2464 /**
2465 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2466 * @vsi: ptr to the VSI
2467 *
2468 * If this function returns with an error, then it's possible one or
2469 * more of the rings is populated (while the rest are not). It is the
2470 * callers duty to clean those orphaned rings.
2471 *
2472 * Return 0 on success, negative on failure
2473 **/
2474 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2475 {
2476 int i, err = 0;
2477
2478 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2479 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2480 #ifdef I40E_FCOE
2481 i40e_fcoe_setup_ddp_resources(vsi);
2482 #endif
2483 return err;
2484 }
2485
2486 /**
2487 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2488 * @vsi: ptr to the VSI
2489 *
2490 * Free all receive software resources
2491 **/
2492 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2493 {
2494 int i;
2495
2496 if (!vsi->rx_rings)
2497 return;
2498
2499 for (i = 0; i < vsi->num_queue_pairs; i++)
2500 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2501 i40e_free_rx_resources(vsi->rx_rings[i]);
2502 #ifdef I40E_FCOE
2503 i40e_fcoe_free_ddp_resources(vsi);
2504 #endif
2505 }
2506
2507 /**
2508 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2509 * @ring: The Tx ring to configure
2510 *
2511 * This enables/disables XPS for a given Tx descriptor ring
2512 * based on the TCs enabled for the VSI that ring belongs to.
2513 **/
2514 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2515 {
2516 struct i40e_vsi *vsi = ring->vsi;
2517 cpumask_var_t mask;
2518
2519 if (!ring->q_vector || !ring->netdev)
2520 return;
2521
2522 /* Single TC mode enable XPS */
2523 if (vsi->tc_config.numtc <= 1) {
2524 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2525 netif_set_xps_queue(ring->netdev,
2526 &ring->q_vector->affinity_mask,
2527 ring->queue_index);
2528 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2529 /* Disable XPS to allow selection based on TC */
2530 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2531 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2532 free_cpumask_var(mask);
2533 }
2534 }
2535
2536 /**
2537 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2538 * @ring: The Tx ring to configure
2539 *
2540 * Configure the Tx descriptor ring in the HMC context.
2541 **/
2542 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2543 {
2544 struct i40e_vsi *vsi = ring->vsi;
2545 u16 pf_q = vsi->base_queue + ring->queue_index;
2546 struct i40e_hw *hw = &vsi->back->hw;
2547 struct i40e_hmc_obj_txq tx_ctx;
2548 i40e_status err = 0;
2549 u32 qtx_ctl = 0;
2550
2551 /* some ATR related tx ring init */
2552 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2553 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2554 ring->atr_count = 0;
2555 } else {
2556 ring->atr_sample_rate = 0;
2557 }
2558
2559 /* configure XPS */
2560 i40e_config_xps_tx_ring(ring);
2561
2562 /* clear the context structure first */
2563 memset(&tx_ctx, 0, sizeof(tx_ctx));
2564
2565 tx_ctx.new_context = 1;
2566 tx_ctx.base = (ring->dma / 128);
2567 tx_ctx.qlen = ring->count;
2568 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2569 I40E_FLAG_FD_ATR_ENABLED));
2570 #ifdef I40E_FCOE
2571 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2572 #endif
2573 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2574 /* FDIR VSI tx ring can still use RS bit and writebacks */
2575 if (vsi->type != I40E_VSI_FDIR)
2576 tx_ctx.head_wb_ena = 1;
2577 tx_ctx.head_wb_addr = ring->dma +
2578 (ring->count * sizeof(struct i40e_tx_desc));
2579
2580 /* As part of VSI creation/update, FW allocates certain
2581 * Tx arbitration queue sets for each TC enabled for
2582 * the VSI. The FW returns the handles to these queue
2583 * sets as part of the response buffer to Add VSI,
2584 * Update VSI, etc. AQ commands. It is expected that
2585 * these queue set handles be associated with the Tx
2586 * queues by the driver as part of the TX queue context
2587 * initialization. This has to be done regardless of
2588 * DCB as by default everything is mapped to TC0.
2589 */
2590 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2591 tx_ctx.rdylist_act = 0;
2592
2593 /* clear the context in the HMC */
2594 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2595 if (err) {
2596 dev_info(&vsi->back->pdev->dev,
2597 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2598 ring->queue_index, pf_q, err);
2599 return -ENOMEM;
2600 }
2601
2602 /* set the context in the HMC */
2603 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2604 if (err) {
2605 dev_info(&vsi->back->pdev->dev,
2606 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2607 ring->queue_index, pf_q, err);
2608 return -ENOMEM;
2609 }
2610
2611 /* Now associate this queue with this PCI function */
2612 if (vsi->type == I40E_VSI_VMDQ2) {
2613 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2614 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2615 I40E_QTX_CTL_VFVM_INDX_MASK;
2616 } else {
2617 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2618 }
2619
2620 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2621 I40E_QTX_CTL_PF_INDX_MASK);
2622 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2623 i40e_flush(hw);
2624
2625 /* cache tail off for easier writes later */
2626 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2627
2628 return 0;
2629 }
2630
2631 /**
2632 * i40e_configure_rx_ring - Configure a receive ring context
2633 * @ring: The Rx ring to configure
2634 *
2635 * Configure the Rx descriptor ring in the HMC context.
2636 **/
2637 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2638 {
2639 struct i40e_vsi *vsi = ring->vsi;
2640 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2641 u16 pf_q = vsi->base_queue + ring->queue_index;
2642 struct i40e_hw *hw = &vsi->back->hw;
2643 struct i40e_hmc_obj_rxq rx_ctx;
2644 i40e_status err = 0;
2645
2646 ring->state = 0;
2647
2648 /* clear the context structure first */
2649 memset(&rx_ctx, 0, sizeof(rx_ctx));
2650
2651 ring->rx_buf_len = vsi->rx_buf_len;
2652 ring->rx_hdr_len = vsi->rx_hdr_len;
2653
2654 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2655 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2656
2657 rx_ctx.base = (ring->dma / 128);
2658 rx_ctx.qlen = ring->count;
2659
2660 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2661 set_ring_16byte_desc_enabled(ring);
2662 rx_ctx.dsize = 0;
2663 } else {
2664 rx_ctx.dsize = 1;
2665 }
2666
2667 rx_ctx.dtype = vsi->dtype;
2668 if (vsi->dtype) {
2669 set_ring_ps_enabled(ring);
2670 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2671 I40E_RX_SPLIT_IP |
2672 I40E_RX_SPLIT_TCP_UDP |
2673 I40E_RX_SPLIT_SCTP;
2674 } else {
2675 rx_ctx.hsplit_0 = 0;
2676 }
2677
2678 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2679 (chain_len * ring->rx_buf_len));
2680 if (hw->revision_id == 0)
2681 rx_ctx.lrxqthresh = 0;
2682 else
2683 rx_ctx.lrxqthresh = 2;
2684 rx_ctx.crcstrip = 1;
2685 rx_ctx.l2tsel = 1;
2686 rx_ctx.showiv = 1;
2687 #ifdef I40E_FCOE
2688 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2689 #endif
2690 /* set the prefena field to 1 because the manual says to */
2691 rx_ctx.prefena = 1;
2692
2693 /* clear the context in the HMC */
2694 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2695 if (err) {
2696 dev_info(&vsi->back->pdev->dev,
2697 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2698 ring->queue_index, pf_q, err);
2699 return -ENOMEM;
2700 }
2701
2702 /* set the context in the HMC */
2703 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2704 if (err) {
2705 dev_info(&vsi->back->pdev->dev,
2706 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2707 ring->queue_index, pf_q, err);
2708 return -ENOMEM;
2709 }
2710
2711 /* cache tail for quicker writes, and clear the reg before use */
2712 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2713 writel(0, ring->tail);
2714
2715 if (ring_is_ps_enabled(ring)) {
2716 i40e_alloc_rx_headers(ring);
2717 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2718 } else {
2719 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2720 }
2721
2722 return 0;
2723 }
2724
2725 /**
2726 * i40e_vsi_configure_tx - Configure the VSI for Tx
2727 * @vsi: VSI structure describing this set of rings and resources
2728 *
2729 * Configure the Tx VSI for operation.
2730 **/
2731 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2732 {
2733 int err = 0;
2734 u16 i;
2735
2736 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2737 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2738
2739 return err;
2740 }
2741
2742 /**
2743 * i40e_vsi_configure_rx - Configure the VSI for Rx
2744 * @vsi: the VSI being configured
2745 *
2746 * Configure the Rx VSI for operation.
2747 **/
2748 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2749 {
2750 int err = 0;
2751 u16 i;
2752
2753 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2754 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2755 + ETH_FCS_LEN + VLAN_HLEN;
2756 else
2757 vsi->max_frame = I40E_RXBUFFER_2048;
2758
2759 /* figure out correct receive buffer length */
2760 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2761 I40E_FLAG_RX_PS_ENABLED)) {
2762 case I40E_FLAG_RX_1BUF_ENABLED:
2763 vsi->rx_hdr_len = 0;
2764 vsi->rx_buf_len = vsi->max_frame;
2765 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2766 break;
2767 case I40E_FLAG_RX_PS_ENABLED:
2768 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2769 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2770 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2771 break;
2772 default:
2773 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2774 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2775 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2776 break;
2777 }
2778
2779 #ifdef I40E_FCOE
2780 /* setup rx buffer for FCoE */
2781 if ((vsi->type == I40E_VSI_FCOE) &&
2782 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2783 vsi->rx_hdr_len = 0;
2784 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2785 vsi->max_frame = I40E_RXBUFFER_3072;
2786 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2787 }
2788
2789 #endif /* I40E_FCOE */
2790 /* round up for the chip's needs */
2791 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2792 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2793 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2794 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2795
2796 /* set up individual rings */
2797 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2798 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2799
2800 return err;
2801 }
2802
2803 /**
2804 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2805 * @vsi: ptr to the VSI
2806 **/
2807 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2808 {
2809 struct i40e_ring *tx_ring, *rx_ring;
2810 u16 qoffset, qcount;
2811 int i, n;
2812
2813 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2814 /* Reset the TC information */
2815 for (i = 0; i < vsi->num_queue_pairs; i++) {
2816 rx_ring = vsi->rx_rings[i];
2817 tx_ring = vsi->tx_rings[i];
2818 rx_ring->dcb_tc = 0;
2819 tx_ring->dcb_tc = 0;
2820 }
2821 }
2822
2823 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2824 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2825 continue;
2826
2827 qoffset = vsi->tc_config.tc_info[n].qoffset;
2828 qcount = vsi->tc_config.tc_info[n].qcount;
2829 for (i = qoffset; i < (qoffset + qcount); i++) {
2830 rx_ring = vsi->rx_rings[i];
2831 tx_ring = vsi->tx_rings[i];
2832 rx_ring->dcb_tc = n;
2833 tx_ring->dcb_tc = n;
2834 }
2835 }
2836 }
2837
2838 /**
2839 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2840 * @vsi: ptr to the VSI
2841 **/
2842 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2843 {
2844 if (vsi->netdev)
2845 i40e_set_rx_mode(vsi->netdev);
2846 }
2847
2848 /**
2849 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2850 * @vsi: Pointer to the targeted VSI
2851 *
2852 * This function replays the hlist on the hw where all the SB Flow Director
2853 * filters were saved.
2854 **/
2855 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2856 {
2857 struct i40e_fdir_filter *filter;
2858 struct i40e_pf *pf = vsi->back;
2859 struct hlist_node *node;
2860
2861 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2862 return;
2863
2864 hlist_for_each_entry_safe(filter, node,
2865 &pf->fdir_filter_list, fdir_node) {
2866 i40e_add_del_fdir(vsi, filter, true);
2867 }
2868 }
2869
2870 /**
2871 * i40e_vsi_configure - Set up the VSI for action
2872 * @vsi: the VSI being configured
2873 **/
2874 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2875 {
2876 int err;
2877
2878 i40e_set_vsi_rx_mode(vsi);
2879 i40e_restore_vlan(vsi);
2880 i40e_vsi_config_dcb_rings(vsi);
2881 err = i40e_vsi_configure_tx(vsi);
2882 if (!err)
2883 err = i40e_vsi_configure_rx(vsi);
2884
2885 return err;
2886 }
2887
2888 /**
2889 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2890 * @vsi: the VSI being configured
2891 **/
2892 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2893 {
2894 struct i40e_pf *pf = vsi->back;
2895 struct i40e_q_vector *q_vector;
2896 struct i40e_hw *hw = &pf->hw;
2897 u16 vector;
2898 int i, q;
2899 u32 val;
2900 u32 qp;
2901
2902 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2903 * and PFINT_LNKLSTn registers, e.g.:
2904 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2905 */
2906 qp = vsi->base_queue;
2907 vector = vsi->base_vector;
2908 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2909 q_vector = vsi->q_vectors[i];
2910 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2911 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2912 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2913 q_vector->rx.itr);
2914 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2915 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2916 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2917 q_vector->tx.itr);
2918
2919 /* Linked list for the queuepairs assigned to this vector */
2920 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2921 for (q = 0; q < q_vector->num_ringpairs; q++) {
2922 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2923 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2924 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2925 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2926 (I40E_QUEUE_TYPE_TX
2927 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2928
2929 wr32(hw, I40E_QINT_RQCTL(qp), val);
2930
2931 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2932 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2933 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2934 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2935 (I40E_QUEUE_TYPE_RX
2936 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2937
2938 /* Terminate the linked list */
2939 if (q == (q_vector->num_ringpairs - 1))
2940 val |= (I40E_QUEUE_END_OF_LIST
2941 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2942
2943 wr32(hw, I40E_QINT_TQCTL(qp), val);
2944 qp++;
2945 }
2946 }
2947
2948 i40e_flush(hw);
2949 }
2950
2951 /**
2952 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2953 * @hw: ptr to the hardware info
2954 **/
2955 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2956 {
2957 struct i40e_hw *hw = &pf->hw;
2958 u32 val;
2959
2960 /* clear things first */
2961 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2962 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2963
2964 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2965 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2966 I40E_PFINT_ICR0_ENA_GRST_MASK |
2967 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2968 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2969 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2970 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2971 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2972
2973 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2974 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2975
2976 if (pf->flags & I40E_FLAG_PTP)
2977 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2978
2979 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2980
2981 /* SW_ITR_IDX = 0, but don't change INTENA */
2982 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2983 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2984
2985 /* OTHER_ITR_IDX = 0 */
2986 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2987 }
2988
2989 /**
2990 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2991 * @vsi: the VSI being configured
2992 **/
2993 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2994 {
2995 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2996 struct i40e_pf *pf = vsi->back;
2997 struct i40e_hw *hw = &pf->hw;
2998 u32 val;
2999
3000 /* set the ITR configuration */
3001 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3002 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3003 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3004 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3005 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3006 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3007
3008 i40e_enable_misc_int_causes(pf);
3009
3010 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3011 wr32(hw, I40E_PFINT_LNKLST0, 0);
3012
3013 /* Associate the queue pair to the vector and enable the queue int */
3014 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3015 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3016 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3017
3018 wr32(hw, I40E_QINT_RQCTL(0), val);
3019
3020 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3021 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3022 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3023
3024 wr32(hw, I40E_QINT_TQCTL(0), val);
3025 i40e_flush(hw);
3026 }
3027
3028 /**
3029 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3030 * @pf: board private structure
3031 **/
3032 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3033 {
3034 struct i40e_hw *hw = &pf->hw;
3035
3036 wr32(hw, I40E_PFINT_DYN_CTL0,
3037 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3038 i40e_flush(hw);
3039 }
3040
3041 /**
3042 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3043 * @pf: board private structure
3044 **/
3045 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3046 {
3047 struct i40e_hw *hw = &pf->hw;
3048 u32 val;
3049
3050 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3051 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3052 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3053
3054 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3055 i40e_flush(hw);
3056 }
3057
3058 /**
3059 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
3060 * @vsi: pointer to a vsi
3061 * @vector: enable a particular Hw Interrupt vector
3062 **/
3063 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
3064 {
3065 struct i40e_pf *pf = vsi->back;
3066 struct i40e_hw *hw = &pf->hw;
3067 u32 val;
3068
3069 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
3070 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
3071 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3072 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3073 /* skip the flush */
3074 }
3075
3076 /**
3077 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3078 * @vsi: pointer to a vsi
3079 * @vector: disable a particular Hw Interrupt vector
3080 **/
3081 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3082 {
3083 struct i40e_pf *pf = vsi->back;
3084 struct i40e_hw *hw = &pf->hw;
3085 u32 val;
3086
3087 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3088 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3089 i40e_flush(hw);
3090 }
3091
3092 /**
3093 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3094 * @irq: interrupt number
3095 * @data: pointer to a q_vector
3096 **/
3097 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3098 {
3099 struct i40e_q_vector *q_vector = data;
3100
3101 if (!q_vector->tx.ring && !q_vector->rx.ring)
3102 return IRQ_HANDLED;
3103
3104 napi_schedule(&q_vector->napi);
3105
3106 return IRQ_HANDLED;
3107 }
3108
3109 /**
3110 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3111 * @vsi: the VSI being configured
3112 * @basename: name for the vector
3113 *
3114 * Allocates MSI-X vectors and requests interrupts from the kernel.
3115 **/
3116 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3117 {
3118 int q_vectors = vsi->num_q_vectors;
3119 struct i40e_pf *pf = vsi->back;
3120 int base = vsi->base_vector;
3121 int rx_int_idx = 0;
3122 int tx_int_idx = 0;
3123 int vector, err;
3124
3125 for (vector = 0; vector < q_vectors; vector++) {
3126 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3127
3128 if (q_vector->tx.ring && q_vector->rx.ring) {
3129 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3130 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3131 tx_int_idx++;
3132 } else if (q_vector->rx.ring) {
3133 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3134 "%s-%s-%d", basename, "rx", rx_int_idx++);
3135 } else if (q_vector->tx.ring) {
3136 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3137 "%s-%s-%d", basename, "tx", tx_int_idx++);
3138 } else {
3139 /* skip this unused q_vector */
3140 continue;
3141 }
3142 err = request_irq(pf->msix_entries[base + vector].vector,
3143 vsi->irq_handler,
3144 0,
3145 q_vector->name,
3146 q_vector);
3147 if (err) {
3148 dev_info(&pf->pdev->dev,
3149 "%s: request_irq failed, error: %d\n",
3150 __func__, err);
3151 goto free_queue_irqs;
3152 }
3153 /* assign the mask for this irq */
3154 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3155 &q_vector->affinity_mask);
3156 }
3157
3158 vsi->irqs_ready = true;
3159 return 0;
3160
3161 free_queue_irqs:
3162 while (vector) {
3163 vector--;
3164 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3165 NULL);
3166 free_irq(pf->msix_entries[base + vector].vector,
3167 &(vsi->q_vectors[vector]));
3168 }
3169 return err;
3170 }
3171
3172 /**
3173 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3174 * @vsi: the VSI being un-configured
3175 **/
3176 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3177 {
3178 struct i40e_pf *pf = vsi->back;
3179 struct i40e_hw *hw = &pf->hw;
3180 int base = vsi->base_vector;
3181 int i;
3182
3183 for (i = 0; i < vsi->num_queue_pairs; i++) {
3184 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3185 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3186 }
3187
3188 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3189 for (i = vsi->base_vector;
3190 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3191 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3192
3193 i40e_flush(hw);
3194 for (i = 0; i < vsi->num_q_vectors; i++)
3195 synchronize_irq(pf->msix_entries[i + base].vector);
3196 } else {
3197 /* Legacy and MSI mode - this stops all interrupt handling */
3198 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3199 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3200 i40e_flush(hw);
3201 synchronize_irq(pf->pdev->irq);
3202 }
3203 }
3204
3205 /**
3206 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3207 * @vsi: the VSI being configured
3208 **/
3209 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3210 {
3211 struct i40e_pf *pf = vsi->back;
3212 int i;
3213
3214 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3215 for (i = vsi->base_vector;
3216 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3217 i40e_irq_dynamic_enable(vsi, i);
3218 } else {
3219 i40e_irq_dynamic_enable_icr0(pf);
3220 }
3221
3222 i40e_flush(&pf->hw);
3223 return 0;
3224 }
3225
3226 /**
3227 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3228 * @pf: board private structure
3229 **/
3230 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3231 {
3232 /* Disable ICR 0 */
3233 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3234 i40e_flush(&pf->hw);
3235 }
3236
3237 /**
3238 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3239 * @irq: interrupt number
3240 * @data: pointer to a q_vector
3241 *
3242 * This is the handler used for all MSI/Legacy interrupts, and deals
3243 * with both queue and non-queue interrupts. This is also used in
3244 * MSIX mode to handle the non-queue interrupts.
3245 **/
3246 static irqreturn_t i40e_intr(int irq, void *data)
3247 {
3248 struct i40e_pf *pf = (struct i40e_pf *)data;
3249 struct i40e_hw *hw = &pf->hw;
3250 irqreturn_t ret = IRQ_NONE;
3251 u32 icr0, icr0_remaining;
3252 u32 val, ena_mask;
3253
3254 icr0 = rd32(hw, I40E_PFINT_ICR0);
3255 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3256
3257 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3258 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3259 goto enable_intr;
3260
3261 /* if interrupt but no bits showing, must be SWINT */
3262 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3263 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3264 pf->sw_int_count++;
3265
3266 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3267 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3268 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3269 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3270 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3271 }
3272
3273 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3274 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3275
3276 /* temporarily disable queue cause for NAPI processing */
3277 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3278 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3279 wr32(hw, I40E_QINT_RQCTL(0), qval);
3280
3281 qval = rd32(hw, I40E_QINT_TQCTL(0));
3282 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3283 wr32(hw, I40E_QINT_TQCTL(0), qval);
3284
3285 if (!test_bit(__I40E_DOWN, &pf->state))
3286 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3287 }
3288
3289 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3290 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3291 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3292 }
3293
3294 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3295 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3296 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3297 }
3298
3299 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3300 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3301 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3302 }
3303
3304 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3305 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3306 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3307 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3308 val = rd32(hw, I40E_GLGEN_RSTAT);
3309 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3310 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3311 if (val == I40E_RESET_CORER) {
3312 pf->corer_count++;
3313 } else if (val == I40E_RESET_GLOBR) {
3314 pf->globr_count++;
3315 } else if (val == I40E_RESET_EMPR) {
3316 pf->empr_count++;
3317 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3318 }
3319 }
3320
3321 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3322 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3323 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3324 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3325 rd32(hw, I40E_PFHMC_ERRORINFO),
3326 rd32(hw, I40E_PFHMC_ERRORDATA));
3327 }
3328
3329 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3330 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3331
3332 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3333 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3334 i40e_ptp_tx_hwtstamp(pf);
3335 }
3336 }
3337
3338 /* If a critical error is pending we have no choice but to reset the
3339 * device.
3340 * Report and mask out any remaining unexpected interrupts.
3341 */
3342 icr0_remaining = icr0 & ena_mask;
3343 if (icr0_remaining) {
3344 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3345 icr0_remaining);
3346 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3347 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3348 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3349 dev_info(&pf->pdev->dev, "device will be reset\n");
3350 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3351 i40e_service_event_schedule(pf);
3352 }
3353 ena_mask &= ~icr0_remaining;
3354 }
3355 ret = IRQ_HANDLED;
3356
3357 enable_intr:
3358 /* re-enable interrupt causes */
3359 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3360 if (!test_bit(__I40E_DOWN, &pf->state)) {
3361 i40e_service_event_schedule(pf);
3362 i40e_irq_dynamic_enable_icr0(pf);
3363 }
3364
3365 return ret;
3366 }
3367
3368 /**
3369 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3370 * @tx_ring: tx ring to clean
3371 * @budget: how many cleans we're allowed
3372 *
3373 * Returns true if there's any budget left (e.g. the clean is finished)
3374 **/
3375 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3376 {
3377 struct i40e_vsi *vsi = tx_ring->vsi;
3378 u16 i = tx_ring->next_to_clean;
3379 struct i40e_tx_buffer *tx_buf;
3380 struct i40e_tx_desc *tx_desc;
3381
3382 tx_buf = &tx_ring->tx_bi[i];
3383 tx_desc = I40E_TX_DESC(tx_ring, i);
3384 i -= tx_ring->count;
3385
3386 do {
3387 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3388
3389 /* if next_to_watch is not set then there is no work pending */
3390 if (!eop_desc)
3391 break;
3392
3393 /* prevent any other reads prior to eop_desc */
3394 read_barrier_depends();
3395
3396 /* if the descriptor isn't done, no work yet to do */
3397 if (!(eop_desc->cmd_type_offset_bsz &
3398 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3399 break;
3400
3401 /* clear next_to_watch to prevent false hangs */
3402 tx_buf->next_to_watch = NULL;
3403
3404 tx_desc->buffer_addr = 0;
3405 tx_desc->cmd_type_offset_bsz = 0;
3406 /* move past filter desc */
3407 tx_buf++;
3408 tx_desc++;
3409 i++;
3410 if (unlikely(!i)) {
3411 i -= tx_ring->count;
3412 tx_buf = tx_ring->tx_bi;
3413 tx_desc = I40E_TX_DESC(tx_ring, 0);
3414 }
3415 /* unmap skb header data */
3416 dma_unmap_single(tx_ring->dev,
3417 dma_unmap_addr(tx_buf, dma),
3418 dma_unmap_len(tx_buf, len),
3419 DMA_TO_DEVICE);
3420 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3421 kfree(tx_buf->raw_buf);
3422
3423 tx_buf->raw_buf = NULL;
3424 tx_buf->tx_flags = 0;
3425 tx_buf->next_to_watch = NULL;
3426 dma_unmap_len_set(tx_buf, len, 0);
3427 tx_desc->buffer_addr = 0;
3428 tx_desc->cmd_type_offset_bsz = 0;
3429
3430 /* move us past the eop_desc for start of next FD desc */
3431 tx_buf++;
3432 tx_desc++;
3433 i++;
3434 if (unlikely(!i)) {
3435 i -= tx_ring->count;
3436 tx_buf = tx_ring->tx_bi;
3437 tx_desc = I40E_TX_DESC(tx_ring, 0);
3438 }
3439
3440 /* update budget accounting */
3441 budget--;
3442 } while (likely(budget));
3443
3444 i += tx_ring->count;
3445 tx_ring->next_to_clean = i;
3446
3447 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3448 i40e_irq_dynamic_enable(vsi,
3449 tx_ring->q_vector->v_idx + vsi->base_vector);
3450 }
3451 return budget > 0;
3452 }
3453
3454 /**
3455 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3456 * @irq: interrupt number
3457 * @data: pointer to a q_vector
3458 **/
3459 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3460 {
3461 struct i40e_q_vector *q_vector = data;
3462 struct i40e_vsi *vsi;
3463
3464 if (!q_vector->tx.ring)
3465 return IRQ_HANDLED;
3466
3467 vsi = q_vector->tx.ring->vsi;
3468 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3469
3470 return IRQ_HANDLED;
3471 }
3472
3473 /**
3474 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3475 * @vsi: the VSI being configured
3476 * @v_idx: vector index
3477 * @qp_idx: queue pair index
3478 **/
3479 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3480 {
3481 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3482 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3483 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3484
3485 tx_ring->q_vector = q_vector;
3486 tx_ring->next = q_vector->tx.ring;
3487 q_vector->tx.ring = tx_ring;
3488 q_vector->tx.count++;
3489
3490 rx_ring->q_vector = q_vector;
3491 rx_ring->next = q_vector->rx.ring;
3492 q_vector->rx.ring = rx_ring;
3493 q_vector->rx.count++;
3494 }
3495
3496 /**
3497 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3498 * @vsi: the VSI being configured
3499 *
3500 * This function maps descriptor rings to the queue-specific vectors
3501 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3502 * one vector per queue pair, but on a constrained vector budget, we
3503 * group the queue pairs as "efficiently" as possible.
3504 **/
3505 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3506 {
3507 int qp_remaining = vsi->num_queue_pairs;
3508 int q_vectors = vsi->num_q_vectors;
3509 int num_ringpairs;
3510 int v_start = 0;
3511 int qp_idx = 0;
3512
3513 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3514 * group them so there are multiple queues per vector.
3515 * It is also important to go through all the vectors available to be
3516 * sure that if we don't use all the vectors, that the remaining vectors
3517 * are cleared. This is especially important when decreasing the
3518 * number of queues in use.
3519 */
3520 for (; v_start < q_vectors; v_start++) {
3521 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3522
3523 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3524
3525 q_vector->num_ringpairs = num_ringpairs;
3526
3527 q_vector->rx.count = 0;
3528 q_vector->tx.count = 0;
3529 q_vector->rx.ring = NULL;
3530 q_vector->tx.ring = NULL;
3531
3532 while (num_ringpairs--) {
3533 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3534 qp_idx++;
3535 qp_remaining--;
3536 }
3537 }
3538 }
3539
3540 /**
3541 * i40e_vsi_request_irq - Request IRQ from the OS
3542 * @vsi: the VSI being configured
3543 * @basename: name for the vector
3544 **/
3545 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3546 {
3547 struct i40e_pf *pf = vsi->back;
3548 int err;
3549
3550 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3551 err = i40e_vsi_request_irq_msix(vsi, basename);
3552 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3553 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3554 pf->int_name, pf);
3555 else
3556 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3557 pf->int_name, pf);
3558
3559 if (err)
3560 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3561
3562 return err;
3563 }
3564
3565 #ifdef CONFIG_NET_POLL_CONTROLLER
3566 /**
3567 * i40e_netpoll - A Polling 'interrupt'handler
3568 * @netdev: network interface device structure
3569 *
3570 * This is used by netconsole to send skbs without having to re-enable
3571 * interrupts. It's not called while the normal interrupt routine is executing.
3572 **/
3573 #ifdef I40E_FCOE
3574 void i40e_netpoll(struct net_device *netdev)
3575 #else
3576 static void i40e_netpoll(struct net_device *netdev)
3577 #endif
3578 {
3579 struct i40e_netdev_priv *np = netdev_priv(netdev);
3580 struct i40e_vsi *vsi = np->vsi;
3581 struct i40e_pf *pf = vsi->back;
3582 int i;
3583
3584 /* if interface is down do nothing */
3585 if (test_bit(__I40E_DOWN, &vsi->state))
3586 return;
3587
3588 pf->flags |= I40E_FLAG_IN_NETPOLL;
3589 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3590 for (i = 0; i < vsi->num_q_vectors; i++)
3591 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3592 } else {
3593 i40e_intr(pf->pdev->irq, netdev);
3594 }
3595 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3596 }
3597 #endif
3598
3599 /**
3600 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3601 * @pf: the PF being configured
3602 * @pf_q: the PF queue
3603 * @enable: enable or disable state of the queue
3604 *
3605 * This routine will wait for the given Tx queue of the PF to reach the
3606 * enabled or disabled state.
3607 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3608 * multiple retries; else will return 0 in case of success.
3609 **/
3610 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3611 {
3612 int i;
3613 u32 tx_reg;
3614
3615 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3616 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3617 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3618 break;
3619
3620 usleep_range(10, 20);
3621 }
3622 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3623 return -ETIMEDOUT;
3624
3625 return 0;
3626 }
3627
3628 /**
3629 * i40e_vsi_control_tx - Start or stop a VSI's rings
3630 * @vsi: the VSI being configured
3631 * @enable: start or stop the rings
3632 **/
3633 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3634 {
3635 struct i40e_pf *pf = vsi->back;
3636 struct i40e_hw *hw = &pf->hw;
3637 int i, j, pf_q, ret = 0;
3638 u32 tx_reg;
3639
3640 pf_q = vsi->base_queue;
3641 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3642
3643 /* warn the TX unit of coming changes */
3644 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3645 if (!enable)
3646 usleep_range(10, 20);
3647
3648 for (j = 0; j < 50; j++) {
3649 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3650 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3651 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3652 break;
3653 usleep_range(1000, 2000);
3654 }
3655 /* Skip if the queue is already in the requested state */
3656 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3657 continue;
3658
3659 /* turn on/off the queue */
3660 if (enable) {
3661 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3662 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3663 } else {
3664 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3665 }
3666
3667 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3668 /* No waiting for the Tx queue to disable */
3669 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3670 continue;
3671
3672 /* wait for the change to finish */
3673 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3674 if (ret) {
3675 dev_info(&pf->pdev->dev,
3676 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3677 __func__, vsi->seid, pf_q,
3678 (enable ? "en" : "dis"));
3679 break;
3680 }
3681 }
3682
3683 if (hw->revision_id == 0)
3684 mdelay(50);
3685 return ret;
3686 }
3687
3688 /**
3689 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3690 * @pf: the PF being configured
3691 * @pf_q: the PF queue
3692 * @enable: enable or disable state of the queue
3693 *
3694 * This routine will wait for the given Rx queue of the PF to reach the
3695 * enabled or disabled state.
3696 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3697 * multiple retries; else will return 0 in case of success.
3698 **/
3699 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3700 {
3701 int i;
3702 u32 rx_reg;
3703
3704 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3705 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3706 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3707 break;
3708
3709 usleep_range(10, 20);
3710 }
3711 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3712 return -ETIMEDOUT;
3713
3714 return 0;
3715 }
3716
3717 /**
3718 * i40e_vsi_control_rx - Start or stop a VSI's rings
3719 * @vsi: the VSI being configured
3720 * @enable: start or stop the rings
3721 **/
3722 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3723 {
3724 struct i40e_pf *pf = vsi->back;
3725 struct i40e_hw *hw = &pf->hw;
3726 int i, j, pf_q, ret = 0;
3727 u32 rx_reg;
3728
3729 pf_q = vsi->base_queue;
3730 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3731 for (j = 0; j < 50; j++) {
3732 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3733 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3734 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3735 break;
3736 usleep_range(1000, 2000);
3737 }
3738
3739 /* Skip if the queue is already in the requested state */
3740 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3741 continue;
3742
3743 /* turn on/off the queue */
3744 if (enable)
3745 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3746 else
3747 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3748 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3749
3750 /* wait for the change to finish */
3751 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3752 if (ret) {
3753 dev_info(&pf->pdev->dev,
3754 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3755 __func__, vsi->seid, pf_q,
3756 (enable ? "en" : "dis"));
3757 break;
3758 }
3759 }
3760
3761 return ret;
3762 }
3763
3764 /**
3765 * i40e_vsi_control_rings - Start or stop a VSI's rings
3766 * @vsi: the VSI being configured
3767 * @enable: start or stop the rings
3768 **/
3769 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3770 {
3771 int ret = 0;
3772
3773 /* do rx first for enable and last for disable */
3774 if (request) {
3775 ret = i40e_vsi_control_rx(vsi, request);
3776 if (ret)
3777 return ret;
3778 ret = i40e_vsi_control_tx(vsi, request);
3779 } else {
3780 /* Ignore return value, we need to shutdown whatever we can */
3781 i40e_vsi_control_tx(vsi, request);
3782 i40e_vsi_control_rx(vsi, request);
3783 }
3784
3785 return ret;
3786 }
3787
3788 /**
3789 * i40e_vsi_free_irq - Free the irq association with the OS
3790 * @vsi: the VSI being configured
3791 **/
3792 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3793 {
3794 struct i40e_pf *pf = vsi->back;
3795 struct i40e_hw *hw = &pf->hw;
3796 int base = vsi->base_vector;
3797 u32 val, qp;
3798 int i;
3799
3800 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3801 if (!vsi->q_vectors)
3802 return;
3803
3804 if (!vsi->irqs_ready)
3805 return;
3806
3807 vsi->irqs_ready = false;
3808 for (i = 0; i < vsi->num_q_vectors; i++) {
3809 u16 vector = i + base;
3810
3811 /* free only the irqs that were actually requested */
3812 if (!vsi->q_vectors[i] ||
3813 !vsi->q_vectors[i]->num_ringpairs)
3814 continue;
3815
3816 /* clear the affinity_mask in the IRQ descriptor */
3817 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3818 NULL);
3819 free_irq(pf->msix_entries[vector].vector,
3820 vsi->q_vectors[i]);
3821
3822 /* Tear down the interrupt queue link list
3823 *
3824 * We know that they come in pairs and always
3825 * the Rx first, then the Tx. To clear the
3826 * link list, stick the EOL value into the
3827 * next_q field of the registers.
3828 */
3829 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3830 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3831 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3832 val |= I40E_QUEUE_END_OF_LIST
3833 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3834 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3835
3836 while (qp != I40E_QUEUE_END_OF_LIST) {
3837 u32 next;
3838
3839 val = rd32(hw, I40E_QINT_RQCTL(qp));
3840
3841 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3842 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3843 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3844 I40E_QINT_RQCTL_INTEVENT_MASK);
3845
3846 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3847 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3848
3849 wr32(hw, I40E_QINT_RQCTL(qp), val);
3850
3851 val = rd32(hw, I40E_QINT_TQCTL(qp));
3852
3853 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3854 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3855
3856 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3857 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3858 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3859 I40E_QINT_TQCTL_INTEVENT_MASK);
3860
3861 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3862 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3863
3864 wr32(hw, I40E_QINT_TQCTL(qp), val);
3865 qp = next;
3866 }
3867 }
3868 } else {
3869 free_irq(pf->pdev->irq, pf);
3870
3871 val = rd32(hw, I40E_PFINT_LNKLST0);
3872 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3873 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3874 val |= I40E_QUEUE_END_OF_LIST
3875 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3876 wr32(hw, I40E_PFINT_LNKLST0, val);
3877
3878 val = rd32(hw, I40E_QINT_RQCTL(qp));
3879 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3880 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3881 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3882 I40E_QINT_RQCTL_INTEVENT_MASK);
3883
3884 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3885 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3886
3887 wr32(hw, I40E_QINT_RQCTL(qp), val);
3888
3889 val = rd32(hw, I40E_QINT_TQCTL(qp));
3890
3891 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3892 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3893 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3894 I40E_QINT_TQCTL_INTEVENT_MASK);
3895
3896 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3897 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3898
3899 wr32(hw, I40E_QINT_TQCTL(qp), val);
3900 }
3901 }
3902
3903 /**
3904 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3905 * @vsi: the VSI being configured
3906 * @v_idx: Index of vector to be freed
3907 *
3908 * This function frees the memory allocated to the q_vector. In addition if
3909 * NAPI is enabled it will delete any references to the NAPI struct prior
3910 * to freeing the q_vector.
3911 **/
3912 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3913 {
3914 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3915 struct i40e_ring *ring;
3916
3917 if (!q_vector)
3918 return;
3919
3920 /* disassociate q_vector from rings */
3921 i40e_for_each_ring(ring, q_vector->tx)
3922 ring->q_vector = NULL;
3923
3924 i40e_for_each_ring(ring, q_vector->rx)
3925 ring->q_vector = NULL;
3926
3927 /* only VSI w/ an associated netdev is set up w/ NAPI */
3928 if (vsi->netdev)
3929 netif_napi_del(&q_vector->napi);
3930
3931 vsi->q_vectors[v_idx] = NULL;
3932
3933 kfree_rcu(q_vector, rcu);
3934 }
3935
3936 /**
3937 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3938 * @vsi: the VSI being un-configured
3939 *
3940 * This frees the memory allocated to the q_vectors and
3941 * deletes references to the NAPI struct.
3942 **/
3943 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3944 {
3945 int v_idx;
3946
3947 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3948 i40e_free_q_vector(vsi, v_idx);
3949 }
3950
3951 /**
3952 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3953 * @pf: board private structure
3954 **/
3955 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3956 {
3957 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3958 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3959 pci_disable_msix(pf->pdev);
3960 kfree(pf->msix_entries);
3961 pf->msix_entries = NULL;
3962 kfree(pf->irq_pile);
3963 pf->irq_pile = NULL;
3964 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3965 pci_disable_msi(pf->pdev);
3966 }
3967 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3968 }
3969
3970 /**
3971 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3972 * @pf: board private structure
3973 *
3974 * We go through and clear interrupt specific resources and reset the structure
3975 * to pre-load conditions
3976 **/
3977 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3978 {
3979 int i;
3980
3981 i40e_stop_misc_vector(pf);
3982 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3983 synchronize_irq(pf->msix_entries[0].vector);
3984 free_irq(pf->msix_entries[0].vector, pf);
3985 }
3986
3987 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3988 for (i = 0; i < pf->num_alloc_vsi; i++)
3989 if (pf->vsi[i])
3990 i40e_vsi_free_q_vectors(pf->vsi[i]);
3991 i40e_reset_interrupt_capability(pf);
3992 }
3993
3994 /**
3995 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3996 * @vsi: the VSI being configured
3997 **/
3998 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3999 {
4000 int q_idx;
4001
4002 if (!vsi->netdev)
4003 return;
4004
4005 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4006 napi_enable(&vsi->q_vectors[q_idx]->napi);
4007 }
4008
4009 /**
4010 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4011 * @vsi: the VSI being configured
4012 **/
4013 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4014 {
4015 int q_idx;
4016
4017 if (!vsi->netdev)
4018 return;
4019
4020 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4021 napi_disable(&vsi->q_vectors[q_idx]->napi);
4022 }
4023
4024 /**
4025 * i40e_vsi_close - Shut down a VSI
4026 * @vsi: the vsi to be quelled
4027 **/
4028 static void i40e_vsi_close(struct i40e_vsi *vsi)
4029 {
4030 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4031 i40e_down(vsi);
4032 i40e_vsi_free_irq(vsi);
4033 i40e_vsi_free_tx_resources(vsi);
4034 i40e_vsi_free_rx_resources(vsi);
4035 vsi->current_netdev_flags = 0;
4036 }
4037
4038 /**
4039 * i40e_quiesce_vsi - Pause a given VSI
4040 * @vsi: the VSI being paused
4041 **/
4042 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4043 {
4044 if (test_bit(__I40E_DOWN, &vsi->state))
4045 return;
4046
4047 /* No need to disable FCoE VSI when Tx suspended */
4048 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4049 vsi->type == I40E_VSI_FCOE) {
4050 dev_dbg(&vsi->back->pdev->dev,
4051 "%s: VSI seid %d skipping FCoE VSI disable\n",
4052 __func__, vsi->seid);
4053 return;
4054 }
4055
4056 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4057 if (vsi->netdev && netif_running(vsi->netdev)) {
4058 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4059 } else {
4060 i40e_vsi_close(vsi);
4061 }
4062 }
4063
4064 /**
4065 * i40e_unquiesce_vsi - Resume a given VSI
4066 * @vsi: the VSI being resumed
4067 **/
4068 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4069 {
4070 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4071 return;
4072
4073 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4074 if (vsi->netdev && netif_running(vsi->netdev))
4075 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4076 else
4077 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4078 }
4079
4080 /**
4081 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4082 * @pf: the PF
4083 **/
4084 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4085 {
4086 int v;
4087
4088 for (v = 0; v < pf->num_alloc_vsi; v++) {
4089 if (pf->vsi[v])
4090 i40e_quiesce_vsi(pf->vsi[v]);
4091 }
4092 }
4093
4094 /**
4095 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4096 * @pf: the PF
4097 **/
4098 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4099 {
4100 int v;
4101
4102 for (v = 0; v < pf->num_alloc_vsi; v++) {
4103 if (pf->vsi[v])
4104 i40e_unquiesce_vsi(pf->vsi[v]);
4105 }
4106 }
4107
4108 #ifdef CONFIG_I40E_DCB
4109 /**
4110 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4111 * @vsi: the VSI being configured
4112 *
4113 * This function waits for the given VSI's Tx queues to be disabled.
4114 **/
4115 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4116 {
4117 struct i40e_pf *pf = vsi->back;
4118 int i, pf_q, ret;
4119
4120 pf_q = vsi->base_queue;
4121 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4122 /* Check and wait for the disable status of the queue */
4123 ret = i40e_pf_txq_wait(pf, pf_q, false);
4124 if (ret) {
4125 dev_info(&pf->pdev->dev,
4126 "%s: VSI seid %d Tx ring %d disable timeout\n",
4127 __func__, vsi->seid, pf_q);
4128 return ret;
4129 }
4130 }
4131
4132 return 0;
4133 }
4134
4135 /**
4136 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4137 * @pf: the PF
4138 *
4139 * This function waits for the Tx queues to be in disabled state for all the
4140 * VSIs that are managed by this PF.
4141 **/
4142 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4143 {
4144 int v, ret = 0;
4145
4146 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4147 /* No need to wait for FCoE VSI queues */
4148 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4149 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4150 if (ret)
4151 break;
4152 }
4153 }
4154
4155 return ret;
4156 }
4157
4158 #endif
4159
4160 /**
4161 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4162 * @q_idx: TX queue number
4163 * @vsi: Pointer to VSI struct
4164 *
4165 * This function checks specified queue for given VSI. Detects hung condition.
4166 * Sets hung bit since it is two step process. Before next run of service task
4167 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4168 * hung condition remain unchanged and during subsequent run, this function
4169 * issues SW interrupt to recover from hung condition.
4170 **/
4171 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4172 {
4173 struct i40e_ring *tx_ring = NULL;
4174 struct i40e_pf *pf;
4175 u32 head, val, tx_pending;
4176 int i;
4177
4178 pf = vsi->back;
4179
4180 /* now that we have an index, find the tx_ring struct */
4181 for (i = 0; i < vsi->num_queue_pairs; i++) {
4182 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4183 if (q_idx == vsi->tx_rings[i]->queue_index) {
4184 tx_ring = vsi->tx_rings[i];
4185 break;
4186 }
4187 }
4188 }
4189
4190 if (!tx_ring)
4191 return;
4192
4193 /* Read interrupt register */
4194 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4195 val = rd32(&pf->hw,
4196 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4197 tx_ring->vsi->base_vector - 1));
4198 else
4199 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4200
4201 head = i40e_get_head(tx_ring);
4202
4203 tx_pending = i40e_get_tx_pending(tx_ring);
4204
4205 /* Interrupts are disabled and TX pending is non-zero,
4206 * trigger the SW interrupt (don't wait). Worst case
4207 * there will be one extra interrupt which may result
4208 * into not cleaning any queues because queues are cleaned.
4209 */
4210 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4211 i40e_force_wb(vsi, tx_ring->q_vector);
4212 }
4213
4214 /**
4215 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4216 * @pf: pointer to PF struct
4217 *
4218 * LAN VSI has netdev and netdev has TX queues. This function is to check
4219 * each of those TX queues if they are hung, trigger recovery by issuing
4220 * SW interrupt.
4221 **/
4222 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4223 {
4224 struct net_device *netdev;
4225 struct i40e_vsi *vsi;
4226 int i;
4227
4228 /* Only for LAN VSI */
4229 vsi = pf->vsi[pf->lan_vsi];
4230
4231 if (!vsi)
4232 return;
4233
4234 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4235 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4236 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4237 return;
4238
4239 /* Make sure type is MAIN VSI */
4240 if (vsi->type != I40E_VSI_MAIN)
4241 return;
4242
4243 netdev = vsi->netdev;
4244 if (!netdev)
4245 return;
4246
4247 /* Bail out if netif_carrier is not OK */
4248 if (!netif_carrier_ok(netdev))
4249 return;
4250
4251 /* Go thru' TX queues for netdev */
4252 for (i = 0; i < netdev->num_tx_queues; i++) {
4253 struct netdev_queue *q;
4254
4255 q = netdev_get_tx_queue(netdev, i);
4256 if (q)
4257 i40e_detect_recover_hung_queue(i, vsi);
4258 }
4259 }
4260
4261 /**
4262 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4263 * @pf: pointer to PF
4264 *
4265 * Get TC map for ISCSI PF type that will include iSCSI TC
4266 * and LAN TC.
4267 **/
4268 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4269 {
4270 struct i40e_dcb_app_priority_table app;
4271 struct i40e_hw *hw = &pf->hw;
4272 u8 enabled_tc = 1; /* TC0 is always enabled */
4273 u8 tc, i;
4274 /* Get the iSCSI APP TLV */
4275 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4276
4277 for (i = 0; i < dcbcfg->numapps; i++) {
4278 app = dcbcfg->app[i];
4279 if (app.selector == I40E_APP_SEL_TCPIP &&
4280 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4281 tc = dcbcfg->etscfg.prioritytable[app.priority];
4282 enabled_tc |= BIT_ULL(tc);
4283 break;
4284 }
4285 }
4286
4287 return enabled_tc;
4288 }
4289
4290 /**
4291 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4292 * @dcbcfg: the corresponding DCBx configuration structure
4293 *
4294 * Return the number of TCs from given DCBx configuration
4295 **/
4296 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4297 {
4298 u8 num_tc = 0;
4299 int i;
4300
4301 /* Scan the ETS Config Priority Table to find
4302 * traffic class enabled for a given priority
4303 * and use the traffic class index to get the
4304 * number of traffic classes enabled
4305 */
4306 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4307 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4308 num_tc = dcbcfg->etscfg.prioritytable[i];
4309 }
4310
4311 /* Traffic class index starts from zero so
4312 * increment to return the actual count
4313 */
4314 return num_tc + 1;
4315 }
4316
4317 /**
4318 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4319 * @dcbcfg: the corresponding DCBx configuration structure
4320 *
4321 * Query the current DCB configuration and return the number of
4322 * traffic classes enabled from the given DCBX config
4323 **/
4324 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4325 {
4326 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4327 u8 enabled_tc = 1;
4328 u8 i;
4329
4330 for (i = 0; i < num_tc; i++)
4331 enabled_tc |= BIT(i);
4332
4333 return enabled_tc;
4334 }
4335
4336 /**
4337 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4338 * @pf: PF being queried
4339 *
4340 * Return number of traffic classes enabled for the given PF
4341 **/
4342 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4343 {
4344 struct i40e_hw *hw = &pf->hw;
4345 u8 i, enabled_tc;
4346 u8 num_tc = 0;
4347 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4348
4349 /* If DCB is not enabled then always in single TC */
4350 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4351 return 1;
4352
4353 /* SFP mode will be enabled for all TCs on port */
4354 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4355 return i40e_dcb_get_num_tc(dcbcfg);
4356
4357 /* MFP mode return count of enabled TCs for this PF */
4358 if (pf->hw.func_caps.iscsi)
4359 enabled_tc = i40e_get_iscsi_tc_map(pf);
4360 else
4361 return 1; /* Only TC0 */
4362
4363 /* At least have TC0 */
4364 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4365 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4366 if (enabled_tc & BIT_ULL(i))
4367 num_tc++;
4368 }
4369 return num_tc;
4370 }
4371
4372 /**
4373 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4374 * @pf: PF being queried
4375 *
4376 * Return a bitmap for first enabled traffic class for this PF.
4377 **/
4378 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4379 {
4380 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4381 u8 i = 0;
4382
4383 if (!enabled_tc)
4384 return 0x1; /* TC0 */
4385
4386 /* Find the first enabled TC */
4387 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4388 if (enabled_tc & BIT_ULL(i))
4389 break;
4390 }
4391
4392 return BIT(i);
4393 }
4394
4395 /**
4396 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4397 * @pf: PF being queried
4398 *
4399 * Return a bitmap for enabled traffic classes for this PF.
4400 **/
4401 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4402 {
4403 /* If DCB is not enabled for this PF then just return default TC */
4404 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4405 return i40e_pf_get_default_tc(pf);
4406
4407 /* SFP mode we want PF to be enabled for all TCs */
4408 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4409 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4410
4411 /* MFP enabled and iSCSI PF type */
4412 if (pf->hw.func_caps.iscsi)
4413 return i40e_get_iscsi_tc_map(pf);
4414 else
4415 return i40e_pf_get_default_tc(pf);
4416 }
4417
4418 /**
4419 * i40e_vsi_get_bw_info - Query VSI BW Information
4420 * @vsi: the VSI being queried
4421 *
4422 * Returns 0 on success, negative value on failure
4423 **/
4424 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4425 {
4426 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4427 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4428 struct i40e_pf *pf = vsi->back;
4429 struct i40e_hw *hw = &pf->hw;
4430 i40e_status ret;
4431 u32 tc_bw_max;
4432 int i;
4433
4434 /* Get the VSI level BW configuration */
4435 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4436 if (ret) {
4437 dev_info(&pf->pdev->dev,
4438 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4439 i40e_stat_str(&pf->hw, ret),
4440 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4441 return -EINVAL;
4442 }
4443
4444 /* Get the VSI level BW configuration per TC */
4445 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4446 NULL);
4447 if (ret) {
4448 dev_info(&pf->pdev->dev,
4449 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4450 i40e_stat_str(&pf->hw, ret),
4451 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4452 return -EINVAL;
4453 }
4454
4455 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4456 dev_info(&pf->pdev->dev,
4457 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4458 bw_config.tc_valid_bits,
4459 bw_ets_config.tc_valid_bits);
4460 /* Still continuing */
4461 }
4462
4463 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4464 vsi->bw_max_quanta = bw_config.max_bw;
4465 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4466 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4467 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4468 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4469 vsi->bw_ets_limit_credits[i] =
4470 le16_to_cpu(bw_ets_config.credits[i]);
4471 /* 3 bits out of 4 for each TC */
4472 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4473 }
4474
4475 return 0;
4476 }
4477
4478 /**
4479 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4480 * @vsi: the VSI being configured
4481 * @enabled_tc: TC bitmap
4482 * @bw_credits: BW shared credits per TC
4483 *
4484 * Returns 0 on success, negative value on failure
4485 **/
4486 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4487 u8 *bw_share)
4488 {
4489 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4490 i40e_status ret;
4491 int i;
4492
4493 bw_data.tc_valid_bits = enabled_tc;
4494 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4495 bw_data.tc_bw_credits[i] = bw_share[i];
4496
4497 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4498 NULL);
4499 if (ret) {
4500 dev_info(&vsi->back->pdev->dev,
4501 "AQ command Config VSI BW allocation per TC failed = %d\n",
4502 vsi->back->hw.aq.asq_last_status);
4503 return -EINVAL;
4504 }
4505
4506 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4507 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4508
4509 return 0;
4510 }
4511
4512 /**
4513 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4514 * @vsi: the VSI being configured
4515 * @enabled_tc: TC map to be enabled
4516 *
4517 **/
4518 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4519 {
4520 struct net_device *netdev = vsi->netdev;
4521 struct i40e_pf *pf = vsi->back;
4522 struct i40e_hw *hw = &pf->hw;
4523 u8 netdev_tc = 0;
4524 int i;
4525 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4526
4527 if (!netdev)
4528 return;
4529
4530 if (!enabled_tc) {
4531 netdev_reset_tc(netdev);
4532 return;
4533 }
4534
4535 /* Set up actual enabled TCs on the VSI */
4536 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4537 return;
4538
4539 /* set per TC queues for the VSI */
4540 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4541 /* Only set TC queues for enabled tcs
4542 *
4543 * e.g. For a VSI that has TC0 and TC3 enabled the
4544 * enabled_tc bitmap would be 0x00001001; the driver
4545 * will set the numtc for netdev as 2 that will be
4546 * referenced by the netdev layer as TC 0 and 1.
4547 */
4548 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4549 netdev_set_tc_queue(netdev,
4550 vsi->tc_config.tc_info[i].netdev_tc,
4551 vsi->tc_config.tc_info[i].qcount,
4552 vsi->tc_config.tc_info[i].qoffset);
4553 }
4554
4555 /* Assign UP2TC map for the VSI */
4556 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4557 /* Get the actual TC# for the UP */
4558 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4559 /* Get the mapped netdev TC# for the UP */
4560 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4561 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4562 }
4563 }
4564
4565 /**
4566 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4567 * @vsi: the VSI being configured
4568 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4569 **/
4570 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4571 struct i40e_vsi_context *ctxt)
4572 {
4573 /* copy just the sections touched not the entire info
4574 * since not all sections are valid as returned by
4575 * update vsi params
4576 */
4577 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4578 memcpy(&vsi->info.queue_mapping,
4579 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4580 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4581 sizeof(vsi->info.tc_mapping));
4582 }
4583
4584 /**
4585 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4586 * @vsi: VSI to be configured
4587 * @enabled_tc: TC bitmap
4588 *
4589 * This configures a particular VSI for TCs that are mapped to the
4590 * given TC bitmap. It uses default bandwidth share for TCs across
4591 * VSIs to configure TC for a particular VSI.
4592 *
4593 * NOTE:
4594 * It is expected that the VSI queues have been quisced before calling
4595 * this function.
4596 **/
4597 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4598 {
4599 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4600 struct i40e_vsi_context ctxt;
4601 int ret = 0;
4602 int i;
4603
4604 /* Check if enabled_tc is same as existing or new TCs */
4605 if (vsi->tc_config.enabled_tc == enabled_tc)
4606 return ret;
4607
4608 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4609 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4610 if (enabled_tc & BIT_ULL(i))
4611 bw_share[i] = 1;
4612 }
4613
4614 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4615 if (ret) {
4616 dev_info(&vsi->back->pdev->dev,
4617 "Failed configuring TC map %d for VSI %d\n",
4618 enabled_tc, vsi->seid);
4619 goto out;
4620 }
4621
4622 /* Update Queue Pairs Mapping for currently enabled UPs */
4623 ctxt.seid = vsi->seid;
4624 ctxt.pf_num = vsi->back->hw.pf_id;
4625 ctxt.vf_num = 0;
4626 ctxt.uplink_seid = vsi->uplink_seid;
4627 ctxt.info = vsi->info;
4628 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4629
4630 /* Update the VSI after updating the VSI queue-mapping information */
4631 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4632 if (ret) {
4633 dev_info(&vsi->back->pdev->dev,
4634 "Update vsi tc config failed, err %s aq_err %s\n",
4635 i40e_stat_str(&vsi->back->hw, ret),
4636 i40e_aq_str(&vsi->back->hw,
4637 vsi->back->hw.aq.asq_last_status));
4638 goto out;
4639 }
4640 /* update the local VSI info with updated queue map */
4641 i40e_vsi_update_queue_map(vsi, &ctxt);
4642 vsi->info.valid_sections = 0;
4643
4644 /* Update current VSI BW information */
4645 ret = i40e_vsi_get_bw_info(vsi);
4646 if (ret) {
4647 dev_info(&vsi->back->pdev->dev,
4648 "Failed updating vsi bw info, err %s aq_err %s\n",
4649 i40e_stat_str(&vsi->back->hw, ret),
4650 i40e_aq_str(&vsi->back->hw,
4651 vsi->back->hw.aq.asq_last_status));
4652 goto out;
4653 }
4654
4655 /* Update the netdev TC setup */
4656 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4657 out:
4658 return ret;
4659 }
4660
4661 /**
4662 * i40e_veb_config_tc - Configure TCs for given VEB
4663 * @veb: given VEB
4664 * @enabled_tc: TC bitmap
4665 *
4666 * Configures given TC bitmap for VEB (switching) element
4667 **/
4668 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4669 {
4670 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4671 struct i40e_pf *pf = veb->pf;
4672 int ret = 0;
4673 int i;
4674
4675 /* No TCs or already enabled TCs just return */
4676 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4677 return ret;
4678
4679 bw_data.tc_valid_bits = enabled_tc;
4680 /* bw_data.absolute_credits is not set (relative) */
4681
4682 /* Enable ETS TCs with equal BW Share for now */
4683 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4684 if (enabled_tc & BIT_ULL(i))
4685 bw_data.tc_bw_share_credits[i] = 1;
4686 }
4687
4688 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4689 &bw_data, NULL);
4690 if (ret) {
4691 dev_info(&pf->pdev->dev,
4692 "VEB bw config failed, err %s aq_err %s\n",
4693 i40e_stat_str(&pf->hw, ret),
4694 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4695 goto out;
4696 }
4697
4698 /* Update the BW information */
4699 ret = i40e_veb_get_bw_info(veb);
4700 if (ret) {
4701 dev_info(&pf->pdev->dev,
4702 "Failed getting veb bw config, err %s aq_err %s\n",
4703 i40e_stat_str(&pf->hw, ret),
4704 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4705 }
4706
4707 out:
4708 return ret;
4709 }
4710
4711 #ifdef CONFIG_I40E_DCB
4712 /**
4713 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4714 * @pf: PF struct
4715 *
4716 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4717 * the caller would've quiesce all the VSIs before calling
4718 * this function
4719 **/
4720 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4721 {
4722 u8 tc_map = 0;
4723 int ret;
4724 u8 v;
4725
4726 /* Enable the TCs available on PF to all VEBs */
4727 tc_map = i40e_pf_get_tc_map(pf);
4728 for (v = 0; v < I40E_MAX_VEB; v++) {
4729 if (!pf->veb[v])
4730 continue;
4731 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4732 if (ret) {
4733 dev_info(&pf->pdev->dev,
4734 "Failed configuring TC for VEB seid=%d\n",
4735 pf->veb[v]->seid);
4736 /* Will try to configure as many components */
4737 }
4738 }
4739
4740 /* Update each VSI */
4741 for (v = 0; v < pf->num_alloc_vsi; v++) {
4742 if (!pf->vsi[v])
4743 continue;
4744
4745 /* - Enable all TCs for the LAN VSI
4746 #ifdef I40E_FCOE
4747 * - For FCoE VSI only enable the TC configured
4748 * as per the APP TLV
4749 #endif
4750 * - For all others keep them at TC0 for now
4751 */
4752 if (v == pf->lan_vsi)
4753 tc_map = i40e_pf_get_tc_map(pf);
4754 else
4755 tc_map = i40e_pf_get_default_tc(pf);
4756 #ifdef I40E_FCOE
4757 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4758 tc_map = i40e_get_fcoe_tc_map(pf);
4759 #endif /* #ifdef I40E_FCOE */
4760
4761 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4762 if (ret) {
4763 dev_info(&pf->pdev->dev,
4764 "Failed configuring TC for VSI seid=%d\n",
4765 pf->vsi[v]->seid);
4766 /* Will try to configure as many components */
4767 } else {
4768 /* Re-configure VSI vectors based on updated TC map */
4769 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4770 if (pf->vsi[v]->netdev)
4771 i40e_dcbnl_set_all(pf->vsi[v]);
4772 }
4773 }
4774 }
4775
4776 /**
4777 * i40e_resume_port_tx - Resume port Tx
4778 * @pf: PF struct
4779 *
4780 * Resume a port's Tx and issue a PF reset in case of failure to
4781 * resume.
4782 **/
4783 static int i40e_resume_port_tx(struct i40e_pf *pf)
4784 {
4785 struct i40e_hw *hw = &pf->hw;
4786 int ret;
4787
4788 ret = i40e_aq_resume_port_tx(hw, NULL);
4789 if (ret) {
4790 dev_info(&pf->pdev->dev,
4791 "Resume Port Tx failed, err %s aq_err %s\n",
4792 i40e_stat_str(&pf->hw, ret),
4793 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4794 /* Schedule PF reset to recover */
4795 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4796 i40e_service_event_schedule(pf);
4797 }
4798
4799 return ret;
4800 }
4801
4802 /**
4803 * i40e_init_pf_dcb - Initialize DCB configuration
4804 * @pf: PF being configured
4805 *
4806 * Query the current DCB configuration and cache it
4807 * in the hardware structure
4808 **/
4809 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4810 {
4811 struct i40e_hw *hw = &pf->hw;
4812 int err = 0;
4813
4814 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4815 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4816 (pf->hw.aq.fw_maj_ver < 4))
4817 goto out;
4818
4819 /* Get the initial DCB configuration */
4820 err = i40e_init_dcb(hw);
4821 if (!err) {
4822 /* Device/Function is not DCBX capable */
4823 if ((!hw->func_caps.dcb) ||
4824 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4825 dev_info(&pf->pdev->dev,
4826 "DCBX offload is not supported or is disabled for this PF.\n");
4827
4828 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4829 goto out;
4830
4831 } else {
4832 /* When status is not DISABLED then DCBX in FW */
4833 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4834 DCB_CAP_DCBX_VER_IEEE;
4835
4836 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4837 /* Enable DCB tagging only when more than one TC */
4838 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4839 pf->flags |= I40E_FLAG_DCB_ENABLED;
4840 dev_dbg(&pf->pdev->dev,
4841 "DCBX offload is supported for this PF.\n");
4842 }
4843 } else {
4844 dev_info(&pf->pdev->dev,
4845 "Query for DCB configuration failed, err %s aq_err %s\n",
4846 i40e_stat_str(&pf->hw, err),
4847 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4848 }
4849
4850 out:
4851 return err;
4852 }
4853 #endif /* CONFIG_I40E_DCB */
4854 #define SPEED_SIZE 14
4855 #define FC_SIZE 8
4856 /**
4857 * i40e_print_link_message - print link up or down
4858 * @vsi: the VSI for which link needs a message
4859 */
4860 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4861 {
4862 char speed[SPEED_SIZE] = "Unknown";
4863 char fc[FC_SIZE] = "RX/TX";
4864
4865 if (!isup) {
4866 netdev_info(vsi->netdev, "NIC Link is Down\n");
4867 return;
4868 }
4869
4870 /* Warn user if link speed on NPAR enabled partition is not at
4871 * least 10GB
4872 */
4873 if (vsi->back->hw.func_caps.npar_enable &&
4874 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4875 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4876 netdev_warn(vsi->netdev,
4877 "The partition detected link speed that is less than 10Gbps\n");
4878
4879 switch (vsi->back->hw.phy.link_info.link_speed) {
4880 case I40E_LINK_SPEED_40GB:
4881 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4882 break;
4883 case I40E_LINK_SPEED_20GB:
4884 strncpy(speed, "20 Gbps", SPEED_SIZE);
4885 break;
4886 case I40E_LINK_SPEED_10GB:
4887 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4888 break;
4889 case I40E_LINK_SPEED_1GB:
4890 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4891 break;
4892 case I40E_LINK_SPEED_100MB:
4893 strncpy(speed, "100 Mbps", SPEED_SIZE);
4894 break;
4895 default:
4896 break;
4897 }
4898
4899 switch (vsi->back->hw.fc.current_mode) {
4900 case I40E_FC_FULL:
4901 strlcpy(fc, "RX/TX", FC_SIZE);
4902 break;
4903 case I40E_FC_TX_PAUSE:
4904 strlcpy(fc, "TX", FC_SIZE);
4905 break;
4906 case I40E_FC_RX_PAUSE:
4907 strlcpy(fc, "RX", FC_SIZE);
4908 break;
4909 default:
4910 strlcpy(fc, "None", FC_SIZE);
4911 break;
4912 }
4913
4914 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4915 speed, fc);
4916 }
4917
4918 /**
4919 * i40e_up_complete - Finish the last steps of bringing up a connection
4920 * @vsi: the VSI being configured
4921 **/
4922 static int i40e_up_complete(struct i40e_vsi *vsi)
4923 {
4924 struct i40e_pf *pf = vsi->back;
4925 int err;
4926
4927 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4928 i40e_vsi_configure_msix(vsi);
4929 else
4930 i40e_configure_msi_and_legacy(vsi);
4931
4932 /* start rings */
4933 err = i40e_vsi_control_rings(vsi, true);
4934 if (err)
4935 return err;
4936
4937 clear_bit(__I40E_DOWN, &vsi->state);
4938 i40e_napi_enable_all(vsi);
4939 i40e_vsi_enable_irq(vsi);
4940
4941 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4942 (vsi->netdev)) {
4943 i40e_print_link_message(vsi, true);
4944 netif_tx_start_all_queues(vsi->netdev);
4945 netif_carrier_on(vsi->netdev);
4946 } else if (vsi->netdev) {
4947 i40e_print_link_message(vsi, false);
4948 /* need to check for qualified module here*/
4949 if ((pf->hw.phy.link_info.link_info &
4950 I40E_AQ_MEDIA_AVAILABLE) &&
4951 (!(pf->hw.phy.link_info.an_info &
4952 I40E_AQ_QUALIFIED_MODULE)))
4953 netdev_err(vsi->netdev,
4954 "the driver failed to link because an unqualified module was detected.");
4955 }
4956
4957 /* replay FDIR SB filters */
4958 if (vsi->type == I40E_VSI_FDIR) {
4959 /* reset fd counters */
4960 pf->fd_add_err = pf->fd_atr_cnt = 0;
4961 if (pf->fd_tcp_rule > 0) {
4962 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4963 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4964 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4965 pf->fd_tcp_rule = 0;
4966 }
4967 i40e_fdir_filter_restore(vsi);
4968 }
4969 i40e_service_event_schedule(pf);
4970
4971 return 0;
4972 }
4973
4974 /**
4975 * i40e_vsi_reinit_locked - Reset the VSI
4976 * @vsi: the VSI being configured
4977 *
4978 * Rebuild the ring structs after some configuration
4979 * has changed, e.g. MTU size.
4980 **/
4981 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4982 {
4983 struct i40e_pf *pf = vsi->back;
4984
4985 WARN_ON(in_interrupt());
4986 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4987 usleep_range(1000, 2000);
4988 i40e_down(vsi);
4989
4990 /* Give a VF some time to respond to the reset. The
4991 * two second wait is based upon the watchdog cycle in
4992 * the VF driver.
4993 */
4994 if (vsi->type == I40E_VSI_SRIOV)
4995 msleep(2000);
4996 i40e_up(vsi);
4997 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4998 }
4999
5000 /**
5001 * i40e_up - Bring the connection back up after being down
5002 * @vsi: the VSI being configured
5003 **/
5004 int i40e_up(struct i40e_vsi *vsi)
5005 {
5006 int err;
5007
5008 err = i40e_vsi_configure(vsi);
5009 if (!err)
5010 err = i40e_up_complete(vsi);
5011
5012 return err;
5013 }
5014
5015 /**
5016 * i40e_down - Shutdown the connection processing
5017 * @vsi: the VSI being stopped
5018 **/
5019 void i40e_down(struct i40e_vsi *vsi)
5020 {
5021 int i;
5022
5023 /* It is assumed that the caller of this function
5024 * sets the vsi->state __I40E_DOWN bit.
5025 */
5026 if (vsi->netdev) {
5027 netif_carrier_off(vsi->netdev);
5028 netif_tx_disable(vsi->netdev);
5029 }
5030 i40e_vsi_disable_irq(vsi);
5031 i40e_vsi_control_rings(vsi, false);
5032 i40e_napi_disable_all(vsi);
5033
5034 for (i = 0; i < vsi->num_queue_pairs; i++) {
5035 i40e_clean_tx_ring(vsi->tx_rings[i]);
5036 i40e_clean_rx_ring(vsi->rx_rings[i]);
5037 }
5038 }
5039
5040 /**
5041 * i40e_setup_tc - configure multiple traffic classes
5042 * @netdev: net device to configure
5043 * @tc: number of traffic classes to enable
5044 **/
5045 #ifdef I40E_FCOE
5046 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5047 #else
5048 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5049 #endif
5050 {
5051 struct i40e_netdev_priv *np = netdev_priv(netdev);
5052 struct i40e_vsi *vsi = np->vsi;
5053 struct i40e_pf *pf = vsi->back;
5054 u8 enabled_tc = 0;
5055 int ret = -EINVAL;
5056 int i;
5057
5058 /* Check if DCB enabled to continue */
5059 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5060 netdev_info(netdev, "DCB is not enabled for adapter\n");
5061 goto exit;
5062 }
5063
5064 /* Check if MFP enabled */
5065 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5066 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5067 goto exit;
5068 }
5069
5070 /* Check whether tc count is within enabled limit */
5071 if (tc > i40e_pf_get_num_tc(pf)) {
5072 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5073 goto exit;
5074 }
5075
5076 /* Generate TC map for number of tc requested */
5077 for (i = 0; i < tc; i++)
5078 enabled_tc |= BIT_ULL(i);
5079
5080 /* Requesting same TC configuration as already enabled */
5081 if (enabled_tc == vsi->tc_config.enabled_tc)
5082 return 0;
5083
5084 /* Quiesce VSI queues */
5085 i40e_quiesce_vsi(vsi);
5086
5087 /* Configure VSI for enabled TCs */
5088 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5089 if (ret) {
5090 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5091 vsi->seid);
5092 goto exit;
5093 }
5094
5095 /* Unquiesce VSI */
5096 i40e_unquiesce_vsi(vsi);
5097
5098 exit:
5099 return ret;
5100 }
5101
5102 /**
5103 * i40e_open - Called when a network interface is made active
5104 * @netdev: network interface device structure
5105 *
5106 * The open entry point is called when a network interface is made
5107 * active by the system (IFF_UP). At this point all resources needed
5108 * for transmit and receive operations are allocated, the interrupt
5109 * handler is registered with the OS, the netdev watchdog subtask is
5110 * enabled, and the stack is notified that the interface is ready.
5111 *
5112 * Returns 0 on success, negative value on failure
5113 **/
5114 int i40e_open(struct net_device *netdev)
5115 {
5116 struct i40e_netdev_priv *np = netdev_priv(netdev);
5117 struct i40e_vsi *vsi = np->vsi;
5118 struct i40e_pf *pf = vsi->back;
5119 int err;
5120
5121 /* disallow open during test or if eeprom is broken */
5122 if (test_bit(__I40E_TESTING, &pf->state) ||
5123 test_bit(__I40E_BAD_EEPROM, &pf->state))
5124 return -EBUSY;
5125
5126 netif_carrier_off(netdev);
5127
5128 err = i40e_vsi_open(vsi);
5129 if (err)
5130 return err;
5131
5132 /* configure global TSO hardware offload settings */
5133 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5134 TCP_FLAG_FIN) >> 16);
5135 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5136 TCP_FLAG_FIN |
5137 TCP_FLAG_CWR) >> 16);
5138 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5139
5140 #ifdef CONFIG_I40E_VXLAN
5141 vxlan_get_rx_port(netdev);
5142 #endif
5143
5144 return 0;
5145 }
5146
5147 /**
5148 * i40e_vsi_open -
5149 * @vsi: the VSI to open
5150 *
5151 * Finish initialization of the VSI.
5152 *
5153 * Returns 0 on success, negative value on failure
5154 **/
5155 int i40e_vsi_open(struct i40e_vsi *vsi)
5156 {
5157 struct i40e_pf *pf = vsi->back;
5158 char int_name[I40E_INT_NAME_STR_LEN];
5159 int err;
5160
5161 /* allocate descriptors */
5162 err = i40e_vsi_setup_tx_resources(vsi);
5163 if (err)
5164 goto err_setup_tx;
5165 err = i40e_vsi_setup_rx_resources(vsi);
5166 if (err)
5167 goto err_setup_rx;
5168
5169 err = i40e_vsi_configure(vsi);
5170 if (err)
5171 goto err_setup_rx;
5172
5173 if (vsi->netdev) {
5174 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5175 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5176 err = i40e_vsi_request_irq(vsi, int_name);
5177 if (err)
5178 goto err_setup_rx;
5179
5180 /* Notify the stack of the actual queue counts. */
5181 err = netif_set_real_num_tx_queues(vsi->netdev,
5182 vsi->num_queue_pairs);
5183 if (err)
5184 goto err_set_queues;
5185
5186 err = netif_set_real_num_rx_queues(vsi->netdev,
5187 vsi->num_queue_pairs);
5188 if (err)
5189 goto err_set_queues;
5190
5191 } else if (vsi->type == I40E_VSI_FDIR) {
5192 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5193 dev_driver_string(&pf->pdev->dev),
5194 dev_name(&pf->pdev->dev));
5195 err = i40e_vsi_request_irq(vsi, int_name);
5196
5197 } else {
5198 err = -EINVAL;
5199 goto err_setup_rx;
5200 }
5201
5202 err = i40e_up_complete(vsi);
5203 if (err)
5204 goto err_up_complete;
5205
5206 return 0;
5207
5208 err_up_complete:
5209 i40e_down(vsi);
5210 err_set_queues:
5211 i40e_vsi_free_irq(vsi);
5212 err_setup_rx:
5213 i40e_vsi_free_rx_resources(vsi);
5214 err_setup_tx:
5215 i40e_vsi_free_tx_resources(vsi);
5216 if (vsi == pf->vsi[pf->lan_vsi])
5217 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5218
5219 return err;
5220 }
5221
5222 /**
5223 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5224 * @pf: Pointer to PF
5225 *
5226 * This function destroys the hlist where all the Flow Director
5227 * filters were saved.
5228 **/
5229 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5230 {
5231 struct i40e_fdir_filter *filter;
5232 struct hlist_node *node2;
5233
5234 hlist_for_each_entry_safe(filter, node2,
5235 &pf->fdir_filter_list, fdir_node) {
5236 hlist_del(&filter->fdir_node);
5237 kfree(filter);
5238 }
5239 pf->fdir_pf_active_filters = 0;
5240 }
5241
5242 /**
5243 * i40e_close - Disables a network interface
5244 * @netdev: network interface device structure
5245 *
5246 * The close entry point is called when an interface is de-activated
5247 * by the OS. The hardware is still under the driver's control, but
5248 * this netdev interface is disabled.
5249 *
5250 * Returns 0, this is not allowed to fail
5251 **/
5252 #ifdef I40E_FCOE
5253 int i40e_close(struct net_device *netdev)
5254 #else
5255 static int i40e_close(struct net_device *netdev)
5256 #endif
5257 {
5258 struct i40e_netdev_priv *np = netdev_priv(netdev);
5259 struct i40e_vsi *vsi = np->vsi;
5260
5261 i40e_vsi_close(vsi);
5262
5263 return 0;
5264 }
5265
5266 /**
5267 * i40e_do_reset - Start a PF or Core Reset sequence
5268 * @pf: board private structure
5269 * @reset_flags: which reset is requested
5270 *
5271 * The essential difference in resets is that the PF Reset
5272 * doesn't clear the packet buffers, doesn't reset the PE
5273 * firmware, and doesn't bother the other PFs on the chip.
5274 **/
5275 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5276 {
5277 u32 val;
5278
5279 WARN_ON(in_interrupt());
5280
5281 if (i40e_check_asq_alive(&pf->hw))
5282 i40e_vc_notify_reset(pf);
5283
5284 /* do the biggest reset indicated */
5285 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5286
5287 /* Request a Global Reset
5288 *
5289 * This will start the chip's countdown to the actual full
5290 * chip reset event, and a warning interrupt to be sent
5291 * to all PFs, including the requestor. Our handler
5292 * for the warning interrupt will deal with the shutdown
5293 * and recovery of the switch setup.
5294 */
5295 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5296 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5297 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5298 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5299
5300 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5301
5302 /* Request a Core Reset
5303 *
5304 * Same as Global Reset, except does *not* include the MAC/PHY
5305 */
5306 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5307 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5308 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5309 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5310 i40e_flush(&pf->hw);
5311
5312 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5313
5314 /* Request a PF Reset
5315 *
5316 * Resets only the PF-specific registers
5317 *
5318 * This goes directly to the tear-down and rebuild of
5319 * the switch, since we need to do all the recovery as
5320 * for the Core Reset.
5321 */
5322 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5323 i40e_handle_reset_warning(pf);
5324
5325 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5326 int v;
5327
5328 /* Find the VSI(s) that requested a re-init */
5329 dev_info(&pf->pdev->dev,
5330 "VSI reinit requested\n");
5331 for (v = 0; v < pf->num_alloc_vsi; v++) {
5332 struct i40e_vsi *vsi = pf->vsi[v];
5333 if (vsi != NULL &&
5334 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5335 i40e_vsi_reinit_locked(pf->vsi[v]);
5336 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5337 }
5338 }
5339
5340 /* no further action needed, so return now */
5341 return;
5342 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5343 int v;
5344
5345 /* Find the VSI(s) that needs to be brought down */
5346 dev_info(&pf->pdev->dev, "VSI down requested\n");
5347 for (v = 0; v < pf->num_alloc_vsi; v++) {
5348 struct i40e_vsi *vsi = pf->vsi[v];
5349 if (vsi != NULL &&
5350 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5351 set_bit(__I40E_DOWN, &vsi->state);
5352 i40e_down(vsi);
5353 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5354 }
5355 }
5356
5357 /* no further action needed, so return now */
5358 return;
5359 } else {
5360 dev_info(&pf->pdev->dev,
5361 "bad reset request 0x%08x\n", reset_flags);
5362 return;
5363 }
5364 }
5365
5366 #ifdef CONFIG_I40E_DCB
5367 /**
5368 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5369 * @pf: board private structure
5370 * @old_cfg: current DCB config
5371 * @new_cfg: new DCB config
5372 **/
5373 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5374 struct i40e_dcbx_config *old_cfg,
5375 struct i40e_dcbx_config *new_cfg)
5376 {
5377 bool need_reconfig = false;
5378
5379 /* Check if ETS configuration has changed */
5380 if (memcmp(&new_cfg->etscfg,
5381 &old_cfg->etscfg,
5382 sizeof(new_cfg->etscfg))) {
5383 /* If Priority Table has changed reconfig is needed */
5384 if (memcmp(&new_cfg->etscfg.prioritytable,
5385 &old_cfg->etscfg.prioritytable,
5386 sizeof(new_cfg->etscfg.prioritytable))) {
5387 need_reconfig = true;
5388 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5389 }
5390
5391 if (memcmp(&new_cfg->etscfg.tcbwtable,
5392 &old_cfg->etscfg.tcbwtable,
5393 sizeof(new_cfg->etscfg.tcbwtable)))
5394 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5395
5396 if (memcmp(&new_cfg->etscfg.tsatable,
5397 &old_cfg->etscfg.tsatable,
5398 sizeof(new_cfg->etscfg.tsatable)))
5399 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5400 }
5401
5402 /* Check if PFC configuration has changed */
5403 if (memcmp(&new_cfg->pfc,
5404 &old_cfg->pfc,
5405 sizeof(new_cfg->pfc))) {
5406 need_reconfig = true;
5407 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5408 }
5409
5410 /* Check if APP Table has changed */
5411 if (memcmp(&new_cfg->app,
5412 &old_cfg->app,
5413 sizeof(new_cfg->app))) {
5414 need_reconfig = true;
5415 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5416 }
5417
5418 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5419 need_reconfig);
5420 return need_reconfig;
5421 }
5422
5423 /**
5424 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5425 * @pf: board private structure
5426 * @e: event info posted on ARQ
5427 **/
5428 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5429 struct i40e_arq_event_info *e)
5430 {
5431 struct i40e_aqc_lldp_get_mib *mib =
5432 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5433 struct i40e_hw *hw = &pf->hw;
5434 struct i40e_dcbx_config tmp_dcbx_cfg;
5435 bool need_reconfig = false;
5436 int ret = 0;
5437 u8 type;
5438
5439 /* Not DCB capable or capability disabled */
5440 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5441 return ret;
5442
5443 /* Ignore if event is not for Nearest Bridge */
5444 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5445 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5446 dev_dbg(&pf->pdev->dev,
5447 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5448 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5449 return ret;
5450
5451 /* Check MIB Type and return if event for Remote MIB update */
5452 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5453 dev_dbg(&pf->pdev->dev,
5454 "%s: LLDP event mib type %s\n", __func__,
5455 type ? "remote" : "local");
5456 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5457 /* Update the remote cached instance and return */
5458 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5459 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5460 &hw->remote_dcbx_config);
5461 goto exit;
5462 }
5463
5464 /* Store the old configuration */
5465 tmp_dcbx_cfg = hw->local_dcbx_config;
5466
5467 /* Reset the old DCBx configuration data */
5468 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5469 /* Get updated DCBX data from firmware */
5470 ret = i40e_get_dcb_config(&pf->hw);
5471 if (ret) {
5472 dev_info(&pf->pdev->dev,
5473 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5474 i40e_stat_str(&pf->hw, ret),
5475 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5476 goto exit;
5477 }
5478
5479 /* No change detected in DCBX configs */
5480 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5481 sizeof(tmp_dcbx_cfg))) {
5482 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5483 goto exit;
5484 }
5485
5486 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5487 &hw->local_dcbx_config);
5488
5489 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5490
5491 if (!need_reconfig)
5492 goto exit;
5493
5494 /* Enable DCB tagging only when more than one TC */
5495 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5496 pf->flags |= I40E_FLAG_DCB_ENABLED;
5497 else
5498 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5499
5500 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5501 /* Reconfiguration needed quiesce all VSIs */
5502 i40e_pf_quiesce_all_vsi(pf);
5503
5504 /* Changes in configuration update VEB/VSI */
5505 i40e_dcb_reconfigure(pf);
5506
5507 ret = i40e_resume_port_tx(pf);
5508
5509 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5510 /* In case of error no point in resuming VSIs */
5511 if (ret)
5512 goto exit;
5513
5514 /* Wait for the PF's Tx queues to be disabled */
5515 ret = i40e_pf_wait_txq_disabled(pf);
5516 if (ret) {
5517 /* Schedule PF reset to recover */
5518 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5519 i40e_service_event_schedule(pf);
5520 } else {
5521 i40e_pf_unquiesce_all_vsi(pf);
5522 }
5523
5524 exit:
5525 return ret;
5526 }
5527 #endif /* CONFIG_I40E_DCB */
5528
5529 /**
5530 * i40e_do_reset_safe - Protected reset path for userland calls.
5531 * @pf: board private structure
5532 * @reset_flags: which reset is requested
5533 *
5534 **/
5535 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5536 {
5537 rtnl_lock();
5538 i40e_do_reset(pf, reset_flags);
5539 rtnl_unlock();
5540 }
5541
5542 /**
5543 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5544 * @pf: board private structure
5545 * @e: event info posted on ARQ
5546 *
5547 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5548 * and VF queues
5549 **/
5550 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5551 struct i40e_arq_event_info *e)
5552 {
5553 struct i40e_aqc_lan_overflow *data =
5554 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5555 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5556 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5557 struct i40e_hw *hw = &pf->hw;
5558 struct i40e_vf *vf;
5559 u16 vf_id;
5560
5561 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5562 queue, qtx_ctl);
5563
5564 /* Queue belongs to VF, find the VF and issue VF reset */
5565 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5566 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5567 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5568 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5569 vf_id -= hw->func_caps.vf_base_id;
5570 vf = &pf->vf[vf_id];
5571 i40e_vc_notify_vf_reset(vf);
5572 /* Allow VF to process pending reset notification */
5573 msleep(20);
5574 i40e_reset_vf(vf, false);
5575 }
5576 }
5577
5578 /**
5579 * i40e_service_event_complete - Finish up the service event
5580 * @pf: board private structure
5581 **/
5582 static void i40e_service_event_complete(struct i40e_pf *pf)
5583 {
5584 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5585
5586 /* flush memory to make sure state is correct before next watchog */
5587 smp_mb__before_atomic();
5588 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5589 }
5590
5591 /**
5592 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5593 * @pf: board private structure
5594 **/
5595 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5596 {
5597 u32 val, fcnt_prog;
5598
5599 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5600 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5601 return fcnt_prog;
5602 }
5603
5604 /**
5605 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5606 * @pf: board private structure
5607 **/
5608 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5609 {
5610 u32 val, fcnt_prog;
5611
5612 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5613 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5614 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5615 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5616 return fcnt_prog;
5617 }
5618
5619 /**
5620 * i40e_get_global_fd_count - Get total FD filters programmed on device
5621 * @pf: board private structure
5622 **/
5623 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5624 {
5625 u32 val, fcnt_prog;
5626
5627 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5628 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5629 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5630 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5631 return fcnt_prog;
5632 }
5633
5634 /**
5635 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5636 * @pf: board private structure
5637 **/
5638 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5639 {
5640 u32 fcnt_prog, fcnt_avail;
5641
5642 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5643 return;
5644
5645 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5646 * to re-enable
5647 */
5648 fcnt_prog = i40e_get_global_fd_count(pf);
5649 fcnt_avail = pf->fdir_pf_filter_count;
5650 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5651 (pf->fd_add_err == 0) ||
5652 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5653 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5654 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5655 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5656 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5657 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5658 }
5659 }
5660 /* Wait for some more space to be available to turn on ATR */
5661 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5662 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5663 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5664 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5665 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5666 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5667 }
5668 }
5669 }
5670
5671 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5672 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5673 /**
5674 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5675 * @pf: board private structure
5676 **/
5677 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5678 {
5679 unsigned long min_flush_time;
5680 int flush_wait_retry = 50;
5681 bool disable_atr = false;
5682 int fd_room;
5683 int reg;
5684
5685 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5686 return;
5687
5688 if (time_after(jiffies, pf->fd_flush_timestamp +
5689 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5690 /* If the flush is happening too quick and we have mostly
5691 * SB rules we should not re-enable ATR for some time.
5692 */
5693 min_flush_time = pf->fd_flush_timestamp
5694 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5695 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5696
5697 if (!(time_after(jiffies, min_flush_time)) &&
5698 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5699 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5700 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5701 disable_atr = true;
5702 }
5703
5704 pf->fd_flush_timestamp = jiffies;
5705 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5706 /* flush all filters */
5707 wr32(&pf->hw, I40E_PFQF_CTL_1,
5708 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5709 i40e_flush(&pf->hw);
5710 pf->fd_flush_cnt++;
5711 pf->fd_add_err = 0;
5712 do {
5713 /* Check FD flush status every 5-6msec */
5714 usleep_range(5000, 6000);
5715 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5716 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5717 break;
5718 } while (flush_wait_retry--);
5719 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5720 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5721 } else {
5722 /* replay sideband filters */
5723 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5724 if (!disable_atr)
5725 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5726 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5727 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5728 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5729 }
5730 }
5731 }
5732
5733 /**
5734 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5735 * @pf: board private structure
5736 **/
5737 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5738 {
5739 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5740 }
5741
5742 /* We can see up to 256 filter programming desc in transit if the filters are
5743 * being applied really fast; before we see the first
5744 * filter miss error on Rx queue 0. Accumulating enough error messages before
5745 * reacting will make sure we don't cause flush too often.
5746 */
5747 #define I40E_MAX_FD_PROGRAM_ERROR 256
5748
5749 /**
5750 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5751 * @pf: board private structure
5752 **/
5753 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5754 {
5755
5756 /* if interface is down do nothing */
5757 if (test_bit(__I40E_DOWN, &pf->state))
5758 return;
5759
5760 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5761 return;
5762
5763 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5764 i40e_fdir_flush_and_replay(pf);
5765
5766 i40e_fdir_check_and_reenable(pf);
5767
5768 }
5769
5770 /**
5771 * i40e_vsi_link_event - notify VSI of a link event
5772 * @vsi: vsi to be notified
5773 * @link_up: link up or down
5774 **/
5775 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5776 {
5777 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5778 return;
5779
5780 switch (vsi->type) {
5781 case I40E_VSI_MAIN:
5782 #ifdef I40E_FCOE
5783 case I40E_VSI_FCOE:
5784 #endif
5785 if (!vsi->netdev || !vsi->netdev_registered)
5786 break;
5787
5788 if (link_up) {
5789 netif_carrier_on(vsi->netdev);
5790 netif_tx_wake_all_queues(vsi->netdev);
5791 } else {
5792 netif_carrier_off(vsi->netdev);
5793 netif_tx_stop_all_queues(vsi->netdev);
5794 }
5795 break;
5796
5797 case I40E_VSI_SRIOV:
5798 case I40E_VSI_VMDQ2:
5799 case I40E_VSI_CTRL:
5800 case I40E_VSI_MIRROR:
5801 default:
5802 /* there is no notification for other VSIs */
5803 break;
5804 }
5805 }
5806
5807 /**
5808 * i40e_veb_link_event - notify elements on the veb of a link event
5809 * @veb: veb to be notified
5810 * @link_up: link up or down
5811 **/
5812 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5813 {
5814 struct i40e_pf *pf;
5815 int i;
5816
5817 if (!veb || !veb->pf)
5818 return;
5819 pf = veb->pf;
5820
5821 /* depth first... */
5822 for (i = 0; i < I40E_MAX_VEB; i++)
5823 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5824 i40e_veb_link_event(pf->veb[i], link_up);
5825
5826 /* ... now the local VSIs */
5827 for (i = 0; i < pf->num_alloc_vsi; i++)
5828 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5829 i40e_vsi_link_event(pf->vsi[i], link_up);
5830 }
5831
5832 /**
5833 * i40e_link_event - Update netif_carrier status
5834 * @pf: board private structure
5835 **/
5836 static void i40e_link_event(struct i40e_pf *pf)
5837 {
5838 bool new_link, old_link;
5839 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5840 u8 new_link_speed, old_link_speed;
5841
5842 /* set this to force the get_link_status call to refresh state */
5843 pf->hw.phy.get_link_info = true;
5844
5845 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5846 new_link = i40e_get_link_status(&pf->hw);
5847 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5848 new_link_speed = pf->hw.phy.link_info.link_speed;
5849
5850 if (new_link == old_link &&
5851 new_link_speed == old_link_speed &&
5852 (test_bit(__I40E_DOWN, &vsi->state) ||
5853 new_link == netif_carrier_ok(vsi->netdev)))
5854 return;
5855
5856 if (!test_bit(__I40E_DOWN, &vsi->state))
5857 i40e_print_link_message(vsi, new_link);
5858
5859 /* Notify the base of the switch tree connected to
5860 * the link. Floating VEBs are not notified.
5861 */
5862 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5863 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5864 else
5865 i40e_vsi_link_event(vsi, new_link);
5866
5867 if (pf->vf)
5868 i40e_vc_notify_link_state(pf);
5869
5870 if (pf->flags & I40E_FLAG_PTP)
5871 i40e_ptp_set_increment(pf);
5872 }
5873
5874 /**
5875 * i40e_watchdog_subtask - periodic checks not using event driven response
5876 * @pf: board private structure
5877 **/
5878 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5879 {
5880 int i;
5881
5882 /* if interface is down do nothing */
5883 if (test_bit(__I40E_DOWN, &pf->state) ||
5884 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5885 return;
5886
5887 /* make sure we don't do these things too often */
5888 if (time_before(jiffies, (pf->service_timer_previous +
5889 pf->service_timer_period)))
5890 return;
5891 pf->service_timer_previous = jiffies;
5892
5893 i40e_link_event(pf);
5894
5895 /* Update the stats for active netdevs so the network stack
5896 * can look at updated numbers whenever it cares to
5897 */
5898 for (i = 0; i < pf->num_alloc_vsi; i++)
5899 if (pf->vsi[i] && pf->vsi[i]->netdev)
5900 i40e_update_stats(pf->vsi[i]);
5901
5902 /* Update the stats for the active switching components */
5903 for (i = 0; i < I40E_MAX_VEB; i++)
5904 if (pf->veb[i])
5905 i40e_update_veb_stats(pf->veb[i]);
5906
5907 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5908 }
5909
5910 /**
5911 * i40e_reset_subtask - Set up for resetting the device and driver
5912 * @pf: board private structure
5913 **/
5914 static void i40e_reset_subtask(struct i40e_pf *pf)
5915 {
5916 u32 reset_flags = 0;
5917
5918 rtnl_lock();
5919 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5920 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5921 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5922 }
5923 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5924 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5925 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5926 }
5927 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5928 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5929 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5930 }
5931 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5932 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5933 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5934 }
5935 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5936 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5937 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5938 }
5939
5940 /* If there's a recovery already waiting, it takes
5941 * precedence before starting a new reset sequence.
5942 */
5943 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5944 i40e_handle_reset_warning(pf);
5945 goto unlock;
5946 }
5947
5948 /* If we're already down or resetting, just bail */
5949 if (reset_flags &&
5950 !test_bit(__I40E_DOWN, &pf->state) &&
5951 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5952 i40e_do_reset(pf, reset_flags);
5953
5954 unlock:
5955 rtnl_unlock();
5956 }
5957
5958 /**
5959 * i40e_handle_link_event - Handle link event
5960 * @pf: board private structure
5961 * @e: event info posted on ARQ
5962 **/
5963 static void i40e_handle_link_event(struct i40e_pf *pf,
5964 struct i40e_arq_event_info *e)
5965 {
5966 struct i40e_hw *hw = &pf->hw;
5967 struct i40e_aqc_get_link_status *status =
5968 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5969
5970 /* save off old link status information */
5971 hw->phy.link_info_old = hw->phy.link_info;
5972
5973 /* Do a new status request to re-enable LSE reporting
5974 * and load new status information into the hw struct
5975 * This completely ignores any state information
5976 * in the ARQ event info, instead choosing to always
5977 * issue the AQ update link status command.
5978 */
5979 i40e_link_event(pf);
5980
5981 /* check for unqualified module, if link is down */
5982 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5983 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5984 (!(status->link_info & I40E_AQ_LINK_UP)))
5985 dev_err(&pf->pdev->dev,
5986 "The driver failed to link because an unqualified module was detected.\n");
5987 }
5988
5989 /**
5990 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5991 * @pf: board private structure
5992 **/
5993 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5994 {
5995 struct i40e_arq_event_info event;
5996 struct i40e_hw *hw = &pf->hw;
5997 u16 pending, i = 0;
5998 i40e_status ret;
5999 u16 opcode;
6000 u32 oldval;
6001 u32 val;
6002
6003 /* Do not run clean AQ when PF reset fails */
6004 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6005 return;
6006
6007 /* check for error indications */
6008 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6009 oldval = val;
6010 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6011 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6012 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6013 }
6014 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6015 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6016 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6017 }
6018 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6019 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6020 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6021 }
6022 if (oldval != val)
6023 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6024
6025 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6026 oldval = val;
6027 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6028 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6029 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6030 }
6031 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6032 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6033 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6034 }
6035 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6036 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6037 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6038 }
6039 if (oldval != val)
6040 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6041
6042 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6043 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6044 if (!event.msg_buf)
6045 return;
6046
6047 do {
6048 ret = i40e_clean_arq_element(hw, &event, &pending);
6049 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6050 break;
6051 else if (ret) {
6052 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6053 break;
6054 }
6055
6056 opcode = le16_to_cpu(event.desc.opcode);
6057 switch (opcode) {
6058
6059 case i40e_aqc_opc_get_link_status:
6060 i40e_handle_link_event(pf, &event);
6061 break;
6062 case i40e_aqc_opc_send_msg_to_pf:
6063 ret = i40e_vc_process_vf_msg(pf,
6064 le16_to_cpu(event.desc.retval),
6065 le32_to_cpu(event.desc.cookie_high),
6066 le32_to_cpu(event.desc.cookie_low),
6067 event.msg_buf,
6068 event.msg_len);
6069 break;
6070 case i40e_aqc_opc_lldp_update_mib:
6071 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6072 #ifdef CONFIG_I40E_DCB
6073 rtnl_lock();
6074 ret = i40e_handle_lldp_event(pf, &event);
6075 rtnl_unlock();
6076 #endif /* CONFIG_I40E_DCB */
6077 break;
6078 case i40e_aqc_opc_event_lan_overflow:
6079 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6080 i40e_handle_lan_overflow_event(pf, &event);
6081 break;
6082 case i40e_aqc_opc_send_msg_to_peer:
6083 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6084 break;
6085 case i40e_aqc_opc_nvm_erase:
6086 case i40e_aqc_opc_nvm_update:
6087 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6088 break;
6089 default:
6090 dev_info(&pf->pdev->dev,
6091 "ARQ Error: Unknown event 0x%04x received\n",
6092 opcode);
6093 break;
6094 }
6095 } while (pending && (i++ < pf->adminq_work_limit));
6096
6097 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6098 /* re-enable Admin queue interrupt cause */
6099 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6100 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6101 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6102 i40e_flush(hw);
6103
6104 kfree(event.msg_buf);
6105 }
6106
6107 /**
6108 * i40e_verify_eeprom - make sure eeprom is good to use
6109 * @pf: board private structure
6110 **/
6111 static void i40e_verify_eeprom(struct i40e_pf *pf)
6112 {
6113 int err;
6114
6115 err = i40e_diag_eeprom_test(&pf->hw);
6116 if (err) {
6117 /* retry in case of garbage read */
6118 err = i40e_diag_eeprom_test(&pf->hw);
6119 if (err) {
6120 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6121 err);
6122 set_bit(__I40E_BAD_EEPROM, &pf->state);
6123 }
6124 }
6125
6126 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6127 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6128 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6129 }
6130 }
6131
6132 /**
6133 * i40e_enable_pf_switch_lb
6134 * @pf: pointer to the PF structure
6135 *
6136 * enable switch loop back or die - no point in a return value
6137 **/
6138 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6139 {
6140 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6141 struct i40e_vsi_context ctxt;
6142 int ret;
6143
6144 ctxt.seid = pf->main_vsi_seid;
6145 ctxt.pf_num = pf->hw.pf_id;
6146 ctxt.vf_num = 0;
6147 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6148 if (ret) {
6149 dev_info(&pf->pdev->dev,
6150 "couldn't get PF vsi config, err %s aq_err %s\n",
6151 i40e_stat_str(&pf->hw, ret),
6152 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6153 return;
6154 }
6155 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6156 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6157 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6158
6159 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6160 if (ret) {
6161 dev_info(&pf->pdev->dev,
6162 "update vsi switch failed, err %s aq_err %s\n",
6163 i40e_stat_str(&pf->hw, ret),
6164 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6165 }
6166 }
6167
6168 /**
6169 * i40e_disable_pf_switch_lb
6170 * @pf: pointer to the PF structure
6171 *
6172 * disable switch loop back or die - no point in a return value
6173 **/
6174 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6175 {
6176 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6177 struct i40e_vsi_context ctxt;
6178 int ret;
6179
6180 ctxt.seid = pf->main_vsi_seid;
6181 ctxt.pf_num = pf->hw.pf_id;
6182 ctxt.vf_num = 0;
6183 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6184 if (ret) {
6185 dev_info(&pf->pdev->dev,
6186 "couldn't get PF vsi config, err %s aq_err %s\n",
6187 i40e_stat_str(&pf->hw, ret),
6188 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6189 return;
6190 }
6191 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6192 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6193 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6194
6195 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6196 if (ret) {
6197 dev_info(&pf->pdev->dev,
6198 "update vsi switch failed, err %s aq_err %s\n",
6199 i40e_stat_str(&pf->hw, ret),
6200 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6201 }
6202 }
6203
6204 /**
6205 * i40e_config_bridge_mode - Configure the HW bridge mode
6206 * @veb: pointer to the bridge instance
6207 *
6208 * Configure the loop back mode for the LAN VSI that is downlink to the
6209 * specified HW bridge instance. It is expected this function is called
6210 * when a new HW bridge is instantiated.
6211 **/
6212 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6213 {
6214 struct i40e_pf *pf = veb->pf;
6215
6216 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6217 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6218 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6219 i40e_disable_pf_switch_lb(pf);
6220 else
6221 i40e_enable_pf_switch_lb(pf);
6222 }
6223
6224 /**
6225 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6226 * @veb: pointer to the VEB instance
6227 *
6228 * This is a recursive function that first builds the attached VSIs then
6229 * recurses in to build the next layer of VEB. We track the connections
6230 * through our own index numbers because the seid's from the HW could
6231 * change across the reset.
6232 **/
6233 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6234 {
6235 struct i40e_vsi *ctl_vsi = NULL;
6236 struct i40e_pf *pf = veb->pf;
6237 int v, veb_idx;
6238 int ret;
6239
6240 /* build VSI that owns this VEB, temporarily attached to base VEB */
6241 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6242 if (pf->vsi[v] &&
6243 pf->vsi[v]->veb_idx == veb->idx &&
6244 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6245 ctl_vsi = pf->vsi[v];
6246 break;
6247 }
6248 }
6249 if (!ctl_vsi) {
6250 dev_info(&pf->pdev->dev,
6251 "missing owner VSI for veb_idx %d\n", veb->idx);
6252 ret = -ENOENT;
6253 goto end_reconstitute;
6254 }
6255 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6256 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6257 ret = i40e_add_vsi(ctl_vsi);
6258 if (ret) {
6259 dev_info(&pf->pdev->dev,
6260 "rebuild of veb_idx %d owner VSI failed: %d\n",
6261 veb->idx, ret);
6262 goto end_reconstitute;
6263 }
6264 i40e_vsi_reset_stats(ctl_vsi);
6265
6266 /* create the VEB in the switch and move the VSI onto the VEB */
6267 ret = i40e_add_veb(veb, ctl_vsi);
6268 if (ret)
6269 goto end_reconstitute;
6270
6271 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6272 veb->bridge_mode = BRIDGE_MODE_VEB;
6273 else
6274 veb->bridge_mode = BRIDGE_MODE_VEPA;
6275 i40e_config_bridge_mode(veb);
6276
6277 /* create the remaining VSIs attached to this VEB */
6278 for (v = 0; v < pf->num_alloc_vsi; v++) {
6279 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6280 continue;
6281
6282 if (pf->vsi[v]->veb_idx == veb->idx) {
6283 struct i40e_vsi *vsi = pf->vsi[v];
6284 vsi->uplink_seid = veb->seid;
6285 ret = i40e_add_vsi(vsi);
6286 if (ret) {
6287 dev_info(&pf->pdev->dev,
6288 "rebuild of vsi_idx %d failed: %d\n",
6289 v, ret);
6290 goto end_reconstitute;
6291 }
6292 i40e_vsi_reset_stats(vsi);
6293 }
6294 }
6295
6296 /* create any VEBs attached to this VEB - RECURSION */
6297 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6298 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6299 pf->veb[veb_idx]->uplink_seid = veb->seid;
6300 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6301 if (ret)
6302 break;
6303 }
6304 }
6305
6306 end_reconstitute:
6307 return ret;
6308 }
6309
6310 /**
6311 * i40e_get_capabilities - get info about the HW
6312 * @pf: the PF struct
6313 **/
6314 static int i40e_get_capabilities(struct i40e_pf *pf)
6315 {
6316 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6317 u16 data_size;
6318 int buf_len;
6319 int err;
6320
6321 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6322 do {
6323 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6324 if (!cap_buf)
6325 return -ENOMEM;
6326
6327 /* this loads the data into the hw struct for us */
6328 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6329 &data_size,
6330 i40e_aqc_opc_list_func_capabilities,
6331 NULL);
6332 /* data loaded, buffer no longer needed */
6333 kfree(cap_buf);
6334
6335 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6336 /* retry with a larger buffer */
6337 buf_len = data_size;
6338 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6339 dev_info(&pf->pdev->dev,
6340 "capability discovery failed, err %s aq_err %s\n",
6341 i40e_stat_str(&pf->hw, err),
6342 i40e_aq_str(&pf->hw,
6343 pf->hw.aq.asq_last_status));
6344 return -ENODEV;
6345 }
6346 } while (err);
6347
6348 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6349 (pf->hw.aq.fw_maj_ver < 2)) {
6350 pf->hw.func_caps.num_msix_vectors++;
6351 pf->hw.func_caps.num_msix_vectors_vf++;
6352 }
6353
6354 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6355 dev_info(&pf->pdev->dev,
6356 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6357 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6358 pf->hw.func_caps.num_msix_vectors,
6359 pf->hw.func_caps.num_msix_vectors_vf,
6360 pf->hw.func_caps.fd_filters_guaranteed,
6361 pf->hw.func_caps.fd_filters_best_effort,
6362 pf->hw.func_caps.num_tx_qp,
6363 pf->hw.func_caps.num_vsis);
6364
6365 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6366 + pf->hw.func_caps.num_vfs)
6367 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6368 dev_info(&pf->pdev->dev,
6369 "got num_vsis %d, setting num_vsis to %d\n",
6370 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6371 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6372 }
6373
6374 return 0;
6375 }
6376
6377 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6378
6379 /**
6380 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6381 * @pf: board private structure
6382 **/
6383 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6384 {
6385 struct i40e_vsi *vsi;
6386 int i;
6387
6388 /* quick workaround for an NVM issue that leaves a critical register
6389 * uninitialized
6390 */
6391 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6392 static const u32 hkey[] = {
6393 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6394 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6395 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6396 0x95b3a76d};
6397
6398 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6399 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6400 }
6401
6402 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6403 return;
6404
6405 /* find existing VSI and see if it needs configuring */
6406 vsi = NULL;
6407 for (i = 0; i < pf->num_alloc_vsi; i++) {
6408 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6409 vsi = pf->vsi[i];
6410 break;
6411 }
6412 }
6413
6414 /* create a new VSI if none exists */
6415 if (!vsi) {
6416 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6417 pf->vsi[pf->lan_vsi]->seid, 0);
6418 if (!vsi) {
6419 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6420 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6421 return;
6422 }
6423 }
6424
6425 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6426 }
6427
6428 /**
6429 * i40e_fdir_teardown - release the Flow Director resources
6430 * @pf: board private structure
6431 **/
6432 static void i40e_fdir_teardown(struct i40e_pf *pf)
6433 {
6434 int i;
6435
6436 i40e_fdir_filter_exit(pf);
6437 for (i = 0; i < pf->num_alloc_vsi; i++) {
6438 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6439 i40e_vsi_release(pf->vsi[i]);
6440 break;
6441 }
6442 }
6443 }
6444
6445 /**
6446 * i40e_prep_for_reset - prep for the core to reset
6447 * @pf: board private structure
6448 *
6449 * Close up the VFs and other things in prep for PF Reset.
6450 **/
6451 static void i40e_prep_for_reset(struct i40e_pf *pf)
6452 {
6453 struct i40e_hw *hw = &pf->hw;
6454 i40e_status ret = 0;
6455 u32 v;
6456
6457 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6458 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6459 return;
6460
6461 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6462
6463 /* quiesce the VSIs and their queues that are not already DOWN */
6464 i40e_pf_quiesce_all_vsi(pf);
6465
6466 for (v = 0; v < pf->num_alloc_vsi; v++) {
6467 if (pf->vsi[v])
6468 pf->vsi[v]->seid = 0;
6469 }
6470
6471 i40e_shutdown_adminq(&pf->hw);
6472
6473 /* call shutdown HMC */
6474 if (hw->hmc.hmc_obj) {
6475 ret = i40e_shutdown_lan_hmc(hw);
6476 if (ret)
6477 dev_warn(&pf->pdev->dev,
6478 "shutdown_lan_hmc failed: %d\n", ret);
6479 }
6480 }
6481
6482 /**
6483 * i40e_send_version - update firmware with driver version
6484 * @pf: PF struct
6485 */
6486 static void i40e_send_version(struct i40e_pf *pf)
6487 {
6488 struct i40e_driver_version dv;
6489
6490 dv.major_version = DRV_VERSION_MAJOR;
6491 dv.minor_version = DRV_VERSION_MINOR;
6492 dv.build_version = DRV_VERSION_BUILD;
6493 dv.subbuild_version = 0;
6494 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6495 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6496 }
6497
6498 /**
6499 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6500 * @pf: board private structure
6501 * @reinit: if the Main VSI needs to re-initialized.
6502 **/
6503 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6504 {
6505 struct i40e_hw *hw = &pf->hw;
6506 u8 set_fc_aq_fail = 0;
6507 i40e_status ret;
6508 u32 v;
6509
6510 /* Now we wait for GRST to settle out.
6511 * We don't have to delete the VEBs or VSIs from the hw switch
6512 * because the reset will make them disappear.
6513 */
6514 ret = i40e_pf_reset(hw);
6515 if (ret) {
6516 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6517 set_bit(__I40E_RESET_FAILED, &pf->state);
6518 goto clear_recovery;
6519 }
6520 pf->pfr_count++;
6521
6522 if (test_bit(__I40E_DOWN, &pf->state))
6523 goto clear_recovery;
6524 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6525
6526 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6527 ret = i40e_init_adminq(&pf->hw);
6528 if (ret) {
6529 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6530 i40e_stat_str(&pf->hw, ret),
6531 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6532 goto clear_recovery;
6533 }
6534
6535 /* re-verify the eeprom if we just had an EMP reset */
6536 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6537 i40e_verify_eeprom(pf);
6538
6539 i40e_clear_pxe_mode(hw);
6540 ret = i40e_get_capabilities(pf);
6541 if (ret)
6542 goto end_core_reset;
6543
6544 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6545 hw->func_caps.num_rx_qp,
6546 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6547 if (ret) {
6548 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6549 goto end_core_reset;
6550 }
6551 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6552 if (ret) {
6553 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6554 goto end_core_reset;
6555 }
6556
6557 #ifdef CONFIG_I40E_DCB
6558 ret = i40e_init_pf_dcb(pf);
6559 if (ret) {
6560 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6561 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6562 /* Continue without DCB enabled */
6563 }
6564 #endif /* CONFIG_I40E_DCB */
6565 #ifdef I40E_FCOE
6566 ret = i40e_init_pf_fcoe(pf);
6567 if (ret)
6568 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6569
6570 #endif
6571 /* do basic switch setup */
6572 ret = i40e_setup_pf_switch(pf, reinit);
6573 if (ret)
6574 goto end_core_reset;
6575
6576 /* driver is only interested in link up/down and module qualification
6577 * reports from firmware
6578 */
6579 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6580 I40E_AQ_EVENT_LINK_UPDOWN |
6581 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6582 if (ret)
6583 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6584 i40e_stat_str(&pf->hw, ret),
6585 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6586
6587 /* make sure our flow control settings are restored */
6588 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6589 if (ret)
6590 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6591 i40e_stat_str(&pf->hw, ret),
6592 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6593
6594 /* Rebuild the VSIs and VEBs that existed before reset.
6595 * They are still in our local switch element arrays, so only
6596 * need to rebuild the switch model in the HW.
6597 *
6598 * If there were VEBs but the reconstitution failed, we'll try
6599 * try to recover minimal use by getting the basic PF VSI working.
6600 */
6601 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6602 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6603 /* find the one VEB connected to the MAC, and find orphans */
6604 for (v = 0; v < I40E_MAX_VEB; v++) {
6605 if (!pf->veb[v])
6606 continue;
6607
6608 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6609 pf->veb[v]->uplink_seid == 0) {
6610 ret = i40e_reconstitute_veb(pf->veb[v]);
6611
6612 if (!ret)
6613 continue;
6614
6615 /* If Main VEB failed, we're in deep doodoo,
6616 * so give up rebuilding the switch and set up
6617 * for minimal rebuild of PF VSI.
6618 * If orphan failed, we'll report the error
6619 * but try to keep going.
6620 */
6621 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6622 dev_info(&pf->pdev->dev,
6623 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6624 ret);
6625 pf->vsi[pf->lan_vsi]->uplink_seid
6626 = pf->mac_seid;
6627 break;
6628 } else if (pf->veb[v]->uplink_seid == 0) {
6629 dev_info(&pf->pdev->dev,
6630 "rebuild of orphan VEB failed: %d\n",
6631 ret);
6632 }
6633 }
6634 }
6635 }
6636
6637 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6638 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6639 /* no VEB, so rebuild only the Main VSI */
6640 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6641 if (ret) {
6642 dev_info(&pf->pdev->dev,
6643 "rebuild of Main VSI failed: %d\n", ret);
6644 goto end_core_reset;
6645 }
6646 }
6647
6648 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6649 (pf->hw.aq.fw_maj_ver < 4)) {
6650 msleep(75);
6651 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6652 if (ret)
6653 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6654 i40e_stat_str(&pf->hw, ret),
6655 i40e_aq_str(&pf->hw,
6656 pf->hw.aq.asq_last_status));
6657 }
6658 /* reinit the misc interrupt */
6659 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6660 ret = i40e_setup_misc_vector(pf);
6661
6662 /* restart the VSIs that were rebuilt and running before the reset */
6663 i40e_pf_unquiesce_all_vsi(pf);
6664
6665 if (pf->num_alloc_vfs) {
6666 for (v = 0; v < pf->num_alloc_vfs; v++)
6667 i40e_reset_vf(&pf->vf[v], true);
6668 }
6669
6670 /* tell the firmware that we're starting */
6671 i40e_send_version(pf);
6672
6673 end_core_reset:
6674 clear_bit(__I40E_RESET_FAILED, &pf->state);
6675 clear_recovery:
6676 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6677 }
6678
6679 /**
6680 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6681 * @pf: board private structure
6682 *
6683 * Close up the VFs and other things in prep for a Core Reset,
6684 * then get ready to rebuild the world.
6685 **/
6686 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6687 {
6688 i40e_prep_for_reset(pf);
6689 i40e_reset_and_rebuild(pf, false);
6690 }
6691
6692 /**
6693 * i40e_handle_mdd_event
6694 * @pf: pointer to the PF structure
6695 *
6696 * Called from the MDD irq handler to identify possibly malicious vfs
6697 **/
6698 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6699 {
6700 struct i40e_hw *hw = &pf->hw;
6701 bool mdd_detected = false;
6702 bool pf_mdd_detected = false;
6703 struct i40e_vf *vf;
6704 u32 reg;
6705 int i;
6706
6707 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6708 return;
6709
6710 /* find what triggered the MDD event */
6711 reg = rd32(hw, I40E_GL_MDET_TX);
6712 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6713 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6714 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6715 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6716 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6717 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6718 I40E_GL_MDET_TX_EVENT_SHIFT;
6719 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6720 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6721 pf->hw.func_caps.base_queue;
6722 if (netif_msg_tx_err(pf))
6723 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6724 event, queue, pf_num, vf_num);
6725 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6726 mdd_detected = true;
6727 }
6728 reg = rd32(hw, I40E_GL_MDET_RX);
6729 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6730 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6731 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6732 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6733 I40E_GL_MDET_RX_EVENT_SHIFT;
6734 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6735 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6736 pf->hw.func_caps.base_queue;
6737 if (netif_msg_rx_err(pf))
6738 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6739 event, queue, func);
6740 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6741 mdd_detected = true;
6742 }
6743
6744 if (mdd_detected) {
6745 reg = rd32(hw, I40E_PF_MDET_TX);
6746 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6747 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6748 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6749 pf_mdd_detected = true;
6750 }
6751 reg = rd32(hw, I40E_PF_MDET_RX);
6752 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6753 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6754 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6755 pf_mdd_detected = true;
6756 }
6757 /* Queue belongs to the PF, initiate a reset */
6758 if (pf_mdd_detected) {
6759 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6760 i40e_service_event_schedule(pf);
6761 }
6762 }
6763
6764 /* see if one of the VFs needs its hand slapped */
6765 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6766 vf = &(pf->vf[i]);
6767 reg = rd32(hw, I40E_VP_MDET_TX(i));
6768 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6769 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6770 vf->num_mdd_events++;
6771 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6772 i);
6773 }
6774
6775 reg = rd32(hw, I40E_VP_MDET_RX(i));
6776 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6777 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6778 vf->num_mdd_events++;
6779 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6780 i);
6781 }
6782
6783 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6784 dev_info(&pf->pdev->dev,
6785 "Too many MDD events on VF %d, disabled\n", i);
6786 dev_info(&pf->pdev->dev,
6787 "Use PF Control I/F to re-enable the VF\n");
6788 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6789 }
6790 }
6791
6792 /* re-enable mdd interrupt cause */
6793 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6794 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6795 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6796 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6797 i40e_flush(hw);
6798 }
6799
6800 #ifdef CONFIG_I40E_VXLAN
6801 /**
6802 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6803 * @pf: board private structure
6804 **/
6805 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6806 {
6807 struct i40e_hw *hw = &pf->hw;
6808 i40e_status ret;
6809 __be16 port;
6810 int i;
6811
6812 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6813 return;
6814
6815 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6816
6817 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6818 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6819 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6820 port = pf->vxlan_ports[i];
6821 if (port)
6822 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6823 I40E_AQC_TUNNEL_TYPE_VXLAN,
6824 NULL, NULL);
6825 else
6826 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6827
6828 if (ret) {
6829 dev_info(&pf->pdev->dev,
6830 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6831 port ? "add" : "delete",
6832 ntohs(port), i,
6833 i40e_stat_str(&pf->hw, ret),
6834 i40e_aq_str(&pf->hw,
6835 pf->hw.aq.asq_last_status));
6836 pf->vxlan_ports[i] = 0;
6837 }
6838 }
6839 }
6840 }
6841
6842 #endif
6843 /**
6844 * i40e_service_task - Run the driver's async subtasks
6845 * @work: pointer to work_struct containing our data
6846 **/
6847 static void i40e_service_task(struct work_struct *work)
6848 {
6849 struct i40e_pf *pf = container_of(work,
6850 struct i40e_pf,
6851 service_task);
6852 unsigned long start_time = jiffies;
6853
6854 /* don't bother with service tasks if a reset is in progress */
6855 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6856 i40e_service_event_complete(pf);
6857 return;
6858 }
6859
6860 i40e_detect_recover_hung(pf);
6861 i40e_reset_subtask(pf);
6862 i40e_handle_mdd_event(pf);
6863 i40e_vc_process_vflr_event(pf);
6864 i40e_watchdog_subtask(pf);
6865 i40e_fdir_reinit_subtask(pf);
6866 i40e_sync_filters_subtask(pf);
6867 #ifdef CONFIG_I40E_VXLAN
6868 i40e_sync_vxlan_filters_subtask(pf);
6869 #endif
6870 i40e_clean_adminq_subtask(pf);
6871
6872 i40e_service_event_complete(pf);
6873
6874 /* If the tasks have taken longer than one timer cycle or there
6875 * is more work to be done, reschedule the service task now
6876 * rather than wait for the timer to tick again.
6877 */
6878 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6879 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6880 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6881 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6882 i40e_service_event_schedule(pf);
6883 }
6884
6885 /**
6886 * i40e_service_timer - timer callback
6887 * @data: pointer to PF struct
6888 **/
6889 static void i40e_service_timer(unsigned long data)
6890 {
6891 struct i40e_pf *pf = (struct i40e_pf *)data;
6892
6893 mod_timer(&pf->service_timer,
6894 round_jiffies(jiffies + pf->service_timer_period));
6895 i40e_service_event_schedule(pf);
6896 }
6897
6898 /**
6899 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6900 * @vsi: the VSI being configured
6901 **/
6902 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6903 {
6904 struct i40e_pf *pf = vsi->back;
6905
6906 switch (vsi->type) {
6907 case I40E_VSI_MAIN:
6908 vsi->alloc_queue_pairs = pf->num_lan_qps;
6909 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6910 I40E_REQ_DESCRIPTOR_MULTIPLE);
6911 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6912 vsi->num_q_vectors = pf->num_lan_msix;
6913 else
6914 vsi->num_q_vectors = 1;
6915
6916 break;
6917
6918 case I40E_VSI_FDIR:
6919 vsi->alloc_queue_pairs = 1;
6920 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6921 I40E_REQ_DESCRIPTOR_MULTIPLE);
6922 vsi->num_q_vectors = 1;
6923 break;
6924
6925 case I40E_VSI_VMDQ2:
6926 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6927 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6928 I40E_REQ_DESCRIPTOR_MULTIPLE);
6929 vsi->num_q_vectors = pf->num_vmdq_msix;
6930 break;
6931
6932 case I40E_VSI_SRIOV:
6933 vsi->alloc_queue_pairs = pf->num_vf_qps;
6934 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6935 I40E_REQ_DESCRIPTOR_MULTIPLE);
6936 break;
6937
6938 #ifdef I40E_FCOE
6939 case I40E_VSI_FCOE:
6940 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6941 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6942 I40E_REQ_DESCRIPTOR_MULTIPLE);
6943 vsi->num_q_vectors = pf->num_fcoe_msix;
6944 break;
6945
6946 #endif /* I40E_FCOE */
6947 default:
6948 WARN_ON(1);
6949 return -ENODATA;
6950 }
6951
6952 return 0;
6953 }
6954
6955 /**
6956 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6957 * @type: VSI pointer
6958 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6959 *
6960 * On error: returns error code (negative)
6961 * On success: returns 0
6962 **/
6963 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6964 {
6965 int size;
6966 int ret = 0;
6967
6968 /* allocate memory for both Tx and Rx ring pointers */
6969 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6970 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6971 if (!vsi->tx_rings)
6972 return -ENOMEM;
6973 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6974
6975 if (alloc_qvectors) {
6976 /* allocate memory for q_vector pointers */
6977 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6978 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6979 if (!vsi->q_vectors) {
6980 ret = -ENOMEM;
6981 goto err_vectors;
6982 }
6983 }
6984 return ret;
6985
6986 err_vectors:
6987 kfree(vsi->tx_rings);
6988 return ret;
6989 }
6990
6991 /**
6992 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6993 * @pf: board private structure
6994 * @type: type of VSI
6995 *
6996 * On error: returns error code (negative)
6997 * On success: returns vsi index in PF (positive)
6998 **/
6999 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7000 {
7001 int ret = -ENODEV;
7002 struct i40e_vsi *vsi;
7003 int vsi_idx;
7004 int i;
7005
7006 /* Need to protect the allocation of the VSIs at the PF level */
7007 mutex_lock(&pf->switch_mutex);
7008
7009 /* VSI list may be fragmented if VSI creation/destruction has
7010 * been happening. We can afford to do a quick scan to look
7011 * for any free VSIs in the list.
7012 *
7013 * find next empty vsi slot, looping back around if necessary
7014 */
7015 i = pf->next_vsi;
7016 while (i < pf->num_alloc_vsi && pf->vsi[i])
7017 i++;
7018 if (i >= pf->num_alloc_vsi) {
7019 i = 0;
7020 while (i < pf->next_vsi && pf->vsi[i])
7021 i++;
7022 }
7023
7024 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7025 vsi_idx = i; /* Found one! */
7026 } else {
7027 ret = -ENODEV;
7028 goto unlock_pf; /* out of VSI slots! */
7029 }
7030 pf->next_vsi = ++i;
7031
7032 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7033 if (!vsi) {
7034 ret = -ENOMEM;
7035 goto unlock_pf;
7036 }
7037 vsi->type = type;
7038 vsi->back = pf;
7039 set_bit(__I40E_DOWN, &vsi->state);
7040 vsi->flags = 0;
7041 vsi->idx = vsi_idx;
7042 vsi->rx_itr_setting = pf->rx_itr_default;
7043 vsi->tx_itr_setting = pf->tx_itr_default;
7044 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7045 pf->rss_table_size : 64;
7046 vsi->netdev_registered = false;
7047 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7048 INIT_LIST_HEAD(&vsi->mac_filter_list);
7049 vsi->irqs_ready = false;
7050
7051 ret = i40e_set_num_rings_in_vsi(vsi);
7052 if (ret)
7053 goto err_rings;
7054
7055 ret = i40e_vsi_alloc_arrays(vsi, true);
7056 if (ret)
7057 goto err_rings;
7058
7059 /* Setup default MSIX irq handler for VSI */
7060 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7061
7062 pf->vsi[vsi_idx] = vsi;
7063 ret = vsi_idx;
7064 goto unlock_pf;
7065
7066 err_rings:
7067 pf->next_vsi = i - 1;
7068 kfree(vsi);
7069 unlock_pf:
7070 mutex_unlock(&pf->switch_mutex);
7071 return ret;
7072 }
7073
7074 /**
7075 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7076 * @type: VSI pointer
7077 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7078 *
7079 * On error: returns error code (negative)
7080 * On success: returns 0
7081 **/
7082 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7083 {
7084 /* free the ring and vector containers */
7085 if (free_qvectors) {
7086 kfree(vsi->q_vectors);
7087 vsi->q_vectors = NULL;
7088 }
7089 kfree(vsi->tx_rings);
7090 vsi->tx_rings = NULL;
7091 vsi->rx_rings = NULL;
7092 }
7093
7094 /**
7095 * i40e_vsi_clear - Deallocate the VSI provided
7096 * @vsi: the VSI being un-configured
7097 **/
7098 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7099 {
7100 struct i40e_pf *pf;
7101
7102 if (!vsi)
7103 return 0;
7104
7105 if (!vsi->back)
7106 goto free_vsi;
7107 pf = vsi->back;
7108
7109 mutex_lock(&pf->switch_mutex);
7110 if (!pf->vsi[vsi->idx]) {
7111 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7112 vsi->idx, vsi->idx, vsi, vsi->type);
7113 goto unlock_vsi;
7114 }
7115
7116 if (pf->vsi[vsi->idx] != vsi) {
7117 dev_err(&pf->pdev->dev,
7118 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7119 pf->vsi[vsi->idx]->idx,
7120 pf->vsi[vsi->idx],
7121 pf->vsi[vsi->idx]->type,
7122 vsi->idx, vsi, vsi->type);
7123 goto unlock_vsi;
7124 }
7125
7126 /* updates the PF for this cleared vsi */
7127 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7128 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7129
7130 i40e_vsi_free_arrays(vsi, true);
7131
7132 pf->vsi[vsi->idx] = NULL;
7133 if (vsi->idx < pf->next_vsi)
7134 pf->next_vsi = vsi->idx;
7135
7136 unlock_vsi:
7137 mutex_unlock(&pf->switch_mutex);
7138 free_vsi:
7139 kfree(vsi);
7140
7141 return 0;
7142 }
7143
7144 /**
7145 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7146 * @vsi: the VSI being cleaned
7147 **/
7148 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7149 {
7150 int i;
7151
7152 if (vsi->tx_rings && vsi->tx_rings[0]) {
7153 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7154 kfree_rcu(vsi->tx_rings[i], rcu);
7155 vsi->tx_rings[i] = NULL;
7156 vsi->rx_rings[i] = NULL;
7157 }
7158 }
7159 }
7160
7161 /**
7162 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7163 * @vsi: the VSI being configured
7164 **/
7165 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7166 {
7167 struct i40e_ring *tx_ring, *rx_ring;
7168 struct i40e_pf *pf = vsi->back;
7169 int i;
7170
7171 /* Set basic values in the rings to be used later during open() */
7172 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7173 /* allocate space for both Tx and Rx in one shot */
7174 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7175 if (!tx_ring)
7176 goto err_out;
7177
7178 tx_ring->queue_index = i;
7179 tx_ring->reg_idx = vsi->base_queue + i;
7180 tx_ring->ring_active = false;
7181 tx_ring->vsi = vsi;
7182 tx_ring->netdev = vsi->netdev;
7183 tx_ring->dev = &pf->pdev->dev;
7184 tx_ring->count = vsi->num_desc;
7185 tx_ring->size = 0;
7186 tx_ring->dcb_tc = 0;
7187 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7188 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7189 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7190 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7191 vsi->tx_rings[i] = tx_ring;
7192
7193 rx_ring = &tx_ring[1];
7194 rx_ring->queue_index = i;
7195 rx_ring->reg_idx = vsi->base_queue + i;
7196 rx_ring->ring_active = false;
7197 rx_ring->vsi = vsi;
7198 rx_ring->netdev = vsi->netdev;
7199 rx_ring->dev = &pf->pdev->dev;
7200 rx_ring->count = vsi->num_desc;
7201 rx_ring->size = 0;
7202 rx_ring->dcb_tc = 0;
7203 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7204 set_ring_16byte_desc_enabled(rx_ring);
7205 else
7206 clear_ring_16byte_desc_enabled(rx_ring);
7207 vsi->rx_rings[i] = rx_ring;
7208 }
7209
7210 return 0;
7211
7212 err_out:
7213 i40e_vsi_clear_rings(vsi);
7214 return -ENOMEM;
7215 }
7216
7217 /**
7218 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7219 * @pf: board private structure
7220 * @vectors: the number of MSI-X vectors to request
7221 *
7222 * Returns the number of vectors reserved, or error
7223 **/
7224 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7225 {
7226 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7227 I40E_MIN_MSIX, vectors);
7228 if (vectors < 0) {
7229 dev_info(&pf->pdev->dev,
7230 "MSI-X vector reservation failed: %d\n", vectors);
7231 vectors = 0;
7232 }
7233
7234 return vectors;
7235 }
7236
7237 /**
7238 * i40e_init_msix - Setup the MSIX capability
7239 * @pf: board private structure
7240 *
7241 * Work with the OS to set up the MSIX vectors needed.
7242 *
7243 * Returns the number of vectors reserved or negative on failure
7244 **/
7245 static int i40e_init_msix(struct i40e_pf *pf)
7246 {
7247 struct i40e_hw *hw = &pf->hw;
7248 int vectors_left;
7249 int v_budget, i;
7250 int v_actual;
7251
7252 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7253 return -ENODEV;
7254
7255 /* The number of vectors we'll request will be comprised of:
7256 * - Add 1 for "other" cause for Admin Queue events, etc.
7257 * - The number of LAN queue pairs
7258 * - Queues being used for RSS.
7259 * We don't need as many as max_rss_size vectors.
7260 * use rss_size instead in the calculation since that
7261 * is governed by number of cpus in the system.
7262 * - assumes symmetric Tx/Rx pairing
7263 * - The number of VMDq pairs
7264 #ifdef I40E_FCOE
7265 * - The number of FCOE qps.
7266 #endif
7267 * Once we count this up, try the request.
7268 *
7269 * If we can't get what we want, we'll simplify to nearly nothing
7270 * and try again. If that still fails, we punt.
7271 */
7272 vectors_left = hw->func_caps.num_msix_vectors;
7273 v_budget = 0;
7274
7275 /* reserve one vector for miscellaneous handler */
7276 if (vectors_left) {
7277 v_budget++;
7278 vectors_left--;
7279 }
7280
7281 /* reserve vectors for the main PF traffic queues */
7282 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7283 vectors_left -= pf->num_lan_msix;
7284 v_budget += pf->num_lan_msix;
7285
7286 /* reserve one vector for sideband flow director */
7287 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7288 if (vectors_left) {
7289 v_budget++;
7290 vectors_left--;
7291 } else {
7292 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7293 }
7294 }
7295
7296 #ifdef I40E_FCOE
7297 /* can we reserve enough for FCoE? */
7298 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7299 if (!vectors_left)
7300 pf->num_fcoe_msix = 0;
7301 else if (vectors_left >= pf->num_fcoe_qps)
7302 pf->num_fcoe_msix = pf->num_fcoe_qps;
7303 else
7304 pf->num_fcoe_msix = 1;
7305 v_budget += pf->num_fcoe_msix;
7306 vectors_left -= pf->num_fcoe_msix;
7307 }
7308
7309 #endif
7310 /* any vectors left over go for VMDq support */
7311 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7312 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7313 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7314
7315 /* if we're short on vectors for what's desired, we limit
7316 * the queues per vmdq. If this is still more than are
7317 * available, the user will need to change the number of
7318 * queues/vectors used by the PF later with the ethtool
7319 * channels command
7320 */
7321 if (vmdq_vecs < vmdq_vecs_wanted)
7322 pf->num_vmdq_qps = 1;
7323 pf->num_vmdq_msix = pf->num_vmdq_qps;
7324
7325 v_budget += vmdq_vecs;
7326 vectors_left -= vmdq_vecs;
7327 }
7328
7329 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7330 GFP_KERNEL);
7331 if (!pf->msix_entries)
7332 return -ENOMEM;
7333
7334 for (i = 0; i < v_budget; i++)
7335 pf->msix_entries[i].entry = i;
7336 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7337
7338 if (v_actual != v_budget) {
7339 /* If we have limited resources, we will start with no vectors
7340 * for the special features and then allocate vectors to some
7341 * of these features based on the policy and at the end disable
7342 * the features that did not get any vectors.
7343 */
7344 #ifdef I40E_FCOE
7345 pf->num_fcoe_qps = 0;
7346 pf->num_fcoe_msix = 0;
7347 #endif
7348 pf->num_vmdq_msix = 0;
7349 }
7350
7351 if (v_actual < I40E_MIN_MSIX) {
7352 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7353 kfree(pf->msix_entries);
7354 pf->msix_entries = NULL;
7355 return -ENODEV;
7356
7357 } else if (v_actual == I40E_MIN_MSIX) {
7358 /* Adjust for minimal MSIX use */
7359 pf->num_vmdq_vsis = 0;
7360 pf->num_vmdq_qps = 0;
7361 pf->num_lan_qps = 1;
7362 pf->num_lan_msix = 1;
7363
7364 } else if (v_actual != v_budget) {
7365 int vec;
7366
7367 /* reserve the misc vector */
7368 vec = v_actual - 1;
7369
7370 /* Scale vector usage down */
7371 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7372 pf->num_vmdq_vsis = 1;
7373 pf->num_vmdq_qps = 1;
7374 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7375
7376 /* partition out the remaining vectors */
7377 switch (vec) {
7378 case 2:
7379 pf->num_lan_msix = 1;
7380 break;
7381 case 3:
7382 #ifdef I40E_FCOE
7383 /* give one vector to FCoE */
7384 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7385 pf->num_lan_msix = 1;
7386 pf->num_fcoe_msix = 1;
7387 }
7388 #else
7389 pf->num_lan_msix = 2;
7390 #endif
7391 break;
7392 default:
7393 #ifdef I40E_FCOE
7394 /* give one vector to FCoE */
7395 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7396 pf->num_fcoe_msix = 1;
7397 vec--;
7398 }
7399 #endif
7400 /* give the rest to the PF */
7401 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7402 break;
7403 }
7404 }
7405
7406 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7407 (pf->num_vmdq_msix == 0)) {
7408 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7409 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7410 }
7411 #ifdef I40E_FCOE
7412
7413 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7414 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7415 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7416 }
7417 #endif
7418 return v_actual;
7419 }
7420
7421 /**
7422 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7423 * @vsi: the VSI being configured
7424 * @v_idx: index of the vector in the vsi struct
7425 *
7426 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7427 **/
7428 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7429 {
7430 struct i40e_q_vector *q_vector;
7431
7432 /* allocate q_vector */
7433 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7434 if (!q_vector)
7435 return -ENOMEM;
7436
7437 q_vector->vsi = vsi;
7438 q_vector->v_idx = v_idx;
7439 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7440 if (vsi->netdev)
7441 netif_napi_add(vsi->netdev, &q_vector->napi,
7442 i40e_napi_poll, NAPI_POLL_WEIGHT);
7443
7444 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7445 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7446
7447 /* tie q_vector and vsi together */
7448 vsi->q_vectors[v_idx] = q_vector;
7449
7450 return 0;
7451 }
7452
7453 /**
7454 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7455 * @vsi: the VSI being configured
7456 *
7457 * We allocate one q_vector per queue interrupt. If allocation fails we
7458 * return -ENOMEM.
7459 **/
7460 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7461 {
7462 struct i40e_pf *pf = vsi->back;
7463 int v_idx, num_q_vectors;
7464 int err;
7465
7466 /* if not MSIX, give the one vector only to the LAN VSI */
7467 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7468 num_q_vectors = vsi->num_q_vectors;
7469 else if (vsi == pf->vsi[pf->lan_vsi])
7470 num_q_vectors = 1;
7471 else
7472 return -EINVAL;
7473
7474 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7475 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7476 if (err)
7477 goto err_out;
7478 }
7479
7480 return 0;
7481
7482 err_out:
7483 while (v_idx--)
7484 i40e_free_q_vector(vsi, v_idx);
7485
7486 return err;
7487 }
7488
7489 /**
7490 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7491 * @pf: board private structure to initialize
7492 **/
7493 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7494 {
7495 int vectors = 0;
7496 ssize_t size;
7497
7498 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7499 vectors = i40e_init_msix(pf);
7500 if (vectors < 0) {
7501 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7502 #ifdef I40E_FCOE
7503 I40E_FLAG_FCOE_ENABLED |
7504 #endif
7505 I40E_FLAG_RSS_ENABLED |
7506 I40E_FLAG_DCB_CAPABLE |
7507 I40E_FLAG_SRIOV_ENABLED |
7508 I40E_FLAG_FD_SB_ENABLED |
7509 I40E_FLAG_FD_ATR_ENABLED |
7510 I40E_FLAG_VMDQ_ENABLED);
7511
7512 /* rework the queue expectations without MSIX */
7513 i40e_determine_queue_usage(pf);
7514 }
7515 }
7516
7517 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7518 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7519 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7520 vectors = pci_enable_msi(pf->pdev);
7521 if (vectors < 0) {
7522 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7523 vectors);
7524 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7525 }
7526 vectors = 1; /* one MSI or Legacy vector */
7527 }
7528
7529 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7530 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7531
7532 /* set up vector assignment tracking */
7533 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7534 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7535 if (!pf->irq_pile) {
7536 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7537 return -ENOMEM;
7538 }
7539 pf->irq_pile->num_entries = vectors;
7540 pf->irq_pile->search_hint = 0;
7541
7542 /* track first vector for misc interrupts, ignore return */
7543 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7544
7545 return 0;
7546 }
7547
7548 /**
7549 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7550 * @pf: board private structure
7551 *
7552 * This sets up the handler for MSIX 0, which is used to manage the
7553 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7554 * when in MSI or Legacy interrupt mode.
7555 **/
7556 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7557 {
7558 struct i40e_hw *hw = &pf->hw;
7559 int err = 0;
7560
7561 /* Only request the irq if this is the first time through, and
7562 * not when we're rebuilding after a Reset
7563 */
7564 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7565 err = request_irq(pf->msix_entries[0].vector,
7566 i40e_intr, 0, pf->int_name, pf);
7567 if (err) {
7568 dev_info(&pf->pdev->dev,
7569 "request_irq for %s failed: %d\n",
7570 pf->int_name, err);
7571 return -EFAULT;
7572 }
7573 }
7574
7575 i40e_enable_misc_int_causes(pf);
7576
7577 /* associate no queues to the misc vector */
7578 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7579 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7580
7581 i40e_flush(hw);
7582
7583 i40e_irq_dynamic_enable_icr0(pf);
7584
7585 return err;
7586 }
7587
7588 /**
7589 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7590 * @vsi: vsi structure
7591 * @seed: RSS hash seed
7592 **/
7593 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7594 {
7595 struct i40e_aqc_get_set_rss_key_data rss_key;
7596 struct i40e_pf *pf = vsi->back;
7597 struct i40e_hw *hw = &pf->hw;
7598 bool pf_lut = false;
7599 u8 *rss_lut;
7600 int ret, i;
7601
7602 memset(&rss_key, 0, sizeof(rss_key));
7603 memcpy(&rss_key, seed, sizeof(rss_key));
7604
7605 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7606 if (!rss_lut)
7607 return -ENOMEM;
7608
7609 /* Populate the LUT with max no. of queues in round robin fashion */
7610 for (i = 0; i < vsi->rss_table_size; i++)
7611 rss_lut[i] = i % vsi->rss_size;
7612
7613 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7614 if (ret) {
7615 dev_info(&pf->pdev->dev,
7616 "Cannot set RSS key, err %s aq_err %s\n",
7617 i40e_stat_str(&pf->hw, ret),
7618 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7619 return ret;
7620 }
7621
7622 if (vsi->type == I40E_VSI_MAIN)
7623 pf_lut = true;
7624
7625 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7626 vsi->rss_table_size);
7627 if (ret)
7628 dev_info(&pf->pdev->dev,
7629 "Cannot set RSS lut, err %s aq_err %s\n",
7630 i40e_stat_str(&pf->hw, ret),
7631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7632
7633 return ret;
7634 }
7635
7636 /**
7637 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7638 * @vsi: VSI structure
7639 **/
7640 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7641 {
7642 u8 seed[I40E_HKEY_ARRAY_SIZE];
7643 struct i40e_pf *pf = vsi->back;
7644
7645 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7646 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7647
7648 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7649 return i40e_config_rss_aq(vsi, seed);
7650
7651 return 0;
7652 }
7653
7654 /**
7655 * i40e_config_rss_reg - Prepare for RSS if used
7656 * @pf: board private structure
7657 * @seed: RSS hash seed
7658 **/
7659 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7660 {
7661 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7662 struct i40e_hw *hw = &pf->hw;
7663 u32 *seed_dw = (u32 *)seed;
7664 u32 current_queue = 0;
7665 u32 lut = 0;
7666 int i, j;
7667
7668 /* Fill out hash function seed */
7669 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7670 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7671
7672 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7673 lut = 0;
7674 for (j = 0; j < 4; j++) {
7675 if (current_queue == vsi->rss_size)
7676 current_queue = 0;
7677 lut |= ((current_queue) << (8 * j));
7678 current_queue++;
7679 }
7680 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7681 }
7682 i40e_flush(hw);
7683
7684 return 0;
7685 }
7686
7687 /**
7688 * i40e_config_rss - Prepare for RSS if used
7689 * @pf: board private structure
7690 **/
7691 static int i40e_config_rss(struct i40e_pf *pf)
7692 {
7693 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7694 u8 seed[I40E_HKEY_ARRAY_SIZE];
7695 struct i40e_hw *hw = &pf->hw;
7696 u32 reg_val;
7697 u64 hena;
7698
7699 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7700
7701 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7702 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7703 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7704 hena |= i40e_pf_get_default_rss_hena(pf);
7705
7706 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7707 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7708
7709 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7710
7711 /* Determine the RSS table size based on the hardware capabilities */
7712 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7713 reg_val = (pf->rss_table_size == 512) ?
7714 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7715 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7716 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7717
7718 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7719 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7720 else
7721 return i40e_config_rss_reg(pf, seed);
7722 }
7723
7724 /**
7725 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7726 * @pf: board private structure
7727 * @queue_count: the requested queue count for rss.
7728 *
7729 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7730 * count which may be different from the requested queue count.
7731 **/
7732 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7733 {
7734 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7735 int new_rss_size;
7736
7737 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7738 return 0;
7739
7740 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7741
7742 if (queue_count != vsi->num_queue_pairs) {
7743 vsi->req_queue_pairs = queue_count;
7744 i40e_prep_for_reset(pf);
7745
7746 pf->rss_size = new_rss_size;
7747
7748 i40e_reset_and_rebuild(pf, true);
7749 i40e_config_rss(pf);
7750 }
7751 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7752 return pf->rss_size;
7753 }
7754
7755 /**
7756 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7757 * @pf: board private structure
7758 **/
7759 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7760 {
7761 i40e_status status;
7762 bool min_valid, max_valid;
7763 u32 max_bw, min_bw;
7764
7765 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7766 &min_valid, &max_valid);
7767
7768 if (!status) {
7769 if (min_valid)
7770 pf->npar_min_bw = min_bw;
7771 if (max_valid)
7772 pf->npar_max_bw = max_bw;
7773 }
7774
7775 return status;
7776 }
7777
7778 /**
7779 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7780 * @pf: board private structure
7781 **/
7782 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7783 {
7784 struct i40e_aqc_configure_partition_bw_data bw_data;
7785 i40e_status status;
7786
7787 /* Set the valid bit for this PF */
7788 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7789 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7790 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7791
7792 /* Set the new bandwidths */
7793 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7794
7795 return status;
7796 }
7797
7798 /**
7799 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7800 * @pf: board private structure
7801 **/
7802 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7803 {
7804 /* Commit temporary BW setting to permanent NVM image */
7805 enum i40e_admin_queue_err last_aq_status;
7806 i40e_status ret;
7807 u16 nvm_word;
7808
7809 if (pf->hw.partition_id != 1) {
7810 dev_info(&pf->pdev->dev,
7811 "Commit BW only works on partition 1! This is partition %d",
7812 pf->hw.partition_id);
7813 ret = I40E_NOT_SUPPORTED;
7814 goto bw_commit_out;
7815 }
7816
7817 /* Acquire NVM for read access */
7818 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7819 last_aq_status = pf->hw.aq.asq_last_status;
7820 if (ret) {
7821 dev_info(&pf->pdev->dev,
7822 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7823 i40e_stat_str(&pf->hw, ret),
7824 i40e_aq_str(&pf->hw, last_aq_status));
7825 goto bw_commit_out;
7826 }
7827
7828 /* Read word 0x10 of NVM - SW compatibility word 1 */
7829 ret = i40e_aq_read_nvm(&pf->hw,
7830 I40E_SR_NVM_CONTROL_WORD,
7831 0x10, sizeof(nvm_word), &nvm_word,
7832 false, NULL);
7833 /* Save off last admin queue command status before releasing
7834 * the NVM
7835 */
7836 last_aq_status = pf->hw.aq.asq_last_status;
7837 i40e_release_nvm(&pf->hw);
7838 if (ret) {
7839 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7840 i40e_stat_str(&pf->hw, ret),
7841 i40e_aq_str(&pf->hw, last_aq_status));
7842 goto bw_commit_out;
7843 }
7844
7845 /* Wait a bit for NVM release to complete */
7846 msleep(50);
7847
7848 /* Acquire NVM for write access */
7849 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7850 last_aq_status = pf->hw.aq.asq_last_status;
7851 if (ret) {
7852 dev_info(&pf->pdev->dev,
7853 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7854 i40e_stat_str(&pf->hw, ret),
7855 i40e_aq_str(&pf->hw, last_aq_status));
7856 goto bw_commit_out;
7857 }
7858 /* Write it back out unchanged to initiate update NVM,
7859 * which will force a write of the shadow (alt) RAM to
7860 * the NVM - thus storing the bandwidth values permanently.
7861 */
7862 ret = i40e_aq_update_nvm(&pf->hw,
7863 I40E_SR_NVM_CONTROL_WORD,
7864 0x10, sizeof(nvm_word),
7865 &nvm_word, true, NULL);
7866 /* Save off last admin queue command status before releasing
7867 * the NVM
7868 */
7869 last_aq_status = pf->hw.aq.asq_last_status;
7870 i40e_release_nvm(&pf->hw);
7871 if (ret)
7872 dev_info(&pf->pdev->dev,
7873 "BW settings NOT SAVED, err %s aq_err %s\n",
7874 i40e_stat_str(&pf->hw, ret),
7875 i40e_aq_str(&pf->hw, last_aq_status));
7876 bw_commit_out:
7877
7878 return ret;
7879 }
7880
7881 /**
7882 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7883 * @pf: board private structure to initialize
7884 *
7885 * i40e_sw_init initializes the Adapter private data structure.
7886 * Fields are initialized based on PCI device information and
7887 * OS network device settings (MTU size).
7888 **/
7889 static int i40e_sw_init(struct i40e_pf *pf)
7890 {
7891 int err = 0;
7892 int size;
7893
7894 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7895 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7896 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7897 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7898 if (I40E_DEBUG_USER & debug)
7899 pf->hw.debug_mask = debug;
7900 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7901 I40E_DEFAULT_MSG_ENABLE);
7902 }
7903
7904 /* Set default capability flags */
7905 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7906 I40E_FLAG_MSI_ENABLED |
7907 I40E_FLAG_MSIX_ENABLED;
7908
7909 if (iommu_present(&pci_bus_type))
7910 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7911 else
7912 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7913
7914 /* Set default ITR */
7915 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7916 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7917
7918 /* Depending on PF configurations, it is possible that the RSS
7919 * maximum might end up larger than the available queues
7920 */
7921 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7922 pf->rss_size = 1;
7923 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7924 pf->rss_size_max = min_t(int, pf->rss_size_max,
7925 pf->hw.func_caps.num_tx_qp);
7926 if (pf->hw.func_caps.rss) {
7927 pf->flags |= I40E_FLAG_RSS_ENABLED;
7928 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7929 }
7930
7931 /* MFP mode enabled */
7932 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7933 pf->flags |= I40E_FLAG_MFP_ENABLED;
7934 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7935 if (i40e_get_npar_bw_setting(pf))
7936 dev_warn(&pf->pdev->dev,
7937 "Could not get NPAR bw settings\n");
7938 else
7939 dev_info(&pf->pdev->dev,
7940 "Min BW = %8.8x, Max BW = %8.8x\n",
7941 pf->npar_min_bw, pf->npar_max_bw);
7942 }
7943
7944 /* FW/NVM is not yet fixed in this regard */
7945 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7946 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7947 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7948 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7949 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7950 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7951 } else {
7952 dev_info(&pf->pdev->dev,
7953 "Flow Director Sideband mode Disabled in MFP mode\n");
7954 }
7955 pf->fdir_pf_filter_count =
7956 pf->hw.func_caps.fd_filters_guaranteed;
7957 pf->hw.fdir_shared_filter_count =
7958 pf->hw.func_caps.fd_filters_best_effort;
7959 }
7960
7961 if (pf->hw.func_caps.vmdq) {
7962 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7963 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7964 }
7965
7966 #ifdef I40E_FCOE
7967 err = i40e_init_pf_fcoe(pf);
7968 if (err)
7969 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7970
7971 #endif /* I40E_FCOE */
7972 #ifdef CONFIG_PCI_IOV
7973 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7974 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7975 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7976 pf->num_req_vfs = min_t(int,
7977 pf->hw.func_caps.num_vfs,
7978 I40E_MAX_VF_COUNT);
7979 }
7980 #endif /* CONFIG_PCI_IOV */
7981 if (pf->hw.mac.type == I40E_MAC_X722) {
7982 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7983 I40E_FLAG_128_QP_RSS_CAPABLE |
7984 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7985 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7986 I40E_FLAG_WB_ON_ITR_CAPABLE |
7987 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7988 }
7989 pf->eeprom_version = 0xDEAD;
7990 pf->lan_veb = I40E_NO_VEB;
7991 pf->lan_vsi = I40E_NO_VSI;
7992
7993 /* set up queue assignment tracking */
7994 size = sizeof(struct i40e_lump_tracking)
7995 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7996 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7997 if (!pf->qp_pile) {
7998 err = -ENOMEM;
7999 goto sw_init_done;
8000 }
8001 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8002 pf->qp_pile->search_hint = 0;
8003
8004 pf->tx_timeout_recovery_level = 1;
8005
8006 mutex_init(&pf->switch_mutex);
8007
8008 /* If NPAR is enabled nudge the Tx scheduler */
8009 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8010 i40e_set_npar_bw_setting(pf);
8011
8012 sw_init_done:
8013 return err;
8014 }
8015
8016 /**
8017 * i40e_set_ntuple - set the ntuple feature flag and take action
8018 * @pf: board private structure to initialize
8019 * @features: the feature set that the stack is suggesting
8020 *
8021 * returns a bool to indicate if reset needs to happen
8022 **/
8023 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8024 {
8025 bool need_reset = false;
8026
8027 /* Check if Flow Director n-tuple support was enabled or disabled. If
8028 * the state changed, we need to reset.
8029 */
8030 if (features & NETIF_F_NTUPLE) {
8031 /* Enable filters and mark for reset */
8032 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8033 need_reset = true;
8034 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8035 } else {
8036 /* turn off filters, mark for reset and clear SW filter list */
8037 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8038 need_reset = true;
8039 i40e_fdir_filter_exit(pf);
8040 }
8041 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8042 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8043 /* reset fd counters */
8044 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8045 pf->fdir_pf_active_filters = 0;
8046 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8047 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8048 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8049 /* if ATR was auto disabled it can be re-enabled. */
8050 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8051 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8052 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8053 }
8054 return need_reset;
8055 }
8056
8057 /**
8058 * i40e_set_features - set the netdev feature flags
8059 * @netdev: ptr to the netdev being adjusted
8060 * @features: the feature set that the stack is suggesting
8061 **/
8062 static int i40e_set_features(struct net_device *netdev,
8063 netdev_features_t features)
8064 {
8065 struct i40e_netdev_priv *np = netdev_priv(netdev);
8066 struct i40e_vsi *vsi = np->vsi;
8067 struct i40e_pf *pf = vsi->back;
8068 bool need_reset;
8069
8070 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8071 i40e_vlan_stripping_enable(vsi);
8072 else
8073 i40e_vlan_stripping_disable(vsi);
8074
8075 need_reset = i40e_set_ntuple(pf, features);
8076
8077 if (need_reset)
8078 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8079
8080 return 0;
8081 }
8082
8083 #ifdef CONFIG_I40E_VXLAN
8084 /**
8085 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8086 * @pf: board private structure
8087 * @port: The UDP port to look up
8088 *
8089 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8090 **/
8091 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8092 {
8093 u8 i;
8094
8095 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8096 if (pf->vxlan_ports[i] == port)
8097 return i;
8098 }
8099
8100 return i;
8101 }
8102
8103 /**
8104 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8105 * @netdev: This physical port's netdev
8106 * @sa_family: Socket Family that VXLAN is notifying us about
8107 * @port: New UDP port number that VXLAN started listening to
8108 **/
8109 static void i40e_add_vxlan_port(struct net_device *netdev,
8110 sa_family_t sa_family, __be16 port)
8111 {
8112 struct i40e_netdev_priv *np = netdev_priv(netdev);
8113 struct i40e_vsi *vsi = np->vsi;
8114 struct i40e_pf *pf = vsi->back;
8115 u8 next_idx;
8116 u8 idx;
8117
8118 if (sa_family == AF_INET6)
8119 return;
8120
8121 idx = i40e_get_vxlan_port_idx(pf, port);
8122
8123 /* Check if port already exists */
8124 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8125 netdev_info(netdev, "vxlan port %d already offloaded\n",
8126 ntohs(port));
8127 return;
8128 }
8129
8130 /* Now check if there is space to add the new port */
8131 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8132
8133 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8134 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8135 ntohs(port));
8136 return;
8137 }
8138
8139 /* New port: add it and mark its index in the bitmap */
8140 pf->vxlan_ports[next_idx] = port;
8141 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8142 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8143 }
8144
8145 /**
8146 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8147 * @netdev: This physical port's netdev
8148 * @sa_family: Socket Family that VXLAN is notifying us about
8149 * @port: UDP port number that VXLAN stopped listening to
8150 **/
8151 static void i40e_del_vxlan_port(struct net_device *netdev,
8152 sa_family_t sa_family, __be16 port)
8153 {
8154 struct i40e_netdev_priv *np = netdev_priv(netdev);
8155 struct i40e_vsi *vsi = np->vsi;
8156 struct i40e_pf *pf = vsi->back;
8157 u8 idx;
8158
8159 if (sa_family == AF_INET6)
8160 return;
8161
8162 idx = i40e_get_vxlan_port_idx(pf, port);
8163
8164 /* Check if port already exists */
8165 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8166 /* if port exists, set it to 0 (mark for deletion)
8167 * and make it pending
8168 */
8169 pf->vxlan_ports[idx] = 0;
8170 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8171 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8172
8173 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
8174 ntohs(port));
8175 } else {
8176 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8177 ntohs(port));
8178 }
8179 }
8180
8181 #endif
8182 static int i40e_get_phys_port_id(struct net_device *netdev,
8183 struct netdev_phys_item_id *ppid)
8184 {
8185 struct i40e_netdev_priv *np = netdev_priv(netdev);
8186 struct i40e_pf *pf = np->vsi->back;
8187 struct i40e_hw *hw = &pf->hw;
8188
8189 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8190 return -EOPNOTSUPP;
8191
8192 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8193 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8194
8195 return 0;
8196 }
8197
8198 /**
8199 * i40e_ndo_fdb_add - add an entry to the hardware database
8200 * @ndm: the input from the stack
8201 * @tb: pointer to array of nladdr (unused)
8202 * @dev: the net device pointer
8203 * @addr: the MAC address entry being added
8204 * @flags: instructions from stack about fdb operation
8205 */
8206 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8207 struct net_device *dev,
8208 const unsigned char *addr, u16 vid,
8209 u16 flags)
8210 {
8211 struct i40e_netdev_priv *np = netdev_priv(dev);
8212 struct i40e_pf *pf = np->vsi->back;
8213 int err = 0;
8214
8215 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8216 return -EOPNOTSUPP;
8217
8218 if (vid) {
8219 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8220 return -EINVAL;
8221 }
8222
8223 /* Hardware does not support aging addresses so if a
8224 * ndm_state is given only allow permanent addresses
8225 */
8226 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8227 netdev_info(dev, "FDB only supports static addresses\n");
8228 return -EINVAL;
8229 }
8230
8231 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8232 err = dev_uc_add_excl(dev, addr);
8233 else if (is_multicast_ether_addr(addr))
8234 err = dev_mc_add_excl(dev, addr);
8235 else
8236 err = -EINVAL;
8237
8238 /* Only return duplicate errors if NLM_F_EXCL is set */
8239 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8240 err = 0;
8241
8242 return err;
8243 }
8244
8245 /**
8246 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8247 * @dev: the netdev being configured
8248 * @nlh: RTNL message
8249 *
8250 * Inserts a new hardware bridge if not already created and
8251 * enables the bridging mode requested (VEB or VEPA). If the
8252 * hardware bridge has already been inserted and the request
8253 * is to change the mode then that requires a PF reset to
8254 * allow rebuild of the components with required hardware
8255 * bridge mode enabled.
8256 **/
8257 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8258 struct nlmsghdr *nlh,
8259 u16 flags)
8260 {
8261 struct i40e_netdev_priv *np = netdev_priv(dev);
8262 struct i40e_vsi *vsi = np->vsi;
8263 struct i40e_pf *pf = vsi->back;
8264 struct i40e_veb *veb = NULL;
8265 struct nlattr *attr, *br_spec;
8266 int i, rem;
8267
8268 /* Only for PF VSI for now */
8269 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8270 return -EOPNOTSUPP;
8271
8272 /* Find the HW bridge for PF VSI */
8273 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8274 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8275 veb = pf->veb[i];
8276 }
8277
8278 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8279
8280 nla_for_each_nested(attr, br_spec, rem) {
8281 __u16 mode;
8282
8283 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8284 continue;
8285
8286 mode = nla_get_u16(attr);
8287 if ((mode != BRIDGE_MODE_VEPA) &&
8288 (mode != BRIDGE_MODE_VEB))
8289 return -EINVAL;
8290
8291 /* Insert a new HW bridge */
8292 if (!veb) {
8293 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8294 vsi->tc_config.enabled_tc);
8295 if (veb) {
8296 veb->bridge_mode = mode;
8297 i40e_config_bridge_mode(veb);
8298 } else {
8299 /* No Bridge HW offload available */
8300 return -ENOENT;
8301 }
8302 break;
8303 } else if (mode != veb->bridge_mode) {
8304 /* Existing HW bridge but different mode needs reset */
8305 veb->bridge_mode = mode;
8306 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8307 if (mode == BRIDGE_MODE_VEB)
8308 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8309 else
8310 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8311 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8312 break;
8313 }
8314 }
8315
8316 return 0;
8317 }
8318
8319 /**
8320 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8321 * @skb: skb buff
8322 * @pid: process id
8323 * @seq: RTNL message seq #
8324 * @dev: the netdev being configured
8325 * @filter_mask: unused
8326 *
8327 * Return the mode in which the hardware bridge is operating in
8328 * i.e VEB or VEPA.
8329 **/
8330 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8331 struct net_device *dev,
8332 u32 filter_mask, int nlflags)
8333 {
8334 struct i40e_netdev_priv *np = netdev_priv(dev);
8335 struct i40e_vsi *vsi = np->vsi;
8336 struct i40e_pf *pf = vsi->back;
8337 struct i40e_veb *veb = NULL;
8338 int i;
8339
8340 /* Only for PF VSI for now */
8341 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8342 return -EOPNOTSUPP;
8343
8344 /* Find the HW bridge for the PF VSI */
8345 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8346 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8347 veb = pf->veb[i];
8348 }
8349
8350 if (!veb)
8351 return 0;
8352
8353 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8354 nlflags, 0, 0, filter_mask, NULL);
8355 }
8356
8357 #define I40E_MAX_TUNNEL_HDR_LEN 80
8358 /**
8359 * i40e_features_check - Validate encapsulated packet conforms to limits
8360 * @skb: skb buff
8361 * @netdev: This physical port's netdev
8362 * @features: Offload features that the stack believes apply
8363 **/
8364 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8365 struct net_device *dev,
8366 netdev_features_t features)
8367 {
8368 if (skb->encapsulation &&
8369 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8370 I40E_MAX_TUNNEL_HDR_LEN))
8371 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8372
8373 return features;
8374 }
8375
8376 static const struct net_device_ops i40e_netdev_ops = {
8377 .ndo_open = i40e_open,
8378 .ndo_stop = i40e_close,
8379 .ndo_start_xmit = i40e_lan_xmit_frame,
8380 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8381 .ndo_set_rx_mode = i40e_set_rx_mode,
8382 .ndo_validate_addr = eth_validate_addr,
8383 .ndo_set_mac_address = i40e_set_mac,
8384 .ndo_change_mtu = i40e_change_mtu,
8385 .ndo_do_ioctl = i40e_ioctl,
8386 .ndo_tx_timeout = i40e_tx_timeout,
8387 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8388 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8389 #ifdef CONFIG_NET_POLL_CONTROLLER
8390 .ndo_poll_controller = i40e_netpoll,
8391 #endif
8392 .ndo_setup_tc = i40e_setup_tc,
8393 #ifdef I40E_FCOE
8394 .ndo_fcoe_enable = i40e_fcoe_enable,
8395 .ndo_fcoe_disable = i40e_fcoe_disable,
8396 #endif
8397 .ndo_set_features = i40e_set_features,
8398 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8399 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8400 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8401 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8402 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8403 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8404 #ifdef CONFIG_I40E_VXLAN
8405 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8406 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8407 #endif
8408 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8409 .ndo_fdb_add = i40e_ndo_fdb_add,
8410 .ndo_features_check = i40e_features_check,
8411 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8412 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8413 };
8414
8415 /**
8416 * i40e_config_netdev - Setup the netdev flags
8417 * @vsi: the VSI being configured
8418 *
8419 * Returns 0 on success, negative value on failure
8420 **/
8421 static int i40e_config_netdev(struct i40e_vsi *vsi)
8422 {
8423 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8424 struct i40e_pf *pf = vsi->back;
8425 struct i40e_hw *hw = &pf->hw;
8426 struct i40e_netdev_priv *np;
8427 struct net_device *netdev;
8428 u8 mac_addr[ETH_ALEN];
8429 int etherdev_size;
8430
8431 etherdev_size = sizeof(struct i40e_netdev_priv);
8432 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8433 if (!netdev)
8434 return -ENOMEM;
8435
8436 vsi->netdev = netdev;
8437 np = netdev_priv(netdev);
8438 np->vsi = vsi;
8439
8440 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8441 NETIF_F_GSO_UDP_TUNNEL |
8442 NETIF_F_TSO;
8443
8444 netdev->features = NETIF_F_SG |
8445 NETIF_F_IP_CSUM |
8446 NETIF_F_SCTP_CSUM |
8447 NETIF_F_HIGHDMA |
8448 NETIF_F_GSO_UDP_TUNNEL |
8449 NETIF_F_HW_VLAN_CTAG_TX |
8450 NETIF_F_HW_VLAN_CTAG_RX |
8451 NETIF_F_HW_VLAN_CTAG_FILTER |
8452 NETIF_F_IPV6_CSUM |
8453 NETIF_F_TSO |
8454 NETIF_F_TSO_ECN |
8455 NETIF_F_TSO6 |
8456 NETIF_F_RXCSUM |
8457 NETIF_F_RXHASH |
8458 0;
8459
8460 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8461 netdev->features |= NETIF_F_NTUPLE;
8462
8463 /* copy netdev features into list of user selectable features */
8464 netdev->hw_features |= netdev->features;
8465
8466 if (vsi->type == I40E_VSI_MAIN) {
8467 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8468 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8469 /* The following steps are necessary to prevent reception
8470 * of tagged packets - some older NVM configurations load a
8471 * default a MAC-VLAN filter that accepts any tagged packet
8472 * which must be replaced by a normal filter.
8473 */
8474 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8475 i40e_add_filter(vsi, mac_addr,
8476 I40E_VLAN_ANY, false, true);
8477 } else {
8478 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8479 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8480 pf->vsi[pf->lan_vsi]->netdev->name);
8481 random_ether_addr(mac_addr);
8482 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8483 }
8484 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8485
8486 ether_addr_copy(netdev->dev_addr, mac_addr);
8487 ether_addr_copy(netdev->perm_addr, mac_addr);
8488 /* vlan gets same features (except vlan offload)
8489 * after any tweaks for specific VSI types
8490 */
8491 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8492 NETIF_F_HW_VLAN_CTAG_RX |
8493 NETIF_F_HW_VLAN_CTAG_FILTER);
8494 netdev->priv_flags |= IFF_UNICAST_FLT;
8495 netdev->priv_flags |= IFF_SUPP_NOFCS;
8496 /* Setup netdev TC information */
8497 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8498
8499 netdev->netdev_ops = &i40e_netdev_ops;
8500 netdev->watchdog_timeo = 5 * HZ;
8501 i40e_set_ethtool_ops(netdev);
8502 #ifdef I40E_FCOE
8503 i40e_fcoe_config_netdev(netdev, vsi);
8504 #endif
8505
8506 return 0;
8507 }
8508
8509 /**
8510 * i40e_vsi_delete - Delete a VSI from the switch
8511 * @vsi: the VSI being removed
8512 *
8513 * Returns 0 on success, negative value on failure
8514 **/
8515 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8516 {
8517 /* remove default VSI is not allowed */
8518 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8519 return;
8520
8521 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8522 }
8523
8524 /**
8525 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8526 * @vsi: the VSI being queried
8527 *
8528 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8529 **/
8530 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8531 {
8532 struct i40e_veb *veb;
8533 struct i40e_pf *pf = vsi->back;
8534
8535 /* Uplink is not a bridge so default to VEB */
8536 if (vsi->veb_idx == I40E_NO_VEB)
8537 return 1;
8538
8539 veb = pf->veb[vsi->veb_idx];
8540 /* Uplink is a bridge in VEPA mode */
8541 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8542 return 0;
8543
8544 /* Uplink is a bridge in VEB mode */
8545 return 1;
8546 }
8547
8548 /**
8549 * i40e_add_vsi - Add a VSI to the switch
8550 * @vsi: the VSI being configured
8551 *
8552 * This initializes a VSI context depending on the VSI type to be added and
8553 * passes it down to the add_vsi aq command.
8554 **/
8555 static int i40e_add_vsi(struct i40e_vsi *vsi)
8556 {
8557 int ret = -ENODEV;
8558 struct i40e_mac_filter *f, *ftmp;
8559 struct i40e_pf *pf = vsi->back;
8560 struct i40e_hw *hw = &pf->hw;
8561 struct i40e_vsi_context ctxt;
8562 u8 enabled_tc = 0x1; /* TC0 enabled */
8563 int f_count = 0;
8564
8565 memset(&ctxt, 0, sizeof(ctxt));
8566 switch (vsi->type) {
8567 case I40E_VSI_MAIN:
8568 /* The PF's main VSI is already setup as part of the
8569 * device initialization, so we'll not bother with
8570 * the add_vsi call, but we will retrieve the current
8571 * VSI context.
8572 */
8573 ctxt.seid = pf->main_vsi_seid;
8574 ctxt.pf_num = pf->hw.pf_id;
8575 ctxt.vf_num = 0;
8576 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8577 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8578 if (ret) {
8579 dev_info(&pf->pdev->dev,
8580 "couldn't get PF vsi config, err %s aq_err %s\n",
8581 i40e_stat_str(&pf->hw, ret),
8582 i40e_aq_str(&pf->hw,
8583 pf->hw.aq.asq_last_status));
8584 return -ENOENT;
8585 }
8586 vsi->info = ctxt.info;
8587 vsi->info.valid_sections = 0;
8588
8589 vsi->seid = ctxt.seid;
8590 vsi->id = ctxt.vsi_number;
8591
8592 enabled_tc = i40e_pf_get_tc_map(pf);
8593
8594 /* MFP mode setup queue map and update VSI */
8595 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8596 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8597 memset(&ctxt, 0, sizeof(ctxt));
8598 ctxt.seid = pf->main_vsi_seid;
8599 ctxt.pf_num = pf->hw.pf_id;
8600 ctxt.vf_num = 0;
8601 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8602 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8603 if (ret) {
8604 dev_info(&pf->pdev->dev,
8605 "update vsi failed, err %s aq_err %s\n",
8606 i40e_stat_str(&pf->hw, ret),
8607 i40e_aq_str(&pf->hw,
8608 pf->hw.aq.asq_last_status));
8609 ret = -ENOENT;
8610 goto err;
8611 }
8612 /* update the local VSI info queue map */
8613 i40e_vsi_update_queue_map(vsi, &ctxt);
8614 vsi->info.valid_sections = 0;
8615 } else {
8616 /* Default/Main VSI is only enabled for TC0
8617 * reconfigure it to enable all TCs that are
8618 * available on the port in SFP mode.
8619 * For MFP case the iSCSI PF would use this
8620 * flow to enable LAN+iSCSI TC.
8621 */
8622 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8623 if (ret) {
8624 dev_info(&pf->pdev->dev,
8625 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8626 enabled_tc,
8627 i40e_stat_str(&pf->hw, ret),
8628 i40e_aq_str(&pf->hw,
8629 pf->hw.aq.asq_last_status));
8630 ret = -ENOENT;
8631 }
8632 }
8633 break;
8634
8635 case I40E_VSI_FDIR:
8636 ctxt.pf_num = hw->pf_id;
8637 ctxt.vf_num = 0;
8638 ctxt.uplink_seid = vsi->uplink_seid;
8639 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8640 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8641 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8642 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8643 ctxt.info.valid_sections |=
8644 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8645 ctxt.info.switch_id =
8646 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8647 }
8648 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8649 break;
8650
8651 case I40E_VSI_VMDQ2:
8652 ctxt.pf_num = hw->pf_id;
8653 ctxt.vf_num = 0;
8654 ctxt.uplink_seid = vsi->uplink_seid;
8655 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8656 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8657
8658 /* This VSI is connected to VEB so the switch_id
8659 * should be set to zero by default.
8660 */
8661 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8662 ctxt.info.valid_sections |=
8663 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8664 ctxt.info.switch_id =
8665 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8666 }
8667
8668 /* Setup the VSI tx/rx queue map for TC0 only for now */
8669 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8670 break;
8671
8672 case I40E_VSI_SRIOV:
8673 ctxt.pf_num = hw->pf_id;
8674 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8675 ctxt.uplink_seid = vsi->uplink_seid;
8676 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8677 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8678
8679 /* This VSI is connected to VEB so the switch_id
8680 * should be set to zero by default.
8681 */
8682 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8683 ctxt.info.valid_sections |=
8684 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8685 ctxt.info.switch_id =
8686 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8687 }
8688
8689 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8690 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8691 if (pf->vf[vsi->vf_id].spoofchk) {
8692 ctxt.info.valid_sections |=
8693 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8694 ctxt.info.sec_flags |=
8695 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8696 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8697 }
8698 /* Setup the VSI tx/rx queue map for TC0 only for now */
8699 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8700 break;
8701
8702 #ifdef I40E_FCOE
8703 case I40E_VSI_FCOE:
8704 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8705 if (ret) {
8706 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8707 return ret;
8708 }
8709 break;
8710
8711 #endif /* I40E_FCOE */
8712 default:
8713 return -ENODEV;
8714 }
8715
8716 if (vsi->type != I40E_VSI_MAIN) {
8717 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8718 if (ret) {
8719 dev_info(&vsi->back->pdev->dev,
8720 "add vsi failed, err %s aq_err %s\n",
8721 i40e_stat_str(&pf->hw, ret),
8722 i40e_aq_str(&pf->hw,
8723 pf->hw.aq.asq_last_status));
8724 ret = -ENOENT;
8725 goto err;
8726 }
8727 vsi->info = ctxt.info;
8728 vsi->info.valid_sections = 0;
8729 vsi->seid = ctxt.seid;
8730 vsi->id = ctxt.vsi_number;
8731 }
8732
8733 /* If macvlan filters already exist, force them to get loaded */
8734 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8735 f->changed = true;
8736 f_count++;
8737
8738 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8739 struct i40e_aqc_remove_macvlan_element_data element;
8740
8741 memset(&element, 0, sizeof(element));
8742 ether_addr_copy(element.mac_addr, f->macaddr);
8743 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8744 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8745 &element, 1, NULL);
8746 if (ret) {
8747 /* some older FW has a different default */
8748 element.flags |=
8749 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8750 i40e_aq_remove_macvlan(hw, vsi->seid,
8751 &element, 1, NULL);
8752 }
8753
8754 i40e_aq_mac_address_write(hw,
8755 I40E_AQC_WRITE_TYPE_LAA_WOL,
8756 f->macaddr, NULL);
8757 }
8758 }
8759 if (f_count) {
8760 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8761 pf->flags |= I40E_FLAG_FILTER_SYNC;
8762 }
8763
8764 /* Update VSI BW information */
8765 ret = i40e_vsi_get_bw_info(vsi);
8766 if (ret) {
8767 dev_info(&pf->pdev->dev,
8768 "couldn't get vsi bw info, err %s aq_err %s\n",
8769 i40e_stat_str(&pf->hw, ret),
8770 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8771 /* VSI is already added so not tearing that up */
8772 ret = 0;
8773 }
8774
8775 err:
8776 return ret;
8777 }
8778
8779 /**
8780 * i40e_vsi_release - Delete a VSI and free its resources
8781 * @vsi: the VSI being removed
8782 *
8783 * Returns 0 on success or < 0 on error
8784 **/
8785 int i40e_vsi_release(struct i40e_vsi *vsi)
8786 {
8787 struct i40e_mac_filter *f, *ftmp;
8788 struct i40e_veb *veb = NULL;
8789 struct i40e_pf *pf;
8790 u16 uplink_seid;
8791 int i, n;
8792
8793 pf = vsi->back;
8794
8795 /* release of a VEB-owner or last VSI is not allowed */
8796 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8797 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8798 vsi->seid, vsi->uplink_seid);
8799 return -ENODEV;
8800 }
8801 if (vsi == pf->vsi[pf->lan_vsi] &&
8802 !test_bit(__I40E_DOWN, &pf->state)) {
8803 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8804 return -ENODEV;
8805 }
8806
8807 uplink_seid = vsi->uplink_seid;
8808 if (vsi->type != I40E_VSI_SRIOV) {
8809 if (vsi->netdev_registered) {
8810 vsi->netdev_registered = false;
8811 if (vsi->netdev) {
8812 /* results in a call to i40e_close() */
8813 unregister_netdev(vsi->netdev);
8814 }
8815 } else {
8816 i40e_vsi_close(vsi);
8817 }
8818 i40e_vsi_disable_irq(vsi);
8819 }
8820
8821 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8822 i40e_del_filter(vsi, f->macaddr, f->vlan,
8823 f->is_vf, f->is_netdev);
8824 i40e_sync_vsi_filters(vsi);
8825
8826 i40e_vsi_delete(vsi);
8827 i40e_vsi_free_q_vectors(vsi);
8828 if (vsi->netdev) {
8829 free_netdev(vsi->netdev);
8830 vsi->netdev = NULL;
8831 }
8832 i40e_vsi_clear_rings(vsi);
8833 i40e_vsi_clear(vsi);
8834
8835 /* If this was the last thing on the VEB, except for the
8836 * controlling VSI, remove the VEB, which puts the controlling
8837 * VSI onto the next level down in the switch.
8838 *
8839 * Well, okay, there's one more exception here: don't remove
8840 * the orphan VEBs yet. We'll wait for an explicit remove request
8841 * from up the network stack.
8842 */
8843 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8844 if (pf->vsi[i] &&
8845 pf->vsi[i]->uplink_seid == uplink_seid &&
8846 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8847 n++; /* count the VSIs */
8848 }
8849 }
8850 for (i = 0; i < I40E_MAX_VEB; i++) {
8851 if (!pf->veb[i])
8852 continue;
8853 if (pf->veb[i]->uplink_seid == uplink_seid)
8854 n++; /* count the VEBs */
8855 if (pf->veb[i]->seid == uplink_seid)
8856 veb = pf->veb[i];
8857 }
8858 if (n == 0 && veb && veb->uplink_seid != 0)
8859 i40e_veb_release(veb);
8860
8861 return 0;
8862 }
8863
8864 /**
8865 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8866 * @vsi: ptr to the VSI
8867 *
8868 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8869 * corresponding SW VSI structure and initializes num_queue_pairs for the
8870 * newly allocated VSI.
8871 *
8872 * Returns 0 on success or negative on failure
8873 **/
8874 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8875 {
8876 int ret = -ENOENT;
8877 struct i40e_pf *pf = vsi->back;
8878
8879 if (vsi->q_vectors[0]) {
8880 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8881 vsi->seid);
8882 return -EEXIST;
8883 }
8884
8885 if (vsi->base_vector) {
8886 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8887 vsi->seid, vsi->base_vector);
8888 return -EEXIST;
8889 }
8890
8891 ret = i40e_vsi_alloc_q_vectors(vsi);
8892 if (ret) {
8893 dev_info(&pf->pdev->dev,
8894 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8895 vsi->num_q_vectors, vsi->seid, ret);
8896 vsi->num_q_vectors = 0;
8897 goto vector_setup_out;
8898 }
8899
8900 /* In Legacy mode, we do not have to get any other vector since we
8901 * piggyback on the misc/ICR0 for queue interrupts.
8902 */
8903 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8904 return ret;
8905 if (vsi->num_q_vectors)
8906 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8907 vsi->num_q_vectors, vsi->idx);
8908 if (vsi->base_vector < 0) {
8909 dev_info(&pf->pdev->dev,
8910 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8911 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8912 i40e_vsi_free_q_vectors(vsi);
8913 ret = -ENOENT;
8914 goto vector_setup_out;
8915 }
8916
8917 vector_setup_out:
8918 return ret;
8919 }
8920
8921 /**
8922 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8923 * @vsi: pointer to the vsi.
8924 *
8925 * This re-allocates a vsi's queue resources.
8926 *
8927 * Returns pointer to the successfully allocated and configured VSI sw struct
8928 * on success, otherwise returns NULL on failure.
8929 **/
8930 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8931 {
8932 struct i40e_pf *pf = vsi->back;
8933 u8 enabled_tc;
8934 int ret;
8935
8936 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8937 i40e_vsi_clear_rings(vsi);
8938
8939 i40e_vsi_free_arrays(vsi, false);
8940 i40e_set_num_rings_in_vsi(vsi);
8941 ret = i40e_vsi_alloc_arrays(vsi, false);
8942 if (ret)
8943 goto err_vsi;
8944
8945 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8946 if (ret < 0) {
8947 dev_info(&pf->pdev->dev,
8948 "failed to get tracking for %d queues for VSI %d err %d\n",
8949 vsi->alloc_queue_pairs, vsi->seid, ret);
8950 goto err_vsi;
8951 }
8952 vsi->base_queue = ret;
8953
8954 /* Update the FW view of the VSI. Force a reset of TC and queue
8955 * layout configurations.
8956 */
8957 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8958 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8959 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8960 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8961
8962 /* assign it some queues */
8963 ret = i40e_alloc_rings(vsi);
8964 if (ret)
8965 goto err_rings;
8966
8967 /* map all of the rings to the q_vectors */
8968 i40e_vsi_map_rings_to_vectors(vsi);
8969 return vsi;
8970
8971 err_rings:
8972 i40e_vsi_free_q_vectors(vsi);
8973 if (vsi->netdev_registered) {
8974 vsi->netdev_registered = false;
8975 unregister_netdev(vsi->netdev);
8976 free_netdev(vsi->netdev);
8977 vsi->netdev = NULL;
8978 }
8979 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8980 err_vsi:
8981 i40e_vsi_clear(vsi);
8982 return NULL;
8983 }
8984
8985 /**
8986 * i40e_vsi_setup - Set up a VSI by a given type
8987 * @pf: board private structure
8988 * @type: VSI type
8989 * @uplink_seid: the switch element to link to
8990 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8991 *
8992 * This allocates the sw VSI structure and its queue resources, then add a VSI
8993 * to the identified VEB.
8994 *
8995 * Returns pointer to the successfully allocated and configure VSI sw struct on
8996 * success, otherwise returns NULL on failure.
8997 **/
8998 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8999 u16 uplink_seid, u32 param1)
9000 {
9001 struct i40e_vsi *vsi = NULL;
9002 struct i40e_veb *veb = NULL;
9003 int ret, i;
9004 int v_idx;
9005
9006 /* The requested uplink_seid must be either
9007 * - the PF's port seid
9008 * no VEB is needed because this is the PF
9009 * or this is a Flow Director special case VSI
9010 * - seid of an existing VEB
9011 * - seid of a VSI that owns an existing VEB
9012 * - seid of a VSI that doesn't own a VEB
9013 * a new VEB is created and the VSI becomes the owner
9014 * - seid of the PF VSI, which is what creates the first VEB
9015 * this is a special case of the previous
9016 *
9017 * Find which uplink_seid we were given and create a new VEB if needed
9018 */
9019 for (i = 0; i < I40E_MAX_VEB; i++) {
9020 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9021 veb = pf->veb[i];
9022 break;
9023 }
9024 }
9025
9026 if (!veb && uplink_seid != pf->mac_seid) {
9027
9028 for (i = 0; i < pf->num_alloc_vsi; i++) {
9029 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9030 vsi = pf->vsi[i];
9031 break;
9032 }
9033 }
9034 if (!vsi) {
9035 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9036 uplink_seid);
9037 return NULL;
9038 }
9039
9040 if (vsi->uplink_seid == pf->mac_seid)
9041 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9042 vsi->tc_config.enabled_tc);
9043 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9044 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9045 vsi->tc_config.enabled_tc);
9046 if (veb) {
9047 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9048 dev_info(&vsi->back->pdev->dev,
9049 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
9050 __func__);
9051 return NULL;
9052 }
9053 /* We come up by default in VEPA mode if SRIOV is not
9054 * already enabled, in which case we can't force VEPA
9055 * mode.
9056 */
9057 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9058 veb->bridge_mode = BRIDGE_MODE_VEPA;
9059 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9060 }
9061 i40e_config_bridge_mode(veb);
9062 }
9063 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9064 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9065 veb = pf->veb[i];
9066 }
9067 if (!veb) {
9068 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9069 return NULL;
9070 }
9071
9072 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9073 uplink_seid = veb->seid;
9074 }
9075
9076 /* get vsi sw struct */
9077 v_idx = i40e_vsi_mem_alloc(pf, type);
9078 if (v_idx < 0)
9079 goto err_alloc;
9080 vsi = pf->vsi[v_idx];
9081 if (!vsi)
9082 goto err_alloc;
9083 vsi->type = type;
9084 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9085
9086 if (type == I40E_VSI_MAIN)
9087 pf->lan_vsi = v_idx;
9088 else if (type == I40E_VSI_SRIOV)
9089 vsi->vf_id = param1;
9090 /* assign it some queues */
9091 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9092 vsi->idx);
9093 if (ret < 0) {
9094 dev_info(&pf->pdev->dev,
9095 "failed to get tracking for %d queues for VSI %d err=%d\n",
9096 vsi->alloc_queue_pairs, vsi->seid, ret);
9097 goto err_vsi;
9098 }
9099 vsi->base_queue = ret;
9100
9101 /* get a VSI from the hardware */
9102 vsi->uplink_seid = uplink_seid;
9103 ret = i40e_add_vsi(vsi);
9104 if (ret)
9105 goto err_vsi;
9106
9107 switch (vsi->type) {
9108 /* setup the netdev if needed */
9109 case I40E_VSI_MAIN:
9110 case I40E_VSI_VMDQ2:
9111 case I40E_VSI_FCOE:
9112 ret = i40e_config_netdev(vsi);
9113 if (ret)
9114 goto err_netdev;
9115 ret = register_netdev(vsi->netdev);
9116 if (ret)
9117 goto err_netdev;
9118 vsi->netdev_registered = true;
9119 netif_carrier_off(vsi->netdev);
9120 #ifdef CONFIG_I40E_DCB
9121 /* Setup DCB netlink interface */
9122 i40e_dcbnl_setup(vsi);
9123 #endif /* CONFIG_I40E_DCB */
9124 /* fall through */
9125
9126 case I40E_VSI_FDIR:
9127 /* set up vectors and rings if needed */
9128 ret = i40e_vsi_setup_vectors(vsi);
9129 if (ret)
9130 goto err_msix;
9131
9132 ret = i40e_alloc_rings(vsi);
9133 if (ret)
9134 goto err_rings;
9135
9136 /* map all of the rings to the q_vectors */
9137 i40e_vsi_map_rings_to_vectors(vsi);
9138
9139 i40e_vsi_reset_stats(vsi);
9140 break;
9141
9142 default:
9143 /* no netdev or rings for the other VSI types */
9144 break;
9145 }
9146
9147 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9148 (vsi->type == I40E_VSI_VMDQ2)) {
9149 ret = i40e_vsi_config_rss(vsi);
9150 }
9151 return vsi;
9152
9153 err_rings:
9154 i40e_vsi_free_q_vectors(vsi);
9155 err_msix:
9156 if (vsi->netdev_registered) {
9157 vsi->netdev_registered = false;
9158 unregister_netdev(vsi->netdev);
9159 free_netdev(vsi->netdev);
9160 vsi->netdev = NULL;
9161 }
9162 err_netdev:
9163 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9164 err_vsi:
9165 i40e_vsi_clear(vsi);
9166 err_alloc:
9167 return NULL;
9168 }
9169
9170 /**
9171 * i40e_veb_get_bw_info - Query VEB BW information
9172 * @veb: the veb to query
9173 *
9174 * Query the Tx scheduler BW configuration data for given VEB
9175 **/
9176 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9177 {
9178 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9179 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9180 struct i40e_pf *pf = veb->pf;
9181 struct i40e_hw *hw = &pf->hw;
9182 u32 tc_bw_max;
9183 int ret = 0;
9184 int i;
9185
9186 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9187 &bw_data, NULL);
9188 if (ret) {
9189 dev_info(&pf->pdev->dev,
9190 "query veb bw config failed, err %s aq_err %s\n",
9191 i40e_stat_str(&pf->hw, ret),
9192 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9193 goto out;
9194 }
9195
9196 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9197 &ets_data, NULL);
9198 if (ret) {
9199 dev_info(&pf->pdev->dev,
9200 "query veb bw ets config failed, err %s aq_err %s\n",
9201 i40e_stat_str(&pf->hw, ret),
9202 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9203 goto out;
9204 }
9205
9206 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9207 veb->bw_max_quanta = ets_data.tc_bw_max;
9208 veb->is_abs_credits = bw_data.absolute_credits_enable;
9209 veb->enabled_tc = ets_data.tc_valid_bits;
9210 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9211 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9212 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9213 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9214 veb->bw_tc_limit_credits[i] =
9215 le16_to_cpu(bw_data.tc_bw_limits[i]);
9216 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9217 }
9218
9219 out:
9220 return ret;
9221 }
9222
9223 /**
9224 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9225 * @pf: board private structure
9226 *
9227 * On error: returns error code (negative)
9228 * On success: returns vsi index in PF (positive)
9229 **/
9230 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9231 {
9232 int ret = -ENOENT;
9233 struct i40e_veb *veb;
9234 int i;
9235
9236 /* Need to protect the allocation of switch elements at the PF level */
9237 mutex_lock(&pf->switch_mutex);
9238
9239 /* VEB list may be fragmented if VEB creation/destruction has
9240 * been happening. We can afford to do a quick scan to look
9241 * for any free slots in the list.
9242 *
9243 * find next empty veb slot, looping back around if necessary
9244 */
9245 i = 0;
9246 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9247 i++;
9248 if (i >= I40E_MAX_VEB) {
9249 ret = -ENOMEM;
9250 goto err_alloc_veb; /* out of VEB slots! */
9251 }
9252
9253 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9254 if (!veb) {
9255 ret = -ENOMEM;
9256 goto err_alloc_veb;
9257 }
9258 veb->pf = pf;
9259 veb->idx = i;
9260 veb->enabled_tc = 1;
9261
9262 pf->veb[i] = veb;
9263 ret = i;
9264 err_alloc_veb:
9265 mutex_unlock(&pf->switch_mutex);
9266 return ret;
9267 }
9268
9269 /**
9270 * i40e_switch_branch_release - Delete a branch of the switch tree
9271 * @branch: where to start deleting
9272 *
9273 * This uses recursion to find the tips of the branch to be
9274 * removed, deleting until we get back to and can delete this VEB.
9275 **/
9276 static void i40e_switch_branch_release(struct i40e_veb *branch)
9277 {
9278 struct i40e_pf *pf = branch->pf;
9279 u16 branch_seid = branch->seid;
9280 u16 veb_idx = branch->idx;
9281 int i;
9282
9283 /* release any VEBs on this VEB - RECURSION */
9284 for (i = 0; i < I40E_MAX_VEB; i++) {
9285 if (!pf->veb[i])
9286 continue;
9287 if (pf->veb[i]->uplink_seid == branch->seid)
9288 i40e_switch_branch_release(pf->veb[i]);
9289 }
9290
9291 /* Release the VSIs on this VEB, but not the owner VSI.
9292 *
9293 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9294 * the VEB itself, so don't use (*branch) after this loop.
9295 */
9296 for (i = 0; i < pf->num_alloc_vsi; i++) {
9297 if (!pf->vsi[i])
9298 continue;
9299 if (pf->vsi[i]->uplink_seid == branch_seid &&
9300 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9301 i40e_vsi_release(pf->vsi[i]);
9302 }
9303 }
9304
9305 /* There's one corner case where the VEB might not have been
9306 * removed, so double check it here and remove it if needed.
9307 * This case happens if the veb was created from the debugfs
9308 * commands and no VSIs were added to it.
9309 */
9310 if (pf->veb[veb_idx])
9311 i40e_veb_release(pf->veb[veb_idx]);
9312 }
9313
9314 /**
9315 * i40e_veb_clear - remove veb struct
9316 * @veb: the veb to remove
9317 **/
9318 static void i40e_veb_clear(struct i40e_veb *veb)
9319 {
9320 if (!veb)
9321 return;
9322
9323 if (veb->pf) {
9324 struct i40e_pf *pf = veb->pf;
9325
9326 mutex_lock(&pf->switch_mutex);
9327 if (pf->veb[veb->idx] == veb)
9328 pf->veb[veb->idx] = NULL;
9329 mutex_unlock(&pf->switch_mutex);
9330 }
9331
9332 kfree(veb);
9333 }
9334
9335 /**
9336 * i40e_veb_release - Delete a VEB and free its resources
9337 * @veb: the VEB being removed
9338 **/
9339 void i40e_veb_release(struct i40e_veb *veb)
9340 {
9341 struct i40e_vsi *vsi = NULL;
9342 struct i40e_pf *pf;
9343 int i, n = 0;
9344
9345 pf = veb->pf;
9346
9347 /* find the remaining VSI and check for extras */
9348 for (i = 0; i < pf->num_alloc_vsi; i++) {
9349 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9350 n++;
9351 vsi = pf->vsi[i];
9352 }
9353 }
9354 if (n != 1) {
9355 dev_info(&pf->pdev->dev,
9356 "can't remove VEB %d with %d VSIs left\n",
9357 veb->seid, n);
9358 return;
9359 }
9360
9361 /* move the remaining VSI to uplink veb */
9362 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9363 if (veb->uplink_seid) {
9364 vsi->uplink_seid = veb->uplink_seid;
9365 if (veb->uplink_seid == pf->mac_seid)
9366 vsi->veb_idx = I40E_NO_VEB;
9367 else
9368 vsi->veb_idx = veb->veb_idx;
9369 } else {
9370 /* floating VEB */
9371 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9372 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9373 }
9374
9375 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9376 i40e_veb_clear(veb);
9377 }
9378
9379 /**
9380 * i40e_add_veb - create the VEB in the switch
9381 * @veb: the VEB to be instantiated
9382 * @vsi: the controlling VSI
9383 **/
9384 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9385 {
9386 struct i40e_pf *pf = veb->pf;
9387 bool is_default = veb->pf->cur_promisc;
9388 bool is_cloud = false;
9389 int ret;
9390
9391 /* get a VEB from the hardware */
9392 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9393 veb->enabled_tc, is_default,
9394 is_cloud, &veb->seid, NULL);
9395 if (ret) {
9396 dev_info(&pf->pdev->dev,
9397 "couldn't add VEB, err %s aq_err %s\n",
9398 i40e_stat_str(&pf->hw, ret),
9399 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9400 return -EPERM;
9401 }
9402
9403 /* get statistics counter */
9404 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9405 &veb->stats_idx, NULL, NULL, NULL);
9406 if (ret) {
9407 dev_info(&pf->pdev->dev,
9408 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9409 i40e_stat_str(&pf->hw, ret),
9410 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9411 return -EPERM;
9412 }
9413 ret = i40e_veb_get_bw_info(veb);
9414 if (ret) {
9415 dev_info(&pf->pdev->dev,
9416 "couldn't get VEB bw info, err %s aq_err %s\n",
9417 i40e_stat_str(&pf->hw, ret),
9418 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9419 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9420 return -ENOENT;
9421 }
9422
9423 vsi->uplink_seid = veb->seid;
9424 vsi->veb_idx = veb->idx;
9425 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9426
9427 return 0;
9428 }
9429
9430 /**
9431 * i40e_veb_setup - Set up a VEB
9432 * @pf: board private structure
9433 * @flags: VEB setup flags
9434 * @uplink_seid: the switch element to link to
9435 * @vsi_seid: the initial VSI seid
9436 * @enabled_tc: Enabled TC bit-map
9437 *
9438 * This allocates the sw VEB structure and links it into the switch
9439 * It is possible and legal for this to be a duplicate of an already
9440 * existing VEB. It is also possible for both uplink and vsi seids
9441 * to be zero, in order to create a floating VEB.
9442 *
9443 * Returns pointer to the successfully allocated VEB sw struct on
9444 * success, otherwise returns NULL on failure.
9445 **/
9446 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9447 u16 uplink_seid, u16 vsi_seid,
9448 u8 enabled_tc)
9449 {
9450 struct i40e_veb *veb, *uplink_veb = NULL;
9451 int vsi_idx, veb_idx;
9452 int ret;
9453
9454 /* if one seid is 0, the other must be 0 to create a floating relay */
9455 if ((uplink_seid == 0 || vsi_seid == 0) &&
9456 (uplink_seid + vsi_seid != 0)) {
9457 dev_info(&pf->pdev->dev,
9458 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9459 uplink_seid, vsi_seid);
9460 return NULL;
9461 }
9462
9463 /* make sure there is such a vsi and uplink */
9464 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9465 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9466 break;
9467 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9468 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9469 vsi_seid);
9470 return NULL;
9471 }
9472
9473 if (uplink_seid && uplink_seid != pf->mac_seid) {
9474 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9475 if (pf->veb[veb_idx] &&
9476 pf->veb[veb_idx]->seid == uplink_seid) {
9477 uplink_veb = pf->veb[veb_idx];
9478 break;
9479 }
9480 }
9481 if (!uplink_veb) {
9482 dev_info(&pf->pdev->dev,
9483 "uplink seid %d not found\n", uplink_seid);
9484 return NULL;
9485 }
9486 }
9487
9488 /* get veb sw struct */
9489 veb_idx = i40e_veb_mem_alloc(pf);
9490 if (veb_idx < 0)
9491 goto err_alloc;
9492 veb = pf->veb[veb_idx];
9493 veb->flags = flags;
9494 veb->uplink_seid = uplink_seid;
9495 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9496 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9497
9498 /* create the VEB in the switch */
9499 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9500 if (ret)
9501 goto err_veb;
9502 if (vsi_idx == pf->lan_vsi)
9503 pf->lan_veb = veb->idx;
9504
9505 return veb;
9506
9507 err_veb:
9508 i40e_veb_clear(veb);
9509 err_alloc:
9510 return NULL;
9511 }
9512
9513 /**
9514 * i40e_setup_pf_switch_element - set PF vars based on switch type
9515 * @pf: board private structure
9516 * @ele: element we are building info from
9517 * @num_reported: total number of elements
9518 * @printconfig: should we print the contents
9519 *
9520 * helper function to assist in extracting a few useful SEID values.
9521 **/
9522 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9523 struct i40e_aqc_switch_config_element_resp *ele,
9524 u16 num_reported, bool printconfig)
9525 {
9526 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9527 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9528 u8 element_type = ele->element_type;
9529 u16 seid = le16_to_cpu(ele->seid);
9530
9531 if (printconfig)
9532 dev_info(&pf->pdev->dev,
9533 "type=%d seid=%d uplink=%d downlink=%d\n",
9534 element_type, seid, uplink_seid, downlink_seid);
9535
9536 switch (element_type) {
9537 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9538 pf->mac_seid = seid;
9539 break;
9540 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9541 /* Main VEB? */
9542 if (uplink_seid != pf->mac_seid)
9543 break;
9544 if (pf->lan_veb == I40E_NO_VEB) {
9545 int v;
9546
9547 /* find existing or else empty VEB */
9548 for (v = 0; v < I40E_MAX_VEB; v++) {
9549 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9550 pf->lan_veb = v;
9551 break;
9552 }
9553 }
9554 if (pf->lan_veb == I40E_NO_VEB) {
9555 v = i40e_veb_mem_alloc(pf);
9556 if (v < 0)
9557 break;
9558 pf->lan_veb = v;
9559 }
9560 }
9561
9562 pf->veb[pf->lan_veb]->seid = seid;
9563 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9564 pf->veb[pf->lan_veb]->pf = pf;
9565 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9566 break;
9567 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9568 if (num_reported != 1)
9569 break;
9570 /* This is immediately after a reset so we can assume this is
9571 * the PF's VSI
9572 */
9573 pf->mac_seid = uplink_seid;
9574 pf->pf_seid = downlink_seid;
9575 pf->main_vsi_seid = seid;
9576 if (printconfig)
9577 dev_info(&pf->pdev->dev,
9578 "pf_seid=%d main_vsi_seid=%d\n",
9579 pf->pf_seid, pf->main_vsi_seid);
9580 break;
9581 case I40E_SWITCH_ELEMENT_TYPE_PF:
9582 case I40E_SWITCH_ELEMENT_TYPE_VF:
9583 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9584 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9585 case I40E_SWITCH_ELEMENT_TYPE_PE:
9586 case I40E_SWITCH_ELEMENT_TYPE_PA:
9587 /* ignore these for now */
9588 break;
9589 default:
9590 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9591 element_type, seid);
9592 break;
9593 }
9594 }
9595
9596 /**
9597 * i40e_fetch_switch_configuration - Get switch config from firmware
9598 * @pf: board private structure
9599 * @printconfig: should we print the contents
9600 *
9601 * Get the current switch configuration from the device and
9602 * extract a few useful SEID values.
9603 **/
9604 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9605 {
9606 struct i40e_aqc_get_switch_config_resp *sw_config;
9607 u16 next_seid = 0;
9608 int ret = 0;
9609 u8 *aq_buf;
9610 int i;
9611
9612 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9613 if (!aq_buf)
9614 return -ENOMEM;
9615
9616 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9617 do {
9618 u16 num_reported, num_total;
9619
9620 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9621 I40E_AQ_LARGE_BUF,
9622 &next_seid, NULL);
9623 if (ret) {
9624 dev_info(&pf->pdev->dev,
9625 "get switch config failed err %s aq_err %s\n",
9626 i40e_stat_str(&pf->hw, ret),
9627 i40e_aq_str(&pf->hw,
9628 pf->hw.aq.asq_last_status));
9629 kfree(aq_buf);
9630 return -ENOENT;
9631 }
9632
9633 num_reported = le16_to_cpu(sw_config->header.num_reported);
9634 num_total = le16_to_cpu(sw_config->header.num_total);
9635
9636 if (printconfig)
9637 dev_info(&pf->pdev->dev,
9638 "header: %d reported %d total\n",
9639 num_reported, num_total);
9640
9641 for (i = 0; i < num_reported; i++) {
9642 struct i40e_aqc_switch_config_element_resp *ele =
9643 &sw_config->element[i];
9644
9645 i40e_setup_pf_switch_element(pf, ele, num_reported,
9646 printconfig);
9647 }
9648 } while (next_seid != 0);
9649
9650 kfree(aq_buf);
9651 return ret;
9652 }
9653
9654 /**
9655 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9656 * @pf: board private structure
9657 * @reinit: if the Main VSI needs to re-initialized.
9658 *
9659 * Returns 0 on success, negative value on failure
9660 **/
9661 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9662 {
9663 int ret;
9664
9665 /* find out what's out there already */
9666 ret = i40e_fetch_switch_configuration(pf, false);
9667 if (ret) {
9668 dev_info(&pf->pdev->dev,
9669 "couldn't fetch switch config, err %s aq_err %s\n",
9670 i40e_stat_str(&pf->hw, ret),
9671 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9672 return ret;
9673 }
9674 i40e_pf_reset_stats(pf);
9675
9676 /* first time setup */
9677 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9678 struct i40e_vsi *vsi = NULL;
9679 u16 uplink_seid;
9680
9681 /* Set up the PF VSI associated with the PF's main VSI
9682 * that is already in the HW switch
9683 */
9684 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9685 uplink_seid = pf->veb[pf->lan_veb]->seid;
9686 else
9687 uplink_seid = pf->mac_seid;
9688 if (pf->lan_vsi == I40E_NO_VSI)
9689 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9690 else if (reinit)
9691 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9692 if (!vsi) {
9693 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9694 i40e_fdir_teardown(pf);
9695 return -EAGAIN;
9696 }
9697 } else {
9698 /* force a reset of TC and queue layout configurations */
9699 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9700 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9701 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9702 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9703 }
9704 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9705
9706 i40e_fdir_sb_setup(pf);
9707
9708 /* Setup static PF queue filter control settings */
9709 ret = i40e_setup_pf_filter_control(pf);
9710 if (ret) {
9711 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9712 ret);
9713 /* Failure here should not stop continuing other steps */
9714 }
9715
9716 /* enable RSS in the HW, even for only one queue, as the stack can use
9717 * the hash
9718 */
9719 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9720 i40e_config_rss(pf);
9721
9722 /* fill in link information and enable LSE reporting */
9723 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9724 i40e_link_event(pf);
9725
9726 /* Initialize user-specific link properties */
9727 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9728 I40E_AQ_AN_COMPLETED) ? true : false);
9729
9730 i40e_ptp_init(pf);
9731
9732 return ret;
9733 }
9734
9735 /**
9736 * i40e_determine_queue_usage - Work out queue distribution
9737 * @pf: board private structure
9738 **/
9739 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9740 {
9741 int queues_left;
9742
9743 pf->num_lan_qps = 0;
9744 #ifdef I40E_FCOE
9745 pf->num_fcoe_qps = 0;
9746 #endif
9747
9748 /* Find the max queues to be put into basic use. We'll always be
9749 * using TC0, whether or not DCB is running, and TC0 will get the
9750 * big RSS set.
9751 */
9752 queues_left = pf->hw.func_caps.num_tx_qp;
9753
9754 if ((queues_left == 1) ||
9755 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9756 /* one qp for PF, no queues for anything else */
9757 queues_left = 0;
9758 pf->rss_size = pf->num_lan_qps = 1;
9759
9760 /* make sure all the fancies are disabled */
9761 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9762 #ifdef I40E_FCOE
9763 I40E_FLAG_FCOE_ENABLED |
9764 #endif
9765 I40E_FLAG_FD_SB_ENABLED |
9766 I40E_FLAG_FD_ATR_ENABLED |
9767 I40E_FLAG_DCB_CAPABLE |
9768 I40E_FLAG_SRIOV_ENABLED |
9769 I40E_FLAG_VMDQ_ENABLED);
9770 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9771 I40E_FLAG_FD_SB_ENABLED |
9772 I40E_FLAG_FD_ATR_ENABLED |
9773 I40E_FLAG_DCB_CAPABLE))) {
9774 /* one qp for PF */
9775 pf->rss_size = pf->num_lan_qps = 1;
9776 queues_left -= pf->num_lan_qps;
9777
9778 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9779 #ifdef I40E_FCOE
9780 I40E_FLAG_FCOE_ENABLED |
9781 #endif
9782 I40E_FLAG_FD_SB_ENABLED |
9783 I40E_FLAG_FD_ATR_ENABLED |
9784 I40E_FLAG_DCB_ENABLED |
9785 I40E_FLAG_VMDQ_ENABLED);
9786 } else {
9787 /* Not enough queues for all TCs */
9788 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9789 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9790 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9791 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9792 }
9793 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9794 num_online_cpus());
9795 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9796 pf->hw.func_caps.num_tx_qp);
9797
9798 queues_left -= pf->num_lan_qps;
9799 }
9800
9801 #ifdef I40E_FCOE
9802 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9803 if (I40E_DEFAULT_FCOE <= queues_left) {
9804 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9805 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9806 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9807 } else {
9808 pf->num_fcoe_qps = 0;
9809 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9810 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9811 }
9812
9813 queues_left -= pf->num_fcoe_qps;
9814 }
9815
9816 #endif
9817 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9818 if (queues_left > 1) {
9819 queues_left -= 1; /* save 1 queue for FD */
9820 } else {
9821 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9822 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9823 }
9824 }
9825
9826 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9827 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9828 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9829 (queues_left / pf->num_vf_qps));
9830 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9831 }
9832
9833 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9834 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9835 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9836 (queues_left / pf->num_vmdq_qps));
9837 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9838 }
9839
9840 pf->queues_left = queues_left;
9841 #ifdef I40E_FCOE
9842 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9843 #endif
9844 }
9845
9846 /**
9847 * i40e_setup_pf_filter_control - Setup PF static filter control
9848 * @pf: PF to be setup
9849 *
9850 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9851 * settings. If PE/FCoE are enabled then it will also set the per PF
9852 * based filter sizes required for them. It also enables Flow director,
9853 * ethertype and macvlan type filter settings for the pf.
9854 *
9855 * Returns 0 on success, negative on failure
9856 **/
9857 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9858 {
9859 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9860
9861 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9862
9863 /* Flow Director is enabled */
9864 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9865 settings->enable_fdir = true;
9866
9867 /* Ethtype and MACVLAN filters enabled for PF */
9868 settings->enable_ethtype = true;
9869 settings->enable_macvlan = true;
9870
9871 if (i40e_set_filter_control(&pf->hw, settings))
9872 return -ENOENT;
9873
9874 return 0;
9875 }
9876
9877 #define INFO_STRING_LEN 255
9878 static void i40e_print_features(struct i40e_pf *pf)
9879 {
9880 struct i40e_hw *hw = &pf->hw;
9881 char *buf, *string;
9882
9883 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9884 if (!string) {
9885 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9886 return;
9887 }
9888
9889 buf = string;
9890
9891 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9892 #ifdef CONFIG_PCI_IOV
9893 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9894 #endif
9895 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9896 pf->hw.func_caps.num_vsis,
9897 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9898 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9899
9900 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9901 buf += sprintf(buf, "RSS ");
9902 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9903 buf += sprintf(buf, "FD_ATR ");
9904 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9905 buf += sprintf(buf, "FD_SB ");
9906 buf += sprintf(buf, "NTUPLE ");
9907 }
9908 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9909 buf += sprintf(buf, "DCB ");
9910 if (pf->flags & I40E_FLAG_PTP)
9911 buf += sprintf(buf, "PTP ");
9912 #ifdef I40E_FCOE
9913 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9914 buf += sprintf(buf, "FCOE ");
9915 #endif
9916
9917 BUG_ON(buf > (string + INFO_STRING_LEN));
9918 dev_info(&pf->pdev->dev, "%s\n", string);
9919 kfree(string);
9920 }
9921
9922 /**
9923 * i40e_probe - Device initialization routine
9924 * @pdev: PCI device information struct
9925 * @ent: entry in i40e_pci_tbl
9926 *
9927 * i40e_probe initializes a PF identified by a pci_dev structure.
9928 * The OS initialization, configuring of the PF private structure,
9929 * and a hardware reset occur.
9930 *
9931 * Returns 0 on success, negative on failure
9932 **/
9933 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9934 {
9935 struct i40e_aq_get_phy_abilities_resp abilities;
9936 unsigned long ioremap_len;
9937 struct i40e_pf *pf;
9938 struct i40e_hw *hw;
9939 static u16 pfs_found;
9940 u16 link_status;
9941 int err = 0;
9942 u32 len;
9943 u32 i;
9944
9945 err = pci_enable_device_mem(pdev);
9946 if (err)
9947 return err;
9948
9949 /* set up for high or low dma */
9950 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9951 if (err) {
9952 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9953 if (err) {
9954 dev_err(&pdev->dev,
9955 "DMA configuration failed: 0x%x\n", err);
9956 goto err_dma;
9957 }
9958 }
9959
9960 /* set up pci connections */
9961 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9962 IORESOURCE_MEM), i40e_driver_name);
9963 if (err) {
9964 dev_info(&pdev->dev,
9965 "pci_request_selected_regions failed %d\n", err);
9966 goto err_pci_reg;
9967 }
9968
9969 pci_enable_pcie_error_reporting(pdev);
9970 pci_set_master(pdev);
9971
9972 /* Now that we have a PCI connection, we need to do the
9973 * low level device setup. This is primarily setting up
9974 * the Admin Queue structures and then querying for the
9975 * device's current profile information.
9976 */
9977 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9978 if (!pf) {
9979 err = -ENOMEM;
9980 goto err_pf_alloc;
9981 }
9982 pf->next_vsi = 0;
9983 pf->pdev = pdev;
9984 set_bit(__I40E_DOWN, &pf->state);
9985
9986 hw = &pf->hw;
9987 hw->back = pf;
9988
9989 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9990 I40E_MAX_CSR_SPACE);
9991
9992 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9993 if (!hw->hw_addr) {
9994 err = -EIO;
9995 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9996 (unsigned int)pci_resource_start(pdev, 0),
9997 (unsigned int)pci_resource_len(pdev, 0), err);
9998 goto err_ioremap;
9999 }
10000 hw->vendor_id = pdev->vendor;
10001 hw->device_id = pdev->device;
10002 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10003 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10004 hw->subsystem_device_id = pdev->subsystem_device;
10005 hw->bus.device = PCI_SLOT(pdev->devfn);
10006 hw->bus.func = PCI_FUNC(pdev->devfn);
10007 pf->instance = pfs_found;
10008
10009 if (debug != -1) {
10010 pf->msg_enable = pf->hw.debug_mask;
10011 pf->msg_enable = debug;
10012 }
10013
10014 /* do a special CORER for clearing PXE mode once at init */
10015 if (hw->revision_id == 0 &&
10016 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10017 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10018 i40e_flush(hw);
10019 msleep(200);
10020 pf->corer_count++;
10021
10022 i40e_clear_pxe_mode(hw);
10023 }
10024
10025 /* Reset here to make sure all is clean and to define PF 'n' */
10026 i40e_clear_hw(hw);
10027 err = i40e_pf_reset(hw);
10028 if (err) {
10029 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10030 goto err_pf_reset;
10031 }
10032 pf->pfr_count++;
10033
10034 hw->aq.num_arq_entries = I40E_AQ_LEN;
10035 hw->aq.num_asq_entries = I40E_AQ_LEN;
10036 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10037 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10038 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10039
10040 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10041 "%s-%s:misc",
10042 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10043
10044 err = i40e_init_shared_code(hw);
10045 if (err) {
10046 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10047 err);
10048 goto err_pf_reset;
10049 }
10050
10051 /* set up a default setting for link flow control */
10052 pf->hw.fc.requested_mode = I40E_FC_NONE;
10053
10054 err = i40e_init_adminq(hw);
10055 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10056 if (err) {
10057 dev_info(&pdev->dev,
10058 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10059 goto err_pf_reset;
10060 }
10061
10062 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10063 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10064 dev_info(&pdev->dev,
10065 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10066 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10067 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10068 dev_info(&pdev->dev,
10069 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10070
10071 i40e_verify_eeprom(pf);
10072
10073 /* Rev 0 hardware was never productized */
10074 if (hw->revision_id < 1)
10075 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10076
10077 i40e_clear_pxe_mode(hw);
10078 err = i40e_get_capabilities(pf);
10079 if (err)
10080 goto err_adminq_setup;
10081
10082 err = i40e_sw_init(pf);
10083 if (err) {
10084 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10085 goto err_sw_init;
10086 }
10087
10088 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10089 hw->func_caps.num_rx_qp,
10090 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10091 if (err) {
10092 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10093 goto err_init_lan_hmc;
10094 }
10095
10096 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10097 if (err) {
10098 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10099 err = -ENOENT;
10100 goto err_configure_lan_hmc;
10101 }
10102
10103 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10104 * Ignore error return codes because if it was already disabled via
10105 * hardware settings this will fail
10106 */
10107 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10108 (pf->hw.aq.fw_maj_ver < 4)) {
10109 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10110 i40e_aq_stop_lldp(hw, true, NULL);
10111 }
10112
10113 i40e_get_mac_addr(hw, hw->mac.addr);
10114 if (!is_valid_ether_addr(hw->mac.addr)) {
10115 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10116 err = -EIO;
10117 goto err_mac_addr;
10118 }
10119 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10120 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10121 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10122 if (is_valid_ether_addr(hw->mac.port_addr))
10123 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10124 #ifdef I40E_FCOE
10125 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10126 if (err)
10127 dev_info(&pdev->dev,
10128 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10129 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10130 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10131 hw->mac.san_addr);
10132 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10133 }
10134 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10135 #endif /* I40E_FCOE */
10136
10137 pci_set_drvdata(pdev, pf);
10138 pci_save_state(pdev);
10139 #ifdef CONFIG_I40E_DCB
10140 err = i40e_init_pf_dcb(pf);
10141 if (err) {
10142 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10143 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10144 /* Continue without DCB enabled */
10145 }
10146 #endif /* CONFIG_I40E_DCB */
10147
10148 /* set up periodic task facility */
10149 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10150 pf->service_timer_period = HZ;
10151
10152 INIT_WORK(&pf->service_task, i40e_service_task);
10153 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10154 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10155
10156 /* WoL defaults to disabled */
10157 pf->wol_en = false;
10158 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10159
10160 /* set up the main switch operations */
10161 i40e_determine_queue_usage(pf);
10162 err = i40e_init_interrupt_scheme(pf);
10163 if (err)
10164 goto err_switch_setup;
10165
10166 /* The number of VSIs reported by the FW is the minimum guaranteed
10167 * to us; HW supports far more and we share the remaining pool with
10168 * the other PFs. We allocate space for more than the guarantee with
10169 * the understanding that we might not get them all later.
10170 */
10171 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10172 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10173 else
10174 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10175
10176 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10177 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10178 pf->vsi = kzalloc(len, GFP_KERNEL);
10179 if (!pf->vsi) {
10180 err = -ENOMEM;
10181 goto err_switch_setup;
10182 }
10183
10184 #ifdef CONFIG_PCI_IOV
10185 /* prep for VF support */
10186 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10187 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10188 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10189 if (pci_num_vf(pdev))
10190 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10191 }
10192 #endif
10193 err = i40e_setup_pf_switch(pf, false);
10194 if (err) {
10195 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10196 goto err_vsis;
10197 }
10198 /* if FDIR VSI was set up, start it now */
10199 for (i = 0; i < pf->num_alloc_vsi; i++) {
10200 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10201 i40e_vsi_open(pf->vsi[i]);
10202 break;
10203 }
10204 }
10205
10206 /* driver is only interested in link up/down and module qualification
10207 * reports from firmware
10208 */
10209 err = i40e_aq_set_phy_int_mask(&pf->hw,
10210 I40E_AQ_EVENT_LINK_UPDOWN |
10211 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10212 if (err)
10213 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10214 i40e_stat_str(&pf->hw, err),
10215 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10216
10217 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10218 (pf->hw.aq.fw_maj_ver < 4)) {
10219 msleep(75);
10220 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10221 if (err)
10222 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10223 i40e_stat_str(&pf->hw, err),
10224 i40e_aq_str(&pf->hw,
10225 pf->hw.aq.asq_last_status));
10226 }
10227 /* The main driver is (mostly) up and happy. We need to set this state
10228 * before setting up the misc vector or we get a race and the vector
10229 * ends up disabled forever.
10230 */
10231 clear_bit(__I40E_DOWN, &pf->state);
10232
10233 /* In case of MSIX we are going to setup the misc vector right here
10234 * to handle admin queue events etc. In case of legacy and MSI
10235 * the misc functionality and queue processing is combined in
10236 * the same vector and that gets setup at open.
10237 */
10238 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10239 err = i40e_setup_misc_vector(pf);
10240 if (err) {
10241 dev_info(&pdev->dev,
10242 "setup of misc vector failed: %d\n", err);
10243 goto err_vsis;
10244 }
10245 }
10246
10247 #ifdef CONFIG_PCI_IOV
10248 /* prep for VF support */
10249 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10250 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10251 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10252 u32 val;
10253
10254 /* disable link interrupts for VFs */
10255 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10256 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10257 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10258 i40e_flush(hw);
10259
10260 if (pci_num_vf(pdev)) {
10261 dev_info(&pdev->dev,
10262 "Active VFs found, allocating resources.\n");
10263 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10264 if (err)
10265 dev_info(&pdev->dev,
10266 "Error %d allocating resources for existing VFs\n",
10267 err);
10268 }
10269 }
10270 #endif /* CONFIG_PCI_IOV */
10271
10272 pfs_found++;
10273
10274 i40e_dbg_pf_init(pf);
10275
10276 /* tell the firmware that we're starting */
10277 i40e_send_version(pf);
10278
10279 /* since everything's happy, start the service_task timer */
10280 mod_timer(&pf->service_timer,
10281 round_jiffies(jiffies + pf->service_timer_period));
10282
10283 #ifdef I40E_FCOE
10284 /* create FCoE interface */
10285 i40e_fcoe_vsi_setup(pf);
10286
10287 #endif
10288 /* Get the negotiated link width and speed from PCI config space */
10289 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10290
10291 i40e_set_pci_config_data(hw, link_status);
10292
10293 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10294 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10295 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10296 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10297 "Unknown"),
10298 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10299 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10300 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10301 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10302 "Unknown"));
10303
10304 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10305 hw->bus.speed < i40e_bus_speed_8000) {
10306 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10307 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10308 }
10309
10310 /* get the requested speeds from the fw */
10311 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10312 if (err)
10313 dev_info(&pf->pdev->dev,
10314 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10315 i40e_stat_str(&pf->hw, err),
10316 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10317 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10318
10319 /* print a string summarizing features */
10320 i40e_print_features(pf);
10321
10322 return 0;
10323
10324 /* Unwind what we've done if something failed in the setup */
10325 err_vsis:
10326 set_bit(__I40E_DOWN, &pf->state);
10327 i40e_clear_interrupt_scheme(pf);
10328 kfree(pf->vsi);
10329 err_switch_setup:
10330 i40e_reset_interrupt_capability(pf);
10331 del_timer_sync(&pf->service_timer);
10332 err_mac_addr:
10333 err_configure_lan_hmc:
10334 (void)i40e_shutdown_lan_hmc(hw);
10335 err_init_lan_hmc:
10336 kfree(pf->qp_pile);
10337 err_sw_init:
10338 err_adminq_setup:
10339 (void)i40e_shutdown_adminq(hw);
10340 err_pf_reset:
10341 iounmap(hw->hw_addr);
10342 err_ioremap:
10343 kfree(pf);
10344 err_pf_alloc:
10345 pci_disable_pcie_error_reporting(pdev);
10346 pci_release_selected_regions(pdev,
10347 pci_select_bars(pdev, IORESOURCE_MEM));
10348 err_pci_reg:
10349 err_dma:
10350 pci_disable_device(pdev);
10351 return err;
10352 }
10353
10354 /**
10355 * i40e_remove - Device removal routine
10356 * @pdev: PCI device information struct
10357 *
10358 * i40e_remove is called by the PCI subsystem to alert the driver
10359 * that is should release a PCI device. This could be caused by a
10360 * Hot-Plug event, or because the driver is going to be removed from
10361 * memory.
10362 **/
10363 static void i40e_remove(struct pci_dev *pdev)
10364 {
10365 struct i40e_pf *pf = pci_get_drvdata(pdev);
10366 i40e_status ret_code;
10367 int i;
10368
10369 i40e_dbg_pf_exit(pf);
10370
10371 i40e_ptp_stop(pf);
10372
10373 /* no more scheduling of any task */
10374 set_bit(__I40E_DOWN, &pf->state);
10375 del_timer_sync(&pf->service_timer);
10376 cancel_work_sync(&pf->service_task);
10377 i40e_fdir_teardown(pf);
10378
10379 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10380 i40e_free_vfs(pf);
10381 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10382 }
10383
10384 i40e_fdir_teardown(pf);
10385
10386 /* If there is a switch structure or any orphans, remove them.
10387 * This will leave only the PF's VSI remaining.
10388 */
10389 for (i = 0; i < I40E_MAX_VEB; i++) {
10390 if (!pf->veb[i])
10391 continue;
10392
10393 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10394 pf->veb[i]->uplink_seid == 0)
10395 i40e_switch_branch_release(pf->veb[i]);
10396 }
10397
10398 /* Now we can shutdown the PF's VSI, just before we kill
10399 * adminq and hmc.
10400 */
10401 if (pf->vsi[pf->lan_vsi])
10402 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10403
10404 /* shutdown and destroy the HMC */
10405 if (pf->hw.hmc.hmc_obj) {
10406 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10407 if (ret_code)
10408 dev_warn(&pdev->dev,
10409 "Failed to destroy the HMC resources: %d\n",
10410 ret_code);
10411 }
10412
10413 /* shutdown the adminq */
10414 ret_code = i40e_shutdown_adminq(&pf->hw);
10415 if (ret_code)
10416 dev_warn(&pdev->dev,
10417 "Failed to destroy the Admin Queue resources: %d\n",
10418 ret_code);
10419
10420 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10421 i40e_clear_interrupt_scheme(pf);
10422 for (i = 0; i < pf->num_alloc_vsi; i++) {
10423 if (pf->vsi[i]) {
10424 i40e_vsi_clear_rings(pf->vsi[i]);
10425 i40e_vsi_clear(pf->vsi[i]);
10426 pf->vsi[i] = NULL;
10427 }
10428 }
10429
10430 for (i = 0; i < I40E_MAX_VEB; i++) {
10431 kfree(pf->veb[i]);
10432 pf->veb[i] = NULL;
10433 }
10434
10435 kfree(pf->qp_pile);
10436 kfree(pf->vsi);
10437
10438 iounmap(pf->hw.hw_addr);
10439 kfree(pf);
10440 pci_release_selected_regions(pdev,
10441 pci_select_bars(pdev, IORESOURCE_MEM));
10442
10443 pci_disable_pcie_error_reporting(pdev);
10444 pci_disable_device(pdev);
10445 }
10446
10447 /**
10448 * i40e_pci_error_detected - warning that something funky happened in PCI land
10449 * @pdev: PCI device information struct
10450 *
10451 * Called to warn that something happened and the error handling steps
10452 * are in progress. Allows the driver to quiesce things, be ready for
10453 * remediation.
10454 **/
10455 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10456 enum pci_channel_state error)
10457 {
10458 struct i40e_pf *pf = pci_get_drvdata(pdev);
10459
10460 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10461
10462 /* shutdown all operations */
10463 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10464 rtnl_lock();
10465 i40e_prep_for_reset(pf);
10466 rtnl_unlock();
10467 }
10468
10469 /* Request a slot reset */
10470 return PCI_ERS_RESULT_NEED_RESET;
10471 }
10472
10473 /**
10474 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10475 * @pdev: PCI device information struct
10476 *
10477 * Called to find if the driver can work with the device now that
10478 * the pci slot has been reset. If a basic connection seems good
10479 * (registers are readable and have sane content) then return a
10480 * happy little PCI_ERS_RESULT_xxx.
10481 **/
10482 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10483 {
10484 struct i40e_pf *pf = pci_get_drvdata(pdev);
10485 pci_ers_result_t result;
10486 int err;
10487 u32 reg;
10488
10489 dev_info(&pdev->dev, "%s\n", __func__);
10490 if (pci_enable_device_mem(pdev)) {
10491 dev_info(&pdev->dev,
10492 "Cannot re-enable PCI device after reset.\n");
10493 result = PCI_ERS_RESULT_DISCONNECT;
10494 } else {
10495 pci_set_master(pdev);
10496 pci_restore_state(pdev);
10497 pci_save_state(pdev);
10498 pci_wake_from_d3(pdev, false);
10499
10500 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10501 if (reg == 0)
10502 result = PCI_ERS_RESULT_RECOVERED;
10503 else
10504 result = PCI_ERS_RESULT_DISCONNECT;
10505 }
10506
10507 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10508 if (err) {
10509 dev_info(&pdev->dev,
10510 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10511 err);
10512 /* non-fatal, continue */
10513 }
10514
10515 return result;
10516 }
10517
10518 /**
10519 * i40e_pci_error_resume - restart operations after PCI error recovery
10520 * @pdev: PCI device information struct
10521 *
10522 * Called to allow the driver to bring things back up after PCI error
10523 * and/or reset recovery has finished.
10524 **/
10525 static void i40e_pci_error_resume(struct pci_dev *pdev)
10526 {
10527 struct i40e_pf *pf = pci_get_drvdata(pdev);
10528
10529 dev_info(&pdev->dev, "%s\n", __func__);
10530 if (test_bit(__I40E_SUSPENDED, &pf->state))
10531 return;
10532
10533 rtnl_lock();
10534 i40e_handle_reset_warning(pf);
10535 rtnl_lock();
10536 }
10537
10538 /**
10539 * i40e_shutdown - PCI callback for shutting down
10540 * @pdev: PCI device information struct
10541 **/
10542 static void i40e_shutdown(struct pci_dev *pdev)
10543 {
10544 struct i40e_pf *pf = pci_get_drvdata(pdev);
10545 struct i40e_hw *hw = &pf->hw;
10546
10547 set_bit(__I40E_SUSPENDED, &pf->state);
10548 set_bit(__I40E_DOWN, &pf->state);
10549 rtnl_lock();
10550 i40e_prep_for_reset(pf);
10551 rtnl_unlock();
10552
10553 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10554 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10555
10556 del_timer_sync(&pf->service_timer);
10557 cancel_work_sync(&pf->service_task);
10558 i40e_fdir_teardown(pf);
10559
10560 rtnl_lock();
10561 i40e_prep_for_reset(pf);
10562 rtnl_unlock();
10563
10564 wr32(hw, I40E_PFPM_APM,
10565 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10566 wr32(hw, I40E_PFPM_WUFC,
10567 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10568
10569 i40e_clear_interrupt_scheme(pf);
10570
10571 if (system_state == SYSTEM_POWER_OFF) {
10572 pci_wake_from_d3(pdev, pf->wol_en);
10573 pci_set_power_state(pdev, PCI_D3hot);
10574 }
10575 }
10576
10577 #ifdef CONFIG_PM
10578 /**
10579 * i40e_suspend - PCI callback for moving to D3
10580 * @pdev: PCI device information struct
10581 **/
10582 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10583 {
10584 struct i40e_pf *pf = pci_get_drvdata(pdev);
10585 struct i40e_hw *hw = &pf->hw;
10586
10587 set_bit(__I40E_SUSPENDED, &pf->state);
10588 set_bit(__I40E_DOWN, &pf->state);
10589
10590 rtnl_lock();
10591 i40e_prep_for_reset(pf);
10592 rtnl_unlock();
10593
10594 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10595 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10596
10597 pci_wake_from_d3(pdev, pf->wol_en);
10598 pci_set_power_state(pdev, PCI_D3hot);
10599
10600 return 0;
10601 }
10602
10603 /**
10604 * i40e_resume - PCI callback for waking up from D3
10605 * @pdev: PCI device information struct
10606 **/
10607 static int i40e_resume(struct pci_dev *pdev)
10608 {
10609 struct i40e_pf *pf = pci_get_drvdata(pdev);
10610 u32 err;
10611
10612 pci_set_power_state(pdev, PCI_D0);
10613 pci_restore_state(pdev);
10614 /* pci_restore_state() clears dev->state_saves, so
10615 * call pci_save_state() again to restore it.
10616 */
10617 pci_save_state(pdev);
10618
10619 err = pci_enable_device_mem(pdev);
10620 if (err) {
10621 dev_err(&pdev->dev,
10622 "%s: Cannot enable PCI device from suspend\n",
10623 __func__);
10624 return err;
10625 }
10626 pci_set_master(pdev);
10627
10628 /* no wakeup events while running */
10629 pci_wake_from_d3(pdev, false);
10630
10631 /* handling the reset will rebuild the device state */
10632 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10633 clear_bit(__I40E_DOWN, &pf->state);
10634 rtnl_lock();
10635 i40e_reset_and_rebuild(pf, false);
10636 rtnl_unlock();
10637 }
10638
10639 return 0;
10640 }
10641
10642 #endif
10643 static const struct pci_error_handlers i40e_err_handler = {
10644 .error_detected = i40e_pci_error_detected,
10645 .slot_reset = i40e_pci_error_slot_reset,
10646 .resume = i40e_pci_error_resume,
10647 };
10648
10649 static struct pci_driver i40e_driver = {
10650 .name = i40e_driver_name,
10651 .id_table = i40e_pci_tbl,
10652 .probe = i40e_probe,
10653 .remove = i40e_remove,
10654 #ifdef CONFIG_PM
10655 .suspend = i40e_suspend,
10656 .resume = i40e_resume,
10657 #endif
10658 .shutdown = i40e_shutdown,
10659 .err_handler = &i40e_err_handler,
10660 .sriov_configure = i40e_pci_sriov_configure,
10661 };
10662
10663 /**
10664 * i40e_init_module - Driver registration routine
10665 *
10666 * i40e_init_module is the first routine called when the driver is
10667 * loaded. All it does is register with the PCI subsystem.
10668 **/
10669 static int __init i40e_init_module(void)
10670 {
10671 pr_info("%s: %s - version %s\n", i40e_driver_name,
10672 i40e_driver_string, i40e_driver_version_str);
10673 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10674
10675 i40e_dbg_init();
10676 return pci_register_driver(&i40e_driver);
10677 }
10678 module_init(i40e_init_module);
10679
10680 /**
10681 * i40e_exit_module - Driver exit cleanup routine
10682 *
10683 * i40e_exit_module is called just before the driver is removed
10684 * from memory.
10685 **/
10686 static void __exit i40e_exit_module(void)
10687 {
10688 pci_unregister_driver(&i40e_driver);
10689 i40e_dbg_exit();
10690 }
10691 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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