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i40e: Fix multiple link up messages
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 21
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
85 /* required last entry */
86 {0, }
87 };
88 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
89
90 #define I40E_MAX_VF_COUNT 128
91 static int debug = -1;
92 module_param(debug, int, 0);
93 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
94
95 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
96 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
97 MODULE_LICENSE("GPL");
98 MODULE_VERSION(DRV_VERSION);
99
100 /**
101 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
102 * @hw: pointer to the HW structure
103 * @mem: ptr to mem struct to fill out
104 * @size: size of memory requested
105 * @alignment: what to align the allocation to
106 **/
107 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
108 u64 size, u32 alignment)
109 {
110 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
111
112 mem->size = ALIGN(size, alignment);
113 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
114 &mem->pa, GFP_KERNEL);
115 if (!mem->va)
116 return -ENOMEM;
117
118 return 0;
119 }
120
121 /**
122 * i40e_free_dma_mem_d - OS specific memory free for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to free
125 **/
126 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
127 {
128 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
129
130 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
131 mem->va = NULL;
132 mem->pa = 0;
133 mem->size = 0;
134
135 return 0;
136 }
137
138 /**
139 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
140 * @hw: pointer to the HW structure
141 * @mem: ptr to mem struct to fill out
142 * @size: size of memory requested
143 **/
144 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
145 u32 size)
146 {
147 mem->size = size;
148 mem->va = kzalloc(size, GFP_KERNEL);
149
150 if (!mem->va)
151 return -ENOMEM;
152
153 return 0;
154 }
155
156 /**
157 * i40e_free_virt_mem_d - OS specific memory free for shared code
158 * @hw: pointer to the HW structure
159 * @mem: ptr to mem struct to free
160 **/
161 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
162 {
163 /* it's ok to kfree a NULL pointer */
164 kfree(mem->va);
165 mem->va = NULL;
166 mem->size = 0;
167
168 return 0;
169 }
170
171 /**
172 * i40e_get_lump - find a lump of free generic resource
173 * @pf: board private structure
174 * @pile: the pile of resource to search
175 * @needed: the number of items needed
176 * @id: an owner id to stick on the items assigned
177 *
178 * Returns the base item index of the lump, or negative for error
179 *
180 * The search_hint trick and lack of advanced fit-finding only work
181 * because we're highly likely to have all the same size lump requests.
182 * Linear search time and any fragmentation should be minimal.
183 **/
184 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
185 u16 needed, u16 id)
186 {
187 int ret = -ENOMEM;
188 int i, j;
189
190 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
191 dev_info(&pf->pdev->dev,
192 "param err: pile=%p needed=%d id=0x%04x\n",
193 pile, needed, id);
194 return -EINVAL;
195 }
196
197 /* start the linear search with an imperfect hint */
198 i = pile->search_hint;
199 while (i < pile->num_entries) {
200 /* skip already allocated entries */
201 if (pile->list[i] & I40E_PILE_VALID_BIT) {
202 i++;
203 continue;
204 }
205
206 /* do we have enough in this lump? */
207 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
208 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
209 break;
210 }
211
212 if (j == needed) {
213 /* there was enough, so assign it to the requestor */
214 for (j = 0; j < needed; j++)
215 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
216 ret = i;
217 pile->search_hint = i + j;
218 break;
219 } else {
220 /* not enough, so skip over it and continue looking */
221 i += j;
222 }
223 }
224
225 return ret;
226 }
227
228 /**
229 * i40e_put_lump - return a lump of generic resource
230 * @pile: the pile of resource to search
231 * @index: the base item index
232 * @id: the owner id of the items assigned
233 *
234 * Returns the count of items in the lump
235 **/
236 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
237 {
238 int valid_id = (id | I40E_PILE_VALID_BIT);
239 int count = 0;
240 int i;
241
242 if (!pile || index >= pile->num_entries)
243 return -EINVAL;
244
245 for (i = index;
246 i < pile->num_entries && pile->list[i] == valid_id;
247 i++) {
248 pile->list[i] = 0;
249 count++;
250 }
251
252 if (count && index < pile->search_hint)
253 pile->search_hint = index;
254
255 return count;
256 }
257
258 /**
259 * i40e_find_vsi_from_id - searches for the vsi with the given id
260 * @pf - the pf structure to search for the vsi
261 * @id - id of the vsi it is searching for
262 **/
263 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
264 {
265 int i;
266
267 for (i = 0; i < pf->num_alloc_vsi; i++)
268 if (pf->vsi[i] && (pf->vsi[i]->id == id))
269 return pf->vsi[i];
270
271 return NULL;
272 }
273
274 /**
275 * i40e_service_event_schedule - Schedule the service task to wake up
276 * @pf: board private structure
277 *
278 * If not already scheduled, this puts the task into the work queue
279 **/
280 static void i40e_service_event_schedule(struct i40e_pf *pf)
281 {
282 if (!test_bit(__I40E_DOWN, &pf->state) &&
283 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
284 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
285 schedule_work(&pf->service_task);
286 }
287
288 /**
289 * i40e_tx_timeout - Respond to a Tx Hang
290 * @netdev: network interface device structure
291 *
292 * If any port has noticed a Tx timeout, it is likely that the whole
293 * device is munged, not just the one netdev port, so go for the full
294 * reset.
295 **/
296 #ifdef I40E_FCOE
297 void i40e_tx_timeout(struct net_device *netdev)
298 #else
299 static void i40e_tx_timeout(struct net_device *netdev)
300 #endif
301 {
302 struct i40e_netdev_priv *np = netdev_priv(netdev);
303 struct i40e_vsi *vsi = np->vsi;
304 struct i40e_pf *pf = vsi->back;
305 struct i40e_ring *tx_ring = NULL;
306 unsigned int i, hung_queue = 0;
307 u32 head, val;
308
309 pf->tx_timeout_count++;
310
311 /* find the stopped queue the same way the stack does */
312 for (i = 0; i < netdev->num_tx_queues; i++) {
313 struct netdev_queue *q;
314 unsigned long trans_start;
315
316 q = netdev_get_tx_queue(netdev, i);
317 trans_start = q->trans_start ? : netdev->trans_start;
318 if (netif_xmit_stopped(q) &&
319 time_after(jiffies,
320 (trans_start + netdev->watchdog_timeo))) {
321 hung_queue = i;
322 break;
323 }
324 }
325
326 if (i == netdev->num_tx_queues) {
327 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
328 } else {
329 /* now that we have an index, find the tx_ring struct */
330 for (i = 0; i < vsi->num_queue_pairs; i++) {
331 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
332 if (hung_queue ==
333 vsi->tx_rings[i]->queue_index) {
334 tx_ring = vsi->tx_rings[i];
335 break;
336 }
337 }
338 }
339 }
340
341 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
342 pf->tx_timeout_recovery_level = 1; /* reset after some time */
343 else if (time_before(jiffies,
344 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
345 return; /* don't do any new action before the next timeout */
346
347 if (tx_ring) {
348 head = i40e_get_head(tx_ring);
349 /* Read interrupt register */
350 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
351 val = rd32(&pf->hw,
352 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
353 tx_ring->vsi->base_vector - 1));
354 else
355 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
356
357 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
358 vsi->seid, hung_queue, tx_ring->next_to_clean,
359 head, tx_ring->next_to_use,
360 readl(tx_ring->tail), val);
361 }
362
363 pf->tx_timeout_last_recovery = jiffies;
364 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
365 pf->tx_timeout_recovery_level, hung_queue);
366
367 switch (pf->tx_timeout_recovery_level) {
368 case 1:
369 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
370 break;
371 case 2:
372 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
373 break;
374 case 3:
375 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
376 break;
377 default:
378 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
379 break;
380 }
381
382 i40e_service_event_schedule(pf);
383 pf->tx_timeout_recovery_level++;
384 }
385
386 /**
387 * i40e_release_rx_desc - Store the new tail and head values
388 * @rx_ring: ring to bump
389 * @val: new head index
390 **/
391 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
392 {
393 rx_ring->next_to_use = val;
394
395 /* Force memory writes to complete before letting h/w
396 * know there are new descriptors to fetch. (Only
397 * applicable for weak-ordered memory model archs,
398 * such as IA-64).
399 */
400 wmb();
401 writel(val, rx_ring->tail);
402 }
403
404 /**
405 * i40e_get_vsi_stats_struct - Get System Network Statistics
406 * @vsi: the VSI we care about
407 *
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
410 **/
411 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
412 {
413 return &vsi->net_stats;
414 }
415
416 /**
417 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
418 * @netdev: network interface device structure
419 *
420 * Returns the address of the device statistics structure.
421 * The statistics are actually updated from the service task.
422 **/
423 #ifdef I40E_FCOE
424 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
425 struct net_device *netdev,
426 struct rtnl_link_stats64 *stats)
427 #else
428 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
429 struct net_device *netdev,
430 struct rtnl_link_stats64 *stats)
431 #endif
432 {
433 struct i40e_netdev_priv *np = netdev_priv(netdev);
434 struct i40e_ring *tx_ring, *rx_ring;
435 struct i40e_vsi *vsi = np->vsi;
436 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
437 int i;
438
439 if (test_bit(__I40E_DOWN, &vsi->state))
440 return stats;
441
442 if (!vsi->tx_rings)
443 return stats;
444
445 rcu_read_lock();
446 for (i = 0; i < vsi->num_queue_pairs; i++) {
447 u64 bytes, packets;
448 unsigned int start;
449
450 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
451 if (!tx_ring)
452 continue;
453
454 do {
455 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
456 packets = tx_ring->stats.packets;
457 bytes = tx_ring->stats.bytes;
458 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
459
460 stats->tx_packets += packets;
461 stats->tx_bytes += bytes;
462 rx_ring = &tx_ring[1];
463
464 do {
465 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
466 packets = rx_ring->stats.packets;
467 bytes = rx_ring->stats.bytes;
468 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
469
470 stats->rx_packets += packets;
471 stats->rx_bytes += bytes;
472 }
473 rcu_read_unlock();
474
475 /* following stats updated by i40e_watchdog_subtask() */
476 stats->multicast = vsi_stats->multicast;
477 stats->tx_errors = vsi_stats->tx_errors;
478 stats->tx_dropped = vsi_stats->tx_dropped;
479 stats->rx_errors = vsi_stats->rx_errors;
480 stats->rx_dropped = vsi_stats->rx_dropped;
481 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
482 stats->rx_length_errors = vsi_stats->rx_length_errors;
483
484 return stats;
485 }
486
487 /**
488 * i40e_vsi_reset_stats - Resets all stats of the given vsi
489 * @vsi: the VSI to have its stats reset
490 **/
491 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
492 {
493 struct rtnl_link_stats64 *ns;
494 int i;
495
496 if (!vsi)
497 return;
498
499 ns = i40e_get_vsi_stats_struct(vsi);
500 memset(ns, 0, sizeof(*ns));
501 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
502 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
503 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
504 if (vsi->rx_rings && vsi->rx_rings[0]) {
505 for (i = 0; i < vsi->num_queue_pairs; i++) {
506 memset(&vsi->rx_rings[i]->stats, 0 ,
507 sizeof(vsi->rx_rings[i]->stats));
508 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
509 sizeof(vsi->rx_rings[i]->rx_stats));
510 memset(&vsi->tx_rings[i]->stats, 0 ,
511 sizeof(vsi->tx_rings[i]->stats));
512 memset(&vsi->tx_rings[i]->tx_stats, 0,
513 sizeof(vsi->tx_rings[i]->tx_stats));
514 }
515 }
516 vsi->stat_offsets_loaded = false;
517 }
518
519 /**
520 * i40e_pf_reset_stats - Reset all of the stats for the given PF
521 * @pf: the PF to be reset
522 **/
523 void i40e_pf_reset_stats(struct i40e_pf *pf)
524 {
525 int i;
526
527 memset(&pf->stats, 0, sizeof(pf->stats));
528 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
529 pf->stat_offsets_loaded = false;
530
531 for (i = 0; i < I40E_MAX_VEB; i++) {
532 if (pf->veb[i]) {
533 memset(&pf->veb[i]->stats, 0,
534 sizeof(pf->veb[i]->stats));
535 memset(&pf->veb[i]->stats_offsets, 0,
536 sizeof(pf->veb[i]->stats_offsets));
537 pf->veb[i]->stat_offsets_loaded = false;
538 }
539 }
540 }
541
542 /**
543 * i40e_stat_update48 - read and update a 48 bit stat from the chip
544 * @hw: ptr to the hardware info
545 * @hireg: the high 32 bit reg to read
546 * @loreg: the low 32 bit reg to read
547 * @offset_loaded: has the initial offset been loaded yet
548 * @offset: ptr to current offset value
549 * @stat: ptr to the stat
550 *
551 * Since the device stats are not reset at PFReset, they likely will not
552 * be zeroed when the driver starts. We'll save the first values read
553 * and use them as offsets to be subtracted from the raw values in order
554 * to report stats that count from zero. In the process, we also manage
555 * the potential roll-over.
556 **/
557 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
558 bool offset_loaded, u64 *offset, u64 *stat)
559 {
560 u64 new_data;
561
562 if (hw->device_id == I40E_DEV_ID_QEMU) {
563 new_data = rd32(hw, loreg);
564 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
565 } else {
566 new_data = rd64(hw, loreg);
567 }
568 if (!offset_loaded)
569 *offset = new_data;
570 if (likely(new_data >= *offset))
571 *stat = new_data - *offset;
572 else
573 *stat = (new_data + BIT_ULL(48)) - *offset;
574 *stat &= 0xFFFFFFFFFFFFULL;
575 }
576
577 /**
578 * i40e_stat_update32 - read and update a 32 bit stat from the chip
579 * @hw: ptr to the hardware info
580 * @reg: the hw reg to read
581 * @offset_loaded: has the initial offset been loaded yet
582 * @offset: ptr to current offset value
583 * @stat: ptr to the stat
584 **/
585 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
586 bool offset_loaded, u64 *offset, u64 *stat)
587 {
588 u32 new_data;
589
590 new_data = rd32(hw, reg);
591 if (!offset_loaded)
592 *offset = new_data;
593 if (likely(new_data >= *offset))
594 *stat = (u32)(new_data - *offset);
595 else
596 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
597 }
598
599 /**
600 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
601 * @vsi: the VSI to be updated
602 **/
603 void i40e_update_eth_stats(struct i40e_vsi *vsi)
604 {
605 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
606 struct i40e_pf *pf = vsi->back;
607 struct i40e_hw *hw = &pf->hw;
608 struct i40e_eth_stats *oes;
609 struct i40e_eth_stats *es; /* device's eth stats */
610
611 es = &vsi->eth_stats;
612 oes = &vsi->eth_stats_offsets;
613
614 /* Gather up the stats that the hw collects */
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_discards, &es->rx_discards);
621 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
622 vsi->stat_offsets_loaded,
623 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
624 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->tx_errors, &es->tx_errors);
627
628 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
629 I40E_GLV_GORCL(stat_idx),
630 vsi->stat_offsets_loaded,
631 &oes->rx_bytes, &es->rx_bytes);
632 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
633 I40E_GLV_UPRCL(stat_idx),
634 vsi->stat_offsets_loaded,
635 &oes->rx_unicast, &es->rx_unicast);
636 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
637 I40E_GLV_MPRCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->rx_multicast, &es->rx_multicast);
640 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
641 I40E_GLV_BPRCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->rx_broadcast, &es->rx_broadcast);
644
645 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
646 I40E_GLV_GOTCL(stat_idx),
647 vsi->stat_offsets_loaded,
648 &oes->tx_bytes, &es->tx_bytes);
649 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
650 I40E_GLV_UPTCL(stat_idx),
651 vsi->stat_offsets_loaded,
652 &oes->tx_unicast, &es->tx_unicast);
653 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
654 I40E_GLV_MPTCL(stat_idx),
655 vsi->stat_offsets_loaded,
656 &oes->tx_multicast, &es->tx_multicast);
657 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
658 I40E_GLV_BPTCL(stat_idx),
659 vsi->stat_offsets_loaded,
660 &oes->tx_broadcast, &es->tx_broadcast);
661 vsi->stat_offsets_loaded = true;
662 }
663
664 /**
665 * i40e_update_veb_stats - Update Switch component statistics
666 * @veb: the VEB being updated
667 **/
668 static void i40e_update_veb_stats(struct i40e_veb *veb)
669 {
670 struct i40e_pf *pf = veb->pf;
671 struct i40e_hw *hw = &pf->hw;
672 struct i40e_eth_stats *oes;
673 struct i40e_eth_stats *es; /* device's eth stats */
674 struct i40e_veb_tc_stats *veb_oes;
675 struct i40e_veb_tc_stats *veb_es;
676 int i, idx = 0;
677
678 idx = veb->stats_idx;
679 es = &veb->stats;
680 oes = &veb->stats_offsets;
681 veb_es = &veb->tc_stats;
682 veb_oes = &veb->tc_stats_offsets;
683
684 /* Gather up the stats that the hw collects */
685 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
686 veb->stat_offsets_loaded,
687 &oes->tx_discards, &es->tx_discards);
688 if (hw->revision_id > 0)
689 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
690 veb->stat_offsets_loaded,
691 &oes->rx_unknown_protocol,
692 &es->rx_unknown_protocol);
693 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_bytes, &es->rx_bytes);
696 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
697 veb->stat_offsets_loaded,
698 &oes->rx_unicast, &es->rx_unicast);
699 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
700 veb->stat_offsets_loaded,
701 &oes->rx_multicast, &es->rx_multicast);
702 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
703 veb->stat_offsets_loaded,
704 &oes->rx_broadcast, &es->rx_broadcast);
705
706 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_bytes, &es->tx_bytes);
709 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
710 veb->stat_offsets_loaded,
711 &oes->tx_unicast, &es->tx_unicast);
712 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
713 veb->stat_offsets_loaded,
714 &oes->tx_multicast, &es->tx_multicast);
715 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
716 veb->stat_offsets_loaded,
717 &oes->tx_broadcast, &es->tx_broadcast);
718 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
719 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
720 I40E_GLVEBTC_RPCL(i, idx),
721 veb->stat_offsets_loaded,
722 &veb_oes->tc_rx_packets[i],
723 &veb_es->tc_rx_packets[i]);
724 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
725 I40E_GLVEBTC_RBCL(i, idx),
726 veb->stat_offsets_loaded,
727 &veb_oes->tc_rx_bytes[i],
728 &veb_es->tc_rx_bytes[i]);
729 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
730 I40E_GLVEBTC_TPCL(i, idx),
731 veb->stat_offsets_loaded,
732 &veb_oes->tc_tx_packets[i],
733 &veb_es->tc_tx_packets[i]);
734 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
735 I40E_GLVEBTC_TBCL(i, idx),
736 veb->stat_offsets_loaded,
737 &veb_oes->tc_tx_bytes[i],
738 &veb_es->tc_tx_bytes[i]);
739 }
740 veb->stat_offsets_loaded = true;
741 }
742
743 #ifdef I40E_FCOE
744 /**
745 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
746 * @vsi: the VSI that is capable of doing FCoE
747 **/
748 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
749 {
750 struct i40e_pf *pf = vsi->back;
751 struct i40e_hw *hw = &pf->hw;
752 struct i40e_fcoe_stats *ofs;
753 struct i40e_fcoe_stats *fs; /* device's eth stats */
754 int idx;
755
756 if (vsi->type != I40E_VSI_FCOE)
757 return;
758
759 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
760 fs = &vsi->fcoe_stats;
761 ofs = &vsi->fcoe_stats_offsets;
762
763 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
772 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
775 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
778 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
779 vsi->fcoe_stat_offsets_loaded,
780 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
781 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
782 vsi->fcoe_stat_offsets_loaded,
783 &ofs->fcoe_last_error, &fs->fcoe_last_error);
784 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
785 vsi->fcoe_stat_offsets_loaded,
786 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
787
788 vsi->fcoe_stat_offsets_loaded = true;
789 }
790
791 #endif
792 /**
793 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
794 * @pf: the corresponding PF
795 *
796 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
797 **/
798 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
799 {
800 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
801 struct i40e_hw_port_stats *nsd = &pf->stats;
802 struct i40e_hw *hw = &pf->hw;
803 u64 xoff = 0;
804
805 if ((hw->fc.current_mode != I40E_FC_FULL) &&
806 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
807 return;
808
809 xoff = nsd->link_xoff_rx;
810 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
811 pf->stat_offsets_loaded,
812 &osd->link_xoff_rx, &nsd->link_xoff_rx);
813
814 /* No new LFC xoff rx */
815 if (!(nsd->link_xoff_rx - xoff))
816 return;
817
818 }
819
820 /**
821 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
822 * @pf: the corresponding PF
823 *
824 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
825 **/
826 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
827 {
828 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
829 struct i40e_hw_port_stats *nsd = &pf->stats;
830 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
831 struct i40e_dcbx_config *dcb_cfg;
832 struct i40e_hw *hw = &pf->hw;
833 u16 i;
834 u8 tc;
835
836 dcb_cfg = &hw->local_dcbx_config;
837
838 /* Collect Link XOFF stats when PFC is disabled */
839 if (!dcb_cfg->pfc.pfcenable) {
840 i40e_update_link_xoff_rx(pf);
841 return;
842 }
843
844 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
845 u64 prio_xoff = nsd->priority_xoff_rx[i];
846 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
847 pf->stat_offsets_loaded,
848 &osd->priority_xoff_rx[i],
849 &nsd->priority_xoff_rx[i]);
850
851 /* No new PFC xoff rx */
852 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
853 continue;
854 /* Get the TC for given priority */
855 tc = dcb_cfg->etscfg.prioritytable[i];
856 xoff[tc] = true;
857 }
858 }
859
860 /**
861 * i40e_update_vsi_stats - Update the vsi statistics counters.
862 * @vsi: the VSI to be updated
863 *
864 * There are a few instances where we store the same stat in a
865 * couple of different structs. This is partly because we have
866 * the netdev stats that need to be filled out, which is slightly
867 * different from the "eth_stats" defined by the chip and used in
868 * VF communications. We sort it out here.
869 **/
870 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
871 {
872 struct i40e_pf *pf = vsi->back;
873 struct rtnl_link_stats64 *ons;
874 struct rtnl_link_stats64 *ns; /* netdev stats */
875 struct i40e_eth_stats *oes;
876 struct i40e_eth_stats *es; /* device's eth stats */
877 u32 tx_restart, tx_busy;
878 struct i40e_ring *p;
879 u32 rx_page, rx_buf;
880 u64 bytes, packets;
881 unsigned int start;
882 u64 tx_linearize;
883 u64 rx_p, rx_b;
884 u64 tx_p, tx_b;
885 u16 q;
886
887 if (test_bit(__I40E_DOWN, &vsi->state) ||
888 test_bit(__I40E_CONFIG_BUSY, &pf->state))
889 return;
890
891 ns = i40e_get_vsi_stats_struct(vsi);
892 ons = &vsi->net_stats_offsets;
893 es = &vsi->eth_stats;
894 oes = &vsi->eth_stats_offsets;
895
896 /* Gather up the netdev and vsi stats that the driver collects
897 * on the fly during packet processing
898 */
899 rx_b = rx_p = 0;
900 tx_b = tx_p = 0;
901 tx_restart = tx_busy = tx_linearize = 0;
902 rx_page = 0;
903 rx_buf = 0;
904 rcu_read_lock();
905 for (q = 0; q < vsi->num_queue_pairs; q++) {
906 /* locate Tx ring */
907 p = ACCESS_ONCE(vsi->tx_rings[q]);
908
909 do {
910 start = u64_stats_fetch_begin_irq(&p->syncp);
911 packets = p->stats.packets;
912 bytes = p->stats.bytes;
913 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
914 tx_b += bytes;
915 tx_p += packets;
916 tx_restart += p->tx_stats.restart_queue;
917 tx_busy += p->tx_stats.tx_busy;
918 tx_linearize += p->tx_stats.tx_linearize;
919
920 /* Rx queue is part of the same block as Tx queue */
921 p = &p[1];
922 do {
923 start = u64_stats_fetch_begin_irq(&p->syncp);
924 packets = p->stats.packets;
925 bytes = p->stats.bytes;
926 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
927 rx_b += bytes;
928 rx_p += packets;
929 rx_buf += p->rx_stats.alloc_buff_failed;
930 rx_page += p->rx_stats.alloc_page_failed;
931 }
932 rcu_read_unlock();
933 vsi->tx_restart = tx_restart;
934 vsi->tx_busy = tx_busy;
935 vsi->tx_linearize = tx_linearize;
936 vsi->rx_page_failed = rx_page;
937 vsi->rx_buf_failed = rx_buf;
938
939 ns->rx_packets = rx_p;
940 ns->rx_bytes = rx_b;
941 ns->tx_packets = tx_p;
942 ns->tx_bytes = tx_b;
943
944 /* update netdev stats from eth stats */
945 i40e_update_eth_stats(vsi);
946 ons->tx_errors = oes->tx_errors;
947 ns->tx_errors = es->tx_errors;
948 ons->multicast = oes->rx_multicast;
949 ns->multicast = es->rx_multicast;
950 ons->rx_dropped = oes->rx_discards;
951 ns->rx_dropped = es->rx_discards;
952 ons->tx_dropped = oes->tx_discards;
953 ns->tx_dropped = es->tx_discards;
954
955 /* pull in a couple PF stats if this is the main vsi */
956 if (vsi == pf->vsi[pf->lan_vsi]) {
957 ns->rx_crc_errors = pf->stats.crc_errors;
958 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
959 ns->rx_length_errors = pf->stats.rx_length_errors;
960 }
961 }
962
963 /**
964 * i40e_update_pf_stats - Update the PF statistics counters.
965 * @pf: the PF to be updated
966 **/
967 static void i40e_update_pf_stats(struct i40e_pf *pf)
968 {
969 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
970 struct i40e_hw_port_stats *nsd = &pf->stats;
971 struct i40e_hw *hw = &pf->hw;
972 u32 val;
973 int i;
974
975 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
976 I40E_GLPRT_GORCL(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
979 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
980 I40E_GLPRT_GOTCL(hw->port),
981 pf->stat_offsets_loaded,
982 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
983 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
984 pf->stat_offsets_loaded,
985 &osd->eth.rx_discards,
986 &nsd->eth.rx_discards);
987 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
988 I40E_GLPRT_UPRCL(hw->port),
989 pf->stat_offsets_loaded,
990 &osd->eth.rx_unicast,
991 &nsd->eth.rx_unicast);
992 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
993 I40E_GLPRT_MPRCL(hw->port),
994 pf->stat_offsets_loaded,
995 &osd->eth.rx_multicast,
996 &nsd->eth.rx_multicast);
997 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
998 I40E_GLPRT_BPRCL(hw->port),
999 pf->stat_offsets_loaded,
1000 &osd->eth.rx_broadcast,
1001 &nsd->eth.rx_broadcast);
1002 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1003 I40E_GLPRT_UPTCL(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->eth.tx_unicast,
1006 &nsd->eth.tx_unicast);
1007 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1008 I40E_GLPRT_MPTCL(hw->port),
1009 pf->stat_offsets_loaded,
1010 &osd->eth.tx_multicast,
1011 &nsd->eth.tx_multicast);
1012 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1013 I40E_GLPRT_BPTCL(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->eth.tx_broadcast,
1016 &nsd->eth.tx_broadcast);
1017
1018 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1019 pf->stat_offsets_loaded,
1020 &osd->tx_dropped_link_down,
1021 &nsd->tx_dropped_link_down);
1022
1023 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->crc_errors, &nsd->crc_errors);
1026
1027 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->illegal_bytes, &nsd->illegal_bytes);
1030
1031 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->mac_local_faults,
1034 &nsd->mac_local_faults);
1035 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->mac_remote_faults,
1038 &nsd->mac_remote_faults);
1039
1040 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->rx_length_errors,
1043 &nsd->rx_length_errors);
1044
1045 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1046 pf->stat_offsets_loaded,
1047 &osd->link_xon_rx, &nsd->link_xon_rx);
1048 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->link_xon_tx, &nsd->link_xon_tx);
1051 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1052 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1055
1056 for (i = 0; i < 8; i++) {
1057 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1058 pf->stat_offsets_loaded,
1059 &osd->priority_xon_rx[i],
1060 &nsd->priority_xon_rx[i]);
1061 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1062 pf->stat_offsets_loaded,
1063 &osd->priority_xon_tx[i],
1064 &nsd->priority_xon_tx[i]);
1065 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1066 pf->stat_offsets_loaded,
1067 &osd->priority_xoff_tx[i],
1068 &nsd->priority_xoff_tx[i]);
1069 i40e_stat_update32(hw,
1070 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1071 pf->stat_offsets_loaded,
1072 &osd->priority_xon_2_xoff[i],
1073 &nsd->priority_xon_2_xoff[i]);
1074 }
1075
1076 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1077 I40E_GLPRT_PRC64L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_size_64, &nsd->rx_size_64);
1080 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1081 I40E_GLPRT_PRC127L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->rx_size_127, &nsd->rx_size_127);
1084 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1085 I40E_GLPRT_PRC255L(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_size_255, &nsd->rx_size_255);
1088 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1089 I40E_GLPRT_PRC511L(hw->port),
1090 pf->stat_offsets_loaded,
1091 &osd->rx_size_511, &nsd->rx_size_511);
1092 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1093 I40E_GLPRT_PRC1023L(hw->port),
1094 pf->stat_offsets_loaded,
1095 &osd->rx_size_1023, &nsd->rx_size_1023);
1096 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1097 I40E_GLPRT_PRC1522L(hw->port),
1098 pf->stat_offsets_loaded,
1099 &osd->rx_size_1522, &nsd->rx_size_1522);
1100 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1101 I40E_GLPRT_PRC9522L(hw->port),
1102 pf->stat_offsets_loaded,
1103 &osd->rx_size_big, &nsd->rx_size_big);
1104
1105 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1106 I40E_GLPRT_PTC64L(hw->port),
1107 pf->stat_offsets_loaded,
1108 &osd->tx_size_64, &nsd->tx_size_64);
1109 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1110 I40E_GLPRT_PTC127L(hw->port),
1111 pf->stat_offsets_loaded,
1112 &osd->tx_size_127, &nsd->tx_size_127);
1113 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1114 I40E_GLPRT_PTC255L(hw->port),
1115 pf->stat_offsets_loaded,
1116 &osd->tx_size_255, &nsd->tx_size_255);
1117 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1118 I40E_GLPRT_PTC511L(hw->port),
1119 pf->stat_offsets_loaded,
1120 &osd->tx_size_511, &nsd->tx_size_511);
1121 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1122 I40E_GLPRT_PTC1023L(hw->port),
1123 pf->stat_offsets_loaded,
1124 &osd->tx_size_1023, &nsd->tx_size_1023);
1125 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1126 I40E_GLPRT_PTC1522L(hw->port),
1127 pf->stat_offsets_loaded,
1128 &osd->tx_size_1522, &nsd->tx_size_1522);
1129 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1130 I40E_GLPRT_PTC9522L(hw->port),
1131 pf->stat_offsets_loaded,
1132 &osd->tx_size_big, &nsd->tx_size_big);
1133
1134 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1135 pf->stat_offsets_loaded,
1136 &osd->rx_undersize, &nsd->rx_undersize);
1137 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->rx_fragments, &nsd->rx_fragments);
1140 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1141 pf->stat_offsets_loaded,
1142 &osd->rx_oversize, &nsd->rx_oversize);
1143 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1144 pf->stat_offsets_loaded,
1145 &osd->rx_jabber, &nsd->rx_jabber);
1146
1147 /* FDIR stats */
1148 i40e_stat_update32(hw,
1149 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1150 pf->stat_offsets_loaded,
1151 &osd->fd_atr_match, &nsd->fd_atr_match);
1152 i40e_stat_update32(hw,
1153 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1154 pf->stat_offsets_loaded,
1155 &osd->fd_sb_match, &nsd->fd_sb_match);
1156 i40e_stat_update32(hw,
1157 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1158 pf->stat_offsets_loaded,
1159 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1160
1161 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1162 nsd->tx_lpi_status =
1163 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1164 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1165 nsd->rx_lpi_status =
1166 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1167 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1168 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1169 pf->stat_offsets_loaded,
1170 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1171 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1172 pf->stat_offsets_loaded,
1173 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1174
1175 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1176 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1177 nsd->fd_sb_status = true;
1178 else
1179 nsd->fd_sb_status = false;
1180
1181 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1182 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1183 nsd->fd_atr_status = true;
1184 else
1185 nsd->fd_atr_status = false;
1186
1187 pf->stat_offsets_loaded = true;
1188 }
1189
1190 /**
1191 * i40e_update_stats - Update the various statistics counters.
1192 * @vsi: the VSI to be updated
1193 *
1194 * Update the various stats for this VSI and its related entities.
1195 **/
1196 void i40e_update_stats(struct i40e_vsi *vsi)
1197 {
1198 struct i40e_pf *pf = vsi->back;
1199
1200 if (vsi == pf->vsi[pf->lan_vsi])
1201 i40e_update_pf_stats(pf);
1202
1203 i40e_update_vsi_stats(vsi);
1204 #ifdef I40E_FCOE
1205 i40e_update_fcoe_stats(vsi);
1206 #endif
1207 }
1208
1209 /**
1210 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1211 * @vsi: the VSI to be searched
1212 * @macaddr: the MAC address
1213 * @vlan: the vlan
1214 * @is_vf: make sure its a VF filter, else doesn't matter
1215 * @is_netdev: make sure its a netdev filter, else doesn't matter
1216 *
1217 * Returns ptr to the filter object or NULL
1218 **/
1219 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1220 u8 *macaddr, s16 vlan,
1221 bool is_vf, bool is_netdev)
1222 {
1223 struct i40e_mac_filter *f;
1224
1225 if (!vsi || !macaddr)
1226 return NULL;
1227
1228 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1229 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1230 (vlan == f->vlan) &&
1231 (!is_vf || f->is_vf) &&
1232 (!is_netdev || f->is_netdev))
1233 return f;
1234 }
1235 return NULL;
1236 }
1237
1238 /**
1239 * i40e_find_mac - Find a mac addr in the macvlan filters list
1240 * @vsi: the VSI to be searched
1241 * @macaddr: the MAC address we are searching for
1242 * @is_vf: make sure its a VF filter, else doesn't matter
1243 * @is_netdev: make sure its a netdev filter, else doesn't matter
1244 *
1245 * Returns the first filter with the provided MAC address or NULL if
1246 * MAC address was not found
1247 **/
1248 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1249 bool is_vf, bool is_netdev)
1250 {
1251 struct i40e_mac_filter *f;
1252
1253 if (!vsi || !macaddr)
1254 return NULL;
1255
1256 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1257 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1258 (!is_vf || f->is_vf) &&
1259 (!is_netdev || f->is_netdev))
1260 return f;
1261 }
1262 return NULL;
1263 }
1264
1265 /**
1266 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1267 * @vsi: the VSI to be searched
1268 *
1269 * Returns true if VSI is in vlan mode or false otherwise
1270 **/
1271 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1272 {
1273 struct i40e_mac_filter *f;
1274
1275 /* Only -1 for all the filters denotes not in vlan mode
1276 * so we have to go through all the list in order to make sure
1277 */
1278 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1279 if (f->vlan >= 0 || vsi->info.pvid)
1280 return true;
1281 }
1282
1283 return false;
1284 }
1285
1286 /**
1287 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1288 * @vsi: the VSI to be searched
1289 * @macaddr: the mac address to be filtered
1290 * @is_vf: true if it is a VF
1291 * @is_netdev: true if it is a netdev
1292 *
1293 * Goes through all the macvlan filters and adds a
1294 * macvlan filter for each unique vlan that already exists
1295 *
1296 * Returns first filter found on success, else NULL
1297 **/
1298 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1299 bool is_vf, bool is_netdev)
1300 {
1301 struct i40e_mac_filter *f;
1302
1303 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1304 if (vsi->info.pvid)
1305 f->vlan = le16_to_cpu(vsi->info.pvid);
1306 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1307 is_vf, is_netdev)) {
1308 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1309 is_vf, is_netdev))
1310 return NULL;
1311 }
1312 }
1313
1314 return list_first_entry_or_null(&vsi->mac_filter_list,
1315 struct i40e_mac_filter, list);
1316 }
1317
1318 /**
1319 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1320 * @vsi: the PF Main VSI - inappropriate for any other VSI
1321 * @macaddr: the MAC address
1322 *
1323 * Some older firmware configurations set up a default promiscuous VLAN
1324 * filter that needs to be removed.
1325 **/
1326 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1327 {
1328 struct i40e_aqc_remove_macvlan_element_data element;
1329 struct i40e_pf *pf = vsi->back;
1330 i40e_status ret;
1331
1332 /* Only appropriate for the PF main VSI */
1333 if (vsi->type != I40E_VSI_MAIN)
1334 return -EINVAL;
1335
1336 memset(&element, 0, sizeof(element));
1337 ether_addr_copy(element.mac_addr, macaddr);
1338 element.vlan_tag = 0;
1339 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1340 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1341 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1342 if (ret)
1343 return -ENOENT;
1344
1345 return 0;
1346 }
1347
1348 /**
1349 * i40e_add_filter - Add a mac/vlan filter to the VSI
1350 * @vsi: the VSI to be searched
1351 * @macaddr: the MAC address
1352 * @vlan: the vlan
1353 * @is_vf: make sure its a VF filter, else doesn't matter
1354 * @is_netdev: make sure its a netdev filter, else doesn't matter
1355 *
1356 * Returns ptr to the filter object or NULL when no memory available.
1357 **/
1358 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1359 u8 *macaddr, s16 vlan,
1360 bool is_vf, bool is_netdev)
1361 {
1362 struct i40e_mac_filter *f;
1363
1364 if (!vsi || !macaddr)
1365 return NULL;
1366
1367 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1368 if (!f) {
1369 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1370 if (!f)
1371 goto add_filter_out;
1372
1373 ether_addr_copy(f->macaddr, macaddr);
1374 f->vlan = vlan;
1375 f->changed = true;
1376
1377 INIT_LIST_HEAD(&f->list);
1378 list_add(&f->list, &vsi->mac_filter_list);
1379 }
1380
1381 /* increment counter and add a new flag if needed */
1382 if (is_vf) {
1383 if (!f->is_vf) {
1384 f->is_vf = true;
1385 f->counter++;
1386 }
1387 } else if (is_netdev) {
1388 if (!f->is_netdev) {
1389 f->is_netdev = true;
1390 f->counter++;
1391 }
1392 } else {
1393 f->counter++;
1394 }
1395
1396 /* changed tells sync_filters_subtask to
1397 * push the filter down to the firmware
1398 */
1399 if (f->changed) {
1400 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1401 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1402 }
1403
1404 add_filter_out:
1405 return f;
1406 }
1407
1408 /**
1409 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1410 * @vsi: the VSI to be searched
1411 * @macaddr: the MAC address
1412 * @vlan: the vlan
1413 * @is_vf: make sure it's a VF filter, else doesn't matter
1414 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1415 **/
1416 void i40e_del_filter(struct i40e_vsi *vsi,
1417 u8 *macaddr, s16 vlan,
1418 bool is_vf, bool is_netdev)
1419 {
1420 struct i40e_mac_filter *f;
1421
1422 if (!vsi || !macaddr)
1423 return;
1424
1425 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1426 if (!f || f->counter == 0)
1427 return;
1428
1429 if (is_vf) {
1430 if (f->is_vf) {
1431 f->is_vf = false;
1432 f->counter--;
1433 }
1434 } else if (is_netdev) {
1435 if (f->is_netdev) {
1436 f->is_netdev = false;
1437 f->counter--;
1438 }
1439 } else {
1440 /* make sure we don't remove a filter in use by VF or netdev */
1441 int min_f = 0;
1442 min_f += (f->is_vf ? 1 : 0);
1443 min_f += (f->is_netdev ? 1 : 0);
1444
1445 if (f->counter > min_f)
1446 f->counter--;
1447 }
1448
1449 /* counter == 0 tells sync_filters_subtask to
1450 * remove the filter from the firmware's list
1451 */
1452 if (f->counter == 0) {
1453 f->changed = true;
1454 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1455 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1456 }
1457 }
1458
1459 /**
1460 * i40e_set_mac - NDO callback to set mac address
1461 * @netdev: network interface device structure
1462 * @p: pointer to an address structure
1463 *
1464 * Returns 0 on success, negative on failure
1465 **/
1466 #ifdef I40E_FCOE
1467 int i40e_set_mac(struct net_device *netdev, void *p)
1468 #else
1469 static int i40e_set_mac(struct net_device *netdev, void *p)
1470 #endif
1471 {
1472 struct i40e_netdev_priv *np = netdev_priv(netdev);
1473 struct i40e_vsi *vsi = np->vsi;
1474 struct i40e_pf *pf = vsi->back;
1475 struct i40e_hw *hw = &pf->hw;
1476 struct sockaddr *addr = p;
1477 struct i40e_mac_filter *f;
1478
1479 if (!is_valid_ether_addr(addr->sa_data))
1480 return -EADDRNOTAVAIL;
1481
1482 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1483 netdev_info(netdev, "already using mac address %pM\n",
1484 addr->sa_data);
1485 return 0;
1486 }
1487
1488 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1489 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1490 return -EADDRNOTAVAIL;
1491
1492 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1493 netdev_info(netdev, "returning to hw mac address %pM\n",
1494 hw->mac.addr);
1495 else
1496 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1497
1498 if (vsi->type == I40E_VSI_MAIN) {
1499 i40e_status ret;
1500 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1501 I40E_AQC_WRITE_TYPE_LAA_WOL,
1502 addr->sa_data, NULL);
1503 if (ret) {
1504 netdev_info(netdev,
1505 "Addr change for Main VSI failed: %d\n",
1506 ret);
1507 return -EADDRNOTAVAIL;
1508 }
1509 }
1510
1511 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1512 struct i40e_aqc_remove_macvlan_element_data element;
1513
1514 memset(&element, 0, sizeof(element));
1515 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1516 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1517 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1518 } else {
1519 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1520 false, false);
1521 }
1522
1523 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1524 struct i40e_aqc_add_macvlan_element_data element;
1525
1526 memset(&element, 0, sizeof(element));
1527 ether_addr_copy(element.mac_addr, hw->mac.addr);
1528 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1529 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1530 } else {
1531 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1532 false, false);
1533 if (f)
1534 f->is_laa = true;
1535 }
1536
1537 i40e_sync_vsi_filters(vsi, false);
1538 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1539
1540 return 0;
1541 }
1542
1543 /**
1544 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1545 * @vsi: the VSI being setup
1546 * @ctxt: VSI context structure
1547 * @enabled_tc: Enabled TCs bitmap
1548 * @is_add: True if called before Add VSI
1549 *
1550 * Setup VSI queue mapping for enabled traffic classes.
1551 **/
1552 #ifdef I40E_FCOE
1553 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1554 struct i40e_vsi_context *ctxt,
1555 u8 enabled_tc,
1556 bool is_add)
1557 #else
1558 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1559 struct i40e_vsi_context *ctxt,
1560 u8 enabled_tc,
1561 bool is_add)
1562 #endif
1563 {
1564 struct i40e_pf *pf = vsi->back;
1565 u16 sections = 0;
1566 u8 netdev_tc = 0;
1567 u16 numtc = 0;
1568 u16 qcount;
1569 u8 offset;
1570 u16 qmap;
1571 int i;
1572 u16 num_tc_qps = 0;
1573
1574 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1575 offset = 0;
1576
1577 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1578 /* Find numtc from enabled TC bitmap */
1579 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1580 if (enabled_tc & BIT_ULL(i)) /* TC is enabled */
1581 numtc++;
1582 }
1583 if (!numtc) {
1584 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1585 numtc = 1;
1586 }
1587 } else {
1588 /* At least TC0 is enabled in case of non-DCB case */
1589 numtc = 1;
1590 }
1591
1592 vsi->tc_config.numtc = numtc;
1593 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1594 /* Number of queues per enabled TC */
1595 /* In MFP case we can have a much lower count of MSIx
1596 * vectors available and so we need to lower the used
1597 * q count.
1598 */
1599 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1600 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1601 else
1602 qcount = vsi->alloc_queue_pairs;
1603 num_tc_qps = qcount / numtc;
1604 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1605
1606 /* Setup queue offset/count for all TCs for given VSI */
1607 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1608 /* See if the given TC is enabled for the given VSI */
1609 if (vsi->tc_config.enabled_tc & BIT_ULL(i)) {
1610 /* TC is enabled */
1611 int pow, num_qps;
1612
1613 switch (vsi->type) {
1614 case I40E_VSI_MAIN:
1615 qcount = min_t(int, pf->rss_size, num_tc_qps);
1616 break;
1617 #ifdef I40E_FCOE
1618 case I40E_VSI_FCOE:
1619 qcount = num_tc_qps;
1620 break;
1621 #endif
1622 case I40E_VSI_FDIR:
1623 case I40E_VSI_SRIOV:
1624 case I40E_VSI_VMDQ2:
1625 default:
1626 qcount = num_tc_qps;
1627 WARN_ON(i != 0);
1628 break;
1629 }
1630 vsi->tc_config.tc_info[i].qoffset = offset;
1631 vsi->tc_config.tc_info[i].qcount = qcount;
1632
1633 /* find the next higher power-of-2 of num queue pairs */
1634 num_qps = qcount;
1635 pow = 0;
1636 while (num_qps && (BIT_ULL(pow) < qcount)) {
1637 pow++;
1638 num_qps >>= 1;
1639 }
1640
1641 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1642 qmap =
1643 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1644 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1645
1646 offset += qcount;
1647 } else {
1648 /* TC is not enabled so set the offset to
1649 * default queue and allocate one queue
1650 * for the given TC.
1651 */
1652 vsi->tc_config.tc_info[i].qoffset = 0;
1653 vsi->tc_config.tc_info[i].qcount = 1;
1654 vsi->tc_config.tc_info[i].netdev_tc = 0;
1655
1656 qmap = 0;
1657 }
1658 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1659 }
1660
1661 /* Set actual Tx/Rx queue pairs */
1662 vsi->num_queue_pairs = offset;
1663 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1664 if (vsi->req_queue_pairs > 0)
1665 vsi->num_queue_pairs = vsi->req_queue_pairs;
1666 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1667 vsi->num_queue_pairs = pf->num_lan_msix;
1668 }
1669
1670 /* Scheduler section valid can only be set for ADD VSI */
1671 if (is_add) {
1672 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1673
1674 ctxt->info.up_enable_bits = enabled_tc;
1675 }
1676 if (vsi->type == I40E_VSI_SRIOV) {
1677 ctxt->info.mapping_flags |=
1678 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1679 for (i = 0; i < vsi->num_queue_pairs; i++)
1680 ctxt->info.queue_mapping[i] =
1681 cpu_to_le16(vsi->base_queue + i);
1682 } else {
1683 ctxt->info.mapping_flags |=
1684 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1685 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1686 }
1687 ctxt->info.valid_sections |= cpu_to_le16(sections);
1688 }
1689
1690 /**
1691 * i40e_set_rx_mode - NDO callback to set the netdev filters
1692 * @netdev: network interface device structure
1693 **/
1694 #ifdef I40E_FCOE
1695 void i40e_set_rx_mode(struct net_device *netdev)
1696 #else
1697 static void i40e_set_rx_mode(struct net_device *netdev)
1698 #endif
1699 {
1700 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 struct i40e_mac_filter *f, *ftmp;
1702 struct i40e_vsi *vsi = np->vsi;
1703 struct netdev_hw_addr *uca;
1704 struct netdev_hw_addr *mca;
1705 struct netdev_hw_addr *ha;
1706
1707 /* add addr if not already in the filter list */
1708 netdev_for_each_uc_addr(uca, netdev) {
1709 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1710 if (i40e_is_vsi_in_vlan(vsi))
1711 i40e_put_mac_in_vlan(vsi, uca->addr,
1712 false, true);
1713 else
1714 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1715 false, true);
1716 }
1717 }
1718
1719 netdev_for_each_mc_addr(mca, netdev) {
1720 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1721 if (i40e_is_vsi_in_vlan(vsi))
1722 i40e_put_mac_in_vlan(vsi, mca->addr,
1723 false, true);
1724 else
1725 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1726 false, true);
1727 }
1728 }
1729
1730 /* remove filter if not in netdev list */
1731 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1732
1733 if (!f->is_netdev)
1734 continue;
1735
1736 netdev_for_each_mc_addr(mca, netdev)
1737 if (ether_addr_equal(mca->addr, f->macaddr))
1738 goto bottom_of_search_loop;
1739
1740 netdev_for_each_uc_addr(uca, netdev)
1741 if (ether_addr_equal(uca->addr, f->macaddr))
1742 goto bottom_of_search_loop;
1743
1744 for_each_dev_addr(netdev, ha)
1745 if (ether_addr_equal(ha->addr, f->macaddr))
1746 goto bottom_of_search_loop;
1747
1748 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1749 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1750
1751 bottom_of_search_loop:
1752 continue;
1753 }
1754
1755 /* check for other flag changes */
1756 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1757 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1758 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1759 }
1760 }
1761
1762 /**
1763 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1764 * @vsi: ptr to the VSI
1765 * @grab_rtnl: whether RTNL needs to be grabbed
1766 *
1767 * Push any outstanding VSI filter changes through the AdminQ.
1768 *
1769 * Returns 0 or error value
1770 **/
1771 int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl)
1772 {
1773 struct i40e_mac_filter *f, *ftmp;
1774 bool promisc_forced_on = false;
1775 bool add_happened = false;
1776 int filter_list_len = 0;
1777 u32 changed_flags = 0;
1778 i40e_status ret = 0;
1779 struct i40e_pf *pf;
1780 int num_add = 0;
1781 int num_del = 0;
1782 int aq_err = 0;
1783 u16 cmd_flags;
1784
1785 /* empty array typed pointers, kcalloc later */
1786 struct i40e_aqc_add_macvlan_element_data *add_list;
1787 struct i40e_aqc_remove_macvlan_element_data *del_list;
1788
1789 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1790 usleep_range(1000, 2000);
1791 pf = vsi->back;
1792
1793 if (vsi->netdev) {
1794 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1795 vsi->current_netdev_flags = vsi->netdev->flags;
1796 }
1797
1798 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1799 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1800
1801 filter_list_len = pf->hw.aq.asq_buf_size /
1802 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1803 del_list = kcalloc(filter_list_len,
1804 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1805 GFP_KERNEL);
1806 if (!del_list)
1807 return -ENOMEM;
1808
1809 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1810 if (!f->changed)
1811 continue;
1812
1813 if (f->counter != 0)
1814 continue;
1815 f->changed = false;
1816 cmd_flags = 0;
1817
1818 /* add to delete list */
1819 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1820 del_list[num_del].vlan_tag =
1821 cpu_to_le16((u16)(f->vlan ==
1822 I40E_VLAN_ANY ? 0 : f->vlan));
1823
1824 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1825 del_list[num_del].flags = cmd_flags;
1826 num_del++;
1827
1828 /* unlink from filter list */
1829 list_del(&f->list);
1830 kfree(f);
1831
1832 /* flush a full buffer */
1833 if (num_del == filter_list_len) {
1834 ret = i40e_aq_remove_macvlan(&pf->hw,
1835 vsi->seid, del_list, num_del,
1836 NULL);
1837 aq_err = pf->hw.aq.asq_last_status;
1838 num_del = 0;
1839 memset(del_list, 0, sizeof(*del_list));
1840
1841 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1842 dev_info(&pf->pdev->dev,
1843 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1844 i40e_stat_str(&pf->hw, ret),
1845 i40e_aq_str(&pf->hw, aq_err));
1846 }
1847 }
1848 if (num_del) {
1849 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1850 del_list, num_del, NULL);
1851 aq_err = pf->hw.aq.asq_last_status;
1852 num_del = 0;
1853
1854 if (ret && aq_err != I40E_AQ_RC_ENOENT)
1855 dev_info(&pf->pdev->dev,
1856 "ignoring delete macvlan error, err %s aq_err %s\n",
1857 i40e_stat_str(&pf->hw, ret),
1858 i40e_aq_str(&pf->hw, aq_err));
1859 }
1860
1861 kfree(del_list);
1862 del_list = NULL;
1863
1864 /* do all the adds now */
1865 filter_list_len = pf->hw.aq.asq_buf_size /
1866 sizeof(struct i40e_aqc_add_macvlan_element_data),
1867 add_list = kcalloc(filter_list_len,
1868 sizeof(struct i40e_aqc_add_macvlan_element_data),
1869 GFP_KERNEL);
1870 if (!add_list)
1871 return -ENOMEM;
1872
1873 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1874 if (!f->changed)
1875 continue;
1876
1877 if (f->counter == 0)
1878 continue;
1879 f->changed = false;
1880 add_happened = true;
1881 cmd_flags = 0;
1882
1883 /* add to add array */
1884 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1885 add_list[num_add].vlan_tag =
1886 cpu_to_le16(
1887 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1888 add_list[num_add].queue_number = 0;
1889
1890 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1891 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1892 num_add++;
1893
1894 /* flush a full buffer */
1895 if (num_add == filter_list_len) {
1896 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1897 add_list, num_add,
1898 NULL);
1899 aq_err = pf->hw.aq.asq_last_status;
1900 num_add = 0;
1901
1902 if (ret)
1903 break;
1904 memset(add_list, 0, sizeof(*add_list));
1905 }
1906 }
1907 if (num_add) {
1908 ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1909 add_list, num_add, NULL);
1910 aq_err = pf->hw.aq.asq_last_status;
1911 num_add = 0;
1912 }
1913 kfree(add_list);
1914 add_list = NULL;
1915
1916 if (add_happened && ret && aq_err != I40E_AQ_RC_EINVAL) {
1917 dev_info(&pf->pdev->dev,
1918 "add filter failed, err %s aq_err %s\n",
1919 i40e_stat_str(&pf->hw, ret),
1920 i40e_aq_str(&pf->hw, aq_err));
1921 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1922 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1923 &vsi->state)) {
1924 promisc_forced_on = true;
1925 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1926 &vsi->state);
1927 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1928 }
1929 }
1930 }
1931
1932 /* check for changes in promiscuous modes */
1933 if (changed_flags & IFF_ALLMULTI) {
1934 bool cur_multipromisc;
1935 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1936 ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1937 vsi->seid,
1938 cur_multipromisc,
1939 NULL);
1940 if (ret)
1941 dev_info(&pf->pdev->dev,
1942 "set multi promisc failed, err %s aq_err %s\n",
1943 i40e_stat_str(&pf->hw, ret),
1944 i40e_aq_str(&pf->hw,
1945 pf->hw.aq.asq_last_status));
1946 }
1947 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1948 bool cur_promisc;
1949 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1950 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1951 &vsi->state));
1952 if (vsi->type == I40E_VSI_MAIN && pf->lan_veb != I40E_NO_VEB) {
1953 /* set defport ON for Main VSI instead of true promisc
1954 * this way we will get all unicast/multicast and VLAN
1955 * promisc behavior but will not get VF or VMDq traffic
1956 * replicated on the Main VSI.
1957 */
1958 if (pf->cur_promisc != cur_promisc) {
1959 pf->cur_promisc = cur_promisc;
1960 if (grab_rtnl)
1961 i40e_do_reset_safe(pf,
1962 BIT(__I40E_PF_RESET_REQUESTED));
1963 else
1964 i40e_do_reset(pf,
1965 BIT(__I40E_PF_RESET_REQUESTED));
1966 }
1967 } else {
1968 ret = i40e_aq_set_vsi_unicast_promiscuous(
1969 &vsi->back->hw,
1970 vsi->seid,
1971 cur_promisc, NULL);
1972 if (ret)
1973 dev_info(&pf->pdev->dev,
1974 "set unicast promisc failed, err %d, aq_err %d\n",
1975 ret, pf->hw.aq.asq_last_status);
1976 ret = i40e_aq_set_vsi_multicast_promiscuous(
1977 &vsi->back->hw,
1978 vsi->seid,
1979 cur_promisc, NULL);
1980 if (ret)
1981 dev_info(&pf->pdev->dev,
1982 "set multicast promisc failed, err %d, aq_err %d\n",
1983 ret, pf->hw.aq.asq_last_status);
1984 }
1985 ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1986 vsi->seid,
1987 cur_promisc, NULL);
1988 if (ret)
1989 dev_info(&pf->pdev->dev,
1990 "set brdcast promisc failed, err %s, aq_err %s\n",
1991 i40e_stat_str(&pf->hw, ret),
1992 i40e_aq_str(&pf->hw,
1993 pf->hw.aq.asq_last_status));
1994 }
1995
1996 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1997 return 0;
1998 }
1999
2000 /**
2001 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2002 * @pf: board private structure
2003 **/
2004 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2005 {
2006 int v;
2007
2008 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2009 return;
2010 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2011
2012 for (v = 0; v < pf->num_alloc_vsi; v++) {
2013 if (pf->vsi[v] &&
2014 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
2015 i40e_sync_vsi_filters(pf->vsi[v], true);
2016 }
2017 }
2018
2019 /**
2020 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2021 * @netdev: network interface device structure
2022 * @new_mtu: new value for maximum frame size
2023 *
2024 * Returns 0 on success, negative on failure
2025 **/
2026 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2027 {
2028 struct i40e_netdev_priv *np = netdev_priv(netdev);
2029 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2030 struct i40e_vsi *vsi = np->vsi;
2031
2032 /* MTU < 68 is an error and causes problems on some kernels */
2033 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2034 return -EINVAL;
2035
2036 netdev_info(netdev, "changing MTU from %d to %d\n",
2037 netdev->mtu, new_mtu);
2038 netdev->mtu = new_mtu;
2039 if (netif_running(netdev))
2040 i40e_vsi_reinit_locked(vsi);
2041
2042 return 0;
2043 }
2044
2045 /**
2046 * i40e_ioctl - Access the hwtstamp interface
2047 * @netdev: network interface device structure
2048 * @ifr: interface request data
2049 * @cmd: ioctl command
2050 **/
2051 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2052 {
2053 struct i40e_netdev_priv *np = netdev_priv(netdev);
2054 struct i40e_pf *pf = np->vsi->back;
2055
2056 switch (cmd) {
2057 case SIOCGHWTSTAMP:
2058 return i40e_ptp_get_ts_config(pf, ifr);
2059 case SIOCSHWTSTAMP:
2060 return i40e_ptp_set_ts_config(pf, ifr);
2061 default:
2062 return -EOPNOTSUPP;
2063 }
2064 }
2065
2066 /**
2067 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2068 * @vsi: the vsi being adjusted
2069 **/
2070 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2071 {
2072 struct i40e_vsi_context ctxt;
2073 i40e_status ret;
2074
2075 if ((vsi->info.valid_sections &
2076 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2077 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2078 return; /* already enabled */
2079
2080 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2081 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2082 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2083
2084 ctxt.seid = vsi->seid;
2085 ctxt.info = vsi->info;
2086 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2087 if (ret) {
2088 dev_info(&vsi->back->pdev->dev,
2089 "update vlan stripping failed, err %s aq_err %s\n",
2090 i40e_stat_str(&vsi->back->hw, ret),
2091 i40e_aq_str(&vsi->back->hw,
2092 vsi->back->hw.aq.asq_last_status));
2093 }
2094 }
2095
2096 /**
2097 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2098 * @vsi: the vsi being adjusted
2099 **/
2100 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2101 {
2102 struct i40e_vsi_context ctxt;
2103 i40e_status ret;
2104
2105 if ((vsi->info.valid_sections &
2106 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2107 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2108 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2109 return; /* already disabled */
2110
2111 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2112 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2113 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2114
2115 ctxt.seid = vsi->seid;
2116 ctxt.info = vsi->info;
2117 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2118 if (ret) {
2119 dev_info(&vsi->back->pdev->dev,
2120 "update vlan stripping failed, err %s aq_err %s\n",
2121 i40e_stat_str(&vsi->back->hw, ret),
2122 i40e_aq_str(&vsi->back->hw,
2123 vsi->back->hw.aq.asq_last_status));
2124 }
2125 }
2126
2127 /**
2128 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2129 * @netdev: network interface to be adjusted
2130 * @features: netdev features to test if VLAN offload is enabled or not
2131 **/
2132 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2133 {
2134 struct i40e_netdev_priv *np = netdev_priv(netdev);
2135 struct i40e_vsi *vsi = np->vsi;
2136
2137 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2138 i40e_vlan_stripping_enable(vsi);
2139 else
2140 i40e_vlan_stripping_disable(vsi);
2141 }
2142
2143 /**
2144 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2145 * @vsi: the vsi being configured
2146 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2147 **/
2148 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2149 {
2150 struct i40e_mac_filter *f, *add_f;
2151 bool is_netdev, is_vf;
2152
2153 is_vf = (vsi->type == I40E_VSI_SRIOV);
2154 is_netdev = !!(vsi->netdev);
2155
2156 if (is_netdev) {
2157 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2158 is_vf, is_netdev);
2159 if (!add_f) {
2160 dev_info(&vsi->back->pdev->dev,
2161 "Could not add vlan filter %d for %pM\n",
2162 vid, vsi->netdev->dev_addr);
2163 return -ENOMEM;
2164 }
2165 }
2166
2167 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2168 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2169 if (!add_f) {
2170 dev_info(&vsi->back->pdev->dev,
2171 "Could not add vlan filter %d for %pM\n",
2172 vid, f->macaddr);
2173 return -ENOMEM;
2174 }
2175 }
2176
2177 /* Now if we add a vlan tag, make sure to check if it is the first
2178 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2179 * with 0, so we now accept untagged and specified tagged traffic
2180 * (and not any taged and untagged)
2181 */
2182 if (vid > 0) {
2183 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2184 I40E_VLAN_ANY,
2185 is_vf, is_netdev)) {
2186 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2187 I40E_VLAN_ANY, is_vf, is_netdev);
2188 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2189 is_vf, is_netdev);
2190 if (!add_f) {
2191 dev_info(&vsi->back->pdev->dev,
2192 "Could not add filter 0 for %pM\n",
2193 vsi->netdev->dev_addr);
2194 return -ENOMEM;
2195 }
2196 }
2197 }
2198
2199 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2200 if (vid > 0 && !vsi->info.pvid) {
2201 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2202 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2203 is_vf, is_netdev)) {
2204 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2205 is_vf, is_netdev);
2206 add_f = i40e_add_filter(vsi, f->macaddr,
2207 0, is_vf, is_netdev);
2208 if (!add_f) {
2209 dev_info(&vsi->back->pdev->dev,
2210 "Could not add filter 0 for %pM\n",
2211 f->macaddr);
2212 return -ENOMEM;
2213 }
2214 }
2215 }
2216 }
2217
2218 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2219 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2220 return 0;
2221
2222 return i40e_sync_vsi_filters(vsi, false);
2223 }
2224
2225 /**
2226 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2227 * @vsi: the vsi being configured
2228 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2229 *
2230 * Return: 0 on success or negative otherwise
2231 **/
2232 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2233 {
2234 struct net_device *netdev = vsi->netdev;
2235 struct i40e_mac_filter *f, *add_f;
2236 bool is_vf, is_netdev;
2237 int filter_count = 0;
2238
2239 is_vf = (vsi->type == I40E_VSI_SRIOV);
2240 is_netdev = !!(netdev);
2241
2242 if (is_netdev)
2243 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2244
2245 list_for_each_entry(f, &vsi->mac_filter_list, list)
2246 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2247
2248 /* go through all the filters for this VSI and if there is only
2249 * vid == 0 it means there are no other filters, so vid 0 must
2250 * be replaced with -1. This signifies that we should from now
2251 * on accept any traffic (with any tag present, or untagged)
2252 */
2253 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2254 if (is_netdev) {
2255 if (f->vlan &&
2256 ether_addr_equal(netdev->dev_addr, f->macaddr))
2257 filter_count++;
2258 }
2259
2260 if (f->vlan)
2261 filter_count++;
2262 }
2263
2264 if (!filter_count && is_netdev) {
2265 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2266 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2267 is_vf, is_netdev);
2268 if (!f) {
2269 dev_info(&vsi->back->pdev->dev,
2270 "Could not add filter %d for %pM\n",
2271 I40E_VLAN_ANY, netdev->dev_addr);
2272 return -ENOMEM;
2273 }
2274 }
2275
2276 if (!filter_count) {
2277 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2278 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2279 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2280 is_vf, is_netdev);
2281 if (!add_f) {
2282 dev_info(&vsi->back->pdev->dev,
2283 "Could not add filter %d for %pM\n",
2284 I40E_VLAN_ANY, f->macaddr);
2285 return -ENOMEM;
2286 }
2287 }
2288 }
2289
2290 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2291 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2292 return 0;
2293
2294 return i40e_sync_vsi_filters(vsi, false);
2295 }
2296
2297 /**
2298 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2299 * @netdev: network interface to be adjusted
2300 * @vid: vlan id to be added
2301 *
2302 * net_device_ops implementation for adding vlan ids
2303 **/
2304 #ifdef I40E_FCOE
2305 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2306 __always_unused __be16 proto, u16 vid)
2307 #else
2308 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2309 __always_unused __be16 proto, u16 vid)
2310 #endif
2311 {
2312 struct i40e_netdev_priv *np = netdev_priv(netdev);
2313 struct i40e_vsi *vsi = np->vsi;
2314 int ret = 0;
2315
2316 if (vid > 4095)
2317 return -EINVAL;
2318
2319 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2320
2321 /* If the network stack called us with vid = 0 then
2322 * it is asking to receive priority tagged packets with
2323 * vlan id 0. Our HW receives them by default when configured
2324 * to receive untagged packets so there is no need to add an
2325 * extra filter for vlan 0 tagged packets.
2326 */
2327 if (vid)
2328 ret = i40e_vsi_add_vlan(vsi, vid);
2329
2330 if (!ret && (vid < VLAN_N_VID))
2331 set_bit(vid, vsi->active_vlans);
2332
2333 return ret;
2334 }
2335
2336 /**
2337 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2338 * @netdev: network interface to be adjusted
2339 * @vid: vlan id to be removed
2340 *
2341 * net_device_ops implementation for removing vlan ids
2342 **/
2343 #ifdef I40E_FCOE
2344 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2345 __always_unused __be16 proto, u16 vid)
2346 #else
2347 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2348 __always_unused __be16 proto, u16 vid)
2349 #endif
2350 {
2351 struct i40e_netdev_priv *np = netdev_priv(netdev);
2352 struct i40e_vsi *vsi = np->vsi;
2353
2354 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2355
2356 /* return code is ignored as there is nothing a user
2357 * can do about failure to remove and a log message was
2358 * already printed from the other function
2359 */
2360 i40e_vsi_kill_vlan(vsi, vid);
2361
2362 clear_bit(vid, vsi->active_vlans);
2363
2364 return 0;
2365 }
2366
2367 /**
2368 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2369 * @vsi: the vsi being brought back up
2370 **/
2371 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2372 {
2373 u16 vid;
2374
2375 if (!vsi->netdev)
2376 return;
2377
2378 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2379
2380 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2381 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2382 vid);
2383 }
2384
2385 /**
2386 * i40e_vsi_add_pvid - Add pvid for the VSI
2387 * @vsi: the vsi being adjusted
2388 * @vid: the vlan id to set as a PVID
2389 **/
2390 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2391 {
2392 struct i40e_vsi_context ctxt;
2393 i40e_status ret;
2394
2395 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2396 vsi->info.pvid = cpu_to_le16(vid);
2397 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2398 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2399 I40E_AQ_VSI_PVLAN_EMOD_STR;
2400
2401 ctxt.seid = vsi->seid;
2402 ctxt.info = vsi->info;
2403 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2404 if (ret) {
2405 dev_info(&vsi->back->pdev->dev,
2406 "add pvid failed, err %s aq_err %s\n",
2407 i40e_stat_str(&vsi->back->hw, ret),
2408 i40e_aq_str(&vsi->back->hw,
2409 vsi->back->hw.aq.asq_last_status));
2410 return -ENOENT;
2411 }
2412
2413 return 0;
2414 }
2415
2416 /**
2417 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2418 * @vsi: the vsi being adjusted
2419 *
2420 * Just use the vlan_rx_register() service to put it back to normal
2421 **/
2422 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2423 {
2424 i40e_vlan_stripping_disable(vsi);
2425
2426 vsi->info.pvid = 0;
2427 }
2428
2429 /**
2430 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2431 * @vsi: ptr to the VSI
2432 *
2433 * If this function returns with an error, then it's possible one or
2434 * more of the rings is populated (while the rest are not). It is the
2435 * callers duty to clean those orphaned rings.
2436 *
2437 * Return 0 on success, negative on failure
2438 **/
2439 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2440 {
2441 int i, err = 0;
2442
2443 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2444 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2445
2446 return err;
2447 }
2448
2449 /**
2450 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2451 * @vsi: ptr to the VSI
2452 *
2453 * Free VSI's transmit software resources
2454 **/
2455 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2456 {
2457 int i;
2458
2459 if (!vsi->tx_rings)
2460 return;
2461
2462 for (i = 0; i < vsi->num_queue_pairs; i++)
2463 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2464 i40e_free_tx_resources(vsi->tx_rings[i]);
2465 }
2466
2467 /**
2468 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2469 * @vsi: ptr to the VSI
2470 *
2471 * If this function returns with an error, then it's possible one or
2472 * more of the rings is populated (while the rest are not). It is the
2473 * callers duty to clean those orphaned rings.
2474 *
2475 * Return 0 on success, negative on failure
2476 **/
2477 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2478 {
2479 int i, err = 0;
2480
2481 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2482 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2483 #ifdef I40E_FCOE
2484 i40e_fcoe_setup_ddp_resources(vsi);
2485 #endif
2486 return err;
2487 }
2488
2489 /**
2490 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2491 * @vsi: ptr to the VSI
2492 *
2493 * Free all receive software resources
2494 **/
2495 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2496 {
2497 int i;
2498
2499 if (!vsi->rx_rings)
2500 return;
2501
2502 for (i = 0; i < vsi->num_queue_pairs; i++)
2503 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2504 i40e_free_rx_resources(vsi->rx_rings[i]);
2505 #ifdef I40E_FCOE
2506 i40e_fcoe_free_ddp_resources(vsi);
2507 #endif
2508 }
2509
2510 /**
2511 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2512 * @ring: The Tx ring to configure
2513 *
2514 * This enables/disables XPS for a given Tx descriptor ring
2515 * based on the TCs enabled for the VSI that ring belongs to.
2516 **/
2517 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2518 {
2519 struct i40e_vsi *vsi = ring->vsi;
2520 cpumask_var_t mask;
2521
2522 if (!ring->q_vector || !ring->netdev)
2523 return;
2524
2525 /* Single TC mode enable XPS */
2526 if (vsi->tc_config.numtc <= 1) {
2527 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2528 netif_set_xps_queue(ring->netdev,
2529 &ring->q_vector->affinity_mask,
2530 ring->queue_index);
2531 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2532 /* Disable XPS to allow selection based on TC */
2533 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2534 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2535 free_cpumask_var(mask);
2536 }
2537 }
2538
2539 /**
2540 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2541 * @ring: The Tx ring to configure
2542 *
2543 * Configure the Tx descriptor ring in the HMC context.
2544 **/
2545 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2546 {
2547 struct i40e_vsi *vsi = ring->vsi;
2548 u16 pf_q = vsi->base_queue + ring->queue_index;
2549 struct i40e_hw *hw = &vsi->back->hw;
2550 struct i40e_hmc_obj_txq tx_ctx;
2551 i40e_status err = 0;
2552 u32 qtx_ctl = 0;
2553
2554 /* some ATR related tx ring init */
2555 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2556 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2557 ring->atr_count = 0;
2558 } else {
2559 ring->atr_sample_rate = 0;
2560 }
2561
2562 /* configure XPS */
2563 i40e_config_xps_tx_ring(ring);
2564
2565 /* clear the context structure first */
2566 memset(&tx_ctx, 0, sizeof(tx_ctx));
2567
2568 tx_ctx.new_context = 1;
2569 tx_ctx.base = (ring->dma / 128);
2570 tx_ctx.qlen = ring->count;
2571 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2572 I40E_FLAG_FD_ATR_ENABLED));
2573 #ifdef I40E_FCOE
2574 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2575 #endif
2576 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2577 /* FDIR VSI tx ring can still use RS bit and writebacks */
2578 if (vsi->type != I40E_VSI_FDIR)
2579 tx_ctx.head_wb_ena = 1;
2580 tx_ctx.head_wb_addr = ring->dma +
2581 (ring->count * sizeof(struct i40e_tx_desc));
2582
2583 /* As part of VSI creation/update, FW allocates certain
2584 * Tx arbitration queue sets for each TC enabled for
2585 * the VSI. The FW returns the handles to these queue
2586 * sets as part of the response buffer to Add VSI,
2587 * Update VSI, etc. AQ commands. It is expected that
2588 * these queue set handles be associated with the Tx
2589 * queues by the driver as part of the TX queue context
2590 * initialization. This has to be done regardless of
2591 * DCB as by default everything is mapped to TC0.
2592 */
2593 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2594 tx_ctx.rdylist_act = 0;
2595
2596 /* clear the context in the HMC */
2597 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2598 if (err) {
2599 dev_info(&vsi->back->pdev->dev,
2600 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2601 ring->queue_index, pf_q, err);
2602 return -ENOMEM;
2603 }
2604
2605 /* set the context in the HMC */
2606 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2607 if (err) {
2608 dev_info(&vsi->back->pdev->dev,
2609 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2610 ring->queue_index, pf_q, err);
2611 return -ENOMEM;
2612 }
2613
2614 /* Now associate this queue with this PCI function */
2615 if (vsi->type == I40E_VSI_VMDQ2) {
2616 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2617 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2618 I40E_QTX_CTL_VFVM_INDX_MASK;
2619 } else {
2620 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2621 }
2622
2623 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2624 I40E_QTX_CTL_PF_INDX_MASK);
2625 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2626 i40e_flush(hw);
2627
2628 /* cache tail off for easier writes later */
2629 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2630
2631 return 0;
2632 }
2633
2634 /**
2635 * i40e_configure_rx_ring - Configure a receive ring context
2636 * @ring: The Rx ring to configure
2637 *
2638 * Configure the Rx descriptor ring in the HMC context.
2639 **/
2640 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2641 {
2642 struct i40e_vsi *vsi = ring->vsi;
2643 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2644 u16 pf_q = vsi->base_queue + ring->queue_index;
2645 struct i40e_hw *hw = &vsi->back->hw;
2646 struct i40e_hmc_obj_rxq rx_ctx;
2647 i40e_status err = 0;
2648
2649 ring->state = 0;
2650
2651 /* clear the context structure first */
2652 memset(&rx_ctx, 0, sizeof(rx_ctx));
2653
2654 ring->rx_buf_len = vsi->rx_buf_len;
2655 ring->rx_hdr_len = vsi->rx_hdr_len;
2656
2657 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2658 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2659
2660 rx_ctx.base = (ring->dma / 128);
2661 rx_ctx.qlen = ring->count;
2662
2663 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2664 set_ring_16byte_desc_enabled(ring);
2665 rx_ctx.dsize = 0;
2666 } else {
2667 rx_ctx.dsize = 1;
2668 }
2669
2670 rx_ctx.dtype = vsi->dtype;
2671 if (vsi->dtype) {
2672 set_ring_ps_enabled(ring);
2673 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2674 I40E_RX_SPLIT_IP |
2675 I40E_RX_SPLIT_TCP_UDP |
2676 I40E_RX_SPLIT_SCTP;
2677 } else {
2678 rx_ctx.hsplit_0 = 0;
2679 }
2680
2681 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2682 (chain_len * ring->rx_buf_len));
2683 if (hw->revision_id == 0)
2684 rx_ctx.lrxqthresh = 0;
2685 else
2686 rx_ctx.lrxqthresh = 2;
2687 rx_ctx.crcstrip = 1;
2688 rx_ctx.l2tsel = 1;
2689 /* this controls whether VLAN is stripped from inner headers */
2690 rx_ctx.showiv = 0;
2691 #ifdef I40E_FCOE
2692 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2693 #endif
2694 /* set the prefena field to 1 because the manual says to */
2695 rx_ctx.prefena = 1;
2696
2697 /* clear the context in the HMC */
2698 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2699 if (err) {
2700 dev_info(&vsi->back->pdev->dev,
2701 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2702 ring->queue_index, pf_q, err);
2703 return -ENOMEM;
2704 }
2705
2706 /* set the context in the HMC */
2707 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2708 if (err) {
2709 dev_info(&vsi->back->pdev->dev,
2710 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2711 ring->queue_index, pf_q, err);
2712 return -ENOMEM;
2713 }
2714
2715 /* cache tail for quicker writes, and clear the reg before use */
2716 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2717 writel(0, ring->tail);
2718
2719 if (ring_is_ps_enabled(ring)) {
2720 i40e_alloc_rx_headers(ring);
2721 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2722 } else {
2723 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2724 }
2725
2726 return 0;
2727 }
2728
2729 /**
2730 * i40e_vsi_configure_tx - Configure the VSI for Tx
2731 * @vsi: VSI structure describing this set of rings and resources
2732 *
2733 * Configure the Tx VSI for operation.
2734 **/
2735 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2736 {
2737 int err = 0;
2738 u16 i;
2739
2740 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2741 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2742
2743 return err;
2744 }
2745
2746 /**
2747 * i40e_vsi_configure_rx - Configure the VSI for Rx
2748 * @vsi: the VSI being configured
2749 *
2750 * Configure the Rx VSI for operation.
2751 **/
2752 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2753 {
2754 int err = 0;
2755 u16 i;
2756
2757 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2758 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2759 + ETH_FCS_LEN + VLAN_HLEN;
2760 else
2761 vsi->max_frame = I40E_RXBUFFER_2048;
2762
2763 /* figure out correct receive buffer length */
2764 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2765 I40E_FLAG_RX_PS_ENABLED)) {
2766 case I40E_FLAG_RX_1BUF_ENABLED:
2767 vsi->rx_hdr_len = 0;
2768 vsi->rx_buf_len = vsi->max_frame;
2769 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2770 break;
2771 case I40E_FLAG_RX_PS_ENABLED:
2772 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2773 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2774 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2775 break;
2776 default:
2777 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2778 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2779 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2780 break;
2781 }
2782
2783 #ifdef I40E_FCOE
2784 /* setup rx buffer for FCoE */
2785 if ((vsi->type == I40E_VSI_FCOE) &&
2786 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2787 vsi->rx_hdr_len = 0;
2788 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2789 vsi->max_frame = I40E_RXBUFFER_3072;
2790 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2791 }
2792
2793 #endif /* I40E_FCOE */
2794 /* round up for the chip's needs */
2795 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2796 BIT_ULL(I40E_RXQ_CTX_HBUFF_SHIFT));
2797 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2798 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2799
2800 /* set up individual rings */
2801 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2802 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2803
2804 return err;
2805 }
2806
2807 /**
2808 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2809 * @vsi: ptr to the VSI
2810 **/
2811 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2812 {
2813 struct i40e_ring *tx_ring, *rx_ring;
2814 u16 qoffset, qcount;
2815 int i, n;
2816
2817 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2818 /* Reset the TC information */
2819 for (i = 0; i < vsi->num_queue_pairs; i++) {
2820 rx_ring = vsi->rx_rings[i];
2821 tx_ring = vsi->tx_rings[i];
2822 rx_ring->dcb_tc = 0;
2823 tx_ring->dcb_tc = 0;
2824 }
2825 }
2826
2827 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2828 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2829 continue;
2830
2831 qoffset = vsi->tc_config.tc_info[n].qoffset;
2832 qcount = vsi->tc_config.tc_info[n].qcount;
2833 for (i = qoffset; i < (qoffset + qcount); i++) {
2834 rx_ring = vsi->rx_rings[i];
2835 tx_ring = vsi->tx_rings[i];
2836 rx_ring->dcb_tc = n;
2837 tx_ring->dcb_tc = n;
2838 }
2839 }
2840 }
2841
2842 /**
2843 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2844 * @vsi: ptr to the VSI
2845 **/
2846 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2847 {
2848 if (vsi->netdev)
2849 i40e_set_rx_mode(vsi->netdev);
2850 }
2851
2852 /**
2853 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2854 * @vsi: Pointer to the targeted VSI
2855 *
2856 * This function replays the hlist on the hw where all the SB Flow Director
2857 * filters were saved.
2858 **/
2859 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2860 {
2861 struct i40e_fdir_filter *filter;
2862 struct i40e_pf *pf = vsi->back;
2863 struct hlist_node *node;
2864
2865 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2866 return;
2867
2868 hlist_for_each_entry_safe(filter, node,
2869 &pf->fdir_filter_list, fdir_node) {
2870 i40e_add_del_fdir(vsi, filter, true);
2871 }
2872 }
2873
2874 /**
2875 * i40e_vsi_configure - Set up the VSI for action
2876 * @vsi: the VSI being configured
2877 **/
2878 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2879 {
2880 int err;
2881
2882 i40e_set_vsi_rx_mode(vsi);
2883 i40e_restore_vlan(vsi);
2884 i40e_vsi_config_dcb_rings(vsi);
2885 err = i40e_vsi_configure_tx(vsi);
2886 if (!err)
2887 err = i40e_vsi_configure_rx(vsi);
2888
2889 return err;
2890 }
2891
2892 /**
2893 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2894 * @vsi: the VSI being configured
2895 **/
2896 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2897 {
2898 struct i40e_pf *pf = vsi->back;
2899 struct i40e_q_vector *q_vector;
2900 struct i40e_hw *hw = &pf->hw;
2901 u16 vector;
2902 int i, q;
2903 u32 val;
2904 u32 qp;
2905
2906 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2907 * and PFINT_LNKLSTn registers, e.g.:
2908 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2909 */
2910 qp = vsi->base_queue;
2911 vector = vsi->base_vector;
2912 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2913 q_vector = vsi->q_vectors[i];
2914 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2915 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2916 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2917 q_vector->rx.itr);
2918 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2919 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2920 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2921 q_vector->tx.itr);
2922
2923 /* Linked list for the queuepairs assigned to this vector */
2924 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2925 for (q = 0; q < q_vector->num_ringpairs; q++) {
2926 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2927 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2928 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2929 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2930 (I40E_QUEUE_TYPE_TX
2931 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2932
2933 wr32(hw, I40E_QINT_RQCTL(qp), val);
2934
2935 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2936 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2937 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2938 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2939 (I40E_QUEUE_TYPE_RX
2940 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2941
2942 /* Terminate the linked list */
2943 if (q == (q_vector->num_ringpairs - 1))
2944 val |= (I40E_QUEUE_END_OF_LIST
2945 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2946
2947 wr32(hw, I40E_QINT_TQCTL(qp), val);
2948 qp++;
2949 }
2950 }
2951
2952 i40e_flush(hw);
2953 }
2954
2955 /**
2956 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2957 * @hw: ptr to the hardware info
2958 **/
2959 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2960 {
2961 struct i40e_hw *hw = &pf->hw;
2962 u32 val;
2963
2964 /* clear things first */
2965 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2966 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2967
2968 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2969 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2970 I40E_PFINT_ICR0_ENA_GRST_MASK |
2971 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2972 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2973 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2974 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2975 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2976
2977 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
2978 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
2979
2980 if (pf->flags & I40E_FLAG_PTP)
2981 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2982
2983 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2984
2985 /* SW_ITR_IDX = 0, but don't change INTENA */
2986 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2987 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2988
2989 /* OTHER_ITR_IDX = 0 */
2990 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2991 }
2992
2993 /**
2994 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2995 * @vsi: the VSI being configured
2996 **/
2997 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2998 {
2999 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3000 struct i40e_pf *pf = vsi->back;
3001 struct i40e_hw *hw = &pf->hw;
3002 u32 val;
3003
3004 /* set the ITR configuration */
3005 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
3006 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3007 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3008 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
3009 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3010 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3011
3012 i40e_enable_misc_int_causes(pf);
3013
3014 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3015 wr32(hw, I40E_PFINT_LNKLST0, 0);
3016
3017 /* Associate the queue pair to the vector and enable the queue int */
3018 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3019 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3020 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3021
3022 wr32(hw, I40E_QINT_RQCTL(0), val);
3023
3024 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3025 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3026 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3027
3028 wr32(hw, I40E_QINT_TQCTL(0), val);
3029 i40e_flush(hw);
3030 }
3031
3032 /**
3033 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3034 * @pf: board private structure
3035 **/
3036 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3037 {
3038 struct i40e_hw *hw = &pf->hw;
3039
3040 wr32(hw, I40E_PFINT_DYN_CTL0,
3041 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3042 i40e_flush(hw);
3043 }
3044
3045 /**
3046 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3047 * @pf: board private structure
3048 **/
3049 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3050 {
3051 struct i40e_hw *hw = &pf->hw;
3052 u32 val;
3053
3054 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3055 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3056 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3057
3058 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3059 i40e_flush(hw);
3060 }
3061
3062 /**
3063 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
3064 * @vsi: pointer to a vsi
3065 * @vector: disable a particular Hw Interrupt vector
3066 **/
3067 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
3068 {
3069 struct i40e_pf *pf = vsi->back;
3070 struct i40e_hw *hw = &pf->hw;
3071 u32 val;
3072
3073 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3074 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3075 i40e_flush(hw);
3076 }
3077
3078 /**
3079 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3080 * @irq: interrupt number
3081 * @data: pointer to a q_vector
3082 **/
3083 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3084 {
3085 struct i40e_q_vector *q_vector = data;
3086
3087 if (!q_vector->tx.ring && !q_vector->rx.ring)
3088 return IRQ_HANDLED;
3089
3090 napi_schedule(&q_vector->napi);
3091
3092 return IRQ_HANDLED;
3093 }
3094
3095 /**
3096 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3097 * @vsi: the VSI being configured
3098 * @basename: name for the vector
3099 *
3100 * Allocates MSI-X vectors and requests interrupts from the kernel.
3101 **/
3102 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3103 {
3104 int q_vectors = vsi->num_q_vectors;
3105 struct i40e_pf *pf = vsi->back;
3106 int base = vsi->base_vector;
3107 int rx_int_idx = 0;
3108 int tx_int_idx = 0;
3109 int vector, err;
3110
3111 for (vector = 0; vector < q_vectors; vector++) {
3112 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3113
3114 if (q_vector->tx.ring && q_vector->rx.ring) {
3115 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3116 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3117 tx_int_idx++;
3118 } else if (q_vector->rx.ring) {
3119 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3120 "%s-%s-%d", basename, "rx", rx_int_idx++);
3121 } else if (q_vector->tx.ring) {
3122 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3123 "%s-%s-%d", basename, "tx", tx_int_idx++);
3124 } else {
3125 /* skip this unused q_vector */
3126 continue;
3127 }
3128 err = request_irq(pf->msix_entries[base + vector].vector,
3129 vsi->irq_handler,
3130 0,
3131 q_vector->name,
3132 q_vector);
3133 if (err) {
3134 dev_info(&pf->pdev->dev,
3135 "MSIX request_irq failed, error: %d\n", err);
3136 goto free_queue_irqs;
3137 }
3138 /* assign the mask for this irq */
3139 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3140 &q_vector->affinity_mask);
3141 }
3142
3143 vsi->irqs_ready = true;
3144 return 0;
3145
3146 free_queue_irqs:
3147 while (vector) {
3148 vector--;
3149 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3150 NULL);
3151 free_irq(pf->msix_entries[base + vector].vector,
3152 &(vsi->q_vectors[vector]));
3153 }
3154 return err;
3155 }
3156
3157 /**
3158 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3159 * @vsi: the VSI being un-configured
3160 **/
3161 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3162 {
3163 struct i40e_pf *pf = vsi->back;
3164 struct i40e_hw *hw = &pf->hw;
3165 int base = vsi->base_vector;
3166 int i;
3167
3168 for (i = 0; i < vsi->num_queue_pairs; i++) {
3169 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3170 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3171 }
3172
3173 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3174 for (i = vsi->base_vector;
3175 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3176 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3177
3178 i40e_flush(hw);
3179 for (i = 0; i < vsi->num_q_vectors; i++)
3180 synchronize_irq(pf->msix_entries[i + base].vector);
3181 } else {
3182 /* Legacy and MSI mode - this stops all interrupt handling */
3183 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3184 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3185 i40e_flush(hw);
3186 synchronize_irq(pf->pdev->irq);
3187 }
3188 }
3189
3190 /**
3191 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3192 * @vsi: the VSI being configured
3193 **/
3194 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3195 {
3196 struct i40e_pf *pf = vsi->back;
3197 int i;
3198
3199 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3200 for (i = 0; i < vsi->num_q_vectors; i++)
3201 i40e_irq_dynamic_enable(vsi, i);
3202 } else {
3203 i40e_irq_dynamic_enable_icr0(pf);
3204 }
3205
3206 i40e_flush(&pf->hw);
3207 return 0;
3208 }
3209
3210 /**
3211 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3212 * @pf: board private structure
3213 **/
3214 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3215 {
3216 /* Disable ICR 0 */
3217 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3218 i40e_flush(&pf->hw);
3219 }
3220
3221 /**
3222 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3223 * @irq: interrupt number
3224 * @data: pointer to a q_vector
3225 *
3226 * This is the handler used for all MSI/Legacy interrupts, and deals
3227 * with both queue and non-queue interrupts. This is also used in
3228 * MSIX mode to handle the non-queue interrupts.
3229 **/
3230 static irqreturn_t i40e_intr(int irq, void *data)
3231 {
3232 struct i40e_pf *pf = (struct i40e_pf *)data;
3233 struct i40e_hw *hw = &pf->hw;
3234 irqreturn_t ret = IRQ_NONE;
3235 u32 icr0, icr0_remaining;
3236 u32 val, ena_mask;
3237
3238 icr0 = rd32(hw, I40E_PFINT_ICR0);
3239 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3240
3241 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3242 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3243 goto enable_intr;
3244
3245 /* if interrupt but no bits showing, must be SWINT */
3246 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3247 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3248 pf->sw_int_count++;
3249
3250 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3251 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3252 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3253 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3254 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3255 }
3256
3257 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3258 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3259
3260 /* temporarily disable queue cause for NAPI processing */
3261 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3262 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3263 wr32(hw, I40E_QINT_RQCTL(0), qval);
3264
3265 qval = rd32(hw, I40E_QINT_TQCTL(0));
3266 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3267 wr32(hw, I40E_QINT_TQCTL(0), qval);
3268
3269 if (!test_bit(__I40E_DOWN, &pf->state))
3270 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3271 }
3272
3273 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3274 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3275 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3276 }
3277
3278 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3279 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3280 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3281 }
3282
3283 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3284 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3285 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3286 }
3287
3288 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3289 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3290 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3291 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3292 val = rd32(hw, I40E_GLGEN_RSTAT);
3293 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3294 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3295 if (val == I40E_RESET_CORER) {
3296 pf->corer_count++;
3297 } else if (val == I40E_RESET_GLOBR) {
3298 pf->globr_count++;
3299 } else if (val == I40E_RESET_EMPR) {
3300 pf->empr_count++;
3301 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3302 }
3303 }
3304
3305 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3306 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3307 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3308 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3309 rd32(hw, I40E_PFHMC_ERRORINFO),
3310 rd32(hw, I40E_PFHMC_ERRORDATA));
3311 }
3312
3313 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3314 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3315
3316 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3317 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3318 i40e_ptp_tx_hwtstamp(pf);
3319 }
3320 }
3321
3322 /* If a critical error is pending we have no choice but to reset the
3323 * device.
3324 * Report and mask out any remaining unexpected interrupts.
3325 */
3326 icr0_remaining = icr0 & ena_mask;
3327 if (icr0_remaining) {
3328 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3329 icr0_remaining);
3330 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3331 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3332 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3333 dev_info(&pf->pdev->dev, "device will be reset\n");
3334 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3335 i40e_service_event_schedule(pf);
3336 }
3337 ena_mask &= ~icr0_remaining;
3338 }
3339 ret = IRQ_HANDLED;
3340
3341 enable_intr:
3342 /* re-enable interrupt causes */
3343 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3344 if (!test_bit(__I40E_DOWN, &pf->state)) {
3345 i40e_service_event_schedule(pf);
3346 i40e_irq_dynamic_enable_icr0(pf);
3347 }
3348
3349 return ret;
3350 }
3351
3352 /**
3353 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3354 * @tx_ring: tx ring to clean
3355 * @budget: how many cleans we're allowed
3356 *
3357 * Returns true if there's any budget left (e.g. the clean is finished)
3358 **/
3359 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3360 {
3361 struct i40e_vsi *vsi = tx_ring->vsi;
3362 u16 i = tx_ring->next_to_clean;
3363 struct i40e_tx_buffer *tx_buf;
3364 struct i40e_tx_desc *tx_desc;
3365
3366 tx_buf = &tx_ring->tx_bi[i];
3367 tx_desc = I40E_TX_DESC(tx_ring, i);
3368 i -= tx_ring->count;
3369
3370 do {
3371 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3372
3373 /* if next_to_watch is not set then there is no work pending */
3374 if (!eop_desc)
3375 break;
3376
3377 /* prevent any other reads prior to eop_desc */
3378 read_barrier_depends();
3379
3380 /* if the descriptor isn't done, no work yet to do */
3381 if (!(eop_desc->cmd_type_offset_bsz &
3382 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3383 break;
3384
3385 /* clear next_to_watch to prevent false hangs */
3386 tx_buf->next_to_watch = NULL;
3387
3388 tx_desc->buffer_addr = 0;
3389 tx_desc->cmd_type_offset_bsz = 0;
3390 /* move past filter desc */
3391 tx_buf++;
3392 tx_desc++;
3393 i++;
3394 if (unlikely(!i)) {
3395 i -= tx_ring->count;
3396 tx_buf = tx_ring->tx_bi;
3397 tx_desc = I40E_TX_DESC(tx_ring, 0);
3398 }
3399 /* unmap skb header data */
3400 dma_unmap_single(tx_ring->dev,
3401 dma_unmap_addr(tx_buf, dma),
3402 dma_unmap_len(tx_buf, len),
3403 DMA_TO_DEVICE);
3404 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3405 kfree(tx_buf->raw_buf);
3406
3407 tx_buf->raw_buf = NULL;
3408 tx_buf->tx_flags = 0;
3409 tx_buf->next_to_watch = NULL;
3410 dma_unmap_len_set(tx_buf, len, 0);
3411 tx_desc->buffer_addr = 0;
3412 tx_desc->cmd_type_offset_bsz = 0;
3413
3414 /* move us past the eop_desc for start of next FD desc */
3415 tx_buf++;
3416 tx_desc++;
3417 i++;
3418 if (unlikely(!i)) {
3419 i -= tx_ring->count;
3420 tx_buf = tx_ring->tx_bi;
3421 tx_desc = I40E_TX_DESC(tx_ring, 0);
3422 }
3423
3424 /* update budget accounting */
3425 budget--;
3426 } while (likely(budget));
3427
3428 i += tx_ring->count;
3429 tx_ring->next_to_clean = i;
3430
3431 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3432 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3433 }
3434 return budget > 0;
3435 }
3436
3437 /**
3438 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3439 * @irq: interrupt number
3440 * @data: pointer to a q_vector
3441 **/
3442 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3443 {
3444 struct i40e_q_vector *q_vector = data;
3445 struct i40e_vsi *vsi;
3446
3447 if (!q_vector->tx.ring)
3448 return IRQ_HANDLED;
3449
3450 vsi = q_vector->tx.ring->vsi;
3451 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3452
3453 return IRQ_HANDLED;
3454 }
3455
3456 /**
3457 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3458 * @vsi: the VSI being configured
3459 * @v_idx: vector index
3460 * @qp_idx: queue pair index
3461 **/
3462 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3463 {
3464 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3465 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3466 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3467
3468 tx_ring->q_vector = q_vector;
3469 tx_ring->next = q_vector->tx.ring;
3470 q_vector->tx.ring = tx_ring;
3471 q_vector->tx.count++;
3472
3473 rx_ring->q_vector = q_vector;
3474 rx_ring->next = q_vector->rx.ring;
3475 q_vector->rx.ring = rx_ring;
3476 q_vector->rx.count++;
3477 }
3478
3479 /**
3480 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3481 * @vsi: the VSI being configured
3482 *
3483 * This function maps descriptor rings to the queue-specific vectors
3484 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3485 * one vector per queue pair, but on a constrained vector budget, we
3486 * group the queue pairs as "efficiently" as possible.
3487 **/
3488 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3489 {
3490 int qp_remaining = vsi->num_queue_pairs;
3491 int q_vectors = vsi->num_q_vectors;
3492 int num_ringpairs;
3493 int v_start = 0;
3494 int qp_idx = 0;
3495
3496 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3497 * group them so there are multiple queues per vector.
3498 * It is also important to go through all the vectors available to be
3499 * sure that if we don't use all the vectors, that the remaining vectors
3500 * are cleared. This is especially important when decreasing the
3501 * number of queues in use.
3502 */
3503 for (; v_start < q_vectors; v_start++) {
3504 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3505
3506 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3507
3508 q_vector->num_ringpairs = num_ringpairs;
3509
3510 q_vector->rx.count = 0;
3511 q_vector->tx.count = 0;
3512 q_vector->rx.ring = NULL;
3513 q_vector->tx.ring = NULL;
3514
3515 while (num_ringpairs--) {
3516 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3517 qp_idx++;
3518 qp_remaining--;
3519 }
3520 }
3521 }
3522
3523 /**
3524 * i40e_vsi_request_irq - Request IRQ from the OS
3525 * @vsi: the VSI being configured
3526 * @basename: name for the vector
3527 **/
3528 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3529 {
3530 struct i40e_pf *pf = vsi->back;
3531 int err;
3532
3533 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3534 err = i40e_vsi_request_irq_msix(vsi, basename);
3535 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3536 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3537 pf->int_name, pf);
3538 else
3539 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3540 pf->int_name, pf);
3541
3542 if (err)
3543 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3544
3545 return err;
3546 }
3547
3548 #ifdef CONFIG_NET_POLL_CONTROLLER
3549 /**
3550 * i40e_netpoll - A Polling 'interrupt'handler
3551 * @netdev: network interface device structure
3552 *
3553 * This is used by netconsole to send skbs without having to re-enable
3554 * interrupts. It's not called while the normal interrupt routine is executing.
3555 **/
3556 #ifdef I40E_FCOE
3557 void i40e_netpoll(struct net_device *netdev)
3558 #else
3559 static void i40e_netpoll(struct net_device *netdev)
3560 #endif
3561 {
3562 struct i40e_netdev_priv *np = netdev_priv(netdev);
3563 struct i40e_vsi *vsi = np->vsi;
3564 struct i40e_pf *pf = vsi->back;
3565 int i;
3566
3567 /* if interface is down do nothing */
3568 if (test_bit(__I40E_DOWN, &vsi->state))
3569 return;
3570
3571 pf->flags |= I40E_FLAG_IN_NETPOLL;
3572 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3573 for (i = 0; i < vsi->num_q_vectors; i++)
3574 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3575 } else {
3576 i40e_intr(pf->pdev->irq, netdev);
3577 }
3578 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3579 }
3580 #endif
3581
3582 /**
3583 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3584 * @pf: the PF being configured
3585 * @pf_q: the PF queue
3586 * @enable: enable or disable state of the queue
3587 *
3588 * This routine will wait for the given Tx queue of the PF to reach the
3589 * enabled or disabled state.
3590 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3591 * multiple retries; else will return 0 in case of success.
3592 **/
3593 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3594 {
3595 int i;
3596 u32 tx_reg;
3597
3598 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3599 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3600 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3601 break;
3602
3603 usleep_range(10, 20);
3604 }
3605 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3606 return -ETIMEDOUT;
3607
3608 return 0;
3609 }
3610
3611 /**
3612 * i40e_vsi_control_tx - Start or stop a VSI's rings
3613 * @vsi: the VSI being configured
3614 * @enable: start or stop the rings
3615 **/
3616 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3617 {
3618 struct i40e_pf *pf = vsi->back;
3619 struct i40e_hw *hw = &pf->hw;
3620 int i, j, pf_q, ret = 0;
3621 u32 tx_reg;
3622
3623 pf_q = vsi->base_queue;
3624 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3625
3626 /* warn the TX unit of coming changes */
3627 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3628 if (!enable)
3629 usleep_range(10, 20);
3630
3631 for (j = 0; j < 50; j++) {
3632 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3633 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3634 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3635 break;
3636 usleep_range(1000, 2000);
3637 }
3638 /* Skip if the queue is already in the requested state */
3639 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3640 continue;
3641
3642 /* turn on/off the queue */
3643 if (enable) {
3644 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3645 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3646 } else {
3647 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3648 }
3649
3650 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3651 /* No waiting for the Tx queue to disable */
3652 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3653 continue;
3654
3655 /* wait for the change to finish */
3656 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3657 if (ret) {
3658 dev_info(&pf->pdev->dev,
3659 "VSI seid %d Tx ring %d %sable timeout\n",
3660 vsi->seid, pf_q, (enable ? "en" : "dis"));
3661 break;
3662 }
3663 }
3664
3665 if (hw->revision_id == 0)
3666 mdelay(50);
3667 return ret;
3668 }
3669
3670 /**
3671 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3672 * @pf: the PF being configured
3673 * @pf_q: the PF queue
3674 * @enable: enable or disable state of the queue
3675 *
3676 * This routine will wait for the given Rx queue of the PF to reach the
3677 * enabled or disabled state.
3678 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3679 * multiple retries; else will return 0 in case of success.
3680 **/
3681 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3682 {
3683 int i;
3684 u32 rx_reg;
3685
3686 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3687 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3688 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3689 break;
3690
3691 usleep_range(10, 20);
3692 }
3693 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3694 return -ETIMEDOUT;
3695
3696 return 0;
3697 }
3698
3699 /**
3700 * i40e_vsi_control_rx - Start or stop a VSI's rings
3701 * @vsi: the VSI being configured
3702 * @enable: start or stop the rings
3703 **/
3704 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3705 {
3706 struct i40e_pf *pf = vsi->back;
3707 struct i40e_hw *hw = &pf->hw;
3708 int i, j, pf_q, ret = 0;
3709 u32 rx_reg;
3710
3711 pf_q = vsi->base_queue;
3712 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3713 for (j = 0; j < 50; j++) {
3714 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3715 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3716 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3717 break;
3718 usleep_range(1000, 2000);
3719 }
3720
3721 /* Skip if the queue is already in the requested state */
3722 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3723 continue;
3724
3725 /* turn on/off the queue */
3726 if (enable)
3727 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3728 else
3729 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3730 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3731
3732 /* wait for the change to finish */
3733 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3734 if (ret) {
3735 dev_info(&pf->pdev->dev,
3736 "VSI seid %d Rx ring %d %sable timeout\n",
3737 vsi->seid, pf_q, (enable ? "en" : "dis"));
3738 break;
3739 }
3740 }
3741
3742 return ret;
3743 }
3744
3745 /**
3746 * i40e_vsi_control_rings - Start or stop a VSI's rings
3747 * @vsi: the VSI being configured
3748 * @enable: start or stop the rings
3749 **/
3750 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3751 {
3752 int ret = 0;
3753
3754 /* do rx first for enable and last for disable */
3755 if (request) {
3756 ret = i40e_vsi_control_rx(vsi, request);
3757 if (ret)
3758 return ret;
3759 ret = i40e_vsi_control_tx(vsi, request);
3760 } else {
3761 /* Ignore return value, we need to shutdown whatever we can */
3762 i40e_vsi_control_tx(vsi, request);
3763 i40e_vsi_control_rx(vsi, request);
3764 }
3765
3766 return ret;
3767 }
3768
3769 /**
3770 * i40e_vsi_free_irq - Free the irq association with the OS
3771 * @vsi: the VSI being configured
3772 **/
3773 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3774 {
3775 struct i40e_pf *pf = vsi->back;
3776 struct i40e_hw *hw = &pf->hw;
3777 int base = vsi->base_vector;
3778 u32 val, qp;
3779 int i;
3780
3781 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3782 if (!vsi->q_vectors)
3783 return;
3784
3785 if (!vsi->irqs_ready)
3786 return;
3787
3788 vsi->irqs_ready = false;
3789 for (i = 0; i < vsi->num_q_vectors; i++) {
3790 u16 vector = i + base;
3791
3792 /* free only the irqs that were actually requested */
3793 if (!vsi->q_vectors[i] ||
3794 !vsi->q_vectors[i]->num_ringpairs)
3795 continue;
3796
3797 /* clear the affinity_mask in the IRQ descriptor */
3798 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3799 NULL);
3800 free_irq(pf->msix_entries[vector].vector,
3801 vsi->q_vectors[i]);
3802
3803 /* Tear down the interrupt queue link list
3804 *
3805 * We know that they come in pairs and always
3806 * the Rx first, then the Tx. To clear the
3807 * link list, stick the EOL value into the
3808 * next_q field of the registers.
3809 */
3810 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3811 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3812 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3813 val |= I40E_QUEUE_END_OF_LIST
3814 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3815 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3816
3817 while (qp != I40E_QUEUE_END_OF_LIST) {
3818 u32 next;
3819
3820 val = rd32(hw, I40E_QINT_RQCTL(qp));
3821
3822 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3823 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3824 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3825 I40E_QINT_RQCTL_INTEVENT_MASK);
3826
3827 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3828 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3829
3830 wr32(hw, I40E_QINT_RQCTL(qp), val);
3831
3832 val = rd32(hw, I40E_QINT_TQCTL(qp));
3833
3834 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3835 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3836
3837 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3838 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3839 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3840 I40E_QINT_TQCTL_INTEVENT_MASK);
3841
3842 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3843 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3844
3845 wr32(hw, I40E_QINT_TQCTL(qp), val);
3846 qp = next;
3847 }
3848 }
3849 } else {
3850 free_irq(pf->pdev->irq, pf);
3851
3852 val = rd32(hw, I40E_PFINT_LNKLST0);
3853 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3854 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3855 val |= I40E_QUEUE_END_OF_LIST
3856 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3857 wr32(hw, I40E_PFINT_LNKLST0, val);
3858
3859 val = rd32(hw, I40E_QINT_RQCTL(qp));
3860 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3861 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3862 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3863 I40E_QINT_RQCTL_INTEVENT_MASK);
3864
3865 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3866 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3867
3868 wr32(hw, I40E_QINT_RQCTL(qp), val);
3869
3870 val = rd32(hw, I40E_QINT_TQCTL(qp));
3871
3872 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3873 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3874 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3875 I40E_QINT_TQCTL_INTEVENT_MASK);
3876
3877 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3878 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3879
3880 wr32(hw, I40E_QINT_TQCTL(qp), val);
3881 }
3882 }
3883
3884 /**
3885 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3886 * @vsi: the VSI being configured
3887 * @v_idx: Index of vector to be freed
3888 *
3889 * This function frees the memory allocated to the q_vector. In addition if
3890 * NAPI is enabled it will delete any references to the NAPI struct prior
3891 * to freeing the q_vector.
3892 **/
3893 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3894 {
3895 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3896 struct i40e_ring *ring;
3897
3898 if (!q_vector)
3899 return;
3900
3901 /* disassociate q_vector from rings */
3902 i40e_for_each_ring(ring, q_vector->tx)
3903 ring->q_vector = NULL;
3904
3905 i40e_for_each_ring(ring, q_vector->rx)
3906 ring->q_vector = NULL;
3907
3908 /* only VSI w/ an associated netdev is set up w/ NAPI */
3909 if (vsi->netdev)
3910 netif_napi_del(&q_vector->napi);
3911
3912 vsi->q_vectors[v_idx] = NULL;
3913
3914 kfree_rcu(q_vector, rcu);
3915 }
3916
3917 /**
3918 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3919 * @vsi: the VSI being un-configured
3920 *
3921 * This frees the memory allocated to the q_vectors and
3922 * deletes references to the NAPI struct.
3923 **/
3924 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3925 {
3926 int v_idx;
3927
3928 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3929 i40e_free_q_vector(vsi, v_idx);
3930 }
3931
3932 /**
3933 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3934 * @pf: board private structure
3935 **/
3936 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3937 {
3938 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3939 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3940 pci_disable_msix(pf->pdev);
3941 kfree(pf->msix_entries);
3942 pf->msix_entries = NULL;
3943 kfree(pf->irq_pile);
3944 pf->irq_pile = NULL;
3945 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3946 pci_disable_msi(pf->pdev);
3947 }
3948 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3949 }
3950
3951 /**
3952 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3953 * @pf: board private structure
3954 *
3955 * We go through and clear interrupt specific resources and reset the structure
3956 * to pre-load conditions
3957 **/
3958 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3959 {
3960 int i;
3961
3962 i40e_stop_misc_vector(pf);
3963 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3964 synchronize_irq(pf->msix_entries[0].vector);
3965 free_irq(pf->msix_entries[0].vector, pf);
3966 }
3967
3968 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3969 for (i = 0; i < pf->num_alloc_vsi; i++)
3970 if (pf->vsi[i])
3971 i40e_vsi_free_q_vectors(pf->vsi[i]);
3972 i40e_reset_interrupt_capability(pf);
3973 }
3974
3975 /**
3976 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3977 * @vsi: the VSI being configured
3978 **/
3979 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3980 {
3981 int q_idx;
3982
3983 if (!vsi->netdev)
3984 return;
3985
3986 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3987 napi_enable(&vsi->q_vectors[q_idx]->napi);
3988 }
3989
3990 /**
3991 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3992 * @vsi: the VSI being configured
3993 **/
3994 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3995 {
3996 int q_idx;
3997
3998 if (!vsi->netdev)
3999 return;
4000
4001 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4002 napi_disable(&vsi->q_vectors[q_idx]->napi);
4003 }
4004
4005 /**
4006 * i40e_vsi_close - Shut down a VSI
4007 * @vsi: the vsi to be quelled
4008 **/
4009 static void i40e_vsi_close(struct i40e_vsi *vsi)
4010 {
4011 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4012 i40e_down(vsi);
4013 i40e_vsi_free_irq(vsi);
4014 i40e_vsi_free_tx_resources(vsi);
4015 i40e_vsi_free_rx_resources(vsi);
4016 vsi->current_netdev_flags = 0;
4017 }
4018
4019 /**
4020 * i40e_quiesce_vsi - Pause a given VSI
4021 * @vsi: the VSI being paused
4022 **/
4023 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4024 {
4025 if (test_bit(__I40E_DOWN, &vsi->state))
4026 return;
4027
4028 /* No need to disable FCoE VSI when Tx suspended */
4029 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4030 vsi->type == I40E_VSI_FCOE) {
4031 dev_dbg(&vsi->back->pdev->dev,
4032 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4033 return;
4034 }
4035
4036 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4037 if (vsi->netdev && netif_running(vsi->netdev)) {
4038 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4039 } else {
4040 i40e_vsi_close(vsi);
4041 }
4042 }
4043
4044 /**
4045 * i40e_unquiesce_vsi - Resume a given VSI
4046 * @vsi: the VSI being resumed
4047 **/
4048 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4049 {
4050 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4051 return;
4052
4053 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4054 if (vsi->netdev && netif_running(vsi->netdev))
4055 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4056 else
4057 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4058 }
4059
4060 /**
4061 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4062 * @pf: the PF
4063 **/
4064 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4065 {
4066 int v;
4067
4068 for (v = 0; v < pf->num_alloc_vsi; v++) {
4069 if (pf->vsi[v])
4070 i40e_quiesce_vsi(pf->vsi[v]);
4071 }
4072 }
4073
4074 /**
4075 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4076 * @pf: the PF
4077 **/
4078 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4079 {
4080 int v;
4081
4082 for (v = 0; v < pf->num_alloc_vsi; v++) {
4083 if (pf->vsi[v])
4084 i40e_unquiesce_vsi(pf->vsi[v]);
4085 }
4086 }
4087
4088 #ifdef CONFIG_I40E_DCB
4089 /**
4090 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4091 * @vsi: the VSI being configured
4092 *
4093 * This function waits for the given VSI's Tx queues to be disabled.
4094 **/
4095 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4096 {
4097 struct i40e_pf *pf = vsi->back;
4098 int i, pf_q, ret;
4099
4100 pf_q = vsi->base_queue;
4101 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4102 /* Check and wait for the disable status of the queue */
4103 ret = i40e_pf_txq_wait(pf, pf_q, false);
4104 if (ret) {
4105 dev_info(&pf->pdev->dev,
4106 "VSI seid %d Tx ring %d disable timeout\n",
4107 vsi->seid, pf_q);
4108 return ret;
4109 }
4110 }
4111
4112 return 0;
4113 }
4114
4115 /**
4116 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4117 * @pf: the PF
4118 *
4119 * This function waits for the Tx queues to be in disabled state for all the
4120 * VSIs that are managed by this PF.
4121 **/
4122 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4123 {
4124 int v, ret = 0;
4125
4126 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4127 /* No need to wait for FCoE VSI queues */
4128 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4129 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4130 if (ret)
4131 break;
4132 }
4133 }
4134
4135 return ret;
4136 }
4137
4138 #endif
4139
4140 /**
4141 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4142 * @q_idx: TX queue number
4143 * @vsi: Pointer to VSI struct
4144 *
4145 * This function checks specified queue for given VSI. Detects hung condition.
4146 * Sets hung bit since it is two step process. Before next run of service task
4147 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4148 * hung condition remain unchanged and during subsequent run, this function
4149 * issues SW interrupt to recover from hung condition.
4150 **/
4151 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4152 {
4153 struct i40e_ring *tx_ring = NULL;
4154 struct i40e_pf *pf;
4155 u32 head, val, tx_pending;
4156 int i;
4157
4158 pf = vsi->back;
4159
4160 /* now that we have an index, find the tx_ring struct */
4161 for (i = 0; i < vsi->num_queue_pairs; i++) {
4162 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4163 if (q_idx == vsi->tx_rings[i]->queue_index) {
4164 tx_ring = vsi->tx_rings[i];
4165 break;
4166 }
4167 }
4168 }
4169
4170 if (!tx_ring)
4171 return;
4172
4173 /* Read interrupt register */
4174 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4175 val = rd32(&pf->hw,
4176 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4177 tx_ring->vsi->base_vector - 1));
4178 else
4179 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4180
4181 head = i40e_get_head(tx_ring);
4182
4183 tx_pending = i40e_get_tx_pending(tx_ring);
4184
4185 /* Interrupts are disabled and TX pending is non-zero,
4186 * trigger the SW interrupt (don't wait). Worst case
4187 * there will be one extra interrupt which may result
4188 * into not cleaning any queues because queues are cleaned.
4189 */
4190 if (tx_pending && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK)))
4191 i40e_force_wb(vsi, tx_ring->q_vector);
4192 }
4193
4194 /**
4195 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4196 * @pf: pointer to PF struct
4197 *
4198 * LAN VSI has netdev and netdev has TX queues. This function is to check
4199 * each of those TX queues if they are hung, trigger recovery by issuing
4200 * SW interrupt.
4201 **/
4202 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4203 {
4204 struct net_device *netdev;
4205 struct i40e_vsi *vsi;
4206 int i;
4207
4208 /* Only for LAN VSI */
4209 vsi = pf->vsi[pf->lan_vsi];
4210
4211 if (!vsi)
4212 return;
4213
4214 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4215 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4216 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4217 return;
4218
4219 /* Make sure type is MAIN VSI */
4220 if (vsi->type != I40E_VSI_MAIN)
4221 return;
4222
4223 netdev = vsi->netdev;
4224 if (!netdev)
4225 return;
4226
4227 /* Bail out if netif_carrier is not OK */
4228 if (!netif_carrier_ok(netdev))
4229 return;
4230
4231 /* Go thru' TX queues for netdev */
4232 for (i = 0; i < netdev->num_tx_queues; i++) {
4233 struct netdev_queue *q;
4234
4235 q = netdev_get_tx_queue(netdev, i);
4236 if (q)
4237 i40e_detect_recover_hung_queue(i, vsi);
4238 }
4239 }
4240
4241 /**
4242 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4243 * @pf: pointer to PF
4244 *
4245 * Get TC map for ISCSI PF type that will include iSCSI TC
4246 * and LAN TC.
4247 **/
4248 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4249 {
4250 struct i40e_dcb_app_priority_table app;
4251 struct i40e_hw *hw = &pf->hw;
4252 u8 enabled_tc = 1; /* TC0 is always enabled */
4253 u8 tc, i;
4254 /* Get the iSCSI APP TLV */
4255 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4256
4257 for (i = 0; i < dcbcfg->numapps; i++) {
4258 app = dcbcfg->app[i];
4259 if (app.selector == I40E_APP_SEL_TCPIP &&
4260 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4261 tc = dcbcfg->etscfg.prioritytable[app.priority];
4262 enabled_tc |= BIT_ULL(tc);
4263 break;
4264 }
4265 }
4266
4267 return enabled_tc;
4268 }
4269
4270 /**
4271 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4272 * @dcbcfg: the corresponding DCBx configuration structure
4273 *
4274 * Return the number of TCs from given DCBx configuration
4275 **/
4276 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4277 {
4278 u8 num_tc = 0;
4279 int i;
4280
4281 /* Scan the ETS Config Priority Table to find
4282 * traffic class enabled for a given priority
4283 * and use the traffic class index to get the
4284 * number of traffic classes enabled
4285 */
4286 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4287 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4288 num_tc = dcbcfg->etscfg.prioritytable[i];
4289 }
4290
4291 /* Traffic class index starts from zero so
4292 * increment to return the actual count
4293 */
4294 return num_tc + 1;
4295 }
4296
4297 /**
4298 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4299 * @dcbcfg: the corresponding DCBx configuration structure
4300 *
4301 * Query the current DCB configuration and return the number of
4302 * traffic classes enabled from the given DCBX config
4303 **/
4304 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4305 {
4306 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4307 u8 enabled_tc = 1;
4308 u8 i;
4309
4310 for (i = 0; i < num_tc; i++)
4311 enabled_tc |= BIT(i);
4312
4313 return enabled_tc;
4314 }
4315
4316 /**
4317 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4318 * @pf: PF being queried
4319 *
4320 * Return number of traffic classes enabled for the given PF
4321 **/
4322 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4323 {
4324 struct i40e_hw *hw = &pf->hw;
4325 u8 i, enabled_tc;
4326 u8 num_tc = 0;
4327 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4328
4329 /* If DCB is not enabled then always in single TC */
4330 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4331 return 1;
4332
4333 /* SFP mode will be enabled for all TCs on port */
4334 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4335 return i40e_dcb_get_num_tc(dcbcfg);
4336
4337 /* MFP mode return count of enabled TCs for this PF */
4338 if (pf->hw.func_caps.iscsi)
4339 enabled_tc = i40e_get_iscsi_tc_map(pf);
4340 else
4341 return 1; /* Only TC0 */
4342
4343 /* At least have TC0 */
4344 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4345 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4346 if (enabled_tc & BIT_ULL(i))
4347 num_tc++;
4348 }
4349 return num_tc;
4350 }
4351
4352 /**
4353 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4354 * @pf: PF being queried
4355 *
4356 * Return a bitmap for first enabled traffic class for this PF.
4357 **/
4358 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4359 {
4360 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4361 u8 i = 0;
4362
4363 if (!enabled_tc)
4364 return 0x1; /* TC0 */
4365
4366 /* Find the first enabled TC */
4367 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4368 if (enabled_tc & BIT_ULL(i))
4369 break;
4370 }
4371
4372 return BIT(i);
4373 }
4374
4375 /**
4376 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4377 * @pf: PF being queried
4378 *
4379 * Return a bitmap for enabled traffic classes for this PF.
4380 **/
4381 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4382 {
4383 /* If DCB is not enabled for this PF then just return default TC */
4384 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4385 return i40e_pf_get_default_tc(pf);
4386
4387 /* SFP mode we want PF to be enabled for all TCs */
4388 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4389 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4390
4391 /* MFP enabled and iSCSI PF type */
4392 if (pf->hw.func_caps.iscsi)
4393 return i40e_get_iscsi_tc_map(pf);
4394 else
4395 return i40e_pf_get_default_tc(pf);
4396 }
4397
4398 /**
4399 * i40e_vsi_get_bw_info - Query VSI BW Information
4400 * @vsi: the VSI being queried
4401 *
4402 * Returns 0 on success, negative value on failure
4403 **/
4404 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4405 {
4406 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4407 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4408 struct i40e_pf *pf = vsi->back;
4409 struct i40e_hw *hw = &pf->hw;
4410 i40e_status ret;
4411 u32 tc_bw_max;
4412 int i;
4413
4414 /* Get the VSI level BW configuration */
4415 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4416 if (ret) {
4417 dev_info(&pf->pdev->dev,
4418 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4419 i40e_stat_str(&pf->hw, ret),
4420 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4421 return -EINVAL;
4422 }
4423
4424 /* Get the VSI level BW configuration per TC */
4425 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4426 NULL);
4427 if (ret) {
4428 dev_info(&pf->pdev->dev,
4429 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4430 i40e_stat_str(&pf->hw, ret),
4431 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4432 return -EINVAL;
4433 }
4434
4435 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4436 dev_info(&pf->pdev->dev,
4437 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4438 bw_config.tc_valid_bits,
4439 bw_ets_config.tc_valid_bits);
4440 /* Still continuing */
4441 }
4442
4443 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4444 vsi->bw_max_quanta = bw_config.max_bw;
4445 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4446 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4447 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4448 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4449 vsi->bw_ets_limit_credits[i] =
4450 le16_to_cpu(bw_ets_config.credits[i]);
4451 /* 3 bits out of 4 for each TC */
4452 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4453 }
4454
4455 return 0;
4456 }
4457
4458 /**
4459 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4460 * @vsi: the VSI being configured
4461 * @enabled_tc: TC bitmap
4462 * @bw_credits: BW shared credits per TC
4463 *
4464 * Returns 0 on success, negative value on failure
4465 **/
4466 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4467 u8 *bw_share)
4468 {
4469 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4470 i40e_status ret;
4471 int i;
4472
4473 bw_data.tc_valid_bits = enabled_tc;
4474 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4475 bw_data.tc_bw_credits[i] = bw_share[i];
4476
4477 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4478 NULL);
4479 if (ret) {
4480 dev_info(&vsi->back->pdev->dev,
4481 "AQ command Config VSI BW allocation per TC failed = %d\n",
4482 vsi->back->hw.aq.asq_last_status);
4483 return -EINVAL;
4484 }
4485
4486 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4487 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4488
4489 return 0;
4490 }
4491
4492 /**
4493 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4494 * @vsi: the VSI being configured
4495 * @enabled_tc: TC map to be enabled
4496 *
4497 **/
4498 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4499 {
4500 struct net_device *netdev = vsi->netdev;
4501 struct i40e_pf *pf = vsi->back;
4502 struct i40e_hw *hw = &pf->hw;
4503 u8 netdev_tc = 0;
4504 int i;
4505 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4506
4507 if (!netdev)
4508 return;
4509
4510 if (!enabled_tc) {
4511 netdev_reset_tc(netdev);
4512 return;
4513 }
4514
4515 /* Set up actual enabled TCs on the VSI */
4516 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4517 return;
4518
4519 /* set per TC queues for the VSI */
4520 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4521 /* Only set TC queues for enabled tcs
4522 *
4523 * e.g. For a VSI that has TC0 and TC3 enabled the
4524 * enabled_tc bitmap would be 0x00001001; the driver
4525 * will set the numtc for netdev as 2 that will be
4526 * referenced by the netdev layer as TC 0 and 1.
4527 */
4528 if (vsi->tc_config.enabled_tc & BIT_ULL(i))
4529 netdev_set_tc_queue(netdev,
4530 vsi->tc_config.tc_info[i].netdev_tc,
4531 vsi->tc_config.tc_info[i].qcount,
4532 vsi->tc_config.tc_info[i].qoffset);
4533 }
4534
4535 /* Assign UP2TC map for the VSI */
4536 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4537 /* Get the actual TC# for the UP */
4538 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4539 /* Get the mapped netdev TC# for the UP */
4540 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4541 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4542 }
4543 }
4544
4545 /**
4546 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4547 * @vsi: the VSI being configured
4548 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4549 **/
4550 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4551 struct i40e_vsi_context *ctxt)
4552 {
4553 /* copy just the sections touched not the entire info
4554 * since not all sections are valid as returned by
4555 * update vsi params
4556 */
4557 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4558 memcpy(&vsi->info.queue_mapping,
4559 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4560 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4561 sizeof(vsi->info.tc_mapping));
4562 }
4563
4564 /**
4565 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4566 * @vsi: VSI to be configured
4567 * @enabled_tc: TC bitmap
4568 *
4569 * This configures a particular VSI for TCs that are mapped to the
4570 * given TC bitmap. It uses default bandwidth share for TCs across
4571 * VSIs to configure TC for a particular VSI.
4572 *
4573 * NOTE:
4574 * It is expected that the VSI queues have been quisced before calling
4575 * this function.
4576 **/
4577 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4578 {
4579 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4580 struct i40e_vsi_context ctxt;
4581 int ret = 0;
4582 int i;
4583
4584 /* Check if enabled_tc is same as existing or new TCs */
4585 if (vsi->tc_config.enabled_tc == enabled_tc)
4586 return ret;
4587
4588 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4589 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4590 if (enabled_tc & BIT_ULL(i))
4591 bw_share[i] = 1;
4592 }
4593
4594 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4595 if (ret) {
4596 dev_info(&vsi->back->pdev->dev,
4597 "Failed configuring TC map %d for VSI %d\n",
4598 enabled_tc, vsi->seid);
4599 goto out;
4600 }
4601
4602 /* Update Queue Pairs Mapping for currently enabled UPs */
4603 ctxt.seid = vsi->seid;
4604 ctxt.pf_num = vsi->back->hw.pf_id;
4605 ctxt.vf_num = 0;
4606 ctxt.uplink_seid = vsi->uplink_seid;
4607 ctxt.info = vsi->info;
4608 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4609
4610 /* Update the VSI after updating the VSI queue-mapping information */
4611 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4612 if (ret) {
4613 dev_info(&vsi->back->pdev->dev,
4614 "Update vsi tc config failed, err %s aq_err %s\n",
4615 i40e_stat_str(&vsi->back->hw, ret),
4616 i40e_aq_str(&vsi->back->hw,
4617 vsi->back->hw.aq.asq_last_status));
4618 goto out;
4619 }
4620 /* update the local VSI info with updated queue map */
4621 i40e_vsi_update_queue_map(vsi, &ctxt);
4622 vsi->info.valid_sections = 0;
4623
4624 /* Update current VSI BW information */
4625 ret = i40e_vsi_get_bw_info(vsi);
4626 if (ret) {
4627 dev_info(&vsi->back->pdev->dev,
4628 "Failed updating vsi bw info, err %s aq_err %s\n",
4629 i40e_stat_str(&vsi->back->hw, ret),
4630 i40e_aq_str(&vsi->back->hw,
4631 vsi->back->hw.aq.asq_last_status));
4632 goto out;
4633 }
4634
4635 /* Update the netdev TC setup */
4636 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4637 out:
4638 return ret;
4639 }
4640
4641 /**
4642 * i40e_veb_config_tc - Configure TCs for given VEB
4643 * @veb: given VEB
4644 * @enabled_tc: TC bitmap
4645 *
4646 * Configures given TC bitmap for VEB (switching) element
4647 **/
4648 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4649 {
4650 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4651 struct i40e_pf *pf = veb->pf;
4652 int ret = 0;
4653 int i;
4654
4655 /* No TCs or already enabled TCs just return */
4656 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4657 return ret;
4658
4659 bw_data.tc_valid_bits = enabled_tc;
4660 /* bw_data.absolute_credits is not set (relative) */
4661
4662 /* Enable ETS TCs with equal BW Share for now */
4663 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4664 if (enabled_tc & BIT_ULL(i))
4665 bw_data.tc_bw_share_credits[i] = 1;
4666 }
4667
4668 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4669 &bw_data, NULL);
4670 if (ret) {
4671 dev_info(&pf->pdev->dev,
4672 "VEB bw config failed, err %s aq_err %s\n",
4673 i40e_stat_str(&pf->hw, ret),
4674 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4675 goto out;
4676 }
4677
4678 /* Update the BW information */
4679 ret = i40e_veb_get_bw_info(veb);
4680 if (ret) {
4681 dev_info(&pf->pdev->dev,
4682 "Failed getting veb bw config, err %s aq_err %s\n",
4683 i40e_stat_str(&pf->hw, ret),
4684 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4685 }
4686
4687 out:
4688 return ret;
4689 }
4690
4691 #ifdef CONFIG_I40E_DCB
4692 /**
4693 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4694 * @pf: PF struct
4695 *
4696 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4697 * the caller would've quiesce all the VSIs before calling
4698 * this function
4699 **/
4700 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4701 {
4702 u8 tc_map = 0;
4703 int ret;
4704 u8 v;
4705
4706 /* Enable the TCs available on PF to all VEBs */
4707 tc_map = i40e_pf_get_tc_map(pf);
4708 for (v = 0; v < I40E_MAX_VEB; v++) {
4709 if (!pf->veb[v])
4710 continue;
4711 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4712 if (ret) {
4713 dev_info(&pf->pdev->dev,
4714 "Failed configuring TC for VEB seid=%d\n",
4715 pf->veb[v]->seid);
4716 /* Will try to configure as many components */
4717 }
4718 }
4719
4720 /* Update each VSI */
4721 for (v = 0; v < pf->num_alloc_vsi; v++) {
4722 if (!pf->vsi[v])
4723 continue;
4724
4725 /* - Enable all TCs for the LAN VSI
4726 #ifdef I40E_FCOE
4727 * - For FCoE VSI only enable the TC configured
4728 * as per the APP TLV
4729 #endif
4730 * - For all others keep them at TC0 for now
4731 */
4732 if (v == pf->lan_vsi)
4733 tc_map = i40e_pf_get_tc_map(pf);
4734 else
4735 tc_map = i40e_pf_get_default_tc(pf);
4736 #ifdef I40E_FCOE
4737 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4738 tc_map = i40e_get_fcoe_tc_map(pf);
4739 #endif /* #ifdef I40E_FCOE */
4740
4741 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4742 if (ret) {
4743 dev_info(&pf->pdev->dev,
4744 "Failed configuring TC for VSI seid=%d\n",
4745 pf->vsi[v]->seid);
4746 /* Will try to configure as many components */
4747 } else {
4748 /* Re-configure VSI vectors based on updated TC map */
4749 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4750 if (pf->vsi[v]->netdev)
4751 i40e_dcbnl_set_all(pf->vsi[v]);
4752 }
4753 }
4754 }
4755
4756 /**
4757 * i40e_resume_port_tx - Resume port Tx
4758 * @pf: PF struct
4759 *
4760 * Resume a port's Tx and issue a PF reset in case of failure to
4761 * resume.
4762 **/
4763 static int i40e_resume_port_tx(struct i40e_pf *pf)
4764 {
4765 struct i40e_hw *hw = &pf->hw;
4766 int ret;
4767
4768 ret = i40e_aq_resume_port_tx(hw, NULL);
4769 if (ret) {
4770 dev_info(&pf->pdev->dev,
4771 "Resume Port Tx failed, err %s aq_err %s\n",
4772 i40e_stat_str(&pf->hw, ret),
4773 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4774 /* Schedule PF reset to recover */
4775 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4776 i40e_service_event_schedule(pf);
4777 }
4778
4779 return ret;
4780 }
4781
4782 /**
4783 * i40e_init_pf_dcb - Initialize DCB configuration
4784 * @pf: PF being configured
4785 *
4786 * Query the current DCB configuration and cache it
4787 * in the hardware structure
4788 **/
4789 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4790 {
4791 struct i40e_hw *hw = &pf->hw;
4792 int err = 0;
4793
4794 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4795 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4796 (pf->hw.aq.fw_maj_ver < 4))
4797 goto out;
4798
4799 /* Get the initial DCB configuration */
4800 err = i40e_init_dcb(hw);
4801 if (!err) {
4802 /* Device/Function is not DCBX capable */
4803 if ((!hw->func_caps.dcb) ||
4804 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4805 dev_info(&pf->pdev->dev,
4806 "DCBX offload is not supported or is disabled for this PF.\n");
4807
4808 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4809 goto out;
4810
4811 } else {
4812 /* When status is not DISABLED then DCBX in FW */
4813 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4814 DCB_CAP_DCBX_VER_IEEE;
4815
4816 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4817 /* Enable DCB tagging only when more than one TC */
4818 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4819 pf->flags |= I40E_FLAG_DCB_ENABLED;
4820 dev_dbg(&pf->pdev->dev,
4821 "DCBX offload is supported for this PF.\n");
4822 }
4823 } else {
4824 dev_info(&pf->pdev->dev,
4825 "Query for DCB configuration failed, err %s aq_err %s\n",
4826 i40e_stat_str(&pf->hw, err),
4827 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4828 }
4829
4830 out:
4831 return err;
4832 }
4833 #endif /* CONFIG_I40E_DCB */
4834 #define SPEED_SIZE 14
4835 #define FC_SIZE 8
4836 /**
4837 * i40e_print_link_message - print link up or down
4838 * @vsi: the VSI for which link needs a message
4839 */
4840 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4841 {
4842 char speed[SPEED_SIZE] = "Unknown";
4843 char fc[FC_SIZE] = "RX/TX";
4844
4845 if (vsi->current_isup == isup)
4846 return;
4847 vsi->current_isup = isup;
4848 if (!isup) {
4849 netdev_info(vsi->netdev, "NIC Link is Down\n");
4850 return;
4851 }
4852
4853 /* Warn user if link speed on NPAR enabled partition is not at
4854 * least 10GB
4855 */
4856 if (vsi->back->hw.func_caps.npar_enable &&
4857 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4858 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4859 netdev_warn(vsi->netdev,
4860 "The partition detected link speed that is less than 10Gbps\n");
4861
4862 switch (vsi->back->hw.phy.link_info.link_speed) {
4863 case I40E_LINK_SPEED_40GB:
4864 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4865 break;
4866 case I40E_LINK_SPEED_20GB:
4867 strncpy(speed, "20 Gbps", SPEED_SIZE);
4868 break;
4869 case I40E_LINK_SPEED_10GB:
4870 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4871 break;
4872 case I40E_LINK_SPEED_1GB:
4873 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4874 break;
4875 case I40E_LINK_SPEED_100MB:
4876 strncpy(speed, "100 Mbps", SPEED_SIZE);
4877 break;
4878 default:
4879 break;
4880 }
4881
4882 switch (vsi->back->hw.fc.current_mode) {
4883 case I40E_FC_FULL:
4884 strlcpy(fc, "RX/TX", FC_SIZE);
4885 break;
4886 case I40E_FC_TX_PAUSE:
4887 strlcpy(fc, "TX", FC_SIZE);
4888 break;
4889 case I40E_FC_RX_PAUSE:
4890 strlcpy(fc, "RX", FC_SIZE);
4891 break;
4892 default:
4893 strlcpy(fc, "None", FC_SIZE);
4894 break;
4895 }
4896
4897 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4898 speed, fc);
4899 }
4900
4901 /**
4902 * i40e_up_complete - Finish the last steps of bringing up a connection
4903 * @vsi: the VSI being configured
4904 **/
4905 static int i40e_up_complete(struct i40e_vsi *vsi)
4906 {
4907 struct i40e_pf *pf = vsi->back;
4908 int err;
4909
4910 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4911 i40e_vsi_configure_msix(vsi);
4912 else
4913 i40e_configure_msi_and_legacy(vsi);
4914
4915 /* start rings */
4916 err = i40e_vsi_control_rings(vsi, true);
4917 if (err)
4918 return err;
4919
4920 clear_bit(__I40E_DOWN, &vsi->state);
4921 i40e_napi_enable_all(vsi);
4922 i40e_vsi_enable_irq(vsi);
4923
4924 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4925 (vsi->netdev)) {
4926 i40e_print_link_message(vsi, true);
4927 netif_tx_start_all_queues(vsi->netdev);
4928 netif_carrier_on(vsi->netdev);
4929 } else if (vsi->netdev) {
4930 i40e_print_link_message(vsi, false);
4931 /* need to check for qualified module here*/
4932 if ((pf->hw.phy.link_info.link_info &
4933 I40E_AQ_MEDIA_AVAILABLE) &&
4934 (!(pf->hw.phy.link_info.an_info &
4935 I40E_AQ_QUALIFIED_MODULE)))
4936 netdev_err(vsi->netdev,
4937 "the driver failed to link because an unqualified module was detected.");
4938 }
4939
4940 /* replay FDIR SB filters */
4941 if (vsi->type == I40E_VSI_FDIR) {
4942 /* reset fd counters */
4943 pf->fd_add_err = pf->fd_atr_cnt = 0;
4944 if (pf->fd_tcp_rule > 0) {
4945 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4946 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4947 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4948 pf->fd_tcp_rule = 0;
4949 }
4950 i40e_fdir_filter_restore(vsi);
4951 }
4952 i40e_service_event_schedule(pf);
4953
4954 return 0;
4955 }
4956
4957 /**
4958 * i40e_vsi_reinit_locked - Reset the VSI
4959 * @vsi: the VSI being configured
4960 *
4961 * Rebuild the ring structs after some configuration
4962 * has changed, e.g. MTU size.
4963 **/
4964 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4965 {
4966 struct i40e_pf *pf = vsi->back;
4967
4968 WARN_ON(in_interrupt());
4969 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4970 usleep_range(1000, 2000);
4971 i40e_down(vsi);
4972
4973 /* Give a VF some time to respond to the reset. The
4974 * two second wait is based upon the watchdog cycle in
4975 * the VF driver.
4976 */
4977 if (vsi->type == I40E_VSI_SRIOV)
4978 msleep(2000);
4979 i40e_up(vsi);
4980 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4981 }
4982
4983 /**
4984 * i40e_up - Bring the connection back up after being down
4985 * @vsi: the VSI being configured
4986 **/
4987 int i40e_up(struct i40e_vsi *vsi)
4988 {
4989 int err;
4990
4991 err = i40e_vsi_configure(vsi);
4992 if (!err)
4993 err = i40e_up_complete(vsi);
4994
4995 return err;
4996 }
4997
4998 /**
4999 * i40e_down - Shutdown the connection processing
5000 * @vsi: the VSI being stopped
5001 **/
5002 void i40e_down(struct i40e_vsi *vsi)
5003 {
5004 int i;
5005
5006 /* It is assumed that the caller of this function
5007 * sets the vsi->state __I40E_DOWN bit.
5008 */
5009 if (vsi->netdev) {
5010 netif_carrier_off(vsi->netdev);
5011 netif_tx_disable(vsi->netdev);
5012 }
5013 i40e_vsi_disable_irq(vsi);
5014 i40e_vsi_control_rings(vsi, false);
5015 i40e_napi_disable_all(vsi);
5016
5017 for (i = 0; i < vsi->num_queue_pairs; i++) {
5018 i40e_clean_tx_ring(vsi->tx_rings[i]);
5019 i40e_clean_rx_ring(vsi->rx_rings[i]);
5020 }
5021 }
5022
5023 /**
5024 * i40e_setup_tc - configure multiple traffic classes
5025 * @netdev: net device to configure
5026 * @tc: number of traffic classes to enable
5027 **/
5028 #ifdef I40E_FCOE
5029 int i40e_setup_tc(struct net_device *netdev, u8 tc)
5030 #else
5031 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5032 #endif
5033 {
5034 struct i40e_netdev_priv *np = netdev_priv(netdev);
5035 struct i40e_vsi *vsi = np->vsi;
5036 struct i40e_pf *pf = vsi->back;
5037 u8 enabled_tc = 0;
5038 int ret = -EINVAL;
5039 int i;
5040
5041 /* Check if DCB enabled to continue */
5042 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5043 netdev_info(netdev, "DCB is not enabled for adapter\n");
5044 goto exit;
5045 }
5046
5047 /* Check if MFP enabled */
5048 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5049 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5050 goto exit;
5051 }
5052
5053 /* Check whether tc count is within enabled limit */
5054 if (tc > i40e_pf_get_num_tc(pf)) {
5055 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5056 goto exit;
5057 }
5058
5059 /* Generate TC map for number of tc requested */
5060 for (i = 0; i < tc; i++)
5061 enabled_tc |= BIT_ULL(i);
5062
5063 /* Requesting same TC configuration as already enabled */
5064 if (enabled_tc == vsi->tc_config.enabled_tc)
5065 return 0;
5066
5067 /* Quiesce VSI queues */
5068 i40e_quiesce_vsi(vsi);
5069
5070 /* Configure VSI for enabled TCs */
5071 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5072 if (ret) {
5073 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5074 vsi->seid);
5075 goto exit;
5076 }
5077
5078 /* Unquiesce VSI */
5079 i40e_unquiesce_vsi(vsi);
5080
5081 exit:
5082 return ret;
5083 }
5084
5085 /**
5086 * i40e_open - Called when a network interface is made active
5087 * @netdev: network interface device structure
5088 *
5089 * The open entry point is called when a network interface is made
5090 * active by the system (IFF_UP). At this point all resources needed
5091 * for transmit and receive operations are allocated, the interrupt
5092 * handler is registered with the OS, the netdev watchdog subtask is
5093 * enabled, and the stack is notified that the interface is ready.
5094 *
5095 * Returns 0 on success, negative value on failure
5096 **/
5097 int i40e_open(struct net_device *netdev)
5098 {
5099 struct i40e_netdev_priv *np = netdev_priv(netdev);
5100 struct i40e_vsi *vsi = np->vsi;
5101 struct i40e_pf *pf = vsi->back;
5102 int err;
5103
5104 /* disallow open during test or if eeprom is broken */
5105 if (test_bit(__I40E_TESTING, &pf->state) ||
5106 test_bit(__I40E_BAD_EEPROM, &pf->state))
5107 return -EBUSY;
5108
5109 netif_carrier_off(netdev);
5110
5111 err = i40e_vsi_open(vsi);
5112 if (err)
5113 return err;
5114
5115 /* configure global TSO hardware offload settings */
5116 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5117 TCP_FLAG_FIN) >> 16);
5118 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5119 TCP_FLAG_FIN |
5120 TCP_FLAG_CWR) >> 16);
5121 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5122
5123 #ifdef CONFIG_I40E_VXLAN
5124 vxlan_get_rx_port(netdev);
5125 #endif
5126
5127 return 0;
5128 }
5129
5130 /**
5131 * i40e_vsi_open -
5132 * @vsi: the VSI to open
5133 *
5134 * Finish initialization of the VSI.
5135 *
5136 * Returns 0 on success, negative value on failure
5137 **/
5138 int i40e_vsi_open(struct i40e_vsi *vsi)
5139 {
5140 struct i40e_pf *pf = vsi->back;
5141 char int_name[I40E_INT_NAME_STR_LEN];
5142 int err;
5143
5144 /* allocate descriptors */
5145 err = i40e_vsi_setup_tx_resources(vsi);
5146 if (err)
5147 goto err_setup_tx;
5148 err = i40e_vsi_setup_rx_resources(vsi);
5149 if (err)
5150 goto err_setup_rx;
5151
5152 err = i40e_vsi_configure(vsi);
5153 if (err)
5154 goto err_setup_rx;
5155
5156 if (vsi->netdev) {
5157 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5158 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5159 err = i40e_vsi_request_irq(vsi, int_name);
5160 if (err)
5161 goto err_setup_rx;
5162
5163 /* Notify the stack of the actual queue counts. */
5164 err = netif_set_real_num_tx_queues(vsi->netdev,
5165 vsi->num_queue_pairs);
5166 if (err)
5167 goto err_set_queues;
5168
5169 err = netif_set_real_num_rx_queues(vsi->netdev,
5170 vsi->num_queue_pairs);
5171 if (err)
5172 goto err_set_queues;
5173
5174 } else if (vsi->type == I40E_VSI_FDIR) {
5175 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5176 dev_driver_string(&pf->pdev->dev),
5177 dev_name(&pf->pdev->dev));
5178 err = i40e_vsi_request_irq(vsi, int_name);
5179
5180 } else {
5181 err = -EINVAL;
5182 goto err_setup_rx;
5183 }
5184
5185 err = i40e_up_complete(vsi);
5186 if (err)
5187 goto err_up_complete;
5188
5189 return 0;
5190
5191 err_up_complete:
5192 i40e_down(vsi);
5193 err_set_queues:
5194 i40e_vsi_free_irq(vsi);
5195 err_setup_rx:
5196 i40e_vsi_free_rx_resources(vsi);
5197 err_setup_tx:
5198 i40e_vsi_free_tx_resources(vsi);
5199 if (vsi == pf->vsi[pf->lan_vsi])
5200 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5201
5202 return err;
5203 }
5204
5205 /**
5206 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5207 * @pf: Pointer to PF
5208 *
5209 * This function destroys the hlist where all the Flow Director
5210 * filters were saved.
5211 **/
5212 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5213 {
5214 struct i40e_fdir_filter *filter;
5215 struct hlist_node *node2;
5216
5217 hlist_for_each_entry_safe(filter, node2,
5218 &pf->fdir_filter_list, fdir_node) {
5219 hlist_del(&filter->fdir_node);
5220 kfree(filter);
5221 }
5222 pf->fdir_pf_active_filters = 0;
5223 }
5224
5225 /**
5226 * i40e_close - Disables a network interface
5227 * @netdev: network interface device structure
5228 *
5229 * The close entry point is called when an interface is de-activated
5230 * by the OS. The hardware is still under the driver's control, but
5231 * this netdev interface is disabled.
5232 *
5233 * Returns 0, this is not allowed to fail
5234 **/
5235 #ifdef I40E_FCOE
5236 int i40e_close(struct net_device *netdev)
5237 #else
5238 static int i40e_close(struct net_device *netdev)
5239 #endif
5240 {
5241 struct i40e_netdev_priv *np = netdev_priv(netdev);
5242 struct i40e_vsi *vsi = np->vsi;
5243
5244 i40e_vsi_close(vsi);
5245
5246 return 0;
5247 }
5248
5249 /**
5250 * i40e_do_reset - Start a PF or Core Reset sequence
5251 * @pf: board private structure
5252 * @reset_flags: which reset is requested
5253 *
5254 * The essential difference in resets is that the PF Reset
5255 * doesn't clear the packet buffers, doesn't reset the PE
5256 * firmware, and doesn't bother the other PFs on the chip.
5257 **/
5258 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5259 {
5260 u32 val;
5261
5262 WARN_ON(in_interrupt());
5263
5264 if (i40e_check_asq_alive(&pf->hw))
5265 i40e_vc_notify_reset(pf);
5266
5267 /* do the biggest reset indicated */
5268 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5269
5270 /* Request a Global Reset
5271 *
5272 * This will start the chip's countdown to the actual full
5273 * chip reset event, and a warning interrupt to be sent
5274 * to all PFs, including the requestor. Our handler
5275 * for the warning interrupt will deal with the shutdown
5276 * and recovery of the switch setup.
5277 */
5278 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5279 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5280 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5281 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5282
5283 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5284
5285 /* Request a Core Reset
5286 *
5287 * Same as Global Reset, except does *not* include the MAC/PHY
5288 */
5289 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5290 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5291 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5292 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5293 i40e_flush(&pf->hw);
5294
5295 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5296
5297 /* Request a PF Reset
5298 *
5299 * Resets only the PF-specific registers
5300 *
5301 * This goes directly to the tear-down and rebuild of
5302 * the switch, since we need to do all the recovery as
5303 * for the Core Reset.
5304 */
5305 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5306 i40e_handle_reset_warning(pf);
5307
5308 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5309 int v;
5310
5311 /* Find the VSI(s) that requested a re-init */
5312 dev_info(&pf->pdev->dev,
5313 "VSI reinit requested\n");
5314 for (v = 0; v < pf->num_alloc_vsi; v++) {
5315 struct i40e_vsi *vsi = pf->vsi[v];
5316 if (vsi != NULL &&
5317 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5318 i40e_vsi_reinit_locked(pf->vsi[v]);
5319 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5320 }
5321 }
5322
5323 /* no further action needed, so return now */
5324 return;
5325 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5326 int v;
5327
5328 /* Find the VSI(s) that needs to be brought down */
5329 dev_info(&pf->pdev->dev, "VSI down requested\n");
5330 for (v = 0; v < pf->num_alloc_vsi; v++) {
5331 struct i40e_vsi *vsi = pf->vsi[v];
5332 if (vsi != NULL &&
5333 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5334 set_bit(__I40E_DOWN, &vsi->state);
5335 i40e_down(vsi);
5336 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5337 }
5338 }
5339
5340 /* no further action needed, so return now */
5341 return;
5342 } else {
5343 dev_info(&pf->pdev->dev,
5344 "bad reset request 0x%08x\n", reset_flags);
5345 return;
5346 }
5347 }
5348
5349 #ifdef CONFIG_I40E_DCB
5350 /**
5351 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5352 * @pf: board private structure
5353 * @old_cfg: current DCB config
5354 * @new_cfg: new DCB config
5355 **/
5356 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5357 struct i40e_dcbx_config *old_cfg,
5358 struct i40e_dcbx_config *new_cfg)
5359 {
5360 bool need_reconfig = false;
5361
5362 /* Check if ETS configuration has changed */
5363 if (memcmp(&new_cfg->etscfg,
5364 &old_cfg->etscfg,
5365 sizeof(new_cfg->etscfg))) {
5366 /* If Priority Table has changed reconfig is needed */
5367 if (memcmp(&new_cfg->etscfg.prioritytable,
5368 &old_cfg->etscfg.prioritytable,
5369 sizeof(new_cfg->etscfg.prioritytable))) {
5370 need_reconfig = true;
5371 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5372 }
5373
5374 if (memcmp(&new_cfg->etscfg.tcbwtable,
5375 &old_cfg->etscfg.tcbwtable,
5376 sizeof(new_cfg->etscfg.tcbwtable)))
5377 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5378
5379 if (memcmp(&new_cfg->etscfg.tsatable,
5380 &old_cfg->etscfg.tsatable,
5381 sizeof(new_cfg->etscfg.tsatable)))
5382 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5383 }
5384
5385 /* Check if PFC configuration has changed */
5386 if (memcmp(&new_cfg->pfc,
5387 &old_cfg->pfc,
5388 sizeof(new_cfg->pfc))) {
5389 need_reconfig = true;
5390 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5391 }
5392
5393 /* Check if APP Table has changed */
5394 if (memcmp(&new_cfg->app,
5395 &old_cfg->app,
5396 sizeof(new_cfg->app))) {
5397 need_reconfig = true;
5398 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5399 }
5400
5401 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5402 return need_reconfig;
5403 }
5404
5405 /**
5406 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5407 * @pf: board private structure
5408 * @e: event info posted on ARQ
5409 **/
5410 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5411 struct i40e_arq_event_info *e)
5412 {
5413 struct i40e_aqc_lldp_get_mib *mib =
5414 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5415 struct i40e_hw *hw = &pf->hw;
5416 struct i40e_dcbx_config tmp_dcbx_cfg;
5417 bool need_reconfig = false;
5418 int ret = 0;
5419 u8 type;
5420
5421 /* Not DCB capable or capability disabled */
5422 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5423 return ret;
5424
5425 /* Ignore if event is not for Nearest Bridge */
5426 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5427 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5428 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5429 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5430 return ret;
5431
5432 /* Check MIB Type and return if event for Remote MIB update */
5433 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5434 dev_dbg(&pf->pdev->dev,
5435 "LLDP event mib type %s\n", type ? "remote" : "local");
5436 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5437 /* Update the remote cached instance and return */
5438 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5439 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5440 &hw->remote_dcbx_config);
5441 goto exit;
5442 }
5443
5444 /* Store the old configuration */
5445 tmp_dcbx_cfg = hw->local_dcbx_config;
5446
5447 /* Reset the old DCBx configuration data */
5448 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5449 /* Get updated DCBX data from firmware */
5450 ret = i40e_get_dcb_config(&pf->hw);
5451 if (ret) {
5452 dev_info(&pf->pdev->dev,
5453 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5454 i40e_stat_str(&pf->hw, ret),
5455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5456 goto exit;
5457 }
5458
5459 /* No change detected in DCBX configs */
5460 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5461 sizeof(tmp_dcbx_cfg))) {
5462 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5463 goto exit;
5464 }
5465
5466 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5467 &hw->local_dcbx_config);
5468
5469 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5470
5471 if (!need_reconfig)
5472 goto exit;
5473
5474 /* Enable DCB tagging only when more than one TC */
5475 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5476 pf->flags |= I40E_FLAG_DCB_ENABLED;
5477 else
5478 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5479
5480 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5481 /* Reconfiguration needed quiesce all VSIs */
5482 i40e_pf_quiesce_all_vsi(pf);
5483
5484 /* Changes in configuration update VEB/VSI */
5485 i40e_dcb_reconfigure(pf);
5486
5487 ret = i40e_resume_port_tx(pf);
5488
5489 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5490 /* In case of error no point in resuming VSIs */
5491 if (ret)
5492 goto exit;
5493
5494 /* Wait for the PF's Tx queues to be disabled */
5495 ret = i40e_pf_wait_txq_disabled(pf);
5496 if (ret) {
5497 /* Schedule PF reset to recover */
5498 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5499 i40e_service_event_schedule(pf);
5500 } else {
5501 i40e_pf_unquiesce_all_vsi(pf);
5502 }
5503
5504 exit:
5505 return ret;
5506 }
5507 #endif /* CONFIG_I40E_DCB */
5508
5509 /**
5510 * i40e_do_reset_safe - Protected reset path for userland calls.
5511 * @pf: board private structure
5512 * @reset_flags: which reset is requested
5513 *
5514 **/
5515 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5516 {
5517 rtnl_lock();
5518 i40e_do_reset(pf, reset_flags);
5519 rtnl_unlock();
5520 }
5521
5522 /**
5523 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5524 * @pf: board private structure
5525 * @e: event info posted on ARQ
5526 *
5527 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5528 * and VF queues
5529 **/
5530 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5531 struct i40e_arq_event_info *e)
5532 {
5533 struct i40e_aqc_lan_overflow *data =
5534 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5535 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5536 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5537 struct i40e_hw *hw = &pf->hw;
5538 struct i40e_vf *vf;
5539 u16 vf_id;
5540
5541 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5542 queue, qtx_ctl);
5543
5544 /* Queue belongs to VF, find the VF and issue VF reset */
5545 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5546 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5547 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5548 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5549 vf_id -= hw->func_caps.vf_base_id;
5550 vf = &pf->vf[vf_id];
5551 i40e_vc_notify_vf_reset(vf);
5552 /* Allow VF to process pending reset notification */
5553 msleep(20);
5554 i40e_reset_vf(vf, false);
5555 }
5556 }
5557
5558 /**
5559 * i40e_service_event_complete - Finish up the service event
5560 * @pf: board private structure
5561 **/
5562 static void i40e_service_event_complete(struct i40e_pf *pf)
5563 {
5564 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5565
5566 /* flush memory to make sure state is correct before next watchog */
5567 smp_mb__before_atomic();
5568 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5569 }
5570
5571 /**
5572 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5573 * @pf: board private structure
5574 **/
5575 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5576 {
5577 u32 val, fcnt_prog;
5578
5579 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5580 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5581 return fcnt_prog;
5582 }
5583
5584 /**
5585 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5586 * @pf: board private structure
5587 **/
5588 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5589 {
5590 u32 val, fcnt_prog;
5591
5592 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5593 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5594 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5595 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5596 return fcnt_prog;
5597 }
5598
5599 /**
5600 * i40e_get_global_fd_count - Get total FD filters programmed on device
5601 * @pf: board private structure
5602 **/
5603 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5604 {
5605 u32 val, fcnt_prog;
5606
5607 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5608 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5609 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5610 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5611 return fcnt_prog;
5612 }
5613
5614 /**
5615 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5616 * @pf: board private structure
5617 **/
5618 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5619 {
5620 struct i40e_fdir_filter *filter;
5621 u32 fcnt_prog, fcnt_avail;
5622 struct hlist_node *node;
5623
5624 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5625 return;
5626
5627 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5628 * to re-enable
5629 */
5630 fcnt_prog = i40e_get_global_fd_count(pf);
5631 fcnt_avail = pf->fdir_pf_filter_count;
5632 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5633 (pf->fd_add_err == 0) ||
5634 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5635 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5636 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5637 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5638 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5639 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5640 }
5641 }
5642 /* Wait for some more space to be available to turn on ATR */
5643 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5644 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5645 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5646 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5647 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5648 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5649 }
5650 }
5651
5652 /* if hw had a problem adding a filter, delete it */
5653 if (pf->fd_inv > 0) {
5654 hlist_for_each_entry_safe(filter, node,
5655 &pf->fdir_filter_list, fdir_node) {
5656 if (filter->fd_id == pf->fd_inv) {
5657 hlist_del(&filter->fdir_node);
5658 kfree(filter);
5659 pf->fdir_pf_active_filters--;
5660 }
5661 }
5662 }
5663 }
5664
5665 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5666 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5667 /**
5668 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5669 * @pf: board private structure
5670 **/
5671 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5672 {
5673 unsigned long min_flush_time;
5674 int flush_wait_retry = 50;
5675 bool disable_atr = false;
5676 int fd_room;
5677 int reg;
5678
5679 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5680 return;
5681
5682 if (time_after(jiffies, pf->fd_flush_timestamp +
5683 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5684 /* If the flush is happening too quick and we have mostly
5685 * SB rules we should not re-enable ATR for some time.
5686 */
5687 min_flush_time = pf->fd_flush_timestamp
5688 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5689 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5690
5691 if (!(time_after(jiffies, min_flush_time)) &&
5692 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5693 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5694 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5695 disable_atr = true;
5696 }
5697
5698 pf->fd_flush_timestamp = jiffies;
5699 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5700 /* flush all filters */
5701 wr32(&pf->hw, I40E_PFQF_CTL_1,
5702 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5703 i40e_flush(&pf->hw);
5704 pf->fd_flush_cnt++;
5705 pf->fd_add_err = 0;
5706 do {
5707 /* Check FD flush status every 5-6msec */
5708 usleep_range(5000, 6000);
5709 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5710 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5711 break;
5712 } while (flush_wait_retry--);
5713 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5714 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5715 } else {
5716 /* replay sideband filters */
5717 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5718 if (!disable_atr)
5719 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5720 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5721 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5722 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5723 }
5724 }
5725 }
5726
5727 /**
5728 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5729 * @pf: board private structure
5730 **/
5731 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5732 {
5733 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5734 }
5735
5736 /* We can see up to 256 filter programming desc in transit if the filters are
5737 * being applied really fast; before we see the first
5738 * filter miss error on Rx queue 0. Accumulating enough error messages before
5739 * reacting will make sure we don't cause flush too often.
5740 */
5741 #define I40E_MAX_FD_PROGRAM_ERROR 256
5742
5743 /**
5744 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5745 * @pf: board private structure
5746 **/
5747 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5748 {
5749
5750 /* if interface is down do nothing */
5751 if (test_bit(__I40E_DOWN, &pf->state))
5752 return;
5753
5754 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5755 return;
5756
5757 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5758 i40e_fdir_flush_and_replay(pf);
5759
5760 i40e_fdir_check_and_reenable(pf);
5761
5762 }
5763
5764 /**
5765 * i40e_vsi_link_event - notify VSI of a link event
5766 * @vsi: vsi to be notified
5767 * @link_up: link up or down
5768 **/
5769 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5770 {
5771 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5772 return;
5773
5774 switch (vsi->type) {
5775 case I40E_VSI_MAIN:
5776 #ifdef I40E_FCOE
5777 case I40E_VSI_FCOE:
5778 #endif
5779 if (!vsi->netdev || !vsi->netdev_registered)
5780 break;
5781
5782 if (link_up) {
5783 netif_carrier_on(vsi->netdev);
5784 netif_tx_wake_all_queues(vsi->netdev);
5785 } else {
5786 netif_carrier_off(vsi->netdev);
5787 netif_tx_stop_all_queues(vsi->netdev);
5788 }
5789 break;
5790
5791 case I40E_VSI_SRIOV:
5792 case I40E_VSI_VMDQ2:
5793 case I40E_VSI_CTRL:
5794 case I40E_VSI_MIRROR:
5795 default:
5796 /* there is no notification for other VSIs */
5797 break;
5798 }
5799 }
5800
5801 /**
5802 * i40e_veb_link_event - notify elements on the veb of a link event
5803 * @veb: veb to be notified
5804 * @link_up: link up or down
5805 **/
5806 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5807 {
5808 struct i40e_pf *pf;
5809 int i;
5810
5811 if (!veb || !veb->pf)
5812 return;
5813 pf = veb->pf;
5814
5815 /* depth first... */
5816 for (i = 0; i < I40E_MAX_VEB; i++)
5817 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5818 i40e_veb_link_event(pf->veb[i], link_up);
5819
5820 /* ... now the local VSIs */
5821 for (i = 0; i < pf->num_alloc_vsi; i++)
5822 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5823 i40e_vsi_link_event(pf->vsi[i], link_up);
5824 }
5825
5826 /**
5827 * i40e_link_event - Update netif_carrier status
5828 * @pf: board private structure
5829 **/
5830 static void i40e_link_event(struct i40e_pf *pf)
5831 {
5832 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5833 u8 new_link_speed, old_link_speed;
5834 i40e_status status;
5835 bool new_link, old_link;
5836
5837 /* set this to force the get_link_status call to refresh state */
5838 pf->hw.phy.get_link_info = true;
5839
5840 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5841
5842 status = i40e_get_link_status(&pf->hw, &new_link);
5843 if (status) {
5844 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
5845 status);
5846 return;
5847 }
5848
5849 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5850 new_link_speed = pf->hw.phy.link_info.link_speed;
5851
5852 if (new_link == old_link &&
5853 new_link_speed == old_link_speed &&
5854 (test_bit(__I40E_DOWN, &vsi->state) ||
5855 new_link == netif_carrier_ok(vsi->netdev)))
5856 return;
5857
5858 if (!test_bit(__I40E_DOWN, &vsi->state))
5859 i40e_print_link_message(vsi, new_link);
5860
5861 /* Notify the base of the switch tree connected to
5862 * the link. Floating VEBs are not notified.
5863 */
5864 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5865 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5866 else
5867 i40e_vsi_link_event(vsi, new_link);
5868
5869 if (pf->vf)
5870 i40e_vc_notify_link_state(pf);
5871
5872 if (pf->flags & I40E_FLAG_PTP)
5873 i40e_ptp_set_increment(pf);
5874 }
5875
5876 /**
5877 * i40e_watchdog_subtask - periodic checks not using event driven response
5878 * @pf: board private structure
5879 **/
5880 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5881 {
5882 int i;
5883
5884 /* if interface is down do nothing */
5885 if (test_bit(__I40E_DOWN, &pf->state) ||
5886 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5887 return;
5888
5889 /* make sure we don't do these things too often */
5890 if (time_before(jiffies, (pf->service_timer_previous +
5891 pf->service_timer_period)))
5892 return;
5893 pf->service_timer_previous = jiffies;
5894
5895 i40e_link_event(pf);
5896
5897 /* Update the stats for active netdevs so the network stack
5898 * can look at updated numbers whenever it cares to
5899 */
5900 for (i = 0; i < pf->num_alloc_vsi; i++)
5901 if (pf->vsi[i] && pf->vsi[i]->netdev)
5902 i40e_update_stats(pf->vsi[i]);
5903
5904 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
5905 /* Update the stats for the active switching components */
5906 for (i = 0; i < I40E_MAX_VEB; i++)
5907 if (pf->veb[i])
5908 i40e_update_veb_stats(pf->veb[i]);
5909 }
5910
5911 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5912 }
5913
5914 /**
5915 * i40e_reset_subtask - Set up for resetting the device and driver
5916 * @pf: board private structure
5917 **/
5918 static void i40e_reset_subtask(struct i40e_pf *pf)
5919 {
5920 u32 reset_flags = 0;
5921
5922 rtnl_lock();
5923 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5924 reset_flags |= BIT_ULL(__I40E_REINIT_REQUESTED);
5925 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5926 }
5927 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5928 reset_flags |= BIT_ULL(__I40E_PF_RESET_REQUESTED);
5929 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5930 }
5931 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5932 reset_flags |= BIT_ULL(__I40E_CORE_RESET_REQUESTED);
5933 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5934 }
5935 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5936 reset_flags |= BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED);
5937 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5938 }
5939 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5940 reset_flags |= BIT_ULL(__I40E_DOWN_REQUESTED);
5941 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5942 }
5943
5944 /* If there's a recovery already waiting, it takes
5945 * precedence before starting a new reset sequence.
5946 */
5947 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5948 i40e_handle_reset_warning(pf);
5949 goto unlock;
5950 }
5951
5952 /* If we're already down or resetting, just bail */
5953 if (reset_flags &&
5954 !test_bit(__I40E_DOWN, &pf->state) &&
5955 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5956 i40e_do_reset(pf, reset_flags);
5957
5958 unlock:
5959 rtnl_unlock();
5960 }
5961
5962 /**
5963 * i40e_handle_link_event - Handle link event
5964 * @pf: board private structure
5965 * @e: event info posted on ARQ
5966 **/
5967 static void i40e_handle_link_event(struct i40e_pf *pf,
5968 struct i40e_arq_event_info *e)
5969 {
5970 struct i40e_hw *hw = &pf->hw;
5971 struct i40e_aqc_get_link_status *status =
5972 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5973
5974 /* save off old link status information */
5975 hw->phy.link_info_old = hw->phy.link_info;
5976
5977 /* Do a new status request to re-enable LSE reporting
5978 * and load new status information into the hw struct
5979 * This completely ignores any state information
5980 * in the ARQ event info, instead choosing to always
5981 * issue the AQ update link status command.
5982 */
5983 i40e_link_event(pf);
5984
5985 /* check for unqualified module, if link is down */
5986 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5987 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5988 (!(status->link_info & I40E_AQ_LINK_UP)))
5989 dev_err(&pf->pdev->dev,
5990 "The driver failed to link because an unqualified module was detected.\n");
5991 }
5992
5993 /**
5994 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5995 * @pf: board private structure
5996 **/
5997 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5998 {
5999 struct i40e_arq_event_info event;
6000 struct i40e_hw *hw = &pf->hw;
6001 u16 pending, i = 0;
6002 i40e_status ret;
6003 u16 opcode;
6004 u32 oldval;
6005 u32 val;
6006
6007 /* Do not run clean AQ when PF reset fails */
6008 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6009 return;
6010
6011 /* check for error indications */
6012 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6013 oldval = val;
6014 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6015 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6016 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6017 }
6018 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6019 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6020 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6021 }
6022 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6023 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6024 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6025 }
6026 if (oldval != val)
6027 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6028
6029 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6030 oldval = val;
6031 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6032 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6033 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6034 }
6035 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6036 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6037 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6038 }
6039 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6040 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6041 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6042 }
6043 if (oldval != val)
6044 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6045
6046 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6047 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6048 if (!event.msg_buf)
6049 return;
6050
6051 do {
6052 ret = i40e_clean_arq_element(hw, &event, &pending);
6053 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6054 break;
6055 else if (ret) {
6056 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6057 break;
6058 }
6059
6060 opcode = le16_to_cpu(event.desc.opcode);
6061 switch (opcode) {
6062
6063 case i40e_aqc_opc_get_link_status:
6064 i40e_handle_link_event(pf, &event);
6065 break;
6066 case i40e_aqc_opc_send_msg_to_pf:
6067 ret = i40e_vc_process_vf_msg(pf,
6068 le16_to_cpu(event.desc.retval),
6069 le32_to_cpu(event.desc.cookie_high),
6070 le32_to_cpu(event.desc.cookie_low),
6071 event.msg_buf,
6072 event.msg_len);
6073 break;
6074 case i40e_aqc_opc_lldp_update_mib:
6075 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6076 #ifdef CONFIG_I40E_DCB
6077 rtnl_lock();
6078 ret = i40e_handle_lldp_event(pf, &event);
6079 rtnl_unlock();
6080 #endif /* CONFIG_I40E_DCB */
6081 break;
6082 case i40e_aqc_opc_event_lan_overflow:
6083 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6084 i40e_handle_lan_overflow_event(pf, &event);
6085 break;
6086 case i40e_aqc_opc_send_msg_to_peer:
6087 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6088 break;
6089 case i40e_aqc_opc_nvm_erase:
6090 case i40e_aqc_opc_nvm_update:
6091 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
6092 break;
6093 default:
6094 dev_info(&pf->pdev->dev,
6095 "ARQ Error: Unknown event 0x%04x received\n",
6096 opcode);
6097 break;
6098 }
6099 } while (pending && (i++ < pf->adminq_work_limit));
6100
6101 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6102 /* re-enable Admin queue interrupt cause */
6103 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6104 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6105 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6106 i40e_flush(hw);
6107
6108 kfree(event.msg_buf);
6109 }
6110
6111 /**
6112 * i40e_verify_eeprom - make sure eeprom is good to use
6113 * @pf: board private structure
6114 **/
6115 static void i40e_verify_eeprom(struct i40e_pf *pf)
6116 {
6117 int err;
6118
6119 err = i40e_diag_eeprom_test(&pf->hw);
6120 if (err) {
6121 /* retry in case of garbage read */
6122 err = i40e_diag_eeprom_test(&pf->hw);
6123 if (err) {
6124 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6125 err);
6126 set_bit(__I40E_BAD_EEPROM, &pf->state);
6127 }
6128 }
6129
6130 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6131 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6132 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6133 }
6134 }
6135
6136 /**
6137 * i40e_enable_pf_switch_lb
6138 * @pf: pointer to the PF structure
6139 *
6140 * enable switch loop back or die - no point in a return value
6141 **/
6142 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6143 {
6144 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6145 struct i40e_vsi_context ctxt;
6146 int ret;
6147
6148 ctxt.seid = pf->main_vsi_seid;
6149 ctxt.pf_num = pf->hw.pf_id;
6150 ctxt.vf_num = 0;
6151 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6152 if (ret) {
6153 dev_info(&pf->pdev->dev,
6154 "couldn't get PF vsi config, err %s aq_err %s\n",
6155 i40e_stat_str(&pf->hw, ret),
6156 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6157 return;
6158 }
6159 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6160 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6161 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6162
6163 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6164 if (ret) {
6165 dev_info(&pf->pdev->dev,
6166 "update vsi switch failed, err %s aq_err %s\n",
6167 i40e_stat_str(&pf->hw, ret),
6168 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6169 }
6170 }
6171
6172 /**
6173 * i40e_disable_pf_switch_lb
6174 * @pf: pointer to the PF structure
6175 *
6176 * disable switch loop back or die - no point in a return value
6177 **/
6178 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6179 {
6180 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6181 struct i40e_vsi_context ctxt;
6182 int ret;
6183
6184 ctxt.seid = pf->main_vsi_seid;
6185 ctxt.pf_num = pf->hw.pf_id;
6186 ctxt.vf_num = 0;
6187 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6188 if (ret) {
6189 dev_info(&pf->pdev->dev,
6190 "couldn't get PF vsi config, err %s aq_err %s\n",
6191 i40e_stat_str(&pf->hw, ret),
6192 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6193 return;
6194 }
6195 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6196 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6197 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6198
6199 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6200 if (ret) {
6201 dev_info(&pf->pdev->dev,
6202 "update vsi switch failed, err %s aq_err %s\n",
6203 i40e_stat_str(&pf->hw, ret),
6204 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6205 }
6206 }
6207
6208 /**
6209 * i40e_config_bridge_mode - Configure the HW bridge mode
6210 * @veb: pointer to the bridge instance
6211 *
6212 * Configure the loop back mode for the LAN VSI that is downlink to the
6213 * specified HW bridge instance. It is expected this function is called
6214 * when a new HW bridge is instantiated.
6215 **/
6216 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6217 {
6218 struct i40e_pf *pf = veb->pf;
6219
6220 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6221 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6222 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6223 i40e_disable_pf_switch_lb(pf);
6224 else
6225 i40e_enable_pf_switch_lb(pf);
6226 }
6227
6228 /**
6229 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6230 * @veb: pointer to the VEB instance
6231 *
6232 * This is a recursive function that first builds the attached VSIs then
6233 * recurses in to build the next layer of VEB. We track the connections
6234 * through our own index numbers because the seid's from the HW could
6235 * change across the reset.
6236 **/
6237 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6238 {
6239 struct i40e_vsi *ctl_vsi = NULL;
6240 struct i40e_pf *pf = veb->pf;
6241 int v, veb_idx;
6242 int ret;
6243
6244 /* build VSI that owns this VEB, temporarily attached to base VEB */
6245 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6246 if (pf->vsi[v] &&
6247 pf->vsi[v]->veb_idx == veb->idx &&
6248 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6249 ctl_vsi = pf->vsi[v];
6250 break;
6251 }
6252 }
6253 if (!ctl_vsi) {
6254 dev_info(&pf->pdev->dev,
6255 "missing owner VSI for veb_idx %d\n", veb->idx);
6256 ret = -ENOENT;
6257 goto end_reconstitute;
6258 }
6259 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6260 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6261 ret = i40e_add_vsi(ctl_vsi);
6262 if (ret) {
6263 dev_info(&pf->pdev->dev,
6264 "rebuild of veb_idx %d owner VSI failed: %d\n",
6265 veb->idx, ret);
6266 goto end_reconstitute;
6267 }
6268 i40e_vsi_reset_stats(ctl_vsi);
6269
6270 /* create the VEB in the switch and move the VSI onto the VEB */
6271 ret = i40e_add_veb(veb, ctl_vsi);
6272 if (ret)
6273 goto end_reconstitute;
6274
6275 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6276 veb->bridge_mode = BRIDGE_MODE_VEB;
6277 else
6278 veb->bridge_mode = BRIDGE_MODE_VEPA;
6279 i40e_config_bridge_mode(veb);
6280
6281 /* create the remaining VSIs attached to this VEB */
6282 for (v = 0; v < pf->num_alloc_vsi; v++) {
6283 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6284 continue;
6285
6286 if (pf->vsi[v]->veb_idx == veb->idx) {
6287 struct i40e_vsi *vsi = pf->vsi[v];
6288 vsi->uplink_seid = veb->seid;
6289 ret = i40e_add_vsi(vsi);
6290 if (ret) {
6291 dev_info(&pf->pdev->dev,
6292 "rebuild of vsi_idx %d failed: %d\n",
6293 v, ret);
6294 goto end_reconstitute;
6295 }
6296 i40e_vsi_reset_stats(vsi);
6297 }
6298 }
6299
6300 /* create any VEBs attached to this VEB - RECURSION */
6301 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6302 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6303 pf->veb[veb_idx]->uplink_seid = veb->seid;
6304 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6305 if (ret)
6306 break;
6307 }
6308 }
6309
6310 end_reconstitute:
6311 return ret;
6312 }
6313
6314 /**
6315 * i40e_get_capabilities - get info about the HW
6316 * @pf: the PF struct
6317 **/
6318 static int i40e_get_capabilities(struct i40e_pf *pf)
6319 {
6320 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6321 u16 data_size;
6322 int buf_len;
6323 int err;
6324
6325 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6326 do {
6327 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6328 if (!cap_buf)
6329 return -ENOMEM;
6330
6331 /* this loads the data into the hw struct for us */
6332 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6333 &data_size,
6334 i40e_aqc_opc_list_func_capabilities,
6335 NULL);
6336 /* data loaded, buffer no longer needed */
6337 kfree(cap_buf);
6338
6339 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6340 /* retry with a larger buffer */
6341 buf_len = data_size;
6342 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6343 dev_info(&pf->pdev->dev,
6344 "capability discovery failed, err %s aq_err %s\n",
6345 i40e_stat_str(&pf->hw, err),
6346 i40e_aq_str(&pf->hw,
6347 pf->hw.aq.asq_last_status));
6348 return -ENODEV;
6349 }
6350 } while (err);
6351
6352 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6353 (pf->hw.aq.fw_maj_ver < 2)) {
6354 pf->hw.func_caps.num_msix_vectors++;
6355 pf->hw.func_caps.num_msix_vectors_vf++;
6356 }
6357
6358 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6359 dev_info(&pf->pdev->dev,
6360 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6361 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6362 pf->hw.func_caps.num_msix_vectors,
6363 pf->hw.func_caps.num_msix_vectors_vf,
6364 pf->hw.func_caps.fd_filters_guaranteed,
6365 pf->hw.func_caps.fd_filters_best_effort,
6366 pf->hw.func_caps.num_tx_qp,
6367 pf->hw.func_caps.num_vsis);
6368
6369 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6370 + pf->hw.func_caps.num_vfs)
6371 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6372 dev_info(&pf->pdev->dev,
6373 "got num_vsis %d, setting num_vsis to %d\n",
6374 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6375 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6376 }
6377
6378 return 0;
6379 }
6380
6381 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6382
6383 /**
6384 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6385 * @pf: board private structure
6386 **/
6387 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6388 {
6389 struct i40e_vsi *vsi;
6390 int i;
6391
6392 /* quick workaround for an NVM issue that leaves a critical register
6393 * uninitialized
6394 */
6395 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6396 static const u32 hkey[] = {
6397 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6398 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6399 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6400 0x95b3a76d};
6401
6402 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6403 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6404 }
6405
6406 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6407 return;
6408
6409 /* find existing VSI and see if it needs configuring */
6410 vsi = NULL;
6411 for (i = 0; i < pf->num_alloc_vsi; i++) {
6412 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6413 vsi = pf->vsi[i];
6414 break;
6415 }
6416 }
6417
6418 /* create a new VSI if none exists */
6419 if (!vsi) {
6420 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6421 pf->vsi[pf->lan_vsi]->seid, 0);
6422 if (!vsi) {
6423 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6424 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6425 return;
6426 }
6427 }
6428
6429 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6430 }
6431
6432 /**
6433 * i40e_fdir_teardown - release the Flow Director resources
6434 * @pf: board private structure
6435 **/
6436 static void i40e_fdir_teardown(struct i40e_pf *pf)
6437 {
6438 int i;
6439
6440 i40e_fdir_filter_exit(pf);
6441 for (i = 0; i < pf->num_alloc_vsi; i++) {
6442 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6443 i40e_vsi_release(pf->vsi[i]);
6444 break;
6445 }
6446 }
6447 }
6448
6449 /**
6450 * i40e_prep_for_reset - prep for the core to reset
6451 * @pf: board private structure
6452 *
6453 * Close up the VFs and other things in prep for PF Reset.
6454 **/
6455 static void i40e_prep_for_reset(struct i40e_pf *pf)
6456 {
6457 struct i40e_hw *hw = &pf->hw;
6458 i40e_status ret = 0;
6459 u32 v;
6460
6461 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6462 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6463 return;
6464
6465 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6466
6467 /* quiesce the VSIs and their queues that are not already DOWN */
6468 i40e_pf_quiesce_all_vsi(pf);
6469
6470 for (v = 0; v < pf->num_alloc_vsi; v++) {
6471 if (pf->vsi[v])
6472 pf->vsi[v]->seid = 0;
6473 }
6474
6475 i40e_shutdown_adminq(&pf->hw);
6476
6477 /* call shutdown HMC */
6478 if (hw->hmc.hmc_obj) {
6479 ret = i40e_shutdown_lan_hmc(hw);
6480 if (ret)
6481 dev_warn(&pf->pdev->dev,
6482 "shutdown_lan_hmc failed: %d\n", ret);
6483 }
6484 }
6485
6486 /**
6487 * i40e_send_version - update firmware with driver version
6488 * @pf: PF struct
6489 */
6490 static void i40e_send_version(struct i40e_pf *pf)
6491 {
6492 struct i40e_driver_version dv;
6493
6494 dv.major_version = DRV_VERSION_MAJOR;
6495 dv.minor_version = DRV_VERSION_MINOR;
6496 dv.build_version = DRV_VERSION_BUILD;
6497 dv.subbuild_version = 0;
6498 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6499 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6500 }
6501
6502 /**
6503 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6504 * @pf: board private structure
6505 * @reinit: if the Main VSI needs to re-initialized.
6506 **/
6507 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6508 {
6509 struct i40e_hw *hw = &pf->hw;
6510 u8 set_fc_aq_fail = 0;
6511 i40e_status ret;
6512 u32 v;
6513
6514 /* Now we wait for GRST to settle out.
6515 * We don't have to delete the VEBs or VSIs from the hw switch
6516 * because the reset will make them disappear.
6517 */
6518 ret = i40e_pf_reset(hw);
6519 if (ret) {
6520 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6521 set_bit(__I40E_RESET_FAILED, &pf->state);
6522 goto clear_recovery;
6523 }
6524 pf->pfr_count++;
6525
6526 if (test_bit(__I40E_DOWN, &pf->state))
6527 goto clear_recovery;
6528 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6529
6530 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6531 ret = i40e_init_adminq(&pf->hw);
6532 if (ret) {
6533 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6534 i40e_stat_str(&pf->hw, ret),
6535 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6536 goto clear_recovery;
6537 }
6538
6539 /* re-verify the eeprom if we just had an EMP reset */
6540 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6541 i40e_verify_eeprom(pf);
6542
6543 i40e_clear_pxe_mode(hw);
6544 ret = i40e_get_capabilities(pf);
6545 if (ret)
6546 goto end_core_reset;
6547
6548 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6549 hw->func_caps.num_rx_qp,
6550 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6551 if (ret) {
6552 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6553 goto end_core_reset;
6554 }
6555 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6556 if (ret) {
6557 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6558 goto end_core_reset;
6559 }
6560
6561 #ifdef CONFIG_I40E_DCB
6562 ret = i40e_init_pf_dcb(pf);
6563 if (ret) {
6564 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6565 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6566 /* Continue without DCB enabled */
6567 }
6568 #endif /* CONFIG_I40E_DCB */
6569 #ifdef I40E_FCOE
6570 i40e_init_pf_fcoe(pf);
6571
6572 #endif
6573 /* do basic switch setup */
6574 ret = i40e_setup_pf_switch(pf, reinit);
6575 if (ret)
6576 goto end_core_reset;
6577
6578 /* driver is only interested in link up/down and module qualification
6579 * reports from firmware
6580 */
6581 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6582 I40E_AQ_EVENT_LINK_UPDOWN |
6583 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6584 if (ret)
6585 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6586 i40e_stat_str(&pf->hw, ret),
6587 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6588
6589 /* make sure our flow control settings are restored */
6590 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6591 if (ret)
6592 dev_info(&pf->pdev->dev, "set fc fail, err %s aq_err %s\n",
6593 i40e_stat_str(&pf->hw, ret),
6594 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6595
6596 /* Rebuild the VSIs and VEBs that existed before reset.
6597 * They are still in our local switch element arrays, so only
6598 * need to rebuild the switch model in the HW.
6599 *
6600 * If there were VEBs but the reconstitution failed, we'll try
6601 * try to recover minimal use by getting the basic PF VSI working.
6602 */
6603 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6604 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6605 /* find the one VEB connected to the MAC, and find orphans */
6606 for (v = 0; v < I40E_MAX_VEB; v++) {
6607 if (!pf->veb[v])
6608 continue;
6609
6610 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6611 pf->veb[v]->uplink_seid == 0) {
6612 ret = i40e_reconstitute_veb(pf->veb[v]);
6613
6614 if (!ret)
6615 continue;
6616
6617 /* If Main VEB failed, we're in deep doodoo,
6618 * so give up rebuilding the switch and set up
6619 * for minimal rebuild of PF VSI.
6620 * If orphan failed, we'll report the error
6621 * but try to keep going.
6622 */
6623 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6624 dev_info(&pf->pdev->dev,
6625 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6626 ret);
6627 pf->vsi[pf->lan_vsi]->uplink_seid
6628 = pf->mac_seid;
6629 break;
6630 } else if (pf->veb[v]->uplink_seid == 0) {
6631 dev_info(&pf->pdev->dev,
6632 "rebuild of orphan VEB failed: %d\n",
6633 ret);
6634 }
6635 }
6636 }
6637 }
6638
6639 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6640 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6641 /* no VEB, so rebuild only the Main VSI */
6642 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6643 if (ret) {
6644 dev_info(&pf->pdev->dev,
6645 "rebuild of Main VSI failed: %d\n", ret);
6646 goto end_core_reset;
6647 }
6648 }
6649
6650 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6651 (pf->hw.aq.fw_maj_ver < 4)) {
6652 msleep(75);
6653 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6654 if (ret)
6655 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6656 i40e_stat_str(&pf->hw, ret),
6657 i40e_aq_str(&pf->hw,
6658 pf->hw.aq.asq_last_status));
6659 }
6660 /* reinit the misc interrupt */
6661 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6662 ret = i40e_setup_misc_vector(pf);
6663
6664 /* restart the VSIs that were rebuilt and running before the reset */
6665 i40e_pf_unquiesce_all_vsi(pf);
6666
6667 if (pf->num_alloc_vfs) {
6668 for (v = 0; v < pf->num_alloc_vfs; v++)
6669 i40e_reset_vf(&pf->vf[v], true);
6670 }
6671
6672 /* tell the firmware that we're starting */
6673 i40e_send_version(pf);
6674
6675 end_core_reset:
6676 clear_bit(__I40E_RESET_FAILED, &pf->state);
6677 clear_recovery:
6678 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6679 }
6680
6681 /**
6682 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6683 * @pf: board private structure
6684 *
6685 * Close up the VFs and other things in prep for a Core Reset,
6686 * then get ready to rebuild the world.
6687 **/
6688 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6689 {
6690 i40e_prep_for_reset(pf);
6691 i40e_reset_and_rebuild(pf, false);
6692 }
6693
6694 /**
6695 * i40e_handle_mdd_event
6696 * @pf: pointer to the PF structure
6697 *
6698 * Called from the MDD irq handler to identify possibly malicious vfs
6699 **/
6700 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6701 {
6702 struct i40e_hw *hw = &pf->hw;
6703 bool mdd_detected = false;
6704 bool pf_mdd_detected = false;
6705 struct i40e_vf *vf;
6706 u32 reg;
6707 int i;
6708
6709 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6710 return;
6711
6712 /* find what triggered the MDD event */
6713 reg = rd32(hw, I40E_GL_MDET_TX);
6714 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6715 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6716 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6717 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6718 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6719 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6720 I40E_GL_MDET_TX_EVENT_SHIFT;
6721 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6722 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6723 pf->hw.func_caps.base_queue;
6724 if (netif_msg_tx_err(pf))
6725 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6726 event, queue, pf_num, vf_num);
6727 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6728 mdd_detected = true;
6729 }
6730 reg = rd32(hw, I40E_GL_MDET_RX);
6731 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6732 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6733 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6734 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6735 I40E_GL_MDET_RX_EVENT_SHIFT;
6736 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6737 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6738 pf->hw.func_caps.base_queue;
6739 if (netif_msg_rx_err(pf))
6740 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6741 event, queue, func);
6742 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6743 mdd_detected = true;
6744 }
6745
6746 if (mdd_detected) {
6747 reg = rd32(hw, I40E_PF_MDET_TX);
6748 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6749 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6750 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6751 pf_mdd_detected = true;
6752 }
6753 reg = rd32(hw, I40E_PF_MDET_RX);
6754 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6755 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6756 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6757 pf_mdd_detected = true;
6758 }
6759 /* Queue belongs to the PF, initiate a reset */
6760 if (pf_mdd_detected) {
6761 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6762 i40e_service_event_schedule(pf);
6763 }
6764 }
6765
6766 /* see if one of the VFs needs its hand slapped */
6767 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6768 vf = &(pf->vf[i]);
6769 reg = rd32(hw, I40E_VP_MDET_TX(i));
6770 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6771 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6772 vf->num_mdd_events++;
6773 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6774 i);
6775 }
6776
6777 reg = rd32(hw, I40E_VP_MDET_RX(i));
6778 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6779 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6780 vf->num_mdd_events++;
6781 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6782 i);
6783 }
6784
6785 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6786 dev_info(&pf->pdev->dev,
6787 "Too many MDD events on VF %d, disabled\n", i);
6788 dev_info(&pf->pdev->dev,
6789 "Use PF Control I/F to re-enable the VF\n");
6790 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6791 }
6792 }
6793
6794 /* re-enable mdd interrupt cause */
6795 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6796 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6797 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6798 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6799 i40e_flush(hw);
6800 }
6801
6802 #ifdef CONFIG_I40E_VXLAN
6803 /**
6804 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6805 * @pf: board private structure
6806 **/
6807 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6808 {
6809 struct i40e_hw *hw = &pf->hw;
6810 i40e_status ret;
6811 __be16 port;
6812 int i;
6813
6814 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6815 return;
6816
6817 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6818
6819 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6820 if (pf->pending_vxlan_bitmap & BIT_ULL(i)) {
6821 pf->pending_vxlan_bitmap &= ~BIT_ULL(i);
6822 port = pf->vxlan_ports[i];
6823 if (port)
6824 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6825 I40E_AQC_TUNNEL_TYPE_VXLAN,
6826 NULL, NULL);
6827 else
6828 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6829
6830 if (ret) {
6831 dev_info(&pf->pdev->dev,
6832 "%s vxlan port %d, index %d failed, err %s aq_err %s\n",
6833 port ? "add" : "delete",
6834 ntohs(port), i,
6835 i40e_stat_str(&pf->hw, ret),
6836 i40e_aq_str(&pf->hw,
6837 pf->hw.aq.asq_last_status));
6838 pf->vxlan_ports[i] = 0;
6839 }
6840 }
6841 }
6842 }
6843
6844 #endif
6845 /**
6846 * i40e_service_task - Run the driver's async subtasks
6847 * @work: pointer to work_struct containing our data
6848 **/
6849 static void i40e_service_task(struct work_struct *work)
6850 {
6851 struct i40e_pf *pf = container_of(work,
6852 struct i40e_pf,
6853 service_task);
6854 unsigned long start_time = jiffies;
6855
6856 /* don't bother with service tasks if a reset is in progress */
6857 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6858 i40e_service_event_complete(pf);
6859 return;
6860 }
6861
6862 i40e_detect_recover_hung(pf);
6863 i40e_reset_subtask(pf);
6864 i40e_handle_mdd_event(pf);
6865 i40e_vc_process_vflr_event(pf);
6866 i40e_watchdog_subtask(pf);
6867 i40e_fdir_reinit_subtask(pf);
6868 i40e_sync_filters_subtask(pf);
6869 #ifdef CONFIG_I40E_VXLAN
6870 i40e_sync_vxlan_filters_subtask(pf);
6871 #endif
6872 i40e_clean_adminq_subtask(pf);
6873
6874 i40e_service_event_complete(pf);
6875
6876 /* If the tasks have taken longer than one timer cycle or there
6877 * is more work to be done, reschedule the service task now
6878 * rather than wait for the timer to tick again.
6879 */
6880 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6881 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6882 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6883 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6884 i40e_service_event_schedule(pf);
6885 }
6886
6887 /**
6888 * i40e_service_timer - timer callback
6889 * @data: pointer to PF struct
6890 **/
6891 static void i40e_service_timer(unsigned long data)
6892 {
6893 struct i40e_pf *pf = (struct i40e_pf *)data;
6894
6895 mod_timer(&pf->service_timer,
6896 round_jiffies(jiffies + pf->service_timer_period));
6897 i40e_service_event_schedule(pf);
6898 }
6899
6900 /**
6901 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6902 * @vsi: the VSI being configured
6903 **/
6904 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6905 {
6906 struct i40e_pf *pf = vsi->back;
6907
6908 switch (vsi->type) {
6909 case I40E_VSI_MAIN:
6910 vsi->alloc_queue_pairs = pf->num_lan_qps;
6911 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6912 I40E_REQ_DESCRIPTOR_MULTIPLE);
6913 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6914 vsi->num_q_vectors = pf->num_lan_msix;
6915 else
6916 vsi->num_q_vectors = 1;
6917
6918 break;
6919
6920 case I40E_VSI_FDIR:
6921 vsi->alloc_queue_pairs = 1;
6922 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6923 I40E_REQ_DESCRIPTOR_MULTIPLE);
6924 vsi->num_q_vectors = 1;
6925 break;
6926
6927 case I40E_VSI_VMDQ2:
6928 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6929 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6930 I40E_REQ_DESCRIPTOR_MULTIPLE);
6931 vsi->num_q_vectors = pf->num_vmdq_msix;
6932 break;
6933
6934 case I40E_VSI_SRIOV:
6935 vsi->alloc_queue_pairs = pf->num_vf_qps;
6936 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6937 I40E_REQ_DESCRIPTOR_MULTIPLE);
6938 break;
6939
6940 #ifdef I40E_FCOE
6941 case I40E_VSI_FCOE:
6942 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6943 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6944 I40E_REQ_DESCRIPTOR_MULTIPLE);
6945 vsi->num_q_vectors = pf->num_fcoe_msix;
6946 break;
6947
6948 #endif /* I40E_FCOE */
6949 default:
6950 WARN_ON(1);
6951 return -ENODATA;
6952 }
6953
6954 return 0;
6955 }
6956
6957 /**
6958 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6959 * @type: VSI pointer
6960 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6961 *
6962 * On error: returns error code (negative)
6963 * On success: returns 0
6964 **/
6965 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6966 {
6967 int size;
6968 int ret = 0;
6969
6970 /* allocate memory for both Tx and Rx ring pointers */
6971 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6972 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6973 if (!vsi->tx_rings)
6974 return -ENOMEM;
6975 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6976
6977 if (alloc_qvectors) {
6978 /* allocate memory for q_vector pointers */
6979 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6980 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6981 if (!vsi->q_vectors) {
6982 ret = -ENOMEM;
6983 goto err_vectors;
6984 }
6985 }
6986 return ret;
6987
6988 err_vectors:
6989 kfree(vsi->tx_rings);
6990 return ret;
6991 }
6992
6993 /**
6994 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6995 * @pf: board private structure
6996 * @type: type of VSI
6997 *
6998 * On error: returns error code (negative)
6999 * On success: returns vsi index in PF (positive)
7000 **/
7001 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7002 {
7003 int ret = -ENODEV;
7004 struct i40e_vsi *vsi;
7005 int vsi_idx;
7006 int i;
7007
7008 /* Need to protect the allocation of the VSIs at the PF level */
7009 mutex_lock(&pf->switch_mutex);
7010
7011 /* VSI list may be fragmented if VSI creation/destruction has
7012 * been happening. We can afford to do a quick scan to look
7013 * for any free VSIs in the list.
7014 *
7015 * find next empty vsi slot, looping back around if necessary
7016 */
7017 i = pf->next_vsi;
7018 while (i < pf->num_alloc_vsi && pf->vsi[i])
7019 i++;
7020 if (i >= pf->num_alloc_vsi) {
7021 i = 0;
7022 while (i < pf->next_vsi && pf->vsi[i])
7023 i++;
7024 }
7025
7026 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7027 vsi_idx = i; /* Found one! */
7028 } else {
7029 ret = -ENODEV;
7030 goto unlock_pf; /* out of VSI slots! */
7031 }
7032 pf->next_vsi = ++i;
7033
7034 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7035 if (!vsi) {
7036 ret = -ENOMEM;
7037 goto unlock_pf;
7038 }
7039 vsi->type = type;
7040 vsi->back = pf;
7041 set_bit(__I40E_DOWN, &vsi->state);
7042 vsi->flags = 0;
7043 vsi->idx = vsi_idx;
7044 vsi->rx_itr_setting = pf->rx_itr_default;
7045 vsi->tx_itr_setting = pf->tx_itr_default;
7046 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7047 pf->rss_table_size : 64;
7048 vsi->netdev_registered = false;
7049 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7050 INIT_LIST_HEAD(&vsi->mac_filter_list);
7051 vsi->irqs_ready = false;
7052
7053 ret = i40e_set_num_rings_in_vsi(vsi);
7054 if (ret)
7055 goto err_rings;
7056
7057 ret = i40e_vsi_alloc_arrays(vsi, true);
7058 if (ret)
7059 goto err_rings;
7060
7061 /* Setup default MSIX irq handler for VSI */
7062 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7063
7064 pf->vsi[vsi_idx] = vsi;
7065 ret = vsi_idx;
7066 goto unlock_pf;
7067
7068 err_rings:
7069 pf->next_vsi = i - 1;
7070 kfree(vsi);
7071 unlock_pf:
7072 mutex_unlock(&pf->switch_mutex);
7073 return ret;
7074 }
7075
7076 /**
7077 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7078 * @type: VSI pointer
7079 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7080 *
7081 * On error: returns error code (negative)
7082 * On success: returns 0
7083 **/
7084 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7085 {
7086 /* free the ring and vector containers */
7087 if (free_qvectors) {
7088 kfree(vsi->q_vectors);
7089 vsi->q_vectors = NULL;
7090 }
7091 kfree(vsi->tx_rings);
7092 vsi->tx_rings = NULL;
7093 vsi->rx_rings = NULL;
7094 }
7095
7096 /**
7097 * i40e_vsi_clear - Deallocate the VSI provided
7098 * @vsi: the VSI being un-configured
7099 **/
7100 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7101 {
7102 struct i40e_pf *pf;
7103
7104 if (!vsi)
7105 return 0;
7106
7107 if (!vsi->back)
7108 goto free_vsi;
7109 pf = vsi->back;
7110
7111 mutex_lock(&pf->switch_mutex);
7112 if (!pf->vsi[vsi->idx]) {
7113 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7114 vsi->idx, vsi->idx, vsi, vsi->type);
7115 goto unlock_vsi;
7116 }
7117
7118 if (pf->vsi[vsi->idx] != vsi) {
7119 dev_err(&pf->pdev->dev,
7120 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7121 pf->vsi[vsi->idx]->idx,
7122 pf->vsi[vsi->idx],
7123 pf->vsi[vsi->idx]->type,
7124 vsi->idx, vsi, vsi->type);
7125 goto unlock_vsi;
7126 }
7127
7128 /* updates the PF for this cleared vsi */
7129 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7130 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7131
7132 i40e_vsi_free_arrays(vsi, true);
7133
7134 pf->vsi[vsi->idx] = NULL;
7135 if (vsi->idx < pf->next_vsi)
7136 pf->next_vsi = vsi->idx;
7137
7138 unlock_vsi:
7139 mutex_unlock(&pf->switch_mutex);
7140 free_vsi:
7141 kfree(vsi);
7142
7143 return 0;
7144 }
7145
7146 /**
7147 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7148 * @vsi: the VSI being cleaned
7149 **/
7150 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7151 {
7152 int i;
7153
7154 if (vsi->tx_rings && vsi->tx_rings[0]) {
7155 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7156 kfree_rcu(vsi->tx_rings[i], rcu);
7157 vsi->tx_rings[i] = NULL;
7158 vsi->rx_rings[i] = NULL;
7159 }
7160 }
7161 }
7162
7163 /**
7164 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7165 * @vsi: the VSI being configured
7166 **/
7167 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7168 {
7169 struct i40e_ring *tx_ring, *rx_ring;
7170 struct i40e_pf *pf = vsi->back;
7171 int i;
7172
7173 /* Set basic values in the rings to be used later during open() */
7174 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7175 /* allocate space for both Tx and Rx in one shot */
7176 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7177 if (!tx_ring)
7178 goto err_out;
7179
7180 tx_ring->queue_index = i;
7181 tx_ring->reg_idx = vsi->base_queue + i;
7182 tx_ring->ring_active = false;
7183 tx_ring->vsi = vsi;
7184 tx_ring->netdev = vsi->netdev;
7185 tx_ring->dev = &pf->pdev->dev;
7186 tx_ring->count = vsi->num_desc;
7187 tx_ring->size = 0;
7188 tx_ring->dcb_tc = 0;
7189 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7190 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7191 if (vsi->back->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE)
7192 tx_ring->flags |= I40E_TXR_FLAGS_OUTER_UDP_CSUM;
7193 vsi->tx_rings[i] = tx_ring;
7194
7195 rx_ring = &tx_ring[1];
7196 rx_ring->queue_index = i;
7197 rx_ring->reg_idx = vsi->base_queue + i;
7198 rx_ring->ring_active = false;
7199 rx_ring->vsi = vsi;
7200 rx_ring->netdev = vsi->netdev;
7201 rx_ring->dev = &pf->pdev->dev;
7202 rx_ring->count = vsi->num_desc;
7203 rx_ring->size = 0;
7204 rx_ring->dcb_tc = 0;
7205 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7206 set_ring_16byte_desc_enabled(rx_ring);
7207 else
7208 clear_ring_16byte_desc_enabled(rx_ring);
7209 vsi->rx_rings[i] = rx_ring;
7210 }
7211
7212 return 0;
7213
7214 err_out:
7215 i40e_vsi_clear_rings(vsi);
7216 return -ENOMEM;
7217 }
7218
7219 /**
7220 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7221 * @pf: board private structure
7222 * @vectors: the number of MSI-X vectors to request
7223 *
7224 * Returns the number of vectors reserved, or error
7225 **/
7226 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7227 {
7228 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7229 I40E_MIN_MSIX, vectors);
7230 if (vectors < 0) {
7231 dev_info(&pf->pdev->dev,
7232 "MSI-X vector reservation failed: %d\n", vectors);
7233 vectors = 0;
7234 }
7235
7236 return vectors;
7237 }
7238
7239 /**
7240 * i40e_init_msix - Setup the MSIX capability
7241 * @pf: board private structure
7242 *
7243 * Work with the OS to set up the MSIX vectors needed.
7244 *
7245 * Returns the number of vectors reserved or negative on failure
7246 **/
7247 static int i40e_init_msix(struct i40e_pf *pf)
7248 {
7249 struct i40e_hw *hw = &pf->hw;
7250 int vectors_left;
7251 int v_budget, i;
7252 int v_actual;
7253
7254 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7255 return -ENODEV;
7256
7257 /* The number of vectors we'll request will be comprised of:
7258 * - Add 1 for "other" cause for Admin Queue events, etc.
7259 * - The number of LAN queue pairs
7260 * - Queues being used for RSS.
7261 * We don't need as many as max_rss_size vectors.
7262 * use rss_size instead in the calculation since that
7263 * is governed by number of cpus in the system.
7264 * - assumes symmetric Tx/Rx pairing
7265 * - The number of VMDq pairs
7266 #ifdef I40E_FCOE
7267 * - The number of FCOE qps.
7268 #endif
7269 * Once we count this up, try the request.
7270 *
7271 * If we can't get what we want, we'll simplify to nearly nothing
7272 * and try again. If that still fails, we punt.
7273 */
7274 vectors_left = hw->func_caps.num_msix_vectors;
7275 v_budget = 0;
7276
7277 /* reserve one vector for miscellaneous handler */
7278 if (vectors_left) {
7279 v_budget++;
7280 vectors_left--;
7281 }
7282
7283 /* reserve vectors for the main PF traffic queues */
7284 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7285 vectors_left -= pf->num_lan_msix;
7286 v_budget += pf->num_lan_msix;
7287
7288 /* reserve one vector for sideband flow director */
7289 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7290 if (vectors_left) {
7291 v_budget++;
7292 vectors_left--;
7293 } else {
7294 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7295 }
7296 }
7297
7298 #ifdef I40E_FCOE
7299 /* can we reserve enough for FCoE? */
7300 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7301 if (!vectors_left)
7302 pf->num_fcoe_msix = 0;
7303 else if (vectors_left >= pf->num_fcoe_qps)
7304 pf->num_fcoe_msix = pf->num_fcoe_qps;
7305 else
7306 pf->num_fcoe_msix = 1;
7307 v_budget += pf->num_fcoe_msix;
7308 vectors_left -= pf->num_fcoe_msix;
7309 }
7310
7311 #endif
7312 /* any vectors left over go for VMDq support */
7313 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7314 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7315 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7316
7317 /* if we're short on vectors for what's desired, we limit
7318 * the queues per vmdq. If this is still more than are
7319 * available, the user will need to change the number of
7320 * queues/vectors used by the PF later with the ethtool
7321 * channels command
7322 */
7323 if (vmdq_vecs < vmdq_vecs_wanted)
7324 pf->num_vmdq_qps = 1;
7325 pf->num_vmdq_msix = pf->num_vmdq_qps;
7326
7327 v_budget += vmdq_vecs;
7328 vectors_left -= vmdq_vecs;
7329 }
7330
7331 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7332 GFP_KERNEL);
7333 if (!pf->msix_entries)
7334 return -ENOMEM;
7335
7336 for (i = 0; i < v_budget; i++)
7337 pf->msix_entries[i].entry = i;
7338 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7339
7340 if (v_actual != v_budget) {
7341 /* If we have limited resources, we will start with no vectors
7342 * for the special features and then allocate vectors to some
7343 * of these features based on the policy and at the end disable
7344 * the features that did not get any vectors.
7345 */
7346 #ifdef I40E_FCOE
7347 pf->num_fcoe_qps = 0;
7348 pf->num_fcoe_msix = 0;
7349 #endif
7350 pf->num_vmdq_msix = 0;
7351 }
7352
7353 if (v_actual < I40E_MIN_MSIX) {
7354 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7355 kfree(pf->msix_entries);
7356 pf->msix_entries = NULL;
7357 return -ENODEV;
7358
7359 } else if (v_actual == I40E_MIN_MSIX) {
7360 /* Adjust for minimal MSIX use */
7361 pf->num_vmdq_vsis = 0;
7362 pf->num_vmdq_qps = 0;
7363 pf->num_lan_qps = 1;
7364 pf->num_lan_msix = 1;
7365
7366 } else if (v_actual != v_budget) {
7367 int vec;
7368
7369 /* reserve the misc vector */
7370 vec = v_actual - 1;
7371
7372 /* Scale vector usage down */
7373 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7374 pf->num_vmdq_vsis = 1;
7375 pf->num_vmdq_qps = 1;
7376 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7377
7378 /* partition out the remaining vectors */
7379 switch (vec) {
7380 case 2:
7381 pf->num_lan_msix = 1;
7382 break;
7383 case 3:
7384 #ifdef I40E_FCOE
7385 /* give one vector to FCoE */
7386 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7387 pf->num_lan_msix = 1;
7388 pf->num_fcoe_msix = 1;
7389 }
7390 #else
7391 pf->num_lan_msix = 2;
7392 #endif
7393 break;
7394 default:
7395 #ifdef I40E_FCOE
7396 /* give one vector to FCoE */
7397 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7398 pf->num_fcoe_msix = 1;
7399 vec--;
7400 }
7401 #endif
7402 /* give the rest to the PF */
7403 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7404 break;
7405 }
7406 }
7407
7408 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7409 (pf->num_vmdq_msix == 0)) {
7410 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7411 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7412 }
7413 #ifdef I40E_FCOE
7414
7415 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7416 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7417 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7418 }
7419 #endif
7420 return v_actual;
7421 }
7422
7423 /**
7424 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7425 * @vsi: the VSI being configured
7426 * @v_idx: index of the vector in the vsi struct
7427 *
7428 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7429 **/
7430 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7431 {
7432 struct i40e_q_vector *q_vector;
7433
7434 /* allocate q_vector */
7435 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7436 if (!q_vector)
7437 return -ENOMEM;
7438
7439 q_vector->vsi = vsi;
7440 q_vector->v_idx = v_idx;
7441 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7442 if (vsi->netdev)
7443 netif_napi_add(vsi->netdev, &q_vector->napi,
7444 i40e_napi_poll, NAPI_POLL_WEIGHT);
7445
7446 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7447 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7448
7449 /* tie q_vector and vsi together */
7450 vsi->q_vectors[v_idx] = q_vector;
7451
7452 return 0;
7453 }
7454
7455 /**
7456 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7457 * @vsi: the VSI being configured
7458 *
7459 * We allocate one q_vector per queue interrupt. If allocation fails we
7460 * return -ENOMEM.
7461 **/
7462 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7463 {
7464 struct i40e_pf *pf = vsi->back;
7465 int v_idx, num_q_vectors;
7466 int err;
7467
7468 /* if not MSIX, give the one vector only to the LAN VSI */
7469 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7470 num_q_vectors = vsi->num_q_vectors;
7471 else if (vsi == pf->vsi[pf->lan_vsi])
7472 num_q_vectors = 1;
7473 else
7474 return -EINVAL;
7475
7476 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7477 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7478 if (err)
7479 goto err_out;
7480 }
7481
7482 return 0;
7483
7484 err_out:
7485 while (v_idx--)
7486 i40e_free_q_vector(vsi, v_idx);
7487
7488 return err;
7489 }
7490
7491 /**
7492 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7493 * @pf: board private structure to initialize
7494 **/
7495 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7496 {
7497 int vectors = 0;
7498 ssize_t size;
7499
7500 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7501 vectors = i40e_init_msix(pf);
7502 if (vectors < 0) {
7503 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7504 #ifdef I40E_FCOE
7505 I40E_FLAG_FCOE_ENABLED |
7506 #endif
7507 I40E_FLAG_RSS_ENABLED |
7508 I40E_FLAG_DCB_CAPABLE |
7509 I40E_FLAG_SRIOV_ENABLED |
7510 I40E_FLAG_FD_SB_ENABLED |
7511 I40E_FLAG_FD_ATR_ENABLED |
7512 I40E_FLAG_VMDQ_ENABLED);
7513
7514 /* rework the queue expectations without MSIX */
7515 i40e_determine_queue_usage(pf);
7516 }
7517 }
7518
7519 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7520 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7521 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7522 vectors = pci_enable_msi(pf->pdev);
7523 if (vectors < 0) {
7524 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7525 vectors);
7526 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7527 }
7528 vectors = 1; /* one MSI or Legacy vector */
7529 }
7530
7531 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7532 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7533
7534 /* set up vector assignment tracking */
7535 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7536 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7537 if (!pf->irq_pile) {
7538 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7539 return -ENOMEM;
7540 }
7541 pf->irq_pile->num_entries = vectors;
7542 pf->irq_pile->search_hint = 0;
7543
7544 /* track first vector for misc interrupts, ignore return */
7545 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7546
7547 return 0;
7548 }
7549
7550 /**
7551 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7552 * @pf: board private structure
7553 *
7554 * This sets up the handler for MSIX 0, which is used to manage the
7555 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7556 * when in MSI or Legacy interrupt mode.
7557 **/
7558 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7559 {
7560 struct i40e_hw *hw = &pf->hw;
7561 int err = 0;
7562
7563 /* Only request the irq if this is the first time through, and
7564 * not when we're rebuilding after a Reset
7565 */
7566 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7567 err = request_irq(pf->msix_entries[0].vector,
7568 i40e_intr, 0, pf->int_name, pf);
7569 if (err) {
7570 dev_info(&pf->pdev->dev,
7571 "request_irq for %s failed: %d\n",
7572 pf->int_name, err);
7573 return -EFAULT;
7574 }
7575 }
7576
7577 i40e_enable_misc_int_causes(pf);
7578
7579 /* associate no queues to the misc vector */
7580 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7581 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7582
7583 i40e_flush(hw);
7584
7585 i40e_irq_dynamic_enable_icr0(pf);
7586
7587 return err;
7588 }
7589
7590 /**
7591 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7592 * @vsi: vsi structure
7593 * @seed: RSS hash seed
7594 **/
7595 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed)
7596 {
7597 struct i40e_aqc_get_set_rss_key_data rss_key;
7598 struct i40e_pf *pf = vsi->back;
7599 struct i40e_hw *hw = &pf->hw;
7600 bool pf_lut = false;
7601 u8 *rss_lut;
7602 int ret, i;
7603
7604 memset(&rss_key, 0, sizeof(rss_key));
7605 memcpy(&rss_key, seed, sizeof(rss_key));
7606
7607 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7608 if (!rss_lut)
7609 return -ENOMEM;
7610
7611 /* Populate the LUT with max no. of queues in round robin fashion */
7612 for (i = 0; i < vsi->rss_table_size; i++)
7613 rss_lut[i] = i % vsi->rss_size;
7614
7615 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7616 if (ret) {
7617 dev_info(&pf->pdev->dev,
7618 "Cannot set RSS key, err %s aq_err %s\n",
7619 i40e_stat_str(&pf->hw, ret),
7620 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7621 goto config_rss_aq_out;
7622 }
7623
7624 if (vsi->type == I40E_VSI_MAIN)
7625 pf_lut = true;
7626
7627 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7628 vsi->rss_table_size);
7629 if (ret)
7630 dev_info(&pf->pdev->dev,
7631 "Cannot set RSS lut, err %s aq_err %s\n",
7632 i40e_stat_str(&pf->hw, ret),
7633 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7634
7635 config_rss_aq_out:
7636 kfree(rss_lut);
7637 return ret;
7638 }
7639
7640 /**
7641 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7642 * @vsi: VSI structure
7643 **/
7644 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7645 {
7646 u8 seed[I40E_HKEY_ARRAY_SIZE];
7647 struct i40e_pf *pf = vsi->back;
7648
7649 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7650 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7651
7652 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7653 return i40e_config_rss_aq(vsi, seed);
7654
7655 return 0;
7656 }
7657
7658 /**
7659 * i40e_config_rss_reg - Prepare for RSS if used
7660 * @pf: board private structure
7661 * @seed: RSS hash seed
7662 **/
7663 static int i40e_config_rss_reg(struct i40e_pf *pf, const u8 *seed)
7664 {
7665 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7666 struct i40e_hw *hw = &pf->hw;
7667 u32 *seed_dw = (u32 *)seed;
7668 u32 current_queue = 0;
7669 u32 lut = 0;
7670 int i, j;
7671
7672 /* Fill out hash function seed */
7673 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7674 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
7675
7676 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++) {
7677 lut = 0;
7678 for (j = 0; j < 4; j++) {
7679 if (current_queue == vsi->rss_size)
7680 current_queue = 0;
7681 lut |= ((current_queue) << (8 * j));
7682 current_queue++;
7683 }
7684 wr32(&pf->hw, I40E_PFQF_HLUT(i), lut);
7685 }
7686 i40e_flush(hw);
7687
7688 return 0;
7689 }
7690
7691 /**
7692 * i40e_config_rss - Prepare for RSS if used
7693 * @pf: board private structure
7694 **/
7695 static int i40e_config_rss(struct i40e_pf *pf)
7696 {
7697 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7698 u8 seed[I40E_HKEY_ARRAY_SIZE];
7699 struct i40e_hw *hw = &pf->hw;
7700 u32 reg_val;
7701 u64 hena;
7702
7703 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7704
7705 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7706 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7707 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7708 hena |= i40e_pf_get_default_rss_hena(pf);
7709
7710 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7711 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7712
7713 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7714
7715 /* Determine the RSS table size based on the hardware capabilities */
7716 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7717 reg_val = (pf->rss_table_size == 512) ?
7718 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
7719 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
7720 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7721
7722 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
7723 return i40e_config_rss_aq(pf->vsi[pf->lan_vsi], seed);
7724 else
7725 return i40e_config_rss_reg(pf, seed);
7726 }
7727
7728 /**
7729 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7730 * @pf: board private structure
7731 * @queue_count: the requested queue count for rss.
7732 *
7733 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7734 * count which may be different from the requested queue count.
7735 **/
7736 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7737 {
7738 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7739 int new_rss_size;
7740
7741 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7742 return 0;
7743
7744 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7745
7746 if (queue_count != vsi->num_queue_pairs) {
7747 vsi->req_queue_pairs = queue_count;
7748 i40e_prep_for_reset(pf);
7749
7750 pf->rss_size = new_rss_size;
7751
7752 i40e_reset_and_rebuild(pf, true);
7753 i40e_config_rss(pf);
7754 }
7755 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7756 return pf->rss_size;
7757 }
7758
7759 /**
7760 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7761 * @pf: board private structure
7762 **/
7763 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7764 {
7765 i40e_status status;
7766 bool min_valid, max_valid;
7767 u32 max_bw, min_bw;
7768
7769 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7770 &min_valid, &max_valid);
7771
7772 if (!status) {
7773 if (min_valid)
7774 pf->npar_min_bw = min_bw;
7775 if (max_valid)
7776 pf->npar_max_bw = max_bw;
7777 }
7778
7779 return status;
7780 }
7781
7782 /**
7783 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7784 * @pf: board private structure
7785 **/
7786 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7787 {
7788 struct i40e_aqc_configure_partition_bw_data bw_data;
7789 i40e_status status;
7790
7791 /* Set the valid bit for this PF */
7792 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
7793 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7794 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7795
7796 /* Set the new bandwidths */
7797 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7798
7799 return status;
7800 }
7801
7802 /**
7803 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7804 * @pf: board private structure
7805 **/
7806 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7807 {
7808 /* Commit temporary BW setting to permanent NVM image */
7809 enum i40e_admin_queue_err last_aq_status;
7810 i40e_status ret;
7811 u16 nvm_word;
7812
7813 if (pf->hw.partition_id != 1) {
7814 dev_info(&pf->pdev->dev,
7815 "Commit BW only works on partition 1! This is partition %d",
7816 pf->hw.partition_id);
7817 ret = I40E_NOT_SUPPORTED;
7818 goto bw_commit_out;
7819 }
7820
7821 /* Acquire NVM for read access */
7822 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7823 last_aq_status = pf->hw.aq.asq_last_status;
7824 if (ret) {
7825 dev_info(&pf->pdev->dev,
7826 "Cannot acquire NVM for read access, err %s aq_err %s\n",
7827 i40e_stat_str(&pf->hw, ret),
7828 i40e_aq_str(&pf->hw, last_aq_status));
7829 goto bw_commit_out;
7830 }
7831
7832 /* Read word 0x10 of NVM - SW compatibility word 1 */
7833 ret = i40e_aq_read_nvm(&pf->hw,
7834 I40E_SR_NVM_CONTROL_WORD,
7835 0x10, sizeof(nvm_word), &nvm_word,
7836 false, NULL);
7837 /* Save off last admin queue command status before releasing
7838 * the NVM
7839 */
7840 last_aq_status = pf->hw.aq.asq_last_status;
7841 i40e_release_nvm(&pf->hw);
7842 if (ret) {
7843 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
7844 i40e_stat_str(&pf->hw, ret),
7845 i40e_aq_str(&pf->hw, last_aq_status));
7846 goto bw_commit_out;
7847 }
7848
7849 /* Wait a bit for NVM release to complete */
7850 msleep(50);
7851
7852 /* Acquire NVM for write access */
7853 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7854 last_aq_status = pf->hw.aq.asq_last_status;
7855 if (ret) {
7856 dev_info(&pf->pdev->dev,
7857 "Cannot acquire NVM for write access, err %s aq_err %s\n",
7858 i40e_stat_str(&pf->hw, ret),
7859 i40e_aq_str(&pf->hw, last_aq_status));
7860 goto bw_commit_out;
7861 }
7862 /* Write it back out unchanged to initiate update NVM,
7863 * which will force a write of the shadow (alt) RAM to
7864 * the NVM - thus storing the bandwidth values permanently.
7865 */
7866 ret = i40e_aq_update_nvm(&pf->hw,
7867 I40E_SR_NVM_CONTROL_WORD,
7868 0x10, sizeof(nvm_word),
7869 &nvm_word, true, NULL);
7870 /* Save off last admin queue command status before releasing
7871 * the NVM
7872 */
7873 last_aq_status = pf->hw.aq.asq_last_status;
7874 i40e_release_nvm(&pf->hw);
7875 if (ret)
7876 dev_info(&pf->pdev->dev,
7877 "BW settings NOT SAVED, err %s aq_err %s\n",
7878 i40e_stat_str(&pf->hw, ret),
7879 i40e_aq_str(&pf->hw, last_aq_status));
7880 bw_commit_out:
7881
7882 return ret;
7883 }
7884
7885 /**
7886 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7887 * @pf: board private structure to initialize
7888 *
7889 * i40e_sw_init initializes the Adapter private data structure.
7890 * Fields are initialized based on PCI device information and
7891 * OS network device settings (MTU size).
7892 **/
7893 static int i40e_sw_init(struct i40e_pf *pf)
7894 {
7895 int err = 0;
7896 int size;
7897
7898 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7899 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7900 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7901 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7902 if (I40E_DEBUG_USER & debug)
7903 pf->hw.debug_mask = debug;
7904 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7905 I40E_DEFAULT_MSG_ENABLE);
7906 }
7907
7908 /* Set default capability flags */
7909 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7910 I40E_FLAG_MSI_ENABLED |
7911 I40E_FLAG_MSIX_ENABLED;
7912
7913 if (iommu_present(&pci_bus_type))
7914 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7915 else
7916 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7917
7918 /* Set default ITR */
7919 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7920 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7921
7922 /* Depending on PF configurations, it is possible that the RSS
7923 * maximum might end up larger than the available queues
7924 */
7925 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
7926 pf->rss_size = 1;
7927 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7928 pf->rss_size_max = min_t(int, pf->rss_size_max,
7929 pf->hw.func_caps.num_tx_qp);
7930 if (pf->hw.func_caps.rss) {
7931 pf->flags |= I40E_FLAG_RSS_ENABLED;
7932 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7933 }
7934
7935 /* MFP mode enabled */
7936 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7937 pf->flags |= I40E_FLAG_MFP_ENABLED;
7938 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7939 if (i40e_get_npar_bw_setting(pf))
7940 dev_warn(&pf->pdev->dev,
7941 "Could not get NPAR bw settings\n");
7942 else
7943 dev_info(&pf->pdev->dev,
7944 "Min BW = %8.8x, Max BW = %8.8x\n",
7945 pf->npar_min_bw, pf->npar_max_bw);
7946 }
7947
7948 /* FW/NVM is not yet fixed in this regard */
7949 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7950 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7951 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7952 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7953 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7954 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7955 } else {
7956 dev_info(&pf->pdev->dev,
7957 "Flow Director Sideband mode Disabled in MFP mode\n");
7958 }
7959 pf->fdir_pf_filter_count =
7960 pf->hw.func_caps.fd_filters_guaranteed;
7961 pf->hw.fdir_shared_filter_count =
7962 pf->hw.func_caps.fd_filters_best_effort;
7963 }
7964
7965 if (pf->hw.func_caps.vmdq) {
7966 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7967 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7968 }
7969
7970 #ifdef I40E_FCOE
7971 i40e_init_pf_fcoe(pf);
7972
7973 #endif /* I40E_FCOE */
7974 #ifdef CONFIG_PCI_IOV
7975 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7976 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7977 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7978 pf->num_req_vfs = min_t(int,
7979 pf->hw.func_caps.num_vfs,
7980 I40E_MAX_VF_COUNT);
7981 }
7982 #endif /* CONFIG_PCI_IOV */
7983 if (pf->hw.mac.type == I40E_MAC_X722) {
7984 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
7985 I40E_FLAG_128_QP_RSS_CAPABLE |
7986 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
7987 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
7988 I40E_FLAG_WB_ON_ITR_CAPABLE |
7989 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE;
7990 }
7991 pf->eeprom_version = 0xDEAD;
7992 pf->lan_veb = I40E_NO_VEB;
7993 pf->lan_vsi = I40E_NO_VSI;
7994
7995 /* By default FW has this off for performance reasons */
7996 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
7997
7998 /* set up queue assignment tracking */
7999 size = sizeof(struct i40e_lump_tracking)
8000 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8001 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8002 if (!pf->qp_pile) {
8003 err = -ENOMEM;
8004 goto sw_init_done;
8005 }
8006 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8007 pf->qp_pile->search_hint = 0;
8008
8009 pf->tx_timeout_recovery_level = 1;
8010
8011 mutex_init(&pf->switch_mutex);
8012
8013 /* If NPAR is enabled nudge the Tx scheduler */
8014 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8015 i40e_set_npar_bw_setting(pf);
8016
8017 sw_init_done:
8018 return err;
8019 }
8020
8021 /**
8022 * i40e_set_ntuple - set the ntuple feature flag and take action
8023 * @pf: board private structure to initialize
8024 * @features: the feature set that the stack is suggesting
8025 *
8026 * returns a bool to indicate if reset needs to happen
8027 **/
8028 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8029 {
8030 bool need_reset = false;
8031
8032 /* Check if Flow Director n-tuple support was enabled or disabled. If
8033 * the state changed, we need to reset.
8034 */
8035 if (features & NETIF_F_NTUPLE) {
8036 /* Enable filters and mark for reset */
8037 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8038 need_reset = true;
8039 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8040 } else {
8041 /* turn off filters, mark for reset and clear SW filter list */
8042 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8043 need_reset = true;
8044 i40e_fdir_filter_exit(pf);
8045 }
8046 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8047 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8048 /* reset fd counters */
8049 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8050 pf->fdir_pf_active_filters = 0;
8051 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8052 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8053 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8054 /* if ATR was auto disabled it can be re-enabled. */
8055 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8056 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8057 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8058 }
8059 return need_reset;
8060 }
8061
8062 /**
8063 * i40e_set_features - set the netdev feature flags
8064 * @netdev: ptr to the netdev being adjusted
8065 * @features: the feature set that the stack is suggesting
8066 **/
8067 static int i40e_set_features(struct net_device *netdev,
8068 netdev_features_t features)
8069 {
8070 struct i40e_netdev_priv *np = netdev_priv(netdev);
8071 struct i40e_vsi *vsi = np->vsi;
8072 struct i40e_pf *pf = vsi->back;
8073 bool need_reset;
8074
8075 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8076 i40e_vlan_stripping_enable(vsi);
8077 else
8078 i40e_vlan_stripping_disable(vsi);
8079
8080 need_reset = i40e_set_ntuple(pf, features);
8081
8082 if (need_reset)
8083 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8084
8085 return 0;
8086 }
8087
8088 #ifdef CONFIG_I40E_VXLAN
8089 /**
8090 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
8091 * @pf: board private structure
8092 * @port: The UDP port to look up
8093 *
8094 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8095 **/
8096 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
8097 {
8098 u8 i;
8099
8100 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8101 if (pf->vxlan_ports[i] == port)
8102 return i;
8103 }
8104
8105 return i;
8106 }
8107
8108 /**
8109 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
8110 * @netdev: This physical port's netdev
8111 * @sa_family: Socket Family that VXLAN is notifying us about
8112 * @port: New UDP port number that VXLAN started listening to
8113 **/
8114 static void i40e_add_vxlan_port(struct net_device *netdev,
8115 sa_family_t sa_family, __be16 port)
8116 {
8117 struct i40e_netdev_priv *np = netdev_priv(netdev);
8118 struct i40e_vsi *vsi = np->vsi;
8119 struct i40e_pf *pf = vsi->back;
8120 u8 next_idx;
8121 u8 idx;
8122
8123 if (sa_family == AF_INET6)
8124 return;
8125
8126 idx = i40e_get_vxlan_port_idx(pf, port);
8127
8128 /* Check if port already exists */
8129 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8130 netdev_info(netdev, "vxlan port %d already offloaded\n",
8131 ntohs(port));
8132 return;
8133 }
8134
8135 /* Now check if there is space to add the new port */
8136 next_idx = i40e_get_vxlan_port_idx(pf, 0);
8137
8138 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8139 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
8140 ntohs(port));
8141 return;
8142 }
8143
8144 /* New port: add it and mark its index in the bitmap */
8145 pf->vxlan_ports[next_idx] = port;
8146 pf->pending_vxlan_bitmap |= BIT_ULL(next_idx);
8147 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8148 }
8149
8150 /**
8151 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
8152 * @netdev: This physical port's netdev
8153 * @sa_family: Socket Family that VXLAN is notifying us about
8154 * @port: UDP port number that VXLAN stopped listening to
8155 **/
8156 static void i40e_del_vxlan_port(struct net_device *netdev,
8157 sa_family_t sa_family, __be16 port)
8158 {
8159 struct i40e_netdev_priv *np = netdev_priv(netdev);
8160 struct i40e_vsi *vsi = np->vsi;
8161 struct i40e_pf *pf = vsi->back;
8162 u8 idx;
8163
8164 if (sa_family == AF_INET6)
8165 return;
8166
8167 idx = i40e_get_vxlan_port_idx(pf, port);
8168
8169 /* Check if port already exists */
8170 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8171 /* if port exists, set it to 0 (mark for deletion)
8172 * and make it pending
8173 */
8174 pf->vxlan_ports[idx] = 0;
8175 pf->pending_vxlan_bitmap |= BIT_ULL(idx);
8176 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
8177 } else {
8178 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
8179 ntohs(port));
8180 }
8181 }
8182
8183 #endif
8184 static int i40e_get_phys_port_id(struct net_device *netdev,
8185 struct netdev_phys_item_id *ppid)
8186 {
8187 struct i40e_netdev_priv *np = netdev_priv(netdev);
8188 struct i40e_pf *pf = np->vsi->back;
8189 struct i40e_hw *hw = &pf->hw;
8190
8191 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8192 return -EOPNOTSUPP;
8193
8194 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8195 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8196
8197 return 0;
8198 }
8199
8200 /**
8201 * i40e_ndo_fdb_add - add an entry to the hardware database
8202 * @ndm: the input from the stack
8203 * @tb: pointer to array of nladdr (unused)
8204 * @dev: the net device pointer
8205 * @addr: the MAC address entry being added
8206 * @flags: instructions from stack about fdb operation
8207 */
8208 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8209 struct net_device *dev,
8210 const unsigned char *addr, u16 vid,
8211 u16 flags)
8212 {
8213 struct i40e_netdev_priv *np = netdev_priv(dev);
8214 struct i40e_pf *pf = np->vsi->back;
8215 int err = 0;
8216
8217 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8218 return -EOPNOTSUPP;
8219
8220 if (vid) {
8221 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8222 return -EINVAL;
8223 }
8224
8225 /* Hardware does not support aging addresses so if a
8226 * ndm_state is given only allow permanent addresses
8227 */
8228 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8229 netdev_info(dev, "FDB only supports static addresses\n");
8230 return -EINVAL;
8231 }
8232
8233 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8234 err = dev_uc_add_excl(dev, addr);
8235 else if (is_multicast_ether_addr(addr))
8236 err = dev_mc_add_excl(dev, addr);
8237 else
8238 err = -EINVAL;
8239
8240 /* Only return duplicate errors if NLM_F_EXCL is set */
8241 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8242 err = 0;
8243
8244 return err;
8245 }
8246
8247 /**
8248 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8249 * @dev: the netdev being configured
8250 * @nlh: RTNL message
8251 *
8252 * Inserts a new hardware bridge if not already created and
8253 * enables the bridging mode requested (VEB or VEPA). If the
8254 * hardware bridge has already been inserted and the request
8255 * is to change the mode then that requires a PF reset to
8256 * allow rebuild of the components with required hardware
8257 * bridge mode enabled.
8258 **/
8259 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8260 struct nlmsghdr *nlh,
8261 u16 flags)
8262 {
8263 struct i40e_netdev_priv *np = netdev_priv(dev);
8264 struct i40e_vsi *vsi = np->vsi;
8265 struct i40e_pf *pf = vsi->back;
8266 struct i40e_veb *veb = NULL;
8267 struct nlattr *attr, *br_spec;
8268 int i, rem;
8269
8270 /* Only for PF VSI for now */
8271 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8272 return -EOPNOTSUPP;
8273
8274 /* Find the HW bridge for PF VSI */
8275 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8276 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8277 veb = pf->veb[i];
8278 }
8279
8280 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8281
8282 nla_for_each_nested(attr, br_spec, rem) {
8283 __u16 mode;
8284
8285 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8286 continue;
8287
8288 mode = nla_get_u16(attr);
8289 if ((mode != BRIDGE_MODE_VEPA) &&
8290 (mode != BRIDGE_MODE_VEB))
8291 return -EINVAL;
8292
8293 /* Insert a new HW bridge */
8294 if (!veb) {
8295 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8296 vsi->tc_config.enabled_tc);
8297 if (veb) {
8298 veb->bridge_mode = mode;
8299 i40e_config_bridge_mode(veb);
8300 } else {
8301 /* No Bridge HW offload available */
8302 return -ENOENT;
8303 }
8304 break;
8305 } else if (mode != veb->bridge_mode) {
8306 /* Existing HW bridge but different mode needs reset */
8307 veb->bridge_mode = mode;
8308 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8309 if (mode == BRIDGE_MODE_VEB)
8310 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8311 else
8312 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8313 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8314 break;
8315 }
8316 }
8317
8318 return 0;
8319 }
8320
8321 /**
8322 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8323 * @skb: skb buff
8324 * @pid: process id
8325 * @seq: RTNL message seq #
8326 * @dev: the netdev being configured
8327 * @filter_mask: unused
8328 *
8329 * Return the mode in which the hardware bridge is operating in
8330 * i.e VEB or VEPA.
8331 **/
8332 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8333 struct net_device *dev,
8334 u32 filter_mask, int nlflags)
8335 {
8336 struct i40e_netdev_priv *np = netdev_priv(dev);
8337 struct i40e_vsi *vsi = np->vsi;
8338 struct i40e_pf *pf = vsi->back;
8339 struct i40e_veb *veb = NULL;
8340 int i;
8341
8342 /* Only for PF VSI for now */
8343 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8344 return -EOPNOTSUPP;
8345
8346 /* Find the HW bridge for the PF VSI */
8347 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8348 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8349 veb = pf->veb[i];
8350 }
8351
8352 if (!veb)
8353 return 0;
8354
8355 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8356 nlflags, 0, 0, filter_mask, NULL);
8357 }
8358
8359 #define I40E_MAX_TUNNEL_HDR_LEN 80
8360 /**
8361 * i40e_features_check - Validate encapsulated packet conforms to limits
8362 * @skb: skb buff
8363 * @netdev: This physical port's netdev
8364 * @features: Offload features that the stack believes apply
8365 **/
8366 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8367 struct net_device *dev,
8368 netdev_features_t features)
8369 {
8370 if (skb->encapsulation &&
8371 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8372 I40E_MAX_TUNNEL_HDR_LEN))
8373 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8374
8375 return features;
8376 }
8377
8378 static const struct net_device_ops i40e_netdev_ops = {
8379 .ndo_open = i40e_open,
8380 .ndo_stop = i40e_close,
8381 .ndo_start_xmit = i40e_lan_xmit_frame,
8382 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8383 .ndo_set_rx_mode = i40e_set_rx_mode,
8384 .ndo_validate_addr = eth_validate_addr,
8385 .ndo_set_mac_address = i40e_set_mac,
8386 .ndo_change_mtu = i40e_change_mtu,
8387 .ndo_do_ioctl = i40e_ioctl,
8388 .ndo_tx_timeout = i40e_tx_timeout,
8389 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8390 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8391 #ifdef CONFIG_NET_POLL_CONTROLLER
8392 .ndo_poll_controller = i40e_netpoll,
8393 #endif
8394 .ndo_setup_tc = i40e_setup_tc,
8395 #ifdef I40E_FCOE
8396 .ndo_fcoe_enable = i40e_fcoe_enable,
8397 .ndo_fcoe_disable = i40e_fcoe_disable,
8398 #endif
8399 .ndo_set_features = i40e_set_features,
8400 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8401 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8402 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8403 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8404 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8405 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8406 #ifdef CONFIG_I40E_VXLAN
8407 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8408 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8409 #endif
8410 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8411 .ndo_fdb_add = i40e_ndo_fdb_add,
8412 .ndo_features_check = i40e_features_check,
8413 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8414 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8415 };
8416
8417 /**
8418 * i40e_config_netdev - Setup the netdev flags
8419 * @vsi: the VSI being configured
8420 *
8421 * Returns 0 on success, negative value on failure
8422 **/
8423 static int i40e_config_netdev(struct i40e_vsi *vsi)
8424 {
8425 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8426 struct i40e_pf *pf = vsi->back;
8427 struct i40e_hw *hw = &pf->hw;
8428 struct i40e_netdev_priv *np;
8429 struct net_device *netdev;
8430 u8 mac_addr[ETH_ALEN];
8431 int etherdev_size;
8432
8433 etherdev_size = sizeof(struct i40e_netdev_priv);
8434 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8435 if (!netdev)
8436 return -ENOMEM;
8437
8438 vsi->netdev = netdev;
8439 np = netdev_priv(netdev);
8440 np->vsi = vsi;
8441
8442 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8443 NETIF_F_GSO_UDP_TUNNEL |
8444 NETIF_F_TSO;
8445
8446 netdev->features = NETIF_F_SG |
8447 NETIF_F_IP_CSUM |
8448 NETIF_F_SCTP_CSUM |
8449 NETIF_F_HIGHDMA |
8450 NETIF_F_GSO_UDP_TUNNEL |
8451 NETIF_F_HW_VLAN_CTAG_TX |
8452 NETIF_F_HW_VLAN_CTAG_RX |
8453 NETIF_F_HW_VLAN_CTAG_FILTER |
8454 NETIF_F_IPV6_CSUM |
8455 NETIF_F_TSO |
8456 NETIF_F_TSO_ECN |
8457 NETIF_F_TSO6 |
8458 NETIF_F_RXCSUM |
8459 NETIF_F_RXHASH |
8460 0;
8461
8462 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8463 netdev->features |= NETIF_F_NTUPLE;
8464
8465 /* copy netdev features into list of user selectable features */
8466 netdev->hw_features |= netdev->features;
8467
8468 if (vsi->type == I40E_VSI_MAIN) {
8469 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8470 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8471 /* The following steps are necessary to prevent reception
8472 * of tagged packets - some older NVM configurations load a
8473 * default a MAC-VLAN filter that accepts any tagged packet
8474 * which must be replaced by a normal filter.
8475 */
8476 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8477 i40e_add_filter(vsi, mac_addr,
8478 I40E_VLAN_ANY, false, true);
8479 } else {
8480 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8481 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8482 pf->vsi[pf->lan_vsi]->netdev->name);
8483 random_ether_addr(mac_addr);
8484 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8485 }
8486 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8487
8488 ether_addr_copy(netdev->dev_addr, mac_addr);
8489 ether_addr_copy(netdev->perm_addr, mac_addr);
8490 /* vlan gets same features (except vlan offload)
8491 * after any tweaks for specific VSI types
8492 */
8493 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8494 NETIF_F_HW_VLAN_CTAG_RX |
8495 NETIF_F_HW_VLAN_CTAG_FILTER);
8496 netdev->priv_flags |= IFF_UNICAST_FLT;
8497 netdev->priv_flags |= IFF_SUPP_NOFCS;
8498 /* Setup netdev TC information */
8499 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8500
8501 netdev->netdev_ops = &i40e_netdev_ops;
8502 netdev->watchdog_timeo = 5 * HZ;
8503 i40e_set_ethtool_ops(netdev);
8504 #ifdef I40E_FCOE
8505 i40e_fcoe_config_netdev(netdev, vsi);
8506 #endif
8507
8508 return 0;
8509 }
8510
8511 /**
8512 * i40e_vsi_delete - Delete a VSI from the switch
8513 * @vsi: the VSI being removed
8514 *
8515 * Returns 0 on success, negative value on failure
8516 **/
8517 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8518 {
8519 /* remove default VSI is not allowed */
8520 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8521 return;
8522
8523 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8524 }
8525
8526 /**
8527 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8528 * @vsi: the VSI being queried
8529 *
8530 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8531 **/
8532 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8533 {
8534 struct i40e_veb *veb;
8535 struct i40e_pf *pf = vsi->back;
8536
8537 /* Uplink is not a bridge so default to VEB */
8538 if (vsi->veb_idx == I40E_NO_VEB)
8539 return 1;
8540
8541 veb = pf->veb[vsi->veb_idx];
8542 /* Uplink is a bridge in VEPA mode */
8543 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8544 return 0;
8545
8546 /* Uplink is a bridge in VEB mode */
8547 return 1;
8548 }
8549
8550 /**
8551 * i40e_add_vsi - Add a VSI to the switch
8552 * @vsi: the VSI being configured
8553 *
8554 * This initializes a VSI context depending on the VSI type to be added and
8555 * passes it down to the add_vsi aq command.
8556 **/
8557 static int i40e_add_vsi(struct i40e_vsi *vsi)
8558 {
8559 int ret = -ENODEV;
8560 struct i40e_mac_filter *f, *ftmp;
8561 struct i40e_pf *pf = vsi->back;
8562 struct i40e_hw *hw = &pf->hw;
8563 struct i40e_vsi_context ctxt;
8564 u8 enabled_tc = 0x1; /* TC0 enabled */
8565 int f_count = 0;
8566
8567 memset(&ctxt, 0, sizeof(ctxt));
8568 switch (vsi->type) {
8569 case I40E_VSI_MAIN:
8570 /* The PF's main VSI is already setup as part of the
8571 * device initialization, so we'll not bother with
8572 * the add_vsi call, but we will retrieve the current
8573 * VSI context.
8574 */
8575 ctxt.seid = pf->main_vsi_seid;
8576 ctxt.pf_num = pf->hw.pf_id;
8577 ctxt.vf_num = 0;
8578 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8579 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8580 if (ret) {
8581 dev_info(&pf->pdev->dev,
8582 "couldn't get PF vsi config, err %s aq_err %s\n",
8583 i40e_stat_str(&pf->hw, ret),
8584 i40e_aq_str(&pf->hw,
8585 pf->hw.aq.asq_last_status));
8586 return -ENOENT;
8587 }
8588 vsi->info = ctxt.info;
8589 vsi->info.valid_sections = 0;
8590
8591 vsi->seid = ctxt.seid;
8592 vsi->id = ctxt.vsi_number;
8593
8594 enabled_tc = i40e_pf_get_tc_map(pf);
8595
8596 /* MFP mode setup queue map and update VSI */
8597 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8598 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8599 memset(&ctxt, 0, sizeof(ctxt));
8600 ctxt.seid = pf->main_vsi_seid;
8601 ctxt.pf_num = pf->hw.pf_id;
8602 ctxt.vf_num = 0;
8603 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8604 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8605 if (ret) {
8606 dev_info(&pf->pdev->dev,
8607 "update vsi failed, err %s aq_err %s\n",
8608 i40e_stat_str(&pf->hw, ret),
8609 i40e_aq_str(&pf->hw,
8610 pf->hw.aq.asq_last_status));
8611 ret = -ENOENT;
8612 goto err;
8613 }
8614 /* update the local VSI info queue map */
8615 i40e_vsi_update_queue_map(vsi, &ctxt);
8616 vsi->info.valid_sections = 0;
8617 } else {
8618 /* Default/Main VSI is only enabled for TC0
8619 * reconfigure it to enable all TCs that are
8620 * available on the port in SFP mode.
8621 * For MFP case the iSCSI PF would use this
8622 * flow to enable LAN+iSCSI TC.
8623 */
8624 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8625 if (ret) {
8626 dev_info(&pf->pdev->dev,
8627 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
8628 enabled_tc,
8629 i40e_stat_str(&pf->hw, ret),
8630 i40e_aq_str(&pf->hw,
8631 pf->hw.aq.asq_last_status));
8632 ret = -ENOENT;
8633 }
8634 }
8635 break;
8636
8637 case I40E_VSI_FDIR:
8638 ctxt.pf_num = hw->pf_id;
8639 ctxt.vf_num = 0;
8640 ctxt.uplink_seid = vsi->uplink_seid;
8641 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8642 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8643 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8644 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8645 ctxt.info.valid_sections |=
8646 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8647 ctxt.info.switch_id =
8648 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8649 }
8650 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8651 break;
8652
8653 case I40E_VSI_VMDQ2:
8654 ctxt.pf_num = hw->pf_id;
8655 ctxt.vf_num = 0;
8656 ctxt.uplink_seid = vsi->uplink_seid;
8657 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8658 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8659
8660 /* This VSI is connected to VEB so the switch_id
8661 * should be set to zero by default.
8662 */
8663 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8664 ctxt.info.valid_sections |=
8665 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8666 ctxt.info.switch_id =
8667 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8668 }
8669
8670 /* Setup the VSI tx/rx queue map for TC0 only for now */
8671 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8672 break;
8673
8674 case I40E_VSI_SRIOV:
8675 ctxt.pf_num = hw->pf_id;
8676 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8677 ctxt.uplink_seid = vsi->uplink_seid;
8678 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8679 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8680
8681 /* This VSI is connected to VEB so the switch_id
8682 * should be set to zero by default.
8683 */
8684 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8685 ctxt.info.valid_sections |=
8686 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8687 ctxt.info.switch_id =
8688 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8689 }
8690
8691 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8692 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8693 if (pf->vf[vsi->vf_id].spoofchk) {
8694 ctxt.info.valid_sections |=
8695 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8696 ctxt.info.sec_flags |=
8697 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8698 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8699 }
8700 /* Setup the VSI tx/rx queue map for TC0 only for now */
8701 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8702 break;
8703
8704 #ifdef I40E_FCOE
8705 case I40E_VSI_FCOE:
8706 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8707 if (ret) {
8708 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8709 return ret;
8710 }
8711 break;
8712
8713 #endif /* I40E_FCOE */
8714 default:
8715 return -ENODEV;
8716 }
8717
8718 if (vsi->type != I40E_VSI_MAIN) {
8719 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8720 if (ret) {
8721 dev_info(&vsi->back->pdev->dev,
8722 "add vsi failed, err %s aq_err %s\n",
8723 i40e_stat_str(&pf->hw, ret),
8724 i40e_aq_str(&pf->hw,
8725 pf->hw.aq.asq_last_status));
8726 ret = -ENOENT;
8727 goto err;
8728 }
8729 vsi->info = ctxt.info;
8730 vsi->info.valid_sections = 0;
8731 vsi->seid = ctxt.seid;
8732 vsi->id = ctxt.vsi_number;
8733 }
8734
8735 /* If macvlan filters already exist, force them to get loaded */
8736 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8737 f->changed = true;
8738 f_count++;
8739
8740 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8741 struct i40e_aqc_remove_macvlan_element_data element;
8742
8743 memset(&element, 0, sizeof(element));
8744 ether_addr_copy(element.mac_addr, f->macaddr);
8745 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8746 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8747 &element, 1, NULL);
8748 if (ret) {
8749 /* some older FW has a different default */
8750 element.flags |=
8751 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8752 i40e_aq_remove_macvlan(hw, vsi->seid,
8753 &element, 1, NULL);
8754 }
8755
8756 i40e_aq_mac_address_write(hw,
8757 I40E_AQC_WRITE_TYPE_LAA_WOL,
8758 f->macaddr, NULL);
8759 }
8760 }
8761 if (f_count) {
8762 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8763 pf->flags |= I40E_FLAG_FILTER_SYNC;
8764 }
8765
8766 /* Update VSI BW information */
8767 ret = i40e_vsi_get_bw_info(vsi);
8768 if (ret) {
8769 dev_info(&pf->pdev->dev,
8770 "couldn't get vsi bw info, err %s aq_err %s\n",
8771 i40e_stat_str(&pf->hw, ret),
8772 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
8773 /* VSI is already added so not tearing that up */
8774 ret = 0;
8775 }
8776
8777 err:
8778 return ret;
8779 }
8780
8781 /**
8782 * i40e_vsi_release - Delete a VSI and free its resources
8783 * @vsi: the VSI being removed
8784 *
8785 * Returns 0 on success or < 0 on error
8786 **/
8787 int i40e_vsi_release(struct i40e_vsi *vsi)
8788 {
8789 struct i40e_mac_filter *f, *ftmp;
8790 struct i40e_veb *veb = NULL;
8791 struct i40e_pf *pf;
8792 u16 uplink_seid;
8793 int i, n;
8794
8795 pf = vsi->back;
8796
8797 /* release of a VEB-owner or last VSI is not allowed */
8798 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8799 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8800 vsi->seid, vsi->uplink_seid);
8801 return -ENODEV;
8802 }
8803 if (vsi == pf->vsi[pf->lan_vsi] &&
8804 !test_bit(__I40E_DOWN, &pf->state)) {
8805 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8806 return -ENODEV;
8807 }
8808
8809 uplink_seid = vsi->uplink_seid;
8810 if (vsi->type != I40E_VSI_SRIOV) {
8811 if (vsi->netdev_registered) {
8812 vsi->netdev_registered = false;
8813 if (vsi->netdev) {
8814 /* results in a call to i40e_close() */
8815 unregister_netdev(vsi->netdev);
8816 }
8817 } else {
8818 i40e_vsi_close(vsi);
8819 }
8820 i40e_vsi_disable_irq(vsi);
8821 }
8822
8823 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8824 i40e_del_filter(vsi, f->macaddr, f->vlan,
8825 f->is_vf, f->is_netdev);
8826 i40e_sync_vsi_filters(vsi, false);
8827
8828 i40e_vsi_delete(vsi);
8829 i40e_vsi_free_q_vectors(vsi);
8830 if (vsi->netdev) {
8831 free_netdev(vsi->netdev);
8832 vsi->netdev = NULL;
8833 }
8834 i40e_vsi_clear_rings(vsi);
8835 i40e_vsi_clear(vsi);
8836
8837 /* If this was the last thing on the VEB, except for the
8838 * controlling VSI, remove the VEB, which puts the controlling
8839 * VSI onto the next level down in the switch.
8840 *
8841 * Well, okay, there's one more exception here: don't remove
8842 * the orphan VEBs yet. We'll wait for an explicit remove request
8843 * from up the network stack.
8844 */
8845 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8846 if (pf->vsi[i] &&
8847 pf->vsi[i]->uplink_seid == uplink_seid &&
8848 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8849 n++; /* count the VSIs */
8850 }
8851 }
8852 for (i = 0; i < I40E_MAX_VEB; i++) {
8853 if (!pf->veb[i])
8854 continue;
8855 if (pf->veb[i]->uplink_seid == uplink_seid)
8856 n++; /* count the VEBs */
8857 if (pf->veb[i]->seid == uplink_seid)
8858 veb = pf->veb[i];
8859 }
8860 if (n == 0 && veb && veb->uplink_seid != 0)
8861 i40e_veb_release(veb);
8862
8863 return 0;
8864 }
8865
8866 /**
8867 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8868 * @vsi: ptr to the VSI
8869 *
8870 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8871 * corresponding SW VSI structure and initializes num_queue_pairs for the
8872 * newly allocated VSI.
8873 *
8874 * Returns 0 on success or negative on failure
8875 **/
8876 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8877 {
8878 int ret = -ENOENT;
8879 struct i40e_pf *pf = vsi->back;
8880
8881 if (vsi->q_vectors[0]) {
8882 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8883 vsi->seid);
8884 return -EEXIST;
8885 }
8886
8887 if (vsi->base_vector) {
8888 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8889 vsi->seid, vsi->base_vector);
8890 return -EEXIST;
8891 }
8892
8893 ret = i40e_vsi_alloc_q_vectors(vsi);
8894 if (ret) {
8895 dev_info(&pf->pdev->dev,
8896 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8897 vsi->num_q_vectors, vsi->seid, ret);
8898 vsi->num_q_vectors = 0;
8899 goto vector_setup_out;
8900 }
8901
8902 /* In Legacy mode, we do not have to get any other vector since we
8903 * piggyback on the misc/ICR0 for queue interrupts.
8904 */
8905 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8906 return ret;
8907 if (vsi->num_q_vectors)
8908 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8909 vsi->num_q_vectors, vsi->idx);
8910 if (vsi->base_vector < 0) {
8911 dev_info(&pf->pdev->dev,
8912 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8913 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8914 i40e_vsi_free_q_vectors(vsi);
8915 ret = -ENOENT;
8916 goto vector_setup_out;
8917 }
8918
8919 vector_setup_out:
8920 return ret;
8921 }
8922
8923 /**
8924 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8925 * @vsi: pointer to the vsi.
8926 *
8927 * This re-allocates a vsi's queue resources.
8928 *
8929 * Returns pointer to the successfully allocated and configured VSI sw struct
8930 * on success, otherwise returns NULL on failure.
8931 **/
8932 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8933 {
8934 struct i40e_pf *pf = vsi->back;
8935 u8 enabled_tc;
8936 int ret;
8937
8938 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8939 i40e_vsi_clear_rings(vsi);
8940
8941 i40e_vsi_free_arrays(vsi, false);
8942 i40e_set_num_rings_in_vsi(vsi);
8943 ret = i40e_vsi_alloc_arrays(vsi, false);
8944 if (ret)
8945 goto err_vsi;
8946
8947 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8948 if (ret < 0) {
8949 dev_info(&pf->pdev->dev,
8950 "failed to get tracking for %d queues for VSI %d err %d\n",
8951 vsi->alloc_queue_pairs, vsi->seid, ret);
8952 goto err_vsi;
8953 }
8954 vsi->base_queue = ret;
8955
8956 /* Update the FW view of the VSI. Force a reset of TC and queue
8957 * layout configurations.
8958 */
8959 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8960 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8961 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8962 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8963
8964 /* assign it some queues */
8965 ret = i40e_alloc_rings(vsi);
8966 if (ret)
8967 goto err_rings;
8968
8969 /* map all of the rings to the q_vectors */
8970 i40e_vsi_map_rings_to_vectors(vsi);
8971 return vsi;
8972
8973 err_rings:
8974 i40e_vsi_free_q_vectors(vsi);
8975 if (vsi->netdev_registered) {
8976 vsi->netdev_registered = false;
8977 unregister_netdev(vsi->netdev);
8978 free_netdev(vsi->netdev);
8979 vsi->netdev = NULL;
8980 }
8981 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8982 err_vsi:
8983 i40e_vsi_clear(vsi);
8984 return NULL;
8985 }
8986
8987 /**
8988 * i40e_vsi_setup - Set up a VSI by a given type
8989 * @pf: board private structure
8990 * @type: VSI type
8991 * @uplink_seid: the switch element to link to
8992 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8993 *
8994 * This allocates the sw VSI structure and its queue resources, then add a VSI
8995 * to the identified VEB.
8996 *
8997 * Returns pointer to the successfully allocated and configure VSI sw struct on
8998 * success, otherwise returns NULL on failure.
8999 **/
9000 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9001 u16 uplink_seid, u32 param1)
9002 {
9003 struct i40e_vsi *vsi = NULL;
9004 struct i40e_veb *veb = NULL;
9005 int ret, i;
9006 int v_idx;
9007
9008 /* The requested uplink_seid must be either
9009 * - the PF's port seid
9010 * no VEB is needed because this is the PF
9011 * or this is a Flow Director special case VSI
9012 * - seid of an existing VEB
9013 * - seid of a VSI that owns an existing VEB
9014 * - seid of a VSI that doesn't own a VEB
9015 * a new VEB is created and the VSI becomes the owner
9016 * - seid of the PF VSI, which is what creates the first VEB
9017 * this is a special case of the previous
9018 *
9019 * Find which uplink_seid we were given and create a new VEB if needed
9020 */
9021 for (i = 0; i < I40E_MAX_VEB; i++) {
9022 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9023 veb = pf->veb[i];
9024 break;
9025 }
9026 }
9027
9028 if (!veb && uplink_seid != pf->mac_seid) {
9029
9030 for (i = 0; i < pf->num_alloc_vsi; i++) {
9031 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9032 vsi = pf->vsi[i];
9033 break;
9034 }
9035 }
9036 if (!vsi) {
9037 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9038 uplink_seid);
9039 return NULL;
9040 }
9041
9042 if (vsi->uplink_seid == pf->mac_seid)
9043 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9044 vsi->tc_config.enabled_tc);
9045 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9046 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9047 vsi->tc_config.enabled_tc);
9048 if (veb) {
9049 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9050 dev_info(&vsi->back->pdev->dev,
9051 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9052 return NULL;
9053 }
9054 /* We come up by default in VEPA mode if SRIOV is not
9055 * already enabled, in which case we can't force VEPA
9056 * mode.
9057 */
9058 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9059 veb->bridge_mode = BRIDGE_MODE_VEPA;
9060 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9061 }
9062 i40e_config_bridge_mode(veb);
9063 }
9064 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9065 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9066 veb = pf->veb[i];
9067 }
9068 if (!veb) {
9069 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9070 return NULL;
9071 }
9072
9073 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9074 uplink_seid = veb->seid;
9075 }
9076
9077 /* get vsi sw struct */
9078 v_idx = i40e_vsi_mem_alloc(pf, type);
9079 if (v_idx < 0)
9080 goto err_alloc;
9081 vsi = pf->vsi[v_idx];
9082 if (!vsi)
9083 goto err_alloc;
9084 vsi->type = type;
9085 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9086
9087 if (type == I40E_VSI_MAIN)
9088 pf->lan_vsi = v_idx;
9089 else if (type == I40E_VSI_SRIOV)
9090 vsi->vf_id = param1;
9091 /* assign it some queues */
9092 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9093 vsi->idx);
9094 if (ret < 0) {
9095 dev_info(&pf->pdev->dev,
9096 "failed to get tracking for %d queues for VSI %d err=%d\n",
9097 vsi->alloc_queue_pairs, vsi->seid, ret);
9098 goto err_vsi;
9099 }
9100 vsi->base_queue = ret;
9101
9102 /* get a VSI from the hardware */
9103 vsi->uplink_seid = uplink_seid;
9104 ret = i40e_add_vsi(vsi);
9105 if (ret)
9106 goto err_vsi;
9107
9108 switch (vsi->type) {
9109 /* setup the netdev if needed */
9110 case I40E_VSI_MAIN:
9111 case I40E_VSI_VMDQ2:
9112 case I40E_VSI_FCOE:
9113 ret = i40e_config_netdev(vsi);
9114 if (ret)
9115 goto err_netdev;
9116 ret = register_netdev(vsi->netdev);
9117 if (ret)
9118 goto err_netdev;
9119 vsi->netdev_registered = true;
9120 netif_carrier_off(vsi->netdev);
9121 #ifdef CONFIG_I40E_DCB
9122 /* Setup DCB netlink interface */
9123 i40e_dcbnl_setup(vsi);
9124 #endif /* CONFIG_I40E_DCB */
9125 /* fall through */
9126
9127 case I40E_VSI_FDIR:
9128 /* set up vectors and rings if needed */
9129 ret = i40e_vsi_setup_vectors(vsi);
9130 if (ret)
9131 goto err_msix;
9132
9133 ret = i40e_alloc_rings(vsi);
9134 if (ret)
9135 goto err_rings;
9136
9137 /* map all of the rings to the q_vectors */
9138 i40e_vsi_map_rings_to_vectors(vsi);
9139
9140 i40e_vsi_reset_stats(vsi);
9141 break;
9142
9143 default:
9144 /* no netdev or rings for the other VSI types */
9145 break;
9146 }
9147
9148 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9149 (vsi->type == I40E_VSI_VMDQ2)) {
9150 ret = i40e_vsi_config_rss(vsi);
9151 }
9152 return vsi;
9153
9154 err_rings:
9155 i40e_vsi_free_q_vectors(vsi);
9156 err_msix:
9157 if (vsi->netdev_registered) {
9158 vsi->netdev_registered = false;
9159 unregister_netdev(vsi->netdev);
9160 free_netdev(vsi->netdev);
9161 vsi->netdev = NULL;
9162 }
9163 err_netdev:
9164 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9165 err_vsi:
9166 i40e_vsi_clear(vsi);
9167 err_alloc:
9168 return NULL;
9169 }
9170
9171 /**
9172 * i40e_veb_get_bw_info - Query VEB BW information
9173 * @veb: the veb to query
9174 *
9175 * Query the Tx scheduler BW configuration data for given VEB
9176 **/
9177 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9178 {
9179 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9180 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9181 struct i40e_pf *pf = veb->pf;
9182 struct i40e_hw *hw = &pf->hw;
9183 u32 tc_bw_max;
9184 int ret = 0;
9185 int i;
9186
9187 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9188 &bw_data, NULL);
9189 if (ret) {
9190 dev_info(&pf->pdev->dev,
9191 "query veb bw config failed, err %s aq_err %s\n",
9192 i40e_stat_str(&pf->hw, ret),
9193 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9194 goto out;
9195 }
9196
9197 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9198 &ets_data, NULL);
9199 if (ret) {
9200 dev_info(&pf->pdev->dev,
9201 "query veb bw ets config failed, err %s aq_err %s\n",
9202 i40e_stat_str(&pf->hw, ret),
9203 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9204 goto out;
9205 }
9206
9207 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9208 veb->bw_max_quanta = ets_data.tc_bw_max;
9209 veb->is_abs_credits = bw_data.absolute_credits_enable;
9210 veb->enabled_tc = ets_data.tc_valid_bits;
9211 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9212 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9213 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9214 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9215 veb->bw_tc_limit_credits[i] =
9216 le16_to_cpu(bw_data.tc_bw_limits[i]);
9217 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9218 }
9219
9220 out:
9221 return ret;
9222 }
9223
9224 /**
9225 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9226 * @pf: board private structure
9227 *
9228 * On error: returns error code (negative)
9229 * On success: returns vsi index in PF (positive)
9230 **/
9231 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9232 {
9233 int ret = -ENOENT;
9234 struct i40e_veb *veb;
9235 int i;
9236
9237 /* Need to protect the allocation of switch elements at the PF level */
9238 mutex_lock(&pf->switch_mutex);
9239
9240 /* VEB list may be fragmented if VEB creation/destruction has
9241 * been happening. We can afford to do a quick scan to look
9242 * for any free slots in the list.
9243 *
9244 * find next empty veb slot, looping back around if necessary
9245 */
9246 i = 0;
9247 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9248 i++;
9249 if (i >= I40E_MAX_VEB) {
9250 ret = -ENOMEM;
9251 goto err_alloc_veb; /* out of VEB slots! */
9252 }
9253
9254 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9255 if (!veb) {
9256 ret = -ENOMEM;
9257 goto err_alloc_veb;
9258 }
9259 veb->pf = pf;
9260 veb->idx = i;
9261 veb->enabled_tc = 1;
9262
9263 pf->veb[i] = veb;
9264 ret = i;
9265 err_alloc_veb:
9266 mutex_unlock(&pf->switch_mutex);
9267 return ret;
9268 }
9269
9270 /**
9271 * i40e_switch_branch_release - Delete a branch of the switch tree
9272 * @branch: where to start deleting
9273 *
9274 * This uses recursion to find the tips of the branch to be
9275 * removed, deleting until we get back to and can delete this VEB.
9276 **/
9277 static void i40e_switch_branch_release(struct i40e_veb *branch)
9278 {
9279 struct i40e_pf *pf = branch->pf;
9280 u16 branch_seid = branch->seid;
9281 u16 veb_idx = branch->idx;
9282 int i;
9283
9284 /* release any VEBs on this VEB - RECURSION */
9285 for (i = 0; i < I40E_MAX_VEB; i++) {
9286 if (!pf->veb[i])
9287 continue;
9288 if (pf->veb[i]->uplink_seid == branch->seid)
9289 i40e_switch_branch_release(pf->veb[i]);
9290 }
9291
9292 /* Release the VSIs on this VEB, but not the owner VSI.
9293 *
9294 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9295 * the VEB itself, so don't use (*branch) after this loop.
9296 */
9297 for (i = 0; i < pf->num_alloc_vsi; i++) {
9298 if (!pf->vsi[i])
9299 continue;
9300 if (pf->vsi[i]->uplink_seid == branch_seid &&
9301 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9302 i40e_vsi_release(pf->vsi[i]);
9303 }
9304 }
9305
9306 /* There's one corner case where the VEB might not have been
9307 * removed, so double check it here and remove it if needed.
9308 * This case happens if the veb was created from the debugfs
9309 * commands and no VSIs were added to it.
9310 */
9311 if (pf->veb[veb_idx])
9312 i40e_veb_release(pf->veb[veb_idx]);
9313 }
9314
9315 /**
9316 * i40e_veb_clear - remove veb struct
9317 * @veb: the veb to remove
9318 **/
9319 static void i40e_veb_clear(struct i40e_veb *veb)
9320 {
9321 if (!veb)
9322 return;
9323
9324 if (veb->pf) {
9325 struct i40e_pf *pf = veb->pf;
9326
9327 mutex_lock(&pf->switch_mutex);
9328 if (pf->veb[veb->idx] == veb)
9329 pf->veb[veb->idx] = NULL;
9330 mutex_unlock(&pf->switch_mutex);
9331 }
9332
9333 kfree(veb);
9334 }
9335
9336 /**
9337 * i40e_veb_release - Delete a VEB and free its resources
9338 * @veb: the VEB being removed
9339 **/
9340 void i40e_veb_release(struct i40e_veb *veb)
9341 {
9342 struct i40e_vsi *vsi = NULL;
9343 struct i40e_pf *pf;
9344 int i, n = 0;
9345
9346 pf = veb->pf;
9347
9348 /* find the remaining VSI and check for extras */
9349 for (i = 0; i < pf->num_alloc_vsi; i++) {
9350 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9351 n++;
9352 vsi = pf->vsi[i];
9353 }
9354 }
9355 if (n != 1) {
9356 dev_info(&pf->pdev->dev,
9357 "can't remove VEB %d with %d VSIs left\n",
9358 veb->seid, n);
9359 return;
9360 }
9361
9362 /* move the remaining VSI to uplink veb */
9363 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9364 if (veb->uplink_seid) {
9365 vsi->uplink_seid = veb->uplink_seid;
9366 if (veb->uplink_seid == pf->mac_seid)
9367 vsi->veb_idx = I40E_NO_VEB;
9368 else
9369 vsi->veb_idx = veb->veb_idx;
9370 } else {
9371 /* floating VEB */
9372 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9373 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9374 }
9375
9376 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9377 i40e_veb_clear(veb);
9378 }
9379
9380 /**
9381 * i40e_add_veb - create the VEB in the switch
9382 * @veb: the VEB to be instantiated
9383 * @vsi: the controlling VSI
9384 **/
9385 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9386 {
9387 struct i40e_pf *pf = veb->pf;
9388 bool is_default = veb->pf->cur_promisc;
9389 bool is_cloud = false;
9390 int ret;
9391
9392 /* get a VEB from the hardware */
9393 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
9394 veb->enabled_tc, is_default,
9395 is_cloud, &veb->seid, NULL);
9396 if (ret) {
9397 dev_info(&pf->pdev->dev,
9398 "couldn't add VEB, err %s aq_err %s\n",
9399 i40e_stat_str(&pf->hw, ret),
9400 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9401 return -EPERM;
9402 }
9403
9404 /* get statistics counter */
9405 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
9406 &veb->stats_idx, NULL, NULL, NULL);
9407 if (ret) {
9408 dev_info(&pf->pdev->dev,
9409 "couldn't get VEB statistics idx, err %s aq_err %s\n",
9410 i40e_stat_str(&pf->hw, ret),
9411 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9412 return -EPERM;
9413 }
9414 ret = i40e_veb_get_bw_info(veb);
9415 if (ret) {
9416 dev_info(&pf->pdev->dev,
9417 "couldn't get VEB bw info, err %s aq_err %s\n",
9418 i40e_stat_str(&pf->hw, ret),
9419 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9420 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9421 return -ENOENT;
9422 }
9423
9424 vsi->uplink_seid = veb->seid;
9425 vsi->veb_idx = veb->idx;
9426 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9427
9428 return 0;
9429 }
9430
9431 /**
9432 * i40e_veb_setup - Set up a VEB
9433 * @pf: board private structure
9434 * @flags: VEB setup flags
9435 * @uplink_seid: the switch element to link to
9436 * @vsi_seid: the initial VSI seid
9437 * @enabled_tc: Enabled TC bit-map
9438 *
9439 * This allocates the sw VEB structure and links it into the switch
9440 * It is possible and legal for this to be a duplicate of an already
9441 * existing VEB. It is also possible for both uplink and vsi seids
9442 * to be zero, in order to create a floating VEB.
9443 *
9444 * Returns pointer to the successfully allocated VEB sw struct on
9445 * success, otherwise returns NULL on failure.
9446 **/
9447 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9448 u16 uplink_seid, u16 vsi_seid,
9449 u8 enabled_tc)
9450 {
9451 struct i40e_veb *veb, *uplink_veb = NULL;
9452 int vsi_idx, veb_idx;
9453 int ret;
9454
9455 /* if one seid is 0, the other must be 0 to create a floating relay */
9456 if ((uplink_seid == 0 || vsi_seid == 0) &&
9457 (uplink_seid + vsi_seid != 0)) {
9458 dev_info(&pf->pdev->dev,
9459 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9460 uplink_seid, vsi_seid);
9461 return NULL;
9462 }
9463
9464 /* make sure there is such a vsi and uplink */
9465 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9466 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9467 break;
9468 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9469 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9470 vsi_seid);
9471 return NULL;
9472 }
9473
9474 if (uplink_seid && uplink_seid != pf->mac_seid) {
9475 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9476 if (pf->veb[veb_idx] &&
9477 pf->veb[veb_idx]->seid == uplink_seid) {
9478 uplink_veb = pf->veb[veb_idx];
9479 break;
9480 }
9481 }
9482 if (!uplink_veb) {
9483 dev_info(&pf->pdev->dev,
9484 "uplink seid %d not found\n", uplink_seid);
9485 return NULL;
9486 }
9487 }
9488
9489 /* get veb sw struct */
9490 veb_idx = i40e_veb_mem_alloc(pf);
9491 if (veb_idx < 0)
9492 goto err_alloc;
9493 veb = pf->veb[veb_idx];
9494 veb->flags = flags;
9495 veb->uplink_seid = uplink_seid;
9496 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9497 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9498
9499 /* create the VEB in the switch */
9500 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9501 if (ret)
9502 goto err_veb;
9503 if (vsi_idx == pf->lan_vsi)
9504 pf->lan_veb = veb->idx;
9505
9506 return veb;
9507
9508 err_veb:
9509 i40e_veb_clear(veb);
9510 err_alloc:
9511 return NULL;
9512 }
9513
9514 /**
9515 * i40e_setup_pf_switch_element - set PF vars based on switch type
9516 * @pf: board private structure
9517 * @ele: element we are building info from
9518 * @num_reported: total number of elements
9519 * @printconfig: should we print the contents
9520 *
9521 * helper function to assist in extracting a few useful SEID values.
9522 **/
9523 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9524 struct i40e_aqc_switch_config_element_resp *ele,
9525 u16 num_reported, bool printconfig)
9526 {
9527 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9528 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9529 u8 element_type = ele->element_type;
9530 u16 seid = le16_to_cpu(ele->seid);
9531
9532 if (printconfig)
9533 dev_info(&pf->pdev->dev,
9534 "type=%d seid=%d uplink=%d downlink=%d\n",
9535 element_type, seid, uplink_seid, downlink_seid);
9536
9537 switch (element_type) {
9538 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9539 pf->mac_seid = seid;
9540 break;
9541 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9542 /* Main VEB? */
9543 if (uplink_seid != pf->mac_seid)
9544 break;
9545 if (pf->lan_veb == I40E_NO_VEB) {
9546 int v;
9547
9548 /* find existing or else empty VEB */
9549 for (v = 0; v < I40E_MAX_VEB; v++) {
9550 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9551 pf->lan_veb = v;
9552 break;
9553 }
9554 }
9555 if (pf->lan_veb == I40E_NO_VEB) {
9556 v = i40e_veb_mem_alloc(pf);
9557 if (v < 0)
9558 break;
9559 pf->lan_veb = v;
9560 }
9561 }
9562
9563 pf->veb[pf->lan_veb]->seid = seid;
9564 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9565 pf->veb[pf->lan_veb]->pf = pf;
9566 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9567 break;
9568 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9569 if (num_reported != 1)
9570 break;
9571 /* This is immediately after a reset so we can assume this is
9572 * the PF's VSI
9573 */
9574 pf->mac_seid = uplink_seid;
9575 pf->pf_seid = downlink_seid;
9576 pf->main_vsi_seid = seid;
9577 if (printconfig)
9578 dev_info(&pf->pdev->dev,
9579 "pf_seid=%d main_vsi_seid=%d\n",
9580 pf->pf_seid, pf->main_vsi_seid);
9581 break;
9582 case I40E_SWITCH_ELEMENT_TYPE_PF:
9583 case I40E_SWITCH_ELEMENT_TYPE_VF:
9584 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9585 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9586 case I40E_SWITCH_ELEMENT_TYPE_PE:
9587 case I40E_SWITCH_ELEMENT_TYPE_PA:
9588 /* ignore these for now */
9589 break;
9590 default:
9591 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9592 element_type, seid);
9593 break;
9594 }
9595 }
9596
9597 /**
9598 * i40e_fetch_switch_configuration - Get switch config from firmware
9599 * @pf: board private structure
9600 * @printconfig: should we print the contents
9601 *
9602 * Get the current switch configuration from the device and
9603 * extract a few useful SEID values.
9604 **/
9605 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9606 {
9607 struct i40e_aqc_get_switch_config_resp *sw_config;
9608 u16 next_seid = 0;
9609 int ret = 0;
9610 u8 *aq_buf;
9611 int i;
9612
9613 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9614 if (!aq_buf)
9615 return -ENOMEM;
9616
9617 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9618 do {
9619 u16 num_reported, num_total;
9620
9621 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9622 I40E_AQ_LARGE_BUF,
9623 &next_seid, NULL);
9624 if (ret) {
9625 dev_info(&pf->pdev->dev,
9626 "get switch config failed err %s aq_err %s\n",
9627 i40e_stat_str(&pf->hw, ret),
9628 i40e_aq_str(&pf->hw,
9629 pf->hw.aq.asq_last_status));
9630 kfree(aq_buf);
9631 return -ENOENT;
9632 }
9633
9634 num_reported = le16_to_cpu(sw_config->header.num_reported);
9635 num_total = le16_to_cpu(sw_config->header.num_total);
9636
9637 if (printconfig)
9638 dev_info(&pf->pdev->dev,
9639 "header: %d reported %d total\n",
9640 num_reported, num_total);
9641
9642 for (i = 0; i < num_reported; i++) {
9643 struct i40e_aqc_switch_config_element_resp *ele =
9644 &sw_config->element[i];
9645
9646 i40e_setup_pf_switch_element(pf, ele, num_reported,
9647 printconfig);
9648 }
9649 } while (next_seid != 0);
9650
9651 kfree(aq_buf);
9652 return ret;
9653 }
9654
9655 /**
9656 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9657 * @pf: board private structure
9658 * @reinit: if the Main VSI needs to re-initialized.
9659 *
9660 * Returns 0 on success, negative value on failure
9661 **/
9662 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9663 {
9664 int ret;
9665
9666 /* find out what's out there already */
9667 ret = i40e_fetch_switch_configuration(pf, false);
9668 if (ret) {
9669 dev_info(&pf->pdev->dev,
9670 "couldn't fetch switch config, err %s aq_err %s\n",
9671 i40e_stat_str(&pf->hw, ret),
9672 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9673 return ret;
9674 }
9675 i40e_pf_reset_stats(pf);
9676
9677 /* first time setup */
9678 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9679 struct i40e_vsi *vsi = NULL;
9680 u16 uplink_seid;
9681
9682 /* Set up the PF VSI associated with the PF's main VSI
9683 * that is already in the HW switch
9684 */
9685 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9686 uplink_seid = pf->veb[pf->lan_veb]->seid;
9687 else
9688 uplink_seid = pf->mac_seid;
9689 if (pf->lan_vsi == I40E_NO_VSI)
9690 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9691 else if (reinit)
9692 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9693 if (!vsi) {
9694 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9695 i40e_fdir_teardown(pf);
9696 return -EAGAIN;
9697 }
9698 } else {
9699 /* force a reset of TC and queue layout configurations */
9700 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9701 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9702 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9703 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9704 }
9705 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9706
9707 i40e_fdir_sb_setup(pf);
9708
9709 /* Setup static PF queue filter control settings */
9710 ret = i40e_setup_pf_filter_control(pf);
9711 if (ret) {
9712 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9713 ret);
9714 /* Failure here should not stop continuing other steps */
9715 }
9716
9717 /* enable RSS in the HW, even for only one queue, as the stack can use
9718 * the hash
9719 */
9720 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9721 i40e_config_rss(pf);
9722
9723 /* fill in link information and enable LSE reporting */
9724 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9725 i40e_link_event(pf);
9726
9727 /* Initialize user-specific link properties */
9728 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9729 I40E_AQ_AN_COMPLETED) ? true : false);
9730
9731 i40e_ptp_init(pf);
9732
9733 return ret;
9734 }
9735
9736 /**
9737 * i40e_determine_queue_usage - Work out queue distribution
9738 * @pf: board private structure
9739 **/
9740 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9741 {
9742 int queues_left;
9743
9744 pf->num_lan_qps = 0;
9745 #ifdef I40E_FCOE
9746 pf->num_fcoe_qps = 0;
9747 #endif
9748
9749 /* Find the max queues to be put into basic use. We'll always be
9750 * using TC0, whether or not DCB is running, and TC0 will get the
9751 * big RSS set.
9752 */
9753 queues_left = pf->hw.func_caps.num_tx_qp;
9754
9755 if ((queues_left == 1) ||
9756 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9757 /* one qp for PF, no queues for anything else */
9758 queues_left = 0;
9759 pf->rss_size = pf->num_lan_qps = 1;
9760
9761 /* make sure all the fancies are disabled */
9762 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9763 #ifdef I40E_FCOE
9764 I40E_FLAG_FCOE_ENABLED |
9765 #endif
9766 I40E_FLAG_FD_SB_ENABLED |
9767 I40E_FLAG_FD_ATR_ENABLED |
9768 I40E_FLAG_DCB_CAPABLE |
9769 I40E_FLAG_SRIOV_ENABLED |
9770 I40E_FLAG_VMDQ_ENABLED);
9771 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9772 I40E_FLAG_FD_SB_ENABLED |
9773 I40E_FLAG_FD_ATR_ENABLED |
9774 I40E_FLAG_DCB_CAPABLE))) {
9775 /* one qp for PF */
9776 pf->rss_size = pf->num_lan_qps = 1;
9777 queues_left -= pf->num_lan_qps;
9778
9779 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9780 #ifdef I40E_FCOE
9781 I40E_FLAG_FCOE_ENABLED |
9782 #endif
9783 I40E_FLAG_FD_SB_ENABLED |
9784 I40E_FLAG_FD_ATR_ENABLED |
9785 I40E_FLAG_DCB_ENABLED |
9786 I40E_FLAG_VMDQ_ENABLED);
9787 } else {
9788 /* Not enough queues for all TCs */
9789 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9790 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9791 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9792 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9793 }
9794 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9795 num_online_cpus());
9796 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9797 pf->hw.func_caps.num_tx_qp);
9798
9799 queues_left -= pf->num_lan_qps;
9800 }
9801
9802 #ifdef I40E_FCOE
9803 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9804 if (I40E_DEFAULT_FCOE <= queues_left) {
9805 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9806 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9807 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9808 } else {
9809 pf->num_fcoe_qps = 0;
9810 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9811 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9812 }
9813
9814 queues_left -= pf->num_fcoe_qps;
9815 }
9816
9817 #endif
9818 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9819 if (queues_left > 1) {
9820 queues_left -= 1; /* save 1 queue for FD */
9821 } else {
9822 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9823 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9824 }
9825 }
9826
9827 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9828 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9829 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9830 (queues_left / pf->num_vf_qps));
9831 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9832 }
9833
9834 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9835 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9836 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9837 (queues_left / pf->num_vmdq_qps));
9838 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9839 }
9840
9841 pf->queues_left = queues_left;
9842 #ifdef I40E_FCOE
9843 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9844 #endif
9845 }
9846
9847 /**
9848 * i40e_setup_pf_filter_control - Setup PF static filter control
9849 * @pf: PF to be setup
9850 *
9851 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9852 * settings. If PE/FCoE are enabled then it will also set the per PF
9853 * based filter sizes required for them. It also enables Flow director,
9854 * ethertype and macvlan type filter settings for the pf.
9855 *
9856 * Returns 0 on success, negative on failure
9857 **/
9858 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9859 {
9860 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9861
9862 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9863
9864 /* Flow Director is enabled */
9865 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9866 settings->enable_fdir = true;
9867
9868 /* Ethtype and MACVLAN filters enabled for PF */
9869 settings->enable_ethtype = true;
9870 settings->enable_macvlan = true;
9871
9872 if (i40e_set_filter_control(&pf->hw, settings))
9873 return -ENOENT;
9874
9875 return 0;
9876 }
9877
9878 #define INFO_STRING_LEN 255
9879 static void i40e_print_features(struct i40e_pf *pf)
9880 {
9881 struct i40e_hw *hw = &pf->hw;
9882 char *buf, *string;
9883
9884 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9885 if (!string) {
9886 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9887 return;
9888 }
9889
9890 buf = string;
9891
9892 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9893 #ifdef CONFIG_PCI_IOV
9894 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9895 #endif
9896 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9897 pf->hw.func_caps.num_vsis,
9898 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9899 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9900
9901 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9902 buf += sprintf(buf, "RSS ");
9903 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9904 buf += sprintf(buf, "FD_ATR ");
9905 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9906 buf += sprintf(buf, "FD_SB ");
9907 buf += sprintf(buf, "NTUPLE ");
9908 }
9909 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9910 buf += sprintf(buf, "DCB ");
9911 if (pf->flags & I40E_FLAG_PTP)
9912 buf += sprintf(buf, "PTP ");
9913 #ifdef I40E_FCOE
9914 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9915 buf += sprintf(buf, "FCOE ");
9916 #endif
9917
9918 BUG_ON(buf > (string + INFO_STRING_LEN));
9919 dev_info(&pf->pdev->dev, "%s\n", string);
9920 kfree(string);
9921 }
9922
9923 /**
9924 * i40e_probe - Device initialization routine
9925 * @pdev: PCI device information struct
9926 * @ent: entry in i40e_pci_tbl
9927 *
9928 * i40e_probe initializes a PF identified by a pci_dev structure.
9929 * The OS initialization, configuring of the PF private structure,
9930 * and a hardware reset occur.
9931 *
9932 * Returns 0 on success, negative on failure
9933 **/
9934 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9935 {
9936 struct i40e_aq_get_phy_abilities_resp abilities;
9937 struct i40e_pf *pf;
9938 struct i40e_hw *hw;
9939 static u16 pfs_found;
9940 u16 wol_nvm_bits;
9941 u16 link_status;
9942 int err = 0;
9943 u32 len;
9944 u32 i;
9945
9946 err = pci_enable_device_mem(pdev);
9947 if (err)
9948 return err;
9949
9950 /* set up for high or low dma */
9951 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9952 if (err) {
9953 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9954 if (err) {
9955 dev_err(&pdev->dev,
9956 "DMA configuration failed: 0x%x\n", err);
9957 goto err_dma;
9958 }
9959 }
9960
9961 /* set up pci connections */
9962 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9963 IORESOURCE_MEM), i40e_driver_name);
9964 if (err) {
9965 dev_info(&pdev->dev,
9966 "pci_request_selected_regions failed %d\n", err);
9967 goto err_pci_reg;
9968 }
9969
9970 pci_enable_pcie_error_reporting(pdev);
9971 pci_set_master(pdev);
9972
9973 /* Now that we have a PCI connection, we need to do the
9974 * low level device setup. This is primarily setting up
9975 * the Admin Queue structures and then querying for the
9976 * device's current profile information.
9977 */
9978 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9979 if (!pf) {
9980 err = -ENOMEM;
9981 goto err_pf_alloc;
9982 }
9983 pf->next_vsi = 0;
9984 pf->pdev = pdev;
9985 set_bit(__I40E_DOWN, &pf->state);
9986
9987 hw = &pf->hw;
9988 hw->back = pf;
9989
9990 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
9991 I40E_MAX_CSR_SPACE);
9992
9993 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
9994 if (!hw->hw_addr) {
9995 err = -EIO;
9996 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9997 (unsigned int)pci_resource_start(pdev, 0),
9998 pf->ioremap_len, err);
9999 goto err_ioremap;
10000 }
10001 hw->vendor_id = pdev->vendor;
10002 hw->device_id = pdev->device;
10003 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10004 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10005 hw->subsystem_device_id = pdev->subsystem_device;
10006 hw->bus.device = PCI_SLOT(pdev->devfn);
10007 hw->bus.func = PCI_FUNC(pdev->devfn);
10008 pf->instance = pfs_found;
10009
10010 if (debug != -1) {
10011 pf->msg_enable = pf->hw.debug_mask;
10012 pf->msg_enable = debug;
10013 }
10014
10015 /* do a special CORER for clearing PXE mode once at init */
10016 if (hw->revision_id == 0 &&
10017 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10018 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10019 i40e_flush(hw);
10020 msleep(200);
10021 pf->corer_count++;
10022
10023 i40e_clear_pxe_mode(hw);
10024 }
10025
10026 /* Reset here to make sure all is clean and to define PF 'n' */
10027 i40e_clear_hw(hw);
10028 err = i40e_pf_reset(hw);
10029 if (err) {
10030 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10031 goto err_pf_reset;
10032 }
10033 pf->pfr_count++;
10034
10035 hw->aq.num_arq_entries = I40E_AQ_LEN;
10036 hw->aq.num_asq_entries = I40E_AQ_LEN;
10037 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10038 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10039 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10040
10041 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10042 "%s-%s:misc",
10043 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10044
10045 err = i40e_init_shared_code(hw);
10046 if (err) {
10047 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10048 err);
10049 goto err_pf_reset;
10050 }
10051
10052 /* set up a default setting for link flow control */
10053 pf->hw.fc.requested_mode = I40E_FC_NONE;
10054
10055 err = i40e_init_adminq(hw);
10056 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
10057 if (err) {
10058 dev_info(&pdev->dev,
10059 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10060 goto err_pf_reset;
10061 }
10062
10063 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10064 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10065 dev_info(&pdev->dev,
10066 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10067 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10068 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10069 dev_info(&pdev->dev,
10070 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10071
10072 i40e_verify_eeprom(pf);
10073
10074 /* Rev 0 hardware was never productized */
10075 if (hw->revision_id < 1)
10076 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10077
10078 i40e_clear_pxe_mode(hw);
10079 err = i40e_get_capabilities(pf);
10080 if (err)
10081 goto err_adminq_setup;
10082
10083 err = i40e_sw_init(pf);
10084 if (err) {
10085 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10086 goto err_sw_init;
10087 }
10088
10089 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10090 hw->func_caps.num_rx_qp,
10091 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10092 if (err) {
10093 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10094 goto err_init_lan_hmc;
10095 }
10096
10097 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10098 if (err) {
10099 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10100 err = -ENOENT;
10101 goto err_configure_lan_hmc;
10102 }
10103
10104 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10105 * Ignore error return codes because if it was already disabled via
10106 * hardware settings this will fail
10107 */
10108 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
10109 (pf->hw.aq.fw_maj_ver < 4)) {
10110 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10111 i40e_aq_stop_lldp(hw, true, NULL);
10112 }
10113
10114 i40e_get_mac_addr(hw, hw->mac.addr);
10115 if (!is_valid_ether_addr(hw->mac.addr)) {
10116 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10117 err = -EIO;
10118 goto err_mac_addr;
10119 }
10120 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10121 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10122 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10123 if (is_valid_ether_addr(hw->mac.port_addr))
10124 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10125 #ifdef I40E_FCOE
10126 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10127 if (err)
10128 dev_info(&pdev->dev,
10129 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10130 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10131 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10132 hw->mac.san_addr);
10133 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10134 }
10135 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10136 #endif /* I40E_FCOE */
10137
10138 pci_set_drvdata(pdev, pf);
10139 pci_save_state(pdev);
10140 #ifdef CONFIG_I40E_DCB
10141 err = i40e_init_pf_dcb(pf);
10142 if (err) {
10143 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10144 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10145 /* Continue without DCB enabled */
10146 }
10147 #endif /* CONFIG_I40E_DCB */
10148
10149 /* set up periodic task facility */
10150 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10151 pf->service_timer_period = HZ;
10152
10153 INIT_WORK(&pf->service_task, i40e_service_task);
10154 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10155 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10156
10157 /* NVM bit on means WoL disabled for the port */
10158 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10159 if ((1 << hw->port) & wol_nvm_bits || hw->partition_id != 1)
10160 pf->wol_en = false;
10161 else
10162 pf->wol_en = true;
10163 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10164
10165 /* set up the main switch operations */
10166 i40e_determine_queue_usage(pf);
10167 err = i40e_init_interrupt_scheme(pf);
10168 if (err)
10169 goto err_switch_setup;
10170
10171 /* The number of VSIs reported by the FW is the minimum guaranteed
10172 * to us; HW supports far more and we share the remaining pool with
10173 * the other PFs. We allocate space for more than the guarantee with
10174 * the understanding that we might not get them all later.
10175 */
10176 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10177 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10178 else
10179 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10180
10181 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10182 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
10183 pf->vsi = kzalloc(len, GFP_KERNEL);
10184 if (!pf->vsi) {
10185 err = -ENOMEM;
10186 goto err_switch_setup;
10187 }
10188
10189 #ifdef CONFIG_PCI_IOV
10190 /* prep for VF support */
10191 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10192 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10193 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10194 if (pci_num_vf(pdev))
10195 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10196 }
10197 #endif
10198 err = i40e_setup_pf_switch(pf, false);
10199 if (err) {
10200 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10201 goto err_vsis;
10202 }
10203 /* if FDIR VSI was set up, start it now */
10204 for (i = 0; i < pf->num_alloc_vsi; i++) {
10205 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10206 i40e_vsi_open(pf->vsi[i]);
10207 break;
10208 }
10209 }
10210
10211 /* driver is only interested in link up/down and module qualification
10212 * reports from firmware
10213 */
10214 err = i40e_aq_set_phy_int_mask(&pf->hw,
10215 I40E_AQ_EVENT_LINK_UPDOWN |
10216 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
10217 if (err)
10218 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10219 i40e_stat_str(&pf->hw, err),
10220 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10221
10222 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
10223 (pf->hw.aq.fw_maj_ver < 4)) {
10224 msleep(75);
10225 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10226 if (err)
10227 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10228 i40e_stat_str(&pf->hw, err),
10229 i40e_aq_str(&pf->hw,
10230 pf->hw.aq.asq_last_status));
10231 }
10232 /* The main driver is (mostly) up and happy. We need to set this state
10233 * before setting up the misc vector or we get a race and the vector
10234 * ends up disabled forever.
10235 */
10236 clear_bit(__I40E_DOWN, &pf->state);
10237
10238 /* In case of MSIX we are going to setup the misc vector right here
10239 * to handle admin queue events etc. In case of legacy and MSI
10240 * the misc functionality and queue processing is combined in
10241 * the same vector and that gets setup at open.
10242 */
10243 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
10244 err = i40e_setup_misc_vector(pf);
10245 if (err) {
10246 dev_info(&pdev->dev,
10247 "setup of misc vector failed: %d\n", err);
10248 goto err_vsis;
10249 }
10250 }
10251
10252 #ifdef CONFIG_PCI_IOV
10253 /* prep for VF support */
10254 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10255 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10256 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10257 u32 val;
10258
10259 /* disable link interrupts for VFs */
10260 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
10261 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
10262 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
10263 i40e_flush(hw);
10264
10265 if (pci_num_vf(pdev)) {
10266 dev_info(&pdev->dev,
10267 "Active VFs found, allocating resources.\n");
10268 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
10269 if (err)
10270 dev_info(&pdev->dev,
10271 "Error %d allocating resources for existing VFs\n",
10272 err);
10273 }
10274 }
10275 #endif /* CONFIG_PCI_IOV */
10276
10277 pfs_found++;
10278
10279 i40e_dbg_pf_init(pf);
10280
10281 /* tell the firmware that we're starting */
10282 i40e_send_version(pf);
10283
10284 /* since everything's happy, start the service_task timer */
10285 mod_timer(&pf->service_timer,
10286 round_jiffies(jiffies + pf->service_timer_period));
10287
10288 #ifdef I40E_FCOE
10289 /* create FCoE interface */
10290 i40e_fcoe_vsi_setup(pf);
10291
10292 #endif
10293 /* Get the negotiated link width and speed from PCI config space */
10294 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10295
10296 i40e_set_pci_config_data(hw, link_status);
10297
10298 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10299 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10300 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10301 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10302 "Unknown"),
10303 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10304 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10305 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10306 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10307 "Unknown"));
10308
10309 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10310 hw->bus.speed < i40e_bus_speed_8000) {
10311 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10312 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10313 }
10314
10315 /* get the requested speeds from the fw */
10316 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10317 if (err)
10318 dev_info(&pf->pdev->dev,
10319 "get phy capabilities failed, err %s aq_err %s, advertised speed settings may not be correct\n",
10320 i40e_stat_str(&pf->hw, err),
10321 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10322 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10323
10324 /* print a string summarizing features */
10325 i40e_print_features(pf);
10326
10327 return 0;
10328
10329 /* Unwind what we've done if something failed in the setup */
10330 err_vsis:
10331 set_bit(__I40E_DOWN, &pf->state);
10332 i40e_clear_interrupt_scheme(pf);
10333 kfree(pf->vsi);
10334 err_switch_setup:
10335 i40e_reset_interrupt_capability(pf);
10336 del_timer_sync(&pf->service_timer);
10337 err_mac_addr:
10338 err_configure_lan_hmc:
10339 (void)i40e_shutdown_lan_hmc(hw);
10340 err_init_lan_hmc:
10341 kfree(pf->qp_pile);
10342 err_sw_init:
10343 err_adminq_setup:
10344 (void)i40e_shutdown_adminq(hw);
10345 err_pf_reset:
10346 iounmap(hw->hw_addr);
10347 err_ioremap:
10348 kfree(pf);
10349 err_pf_alloc:
10350 pci_disable_pcie_error_reporting(pdev);
10351 pci_release_selected_regions(pdev,
10352 pci_select_bars(pdev, IORESOURCE_MEM));
10353 err_pci_reg:
10354 err_dma:
10355 pci_disable_device(pdev);
10356 return err;
10357 }
10358
10359 /**
10360 * i40e_remove - Device removal routine
10361 * @pdev: PCI device information struct
10362 *
10363 * i40e_remove is called by the PCI subsystem to alert the driver
10364 * that is should release a PCI device. This could be caused by a
10365 * Hot-Plug event, or because the driver is going to be removed from
10366 * memory.
10367 **/
10368 static void i40e_remove(struct pci_dev *pdev)
10369 {
10370 struct i40e_pf *pf = pci_get_drvdata(pdev);
10371 i40e_status ret_code;
10372 int i;
10373
10374 i40e_dbg_pf_exit(pf);
10375
10376 i40e_ptp_stop(pf);
10377
10378 /* no more scheduling of any task */
10379 set_bit(__I40E_DOWN, &pf->state);
10380 del_timer_sync(&pf->service_timer);
10381 cancel_work_sync(&pf->service_task);
10382 i40e_fdir_teardown(pf);
10383
10384 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10385 i40e_free_vfs(pf);
10386 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10387 }
10388
10389 i40e_fdir_teardown(pf);
10390
10391 /* If there is a switch structure or any orphans, remove them.
10392 * This will leave only the PF's VSI remaining.
10393 */
10394 for (i = 0; i < I40E_MAX_VEB; i++) {
10395 if (!pf->veb[i])
10396 continue;
10397
10398 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10399 pf->veb[i]->uplink_seid == 0)
10400 i40e_switch_branch_release(pf->veb[i]);
10401 }
10402
10403 /* Now we can shutdown the PF's VSI, just before we kill
10404 * adminq and hmc.
10405 */
10406 if (pf->vsi[pf->lan_vsi])
10407 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10408
10409 /* shutdown and destroy the HMC */
10410 if (pf->hw.hmc.hmc_obj) {
10411 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10412 if (ret_code)
10413 dev_warn(&pdev->dev,
10414 "Failed to destroy the HMC resources: %d\n",
10415 ret_code);
10416 }
10417
10418 /* shutdown the adminq */
10419 ret_code = i40e_shutdown_adminq(&pf->hw);
10420 if (ret_code)
10421 dev_warn(&pdev->dev,
10422 "Failed to destroy the Admin Queue resources: %d\n",
10423 ret_code);
10424
10425 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10426 i40e_clear_interrupt_scheme(pf);
10427 for (i = 0; i < pf->num_alloc_vsi; i++) {
10428 if (pf->vsi[i]) {
10429 i40e_vsi_clear_rings(pf->vsi[i]);
10430 i40e_vsi_clear(pf->vsi[i]);
10431 pf->vsi[i] = NULL;
10432 }
10433 }
10434
10435 for (i = 0; i < I40E_MAX_VEB; i++) {
10436 kfree(pf->veb[i]);
10437 pf->veb[i] = NULL;
10438 }
10439
10440 kfree(pf->qp_pile);
10441 kfree(pf->vsi);
10442
10443 iounmap(pf->hw.hw_addr);
10444 kfree(pf);
10445 pci_release_selected_regions(pdev,
10446 pci_select_bars(pdev, IORESOURCE_MEM));
10447
10448 pci_disable_pcie_error_reporting(pdev);
10449 pci_disable_device(pdev);
10450 }
10451
10452 /**
10453 * i40e_pci_error_detected - warning that something funky happened in PCI land
10454 * @pdev: PCI device information struct
10455 *
10456 * Called to warn that something happened and the error handling steps
10457 * are in progress. Allows the driver to quiesce things, be ready for
10458 * remediation.
10459 **/
10460 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10461 enum pci_channel_state error)
10462 {
10463 struct i40e_pf *pf = pci_get_drvdata(pdev);
10464
10465 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10466
10467 /* shutdown all operations */
10468 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10469 rtnl_lock();
10470 i40e_prep_for_reset(pf);
10471 rtnl_unlock();
10472 }
10473
10474 /* Request a slot reset */
10475 return PCI_ERS_RESULT_NEED_RESET;
10476 }
10477
10478 /**
10479 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10480 * @pdev: PCI device information struct
10481 *
10482 * Called to find if the driver can work with the device now that
10483 * the pci slot has been reset. If a basic connection seems good
10484 * (registers are readable and have sane content) then return a
10485 * happy little PCI_ERS_RESULT_xxx.
10486 **/
10487 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10488 {
10489 struct i40e_pf *pf = pci_get_drvdata(pdev);
10490 pci_ers_result_t result;
10491 int err;
10492 u32 reg;
10493
10494 dev_dbg(&pdev->dev, "%s\n", __func__);
10495 if (pci_enable_device_mem(pdev)) {
10496 dev_info(&pdev->dev,
10497 "Cannot re-enable PCI device after reset.\n");
10498 result = PCI_ERS_RESULT_DISCONNECT;
10499 } else {
10500 pci_set_master(pdev);
10501 pci_restore_state(pdev);
10502 pci_save_state(pdev);
10503 pci_wake_from_d3(pdev, false);
10504
10505 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10506 if (reg == 0)
10507 result = PCI_ERS_RESULT_RECOVERED;
10508 else
10509 result = PCI_ERS_RESULT_DISCONNECT;
10510 }
10511
10512 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10513 if (err) {
10514 dev_info(&pdev->dev,
10515 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10516 err);
10517 /* non-fatal, continue */
10518 }
10519
10520 return result;
10521 }
10522
10523 /**
10524 * i40e_pci_error_resume - restart operations after PCI error recovery
10525 * @pdev: PCI device information struct
10526 *
10527 * Called to allow the driver to bring things back up after PCI error
10528 * and/or reset recovery has finished.
10529 **/
10530 static void i40e_pci_error_resume(struct pci_dev *pdev)
10531 {
10532 struct i40e_pf *pf = pci_get_drvdata(pdev);
10533
10534 dev_dbg(&pdev->dev, "%s\n", __func__);
10535 if (test_bit(__I40E_SUSPENDED, &pf->state))
10536 return;
10537
10538 rtnl_lock();
10539 i40e_handle_reset_warning(pf);
10540 rtnl_unlock();
10541 }
10542
10543 /**
10544 * i40e_shutdown - PCI callback for shutting down
10545 * @pdev: PCI device information struct
10546 **/
10547 static void i40e_shutdown(struct pci_dev *pdev)
10548 {
10549 struct i40e_pf *pf = pci_get_drvdata(pdev);
10550 struct i40e_hw *hw = &pf->hw;
10551
10552 set_bit(__I40E_SUSPENDED, &pf->state);
10553 set_bit(__I40E_DOWN, &pf->state);
10554 rtnl_lock();
10555 i40e_prep_for_reset(pf);
10556 rtnl_unlock();
10557
10558 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10559 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10560
10561 del_timer_sync(&pf->service_timer);
10562 cancel_work_sync(&pf->service_task);
10563 i40e_fdir_teardown(pf);
10564
10565 rtnl_lock();
10566 i40e_prep_for_reset(pf);
10567 rtnl_unlock();
10568
10569 wr32(hw, I40E_PFPM_APM,
10570 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10571 wr32(hw, I40E_PFPM_WUFC,
10572 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10573
10574 i40e_clear_interrupt_scheme(pf);
10575
10576 if (system_state == SYSTEM_POWER_OFF) {
10577 pci_wake_from_d3(pdev, pf->wol_en);
10578 pci_set_power_state(pdev, PCI_D3hot);
10579 }
10580 }
10581
10582 #ifdef CONFIG_PM
10583 /**
10584 * i40e_suspend - PCI callback for moving to D3
10585 * @pdev: PCI device information struct
10586 **/
10587 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10588 {
10589 struct i40e_pf *pf = pci_get_drvdata(pdev);
10590 struct i40e_hw *hw = &pf->hw;
10591
10592 set_bit(__I40E_SUSPENDED, &pf->state);
10593 set_bit(__I40E_DOWN, &pf->state);
10594
10595 rtnl_lock();
10596 i40e_prep_for_reset(pf);
10597 rtnl_unlock();
10598
10599 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10600 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10601
10602 pci_wake_from_d3(pdev, pf->wol_en);
10603 pci_set_power_state(pdev, PCI_D3hot);
10604
10605 return 0;
10606 }
10607
10608 /**
10609 * i40e_resume - PCI callback for waking up from D3
10610 * @pdev: PCI device information struct
10611 **/
10612 static int i40e_resume(struct pci_dev *pdev)
10613 {
10614 struct i40e_pf *pf = pci_get_drvdata(pdev);
10615 u32 err;
10616
10617 pci_set_power_state(pdev, PCI_D0);
10618 pci_restore_state(pdev);
10619 /* pci_restore_state() clears dev->state_saves, so
10620 * call pci_save_state() again to restore it.
10621 */
10622 pci_save_state(pdev);
10623
10624 err = pci_enable_device_mem(pdev);
10625 if (err) {
10626 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
10627 return err;
10628 }
10629 pci_set_master(pdev);
10630
10631 /* no wakeup events while running */
10632 pci_wake_from_d3(pdev, false);
10633
10634 /* handling the reset will rebuild the device state */
10635 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10636 clear_bit(__I40E_DOWN, &pf->state);
10637 rtnl_lock();
10638 i40e_reset_and_rebuild(pf, false);
10639 rtnl_unlock();
10640 }
10641
10642 return 0;
10643 }
10644
10645 #endif
10646 static const struct pci_error_handlers i40e_err_handler = {
10647 .error_detected = i40e_pci_error_detected,
10648 .slot_reset = i40e_pci_error_slot_reset,
10649 .resume = i40e_pci_error_resume,
10650 };
10651
10652 static struct pci_driver i40e_driver = {
10653 .name = i40e_driver_name,
10654 .id_table = i40e_pci_tbl,
10655 .probe = i40e_probe,
10656 .remove = i40e_remove,
10657 #ifdef CONFIG_PM
10658 .suspend = i40e_suspend,
10659 .resume = i40e_resume,
10660 #endif
10661 .shutdown = i40e_shutdown,
10662 .err_handler = &i40e_err_handler,
10663 .sriov_configure = i40e_pci_sriov_configure,
10664 };
10665
10666 /**
10667 * i40e_init_module - Driver registration routine
10668 *
10669 * i40e_init_module is the first routine called when the driver is
10670 * loaded. All it does is register with the PCI subsystem.
10671 **/
10672 static int __init i40e_init_module(void)
10673 {
10674 pr_info("%s: %s - version %s\n", i40e_driver_name,
10675 i40e_driver_string, i40e_driver_version_str);
10676 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10677
10678 i40e_dbg_init();
10679 return pci_register_driver(&i40e_driver);
10680 }
10681 module_init(i40e_init_module);
10682
10683 /**
10684 * i40e_exit_module - Driver exit cleanup routine
10685 *
10686 * i40e_exit_module is called just before the driver is removed
10687 * from memory.
10688 **/
10689 static void __exit i40e_exit_module(void)
10690 {
10691 pci_unregister_driver(&i40e_driver);
10692 i40e_dbg_exit();
10693 }
10694 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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