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i40e: Add a call to set the client interface down
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
39
40 #define DRV_KERN "-k"
41
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 5
44 #define DRV_VERSION_BUILD 16
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
50
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
61 u16 rss_table_size, u16 rss_size);
62 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
63 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
64
65 /* i40e_pci_tbl - PCI Device ID Table
66 *
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72 static const struct pci_device_id i40e_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
89 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_I_X722), 0},
90 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
91 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
92 /* required last entry */
93 {0, }
94 };
95 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
96
97 #define I40E_MAX_VF_COUNT 128
98 static int debug = -1;
99 module_param(debug, int, 0);
100 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
101
102 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
103 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
104 MODULE_LICENSE("GPL");
105 MODULE_VERSION(DRV_VERSION);
106
107 static struct workqueue_struct *i40e_wq;
108
109 /**
110 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
111 * @hw: pointer to the HW structure
112 * @mem: ptr to mem struct to fill out
113 * @size: size of memory requested
114 * @alignment: what to align the allocation to
115 **/
116 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
117 u64 size, u32 alignment)
118 {
119 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
120
121 mem->size = ALIGN(size, alignment);
122 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
123 &mem->pa, GFP_KERNEL);
124 if (!mem->va)
125 return -ENOMEM;
126
127 return 0;
128 }
129
130 /**
131 * i40e_free_dma_mem_d - OS specific memory free for shared code
132 * @hw: pointer to the HW structure
133 * @mem: ptr to mem struct to free
134 **/
135 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
136 {
137 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
138
139 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
140 mem->va = NULL;
141 mem->pa = 0;
142 mem->size = 0;
143
144 return 0;
145 }
146
147 /**
148 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
149 * @hw: pointer to the HW structure
150 * @mem: ptr to mem struct to fill out
151 * @size: size of memory requested
152 **/
153 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
154 u32 size)
155 {
156 mem->size = size;
157 mem->va = kzalloc(size, GFP_KERNEL);
158
159 if (!mem->va)
160 return -ENOMEM;
161
162 return 0;
163 }
164
165 /**
166 * i40e_free_virt_mem_d - OS specific memory free for shared code
167 * @hw: pointer to the HW structure
168 * @mem: ptr to mem struct to free
169 **/
170 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
171 {
172 /* it's ok to kfree a NULL pointer */
173 kfree(mem->va);
174 mem->va = NULL;
175 mem->size = 0;
176
177 return 0;
178 }
179
180 /**
181 * i40e_get_lump - find a lump of free generic resource
182 * @pf: board private structure
183 * @pile: the pile of resource to search
184 * @needed: the number of items needed
185 * @id: an owner id to stick on the items assigned
186 *
187 * Returns the base item index of the lump, or negative for error
188 *
189 * The search_hint trick and lack of advanced fit-finding only work
190 * because we're highly likely to have all the same size lump requests.
191 * Linear search time and any fragmentation should be minimal.
192 **/
193 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
194 u16 needed, u16 id)
195 {
196 int ret = -ENOMEM;
197 int i, j;
198
199 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
200 dev_info(&pf->pdev->dev,
201 "param err: pile=%p needed=%d id=0x%04x\n",
202 pile, needed, id);
203 return -EINVAL;
204 }
205
206 /* start the linear search with an imperfect hint */
207 i = pile->search_hint;
208 while (i < pile->num_entries) {
209 /* skip already allocated entries */
210 if (pile->list[i] & I40E_PILE_VALID_BIT) {
211 i++;
212 continue;
213 }
214
215 /* do we have enough in this lump? */
216 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
217 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
218 break;
219 }
220
221 if (j == needed) {
222 /* there was enough, so assign it to the requestor */
223 for (j = 0; j < needed; j++)
224 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
225 ret = i;
226 pile->search_hint = i + j;
227 break;
228 }
229
230 /* not enough, so skip over it and continue looking */
231 i += j;
232 }
233
234 return ret;
235 }
236
237 /**
238 * i40e_put_lump - return a lump of generic resource
239 * @pile: the pile of resource to search
240 * @index: the base item index
241 * @id: the owner id of the items assigned
242 *
243 * Returns the count of items in the lump
244 **/
245 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
246 {
247 int valid_id = (id | I40E_PILE_VALID_BIT);
248 int count = 0;
249 int i;
250
251 if (!pile || index >= pile->num_entries)
252 return -EINVAL;
253
254 for (i = index;
255 i < pile->num_entries && pile->list[i] == valid_id;
256 i++) {
257 pile->list[i] = 0;
258 count++;
259 }
260
261 if (count && index < pile->search_hint)
262 pile->search_hint = index;
263
264 return count;
265 }
266
267 /**
268 * i40e_find_vsi_from_id - searches for the vsi with the given id
269 * @pf - the pf structure to search for the vsi
270 * @id - id of the vsi it is searching for
271 **/
272 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
273 {
274 int i;
275
276 for (i = 0; i < pf->num_alloc_vsi; i++)
277 if (pf->vsi[i] && (pf->vsi[i]->id == id))
278 return pf->vsi[i];
279
280 return NULL;
281 }
282
283 /**
284 * i40e_service_event_schedule - Schedule the service task to wake up
285 * @pf: board private structure
286 *
287 * If not already scheduled, this puts the task into the work queue
288 **/
289 void i40e_service_event_schedule(struct i40e_pf *pf)
290 {
291 if (!test_bit(__I40E_DOWN, &pf->state) &&
292 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
293 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
294 queue_work(i40e_wq, &pf->service_task);
295 }
296
297 /**
298 * i40e_tx_timeout - Respond to a Tx Hang
299 * @netdev: network interface device structure
300 *
301 * If any port has noticed a Tx timeout, it is likely that the whole
302 * device is munged, not just the one netdev port, so go for the full
303 * reset.
304 **/
305 #ifdef I40E_FCOE
306 void i40e_tx_timeout(struct net_device *netdev)
307 #else
308 static void i40e_tx_timeout(struct net_device *netdev)
309 #endif
310 {
311 struct i40e_netdev_priv *np = netdev_priv(netdev);
312 struct i40e_vsi *vsi = np->vsi;
313 struct i40e_pf *pf = vsi->back;
314 struct i40e_ring *tx_ring = NULL;
315 unsigned int i, hung_queue = 0;
316 u32 head, val;
317
318 pf->tx_timeout_count++;
319
320 /* find the stopped queue the same way the stack does */
321 for (i = 0; i < netdev->num_tx_queues; i++) {
322 struct netdev_queue *q;
323 unsigned long trans_start;
324
325 q = netdev_get_tx_queue(netdev, i);
326 trans_start = q->trans_start;
327 if (netif_xmit_stopped(q) &&
328 time_after(jiffies,
329 (trans_start + netdev->watchdog_timeo))) {
330 hung_queue = i;
331 break;
332 }
333 }
334
335 if (i == netdev->num_tx_queues) {
336 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
337 } else {
338 /* now that we have an index, find the tx_ring struct */
339 for (i = 0; i < vsi->num_queue_pairs; i++) {
340 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
341 if (hung_queue ==
342 vsi->tx_rings[i]->queue_index) {
343 tx_ring = vsi->tx_rings[i];
344 break;
345 }
346 }
347 }
348 }
349
350 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
351 pf->tx_timeout_recovery_level = 1; /* reset after some time */
352 else if (time_before(jiffies,
353 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
354 return; /* don't do any new action before the next timeout */
355
356 if (tx_ring) {
357 head = i40e_get_head(tx_ring);
358 /* Read interrupt register */
359 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
360 val = rd32(&pf->hw,
361 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
362 tx_ring->vsi->base_vector - 1));
363 else
364 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
365
366 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
367 vsi->seid, hung_queue, tx_ring->next_to_clean,
368 head, tx_ring->next_to_use,
369 readl(tx_ring->tail), val);
370 }
371
372 pf->tx_timeout_last_recovery = jiffies;
373 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
374 pf->tx_timeout_recovery_level, hung_queue);
375
376 switch (pf->tx_timeout_recovery_level) {
377 case 1:
378 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
379 break;
380 case 2:
381 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
382 break;
383 case 3:
384 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
385 break;
386 default:
387 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
388 break;
389 }
390
391 i40e_service_event_schedule(pf);
392 pf->tx_timeout_recovery_level++;
393 }
394
395 /**
396 * i40e_get_vsi_stats_struct - Get System Network Statistics
397 * @vsi: the VSI we care about
398 *
399 * Returns the address of the device statistics structure.
400 * The statistics are actually updated from the service task.
401 **/
402 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
403 {
404 return &vsi->net_stats;
405 }
406
407 /**
408 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
409 * @netdev: network interface device structure
410 *
411 * Returns the address of the device statistics structure.
412 * The statistics are actually updated from the service task.
413 **/
414 #ifdef I40E_FCOE
415 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
416 struct net_device *netdev,
417 struct rtnl_link_stats64 *stats)
418 #else
419 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
420 struct net_device *netdev,
421 struct rtnl_link_stats64 *stats)
422 #endif
423 {
424 struct i40e_netdev_priv *np = netdev_priv(netdev);
425 struct i40e_ring *tx_ring, *rx_ring;
426 struct i40e_vsi *vsi = np->vsi;
427 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
428 int i;
429
430 if (test_bit(__I40E_DOWN, &vsi->state))
431 return stats;
432
433 if (!vsi->tx_rings)
434 return stats;
435
436 rcu_read_lock();
437 for (i = 0; i < vsi->num_queue_pairs; i++) {
438 u64 bytes, packets;
439 unsigned int start;
440
441 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
442 if (!tx_ring)
443 continue;
444
445 do {
446 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
447 packets = tx_ring->stats.packets;
448 bytes = tx_ring->stats.bytes;
449 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
450
451 stats->tx_packets += packets;
452 stats->tx_bytes += bytes;
453 rx_ring = &tx_ring[1];
454
455 do {
456 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
457 packets = rx_ring->stats.packets;
458 bytes = rx_ring->stats.bytes;
459 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
460
461 stats->rx_packets += packets;
462 stats->rx_bytes += bytes;
463 }
464 rcu_read_unlock();
465
466 /* following stats updated by i40e_watchdog_subtask() */
467 stats->multicast = vsi_stats->multicast;
468 stats->tx_errors = vsi_stats->tx_errors;
469 stats->tx_dropped = vsi_stats->tx_dropped;
470 stats->rx_errors = vsi_stats->rx_errors;
471 stats->rx_dropped = vsi_stats->rx_dropped;
472 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
473 stats->rx_length_errors = vsi_stats->rx_length_errors;
474
475 return stats;
476 }
477
478 /**
479 * i40e_vsi_reset_stats - Resets all stats of the given vsi
480 * @vsi: the VSI to have its stats reset
481 **/
482 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
483 {
484 struct rtnl_link_stats64 *ns;
485 int i;
486
487 if (!vsi)
488 return;
489
490 ns = i40e_get_vsi_stats_struct(vsi);
491 memset(ns, 0, sizeof(*ns));
492 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
493 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
494 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
495 if (vsi->rx_rings && vsi->rx_rings[0]) {
496 for (i = 0; i < vsi->num_queue_pairs; i++) {
497 memset(&vsi->rx_rings[i]->stats, 0,
498 sizeof(vsi->rx_rings[i]->stats));
499 memset(&vsi->rx_rings[i]->rx_stats, 0,
500 sizeof(vsi->rx_rings[i]->rx_stats));
501 memset(&vsi->tx_rings[i]->stats, 0,
502 sizeof(vsi->tx_rings[i]->stats));
503 memset(&vsi->tx_rings[i]->tx_stats, 0,
504 sizeof(vsi->tx_rings[i]->tx_stats));
505 }
506 }
507 vsi->stat_offsets_loaded = false;
508 }
509
510 /**
511 * i40e_pf_reset_stats - Reset all of the stats for the given PF
512 * @pf: the PF to be reset
513 **/
514 void i40e_pf_reset_stats(struct i40e_pf *pf)
515 {
516 int i;
517
518 memset(&pf->stats, 0, sizeof(pf->stats));
519 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
520 pf->stat_offsets_loaded = false;
521
522 for (i = 0; i < I40E_MAX_VEB; i++) {
523 if (pf->veb[i]) {
524 memset(&pf->veb[i]->stats, 0,
525 sizeof(pf->veb[i]->stats));
526 memset(&pf->veb[i]->stats_offsets, 0,
527 sizeof(pf->veb[i]->stats_offsets));
528 pf->veb[i]->stat_offsets_loaded = false;
529 }
530 }
531 }
532
533 /**
534 * i40e_stat_update48 - read and update a 48 bit stat from the chip
535 * @hw: ptr to the hardware info
536 * @hireg: the high 32 bit reg to read
537 * @loreg: the low 32 bit reg to read
538 * @offset_loaded: has the initial offset been loaded yet
539 * @offset: ptr to current offset value
540 * @stat: ptr to the stat
541 *
542 * Since the device stats are not reset at PFReset, they likely will not
543 * be zeroed when the driver starts. We'll save the first values read
544 * and use them as offsets to be subtracted from the raw values in order
545 * to report stats that count from zero. In the process, we also manage
546 * the potential roll-over.
547 **/
548 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
549 bool offset_loaded, u64 *offset, u64 *stat)
550 {
551 u64 new_data;
552
553 if (hw->device_id == I40E_DEV_ID_QEMU) {
554 new_data = rd32(hw, loreg);
555 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
556 } else {
557 new_data = rd64(hw, loreg);
558 }
559 if (!offset_loaded)
560 *offset = new_data;
561 if (likely(new_data >= *offset))
562 *stat = new_data - *offset;
563 else
564 *stat = (new_data + BIT_ULL(48)) - *offset;
565 *stat &= 0xFFFFFFFFFFFFULL;
566 }
567
568 /**
569 * i40e_stat_update32 - read and update a 32 bit stat from the chip
570 * @hw: ptr to the hardware info
571 * @reg: the hw reg to read
572 * @offset_loaded: has the initial offset been loaded yet
573 * @offset: ptr to current offset value
574 * @stat: ptr to the stat
575 **/
576 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
577 bool offset_loaded, u64 *offset, u64 *stat)
578 {
579 u32 new_data;
580
581 new_data = rd32(hw, reg);
582 if (!offset_loaded)
583 *offset = new_data;
584 if (likely(new_data >= *offset))
585 *stat = (u32)(new_data - *offset);
586 else
587 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
588 }
589
590 /**
591 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
592 * @vsi: the VSI to be updated
593 **/
594 void i40e_update_eth_stats(struct i40e_vsi *vsi)
595 {
596 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
597 struct i40e_pf *pf = vsi->back;
598 struct i40e_hw *hw = &pf->hw;
599 struct i40e_eth_stats *oes;
600 struct i40e_eth_stats *es; /* device's eth stats */
601
602 es = &vsi->eth_stats;
603 oes = &vsi->eth_stats_offsets;
604
605 /* Gather up the stats that the hw collects */
606 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
607 vsi->stat_offsets_loaded,
608 &oes->tx_errors, &es->tx_errors);
609 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
610 vsi->stat_offsets_loaded,
611 &oes->rx_discards, &es->rx_discards);
612 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
613 vsi->stat_offsets_loaded,
614 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
615 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
616 vsi->stat_offsets_loaded,
617 &oes->tx_errors, &es->tx_errors);
618
619 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
620 I40E_GLV_GORCL(stat_idx),
621 vsi->stat_offsets_loaded,
622 &oes->rx_bytes, &es->rx_bytes);
623 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
624 I40E_GLV_UPRCL(stat_idx),
625 vsi->stat_offsets_loaded,
626 &oes->rx_unicast, &es->rx_unicast);
627 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
628 I40E_GLV_MPRCL(stat_idx),
629 vsi->stat_offsets_loaded,
630 &oes->rx_multicast, &es->rx_multicast);
631 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
632 I40E_GLV_BPRCL(stat_idx),
633 vsi->stat_offsets_loaded,
634 &oes->rx_broadcast, &es->rx_broadcast);
635
636 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
637 I40E_GLV_GOTCL(stat_idx),
638 vsi->stat_offsets_loaded,
639 &oes->tx_bytes, &es->tx_bytes);
640 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
641 I40E_GLV_UPTCL(stat_idx),
642 vsi->stat_offsets_loaded,
643 &oes->tx_unicast, &es->tx_unicast);
644 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
645 I40E_GLV_MPTCL(stat_idx),
646 vsi->stat_offsets_loaded,
647 &oes->tx_multicast, &es->tx_multicast);
648 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
649 I40E_GLV_BPTCL(stat_idx),
650 vsi->stat_offsets_loaded,
651 &oes->tx_broadcast, &es->tx_broadcast);
652 vsi->stat_offsets_loaded = true;
653 }
654
655 /**
656 * i40e_update_veb_stats - Update Switch component statistics
657 * @veb: the VEB being updated
658 **/
659 static void i40e_update_veb_stats(struct i40e_veb *veb)
660 {
661 struct i40e_pf *pf = veb->pf;
662 struct i40e_hw *hw = &pf->hw;
663 struct i40e_eth_stats *oes;
664 struct i40e_eth_stats *es; /* device's eth stats */
665 struct i40e_veb_tc_stats *veb_oes;
666 struct i40e_veb_tc_stats *veb_es;
667 int i, idx = 0;
668
669 idx = veb->stats_idx;
670 es = &veb->stats;
671 oes = &veb->stats_offsets;
672 veb_es = &veb->tc_stats;
673 veb_oes = &veb->tc_stats_offsets;
674
675 /* Gather up the stats that the hw collects */
676 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
677 veb->stat_offsets_loaded,
678 &oes->tx_discards, &es->tx_discards);
679 if (hw->revision_id > 0)
680 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
681 veb->stat_offsets_loaded,
682 &oes->rx_unknown_protocol,
683 &es->rx_unknown_protocol);
684 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
685 veb->stat_offsets_loaded,
686 &oes->rx_bytes, &es->rx_bytes);
687 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
688 veb->stat_offsets_loaded,
689 &oes->rx_unicast, &es->rx_unicast);
690 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
691 veb->stat_offsets_loaded,
692 &oes->rx_multicast, &es->rx_multicast);
693 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
694 veb->stat_offsets_loaded,
695 &oes->rx_broadcast, &es->rx_broadcast);
696
697 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
698 veb->stat_offsets_loaded,
699 &oes->tx_bytes, &es->tx_bytes);
700 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
701 veb->stat_offsets_loaded,
702 &oes->tx_unicast, &es->tx_unicast);
703 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
704 veb->stat_offsets_loaded,
705 &oes->tx_multicast, &es->tx_multicast);
706 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
707 veb->stat_offsets_loaded,
708 &oes->tx_broadcast, &es->tx_broadcast);
709 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
710 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
711 I40E_GLVEBTC_RPCL(i, idx),
712 veb->stat_offsets_loaded,
713 &veb_oes->tc_rx_packets[i],
714 &veb_es->tc_rx_packets[i]);
715 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
716 I40E_GLVEBTC_RBCL(i, idx),
717 veb->stat_offsets_loaded,
718 &veb_oes->tc_rx_bytes[i],
719 &veb_es->tc_rx_bytes[i]);
720 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
721 I40E_GLVEBTC_TPCL(i, idx),
722 veb->stat_offsets_loaded,
723 &veb_oes->tc_tx_packets[i],
724 &veb_es->tc_tx_packets[i]);
725 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
726 I40E_GLVEBTC_TBCL(i, idx),
727 veb->stat_offsets_loaded,
728 &veb_oes->tc_tx_bytes[i],
729 &veb_es->tc_tx_bytes[i]);
730 }
731 veb->stat_offsets_loaded = true;
732 }
733
734 #ifdef I40E_FCOE
735 /**
736 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
737 * @vsi: the VSI that is capable of doing FCoE
738 **/
739 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
740 {
741 struct i40e_pf *pf = vsi->back;
742 struct i40e_hw *hw = &pf->hw;
743 struct i40e_fcoe_stats *ofs;
744 struct i40e_fcoe_stats *fs; /* device's eth stats */
745 int idx;
746
747 if (vsi->type != I40E_VSI_FCOE)
748 return;
749
750 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
751 fs = &vsi->fcoe_stats;
752 ofs = &vsi->fcoe_stats_offsets;
753
754 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
755 vsi->fcoe_stat_offsets_loaded,
756 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
757 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
758 vsi->fcoe_stat_offsets_loaded,
759 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
760 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
761 vsi->fcoe_stat_offsets_loaded,
762 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
763 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
764 vsi->fcoe_stat_offsets_loaded,
765 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
766 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
767 vsi->fcoe_stat_offsets_loaded,
768 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
769 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
770 vsi->fcoe_stat_offsets_loaded,
771 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
772 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
773 vsi->fcoe_stat_offsets_loaded,
774 &ofs->fcoe_last_error, &fs->fcoe_last_error);
775 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
776 vsi->fcoe_stat_offsets_loaded,
777 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
778
779 vsi->fcoe_stat_offsets_loaded = true;
780 }
781
782 #endif
783 /**
784 * i40e_update_vsi_stats - Update the vsi statistics counters.
785 * @vsi: the VSI to be updated
786 *
787 * There are a few instances where we store the same stat in a
788 * couple of different structs. This is partly because we have
789 * the netdev stats that need to be filled out, which is slightly
790 * different from the "eth_stats" defined by the chip and used in
791 * VF communications. We sort it out here.
792 **/
793 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
794 {
795 struct i40e_pf *pf = vsi->back;
796 struct rtnl_link_stats64 *ons;
797 struct rtnl_link_stats64 *ns; /* netdev stats */
798 struct i40e_eth_stats *oes;
799 struct i40e_eth_stats *es; /* device's eth stats */
800 u32 tx_restart, tx_busy;
801 u64 tx_lost_interrupt;
802 struct i40e_ring *p;
803 u32 rx_page, rx_buf;
804 u64 bytes, packets;
805 unsigned int start;
806 u64 tx_linearize;
807 u64 tx_force_wb;
808 u64 rx_p, rx_b;
809 u64 tx_p, tx_b;
810 u16 q;
811
812 if (test_bit(__I40E_DOWN, &vsi->state) ||
813 test_bit(__I40E_CONFIG_BUSY, &pf->state))
814 return;
815
816 ns = i40e_get_vsi_stats_struct(vsi);
817 ons = &vsi->net_stats_offsets;
818 es = &vsi->eth_stats;
819 oes = &vsi->eth_stats_offsets;
820
821 /* Gather up the netdev and vsi stats that the driver collects
822 * on the fly during packet processing
823 */
824 rx_b = rx_p = 0;
825 tx_b = tx_p = 0;
826 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
827 tx_lost_interrupt = 0;
828 rx_page = 0;
829 rx_buf = 0;
830 rcu_read_lock();
831 for (q = 0; q < vsi->num_queue_pairs; q++) {
832 /* locate Tx ring */
833 p = ACCESS_ONCE(vsi->tx_rings[q]);
834
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 packets = p->stats.packets;
838 bytes = p->stats.bytes;
839 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
840 tx_b += bytes;
841 tx_p += packets;
842 tx_restart += p->tx_stats.restart_queue;
843 tx_busy += p->tx_stats.tx_busy;
844 tx_linearize += p->tx_stats.tx_linearize;
845 tx_force_wb += p->tx_stats.tx_force_wb;
846 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
847
848 /* Rx queue is part of the same block as Tx queue */
849 p = &p[1];
850 do {
851 start = u64_stats_fetch_begin_irq(&p->syncp);
852 packets = p->stats.packets;
853 bytes = p->stats.bytes;
854 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
855 rx_b += bytes;
856 rx_p += packets;
857 rx_buf += p->rx_stats.alloc_buff_failed;
858 rx_page += p->rx_stats.alloc_page_failed;
859 }
860 rcu_read_unlock();
861 vsi->tx_restart = tx_restart;
862 vsi->tx_busy = tx_busy;
863 vsi->tx_linearize = tx_linearize;
864 vsi->tx_force_wb = tx_force_wb;
865 vsi->tx_lost_interrupt = tx_lost_interrupt;
866 vsi->rx_page_failed = rx_page;
867 vsi->rx_buf_failed = rx_buf;
868
869 ns->rx_packets = rx_p;
870 ns->rx_bytes = rx_b;
871 ns->tx_packets = tx_p;
872 ns->tx_bytes = tx_b;
873
874 /* update netdev stats from eth stats */
875 i40e_update_eth_stats(vsi);
876 ons->tx_errors = oes->tx_errors;
877 ns->tx_errors = es->tx_errors;
878 ons->multicast = oes->rx_multicast;
879 ns->multicast = es->rx_multicast;
880 ons->rx_dropped = oes->rx_discards;
881 ns->rx_dropped = es->rx_discards;
882 ons->tx_dropped = oes->tx_discards;
883 ns->tx_dropped = es->tx_discards;
884
885 /* pull in a couple PF stats if this is the main vsi */
886 if (vsi == pf->vsi[pf->lan_vsi]) {
887 ns->rx_crc_errors = pf->stats.crc_errors;
888 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
889 ns->rx_length_errors = pf->stats.rx_length_errors;
890 }
891 }
892
893 /**
894 * i40e_update_pf_stats - Update the PF statistics counters.
895 * @pf: the PF to be updated
896 **/
897 static void i40e_update_pf_stats(struct i40e_pf *pf)
898 {
899 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
900 struct i40e_hw_port_stats *nsd = &pf->stats;
901 struct i40e_hw *hw = &pf->hw;
902 u32 val;
903 int i;
904
905 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
906 I40E_GLPRT_GORCL(hw->port),
907 pf->stat_offsets_loaded,
908 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
909 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
910 I40E_GLPRT_GOTCL(hw->port),
911 pf->stat_offsets_loaded,
912 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
913 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
914 pf->stat_offsets_loaded,
915 &osd->eth.rx_discards,
916 &nsd->eth.rx_discards);
917 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
918 I40E_GLPRT_UPRCL(hw->port),
919 pf->stat_offsets_loaded,
920 &osd->eth.rx_unicast,
921 &nsd->eth.rx_unicast);
922 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
923 I40E_GLPRT_MPRCL(hw->port),
924 pf->stat_offsets_loaded,
925 &osd->eth.rx_multicast,
926 &nsd->eth.rx_multicast);
927 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
928 I40E_GLPRT_BPRCL(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->eth.rx_broadcast,
931 &nsd->eth.rx_broadcast);
932 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
933 I40E_GLPRT_UPTCL(hw->port),
934 pf->stat_offsets_loaded,
935 &osd->eth.tx_unicast,
936 &nsd->eth.tx_unicast);
937 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
938 I40E_GLPRT_MPTCL(hw->port),
939 pf->stat_offsets_loaded,
940 &osd->eth.tx_multicast,
941 &nsd->eth.tx_multicast);
942 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
943 I40E_GLPRT_BPTCL(hw->port),
944 pf->stat_offsets_loaded,
945 &osd->eth.tx_broadcast,
946 &nsd->eth.tx_broadcast);
947
948 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
949 pf->stat_offsets_loaded,
950 &osd->tx_dropped_link_down,
951 &nsd->tx_dropped_link_down);
952
953 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->crc_errors, &nsd->crc_errors);
956
957 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->illegal_bytes, &nsd->illegal_bytes);
960
961 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->mac_local_faults,
964 &nsd->mac_local_faults);
965 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->mac_remote_faults,
968 &nsd->mac_remote_faults);
969
970 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
971 pf->stat_offsets_loaded,
972 &osd->rx_length_errors,
973 &nsd->rx_length_errors);
974
975 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
976 pf->stat_offsets_loaded,
977 &osd->link_xon_rx, &nsd->link_xon_rx);
978 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->link_xon_tx, &nsd->link_xon_tx);
981 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
982 pf->stat_offsets_loaded,
983 &osd->link_xoff_rx, &nsd->link_xoff_rx);
984 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
985 pf->stat_offsets_loaded,
986 &osd->link_xoff_tx, &nsd->link_xoff_tx);
987
988 for (i = 0; i < 8; i++) {
989 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
990 pf->stat_offsets_loaded,
991 &osd->priority_xoff_rx[i],
992 &nsd->priority_xoff_rx[i]);
993 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
994 pf->stat_offsets_loaded,
995 &osd->priority_xon_rx[i],
996 &nsd->priority_xon_rx[i]);
997 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
998 pf->stat_offsets_loaded,
999 &osd->priority_xon_tx[i],
1000 &nsd->priority_xon_tx[i]);
1001 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1002 pf->stat_offsets_loaded,
1003 &osd->priority_xoff_tx[i],
1004 &nsd->priority_xoff_tx[i]);
1005 i40e_stat_update32(hw,
1006 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1007 pf->stat_offsets_loaded,
1008 &osd->priority_xon_2_xoff[i],
1009 &nsd->priority_xon_2_xoff[i]);
1010 }
1011
1012 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1013 I40E_GLPRT_PRC64L(hw->port),
1014 pf->stat_offsets_loaded,
1015 &osd->rx_size_64, &nsd->rx_size_64);
1016 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1017 I40E_GLPRT_PRC127L(hw->port),
1018 pf->stat_offsets_loaded,
1019 &osd->rx_size_127, &nsd->rx_size_127);
1020 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1021 I40E_GLPRT_PRC255L(hw->port),
1022 pf->stat_offsets_loaded,
1023 &osd->rx_size_255, &nsd->rx_size_255);
1024 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1025 I40E_GLPRT_PRC511L(hw->port),
1026 pf->stat_offsets_loaded,
1027 &osd->rx_size_511, &nsd->rx_size_511);
1028 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1029 I40E_GLPRT_PRC1023L(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->rx_size_1023, &nsd->rx_size_1023);
1032 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1033 I40E_GLPRT_PRC1522L(hw->port),
1034 pf->stat_offsets_loaded,
1035 &osd->rx_size_1522, &nsd->rx_size_1522);
1036 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1037 I40E_GLPRT_PRC9522L(hw->port),
1038 pf->stat_offsets_loaded,
1039 &osd->rx_size_big, &nsd->rx_size_big);
1040
1041 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1042 I40E_GLPRT_PTC64L(hw->port),
1043 pf->stat_offsets_loaded,
1044 &osd->tx_size_64, &nsd->tx_size_64);
1045 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1046 I40E_GLPRT_PTC127L(hw->port),
1047 pf->stat_offsets_loaded,
1048 &osd->tx_size_127, &nsd->tx_size_127);
1049 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1050 I40E_GLPRT_PTC255L(hw->port),
1051 pf->stat_offsets_loaded,
1052 &osd->tx_size_255, &nsd->tx_size_255);
1053 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1054 I40E_GLPRT_PTC511L(hw->port),
1055 pf->stat_offsets_loaded,
1056 &osd->tx_size_511, &nsd->tx_size_511);
1057 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1058 I40E_GLPRT_PTC1023L(hw->port),
1059 pf->stat_offsets_loaded,
1060 &osd->tx_size_1023, &nsd->tx_size_1023);
1061 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1062 I40E_GLPRT_PTC1522L(hw->port),
1063 pf->stat_offsets_loaded,
1064 &osd->tx_size_1522, &nsd->tx_size_1522);
1065 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1066 I40E_GLPRT_PTC9522L(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->tx_size_big, &nsd->tx_size_big);
1069
1070 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1071 pf->stat_offsets_loaded,
1072 &osd->rx_undersize, &nsd->rx_undersize);
1073 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->rx_fragments, &nsd->rx_fragments);
1076 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1077 pf->stat_offsets_loaded,
1078 &osd->rx_oversize, &nsd->rx_oversize);
1079 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1080 pf->stat_offsets_loaded,
1081 &osd->rx_jabber, &nsd->rx_jabber);
1082
1083 /* FDIR stats */
1084 i40e_stat_update32(hw,
1085 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1086 pf->stat_offsets_loaded,
1087 &osd->fd_atr_match, &nsd->fd_atr_match);
1088 i40e_stat_update32(hw,
1089 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1090 pf->stat_offsets_loaded,
1091 &osd->fd_sb_match, &nsd->fd_sb_match);
1092 i40e_stat_update32(hw,
1093 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1094 pf->stat_offsets_loaded,
1095 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1096
1097 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1098 nsd->tx_lpi_status =
1099 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1100 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1101 nsd->rx_lpi_status =
1102 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1103 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1104 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1105 pf->stat_offsets_loaded,
1106 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1107 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1108 pf->stat_offsets_loaded,
1109 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1110
1111 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1112 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1113 nsd->fd_sb_status = true;
1114 else
1115 nsd->fd_sb_status = false;
1116
1117 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1118 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1119 nsd->fd_atr_status = true;
1120 else
1121 nsd->fd_atr_status = false;
1122
1123 pf->stat_offsets_loaded = true;
1124 }
1125
1126 /**
1127 * i40e_update_stats - Update the various statistics counters.
1128 * @vsi: the VSI to be updated
1129 *
1130 * Update the various stats for this VSI and its related entities.
1131 **/
1132 void i40e_update_stats(struct i40e_vsi *vsi)
1133 {
1134 struct i40e_pf *pf = vsi->back;
1135
1136 if (vsi == pf->vsi[pf->lan_vsi])
1137 i40e_update_pf_stats(pf);
1138
1139 i40e_update_vsi_stats(vsi);
1140 #ifdef I40E_FCOE
1141 i40e_update_fcoe_stats(vsi);
1142 #endif
1143 }
1144
1145 /**
1146 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1147 * @vsi: the VSI to be searched
1148 * @macaddr: the MAC address
1149 * @vlan: the vlan
1150 * @is_vf: make sure its a VF filter, else doesn't matter
1151 * @is_netdev: make sure its a netdev filter, else doesn't matter
1152 *
1153 * Returns ptr to the filter object or NULL
1154 **/
1155 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1156 u8 *macaddr, s16 vlan,
1157 bool is_vf, bool is_netdev)
1158 {
1159 struct i40e_mac_filter *f;
1160
1161 if (!vsi || !macaddr)
1162 return NULL;
1163
1164 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1165 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1166 (vlan == f->vlan) &&
1167 (!is_vf || f->is_vf) &&
1168 (!is_netdev || f->is_netdev))
1169 return f;
1170 }
1171 return NULL;
1172 }
1173
1174 /**
1175 * i40e_find_mac - Find a mac addr in the macvlan filters list
1176 * @vsi: the VSI to be searched
1177 * @macaddr: the MAC address we are searching for
1178 * @is_vf: make sure its a VF filter, else doesn't matter
1179 * @is_netdev: make sure its a netdev filter, else doesn't matter
1180 *
1181 * Returns the first filter with the provided MAC address or NULL if
1182 * MAC address was not found
1183 **/
1184 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1185 bool is_vf, bool is_netdev)
1186 {
1187 struct i40e_mac_filter *f;
1188
1189 if (!vsi || !macaddr)
1190 return NULL;
1191
1192 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1193 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1194 (!is_vf || f->is_vf) &&
1195 (!is_netdev || f->is_netdev))
1196 return f;
1197 }
1198 return NULL;
1199 }
1200
1201 /**
1202 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1203 * @vsi: the VSI to be searched
1204 *
1205 * Returns true if VSI is in vlan mode or false otherwise
1206 **/
1207 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1208 {
1209 struct i40e_mac_filter *f;
1210
1211 /* Only -1 for all the filters denotes not in vlan mode
1212 * so we have to go through all the list in order to make sure
1213 */
1214 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1215 if (f->vlan >= 0 || vsi->info.pvid)
1216 return true;
1217 }
1218
1219 return false;
1220 }
1221
1222 /**
1223 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1224 * @vsi: the VSI to be searched
1225 * @macaddr: the mac address to be filtered
1226 * @is_vf: true if it is a VF
1227 * @is_netdev: true if it is a netdev
1228 *
1229 * Goes through all the macvlan filters and adds a
1230 * macvlan filter for each unique vlan that already exists
1231 *
1232 * Returns first filter found on success, else NULL
1233 **/
1234 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1235 bool is_vf, bool is_netdev)
1236 {
1237 struct i40e_mac_filter *f;
1238
1239 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1240 if (vsi->info.pvid)
1241 f->vlan = le16_to_cpu(vsi->info.pvid);
1242 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1243 is_vf, is_netdev)) {
1244 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1245 is_vf, is_netdev))
1246 return NULL;
1247 }
1248 }
1249
1250 return list_first_entry_or_null(&vsi->mac_filter_list,
1251 struct i40e_mac_filter, list);
1252 }
1253
1254 /**
1255 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1256 * @vsi: the VSI to be searched
1257 * @macaddr: the mac address to be removed
1258 * @is_vf: true if it is a VF
1259 * @is_netdev: true if it is a netdev
1260 *
1261 * Removes a given MAC address from a VSI, regardless of VLAN
1262 *
1263 * Returns 0 for success, or error
1264 **/
1265 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1266 bool is_vf, bool is_netdev)
1267 {
1268 struct i40e_mac_filter *f = NULL;
1269 int changed = 0;
1270
1271 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1272 "Missing mac_filter_list_lock\n");
1273 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1274 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1275 (is_vf == f->is_vf) &&
1276 (is_netdev == f->is_netdev)) {
1277 f->counter--;
1278 f->changed = true;
1279 changed = 1;
1280 }
1281 }
1282 if (changed) {
1283 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1284 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1285 return 0;
1286 }
1287 return -ENOENT;
1288 }
1289
1290 /**
1291 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1292 * @vsi: the PF Main VSI - inappropriate for any other VSI
1293 * @macaddr: the MAC address
1294 *
1295 * Some older firmware configurations set up a default promiscuous VLAN
1296 * filter that needs to be removed.
1297 **/
1298 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1299 {
1300 struct i40e_aqc_remove_macvlan_element_data element;
1301 struct i40e_pf *pf = vsi->back;
1302 i40e_status ret;
1303
1304 /* Only appropriate for the PF main VSI */
1305 if (vsi->type != I40E_VSI_MAIN)
1306 return -EINVAL;
1307
1308 memset(&element, 0, sizeof(element));
1309 ether_addr_copy(element.mac_addr, macaddr);
1310 element.vlan_tag = 0;
1311 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1312 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1313 ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1314 if (ret)
1315 return -ENOENT;
1316
1317 return 0;
1318 }
1319
1320 /**
1321 * i40e_add_filter - Add a mac/vlan filter to the VSI
1322 * @vsi: the VSI to be searched
1323 * @macaddr: the MAC address
1324 * @vlan: the vlan
1325 * @is_vf: make sure its a VF filter, else doesn't matter
1326 * @is_netdev: make sure its a netdev filter, else doesn't matter
1327 *
1328 * Returns ptr to the filter object or NULL when no memory available.
1329 *
1330 * NOTE: This function is expected to be called with mac_filter_list_lock
1331 * being held.
1332 **/
1333 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1334 u8 *macaddr, s16 vlan,
1335 bool is_vf, bool is_netdev)
1336 {
1337 struct i40e_mac_filter *f;
1338
1339 if (!vsi || !macaddr)
1340 return NULL;
1341
1342 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1343 if (!f) {
1344 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1345 if (!f)
1346 goto add_filter_out;
1347
1348 ether_addr_copy(f->macaddr, macaddr);
1349 f->vlan = vlan;
1350 f->changed = true;
1351
1352 INIT_LIST_HEAD(&f->list);
1353 list_add_tail(&f->list, &vsi->mac_filter_list);
1354 }
1355
1356 /* increment counter and add a new flag if needed */
1357 if (is_vf) {
1358 if (!f->is_vf) {
1359 f->is_vf = true;
1360 f->counter++;
1361 }
1362 } else if (is_netdev) {
1363 if (!f->is_netdev) {
1364 f->is_netdev = true;
1365 f->counter++;
1366 }
1367 } else {
1368 f->counter++;
1369 }
1370
1371 /* changed tells sync_filters_subtask to
1372 * push the filter down to the firmware
1373 */
1374 if (f->changed) {
1375 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1376 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1377 }
1378
1379 add_filter_out:
1380 return f;
1381 }
1382
1383 /**
1384 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1385 * @vsi: the VSI to be searched
1386 * @macaddr: the MAC address
1387 * @vlan: the vlan
1388 * @is_vf: make sure it's a VF filter, else doesn't matter
1389 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1390 *
1391 * NOTE: This function is expected to be called with mac_filter_list_lock
1392 * being held.
1393 **/
1394 void i40e_del_filter(struct i40e_vsi *vsi,
1395 u8 *macaddr, s16 vlan,
1396 bool is_vf, bool is_netdev)
1397 {
1398 struct i40e_mac_filter *f;
1399
1400 if (!vsi || !macaddr)
1401 return;
1402
1403 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1404 if (!f || f->counter == 0)
1405 return;
1406
1407 if (is_vf) {
1408 if (f->is_vf) {
1409 f->is_vf = false;
1410 f->counter--;
1411 }
1412 } else if (is_netdev) {
1413 if (f->is_netdev) {
1414 f->is_netdev = false;
1415 f->counter--;
1416 }
1417 } else {
1418 /* make sure we don't remove a filter in use by VF or netdev */
1419 int min_f = 0;
1420
1421 min_f += (f->is_vf ? 1 : 0);
1422 min_f += (f->is_netdev ? 1 : 0);
1423
1424 if (f->counter > min_f)
1425 f->counter--;
1426 }
1427
1428 /* counter == 0 tells sync_filters_subtask to
1429 * remove the filter from the firmware's list
1430 */
1431 if (f->counter == 0) {
1432 f->changed = true;
1433 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1434 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1435 }
1436 }
1437
1438 /**
1439 * i40e_set_mac - NDO callback to set mac address
1440 * @netdev: network interface device structure
1441 * @p: pointer to an address structure
1442 *
1443 * Returns 0 on success, negative on failure
1444 **/
1445 #ifdef I40E_FCOE
1446 int i40e_set_mac(struct net_device *netdev, void *p)
1447 #else
1448 static int i40e_set_mac(struct net_device *netdev, void *p)
1449 #endif
1450 {
1451 struct i40e_netdev_priv *np = netdev_priv(netdev);
1452 struct i40e_vsi *vsi = np->vsi;
1453 struct i40e_pf *pf = vsi->back;
1454 struct i40e_hw *hw = &pf->hw;
1455 struct sockaddr *addr = p;
1456 struct i40e_mac_filter *f;
1457
1458 if (!is_valid_ether_addr(addr->sa_data))
1459 return -EADDRNOTAVAIL;
1460
1461 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1462 netdev_info(netdev, "already using mac address %pM\n",
1463 addr->sa_data);
1464 return 0;
1465 }
1466
1467 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1468 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1469 return -EADDRNOTAVAIL;
1470
1471 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1472 netdev_info(netdev, "returning to hw mac address %pM\n",
1473 hw->mac.addr);
1474 else
1475 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1476
1477 if (vsi->type == I40E_VSI_MAIN) {
1478 i40e_status ret;
1479
1480 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1481 I40E_AQC_WRITE_TYPE_LAA_WOL,
1482 addr->sa_data, NULL);
1483 if (ret) {
1484 netdev_info(netdev,
1485 "Addr change for Main VSI failed: %d\n",
1486 ret);
1487 return -EADDRNOTAVAIL;
1488 }
1489 }
1490
1491 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1492 struct i40e_aqc_remove_macvlan_element_data element;
1493
1494 memset(&element, 0, sizeof(element));
1495 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1496 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1497 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1498 } else {
1499 spin_lock_bh(&vsi->mac_filter_list_lock);
1500 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1501 false, false);
1502 spin_unlock_bh(&vsi->mac_filter_list_lock);
1503 }
1504
1505 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1506 struct i40e_aqc_add_macvlan_element_data element;
1507
1508 memset(&element, 0, sizeof(element));
1509 ether_addr_copy(element.mac_addr, hw->mac.addr);
1510 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1511 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1512 } else {
1513 spin_lock_bh(&vsi->mac_filter_list_lock);
1514 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1515 false, false);
1516 if (f)
1517 f->is_laa = true;
1518 spin_unlock_bh(&vsi->mac_filter_list_lock);
1519 }
1520
1521 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1522
1523 /* schedule our worker thread which will take care of
1524 * applying the new filter changes
1525 */
1526 i40e_service_event_schedule(vsi->back);
1527 return 0;
1528 }
1529
1530 /**
1531 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1532 * @vsi: the VSI being setup
1533 * @ctxt: VSI context structure
1534 * @enabled_tc: Enabled TCs bitmap
1535 * @is_add: True if called before Add VSI
1536 *
1537 * Setup VSI queue mapping for enabled traffic classes.
1538 **/
1539 #ifdef I40E_FCOE
1540 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1541 struct i40e_vsi_context *ctxt,
1542 u8 enabled_tc,
1543 bool is_add)
1544 #else
1545 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1546 struct i40e_vsi_context *ctxt,
1547 u8 enabled_tc,
1548 bool is_add)
1549 #endif
1550 {
1551 struct i40e_pf *pf = vsi->back;
1552 u16 sections = 0;
1553 u8 netdev_tc = 0;
1554 u16 numtc = 0;
1555 u16 qcount;
1556 u8 offset;
1557 u16 qmap;
1558 int i;
1559 u16 num_tc_qps = 0;
1560
1561 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1562 offset = 0;
1563
1564 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1565 /* Find numtc from enabled TC bitmap */
1566 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1567 if (enabled_tc & BIT(i)) /* TC is enabled */
1568 numtc++;
1569 }
1570 if (!numtc) {
1571 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1572 numtc = 1;
1573 }
1574 } else {
1575 /* At least TC0 is enabled in case of non-DCB case */
1576 numtc = 1;
1577 }
1578
1579 vsi->tc_config.numtc = numtc;
1580 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1581 /* Number of queues per enabled TC */
1582 /* In MFP case we can have a much lower count of MSIx
1583 * vectors available and so we need to lower the used
1584 * q count.
1585 */
1586 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1587 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1588 else
1589 qcount = vsi->alloc_queue_pairs;
1590 num_tc_qps = qcount / numtc;
1591 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1592
1593 /* Setup queue offset/count for all TCs for given VSI */
1594 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1595 /* See if the given TC is enabled for the given VSI */
1596 if (vsi->tc_config.enabled_tc & BIT(i)) {
1597 /* TC is enabled */
1598 int pow, num_qps;
1599
1600 switch (vsi->type) {
1601 case I40E_VSI_MAIN:
1602 qcount = min_t(int, pf->alloc_rss_size,
1603 num_tc_qps);
1604 break;
1605 #ifdef I40E_FCOE
1606 case I40E_VSI_FCOE:
1607 qcount = num_tc_qps;
1608 break;
1609 #endif
1610 case I40E_VSI_FDIR:
1611 case I40E_VSI_SRIOV:
1612 case I40E_VSI_VMDQ2:
1613 default:
1614 qcount = num_tc_qps;
1615 WARN_ON(i != 0);
1616 break;
1617 }
1618 vsi->tc_config.tc_info[i].qoffset = offset;
1619 vsi->tc_config.tc_info[i].qcount = qcount;
1620
1621 /* find the next higher power-of-2 of num queue pairs */
1622 num_qps = qcount;
1623 pow = 0;
1624 while (num_qps && (BIT_ULL(pow) < qcount)) {
1625 pow++;
1626 num_qps >>= 1;
1627 }
1628
1629 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1630 qmap =
1631 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1632 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1633
1634 offset += qcount;
1635 } else {
1636 /* TC is not enabled so set the offset to
1637 * default queue and allocate one queue
1638 * for the given TC.
1639 */
1640 vsi->tc_config.tc_info[i].qoffset = 0;
1641 vsi->tc_config.tc_info[i].qcount = 1;
1642 vsi->tc_config.tc_info[i].netdev_tc = 0;
1643
1644 qmap = 0;
1645 }
1646 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1647 }
1648
1649 /* Set actual Tx/Rx queue pairs */
1650 vsi->num_queue_pairs = offset;
1651 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1652 if (vsi->req_queue_pairs > 0)
1653 vsi->num_queue_pairs = vsi->req_queue_pairs;
1654 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1655 vsi->num_queue_pairs = pf->num_lan_msix;
1656 }
1657
1658 /* Scheduler section valid can only be set for ADD VSI */
1659 if (is_add) {
1660 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1661
1662 ctxt->info.up_enable_bits = enabled_tc;
1663 }
1664 if (vsi->type == I40E_VSI_SRIOV) {
1665 ctxt->info.mapping_flags |=
1666 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1667 for (i = 0; i < vsi->num_queue_pairs; i++)
1668 ctxt->info.queue_mapping[i] =
1669 cpu_to_le16(vsi->base_queue + i);
1670 } else {
1671 ctxt->info.mapping_flags |=
1672 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1673 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1674 }
1675 ctxt->info.valid_sections |= cpu_to_le16(sections);
1676 }
1677
1678 /**
1679 * i40e_set_rx_mode - NDO callback to set the netdev filters
1680 * @netdev: network interface device structure
1681 **/
1682 #ifdef I40E_FCOE
1683 void i40e_set_rx_mode(struct net_device *netdev)
1684 #else
1685 static void i40e_set_rx_mode(struct net_device *netdev)
1686 #endif
1687 {
1688 struct i40e_netdev_priv *np = netdev_priv(netdev);
1689 struct i40e_mac_filter *f, *ftmp;
1690 struct i40e_vsi *vsi = np->vsi;
1691 struct netdev_hw_addr *uca;
1692 struct netdev_hw_addr *mca;
1693 struct netdev_hw_addr *ha;
1694
1695 spin_lock_bh(&vsi->mac_filter_list_lock);
1696
1697 /* add addr if not already in the filter list */
1698 netdev_for_each_uc_addr(uca, netdev) {
1699 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1700 if (i40e_is_vsi_in_vlan(vsi))
1701 i40e_put_mac_in_vlan(vsi, uca->addr,
1702 false, true);
1703 else
1704 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1705 false, true);
1706 }
1707 }
1708
1709 netdev_for_each_mc_addr(mca, netdev) {
1710 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1711 if (i40e_is_vsi_in_vlan(vsi))
1712 i40e_put_mac_in_vlan(vsi, mca->addr,
1713 false, true);
1714 else
1715 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1716 false, true);
1717 }
1718 }
1719
1720 /* remove filter if not in netdev list */
1721 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1722
1723 if (!f->is_netdev)
1724 continue;
1725
1726 netdev_for_each_mc_addr(mca, netdev)
1727 if (ether_addr_equal(mca->addr, f->macaddr))
1728 goto bottom_of_search_loop;
1729
1730 netdev_for_each_uc_addr(uca, netdev)
1731 if (ether_addr_equal(uca->addr, f->macaddr))
1732 goto bottom_of_search_loop;
1733
1734 for_each_dev_addr(netdev, ha)
1735 if (ether_addr_equal(ha->addr, f->macaddr))
1736 goto bottom_of_search_loop;
1737
1738 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1739 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1740
1741 bottom_of_search_loop:
1742 continue;
1743 }
1744 spin_unlock_bh(&vsi->mac_filter_list_lock);
1745
1746 /* check for other flag changes */
1747 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1748 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1749 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1750 }
1751
1752 /* schedule our worker thread which will take care of
1753 * applying the new filter changes
1754 */
1755 i40e_service_event_schedule(vsi->back);
1756 }
1757
1758 /**
1759 * i40e_mac_filter_entry_clone - Clones a MAC filter entry
1760 * @src: source MAC filter entry to be clones
1761 *
1762 * Returns the pointer to newly cloned MAC filter entry or NULL
1763 * in case of error
1764 **/
1765 static struct i40e_mac_filter *i40e_mac_filter_entry_clone(
1766 struct i40e_mac_filter *src)
1767 {
1768 struct i40e_mac_filter *f;
1769
1770 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1771 if (!f)
1772 return NULL;
1773 *f = *src;
1774
1775 INIT_LIST_HEAD(&f->list);
1776
1777 return f;
1778 }
1779
1780 /**
1781 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1782 * @vsi: pointer to vsi struct
1783 * @from: Pointer to list which contains MAC filter entries - changes to
1784 * those entries needs to be undone.
1785 *
1786 * MAC filter entries from list were slated to be removed from device.
1787 **/
1788 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1789 struct list_head *from)
1790 {
1791 struct i40e_mac_filter *f, *ftmp;
1792
1793 list_for_each_entry_safe(f, ftmp, from, list) {
1794 f->changed = true;
1795 /* Move the element back into MAC filter list*/
1796 list_move_tail(&f->list, &vsi->mac_filter_list);
1797 }
1798 }
1799
1800 /**
1801 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
1802 * @vsi: pointer to vsi struct
1803 *
1804 * MAC filter entries from list were slated to be added from device.
1805 **/
1806 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi)
1807 {
1808 struct i40e_mac_filter *f, *ftmp;
1809
1810 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1811 if (!f->changed && f->counter)
1812 f->changed = true;
1813 }
1814 }
1815
1816 /**
1817 * i40e_cleanup_add_list - Deletes the element from add list and release
1818 * memory
1819 * @add_list: Pointer to list which contains MAC filter entries
1820 **/
1821 static void i40e_cleanup_add_list(struct list_head *add_list)
1822 {
1823 struct i40e_mac_filter *f, *ftmp;
1824
1825 list_for_each_entry_safe(f, ftmp, add_list, list) {
1826 list_del(&f->list);
1827 kfree(f);
1828 }
1829 }
1830
1831 /**
1832 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1833 * @vsi: ptr to the VSI
1834 *
1835 * Push any outstanding VSI filter changes through the AdminQ.
1836 *
1837 * Returns 0 or error value
1838 **/
1839 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1840 {
1841 struct list_head tmp_del_list, tmp_add_list;
1842 struct i40e_mac_filter *f, *ftmp, *fclone;
1843 struct i40e_hw *hw = &vsi->back->hw;
1844 bool promisc_forced_on = false;
1845 bool add_happened = false;
1846 int filter_list_len = 0;
1847 u32 changed_flags = 0;
1848 i40e_status aq_ret = 0;
1849 bool err_cond = false;
1850 int retval = 0;
1851 struct i40e_pf *pf;
1852 int num_add = 0;
1853 int num_del = 0;
1854 int aq_err = 0;
1855 u16 cmd_flags;
1856
1857 /* empty array typed pointers, kcalloc later */
1858 struct i40e_aqc_add_macvlan_element_data *add_list;
1859 struct i40e_aqc_remove_macvlan_element_data *del_list;
1860
1861 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1862 usleep_range(1000, 2000);
1863 pf = vsi->back;
1864
1865 if (vsi->netdev) {
1866 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1867 vsi->current_netdev_flags = vsi->netdev->flags;
1868 }
1869
1870 INIT_LIST_HEAD(&tmp_del_list);
1871 INIT_LIST_HEAD(&tmp_add_list);
1872
1873 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1874 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1875
1876 spin_lock_bh(&vsi->mac_filter_list_lock);
1877 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1878 if (!f->changed)
1879 continue;
1880
1881 if (f->counter != 0)
1882 continue;
1883 f->changed = false;
1884
1885 /* Move the element into temporary del_list */
1886 list_move_tail(&f->list, &tmp_del_list);
1887 }
1888
1889 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1890 if (!f->changed)
1891 continue;
1892
1893 if (f->counter == 0)
1894 continue;
1895 f->changed = false;
1896
1897 /* Clone MAC filter entry and add into temporary list */
1898 fclone = i40e_mac_filter_entry_clone(f);
1899 if (!fclone) {
1900 err_cond = true;
1901 break;
1902 }
1903 list_add_tail(&fclone->list, &tmp_add_list);
1904 }
1905
1906 /* if failed to clone MAC filter entry - undo */
1907 if (err_cond) {
1908 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1909 i40e_undo_add_filter_entries(vsi);
1910 }
1911 spin_unlock_bh(&vsi->mac_filter_list_lock);
1912
1913 if (err_cond) {
1914 i40e_cleanup_add_list(&tmp_add_list);
1915 retval = -ENOMEM;
1916 goto out;
1917 }
1918 }
1919
1920 /* Now process 'del_list' outside the lock */
1921 if (!list_empty(&tmp_del_list)) {
1922 int del_list_size;
1923
1924 filter_list_len = hw->aq.asq_buf_size /
1925 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1926 del_list_size = filter_list_len *
1927 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1928 del_list = kzalloc(del_list_size, GFP_ATOMIC);
1929 if (!del_list) {
1930 i40e_cleanup_add_list(&tmp_add_list);
1931
1932 /* Undo VSI's MAC filter entry element updates */
1933 spin_lock_bh(&vsi->mac_filter_list_lock);
1934 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1935 i40e_undo_add_filter_entries(vsi);
1936 spin_unlock_bh(&vsi->mac_filter_list_lock);
1937 retval = -ENOMEM;
1938 goto out;
1939 }
1940
1941 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1942 cmd_flags = 0;
1943
1944 /* add to delete list */
1945 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1946 del_list[num_del].vlan_tag =
1947 cpu_to_le16((u16)(f->vlan ==
1948 I40E_VLAN_ANY ? 0 : f->vlan));
1949
1950 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1951 del_list[num_del].flags = cmd_flags;
1952 num_del++;
1953
1954 /* flush a full buffer */
1955 if (num_del == filter_list_len) {
1956 aq_ret =
1957 i40e_aq_remove_macvlan(hw, vsi->seid,
1958 del_list,
1959 num_del, NULL);
1960 aq_err = hw->aq.asq_last_status;
1961 num_del = 0;
1962 memset(del_list, 0, del_list_size);
1963
1964 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT) {
1965 retval = -EIO;
1966 dev_err(&pf->pdev->dev,
1967 "ignoring delete macvlan error, err %s, aq_err %s while flushing a full buffer\n",
1968
1969 i40e_stat_str(hw, aq_ret),
1970 i40e_aq_str(hw, aq_err));
1971 }
1972 }
1973 /* Release memory for MAC filter entries which were
1974 * synced up with HW.
1975 */
1976 list_del(&f->list);
1977 kfree(f);
1978 }
1979
1980 if (num_del) {
1981 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1982 num_del, NULL);
1983 aq_err = hw->aq.asq_last_status;
1984 num_del = 0;
1985
1986 if (aq_ret && aq_err != I40E_AQ_RC_ENOENT)
1987 dev_info(&pf->pdev->dev,
1988 "ignoring delete macvlan error, err %s aq_err %s\n",
1989 i40e_stat_str(hw, aq_ret),
1990 i40e_aq_str(hw, aq_err));
1991 }
1992
1993 kfree(del_list);
1994 del_list = NULL;
1995 }
1996
1997 if (!list_empty(&tmp_add_list)) {
1998 int add_list_size;
1999
2000 /* do all the adds now */
2001 filter_list_len = hw->aq.asq_buf_size /
2002 sizeof(struct i40e_aqc_add_macvlan_element_data),
2003 add_list_size = filter_list_len *
2004 sizeof(struct i40e_aqc_add_macvlan_element_data);
2005 add_list = kzalloc(add_list_size, GFP_ATOMIC);
2006 if (!add_list) {
2007 /* Purge element from temporary lists */
2008 i40e_cleanup_add_list(&tmp_add_list);
2009
2010 /* Undo add filter entries from VSI MAC filter list */
2011 spin_lock_bh(&vsi->mac_filter_list_lock);
2012 i40e_undo_add_filter_entries(vsi);
2013 spin_unlock_bh(&vsi->mac_filter_list_lock);
2014 retval = -ENOMEM;
2015 goto out;
2016 }
2017
2018 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2019
2020 add_happened = true;
2021 cmd_flags = 0;
2022
2023 /* add to add array */
2024 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
2025 add_list[num_add].vlan_tag =
2026 cpu_to_le16(
2027 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
2028 add_list[num_add].queue_number = 0;
2029
2030 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2031 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2032 num_add++;
2033
2034 /* flush a full buffer */
2035 if (num_add == filter_list_len) {
2036 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2037 add_list, num_add,
2038 NULL);
2039 aq_err = hw->aq.asq_last_status;
2040 num_add = 0;
2041
2042 if (aq_ret)
2043 break;
2044 memset(add_list, 0, add_list_size);
2045 }
2046 /* Entries from tmp_add_list were cloned from MAC
2047 * filter list, hence clean those cloned entries
2048 */
2049 list_del(&f->list);
2050 kfree(f);
2051 }
2052
2053 if (num_add) {
2054 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2055 add_list, num_add, NULL);
2056 aq_err = hw->aq.asq_last_status;
2057 num_add = 0;
2058 }
2059 kfree(add_list);
2060 add_list = NULL;
2061
2062 if (add_happened && aq_ret && aq_err != I40E_AQ_RC_EINVAL) {
2063 retval = i40e_aq_rc_to_posix(aq_ret, aq_err);
2064 dev_info(&pf->pdev->dev,
2065 "add filter failed, err %s aq_err %s\n",
2066 i40e_stat_str(hw, aq_ret),
2067 i40e_aq_str(hw, aq_err));
2068 if ((hw->aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
2069 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2070 &vsi->state)) {
2071 promisc_forced_on = true;
2072 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2073 &vsi->state);
2074 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
2075 }
2076 }
2077 }
2078
2079 /* if the VF is not trusted do not do promisc */
2080 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2081 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2082 goto out;
2083 }
2084
2085 /* check for changes in promiscuous modes */
2086 if (changed_flags & IFF_ALLMULTI) {
2087 bool cur_multipromisc;
2088
2089 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2090 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2091 vsi->seid,
2092 cur_multipromisc,
2093 NULL);
2094 if (aq_ret) {
2095 retval = i40e_aq_rc_to_posix(aq_ret,
2096 hw->aq.asq_last_status);
2097 dev_info(&pf->pdev->dev,
2098 "set multi promisc failed, err %s aq_err %s\n",
2099 i40e_stat_str(hw, aq_ret),
2100 i40e_aq_str(hw, hw->aq.asq_last_status));
2101 }
2102 }
2103 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
2104 bool cur_promisc;
2105
2106 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2107 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2108 &vsi->state));
2109 if ((vsi->type == I40E_VSI_MAIN) &&
2110 (pf->lan_veb != I40E_NO_VEB) &&
2111 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2112 /* set defport ON for Main VSI instead of true promisc
2113 * this way we will get all unicast/multicast and VLAN
2114 * promisc behavior but will not get VF or VMDq traffic
2115 * replicated on the Main VSI.
2116 */
2117 if (pf->cur_promisc != cur_promisc) {
2118 pf->cur_promisc = cur_promisc;
2119 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2120 }
2121 } else {
2122 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2123 hw,
2124 vsi->seid,
2125 cur_promisc, NULL,
2126 true);
2127 if (aq_ret) {
2128 retval =
2129 i40e_aq_rc_to_posix(aq_ret,
2130 hw->aq.asq_last_status);
2131 dev_info(&pf->pdev->dev,
2132 "set unicast promisc failed, err %s, aq_err %s\n",
2133 i40e_stat_str(hw, aq_ret),
2134 i40e_aq_str(hw,
2135 hw->aq.asq_last_status));
2136 }
2137 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2138 hw,
2139 vsi->seid,
2140 cur_promisc, NULL);
2141 if (aq_ret) {
2142 retval =
2143 i40e_aq_rc_to_posix(aq_ret,
2144 hw->aq.asq_last_status);
2145 dev_info(&pf->pdev->dev,
2146 "set multicast promisc failed, err %s, aq_err %s\n",
2147 i40e_stat_str(hw, aq_ret),
2148 i40e_aq_str(hw,
2149 hw->aq.asq_last_status));
2150 }
2151 }
2152 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2153 vsi->seid,
2154 cur_promisc, NULL);
2155 if (aq_ret) {
2156 retval = i40e_aq_rc_to_posix(aq_ret,
2157 pf->hw.aq.asq_last_status);
2158 dev_info(&pf->pdev->dev,
2159 "set brdcast promisc failed, err %s, aq_err %s\n",
2160 i40e_stat_str(hw, aq_ret),
2161 i40e_aq_str(hw,
2162 hw->aq.asq_last_status));
2163 }
2164 }
2165 out:
2166 /* if something went wrong then set the changed flag so we try again */
2167 if (retval)
2168 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2169
2170 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2171 return retval;
2172 }
2173
2174 /**
2175 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2176 * @pf: board private structure
2177 **/
2178 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2179 {
2180 int v;
2181
2182 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2183 return;
2184 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2185
2186 for (v = 0; v < pf->num_alloc_vsi; v++) {
2187 if (pf->vsi[v] &&
2188 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2189 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2190
2191 if (ret) {
2192 /* come back and try again later */
2193 pf->flags |= I40E_FLAG_FILTER_SYNC;
2194 break;
2195 }
2196 }
2197 }
2198 }
2199
2200 /**
2201 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2202 * @netdev: network interface device structure
2203 * @new_mtu: new value for maximum frame size
2204 *
2205 * Returns 0 on success, negative on failure
2206 **/
2207 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2208 {
2209 struct i40e_netdev_priv *np = netdev_priv(netdev);
2210 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2211 struct i40e_vsi *vsi = np->vsi;
2212
2213 /* MTU < 68 is an error and causes problems on some kernels */
2214 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
2215 return -EINVAL;
2216
2217 netdev_info(netdev, "changing MTU from %d to %d\n",
2218 netdev->mtu, new_mtu);
2219 netdev->mtu = new_mtu;
2220 if (netif_running(netdev))
2221 i40e_vsi_reinit_locked(vsi);
2222 i40e_notify_client_of_l2_param_changes(vsi);
2223 return 0;
2224 }
2225
2226 /**
2227 * i40e_ioctl - Access the hwtstamp interface
2228 * @netdev: network interface device structure
2229 * @ifr: interface request data
2230 * @cmd: ioctl command
2231 **/
2232 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2233 {
2234 struct i40e_netdev_priv *np = netdev_priv(netdev);
2235 struct i40e_pf *pf = np->vsi->back;
2236
2237 switch (cmd) {
2238 case SIOCGHWTSTAMP:
2239 return i40e_ptp_get_ts_config(pf, ifr);
2240 case SIOCSHWTSTAMP:
2241 return i40e_ptp_set_ts_config(pf, ifr);
2242 default:
2243 return -EOPNOTSUPP;
2244 }
2245 }
2246
2247 /**
2248 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2249 * @vsi: the vsi being adjusted
2250 **/
2251 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2252 {
2253 struct i40e_vsi_context ctxt;
2254 i40e_status ret;
2255
2256 if ((vsi->info.valid_sections &
2257 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2258 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2259 return; /* already enabled */
2260
2261 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2262 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2263 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2264
2265 ctxt.seid = vsi->seid;
2266 ctxt.info = vsi->info;
2267 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2268 if (ret) {
2269 dev_info(&vsi->back->pdev->dev,
2270 "update vlan stripping failed, err %s aq_err %s\n",
2271 i40e_stat_str(&vsi->back->hw, ret),
2272 i40e_aq_str(&vsi->back->hw,
2273 vsi->back->hw.aq.asq_last_status));
2274 }
2275 }
2276
2277 /**
2278 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2279 * @vsi: the vsi being adjusted
2280 **/
2281 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2282 {
2283 struct i40e_vsi_context ctxt;
2284 i40e_status ret;
2285
2286 if ((vsi->info.valid_sections &
2287 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2288 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2289 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2290 return; /* already disabled */
2291
2292 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2293 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2294 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2295
2296 ctxt.seid = vsi->seid;
2297 ctxt.info = vsi->info;
2298 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2299 if (ret) {
2300 dev_info(&vsi->back->pdev->dev,
2301 "update vlan stripping failed, err %s aq_err %s\n",
2302 i40e_stat_str(&vsi->back->hw, ret),
2303 i40e_aq_str(&vsi->back->hw,
2304 vsi->back->hw.aq.asq_last_status));
2305 }
2306 }
2307
2308 /**
2309 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2310 * @netdev: network interface to be adjusted
2311 * @features: netdev features to test if VLAN offload is enabled or not
2312 **/
2313 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2314 {
2315 struct i40e_netdev_priv *np = netdev_priv(netdev);
2316 struct i40e_vsi *vsi = np->vsi;
2317
2318 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2319 i40e_vlan_stripping_enable(vsi);
2320 else
2321 i40e_vlan_stripping_disable(vsi);
2322 }
2323
2324 /**
2325 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2326 * @vsi: the vsi being configured
2327 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2328 **/
2329 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2330 {
2331 struct i40e_mac_filter *f, *add_f;
2332 bool is_netdev, is_vf;
2333
2334 is_vf = (vsi->type == I40E_VSI_SRIOV);
2335 is_netdev = !!(vsi->netdev);
2336
2337 /* Locked once because all functions invoked below iterates list*/
2338 spin_lock_bh(&vsi->mac_filter_list_lock);
2339
2340 if (is_netdev) {
2341 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2342 is_vf, is_netdev);
2343 if (!add_f) {
2344 dev_info(&vsi->back->pdev->dev,
2345 "Could not add vlan filter %d for %pM\n",
2346 vid, vsi->netdev->dev_addr);
2347 spin_unlock_bh(&vsi->mac_filter_list_lock);
2348 return -ENOMEM;
2349 }
2350 }
2351
2352 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2353 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2354 if (!add_f) {
2355 dev_info(&vsi->back->pdev->dev,
2356 "Could not add vlan filter %d for %pM\n",
2357 vid, f->macaddr);
2358 spin_unlock_bh(&vsi->mac_filter_list_lock);
2359 return -ENOMEM;
2360 }
2361 }
2362
2363 /* Now if we add a vlan tag, make sure to check if it is the first
2364 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2365 * with 0, so we now accept untagged and specified tagged traffic
2366 * (and not any taged and untagged)
2367 */
2368 if (vid > 0) {
2369 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2370 I40E_VLAN_ANY,
2371 is_vf, is_netdev)) {
2372 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2373 I40E_VLAN_ANY, is_vf, is_netdev);
2374 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2375 is_vf, is_netdev);
2376 if (!add_f) {
2377 dev_info(&vsi->back->pdev->dev,
2378 "Could not add filter 0 for %pM\n",
2379 vsi->netdev->dev_addr);
2380 spin_unlock_bh(&vsi->mac_filter_list_lock);
2381 return -ENOMEM;
2382 }
2383 }
2384 }
2385
2386 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2387 if (vid > 0 && !vsi->info.pvid) {
2388 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2389 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2390 is_vf, is_netdev))
2391 continue;
2392 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2393 is_vf, is_netdev);
2394 add_f = i40e_add_filter(vsi, f->macaddr,
2395 0, is_vf, is_netdev);
2396 if (!add_f) {
2397 dev_info(&vsi->back->pdev->dev,
2398 "Could not add filter 0 for %pM\n",
2399 f->macaddr);
2400 spin_unlock_bh(&vsi->mac_filter_list_lock);
2401 return -ENOMEM;
2402 }
2403 }
2404 }
2405
2406 spin_unlock_bh(&vsi->mac_filter_list_lock);
2407
2408 /* schedule our worker thread which will take care of
2409 * applying the new filter changes
2410 */
2411 i40e_service_event_schedule(vsi->back);
2412 return 0;
2413 }
2414
2415 /**
2416 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2417 * @vsi: the vsi being configured
2418 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2419 *
2420 * Return: 0 on success or negative otherwise
2421 **/
2422 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2423 {
2424 struct net_device *netdev = vsi->netdev;
2425 struct i40e_mac_filter *f, *add_f;
2426 bool is_vf, is_netdev;
2427 int filter_count = 0;
2428
2429 is_vf = (vsi->type == I40E_VSI_SRIOV);
2430 is_netdev = !!(netdev);
2431
2432 /* Locked once because all functions invoked below iterates list */
2433 spin_lock_bh(&vsi->mac_filter_list_lock);
2434
2435 if (is_netdev)
2436 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2437
2438 list_for_each_entry(f, &vsi->mac_filter_list, list)
2439 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2440
2441 /* go through all the filters for this VSI and if there is only
2442 * vid == 0 it means there are no other filters, so vid 0 must
2443 * be replaced with -1. This signifies that we should from now
2444 * on accept any traffic (with any tag present, or untagged)
2445 */
2446 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2447 if (is_netdev) {
2448 if (f->vlan &&
2449 ether_addr_equal(netdev->dev_addr, f->macaddr))
2450 filter_count++;
2451 }
2452
2453 if (f->vlan)
2454 filter_count++;
2455 }
2456
2457 if (!filter_count && is_netdev) {
2458 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2459 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2460 is_vf, is_netdev);
2461 if (!f) {
2462 dev_info(&vsi->back->pdev->dev,
2463 "Could not add filter %d for %pM\n",
2464 I40E_VLAN_ANY, netdev->dev_addr);
2465 spin_unlock_bh(&vsi->mac_filter_list_lock);
2466 return -ENOMEM;
2467 }
2468 }
2469
2470 if (!filter_count) {
2471 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2472 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2473 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2474 is_vf, is_netdev);
2475 if (!add_f) {
2476 dev_info(&vsi->back->pdev->dev,
2477 "Could not add filter %d for %pM\n",
2478 I40E_VLAN_ANY, f->macaddr);
2479 spin_unlock_bh(&vsi->mac_filter_list_lock);
2480 return -ENOMEM;
2481 }
2482 }
2483 }
2484
2485 spin_unlock_bh(&vsi->mac_filter_list_lock);
2486
2487 /* schedule our worker thread which will take care of
2488 * applying the new filter changes
2489 */
2490 i40e_service_event_schedule(vsi->back);
2491 return 0;
2492 }
2493
2494 /**
2495 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2496 * @netdev: network interface to be adjusted
2497 * @vid: vlan id to be added
2498 *
2499 * net_device_ops implementation for adding vlan ids
2500 **/
2501 #ifdef I40E_FCOE
2502 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2503 __always_unused __be16 proto, u16 vid)
2504 #else
2505 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2506 __always_unused __be16 proto, u16 vid)
2507 #endif
2508 {
2509 struct i40e_netdev_priv *np = netdev_priv(netdev);
2510 struct i40e_vsi *vsi = np->vsi;
2511 int ret = 0;
2512
2513 if (vid > 4095)
2514 return -EINVAL;
2515
2516 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2517
2518 /* If the network stack called us with vid = 0 then
2519 * it is asking to receive priority tagged packets with
2520 * vlan id 0. Our HW receives them by default when configured
2521 * to receive untagged packets so there is no need to add an
2522 * extra filter for vlan 0 tagged packets.
2523 */
2524 if (vid)
2525 ret = i40e_vsi_add_vlan(vsi, vid);
2526
2527 if (!ret && (vid < VLAN_N_VID))
2528 set_bit(vid, vsi->active_vlans);
2529
2530 return ret;
2531 }
2532
2533 /**
2534 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2535 * @netdev: network interface to be adjusted
2536 * @vid: vlan id to be removed
2537 *
2538 * net_device_ops implementation for removing vlan ids
2539 **/
2540 #ifdef I40E_FCOE
2541 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2542 __always_unused __be16 proto, u16 vid)
2543 #else
2544 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2545 __always_unused __be16 proto, u16 vid)
2546 #endif
2547 {
2548 struct i40e_netdev_priv *np = netdev_priv(netdev);
2549 struct i40e_vsi *vsi = np->vsi;
2550
2551 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2552
2553 /* return code is ignored as there is nothing a user
2554 * can do about failure to remove and a log message was
2555 * already printed from the other function
2556 */
2557 i40e_vsi_kill_vlan(vsi, vid);
2558
2559 clear_bit(vid, vsi->active_vlans);
2560
2561 return 0;
2562 }
2563
2564 /**
2565 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2566 * @vsi: the vsi being brought back up
2567 **/
2568 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2569 {
2570 u16 vid;
2571
2572 if (!vsi->netdev)
2573 return;
2574
2575 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2576
2577 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2578 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2579 vid);
2580 }
2581
2582 /**
2583 * i40e_vsi_add_pvid - Add pvid for the VSI
2584 * @vsi: the vsi being adjusted
2585 * @vid: the vlan id to set as a PVID
2586 **/
2587 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2588 {
2589 struct i40e_vsi_context ctxt;
2590 i40e_status ret;
2591
2592 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2593 vsi->info.pvid = cpu_to_le16(vid);
2594 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2595 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2596 I40E_AQ_VSI_PVLAN_EMOD_STR;
2597
2598 ctxt.seid = vsi->seid;
2599 ctxt.info = vsi->info;
2600 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2601 if (ret) {
2602 dev_info(&vsi->back->pdev->dev,
2603 "add pvid failed, err %s aq_err %s\n",
2604 i40e_stat_str(&vsi->back->hw, ret),
2605 i40e_aq_str(&vsi->back->hw,
2606 vsi->back->hw.aq.asq_last_status));
2607 return -ENOENT;
2608 }
2609
2610 return 0;
2611 }
2612
2613 /**
2614 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2615 * @vsi: the vsi being adjusted
2616 *
2617 * Just use the vlan_rx_register() service to put it back to normal
2618 **/
2619 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2620 {
2621 i40e_vlan_stripping_disable(vsi);
2622
2623 vsi->info.pvid = 0;
2624 }
2625
2626 /**
2627 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2628 * @vsi: ptr to the VSI
2629 *
2630 * If this function returns with an error, then it's possible one or
2631 * more of the rings is populated (while the rest are not). It is the
2632 * callers duty to clean those orphaned rings.
2633 *
2634 * Return 0 on success, negative on failure
2635 **/
2636 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2637 {
2638 int i, err = 0;
2639
2640 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2641 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2642
2643 return err;
2644 }
2645
2646 /**
2647 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2648 * @vsi: ptr to the VSI
2649 *
2650 * Free VSI's transmit software resources
2651 **/
2652 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2653 {
2654 int i;
2655
2656 if (!vsi->tx_rings)
2657 return;
2658
2659 for (i = 0; i < vsi->num_queue_pairs; i++)
2660 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2661 i40e_free_tx_resources(vsi->tx_rings[i]);
2662 }
2663
2664 /**
2665 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2666 * @vsi: ptr to the VSI
2667 *
2668 * If this function returns with an error, then it's possible one or
2669 * more of the rings is populated (while the rest are not). It is the
2670 * callers duty to clean those orphaned rings.
2671 *
2672 * Return 0 on success, negative on failure
2673 **/
2674 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2675 {
2676 int i, err = 0;
2677
2678 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2679 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2680 #ifdef I40E_FCOE
2681 i40e_fcoe_setup_ddp_resources(vsi);
2682 #endif
2683 return err;
2684 }
2685
2686 /**
2687 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2688 * @vsi: ptr to the VSI
2689 *
2690 * Free all receive software resources
2691 **/
2692 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2693 {
2694 int i;
2695
2696 if (!vsi->rx_rings)
2697 return;
2698
2699 for (i = 0; i < vsi->num_queue_pairs; i++)
2700 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2701 i40e_free_rx_resources(vsi->rx_rings[i]);
2702 #ifdef I40E_FCOE
2703 i40e_fcoe_free_ddp_resources(vsi);
2704 #endif
2705 }
2706
2707 /**
2708 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2709 * @ring: The Tx ring to configure
2710 *
2711 * This enables/disables XPS for a given Tx descriptor ring
2712 * based on the TCs enabled for the VSI that ring belongs to.
2713 **/
2714 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2715 {
2716 struct i40e_vsi *vsi = ring->vsi;
2717 cpumask_var_t mask;
2718
2719 if (!ring->q_vector || !ring->netdev)
2720 return;
2721
2722 /* Single TC mode enable XPS */
2723 if (vsi->tc_config.numtc <= 1) {
2724 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2725 netif_set_xps_queue(ring->netdev,
2726 &ring->q_vector->affinity_mask,
2727 ring->queue_index);
2728 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2729 /* Disable XPS to allow selection based on TC */
2730 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2731 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2732 free_cpumask_var(mask);
2733 }
2734
2735 /* schedule our worker thread which will take care of
2736 * applying the new filter changes
2737 */
2738 i40e_service_event_schedule(vsi->back);
2739 }
2740
2741 /**
2742 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2743 * @ring: The Tx ring to configure
2744 *
2745 * Configure the Tx descriptor ring in the HMC context.
2746 **/
2747 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2748 {
2749 struct i40e_vsi *vsi = ring->vsi;
2750 u16 pf_q = vsi->base_queue + ring->queue_index;
2751 struct i40e_hw *hw = &vsi->back->hw;
2752 struct i40e_hmc_obj_txq tx_ctx;
2753 i40e_status err = 0;
2754 u32 qtx_ctl = 0;
2755
2756 /* some ATR related tx ring init */
2757 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2758 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2759 ring->atr_count = 0;
2760 } else {
2761 ring->atr_sample_rate = 0;
2762 }
2763
2764 /* configure XPS */
2765 i40e_config_xps_tx_ring(ring);
2766
2767 /* clear the context structure first */
2768 memset(&tx_ctx, 0, sizeof(tx_ctx));
2769
2770 tx_ctx.new_context = 1;
2771 tx_ctx.base = (ring->dma / 128);
2772 tx_ctx.qlen = ring->count;
2773 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2774 I40E_FLAG_FD_ATR_ENABLED));
2775 #ifdef I40E_FCOE
2776 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2777 #endif
2778 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2779 /* FDIR VSI tx ring can still use RS bit and writebacks */
2780 if (vsi->type != I40E_VSI_FDIR)
2781 tx_ctx.head_wb_ena = 1;
2782 tx_ctx.head_wb_addr = ring->dma +
2783 (ring->count * sizeof(struct i40e_tx_desc));
2784
2785 /* As part of VSI creation/update, FW allocates certain
2786 * Tx arbitration queue sets for each TC enabled for
2787 * the VSI. The FW returns the handles to these queue
2788 * sets as part of the response buffer to Add VSI,
2789 * Update VSI, etc. AQ commands. It is expected that
2790 * these queue set handles be associated with the Tx
2791 * queues by the driver as part of the TX queue context
2792 * initialization. This has to be done regardless of
2793 * DCB as by default everything is mapped to TC0.
2794 */
2795 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2796 tx_ctx.rdylist_act = 0;
2797
2798 /* clear the context in the HMC */
2799 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2800 if (err) {
2801 dev_info(&vsi->back->pdev->dev,
2802 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2803 ring->queue_index, pf_q, err);
2804 return -ENOMEM;
2805 }
2806
2807 /* set the context in the HMC */
2808 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2809 if (err) {
2810 dev_info(&vsi->back->pdev->dev,
2811 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2812 ring->queue_index, pf_q, err);
2813 return -ENOMEM;
2814 }
2815
2816 /* Now associate this queue with this PCI function */
2817 if (vsi->type == I40E_VSI_VMDQ2) {
2818 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2819 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2820 I40E_QTX_CTL_VFVM_INDX_MASK;
2821 } else {
2822 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2823 }
2824
2825 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2826 I40E_QTX_CTL_PF_INDX_MASK);
2827 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2828 i40e_flush(hw);
2829
2830 /* cache tail off for easier writes later */
2831 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2832
2833 return 0;
2834 }
2835
2836 /**
2837 * i40e_configure_rx_ring - Configure a receive ring context
2838 * @ring: The Rx ring to configure
2839 *
2840 * Configure the Rx descriptor ring in the HMC context.
2841 **/
2842 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2843 {
2844 struct i40e_vsi *vsi = ring->vsi;
2845 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2846 u16 pf_q = vsi->base_queue + ring->queue_index;
2847 struct i40e_hw *hw = &vsi->back->hw;
2848 struct i40e_hmc_obj_rxq rx_ctx;
2849 i40e_status err = 0;
2850
2851 ring->state = 0;
2852
2853 /* clear the context structure first */
2854 memset(&rx_ctx, 0, sizeof(rx_ctx));
2855
2856 ring->rx_buf_len = vsi->rx_buf_len;
2857
2858 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2859
2860 rx_ctx.base = (ring->dma / 128);
2861 rx_ctx.qlen = ring->count;
2862
2863 /* use 32 byte descriptors */
2864 rx_ctx.dsize = 1;
2865
2866 /* descriptor type is always zero
2867 * rx_ctx.dtype = 0;
2868 */
2869 rx_ctx.hsplit_0 = 0;
2870
2871 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2872 if (hw->revision_id == 0)
2873 rx_ctx.lrxqthresh = 0;
2874 else
2875 rx_ctx.lrxqthresh = 2;
2876 rx_ctx.crcstrip = 1;
2877 rx_ctx.l2tsel = 1;
2878 /* this controls whether VLAN is stripped from inner headers */
2879 rx_ctx.showiv = 0;
2880 #ifdef I40E_FCOE
2881 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2882 #endif
2883 /* set the prefena field to 1 because the manual says to */
2884 rx_ctx.prefena = 1;
2885
2886 /* clear the context in the HMC */
2887 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2888 if (err) {
2889 dev_info(&vsi->back->pdev->dev,
2890 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2891 ring->queue_index, pf_q, err);
2892 return -ENOMEM;
2893 }
2894
2895 /* set the context in the HMC */
2896 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2897 if (err) {
2898 dev_info(&vsi->back->pdev->dev,
2899 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2900 ring->queue_index, pf_q, err);
2901 return -ENOMEM;
2902 }
2903
2904 /* cache tail for quicker writes, and clear the reg before use */
2905 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2906 writel(0, ring->tail);
2907
2908 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2909
2910 return 0;
2911 }
2912
2913 /**
2914 * i40e_vsi_configure_tx - Configure the VSI for Tx
2915 * @vsi: VSI structure describing this set of rings and resources
2916 *
2917 * Configure the Tx VSI for operation.
2918 **/
2919 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2920 {
2921 int err = 0;
2922 u16 i;
2923
2924 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2925 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2926
2927 return err;
2928 }
2929
2930 /**
2931 * i40e_vsi_configure_rx - Configure the VSI for Rx
2932 * @vsi: the VSI being configured
2933 *
2934 * Configure the Rx VSI for operation.
2935 **/
2936 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2937 {
2938 int err = 0;
2939 u16 i;
2940
2941 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2942 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2943 + ETH_FCS_LEN + VLAN_HLEN;
2944 else
2945 vsi->max_frame = I40E_RXBUFFER_2048;
2946
2947 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2948
2949 #ifdef I40E_FCOE
2950 /* setup rx buffer for FCoE */
2951 if ((vsi->type == I40E_VSI_FCOE) &&
2952 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2953 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2954 vsi->max_frame = I40E_RXBUFFER_3072;
2955 }
2956
2957 #endif /* I40E_FCOE */
2958 /* round up for the chip's needs */
2959 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2960 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2961
2962 /* set up individual rings */
2963 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2964 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2965
2966 return err;
2967 }
2968
2969 /**
2970 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2971 * @vsi: ptr to the VSI
2972 **/
2973 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2974 {
2975 struct i40e_ring *tx_ring, *rx_ring;
2976 u16 qoffset, qcount;
2977 int i, n;
2978
2979 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2980 /* Reset the TC information */
2981 for (i = 0; i < vsi->num_queue_pairs; i++) {
2982 rx_ring = vsi->rx_rings[i];
2983 tx_ring = vsi->tx_rings[i];
2984 rx_ring->dcb_tc = 0;
2985 tx_ring->dcb_tc = 0;
2986 }
2987 }
2988
2989 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2990 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
2991 continue;
2992
2993 qoffset = vsi->tc_config.tc_info[n].qoffset;
2994 qcount = vsi->tc_config.tc_info[n].qcount;
2995 for (i = qoffset; i < (qoffset + qcount); i++) {
2996 rx_ring = vsi->rx_rings[i];
2997 tx_ring = vsi->tx_rings[i];
2998 rx_ring->dcb_tc = n;
2999 tx_ring->dcb_tc = n;
3000 }
3001 }
3002 }
3003
3004 /**
3005 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3006 * @vsi: ptr to the VSI
3007 **/
3008 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3009 {
3010 if (vsi->netdev)
3011 i40e_set_rx_mode(vsi->netdev);
3012 }
3013
3014 /**
3015 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3016 * @vsi: Pointer to the targeted VSI
3017 *
3018 * This function replays the hlist on the hw where all the SB Flow Director
3019 * filters were saved.
3020 **/
3021 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3022 {
3023 struct i40e_fdir_filter *filter;
3024 struct i40e_pf *pf = vsi->back;
3025 struct hlist_node *node;
3026
3027 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3028 return;
3029
3030 hlist_for_each_entry_safe(filter, node,
3031 &pf->fdir_filter_list, fdir_node) {
3032 i40e_add_del_fdir(vsi, filter, true);
3033 }
3034 }
3035
3036 /**
3037 * i40e_vsi_configure - Set up the VSI for action
3038 * @vsi: the VSI being configured
3039 **/
3040 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3041 {
3042 int err;
3043
3044 i40e_set_vsi_rx_mode(vsi);
3045 i40e_restore_vlan(vsi);
3046 i40e_vsi_config_dcb_rings(vsi);
3047 err = i40e_vsi_configure_tx(vsi);
3048 if (!err)
3049 err = i40e_vsi_configure_rx(vsi);
3050
3051 return err;
3052 }
3053
3054 /**
3055 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3056 * @vsi: the VSI being configured
3057 **/
3058 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3059 {
3060 struct i40e_pf *pf = vsi->back;
3061 struct i40e_hw *hw = &pf->hw;
3062 u16 vector;
3063 int i, q;
3064 u32 qp;
3065
3066 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3067 * and PFINT_LNKLSTn registers, e.g.:
3068 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3069 */
3070 qp = vsi->base_queue;
3071 vector = vsi->base_vector;
3072 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3073 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3074
3075 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3076 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3077 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3078 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3079 q_vector->rx.itr);
3080 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3081 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3082 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3083 q_vector->tx.itr);
3084 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3085 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3086
3087 /* Linked list for the queuepairs assigned to this vector */
3088 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3089 for (q = 0; q < q_vector->num_ringpairs; q++) {
3090 u32 val;
3091
3092 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3093 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3094 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3095 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3096 (I40E_QUEUE_TYPE_TX
3097 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3098
3099 wr32(hw, I40E_QINT_RQCTL(qp), val);
3100
3101 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3102 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3103 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3104 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3105 (I40E_QUEUE_TYPE_RX
3106 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3107
3108 /* Terminate the linked list */
3109 if (q == (q_vector->num_ringpairs - 1))
3110 val |= (I40E_QUEUE_END_OF_LIST
3111 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3112
3113 wr32(hw, I40E_QINT_TQCTL(qp), val);
3114 qp++;
3115 }
3116 }
3117
3118 i40e_flush(hw);
3119 }
3120
3121 /**
3122 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3123 * @hw: ptr to the hardware info
3124 **/
3125 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3126 {
3127 struct i40e_hw *hw = &pf->hw;
3128 u32 val;
3129
3130 /* clear things first */
3131 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3132 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3133
3134 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3135 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3136 I40E_PFINT_ICR0_ENA_GRST_MASK |
3137 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3138 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3139 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3140 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3141 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3142
3143 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3144 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3145
3146 if (pf->flags & I40E_FLAG_PTP)
3147 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3148
3149 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3150
3151 /* SW_ITR_IDX = 0, but don't change INTENA */
3152 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3153 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3154
3155 /* OTHER_ITR_IDX = 0 */
3156 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3157 }
3158
3159 /**
3160 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3161 * @vsi: the VSI being configured
3162 **/
3163 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3164 {
3165 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3166 struct i40e_pf *pf = vsi->back;
3167 struct i40e_hw *hw = &pf->hw;
3168 u32 val;
3169
3170 /* set the ITR configuration */
3171 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3172 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3173 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3174 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3175 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3176 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3177 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3178
3179 i40e_enable_misc_int_causes(pf);
3180
3181 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3182 wr32(hw, I40E_PFINT_LNKLST0, 0);
3183
3184 /* Associate the queue pair to the vector and enable the queue int */
3185 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3186 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3187 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3188
3189 wr32(hw, I40E_QINT_RQCTL(0), val);
3190
3191 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3192 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3193 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3194
3195 wr32(hw, I40E_QINT_TQCTL(0), val);
3196 i40e_flush(hw);
3197 }
3198
3199 /**
3200 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3201 * @pf: board private structure
3202 **/
3203 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3204 {
3205 struct i40e_hw *hw = &pf->hw;
3206
3207 wr32(hw, I40E_PFINT_DYN_CTL0,
3208 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3209 i40e_flush(hw);
3210 }
3211
3212 /**
3213 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3214 * @pf: board private structure
3215 * @clearpba: true when all pending interrupt events should be cleared
3216 **/
3217 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3218 {
3219 struct i40e_hw *hw = &pf->hw;
3220 u32 val;
3221
3222 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3223 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3224 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3225
3226 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3227 i40e_flush(hw);
3228 }
3229
3230 /**
3231 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3232 * @irq: interrupt number
3233 * @data: pointer to a q_vector
3234 **/
3235 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3236 {
3237 struct i40e_q_vector *q_vector = data;
3238
3239 if (!q_vector->tx.ring && !q_vector->rx.ring)
3240 return IRQ_HANDLED;
3241
3242 napi_schedule_irqoff(&q_vector->napi);
3243
3244 return IRQ_HANDLED;
3245 }
3246
3247 /**
3248 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3249 * @vsi: the VSI being configured
3250 * @basename: name for the vector
3251 *
3252 * Allocates MSI-X vectors and requests interrupts from the kernel.
3253 **/
3254 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3255 {
3256 int q_vectors = vsi->num_q_vectors;
3257 struct i40e_pf *pf = vsi->back;
3258 int base = vsi->base_vector;
3259 int rx_int_idx = 0;
3260 int tx_int_idx = 0;
3261 int vector, err;
3262
3263 for (vector = 0; vector < q_vectors; vector++) {
3264 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3265
3266 if (q_vector->tx.ring && q_vector->rx.ring) {
3267 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3268 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3269 tx_int_idx++;
3270 } else if (q_vector->rx.ring) {
3271 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3272 "%s-%s-%d", basename, "rx", rx_int_idx++);
3273 } else if (q_vector->tx.ring) {
3274 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3275 "%s-%s-%d", basename, "tx", tx_int_idx++);
3276 } else {
3277 /* skip this unused q_vector */
3278 continue;
3279 }
3280 err = request_irq(pf->msix_entries[base + vector].vector,
3281 vsi->irq_handler,
3282 0,
3283 q_vector->name,
3284 q_vector);
3285 if (err) {
3286 dev_info(&pf->pdev->dev,
3287 "MSIX request_irq failed, error: %d\n", err);
3288 goto free_queue_irqs;
3289 }
3290 /* assign the mask for this irq */
3291 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3292 &q_vector->affinity_mask);
3293 }
3294
3295 vsi->irqs_ready = true;
3296 return 0;
3297
3298 free_queue_irqs:
3299 while (vector) {
3300 vector--;
3301 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3302 NULL);
3303 free_irq(pf->msix_entries[base + vector].vector,
3304 &(vsi->q_vectors[vector]));
3305 }
3306 return err;
3307 }
3308
3309 /**
3310 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3311 * @vsi: the VSI being un-configured
3312 **/
3313 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3314 {
3315 struct i40e_pf *pf = vsi->back;
3316 struct i40e_hw *hw = &pf->hw;
3317 int base = vsi->base_vector;
3318 int i;
3319
3320 for (i = 0; i < vsi->num_queue_pairs; i++) {
3321 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3322 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3323 }
3324
3325 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3326 for (i = vsi->base_vector;
3327 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3328 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3329
3330 i40e_flush(hw);
3331 for (i = 0; i < vsi->num_q_vectors; i++)
3332 synchronize_irq(pf->msix_entries[i + base].vector);
3333 } else {
3334 /* Legacy and MSI mode - this stops all interrupt handling */
3335 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3336 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3337 i40e_flush(hw);
3338 synchronize_irq(pf->pdev->irq);
3339 }
3340 }
3341
3342 /**
3343 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3344 * @vsi: the VSI being configured
3345 **/
3346 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3347 {
3348 struct i40e_pf *pf = vsi->back;
3349 int i;
3350
3351 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3352 for (i = 0; i < vsi->num_q_vectors; i++)
3353 i40e_irq_dynamic_enable(vsi, i);
3354 } else {
3355 i40e_irq_dynamic_enable_icr0(pf, true);
3356 }
3357
3358 i40e_flush(&pf->hw);
3359 return 0;
3360 }
3361
3362 /**
3363 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3364 * @pf: board private structure
3365 **/
3366 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3367 {
3368 /* Disable ICR 0 */
3369 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3370 i40e_flush(&pf->hw);
3371 }
3372
3373 /**
3374 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3375 * @irq: interrupt number
3376 * @data: pointer to a q_vector
3377 *
3378 * This is the handler used for all MSI/Legacy interrupts, and deals
3379 * with both queue and non-queue interrupts. This is also used in
3380 * MSIX mode to handle the non-queue interrupts.
3381 **/
3382 static irqreturn_t i40e_intr(int irq, void *data)
3383 {
3384 struct i40e_pf *pf = (struct i40e_pf *)data;
3385 struct i40e_hw *hw = &pf->hw;
3386 irqreturn_t ret = IRQ_NONE;
3387 u32 icr0, icr0_remaining;
3388 u32 val, ena_mask;
3389
3390 icr0 = rd32(hw, I40E_PFINT_ICR0);
3391 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3392
3393 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3394 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3395 goto enable_intr;
3396
3397 /* if interrupt but no bits showing, must be SWINT */
3398 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3399 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3400 pf->sw_int_count++;
3401
3402 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3403 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3404 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3405 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3406 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3407 }
3408
3409 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3410 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3411 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3412 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3413
3414 /* We do not have a way to disarm Queue causes while leaving
3415 * interrupt enabled for all other causes, ideally
3416 * interrupt should be disabled while we are in NAPI but
3417 * this is not a performance path and napi_schedule()
3418 * can deal with rescheduling.
3419 */
3420 if (!test_bit(__I40E_DOWN, &pf->state))
3421 napi_schedule_irqoff(&q_vector->napi);
3422 }
3423
3424 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3425 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3426 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3427 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3428 }
3429
3430 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3431 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3432 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3433 }
3434
3435 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3436 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3437 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3438 }
3439
3440 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3441 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3442 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3443 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3444 val = rd32(hw, I40E_GLGEN_RSTAT);
3445 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3446 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3447 if (val == I40E_RESET_CORER) {
3448 pf->corer_count++;
3449 } else if (val == I40E_RESET_GLOBR) {
3450 pf->globr_count++;
3451 } else if (val == I40E_RESET_EMPR) {
3452 pf->empr_count++;
3453 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3454 }
3455 }
3456
3457 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3458 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3459 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3460 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3461 rd32(hw, I40E_PFHMC_ERRORINFO),
3462 rd32(hw, I40E_PFHMC_ERRORDATA));
3463 }
3464
3465 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3466 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3467
3468 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3469 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3470 i40e_ptp_tx_hwtstamp(pf);
3471 }
3472 }
3473
3474 /* If a critical error is pending we have no choice but to reset the
3475 * device.
3476 * Report and mask out any remaining unexpected interrupts.
3477 */
3478 icr0_remaining = icr0 & ena_mask;
3479 if (icr0_remaining) {
3480 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3481 icr0_remaining);
3482 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3483 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3484 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3485 dev_info(&pf->pdev->dev, "device will be reset\n");
3486 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3487 i40e_service_event_schedule(pf);
3488 }
3489 ena_mask &= ~icr0_remaining;
3490 }
3491 ret = IRQ_HANDLED;
3492
3493 enable_intr:
3494 /* re-enable interrupt causes */
3495 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3496 if (!test_bit(__I40E_DOWN, &pf->state)) {
3497 i40e_service_event_schedule(pf);
3498 i40e_irq_dynamic_enable_icr0(pf, false);
3499 }
3500
3501 return ret;
3502 }
3503
3504 /**
3505 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3506 * @tx_ring: tx ring to clean
3507 * @budget: how many cleans we're allowed
3508 *
3509 * Returns true if there's any budget left (e.g. the clean is finished)
3510 **/
3511 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3512 {
3513 struct i40e_vsi *vsi = tx_ring->vsi;
3514 u16 i = tx_ring->next_to_clean;
3515 struct i40e_tx_buffer *tx_buf;
3516 struct i40e_tx_desc *tx_desc;
3517
3518 tx_buf = &tx_ring->tx_bi[i];
3519 tx_desc = I40E_TX_DESC(tx_ring, i);
3520 i -= tx_ring->count;
3521
3522 do {
3523 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3524
3525 /* if next_to_watch is not set then there is no work pending */
3526 if (!eop_desc)
3527 break;
3528
3529 /* prevent any other reads prior to eop_desc */
3530 read_barrier_depends();
3531
3532 /* if the descriptor isn't done, no work yet to do */
3533 if (!(eop_desc->cmd_type_offset_bsz &
3534 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3535 break;
3536
3537 /* clear next_to_watch to prevent false hangs */
3538 tx_buf->next_to_watch = NULL;
3539
3540 tx_desc->buffer_addr = 0;
3541 tx_desc->cmd_type_offset_bsz = 0;
3542 /* move past filter desc */
3543 tx_buf++;
3544 tx_desc++;
3545 i++;
3546 if (unlikely(!i)) {
3547 i -= tx_ring->count;
3548 tx_buf = tx_ring->tx_bi;
3549 tx_desc = I40E_TX_DESC(tx_ring, 0);
3550 }
3551 /* unmap skb header data */
3552 dma_unmap_single(tx_ring->dev,
3553 dma_unmap_addr(tx_buf, dma),
3554 dma_unmap_len(tx_buf, len),
3555 DMA_TO_DEVICE);
3556 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3557 kfree(tx_buf->raw_buf);
3558
3559 tx_buf->raw_buf = NULL;
3560 tx_buf->tx_flags = 0;
3561 tx_buf->next_to_watch = NULL;
3562 dma_unmap_len_set(tx_buf, len, 0);
3563 tx_desc->buffer_addr = 0;
3564 tx_desc->cmd_type_offset_bsz = 0;
3565
3566 /* move us past the eop_desc for start of next FD desc */
3567 tx_buf++;
3568 tx_desc++;
3569 i++;
3570 if (unlikely(!i)) {
3571 i -= tx_ring->count;
3572 tx_buf = tx_ring->tx_bi;
3573 tx_desc = I40E_TX_DESC(tx_ring, 0);
3574 }
3575
3576 /* update budget accounting */
3577 budget--;
3578 } while (likely(budget));
3579
3580 i += tx_ring->count;
3581 tx_ring->next_to_clean = i;
3582
3583 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3584 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3585
3586 return budget > 0;
3587 }
3588
3589 /**
3590 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3591 * @irq: interrupt number
3592 * @data: pointer to a q_vector
3593 **/
3594 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3595 {
3596 struct i40e_q_vector *q_vector = data;
3597 struct i40e_vsi *vsi;
3598
3599 if (!q_vector->tx.ring)
3600 return IRQ_HANDLED;
3601
3602 vsi = q_vector->tx.ring->vsi;
3603 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3604
3605 return IRQ_HANDLED;
3606 }
3607
3608 /**
3609 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3610 * @vsi: the VSI being configured
3611 * @v_idx: vector index
3612 * @qp_idx: queue pair index
3613 **/
3614 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3615 {
3616 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3617 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3618 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3619
3620 tx_ring->q_vector = q_vector;
3621 tx_ring->next = q_vector->tx.ring;
3622 q_vector->tx.ring = tx_ring;
3623 q_vector->tx.count++;
3624
3625 rx_ring->q_vector = q_vector;
3626 rx_ring->next = q_vector->rx.ring;
3627 q_vector->rx.ring = rx_ring;
3628 q_vector->rx.count++;
3629 }
3630
3631 /**
3632 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3633 * @vsi: the VSI being configured
3634 *
3635 * This function maps descriptor rings to the queue-specific vectors
3636 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3637 * one vector per queue pair, but on a constrained vector budget, we
3638 * group the queue pairs as "efficiently" as possible.
3639 **/
3640 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3641 {
3642 int qp_remaining = vsi->num_queue_pairs;
3643 int q_vectors = vsi->num_q_vectors;
3644 int num_ringpairs;
3645 int v_start = 0;
3646 int qp_idx = 0;
3647
3648 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3649 * group them so there are multiple queues per vector.
3650 * It is also important to go through all the vectors available to be
3651 * sure that if we don't use all the vectors, that the remaining vectors
3652 * are cleared. This is especially important when decreasing the
3653 * number of queues in use.
3654 */
3655 for (; v_start < q_vectors; v_start++) {
3656 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3657
3658 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3659
3660 q_vector->num_ringpairs = num_ringpairs;
3661
3662 q_vector->rx.count = 0;
3663 q_vector->tx.count = 0;
3664 q_vector->rx.ring = NULL;
3665 q_vector->tx.ring = NULL;
3666
3667 while (num_ringpairs--) {
3668 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3669 qp_idx++;
3670 qp_remaining--;
3671 }
3672 }
3673 }
3674
3675 /**
3676 * i40e_vsi_request_irq - Request IRQ from the OS
3677 * @vsi: the VSI being configured
3678 * @basename: name for the vector
3679 **/
3680 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3681 {
3682 struct i40e_pf *pf = vsi->back;
3683 int err;
3684
3685 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3686 err = i40e_vsi_request_irq_msix(vsi, basename);
3687 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3688 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3689 pf->int_name, pf);
3690 else
3691 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3692 pf->int_name, pf);
3693
3694 if (err)
3695 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3696
3697 return err;
3698 }
3699
3700 #ifdef CONFIG_NET_POLL_CONTROLLER
3701 /**
3702 * i40e_netpoll - A Polling 'interrupt' handler
3703 * @netdev: network interface device structure
3704 *
3705 * This is used by netconsole to send skbs without having to re-enable
3706 * interrupts. It's not called while the normal interrupt routine is executing.
3707 **/
3708 #ifdef I40E_FCOE
3709 void i40e_netpoll(struct net_device *netdev)
3710 #else
3711 static void i40e_netpoll(struct net_device *netdev)
3712 #endif
3713 {
3714 struct i40e_netdev_priv *np = netdev_priv(netdev);
3715 struct i40e_vsi *vsi = np->vsi;
3716 struct i40e_pf *pf = vsi->back;
3717 int i;
3718
3719 /* if interface is down do nothing */
3720 if (test_bit(__I40E_DOWN, &vsi->state))
3721 return;
3722
3723 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3724 for (i = 0; i < vsi->num_q_vectors; i++)
3725 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3726 } else {
3727 i40e_intr(pf->pdev->irq, netdev);
3728 }
3729 }
3730 #endif
3731
3732 /**
3733 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3734 * @pf: the PF being configured
3735 * @pf_q: the PF queue
3736 * @enable: enable or disable state of the queue
3737 *
3738 * This routine will wait for the given Tx queue of the PF to reach the
3739 * enabled or disabled state.
3740 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3741 * multiple retries; else will return 0 in case of success.
3742 **/
3743 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3744 {
3745 int i;
3746 u32 tx_reg;
3747
3748 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3749 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3750 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3751 break;
3752
3753 usleep_range(10, 20);
3754 }
3755 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3756 return -ETIMEDOUT;
3757
3758 return 0;
3759 }
3760
3761 /**
3762 * i40e_vsi_control_tx - Start or stop a VSI's rings
3763 * @vsi: the VSI being configured
3764 * @enable: start or stop the rings
3765 **/
3766 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3767 {
3768 struct i40e_pf *pf = vsi->back;
3769 struct i40e_hw *hw = &pf->hw;
3770 int i, j, pf_q, ret = 0;
3771 u32 tx_reg;
3772
3773 pf_q = vsi->base_queue;
3774 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3775
3776 /* warn the TX unit of coming changes */
3777 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3778 if (!enable)
3779 usleep_range(10, 20);
3780
3781 for (j = 0; j < 50; j++) {
3782 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3783 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3784 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3785 break;
3786 usleep_range(1000, 2000);
3787 }
3788 /* Skip if the queue is already in the requested state */
3789 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3790 continue;
3791
3792 /* turn on/off the queue */
3793 if (enable) {
3794 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3795 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3796 } else {
3797 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3798 }
3799
3800 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3801 /* No waiting for the Tx queue to disable */
3802 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3803 continue;
3804
3805 /* wait for the change to finish */
3806 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3807 if (ret) {
3808 dev_info(&pf->pdev->dev,
3809 "VSI seid %d Tx ring %d %sable timeout\n",
3810 vsi->seid, pf_q, (enable ? "en" : "dis"));
3811 break;
3812 }
3813 }
3814
3815 if (hw->revision_id == 0)
3816 mdelay(50);
3817 return ret;
3818 }
3819
3820 /**
3821 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3822 * @pf: the PF being configured
3823 * @pf_q: the PF queue
3824 * @enable: enable or disable state of the queue
3825 *
3826 * This routine will wait for the given Rx queue of the PF to reach the
3827 * enabled or disabled state.
3828 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3829 * multiple retries; else will return 0 in case of success.
3830 **/
3831 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3832 {
3833 int i;
3834 u32 rx_reg;
3835
3836 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3837 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3838 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3839 break;
3840
3841 usleep_range(10, 20);
3842 }
3843 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3844 return -ETIMEDOUT;
3845
3846 return 0;
3847 }
3848
3849 /**
3850 * i40e_vsi_control_rx - Start or stop a VSI's rings
3851 * @vsi: the VSI being configured
3852 * @enable: start or stop the rings
3853 **/
3854 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3855 {
3856 struct i40e_pf *pf = vsi->back;
3857 struct i40e_hw *hw = &pf->hw;
3858 int i, j, pf_q, ret = 0;
3859 u32 rx_reg;
3860
3861 pf_q = vsi->base_queue;
3862 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3863 for (j = 0; j < 50; j++) {
3864 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3865 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3866 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3867 break;
3868 usleep_range(1000, 2000);
3869 }
3870
3871 /* Skip if the queue is already in the requested state */
3872 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3873 continue;
3874
3875 /* turn on/off the queue */
3876 if (enable)
3877 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3878 else
3879 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3880 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3881 /* No waiting for the Tx queue to disable */
3882 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3883 continue;
3884
3885 /* wait for the change to finish */
3886 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3887 if (ret) {
3888 dev_info(&pf->pdev->dev,
3889 "VSI seid %d Rx ring %d %sable timeout\n",
3890 vsi->seid, pf_q, (enable ? "en" : "dis"));
3891 break;
3892 }
3893 }
3894
3895 return ret;
3896 }
3897
3898 /**
3899 * i40e_vsi_control_rings - Start or stop a VSI's rings
3900 * @vsi: the VSI being configured
3901 * @enable: start or stop the rings
3902 **/
3903 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3904 {
3905 int ret = 0;
3906
3907 /* do rx first for enable and last for disable */
3908 if (request) {
3909 ret = i40e_vsi_control_rx(vsi, request);
3910 if (ret)
3911 return ret;
3912 ret = i40e_vsi_control_tx(vsi, request);
3913 } else {
3914 /* Ignore return value, we need to shutdown whatever we can */
3915 i40e_vsi_control_tx(vsi, request);
3916 i40e_vsi_control_rx(vsi, request);
3917 }
3918
3919 return ret;
3920 }
3921
3922 /**
3923 * i40e_vsi_free_irq - Free the irq association with the OS
3924 * @vsi: the VSI being configured
3925 **/
3926 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3927 {
3928 struct i40e_pf *pf = vsi->back;
3929 struct i40e_hw *hw = &pf->hw;
3930 int base = vsi->base_vector;
3931 u32 val, qp;
3932 int i;
3933
3934 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3935 if (!vsi->q_vectors)
3936 return;
3937
3938 if (!vsi->irqs_ready)
3939 return;
3940
3941 vsi->irqs_ready = false;
3942 for (i = 0; i < vsi->num_q_vectors; i++) {
3943 u16 vector = i + base;
3944
3945 /* free only the irqs that were actually requested */
3946 if (!vsi->q_vectors[i] ||
3947 !vsi->q_vectors[i]->num_ringpairs)
3948 continue;
3949
3950 /* clear the affinity_mask in the IRQ descriptor */
3951 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3952 NULL);
3953 free_irq(pf->msix_entries[vector].vector,
3954 vsi->q_vectors[i]);
3955
3956 /* Tear down the interrupt queue link list
3957 *
3958 * We know that they come in pairs and always
3959 * the Rx first, then the Tx. To clear the
3960 * link list, stick the EOL value into the
3961 * next_q field of the registers.
3962 */
3963 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3964 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3965 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3966 val |= I40E_QUEUE_END_OF_LIST
3967 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3968 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3969
3970 while (qp != I40E_QUEUE_END_OF_LIST) {
3971 u32 next;
3972
3973 val = rd32(hw, I40E_QINT_RQCTL(qp));
3974
3975 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3976 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3977 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3978 I40E_QINT_RQCTL_INTEVENT_MASK);
3979
3980 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3981 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3982
3983 wr32(hw, I40E_QINT_RQCTL(qp), val);
3984
3985 val = rd32(hw, I40E_QINT_TQCTL(qp));
3986
3987 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3988 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3989
3990 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3991 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3992 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3993 I40E_QINT_TQCTL_INTEVENT_MASK);
3994
3995 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3996 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3997
3998 wr32(hw, I40E_QINT_TQCTL(qp), val);
3999 qp = next;
4000 }
4001 }
4002 } else {
4003 free_irq(pf->pdev->irq, pf);
4004
4005 val = rd32(hw, I40E_PFINT_LNKLST0);
4006 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4007 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4008 val |= I40E_QUEUE_END_OF_LIST
4009 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4010 wr32(hw, I40E_PFINT_LNKLST0, val);
4011
4012 val = rd32(hw, I40E_QINT_RQCTL(qp));
4013 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4014 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4015 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4016 I40E_QINT_RQCTL_INTEVENT_MASK);
4017
4018 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4019 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4020
4021 wr32(hw, I40E_QINT_RQCTL(qp), val);
4022
4023 val = rd32(hw, I40E_QINT_TQCTL(qp));
4024
4025 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4026 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4027 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4028 I40E_QINT_TQCTL_INTEVENT_MASK);
4029
4030 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4031 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4032
4033 wr32(hw, I40E_QINT_TQCTL(qp), val);
4034 }
4035 }
4036
4037 /**
4038 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4039 * @vsi: the VSI being configured
4040 * @v_idx: Index of vector to be freed
4041 *
4042 * This function frees the memory allocated to the q_vector. In addition if
4043 * NAPI is enabled it will delete any references to the NAPI struct prior
4044 * to freeing the q_vector.
4045 **/
4046 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4047 {
4048 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4049 struct i40e_ring *ring;
4050
4051 if (!q_vector)
4052 return;
4053
4054 /* disassociate q_vector from rings */
4055 i40e_for_each_ring(ring, q_vector->tx)
4056 ring->q_vector = NULL;
4057
4058 i40e_for_each_ring(ring, q_vector->rx)
4059 ring->q_vector = NULL;
4060
4061 /* only VSI w/ an associated netdev is set up w/ NAPI */
4062 if (vsi->netdev)
4063 netif_napi_del(&q_vector->napi);
4064
4065 vsi->q_vectors[v_idx] = NULL;
4066
4067 kfree_rcu(q_vector, rcu);
4068 }
4069
4070 /**
4071 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4072 * @vsi: the VSI being un-configured
4073 *
4074 * This frees the memory allocated to the q_vectors and
4075 * deletes references to the NAPI struct.
4076 **/
4077 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4078 {
4079 int v_idx;
4080
4081 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4082 i40e_free_q_vector(vsi, v_idx);
4083 }
4084
4085 /**
4086 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4087 * @pf: board private structure
4088 **/
4089 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4090 {
4091 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4092 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4093 pci_disable_msix(pf->pdev);
4094 kfree(pf->msix_entries);
4095 pf->msix_entries = NULL;
4096 kfree(pf->irq_pile);
4097 pf->irq_pile = NULL;
4098 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4099 pci_disable_msi(pf->pdev);
4100 }
4101 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4102 }
4103
4104 /**
4105 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4106 * @pf: board private structure
4107 *
4108 * We go through and clear interrupt specific resources and reset the structure
4109 * to pre-load conditions
4110 **/
4111 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4112 {
4113 int i;
4114
4115 i40e_stop_misc_vector(pf);
4116 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4117 synchronize_irq(pf->msix_entries[0].vector);
4118 free_irq(pf->msix_entries[0].vector, pf);
4119 }
4120
4121 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4122 I40E_IWARP_IRQ_PILE_ID);
4123
4124 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4125 for (i = 0; i < pf->num_alloc_vsi; i++)
4126 if (pf->vsi[i])
4127 i40e_vsi_free_q_vectors(pf->vsi[i]);
4128 i40e_reset_interrupt_capability(pf);
4129 }
4130
4131 /**
4132 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4133 * @vsi: the VSI being configured
4134 **/
4135 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4136 {
4137 int q_idx;
4138
4139 if (!vsi->netdev)
4140 return;
4141
4142 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4143 napi_enable(&vsi->q_vectors[q_idx]->napi);
4144 }
4145
4146 /**
4147 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4148 * @vsi: the VSI being configured
4149 **/
4150 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4151 {
4152 int q_idx;
4153
4154 if (!vsi->netdev)
4155 return;
4156
4157 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4158 napi_disable(&vsi->q_vectors[q_idx]->napi);
4159 }
4160
4161 /**
4162 * i40e_vsi_close - Shut down a VSI
4163 * @vsi: the vsi to be quelled
4164 **/
4165 static void i40e_vsi_close(struct i40e_vsi *vsi)
4166 {
4167 bool reset = false;
4168
4169 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4170 i40e_down(vsi);
4171 i40e_vsi_free_irq(vsi);
4172 i40e_vsi_free_tx_resources(vsi);
4173 i40e_vsi_free_rx_resources(vsi);
4174 vsi->current_netdev_flags = 0;
4175 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4176 reset = true;
4177 i40e_notify_client_of_netdev_close(vsi, reset);
4178 }
4179
4180 /**
4181 * i40e_quiesce_vsi - Pause a given VSI
4182 * @vsi: the VSI being paused
4183 **/
4184 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4185 {
4186 if (test_bit(__I40E_DOWN, &vsi->state))
4187 return;
4188
4189 /* No need to disable FCoE VSI when Tx suspended */
4190 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4191 vsi->type == I40E_VSI_FCOE) {
4192 dev_dbg(&vsi->back->pdev->dev,
4193 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4194 return;
4195 }
4196
4197 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4198 if (vsi->netdev && netif_running(vsi->netdev))
4199 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4200 else
4201 i40e_vsi_close(vsi);
4202 }
4203
4204 /**
4205 * i40e_unquiesce_vsi - Resume a given VSI
4206 * @vsi: the VSI being resumed
4207 **/
4208 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4209 {
4210 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4211 return;
4212
4213 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4214 if (vsi->netdev && netif_running(vsi->netdev))
4215 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4216 else
4217 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4218 }
4219
4220 /**
4221 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4222 * @pf: the PF
4223 **/
4224 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4225 {
4226 int v;
4227
4228 for (v = 0; v < pf->num_alloc_vsi; v++) {
4229 if (pf->vsi[v])
4230 i40e_quiesce_vsi(pf->vsi[v]);
4231 }
4232 }
4233
4234 /**
4235 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4236 * @pf: the PF
4237 **/
4238 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4239 {
4240 int v;
4241
4242 for (v = 0; v < pf->num_alloc_vsi; v++) {
4243 if (pf->vsi[v])
4244 i40e_unquiesce_vsi(pf->vsi[v]);
4245 }
4246 }
4247
4248 #ifdef CONFIG_I40E_DCB
4249 /**
4250 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4251 * @vsi: the VSI being configured
4252 *
4253 * This function waits for the given VSI's queues to be disabled.
4254 **/
4255 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4256 {
4257 struct i40e_pf *pf = vsi->back;
4258 int i, pf_q, ret;
4259
4260 pf_q = vsi->base_queue;
4261 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4262 /* Check and wait for the disable status of the queue */
4263 ret = i40e_pf_txq_wait(pf, pf_q, false);
4264 if (ret) {
4265 dev_info(&pf->pdev->dev,
4266 "VSI seid %d Tx ring %d disable timeout\n",
4267 vsi->seid, pf_q);
4268 return ret;
4269 }
4270 }
4271
4272 pf_q = vsi->base_queue;
4273 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4274 /* Check and wait for the disable status of the queue */
4275 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4276 if (ret) {
4277 dev_info(&pf->pdev->dev,
4278 "VSI seid %d Rx ring %d disable timeout\n",
4279 vsi->seid, pf_q);
4280 return ret;
4281 }
4282 }
4283
4284 return 0;
4285 }
4286
4287 /**
4288 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4289 * @pf: the PF
4290 *
4291 * This function waits for the queues to be in disabled state for all the
4292 * VSIs that are managed by this PF.
4293 **/
4294 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4295 {
4296 int v, ret = 0;
4297
4298 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4299 /* No need to wait for FCoE VSI queues */
4300 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4301 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4302 if (ret)
4303 break;
4304 }
4305 }
4306
4307 return ret;
4308 }
4309
4310 #endif
4311
4312 /**
4313 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4314 * @q_idx: TX queue number
4315 * @vsi: Pointer to VSI struct
4316 *
4317 * This function checks specified queue for given VSI. Detects hung condition.
4318 * Sets hung bit since it is two step process. Before next run of service task
4319 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4320 * hung condition remain unchanged and during subsequent run, this function
4321 * issues SW interrupt to recover from hung condition.
4322 **/
4323 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4324 {
4325 struct i40e_ring *tx_ring = NULL;
4326 struct i40e_pf *pf;
4327 u32 head, val, tx_pending_hw;
4328 int i;
4329
4330 pf = vsi->back;
4331
4332 /* now that we have an index, find the tx_ring struct */
4333 for (i = 0; i < vsi->num_queue_pairs; i++) {
4334 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4335 if (q_idx == vsi->tx_rings[i]->queue_index) {
4336 tx_ring = vsi->tx_rings[i];
4337 break;
4338 }
4339 }
4340 }
4341
4342 if (!tx_ring)
4343 return;
4344
4345 /* Read interrupt register */
4346 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4347 val = rd32(&pf->hw,
4348 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4349 tx_ring->vsi->base_vector - 1));
4350 else
4351 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4352
4353 head = i40e_get_head(tx_ring);
4354
4355 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4356
4357 /* HW is done executing descriptors, updated HEAD write back,
4358 * but SW hasn't processed those descriptors. If interrupt is
4359 * not generated from this point ON, it could result into
4360 * dev_watchdog detecting timeout on those netdev_queue,
4361 * hence proactively trigger SW interrupt.
4362 */
4363 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4364 /* NAPI Poll didn't run and clear since it was set */
4365 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4366 &tx_ring->q_vector->hung_detected)) {
4367 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4368 vsi->seid, q_idx, tx_pending_hw,
4369 tx_ring->next_to_clean, head,
4370 tx_ring->next_to_use,
4371 readl(tx_ring->tail));
4372 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4373 vsi->seid, q_idx, val);
4374 i40e_force_wb(vsi, tx_ring->q_vector);
4375 } else {
4376 /* First Chance - detected possible hung */
4377 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4378 &tx_ring->q_vector->hung_detected);
4379 }
4380 }
4381
4382 /* This is the case where we have interrupts missing,
4383 * so the tx_pending in HW will most likely be 0, but we
4384 * will have tx_pending in SW since the WB happened but the
4385 * interrupt got lost.
4386 */
4387 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4388 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4389 if (napi_reschedule(&tx_ring->q_vector->napi))
4390 tx_ring->tx_stats.tx_lost_interrupt++;
4391 }
4392 }
4393
4394 /**
4395 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4396 * @pf: pointer to PF struct
4397 *
4398 * LAN VSI has netdev and netdev has TX queues. This function is to check
4399 * each of those TX queues if they are hung, trigger recovery by issuing
4400 * SW interrupt.
4401 **/
4402 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4403 {
4404 struct net_device *netdev;
4405 struct i40e_vsi *vsi;
4406 int i;
4407
4408 /* Only for LAN VSI */
4409 vsi = pf->vsi[pf->lan_vsi];
4410
4411 if (!vsi)
4412 return;
4413
4414 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4415 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4416 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4417 return;
4418
4419 /* Make sure type is MAIN VSI */
4420 if (vsi->type != I40E_VSI_MAIN)
4421 return;
4422
4423 netdev = vsi->netdev;
4424 if (!netdev)
4425 return;
4426
4427 /* Bail out if netif_carrier is not OK */
4428 if (!netif_carrier_ok(netdev))
4429 return;
4430
4431 /* Go thru' TX queues for netdev */
4432 for (i = 0; i < netdev->num_tx_queues; i++) {
4433 struct netdev_queue *q;
4434
4435 q = netdev_get_tx_queue(netdev, i);
4436 if (q)
4437 i40e_detect_recover_hung_queue(i, vsi);
4438 }
4439 }
4440
4441 /**
4442 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4443 * @pf: pointer to PF
4444 *
4445 * Get TC map for ISCSI PF type that will include iSCSI TC
4446 * and LAN TC.
4447 **/
4448 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4449 {
4450 struct i40e_dcb_app_priority_table app;
4451 struct i40e_hw *hw = &pf->hw;
4452 u8 enabled_tc = 1; /* TC0 is always enabled */
4453 u8 tc, i;
4454 /* Get the iSCSI APP TLV */
4455 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4456
4457 for (i = 0; i < dcbcfg->numapps; i++) {
4458 app = dcbcfg->app[i];
4459 if (app.selector == I40E_APP_SEL_TCPIP &&
4460 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4461 tc = dcbcfg->etscfg.prioritytable[app.priority];
4462 enabled_tc |= BIT(tc);
4463 break;
4464 }
4465 }
4466
4467 return enabled_tc;
4468 }
4469
4470 /**
4471 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4472 * @dcbcfg: the corresponding DCBx configuration structure
4473 *
4474 * Return the number of TCs from given DCBx configuration
4475 **/
4476 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4477 {
4478 u8 num_tc = 0;
4479 int i;
4480
4481 /* Scan the ETS Config Priority Table to find
4482 * traffic class enabled for a given priority
4483 * and use the traffic class index to get the
4484 * number of traffic classes enabled
4485 */
4486 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4487 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4488 num_tc = dcbcfg->etscfg.prioritytable[i];
4489 }
4490
4491 /* Traffic class index starts from zero so
4492 * increment to return the actual count
4493 */
4494 return num_tc + 1;
4495 }
4496
4497 /**
4498 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4499 * @dcbcfg: the corresponding DCBx configuration structure
4500 *
4501 * Query the current DCB configuration and return the number of
4502 * traffic classes enabled from the given DCBX config
4503 **/
4504 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4505 {
4506 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4507 u8 enabled_tc = 1;
4508 u8 i;
4509
4510 for (i = 0; i < num_tc; i++)
4511 enabled_tc |= BIT(i);
4512
4513 return enabled_tc;
4514 }
4515
4516 /**
4517 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4518 * @pf: PF being queried
4519 *
4520 * Return number of traffic classes enabled for the given PF
4521 **/
4522 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4523 {
4524 struct i40e_hw *hw = &pf->hw;
4525 u8 i, enabled_tc;
4526 u8 num_tc = 0;
4527 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4528
4529 /* If DCB is not enabled then always in single TC */
4530 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4531 return 1;
4532
4533 /* SFP mode will be enabled for all TCs on port */
4534 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4535 return i40e_dcb_get_num_tc(dcbcfg);
4536
4537 /* MFP mode return count of enabled TCs for this PF */
4538 if (pf->hw.func_caps.iscsi)
4539 enabled_tc = i40e_get_iscsi_tc_map(pf);
4540 else
4541 return 1; /* Only TC0 */
4542
4543 /* At least have TC0 */
4544 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4545 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4546 if (enabled_tc & BIT(i))
4547 num_tc++;
4548 }
4549 return num_tc;
4550 }
4551
4552 /**
4553 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4554 * @pf: PF being queried
4555 *
4556 * Return a bitmap for first enabled traffic class for this PF.
4557 **/
4558 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4559 {
4560 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4561 u8 i = 0;
4562
4563 if (!enabled_tc)
4564 return 0x1; /* TC0 */
4565
4566 /* Find the first enabled TC */
4567 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4568 if (enabled_tc & BIT(i))
4569 break;
4570 }
4571
4572 return BIT(i);
4573 }
4574
4575 /**
4576 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4577 * @pf: PF being queried
4578 *
4579 * Return a bitmap for enabled traffic classes for this PF.
4580 **/
4581 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4582 {
4583 /* If DCB is not enabled for this PF then just return default TC */
4584 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4585 return i40e_pf_get_default_tc(pf);
4586
4587 /* SFP mode we want PF to be enabled for all TCs */
4588 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4589 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4590
4591 /* MFP enabled and iSCSI PF type */
4592 if (pf->hw.func_caps.iscsi)
4593 return i40e_get_iscsi_tc_map(pf);
4594 else
4595 return i40e_pf_get_default_tc(pf);
4596 }
4597
4598 /**
4599 * i40e_vsi_get_bw_info - Query VSI BW Information
4600 * @vsi: the VSI being queried
4601 *
4602 * Returns 0 on success, negative value on failure
4603 **/
4604 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4605 {
4606 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4607 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4608 struct i40e_pf *pf = vsi->back;
4609 struct i40e_hw *hw = &pf->hw;
4610 i40e_status ret;
4611 u32 tc_bw_max;
4612 int i;
4613
4614 /* Get the VSI level BW configuration */
4615 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4616 if (ret) {
4617 dev_info(&pf->pdev->dev,
4618 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4619 i40e_stat_str(&pf->hw, ret),
4620 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4621 return -EINVAL;
4622 }
4623
4624 /* Get the VSI level BW configuration per TC */
4625 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4626 NULL);
4627 if (ret) {
4628 dev_info(&pf->pdev->dev,
4629 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4630 i40e_stat_str(&pf->hw, ret),
4631 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4632 return -EINVAL;
4633 }
4634
4635 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4636 dev_info(&pf->pdev->dev,
4637 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4638 bw_config.tc_valid_bits,
4639 bw_ets_config.tc_valid_bits);
4640 /* Still continuing */
4641 }
4642
4643 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4644 vsi->bw_max_quanta = bw_config.max_bw;
4645 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4646 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4647 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4648 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4649 vsi->bw_ets_limit_credits[i] =
4650 le16_to_cpu(bw_ets_config.credits[i]);
4651 /* 3 bits out of 4 for each TC */
4652 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4653 }
4654
4655 return 0;
4656 }
4657
4658 /**
4659 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4660 * @vsi: the VSI being configured
4661 * @enabled_tc: TC bitmap
4662 * @bw_credits: BW shared credits per TC
4663 *
4664 * Returns 0 on success, negative value on failure
4665 **/
4666 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4667 u8 *bw_share)
4668 {
4669 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4670 i40e_status ret;
4671 int i;
4672
4673 bw_data.tc_valid_bits = enabled_tc;
4674 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4675 bw_data.tc_bw_credits[i] = bw_share[i];
4676
4677 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4678 NULL);
4679 if (ret) {
4680 dev_info(&vsi->back->pdev->dev,
4681 "AQ command Config VSI BW allocation per TC failed = %d\n",
4682 vsi->back->hw.aq.asq_last_status);
4683 return -EINVAL;
4684 }
4685
4686 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4687 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4688
4689 return 0;
4690 }
4691
4692 /**
4693 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4694 * @vsi: the VSI being configured
4695 * @enabled_tc: TC map to be enabled
4696 *
4697 **/
4698 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4699 {
4700 struct net_device *netdev = vsi->netdev;
4701 struct i40e_pf *pf = vsi->back;
4702 struct i40e_hw *hw = &pf->hw;
4703 u8 netdev_tc = 0;
4704 int i;
4705 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4706
4707 if (!netdev)
4708 return;
4709
4710 if (!enabled_tc) {
4711 netdev_reset_tc(netdev);
4712 return;
4713 }
4714
4715 /* Set up actual enabled TCs on the VSI */
4716 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4717 return;
4718
4719 /* set per TC queues for the VSI */
4720 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4721 /* Only set TC queues for enabled tcs
4722 *
4723 * e.g. For a VSI that has TC0 and TC3 enabled the
4724 * enabled_tc bitmap would be 0x00001001; the driver
4725 * will set the numtc for netdev as 2 that will be
4726 * referenced by the netdev layer as TC 0 and 1.
4727 */
4728 if (vsi->tc_config.enabled_tc & BIT(i))
4729 netdev_set_tc_queue(netdev,
4730 vsi->tc_config.tc_info[i].netdev_tc,
4731 vsi->tc_config.tc_info[i].qcount,
4732 vsi->tc_config.tc_info[i].qoffset);
4733 }
4734
4735 /* Assign UP2TC map for the VSI */
4736 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4737 /* Get the actual TC# for the UP */
4738 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4739 /* Get the mapped netdev TC# for the UP */
4740 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4741 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4742 }
4743 }
4744
4745 /**
4746 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4747 * @vsi: the VSI being configured
4748 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4749 **/
4750 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4751 struct i40e_vsi_context *ctxt)
4752 {
4753 /* copy just the sections touched not the entire info
4754 * since not all sections are valid as returned by
4755 * update vsi params
4756 */
4757 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4758 memcpy(&vsi->info.queue_mapping,
4759 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4760 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4761 sizeof(vsi->info.tc_mapping));
4762 }
4763
4764 /**
4765 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4766 * @vsi: VSI to be configured
4767 * @enabled_tc: TC bitmap
4768 *
4769 * This configures a particular VSI for TCs that are mapped to the
4770 * given TC bitmap. It uses default bandwidth share for TCs across
4771 * VSIs to configure TC for a particular VSI.
4772 *
4773 * NOTE:
4774 * It is expected that the VSI queues have been quisced before calling
4775 * this function.
4776 **/
4777 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4778 {
4779 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4780 struct i40e_vsi_context ctxt;
4781 int ret = 0;
4782 int i;
4783
4784 /* Check if enabled_tc is same as existing or new TCs */
4785 if (vsi->tc_config.enabled_tc == enabled_tc)
4786 return ret;
4787
4788 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4789 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4790 if (enabled_tc & BIT(i))
4791 bw_share[i] = 1;
4792 }
4793
4794 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4795 if (ret) {
4796 dev_info(&vsi->back->pdev->dev,
4797 "Failed configuring TC map %d for VSI %d\n",
4798 enabled_tc, vsi->seid);
4799 goto out;
4800 }
4801
4802 /* Update Queue Pairs Mapping for currently enabled UPs */
4803 ctxt.seid = vsi->seid;
4804 ctxt.pf_num = vsi->back->hw.pf_id;
4805 ctxt.vf_num = 0;
4806 ctxt.uplink_seid = vsi->uplink_seid;
4807 ctxt.info = vsi->info;
4808 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4809
4810 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4811 ctxt.info.valid_sections |=
4812 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4813 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4814 }
4815
4816 /* Update the VSI after updating the VSI queue-mapping information */
4817 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4818 if (ret) {
4819 dev_info(&vsi->back->pdev->dev,
4820 "Update vsi tc config failed, err %s aq_err %s\n",
4821 i40e_stat_str(&vsi->back->hw, ret),
4822 i40e_aq_str(&vsi->back->hw,
4823 vsi->back->hw.aq.asq_last_status));
4824 goto out;
4825 }
4826 /* update the local VSI info with updated queue map */
4827 i40e_vsi_update_queue_map(vsi, &ctxt);
4828 vsi->info.valid_sections = 0;
4829
4830 /* Update current VSI BW information */
4831 ret = i40e_vsi_get_bw_info(vsi);
4832 if (ret) {
4833 dev_info(&vsi->back->pdev->dev,
4834 "Failed updating vsi bw info, err %s aq_err %s\n",
4835 i40e_stat_str(&vsi->back->hw, ret),
4836 i40e_aq_str(&vsi->back->hw,
4837 vsi->back->hw.aq.asq_last_status));
4838 goto out;
4839 }
4840
4841 /* Update the netdev TC setup */
4842 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4843 out:
4844 return ret;
4845 }
4846
4847 /**
4848 * i40e_veb_config_tc - Configure TCs for given VEB
4849 * @veb: given VEB
4850 * @enabled_tc: TC bitmap
4851 *
4852 * Configures given TC bitmap for VEB (switching) element
4853 **/
4854 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4855 {
4856 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4857 struct i40e_pf *pf = veb->pf;
4858 int ret = 0;
4859 int i;
4860
4861 /* No TCs or already enabled TCs just return */
4862 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4863 return ret;
4864
4865 bw_data.tc_valid_bits = enabled_tc;
4866 /* bw_data.absolute_credits is not set (relative) */
4867
4868 /* Enable ETS TCs with equal BW Share for now */
4869 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4870 if (enabled_tc & BIT(i))
4871 bw_data.tc_bw_share_credits[i] = 1;
4872 }
4873
4874 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4875 &bw_data, NULL);
4876 if (ret) {
4877 dev_info(&pf->pdev->dev,
4878 "VEB bw config failed, err %s aq_err %s\n",
4879 i40e_stat_str(&pf->hw, ret),
4880 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4881 goto out;
4882 }
4883
4884 /* Update the BW information */
4885 ret = i40e_veb_get_bw_info(veb);
4886 if (ret) {
4887 dev_info(&pf->pdev->dev,
4888 "Failed getting veb bw config, err %s aq_err %s\n",
4889 i40e_stat_str(&pf->hw, ret),
4890 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4891 }
4892
4893 out:
4894 return ret;
4895 }
4896
4897 #ifdef CONFIG_I40E_DCB
4898 /**
4899 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4900 * @pf: PF struct
4901 *
4902 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4903 * the caller would've quiesce all the VSIs before calling
4904 * this function
4905 **/
4906 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4907 {
4908 u8 tc_map = 0;
4909 int ret;
4910 u8 v;
4911
4912 /* Enable the TCs available on PF to all VEBs */
4913 tc_map = i40e_pf_get_tc_map(pf);
4914 for (v = 0; v < I40E_MAX_VEB; v++) {
4915 if (!pf->veb[v])
4916 continue;
4917 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4918 if (ret) {
4919 dev_info(&pf->pdev->dev,
4920 "Failed configuring TC for VEB seid=%d\n",
4921 pf->veb[v]->seid);
4922 /* Will try to configure as many components */
4923 }
4924 }
4925
4926 /* Update each VSI */
4927 for (v = 0; v < pf->num_alloc_vsi; v++) {
4928 if (!pf->vsi[v])
4929 continue;
4930
4931 /* - Enable all TCs for the LAN VSI
4932 #ifdef I40E_FCOE
4933 * - For FCoE VSI only enable the TC configured
4934 * as per the APP TLV
4935 #endif
4936 * - For all others keep them at TC0 for now
4937 */
4938 if (v == pf->lan_vsi)
4939 tc_map = i40e_pf_get_tc_map(pf);
4940 else
4941 tc_map = i40e_pf_get_default_tc(pf);
4942 #ifdef I40E_FCOE
4943 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4944 tc_map = i40e_get_fcoe_tc_map(pf);
4945 #endif /* #ifdef I40E_FCOE */
4946
4947 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4948 if (ret) {
4949 dev_info(&pf->pdev->dev,
4950 "Failed configuring TC for VSI seid=%d\n",
4951 pf->vsi[v]->seid);
4952 /* Will try to configure as many components */
4953 } else {
4954 /* Re-configure VSI vectors based on updated TC map */
4955 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4956 if (pf->vsi[v]->netdev)
4957 i40e_dcbnl_set_all(pf->vsi[v]);
4958 }
4959 i40e_notify_client_of_l2_param_changes(pf->vsi[v]);
4960 }
4961 }
4962
4963 /**
4964 * i40e_resume_port_tx - Resume port Tx
4965 * @pf: PF struct
4966 *
4967 * Resume a port's Tx and issue a PF reset in case of failure to
4968 * resume.
4969 **/
4970 static int i40e_resume_port_tx(struct i40e_pf *pf)
4971 {
4972 struct i40e_hw *hw = &pf->hw;
4973 int ret;
4974
4975 ret = i40e_aq_resume_port_tx(hw, NULL);
4976 if (ret) {
4977 dev_info(&pf->pdev->dev,
4978 "Resume Port Tx failed, err %s aq_err %s\n",
4979 i40e_stat_str(&pf->hw, ret),
4980 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4981 /* Schedule PF reset to recover */
4982 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4983 i40e_service_event_schedule(pf);
4984 }
4985
4986 return ret;
4987 }
4988
4989 /**
4990 * i40e_init_pf_dcb - Initialize DCB configuration
4991 * @pf: PF being configured
4992 *
4993 * Query the current DCB configuration and cache it
4994 * in the hardware structure
4995 **/
4996 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4997 {
4998 struct i40e_hw *hw = &pf->hw;
4999 int err = 0;
5000
5001 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5002 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5003 goto out;
5004
5005 /* Get the initial DCB configuration */
5006 err = i40e_init_dcb(hw);
5007 if (!err) {
5008 /* Device/Function is not DCBX capable */
5009 if ((!hw->func_caps.dcb) ||
5010 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5011 dev_info(&pf->pdev->dev,
5012 "DCBX offload is not supported or is disabled for this PF.\n");
5013
5014 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5015 goto out;
5016
5017 } else {
5018 /* When status is not DISABLED then DCBX in FW */
5019 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5020 DCB_CAP_DCBX_VER_IEEE;
5021
5022 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5023 /* Enable DCB tagging only when more than one TC */
5024 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5025 pf->flags |= I40E_FLAG_DCB_ENABLED;
5026 dev_dbg(&pf->pdev->dev,
5027 "DCBX offload is supported for this PF.\n");
5028 }
5029 } else {
5030 dev_info(&pf->pdev->dev,
5031 "Query for DCB configuration failed, err %s aq_err %s\n",
5032 i40e_stat_str(&pf->hw, err),
5033 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5034 }
5035
5036 out:
5037 return err;
5038 }
5039 #endif /* CONFIG_I40E_DCB */
5040 #define SPEED_SIZE 14
5041 #define FC_SIZE 8
5042 /**
5043 * i40e_print_link_message - print link up or down
5044 * @vsi: the VSI for which link needs a message
5045 */
5046 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5047 {
5048 char *speed = "Unknown";
5049 char *fc = "Unknown";
5050
5051 if (vsi->current_isup == isup)
5052 return;
5053 vsi->current_isup = isup;
5054 if (!isup) {
5055 netdev_info(vsi->netdev, "NIC Link is Down\n");
5056 return;
5057 }
5058
5059 /* Warn user if link speed on NPAR enabled partition is not at
5060 * least 10GB
5061 */
5062 if (vsi->back->hw.func_caps.npar_enable &&
5063 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5064 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5065 netdev_warn(vsi->netdev,
5066 "The partition detected link speed that is less than 10Gbps\n");
5067
5068 switch (vsi->back->hw.phy.link_info.link_speed) {
5069 case I40E_LINK_SPEED_40GB:
5070 speed = "40 G";
5071 break;
5072 case I40E_LINK_SPEED_20GB:
5073 speed = "20 G";
5074 break;
5075 case I40E_LINK_SPEED_10GB:
5076 speed = "10 G";
5077 break;
5078 case I40E_LINK_SPEED_1GB:
5079 speed = "1000 M";
5080 break;
5081 case I40E_LINK_SPEED_100MB:
5082 speed = "100 M";
5083 break;
5084 default:
5085 break;
5086 }
5087
5088 switch (vsi->back->hw.fc.current_mode) {
5089 case I40E_FC_FULL:
5090 fc = "RX/TX";
5091 break;
5092 case I40E_FC_TX_PAUSE:
5093 fc = "TX";
5094 break;
5095 case I40E_FC_RX_PAUSE:
5096 fc = "RX";
5097 break;
5098 default:
5099 fc = "None";
5100 break;
5101 }
5102
5103 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5104 speed, fc);
5105 }
5106
5107 /**
5108 * i40e_up_complete - Finish the last steps of bringing up a connection
5109 * @vsi: the VSI being configured
5110 **/
5111 static int i40e_up_complete(struct i40e_vsi *vsi)
5112 {
5113 struct i40e_pf *pf = vsi->back;
5114 int err;
5115
5116 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5117 i40e_vsi_configure_msix(vsi);
5118 else
5119 i40e_configure_msi_and_legacy(vsi);
5120
5121 /* start rings */
5122 err = i40e_vsi_control_rings(vsi, true);
5123 if (err)
5124 return err;
5125
5126 clear_bit(__I40E_DOWN, &vsi->state);
5127 i40e_napi_enable_all(vsi);
5128 i40e_vsi_enable_irq(vsi);
5129
5130 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5131 (vsi->netdev)) {
5132 i40e_print_link_message(vsi, true);
5133 netif_tx_start_all_queues(vsi->netdev);
5134 netif_carrier_on(vsi->netdev);
5135 } else if (vsi->netdev) {
5136 i40e_print_link_message(vsi, false);
5137 /* need to check for qualified module here*/
5138 if ((pf->hw.phy.link_info.link_info &
5139 I40E_AQ_MEDIA_AVAILABLE) &&
5140 (!(pf->hw.phy.link_info.an_info &
5141 I40E_AQ_QUALIFIED_MODULE)))
5142 netdev_err(vsi->netdev,
5143 "the driver failed to link because an unqualified module was detected.");
5144 }
5145
5146 /* replay FDIR SB filters */
5147 if (vsi->type == I40E_VSI_FDIR) {
5148 /* reset fd counters */
5149 pf->fd_add_err = pf->fd_atr_cnt = 0;
5150 if (pf->fd_tcp_rule > 0) {
5151 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5152 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5153 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5154 pf->fd_tcp_rule = 0;
5155 }
5156 i40e_fdir_filter_restore(vsi);
5157 }
5158
5159 /* On the next run of the service_task, notify any clients of the new
5160 * opened netdev
5161 */
5162 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5163 i40e_service_event_schedule(pf);
5164
5165 return 0;
5166 }
5167
5168 /**
5169 * i40e_vsi_reinit_locked - Reset the VSI
5170 * @vsi: the VSI being configured
5171 *
5172 * Rebuild the ring structs after some configuration
5173 * has changed, e.g. MTU size.
5174 **/
5175 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5176 {
5177 struct i40e_pf *pf = vsi->back;
5178
5179 WARN_ON(in_interrupt());
5180 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5181 usleep_range(1000, 2000);
5182 i40e_down(vsi);
5183
5184 i40e_up(vsi);
5185 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5186 }
5187
5188 /**
5189 * i40e_up - Bring the connection back up after being down
5190 * @vsi: the VSI being configured
5191 **/
5192 int i40e_up(struct i40e_vsi *vsi)
5193 {
5194 int err;
5195
5196 err = i40e_vsi_configure(vsi);
5197 if (!err)
5198 err = i40e_up_complete(vsi);
5199
5200 return err;
5201 }
5202
5203 /**
5204 * i40e_down - Shutdown the connection processing
5205 * @vsi: the VSI being stopped
5206 **/
5207 void i40e_down(struct i40e_vsi *vsi)
5208 {
5209 int i;
5210
5211 /* It is assumed that the caller of this function
5212 * sets the vsi->state __I40E_DOWN bit.
5213 */
5214 if (vsi->netdev) {
5215 netif_carrier_off(vsi->netdev);
5216 netif_tx_disable(vsi->netdev);
5217 }
5218 i40e_vsi_disable_irq(vsi);
5219 i40e_vsi_control_rings(vsi, false);
5220 i40e_napi_disable_all(vsi);
5221
5222 for (i = 0; i < vsi->num_queue_pairs; i++) {
5223 i40e_clean_tx_ring(vsi->tx_rings[i]);
5224 i40e_clean_rx_ring(vsi->rx_rings[i]);
5225 }
5226
5227 i40e_notify_client_of_netdev_close(vsi, false);
5228
5229 }
5230
5231 /**
5232 * i40e_setup_tc - configure multiple traffic classes
5233 * @netdev: net device to configure
5234 * @tc: number of traffic classes to enable
5235 **/
5236 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5237 {
5238 struct i40e_netdev_priv *np = netdev_priv(netdev);
5239 struct i40e_vsi *vsi = np->vsi;
5240 struct i40e_pf *pf = vsi->back;
5241 u8 enabled_tc = 0;
5242 int ret = -EINVAL;
5243 int i;
5244
5245 /* Check if DCB enabled to continue */
5246 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5247 netdev_info(netdev, "DCB is not enabled for adapter\n");
5248 goto exit;
5249 }
5250
5251 /* Check if MFP enabled */
5252 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5253 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5254 goto exit;
5255 }
5256
5257 /* Check whether tc count is within enabled limit */
5258 if (tc > i40e_pf_get_num_tc(pf)) {
5259 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5260 goto exit;
5261 }
5262
5263 /* Generate TC map for number of tc requested */
5264 for (i = 0; i < tc; i++)
5265 enabled_tc |= BIT(i);
5266
5267 /* Requesting same TC configuration as already enabled */
5268 if (enabled_tc == vsi->tc_config.enabled_tc)
5269 return 0;
5270
5271 /* Quiesce VSI queues */
5272 i40e_quiesce_vsi(vsi);
5273
5274 /* Configure VSI for enabled TCs */
5275 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5276 if (ret) {
5277 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5278 vsi->seid);
5279 goto exit;
5280 }
5281
5282 /* Unquiesce VSI */
5283 i40e_unquiesce_vsi(vsi);
5284
5285 exit:
5286 return ret;
5287 }
5288
5289 #ifdef I40E_FCOE
5290 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5291 struct tc_to_netdev *tc)
5292 #else
5293 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5294 struct tc_to_netdev *tc)
5295 #endif
5296 {
5297 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5298 return -EINVAL;
5299 return i40e_setup_tc(netdev, tc->tc);
5300 }
5301
5302 /**
5303 * i40e_open - Called when a network interface is made active
5304 * @netdev: network interface device structure
5305 *
5306 * The open entry point is called when a network interface is made
5307 * active by the system (IFF_UP). At this point all resources needed
5308 * for transmit and receive operations are allocated, the interrupt
5309 * handler is registered with the OS, the netdev watchdog subtask is
5310 * enabled, and the stack is notified that the interface is ready.
5311 *
5312 * Returns 0 on success, negative value on failure
5313 **/
5314 int i40e_open(struct net_device *netdev)
5315 {
5316 struct i40e_netdev_priv *np = netdev_priv(netdev);
5317 struct i40e_vsi *vsi = np->vsi;
5318 struct i40e_pf *pf = vsi->back;
5319 int err;
5320
5321 /* disallow open during test or if eeprom is broken */
5322 if (test_bit(__I40E_TESTING, &pf->state) ||
5323 test_bit(__I40E_BAD_EEPROM, &pf->state))
5324 return -EBUSY;
5325
5326 netif_carrier_off(netdev);
5327
5328 err = i40e_vsi_open(vsi);
5329 if (err)
5330 return err;
5331
5332 /* configure global TSO hardware offload settings */
5333 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5334 TCP_FLAG_FIN) >> 16);
5335 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5336 TCP_FLAG_FIN |
5337 TCP_FLAG_CWR) >> 16);
5338 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5339
5340 udp_tunnel_get_rx_info(netdev);
5341 i40e_notify_client_of_netdev_open(vsi);
5342
5343 return 0;
5344 }
5345
5346 /**
5347 * i40e_vsi_open -
5348 * @vsi: the VSI to open
5349 *
5350 * Finish initialization of the VSI.
5351 *
5352 * Returns 0 on success, negative value on failure
5353 **/
5354 int i40e_vsi_open(struct i40e_vsi *vsi)
5355 {
5356 struct i40e_pf *pf = vsi->back;
5357 char int_name[I40E_INT_NAME_STR_LEN];
5358 int err;
5359
5360 /* allocate descriptors */
5361 err = i40e_vsi_setup_tx_resources(vsi);
5362 if (err)
5363 goto err_setup_tx;
5364 err = i40e_vsi_setup_rx_resources(vsi);
5365 if (err)
5366 goto err_setup_rx;
5367
5368 err = i40e_vsi_configure(vsi);
5369 if (err)
5370 goto err_setup_rx;
5371
5372 if (vsi->netdev) {
5373 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5374 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5375 err = i40e_vsi_request_irq(vsi, int_name);
5376 if (err)
5377 goto err_setup_rx;
5378
5379 /* Notify the stack of the actual queue counts. */
5380 err = netif_set_real_num_tx_queues(vsi->netdev,
5381 vsi->num_queue_pairs);
5382 if (err)
5383 goto err_set_queues;
5384
5385 err = netif_set_real_num_rx_queues(vsi->netdev,
5386 vsi->num_queue_pairs);
5387 if (err)
5388 goto err_set_queues;
5389
5390 } else if (vsi->type == I40E_VSI_FDIR) {
5391 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5392 dev_driver_string(&pf->pdev->dev),
5393 dev_name(&pf->pdev->dev));
5394 err = i40e_vsi_request_irq(vsi, int_name);
5395
5396 } else {
5397 err = -EINVAL;
5398 goto err_setup_rx;
5399 }
5400
5401 err = i40e_up_complete(vsi);
5402 if (err)
5403 goto err_up_complete;
5404
5405 return 0;
5406
5407 err_up_complete:
5408 i40e_down(vsi);
5409 err_set_queues:
5410 i40e_vsi_free_irq(vsi);
5411 err_setup_rx:
5412 i40e_vsi_free_rx_resources(vsi);
5413 err_setup_tx:
5414 i40e_vsi_free_tx_resources(vsi);
5415 if (vsi == pf->vsi[pf->lan_vsi])
5416 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5417
5418 return err;
5419 }
5420
5421 /**
5422 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5423 * @pf: Pointer to PF
5424 *
5425 * This function destroys the hlist where all the Flow Director
5426 * filters were saved.
5427 **/
5428 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5429 {
5430 struct i40e_fdir_filter *filter;
5431 struct hlist_node *node2;
5432
5433 hlist_for_each_entry_safe(filter, node2,
5434 &pf->fdir_filter_list, fdir_node) {
5435 hlist_del(&filter->fdir_node);
5436 kfree(filter);
5437 }
5438 pf->fdir_pf_active_filters = 0;
5439 }
5440
5441 /**
5442 * i40e_close - Disables a network interface
5443 * @netdev: network interface device structure
5444 *
5445 * The close entry point is called when an interface is de-activated
5446 * by the OS. The hardware is still under the driver's control, but
5447 * this netdev interface is disabled.
5448 *
5449 * Returns 0, this is not allowed to fail
5450 **/
5451 int i40e_close(struct net_device *netdev)
5452 {
5453 struct i40e_netdev_priv *np = netdev_priv(netdev);
5454 struct i40e_vsi *vsi = np->vsi;
5455
5456 i40e_vsi_close(vsi);
5457
5458 return 0;
5459 }
5460
5461 /**
5462 * i40e_do_reset - Start a PF or Core Reset sequence
5463 * @pf: board private structure
5464 * @reset_flags: which reset is requested
5465 *
5466 * The essential difference in resets is that the PF Reset
5467 * doesn't clear the packet buffers, doesn't reset the PE
5468 * firmware, and doesn't bother the other PFs on the chip.
5469 **/
5470 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5471 {
5472 u32 val;
5473
5474 WARN_ON(in_interrupt());
5475
5476
5477 /* do the biggest reset indicated */
5478 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5479
5480 /* Request a Global Reset
5481 *
5482 * This will start the chip's countdown to the actual full
5483 * chip reset event, and a warning interrupt to be sent
5484 * to all PFs, including the requestor. Our handler
5485 * for the warning interrupt will deal with the shutdown
5486 * and recovery of the switch setup.
5487 */
5488 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5489 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5490 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5491 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5492
5493 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5494
5495 /* Request a Core Reset
5496 *
5497 * Same as Global Reset, except does *not* include the MAC/PHY
5498 */
5499 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5500 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5501 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5502 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5503 i40e_flush(&pf->hw);
5504
5505 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5506
5507 /* Request a PF Reset
5508 *
5509 * Resets only the PF-specific registers
5510 *
5511 * This goes directly to the tear-down and rebuild of
5512 * the switch, since we need to do all the recovery as
5513 * for the Core Reset.
5514 */
5515 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5516 i40e_handle_reset_warning(pf);
5517
5518 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5519 int v;
5520
5521 /* Find the VSI(s) that requested a re-init */
5522 dev_info(&pf->pdev->dev,
5523 "VSI reinit requested\n");
5524 for (v = 0; v < pf->num_alloc_vsi; v++) {
5525 struct i40e_vsi *vsi = pf->vsi[v];
5526
5527 if (vsi != NULL &&
5528 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5529 i40e_vsi_reinit_locked(pf->vsi[v]);
5530 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5531 }
5532 }
5533 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5534 int v;
5535
5536 /* Find the VSI(s) that needs to be brought down */
5537 dev_info(&pf->pdev->dev, "VSI down requested\n");
5538 for (v = 0; v < pf->num_alloc_vsi; v++) {
5539 struct i40e_vsi *vsi = pf->vsi[v];
5540
5541 if (vsi != NULL &&
5542 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5543 set_bit(__I40E_DOWN, &vsi->state);
5544 i40e_down(vsi);
5545 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5546 }
5547 }
5548 } else {
5549 dev_info(&pf->pdev->dev,
5550 "bad reset request 0x%08x\n", reset_flags);
5551 }
5552 }
5553
5554 #ifdef CONFIG_I40E_DCB
5555 /**
5556 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5557 * @pf: board private structure
5558 * @old_cfg: current DCB config
5559 * @new_cfg: new DCB config
5560 **/
5561 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5562 struct i40e_dcbx_config *old_cfg,
5563 struct i40e_dcbx_config *new_cfg)
5564 {
5565 bool need_reconfig = false;
5566
5567 /* Check if ETS configuration has changed */
5568 if (memcmp(&new_cfg->etscfg,
5569 &old_cfg->etscfg,
5570 sizeof(new_cfg->etscfg))) {
5571 /* If Priority Table has changed reconfig is needed */
5572 if (memcmp(&new_cfg->etscfg.prioritytable,
5573 &old_cfg->etscfg.prioritytable,
5574 sizeof(new_cfg->etscfg.prioritytable))) {
5575 need_reconfig = true;
5576 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5577 }
5578
5579 if (memcmp(&new_cfg->etscfg.tcbwtable,
5580 &old_cfg->etscfg.tcbwtable,
5581 sizeof(new_cfg->etscfg.tcbwtable)))
5582 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5583
5584 if (memcmp(&new_cfg->etscfg.tsatable,
5585 &old_cfg->etscfg.tsatable,
5586 sizeof(new_cfg->etscfg.tsatable)))
5587 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5588 }
5589
5590 /* Check if PFC configuration has changed */
5591 if (memcmp(&new_cfg->pfc,
5592 &old_cfg->pfc,
5593 sizeof(new_cfg->pfc))) {
5594 need_reconfig = true;
5595 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5596 }
5597
5598 /* Check if APP Table has changed */
5599 if (memcmp(&new_cfg->app,
5600 &old_cfg->app,
5601 sizeof(new_cfg->app))) {
5602 need_reconfig = true;
5603 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5604 }
5605
5606 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5607 return need_reconfig;
5608 }
5609
5610 /**
5611 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5612 * @pf: board private structure
5613 * @e: event info posted on ARQ
5614 **/
5615 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5616 struct i40e_arq_event_info *e)
5617 {
5618 struct i40e_aqc_lldp_get_mib *mib =
5619 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5620 struct i40e_hw *hw = &pf->hw;
5621 struct i40e_dcbx_config tmp_dcbx_cfg;
5622 bool need_reconfig = false;
5623 int ret = 0;
5624 u8 type;
5625
5626 /* Not DCB capable or capability disabled */
5627 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5628 return ret;
5629
5630 /* Ignore if event is not for Nearest Bridge */
5631 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5632 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5633 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5634 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5635 return ret;
5636
5637 /* Check MIB Type and return if event for Remote MIB update */
5638 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5639 dev_dbg(&pf->pdev->dev,
5640 "LLDP event mib type %s\n", type ? "remote" : "local");
5641 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5642 /* Update the remote cached instance and return */
5643 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5644 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5645 &hw->remote_dcbx_config);
5646 goto exit;
5647 }
5648
5649 /* Store the old configuration */
5650 tmp_dcbx_cfg = hw->local_dcbx_config;
5651
5652 /* Reset the old DCBx configuration data */
5653 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5654 /* Get updated DCBX data from firmware */
5655 ret = i40e_get_dcb_config(&pf->hw);
5656 if (ret) {
5657 dev_info(&pf->pdev->dev,
5658 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5659 i40e_stat_str(&pf->hw, ret),
5660 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5661 goto exit;
5662 }
5663
5664 /* No change detected in DCBX configs */
5665 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5666 sizeof(tmp_dcbx_cfg))) {
5667 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5668 goto exit;
5669 }
5670
5671 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5672 &hw->local_dcbx_config);
5673
5674 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5675
5676 if (!need_reconfig)
5677 goto exit;
5678
5679 /* Enable DCB tagging only when more than one TC */
5680 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5681 pf->flags |= I40E_FLAG_DCB_ENABLED;
5682 else
5683 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5684
5685 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5686 /* Reconfiguration needed quiesce all VSIs */
5687 i40e_pf_quiesce_all_vsi(pf);
5688
5689 /* Changes in configuration update VEB/VSI */
5690 i40e_dcb_reconfigure(pf);
5691
5692 ret = i40e_resume_port_tx(pf);
5693
5694 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5695 /* In case of error no point in resuming VSIs */
5696 if (ret)
5697 goto exit;
5698
5699 /* Wait for the PF's queues to be disabled */
5700 ret = i40e_pf_wait_queues_disabled(pf);
5701 if (ret) {
5702 /* Schedule PF reset to recover */
5703 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5704 i40e_service_event_schedule(pf);
5705 } else {
5706 i40e_pf_unquiesce_all_vsi(pf);
5707 }
5708
5709 exit:
5710 return ret;
5711 }
5712 #endif /* CONFIG_I40E_DCB */
5713
5714 /**
5715 * i40e_do_reset_safe - Protected reset path for userland calls.
5716 * @pf: board private structure
5717 * @reset_flags: which reset is requested
5718 *
5719 **/
5720 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5721 {
5722 rtnl_lock();
5723 i40e_do_reset(pf, reset_flags);
5724 rtnl_unlock();
5725 }
5726
5727 /**
5728 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5729 * @pf: board private structure
5730 * @e: event info posted on ARQ
5731 *
5732 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5733 * and VF queues
5734 **/
5735 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5736 struct i40e_arq_event_info *e)
5737 {
5738 struct i40e_aqc_lan_overflow *data =
5739 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5740 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5741 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5742 struct i40e_hw *hw = &pf->hw;
5743 struct i40e_vf *vf;
5744 u16 vf_id;
5745
5746 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5747 queue, qtx_ctl);
5748
5749 /* Queue belongs to VF, find the VF and issue VF reset */
5750 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5751 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5752 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5753 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5754 vf_id -= hw->func_caps.vf_base_id;
5755 vf = &pf->vf[vf_id];
5756 i40e_vc_notify_vf_reset(vf);
5757 /* Allow VF to process pending reset notification */
5758 msleep(20);
5759 i40e_reset_vf(vf, false);
5760 }
5761 }
5762
5763 /**
5764 * i40e_service_event_complete - Finish up the service event
5765 * @pf: board private structure
5766 **/
5767 static void i40e_service_event_complete(struct i40e_pf *pf)
5768 {
5769 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5770
5771 /* flush memory to make sure state is correct before next watchog */
5772 smp_mb__before_atomic();
5773 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5774 }
5775
5776 /**
5777 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5778 * @pf: board private structure
5779 **/
5780 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5781 {
5782 u32 val, fcnt_prog;
5783
5784 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5785 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5786 return fcnt_prog;
5787 }
5788
5789 /**
5790 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5791 * @pf: board private structure
5792 **/
5793 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5794 {
5795 u32 val, fcnt_prog;
5796
5797 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5798 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5799 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5800 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5801 return fcnt_prog;
5802 }
5803
5804 /**
5805 * i40e_get_global_fd_count - Get total FD filters programmed on device
5806 * @pf: board private structure
5807 **/
5808 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5809 {
5810 u32 val, fcnt_prog;
5811
5812 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5813 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5814 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5815 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5816 return fcnt_prog;
5817 }
5818
5819 /**
5820 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5821 * @pf: board private structure
5822 **/
5823 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5824 {
5825 struct i40e_fdir_filter *filter;
5826 u32 fcnt_prog, fcnt_avail;
5827 struct hlist_node *node;
5828
5829 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5830 return;
5831
5832 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5833 * to re-enable
5834 */
5835 fcnt_prog = i40e_get_global_fd_count(pf);
5836 fcnt_avail = pf->fdir_pf_filter_count;
5837 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5838 (pf->fd_add_err == 0) ||
5839 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5840 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5841 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5842 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5843 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5844 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5845 }
5846 }
5847 /* Wait for some more space to be available to turn on ATR */
5848 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5849 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5850 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5851 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5852 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5853 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5854 }
5855 }
5856
5857 /* if hw had a problem adding a filter, delete it */
5858 if (pf->fd_inv > 0) {
5859 hlist_for_each_entry_safe(filter, node,
5860 &pf->fdir_filter_list, fdir_node) {
5861 if (filter->fd_id == pf->fd_inv) {
5862 hlist_del(&filter->fdir_node);
5863 kfree(filter);
5864 pf->fdir_pf_active_filters--;
5865 }
5866 }
5867 }
5868 }
5869
5870 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5871 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5872 /**
5873 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5874 * @pf: board private structure
5875 **/
5876 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5877 {
5878 unsigned long min_flush_time;
5879 int flush_wait_retry = 50;
5880 bool disable_atr = false;
5881 int fd_room;
5882 int reg;
5883
5884 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5885 return;
5886
5887 if (!time_after(jiffies, pf->fd_flush_timestamp +
5888 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5889 return;
5890
5891 /* If the flush is happening too quick and we have mostly SB rules we
5892 * should not re-enable ATR for some time.
5893 */
5894 min_flush_time = pf->fd_flush_timestamp +
5895 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5896 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5897
5898 if (!(time_after(jiffies, min_flush_time)) &&
5899 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5900 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5901 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5902 disable_atr = true;
5903 }
5904
5905 pf->fd_flush_timestamp = jiffies;
5906 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5907 /* flush all filters */
5908 wr32(&pf->hw, I40E_PFQF_CTL_1,
5909 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5910 i40e_flush(&pf->hw);
5911 pf->fd_flush_cnt++;
5912 pf->fd_add_err = 0;
5913 do {
5914 /* Check FD flush status every 5-6msec */
5915 usleep_range(5000, 6000);
5916 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5917 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5918 break;
5919 } while (flush_wait_retry--);
5920 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5921 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5922 } else {
5923 /* replay sideband filters */
5924 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5925 if (!disable_atr)
5926 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5927 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5928 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5929 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5930 }
5931 }
5932
5933 /**
5934 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5935 * @pf: board private structure
5936 **/
5937 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5938 {
5939 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5940 }
5941
5942 /* We can see up to 256 filter programming desc in transit if the filters are
5943 * being applied really fast; before we see the first
5944 * filter miss error on Rx queue 0. Accumulating enough error messages before
5945 * reacting will make sure we don't cause flush too often.
5946 */
5947 #define I40E_MAX_FD_PROGRAM_ERROR 256
5948
5949 /**
5950 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5951 * @pf: board private structure
5952 **/
5953 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5954 {
5955
5956 /* if interface is down do nothing */
5957 if (test_bit(__I40E_DOWN, &pf->state))
5958 return;
5959
5960 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5961 return;
5962
5963 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5964 i40e_fdir_flush_and_replay(pf);
5965
5966 i40e_fdir_check_and_reenable(pf);
5967
5968 }
5969
5970 /**
5971 * i40e_vsi_link_event - notify VSI of a link event
5972 * @vsi: vsi to be notified
5973 * @link_up: link up or down
5974 **/
5975 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5976 {
5977 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5978 return;
5979
5980 switch (vsi->type) {
5981 case I40E_VSI_MAIN:
5982 #ifdef I40E_FCOE
5983 case I40E_VSI_FCOE:
5984 #endif
5985 if (!vsi->netdev || !vsi->netdev_registered)
5986 break;
5987
5988 if (link_up) {
5989 netif_carrier_on(vsi->netdev);
5990 netif_tx_wake_all_queues(vsi->netdev);
5991 } else {
5992 netif_carrier_off(vsi->netdev);
5993 netif_tx_stop_all_queues(vsi->netdev);
5994 }
5995 break;
5996
5997 case I40E_VSI_SRIOV:
5998 case I40E_VSI_VMDQ2:
5999 case I40E_VSI_CTRL:
6000 case I40E_VSI_IWARP:
6001 case I40E_VSI_MIRROR:
6002 default:
6003 /* there is no notification for other VSIs */
6004 break;
6005 }
6006 }
6007
6008 /**
6009 * i40e_veb_link_event - notify elements on the veb of a link event
6010 * @veb: veb to be notified
6011 * @link_up: link up or down
6012 **/
6013 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6014 {
6015 struct i40e_pf *pf;
6016 int i;
6017
6018 if (!veb || !veb->pf)
6019 return;
6020 pf = veb->pf;
6021
6022 /* depth first... */
6023 for (i = 0; i < I40E_MAX_VEB; i++)
6024 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6025 i40e_veb_link_event(pf->veb[i], link_up);
6026
6027 /* ... now the local VSIs */
6028 for (i = 0; i < pf->num_alloc_vsi; i++)
6029 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6030 i40e_vsi_link_event(pf->vsi[i], link_up);
6031 }
6032
6033 /**
6034 * i40e_link_event - Update netif_carrier status
6035 * @pf: board private structure
6036 **/
6037 static void i40e_link_event(struct i40e_pf *pf)
6038 {
6039 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6040 u8 new_link_speed, old_link_speed;
6041 i40e_status status;
6042 bool new_link, old_link;
6043
6044 /* save off old link status information */
6045 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6046
6047 /* set this to force the get_link_status call to refresh state */
6048 pf->hw.phy.get_link_info = true;
6049
6050 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6051
6052 status = i40e_get_link_status(&pf->hw, &new_link);
6053 if (status) {
6054 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6055 status);
6056 return;
6057 }
6058
6059 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6060 new_link_speed = pf->hw.phy.link_info.link_speed;
6061
6062 if (new_link == old_link &&
6063 new_link_speed == old_link_speed &&
6064 (test_bit(__I40E_DOWN, &vsi->state) ||
6065 new_link == netif_carrier_ok(vsi->netdev)))
6066 return;
6067
6068 if (!test_bit(__I40E_DOWN, &vsi->state))
6069 i40e_print_link_message(vsi, new_link);
6070
6071 /* Notify the base of the switch tree connected to
6072 * the link. Floating VEBs are not notified.
6073 */
6074 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6075 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6076 else
6077 i40e_vsi_link_event(vsi, new_link);
6078
6079 if (pf->vf)
6080 i40e_vc_notify_link_state(pf);
6081
6082 if (pf->flags & I40E_FLAG_PTP)
6083 i40e_ptp_set_increment(pf);
6084 }
6085
6086 /**
6087 * i40e_watchdog_subtask - periodic checks not using event driven response
6088 * @pf: board private structure
6089 **/
6090 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6091 {
6092 int i;
6093
6094 /* if interface is down do nothing */
6095 if (test_bit(__I40E_DOWN, &pf->state) ||
6096 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6097 return;
6098
6099 /* make sure we don't do these things too often */
6100 if (time_before(jiffies, (pf->service_timer_previous +
6101 pf->service_timer_period)))
6102 return;
6103 pf->service_timer_previous = jiffies;
6104
6105 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6106 i40e_link_event(pf);
6107
6108 /* Update the stats for active netdevs so the network stack
6109 * can look at updated numbers whenever it cares to
6110 */
6111 for (i = 0; i < pf->num_alloc_vsi; i++)
6112 if (pf->vsi[i] && pf->vsi[i]->netdev)
6113 i40e_update_stats(pf->vsi[i]);
6114
6115 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6116 /* Update the stats for the active switching components */
6117 for (i = 0; i < I40E_MAX_VEB; i++)
6118 if (pf->veb[i])
6119 i40e_update_veb_stats(pf->veb[i]);
6120 }
6121
6122 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6123 }
6124
6125 /**
6126 * i40e_reset_subtask - Set up for resetting the device and driver
6127 * @pf: board private structure
6128 **/
6129 static void i40e_reset_subtask(struct i40e_pf *pf)
6130 {
6131 u32 reset_flags = 0;
6132
6133 rtnl_lock();
6134 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6135 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6136 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6137 }
6138 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6139 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6140 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6141 }
6142 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6143 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6144 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6145 }
6146 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6147 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6148 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6149 }
6150 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6151 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6152 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6153 }
6154
6155 /* If there's a recovery already waiting, it takes
6156 * precedence before starting a new reset sequence.
6157 */
6158 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6159 i40e_handle_reset_warning(pf);
6160 goto unlock;
6161 }
6162
6163 /* If we're already down or resetting, just bail */
6164 if (reset_flags &&
6165 !test_bit(__I40E_DOWN, &pf->state) &&
6166 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6167 i40e_do_reset(pf, reset_flags);
6168
6169 unlock:
6170 rtnl_unlock();
6171 }
6172
6173 /**
6174 * i40e_handle_link_event - Handle link event
6175 * @pf: board private structure
6176 * @e: event info posted on ARQ
6177 **/
6178 static void i40e_handle_link_event(struct i40e_pf *pf,
6179 struct i40e_arq_event_info *e)
6180 {
6181 struct i40e_aqc_get_link_status *status =
6182 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6183
6184 /* Do a new status request to re-enable LSE reporting
6185 * and load new status information into the hw struct
6186 * This completely ignores any state information
6187 * in the ARQ event info, instead choosing to always
6188 * issue the AQ update link status command.
6189 */
6190 i40e_link_event(pf);
6191
6192 /* check for unqualified module, if link is down */
6193 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6194 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6195 (!(status->link_info & I40E_AQ_LINK_UP)))
6196 dev_err(&pf->pdev->dev,
6197 "The driver failed to link because an unqualified module was detected.\n");
6198 }
6199
6200 /**
6201 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6202 * @pf: board private structure
6203 **/
6204 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6205 {
6206 struct i40e_arq_event_info event;
6207 struct i40e_hw *hw = &pf->hw;
6208 u16 pending, i = 0;
6209 i40e_status ret;
6210 u16 opcode;
6211 u32 oldval;
6212 u32 val;
6213
6214 /* Do not run clean AQ when PF reset fails */
6215 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6216 return;
6217
6218 /* check for error indications */
6219 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6220 oldval = val;
6221 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6222 if (hw->debug_mask & I40E_DEBUG_AQ)
6223 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6224 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6225 }
6226 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6227 if (hw->debug_mask & I40E_DEBUG_AQ)
6228 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6229 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6230 pf->arq_overflows++;
6231 }
6232 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6233 if (hw->debug_mask & I40E_DEBUG_AQ)
6234 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6235 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6236 }
6237 if (oldval != val)
6238 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6239
6240 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6241 oldval = val;
6242 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6243 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6244 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6245 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6246 }
6247 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6248 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6249 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6250 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6251 }
6252 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6253 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6254 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6255 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6256 }
6257 if (oldval != val)
6258 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6259
6260 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6261 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6262 if (!event.msg_buf)
6263 return;
6264
6265 do {
6266 ret = i40e_clean_arq_element(hw, &event, &pending);
6267 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6268 break;
6269 else if (ret) {
6270 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6271 break;
6272 }
6273
6274 opcode = le16_to_cpu(event.desc.opcode);
6275 switch (opcode) {
6276
6277 case i40e_aqc_opc_get_link_status:
6278 i40e_handle_link_event(pf, &event);
6279 break;
6280 case i40e_aqc_opc_send_msg_to_pf:
6281 ret = i40e_vc_process_vf_msg(pf,
6282 le16_to_cpu(event.desc.retval),
6283 le32_to_cpu(event.desc.cookie_high),
6284 le32_to_cpu(event.desc.cookie_low),
6285 event.msg_buf,
6286 event.msg_len);
6287 break;
6288 case i40e_aqc_opc_lldp_update_mib:
6289 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6290 #ifdef CONFIG_I40E_DCB
6291 rtnl_lock();
6292 ret = i40e_handle_lldp_event(pf, &event);
6293 rtnl_unlock();
6294 #endif /* CONFIG_I40E_DCB */
6295 break;
6296 case i40e_aqc_opc_event_lan_overflow:
6297 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6298 i40e_handle_lan_overflow_event(pf, &event);
6299 break;
6300 case i40e_aqc_opc_send_msg_to_peer:
6301 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6302 break;
6303 case i40e_aqc_opc_nvm_erase:
6304 case i40e_aqc_opc_nvm_update:
6305 case i40e_aqc_opc_oem_post_update:
6306 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6307 "ARQ NVM operation 0x%04x completed\n",
6308 opcode);
6309 break;
6310 default:
6311 dev_info(&pf->pdev->dev,
6312 "ARQ: Unknown event 0x%04x ignored\n",
6313 opcode);
6314 break;
6315 }
6316 } while (pending && (i++ < pf->adminq_work_limit));
6317
6318 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6319 /* re-enable Admin queue interrupt cause */
6320 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6321 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6322 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6323 i40e_flush(hw);
6324
6325 kfree(event.msg_buf);
6326 }
6327
6328 /**
6329 * i40e_verify_eeprom - make sure eeprom is good to use
6330 * @pf: board private structure
6331 **/
6332 static void i40e_verify_eeprom(struct i40e_pf *pf)
6333 {
6334 int err;
6335
6336 err = i40e_diag_eeprom_test(&pf->hw);
6337 if (err) {
6338 /* retry in case of garbage read */
6339 err = i40e_diag_eeprom_test(&pf->hw);
6340 if (err) {
6341 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6342 err);
6343 set_bit(__I40E_BAD_EEPROM, &pf->state);
6344 }
6345 }
6346
6347 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6348 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6349 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6350 }
6351 }
6352
6353 /**
6354 * i40e_enable_pf_switch_lb
6355 * @pf: pointer to the PF structure
6356 *
6357 * enable switch loop back or die - no point in a return value
6358 **/
6359 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6360 {
6361 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6362 struct i40e_vsi_context ctxt;
6363 int ret;
6364
6365 ctxt.seid = pf->main_vsi_seid;
6366 ctxt.pf_num = pf->hw.pf_id;
6367 ctxt.vf_num = 0;
6368 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6369 if (ret) {
6370 dev_info(&pf->pdev->dev,
6371 "couldn't get PF vsi config, err %s aq_err %s\n",
6372 i40e_stat_str(&pf->hw, ret),
6373 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6374 return;
6375 }
6376 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6377 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6378 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6379
6380 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6381 if (ret) {
6382 dev_info(&pf->pdev->dev,
6383 "update vsi switch failed, err %s aq_err %s\n",
6384 i40e_stat_str(&pf->hw, ret),
6385 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6386 }
6387 }
6388
6389 /**
6390 * i40e_disable_pf_switch_lb
6391 * @pf: pointer to the PF structure
6392 *
6393 * disable switch loop back or die - no point in a return value
6394 **/
6395 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6396 {
6397 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6398 struct i40e_vsi_context ctxt;
6399 int ret;
6400
6401 ctxt.seid = pf->main_vsi_seid;
6402 ctxt.pf_num = pf->hw.pf_id;
6403 ctxt.vf_num = 0;
6404 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6405 if (ret) {
6406 dev_info(&pf->pdev->dev,
6407 "couldn't get PF vsi config, err %s aq_err %s\n",
6408 i40e_stat_str(&pf->hw, ret),
6409 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6410 return;
6411 }
6412 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6413 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6414 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6415
6416 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6417 if (ret) {
6418 dev_info(&pf->pdev->dev,
6419 "update vsi switch failed, err %s aq_err %s\n",
6420 i40e_stat_str(&pf->hw, ret),
6421 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6422 }
6423 }
6424
6425 /**
6426 * i40e_config_bridge_mode - Configure the HW bridge mode
6427 * @veb: pointer to the bridge instance
6428 *
6429 * Configure the loop back mode for the LAN VSI that is downlink to the
6430 * specified HW bridge instance. It is expected this function is called
6431 * when a new HW bridge is instantiated.
6432 **/
6433 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6434 {
6435 struct i40e_pf *pf = veb->pf;
6436
6437 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6438 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6439 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6440 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6441 i40e_disable_pf_switch_lb(pf);
6442 else
6443 i40e_enable_pf_switch_lb(pf);
6444 }
6445
6446 /**
6447 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6448 * @veb: pointer to the VEB instance
6449 *
6450 * This is a recursive function that first builds the attached VSIs then
6451 * recurses in to build the next layer of VEB. We track the connections
6452 * through our own index numbers because the seid's from the HW could
6453 * change across the reset.
6454 **/
6455 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6456 {
6457 struct i40e_vsi *ctl_vsi = NULL;
6458 struct i40e_pf *pf = veb->pf;
6459 int v, veb_idx;
6460 int ret;
6461
6462 /* build VSI that owns this VEB, temporarily attached to base VEB */
6463 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6464 if (pf->vsi[v] &&
6465 pf->vsi[v]->veb_idx == veb->idx &&
6466 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6467 ctl_vsi = pf->vsi[v];
6468 break;
6469 }
6470 }
6471 if (!ctl_vsi) {
6472 dev_info(&pf->pdev->dev,
6473 "missing owner VSI for veb_idx %d\n", veb->idx);
6474 ret = -ENOENT;
6475 goto end_reconstitute;
6476 }
6477 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6478 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6479 ret = i40e_add_vsi(ctl_vsi);
6480 if (ret) {
6481 dev_info(&pf->pdev->dev,
6482 "rebuild of veb_idx %d owner VSI failed: %d\n",
6483 veb->idx, ret);
6484 goto end_reconstitute;
6485 }
6486 i40e_vsi_reset_stats(ctl_vsi);
6487
6488 /* create the VEB in the switch and move the VSI onto the VEB */
6489 ret = i40e_add_veb(veb, ctl_vsi);
6490 if (ret)
6491 goto end_reconstitute;
6492
6493 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6494 veb->bridge_mode = BRIDGE_MODE_VEB;
6495 else
6496 veb->bridge_mode = BRIDGE_MODE_VEPA;
6497 i40e_config_bridge_mode(veb);
6498
6499 /* create the remaining VSIs attached to this VEB */
6500 for (v = 0; v < pf->num_alloc_vsi; v++) {
6501 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6502 continue;
6503
6504 if (pf->vsi[v]->veb_idx == veb->idx) {
6505 struct i40e_vsi *vsi = pf->vsi[v];
6506
6507 vsi->uplink_seid = veb->seid;
6508 ret = i40e_add_vsi(vsi);
6509 if (ret) {
6510 dev_info(&pf->pdev->dev,
6511 "rebuild of vsi_idx %d failed: %d\n",
6512 v, ret);
6513 goto end_reconstitute;
6514 }
6515 i40e_vsi_reset_stats(vsi);
6516 }
6517 }
6518
6519 /* create any VEBs attached to this VEB - RECURSION */
6520 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6521 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6522 pf->veb[veb_idx]->uplink_seid = veb->seid;
6523 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6524 if (ret)
6525 break;
6526 }
6527 }
6528
6529 end_reconstitute:
6530 return ret;
6531 }
6532
6533 /**
6534 * i40e_get_capabilities - get info about the HW
6535 * @pf: the PF struct
6536 **/
6537 static int i40e_get_capabilities(struct i40e_pf *pf)
6538 {
6539 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6540 u16 data_size;
6541 int buf_len;
6542 int err;
6543
6544 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6545 do {
6546 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6547 if (!cap_buf)
6548 return -ENOMEM;
6549
6550 /* this loads the data into the hw struct for us */
6551 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6552 &data_size,
6553 i40e_aqc_opc_list_func_capabilities,
6554 NULL);
6555 /* data loaded, buffer no longer needed */
6556 kfree(cap_buf);
6557
6558 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6559 /* retry with a larger buffer */
6560 buf_len = data_size;
6561 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6562 dev_info(&pf->pdev->dev,
6563 "capability discovery failed, err %s aq_err %s\n",
6564 i40e_stat_str(&pf->hw, err),
6565 i40e_aq_str(&pf->hw,
6566 pf->hw.aq.asq_last_status));
6567 return -ENODEV;
6568 }
6569 } while (err);
6570
6571 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6572 dev_info(&pf->pdev->dev,
6573 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6574 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6575 pf->hw.func_caps.num_msix_vectors,
6576 pf->hw.func_caps.num_msix_vectors_vf,
6577 pf->hw.func_caps.fd_filters_guaranteed,
6578 pf->hw.func_caps.fd_filters_best_effort,
6579 pf->hw.func_caps.num_tx_qp,
6580 pf->hw.func_caps.num_vsis);
6581
6582 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6583 + pf->hw.func_caps.num_vfs)
6584 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6585 dev_info(&pf->pdev->dev,
6586 "got num_vsis %d, setting num_vsis to %d\n",
6587 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6588 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6589 }
6590
6591 return 0;
6592 }
6593
6594 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6595
6596 /**
6597 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6598 * @pf: board private structure
6599 **/
6600 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6601 {
6602 struct i40e_vsi *vsi;
6603 int i;
6604
6605 /* quick workaround for an NVM issue that leaves a critical register
6606 * uninitialized
6607 */
6608 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6609 static const u32 hkey[] = {
6610 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6611 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6612 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6613 0x95b3a76d};
6614
6615 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6616 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6617 }
6618
6619 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6620 return;
6621
6622 /* find existing VSI and see if it needs configuring */
6623 vsi = NULL;
6624 for (i = 0; i < pf->num_alloc_vsi; i++) {
6625 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6626 vsi = pf->vsi[i];
6627 break;
6628 }
6629 }
6630
6631 /* create a new VSI if none exists */
6632 if (!vsi) {
6633 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6634 pf->vsi[pf->lan_vsi]->seid, 0);
6635 if (!vsi) {
6636 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6637 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6638 return;
6639 }
6640 }
6641
6642 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6643 }
6644
6645 /**
6646 * i40e_fdir_teardown - release the Flow Director resources
6647 * @pf: board private structure
6648 **/
6649 static void i40e_fdir_teardown(struct i40e_pf *pf)
6650 {
6651 int i;
6652
6653 i40e_fdir_filter_exit(pf);
6654 for (i = 0; i < pf->num_alloc_vsi; i++) {
6655 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6656 i40e_vsi_release(pf->vsi[i]);
6657 break;
6658 }
6659 }
6660 }
6661
6662 /**
6663 * i40e_prep_for_reset - prep for the core to reset
6664 * @pf: board private structure
6665 *
6666 * Close up the VFs and other things in prep for PF Reset.
6667 **/
6668 static void i40e_prep_for_reset(struct i40e_pf *pf)
6669 {
6670 struct i40e_hw *hw = &pf->hw;
6671 i40e_status ret = 0;
6672 u32 v;
6673
6674 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6675 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6676 return;
6677 if (i40e_check_asq_alive(&pf->hw))
6678 i40e_vc_notify_reset(pf);
6679
6680 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6681
6682 /* quiesce the VSIs and their queues that are not already DOWN */
6683 i40e_pf_quiesce_all_vsi(pf);
6684
6685 for (v = 0; v < pf->num_alloc_vsi; v++) {
6686 if (pf->vsi[v])
6687 pf->vsi[v]->seid = 0;
6688 }
6689
6690 i40e_shutdown_adminq(&pf->hw);
6691
6692 /* call shutdown HMC */
6693 if (hw->hmc.hmc_obj) {
6694 ret = i40e_shutdown_lan_hmc(hw);
6695 if (ret)
6696 dev_warn(&pf->pdev->dev,
6697 "shutdown_lan_hmc failed: %d\n", ret);
6698 }
6699 }
6700
6701 /**
6702 * i40e_send_version - update firmware with driver version
6703 * @pf: PF struct
6704 */
6705 static void i40e_send_version(struct i40e_pf *pf)
6706 {
6707 struct i40e_driver_version dv;
6708
6709 dv.major_version = DRV_VERSION_MAJOR;
6710 dv.minor_version = DRV_VERSION_MINOR;
6711 dv.build_version = DRV_VERSION_BUILD;
6712 dv.subbuild_version = 0;
6713 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6714 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6715 }
6716
6717 /**
6718 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6719 * @pf: board private structure
6720 * @reinit: if the Main VSI needs to re-initialized.
6721 **/
6722 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6723 {
6724 struct i40e_hw *hw = &pf->hw;
6725 u8 set_fc_aq_fail = 0;
6726 i40e_status ret;
6727 u32 val;
6728 u32 v;
6729
6730 /* Now we wait for GRST to settle out.
6731 * We don't have to delete the VEBs or VSIs from the hw switch
6732 * because the reset will make them disappear.
6733 */
6734 ret = i40e_pf_reset(hw);
6735 if (ret) {
6736 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6737 set_bit(__I40E_RESET_FAILED, &pf->state);
6738 goto clear_recovery;
6739 }
6740 pf->pfr_count++;
6741
6742 if (test_bit(__I40E_DOWN, &pf->state))
6743 goto clear_recovery;
6744 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6745
6746 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6747 ret = i40e_init_adminq(&pf->hw);
6748 if (ret) {
6749 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6750 i40e_stat_str(&pf->hw, ret),
6751 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6752 goto clear_recovery;
6753 }
6754
6755 /* re-verify the eeprom if we just had an EMP reset */
6756 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6757 i40e_verify_eeprom(pf);
6758
6759 i40e_clear_pxe_mode(hw);
6760 ret = i40e_get_capabilities(pf);
6761 if (ret)
6762 goto end_core_reset;
6763
6764 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6765 hw->func_caps.num_rx_qp,
6766 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6767 if (ret) {
6768 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6769 goto end_core_reset;
6770 }
6771 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6772 if (ret) {
6773 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6774 goto end_core_reset;
6775 }
6776
6777 #ifdef CONFIG_I40E_DCB
6778 ret = i40e_init_pf_dcb(pf);
6779 if (ret) {
6780 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6781 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6782 /* Continue without DCB enabled */
6783 }
6784 #endif /* CONFIG_I40E_DCB */
6785 #ifdef I40E_FCOE
6786 i40e_init_pf_fcoe(pf);
6787
6788 #endif
6789 /* do basic switch setup */
6790 ret = i40e_setup_pf_switch(pf, reinit);
6791 if (ret)
6792 goto end_core_reset;
6793
6794 /* The driver only wants link up/down and module qualification
6795 * reports from firmware. Note the negative logic.
6796 */
6797 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6798 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6799 I40E_AQ_EVENT_MEDIA_NA |
6800 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6801 if (ret)
6802 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6803 i40e_stat_str(&pf->hw, ret),
6804 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6805
6806 /* make sure our flow control settings are restored */
6807 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6808 if (ret)
6809 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6810 i40e_stat_str(&pf->hw, ret),
6811 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6812
6813 /* Rebuild the VSIs and VEBs that existed before reset.
6814 * They are still in our local switch element arrays, so only
6815 * need to rebuild the switch model in the HW.
6816 *
6817 * If there were VEBs but the reconstitution failed, we'll try
6818 * try to recover minimal use by getting the basic PF VSI working.
6819 */
6820 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6821 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6822 /* find the one VEB connected to the MAC, and find orphans */
6823 for (v = 0; v < I40E_MAX_VEB; v++) {
6824 if (!pf->veb[v])
6825 continue;
6826
6827 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6828 pf->veb[v]->uplink_seid == 0) {
6829 ret = i40e_reconstitute_veb(pf->veb[v]);
6830
6831 if (!ret)
6832 continue;
6833
6834 /* If Main VEB failed, we're in deep doodoo,
6835 * so give up rebuilding the switch and set up
6836 * for minimal rebuild of PF VSI.
6837 * If orphan failed, we'll report the error
6838 * but try to keep going.
6839 */
6840 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6841 dev_info(&pf->pdev->dev,
6842 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6843 ret);
6844 pf->vsi[pf->lan_vsi]->uplink_seid
6845 = pf->mac_seid;
6846 break;
6847 } else if (pf->veb[v]->uplink_seid == 0) {
6848 dev_info(&pf->pdev->dev,
6849 "rebuild of orphan VEB failed: %d\n",
6850 ret);
6851 }
6852 }
6853 }
6854 }
6855
6856 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6857 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6858 /* no VEB, so rebuild only the Main VSI */
6859 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6860 if (ret) {
6861 dev_info(&pf->pdev->dev,
6862 "rebuild of Main VSI failed: %d\n", ret);
6863 goto end_core_reset;
6864 }
6865 }
6866
6867 /* Reconfigure hardware for allowing smaller MSS in the case
6868 * of TSO, so that we avoid the MDD being fired and causing
6869 * a reset in the case of small MSS+TSO.
6870 */
6871 #define I40E_REG_MSS 0x000E64DC
6872 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6873 #define I40E_64BYTE_MSS 0x400000
6874 val = rd32(hw, I40E_REG_MSS);
6875 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6876 val &= ~I40E_REG_MSS_MIN_MASK;
6877 val |= I40E_64BYTE_MSS;
6878 wr32(hw, I40E_REG_MSS, val);
6879 }
6880
6881 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6882 msleep(75);
6883 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6884 if (ret)
6885 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6886 i40e_stat_str(&pf->hw, ret),
6887 i40e_aq_str(&pf->hw,
6888 pf->hw.aq.asq_last_status));
6889 }
6890 /* reinit the misc interrupt */
6891 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6892 ret = i40e_setup_misc_vector(pf);
6893
6894 /* Add a filter to drop all Flow control frames from any VSI from being
6895 * transmitted. By doing so we stop a malicious VF from sending out
6896 * PAUSE or PFC frames and potentially controlling traffic for other
6897 * PF/VF VSIs.
6898 * The FW can still send Flow control frames if enabled.
6899 */
6900 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6901 pf->main_vsi_seid);
6902
6903 /* restart the VSIs that were rebuilt and running before the reset */
6904 i40e_pf_unquiesce_all_vsi(pf);
6905
6906 if (pf->num_alloc_vfs) {
6907 for (v = 0; v < pf->num_alloc_vfs; v++)
6908 i40e_reset_vf(&pf->vf[v], true);
6909 }
6910
6911 /* tell the firmware that we're starting */
6912 i40e_send_version(pf);
6913
6914 end_core_reset:
6915 clear_bit(__I40E_RESET_FAILED, &pf->state);
6916 clear_recovery:
6917 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6918 }
6919
6920 /**
6921 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6922 * @pf: board private structure
6923 *
6924 * Close up the VFs and other things in prep for a Core Reset,
6925 * then get ready to rebuild the world.
6926 **/
6927 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6928 {
6929 i40e_prep_for_reset(pf);
6930 i40e_reset_and_rebuild(pf, false);
6931 }
6932
6933 /**
6934 * i40e_handle_mdd_event
6935 * @pf: pointer to the PF structure
6936 *
6937 * Called from the MDD irq handler to identify possibly malicious vfs
6938 **/
6939 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6940 {
6941 struct i40e_hw *hw = &pf->hw;
6942 bool mdd_detected = false;
6943 bool pf_mdd_detected = false;
6944 struct i40e_vf *vf;
6945 u32 reg;
6946 int i;
6947
6948 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6949 return;
6950
6951 /* find what triggered the MDD event */
6952 reg = rd32(hw, I40E_GL_MDET_TX);
6953 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6954 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6955 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6956 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6957 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6958 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6959 I40E_GL_MDET_TX_EVENT_SHIFT;
6960 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6961 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6962 pf->hw.func_caps.base_queue;
6963 if (netif_msg_tx_err(pf))
6964 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6965 event, queue, pf_num, vf_num);
6966 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6967 mdd_detected = true;
6968 }
6969 reg = rd32(hw, I40E_GL_MDET_RX);
6970 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6971 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6972 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6973 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6974 I40E_GL_MDET_RX_EVENT_SHIFT;
6975 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6976 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6977 pf->hw.func_caps.base_queue;
6978 if (netif_msg_rx_err(pf))
6979 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6980 event, queue, func);
6981 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6982 mdd_detected = true;
6983 }
6984
6985 if (mdd_detected) {
6986 reg = rd32(hw, I40E_PF_MDET_TX);
6987 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6988 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6989 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6990 pf_mdd_detected = true;
6991 }
6992 reg = rd32(hw, I40E_PF_MDET_RX);
6993 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6994 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6995 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6996 pf_mdd_detected = true;
6997 }
6998 /* Queue belongs to the PF, initiate a reset */
6999 if (pf_mdd_detected) {
7000 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7001 i40e_service_event_schedule(pf);
7002 }
7003 }
7004
7005 /* see if one of the VFs needs its hand slapped */
7006 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7007 vf = &(pf->vf[i]);
7008 reg = rd32(hw, I40E_VP_MDET_TX(i));
7009 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7010 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7011 vf->num_mdd_events++;
7012 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7013 i);
7014 }
7015
7016 reg = rd32(hw, I40E_VP_MDET_RX(i));
7017 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7018 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7019 vf->num_mdd_events++;
7020 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7021 i);
7022 }
7023
7024 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7025 dev_info(&pf->pdev->dev,
7026 "Too many MDD events on VF %d, disabled\n", i);
7027 dev_info(&pf->pdev->dev,
7028 "Use PF Control I/F to re-enable the VF\n");
7029 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7030 }
7031 }
7032
7033 /* re-enable mdd interrupt cause */
7034 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7035 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7036 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7037 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7038 i40e_flush(hw);
7039 }
7040
7041 /**
7042 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7043 * @pf: board private structure
7044 **/
7045 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7046 {
7047 struct i40e_hw *hw = &pf->hw;
7048 i40e_status ret;
7049 __be16 port;
7050 int i;
7051
7052 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7053 return;
7054
7055 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7056
7057 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7058 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7059 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7060 port = pf->udp_ports[i].index;
7061 if (port)
7062 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
7063 pf->udp_ports[i].type,
7064 NULL, NULL);
7065 else
7066 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7067
7068 if (ret) {
7069 dev_dbg(&pf->pdev->dev,
7070 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7071 pf->udp_ports[i].type ? "vxlan" : "geneve",
7072 port ? "add" : "delete",
7073 ntohs(port), i,
7074 i40e_stat_str(&pf->hw, ret),
7075 i40e_aq_str(&pf->hw,
7076 pf->hw.aq.asq_last_status));
7077 pf->udp_ports[i].index = 0;
7078 }
7079 }
7080 }
7081 }
7082
7083 /**
7084 * i40e_service_task - Run the driver's async subtasks
7085 * @work: pointer to work_struct containing our data
7086 **/
7087 static void i40e_service_task(struct work_struct *work)
7088 {
7089 struct i40e_pf *pf = container_of(work,
7090 struct i40e_pf,
7091 service_task);
7092 unsigned long start_time = jiffies;
7093
7094 /* don't bother with service tasks if a reset is in progress */
7095 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7096 i40e_service_event_complete(pf);
7097 return;
7098 }
7099
7100 i40e_detect_recover_hung(pf);
7101 i40e_sync_filters_subtask(pf);
7102 i40e_reset_subtask(pf);
7103 i40e_handle_mdd_event(pf);
7104 i40e_vc_process_vflr_event(pf);
7105 i40e_watchdog_subtask(pf);
7106 i40e_fdir_reinit_subtask(pf);
7107 i40e_client_subtask(pf);
7108 i40e_sync_filters_subtask(pf);
7109 i40e_sync_udp_filters_subtask(pf);
7110 i40e_clean_adminq_subtask(pf);
7111
7112 i40e_service_event_complete(pf);
7113
7114 /* If the tasks have taken longer than one timer cycle or there
7115 * is more work to be done, reschedule the service task now
7116 * rather than wait for the timer to tick again.
7117 */
7118 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7119 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7120 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7121 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7122 i40e_service_event_schedule(pf);
7123 }
7124
7125 /**
7126 * i40e_service_timer - timer callback
7127 * @data: pointer to PF struct
7128 **/
7129 static void i40e_service_timer(unsigned long data)
7130 {
7131 struct i40e_pf *pf = (struct i40e_pf *)data;
7132
7133 mod_timer(&pf->service_timer,
7134 round_jiffies(jiffies + pf->service_timer_period));
7135 i40e_service_event_schedule(pf);
7136 }
7137
7138 /**
7139 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7140 * @vsi: the VSI being configured
7141 **/
7142 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7143 {
7144 struct i40e_pf *pf = vsi->back;
7145
7146 switch (vsi->type) {
7147 case I40E_VSI_MAIN:
7148 vsi->alloc_queue_pairs = pf->num_lan_qps;
7149 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7150 I40E_REQ_DESCRIPTOR_MULTIPLE);
7151 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7152 vsi->num_q_vectors = pf->num_lan_msix;
7153 else
7154 vsi->num_q_vectors = 1;
7155
7156 break;
7157
7158 case I40E_VSI_FDIR:
7159 vsi->alloc_queue_pairs = 1;
7160 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7161 I40E_REQ_DESCRIPTOR_MULTIPLE);
7162 vsi->num_q_vectors = 1;
7163 break;
7164
7165 case I40E_VSI_VMDQ2:
7166 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7167 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7168 I40E_REQ_DESCRIPTOR_MULTIPLE);
7169 vsi->num_q_vectors = pf->num_vmdq_msix;
7170 break;
7171
7172 case I40E_VSI_SRIOV:
7173 vsi->alloc_queue_pairs = pf->num_vf_qps;
7174 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7175 I40E_REQ_DESCRIPTOR_MULTIPLE);
7176 break;
7177
7178 #ifdef I40E_FCOE
7179 case I40E_VSI_FCOE:
7180 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7181 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7182 I40E_REQ_DESCRIPTOR_MULTIPLE);
7183 vsi->num_q_vectors = pf->num_fcoe_msix;
7184 break;
7185
7186 #endif /* I40E_FCOE */
7187 default:
7188 WARN_ON(1);
7189 return -ENODATA;
7190 }
7191
7192 return 0;
7193 }
7194
7195 /**
7196 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7197 * @type: VSI pointer
7198 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7199 *
7200 * On error: returns error code (negative)
7201 * On success: returns 0
7202 **/
7203 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7204 {
7205 int size;
7206 int ret = 0;
7207
7208 /* allocate memory for both Tx and Rx ring pointers */
7209 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7210 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7211 if (!vsi->tx_rings)
7212 return -ENOMEM;
7213 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7214
7215 if (alloc_qvectors) {
7216 /* allocate memory for q_vector pointers */
7217 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7218 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7219 if (!vsi->q_vectors) {
7220 ret = -ENOMEM;
7221 goto err_vectors;
7222 }
7223 }
7224 return ret;
7225
7226 err_vectors:
7227 kfree(vsi->tx_rings);
7228 return ret;
7229 }
7230
7231 /**
7232 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7233 * @pf: board private structure
7234 * @type: type of VSI
7235 *
7236 * On error: returns error code (negative)
7237 * On success: returns vsi index in PF (positive)
7238 **/
7239 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7240 {
7241 int ret = -ENODEV;
7242 struct i40e_vsi *vsi;
7243 int vsi_idx;
7244 int i;
7245
7246 /* Need to protect the allocation of the VSIs at the PF level */
7247 mutex_lock(&pf->switch_mutex);
7248
7249 /* VSI list may be fragmented if VSI creation/destruction has
7250 * been happening. We can afford to do a quick scan to look
7251 * for any free VSIs in the list.
7252 *
7253 * find next empty vsi slot, looping back around if necessary
7254 */
7255 i = pf->next_vsi;
7256 while (i < pf->num_alloc_vsi && pf->vsi[i])
7257 i++;
7258 if (i >= pf->num_alloc_vsi) {
7259 i = 0;
7260 while (i < pf->next_vsi && pf->vsi[i])
7261 i++;
7262 }
7263
7264 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7265 vsi_idx = i; /* Found one! */
7266 } else {
7267 ret = -ENODEV;
7268 goto unlock_pf; /* out of VSI slots! */
7269 }
7270 pf->next_vsi = ++i;
7271
7272 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7273 if (!vsi) {
7274 ret = -ENOMEM;
7275 goto unlock_pf;
7276 }
7277 vsi->type = type;
7278 vsi->back = pf;
7279 set_bit(__I40E_DOWN, &vsi->state);
7280 vsi->flags = 0;
7281 vsi->idx = vsi_idx;
7282 vsi->int_rate_limit = 0;
7283 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7284 pf->rss_table_size : 64;
7285 vsi->netdev_registered = false;
7286 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7287 INIT_LIST_HEAD(&vsi->mac_filter_list);
7288 vsi->irqs_ready = false;
7289
7290 ret = i40e_set_num_rings_in_vsi(vsi);
7291 if (ret)
7292 goto err_rings;
7293
7294 ret = i40e_vsi_alloc_arrays(vsi, true);
7295 if (ret)
7296 goto err_rings;
7297
7298 /* Setup default MSIX irq handler for VSI */
7299 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7300
7301 /* Initialize VSI lock */
7302 spin_lock_init(&vsi->mac_filter_list_lock);
7303 pf->vsi[vsi_idx] = vsi;
7304 ret = vsi_idx;
7305 goto unlock_pf;
7306
7307 err_rings:
7308 pf->next_vsi = i - 1;
7309 kfree(vsi);
7310 unlock_pf:
7311 mutex_unlock(&pf->switch_mutex);
7312 return ret;
7313 }
7314
7315 /**
7316 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7317 * @type: VSI pointer
7318 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7319 *
7320 * On error: returns error code (negative)
7321 * On success: returns 0
7322 **/
7323 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7324 {
7325 /* free the ring and vector containers */
7326 if (free_qvectors) {
7327 kfree(vsi->q_vectors);
7328 vsi->q_vectors = NULL;
7329 }
7330 kfree(vsi->tx_rings);
7331 vsi->tx_rings = NULL;
7332 vsi->rx_rings = NULL;
7333 }
7334
7335 /**
7336 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7337 * and lookup table
7338 * @vsi: Pointer to VSI structure
7339 */
7340 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7341 {
7342 if (!vsi)
7343 return;
7344
7345 kfree(vsi->rss_hkey_user);
7346 vsi->rss_hkey_user = NULL;
7347
7348 kfree(vsi->rss_lut_user);
7349 vsi->rss_lut_user = NULL;
7350 }
7351
7352 /**
7353 * i40e_vsi_clear - Deallocate the VSI provided
7354 * @vsi: the VSI being un-configured
7355 **/
7356 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7357 {
7358 struct i40e_pf *pf;
7359
7360 if (!vsi)
7361 return 0;
7362
7363 if (!vsi->back)
7364 goto free_vsi;
7365 pf = vsi->back;
7366
7367 mutex_lock(&pf->switch_mutex);
7368 if (!pf->vsi[vsi->idx]) {
7369 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7370 vsi->idx, vsi->idx, vsi, vsi->type);
7371 goto unlock_vsi;
7372 }
7373
7374 if (pf->vsi[vsi->idx] != vsi) {
7375 dev_err(&pf->pdev->dev,
7376 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7377 pf->vsi[vsi->idx]->idx,
7378 pf->vsi[vsi->idx],
7379 pf->vsi[vsi->idx]->type,
7380 vsi->idx, vsi, vsi->type);
7381 goto unlock_vsi;
7382 }
7383
7384 /* updates the PF for this cleared vsi */
7385 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7386 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7387
7388 i40e_vsi_free_arrays(vsi, true);
7389 i40e_clear_rss_config_user(vsi);
7390
7391 pf->vsi[vsi->idx] = NULL;
7392 if (vsi->idx < pf->next_vsi)
7393 pf->next_vsi = vsi->idx;
7394
7395 unlock_vsi:
7396 mutex_unlock(&pf->switch_mutex);
7397 free_vsi:
7398 kfree(vsi);
7399
7400 return 0;
7401 }
7402
7403 /**
7404 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7405 * @vsi: the VSI being cleaned
7406 **/
7407 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7408 {
7409 int i;
7410
7411 if (vsi->tx_rings && vsi->tx_rings[0]) {
7412 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7413 kfree_rcu(vsi->tx_rings[i], rcu);
7414 vsi->tx_rings[i] = NULL;
7415 vsi->rx_rings[i] = NULL;
7416 }
7417 }
7418 }
7419
7420 /**
7421 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7422 * @vsi: the VSI being configured
7423 **/
7424 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7425 {
7426 struct i40e_ring *tx_ring, *rx_ring;
7427 struct i40e_pf *pf = vsi->back;
7428 int i;
7429
7430 /* Set basic values in the rings to be used later during open() */
7431 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7432 /* allocate space for both Tx and Rx in one shot */
7433 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7434 if (!tx_ring)
7435 goto err_out;
7436
7437 tx_ring->queue_index = i;
7438 tx_ring->reg_idx = vsi->base_queue + i;
7439 tx_ring->ring_active = false;
7440 tx_ring->vsi = vsi;
7441 tx_ring->netdev = vsi->netdev;
7442 tx_ring->dev = &pf->pdev->dev;
7443 tx_ring->count = vsi->num_desc;
7444 tx_ring->size = 0;
7445 tx_ring->dcb_tc = 0;
7446 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7447 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7448 tx_ring->tx_itr_setting = pf->tx_itr_default;
7449 vsi->tx_rings[i] = tx_ring;
7450
7451 rx_ring = &tx_ring[1];
7452 rx_ring->queue_index = i;
7453 rx_ring->reg_idx = vsi->base_queue + i;
7454 rx_ring->ring_active = false;
7455 rx_ring->vsi = vsi;
7456 rx_ring->netdev = vsi->netdev;
7457 rx_ring->dev = &pf->pdev->dev;
7458 rx_ring->count = vsi->num_desc;
7459 rx_ring->size = 0;
7460 rx_ring->dcb_tc = 0;
7461 rx_ring->rx_itr_setting = pf->rx_itr_default;
7462 vsi->rx_rings[i] = rx_ring;
7463 }
7464
7465 return 0;
7466
7467 err_out:
7468 i40e_vsi_clear_rings(vsi);
7469 return -ENOMEM;
7470 }
7471
7472 /**
7473 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7474 * @pf: board private structure
7475 * @vectors: the number of MSI-X vectors to request
7476 *
7477 * Returns the number of vectors reserved, or error
7478 **/
7479 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7480 {
7481 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7482 I40E_MIN_MSIX, vectors);
7483 if (vectors < 0) {
7484 dev_info(&pf->pdev->dev,
7485 "MSI-X vector reservation failed: %d\n", vectors);
7486 vectors = 0;
7487 }
7488
7489 return vectors;
7490 }
7491
7492 /**
7493 * i40e_init_msix - Setup the MSIX capability
7494 * @pf: board private structure
7495 *
7496 * Work with the OS to set up the MSIX vectors needed.
7497 *
7498 * Returns the number of vectors reserved or negative on failure
7499 **/
7500 static int i40e_init_msix(struct i40e_pf *pf)
7501 {
7502 struct i40e_hw *hw = &pf->hw;
7503 int vectors_left;
7504 int v_budget, i;
7505 int v_actual;
7506 int iwarp_requested = 0;
7507
7508 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7509 return -ENODEV;
7510
7511 /* The number of vectors we'll request will be comprised of:
7512 * - Add 1 for "other" cause for Admin Queue events, etc.
7513 * - The number of LAN queue pairs
7514 * - Queues being used for RSS.
7515 * We don't need as many as max_rss_size vectors.
7516 * use rss_size instead in the calculation since that
7517 * is governed by number of cpus in the system.
7518 * - assumes symmetric Tx/Rx pairing
7519 * - The number of VMDq pairs
7520 * - The CPU count within the NUMA node if iWARP is enabled
7521 #ifdef I40E_FCOE
7522 * - The number of FCOE qps.
7523 #endif
7524 * Once we count this up, try the request.
7525 *
7526 * If we can't get what we want, we'll simplify to nearly nothing
7527 * and try again. If that still fails, we punt.
7528 */
7529 vectors_left = hw->func_caps.num_msix_vectors;
7530 v_budget = 0;
7531
7532 /* reserve one vector for miscellaneous handler */
7533 if (vectors_left) {
7534 v_budget++;
7535 vectors_left--;
7536 }
7537
7538 /* reserve vectors for the main PF traffic queues */
7539 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7540 vectors_left -= pf->num_lan_msix;
7541 v_budget += pf->num_lan_msix;
7542
7543 /* reserve one vector for sideband flow director */
7544 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7545 if (vectors_left) {
7546 v_budget++;
7547 vectors_left--;
7548 } else {
7549 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7550 }
7551 }
7552
7553 #ifdef I40E_FCOE
7554 /* can we reserve enough for FCoE? */
7555 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7556 if (!vectors_left)
7557 pf->num_fcoe_msix = 0;
7558 else if (vectors_left >= pf->num_fcoe_qps)
7559 pf->num_fcoe_msix = pf->num_fcoe_qps;
7560 else
7561 pf->num_fcoe_msix = 1;
7562 v_budget += pf->num_fcoe_msix;
7563 vectors_left -= pf->num_fcoe_msix;
7564 }
7565
7566 #endif
7567 /* can we reserve enough for iWARP? */
7568 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7569 if (!vectors_left)
7570 pf->num_iwarp_msix = 0;
7571 else if (vectors_left < pf->num_iwarp_msix)
7572 pf->num_iwarp_msix = 1;
7573 v_budget += pf->num_iwarp_msix;
7574 vectors_left -= pf->num_iwarp_msix;
7575 }
7576
7577 /* any vectors left over go for VMDq support */
7578 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7579 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7580 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7581
7582 /* if we're short on vectors for what's desired, we limit
7583 * the queues per vmdq. If this is still more than are
7584 * available, the user will need to change the number of
7585 * queues/vectors used by the PF later with the ethtool
7586 * channels command
7587 */
7588 if (vmdq_vecs < vmdq_vecs_wanted)
7589 pf->num_vmdq_qps = 1;
7590 pf->num_vmdq_msix = pf->num_vmdq_qps;
7591
7592 v_budget += vmdq_vecs;
7593 vectors_left -= vmdq_vecs;
7594 }
7595
7596 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7597 GFP_KERNEL);
7598 if (!pf->msix_entries)
7599 return -ENOMEM;
7600
7601 for (i = 0; i < v_budget; i++)
7602 pf->msix_entries[i].entry = i;
7603 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7604
7605 if (v_actual != v_budget) {
7606 /* If we have limited resources, we will start with no vectors
7607 * for the special features and then allocate vectors to some
7608 * of these features based on the policy and at the end disable
7609 * the features that did not get any vectors.
7610 */
7611 iwarp_requested = pf->num_iwarp_msix;
7612 pf->num_iwarp_msix = 0;
7613 #ifdef I40E_FCOE
7614 pf->num_fcoe_qps = 0;
7615 pf->num_fcoe_msix = 0;
7616 #endif
7617 pf->num_vmdq_msix = 0;
7618 }
7619
7620 if (v_actual < I40E_MIN_MSIX) {
7621 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7622 kfree(pf->msix_entries);
7623 pf->msix_entries = NULL;
7624 return -ENODEV;
7625
7626 } else if (v_actual == I40E_MIN_MSIX) {
7627 /* Adjust for minimal MSIX use */
7628 pf->num_vmdq_vsis = 0;
7629 pf->num_vmdq_qps = 0;
7630 pf->num_lan_qps = 1;
7631 pf->num_lan_msix = 1;
7632
7633 } else if (v_actual != v_budget) {
7634 int vec;
7635
7636 /* reserve the misc vector */
7637 vec = v_actual - 1;
7638
7639 /* Scale vector usage down */
7640 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7641 pf->num_vmdq_vsis = 1;
7642 pf->num_vmdq_qps = 1;
7643 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7644
7645 /* partition out the remaining vectors */
7646 switch (vec) {
7647 case 2:
7648 pf->num_lan_msix = 1;
7649 break;
7650 case 3:
7651 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7652 pf->num_lan_msix = 1;
7653 pf->num_iwarp_msix = 1;
7654 } else {
7655 pf->num_lan_msix = 2;
7656 }
7657 #ifdef I40E_FCOE
7658 /* give one vector to FCoE */
7659 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7660 pf->num_lan_msix = 1;
7661 pf->num_fcoe_msix = 1;
7662 }
7663 #endif
7664 break;
7665 default:
7666 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7667 pf->num_iwarp_msix = min_t(int, (vec / 3),
7668 iwarp_requested);
7669 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7670 I40E_DEFAULT_NUM_VMDQ_VSI);
7671 } else {
7672 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7673 I40E_DEFAULT_NUM_VMDQ_VSI);
7674 }
7675 pf->num_lan_msix = min_t(int,
7676 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7677 pf->num_lan_msix);
7678 #ifdef I40E_FCOE
7679 /* give one vector to FCoE */
7680 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7681 pf->num_fcoe_msix = 1;
7682 vec--;
7683 }
7684 #endif
7685 break;
7686 }
7687 }
7688
7689 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7690 (pf->num_vmdq_msix == 0)) {
7691 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7692 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7693 }
7694
7695 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7696 (pf->num_iwarp_msix == 0)) {
7697 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7698 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7699 }
7700 #ifdef I40E_FCOE
7701
7702 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7703 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7704 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7705 }
7706 #endif
7707 return v_actual;
7708 }
7709
7710 /**
7711 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7712 * @vsi: the VSI being configured
7713 * @v_idx: index of the vector in the vsi struct
7714 *
7715 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7716 **/
7717 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7718 {
7719 struct i40e_q_vector *q_vector;
7720
7721 /* allocate q_vector */
7722 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7723 if (!q_vector)
7724 return -ENOMEM;
7725
7726 q_vector->vsi = vsi;
7727 q_vector->v_idx = v_idx;
7728 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7729 if (vsi->netdev)
7730 netif_napi_add(vsi->netdev, &q_vector->napi,
7731 i40e_napi_poll, NAPI_POLL_WEIGHT);
7732
7733 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7734 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7735
7736 /* tie q_vector and vsi together */
7737 vsi->q_vectors[v_idx] = q_vector;
7738
7739 return 0;
7740 }
7741
7742 /**
7743 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7744 * @vsi: the VSI being configured
7745 *
7746 * We allocate one q_vector per queue interrupt. If allocation fails we
7747 * return -ENOMEM.
7748 **/
7749 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7750 {
7751 struct i40e_pf *pf = vsi->back;
7752 int v_idx, num_q_vectors;
7753 int err;
7754
7755 /* if not MSIX, give the one vector only to the LAN VSI */
7756 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7757 num_q_vectors = vsi->num_q_vectors;
7758 else if (vsi == pf->vsi[pf->lan_vsi])
7759 num_q_vectors = 1;
7760 else
7761 return -EINVAL;
7762
7763 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7764 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7765 if (err)
7766 goto err_out;
7767 }
7768
7769 return 0;
7770
7771 err_out:
7772 while (v_idx--)
7773 i40e_free_q_vector(vsi, v_idx);
7774
7775 return err;
7776 }
7777
7778 /**
7779 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7780 * @pf: board private structure to initialize
7781 **/
7782 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7783 {
7784 int vectors = 0;
7785 ssize_t size;
7786
7787 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7788 vectors = i40e_init_msix(pf);
7789 if (vectors < 0) {
7790 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7791 I40E_FLAG_IWARP_ENABLED |
7792 #ifdef I40E_FCOE
7793 I40E_FLAG_FCOE_ENABLED |
7794 #endif
7795 I40E_FLAG_RSS_ENABLED |
7796 I40E_FLAG_DCB_CAPABLE |
7797 I40E_FLAG_SRIOV_ENABLED |
7798 I40E_FLAG_FD_SB_ENABLED |
7799 I40E_FLAG_FD_ATR_ENABLED |
7800 I40E_FLAG_VMDQ_ENABLED);
7801
7802 /* rework the queue expectations without MSIX */
7803 i40e_determine_queue_usage(pf);
7804 }
7805 }
7806
7807 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7808 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7809 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7810 vectors = pci_enable_msi(pf->pdev);
7811 if (vectors < 0) {
7812 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7813 vectors);
7814 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7815 }
7816 vectors = 1; /* one MSI or Legacy vector */
7817 }
7818
7819 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7820 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7821
7822 /* set up vector assignment tracking */
7823 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7824 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7825 if (!pf->irq_pile) {
7826 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7827 return -ENOMEM;
7828 }
7829 pf->irq_pile->num_entries = vectors;
7830 pf->irq_pile->search_hint = 0;
7831
7832 /* track first vector for misc interrupts, ignore return */
7833 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7834
7835 return 0;
7836 }
7837
7838 /**
7839 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7840 * @pf: board private structure
7841 *
7842 * This sets up the handler for MSIX 0, which is used to manage the
7843 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7844 * when in MSI or Legacy interrupt mode.
7845 **/
7846 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7847 {
7848 struct i40e_hw *hw = &pf->hw;
7849 int err = 0;
7850
7851 /* Only request the irq if this is the first time through, and
7852 * not when we're rebuilding after a Reset
7853 */
7854 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7855 err = request_irq(pf->msix_entries[0].vector,
7856 i40e_intr, 0, pf->int_name, pf);
7857 if (err) {
7858 dev_info(&pf->pdev->dev,
7859 "request_irq for %s failed: %d\n",
7860 pf->int_name, err);
7861 return -EFAULT;
7862 }
7863 }
7864
7865 i40e_enable_misc_int_causes(pf);
7866
7867 /* associate no queues to the misc vector */
7868 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7869 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7870
7871 i40e_flush(hw);
7872
7873 i40e_irq_dynamic_enable_icr0(pf, true);
7874
7875 return err;
7876 }
7877
7878 /**
7879 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7880 * @vsi: vsi structure
7881 * @seed: RSS hash seed
7882 **/
7883 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7884 u8 *lut, u16 lut_size)
7885 {
7886 struct i40e_aqc_get_set_rss_key_data rss_key;
7887 struct i40e_pf *pf = vsi->back;
7888 struct i40e_hw *hw = &pf->hw;
7889 bool pf_lut = false;
7890 u8 *rss_lut;
7891 int ret, i;
7892
7893 memset(&rss_key, 0, sizeof(rss_key));
7894 memcpy(&rss_key, seed, sizeof(rss_key));
7895
7896 rss_lut = kzalloc(pf->rss_table_size, GFP_KERNEL);
7897 if (!rss_lut)
7898 return -ENOMEM;
7899
7900 /* Populate the LUT with max no. of queues in round robin fashion */
7901 for (i = 0; i < vsi->rss_table_size; i++)
7902 rss_lut[i] = i % vsi->rss_size;
7903
7904 ret = i40e_aq_set_rss_key(hw, vsi->id, &rss_key);
7905 if (ret) {
7906 dev_info(&pf->pdev->dev,
7907 "Cannot set RSS key, err %s aq_err %s\n",
7908 i40e_stat_str(&pf->hw, ret),
7909 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7910 goto config_rss_aq_out;
7911 }
7912
7913 if (vsi->type == I40E_VSI_MAIN)
7914 pf_lut = true;
7915
7916 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, rss_lut,
7917 vsi->rss_table_size);
7918 if (ret)
7919 dev_info(&pf->pdev->dev,
7920 "Cannot set RSS lut, err %s aq_err %s\n",
7921 i40e_stat_str(&pf->hw, ret),
7922 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7923
7924 config_rss_aq_out:
7925 kfree(rss_lut);
7926 return ret;
7927 }
7928
7929 /**
7930 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
7931 * @vsi: VSI structure
7932 **/
7933 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
7934 {
7935 u8 seed[I40E_HKEY_ARRAY_SIZE];
7936 struct i40e_pf *pf = vsi->back;
7937 u8 *lut;
7938 int ret;
7939
7940 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
7941 return 0;
7942
7943 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
7944 if (!lut)
7945 return -ENOMEM;
7946
7947 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
7948 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
7949 vsi->rss_size = min_t(int, pf->alloc_rss_size, vsi->num_queue_pairs);
7950 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
7951 kfree(lut);
7952
7953 return ret;
7954 }
7955
7956 /**
7957 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
7958 * @vsi: Pointer to vsi structure
7959 * @seed: Buffter to store the hash keys
7960 * @lut: Buffer to store the lookup table entries
7961 * @lut_size: Size of buffer to store the lookup table entries
7962 *
7963 * Return 0 on success, negative on failure
7964 */
7965 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7966 u8 *lut, u16 lut_size)
7967 {
7968 struct i40e_pf *pf = vsi->back;
7969 struct i40e_hw *hw = &pf->hw;
7970 int ret = 0;
7971
7972 if (seed) {
7973 ret = i40e_aq_get_rss_key(hw, vsi->id,
7974 (struct i40e_aqc_get_set_rss_key_data *)seed);
7975 if (ret) {
7976 dev_info(&pf->pdev->dev,
7977 "Cannot get RSS key, err %s aq_err %s\n",
7978 i40e_stat_str(&pf->hw, ret),
7979 i40e_aq_str(&pf->hw,
7980 pf->hw.aq.asq_last_status));
7981 return ret;
7982 }
7983 }
7984
7985 if (lut) {
7986 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
7987
7988 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
7989 if (ret) {
7990 dev_info(&pf->pdev->dev,
7991 "Cannot get RSS lut, err %s aq_err %s\n",
7992 i40e_stat_str(&pf->hw, ret),
7993 i40e_aq_str(&pf->hw,
7994 pf->hw.aq.asq_last_status));
7995 return ret;
7996 }
7997 }
7998
7999 return ret;
8000 }
8001
8002 /**
8003 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8004 * @vsi: Pointer to vsi structure
8005 * @seed: RSS hash seed
8006 * @lut: Lookup table
8007 * @lut_size: Lookup table size
8008 *
8009 * Returns 0 on success, negative on failure
8010 **/
8011 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8012 const u8 *lut, u16 lut_size)
8013 {
8014 struct i40e_pf *pf = vsi->back;
8015 struct i40e_hw *hw = &pf->hw;
8016 u16 vf_id = vsi->vf_id;
8017 u8 i;
8018
8019 /* Fill out hash function seed */
8020 if (seed) {
8021 u32 *seed_dw = (u32 *)seed;
8022
8023 if (vsi->type == I40E_VSI_MAIN) {
8024 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8025 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8026 seed_dw[i]);
8027 } else if (vsi->type == I40E_VSI_SRIOV) {
8028 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8029 i40e_write_rx_ctl(hw,
8030 I40E_VFQF_HKEY1(i, vf_id),
8031 seed_dw[i]);
8032 } else {
8033 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8034 }
8035 }
8036
8037 if (lut) {
8038 u32 *lut_dw = (u32 *)lut;
8039
8040 if (vsi->type == I40E_VSI_MAIN) {
8041 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8042 return -EINVAL;
8043 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8044 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8045 } else if (vsi->type == I40E_VSI_SRIOV) {
8046 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8047 return -EINVAL;
8048 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8049 i40e_write_rx_ctl(hw,
8050 I40E_VFQF_HLUT1(i, vf_id),
8051 lut_dw[i]);
8052 } else {
8053 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8054 }
8055 }
8056 i40e_flush(hw);
8057
8058 return 0;
8059 }
8060
8061 /**
8062 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8063 * @vsi: Pointer to VSI structure
8064 * @seed: Buffer to store the keys
8065 * @lut: Buffer to store the lookup table entries
8066 * @lut_size: Size of buffer to store the lookup table entries
8067 *
8068 * Returns 0 on success, negative on failure
8069 */
8070 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8071 u8 *lut, u16 lut_size)
8072 {
8073 struct i40e_pf *pf = vsi->back;
8074 struct i40e_hw *hw = &pf->hw;
8075 u16 i;
8076
8077 if (seed) {
8078 u32 *seed_dw = (u32 *)seed;
8079
8080 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8081 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8082 }
8083 if (lut) {
8084 u32 *lut_dw = (u32 *)lut;
8085
8086 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8087 return -EINVAL;
8088 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8089 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8090 }
8091
8092 return 0;
8093 }
8094
8095 /**
8096 * i40e_config_rss - Configure RSS keys and lut
8097 * @vsi: Pointer to VSI structure
8098 * @seed: RSS hash seed
8099 * @lut: Lookup table
8100 * @lut_size: Lookup table size
8101 *
8102 * Returns 0 on success, negative on failure
8103 */
8104 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8105 {
8106 struct i40e_pf *pf = vsi->back;
8107
8108 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8109 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8110 else
8111 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8112 }
8113
8114 /**
8115 * i40e_get_rss - Get RSS keys and lut
8116 * @vsi: Pointer to VSI structure
8117 * @seed: Buffer to store the keys
8118 * @lut: Buffer to store the lookup table entries
8119 * lut_size: Size of buffer to store the lookup table entries
8120 *
8121 * Returns 0 on success, negative on failure
8122 */
8123 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8124 {
8125 struct i40e_pf *pf = vsi->back;
8126
8127 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8128 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8129 else
8130 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8131 }
8132
8133 /**
8134 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8135 * @pf: Pointer to board private structure
8136 * @lut: Lookup table
8137 * @rss_table_size: Lookup table size
8138 * @rss_size: Range of queue number for hashing
8139 */
8140 static void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8141 u16 rss_table_size, u16 rss_size)
8142 {
8143 u16 i;
8144
8145 for (i = 0; i < rss_table_size; i++)
8146 lut[i] = i % rss_size;
8147 }
8148
8149 /**
8150 * i40e_pf_config_rss - Prepare for RSS if used
8151 * @pf: board private structure
8152 **/
8153 static int i40e_pf_config_rss(struct i40e_pf *pf)
8154 {
8155 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8156 u8 seed[I40E_HKEY_ARRAY_SIZE];
8157 u8 *lut;
8158 struct i40e_hw *hw = &pf->hw;
8159 u32 reg_val;
8160 u64 hena;
8161 int ret;
8162
8163 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8164 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8165 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8166 hena |= i40e_pf_get_default_rss_hena(pf);
8167
8168 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8169 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8170
8171 /* Determine the RSS table size based on the hardware capabilities */
8172 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8173 reg_val = (pf->rss_table_size == 512) ?
8174 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8175 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8176 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8177
8178 /* Determine the RSS size of the VSI */
8179 if (!vsi->rss_size)
8180 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8181 vsi->num_queue_pairs);
8182
8183 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8184 if (!lut)
8185 return -ENOMEM;
8186
8187 /* Use user configured lut if there is one, otherwise use default */
8188 if (vsi->rss_lut_user)
8189 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8190 else
8191 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8192
8193 /* Use user configured hash key if there is one, otherwise
8194 * use default.
8195 */
8196 if (vsi->rss_hkey_user)
8197 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8198 else
8199 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8200 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8201 kfree(lut);
8202
8203 return ret;
8204 }
8205
8206 /**
8207 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8208 * @pf: board private structure
8209 * @queue_count: the requested queue count for rss.
8210 *
8211 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8212 * count which may be different from the requested queue count.
8213 **/
8214 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8215 {
8216 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8217 int new_rss_size;
8218
8219 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8220 return 0;
8221
8222 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8223
8224 if (queue_count != vsi->num_queue_pairs) {
8225 vsi->req_queue_pairs = queue_count;
8226 i40e_prep_for_reset(pf);
8227
8228 pf->alloc_rss_size = new_rss_size;
8229
8230 i40e_reset_and_rebuild(pf, true);
8231
8232 /* Discard the user configured hash keys and lut, if less
8233 * queues are enabled.
8234 */
8235 if (queue_count < vsi->rss_size) {
8236 i40e_clear_rss_config_user(vsi);
8237 dev_dbg(&pf->pdev->dev,
8238 "discard user configured hash keys and lut\n");
8239 }
8240
8241 /* Reset vsi->rss_size, as number of enabled queues changed */
8242 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8243 vsi->num_queue_pairs);
8244
8245 i40e_pf_config_rss(pf);
8246 }
8247 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8248 pf->alloc_rss_size, pf->rss_size_max);
8249 return pf->alloc_rss_size;
8250 }
8251
8252 /**
8253 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8254 * @pf: board private structure
8255 **/
8256 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8257 {
8258 i40e_status status;
8259 bool min_valid, max_valid;
8260 u32 max_bw, min_bw;
8261
8262 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8263 &min_valid, &max_valid);
8264
8265 if (!status) {
8266 if (min_valid)
8267 pf->npar_min_bw = min_bw;
8268 if (max_valid)
8269 pf->npar_max_bw = max_bw;
8270 }
8271
8272 return status;
8273 }
8274
8275 /**
8276 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8277 * @pf: board private structure
8278 **/
8279 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8280 {
8281 struct i40e_aqc_configure_partition_bw_data bw_data;
8282 i40e_status status;
8283
8284 /* Set the valid bit for this PF */
8285 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8286 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8287 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8288
8289 /* Set the new bandwidths */
8290 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8291
8292 return status;
8293 }
8294
8295 /**
8296 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8297 * @pf: board private structure
8298 **/
8299 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8300 {
8301 /* Commit temporary BW setting to permanent NVM image */
8302 enum i40e_admin_queue_err last_aq_status;
8303 i40e_status ret;
8304 u16 nvm_word;
8305
8306 if (pf->hw.partition_id != 1) {
8307 dev_info(&pf->pdev->dev,
8308 "Commit BW only works on partition 1! This is partition %d",
8309 pf->hw.partition_id);
8310 ret = I40E_NOT_SUPPORTED;
8311 goto bw_commit_out;
8312 }
8313
8314 /* Acquire NVM for read access */
8315 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8316 last_aq_status = pf->hw.aq.asq_last_status;
8317 if (ret) {
8318 dev_info(&pf->pdev->dev,
8319 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8320 i40e_stat_str(&pf->hw, ret),
8321 i40e_aq_str(&pf->hw, last_aq_status));
8322 goto bw_commit_out;
8323 }
8324
8325 /* Read word 0x10 of NVM - SW compatibility word 1 */
8326 ret = i40e_aq_read_nvm(&pf->hw,
8327 I40E_SR_NVM_CONTROL_WORD,
8328 0x10, sizeof(nvm_word), &nvm_word,
8329 false, NULL);
8330 /* Save off last admin queue command status before releasing
8331 * the NVM
8332 */
8333 last_aq_status = pf->hw.aq.asq_last_status;
8334 i40e_release_nvm(&pf->hw);
8335 if (ret) {
8336 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8337 i40e_stat_str(&pf->hw, ret),
8338 i40e_aq_str(&pf->hw, last_aq_status));
8339 goto bw_commit_out;
8340 }
8341
8342 /* Wait a bit for NVM release to complete */
8343 msleep(50);
8344
8345 /* Acquire NVM for write access */
8346 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8347 last_aq_status = pf->hw.aq.asq_last_status;
8348 if (ret) {
8349 dev_info(&pf->pdev->dev,
8350 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8351 i40e_stat_str(&pf->hw, ret),
8352 i40e_aq_str(&pf->hw, last_aq_status));
8353 goto bw_commit_out;
8354 }
8355 /* Write it back out unchanged to initiate update NVM,
8356 * which will force a write of the shadow (alt) RAM to
8357 * the NVM - thus storing the bandwidth values permanently.
8358 */
8359 ret = i40e_aq_update_nvm(&pf->hw,
8360 I40E_SR_NVM_CONTROL_WORD,
8361 0x10, sizeof(nvm_word),
8362 &nvm_word, true, NULL);
8363 /* Save off last admin queue command status before releasing
8364 * the NVM
8365 */
8366 last_aq_status = pf->hw.aq.asq_last_status;
8367 i40e_release_nvm(&pf->hw);
8368 if (ret)
8369 dev_info(&pf->pdev->dev,
8370 "BW settings NOT SAVED, err %s aq_err %s\n",
8371 i40e_stat_str(&pf->hw, ret),
8372 i40e_aq_str(&pf->hw, last_aq_status));
8373 bw_commit_out:
8374
8375 return ret;
8376 }
8377
8378 /**
8379 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8380 * @pf: board private structure to initialize
8381 *
8382 * i40e_sw_init initializes the Adapter private data structure.
8383 * Fields are initialized based on PCI device information and
8384 * OS network device settings (MTU size).
8385 **/
8386 static int i40e_sw_init(struct i40e_pf *pf)
8387 {
8388 int err = 0;
8389 int size;
8390
8391 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8392 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8393 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8394 if (I40E_DEBUG_USER & debug)
8395 pf->hw.debug_mask = debug;
8396 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8397 I40E_DEFAULT_MSG_ENABLE);
8398 }
8399
8400 /* Set default capability flags */
8401 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8402 I40E_FLAG_MSI_ENABLED |
8403 I40E_FLAG_MSIX_ENABLED;
8404
8405 /* Set default ITR */
8406 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8407 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8408
8409 /* Depending on PF configurations, it is possible that the RSS
8410 * maximum might end up larger than the available queues
8411 */
8412 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8413 pf->alloc_rss_size = 1;
8414 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8415 pf->rss_size_max = min_t(int, pf->rss_size_max,
8416 pf->hw.func_caps.num_tx_qp);
8417 if (pf->hw.func_caps.rss) {
8418 pf->flags |= I40E_FLAG_RSS_ENABLED;
8419 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8420 num_online_cpus());
8421 }
8422
8423 /* MFP mode enabled */
8424 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8425 pf->flags |= I40E_FLAG_MFP_ENABLED;
8426 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8427 if (i40e_get_npar_bw_setting(pf))
8428 dev_warn(&pf->pdev->dev,
8429 "Could not get NPAR bw settings\n");
8430 else
8431 dev_info(&pf->pdev->dev,
8432 "Min BW = %8.8x, Max BW = %8.8x\n",
8433 pf->npar_min_bw, pf->npar_max_bw);
8434 }
8435
8436 /* FW/NVM is not yet fixed in this regard */
8437 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8438 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8439 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8440 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8441 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8442 pf->hw.num_partitions > 1)
8443 dev_info(&pf->pdev->dev,
8444 "Flow Director Sideband mode Disabled in MFP mode\n");
8445 else
8446 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8447 pf->fdir_pf_filter_count =
8448 pf->hw.func_caps.fd_filters_guaranteed;
8449 pf->hw.fdir_shared_filter_count =
8450 pf->hw.func_caps.fd_filters_best_effort;
8451 }
8452
8453 if (i40e_is_mac_710(&pf->hw) &&
8454 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8455 (pf->hw.aq.fw_maj_ver < 4))) {
8456 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8457 /* No DCB support for FW < v4.33 */
8458 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8459 }
8460
8461 /* Disable FW LLDP if FW < v4.3 */
8462 if (i40e_is_mac_710(&pf->hw) &&
8463 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8464 (pf->hw.aq.fw_maj_ver < 4)))
8465 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8466
8467 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8468 if (i40e_is_mac_710(&pf->hw) &&
8469 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8470 (pf->hw.aq.fw_maj_ver >= 5)))
8471 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8472
8473 if (pf->hw.func_caps.vmdq) {
8474 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8475 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8476 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8477 }
8478
8479 if (pf->hw.func_caps.iwarp) {
8480 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8481 /* IWARP needs one extra vector for CQP just like MISC.*/
8482 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8483 }
8484
8485 #ifdef I40E_FCOE
8486 i40e_init_pf_fcoe(pf);
8487
8488 #endif /* I40E_FCOE */
8489 #ifdef CONFIG_PCI_IOV
8490 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8491 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8492 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8493 pf->num_req_vfs = min_t(int,
8494 pf->hw.func_caps.num_vfs,
8495 I40E_MAX_VF_COUNT);
8496 }
8497 #endif /* CONFIG_PCI_IOV */
8498 if (pf->hw.mac.type == I40E_MAC_X722) {
8499 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8500 I40E_FLAG_128_QP_RSS_CAPABLE |
8501 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8502 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8503 I40E_FLAG_WB_ON_ITR_CAPABLE |
8504 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8505 I40E_FLAG_NO_PCI_LINK_CHECK |
8506 I40E_FLAG_100M_SGMII_CAPABLE |
8507 I40E_FLAG_USE_SET_LLDP_MIB |
8508 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8509 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8510 ((pf->hw.aq.api_maj_ver == 1) &&
8511 (pf->hw.aq.api_min_ver > 4))) {
8512 /* Supported in FW API version higher than 1.4 */
8513 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8514 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8515 } else {
8516 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8517 }
8518
8519 pf->eeprom_version = 0xDEAD;
8520 pf->lan_veb = I40E_NO_VEB;
8521 pf->lan_vsi = I40E_NO_VSI;
8522
8523 /* By default FW has this off for performance reasons */
8524 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8525
8526 /* set up queue assignment tracking */
8527 size = sizeof(struct i40e_lump_tracking)
8528 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8529 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8530 if (!pf->qp_pile) {
8531 err = -ENOMEM;
8532 goto sw_init_done;
8533 }
8534 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8535 pf->qp_pile->search_hint = 0;
8536
8537 pf->tx_timeout_recovery_level = 1;
8538
8539 mutex_init(&pf->switch_mutex);
8540
8541 /* If NPAR is enabled nudge the Tx scheduler */
8542 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8543 i40e_set_npar_bw_setting(pf);
8544
8545 sw_init_done:
8546 return err;
8547 }
8548
8549 /**
8550 * i40e_set_ntuple - set the ntuple feature flag and take action
8551 * @pf: board private structure to initialize
8552 * @features: the feature set that the stack is suggesting
8553 *
8554 * returns a bool to indicate if reset needs to happen
8555 **/
8556 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8557 {
8558 bool need_reset = false;
8559
8560 /* Check if Flow Director n-tuple support was enabled or disabled. If
8561 * the state changed, we need to reset.
8562 */
8563 if (features & NETIF_F_NTUPLE) {
8564 /* Enable filters and mark for reset */
8565 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8566 need_reset = true;
8567 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8568 } else {
8569 /* turn off filters, mark for reset and clear SW filter list */
8570 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8571 need_reset = true;
8572 i40e_fdir_filter_exit(pf);
8573 }
8574 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8575 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8576 /* reset fd counters */
8577 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8578 pf->fdir_pf_active_filters = 0;
8579 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8580 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8581 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8582 /* if ATR was auto disabled it can be re-enabled. */
8583 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8584 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
8585 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8586 }
8587 return need_reset;
8588 }
8589
8590 /**
8591 * i40e_set_features - set the netdev feature flags
8592 * @netdev: ptr to the netdev being adjusted
8593 * @features: the feature set that the stack is suggesting
8594 **/
8595 static int i40e_set_features(struct net_device *netdev,
8596 netdev_features_t features)
8597 {
8598 struct i40e_netdev_priv *np = netdev_priv(netdev);
8599 struct i40e_vsi *vsi = np->vsi;
8600 struct i40e_pf *pf = vsi->back;
8601 bool need_reset;
8602
8603 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8604 i40e_vlan_stripping_enable(vsi);
8605 else
8606 i40e_vlan_stripping_disable(vsi);
8607
8608 need_reset = i40e_set_ntuple(pf, features);
8609
8610 if (need_reset)
8611 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8612
8613 return 0;
8614 }
8615
8616 /**
8617 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8618 * @pf: board private structure
8619 * @port: The UDP port to look up
8620 *
8621 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8622 **/
8623 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8624 {
8625 u8 i;
8626
8627 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8628 if (pf->udp_ports[i].index == port)
8629 return i;
8630 }
8631
8632 return i;
8633 }
8634
8635 /**
8636 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8637 * @netdev: This physical port's netdev
8638 * @ti: Tunnel endpoint information
8639 **/
8640 static void i40e_udp_tunnel_add(struct net_device *netdev,
8641 struct udp_tunnel_info *ti)
8642 {
8643 struct i40e_netdev_priv *np = netdev_priv(netdev);
8644 struct i40e_vsi *vsi = np->vsi;
8645 struct i40e_pf *pf = vsi->back;
8646 __be16 port = ti->port;
8647 u8 next_idx;
8648 u8 idx;
8649
8650 idx = i40e_get_udp_port_idx(pf, port);
8651
8652 /* Check if port already exists */
8653 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8654 netdev_info(netdev, "port %d already offloaded\n",
8655 ntohs(port));
8656 return;
8657 }
8658
8659 /* Now check if there is space to add the new port */
8660 next_idx = i40e_get_udp_port_idx(pf, 0);
8661
8662 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8663 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8664 ntohs(port));
8665 return;
8666 }
8667
8668 switch (ti->type) {
8669 case UDP_TUNNEL_TYPE_VXLAN:
8670 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8671 break;
8672 case UDP_TUNNEL_TYPE_GENEVE:
8673 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8674 return;
8675 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8676 break;
8677 default:
8678 return;
8679 }
8680
8681 /* New port: add it and mark its index in the bitmap */
8682 pf->udp_ports[next_idx].index = port;
8683 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8684 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8685 }
8686
8687 /**
8688 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8689 * @netdev: This physical port's netdev
8690 * @ti: Tunnel endpoint information
8691 **/
8692 static void i40e_udp_tunnel_del(struct net_device *netdev,
8693 struct udp_tunnel_info *ti)
8694 {
8695 struct i40e_netdev_priv *np = netdev_priv(netdev);
8696 struct i40e_vsi *vsi = np->vsi;
8697 struct i40e_pf *pf = vsi->back;
8698 __be16 port = ti->port;
8699 u8 idx;
8700
8701 idx = i40e_get_udp_port_idx(pf, port);
8702
8703 /* Check if port already exists */
8704 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8705 goto not_found;
8706
8707 switch (ti->type) {
8708 case UDP_TUNNEL_TYPE_VXLAN:
8709 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8710 goto not_found;
8711 break;
8712 case UDP_TUNNEL_TYPE_GENEVE:
8713 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8714 goto not_found;
8715 break;
8716 default:
8717 goto not_found;
8718 }
8719
8720 /* if port exists, set it to 0 (mark for deletion)
8721 * and make it pending
8722 */
8723 pf->udp_ports[idx].index = 0;
8724 pf->pending_udp_bitmap |= BIT_ULL(idx);
8725 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8726
8727 return;
8728 not_found:
8729 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8730 ntohs(port));
8731 }
8732
8733 static int i40e_get_phys_port_id(struct net_device *netdev,
8734 struct netdev_phys_item_id *ppid)
8735 {
8736 struct i40e_netdev_priv *np = netdev_priv(netdev);
8737 struct i40e_pf *pf = np->vsi->back;
8738 struct i40e_hw *hw = &pf->hw;
8739
8740 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8741 return -EOPNOTSUPP;
8742
8743 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8744 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8745
8746 return 0;
8747 }
8748
8749 /**
8750 * i40e_ndo_fdb_add - add an entry to the hardware database
8751 * @ndm: the input from the stack
8752 * @tb: pointer to array of nladdr (unused)
8753 * @dev: the net device pointer
8754 * @addr: the MAC address entry being added
8755 * @flags: instructions from stack about fdb operation
8756 */
8757 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8758 struct net_device *dev,
8759 const unsigned char *addr, u16 vid,
8760 u16 flags)
8761 {
8762 struct i40e_netdev_priv *np = netdev_priv(dev);
8763 struct i40e_pf *pf = np->vsi->back;
8764 int err = 0;
8765
8766 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8767 return -EOPNOTSUPP;
8768
8769 if (vid) {
8770 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8771 return -EINVAL;
8772 }
8773
8774 /* Hardware does not support aging addresses so if a
8775 * ndm_state is given only allow permanent addresses
8776 */
8777 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8778 netdev_info(dev, "FDB only supports static addresses\n");
8779 return -EINVAL;
8780 }
8781
8782 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8783 err = dev_uc_add_excl(dev, addr);
8784 else if (is_multicast_ether_addr(addr))
8785 err = dev_mc_add_excl(dev, addr);
8786 else
8787 err = -EINVAL;
8788
8789 /* Only return duplicate errors if NLM_F_EXCL is set */
8790 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8791 err = 0;
8792
8793 return err;
8794 }
8795
8796 /**
8797 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8798 * @dev: the netdev being configured
8799 * @nlh: RTNL message
8800 *
8801 * Inserts a new hardware bridge if not already created and
8802 * enables the bridging mode requested (VEB or VEPA). If the
8803 * hardware bridge has already been inserted and the request
8804 * is to change the mode then that requires a PF reset to
8805 * allow rebuild of the components with required hardware
8806 * bridge mode enabled.
8807 **/
8808 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8809 struct nlmsghdr *nlh,
8810 u16 flags)
8811 {
8812 struct i40e_netdev_priv *np = netdev_priv(dev);
8813 struct i40e_vsi *vsi = np->vsi;
8814 struct i40e_pf *pf = vsi->back;
8815 struct i40e_veb *veb = NULL;
8816 struct nlattr *attr, *br_spec;
8817 int i, rem;
8818
8819 /* Only for PF VSI for now */
8820 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8821 return -EOPNOTSUPP;
8822
8823 /* Find the HW bridge for PF VSI */
8824 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8825 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8826 veb = pf->veb[i];
8827 }
8828
8829 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8830
8831 nla_for_each_nested(attr, br_spec, rem) {
8832 __u16 mode;
8833
8834 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8835 continue;
8836
8837 mode = nla_get_u16(attr);
8838 if ((mode != BRIDGE_MODE_VEPA) &&
8839 (mode != BRIDGE_MODE_VEB))
8840 return -EINVAL;
8841
8842 /* Insert a new HW bridge */
8843 if (!veb) {
8844 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8845 vsi->tc_config.enabled_tc);
8846 if (veb) {
8847 veb->bridge_mode = mode;
8848 i40e_config_bridge_mode(veb);
8849 } else {
8850 /* No Bridge HW offload available */
8851 return -ENOENT;
8852 }
8853 break;
8854 } else if (mode != veb->bridge_mode) {
8855 /* Existing HW bridge but different mode needs reset */
8856 veb->bridge_mode = mode;
8857 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8858 if (mode == BRIDGE_MODE_VEB)
8859 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8860 else
8861 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8862 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8863 break;
8864 }
8865 }
8866
8867 return 0;
8868 }
8869
8870 /**
8871 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8872 * @skb: skb buff
8873 * @pid: process id
8874 * @seq: RTNL message seq #
8875 * @dev: the netdev being configured
8876 * @filter_mask: unused
8877 * @nlflags: netlink flags passed in
8878 *
8879 * Return the mode in which the hardware bridge is operating in
8880 * i.e VEB or VEPA.
8881 **/
8882 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8883 struct net_device *dev,
8884 u32 __always_unused filter_mask,
8885 int nlflags)
8886 {
8887 struct i40e_netdev_priv *np = netdev_priv(dev);
8888 struct i40e_vsi *vsi = np->vsi;
8889 struct i40e_pf *pf = vsi->back;
8890 struct i40e_veb *veb = NULL;
8891 int i;
8892
8893 /* Only for PF VSI for now */
8894 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8895 return -EOPNOTSUPP;
8896
8897 /* Find the HW bridge for the PF VSI */
8898 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8899 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8900 veb = pf->veb[i];
8901 }
8902
8903 if (!veb)
8904 return 0;
8905
8906 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8907 nlflags, 0, 0, filter_mask, NULL);
8908 }
8909
8910 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
8911 * inner mac plus all inner ethertypes.
8912 */
8913 #define I40E_MAX_TUNNEL_HDR_LEN 128
8914 /**
8915 * i40e_features_check - Validate encapsulated packet conforms to limits
8916 * @skb: skb buff
8917 * @dev: This physical port's netdev
8918 * @features: Offload features that the stack believes apply
8919 **/
8920 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8921 struct net_device *dev,
8922 netdev_features_t features)
8923 {
8924 if (skb->encapsulation &&
8925 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
8926 I40E_MAX_TUNNEL_HDR_LEN))
8927 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
8928
8929 return features;
8930 }
8931
8932 static const struct net_device_ops i40e_netdev_ops = {
8933 .ndo_open = i40e_open,
8934 .ndo_stop = i40e_close,
8935 .ndo_start_xmit = i40e_lan_xmit_frame,
8936 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8937 .ndo_set_rx_mode = i40e_set_rx_mode,
8938 .ndo_validate_addr = eth_validate_addr,
8939 .ndo_set_mac_address = i40e_set_mac,
8940 .ndo_change_mtu = i40e_change_mtu,
8941 .ndo_do_ioctl = i40e_ioctl,
8942 .ndo_tx_timeout = i40e_tx_timeout,
8943 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8944 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8945 #ifdef CONFIG_NET_POLL_CONTROLLER
8946 .ndo_poll_controller = i40e_netpoll,
8947 #endif
8948 .ndo_setup_tc = __i40e_setup_tc,
8949 #ifdef I40E_FCOE
8950 .ndo_fcoe_enable = i40e_fcoe_enable,
8951 .ndo_fcoe_disable = i40e_fcoe_disable,
8952 #endif
8953 .ndo_set_features = i40e_set_features,
8954 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8955 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8956 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8957 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8958 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8959 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8960 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
8961 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
8962 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
8963 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8964 .ndo_fdb_add = i40e_ndo_fdb_add,
8965 .ndo_features_check = i40e_features_check,
8966 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8967 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8968 };
8969
8970 /**
8971 * i40e_config_netdev - Setup the netdev flags
8972 * @vsi: the VSI being configured
8973 *
8974 * Returns 0 on success, negative value on failure
8975 **/
8976 static int i40e_config_netdev(struct i40e_vsi *vsi)
8977 {
8978 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8979 struct i40e_pf *pf = vsi->back;
8980 struct i40e_hw *hw = &pf->hw;
8981 struct i40e_netdev_priv *np;
8982 struct net_device *netdev;
8983 u8 mac_addr[ETH_ALEN];
8984 int etherdev_size;
8985
8986 etherdev_size = sizeof(struct i40e_netdev_priv);
8987 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8988 if (!netdev)
8989 return -ENOMEM;
8990
8991 vsi->netdev = netdev;
8992 np = netdev_priv(netdev);
8993 np->vsi = vsi;
8994
8995 netdev->hw_enc_features |= NETIF_F_SG |
8996 NETIF_F_IP_CSUM |
8997 NETIF_F_IPV6_CSUM |
8998 NETIF_F_HIGHDMA |
8999 NETIF_F_SOFT_FEATURES |
9000 NETIF_F_TSO |
9001 NETIF_F_TSO_ECN |
9002 NETIF_F_TSO6 |
9003 NETIF_F_GSO_GRE |
9004 NETIF_F_GSO_GRE_CSUM |
9005 NETIF_F_GSO_IPXIP4 |
9006 NETIF_F_GSO_IPXIP6 |
9007 NETIF_F_GSO_UDP_TUNNEL |
9008 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9009 NETIF_F_GSO_PARTIAL |
9010 NETIF_F_SCTP_CRC |
9011 NETIF_F_RXHASH |
9012 NETIF_F_RXCSUM |
9013 0;
9014
9015 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9016 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9017
9018 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9019
9020 /* record features VLANs can make use of */
9021 netdev->vlan_features |= netdev->hw_enc_features |
9022 NETIF_F_TSO_MANGLEID;
9023
9024 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9025 netdev->hw_features |= NETIF_F_NTUPLE;
9026
9027 netdev->hw_features |= netdev->hw_enc_features |
9028 NETIF_F_HW_VLAN_CTAG_TX |
9029 NETIF_F_HW_VLAN_CTAG_RX;
9030
9031 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9032 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9033
9034 if (vsi->type == I40E_VSI_MAIN) {
9035 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9036 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9037 /* The following steps are necessary to prevent reception
9038 * of tagged packets - some older NVM configurations load a
9039 * default a MAC-VLAN filter that accepts any tagged packet
9040 * which must be replaced by a normal filter.
9041 */
9042 if (!i40e_rm_default_mac_filter(vsi, mac_addr)) {
9043 spin_lock_bh(&vsi->mac_filter_list_lock);
9044 i40e_add_filter(vsi, mac_addr,
9045 I40E_VLAN_ANY, false, true);
9046 spin_unlock_bh(&vsi->mac_filter_list_lock);
9047 }
9048 } else if ((pf->hw.aq.api_maj_ver > 1) ||
9049 ((pf->hw.aq.api_maj_ver == 1) &&
9050 (pf->hw.aq.api_min_ver > 4))) {
9051 /* Supported in FW API version higher than 1.4 */
9052 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
9053 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
9054 } else {
9055 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9056 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9057 pf->vsi[pf->lan_vsi]->netdev->name);
9058 random_ether_addr(mac_addr);
9059
9060 spin_lock_bh(&vsi->mac_filter_list_lock);
9061 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9062 spin_unlock_bh(&vsi->mac_filter_list_lock);
9063 }
9064
9065 spin_lock_bh(&vsi->mac_filter_list_lock);
9066 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
9067 spin_unlock_bh(&vsi->mac_filter_list_lock);
9068
9069 ether_addr_copy(netdev->dev_addr, mac_addr);
9070 ether_addr_copy(netdev->perm_addr, mac_addr);
9071
9072 netdev->priv_flags |= IFF_UNICAST_FLT;
9073 netdev->priv_flags |= IFF_SUPP_NOFCS;
9074 /* Setup netdev TC information */
9075 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9076
9077 netdev->netdev_ops = &i40e_netdev_ops;
9078 netdev->watchdog_timeo = 5 * HZ;
9079 i40e_set_ethtool_ops(netdev);
9080 #ifdef I40E_FCOE
9081 i40e_fcoe_config_netdev(netdev, vsi);
9082 #endif
9083
9084 return 0;
9085 }
9086
9087 /**
9088 * i40e_vsi_delete - Delete a VSI from the switch
9089 * @vsi: the VSI being removed
9090 *
9091 * Returns 0 on success, negative value on failure
9092 **/
9093 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9094 {
9095 /* remove default VSI is not allowed */
9096 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9097 return;
9098
9099 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9100 }
9101
9102 /**
9103 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9104 * @vsi: the VSI being queried
9105 *
9106 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9107 **/
9108 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9109 {
9110 struct i40e_veb *veb;
9111 struct i40e_pf *pf = vsi->back;
9112
9113 /* Uplink is not a bridge so default to VEB */
9114 if (vsi->veb_idx == I40E_NO_VEB)
9115 return 1;
9116
9117 veb = pf->veb[vsi->veb_idx];
9118 if (!veb) {
9119 dev_info(&pf->pdev->dev,
9120 "There is no veb associated with the bridge\n");
9121 return -ENOENT;
9122 }
9123
9124 /* Uplink is a bridge in VEPA mode */
9125 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9126 return 0;
9127 } else {
9128 /* Uplink is a bridge in VEB mode */
9129 return 1;
9130 }
9131
9132 /* VEPA is now default bridge, so return 0 */
9133 return 0;
9134 }
9135
9136 /**
9137 * i40e_add_vsi - Add a VSI to the switch
9138 * @vsi: the VSI being configured
9139 *
9140 * This initializes a VSI context depending on the VSI type to be added and
9141 * passes it down to the add_vsi aq command.
9142 **/
9143 static int i40e_add_vsi(struct i40e_vsi *vsi)
9144 {
9145 int ret = -ENODEV;
9146 u8 laa_macaddr[ETH_ALEN];
9147 bool found_laa_mac_filter = false;
9148 struct i40e_pf *pf = vsi->back;
9149 struct i40e_hw *hw = &pf->hw;
9150 struct i40e_vsi_context ctxt;
9151 struct i40e_mac_filter *f, *ftmp;
9152
9153 u8 enabled_tc = 0x1; /* TC0 enabled */
9154 int f_count = 0;
9155
9156 memset(&ctxt, 0, sizeof(ctxt));
9157 switch (vsi->type) {
9158 case I40E_VSI_MAIN:
9159 /* The PF's main VSI is already setup as part of the
9160 * device initialization, so we'll not bother with
9161 * the add_vsi call, but we will retrieve the current
9162 * VSI context.
9163 */
9164 ctxt.seid = pf->main_vsi_seid;
9165 ctxt.pf_num = pf->hw.pf_id;
9166 ctxt.vf_num = 0;
9167 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9168 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9169 if (ret) {
9170 dev_info(&pf->pdev->dev,
9171 "couldn't get PF vsi config, err %s aq_err %s\n",
9172 i40e_stat_str(&pf->hw, ret),
9173 i40e_aq_str(&pf->hw,
9174 pf->hw.aq.asq_last_status));
9175 return -ENOENT;
9176 }
9177 vsi->info = ctxt.info;
9178 vsi->info.valid_sections = 0;
9179
9180 vsi->seid = ctxt.seid;
9181 vsi->id = ctxt.vsi_number;
9182
9183 enabled_tc = i40e_pf_get_tc_map(pf);
9184
9185 /* MFP mode setup queue map and update VSI */
9186 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9187 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9188 memset(&ctxt, 0, sizeof(ctxt));
9189 ctxt.seid = pf->main_vsi_seid;
9190 ctxt.pf_num = pf->hw.pf_id;
9191 ctxt.vf_num = 0;
9192 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9193 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9194 if (ret) {
9195 dev_info(&pf->pdev->dev,
9196 "update vsi failed, err %s aq_err %s\n",
9197 i40e_stat_str(&pf->hw, ret),
9198 i40e_aq_str(&pf->hw,
9199 pf->hw.aq.asq_last_status));
9200 ret = -ENOENT;
9201 goto err;
9202 }
9203 /* update the local VSI info queue map */
9204 i40e_vsi_update_queue_map(vsi, &ctxt);
9205 vsi->info.valid_sections = 0;
9206 } else {
9207 /* Default/Main VSI is only enabled for TC0
9208 * reconfigure it to enable all TCs that are
9209 * available on the port in SFP mode.
9210 * For MFP case the iSCSI PF would use this
9211 * flow to enable LAN+iSCSI TC.
9212 */
9213 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9214 if (ret) {
9215 dev_info(&pf->pdev->dev,
9216 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9217 enabled_tc,
9218 i40e_stat_str(&pf->hw, ret),
9219 i40e_aq_str(&pf->hw,
9220 pf->hw.aq.asq_last_status));
9221 ret = -ENOENT;
9222 }
9223 }
9224 break;
9225
9226 case I40E_VSI_FDIR:
9227 ctxt.pf_num = hw->pf_id;
9228 ctxt.vf_num = 0;
9229 ctxt.uplink_seid = vsi->uplink_seid;
9230 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9231 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9232 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9233 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9234 ctxt.info.valid_sections |=
9235 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9236 ctxt.info.switch_id =
9237 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9238 }
9239 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9240 break;
9241
9242 case I40E_VSI_VMDQ2:
9243 ctxt.pf_num = hw->pf_id;
9244 ctxt.vf_num = 0;
9245 ctxt.uplink_seid = vsi->uplink_seid;
9246 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9247 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9248
9249 /* This VSI is connected to VEB so the switch_id
9250 * should be set to zero by default.
9251 */
9252 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9253 ctxt.info.valid_sections |=
9254 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9255 ctxt.info.switch_id =
9256 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9257 }
9258
9259 /* Setup the VSI tx/rx queue map for TC0 only for now */
9260 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9261 break;
9262
9263 case I40E_VSI_SRIOV:
9264 ctxt.pf_num = hw->pf_id;
9265 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9266 ctxt.uplink_seid = vsi->uplink_seid;
9267 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9268 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9269
9270 /* This VSI is connected to VEB so the switch_id
9271 * should be set to zero by default.
9272 */
9273 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9274 ctxt.info.valid_sections |=
9275 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9276 ctxt.info.switch_id =
9277 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9278 }
9279
9280 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9281 ctxt.info.valid_sections |=
9282 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9283 ctxt.info.queueing_opt_flags |=
9284 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9285 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9286 }
9287
9288 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9289 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9290 if (pf->vf[vsi->vf_id].spoofchk) {
9291 ctxt.info.valid_sections |=
9292 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9293 ctxt.info.sec_flags |=
9294 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9295 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9296 }
9297 /* Setup the VSI tx/rx queue map for TC0 only for now */
9298 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9299 break;
9300
9301 #ifdef I40E_FCOE
9302 case I40E_VSI_FCOE:
9303 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9304 if (ret) {
9305 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9306 return ret;
9307 }
9308 break;
9309
9310 #endif /* I40E_FCOE */
9311 case I40E_VSI_IWARP:
9312 /* send down message to iWARP */
9313 break;
9314
9315 default:
9316 return -ENODEV;
9317 }
9318
9319 if (vsi->type != I40E_VSI_MAIN) {
9320 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9321 if (ret) {
9322 dev_info(&vsi->back->pdev->dev,
9323 "add vsi failed, err %s aq_err %s\n",
9324 i40e_stat_str(&pf->hw, ret),
9325 i40e_aq_str(&pf->hw,
9326 pf->hw.aq.asq_last_status));
9327 ret = -ENOENT;
9328 goto err;
9329 }
9330 vsi->info = ctxt.info;
9331 vsi->info.valid_sections = 0;
9332 vsi->seid = ctxt.seid;
9333 vsi->id = ctxt.vsi_number;
9334 }
9335
9336 spin_lock_bh(&vsi->mac_filter_list_lock);
9337 /* If macvlan filters already exist, force them to get loaded */
9338 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9339 f->changed = true;
9340 f_count++;
9341
9342 /* Expected to have only one MAC filter entry for LAA in list */
9343 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
9344 ether_addr_copy(laa_macaddr, f->macaddr);
9345 found_laa_mac_filter = true;
9346 }
9347 }
9348 spin_unlock_bh(&vsi->mac_filter_list_lock);
9349
9350 if (found_laa_mac_filter) {
9351 struct i40e_aqc_remove_macvlan_element_data element;
9352
9353 memset(&element, 0, sizeof(element));
9354 ether_addr_copy(element.mac_addr, laa_macaddr);
9355 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
9356 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
9357 &element, 1, NULL);
9358 if (ret) {
9359 /* some older FW has a different default */
9360 element.flags |=
9361 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
9362 i40e_aq_remove_macvlan(hw, vsi->seid,
9363 &element, 1, NULL);
9364 }
9365
9366 i40e_aq_mac_address_write(hw,
9367 I40E_AQC_WRITE_TYPE_LAA_WOL,
9368 laa_macaddr, NULL);
9369 }
9370
9371 if (f_count) {
9372 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9373 pf->flags |= I40E_FLAG_FILTER_SYNC;
9374 }
9375
9376 /* Update VSI BW information */
9377 ret = i40e_vsi_get_bw_info(vsi);
9378 if (ret) {
9379 dev_info(&pf->pdev->dev,
9380 "couldn't get vsi bw info, err %s aq_err %s\n",
9381 i40e_stat_str(&pf->hw, ret),
9382 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9383 /* VSI is already added so not tearing that up */
9384 ret = 0;
9385 }
9386
9387 err:
9388 return ret;
9389 }
9390
9391 /**
9392 * i40e_vsi_release - Delete a VSI and free its resources
9393 * @vsi: the VSI being removed
9394 *
9395 * Returns 0 on success or < 0 on error
9396 **/
9397 int i40e_vsi_release(struct i40e_vsi *vsi)
9398 {
9399 struct i40e_mac_filter *f, *ftmp;
9400 struct i40e_veb *veb = NULL;
9401 struct i40e_pf *pf;
9402 u16 uplink_seid;
9403 int i, n;
9404
9405 pf = vsi->back;
9406
9407 /* release of a VEB-owner or last VSI is not allowed */
9408 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9409 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9410 vsi->seid, vsi->uplink_seid);
9411 return -ENODEV;
9412 }
9413 if (vsi == pf->vsi[pf->lan_vsi] &&
9414 !test_bit(__I40E_DOWN, &pf->state)) {
9415 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9416 return -ENODEV;
9417 }
9418
9419 uplink_seid = vsi->uplink_seid;
9420 if (vsi->type != I40E_VSI_SRIOV) {
9421 if (vsi->netdev_registered) {
9422 vsi->netdev_registered = false;
9423 if (vsi->netdev) {
9424 /* results in a call to i40e_close() */
9425 unregister_netdev(vsi->netdev);
9426 }
9427 } else {
9428 i40e_vsi_close(vsi);
9429 }
9430 i40e_vsi_disable_irq(vsi);
9431 }
9432
9433 spin_lock_bh(&vsi->mac_filter_list_lock);
9434 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9435 i40e_del_filter(vsi, f->macaddr, f->vlan,
9436 f->is_vf, f->is_netdev);
9437 spin_unlock_bh(&vsi->mac_filter_list_lock);
9438
9439 i40e_sync_vsi_filters(vsi);
9440
9441 i40e_vsi_delete(vsi);
9442 i40e_vsi_free_q_vectors(vsi);
9443 if (vsi->netdev) {
9444 free_netdev(vsi->netdev);
9445 vsi->netdev = NULL;
9446 }
9447 i40e_vsi_clear_rings(vsi);
9448 i40e_vsi_clear(vsi);
9449
9450 /* If this was the last thing on the VEB, except for the
9451 * controlling VSI, remove the VEB, which puts the controlling
9452 * VSI onto the next level down in the switch.
9453 *
9454 * Well, okay, there's one more exception here: don't remove
9455 * the orphan VEBs yet. We'll wait for an explicit remove request
9456 * from up the network stack.
9457 */
9458 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9459 if (pf->vsi[i] &&
9460 pf->vsi[i]->uplink_seid == uplink_seid &&
9461 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9462 n++; /* count the VSIs */
9463 }
9464 }
9465 for (i = 0; i < I40E_MAX_VEB; i++) {
9466 if (!pf->veb[i])
9467 continue;
9468 if (pf->veb[i]->uplink_seid == uplink_seid)
9469 n++; /* count the VEBs */
9470 if (pf->veb[i]->seid == uplink_seid)
9471 veb = pf->veb[i];
9472 }
9473 if (n == 0 && veb && veb->uplink_seid != 0)
9474 i40e_veb_release(veb);
9475
9476 return 0;
9477 }
9478
9479 /**
9480 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9481 * @vsi: ptr to the VSI
9482 *
9483 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9484 * corresponding SW VSI structure and initializes num_queue_pairs for the
9485 * newly allocated VSI.
9486 *
9487 * Returns 0 on success or negative on failure
9488 **/
9489 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9490 {
9491 int ret = -ENOENT;
9492 struct i40e_pf *pf = vsi->back;
9493
9494 if (vsi->q_vectors[0]) {
9495 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9496 vsi->seid);
9497 return -EEXIST;
9498 }
9499
9500 if (vsi->base_vector) {
9501 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9502 vsi->seid, vsi->base_vector);
9503 return -EEXIST;
9504 }
9505
9506 ret = i40e_vsi_alloc_q_vectors(vsi);
9507 if (ret) {
9508 dev_info(&pf->pdev->dev,
9509 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9510 vsi->num_q_vectors, vsi->seid, ret);
9511 vsi->num_q_vectors = 0;
9512 goto vector_setup_out;
9513 }
9514
9515 /* In Legacy mode, we do not have to get any other vector since we
9516 * piggyback on the misc/ICR0 for queue interrupts.
9517 */
9518 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9519 return ret;
9520 if (vsi->num_q_vectors)
9521 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9522 vsi->num_q_vectors, vsi->idx);
9523 if (vsi->base_vector < 0) {
9524 dev_info(&pf->pdev->dev,
9525 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9526 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9527 i40e_vsi_free_q_vectors(vsi);
9528 ret = -ENOENT;
9529 goto vector_setup_out;
9530 }
9531
9532 vector_setup_out:
9533 return ret;
9534 }
9535
9536 /**
9537 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9538 * @vsi: pointer to the vsi.
9539 *
9540 * This re-allocates a vsi's queue resources.
9541 *
9542 * Returns pointer to the successfully allocated and configured VSI sw struct
9543 * on success, otherwise returns NULL on failure.
9544 **/
9545 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9546 {
9547 struct i40e_pf *pf;
9548 u8 enabled_tc;
9549 int ret;
9550
9551 if (!vsi)
9552 return NULL;
9553
9554 pf = vsi->back;
9555
9556 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9557 i40e_vsi_clear_rings(vsi);
9558
9559 i40e_vsi_free_arrays(vsi, false);
9560 i40e_set_num_rings_in_vsi(vsi);
9561 ret = i40e_vsi_alloc_arrays(vsi, false);
9562 if (ret)
9563 goto err_vsi;
9564
9565 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9566 if (ret < 0) {
9567 dev_info(&pf->pdev->dev,
9568 "failed to get tracking for %d queues for VSI %d err %d\n",
9569 vsi->alloc_queue_pairs, vsi->seid, ret);
9570 goto err_vsi;
9571 }
9572 vsi->base_queue = ret;
9573
9574 /* Update the FW view of the VSI. Force a reset of TC and queue
9575 * layout configurations.
9576 */
9577 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9578 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9579 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9580 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9581
9582 /* assign it some queues */
9583 ret = i40e_alloc_rings(vsi);
9584 if (ret)
9585 goto err_rings;
9586
9587 /* map all of the rings to the q_vectors */
9588 i40e_vsi_map_rings_to_vectors(vsi);
9589 return vsi;
9590
9591 err_rings:
9592 i40e_vsi_free_q_vectors(vsi);
9593 if (vsi->netdev_registered) {
9594 vsi->netdev_registered = false;
9595 unregister_netdev(vsi->netdev);
9596 free_netdev(vsi->netdev);
9597 vsi->netdev = NULL;
9598 }
9599 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9600 err_vsi:
9601 i40e_vsi_clear(vsi);
9602 return NULL;
9603 }
9604
9605 /**
9606 * i40e_macaddr_init - explicitly write the mac address filters.
9607 *
9608 * @vsi: pointer to the vsi.
9609 * @macaddr: the MAC address
9610 *
9611 * This is needed when the macaddr has been obtained by other
9612 * means than the default, e.g., from Open Firmware or IDPROM.
9613 * Returns 0 on success, negative on failure
9614 **/
9615 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
9616 {
9617 int ret;
9618 struct i40e_aqc_add_macvlan_element_data element;
9619
9620 ret = i40e_aq_mac_address_write(&vsi->back->hw,
9621 I40E_AQC_WRITE_TYPE_LAA_WOL,
9622 macaddr, NULL);
9623 if (ret) {
9624 dev_info(&vsi->back->pdev->dev,
9625 "Addr change for VSI failed: %d\n", ret);
9626 return -EADDRNOTAVAIL;
9627 }
9628
9629 memset(&element, 0, sizeof(element));
9630 ether_addr_copy(element.mac_addr, macaddr);
9631 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
9632 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
9633 if (ret) {
9634 dev_info(&vsi->back->pdev->dev,
9635 "add filter failed err %s aq_err %s\n",
9636 i40e_stat_str(&vsi->back->hw, ret),
9637 i40e_aq_str(&vsi->back->hw,
9638 vsi->back->hw.aq.asq_last_status));
9639 }
9640 return ret;
9641 }
9642
9643 /**
9644 * i40e_vsi_setup - Set up a VSI by a given type
9645 * @pf: board private structure
9646 * @type: VSI type
9647 * @uplink_seid: the switch element to link to
9648 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9649 *
9650 * This allocates the sw VSI structure and its queue resources, then add a VSI
9651 * to the identified VEB.
9652 *
9653 * Returns pointer to the successfully allocated and configure VSI sw struct on
9654 * success, otherwise returns NULL on failure.
9655 **/
9656 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9657 u16 uplink_seid, u32 param1)
9658 {
9659 struct i40e_vsi *vsi = NULL;
9660 struct i40e_veb *veb = NULL;
9661 int ret, i;
9662 int v_idx;
9663
9664 /* The requested uplink_seid must be either
9665 * - the PF's port seid
9666 * no VEB is needed because this is the PF
9667 * or this is a Flow Director special case VSI
9668 * - seid of an existing VEB
9669 * - seid of a VSI that owns an existing VEB
9670 * - seid of a VSI that doesn't own a VEB
9671 * a new VEB is created and the VSI becomes the owner
9672 * - seid of the PF VSI, which is what creates the first VEB
9673 * this is a special case of the previous
9674 *
9675 * Find which uplink_seid we were given and create a new VEB if needed
9676 */
9677 for (i = 0; i < I40E_MAX_VEB; i++) {
9678 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9679 veb = pf->veb[i];
9680 break;
9681 }
9682 }
9683
9684 if (!veb && uplink_seid != pf->mac_seid) {
9685
9686 for (i = 0; i < pf->num_alloc_vsi; i++) {
9687 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9688 vsi = pf->vsi[i];
9689 break;
9690 }
9691 }
9692 if (!vsi) {
9693 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9694 uplink_seid);
9695 return NULL;
9696 }
9697
9698 if (vsi->uplink_seid == pf->mac_seid)
9699 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9700 vsi->tc_config.enabled_tc);
9701 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9702 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9703 vsi->tc_config.enabled_tc);
9704 if (veb) {
9705 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9706 dev_info(&vsi->back->pdev->dev,
9707 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9708 return NULL;
9709 }
9710 /* We come up by default in VEPA mode if SRIOV is not
9711 * already enabled, in which case we can't force VEPA
9712 * mode.
9713 */
9714 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9715 veb->bridge_mode = BRIDGE_MODE_VEPA;
9716 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9717 }
9718 i40e_config_bridge_mode(veb);
9719 }
9720 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9721 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9722 veb = pf->veb[i];
9723 }
9724 if (!veb) {
9725 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9726 return NULL;
9727 }
9728
9729 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9730 uplink_seid = veb->seid;
9731 }
9732
9733 /* get vsi sw struct */
9734 v_idx = i40e_vsi_mem_alloc(pf, type);
9735 if (v_idx < 0)
9736 goto err_alloc;
9737 vsi = pf->vsi[v_idx];
9738 if (!vsi)
9739 goto err_alloc;
9740 vsi->type = type;
9741 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9742
9743 if (type == I40E_VSI_MAIN)
9744 pf->lan_vsi = v_idx;
9745 else if (type == I40E_VSI_SRIOV)
9746 vsi->vf_id = param1;
9747 /* assign it some queues */
9748 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9749 vsi->idx);
9750 if (ret < 0) {
9751 dev_info(&pf->pdev->dev,
9752 "failed to get tracking for %d queues for VSI %d err=%d\n",
9753 vsi->alloc_queue_pairs, vsi->seid, ret);
9754 goto err_vsi;
9755 }
9756 vsi->base_queue = ret;
9757
9758 /* get a VSI from the hardware */
9759 vsi->uplink_seid = uplink_seid;
9760 ret = i40e_add_vsi(vsi);
9761 if (ret)
9762 goto err_vsi;
9763
9764 switch (vsi->type) {
9765 /* setup the netdev if needed */
9766 case I40E_VSI_MAIN:
9767 /* Apply relevant filters if a platform-specific mac
9768 * address was selected.
9769 */
9770 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9771 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9772 if (ret) {
9773 dev_warn(&pf->pdev->dev,
9774 "could not set up macaddr; err %d\n",
9775 ret);
9776 }
9777 }
9778 case I40E_VSI_VMDQ2:
9779 case I40E_VSI_FCOE:
9780 ret = i40e_config_netdev(vsi);
9781 if (ret)
9782 goto err_netdev;
9783 ret = register_netdev(vsi->netdev);
9784 if (ret)
9785 goto err_netdev;
9786 vsi->netdev_registered = true;
9787 netif_carrier_off(vsi->netdev);
9788 #ifdef CONFIG_I40E_DCB
9789 /* Setup DCB netlink interface */
9790 i40e_dcbnl_setup(vsi);
9791 #endif /* CONFIG_I40E_DCB */
9792 /* fall through */
9793
9794 case I40E_VSI_FDIR:
9795 /* set up vectors and rings if needed */
9796 ret = i40e_vsi_setup_vectors(vsi);
9797 if (ret)
9798 goto err_msix;
9799
9800 ret = i40e_alloc_rings(vsi);
9801 if (ret)
9802 goto err_rings;
9803
9804 /* map all of the rings to the q_vectors */
9805 i40e_vsi_map_rings_to_vectors(vsi);
9806
9807 i40e_vsi_reset_stats(vsi);
9808 break;
9809
9810 default:
9811 /* no netdev or rings for the other VSI types */
9812 break;
9813 }
9814
9815 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9816 (vsi->type == I40E_VSI_VMDQ2)) {
9817 ret = i40e_vsi_config_rss(vsi);
9818 }
9819 return vsi;
9820
9821 err_rings:
9822 i40e_vsi_free_q_vectors(vsi);
9823 err_msix:
9824 if (vsi->netdev_registered) {
9825 vsi->netdev_registered = false;
9826 unregister_netdev(vsi->netdev);
9827 free_netdev(vsi->netdev);
9828 vsi->netdev = NULL;
9829 }
9830 err_netdev:
9831 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9832 err_vsi:
9833 i40e_vsi_clear(vsi);
9834 err_alloc:
9835 return NULL;
9836 }
9837
9838 /**
9839 * i40e_veb_get_bw_info - Query VEB BW information
9840 * @veb: the veb to query
9841 *
9842 * Query the Tx scheduler BW configuration data for given VEB
9843 **/
9844 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9845 {
9846 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9847 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9848 struct i40e_pf *pf = veb->pf;
9849 struct i40e_hw *hw = &pf->hw;
9850 u32 tc_bw_max;
9851 int ret = 0;
9852 int i;
9853
9854 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9855 &bw_data, NULL);
9856 if (ret) {
9857 dev_info(&pf->pdev->dev,
9858 "query veb bw config failed, err %s aq_err %s\n",
9859 i40e_stat_str(&pf->hw, ret),
9860 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9861 goto out;
9862 }
9863
9864 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9865 &ets_data, NULL);
9866 if (ret) {
9867 dev_info(&pf->pdev->dev,
9868 "query veb bw ets config failed, err %s aq_err %s\n",
9869 i40e_stat_str(&pf->hw, ret),
9870 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9871 goto out;
9872 }
9873
9874 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9875 veb->bw_max_quanta = ets_data.tc_bw_max;
9876 veb->is_abs_credits = bw_data.absolute_credits_enable;
9877 veb->enabled_tc = ets_data.tc_valid_bits;
9878 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9879 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9880 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9881 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9882 veb->bw_tc_limit_credits[i] =
9883 le16_to_cpu(bw_data.tc_bw_limits[i]);
9884 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9885 }
9886
9887 out:
9888 return ret;
9889 }
9890
9891 /**
9892 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9893 * @pf: board private structure
9894 *
9895 * On error: returns error code (negative)
9896 * On success: returns vsi index in PF (positive)
9897 **/
9898 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9899 {
9900 int ret = -ENOENT;
9901 struct i40e_veb *veb;
9902 int i;
9903
9904 /* Need to protect the allocation of switch elements at the PF level */
9905 mutex_lock(&pf->switch_mutex);
9906
9907 /* VEB list may be fragmented if VEB creation/destruction has
9908 * been happening. We can afford to do a quick scan to look
9909 * for any free slots in the list.
9910 *
9911 * find next empty veb slot, looping back around if necessary
9912 */
9913 i = 0;
9914 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9915 i++;
9916 if (i >= I40E_MAX_VEB) {
9917 ret = -ENOMEM;
9918 goto err_alloc_veb; /* out of VEB slots! */
9919 }
9920
9921 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9922 if (!veb) {
9923 ret = -ENOMEM;
9924 goto err_alloc_veb;
9925 }
9926 veb->pf = pf;
9927 veb->idx = i;
9928 veb->enabled_tc = 1;
9929
9930 pf->veb[i] = veb;
9931 ret = i;
9932 err_alloc_veb:
9933 mutex_unlock(&pf->switch_mutex);
9934 return ret;
9935 }
9936
9937 /**
9938 * i40e_switch_branch_release - Delete a branch of the switch tree
9939 * @branch: where to start deleting
9940 *
9941 * This uses recursion to find the tips of the branch to be
9942 * removed, deleting until we get back to and can delete this VEB.
9943 **/
9944 static void i40e_switch_branch_release(struct i40e_veb *branch)
9945 {
9946 struct i40e_pf *pf = branch->pf;
9947 u16 branch_seid = branch->seid;
9948 u16 veb_idx = branch->idx;
9949 int i;
9950
9951 /* release any VEBs on this VEB - RECURSION */
9952 for (i = 0; i < I40E_MAX_VEB; i++) {
9953 if (!pf->veb[i])
9954 continue;
9955 if (pf->veb[i]->uplink_seid == branch->seid)
9956 i40e_switch_branch_release(pf->veb[i]);
9957 }
9958
9959 /* Release the VSIs on this VEB, but not the owner VSI.
9960 *
9961 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9962 * the VEB itself, so don't use (*branch) after this loop.
9963 */
9964 for (i = 0; i < pf->num_alloc_vsi; i++) {
9965 if (!pf->vsi[i])
9966 continue;
9967 if (pf->vsi[i]->uplink_seid == branch_seid &&
9968 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9969 i40e_vsi_release(pf->vsi[i]);
9970 }
9971 }
9972
9973 /* There's one corner case where the VEB might not have been
9974 * removed, so double check it here and remove it if needed.
9975 * This case happens if the veb was created from the debugfs
9976 * commands and no VSIs were added to it.
9977 */
9978 if (pf->veb[veb_idx])
9979 i40e_veb_release(pf->veb[veb_idx]);
9980 }
9981
9982 /**
9983 * i40e_veb_clear - remove veb struct
9984 * @veb: the veb to remove
9985 **/
9986 static void i40e_veb_clear(struct i40e_veb *veb)
9987 {
9988 if (!veb)
9989 return;
9990
9991 if (veb->pf) {
9992 struct i40e_pf *pf = veb->pf;
9993
9994 mutex_lock(&pf->switch_mutex);
9995 if (pf->veb[veb->idx] == veb)
9996 pf->veb[veb->idx] = NULL;
9997 mutex_unlock(&pf->switch_mutex);
9998 }
9999
10000 kfree(veb);
10001 }
10002
10003 /**
10004 * i40e_veb_release - Delete a VEB and free its resources
10005 * @veb: the VEB being removed
10006 **/
10007 void i40e_veb_release(struct i40e_veb *veb)
10008 {
10009 struct i40e_vsi *vsi = NULL;
10010 struct i40e_pf *pf;
10011 int i, n = 0;
10012
10013 pf = veb->pf;
10014
10015 /* find the remaining VSI and check for extras */
10016 for (i = 0; i < pf->num_alloc_vsi; i++) {
10017 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10018 n++;
10019 vsi = pf->vsi[i];
10020 }
10021 }
10022 if (n != 1) {
10023 dev_info(&pf->pdev->dev,
10024 "can't remove VEB %d with %d VSIs left\n",
10025 veb->seid, n);
10026 return;
10027 }
10028
10029 /* move the remaining VSI to uplink veb */
10030 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10031 if (veb->uplink_seid) {
10032 vsi->uplink_seid = veb->uplink_seid;
10033 if (veb->uplink_seid == pf->mac_seid)
10034 vsi->veb_idx = I40E_NO_VEB;
10035 else
10036 vsi->veb_idx = veb->veb_idx;
10037 } else {
10038 /* floating VEB */
10039 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10040 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10041 }
10042
10043 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10044 i40e_veb_clear(veb);
10045 }
10046
10047 /**
10048 * i40e_add_veb - create the VEB in the switch
10049 * @veb: the VEB to be instantiated
10050 * @vsi: the controlling VSI
10051 **/
10052 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10053 {
10054 struct i40e_pf *pf = veb->pf;
10055 bool is_default = veb->pf->cur_promisc;
10056 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10057 int ret;
10058
10059 /* get a VEB from the hardware */
10060 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10061 veb->enabled_tc, is_default,
10062 &veb->seid, enable_stats, NULL);
10063 if (ret) {
10064 dev_info(&pf->pdev->dev,
10065 "couldn't add VEB, err %s aq_err %s\n",
10066 i40e_stat_str(&pf->hw, ret),
10067 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10068 return -EPERM;
10069 }
10070
10071 /* get statistics counter */
10072 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10073 &veb->stats_idx, NULL, NULL, NULL);
10074 if (ret) {
10075 dev_info(&pf->pdev->dev,
10076 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10077 i40e_stat_str(&pf->hw, ret),
10078 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10079 return -EPERM;
10080 }
10081 ret = i40e_veb_get_bw_info(veb);
10082 if (ret) {
10083 dev_info(&pf->pdev->dev,
10084 "couldn't get VEB bw info, err %s aq_err %s\n",
10085 i40e_stat_str(&pf->hw, ret),
10086 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10087 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10088 return -ENOENT;
10089 }
10090
10091 vsi->uplink_seid = veb->seid;
10092 vsi->veb_idx = veb->idx;
10093 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10094
10095 return 0;
10096 }
10097
10098 /**
10099 * i40e_veb_setup - Set up a VEB
10100 * @pf: board private structure
10101 * @flags: VEB setup flags
10102 * @uplink_seid: the switch element to link to
10103 * @vsi_seid: the initial VSI seid
10104 * @enabled_tc: Enabled TC bit-map
10105 *
10106 * This allocates the sw VEB structure and links it into the switch
10107 * It is possible and legal for this to be a duplicate of an already
10108 * existing VEB. It is also possible for both uplink and vsi seids
10109 * to be zero, in order to create a floating VEB.
10110 *
10111 * Returns pointer to the successfully allocated VEB sw struct on
10112 * success, otherwise returns NULL on failure.
10113 **/
10114 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10115 u16 uplink_seid, u16 vsi_seid,
10116 u8 enabled_tc)
10117 {
10118 struct i40e_veb *veb, *uplink_veb = NULL;
10119 int vsi_idx, veb_idx;
10120 int ret;
10121
10122 /* if one seid is 0, the other must be 0 to create a floating relay */
10123 if ((uplink_seid == 0 || vsi_seid == 0) &&
10124 (uplink_seid + vsi_seid != 0)) {
10125 dev_info(&pf->pdev->dev,
10126 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10127 uplink_seid, vsi_seid);
10128 return NULL;
10129 }
10130
10131 /* make sure there is such a vsi and uplink */
10132 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10133 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10134 break;
10135 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10136 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10137 vsi_seid);
10138 return NULL;
10139 }
10140
10141 if (uplink_seid && uplink_seid != pf->mac_seid) {
10142 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10143 if (pf->veb[veb_idx] &&
10144 pf->veb[veb_idx]->seid == uplink_seid) {
10145 uplink_veb = pf->veb[veb_idx];
10146 break;
10147 }
10148 }
10149 if (!uplink_veb) {
10150 dev_info(&pf->pdev->dev,
10151 "uplink seid %d not found\n", uplink_seid);
10152 return NULL;
10153 }
10154 }
10155
10156 /* get veb sw struct */
10157 veb_idx = i40e_veb_mem_alloc(pf);
10158 if (veb_idx < 0)
10159 goto err_alloc;
10160 veb = pf->veb[veb_idx];
10161 veb->flags = flags;
10162 veb->uplink_seid = uplink_seid;
10163 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10164 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10165
10166 /* create the VEB in the switch */
10167 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10168 if (ret)
10169 goto err_veb;
10170 if (vsi_idx == pf->lan_vsi)
10171 pf->lan_veb = veb->idx;
10172
10173 return veb;
10174
10175 err_veb:
10176 i40e_veb_clear(veb);
10177 err_alloc:
10178 return NULL;
10179 }
10180
10181 /**
10182 * i40e_setup_pf_switch_element - set PF vars based on switch type
10183 * @pf: board private structure
10184 * @ele: element we are building info from
10185 * @num_reported: total number of elements
10186 * @printconfig: should we print the contents
10187 *
10188 * helper function to assist in extracting a few useful SEID values.
10189 **/
10190 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10191 struct i40e_aqc_switch_config_element_resp *ele,
10192 u16 num_reported, bool printconfig)
10193 {
10194 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10195 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10196 u8 element_type = ele->element_type;
10197 u16 seid = le16_to_cpu(ele->seid);
10198
10199 if (printconfig)
10200 dev_info(&pf->pdev->dev,
10201 "type=%d seid=%d uplink=%d downlink=%d\n",
10202 element_type, seid, uplink_seid, downlink_seid);
10203
10204 switch (element_type) {
10205 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10206 pf->mac_seid = seid;
10207 break;
10208 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10209 /* Main VEB? */
10210 if (uplink_seid != pf->mac_seid)
10211 break;
10212 if (pf->lan_veb == I40E_NO_VEB) {
10213 int v;
10214
10215 /* find existing or else empty VEB */
10216 for (v = 0; v < I40E_MAX_VEB; v++) {
10217 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10218 pf->lan_veb = v;
10219 break;
10220 }
10221 }
10222 if (pf->lan_veb == I40E_NO_VEB) {
10223 v = i40e_veb_mem_alloc(pf);
10224 if (v < 0)
10225 break;
10226 pf->lan_veb = v;
10227 }
10228 }
10229
10230 pf->veb[pf->lan_veb]->seid = seid;
10231 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10232 pf->veb[pf->lan_veb]->pf = pf;
10233 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10234 break;
10235 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10236 if (num_reported != 1)
10237 break;
10238 /* This is immediately after a reset so we can assume this is
10239 * the PF's VSI
10240 */
10241 pf->mac_seid = uplink_seid;
10242 pf->pf_seid = downlink_seid;
10243 pf->main_vsi_seid = seid;
10244 if (printconfig)
10245 dev_info(&pf->pdev->dev,
10246 "pf_seid=%d main_vsi_seid=%d\n",
10247 pf->pf_seid, pf->main_vsi_seid);
10248 break;
10249 case I40E_SWITCH_ELEMENT_TYPE_PF:
10250 case I40E_SWITCH_ELEMENT_TYPE_VF:
10251 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10252 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10253 case I40E_SWITCH_ELEMENT_TYPE_PE:
10254 case I40E_SWITCH_ELEMENT_TYPE_PA:
10255 /* ignore these for now */
10256 break;
10257 default:
10258 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10259 element_type, seid);
10260 break;
10261 }
10262 }
10263
10264 /**
10265 * i40e_fetch_switch_configuration - Get switch config from firmware
10266 * @pf: board private structure
10267 * @printconfig: should we print the contents
10268 *
10269 * Get the current switch configuration from the device and
10270 * extract a few useful SEID values.
10271 **/
10272 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10273 {
10274 struct i40e_aqc_get_switch_config_resp *sw_config;
10275 u16 next_seid = 0;
10276 int ret = 0;
10277 u8 *aq_buf;
10278 int i;
10279
10280 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10281 if (!aq_buf)
10282 return -ENOMEM;
10283
10284 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10285 do {
10286 u16 num_reported, num_total;
10287
10288 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10289 I40E_AQ_LARGE_BUF,
10290 &next_seid, NULL);
10291 if (ret) {
10292 dev_info(&pf->pdev->dev,
10293 "get switch config failed err %s aq_err %s\n",
10294 i40e_stat_str(&pf->hw, ret),
10295 i40e_aq_str(&pf->hw,
10296 pf->hw.aq.asq_last_status));
10297 kfree(aq_buf);
10298 return -ENOENT;
10299 }
10300
10301 num_reported = le16_to_cpu(sw_config->header.num_reported);
10302 num_total = le16_to_cpu(sw_config->header.num_total);
10303
10304 if (printconfig)
10305 dev_info(&pf->pdev->dev,
10306 "header: %d reported %d total\n",
10307 num_reported, num_total);
10308
10309 for (i = 0; i < num_reported; i++) {
10310 struct i40e_aqc_switch_config_element_resp *ele =
10311 &sw_config->element[i];
10312
10313 i40e_setup_pf_switch_element(pf, ele, num_reported,
10314 printconfig);
10315 }
10316 } while (next_seid != 0);
10317
10318 kfree(aq_buf);
10319 return ret;
10320 }
10321
10322 /**
10323 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10324 * @pf: board private structure
10325 * @reinit: if the Main VSI needs to re-initialized.
10326 *
10327 * Returns 0 on success, negative value on failure
10328 **/
10329 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10330 {
10331 u16 flags = 0;
10332 int ret;
10333
10334 /* find out what's out there already */
10335 ret = i40e_fetch_switch_configuration(pf, false);
10336 if (ret) {
10337 dev_info(&pf->pdev->dev,
10338 "couldn't fetch switch config, err %s aq_err %s\n",
10339 i40e_stat_str(&pf->hw, ret),
10340 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10341 return ret;
10342 }
10343 i40e_pf_reset_stats(pf);
10344
10345 /* set the switch config bit for the whole device to
10346 * support limited promisc or true promisc
10347 * when user requests promisc. The default is limited
10348 * promisc.
10349 */
10350
10351 if ((pf->hw.pf_id == 0) &&
10352 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10353 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10354
10355 if (pf->hw.pf_id == 0) {
10356 u16 valid_flags;
10357
10358 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10359 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10360 NULL);
10361 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10362 dev_info(&pf->pdev->dev,
10363 "couldn't set switch config bits, err %s aq_err %s\n",
10364 i40e_stat_str(&pf->hw, ret),
10365 i40e_aq_str(&pf->hw,
10366 pf->hw.aq.asq_last_status));
10367 /* not a fatal problem, just keep going */
10368 }
10369 }
10370
10371 /* first time setup */
10372 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10373 struct i40e_vsi *vsi = NULL;
10374 u16 uplink_seid;
10375
10376 /* Set up the PF VSI associated with the PF's main VSI
10377 * that is already in the HW switch
10378 */
10379 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10380 uplink_seid = pf->veb[pf->lan_veb]->seid;
10381 else
10382 uplink_seid = pf->mac_seid;
10383 if (pf->lan_vsi == I40E_NO_VSI)
10384 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10385 else if (reinit)
10386 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10387 if (!vsi) {
10388 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10389 i40e_fdir_teardown(pf);
10390 return -EAGAIN;
10391 }
10392 } else {
10393 /* force a reset of TC and queue layout configurations */
10394 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10395
10396 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10397 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10398 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10399 }
10400 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10401
10402 i40e_fdir_sb_setup(pf);
10403
10404 /* Setup static PF queue filter control settings */
10405 ret = i40e_setup_pf_filter_control(pf);
10406 if (ret) {
10407 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10408 ret);
10409 /* Failure here should not stop continuing other steps */
10410 }
10411
10412 /* enable RSS in the HW, even for only one queue, as the stack can use
10413 * the hash
10414 */
10415 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10416 i40e_pf_config_rss(pf);
10417
10418 /* fill in link information and enable LSE reporting */
10419 i40e_update_link_info(&pf->hw);
10420 i40e_link_event(pf);
10421
10422 /* Initialize user-specific link properties */
10423 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10424 I40E_AQ_AN_COMPLETED) ? true : false);
10425
10426 i40e_ptp_init(pf);
10427
10428 return ret;
10429 }
10430
10431 /**
10432 * i40e_determine_queue_usage - Work out queue distribution
10433 * @pf: board private structure
10434 **/
10435 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10436 {
10437 int queues_left;
10438
10439 pf->num_lan_qps = 0;
10440 #ifdef I40E_FCOE
10441 pf->num_fcoe_qps = 0;
10442 #endif
10443
10444 /* Find the max queues to be put into basic use. We'll always be
10445 * using TC0, whether or not DCB is running, and TC0 will get the
10446 * big RSS set.
10447 */
10448 queues_left = pf->hw.func_caps.num_tx_qp;
10449
10450 if ((queues_left == 1) ||
10451 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10452 /* one qp for PF, no queues for anything else */
10453 queues_left = 0;
10454 pf->alloc_rss_size = pf->num_lan_qps = 1;
10455
10456 /* make sure all the fancies are disabled */
10457 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10458 I40E_FLAG_IWARP_ENABLED |
10459 #ifdef I40E_FCOE
10460 I40E_FLAG_FCOE_ENABLED |
10461 #endif
10462 I40E_FLAG_FD_SB_ENABLED |
10463 I40E_FLAG_FD_ATR_ENABLED |
10464 I40E_FLAG_DCB_CAPABLE |
10465 I40E_FLAG_SRIOV_ENABLED |
10466 I40E_FLAG_VMDQ_ENABLED);
10467 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10468 I40E_FLAG_FD_SB_ENABLED |
10469 I40E_FLAG_FD_ATR_ENABLED |
10470 I40E_FLAG_DCB_CAPABLE))) {
10471 /* one qp for PF */
10472 pf->alloc_rss_size = pf->num_lan_qps = 1;
10473 queues_left -= pf->num_lan_qps;
10474
10475 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10476 I40E_FLAG_IWARP_ENABLED |
10477 #ifdef I40E_FCOE
10478 I40E_FLAG_FCOE_ENABLED |
10479 #endif
10480 I40E_FLAG_FD_SB_ENABLED |
10481 I40E_FLAG_FD_ATR_ENABLED |
10482 I40E_FLAG_DCB_ENABLED |
10483 I40E_FLAG_VMDQ_ENABLED);
10484 } else {
10485 /* Not enough queues for all TCs */
10486 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10487 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10488 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10489 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10490 }
10491 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10492 num_online_cpus());
10493 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10494 pf->hw.func_caps.num_tx_qp);
10495
10496 queues_left -= pf->num_lan_qps;
10497 }
10498
10499 #ifdef I40E_FCOE
10500 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10501 if (I40E_DEFAULT_FCOE <= queues_left) {
10502 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10503 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10504 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10505 } else {
10506 pf->num_fcoe_qps = 0;
10507 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10508 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10509 }
10510
10511 queues_left -= pf->num_fcoe_qps;
10512 }
10513
10514 #endif
10515 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10516 if (queues_left > 1) {
10517 queues_left -= 1; /* save 1 queue for FD */
10518 } else {
10519 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10520 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10521 }
10522 }
10523
10524 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10525 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10526 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10527 (queues_left / pf->num_vf_qps));
10528 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10529 }
10530
10531 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10532 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10533 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10534 (queues_left / pf->num_vmdq_qps));
10535 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10536 }
10537
10538 pf->queues_left = queues_left;
10539 dev_dbg(&pf->pdev->dev,
10540 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10541 pf->hw.func_caps.num_tx_qp,
10542 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10543 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10544 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10545 queues_left);
10546 #ifdef I40E_FCOE
10547 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10548 #endif
10549 }
10550
10551 /**
10552 * i40e_setup_pf_filter_control - Setup PF static filter control
10553 * @pf: PF to be setup
10554 *
10555 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10556 * settings. If PE/FCoE are enabled then it will also set the per PF
10557 * based filter sizes required for them. It also enables Flow director,
10558 * ethertype and macvlan type filter settings for the pf.
10559 *
10560 * Returns 0 on success, negative on failure
10561 **/
10562 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10563 {
10564 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10565
10566 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10567
10568 /* Flow Director is enabled */
10569 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10570 settings->enable_fdir = true;
10571
10572 /* Ethtype and MACVLAN filters enabled for PF */
10573 settings->enable_ethtype = true;
10574 settings->enable_macvlan = true;
10575
10576 if (i40e_set_filter_control(&pf->hw, settings))
10577 return -ENOENT;
10578
10579 return 0;
10580 }
10581
10582 #define INFO_STRING_LEN 255
10583 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10584 static void i40e_print_features(struct i40e_pf *pf)
10585 {
10586 struct i40e_hw *hw = &pf->hw;
10587 char *buf;
10588 int i;
10589
10590 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10591 if (!buf)
10592 return;
10593
10594 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10595 #ifdef CONFIG_PCI_IOV
10596 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10597 #endif
10598 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10599 pf->hw.func_caps.num_vsis,
10600 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10601 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10602 i += snprintf(&buf[i], REMAIN(i), " RSS");
10603 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10604 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10605 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10606 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10607 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10608 }
10609 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10610 i += snprintf(&buf[i], REMAIN(i), " DCB");
10611 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10612 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10613 if (pf->flags & I40E_FLAG_PTP)
10614 i += snprintf(&buf[i], REMAIN(i), " PTP");
10615 #ifdef I40E_FCOE
10616 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10617 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10618 #endif
10619 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10620 i += snprintf(&buf[i], REMAIN(i), " VEB");
10621 else
10622 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10623
10624 dev_info(&pf->pdev->dev, "%s\n", buf);
10625 kfree(buf);
10626 WARN_ON(i > INFO_STRING_LEN);
10627 }
10628
10629 /**
10630 * i40e_get_platform_mac_addr - get platform-specific MAC address
10631 *
10632 * @pdev: PCI device information struct
10633 * @pf: board private structure
10634 *
10635 * Look up the MAC address in Open Firmware on systems that support it,
10636 * and use IDPROM on SPARC if no OF address is found. On return, the
10637 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10638 * has been selected.
10639 **/
10640 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10641 {
10642 pf->flags &= ~I40E_FLAG_PF_MAC;
10643 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10644 pf->flags |= I40E_FLAG_PF_MAC;
10645 }
10646
10647 /**
10648 * i40e_probe - Device initialization routine
10649 * @pdev: PCI device information struct
10650 * @ent: entry in i40e_pci_tbl
10651 *
10652 * i40e_probe initializes a PF identified by a pci_dev structure.
10653 * The OS initialization, configuring of the PF private structure,
10654 * and a hardware reset occur.
10655 *
10656 * Returns 0 on success, negative on failure
10657 **/
10658 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10659 {
10660 struct i40e_aq_get_phy_abilities_resp abilities;
10661 struct i40e_pf *pf;
10662 struct i40e_hw *hw;
10663 static u16 pfs_found;
10664 u16 wol_nvm_bits;
10665 u16 link_status;
10666 int err;
10667 u32 val;
10668 u32 i;
10669 u8 set_fc_aq_fail;
10670
10671 err = pci_enable_device_mem(pdev);
10672 if (err)
10673 return err;
10674
10675 /* set up for high or low dma */
10676 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10677 if (err) {
10678 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10679 if (err) {
10680 dev_err(&pdev->dev,
10681 "DMA configuration failed: 0x%x\n", err);
10682 goto err_dma;
10683 }
10684 }
10685
10686 /* set up pci connections */
10687 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
10688 IORESOURCE_MEM), i40e_driver_name);
10689 if (err) {
10690 dev_info(&pdev->dev,
10691 "pci_request_selected_regions failed %d\n", err);
10692 goto err_pci_reg;
10693 }
10694
10695 pci_enable_pcie_error_reporting(pdev);
10696 pci_set_master(pdev);
10697
10698 /* Now that we have a PCI connection, we need to do the
10699 * low level device setup. This is primarily setting up
10700 * the Admin Queue structures and then querying for the
10701 * device's current profile information.
10702 */
10703 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10704 if (!pf) {
10705 err = -ENOMEM;
10706 goto err_pf_alloc;
10707 }
10708 pf->next_vsi = 0;
10709 pf->pdev = pdev;
10710 set_bit(__I40E_DOWN, &pf->state);
10711
10712 hw = &pf->hw;
10713 hw->back = pf;
10714
10715 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10716 I40E_MAX_CSR_SPACE);
10717
10718 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10719 if (!hw->hw_addr) {
10720 err = -EIO;
10721 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10722 (unsigned int)pci_resource_start(pdev, 0),
10723 pf->ioremap_len, err);
10724 goto err_ioremap;
10725 }
10726 hw->vendor_id = pdev->vendor;
10727 hw->device_id = pdev->device;
10728 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10729 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10730 hw->subsystem_device_id = pdev->subsystem_device;
10731 hw->bus.device = PCI_SLOT(pdev->devfn);
10732 hw->bus.func = PCI_FUNC(pdev->devfn);
10733 pf->instance = pfs_found;
10734
10735 /* set up the locks for the AQ, do this only once in probe
10736 * and destroy them only once in remove
10737 */
10738 mutex_init(&hw->aq.asq_mutex);
10739 mutex_init(&hw->aq.arq_mutex);
10740
10741 if (debug != -1) {
10742 pf->msg_enable = pf->hw.debug_mask;
10743 pf->msg_enable = debug;
10744 }
10745
10746 /* do a special CORER for clearing PXE mode once at init */
10747 if (hw->revision_id == 0 &&
10748 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10749 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10750 i40e_flush(hw);
10751 msleep(200);
10752 pf->corer_count++;
10753
10754 i40e_clear_pxe_mode(hw);
10755 }
10756
10757 /* Reset here to make sure all is clean and to define PF 'n' */
10758 i40e_clear_hw(hw);
10759 err = i40e_pf_reset(hw);
10760 if (err) {
10761 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10762 goto err_pf_reset;
10763 }
10764 pf->pfr_count++;
10765
10766 hw->aq.num_arq_entries = I40E_AQ_LEN;
10767 hw->aq.num_asq_entries = I40E_AQ_LEN;
10768 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10769 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10770 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10771
10772 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10773 "%s-%s:misc",
10774 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10775
10776 err = i40e_init_shared_code(hw);
10777 if (err) {
10778 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10779 err);
10780 goto err_pf_reset;
10781 }
10782
10783 /* set up a default setting for link flow control */
10784 pf->hw.fc.requested_mode = I40E_FC_NONE;
10785
10786 err = i40e_init_adminq(hw);
10787 if (err) {
10788 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10789 dev_info(&pdev->dev,
10790 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10791 else
10792 dev_info(&pdev->dev,
10793 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10794
10795 goto err_pf_reset;
10796 }
10797
10798 /* provide nvm, fw, api versions */
10799 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10800 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10801 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10802 i40e_nvm_version_str(hw));
10803
10804 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10805 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10806 dev_info(&pdev->dev,
10807 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10808 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10809 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10810 dev_info(&pdev->dev,
10811 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10812
10813 i40e_verify_eeprom(pf);
10814
10815 /* Rev 0 hardware was never productized */
10816 if (hw->revision_id < 1)
10817 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10818
10819 i40e_clear_pxe_mode(hw);
10820 err = i40e_get_capabilities(pf);
10821 if (err)
10822 goto err_adminq_setup;
10823
10824 err = i40e_sw_init(pf);
10825 if (err) {
10826 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10827 goto err_sw_init;
10828 }
10829
10830 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10831 hw->func_caps.num_rx_qp,
10832 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10833 if (err) {
10834 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10835 goto err_init_lan_hmc;
10836 }
10837
10838 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10839 if (err) {
10840 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10841 err = -ENOENT;
10842 goto err_configure_lan_hmc;
10843 }
10844
10845 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10846 * Ignore error return codes because if it was already disabled via
10847 * hardware settings this will fail
10848 */
10849 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10850 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10851 i40e_aq_stop_lldp(hw, true, NULL);
10852 }
10853
10854 i40e_get_mac_addr(hw, hw->mac.addr);
10855 /* allow a platform config to override the HW addr */
10856 i40e_get_platform_mac_addr(pdev, pf);
10857 if (!is_valid_ether_addr(hw->mac.addr)) {
10858 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10859 err = -EIO;
10860 goto err_mac_addr;
10861 }
10862 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10863 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10864 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10865 if (is_valid_ether_addr(hw->mac.port_addr))
10866 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10867 #ifdef I40E_FCOE
10868 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10869 if (err)
10870 dev_info(&pdev->dev,
10871 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10872 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10873 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10874 hw->mac.san_addr);
10875 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10876 }
10877 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10878 #endif /* I40E_FCOE */
10879
10880 pci_set_drvdata(pdev, pf);
10881 pci_save_state(pdev);
10882 #ifdef CONFIG_I40E_DCB
10883 err = i40e_init_pf_dcb(pf);
10884 if (err) {
10885 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10886 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10887 /* Continue without DCB enabled */
10888 }
10889 #endif /* CONFIG_I40E_DCB */
10890
10891 /* set up periodic task facility */
10892 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10893 pf->service_timer_period = HZ;
10894
10895 INIT_WORK(&pf->service_task, i40e_service_task);
10896 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10897 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10898
10899 /* NVM bit on means WoL disabled for the port */
10900 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10901 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10902 pf->wol_en = false;
10903 else
10904 pf->wol_en = true;
10905 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10906
10907 /* set up the main switch operations */
10908 i40e_determine_queue_usage(pf);
10909 err = i40e_init_interrupt_scheme(pf);
10910 if (err)
10911 goto err_switch_setup;
10912
10913 /* The number of VSIs reported by the FW is the minimum guaranteed
10914 * to us; HW supports far more and we share the remaining pool with
10915 * the other PFs. We allocate space for more than the guarantee with
10916 * the understanding that we might not get them all later.
10917 */
10918 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10919 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10920 else
10921 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10922
10923 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10924 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10925 GFP_KERNEL);
10926 if (!pf->vsi) {
10927 err = -ENOMEM;
10928 goto err_switch_setup;
10929 }
10930
10931 #ifdef CONFIG_PCI_IOV
10932 /* prep for VF support */
10933 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10934 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10935 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10936 if (pci_num_vf(pdev))
10937 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10938 }
10939 #endif
10940 err = i40e_setup_pf_switch(pf, false);
10941 if (err) {
10942 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
10943 goto err_vsis;
10944 }
10945
10946 /* Make sure flow control is set according to current settings */
10947 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
10948 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
10949 dev_dbg(&pf->pdev->dev,
10950 "Set fc with err %s aq_err %s on get_phy_cap\n",
10951 i40e_stat_str(hw, err),
10952 i40e_aq_str(hw, hw->aq.asq_last_status));
10953 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
10954 dev_dbg(&pf->pdev->dev,
10955 "Set fc with err %s aq_err %s on set_phy_config\n",
10956 i40e_stat_str(hw, err),
10957 i40e_aq_str(hw, hw->aq.asq_last_status));
10958 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
10959 dev_dbg(&pf->pdev->dev,
10960 "Set fc with err %s aq_err %s on get_link_info\n",
10961 i40e_stat_str(hw, err),
10962 i40e_aq_str(hw, hw->aq.asq_last_status));
10963
10964 /* if FDIR VSI was set up, start it now */
10965 for (i = 0; i < pf->num_alloc_vsi; i++) {
10966 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
10967 i40e_vsi_open(pf->vsi[i]);
10968 break;
10969 }
10970 }
10971
10972 /* The driver only wants link up/down and module qualification
10973 * reports from firmware. Note the negative logic.
10974 */
10975 err = i40e_aq_set_phy_int_mask(&pf->hw,
10976 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10977 I40E_AQ_EVENT_MEDIA_NA |
10978 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10979 if (err)
10980 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10981 i40e_stat_str(&pf->hw, err),
10982 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10983
10984 /* Reconfigure hardware for allowing smaller MSS in the case
10985 * of TSO, so that we avoid the MDD being fired and causing
10986 * a reset in the case of small MSS+TSO.
10987 */
10988 val = rd32(hw, I40E_REG_MSS);
10989 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10990 val &= ~I40E_REG_MSS_MIN_MASK;
10991 val |= I40E_64BYTE_MSS;
10992 wr32(hw, I40E_REG_MSS, val);
10993 }
10994
10995 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
10996 msleep(75);
10997 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10998 if (err)
10999 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11000 i40e_stat_str(&pf->hw, err),
11001 i40e_aq_str(&pf->hw,
11002 pf->hw.aq.asq_last_status));
11003 }
11004 /* The main driver is (mostly) up and happy. We need to set this state
11005 * before setting up the misc vector or we get a race and the vector
11006 * ends up disabled forever.
11007 */
11008 clear_bit(__I40E_DOWN, &pf->state);
11009
11010 /* In case of MSIX we are going to setup the misc vector right here
11011 * to handle admin queue events etc. In case of legacy and MSI
11012 * the misc functionality and queue processing is combined in
11013 * the same vector and that gets setup at open.
11014 */
11015 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11016 err = i40e_setup_misc_vector(pf);
11017 if (err) {
11018 dev_info(&pdev->dev,
11019 "setup of misc vector failed: %d\n", err);
11020 goto err_vsis;
11021 }
11022 }
11023
11024 #ifdef CONFIG_PCI_IOV
11025 /* prep for VF support */
11026 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11027 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11028 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11029 /* disable link interrupts for VFs */
11030 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11031 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11032 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11033 i40e_flush(hw);
11034
11035 if (pci_num_vf(pdev)) {
11036 dev_info(&pdev->dev,
11037 "Active VFs found, allocating resources.\n");
11038 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11039 if (err)
11040 dev_info(&pdev->dev,
11041 "Error %d allocating resources for existing VFs\n",
11042 err);
11043 }
11044 }
11045 #endif /* CONFIG_PCI_IOV */
11046
11047 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11048 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11049 pf->num_iwarp_msix,
11050 I40E_IWARP_IRQ_PILE_ID);
11051 if (pf->iwarp_base_vector < 0) {
11052 dev_info(&pdev->dev,
11053 "failed to get tracking for %d vectors for IWARP err=%d\n",
11054 pf->num_iwarp_msix, pf->iwarp_base_vector);
11055 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11056 }
11057 }
11058
11059 i40e_dbg_pf_init(pf);
11060
11061 /* tell the firmware that we're starting */
11062 i40e_send_version(pf);
11063
11064 /* since everything's happy, start the service_task timer */
11065 mod_timer(&pf->service_timer,
11066 round_jiffies(jiffies + pf->service_timer_period));
11067
11068 /* add this PF to client device list and launch a client service task */
11069 err = i40e_lan_add_device(pf);
11070 if (err)
11071 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11072 err);
11073
11074 #ifdef I40E_FCOE
11075 /* create FCoE interface */
11076 i40e_fcoe_vsi_setup(pf);
11077
11078 #endif
11079 #define PCI_SPEED_SIZE 8
11080 #define PCI_WIDTH_SIZE 8
11081 /* Devices on the IOSF bus do not have this information
11082 * and will report PCI Gen 1 x 1 by default so don't bother
11083 * checking them.
11084 */
11085 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11086 char speed[PCI_SPEED_SIZE] = "Unknown";
11087 char width[PCI_WIDTH_SIZE] = "Unknown";
11088
11089 /* Get the negotiated link width and speed from PCI config
11090 * space
11091 */
11092 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11093 &link_status);
11094
11095 i40e_set_pci_config_data(hw, link_status);
11096
11097 switch (hw->bus.speed) {
11098 case i40e_bus_speed_8000:
11099 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11100 case i40e_bus_speed_5000:
11101 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11102 case i40e_bus_speed_2500:
11103 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11104 default:
11105 break;
11106 }
11107 switch (hw->bus.width) {
11108 case i40e_bus_width_pcie_x8:
11109 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11110 case i40e_bus_width_pcie_x4:
11111 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11112 case i40e_bus_width_pcie_x2:
11113 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11114 case i40e_bus_width_pcie_x1:
11115 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11116 default:
11117 break;
11118 }
11119
11120 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11121 speed, width);
11122
11123 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11124 hw->bus.speed < i40e_bus_speed_8000) {
11125 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11126 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11127 }
11128 }
11129
11130 /* get the requested speeds from the fw */
11131 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11132 if (err)
11133 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11134 i40e_stat_str(&pf->hw, err),
11135 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11136 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11137
11138 /* get the supported phy types from the fw */
11139 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11140 if (err)
11141 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11142 i40e_stat_str(&pf->hw, err),
11143 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11144 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11145
11146 /* Add a filter to drop all Flow control frames from any VSI from being
11147 * transmitted. By doing so we stop a malicious VF from sending out
11148 * PAUSE or PFC frames and potentially controlling traffic for other
11149 * PF/VF VSIs.
11150 * The FW can still send Flow control frames if enabled.
11151 */
11152 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11153 pf->main_vsi_seid);
11154
11155 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11156 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11157 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11158
11159 /* print a string summarizing features */
11160 i40e_print_features(pf);
11161
11162 return 0;
11163
11164 /* Unwind what we've done if something failed in the setup */
11165 err_vsis:
11166 set_bit(__I40E_DOWN, &pf->state);
11167 i40e_clear_interrupt_scheme(pf);
11168 kfree(pf->vsi);
11169 err_switch_setup:
11170 i40e_reset_interrupt_capability(pf);
11171 del_timer_sync(&pf->service_timer);
11172 err_mac_addr:
11173 err_configure_lan_hmc:
11174 (void)i40e_shutdown_lan_hmc(hw);
11175 err_init_lan_hmc:
11176 kfree(pf->qp_pile);
11177 err_sw_init:
11178 err_adminq_setup:
11179 err_pf_reset:
11180 iounmap(hw->hw_addr);
11181 err_ioremap:
11182 kfree(pf);
11183 err_pf_alloc:
11184 pci_disable_pcie_error_reporting(pdev);
11185 pci_release_selected_regions(pdev,
11186 pci_select_bars(pdev, IORESOURCE_MEM));
11187 err_pci_reg:
11188 err_dma:
11189 pci_disable_device(pdev);
11190 return err;
11191 }
11192
11193 /**
11194 * i40e_remove - Device removal routine
11195 * @pdev: PCI device information struct
11196 *
11197 * i40e_remove is called by the PCI subsystem to alert the driver
11198 * that is should release a PCI device. This could be caused by a
11199 * Hot-Plug event, or because the driver is going to be removed from
11200 * memory.
11201 **/
11202 static void i40e_remove(struct pci_dev *pdev)
11203 {
11204 struct i40e_pf *pf = pci_get_drvdata(pdev);
11205 struct i40e_hw *hw = &pf->hw;
11206 i40e_status ret_code;
11207 int i;
11208
11209 i40e_dbg_pf_exit(pf);
11210
11211 i40e_ptp_stop(pf);
11212
11213 /* Disable RSS in hw */
11214 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11215 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11216
11217 /* no more scheduling of any task */
11218 set_bit(__I40E_SUSPENDED, &pf->state);
11219 set_bit(__I40E_DOWN, &pf->state);
11220 if (pf->service_timer.data)
11221 del_timer_sync(&pf->service_timer);
11222 if (pf->service_task.func)
11223 cancel_work_sync(&pf->service_task);
11224
11225 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11226 i40e_free_vfs(pf);
11227 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11228 }
11229
11230 i40e_fdir_teardown(pf);
11231
11232 /* If there is a switch structure or any orphans, remove them.
11233 * This will leave only the PF's VSI remaining.
11234 */
11235 for (i = 0; i < I40E_MAX_VEB; i++) {
11236 if (!pf->veb[i])
11237 continue;
11238
11239 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11240 pf->veb[i]->uplink_seid == 0)
11241 i40e_switch_branch_release(pf->veb[i]);
11242 }
11243
11244 /* Now we can shutdown the PF's VSI, just before we kill
11245 * adminq and hmc.
11246 */
11247 if (pf->vsi[pf->lan_vsi])
11248 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11249
11250 /* remove attached clients */
11251 ret_code = i40e_lan_del_device(pf);
11252 if (ret_code) {
11253 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11254 ret_code);
11255 }
11256
11257 /* shutdown and destroy the HMC */
11258 if (hw->hmc.hmc_obj) {
11259 ret_code = i40e_shutdown_lan_hmc(hw);
11260 if (ret_code)
11261 dev_warn(&pdev->dev,
11262 "Failed to destroy the HMC resources: %d\n",
11263 ret_code);
11264 }
11265
11266 /* shutdown the adminq */
11267 ret_code = i40e_shutdown_adminq(hw);
11268 if (ret_code)
11269 dev_warn(&pdev->dev,
11270 "Failed to destroy the Admin Queue resources: %d\n",
11271 ret_code);
11272
11273 /* destroy the locks only once, here */
11274 mutex_destroy(&hw->aq.arq_mutex);
11275 mutex_destroy(&hw->aq.asq_mutex);
11276
11277 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11278 i40e_clear_interrupt_scheme(pf);
11279 for (i = 0; i < pf->num_alloc_vsi; i++) {
11280 if (pf->vsi[i]) {
11281 i40e_vsi_clear_rings(pf->vsi[i]);
11282 i40e_vsi_clear(pf->vsi[i]);
11283 pf->vsi[i] = NULL;
11284 }
11285 }
11286
11287 for (i = 0; i < I40E_MAX_VEB; i++) {
11288 kfree(pf->veb[i]);
11289 pf->veb[i] = NULL;
11290 }
11291
11292 kfree(pf->qp_pile);
11293 kfree(pf->vsi);
11294
11295 iounmap(hw->hw_addr);
11296 kfree(pf);
11297 pci_release_selected_regions(pdev,
11298 pci_select_bars(pdev, IORESOURCE_MEM));
11299
11300 pci_disable_pcie_error_reporting(pdev);
11301 pci_disable_device(pdev);
11302 }
11303
11304 /**
11305 * i40e_pci_error_detected - warning that something funky happened in PCI land
11306 * @pdev: PCI device information struct
11307 *
11308 * Called to warn that something happened and the error handling steps
11309 * are in progress. Allows the driver to quiesce things, be ready for
11310 * remediation.
11311 **/
11312 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11313 enum pci_channel_state error)
11314 {
11315 struct i40e_pf *pf = pci_get_drvdata(pdev);
11316
11317 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11318
11319 /* shutdown all operations */
11320 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11321 rtnl_lock();
11322 i40e_prep_for_reset(pf);
11323 rtnl_unlock();
11324 }
11325
11326 /* Request a slot reset */
11327 return PCI_ERS_RESULT_NEED_RESET;
11328 }
11329
11330 /**
11331 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11332 * @pdev: PCI device information struct
11333 *
11334 * Called to find if the driver can work with the device now that
11335 * the pci slot has been reset. If a basic connection seems good
11336 * (registers are readable and have sane content) then return a
11337 * happy little PCI_ERS_RESULT_xxx.
11338 **/
11339 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11340 {
11341 struct i40e_pf *pf = pci_get_drvdata(pdev);
11342 pci_ers_result_t result;
11343 int err;
11344 u32 reg;
11345
11346 dev_dbg(&pdev->dev, "%s\n", __func__);
11347 if (pci_enable_device_mem(pdev)) {
11348 dev_info(&pdev->dev,
11349 "Cannot re-enable PCI device after reset.\n");
11350 result = PCI_ERS_RESULT_DISCONNECT;
11351 } else {
11352 pci_set_master(pdev);
11353 pci_restore_state(pdev);
11354 pci_save_state(pdev);
11355 pci_wake_from_d3(pdev, false);
11356
11357 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11358 if (reg == 0)
11359 result = PCI_ERS_RESULT_RECOVERED;
11360 else
11361 result = PCI_ERS_RESULT_DISCONNECT;
11362 }
11363
11364 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11365 if (err) {
11366 dev_info(&pdev->dev,
11367 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11368 err);
11369 /* non-fatal, continue */
11370 }
11371
11372 return result;
11373 }
11374
11375 /**
11376 * i40e_pci_error_resume - restart operations after PCI error recovery
11377 * @pdev: PCI device information struct
11378 *
11379 * Called to allow the driver to bring things back up after PCI error
11380 * and/or reset recovery has finished.
11381 **/
11382 static void i40e_pci_error_resume(struct pci_dev *pdev)
11383 {
11384 struct i40e_pf *pf = pci_get_drvdata(pdev);
11385
11386 dev_dbg(&pdev->dev, "%s\n", __func__);
11387 if (test_bit(__I40E_SUSPENDED, &pf->state))
11388 return;
11389
11390 rtnl_lock();
11391 i40e_handle_reset_warning(pf);
11392 rtnl_unlock();
11393 }
11394
11395 /**
11396 * i40e_shutdown - PCI callback for shutting down
11397 * @pdev: PCI device information struct
11398 **/
11399 static void i40e_shutdown(struct pci_dev *pdev)
11400 {
11401 struct i40e_pf *pf = pci_get_drvdata(pdev);
11402 struct i40e_hw *hw = &pf->hw;
11403
11404 set_bit(__I40E_SUSPENDED, &pf->state);
11405 set_bit(__I40E_DOWN, &pf->state);
11406 rtnl_lock();
11407 i40e_prep_for_reset(pf);
11408 rtnl_unlock();
11409
11410 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11411 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11412
11413 del_timer_sync(&pf->service_timer);
11414 cancel_work_sync(&pf->service_task);
11415 i40e_fdir_teardown(pf);
11416
11417 rtnl_lock();
11418 i40e_prep_for_reset(pf);
11419 rtnl_unlock();
11420
11421 wr32(hw, I40E_PFPM_APM,
11422 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11423 wr32(hw, I40E_PFPM_WUFC,
11424 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11425
11426 i40e_clear_interrupt_scheme(pf);
11427
11428 if (system_state == SYSTEM_POWER_OFF) {
11429 pci_wake_from_d3(pdev, pf->wol_en);
11430 pci_set_power_state(pdev, PCI_D3hot);
11431 }
11432 }
11433
11434 #ifdef CONFIG_PM
11435 /**
11436 * i40e_suspend - PCI callback for moving to D3
11437 * @pdev: PCI device information struct
11438 **/
11439 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11440 {
11441 struct i40e_pf *pf = pci_get_drvdata(pdev);
11442 struct i40e_hw *hw = &pf->hw;
11443
11444 set_bit(__I40E_SUSPENDED, &pf->state);
11445 set_bit(__I40E_DOWN, &pf->state);
11446
11447 rtnl_lock();
11448 i40e_prep_for_reset(pf);
11449 rtnl_unlock();
11450
11451 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11452 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11453
11454 pci_wake_from_d3(pdev, pf->wol_en);
11455 pci_set_power_state(pdev, PCI_D3hot);
11456
11457 return 0;
11458 }
11459
11460 /**
11461 * i40e_resume - PCI callback for waking up from D3
11462 * @pdev: PCI device information struct
11463 **/
11464 static int i40e_resume(struct pci_dev *pdev)
11465 {
11466 struct i40e_pf *pf = pci_get_drvdata(pdev);
11467 u32 err;
11468
11469 pci_set_power_state(pdev, PCI_D0);
11470 pci_restore_state(pdev);
11471 /* pci_restore_state() clears dev->state_saves, so
11472 * call pci_save_state() again to restore it.
11473 */
11474 pci_save_state(pdev);
11475
11476 err = pci_enable_device_mem(pdev);
11477 if (err) {
11478 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11479 return err;
11480 }
11481 pci_set_master(pdev);
11482
11483 /* no wakeup events while running */
11484 pci_wake_from_d3(pdev, false);
11485
11486 /* handling the reset will rebuild the device state */
11487 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11488 clear_bit(__I40E_DOWN, &pf->state);
11489 rtnl_lock();
11490 i40e_reset_and_rebuild(pf, false);
11491 rtnl_unlock();
11492 }
11493
11494 return 0;
11495 }
11496
11497 #endif
11498 static const struct pci_error_handlers i40e_err_handler = {
11499 .error_detected = i40e_pci_error_detected,
11500 .slot_reset = i40e_pci_error_slot_reset,
11501 .resume = i40e_pci_error_resume,
11502 };
11503
11504 static struct pci_driver i40e_driver = {
11505 .name = i40e_driver_name,
11506 .id_table = i40e_pci_tbl,
11507 .probe = i40e_probe,
11508 .remove = i40e_remove,
11509 #ifdef CONFIG_PM
11510 .suspend = i40e_suspend,
11511 .resume = i40e_resume,
11512 #endif
11513 .shutdown = i40e_shutdown,
11514 .err_handler = &i40e_err_handler,
11515 .sriov_configure = i40e_pci_sriov_configure,
11516 };
11517
11518 /**
11519 * i40e_init_module - Driver registration routine
11520 *
11521 * i40e_init_module is the first routine called when the driver is
11522 * loaded. All it does is register with the PCI subsystem.
11523 **/
11524 static int __init i40e_init_module(void)
11525 {
11526 pr_info("%s: %s - version %s\n", i40e_driver_name,
11527 i40e_driver_string, i40e_driver_version_str);
11528 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11529
11530 /* we will see if single thread per module is enough for now,
11531 * it can't be any worse than using the system workqueue which
11532 * was already single threaded
11533 */
11534 i40e_wq = create_singlethread_workqueue(i40e_driver_name);
11535 if (!i40e_wq) {
11536 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11537 return -ENOMEM;
11538 }
11539
11540 i40e_dbg_init();
11541 return pci_register_driver(&i40e_driver);
11542 }
11543 module_init(i40e_init_module);
11544
11545 /**
11546 * i40e_exit_module - Driver exit cleanup routine
11547 *
11548 * i40e_exit_module is called just before the driver is removed
11549 * from memory.
11550 **/
11551 static void __exit i40e_exit_module(void)
11552 {
11553 pci_unregister_driver(&i40e_driver);
11554 destroy_workqueue(i40e_wq);
11555 i40e_dbg_exit();
11556 }
11557 module_exit(i40e_exit_module);
Linux kernel - Deliverables
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