1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
31 #include <linux/types.h>
32 #include <linux/delay.h>
34 #include <linux/netdevice.h>
36 #include "e1000_regs.h"
37 #include "e1000_defines.h"
41 #define E1000_DEV_ID_82576 0x10C9
42 #define E1000_DEV_ID_82576_FIBER 0x10E6
43 #define E1000_DEV_ID_82576_SERDES 0x10E7
44 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
45 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
46 #define E1000_DEV_ID_82576_NS 0x150A
47 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
48 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
49 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
50 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
51 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
52 #define E1000_DEV_ID_82580_COPPER 0x150E
53 #define E1000_DEV_ID_82580_FIBER 0x150F
54 #define E1000_DEV_ID_82580_SERDES 0x1510
55 #define E1000_DEV_ID_82580_SGMII 0x1511
56 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57 #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
58 #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
59 #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
60 #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
61 #define E1000_DEV_ID_DH89XXCC_SFP 0x0440
62 #define E1000_DEV_ID_I350_COPPER 0x1521
63 #define E1000_DEV_ID_I350_FIBER 0x1522
64 #define E1000_DEV_ID_I350_SERDES 0x1523
65 #define E1000_DEV_ID_I350_SGMII 0x1524
66 #define E1000_DEV_ID_I210_COPPER 0x1533
67 #define E1000_DEV_ID_I210_FIBER 0x1536
68 #define E1000_DEV_ID_I210_SERDES 0x1537
69 #define E1000_DEV_ID_I210_SGMII 0x1538
70 #define E1000_DEV_ID_I211_COPPER 0x1539
71 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS 0x1F40
72 #define E1000_DEV_ID_I354_SGMII 0x1F41
73 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS 0x1F45
75 #define E1000_REVISION_2 2
76 #define E1000_REVISION_4 4
78 #define E1000_FUNC_0 0
79 #define E1000_FUNC_1 1
80 #define E1000_FUNC_2 2
81 #define E1000_FUNC_3 3
83 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN0 0
84 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN1 3
85 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN2 6
86 #define E1000_ALT_MAC_ADDRESS_OFFSET_LAN3 9
97 e1000_num_macs
/* List is 1-based, so subtract 1 for true count. */
100 enum e1000_media_type
{
101 e1000_media_type_unknown
= 0,
102 e1000_media_type_copper
= 1,
103 e1000_media_type_fiber
= 2,
104 e1000_media_type_internal_serdes
= 3,
105 e1000_num_media_types
108 enum e1000_nvm_type
{
109 e1000_nvm_unknown
= 0,
111 e1000_nvm_eeprom_spi
,
117 enum e1000_nvm_override
{
118 e1000_nvm_override_none
= 0,
119 e1000_nvm_override_spi_small
,
120 e1000_nvm_override_spi_large
,
123 enum e1000_phy_type
{
124 e1000_phy_unknown
= 0,
136 enum e1000_bus_type
{
137 e1000_bus_type_unknown
= 0,
140 e1000_bus_type_pci_express
,
141 e1000_bus_type_reserved
144 enum e1000_bus_speed
{
145 e1000_bus_speed_unknown
= 0,
151 e1000_bus_speed_2500
,
152 e1000_bus_speed_5000
,
153 e1000_bus_speed_reserved
156 enum e1000_bus_width
{
157 e1000_bus_width_unknown
= 0,
158 e1000_bus_width_pcie_x1
,
159 e1000_bus_width_pcie_x2
,
160 e1000_bus_width_pcie_x4
= 4,
161 e1000_bus_width_pcie_x8
= 8,
164 e1000_bus_width_reserved
167 enum e1000_1000t_rx_status
{
168 e1000_1000t_rx_status_not_ok
= 0,
169 e1000_1000t_rx_status_ok
,
170 e1000_1000t_rx_status_undefined
= 0xFF
173 enum e1000_rev_polarity
{
174 e1000_rev_polarity_normal
= 0,
175 e1000_rev_polarity_reversed
,
176 e1000_rev_polarity_undefined
= 0xFF
184 e1000_fc_default
= 0xFF
187 /* Statistics counters collected by the MAC */
188 struct e1000_hw_stats
{
271 struct e1000_phy_stats
{
276 struct e1000_host_mng_dhcp_cookie
{
287 /* Host Interface "Rev 1" */
288 struct e1000_host_command_header
{
295 #define E1000_HI_MAX_DATA_LENGTH 252
296 struct e1000_host_command_info
{
297 struct e1000_host_command_header command_header
;
298 u8 command_data
[E1000_HI_MAX_DATA_LENGTH
];
301 /* Host Interface "Rev 2" */
302 struct e1000_host_mng_command_header
{
310 #define E1000_HI_MAX_MNG_DATA_LENGTH 0x6F8
311 struct e1000_host_mng_command_info
{
312 struct e1000_host_mng_command_header command_header
;
313 u8 command_data
[E1000_HI_MAX_MNG_DATA_LENGTH
];
316 #include "e1000_mac.h"
317 #include "e1000_phy.h"
318 #include "e1000_nvm.h"
319 #include "e1000_mbx.h"
321 struct e1000_mac_operations
{
322 s32 (*check_for_link
)(struct e1000_hw
*);
323 s32 (*reset_hw
)(struct e1000_hw
*);
324 s32 (*init_hw
)(struct e1000_hw
*);
325 bool (*check_mng_mode
)(struct e1000_hw
*);
326 s32 (*setup_physical_interface
)(struct e1000_hw
*);
327 void (*rar_set
)(struct e1000_hw
*, u8
*, u32
);
328 s32 (*read_mac_addr
)(struct e1000_hw
*);
329 s32 (*get_speed_and_duplex
)(struct e1000_hw
*, u16
*, u16
*);
330 s32 (*acquire_swfw_sync
)(struct e1000_hw
*, u16
);
331 void (*release_swfw_sync
)(struct e1000_hw
*, u16
);
332 #ifdef CONFIG_IGB_HWMON
333 s32 (*get_thermal_sensor_data
)(struct e1000_hw
*);
334 s32 (*init_thermal_sensor_thresh
)(struct e1000_hw
*);
339 struct e1000_phy_operations
{
340 s32 (*acquire
)(struct e1000_hw
*);
341 s32 (*check_polarity
)(struct e1000_hw
*);
342 s32 (*check_reset_block
)(struct e1000_hw
*);
343 s32 (*force_speed_duplex
)(struct e1000_hw
*);
344 s32 (*get_cfg_done
)(struct e1000_hw
*hw
);
345 s32 (*get_cable_length
)(struct e1000_hw
*);
346 s32 (*get_phy_info
)(struct e1000_hw
*);
347 s32 (*read_reg
)(struct e1000_hw
*, u32
, u16
*);
348 void (*release
)(struct e1000_hw
*);
349 s32 (*reset
)(struct e1000_hw
*);
350 s32 (*set_d0_lplu_state
)(struct e1000_hw
*, bool);
351 s32 (*set_d3_lplu_state
)(struct e1000_hw
*, bool);
352 s32 (*write_reg
)(struct e1000_hw
*, u32
, u16
);
353 s32 (*read_i2c_byte
)(struct e1000_hw
*, u8
, u8
, u8
*);
354 s32 (*write_i2c_byte
)(struct e1000_hw
*, u8
, u8
, u8
);
357 struct e1000_nvm_operations
{
358 s32 (*acquire
)(struct e1000_hw
*);
359 s32 (*read
)(struct e1000_hw
*, u16
, u16
, u16
*);
360 void (*release
)(struct e1000_hw
*);
361 s32 (*write
)(struct e1000_hw
*, u16
, u16
, u16
*);
362 s32 (*update
)(struct e1000_hw
*);
363 s32 (*validate
)(struct e1000_hw
*);
364 s32 (*valid_led_default
)(struct e1000_hw
*, u16
*);
367 #define E1000_MAX_SENSORS 3
369 struct e1000_thermal_diode_data
{
376 struct e1000_thermal_sensor_data
{
377 struct e1000_thermal_diode_data sensor
[E1000_MAX_SENSORS
];
381 s32 (*get_invariants
)(struct e1000_hw
*);
382 struct e1000_mac_operations
*mac_ops
;
383 struct e1000_phy_operations
*phy_ops
;
384 struct e1000_nvm_operations
*nvm_ops
;
387 extern const struct e1000_info e1000_82575_info
;
389 struct e1000_mac_info
{
390 struct e1000_mac_operations ops
;
395 enum e1000_mac_type type
;
406 /* Maximum size of the MTA register table in all supported adapters */
407 #define MAX_MTA_REG 128
408 u32 mta_shadow
[MAX_MTA_REG
];
411 u8 forced_speed_duplex
;
414 bool arc_subsystem_valid
;
415 bool asf_firmware_present
;
418 bool disable_hw_init_bits
;
419 bool get_link_status
;
420 bool ifs_params_forced
;
422 bool report_tx_early
;
423 bool serdes_has_link
;
424 bool tx_pkt_filtering
;
425 struct e1000_thermal_sensor_data thermal_sensor_data
;
428 struct e1000_phy_info
{
429 struct e1000_phy_operations ops
;
431 enum e1000_phy_type type
;
433 enum e1000_1000t_rx_status local_rx
;
434 enum e1000_1000t_rx_status remote_rx
;
435 enum e1000_ms_type ms_type
;
436 enum e1000_ms_type original_ms_type
;
437 enum e1000_rev_polarity cable_polarity
;
438 enum e1000_smart_speed smart_speed
;
442 u32 reset_delay_us
; /* in usec */
445 enum e1000_media_type media_type
;
447 u16 autoneg_advertised
;
450 u16 max_cable_length
;
451 u16 min_cable_length
;
455 bool disable_polarity_correction
;
457 bool polarity_correction
;
459 bool speed_downgraded
;
460 bool autoneg_wait_to_complete
;
463 struct e1000_nvm_info
{
464 struct e1000_nvm_operations ops
;
465 enum e1000_nvm_type type
;
466 enum e1000_nvm_override override
;
478 struct e1000_bus_info
{
479 enum e1000_bus_type type
;
480 enum e1000_bus_speed speed
;
481 enum e1000_bus_width width
;
489 struct e1000_fc_info
{
490 u32 high_water
; /* Flow control high-water mark */
491 u32 low_water
; /* Flow control low-water mark */
492 u16 pause_time
; /* Flow control pause timer */
493 bool send_xon
; /* Flow control send XON */
494 bool strict_ieee
; /* Strict IEEE mode */
495 enum e1000_fc_mode current_mode
; /* Type of flow control */
496 enum e1000_fc_mode requested_mode
;
499 struct e1000_mbx_operations
{
500 s32 (*init_params
)(struct e1000_hw
*hw
);
501 s32 (*read
)(struct e1000_hw
*, u32
*, u16
, u16
);
502 s32 (*write
)(struct e1000_hw
*, u32
*, u16
, u16
);
503 s32 (*read_posted
)(struct e1000_hw
*, u32
*, u16
, u16
);
504 s32 (*write_posted
)(struct e1000_hw
*, u32
*, u16
, u16
);
505 s32 (*check_for_msg
)(struct e1000_hw
*, u16
);
506 s32 (*check_for_ack
)(struct e1000_hw
*, u16
);
507 s32 (*check_for_rst
)(struct e1000_hw
*, u16
);
510 struct e1000_mbx_stats
{
519 struct e1000_mbx_info
{
520 struct e1000_mbx_operations ops
;
521 struct e1000_mbx_stats stats
;
527 struct e1000_dev_spec_82575
{
529 bool global_device_reset
;
531 bool clear_semaphore_once
;
532 struct e1000_sfp_flags eth_flags
;
540 u8 __iomem
*flash_address
;
541 unsigned long io_base
;
543 struct e1000_mac_info mac
;
544 struct e1000_fc_info fc
;
545 struct e1000_phy_info phy
;
546 struct e1000_nvm_info nvm
;
547 struct e1000_bus_info bus
;
548 struct e1000_mbx_info mbx
;
549 struct e1000_host_mng_dhcp_cookie mng_cookie
;
552 struct e1000_dev_spec_82575 _82575
;
556 u16 subsystem_vendor_id
;
557 u16 subsystem_device_id
;
563 extern struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
);
564 #define hw_dbg(format, arg...) \
565 netdev_dbg(igb_get_hw_dev(hw), format, ##arg)
567 /* These functions must be implemented by drivers */
568 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
);
569 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
);
570 #endif /* _E1000_HW_H_ */