1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 /* ethtool support for igb */
30 #include <linux/vmalloc.h>
31 #include <linux/netdevice.h>
32 #include <linux/pci.h>
33 #include <linux/delay.h>
34 #include <linux/interrupt.h>
35 #include <linux/if_ether.h>
36 #include <linux/ethtool.h>
37 #include <linux/sched.h>
38 #include <linux/slab.h>
39 #include <linux/pm_runtime.h>
40 #include <linux/highmem.h>
41 #include <linux/mdio.h>
46 char stat_string
[ETH_GSTRING_LEN
];
51 #define IGB_STAT(_name, _stat) { \
52 .stat_string = _name, \
53 .sizeof_stat = FIELD_SIZEOF(struct igb_adapter, _stat), \
54 .stat_offset = offsetof(struct igb_adapter, _stat) \
56 static const struct igb_stats igb_gstrings_stats
[] = {
57 IGB_STAT("rx_packets", stats
.gprc
),
58 IGB_STAT("tx_packets", stats
.gptc
),
59 IGB_STAT("rx_bytes", stats
.gorc
),
60 IGB_STAT("tx_bytes", stats
.gotc
),
61 IGB_STAT("rx_broadcast", stats
.bprc
),
62 IGB_STAT("tx_broadcast", stats
.bptc
),
63 IGB_STAT("rx_multicast", stats
.mprc
),
64 IGB_STAT("tx_multicast", stats
.mptc
),
65 IGB_STAT("multicast", stats
.mprc
),
66 IGB_STAT("collisions", stats
.colc
),
67 IGB_STAT("rx_crc_errors", stats
.crcerrs
),
68 IGB_STAT("rx_no_buffer_count", stats
.rnbc
),
69 IGB_STAT("rx_missed_errors", stats
.mpc
),
70 IGB_STAT("tx_aborted_errors", stats
.ecol
),
71 IGB_STAT("tx_carrier_errors", stats
.tncrs
),
72 IGB_STAT("tx_window_errors", stats
.latecol
),
73 IGB_STAT("tx_abort_late_coll", stats
.latecol
),
74 IGB_STAT("tx_deferred_ok", stats
.dc
),
75 IGB_STAT("tx_single_coll_ok", stats
.scc
),
76 IGB_STAT("tx_multi_coll_ok", stats
.mcc
),
77 IGB_STAT("tx_timeout_count", tx_timeout_count
),
78 IGB_STAT("rx_long_length_errors", stats
.roc
),
79 IGB_STAT("rx_short_length_errors", stats
.ruc
),
80 IGB_STAT("rx_align_errors", stats
.algnerrc
),
81 IGB_STAT("tx_tcp_seg_good", stats
.tsctc
),
82 IGB_STAT("tx_tcp_seg_failed", stats
.tsctfc
),
83 IGB_STAT("rx_flow_control_xon", stats
.xonrxc
),
84 IGB_STAT("rx_flow_control_xoff", stats
.xoffrxc
),
85 IGB_STAT("tx_flow_control_xon", stats
.xontxc
),
86 IGB_STAT("tx_flow_control_xoff", stats
.xofftxc
),
87 IGB_STAT("rx_long_byte_count", stats
.gorc
),
88 IGB_STAT("tx_dma_out_of_sync", stats
.doosync
),
89 IGB_STAT("tx_smbus", stats
.mgptc
),
90 IGB_STAT("rx_smbus", stats
.mgprc
),
91 IGB_STAT("dropped_smbus", stats
.mgpdc
),
92 IGB_STAT("os2bmc_rx_by_bmc", stats
.o2bgptc
),
93 IGB_STAT("os2bmc_tx_by_bmc", stats
.b2ospc
),
94 IGB_STAT("os2bmc_tx_by_host", stats
.o2bspc
),
95 IGB_STAT("os2bmc_rx_by_host", stats
.b2ogprc
),
96 IGB_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts
),
97 IGB_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared
),
100 #define IGB_NETDEV_STAT(_net_stat) { \
101 .stat_string = __stringify(_net_stat), \
102 .sizeof_stat = FIELD_SIZEOF(struct rtnl_link_stats64, _net_stat), \
103 .stat_offset = offsetof(struct rtnl_link_stats64, _net_stat) \
105 static const struct igb_stats igb_gstrings_net_stats
[] = {
106 IGB_NETDEV_STAT(rx_errors
),
107 IGB_NETDEV_STAT(tx_errors
),
108 IGB_NETDEV_STAT(tx_dropped
),
109 IGB_NETDEV_STAT(rx_length_errors
),
110 IGB_NETDEV_STAT(rx_over_errors
),
111 IGB_NETDEV_STAT(rx_frame_errors
),
112 IGB_NETDEV_STAT(rx_fifo_errors
),
113 IGB_NETDEV_STAT(tx_fifo_errors
),
114 IGB_NETDEV_STAT(tx_heartbeat_errors
)
117 #define IGB_GLOBAL_STATS_LEN \
118 (sizeof(igb_gstrings_stats) / sizeof(struct igb_stats))
119 #define IGB_NETDEV_STATS_LEN \
120 (sizeof(igb_gstrings_net_stats) / sizeof(struct igb_stats))
121 #define IGB_RX_QUEUE_STATS_LEN \
122 (sizeof(struct igb_rx_queue_stats) / sizeof(u64))
124 #define IGB_TX_QUEUE_STATS_LEN 3 /* packets, bytes, restart_queue */
126 #define IGB_QUEUE_STATS_LEN \
127 ((((struct igb_adapter *)netdev_priv(netdev))->num_rx_queues * \
128 IGB_RX_QUEUE_STATS_LEN) + \
129 (((struct igb_adapter *)netdev_priv(netdev))->num_tx_queues * \
130 IGB_TX_QUEUE_STATS_LEN))
131 #define IGB_STATS_LEN \
132 (IGB_GLOBAL_STATS_LEN + IGB_NETDEV_STATS_LEN + IGB_QUEUE_STATS_LEN)
134 static const char igb_gstrings_test
[][ETH_GSTRING_LEN
] = {
135 "Register test (offline)", "Eeprom test (offline)",
136 "Interrupt test (offline)", "Loopback test (offline)",
137 "Link test (on/offline)"
139 #define IGB_TEST_LEN (sizeof(igb_gstrings_test) / ETH_GSTRING_LEN)
141 static int igb_get_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
143 struct igb_adapter
*adapter
= netdev_priv(netdev
);
144 struct e1000_hw
*hw
= &adapter
->hw
;
145 struct e1000_dev_spec_82575
*dev_spec
= &hw
->dev_spec
._82575
;
146 struct e1000_sfp_flags
*eth_flags
= &dev_spec
->eth_flags
;
149 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
151 ecmd
->supported
= (SUPPORTED_10baseT_Half
|
152 SUPPORTED_10baseT_Full
|
153 SUPPORTED_100baseT_Half
|
154 SUPPORTED_100baseT_Full
|
155 SUPPORTED_1000baseT_Full
|
159 ecmd
->advertising
= ADVERTISED_TP
;
161 if (hw
->mac
.autoneg
== 1) {
162 ecmd
->advertising
|= ADVERTISED_Autoneg
;
163 /* the e1000 autoneg seems to match ethtool nicely */
164 ecmd
->advertising
|= hw
->phy
.autoneg_advertised
;
167 ecmd
->port
= PORT_TP
;
168 ecmd
->phy_address
= hw
->phy
.addr
;
169 ecmd
->transceiver
= XCVR_INTERNAL
;
171 ecmd
->supported
= (SUPPORTED_FIBRE
|
174 ecmd
->advertising
= ADVERTISED_FIBRE
;
175 if (hw
->mac
.type
== e1000_i354
) {
176 ecmd
->supported
|= SUPPORTED_2500baseX_Full
;
177 ecmd
->advertising
|= ADVERTISED_2500baseX_Full
;
179 if ((eth_flags
->e1000_base_lx
) || (eth_flags
->e1000_base_sx
)) {
180 ecmd
->supported
|= SUPPORTED_1000baseT_Full
;
181 ecmd
->advertising
|= ADVERTISED_1000baseT_Full
;
183 if (eth_flags
->e100_base_fx
) {
184 ecmd
->supported
|= SUPPORTED_100baseT_Full
;
185 ecmd
->advertising
|= ADVERTISED_100baseT_Full
;
187 if (hw
->mac
.autoneg
== 1)
188 ecmd
->advertising
|= ADVERTISED_Autoneg
;
190 ecmd
->port
= PORT_FIBRE
;
191 ecmd
->transceiver
= XCVR_EXTERNAL
;
194 if (hw
->mac
.autoneg
!= 1)
195 ecmd
->advertising
&= ~(ADVERTISED_Pause
|
196 ADVERTISED_Asym_Pause
);
198 if (hw
->fc
.requested_mode
== e1000_fc_full
)
199 ecmd
->advertising
|= ADVERTISED_Pause
;
200 else if (hw
->fc
.requested_mode
== e1000_fc_rx_pause
)
201 ecmd
->advertising
|= (ADVERTISED_Pause
|
202 ADVERTISED_Asym_Pause
);
203 else if (hw
->fc
.requested_mode
== e1000_fc_tx_pause
)
204 ecmd
->advertising
|= ADVERTISED_Asym_Pause
;
206 ecmd
->advertising
&= ~(ADVERTISED_Pause
|
207 ADVERTISED_Asym_Pause
);
209 status
= rd32(E1000_STATUS
);
211 if (status
& E1000_STATUS_LU
) {
212 if ((hw
->mac
.type
== e1000_i354
) &&
213 (status
& E1000_STATUS_2P5_SKU
) &&
214 !(status
& E1000_STATUS_2P5_SKU_OVER
))
215 ecmd
->speed
= SPEED_2500
;
216 else if (status
& E1000_STATUS_SPEED_1000
)
217 ecmd
->speed
= SPEED_1000
;
218 else if (status
& E1000_STATUS_SPEED_100
)
219 ecmd
->speed
= SPEED_100
;
221 ecmd
->speed
= SPEED_10
;
222 if ((status
& E1000_STATUS_FD
) ||
223 hw
->phy
.media_type
!= e1000_media_type_copper
)
224 ecmd
->duplex
= DUPLEX_FULL
;
226 ecmd
->duplex
= DUPLEX_HALF
;
232 if ((hw
->phy
.media_type
== e1000_media_type_fiber
) ||
234 ecmd
->autoneg
= AUTONEG_ENABLE
;
236 ecmd
->autoneg
= AUTONEG_DISABLE
;
238 /* MDI-X => 2; MDI =>1; Invalid =>0 */
239 if (hw
->phy
.media_type
== e1000_media_type_copper
)
240 ecmd
->eth_tp_mdix
= hw
->phy
.is_mdix
? ETH_TP_MDI_X
:
243 ecmd
->eth_tp_mdix
= ETH_TP_MDI_INVALID
;
245 if (hw
->phy
.mdix
== AUTO_ALL_MODES
)
246 ecmd
->eth_tp_mdix_ctrl
= ETH_TP_MDI_AUTO
;
248 ecmd
->eth_tp_mdix_ctrl
= hw
->phy
.mdix
;
253 static int igb_set_settings(struct net_device
*netdev
, struct ethtool_cmd
*ecmd
)
255 struct igb_adapter
*adapter
= netdev_priv(netdev
);
256 struct e1000_hw
*hw
= &adapter
->hw
;
258 /* When SoL/IDER sessions are active, autoneg/speed/duplex
261 if (igb_check_reset_block(hw
)) {
262 dev_err(&adapter
->pdev
->dev
,
263 "Cannot change link characteristics when SoL/IDER is active.\n");
267 /* MDI setting is only allowed when autoneg enabled because
268 * some hardware doesn't allow MDI setting when speed or
271 if (ecmd
->eth_tp_mdix_ctrl
) {
272 if (hw
->phy
.media_type
!= e1000_media_type_copper
)
275 if ((ecmd
->eth_tp_mdix_ctrl
!= ETH_TP_MDI_AUTO
) &&
276 (ecmd
->autoneg
!= AUTONEG_ENABLE
)) {
277 dev_err(&adapter
->pdev
->dev
, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
282 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
285 if (ecmd
->autoneg
== AUTONEG_ENABLE
) {
287 if (hw
->phy
.media_type
== e1000_media_type_fiber
) {
288 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
291 switch (adapter
->link_speed
) {
293 hw
->phy
.autoneg_advertised
=
294 ADVERTISED_2500baseX_Full
;
297 hw
->phy
.autoneg_advertised
=
298 ADVERTISED_1000baseT_Full
;
301 hw
->phy
.autoneg_advertised
=
302 ADVERTISED_100baseT_Full
;
308 hw
->phy
.autoneg_advertised
= ecmd
->advertising
|
312 ecmd
->advertising
= hw
->phy
.autoneg_advertised
;
313 if (adapter
->fc_autoneg
)
314 hw
->fc
.requested_mode
= e1000_fc_default
;
316 u32 speed
= ethtool_cmd_speed(ecmd
);
317 /* calling this overrides forced MDI setting */
318 if (igb_set_spd_dplx(adapter
, speed
, ecmd
->duplex
)) {
319 clear_bit(__IGB_RESETTING
, &adapter
->state
);
324 /* MDI-X => 2; MDI => 1; Auto => 3 */
325 if (ecmd
->eth_tp_mdix_ctrl
) {
326 /* fix up the value for auto (3 => 0) as zero is mapped
329 if (ecmd
->eth_tp_mdix_ctrl
== ETH_TP_MDI_AUTO
)
330 hw
->phy
.mdix
= AUTO_ALL_MODES
;
332 hw
->phy
.mdix
= ecmd
->eth_tp_mdix_ctrl
;
336 if (netif_running(adapter
->netdev
)) {
342 clear_bit(__IGB_RESETTING
, &adapter
->state
);
346 static u32
igb_get_link(struct net_device
*netdev
)
348 struct igb_adapter
*adapter
= netdev_priv(netdev
);
349 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
351 /* If the link is not reported up to netdev, interrupts are disabled,
352 * and so the physical link state may have changed since we last
353 * looked. Set get_link_status to make sure that the true link
354 * state is interrogated, rather than pulling a cached and possibly
355 * stale link state from the driver.
357 if (!netif_carrier_ok(netdev
))
358 mac
->get_link_status
= 1;
360 return igb_has_link(adapter
);
363 static void igb_get_pauseparam(struct net_device
*netdev
,
364 struct ethtool_pauseparam
*pause
)
366 struct igb_adapter
*adapter
= netdev_priv(netdev
);
367 struct e1000_hw
*hw
= &adapter
->hw
;
370 (adapter
->fc_autoneg
? AUTONEG_ENABLE
: AUTONEG_DISABLE
);
372 if (hw
->fc
.current_mode
== e1000_fc_rx_pause
)
374 else if (hw
->fc
.current_mode
== e1000_fc_tx_pause
)
376 else if (hw
->fc
.current_mode
== e1000_fc_full
) {
382 static int igb_set_pauseparam(struct net_device
*netdev
,
383 struct ethtool_pauseparam
*pause
)
385 struct igb_adapter
*adapter
= netdev_priv(netdev
);
386 struct e1000_hw
*hw
= &adapter
->hw
;
389 /* 100basefx does not support setting link flow control */
390 if (hw
->dev_spec
._82575
.eth_flags
.e100_base_fx
)
393 adapter
->fc_autoneg
= pause
->autoneg
;
395 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
398 if (adapter
->fc_autoneg
== AUTONEG_ENABLE
) {
399 hw
->fc
.requested_mode
= e1000_fc_default
;
400 if (netif_running(adapter
->netdev
)) {
407 if (pause
->rx_pause
&& pause
->tx_pause
)
408 hw
->fc
.requested_mode
= e1000_fc_full
;
409 else if (pause
->rx_pause
&& !pause
->tx_pause
)
410 hw
->fc
.requested_mode
= e1000_fc_rx_pause
;
411 else if (!pause
->rx_pause
&& pause
->tx_pause
)
412 hw
->fc
.requested_mode
= e1000_fc_tx_pause
;
413 else if (!pause
->rx_pause
&& !pause
->tx_pause
)
414 hw
->fc
.requested_mode
= e1000_fc_none
;
416 hw
->fc
.current_mode
= hw
->fc
.requested_mode
;
418 retval
= ((hw
->phy
.media_type
== e1000_media_type_copper
) ?
419 igb_force_mac_fc(hw
) : igb_setup_link(hw
));
422 clear_bit(__IGB_RESETTING
, &adapter
->state
);
426 static u32
igb_get_msglevel(struct net_device
*netdev
)
428 struct igb_adapter
*adapter
= netdev_priv(netdev
);
429 return adapter
->msg_enable
;
432 static void igb_set_msglevel(struct net_device
*netdev
, u32 data
)
434 struct igb_adapter
*adapter
= netdev_priv(netdev
);
435 adapter
->msg_enable
= data
;
438 static int igb_get_regs_len(struct net_device
*netdev
)
440 #define IGB_REGS_LEN 739
441 return IGB_REGS_LEN
* sizeof(u32
);
444 static void igb_get_regs(struct net_device
*netdev
,
445 struct ethtool_regs
*regs
, void *p
)
447 struct igb_adapter
*adapter
= netdev_priv(netdev
);
448 struct e1000_hw
*hw
= &adapter
->hw
;
452 memset(p
, 0, IGB_REGS_LEN
* sizeof(u32
));
454 regs
->version
= (1 << 24) | (hw
->revision_id
<< 16) | hw
->device_id
;
456 /* General Registers */
457 regs_buff
[0] = rd32(E1000_CTRL
);
458 regs_buff
[1] = rd32(E1000_STATUS
);
459 regs_buff
[2] = rd32(E1000_CTRL_EXT
);
460 regs_buff
[3] = rd32(E1000_MDIC
);
461 regs_buff
[4] = rd32(E1000_SCTL
);
462 regs_buff
[5] = rd32(E1000_CONNSW
);
463 regs_buff
[6] = rd32(E1000_VET
);
464 regs_buff
[7] = rd32(E1000_LEDCTL
);
465 regs_buff
[8] = rd32(E1000_PBA
);
466 regs_buff
[9] = rd32(E1000_PBS
);
467 regs_buff
[10] = rd32(E1000_FRTIMER
);
468 regs_buff
[11] = rd32(E1000_TCPTIMER
);
471 regs_buff
[12] = rd32(E1000_EECD
);
474 /* Reading EICS for EICR because they read the
475 * same but EICS does not clear on read
477 regs_buff
[13] = rd32(E1000_EICS
);
478 regs_buff
[14] = rd32(E1000_EICS
);
479 regs_buff
[15] = rd32(E1000_EIMS
);
480 regs_buff
[16] = rd32(E1000_EIMC
);
481 regs_buff
[17] = rd32(E1000_EIAC
);
482 regs_buff
[18] = rd32(E1000_EIAM
);
483 /* Reading ICS for ICR because they read the
484 * same but ICS does not clear on read
486 regs_buff
[19] = rd32(E1000_ICS
);
487 regs_buff
[20] = rd32(E1000_ICS
);
488 regs_buff
[21] = rd32(E1000_IMS
);
489 regs_buff
[22] = rd32(E1000_IMC
);
490 regs_buff
[23] = rd32(E1000_IAC
);
491 regs_buff
[24] = rd32(E1000_IAM
);
492 regs_buff
[25] = rd32(E1000_IMIRVP
);
495 regs_buff
[26] = rd32(E1000_FCAL
);
496 regs_buff
[27] = rd32(E1000_FCAH
);
497 regs_buff
[28] = rd32(E1000_FCTTV
);
498 regs_buff
[29] = rd32(E1000_FCRTL
);
499 regs_buff
[30] = rd32(E1000_FCRTH
);
500 regs_buff
[31] = rd32(E1000_FCRTV
);
503 regs_buff
[32] = rd32(E1000_RCTL
);
504 regs_buff
[33] = rd32(E1000_RXCSUM
);
505 regs_buff
[34] = rd32(E1000_RLPML
);
506 regs_buff
[35] = rd32(E1000_RFCTL
);
507 regs_buff
[36] = rd32(E1000_MRQC
);
508 regs_buff
[37] = rd32(E1000_VT_CTL
);
511 regs_buff
[38] = rd32(E1000_TCTL
);
512 regs_buff
[39] = rd32(E1000_TCTL_EXT
);
513 regs_buff
[40] = rd32(E1000_TIPG
);
514 regs_buff
[41] = rd32(E1000_DTXCTL
);
517 regs_buff
[42] = rd32(E1000_WUC
);
518 regs_buff
[43] = rd32(E1000_WUFC
);
519 regs_buff
[44] = rd32(E1000_WUS
);
520 regs_buff
[45] = rd32(E1000_IPAV
);
521 regs_buff
[46] = rd32(E1000_WUPL
);
524 regs_buff
[47] = rd32(E1000_PCS_CFG0
);
525 regs_buff
[48] = rd32(E1000_PCS_LCTL
);
526 regs_buff
[49] = rd32(E1000_PCS_LSTAT
);
527 regs_buff
[50] = rd32(E1000_PCS_ANADV
);
528 regs_buff
[51] = rd32(E1000_PCS_LPAB
);
529 regs_buff
[52] = rd32(E1000_PCS_NPTX
);
530 regs_buff
[53] = rd32(E1000_PCS_LPABNP
);
533 regs_buff
[54] = adapter
->stats
.crcerrs
;
534 regs_buff
[55] = adapter
->stats
.algnerrc
;
535 regs_buff
[56] = adapter
->stats
.symerrs
;
536 regs_buff
[57] = adapter
->stats
.rxerrc
;
537 regs_buff
[58] = adapter
->stats
.mpc
;
538 regs_buff
[59] = adapter
->stats
.scc
;
539 regs_buff
[60] = adapter
->stats
.ecol
;
540 regs_buff
[61] = adapter
->stats
.mcc
;
541 regs_buff
[62] = adapter
->stats
.latecol
;
542 regs_buff
[63] = adapter
->stats
.colc
;
543 regs_buff
[64] = adapter
->stats
.dc
;
544 regs_buff
[65] = adapter
->stats
.tncrs
;
545 regs_buff
[66] = adapter
->stats
.sec
;
546 regs_buff
[67] = adapter
->stats
.htdpmc
;
547 regs_buff
[68] = adapter
->stats
.rlec
;
548 regs_buff
[69] = adapter
->stats
.xonrxc
;
549 regs_buff
[70] = adapter
->stats
.xontxc
;
550 regs_buff
[71] = adapter
->stats
.xoffrxc
;
551 regs_buff
[72] = adapter
->stats
.xofftxc
;
552 regs_buff
[73] = adapter
->stats
.fcruc
;
553 regs_buff
[74] = adapter
->stats
.prc64
;
554 regs_buff
[75] = adapter
->stats
.prc127
;
555 regs_buff
[76] = adapter
->stats
.prc255
;
556 regs_buff
[77] = adapter
->stats
.prc511
;
557 regs_buff
[78] = adapter
->stats
.prc1023
;
558 regs_buff
[79] = adapter
->stats
.prc1522
;
559 regs_buff
[80] = adapter
->stats
.gprc
;
560 regs_buff
[81] = adapter
->stats
.bprc
;
561 regs_buff
[82] = adapter
->stats
.mprc
;
562 regs_buff
[83] = adapter
->stats
.gptc
;
563 regs_buff
[84] = adapter
->stats
.gorc
;
564 regs_buff
[86] = adapter
->stats
.gotc
;
565 regs_buff
[88] = adapter
->stats
.rnbc
;
566 regs_buff
[89] = adapter
->stats
.ruc
;
567 regs_buff
[90] = adapter
->stats
.rfc
;
568 regs_buff
[91] = adapter
->stats
.roc
;
569 regs_buff
[92] = adapter
->stats
.rjc
;
570 regs_buff
[93] = adapter
->stats
.mgprc
;
571 regs_buff
[94] = adapter
->stats
.mgpdc
;
572 regs_buff
[95] = adapter
->stats
.mgptc
;
573 regs_buff
[96] = adapter
->stats
.tor
;
574 regs_buff
[98] = adapter
->stats
.tot
;
575 regs_buff
[100] = adapter
->stats
.tpr
;
576 regs_buff
[101] = adapter
->stats
.tpt
;
577 regs_buff
[102] = adapter
->stats
.ptc64
;
578 regs_buff
[103] = adapter
->stats
.ptc127
;
579 regs_buff
[104] = adapter
->stats
.ptc255
;
580 regs_buff
[105] = adapter
->stats
.ptc511
;
581 regs_buff
[106] = adapter
->stats
.ptc1023
;
582 regs_buff
[107] = adapter
->stats
.ptc1522
;
583 regs_buff
[108] = adapter
->stats
.mptc
;
584 regs_buff
[109] = adapter
->stats
.bptc
;
585 regs_buff
[110] = adapter
->stats
.tsctc
;
586 regs_buff
[111] = adapter
->stats
.iac
;
587 regs_buff
[112] = adapter
->stats
.rpthc
;
588 regs_buff
[113] = adapter
->stats
.hgptc
;
589 regs_buff
[114] = adapter
->stats
.hgorc
;
590 regs_buff
[116] = adapter
->stats
.hgotc
;
591 regs_buff
[118] = adapter
->stats
.lenerrs
;
592 regs_buff
[119] = adapter
->stats
.scvpc
;
593 regs_buff
[120] = adapter
->stats
.hrmpc
;
595 for (i
= 0; i
< 4; i
++)
596 regs_buff
[121 + i
] = rd32(E1000_SRRCTL(i
));
597 for (i
= 0; i
< 4; i
++)
598 regs_buff
[125 + i
] = rd32(E1000_PSRTYPE(i
));
599 for (i
= 0; i
< 4; i
++)
600 regs_buff
[129 + i
] = rd32(E1000_RDBAL(i
));
601 for (i
= 0; i
< 4; i
++)
602 regs_buff
[133 + i
] = rd32(E1000_RDBAH(i
));
603 for (i
= 0; i
< 4; i
++)
604 regs_buff
[137 + i
] = rd32(E1000_RDLEN(i
));
605 for (i
= 0; i
< 4; i
++)
606 regs_buff
[141 + i
] = rd32(E1000_RDH(i
));
607 for (i
= 0; i
< 4; i
++)
608 regs_buff
[145 + i
] = rd32(E1000_RDT(i
));
609 for (i
= 0; i
< 4; i
++)
610 regs_buff
[149 + i
] = rd32(E1000_RXDCTL(i
));
612 for (i
= 0; i
< 10; i
++)
613 regs_buff
[153 + i
] = rd32(E1000_EITR(i
));
614 for (i
= 0; i
< 8; i
++)
615 regs_buff
[163 + i
] = rd32(E1000_IMIR(i
));
616 for (i
= 0; i
< 8; i
++)
617 regs_buff
[171 + i
] = rd32(E1000_IMIREXT(i
));
618 for (i
= 0; i
< 16; i
++)
619 regs_buff
[179 + i
] = rd32(E1000_RAL(i
));
620 for (i
= 0; i
< 16; i
++)
621 regs_buff
[195 + i
] = rd32(E1000_RAH(i
));
623 for (i
= 0; i
< 4; i
++)
624 regs_buff
[211 + i
] = rd32(E1000_TDBAL(i
));
625 for (i
= 0; i
< 4; i
++)
626 regs_buff
[215 + i
] = rd32(E1000_TDBAH(i
));
627 for (i
= 0; i
< 4; i
++)
628 regs_buff
[219 + i
] = rd32(E1000_TDLEN(i
));
629 for (i
= 0; i
< 4; i
++)
630 regs_buff
[223 + i
] = rd32(E1000_TDH(i
));
631 for (i
= 0; i
< 4; i
++)
632 regs_buff
[227 + i
] = rd32(E1000_TDT(i
));
633 for (i
= 0; i
< 4; i
++)
634 regs_buff
[231 + i
] = rd32(E1000_TXDCTL(i
));
635 for (i
= 0; i
< 4; i
++)
636 regs_buff
[235 + i
] = rd32(E1000_TDWBAL(i
));
637 for (i
= 0; i
< 4; i
++)
638 regs_buff
[239 + i
] = rd32(E1000_TDWBAH(i
));
639 for (i
= 0; i
< 4; i
++)
640 regs_buff
[243 + i
] = rd32(E1000_DCA_TXCTRL(i
));
642 for (i
= 0; i
< 4; i
++)
643 regs_buff
[247 + i
] = rd32(E1000_IP4AT_REG(i
));
644 for (i
= 0; i
< 4; i
++)
645 regs_buff
[251 + i
] = rd32(E1000_IP6AT_REG(i
));
646 for (i
= 0; i
< 32; i
++)
647 regs_buff
[255 + i
] = rd32(E1000_WUPM_REG(i
));
648 for (i
= 0; i
< 128; i
++)
649 regs_buff
[287 + i
] = rd32(E1000_FFMT_REG(i
));
650 for (i
= 0; i
< 128; i
++)
651 regs_buff
[415 + i
] = rd32(E1000_FFVT_REG(i
));
652 for (i
= 0; i
< 4; i
++)
653 regs_buff
[543 + i
] = rd32(E1000_FFLT_REG(i
));
655 regs_buff
[547] = rd32(E1000_TDFH
);
656 regs_buff
[548] = rd32(E1000_TDFT
);
657 regs_buff
[549] = rd32(E1000_TDFHS
);
658 regs_buff
[550] = rd32(E1000_TDFPC
);
660 if (hw
->mac
.type
> e1000_82580
) {
661 regs_buff
[551] = adapter
->stats
.o2bgptc
;
662 regs_buff
[552] = adapter
->stats
.b2ospc
;
663 regs_buff
[553] = adapter
->stats
.o2bspc
;
664 regs_buff
[554] = adapter
->stats
.b2ogprc
;
667 if (hw
->mac
.type
!= e1000_82576
)
669 for (i
= 0; i
< 12; i
++)
670 regs_buff
[555 + i
] = rd32(E1000_SRRCTL(i
+ 4));
671 for (i
= 0; i
< 4; i
++)
672 regs_buff
[567 + i
] = rd32(E1000_PSRTYPE(i
+ 4));
673 for (i
= 0; i
< 12; i
++)
674 regs_buff
[571 + i
] = rd32(E1000_RDBAL(i
+ 4));
675 for (i
= 0; i
< 12; i
++)
676 regs_buff
[583 + i
] = rd32(E1000_RDBAH(i
+ 4));
677 for (i
= 0; i
< 12; i
++)
678 regs_buff
[595 + i
] = rd32(E1000_RDLEN(i
+ 4));
679 for (i
= 0; i
< 12; i
++)
680 regs_buff
[607 + i
] = rd32(E1000_RDH(i
+ 4));
681 for (i
= 0; i
< 12; i
++)
682 regs_buff
[619 + i
] = rd32(E1000_RDT(i
+ 4));
683 for (i
= 0; i
< 12; i
++)
684 regs_buff
[631 + i
] = rd32(E1000_RXDCTL(i
+ 4));
686 for (i
= 0; i
< 12; i
++)
687 regs_buff
[643 + i
] = rd32(E1000_TDBAL(i
+ 4));
688 for (i
= 0; i
< 12; i
++)
689 regs_buff
[655 + i
] = rd32(E1000_TDBAH(i
+ 4));
690 for (i
= 0; i
< 12; i
++)
691 regs_buff
[667 + i
] = rd32(E1000_TDLEN(i
+ 4));
692 for (i
= 0; i
< 12; i
++)
693 regs_buff
[679 + i
] = rd32(E1000_TDH(i
+ 4));
694 for (i
= 0; i
< 12; i
++)
695 regs_buff
[691 + i
] = rd32(E1000_TDT(i
+ 4));
696 for (i
= 0; i
< 12; i
++)
697 regs_buff
[703 + i
] = rd32(E1000_TXDCTL(i
+ 4));
698 for (i
= 0; i
< 12; i
++)
699 regs_buff
[715 + i
] = rd32(E1000_TDWBAL(i
+ 4));
700 for (i
= 0; i
< 12; i
++)
701 regs_buff
[727 + i
] = rd32(E1000_TDWBAH(i
+ 4));
704 static int igb_get_eeprom_len(struct net_device
*netdev
)
706 struct igb_adapter
*adapter
= netdev_priv(netdev
);
707 return adapter
->hw
.nvm
.word_size
* 2;
710 static int igb_get_eeprom(struct net_device
*netdev
,
711 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
713 struct igb_adapter
*adapter
= netdev_priv(netdev
);
714 struct e1000_hw
*hw
= &adapter
->hw
;
716 int first_word
, last_word
;
720 if (eeprom
->len
== 0)
723 eeprom
->magic
= hw
->vendor_id
| (hw
->device_id
<< 16);
725 first_word
= eeprom
->offset
>> 1;
726 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
728 eeprom_buff
= kmalloc(sizeof(u16
) *
729 (last_word
- first_word
+ 1), GFP_KERNEL
);
733 if (hw
->nvm
.type
== e1000_nvm_eeprom_spi
)
734 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
,
735 last_word
- first_word
+ 1,
738 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
739 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
+ i
, 1,
746 /* Device's eeprom is always little-endian, word addressable */
747 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
748 le16_to_cpus(&eeprom_buff
[i
]);
750 memcpy(bytes
, (u8
*)eeprom_buff
+ (eeprom
->offset
& 1),
757 static int igb_set_eeprom(struct net_device
*netdev
,
758 struct ethtool_eeprom
*eeprom
, u8
*bytes
)
760 struct igb_adapter
*adapter
= netdev_priv(netdev
);
761 struct e1000_hw
*hw
= &adapter
->hw
;
764 int max_len
, first_word
, last_word
, ret_val
= 0;
767 if (eeprom
->len
== 0)
770 if (hw
->mac
.type
== e1000_i211
)
773 if (eeprom
->magic
!= (hw
->vendor_id
| (hw
->device_id
<< 16)))
776 max_len
= hw
->nvm
.word_size
* 2;
778 first_word
= eeprom
->offset
>> 1;
779 last_word
= (eeprom
->offset
+ eeprom
->len
- 1) >> 1;
780 eeprom_buff
= kmalloc(max_len
, GFP_KERNEL
);
784 ptr
= (void *)eeprom_buff
;
786 if (eeprom
->offset
& 1) {
787 /* need read/modify/write of first changed EEPROM word
788 * only the second byte of the word is being modified
790 ret_val
= hw
->nvm
.ops
.read(hw
, first_word
, 1,
794 if (((eeprom
->offset
+ eeprom
->len
) & 1) && (ret_val
== 0)) {
795 /* need read/modify/write of last changed EEPROM word
796 * only the first byte of the word is being modified
798 ret_val
= hw
->nvm
.ops
.read(hw
, last_word
, 1,
799 &eeprom_buff
[last_word
- first_word
]);
802 /* Device's eeprom is always little-endian, word addressable */
803 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
804 le16_to_cpus(&eeprom_buff
[i
]);
806 memcpy(ptr
, bytes
, eeprom
->len
);
808 for (i
= 0; i
< last_word
- first_word
+ 1; i
++)
809 eeprom_buff
[i
] = cpu_to_le16(eeprom_buff
[i
]);
811 ret_val
= hw
->nvm
.ops
.write(hw
, first_word
,
812 last_word
- first_word
+ 1, eeprom_buff
);
814 /* Update the checksum if nvm write succeeded */
816 hw
->nvm
.ops
.update(hw
);
818 igb_set_fw_version(adapter
);
823 static void igb_get_drvinfo(struct net_device
*netdev
,
824 struct ethtool_drvinfo
*drvinfo
)
826 struct igb_adapter
*adapter
= netdev_priv(netdev
);
828 strlcpy(drvinfo
->driver
, igb_driver_name
, sizeof(drvinfo
->driver
));
829 strlcpy(drvinfo
->version
, igb_driver_version
, sizeof(drvinfo
->version
));
831 /* EEPROM image version # is reported as firmware version # for
834 strlcpy(drvinfo
->fw_version
, adapter
->fw_version
,
835 sizeof(drvinfo
->fw_version
));
836 strlcpy(drvinfo
->bus_info
, pci_name(adapter
->pdev
),
837 sizeof(drvinfo
->bus_info
));
838 drvinfo
->n_stats
= IGB_STATS_LEN
;
839 drvinfo
->testinfo_len
= IGB_TEST_LEN
;
840 drvinfo
->regdump_len
= igb_get_regs_len(netdev
);
841 drvinfo
->eedump_len
= igb_get_eeprom_len(netdev
);
844 static void igb_get_ringparam(struct net_device
*netdev
,
845 struct ethtool_ringparam
*ring
)
847 struct igb_adapter
*adapter
= netdev_priv(netdev
);
849 ring
->rx_max_pending
= IGB_MAX_RXD
;
850 ring
->tx_max_pending
= IGB_MAX_TXD
;
851 ring
->rx_pending
= adapter
->rx_ring_count
;
852 ring
->tx_pending
= adapter
->tx_ring_count
;
855 static int igb_set_ringparam(struct net_device
*netdev
,
856 struct ethtool_ringparam
*ring
)
858 struct igb_adapter
*adapter
= netdev_priv(netdev
);
859 struct igb_ring
*temp_ring
;
861 u16 new_rx_count
, new_tx_count
;
863 if ((ring
->rx_mini_pending
) || (ring
->rx_jumbo_pending
))
866 new_rx_count
= min_t(u32
, ring
->rx_pending
, IGB_MAX_RXD
);
867 new_rx_count
= max_t(u16
, new_rx_count
, IGB_MIN_RXD
);
868 new_rx_count
= ALIGN(new_rx_count
, REQ_RX_DESCRIPTOR_MULTIPLE
);
870 new_tx_count
= min_t(u32
, ring
->tx_pending
, IGB_MAX_TXD
);
871 new_tx_count
= max_t(u16
, new_tx_count
, IGB_MIN_TXD
);
872 new_tx_count
= ALIGN(new_tx_count
, REQ_TX_DESCRIPTOR_MULTIPLE
);
874 if ((new_tx_count
== adapter
->tx_ring_count
) &&
875 (new_rx_count
== adapter
->rx_ring_count
)) {
880 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
883 if (!netif_running(adapter
->netdev
)) {
884 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
885 adapter
->tx_ring
[i
]->count
= new_tx_count
;
886 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
887 adapter
->rx_ring
[i
]->count
= new_rx_count
;
888 adapter
->tx_ring_count
= new_tx_count
;
889 adapter
->rx_ring_count
= new_rx_count
;
893 if (adapter
->num_tx_queues
> adapter
->num_rx_queues
)
894 temp_ring
= vmalloc(adapter
->num_tx_queues
*
895 sizeof(struct igb_ring
));
897 temp_ring
= vmalloc(adapter
->num_rx_queues
*
898 sizeof(struct igb_ring
));
907 /* We can't just free everything and then setup again,
908 * because the ISRs in MSI-X mode get passed pointers
909 * to the Tx and Rx ring structs.
911 if (new_tx_count
!= adapter
->tx_ring_count
) {
912 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
913 memcpy(&temp_ring
[i
], adapter
->tx_ring
[i
],
914 sizeof(struct igb_ring
));
916 temp_ring
[i
].count
= new_tx_count
;
917 err
= igb_setup_tx_resources(&temp_ring
[i
]);
921 igb_free_tx_resources(&temp_ring
[i
]);
927 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
928 igb_free_tx_resources(adapter
->tx_ring
[i
]);
930 memcpy(adapter
->tx_ring
[i
], &temp_ring
[i
],
931 sizeof(struct igb_ring
));
934 adapter
->tx_ring_count
= new_tx_count
;
937 if (new_rx_count
!= adapter
->rx_ring_count
) {
938 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
939 memcpy(&temp_ring
[i
], adapter
->rx_ring
[i
],
940 sizeof(struct igb_ring
));
942 temp_ring
[i
].count
= new_rx_count
;
943 err
= igb_setup_rx_resources(&temp_ring
[i
]);
947 igb_free_rx_resources(&temp_ring
[i
]);
954 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
955 igb_free_rx_resources(adapter
->rx_ring
[i
]);
957 memcpy(adapter
->rx_ring
[i
], &temp_ring
[i
],
958 sizeof(struct igb_ring
));
961 adapter
->rx_ring_count
= new_rx_count
;
967 clear_bit(__IGB_RESETTING
, &adapter
->state
);
971 /* ethtool register test data */
972 struct igb_reg_test
{
981 /* In the hardware, registers are laid out either singly, in arrays
982 * spaced 0x100 bytes apart, or in contiguous tables. We assume
983 * most tests take place on arrays or single registers (handled
984 * as a single-element array) and special-case the tables.
985 * Table tests are always pattern tests.
987 * We also make provision for some required setup steps by specifying
988 * registers to be written without any read-back testing.
991 #define PATTERN_TEST 1
992 #define SET_READ_TEST 2
993 #define WRITE_NO_TEST 3
994 #define TABLE32_TEST 4
995 #define TABLE64_TEST_LO 5
996 #define TABLE64_TEST_HI 6
999 static struct igb_reg_test reg_test_i210
[] = {
1000 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1001 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1002 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1003 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1004 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1005 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1006 /* RDH is read-only for i210, only test RDT. */
1007 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1008 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
1009 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1010 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
1011 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1012 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1013 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1014 { E1000_TDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1015 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1016 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
1017 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
1018 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1019 { E1000_RA
, 0, 16, TABLE64_TEST_LO
,
1020 0xFFFFFFFF, 0xFFFFFFFF },
1021 { E1000_RA
, 0, 16, TABLE64_TEST_HI
,
1022 0x900FFFFF, 0xFFFFFFFF },
1023 { E1000_MTA
, 0, 128, TABLE32_TEST
,
1024 0xFFFFFFFF, 0xFFFFFFFF },
1029 static struct igb_reg_test reg_test_i350
[] = {
1030 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1031 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1032 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1033 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFF0000, 0xFFFF0000 },
1034 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1035 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1036 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1037 { E1000_RDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1038 { E1000_RDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1039 { E1000_RDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1040 /* RDH is read-only for i350, only test RDT. */
1041 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1042 { E1000_RDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1043 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
1044 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1045 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
1046 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1047 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1048 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1049 { E1000_TDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1050 { E1000_TDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1051 { E1000_TDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1052 { E1000_TDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1053 { E1000_TDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1054 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1055 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
1056 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
1057 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1058 { E1000_RA
, 0, 16, TABLE64_TEST_LO
,
1059 0xFFFFFFFF, 0xFFFFFFFF },
1060 { E1000_RA
, 0, 16, TABLE64_TEST_HI
,
1061 0xC3FFFFFF, 0xFFFFFFFF },
1062 { E1000_RA2
, 0, 16, TABLE64_TEST_LO
,
1063 0xFFFFFFFF, 0xFFFFFFFF },
1064 { E1000_RA2
, 0, 16, TABLE64_TEST_HI
,
1065 0xC3FFFFFF, 0xFFFFFFFF },
1066 { E1000_MTA
, 0, 128, TABLE32_TEST
,
1067 0xFFFFFFFF, 0xFFFFFFFF },
1071 /* 82580 reg test */
1072 static struct igb_reg_test reg_test_82580
[] = {
1073 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1074 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1075 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1076 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1077 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1078 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1079 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1080 { E1000_RDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1081 { E1000_RDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1082 { E1000_RDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1083 /* RDH is read-only for 82580, only test RDT. */
1084 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1085 { E1000_RDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1086 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
1087 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1088 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
1089 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1090 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1091 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1092 { E1000_TDBAL(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1093 { E1000_TDBAH(4), 0x40, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1094 { E1000_TDLEN(4), 0x40, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1095 { E1000_TDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1096 { E1000_TDT(4), 0x40, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1097 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1098 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
1099 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
1100 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1101 { E1000_RA
, 0, 16, TABLE64_TEST_LO
,
1102 0xFFFFFFFF, 0xFFFFFFFF },
1103 { E1000_RA
, 0, 16, TABLE64_TEST_HI
,
1104 0x83FFFFFF, 0xFFFFFFFF },
1105 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
,
1106 0xFFFFFFFF, 0xFFFFFFFF },
1107 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
,
1108 0x83FFFFFF, 0xFFFFFFFF },
1109 { E1000_MTA
, 0, 128, TABLE32_TEST
,
1110 0xFFFFFFFF, 0xFFFFFFFF },
1114 /* 82576 reg test */
1115 static struct igb_reg_test reg_test_82576
[] = {
1116 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1117 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1118 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1119 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1120 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1121 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1122 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1123 { E1000_RDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1124 { E1000_RDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1125 { E1000_RDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1126 /* Enable all RX queues before testing. */
1127 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
1128 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
1129 /* RDH is read-only for 82576, only test RDT. */
1130 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1131 { E1000_RDT(4), 0x40, 12, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1132 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
1133 { E1000_RXDCTL(4), 0x40, 12, WRITE_NO_TEST
, 0, 0 },
1134 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
1135 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1136 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
1137 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1138 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1139 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1140 { E1000_TDBAL(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1141 { E1000_TDBAH(4), 0x40, 12, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1142 { E1000_TDLEN(4), 0x40, 12, PATTERN_TEST
, 0x000FFFF0, 0x000FFFFF },
1143 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1144 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0x003FFFFB },
1145 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB0FE, 0xFFFFFFFF },
1146 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1147 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
1148 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
1149 { E1000_RA2
, 0, 8, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
1150 { E1000_RA2
, 0, 8, TABLE64_TEST_HI
, 0x83FFFFFF, 0xFFFFFFFF },
1151 { E1000_MTA
, 0, 128,TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1155 /* 82575 register test */
1156 static struct igb_reg_test reg_test_82575
[] = {
1157 { E1000_FCAL
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1158 { E1000_FCAH
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1159 { E1000_FCT
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0xFFFFFFFF },
1160 { E1000_VET
, 0x100, 1, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1161 { E1000_RDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1162 { E1000_RDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1163 { E1000_RDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1164 /* Enable all four RX queues before testing. */
1165 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, E1000_RXDCTL_QUEUE_ENABLE
},
1166 /* RDH is read-only for 82575, only test RDT. */
1167 { E1000_RDT(0), 0x100, 4, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1168 { E1000_RXDCTL(0), 0x100, 4, WRITE_NO_TEST
, 0, 0 },
1169 { E1000_FCRTH
, 0x100, 1, PATTERN_TEST
, 0x0000FFF0, 0x0000FFF0 },
1170 { E1000_FCTTV
, 0x100, 1, PATTERN_TEST
, 0x0000FFFF, 0x0000FFFF },
1171 { E1000_TIPG
, 0x100, 1, PATTERN_TEST
, 0x3FFFFFFF, 0x3FFFFFFF },
1172 { E1000_TDBAL(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFF80, 0xFFFFFFFF },
1173 { E1000_TDBAH(0), 0x100, 4, PATTERN_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1174 { E1000_TDLEN(0), 0x100, 4, PATTERN_TEST
, 0x000FFF80, 0x000FFFFF },
1175 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1176 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0x003FFFFB },
1177 { E1000_RCTL
, 0x100, 1, SET_READ_TEST
, 0x04CFB3FE, 0xFFFFFFFF },
1178 { E1000_TCTL
, 0x100, 1, SET_READ_TEST
, 0xFFFFFFFF, 0x00000000 },
1179 { E1000_TXCW
, 0x100, 1, PATTERN_TEST
, 0xC000FFFF, 0x0000FFFF },
1180 { E1000_RA
, 0, 16, TABLE64_TEST_LO
, 0xFFFFFFFF, 0xFFFFFFFF },
1181 { E1000_RA
, 0, 16, TABLE64_TEST_HI
, 0x800FFFFF, 0xFFFFFFFF },
1182 { E1000_MTA
, 0, 128, TABLE32_TEST
, 0xFFFFFFFF, 0xFFFFFFFF },
1186 static bool reg_pattern_test(struct igb_adapter
*adapter
, u64
*data
,
1187 int reg
, u32 mask
, u32 write
)
1189 struct e1000_hw
*hw
= &adapter
->hw
;
1191 static const u32 _test
[] =
1192 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
1193 for (pat
= 0; pat
< ARRAY_SIZE(_test
); pat
++) {
1194 wr32(reg
, (_test
[pat
] & write
));
1195 val
= rd32(reg
) & mask
;
1196 if (val
!= (_test
[pat
] & write
& mask
)) {
1197 dev_err(&adapter
->pdev
->dev
,
1198 "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n",
1199 reg
, val
, (_test
[pat
] & write
& mask
));
1208 static bool reg_set_and_check(struct igb_adapter
*adapter
, u64
*data
,
1209 int reg
, u32 mask
, u32 write
)
1211 struct e1000_hw
*hw
= &adapter
->hw
;
1213 wr32(reg
, write
& mask
);
1215 if ((write
& mask
) != (val
& mask
)) {
1216 dev_err(&adapter
->pdev
->dev
,
1217 "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", reg
,
1218 (val
& mask
), (write
& mask
));
1226 #define REG_PATTERN_TEST(reg, mask, write) \
1228 if (reg_pattern_test(adapter, data, reg, mask, write)) \
1232 #define REG_SET_AND_CHECK(reg, mask, write) \
1234 if (reg_set_and_check(adapter, data, reg, mask, write)) \
1238 static int igb_reg_test(struct igb_adapter
*adapter
, u64
*data
)
1240 struct e1000_hw
*hw
= &adapter
->hw
;
1241 struct igb_reg_test
*test
;
1242 u32 value
, before
, after
;
1245 switch (adapter
->hw
.mac
.type
) {
1248 test
= reg_test_i350
;
1249 toggle
= 0x7FEFF3FF;
1253 test
= reg_test_i210
;
1254 toggle
= 0x7FEFF3FF;
1257 test
= reg_test_82580
;
1258 toggle
= 0x7FEFF3FF;
1261 test
= reg_test_82576
;
1262 toggle
= 0x7FFFF3FF;
1265 test
= reg_test_82575
;
1266 toggle
= 0x7FFFF3FF;
1270 /* Because the status register is such a special case,
1271 * we handle it separately from the rest of the register
1272 * tests. Some bits are read-only, some toggle, and some
1273 * are writable on newer MACs.
1275 before
= rd32(E1000_STATUS
);
1276 value
= (rd32(E1000_STATUS
) & toggle
);
1277 wr32(E1000_STATUS
, toggle
);
1278 after
= rd32(E1000_STATUS
) & toggle
;
1279 if (value
!= after
) {
1280 dev_err(&adapter
->pdev
->dev
,
1281 "failed STATUS register test got: 0x%08X expected: 0x%08X\n",
1286 /* restore previous status */
1287 wr32(E1000_STATUS
, before
);
1289 /* Perform the remainder of the register test, looping through
1290 * the test table until we either fail or reach the null entry.
1293 for (i
= 0; i
< test
->array_len
; i
++) {
1294 switch (test
->test_type
) {
1296 REG_PATTERN_TEST(test
->reg
+
1297 (i
* test
->reg_offset
),
1302 REG_SET_AND_CHECK(test
->reg
+
1303 (i
* test
->reg_offset
),
1309 (adapter
->hw
.hw_addr
+ test
->reg
)
1310 + (i
* test
->reg_offset
));
1313 REG_PATTERN_TEST(test
->reg
+ (i
* 4),
1317 case TABLE64_TEST_LO
:
1318 REG_PATTERN_TEST(test
->reg
+ (i
* 8),
1322 case TABLE64_TEST_HI
:
1323 REG_PATTERN_TEST((test
->reg
+ 4) + (i
* 8),
1336 static int igb_eeprom_test(struct igb_adapter
*adapter
, u64
*data
)
1338 struct e1000_hw
*hw
= &adapter
->hw
;
1342 /* Validate eeprom on all parts but flashless */
1343 switch (hw
->mac
.type
) {
1346 if (igb_get_flash_presence_i210(hw
)) {
1347 if (adapter
->hw
.nvm
.ops
.validate(&adapter
->hw
) < 0)
1352 if (adapter
->hw
.nvm
.ops
.validate(&adapter
->hw
) < 0)
1360 static irqreturn_t
igb_test_intr(int irq
, void *data
)
1362 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
1363 struct e1000_hw
*hw
= &adapter
->hw
;
1365 adapter
->test_icr
|= rd32(E1000_ICR
);
1370 static int igb_intr_test(struct igb_adapter
*adapter
, u64
*data
)
1372 struct e1000_hw
*hw
= &adapter
->hw
;
1373 struct net_device
*netdev
= adapter
->netdev
;
1374 u32 mask
, ics_mask
, i
= 0, shared_int
= true;
1375 u32 irq
= adapter
->pdev
->irq
;
1379 /* Hook up test interrupt handler just for this test */
1380 if (adapter
->msix_entries
) {
1381 if (request_irq(adapter
->msix_entries
[0].vector
,
1382 igb_test_intr
, 0, netdev
->name
, adapter
)) {
1386 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1388 if (request_irq(irq
,
1389 igb_test_intr
, 0, netdev
->name
, adapter
)) {
1393 } else if (!request_irq(irq
, igb_test_intr
, IRQF_PROBE_SHARED
,
1394 netdev
->name
, adapter
)) {
1396 } else if (request_irq(irq
, igb_test_intr
, IRQF_SHARED
,
1397 netdev
->name
, adapter
)) {
1401 dev_info(&adapter
->pdev
->dev
, "testing %s interrupt\n",
1402 (shared_int
? "shared" : "unshared"));
1404 /* Disable all the interrupts */
1405 wr32(E1000_IMC
, ~0);
1409 /* Define all writable bits for ICS */
1410 switch (hw
->mac
.type
) {
1412 ics_mask
= 0x37F47EDD;
1415 ics_mask
= 0x77D4FBFD;
1418 ics_mask
= 0x77DCFED5;
1424 ics_mask
= 0x77DCFED5;
1427 ics_mask
= 0x7FFFFFFF;
1431 /* Test each interrupt */
1432 for (; i
< 31; i
++) {
1433 /* Interrupt to test */
1436 if (!(mask
& ics_mask
))
1440 /* Disable the interrupt to be reported in
1441 * the cause register and then force the same
1442 * interrupt and see if one gets posted. If
1443 * an interrupt was posted to the bus, the
1446 adapter
->test_icr
= 0;
1448 /* Flush any pending interrupts */
1449 wr32(E1000_ICR
, ~0);
1451 wr32(E1000_IMC
, mask
);
1452 wr32(E1000_ICS
, mask
);
1456 if (adapter
->test_icr
& mask
) {
1462 /* Enable the interrupt to be reported in
1463 * the cause register and then force the same
1464 * interrupt and see if one gets posted. If
1465 * an interrupt was not posted to the bus, the
1468 adapter
->test_icr
= 0;
1470 /* Flush any pending interrupts */
1471 wr32(E1000_ICR
, ~0);
1473 wr32(E1000_IMS
, mask
);
1474 wr32(E1000_ICS
, mask
);
1478 if (!(adapter
->test_icr
& mask
)) {
1484 /* Disable the other interrupts to be reported in
1485 * the cause register and then force the other
1486 * interrupts and see if any get posted. If
1487 * an interrupt was posted to the bus, the
1490 adapter
->test_icr
= 0;
1492 /* Flush any pending interrupts */
1493 wr32(E1000_ICR
, ~0);
1495 wr32(E1000_IMC
, ~mask
);
1496 wr32(E1000_ICS
, ~mask
);
1500 if (adapter
->test_icr
& mask
) {
1507 /* Disable all the interrupts */
1508 wr32(E1000_IMC
, ~0);
1512 /* Unhook test interrupt handler */
1513 if (adapter
->msix_entries
)
1514 free_irq(adapter
->msix_entries
[0].vector
, adapter
);
1516 free_irq(irq
, adapter
);
1521 static void igb_free_desc_rings(struct igb_adapter
*adapter
)
1523 igb_free_tx_resources(&adapter
->test_tx_ring
);
1524 igb_free_rx_resources(&adapter
->test_rx_ring
);
1527 static int igb_setup_desc_rings(struct igb_adapter
*adapter
)
1529 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1530 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1531 struct e1000_hw
*hw
= &adapter
->hw
;
1534 /* Setup Tx descriptor ring and Tx buffers */
1535 tx_ring
->count
= IGB_DEFAULT_TXD
;
1536 tx_ring
->dev
= &adapter
->pdev
->dev
;
1537 tx_ring
->netdev
= adapter
->netdev
;
1538 tx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1540 if (igb_setup_tx_resources(tx_ring
)) {
1545 igb_setup_tctl(adapter
);
1546 igb_configure_tx_ring(adapter
, tx_ring
);
1548 /* Setup Rx descriptor ring and Rx buffers */
1549 rx_ring
->count
= IGB_DEFAULT_RXD
;
1550 rx_ring
->dev
= &adapter
->pdev
->dev
;
1551 rx_ring
->netdev
= adapter
->netdev
;
1552 rx_ring
->reg_idx
= adapter
->vfs_allocated_count
;
1554 if (igb_setup_rx_resources(rx_ring
)) {
1559 /* set the default queue to queue 0 of PF */
1560 wr32(E1000_MRQC
, adapter
->vfs_allocated_count
<< 3);
1562 /* enable receive ring */
1563 igb_setup_rctl(adapter
);
1564 igb_configure_rx_ring(adapter
, rx_ring
);
1566 igb_alloc_rx_buffers(rx_ring
, igb_desc_unused(rx_ring
));
1571 igb_free_desc_rings(adapter
);
1575 static void igb_phy_disable_receiver(struct igb_adapter
*adapter
)
1577 struct e1000_hw
*hw
= &adapter
->hw
;
1579 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1580 igb_write_phy_reg(hw
, 29, 0x001F);
1581 igb_write_phy_reg(hw
, 30, 0x8FFC);
1582 igb_write_phy_reg(hw
, 29, 0x001A);
1583 igb_write_phy_reg(hw
, 30, 0x8FF0);
1586 static int igb_integrated_phy_loopback(struct igb_adapter
*adapter
)
1588 struct e1000_hw
*hw
= &adapter
->hw
;
1591 hw
->mac
.autoneg
= false;
1593 if (hw
->phy
.type
== e1000_phy_m88
) {
1594 if (hw
->phy
.id
!= I210_I_PHY_ID
) {
1595 /* Auto-MDI/MDIX Off */
1596 igb_write_phy_reg(hw
, M88E1000_PHY_SPEC_CTRL
, 0x0808);
1597 /* reset to update Auto-MDI/MDIX */
1598 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x9140);
1600 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x8140);
1602 /* force 1000, set loopback */
1603 igb_write_phy_reg(hw
, I347AT4_PAGE_SELECT
, 0);
1604 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1608 /* add small delay to avoid loopback test failure */
1611 /* force 1000, set loopback */
1612 igb_write_phy_reg(hw
, PHY_CONTROL
, 0x4140);
1614 /* Now set up the MAC to the same speed/duplex as the PHY. */
1615 ctrl_reg
= rd32(E1000_CTRL
);
1616 ctrl_reg
&= ~E1000_CTRL_SPD_SEL
; /* Clear the speed sel bits */
1617 ctrl_reg
|= (E1000_CTRL_FRCSPD
| /* Set the Force Speed Bit */
1618 E1000_CTRL_FRCDPX
| /* Set the Force Duplex Bit */
1619 E1000_CTRL_SPD_1000
|/* Force Speed to 1000 */
1620 E1000_CTRL_FD
| /* Force Duplex to FULL */
1621 E1000_CTRL_SLU
); /* Set link up enable bit */
1623 if (hw
->phy
.type
== e1000_phy_m88
)
1624 ctrl_reg
|= E1000_CTRL_ILOS
; /* Invert Loss of Signal */
1626 wr32(E1000_CTRL
, ctrl_reg
);
1628 /* Disable the receiver on the PHY so when a cable is plugged in, the
1629 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1631 if (hw
->phy
.type
== e1000_phy_m88
)
1632 igb_phy_disable_receiver(adapter
);
1638 static int igb_set_phy_loopback(struct igb_adapter
*adapter
)
1640 return igb_integrated_phy_loopback(adapter
);
1643 static int igb_setup_loopback_test(struct igb_adapter
*adapter
)
1645 struct e1000_hw
*hw
= &adapter
->hw
;
1648 reg
= rd32(E1000_CTRL_EXT
);
1650 /* use CTRL_EXT to identify link type as SGMII can appear as copper */
1651 if (reg
& E1000_CTRL_EXT_LINK_MODE_MASK
) {
1652 if ((hw
->device_id
== E1000_DEV_ID_DH89XXCC_SGMII
) ||
1653 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_SERDES
) ||
1654 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_BACKPLANE
) ||
1655 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_SFP
)) {
1657 /* Enable DH89xxCC MPHY for near end loopback */
1658 reg
= rd32(E1000_MPHY_ADDR_CTL
);
1659 reg
= (reg
& E1000_MPHY_ADDR_CTL_OFFSET_MASK
) |
1660 E1000_MPHY_PCS_CLK_REG_OFFSET
;
1661 wr32(E1000_MPHY_ADDR_CTL
, reg
);
1663 reg
= rd32(E1000_MPHY_DATA
);
1664 reg
|= E1000_MPHY_PCS_CLK_REG_DIGINELBEN
;
1665 wr32(E1000_MPHY_DATA
, reg
);
1668 reg
= rd32(E1000_RCTL
);
1669 reg
|= E1000_RCTL_LBM_TCVR
;
1670 wr32(E1000_RCTL
, reg
);
1672 wr32(E1000_SCTL
, E1000_ENABLE_SERDES_LOOPBACK
);
1674 reg
= rd32(E1000_CTRL
);
1675 reg
&= ~(E1000_CTRL_RFCE
|
1678 reg
|= E1000_CTRL_SLU
|
1680 wr32(E1000_CTRL
, reg
);
1682 /* Unset switch control to serdes energy detect */
1683 reg
= rd32(E1000_CONNSW
);
1684 reg
&= ~E1000_CONNSW_ENRGSRC
;
1685 wr32(E1000_CONNSW
, reg
);
1687 /* Unset sigdetect for SERDES loopback on
1688 * 82580 and newer devices.
1690 if (hw
->mac
.type
>= e1000_82580
) {
1691 reg
= rd32(E1000_PCS_CFG0
);
1692 reg
|= E1000_PCS_CFG_IGN_SD
;
1693 wr32(E1000_PCS_CFG0
, reg
);
1696 /* Set PCS register for forced speed */
1697 reg
= rd32(E1000_PCS_LCTL
);
1698 reg
&= ~E1000_PCS_LCTL_AN_ENABLE
; /* Disable Autoneg*/
1699 reg
|= E1000_PCS_LCTL_FLV_LINK_UP
| /* Force link up */
1700 E1000_PCS_LCTL_FSV_1000
| /* Force 1000 */
1701 E1000_PCS_LCTL_FDV_FULL
| /* SerDes Full duplex */
1702 E1000_PCS_LCTL_FSD
| /* Force Speed */
1703 E1000_PCS_LCTL_FORCE_LINK
; /* Force Link */
1704 wr32(E1000_PCS_LCTL
, reg
);
1709 return igb_set_phy_loopback(adapter
);
1712 static void igb_loopback_cleanup(struct igb_adapter
*adapter
)
1714 struct e1000_hw
*hw
= &adapter
->hw
;
1718 if ((hw
->device_id
== E1000_DEV_ID_DH89XXCC_SGMII
) ||
1719 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_SERDES
) ||
1720 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_BACKPLANE
) ||
1721 (hw
->device_id
== E1000_DEV_ID_DH89XXCC_SFP
)) {
1724 /* Disable near end loopback on DH89xxCC */
1725 reg
= rd32(E1000_MPHY_ADDR_CTL
);
1726 reg
= (reg
& E1000_MPHY_ADDR_CTL_OFFSET_MASK
) |
1727 E1000_MPHY_PCS_CLK_REG_OFFSET
;
1728 wr32(E1000_MPHY_ADDR_CTL
, reg
);
1730 reg
= rd32(E1000_MPHY_DATA
);
1731 reg
&= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN
;
1732 wr32(E1000_MPHY_DATA
, reg
);
1735 rctl
= rd32(E1000_RCTL
);
1736 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
1737 wr32(E1000_RCTL
, rctl
);
1739 hw
->mac
.autoneg
= true;
1740 igb_read_phy_reg(hw
, PHY_CONTROL
, &phy_reg
);
1741 if (phy_reg
& MII_CR_LOOPBACK
) {
1742 phy_reg
&= ~MII_CR_LOOPBACK
;
1743 igb_write_phy_reg(hw
, PHY_CONTROL
, phy_reg
);
1744 igb_phy_sw_reset(hw
);
1748 static void igb_create_lbtest_frame(struct sk_buff
*skb
,
1749 unsigned int frame_size
)
1751 memset(skb
->data
, 0xFF, frame_size
);
1753 memset(&skb
->data
[frame_size
], 0xAA, frame_size
- 1);
1754 memset(&skb
->data
[frame_size
+ 10], 0xBE, 1);
1755 memset(&skb
->data
[frame_size
+ 12], 0xAF, 1);
1758 static int igb_check_lbtest_frame(struct igb_rx_buffer
*rx_buffer
,
1759 unsigned int frame_size
)
1761 unsigned char *data
;
1766 data
= kmap(rx_buffer
->page
);
1768 if (data
[3] != 0xFF ||
1769 data
[frame_size
+ 10] != 0xBE ||
1770 data
[frame_size
+ 12] != 0xAF)
1773 kunmap(rx_buffer
->page
);
1778 static int igb_clean_test_rings(struct igb_ring
*rx_ring
,
1779 struct igb_ring
*tx_ring
,
1782 union e1000_adv_rx_desc
*rx_desc
;
1783 struct igb_rx_buffer
*rx_buffer_info
;
1784 struct igb_tx_buffer
*tx_buffer_info
;
1785 u16 rx_ntc
, tx_ntc
, count
= 0;
1787 /* initialize next to clean and descriptor values */
1788 rx_ntc
= rx_ring
->next_to_clean
;
1789 tx_ntc
= tx_ring
->next_to_clean
;
1790 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ntc
);
1792 while (igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
)) {
1793 /* check Rx buffer */
1794 rx_buffer_info
= &rx_ring
->rx_buffer_info
[rx_ntc
];
1796 /* sync Rx buffer for CPU read */
1797 dma_sync_single_for_cpu(rx_ring
->dev
,
1798 rx_buffer_info
->dma
,
1802 /* verify contents of skb */
1803 if (igb_check_lbtest_frame(rx_buffer_info
, size
))
1806 /* sync Rx buffer for device write */
1807 dma_sync_single_for_device(rx_ring
->dev
,
1808 rx_buffer_info
->dma
,
1812 /* unmap buffer on Tx side */
1813 tx_buffer_info
= &tx_ring
->tx_buffer_info
[tx_ntc
];
1814 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
1816 /* increment Rx/Tx next to clean counters */
1818 if (rx_ntc
== rx_ring
->count
)
1821 if (tx_ntc
== tx_ring
->count
)
1824 /* fetch next descriptor */
1825 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ntc
);
1828 netdev_tx_reset_queue(txring_txq(tx_ring
));
1830 /* re-map buffers to ring, store next to clean values */
1831 igb_alloc_rx_buffers(rx_ring
, count
);
1832 rx_ring
->next_to_clean
= rx_ntc
;
1833 tx_ring
->next_to_clean
= tx_ntc
;
1838 static int igb_run_loopback_test(struct igb_adapter
*adapter
)
1840 struct igb_ring
*tx_ring
= &adapter
->test_tx_ring
;
1841 struct igb_ring
*rx_ring
= &adapter
->test_rx_ring
;
1842 u16 i
, j
, lc
, good_cnt
;
1844 unsigned int size
= IGB_RX_HDR_LEN
;
1845 netdev_tx_t tx_ret_val
;
1846 struct sk_buff
*skb
;
1848 /* allocate test skb */
1849 skb
= alloc_skb(size
, GFP_KERNEL
);
1853 /* place data into test skb */
1854 igb_create_lbtest_frame(skb
, size
);
1857 /* Calculate the loop count based on the largest descriptor ring
1858 * The idea is to wrap the largest ring a number of times using 64
1859 * send/receive pairs during each loop
1862 if (rx_ring
->count
<= tx_ring
->count
)
1863 lc
= ((tx_ring
->count
/ 64) * 2) + 1;
1865 lc
= ((rx_ring
->count
/ 64) * 2) + 1;
1867 for (j
= 0; j
<= lc
; j
++) { /* loop count loop */
1868 /* reset count of good packets */
1871 /* place 64 packets on the transmit queue*/
1872 for (i
= 0; i
< 64; i
++) {
1874 tx_ret_val
= igb_xmit_frame_ring(skb
, tx_ring
);
1875 if (tx_ret_val
== NETDEV_TX_OK
)
1879 if (good_cnt
!= 64) {
1884 /* allow 200 milliseconds for packets to go from Tx to Rx */
1887 good_cnt
= igb_clean_test_rings(rx_ring
, tx_ring
, size
);
1888 if (good_cnt
!= 64) {
1892 } /* end loop count loop */
1894 /* free the original skb */
1900 static int igb_loopback_test(struct igb_adapter
*adapter
, u64
*data
)
1902 /* PHY loopback cannot be performed if SoL/IDER
1903 * sessions are active
1905 if (igb_check_reset_block(&adapter
->hw
)) {
1906 dev_err(&adapter
->pdev
->dev
,
1907 "Cannot do PHY loopback test when SoL/IDER is active.\n");
1912 if (adapter
->hw
.mac
.type
== e1000_i354
) {
1913 dev_info(&adapter
->pdev
->dev
,
1914 "Loopback test not supported on i354.\n");
1918 *data
= igb_setup_desc_rings(adapter
);
1921 *data
= igb_setup_loopback_test(adapter
);
1924 *data
= igb_run_loopback_test(adapter
);
1925 igb_loopback_cleanup(adapter
);
1928 igb_free_desc_rings(adapter
);
1933 static int igb_link_test(struct igb_adapter
*adapter
, u64
*data
)
1935 struct e1000_hw
*hw
= &adapter
->hw
;
1937 if (hw
->phy
.media_type
== e1000_media_type_internal_serdes
) {
1939 hw
->mac
.serdes_has_link
= false;
1941 /* On some blade server designs, link establishment
1942 * could take as long as 2-3 minutes
1945 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1946 if (hw
->mac
.serdes_has_link
)
1949 } while (i
++ < 3750);
1953 hw
->mac
.ops
.check_for_link(&adapter
->hw
);
1954 if (hw
->mac
.autoneg
)
1957 if (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
))
1963 static void igb_diag_test(struct net_device
*netdev
,
1964 struct ethtool_test
*eth_test
, u64
*data
)
1966 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1967 u16 autoneg_advertised
;
1968 u8 forced_speed_duplex
, autoneg
;
1969 bool if_running
= netif_running(netdev
);
1971 set_bit(__IGB_TESTING
, &adapter
->state
);
1972 if (eth_test
->flags
== ETH_TEST_FL_OFFLINE
) {
1975 /* save speed, duplex, autoneg settings */
1976 autoneg_advertised
= adapter
->hw
.phy
.autoneg_advertised
;
1977 forced_speed_duplex
= adapter
->hw
.mac
.forced_speed_duplex
;
1978 autoneg
= adapter
->hw
.mac
.autoneg
;
1980 dev_info(&adapter
->pdev
->dev
, "offline testing starting\n");
1982 /* power up link for link test */
1983 igb_power_up_link(adapter
);
1985 /* Link test performed before hardware reset so autoneg doesn't
1986 * interfere with test result
1988 if (igb_link_test(adapter
, &data
[4]))
1989 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
1992 /* indicate we're in test mode */
1997 if (igb_reg_test(adapter
, &data
[0]))
1998 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2001 if (igb_eeprom_test(adapter
, &data
[1]))
2002 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2005 if (igb_intr_test(adapter
, &data
[2]))
2006 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2009 /* power up link for loopback test */
2010 igb_power_up_link(adapter
);
2011 if (igb_loopback_test(adapter
, &data
[3]))
2012 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2014 /* restore speed, duplex, autoneg settings */
2015 adapter
->hw
.phy
.autoneg_advertised
= autoneg_advertised
;
2016 adapter
->hw
.mac
.forced_speed_duplex
= forced_speed_duplex
;
2017 adapter
->hw
.mac
.autoneg
= autoneg
;
2019 /* force this routine to wait until autoneg complete/timeout */
2020 adapter
->hw
.phy
.autoneg_wait_to_complete
= true;
2022 adapter
->hw
.phy
.autoneg_wait_to_complete
= false;
2024 clear_bit(__IGB_TESTING
, &adapter
->state
);
2028 dev_info(&adapter
->pdev
->dev
, "online testing starting\n");
2030 /* PHY is powered down when interface is down */
2031 if (if_running
&& igb_link_test(adapter
, &data
[4]))
2032 eth_test
->flags
|= ETH_TEST_FL_FAILED
;
2036 /* Online tests aren't run; pass by default */
2042 clear_bit(__IGB_TESTING
, &adapter
->state
);
2044 msleep_interruptible(4 * 1000);
2047 static void igb_get_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
2049 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2051 wol
->supported
= WAKE_UCAST
| WAKE_MCAST
|
2052 WAKE_BCAST
| WAKE_MAGIC
|
2056 if (!(adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
))
2059 /* apply any specific unsupported masks here */
2060 switch (adapter
->hw
.device_id
) {
2065 if (adapter
->wol
& E1000_WUFC_EX
)
2066 wol
->wolopts
|= WAKE_UCAST
;
2067 if (adapter
->wol
& E1000_WUFC_MC
)
2068 wol
->wolopts
|= WAKE_MCAST
;
2069 if (adapter
->wol
& E1000_WUFC_BC
)
2070 wol
->wolopts
|= WAKE_BCAST
;
2071 if (adapter
->wol
& E1000_WUFC_MAG
)
2072 wol
->wolopts
|= WAKE_MAGIC
;
2073 if (adapter
->wol
& E1000_WUFC_LNKC
)
2074 wol
->wolopts
|= WAKE_PHY
;
2077 static int igb_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
2079 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2081 if (wol
->wolopts
& (WAKE_ARP
| WAKE_MAGICSECURE
))
2084 if (!(adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
))
2085 return wol
->wolopts
? -EOPNOTSUPP
: 0;
2087 /* these settings will always override what we currently have */
2090 if (wol
->wolopts
& WAKE_UCAST
)
2091 adapter
->wol
|= E1000_WUFC_EX
;
2092 if (wol
->wolopts
& WAKE_MCAST
)
2093 adapter
->wol
|= E1000_WUFC_MC
;
2094 if (wol
->wolopts
& WAKE_BCAST
)
2095 adapter
->wol
|= E1000_WUFC_BC
;
2096 if (wol
->wolopts
& WAKE_MAGIC
)
2097 adapter
->wol
|= E1000_WUFC_MAG
;
2098 if (wol
->wolopts
& WAKE_PHY
)
2099 adapter
->wol
|= E1000_WUFC_LNKC
;
2100 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
2105 /* bit defines for adapter->led_status */
2106 #define IGB_LED_ON 0
2108 static int igb_set_phys_id(struct net_device
*netdev
,
2109 enum ethtool_phys_id_state state
)
2111 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2112 struct e1000_hw
*hw
= &adapter
->hw
;
2115 case ETHTOOL_ID_ACTIVE
:
2121 case ETHTOOL_ID_OFF
:
2124 case ETHTOOL_ID_INACTIVE
:
2126 clear_bit(IGB_LED_ON
, &adapter
->led_status
);
2127 igb_cleanup_led(hw
);
2134 static int igb_set_coalesce(struct net_device
*netdev
,
2135 struct ethtool_coalesce
*ec
)
2137 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2140 if ((ec
->rx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
2141 ((ec
->rx_coalesce_usecs
> 3) &&
2142 (ec
->rx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
2143 (ec
->rx_coalesce_usecs
== 2))
2146 if ((ec
->tx_coalesce_usecs
> IGB_MAX_ITR_USECS
) ||
2147 ((ec
->tx_coalesce_usecs
> 3) &&
2148 (ec
->tx_coalesce_usecs
< IGB_MIN_ITR_USECS
)) ||
2149 (ec
->tx_coalesce_usecs
== 2))
2152 if ((adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
) && ec
->tx_coalesce_usecs
)
2155 /* If ITR is disabled, disable DMAC */
2156 if (ec
->rx_coalesce_usecs
== 0) {
2157 if (adapter
->flags
& IGB_FLAG_DMAC
)
2158 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2161 /* convert to rate of irq's per second */
2162 if (ec
->rx_coalesce_usecs
&& ec
->rx_coalesce_usecs
<= 3)
2163 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
;
2165 adapter
->rx_itr_setting
= ec
->rx_coalesce_usecs
<< 2;
2167 /* convert to rate of irq's per second */
2168 if (adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
)
2169 adapter
->tx_itr_setting
= adapter
->rx_itr_setting
;
2170 else if (ec
->tx_coalesce_usecs
&& ec
->tx_coalesce_usecs
<= 3)
2171 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
;
2173 adapter
->tx_itr_setting
= ec
->tx_coalesce_usecs
<< 2;
2175 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
2176 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
2177 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
2178 if (q_vector
->rx
.ring
)
2179 q_vector
->itr_val
= adapter
->rx_itr_setting
;
2181 q_vector
->itr_val
= adapter
->tx_itr_setting
;
2182 if (q_vector
->itr_val
&& q_vector
->itr_val
<= 3)
2183 q_vector
->itr_val
= IGB_START_ITR
;
2184 q_vector
->set_itr
= 1;
2190 static int igb_get_coalesce(struct net_device
*netdev
,
2191 struct ethtool_coalesce
*ec
)
2193 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2195 if (adapter
->rx_itr_setting
<= 3)
2196 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
;
2198 ec
->rx_coalesce_usecs
= adapter
->rx_itr_setting
>> 2;
2200 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
)) {
2201 if (adapter
->tx_itr_setting
<= 3)
2202 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
;
2204 ec
->tx_coalesce_usecs
= adapter
->tx_itr_setting
>> 2;
2210 static int igb_nway_reset(struct net_device
*netdev
)
2212 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2213 if (netif_running(netdev
))
2214 igb_reinit_locked(adapter
);
2218 static int igb_get_sset_count(struct net_device
*netdev
, int sset
)
2222 return IGB_STATS_LEN
;
2224 return IGB_TEST_LEN
;
2230 static void igb_get_ethtool_stats(struct net_device
*netdev
,
2231 struct ethtool_stats
*stats
, u64
*data
)
2233 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2234 struct rtnl_link_stats64
*net_stats
= &adapter
->stats64
;
2236 struct igb_ring
*ring
;
2240 spin_lock(&adapter
->stats64_lock
);
2241 igb_update_stats(adapter
, net_stats
);
2243 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
2244 p
= (char *)adapter
+ igb_gstrings_stats
[i
].stat_offset
;
2245 data
[i
] = (igb_gstrings_stats
[i
].sizeof_stat
==
2246 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
2248 for (j
= 0; j
< IGB_NETDEV_STATS_LEN
; j
++, i
++) {
2249 p
= (char *)net_stats
+ igb_gstrings_net_stats
[j
].stat_offset
;
2250 data
[i
] = (igb_gstrings_net_stats
[j
].sizeof_stat
==
2251 sizeof(u64
)) ? *(u64
*)p
: *(u32
*)p
;
2253 for (j
= 0; j
< adapter
->num_tx_queues
; j
++) {
2256 ring
= adapter
->tx_ring
[j
];
2258 start
= u64_stats_fetch_begin_bh(&ring
->tx_syncp
);
2259 data
[i
] = ring
->tx_stats
.packets
;
2260 data
[i
+1] = ring
->tx_stats
.bytes
;
2261 data
[i
+2] = ring
->tx_stats
.restart_queue
;
2262 } while (u64_stats_fetch_retry_bh(&ring
->tx_syncp
, start
));
2264 start
= u64_stats_fetch_begin_bh(&ring
->tx_syncp2
);
2265 restart2
= ring
->tx_stats
.restart_queue2
;
2266 } while (u64_stats_fetch_retry_bh(&ring
->tx_syncp2
, start
));
2267 data
[i
+2] += restart2
;
2269 i
+= IGB_TX_QUEUE_STATS_LEN
;
2271 for (j
= 0; j
< adapter
->num_rx_queues
; j
++) {
2272 ring
= adapter
->rx_ring
[j
];
2274 start
= u64_stats_fetch_begin_bh(&ring
->rx_syncp
);
2275 data
[i
] = ring
->rx_stats
.packets
;
2276 data
[i
+1] = ring
->rx_stats
.bytes
;
2277 data
[i
+2] = ring
->rx_stats
.drops
;
2278 data
[i
+3] = ring
->rx_stats
.csum_err
;
2279 data
[i
+4] = ring
->rx_stats
.alloc_failed
;
2280 } while (u64_stats_fetch_retry_bh(&ring
->rx_syncp
, start
));
2281 i
+= IGB_RX_QUEUE_STATS_LEN
;
2283 spin_unlock(&adapter
->stats64_lock
);
2286 static void igb_get_strings(struct net_device
*netdev
, u32 stringset
, u8
*data
)
2288 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2292 switch (stringset
) {
2294 memcpy(data
, *igb_gstrings_test
,
2295 IGB_TEST_LEN
*ETH_GSTRING_LEN
);
2298 for (i
= 0; i
< IGB_GLOBAL_STATS_LEN
; i
++) {
2299 memcpy(p
, igb_gstrings_stats
[i
].stat_string
,
2301 p
+= ETH_GSTRING_LEN
;
2303 for (i
= 0; i
< IGB_NETDEV_STATS_LEN
; i
++) {
2304 memcpy(p
, igb_gstrings_net_stats
[i
].stat_string
,
2306 p
+= ETH_GSTRING_LEN
;
2308 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2309 sprintf(p
, "tx_queue_%u_packets", i
);
2310 p
+= ETH_GSTRING_LEN
;
2311 sprintf(p
, "tx_queue_%u_bytes", i
);
2312 p
+= ETH_GSTRING_LEN
;
2313 sprintf(p
, "tx_queue_%u_restart", i
);
2314 p
+= ETH_GSTRING_LEN
;
2316 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
2317 sprintf(p
, "rx_queue_%u_packets", i
);
2318 p
+= ETH_GSTRING_LEN
;
2319 sprintf(p
, "rx_queue_%u_bytes", i
);
2320 p
+= ETH_GSTRING_LEN
;
2321 sprintf(p
, "rx_queue_%u_drops", i
);
2322 p
+= ETH_GSTRING_LEN
;
2323 sprintf(p
, "rx_queue_%u_csum_err", i
);
2324 p
+= ETH_GSTRING_LEN
;
2325 sprintf(p
, "rx_queue_%u_alloc_failed", i
);
2326 p
+= ETH_GSTRING_LEN
;
2328 /* BUG_ON(p - data != IGB_STATS_LEN * ETH_GSTRING_LEN); */
2333 static int igb_get_ts_info(struct net_device
*dev
,
2334 struct ethtool_ts_info
*info
)
2336 struct igb_adapter
*adapter
= netdev_priv(dev
);
2338 switch (adapter
->hw
.mac
.type
) {
2340 info
->so_timestamping
=
2341 SOF_TIMESTAMPING_TX_SOFTWARE
|
2342 SOF_TIMESTAMPING_RX_SOFTWARE
|
2343 SOF_TIMESTAMPING_SOFTWARE
;
2351 info
->so_timestamping
=
2352 SOF_TIMESTAMPING_TX_SOFTWARE
|
2353 SOF_TIMESTAMPING_RX_SOFTWARE
|
2354 SOF_TIMESTAMPING_SOFTWARE
|
2355 SOF_TIMESTAMPING_TX_HARDWARE
|
2356 SOF_TIMESTAMPING_RX_HARDWARE
|
2357 SOF_TIMESTAMPING_RAW_HARDWARE
;
2359 if (adapter
->ptp_clock
)
2360 info
->phc_index
= ptp_clock_index(adapter
->ptp_clock
);
2362 info
->phc_index
= -1;
2365 (1 << HWTSTAMP_TX_OFF
) |
2366 (1 << HWTSTAMP_TX_ON
);
2368 info
->rx_filters
= 1 << HWTSTAMP_FILTER_NONE
;
2370 /* 82576 does not support timestamping all packets. */
2371 if (adapter
->hw
.mac
.type
>= e1000_82580
)
2372 info
->rx_filters
|= 1 << HWTSTAMP_FILTER_ALL
;
2375 (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC
) |
2376 (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
) |
2377 (1 << HWTSTAMP_FILTER_PTP_V2_L2_SYNC
) |
2378 (1 << HWTSTAMP_FILTER_PTP_V2_L4_SYNC
) |
2379 (1 << HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
) |
2380 (1 << HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
) |
2381 (1 << HWTSTAMP_FILTER_PTP_V2_EVENT
);
2389 static int igb_get_rss_hash_opts(struct igb_adapter
*adapter
,
2390 struct ethtool_rxnfc
*cmd
)
2394 /* Report default options for RSS on igb */
2395 switch (cmd
->flow_type
) {
2397 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2399 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
2400 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2402 case AH_ESP_V4_FLOW
:
2406 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
;
2409 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2411 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
2412 cmd
->data
|= RXH_L4_B_0_1
| RXH_L4_B_2_3
;
2414 case AH_ESP_V6_FLOW
:
2418 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
;
2427 static int igb_get_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
,
2430 struct igb_adapter
*adapter
= netdev_priv(dev
);
2431 int ret
= -EOPNOTSUPP
;
2434 case ETHTOOL_GRXRINGS
:
2435 cmd
->data
= adapter
->num_rx_queues
;
2439 ret
= igb_get_rss_hash_opts(adapter
, cmd
);
2448 #define UDP_RSS_FLAGS (IGB_FLAG_RSS_FIELD_IPV4_UDP | \
2449 IGB_FLAG_RSS_FIELD_IPV6_UDP)
2450 static int igb_set_rss_hash_opt(struct igb_adapter
*adapter
,
2451 struct ethtool_rxnfc
*nfc
)
2453 u32 flags
= adapter
->flags
;
2455 /* RSS does not support anything other than hashing
2456 * to queues on src and dst IPs and ports
2458 if (nfc
->data
& ~(RXH_IP_SRC
| RXH_IP_DST
|
2459 RXH_L4_B_0_1
| RXH_L4_B_2_3
))
2462 switch (nfc
->flow_type
) {
2465 if (!(nfc
->data
& RXH_IP_SRC
) ||
2466 !(nfc
->data
& RXH_IP_DST
) ||
2467 !(nfc
->data
& RXH_L4_B_0_1
) ||
2468 !(nfc
->data
& RXH_L4_B_2_3
))
2472 if (!(nfc
->data
& RXH_IP_SRC
) ||
2473 !(nfc
->data
& RXH_IP_DST
))
2475 switch (nfc
->data
& (RXH_L4_B_0_1
| RXH_L4_B_2_3
)) {
2477 flags
&= ~IGB_FLAG_RSS_FIELD_IPV4_UDP
;
2479 case (RXH_L4_B_0_1
| RXH_L4_B_2_3
):
2480 flags
|= IGB_FLAG_RSS_FIELD_IPV4_UDP
;
2487 if (!(nfc
->data
& RXH_IP_SRC
) ||
2488 !(nfc
->data
& RXH_IP_DST
))
2490 switch (nfc
->data
& (RXH_L4_B_0_1
| RXH_L4_B_2_3
)) {
2492 flags
&= ~IGB_FLAG_RSS_FIELD_IPV6_UDP
;
2494 case (RXH_L4_B_0_1
| RXH_L4_B_2_3
):
2495 flags
|= IGB_FLAG_RSS_FIELD_IPV6_UDP
;
2501 case AH_ESP_V4_FLOW
:
2505 case AH_ESP_V6_FLOW
:
2509 if (!(nfc
->data
& RXH_IP_SRC
) ||
2510 !(nfc
->data
& RXH_IP_DST
) ||
2511 (nfc
->data
& RXH_L4_B_0_1
) ||
2512 (nfc
->data
& RXH_L4_B_2_3
))
2519 /* if we changed something we need to update flags */
2520 if (flags
!= adapter
->flags
) {
2521 struct e1000_hw
*hw
= &adapter
->hw
;
2522 u32 mrqc
= rd32(E1000_MRQC
);
2524 if ((flags
& UDP_RSS_FLAGS
) &&
2525 !(adapter
->flags
& UDP_RSS_FLAGS
))
2526 dev_err(&adapter
->pdev
->dev
,
2527 "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n");
2529 adapter
->flags
= flags
;
2531 /* Perform hash on these packet types */
2532 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4
|
2533 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
2534 E1000_MRQC_RSS_FIELD_IPV6
|
2535 E1000_MRQC_RSS_FIELD_IPV6_TCP
;
2537 mrqc
&= ~(E1000_MRQC_RSS_FIELD_IPV4_UDP
|
2538 E1000_MRQC_RSS_FIELD_IPV6_UDP
);
2540 if (flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
2541 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
2543 if (flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
2544 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
2546 wr32(E1000_MRQC
, mrqc
);
2552 static int igb_set_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
)
2554 struct igb_adapter
*adapter
= netdev_priv(dev
);
2555 int ret
= -EOPNOTSUPP
;
2559 ret
= igb_set_rss_hash_opt(adapter
, cmd
);
2568 static int igb_get_eee(struct net_device
*netdev
, struct ethtool_eee
*edata
)
2570 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2571 struct e1000_hw
*hw
= &adapter
->hw
;
2572 u32 ipcnfg
, eeer
, ret_val
;
2575 if ((hw
->mac
.type
< e1000_i350
) ||
2576 (hw
->phy
.media_type
!= e1000_media_type_copper
))
2579 edata
->supported
= (SUPPORTED_1000baseT_Full
|
2580 SUPPORTED_100baseT_Full
);
2582 ipcnfg
= rd32(E1000_IPCNFG
);
2583 eeer
= rd32(E1000_EEER
);
2585 /* EEE status on negotiated link */
2586 if (ipcnfg
& E1000_IPCNFG_EEE_1G_AN
)
2587 edata
->advertised
= ADVERTISED_1000baseT_Full
;
2589 if (ipcnfg
& E1000_IPCNFG_EEE_100M_AN
)
2590 edata
->advertised
|= ADVERTISED_100baseT_Full
;
2592 /* EEE Link Partner Advertised */
2593 switch (hw
->mac
.type
) {
2595 ret_val
= igb_read_emi_reg(hw
, E1000_EEE_LP_ADV_ADDR_I350
,
2600 edata
->lp_advertised
= mmd_eee_adv_to_ethtool_adv_t(phy_data
);
2605 ret_val
= igb_read_xmdio_reg(hw
, E1000_EEE_LP_ADV_ADDR_I210
,
2606 E1000_EEE_LP_ADV_DEV_I210
,
2611 edata
->lp_advertised
= mmd_eee_adv_to_ethtool_adv_t(phy_data
);
2618 if (eeer
& E1000_EEER_EEE_NEG
)
2619 edata
->eee_active
= true;
2621 edata
->eee_enabled
= !hw
->dev_spec
._82575
.eee_disable
;
2623 if (eeer
& E1000_EEER_TX_LPI_EN
)
2624 edata
->tx_lpi_enabled
= true;
2626 /* Report correct negotiated EEE status for devices that
2627 * wrongly report EEE at half-duplex
2629 if (adapter
->link_duplex
== HALF_DUPLEX
) {
2630 edata
->eee_enabled
= false;
2631 edata
->eee_active
= false;
2632 edata
->tx_lpi_enabled
= false;
2633 edata
->advertised
&= ~edata
->advertised
;
2639 static int igb_set_eee(struct net_device
*netdev
,
2640 struct ethtool_eee
*edata
)
2642 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2643 struct e1000_hw
*hw
= &adapter
->hw
;
2644 struct ethtool_eee eee_curr
;
2647 if ((hw
->mac
.type
< e1000_i350
) ||
2648 (hw
->phy
.media_type
!= e1000_media_type_copper
))
2651 ret_val
= igb_get_eee(netdev
, &eee_curr
);
2655 if (eee_curr
.eee_enabled
) {
2656 if (eee_curr
.tx_lpi_enabled
!= edata
->tx_lpi_enabled
) {
2657 dev_err(&adapter
->pdev
->dev
,
2658 "Setting EEE tx-lpi is not supported\n");
2662 /* Tx LPI timer is not implemented currently */
2663 if (edata
->tx_lpi_timer
) {
2664 dev_err(&adapter
->pdev
->dev
,
2665 "Setting EEE Tx LPI timer is not supported\n");
2669 if (eee_curr
.advertised
!= edata
->advertised
) {
2670 dev_err(&adapter
->pdev
->dev
,
2671 "Setting EEE Advertisement is not supported\n");
2675 } else if (!edata
->eee_enabled
) {
2676 dev_err(&adapter
->pdev
->dev
,
2677 "Setting EEE options are not supported with EEE disabled\n");
2681 if (hw
->dev_spec
._82575
.eee_disable
!= !edata
->eee_enabled
) {
2682 hw
->dev_spec
._82575
.eee_disable
= !edata
->eee_enabled
;
2683 igb_set_eee_i350(hw
);
2686 if (netif_running(netdev
))
2687 igb_reinit_locked(adapter
);
2695 static int igb_get_module_info(struct net_device
*netdev
,
2696 struct ethtool_modinfo
*modinfo
)
2698 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2699 struct e1000_hw
*hw
= &adapter
->hw
;
2700 u32 status
= E1000_SUCCESS
;
2701 u16 sff8472_rev
, addr_mode
;
2702 bool page_swap
= false;
2704 if ((hw
->phy
.media_type
== e1000_media_type_copper
) ||
2705 (hw
->phy
.media_type
== e1000_media_type_unknown
))
2708 /* Check whether we support SFF-8472 or not */
2709 status
= igb_read_phy_reg_i2c(hw
, IGB_SFF_8472_COMP
, &sff8472_rev
);
2710 if (status
!= E1000_SUCCESS
)
2713 /* addressing mode is not supported */
2714 status
= igb_read_phy_reg_i2c(hw
, IGB_SFF_8472_SWAP
, &addr_mode
);
2715 if (status
!= E1000_SUCCESS
)
2718 /* addressing mode is not supported */
2719 if ((addr_mode
& 0xFF) & IGB_SFF_ADDRESSING_MODE
) {
2720 hw_dbg("Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n");
2724 if ((sff8472_rev
& 0xFF) == IGB_SFF_8472_UNSUP
|| page_swap
) {
2725 /* We have an SFP, but it does not support SFF-8472 */
2726 modinfo
->type
= ETH_MODULE_SFF_8079
;
2727 modinfo
->eeprom_len
= ETH_MODULE_SFF_8079_LEN
;
2729 /* We have an SFP which supports a revision of SFF-8472 */
2730 modinfo
->type
= ETH_MODULE_SFF_8472
;
2731 modinfo
->eeprom_len
= ETH_MODULE_SFF_8472_LEN
;
2737 static int igb_get_module_eeprom(struct net_device
*netdev
,
2738 struct ethtool_eeprom
*ee
, u8
*data
)
2740 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2741 struct e1000_hw
*hw
= &adapter
->hw
;
2742 u32 status
= E1000_SUCCESS
;
2744 u16 first_word
, last_word
;
2750 first_word
= ee
->offset
>> 1;
2751 last_word
= (ee
->offset
+ ee
->len
- 1) >> 1;
2753 dataword
= kmalloc(sizeof(u16
) * (last_word
- first_word
+ 1),
2758 /* Read EEPROM block, SFF-8079/SFF-8472, word at a time */
2759 for (i
= 0; i
< last_word
- first_word
+ 1; i
++) {
2760 status
= igb_read_phy_reg_i2c(hw
, first_word
+ i
, &dataword
[i
]);
2761 if (status
!= E1000_SUCCESS
)
2762 /* Error occurred while reading module */
2765 be16_to_cpus(&dataword
[i
]);
2768 memcpy(data
, (u8
*)dataword
+ (ee
->offset
& 1), ee
->len
);
2774 static int igb_ethtool_begin(struct net_device
*netdev
)
2776 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2777 pm_runtime_get_sync(&adapter
->pdev
->dev
);
2781 static void igb_ethtool_complete(struct net_device
*netdev
)
2783 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2784 pm_runtime_put(&adapter
->pdev
->dev
);
2787 static const struct ethtool_ops igb_ethtool_ops
= {
2788 .get_settings
= igb_get_settings
,
2789 .set_settings
= igb_set_settings
,
2790 .get_drvinfo
= igb_get_drvinfo
,
2791 .get_regs_len
= igb_get_regs_len
,
2792 .get_regs
= igb_get_regs
,
2793 .get_wol
= igb_get_wol
,
2794 .set_wol
= igb_set_wol
,
2795 .get_msglevel
= igb_get_msglevel
,
2796 .set_msglevel
= igb_set_msglevel
,
2797 .nway_reset
= igb_nway_reset
,
2798 .get_link
= igb_get_link
,
2799 .get_eeprom_len
= igb_get_eeprom_len
,
2800 .get_eeprom
= igb_get_eeprom
,
2801 .set_eeprom
= igb_set_eeprom
,
2802 .get_ringparam
= igb_get_ringparam
,
2803 .set_ringparam
= igb_set_ringparam
,
2804 .get_pauseparam
= igb_get_pauseparam
,
2805 .set_pauseparam
= igb_set_pauseparam
,
2806 .self_test
= igb_diag_test
,
2807 .get_strings
= igb_get_strings
,
2808 .set_phys_id
= igb_set_phys_id
,
2809 .get_sset_count
= igb_get_sset_count
,
2810 .get_ethtool_stats
= igb_get_ethtool_stats
,
2811 .get_coalesce
= igb_get_coalesce
,
2812 .set_coalesce
= igb_set_coalesce
,
2813 .get_ts_info
= igb_get_ts_info
,
2814 .get_rxnfc
= igb_get_rxnfc
,
2815 .set_rxnfc
= igb_set_rxnfc
,
2816 .get_eee
= igb_get_eee
,
2817 .set_eee
= igb_set_eee
,
2818 .get_module_info
= igb_get_module_info
,
2819 .get_module_eeprom
= igb_get_module_eeprom
,
2820 .begin
= igb_ethtool_begin
,
2821 .complete
= igb_ethtool_complete
,
2824 void igb_set_ethtool_ops(struct net_device
*netdev
)
2826 SET_ETHTOOL_OPS(netdev
, &igb_ethtool_ops
);