1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name
[] = "igb";
69 char igb_driver_version
[] = DRV_VERSION
;
70 static const char igb_driver_string
[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright
[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info
*igb_info_tbl
[] = {
76 [board_82575
] = &e1000_82575_info
,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl
) = {
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
111 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
112 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
113 /* required last entry */
117 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
119 void igb_reset(struct igb_adapter
*);
120 static int igb_setup_all_tx_resources(struct igb_adapter
*);
121 static int igb_setup_all_rx_resources(struct igb_adapter
*);
122 static void igb_free_all_tx_resources(struct igb_adapter
*);
123 static void igb_free_all_rx_resources(struct igb_adapter
*);
124 static void igb_setup_mrqc(struct igb_adapter
*);
125 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
126 static void igb_remove(struct pci_dev
*pdev
);
127 static int igb_sw_init(struct igb_adapter
*);
128 static int igb_open(struct net_device
*);
129 static int igb_close(struct net_device
*);
130 static void igb_configure(struct igb_adapter
*);
131 static void igb_configure_tx(struct igb_adapter
*);
132 static void igb_configure_rx(struct igb_adapter
*);
133 static void igb_clean_all_tx_rings(struct igb_adapter
*);
134 static void igb_clean_all_rx_rings(struct igb_adapter
*);
135 static void igb_clean_tx_ring(struct igb_ring
*);
136 static void igb_clean_rx_ring(struct igb_ring
*);
137 static void igb_set_rx_mode(struct net_device
*);
138 static void igb_update_phy_info(unsigned long);
139 static void igb_watchdog(unsigned long);
140 static void igb_watchdog_task(struct work_struct
*);
141 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
142 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
143 struct rtnl_link_stats64
*stats
);
144 static int igb_change_mtu(struct net_device
*, int);
145 static int igb_set_mac(struct net_device
*, void *);
146 static void igb_set_uta(struct igb_adapter
*adapter
);
147 static irqreturn_t
igb_intr(int irq
, void *);
148 static irqreturn_t
igb_intr_msi(int irq
, void *);
149 static irqreturn_t
igb_msix_other(int irq
, void *);
150 static irqreturn_t
igb_msix_ring(int irq
, void *);
151 #ifdef CONFIG_IGB_DCA
152 static void igb_update_dca(struct igb_q_vector
*);
153 static void igb_setup_dca(struct igb_adapter
*);
154 #endif /* CONFIG_IGB_DCA */
155 static int igb_poll(struct napi_struct
*, int);
156 static bool igb_clean_tx_irq(struct igb_q_vector
*);
157 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
158 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
159 static void igb_tx_timeout(struct net_device
*);
160 static void igb_reset_task(struct work_struct
*);
161 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
);
162 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
163 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
164 static void igb_restore_vlan(struct igb_adapter
*);
165 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
166 static void igb_ping_all_vfs(struct igb_adapter
*);
167 static void igb_msg_task(struct igb_adapter
*);
168 static void igb_vmm_control(struct igb_adapter
*);
169 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
170 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
171 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
172 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
173 int vf
, u16 vlan
, u8 qos
);
174 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
);
175 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
177 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
178 struct ifla_vf_info
*ivi
);
179 static void igb_check_vf_rate_limit(struct igb_adapter
*);
181 #ifdef CONFIG_PCI_IOV
182 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
186 #ifdef CONFIG_PM_SLEEP
187 static int igb_suspend(struct device
*);
189 static int igb_resume(struct device
*);
190 #ifdef CONFIG_PM_RUNTIME
191 static int igb_runtime_suspend(struct device
*dev
);
192 static int igb_runtime_resume(struct device
*dev
);
193 static int igb_runtime_idle(struct device
*dev
);
195 static const struct dev_pm_ops igb_pm_ops
= {
196 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
197 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
201 static void igb_shutdown(struct pci_dev
*);
202 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
203 #ifdef CONFIG_IGB_DCA
204 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
205 static struct notifier_block dca_notifier
= {
206 .notifier_call
= igb_notify_dca
,
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 /* for netdump / net console */
213 static void igb_netpoll(struct net_device
*);
215 #ifdef CONFIG_PCI_IOV
216 static unsigned int max_vfs
= 0;
217 module_param(max_vfs
, uint
, 0);
218 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
219 "per physical function");
220 #endif /* CONFIG_PCI_IOV */
222 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
223 pci_channel_state_t
);
224 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
225 static void igb_io_resume(struct pci_dev
*);
227 static const struct pci_error_handlers igb_err_handler
= {
228 .error_detected
= igb_io_error_detected
,
229 .slot_reset
= igb_io_slot_reset
,
230 .resume
= igb_io_resume
,
233 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
235 static struct pci_driver igb_driver
= {
236 .name
= igb_driver_name
,
237 .id_table
= igb_pci_tbl
,
239 .remove
= igb_remove
,
241 .driver
.pm
= &igb_pm_ops
,
243 .shutdown
= igb_shutdown
,
244 .sriov_configure
= igb_pci_sriov_configure
,
245 .err_handler
= &igb_err_handler
248 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
249 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
250 MODULE_LICENSE("GPL");
251 MODULE_VERSION(DRV_VERSION
);
253 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
254 static int debug
= -1;
255 module_param(debug
, int, 0);
256 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
258 struct igb_reg_info
{
263 static const struct igb_reg_info igb_reg_info_tbl
[] = {
265 /* General Registers */
266 {E1000_CTRL
, "CTRL"},
267 {E1000_STATUS
, "STATUS"},
268 {E1000_CTRL_EXT
, "CTRL_EXT"},
270 /* Interrupt Registers */
274 {E1000_RCTL
, "RCTL"},
275 {E1000_RDLEN(0), "RDLEN"},
276 {E1000_RDH(0), "RDH"},
277 {E1000_RDT(0), "RDT"},
278 {E1000_RXDCTL(0), "RXDCTL"},
279 {E1000_RDBAL(0), "RDBAL"},
280 {E1000_RDBAH(0), "RDBAH"},
283 {E1000_TCTL
, "TCTL"},
284 {E1000_TDBAL(0), "TDBAL"},
285 {E1000_TDBAH(0), "TDBAH"},
286 {E1000_TDLEN(0), "TDLEN"},
287 {E1000_TDH(0), "TDH"},
288 {E1000_TDT(0), "TDT"},
289 {E1000_TXDCTL(0), "TXDCTL"},
290 {E1000_TDFH
, "TDFH"},
291 {E1000_TDFT
, "TDFT"},
292 {E1000_TDFHS
, "TDFHS"},
293 {E1000_TDFPC
, "TDFPC"},
295 /* List Terminator */
299 /* igb_regdump - register printout routine */
300 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
306 switch (reginfo
->ofs
) {
308 for (n
= 0; n
< 4; n
++)
309 regs
[n
] = rd32(E1000_RDLEN(n
));
312 for (n
= 0; n
< 4; n
++)
313 regs
[n
] = rd32(E1000_RDH(n
));
316 for (n
= 0; n
< 4; n
++)
317 regs
[n
] = rd32(E1000_RDT(n
));
319 case E1000_RXDCTL(0):
320 for (n
= 0; n
< 4; n
++)
321 regs
[n
] = rd32(E1000_RXDCTL(n
));
324 for (n
= 0; n
< 4; n
++)
325 regs
[n
] = rd32(E1000_RDBAL(n
));
328 for (n
= 0; n
< 4; n
++)
329 regs
[n
] = rd32(E1000_RDBAH(n
));
332 for (n
= 0; n
< 4; n
++)
333 regs
[n
] = rd32(E1000_RDBAL(n
));
336 for (n
= 0; n
< 4; n
++)
337 regs
[n
] = rd32(E1000_TDBAH(n
));
340 for (n
= 0; n
< 4; n
++)
341 regs
[n
] = rd32(E1000_TDLEN(n
));
344 for (n
= 0; n
< 4; n
++)
345 regs
[n
] = rd32(E1000_TDH(n
));
348 for (n
= 0; n
< 4; n
++)
349 regs
[n
] = rd32(E1000_TDT(n
));
351 case E1000_TXDCTL(0):
352 for (n
= 0; n
< 4; n
++)
353 regs
[n
] = rd32(E1000_TXDCTL(n
));
356 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
360 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
361 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
365 /* igb_dump - Print registers, Tx-rings and Rx-rings */
366 static void igb_dump(struct igb_adapter
*adapter
)
368 struct net_device
*netdev
= adapter
->netdev
;
369 struct e1000_hw
*hw
= &adapter
->hw
;
370 struct igb_reg_info
*reginfo
;
371 struct igb_ring
*tx_ring
;
372 union e1000_adv_tx_desc
*tx_desc
;
373 struct my_u0
{ u64 a
; u64 b
; } *u0
;
374 struct igb_ring
*rx_ring
;
375 union e1000_adv_rx_desc
*rx_desc
;
379 if (!netif_msg_hw(adapter
))
382 /* Print netdevice Info */
384 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
385 pr_info("Device Name state trans_start "
387 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
388 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
391 /* Print Registers */
392 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
393 pr_info(" Register Name Value\n");
394 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
395 reginfo
->name
; reginfo
++) {
396 igb_regdump(hw
, reginfo
);
399 /* Print TX Ring Summary */
400 if (!netdev
|| !netif_running(netdev
))
403 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
404 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
405 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
406 struct igb_tx_buffer
*buffer_info
;
407 tx_ring
= adapter
->tx_ring
[n
];
408 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
409 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
410 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
411 (u64
)dma_unmap_addr(buffer_info
, dma
),
412 dma_unmap_len(buffer_info
, len
),
413 buffer_info
->next_to_watch
,
414 (u64
)buffer_info
->time_stamp
);
418 if (!netif_msg_tx_done(adapter
))
419 goto rx_ring_summary
;
421 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
423 /* Transmit Descriptor Formats
425 * Advanced Transmit Descriptor
426 * +--------------------------------------------------------------+
427 * 0 | Buffer Address [63:0] |
428 * +--------------------------------------------------------------+
429 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
430 * +--------------------------------------------------------------+
431 * 63 46 45 40 39 38 36 35 32 31 24 15 0
434 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
435 tx_ring
= adapter
->tx_ring
[n
];
436 pr_info("------------------------------------\n");
437 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
438 pr_info("------------------------------------\n");
439 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
440 "[bi->dma ] leng ntw timestamp "
443 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
444 const char *next_desc
;
445 struct igb_tx_buffer
*buffer_info
;
446 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
447 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
448 u0
= (struct my_u0
*)tx_desc
;
449 if (i
== tx_ring
->next_to_use
&&
450 i
== tx_ring
->next_to_clean
)
451 next_desc
= " NTC/U";
452 else if (i
== tx_ring
->next_to_use
)
454 else if (i
== tx_ring
->next_to_clean
)
459 pr_info("T [0x%03X] %016llX %016llX %016llX"
460 " %04X %p %016llX %p%s\n", i
,
463 (u64
)dma_unmap_addr(buffer_info
, dma
),
464 dma_unmap_len(buffer_info
, len
),
465 buffer_info
->next_to_watch
,
466 (u64
)buffer_info
->time_stamp
,
467 buffer_info
->skb
, next_desc
);
469 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
470 print_hex_dump(KERN_INFO
, "",
472 16, 1, buffer_info
->skb
->data
,
473 dma_unmap_len(buffer_info
, len
),
478 /* Print RX Rings Summary */
480 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
481 pr_info("Queue [NTU] [NTC]\n");
482 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
483 rx_ring
= adapter
->rx_ring
[n
];
484 pr_info(" %5d %5X %5X\n",
485 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
489 if (!netif_msg_rx_status(adapter
))
492 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
494 /* Advanced Receive Descriptor (Read) Format
496 * +-----------------------------------------------------+
497 * 0 | Packet Buffer Address [63:1] |A0/NSE|
498 * +----------------------------------------------+------+
499 * 8 | Header Buffer Address [63:1] | DD |
500 * +-----------------------------------------------------+
503 * Advanced Receive Descriptor (Write-Back) Format
505 * 63 48 47 32 31 30 21 20 17 16 4 3 0
506 * +------------------------------------------------------+
507 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
508 * | Checksum Ident | | | | Type | Type |
509 * +------------------------------------------------------+
510 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
511 * +------------------------------------------------------+
512 * 63 48 47 32 31 20 19 0
515 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
516 rx_ring
= adapter
->rx_ring
[n
];
517 pr_info("------------------------------------\n");
518 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
519 pr_info("------------------------------------\n");
520 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
521 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
522 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
523 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
525 for (i
= 0; i
< rx_ring
->count
; i
++) {
526 const char *next_desc
;
527 struct igb_rx_buffer
*buffer_info
;
528 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
529 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
530 u0
= (struct my_u0
*)rx_desc
;
531 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
533 if (i
== rx_ring
->next_to_use
)
535 else if (i
== rx_ring
->next_to_clean
)
540 if (staterr
& E1000_RXD_STAT_DD
) {
541 /* Descriptor Done */
542 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
548 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
552 (u64
)buffer_info
->dma
,
555 if (netif_msg_pktdata(adapter
) &&
556 buffer_info
->dma
&& buffer_info
->page
) {
557 print_hex_dump(KERN_INFO
, "",
560 page_address(buffer_info
->page
) +
561 buffer_info
->page_offset
,
573 * igb_get_i2c_data - Reads the I2C SDA data bit
574 * @hw: pointer to hardware structure
575 * @i2cctl: Current value of I2CCTL register
577 * Returns the I2C data bit value
579 static int igb_get_i2c_data(void *data
)
581 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
582 struct e1000_hw
*hw
= &adapter
->hw
;
583 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
585 return ((i2cctl
& E1000_I2C_DATA_IN
) != 0);
589 * igb_set_i2c_data - Sets the I2C data bit
590 * @data: pointer to hardware structure
591 * @state: I2C data value (0 or 1) to set
593 * Sets the I2C data bit
595 static void igb_set_i2c_data(void *data
, int state
)
597 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
598 struct e1000_hw
*hw
= &adapter
->hw
;
599 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
602 i2cctl
|= E1000_I2C_DATA_OUT
;
604 i2cctl
&= ~E1000_I2C_DATA_OUT
;
606 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
607 i2cctl
|= E1000_I2C_CLK_OE_N
;
608 wr32(E1000_I2CPARAMS
, i2cctl
);
614 * igb_set_i2c_clk - Sets the I2C SCL clock
615 * @data: pointer to hardware structure
616 * @state: state to set clock
618 * Sets the I2C clock line to state
620 static void igb_set_i2c_clk(void *data
, int state
)
622 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
623 struct e1000_hw
*hw
= &adapter
->hw
;
624 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
627 i2cctl
|= E1000_I2C_CLK_OUT
;
628 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
630 i2cctl
&= ~E1000_I2C_CLK_OUT
;
631 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
633 wr32(E1000_I2CPARAMS
, i2cctl
);
638 * igb_get_i2c_clk - Gets the I2C SCL clock state
639 * @data: pointer to hardware structure
641 * Gets the I2C clock state
643 static int igb_get_i2c_clk(void *data
)
645 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
646 struct e1000_hw
*hw
= &adapter
->hw
;
647 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
649 return ((i2cctl
& E1000_I2C_CLK_IN
) != 0);
652 static const struct i2c_algo_bit_data igb_i2c_algo
= {
653 .setsda
= igb_set_i2c_data
,
654 .setscl
= igb_set_i2c_clk
,
655 .getsda
= igb_get_i2c_data
,
656 .getscl
= igb_get_i2c_clk
,
662 * igb_get_hw_dev - return device
663 * @hw: pointer to hardware structure
665 * used by hardware layer to print debugging information
667 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
669 struct igb_adapter
*adapter
= hw
->back
;
670 return adapter
->netdev
;
674 * igb_init_module - Driver Registration Routine
676 * igb_init_module is the first routine called when the driver is
677 * loaded. All it does is register with the PCI subsystem.
679 static int __init
igb_init_module(void)
682 pr_info("%s - version %s\n",
683 igb_driver_string
, igb_driver_version
);
685 pr_info("%s\n", igb_copyright
);
687 #ifdef CONFIG_IGB_DCA
688 dca_register_notify(&dca_notifier
);
690 ret
= pci_register_driver(&igb_driver
);
694 module_init(igb_init_module
);
697 * igb_exit_module - Driver Exit Cleanup Routine
699 * igb_exit_module is called just before the driver is removed
702 static void __exit
igb_exit_module(void)
704 #ifdef CONFIG_IGB_DCA
705 dca_unregister_notify(&dca_notifier
);
707 pci_unregister_driver(&igb_driver
);
710 module_exit(igb_exit_module
);
712 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
714 * igb_cache_ring_register - Descriptor ring to register mapping
715 * @adapter: board private structure to initialize
717 * Once we know the feature-set enabled for the device, we'll cache
718 * the register offset the descriptor ring is assigned to.
720 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
723 u32 rbase_offset
= adapter
->vfs_allocated_count
;
725 switch (adapter
->hw
.mac
.type
) {
727 /* The queues are allocated for virtualization such that VF 0
728 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
729 * In order to avoid collision we start at the first free queue
730 * and continue consuming queues in the same sequence
732 if (adapter
->vfs_allocated_count
) {
733 for (; i
< adapter
->rss_queues
; i
++)
734 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
744 for (; i
< adapter
->num_rx_queues
; i
++)
745 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
746 for (; j
< adapter
->num_tx_queues
; j
++)
747 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
753 * igb_write_ivar - configure ivar for given MSI-X vector
754 * @hw: pointer to the HW structure
755 * @msix_vector: vector number we are allocating to a given ring
756 * @index: row index of IVAR register to write within IVAR table
757 * @offset: column offset of in IVAR, should be multiple of 8
759 * This function is intended to handle the writing of the IVAR register
760 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
761 * each containing an cause allocation for an Rx and Tx ring, and a
762 * variable number of rows depending on the number of queues supported.
764 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
765 int index
, int offset
)
767 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
769 /* clear any bits that are currently set */
770 ivar
&= ~((u32
)0xFF << offset
);
772 /* write vector and valid bit */
773 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
775 array_wr32(E1000_IVAR0
, index
, ivar
);
778 #define IGB_N0_QUEUE -1
779 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
781 struct igb_adapter
*adapter
= q_vector
->adapter
;
782 struct e1000_hw
*hw
= &adapter
->hw
;
783 int rx_queue
= IGB_N0_QUEUE
;
784 int tx_queue
= IGB_N0_QUEUE
;
787 if (q_vector
->rx
.ring
)
788 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
789 if (q_vector
->tx
.ring
)
790 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
792 switch (hw
->mac
.type
) {
794 /* The 82575 assigns vectors using a bitmask, which matches the
795 * bitmask for the EICR/EIMS/EIMC registers. To assign one
796 * or more queues to a vector, we write the appropriate bits
797 * into the MSIXBM register for that vector.
799 if (rx_queue
> IGB_N0_QUEUE
)
800 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
801 if (tx_queue
> IGB_N0_QUEUE
)
802 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
803 if (!adapter
->msix_entries
&& msix_vector
== 0)
804 msixbm
|= E1000_EIMS_OTHER
;
805 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
806 q_vector
->eims_value
= msixbm
;
809 /* 82576 uses a table that essentially consists of 2 columns
810 * with 8 rows. The ordering is column-major so we use the
811 * lower 3 bits as the row index, and the 4th bit as the
814 if (rx_queue
> IGB_N0_QUEUE
)
815 igb_write_ivar(hw
, msix_vector
,
817 (rx_queue
& 0x8) << 1);
818 if (tx_queue
> IGB_N0_QUEUE
)
819 igb_write_ivar(hw
, msix_vector
,
821 ((tx_queue
& 0x8) << 1) + 8);
822 q_vector
->eims_value
= 1 << msix_vector
;
829 /* On 82580 and newer adapters the scheme is similar to 82576
830 * however instead of ordering column-major we have things
831 * ordered row-major. So we traverse the table by using
832 * bit 0 as the column offset, and the remaining bits as the
835 if (rx_queue
> IGB_N0_QUEUE
)
836 igb_write_ivar(hw
, msix_vector
,
838 (rx_queue
& 0x1) << 4);
839 if (tx_queue
> IGB_N0_QUEUE
)
840 igb_write_ivar(hw
, msix_vector
,
842 ((tx_queue
& 0x1) << 4) + 8);
843 q_vector
->eims_value
= 1 << msix_vector
;
850 /* add q_vector eims value to global eims_enable_mask */
851 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
853 /* configure q_vector to set itr on first interrupt */
854 q_vector
->set_itr
= 1;
858 * igb_configure_msix - Configure MSI-X hardware
859 * @adapter: board private structure to initialize
861 * igb_configure_msix sets up the hardware to properly
862 * generate MSI-X interrupts.
864 static void igb_configure_msix(struct igb_adapter
*adapter
)
868 struct e1000_hw
*hw
= &adapter
->hw
;
870 adapter
->eims_enable_mask
= 0;
872 /* set vector for other causes, i.e. link changes */
873 switch (hw
->mac
.type
) {
875 tmp
= rd32(E1000_CTRL_EXT
);
876 /* enable MSI-X PBA support*/
877 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
879 /* Auto-Mask interrupts upon ICR read. */
880 tmp
|= E1000_CTRL_EXT_EIAME
;
881 tmp
|= E1000_CTRL_EXT_IRCA
;
883 wr32(E1000_CTRL_EXT
, tmp
);
885 /* enable msix_other interrupt */
886 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
887 adapter
->eims_other
= E1000_EIMS_OTHER
;
897 /* Turn on MSI-X capability first, or our settings
898 * won't stick. And it will take days to debug.
900 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
901 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
904 /* enable msix_other interrupt */
905 adapter
->eims_other
= 1 << vector
;
906 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
908 wr32(E1000_IVAR_MISC
, tmp
);
911 /* do nothing, since nothing else supports MSI-X */
913 } /* switch (hw->mac.type) */
915 adapter
->eims_enable_mask
|= adapter
->eims_other
;
917 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
918 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
924 * igb_request_msix - Initialize MSI-X interrupts
925 * @adapter: board private structure to initialize
927 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
930 static int igb_request_msix(struct igb_adapter
*adapter
)
932 struct net_device
*netdev
= adapter
->netdev
;
933 struct e1000_hw
*hw
= &adapter
->hw
;
934 int i
, err
= 0, vector
= 0, free_vector
= 0;
936 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
937 igb_msix_other
, 0, netdev
->name
, adapter
);
941 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
942 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
946 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
948 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
949 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
950 q_vector
->rx
.ring
->queue_index
);
951 else if (q_vector
->tx
.ring
)
952 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
953 q_vector
->tx
.ring
->queue_index
);
954 else if (q_vector
->rx
.ring
)
955 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
956 q_vector
->rx
.ring
->queue_index
);
958 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
960 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
961 igb_msix_ring
, 0, q_vector
->name
,
967 igb_configure_msix(adapter
);
971 /* free already assigned IRQs */
972 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
975 for (i
= 0; i
< vector
; i
++) {
976 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
977 adapter
->q_vector
[i
]);
983 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
985 if (adapter
->msix_entries
) {
986 pci_disable_msix(adapter
->pdev
);
987 kfree(adapter
->msix_entries
);
988 adapter
->msix_entries
= NULL
;
989 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
990 pci_disable_msi(adapter
->pdev
);
995 * igb_free_q_vector - Free memory allocated for specific interrupt vector
996 * @adapter: board private structure to initialize
997 * @v_idx: Index of vector to be freed
999 * This function frees the memory allocated to the q_vector. In addition if
1000 * NAPI is enabled it will delete any references to the NAPI struct prior
1001 * to freeing the q_vector.
1003 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1005 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1007 if (q_vector
->tx
.ring
)
1008 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1010 if (q_vector
->rx
.ring
)
1011 adapter
->tx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1013 adapter
->q_vector
[v_idx
] = NULL
;
1014 netif_napi_del(&q_vector
->napi
);
1016 /* ixgbe_get_stats64() might access the rings on this vector,
1017 * we must wait a grace period before freeing it.
1019 kfree_rcu(q_vector
, rcu
);
1023 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1024 * @adapter: board private structure to initialize
1026 * This function frees the memory allocated to the q_vectors. In addition if
1027 * NAPI is enabled it will delete any references to the NAPI struct prior
1028 * to freeing the q_vector.
1030 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1032 int v_idx
= adapter
->num_q_vectors
;
1034 adapter
->num_tx_queues
= 0;
1035 adapter
->num_rx_queues
= 0;
1036 adapter
->num_q_vectors
= 0;
1039 igb_free_q_vector(adapter
, v_idx
);
1043 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1044 * @adapter: board private structure to initialize
1046 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1047 * MSI-X interrupts allocated.
1049 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1051 igb_free_q_vectors(adapter
);
1052 igb_reset_interrupt_capability(adapter
);
1056 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1057 * @adapter: board private structure to initialize
1058 * @msix: boolean value of MSIX capability
1060 * Attempt to configure interrupts using the best available
1061 * capabilities of the hardware and kernel.
1063 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1071 /* Number of supported queues. */
1072 adapter
->num_rx_queues
= adapter
->rss_queues
;
1073 if (adapter
->vfs_allocated_count
)
1074 adapter
->num_tx_queues
= 1;
1076 adapter
->num_tx_queues
= adapter
->rss_queues
;
1078 /* start with one vector for every Rx queue */
1079 numvecs
= adapter
->num_rx_queues
;
1081 /* if Tx handler is separate add 1 for every Tx queue */
1082 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1083 numvecs
+= adapter
->num_tx_queues
;
1085 /* store the number of vectors reserved for queues */
1086 adapter
->num_q_vectors
= numvecs
;
1088 /* add 1 vector for link status interrupts */
1090 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
1093 if (!adapter
->msix_entries
)
1096 for (i
= 0; i
< numvecs
; i
++)
1097 adapter
->msix_entries
[i
].entry
= i
;
1099 err
= pci_enable_msix(adapter
->pdev
,
1100 adapter
->msix_entries
,
1105 igb_reset_interrupt_capability(adapter
);
1107 /* If we can't do MSI-X, try MSI */
1109 #ifdef CONFIG_PCI_IOV
1110 /* disable SR-IOV for non MSI-X configurations */
1111 if (adapter
->vf_data
) {
1112 struct e1000_hw
*hw
= &adapter
->hw
;
1113 /* disable iov and allow time for transactions to clear */
1114 pci_disable_sriov(adapter
->pdev
);
1117 kfree(adapter
->vf_data
);
1118 adapter
->vf_data
= NULL
;
1119 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1122 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1125 adapter
->vfs_allocated_count
= 0;
1126 adapter
->rss_queues
= 1;
1127 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1128 adapter
->num_rx_queues
= 1;
1129 adapter
->num_tx_queues
= 1;
1130 adapter
->num_q_vectors
= 1;
1131 if (!pci_enable_msi(adapter
->pdev
))
1132 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1135 static void igb_add_ring(struct igb_ring
*ring
,
1136 struct igb_ring_container
*head
)
1143 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1144 * @adapter: board private structure to initialize
1145 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1146 * @v_idx: index of vector in adapter struct
1147 * @txr_count: total number of Tx rings to allocate
1148 * @txr_idx: index of first Tx ring to allocate
1149 * @rxr_count: total number of Rx rings to allocate
1150 * @rxr_idx: index of first Rx ring to allocate
1152 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1154 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1155 int v_count
, int v_idx
,
1156 int txr_count
, int txr_idx
,
1157 int rxr_count
, int rxr_idx
)
1159 struct igb_q_vector
*q_vector
;
1160 struct igb_ring
*ring
;
1161 int ring_count
, size
;
1163 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1164 if (txr_count
> 1 || rxr_count
> 1)
1167 ring_count
= txr_count
+ rxr_count
;
1168 size
= sizeof(struct igb_q_vector
) +
1169 (sizeof(struct igb_ring
) * ring_count
);
1171 /* allocate q_vector and rings */
1172 q_vector
= kzalloc(size
, GFP_KERNEL
);
1176 /* initialize NAPI */
1177 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1180 /* tie q_vector and adapter together */
1181 adapter
->q_vector
[v_idx
] = q_vector
;
1182 q_vector
->adapter
= adapter
;
1184 /* initialize work limits */
1185 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1187 /* initialize ITR configuration */
1188 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1189 q_vector
->itr_val
= IGB_START_ITR
;
1191 /* initialize pointer to rings */
1192 ring
= q_vector
->ring
;
1196 /* rx or rx/tx vector */
1197 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1198 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1200 /* tx only vector */
1201 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1202 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1206 /* assign generic ring traits */
1207 ring
->dev
= &adapter
->pdev
->dev
;
1208 ring
->netdev
= adapter
->netdev
;
1210 /* configure backlink on ring */
1211 ring
->q_vector
= q_vector
;
1213 /* update q_vector Tx values */
1214 igb_add_ring(ring
, &q_vector
->tx
);
1216 /* For 82575, context index must be unique per ring. */
1217 if (adapter
->hw
.mac
.type
== e1000_82575
)
1218 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1220 /* apply Tx specific ring traits */
1221 ring
->count
= adapter
->tx_ring_count
;
1222 ring
->queue_index
= txr_idx
;
1224 /* assign ring to adapter */
1225 adapter
->tx_ring
[txr_idx
] = ring
;
1227 /* push pointer to next ring */
1232 /* assign generic ring traits */
1233 ring
->dev
= &adapter
->pdev
->dev
;
1234 ring
->netdev
= adapter
->netdev
;
1236 /* configure backlink on ring */
1237 ring
->q_vector
= q_vector
;
1239 /* update q_vector Rx values */
1240 igb_add_ring(ring
, &q_vector
->rx
);
1242 /* set flag indicating ring supports SCTP checksum offload */
1243 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1244 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1247 * On i350, i354, i210, and i211, loopback VLAN packets
1248 * have the tag byte-swapped.
1250 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1251 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1253 /* apply Rx specific ring traits */
1254 ring
->count
= adapter
->rx_ring_count
;
1255 ring
->queue_index
= rxr_idx
;
1257 /* assign ring to adapter */
1258 adapter
->rx_ring
[rxr_idx
] = ring
;
1266 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1267 * @adapter: board private structure to initialize
1269 * We allocate one q_vector per queue interrupt. If allocation fails we
1272 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1274 int q_vectors
= adapter
->num_q_vectors
;
1275 int rxr_remaining
= adapter
->num_rx_queues
;
1276 int txr_remaining
= adapter
->num_tx_queues
;
1277 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1280 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1281 for (; rxr_remaining
; v_idx
++) {
1282 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1288 /* update counts and index */
1294 for (; v_idx
< q_vectors
; v_idx
++) {
1295 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1296 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1297 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1298 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1303 /* update counts and index */
1304 rxr_remaining
-= rqpv
;
1305 txr_remaining
-= tqpv
;
1313 adapter
->num_tx_queues
= 0;
1314 adapter
->num_rx_queues
= 0;
1315 adapter
->num_q_vectors
= 0;
1318 igb_free_q_vector(adapter
, v_idx
);
1324 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1325 * @adapter: board private structure to initialize
1326 * @msix: boolean value of MSIX capability
1328 * This function initializes the interrupts and allocates all of the queues.
1330 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1332 struct pci_dev
*pdev
= adapter
->pdev
;
1335 igb_set_interrupt_capability(adapter
, msix
);
1337 err
= igb_alloc_q_vectors(adapter
);
1339 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1340 goto err_alloc_q_vectors
;
1343 igb_cache_ring_register(adapter
);
1347 err_alloc_q_vectors
:
1348 igb_reset_interrupt_capability(adapter
);
1353 * igb_request_irq - initialize interrupts
1354 * @adapter: board private structure to initialize
1356 * Attempts to configure interrupts using the best available
1357 * capabilities of the hardware and kernel.
1359 static int igb_request_irq(struct igb_adapter
*adapter
)
1361 struct net_device
*netdev
= adapter
->netdev
;
1362 struct pci_dev
*pdev
= adapter
->pdev
;
1365 if (adapter
->msix_entries
) {
1366 err
= igb_request_msix(adapter
);
1369 /* fall back to MSI */
1370 igb_free_all_tx_resources(adapter
);
1371 igb_free_all_rx_resources(adapter
);
1373 igb_clear_interrupt_scheme(adapter
);
1374 err
= igb_init_interrupt_scheme(adapter
, false);
1378 igb_setup_all_tx_resources(adapter
);
1379 igb_setup_all_rx_resources(adapter
);
1380 igb_configure(adapter
);
1383 igb_assign_vector(adapter
->q_vector
[0], 0);
1385 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1386 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1387 netdev
->name
, adapter
);
1391 /* fall back to legacy interrupts */
1392 igb_reset_interrupt_capability(adapter
);
1393 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1396 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1397 netdev
->name
, adapter
);
1400 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1407 static void igb_free_irq(struct igb_adapter
*adapter
)
1409 if (adapter
->msix_entries
) {
1412 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1414 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1415 free_irq(adapter
->msix_entries
[vector
++].vector
,
1416 adapter
->q_vector
[i
]);
1418 free_irq(adapter
->pdev
->irq
, adapter
);
1423 * igb_irq_disable - Mask off interrupt generation on the NIC
1424 * @adapter: board private structure
1426 static void igb_irq_disable(struct igb_adapter
*adapter
)
1428 struct e1000_hw
*hw
= &adapter
->hw
;
1430 /* we need to be careful when disabling interrupts. The VFs are also
1431 * mapped into these registers and so clearing the bits can cause
1432 * issues on the VF drivers so we only need to clear what we set
1434 if (adapter
->msix_entries
) {
1435 u32 regval
= rd32(E1000_EIAM
);
1436 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1437 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1438 regval
= rd32(E1000_EIAC
);
1439 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1443 wr32(E1000_IMC
, ~0);
1445 if (adapter
->msix_entries
) {
1447 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1448 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1450 synchronize_irq(adapter
->pdev
->irq
);
1455 * igb_irq_enable - Enable default interrupt generation settings
1456 * @adapter: board private structure
1458 static void igb_irq_enable(struct igb_adapter
*adapter
)
1460 struct e1000_hw
*hw
= &adapter
->hw
;
1462 if (adapter
->msix_entries
) {
1463 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1464 u32 regval
= rd32(E1000_EIAC
);
1465 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1466 regval
= rd32(E1000_EIAM
);
1467 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1468 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1469 if (adapter
->vfs_allocated_count
) {
1470 wr32(E1000_MBVFIMR
, 0xFF);
1471 ims
|= E1000_IMS_VMMB
;
1473 wr32(E1000_IMS
, ims
);
1475 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1477 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1482 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1484 struct e1000_hw
*hw
= &adapter
->hw
;
1485 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1486 u16 old_vid
= adapter
->mng_vlan_id
;
1488 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1489 /* add VID to filter table */
1490 igb_vfta_set(hw
, vid
, true);
1491 adapter
->mng_vlan_id
= vid
;
1493 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1496 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1498 !test_bit(old_vid
, adapter
->active_vlans
)) {
1499 /* remove VID from filter table */
1500 igb_vfta_set(hw
, old_vid
, false);
1505 * igb_release_hw_control - release control of the h/w to f/w
1506 * @adapter: address of board private structure
1508 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1509 * For ASF and Pass Through versions of f/w this means that the
1510 * driver is no longer loaded.
1512 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1514 struct e1000_hw
*hw
= &adapter
->hw
;
1517 /* Let firmware take over control of h/w */
1518 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1519 wr32(E1000_CTRL_EXT
,
1520 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1524 * igb_get_hw_control - get control of the h/w from f/w
1525 * @adapter: address of board private structure
1527 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1528 * For ASF and Pass Through versions of f/w this means that
1529 * the driver is loaded.
1531 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1533 struct e1000_hw
*hw
= &adapter
->hw
;
1536 /* Let firmware know the driver has taken over */
1537 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1538 wr32(E1000_CTRL_EXT
,
1539 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1543 * igb_configure - configure the hardware for RX and TX
1544 * @adapter: private board structure
1546 static void igb_configure(struct igb_adapter
*adapter
)
1548 struct net_device
*netdev
= adapter
->netdev
;
1551 igb_get_hw_control(adapter
);
1552 igb_set_rx_mode(netdev
);
1554 igb_restore_vlan(adapter
);
1556 igb_setup_tctl(adapter
);
1557 igb_setup_mrqc(adapter
);
1558 igb_setup_rctl(adapter
);
1560 igb_configure_tx(adapter
);
1561 igb_configure_rx(adapter
);
1563 igb_rx_fifo_flush_82575(&adapter
->hw
);
1565 /* call igb_desc_unused which always leaves
1566 * at least 1 descriptor unused to make sure
1567 * next_to_use != next_to_clean
1569 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1570 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1571 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1576 * igb_power_up_link - Power up the phy/serdes link
1577 * @adapter: address of board private structure
1579 void igb_power_up_link(struct igb_adapter
*adapter
)
1581 igb_reset_phy(&adapter
->hw
);
1583 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1584 igb_power_up_phy_copper(&adapter
->hw
);
1586 igb_power_up_serdes_link_82575(&adapter
->hw
);
1590 * igb_power_down_link - Power down the phy/serdes link
1591 * @adapter: address of board private structure
1593 static void igb_power_down_link(struct igb_adapter
*adapter
)
1595 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1596 igb_power_down_phy_copper_82575(&adapter
->hw
);
1598 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1602 * igb_up - Open the interface and prepare it to handle traffic
1603 * @adapter: board private structure
1605 int igb_up(struct igb_adapter
*adapter
)
1607 struct e1000_hw
*hw
= &adapter
->hw
;
1610 /* hardware has been reset, we need to reload some things */
1611 igb_configure(adapter
);
1613 clear_bit(__IGB_DOWN
, &adapter
->state
);
1615 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1616 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1618 if (adapter
->msix_entries
)
1619 igb_configure_msix(adapter
);
1621 igb_assign_vector(adapter
->q_vector
[0], 0);
1623 /* Clear any pending interrupts. */
1625 igb_irq_enable(adapter
);
1627 /* notify VFs that reset has been completed */
1628 if (adapter
->vfs_allocated_count
) {
1629 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1630 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1631 wr32(E1000_CTRL_EXT
, reg_data
);
1634 netif_tx_start_all_queues(adapter
->netdev
);
1636 /* start the watchdog. */
1637 hw
->mac
.get_link_status
= 1;
1638 schedule_work(&adapter
->watchdog_task
);
1643 void igb_down(struct igb_adapter
*adapter
)
1645 struct net_device
*netdev
= adapter
->netdev
;
1646 struct e1000_hw
*hw
= &adapter
->hw
;
1650 /* signal that we're down so the interrupt handler does not
1651 * reschedule our watchdog timer
1653 set_bit(__IGB_DOWN
, &adapter
->state
);
1655 /* disable receives in the hardware */
1656 rctl
= rd32(E1000_RCTL
);
1657 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1658 /* flush and sleep below */
1660 netif_tx_stop_all_queues(netdev
);
1662 /* disable transmits in the hardware */
1663 tctl
= rd32(E1000_TCTL
);
1664 tctl
&= ~E1000_TCTL_EN
;
1665 wr32(E1000_TCTL
, tctl
);
1666 /* flush both disables and wait for them to finish */
1670 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1671 napi_disable(&(adapter
->q_vector
[i
]->napi
));
1673 igb_irq_disable(adapter
);
1675 del_timer_sync(&adapter
->watchdog_timer
);
1676 del_timer_sync(&adapter
->phy_info_timer
);
1678 netif_carrier_off(netdev
);
1680 /* record the stats before reset*/
1681 spin_lock(&adapter
->stats64_lock
);
1682 igb_update_stats(adapter
, &adapter
->stats64
);
1683 spin_unlock(&adapter
->stats64_lock
);
1685 adapter
->link_speed
= 0;
1686 adapter
->link_duplex
= 0;
1688 if (!pci_channel_offline(adapter
->pdev
))
1690 igb_clean_all_tx_rings(adapter
);
1691 igb_clean_all_rx_rings(adapter
);
1692 #ifdef CONFIG_IGB_DCA
1694 /* since we reset the hardware DCA settings were cleared */
1695 igb_setup_dca(adapter
);
1699 void igb_reinit_locked(struct igb_adapter
*adapter
)
1701 WARN_ON(in_interrupt());
1702 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1706 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1709 void igb_reset(struct igb_adapter
*adapter
)
1711 struct pci_dev
*pdev
= adapter
->pdev
;
1712 struct e1000_hw
*hw
= &adapter
->hw
;
1713 struct e1000_mac_info
*mac
= &hw
->mac
;
1714 struct e1000_fc_info
*fc
= &hw
->fc
;
1715 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1717 /* Repartition Pba for greater than 9k mtu
1718 * To take effect CTRL.RST is required.
1720 switch (mac
->type
) {
1724 pba
= rd32(E1000_RXPBS
);
1725 pba
= igb_rxpbs_adjust_82580(pba
);
1728 pba
= rd32(E1000_RXPBS
);
1729 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1735 pba
= E1000_PBA_34K
;
1739 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1740 (mac
->type
< e1000_82576
)) {
1741 /* adjust PBA for jumbo frames */
1742 wr32(E1000_PBA
, pba
);
1744 /* To maintain wire speed transmits, the Tx FIFO should be
1745 * large enough to accommodate two full transmit packets,
1746 * rounded up to the next 1KB and expressed in KB. Likewise,
1747 * the Rx FIFO should be large enough to accommodate at least
1748 * one full receive packet and is similarly rounded up and
1751 pba
= rd32(E1000_PBA
);
1752 /* upper 16 bits has Tx packet buffer allocation size in KB */
1753 tx_space
= pba
>> 16;
1754 /* lower 16 bits has Rx packet buffer allocation size in KB */
1756 /* the Tx fifo also stores 16 bytes of information about the Tx
1757 * but don't include ethernet FCS because hardware appends it
1759 min_tx_space
= (adapter
->max_frame_size
+
1760 sizeof(union e1000_adv_tx_desc
) -
1762 min_tx_space
= ALIGN(min_tx_space
, 1024);
1763 min_tx_space
>>= 10;
1764 /* software strips receive CRC, so leave room for it */
1765 min_rx_space
= adapter
->max_frame_size
;
1766 min_rx_space
= ALIGN(min_rx_space
, 1024);
1767 min_rx_space
>>= 10;
1769 /* If current Tx allocation is less than the min Tx FIFO size,
1770 * and the min Tx FIFO size is less than the current Rx FIFO
1771 * allocation, take space away from current Rx allocation
1773 if (tx_space
< min_tx_space
&&
1774 ((min_tx_space
- tx_space
) < pba
)) {
1775 pba
= pba
- (min_tx_space
- tx_space
);
1777 /* if short on Rx space, Rx wins and must trump Tx
1780 if (pba
< min_rx_space
)
1783 wr32(E1000_PBA
, pba
);
1786 /* flow control settings */
1787 /* The high water mark must be low enough to fit one full frame
1788 * (or the size used for early receive) above it in the Rx FIFO.
1789 * Set it to the lower of:
1790 * - 90% of the Rx FIFO size, or
1791 * - the full Rx FIFO size minus one full frame
1793 hwm
= min(((pba
<< 10) * 9 / 10),
1794 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1796 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1797 fc
->low_water
= fc
->high_water
- 16;
1798 fc
->pause_time
= 0xFFFF;
1800 fc
->current_mode
= fc
->requested_mode
;
1802 /* disable receive for all VFs and wait one second */
1803 if (adapter
->vfs_allocated_count
) {
1805 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1806 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1808 /* ping all the active vfs to let them know we are going down */
1809 igb_ping_all_vfs(adapter
);
1811 /* disable transmits and receives */
1812 wr32(E1000_VFRE
, 0);
1813 wr32(E1000_VFTE
, 0);
1816 /* Allow time for pending master requests to run */
1817 hw
->mac
.ops
.reset_hw(hw
);
1820 if (hw
->mac
.ops
.init_hw(hw
))
1821 dev_err(&pdev
->dev
, "Hardware Error\n");
1823 /* Flow control settings reset on hardware reset, so guarantee flow
1824 * control is off when forcing speed.
1826 if (!hw
->mac
.autoneg
)
1827 igb_force_mac_fc(hw
);
1829 igb_init_dmac(adapter
, pba
);
1830 #ifdef CONFIG_IGB_HWMON
1831 /* Re-initialize the thermal sensor on i350 devices. */
1832 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1833 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
1834 /* If present, re-initialize the external thermal sensor
1838 mac
->ops
.init_thermal_sensor_thresh(hw
);
1842 if (!netif_running(adapter
->netdev
))
1843 igb_power_down_link(adapter
);
1845 igb_update_mng_vlan(adapter
);
1847 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1848 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1850 /* Re-enable PTP, where applicable. */
1851 igb_ptp_reset(adapter
);
1853 igb_get_phy_info(hw
);
1856 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
1857 netdev_features_t features
)
1859 /* Since there is no support for separate Rx/Tx vlan accel
1860 * enable/disable make sure Tx flag is always in same state as Rx.
1862 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
1863 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
1865 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
1870 static int igb_set_features(struct net_device
*netdev
,
1871 netdev_features_t features
)
1873 netdev_features_t changed
= netdev
->features
^ features
;
1874 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1876 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
1877 igb_vlan_mode(netdev
, features
);
1879 if (!(changed
& NETIF_F_RXALL
))
1882 netdev
->features
= features
;
1884 if (netif_running(netdev
))
1885 igb_reinit_locked(adapter
);
1892 static const struct net_device_ops igb_netdev_ops
= {
1893 .ndo_open
= igb_open
,
1894 .ndo_stop
= igb_close
,
1895 .ndo_start_xmit
= igb_xmit_frame
,
1896 .ndo_get_stats64
= igb_get_stats64
,
1897 .ndo_set_rx_mode
= igb_set_rx_mode
,
1898 .ndo_set_mac_address
= igb_set_mac
,
1899 .ndo_change_mtu
= igb_change_mtu
,
1900 .ndo_do_ioctl
= igb_ioctl
,
1901 .ndo_tx_timeout
= igb_tx_timeout
,
1902 .ndo_validate_addr
= eth_validate_addr
,
1903 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1904 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1905 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
1906 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
1907 .ndo_set_vf_tx_rate
= igb_ndo_set_vf_bw
,
1908 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
1909 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
1910 #ifdef CONFIG_NET_POLL_CONTROLLER
1911 .ndo_poll_controller
= igb_netpoll
,
1913 .ndo_fix_features
= igb_fix_features
,
1914 .ndo_set_features
= igb_set_features
,
1918 * igb_set_fw_version - Configure version string for ethtool
1919 * @adapter: adapter struct
1921 void igb_set_fw_version(struct igb_adapter
*adapter
)
1923 struct e1000_hw
*hw
= &adapter
->hw
;
1924 struct e1000_fw_version fw
;
1926 igb_get_fw_version(hw
, &fw
);
1928 switch (hw
->mac
.type
) {
1930 snprintf(adapter
->fw_version
, sizeof(adapter
->fw_version
),
1932 fw
.invm_major
, fw
.invm_minor
, fw
.invm_img_type
);
1936 /* if option is rom valid, display its version too */
1938 snprintf(adapter
->fw_version
,
1939 sizeof(adapter
->fw_version
),
1940 "%d.%d, 0x%08x, %d.%d.%d",
1941 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
1942 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
1945 snprintf(adapter
->fw_version
,
1946 sizeof(adapter
->fw_version
),
1948 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
1956 * igb_init_i2c - Init I2C interface
1957 * @adapter: pointer to adapter structure
1959 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
1961 s32 status
= E1000_SUCCESS
;
1963 /* I2C interface supported on i350 devices */
1964 if (adapter
->hw
.mac
.type
!= e1000_i350
)
1965 return E1000_SUCCESS
;
1967 /* Initialize the i2c bus which is controlled by the registers.
1968 * This bus will use the i2c_algo_bit structue that implements
1969 * the protocol through toggling of the 4 bits in the register.
1971 adapter
->i2c_adap
.owner
= THIS_MODULE
;
1972 adapter
->i2c_algo
= igb_i2c_algo
;
1973 adapter
->i2c_algo
.data
= adapter
;
1974 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
1975 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
1976 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
1977 sizeof(adapter
->i2c_adap
.name
));
1978 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
1983 * igb_probe - Device Initialization Routine
1984 * @pdev: PCI device information struct
1985 * @ent: entry in igb_pci_tbl
1987 * Returns 0 on success, negative on failure
1989 * igb_probe initializes an adapter identified by a pci_dev structure.
1990 * The OS initialization, configuring of the adapter private structure,
1991 * and a hardware reset occur.
1993 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1995 struct net_device
*netdev
;
1996 struct igb_adapter
*adapter
;
1997 struct e1000_hw
*hw
;
1998 u16 eeprom_data
= 0;
2000 static int global_quad_port_a
; /* global quad port a indication */
2001 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2002 unsigned long mmio_start
, mmio_len
;
2003 int err
, pci_using_dac
;
2004 u8 part_str
[E1000_PBANUM_LENGTH
];
2006 /* Catch broken hardware that put the wrong VF device ID in
2007 * the PCIe SR-IOV capability.
2009 if (pdev
->is_virtfn
) {
2010 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2011 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2015 err
= pci_enable_device_mem(pdev
);
2020 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64));
2022 err
= dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64));
2026 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
2028 err
= dma_set_coherent_mask(&pdev
->dev
,
2032 "No usable DMA configuration, aborting\n");
2038 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2044 pci_enable_pcie_error_reporting(pdev
);
2046 pci_set_master(pdev
);
2047 pci_save_state(pdev
);
2050 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2053 goto err_alloc_etherdev
;
2055 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2057 pci_set_drvdata(pdev
, netdev
);
2058 adapter
= netdev_priv(netdev
);
2059 adapter
->netdev
= netdev
;
2060 adapter
->pdev
= pdev
;
2063 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2065 mmio_start
= pci_resource_start(pdev
, 0);
2066 mmio_len
= pci_resource_len(pdev
, 0);
2069 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
2073 netdev
->netdev_ops
= &igb_netdev_ops
;
2074 igb_set_ethtool_ops(netdev
);
2075 netdev
->watchdog_timeo
= 5 * HZ
;
2077 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2079 netdev
->mem_start
= mmio_start
;
2080 netdev
->mem_end
= mmio_start
+ mmio_len
;
2082 /* PCI config space info */
2083 hw
->vendor_id
= pdev
->vendor
;
2084 hw
->device_id
= pdev
->device
;
2085 hw
->revision_id
= pdev
->revision
;
2086 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2087 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2089 /* Copy the default MAC, PHY and NVM function pointers */
2090 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2091 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2092 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2093 /* Initialize skew-specific constants */
2094 err
= ei
->get_invariants(hw
);
2098 /* setup the private structure */
2099 err
= igb_sw_init(adapter
);
2103 igb_get_bus_info_pcie(hw
);
2105 hw
->phy
.autoneg_wait_to_complete
= false;
2107 /* Copper options */
2108 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2109 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2110 hw
->phy
.disable_polarity_correction
= false;
2111 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2114 if (igb_check_reset_block(hw
))
2115 dev_info(&pdev
->dev
,
2116 "PHY reset is blocked due to SOL/IDER session.\n");
2118 /* features is initialized to 0 in allocation, it might have bits
2119 * set by igb_sw_init so we should use an or instead of an
2122 netdev
->features
|= NETIF_F_SG
|
2129 NETIF_F_HW_VLAN_CTAG_RX
|
2130 NETIF_F_HW_VLAN_CTAG_TX
;
2132 /* copy netdev features into list of user selectable features */
2133 netdev
->hw_features
|= netdev
->features
;
2134 netdev
->hw_features
|= NETIF_F_RXALL
;
2136 /* set this bit last since it cannot be part of hw_features */
2137 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
2139 netdev
->vlan_features
|= NETIF_F_TSO
|
2145 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2147 if (pci_using_dac
) {
2148 netdev
->features
|= NETIF_F_HIGHDMA
;
2149 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2152 if (hw
->mac
.type
>= e1000_82576
) {
2153 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2154 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2157 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2159 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2161 /* before reading the NVM, reset the controller to put the device in a
2162 * known good starting state
2164 hw
->mac
.ops
.reset_hw(hw
);
2166 /* make sure the NVM is good , i211 parts have special NVM that
2167 * doesn't contain a checksum
2169 if (hw
->mac
.type
!= e1000_i211
) {
2170 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2171 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2177 /* copy the MAC address out of the NVM */
2178 if (hw
->mac
.ops
.read_mac_addr(hw
))
2179 dev_err(&pdev
->dev
, "NVM Read Error\n");
2181 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2183 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2184 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2189 /* get firmware version for ethtool -i */
2190 igb_set_fw_version(adapter
);
2192 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2193 (unsigned long) adapter
);
2194 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2195 (unsigned long) adapter
);
2197 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2198 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2200 /* Initialize link properties that are user-changeable */
2201 adapter
->fc_autoneg
= true;
2202 hw
->mac
.autoneg
= true;
2203 hw
->phy
.autoneg_advertised
= 0x2f;
2205 hw
->fc
.requested_mode
= e1000_fc_default
;
2206 hw
->fc
.current_mode
= e1000_fc_default
;
2208 igb_validate_mdi_setting(hw
);
2210 /* By default, support wake on port A */
2211 if (hw
->bus
.func
== 0)
2212 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2214 /* Check the NVM for wake support on non-port A ports */
2215 if (hw
->mac
.type
>= e1000_82580
)
2216 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2217 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2219 else if (hw
->bus
.func
== 1)
2220 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2222 if (eeprom_data
& IGB_EEPROM_APME
)
2223 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2225 /* now that we have the eeprom settings, apply the special cases where
2226 * the eeprom may be wrong or the board simply won't support wake on
2227 * lan on a particular port
2229 switch (pdev
->device
) {
2230 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2231 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2233 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2234 case E1000_DEV_ID_82576_FIBER
:
2235 case E1000_DEV_ID_82576_SERDES
:
2236 /* Wake events only supported on port A for dual fiber
2237 * regardless of eeprom setting
2239 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2240 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2242 case E1000_DEV_ID_82576_QUAD_COPPER
:
2243 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2244 /* if quad port adapter, disable WoL on all but port A */
2245 if (global_quad_port_a
!= 0)
2246 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2248 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2249 /* Reset for multiple quad port adapters */
2250 if (++global_quad_port_a
== 4)
2251 global_quad_port_a
= 0;
2254 /* If the device can't wake, don't set software support */
2255 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2256 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2259 /* initialize the wol settings based on the eeprom settings */
2260 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2261 adapter
->wol
|= E1000_WUFC_MAG
;
2263 /* Some vendors want WoL disabled by default, but still supported */
2264 if ((hw
->mac
.type
== e1000_i350
) &&
2265 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2266 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2270 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2271 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2273 /* reset the hardware with the new settings */
2276 /* Init the I2C interface */
2277 err
= igb_init_i2c(adapter
);
2279 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2283 /* let the f/w know that the h/w is now under the control of the
2285 igb_get_hw_control(adapter
);
2287 strcpy(netdev
->name
, "eth%d");
2288 err
= register_netdev(netdev
);
2292 /* carrier off reporting is important to ethtool even BEFORE open */
2293 netif_carrier_off(netdev
);
2295 #ifdef CONFIG_IGB_DCA
2296 if (dca_add_requester(&pdev
->dev
) == 0) {
2297 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2298 dev_info(&pdev
->dev
, "DCA enabled\n");
2299 igb_setup_dca(adapter
);
2303 #ifdef CONFIG_IGB_HWMON
2304 /* Initialize the thermal sensor on i350 devices. */
2305 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2308 /* Read the NVM to determine if this i350 device supports an
2309 * external thermal sensor.
2311 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2312 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2313 adapter
->ets
= true;
2315 adapter
->ets
= false;
2316 if (igb_sysfs_init(adapter
))
2318 "failed to allocate sysfs resources\n");
2320 adapter
->ets
= false;
2323 /* do hw tstamp init after resetting */
2324 igb_ptp_init(adapter
);
2326 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2327 /* print bus type/speed/width info, not applicable to i354 */
2328 if (hw
->mac
.type
!= e1000_i354
) {
2329 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2331 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2332 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2334 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2336 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2338 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2339 "Width x1" : "unknown"), netdev
->dev_addr
);
2342 ret_val
= igb_read_part_string(hw
, part_str
, E1000_PBANUM_LENGTH
);
2344 strcpy(part_str
, "Unknown");
2345 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2346 dev_info(&pdev
->dev
,
2347 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2348 adapter
->msix_entries
? "MSI-X" :
2349 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2350 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2351 switch (hw
->mac
.type
) {
2355 igb_set_eee_i350(hw
);
2358 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2359 if ((rd32(E1000_CTRL_EXT
) &
2360 E1000_CTRL_EXT_LINK_MODE_SGMII
))
2361 igb_set_eee_i354(hw
);
2368 pm_runtime_put_noidle(&pdev
->dev
);
2372 igb_release_hw_control(adapter
);
2373 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2375 if (!igb_check_reset_block(hw
))
2378 if (hw
->flash_address
)
2379 iounmap(hw
->flash_address
);
2381 igb_clear_interrupt_scheme(adapter
);
2382 iounmap(hw
->hw_addr
);
2384 free_netdev(netdev
);
2386 pci_release_selected_regions(pdev
,
2387 pci_select_bars(pdev
, IORESOURCE_MEM
));
2390 pci_disable_device(pdev
);
2394 #ifdef CONFIG_PCI_IOV
2395 static int igb_disable_sriov(struct pci_dev
*pdev
)
2397 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2398 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2399 struct e1000_hw
*hw
= &adapter
->hw
;
2401 /* reclaim resources allocated to VFs */
2402 if (adapter
->vf_data
) {
2403 /* disable iov and allow time for transactions to clear */
2404 if (pci_vfs_assigned(pdev
)) {
2405 dev_warn(&pdev
->dev
,
2406 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2409 pci_disable_sriov(pdev
);
2413 kfree(adapter
->vf_data
);
2414 adapter
->vf_data
= NULL
;
2415 adapter
->vfs_allocated_count
= 0;
2416 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2419 dev_info(&pdev
->dev
, "IOV Disabled\n");
2421 /* Re-enable DMA Coalescing flag since IOV is turned off */
2422 adapter
->flags
|= IGB_FLAG_DMAC
;
2428 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2430 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2431 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2432 int old_vfs
= pci_num_vf(pdev
);
2438 else if (old_vfs
&& old_vfs
== num_vfs
)
2440 else if (old_vfs
&& old_vfs
!= num_vfs
)
2441 err
= igb_disable_sriov(pdev
);
2451 adapter
->vfs_allocated_count
= num_vfs
;
2453 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2454 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2456 /* if allocation failed then we do not support SR-IOV */
2457 if (!adapter
->vf_data
) {
2458 adapter
->vfs_allocated_count
= 0;
2460 "Unable to allocate memory for VF Data Storage\n");
2465 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2469 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2470 adapter
->vfs_allocated_count
);
2471 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2472 igb_vf_configure(adapter
, i
);
2474 /* DMA Coalescing is not supported in IOV mode. */
2475 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2479 kfree(adapter
->vf_data
);
2480 adapter
->vf_data
= NULL
;
2481 adapter
->vfs_allocated_count
= 0;
2488 * igb_remove_i2c - Cleanup I2C interface
2489 * @adapter: pointer to adapter structure
2491 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2493 /* free the adapter bus structure */
2494 i2c_del_adapter(&adapter
->i2c_adap
);
2498 * igb_remove - Device Removal Routine
2499 * @pdev: PCI device information struct
2501 * igb_remove is called by the PCI subsystem to alert the driver
2502 * that it should release a PCI device. The could be caused by a
2503 * Hot-Plug event, or because the driver is going to be removed from
2506 static void igb_remove(struct pci_dev
*pdev
)
2508 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2509 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2510 struct e1000_hw
*hw
= &adapter
->hw
;
2512 pm_runtime_get_noresume(&pdev
->dev
);
2513 #ifdef CONFIG_IGB_HWMON
2514 igb_sysfs_exit(adapter
);
2516 igb_remove_i2c(adapter
);
2517 igb_ptp_stop(adapter
);
2518 /* The watchdog timer may be rescheduled, so explicitly
2519 * disable watchdog from being rescheduled.
2521 set_bit(__IGB_DOWN
, &adapter
->state
);
2522 del_timer_sync(&adapter
->watchdog_timer
);
2523 del_timer_sync(&adapter
->phy_info_timer
);
2525 cancel_work_sync(&adapter
->reset_task
);
2526 cancel_work_sync(&adapter
->watchdog_task
);
2528 #ifdef CONFIG_IGB_DCA
2529 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2530 dev_info(&pdev
->dev
, "DCA disabled\n");
2531 dca_remove_requester(&pdev
->dev
);
2532 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2533 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2537 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2538 * would have already happened in close and is redundant.
2540 igb_release_hw_control(adapter
);
2542 unregister_netdev(netdev
);
2544 igb_clear_interrupt_scheme(adapter
);
2546 #ifdef CONFIG_PCI_IOV
2547 igb_disable_sriov(pdev
);
2550 iounmap(hw
->hw_addr
);
2551 if (hw
->flash_address
)
2552 iounmap(hw
->flash_address
);
2553 pci_release_selected_regions(pdev
,
2554 pci_select_bars(pdev
, IORESOURCE_MEM
));
2556 kfree(adapter
->shadow_vfta
);
2557 free_netdev(netdev
);
2559 pci_disable_pcie_error_reporting(pdev
);
2561 pci_disable_device(pdev
);
2565 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2566 * @adapter: board private structure to initialize
2568 * This function initializes the vf specific data storage and then attempts to
2569 * allocate the VFs. The reason for ordering it this way is because it is much
2570 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2571 * the memory for the VFs.
2573 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2575 #ifdef CONFIG_PCI_IOV
2576 struct pci_dev
*pdev
= adapter
->pdev
;
2577 struct e1000_hw
*hw
= &adapter
->hw
;
2579 /* Virtualization features not supported on i210 family. */
2580 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2583 pci_sriov_set_totalvfs(pdev
, 7);
2584 igb_enable_sriov(pdev
, max_vfs
);
2586 #endif /* CONFIG_PCI_IOV */
2589 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2591 struct e1000_hw
*hw
= &adapter
->hw
;
2594 /* Determine the maximum number of RSS queues supported. */
2595 switch (hw
->mac
.type
) {
2597 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2601 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2604 /* I350 cannot do RSS and SR-IOV at the same time */
2605 if (!!adapter
->vfs_allocated_count
) {
2611 if (!!adapter
->vfs_allocated_count
) {
2619 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2623 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2625 /* Determine if we need to pair queues. */
2626 switch (hw
->mac
.type
) {
2629 /* Device supports enough interrupts without queue pairing. */
2632 /* If VFs are going to be allocated with RSS queues then we
2633 * should pair the queues in order to conserve interrupts due
2634 * to limited supply.
2636 if ((adapter
->rss_queues
> 1) &&
2637 (adapter
->vfs_allocated_count
> 6))
2638 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2645 /* If rss_queues > half of max_rss_queues, pair the queues in
2646 * order to conserve interrupts due to limited supply.
2648 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2649 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2655 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2656 * @adapter: board private structure to initialize
2658 * igb_sw_init initializes the Adapter private data structure.
2659 * Fields are initialized based on PCI device information and
2660 * OS network device settings (MTU size).
2662 static int igb_sw_init(struct igb_adapter
*adapter
)
2664 struct e1000_hw
*hw
= &adapter
->hw
;
2665 struct net_device
*netdev
= adapter
->netdev
;
2666 struct pci_dev
*pdev
= adapter
->pdev
;
2668 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2670 /* set default ring sizes */
2671 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2672 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2674 /* set default ITR values */
2675 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2676 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2678 /* set default work limits */
2679 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2681 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2683 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2685 spin_lock_init(&adapter
->stats64_lock
);
2686 #ifdef CONFIG_PCI_IOV
2687 switch (hw
->mac
.type
) {
2691 dev_warn(&pdev
->dev
,
2692 "Maximum of 7 VFs per PF, using max\n");
2693 max_vfs
= adapter
->vfs_allocated_count
= 7;
2695 adapter
->vfs_allocated_count
= max_vfs
;
2696 if (adapter
->vfs_allocated_count
)
2697 dev_warn(&pdev
->dev
,
2698 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2703 #endif /* CONFIG_PCI_IOV */
2705 igb_init_queue_configuration(adapter
);
2707 /* Setup and initialize a copy of the hw vlan table array */
2708 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2711 /* This call may decrease the number of queues */
2712 if (igb_init_interrupt_scheme(adapter
, true)) {
2713 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2717 igb_probe_vfs(adapter
);
2719 /* Explicitly disable IRQ since the NIC can be in any state. */
2720 igb_irq_disable(adapter
);
2722 if (hw
->mac
.type
>= e1000_i350
)
2723 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2725 set_bit(__IGB_DOWN
, &adapter
->state
);
2730 * igb_open - Called when a network interface is made active
2731 * @netdev: network interface device structure
2733 * Returns 0 on success, negative value on failure
2735 * The open entry point is called when a network interface is made
2736 * active by the system (IFF_UP). At this point all resources needed
2737 * for transmit and receive operations are allocated, the interrupt
2738 * handler is registered with the OS, the watchdog timer is started,
2739 * and the stack is notified that the interface is ready.
2741 static int __igb_open(struct net_device
*netdev
, bool resuming
)
2743 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2744 struct e1000_hw
*hw
= &adapter
->hw
;
2745 struct pci_dev
*pdev
= adapter
->pdev
;
2749 /* disallow open during test */
2750 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
2756 pm_runtime_get_sync(&pdev
->dev
);
2758 netif_carrier_off(netdev
);
2760 /* allocate transmit descriptors */
2761 err
= igb_setup_all_tx_resources(adapter
);
2765 /* allocate receive descriptors */
2766 err
= igb_setup_all_rx_resources(adapter
);
2770 igb_power_up_link(adapter
);
2772 /* before we allocate an interrupt, we must be ready to handle it.
2773 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2774 * as soon as we call pci_request_irq, so we have to setup our
2775 * clean_rx handler before we do so.
2777 igb_configure(adapter
);
2779 err
= igb_request_irq(adapter
);
2783 /* Notify the stack of the actual queue counts. */
2784 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
2785 adapter
->num_tx_queues
);
2787 goto err_set_queues
;
2789 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
2790 adapter
->num_rx_queues
);
2792 goto err_set_queues
;
2794 /* From here on the code is the same as igb_up() */
2795 clear_bit(__IGB_DOWN
, &adapter
->state
);
2797 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
2798 napi_enable(&(adapter
->q_vector
[i
]->napi
));
2800 /* Clear any pending interrupts. */
2803 igb_irq_enable(adapter
);
2805 /* notify VFs that reset has been completed */
2806 if (adapter
->vfs_allocated_count
) {
2807 u32 reg_data
= rd32(E1000_CTRL_EXT
);
2808 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
2809 wr32(E1000_CTRL_EXT
, reg_data
);
2812 netif_tx_start_all_queues(netdev
);
2815 pm_runtime_put(&pdev
->dev
);
2817 /* start the watchdog. */
2818 hw
->mac
.get_link_status
= 1;
2819 schedule_work(&adapter
->watchdog_task
);
2824 igb_free_irq(adapter
);
2826 igb_release_hw_control(adapter
);
2827 igb_power_down_link(adapter
);
2828 igb_free_all_rx_resources(adapter
);
2830 igb_free_all_tx_resources(adapter
);
2834 pm_runtime_put(&pdev
->dev
);
2839 static int igb_open(struct net_device
*netdev
)
2841 return __igb_open(netdev
, false);
2845 * igb_close - Disables a network interface
2846 * @netdev: network interface device structure
2848 * Returns 0, this is not allowed to fail
2850 * The close entry point is called when an interface is de-activated
2851 * by the OS. The hardware is still under the driver's control, but
2852 * needs to be disabled. A global MAC reset is issued to stop the
2853 * hardware, and all transmit and receive resources are freed.
2855 static int __igb_close(struct net_device
*netdev
, bool suspending
)
2857 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2858 struct pci_dev
*pdev
= adapter
->pdev
;
2860 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
2863 pm_runtime_get_sync(&pdev
->dev
);
2866 igb_free_irq(adapter
);
2868 igb_free_all_tx_resources(adapter
);
2869 igb_free_all_rx_resources(adapter
);
2872 pm_runtime_put_sync(&pdev
->dev
);
2876 static int igb_close(struct net_device
*netdev
)
2878 return __igb_close(netdev
, false);
2882 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2883 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2885 * Return 0 on success, negative on failure
2887 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
2889 struct device
*dev
= tx_ring
->dev
;
2892 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
2894 tx_ring
->tx_buffer_info
= vzalloc(size
);
2895 if (!tx_ring
->tx_buffer_info
)
2898 /* round up to nearest 4K */
2899 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
2900 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2902 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
2903 &tx_ring
->dma
, GFP_KERNEL
);
2907 tx_ring
->next_to_use
= 0;
2908 tx_ring
->next_to_clean
= 0;
2913 vfree(tx_ring
->tx_buffer_info
);
2914 tx_ring
->tx_buffer_info
= NULL
;
2915 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
2920 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2921 * (Descriptors) for all queues
2922 * @adapter: board private structure
2924 * Return 0 on success, negative on failure
2926 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
2928 struct pci_dev
*pdev
= adapter
->pdev
;
2931 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2932 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
2935 "Allocation for Tx Queue %u failed\n", i
);
2936 for (i
--; i
>= 0; i
--)
2937 igb_free_tx_resources(adapter
->tx_ring
[i
]);
2946 * igb_setup_tctl - configure the transmit control registers
2947 * @adapter: Board private structure
2949 void igb_setup_tctl(struct igb_adapter
*adapter
)
2951 struct e1000_hw
*hw
= &adapter
->hw
;
2954 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2955 wr32(E1000_TXDCTL(0), 0);
2957 /* Program the Transmit Control Register */
2958 tctl
= rd32(E1000_TCTL
);
2959 tctl
&= ~E1000_TCTL_CT
;
2960 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
2961 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
2963 igb_config_collision_dist(hw
);
2965 /* Enable transmits */
2966 tctl
|= E1000_TCTL_EN
;
2968 wr32(E1000_TCTL
, tctl
);
2972 * igb_configure_tx_ring - Configure transmit ring after Reset
2973 * @adapter: board private structure
2974 * @ring: tx ring to configure
2976 * Configure a transmit ring after a reset.
2978 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
2979 struct igb_ring
*ring
)
2981 struct e1000_hw
*hw
= &adapter
->hw
;
2983 u64 tdba
= ring
->dma
;
2984 int reg_idx
= ring
->reg_idx
;
2986 /* disable the queue */
2987 wr32(E1000_TXDCTL(reg_idx
), 0);
2991 wr32(E1000_TDLEN(reg_idx
),
2992 ring
->count
* sizeof(union e1000_adv_tx_desc
));
2993 wr32(E1000_TDBAL(reg_idx
),
2994 tdba
& 0x00000000ffffffffULL
);
2995 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
2997 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
2998 wr32(E1000_TDH(reg_idx
), 0);
2999 writel(0, ring
->tail
);
3001 txdctl
|= IGB_TX_PTHRESH
;
3002 txdctl
|= IGB_TX_HTHRESH
<< 8;
3003 txdctl
|= IGB_TX_WTHRESH
<< 16;
3005 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3006 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3010 * igb_configure_tx - Configure transmit Unit after Reset
3011 * @adapter: board private structure
3013 * Configure the Tx unit of the MAC after a reset.
3015 static void igb_configure_tx(struct igb_adapter
*adapter
)
3019 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3020 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3024 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3025 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3027 * Returns 0 on success, negative on failure
3029 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3031 struct device
*dev
= rx_ring
->dev
;
3034 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3036 rx_ring
->rx_buffer_info
= vzalloc(size
);
3037 if (!rx_ring
->rx_buffer_info
)
3040 /* Round up to nearest 4K */
3041 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3042 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3044 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3045 &rx_ring
->dma
, GFP_KERNEL
);
3049 rx_ring
->next_to_alloc
= 0;
3050 rx_ring
->next_to_clean
= 0;
3051 rx_ring
->next_to_use
= 0;
3056 vfree(rx_ring
->rx_buffer_info
);
3057 rx_ring
->rx_buffer_info
= NULL
;
3058 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3063 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3064 * (Descriptors) for all queues
3065 * @adapter: board private structure
3067 * Return 0 on success, negative on failure
3069 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3071 struct pci_dev
*pdev
= adapter
->pdev
;
3074 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3075 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3078 "Allocation for Rx Queue %u failed\n", i
);
3079 for (i
--; i
>= 0; i
--)
3080 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3089 * igb_setup_mrqc - configure the multiple receive queue control registers
3090 * @adapter: Board private structure
3092 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3094 struct e1000_hw
*hw
= &adapter
->hw
;
3096 u32 j
, num_rx_queues
, shift
= 0;
3097 static const u32 rsskey
[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3098 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3099 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3102 /* Fill out hash function seeds */
3103 for (j
= 0; j
< 10; j
++)
3104 wr32(E1000_RSSRK(j
), rsskey
[j
]);
3106 num_rx_queues
= adapter
->rss_queues
;
3108 switch (hw
->mac
.type
) {
3113 /* 82576 supports 2 RSS queues for SR-IOV */
3114 if (adapter
->vfs_allocated_count
) {
3123 /* Populate the indirection table 4 entries at a time. To do this
3124 * we are generating the results for n and n+2 and then interleaving
3125 * those with the results with n+1 and n+3.
3127 for (j
= 0; j
< 32; j
++) {
3128 /* first pass generates n and n+2 */
3129 u32 base
= ((j
* 0x00040004) + 0x00020000) * num_rx_queues
;
3130 u32 reta
= (base
& 0x07800780) >> (7 - shift
);
3132 /* second pass generates n+1 and n+3 */
3133 base
+= 0x00010001 * num_rx_queues
;
3134 reta
|= (base
& 0x07800780) << (1 + shift
);
3136 wr32(E1000_RETA(j
), reta
);
3139 /* Disable raw packet checksumming so that RSS hash is placed in
3140 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3141 * offloads as they are enabled by default
3143 rxcsum
= rd32(E1000_RXCSUM
);
3144 rxcsum
|= E1000_RXCSUM_PCSD
;
3146 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3147 /* Enable Receive Checksum Offload for SCTP */
3148 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3150 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3151 wr32(E1000_RXCSUM
, rxcsum
);
3153 /* Generate RSS hash based on packet types, TCP/UDP
3154 * port numbers and/or IPv4/v6 src and dst addresses
3156 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3157 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3158 E1000_MRQC_RSS_FIELD_IPV6
|
3159 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3160 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3162 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3163 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3164 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3165 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3167 /* If VMDq is enabled then we set the appropriate mode for that, else
3168 * we default to RSS so that an RSS hash is calculated per packet even
3169 * if we are only using one queue
3171 if (adapter
->vfs_allocated_count
) {
3172 if (hw
->mac
.type
> e1000_82575
) {
3173 /* Set the default pool for the PF's first queue */
3174 u32 vtctl
= rd32(E1000_VT_CTL
);
3175 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3176 E1000_VT_CTL_DISABLE_DEF_POOL
);
3177 vtctl
|= adapter
->vfs_allocated_count
<<
3178 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3179 wr32(E1000_VT_CTL
, vtctl
);
3181 if (adapter
->rss_queues
> 1)
3182 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3184 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3186 if (hw
->mac
.type
!= e1000_i211
)
3187 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3189 igb_vmm_control(adapter
);
3191 wr32(E1000_MRQC
, mrqc
);
3195 * igb_setup_rctl - configure the receive control registers
3196 * @adapter: Board private structure
3198 void igb_setup_rctl(struct igb_adapter
*adapter
)
3200 struct e1000_hw
*hw
= &adapter
->hw
;
3203 rctl
= rd32(E1000_RCTL
);
3205 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3206 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3208 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3209 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3211 /* enable stripping of CRC. It's unlikely this will break BMC
3212 * redirection as it did with e1000. Newer features require
3213 * that the HW strips the CRC.
3215 rctl
|= E1000_RCTL_SECRC
;
3217 /* disable store bad packets and clear size bits. */
3218 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3220 /* enable LPE to prevent packets larger than max_frame_size */
3221 rctl
|= E1000_RCTL_LPE
;
3223 /* disable queue 0 to prevent tail write w/o re-config */
3224 wr32(E1000_RXDCTL(0), 0);
3226 /* Attention!!! For SR-IOV PF driver operations you must enable
3227 * queue drop for all VF and PF queues to prevent head of line blocking
3228 * if an un-trusted VF does not provide descriptors to hardware.
3230 if (adapter
->vfs_allocated_count
) {
3231 /* set all queue drop enable bits */
3232 wr32(E1000_QDE
, ALL_QUEUES
);
3235 /* This is useful for sniffing bad packets. */
3236 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3237 /* UPE and MPE will be handled by normal PROMISC logic
3238 * in e1000e_set_rx_mode
3240 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3241 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3242 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3244 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3245 E1000_RCTL_DPF
| /* Allow filtered pause */
3246 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3247 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3248 * and that breaks VLANs.
3252 wr32(E1000_RCTL
, rctl
);
3255 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3258 struct e1000_hw
*hw
= &adapter
->hw
;
3261 /* if it isn't the PF check to see if VFs are enabled and
3262 * increase the size to support vlan tags
3264 if (vfn
< adapter
->vfs_allocated_count
&&
3265 adapter
->vf_data
[vfn
].vlans_enabled
)
3266 size
+= VLAN_TAG_SIZE
;
3268 vmolr
= rd32(E1000_VMOLR(vfn
));
3269 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3270 vmolr
|= size
| E1000_VMOLR_LPE
;
3271 wr32(E1000_VMOLR(vfn
), vmolr
);
3277 * igb_rlpml_set - set maximum receive packet size
3278 * @adapter: board private structure
3280 * Configure maximum receivable packet size.
3282 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3284 u32 max_frame_size
= adapter
->max_frame_size
;
3285 struct e1000_hw
*hw
= &adapter
->hw
;
3286 u16 pf_id
= adapter
->vfs_allocated_count
;
3289 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3290 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3291 * to our max jumbo frame size, in case we need to enable
3292 * jumbo frames on one of the rings later.
3293 * This will not pass over-length frames into the default
3294 * queue because it's gated by the VMOLR.RLPML.
3296 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3299 wr32(E1000_RLPML
, max_frame_size
);
3302 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3305 struct e1000_hw
*hw
= &adapter
->hw
;
3308 /* This register exists only on 82576 and newer so if we are older then
3309 * we should exit and do nothing
3311 if (hw
->mac
.type
< e1000_82576
)
3314 vmolr
= rd32(E1000_VMOLR(vfn
));
3315 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3317 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3319 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3321 /* clear all bits that might not be set */
3322 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3324 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3325 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3326 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3329 if (vfn
<= adapter
->vfs_allocated_count
)
3330 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3332 wr32(E1000_VMOLR(vfn
), vmolr
);
3336 * igb_configure_rx_ring - Configure a receive ring after Reset
3337 * @adapter: board private structure
3338 * @ring: receive ring to be configured
3340 * Configure the Rx unit of the MAC after a reset.
3342 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3343 struct igb_ring
*ring
)
3345 struct e1000_hw
*hw
= &adapter
->hw
;
3346 u64 rdba
= ring
->dma
;
3347 int reg_idx
= ring
->reg_idx
;
3348 u32 srrctl
= 0, rxdctl
= 0;
3350 /* disable the queue */
3351 wr32(E1000_RXDCTL(reg_idx
), 0);
3353 /* Set DMA base address registers */
3354 wr32(E1000_RDBAL(reg_idx
),
3355 rdba
& 0x00000000ffffffffULL
);
3356 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3357 wr32(E1000_RDLEN(reg_idx
),
3358 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3360 /* initialize head and tail */
3361 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3362 wr32(E1000_RDH(reg_idx
), 0);
3363 writel(0, ring
->tail
);
3365 /* set descriptor configuration */
3366 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3367 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3368 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3369 if (hw
->mac
.type
>= e1000_82580
)
3370 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3371 /* Only set Drop Enable if we are supporting multiple queues */
3372 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3373 srrctl
|= E1000_SRRCTL_DROP_EN
;
3375 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3377 /* set filtering for VMDQ pools */
3378 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3380 rxdctl
|= IGB_RX_PTHRESH
;
3381 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3382 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3384 /* enable receive descriptor fetching */
3385 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3386 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3390 * igb_configure_rx - Configure receive Unit after Reset
3391 * @adapter: board private structure
3393 * Configure the Rx unit of the MAC after a reset.
3395 static void igb_configure_rx(struct igb_adapter
*adapter
)
3399 /* set UTA to appropriate mode */
3400 igb_set_uta(adapter
);
3402 /* set the correct pool for the PF default MAC address in entry 0 */
3403 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3404 adapter
->vfs_allocated_count
);
3406 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3407 * the Base and Length of the Rx Descriptor Ring
3409 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3410 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3414 * igb_free_tx_resources - Free Tx Resources per Queue
3415 * @tx_ring: Tx descriptor ring for a specific queue
3417 * Free all transmit software resources
3419 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3421 igb_clean_tx_ring(tx_ring
);
3423 vfree(tx_ring
->tx_buffer_info
);
3424 tx_ring
->tx_buffer_info
= NULL
;
3426 /* if not set, then don't free */
3430 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3431 tx_ring
->desc
, tx_ring
->dma
);
3433 tx_ring
->desc
= NULL
;
3437 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3438 * @adapter: board private structure
3440 * Free all transmit software resources
3442 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3446 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3447 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3450 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3451 struct igb_tx_buffer
*tx_buffer
)
3453 if (tx_buffer
->skb
) {
3454 dev_kfree_skb_any(tx_buffer
->skb
);
3455 if (dma_unmap_len(tx_buffer
, len
))
3456 dma_unmap_single(ring
->dev
,
3457 dma_unmap_addr(tx_buffer
, dma
),
3458 dma_unmap_len(tx_buffer
, len
),
3460 } else if (dma_unmap_len(tx_buffer
, len
)) {
3461 dma_unmap_page(ring
->dev
,
3462 dma_unmap_addr(tx_buffer
, dma
),
3463 dma_unmap_len(tx_buffer
, len
),
3466 tx_buffer
->next_to_watch
= NULL
;
3467 tx_buffer
->skb
= NULL
;
3468 dma_unmap_len_set(tx_buffer
, len
, 0);
3469 /* buffer_info must be completely set up in the transmit path */
3473 * igb_clean_tx_ring - Free Tx Buffers
3474 * @tx_ring: ring to be cleaned
3476 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3478 struct igb_tx_buffer
*buffer_info
;
3482 if (!tx_ring
->tx_buffer_info
)
3484 /* Free all the Tx ring sk_buffs */
3486 for (i
= 0; i
< tx_ring
->count
; i
++) {
3487 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3488 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3491 netdev_tx_reset_queue(txring_txq(tx_ring
));
3493 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3494 memset(tx_ring
->tx_buffer_info
, 0, size
);
3496 /* Zero out the descriptor ring */
3497 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3499 tx_ring
->next_to_use
= 0;
3500 tx_ring
->next_to_clean
= 0;
3504 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3505 * @adapter: board private structure
3507 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3511 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3512 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3516 * igb_free_rx_resources - Free Rx Resources
3517 * @rx_ring: ring to clean the resources from
3519 * Free all receive software resources
3521 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3523 igb_clean_rx_ring(rx_ring
);
3525 vfree(rx_ring
->rx_buffer_info
);
3526 rx_ring
->rx_buffer_info
= NULL
;
3528 /* if not set, then don't free */
3532 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3533 rx_ring
->desc
, rx_ring
->dma
);
3535 rx_ring
->desc
= NULL
;
3539 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3540 * @adapter: board private structure
3542 * Free all receive software resources
3544 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3548 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3549 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3553 * igb_clean_rx_ring - Free Rx Buffers per Queue
3554 * @rx_ring: ring to free buffers from
3556 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3562 dev_kfree_skb(rx_ring
->skb
);
3563 rx_ring
->skb
= NULL
;
3565 if (!rx_ring
->rx_buffer_info
)
3568 /* Free all the Rx ring sk_buffs */
3569 for (i
= 0; i
< rx_ring
->count
; i
++) {
3570 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3572 if (!buffer_info
->page
)
3575 dma_unmap_page(rx_ring
->dev
,
3579 __free_page(buffer_info
->page
);
3581 buffer_info
->page
= NULL
;
3584 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3585 memset(rx_ring
->rx_buffer_info
, 0, size
);
3587 /* Zero out the descriptor ring */
3588 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3590 rx_ring
->next_to_alloc
= 0;
3591 rx_ring
->next_to_clean
= 0;
3592 rx_ring
->next_to_use
= 0;
3596 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3597 * @adapter: board private structure
3599 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3603 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3604 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3608 * igb_set_mac - Change the Ethernet Address of the NIC
3609 * @netdev: network interface device structure
3610 * @p: pointer to an address structure
3612 * Returns 0 on success, negative on failure
3614 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3616 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3617 struct e1000_hw
*hw
= &adapter
->hw
;
3618 struct sockaddr
*addr
= p
;
3620 if (!is_valid_ether_addr(addr
->sa_data
))
3621 return -EADDRNOTAVAIL
;
3623 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3624 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3626 /* set the correct pool for the new PF MAC address in entry 0 */
3627 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3628 adapter
->vfs_allocated_count
);
3634 * igb_write_mc_addr_list - write multicast addresses to MTA
3635 * @netdev: network interface device structure
3637 * Writes multicast address list to the MTA hash table.
3638 * Returns: -ENOMEM on failure
3639 * 0 on no addresses written
3640 * X on writing X addresses to MTA
3642 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3644 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3645 struct e1000_hw
*hw
= &adapter
->hw
;
3646 struct netdev_hw_addr
*ha
;
3650 if (netdev_mc_empty(netdev
)) {
3651 /* nothing to program, so clear mc list */
3652 igb_update_mc_addr_list(hw
, NULL
, 0);
3653 igb_restore_vf_multicasts(adapter
);
3657 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3661 /* The shared function expects a packed array of only addresses. */
3663 netdev_for_each_mc_addr(ha
, netdev
)
3664 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3666 igb_update_mc_addr_list(hw
, mta_list
, i
);
3669 return netdev_mc_count(netdev
);
3673 * igb_write_uc_addr_list - write unicast addresses to RAR table
3674 * @netdev: network interface device structure
3676 * Writes unicast address list to the RAR table.
3677 * Returns: -ENOMEM on failure/insufficient address space
3678 * 0 on no addresses written
3679 * X on writing X addresses to the RAR table
3681 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3683 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3684 struct e1000_hw
*hw
= &adapter
->hw
;
3685 unsigned int vfn
= adapter
->vfs_allocated_count
;
3686 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3689 /* return ENOMEM indicating insufficient memory for addresses */
3690 if (netdev_uc_count(netdev
) > rar_entries
)
3693 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3694 struct netdev_hw_addr
*ha
;
3696 netdev_for_each_uc_addr(ha
, netdev
) {
3699 igb_rar_set_qsel(adapter
, ha
->addr
,
3705 /* write the addresses in reverse order to avoid write combining */
3706 for (; rar_entries
> 0 ; rar_entries
--) {
3707 wr32(E1000_RAH(rar_entries
), 0);
3708 wr32(E1000_RAL(rar_entries
), 0);
3716 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3717 * @netdev: network interface device structure
3719 * The set_rx_mode entry point is called whenever the unicast or multicast
3720 * address lists or the network interface flags are updated. This routine is
3721 * responsible for configuring the hardware for proper unicast, multicast,
3722 * promiscuous mode, and all-multi behavior.
3724 static void igb_set_rx_mode(struct net_device
*netdev
)
3726 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3727 struct e1000_hw
*hw
= &adapter
->hw
;
3728 unsigned int vfn
= adapter
->vfs_allocated_count
;
3729 u32 rctl
, vmolr
= 0;
3732 /* Check for Promiscuous and All Multicast modes */
3733 rctl
= rd32(E1000_RCTL
);
3735 /* clear the effected bits */
3736 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
3738 if (netdev
->flags
& IFF_PROMISC
) {
3739 u32 mrqc
= rd32(E1000_MRQC
);
3740 /* retain VLAN HW filtering if in VT mode */
3741 if (mrqc
& E1000_MRQC_ENABLE_VMDQ
)
3742 rctl
|= E1000_RCTL_VFE
;
3743 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
3744 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
3746 if (netdev
->flags
& IFF_ALLMULTI
) {
3747 rctl
|= E1000_RCTL_MPE
;
3748 vmolr
|= E1000_VMOLR_MPME
;
3750 /* Write addresses to the MTA, if the attempt fails
3751 * then we should just turn on promiscuous mode so
3752 * that we can at least receive multicast traffic
3754 count
= igb_write_mc_addr_list(netdev
);
3756 rctl
|= E1000_RCTL_MPE
;
3757 vmolr
|= E1000_VMOLR_MPME
;
3759 vmolr
|= E1000_VMOLR_ROMPE
;
3762 /* Write addresses to available RAR registers, if there is not
3763 * sufficient space to store all the addresses then enable
3764 * unicast promiscuous mode
3766 count
= igb_write_uc_addr_list(netdev
);
3768 rctl
|= E1000_RCTL_UPE
;
3769 vmolr
|= E1000_VMOLR_ROPE
;
3771 rctl
|= E1000_RCTL_VFE
;
3773 wr32(E1000_RCTL
, rctl
);
3775 /* In order to support SR-IOV and eventually VMDq it is necessary to set
3776 * the VMOLR to enable the appropriate modes. Without this workaround
3777 * we will have issues with VLAN tag stripping not being done for frames
3778 * that are only arriving because we are the default pool
3780 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
3783 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
3784 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
3785 wr32(E1000_VMOLR(vfn
), vmolr
);
3786 igb_restore_vf_multicasts(adapter
);
3789 static void igb_check_wvbr(struct igb_adapter
*adapter
)
3791 struct e1000_hw
*hw
= &adapter
->hw
;
3794 switch (hw
->mac
.type
) {
3797 if (!(wvbr
= rd32(E1000_WVBR
)))
3804 adapter
->wvbr
|= wvbr
;
3807 #define IGB_STAGGERED_QUEUE_OFFSET 8
3809 static void igb_spoof_check(struct igb_adapter
*adapter
)
3816 for(j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
3817 if (adapter
->wvbr
& (1 << j
) ||
3818 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
3819 dev_warn(&adapter
->pdev
->dev
,
3820 "Spoof event(s) detected on VF %d\n", j
);
3823 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
3828 /* Need to wait a few seconds after link up to get diagnostic information from
3831 static void igb_update_phy_info(unsigned long data
)
3833 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
3834 igb_get_phy_info(&adapter
->hw
);
3838 * igb_has_link - check shared code for link and determine up/down
3839 * @adapter: pointer to driver private info
3841 bool igb_has_link(struct igb_adapter
*adapter
)
3843 struct e1000_hw
*hw
= &adapter
->hw
;
3844 bool link_active
= false;
3847 /* get_link_status is set on LSC (link status) interrupt or
3848 * rx sequence error interrupt. get_link_status will stay
3849 * false until the e1000_check_for_link establishes link
3850 * for copper adapters ONLY
3852 switch (hw
->phy
.media_type
) {
3853 case e1000_media_type_copper
:
3854 if (hw
->mac
.get_link_status
) {
3855 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
3856 link_active
= !hw
->mac
.get_link_status
;
3861 case e1000_media_type_internal_serdes
:
3862 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
3863 link_active
= hw
->mac
.serdes_has_link
;
3866 case e1000_media_type_unknown
:
3873 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
3876 u32 ctrl_ext
, thstat
;
3878 /* check for thermal sensor event on i350 copper only */
3879 if (hw
->mac
.type
== e1000_i350
) {
3880 thstat
= rd32(E1000_THSTAT
);
3881 ctrl_ext
= rd32(E1000_CTRL_EXT
);
3883 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
3884 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
3885 ret
= !!(thstat
& event
);
3892 * igb_watchdog - Timer Call-back
3893 * @data: pointer to adapter cast into an unsigned long
3895 static void igb_watchdog(unsigned long data
)
3897 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
3898 /* Do the rest outside of interrupt context */
3899 schedule_work(&adapter
->watchdog_task
);
3902 static void igb_watchdog_task(struct work_struct
*work
)
3904 struct igb_adapter
*adapter
= container_of(work
,
3907 struct e1000_hw
*hw
= &adapter
->hw
;
3908 struct e1000_phy_info
*phy
= &hw
->phy
;
3909 struct net_device
*netdev
= adapter
->netdev
;
3913 link
= igb_has_link(adapter
);
3915 /* Cancel scheduled suspend requests. */
3916 pm_runtime_resume(netdev
->dev
.parent
);
3918 if (!netif_carrier_ok(netdev
)) {
3920 hw
->mac
.ops
.get_speed_and_duplex(hw
,
3921 &adapter
->link_speed
,
3922 &adapter
->link_duplex
);
3924 ctrl
= rd32(E1000_CTRL
);
3925 /* Links status message must follow this format */
3926 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s "
3927 "Duplex, Flow Control: %s\n",
3929 adapter
->link_speed
,
3930 adapter
->link_duplex
== FULL_DUPLEX
?
3932 (ctrl
& E1000_CTRL_TFCE
) &&
3933 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
3934 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
3935 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
3937 /* check if SmartSpeed worked */
3938 igb_check_downshift(hw
);
3939 if (phy
->speed_downgraded
)
3940 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
3942 /* check for thermal sensor event */
3943 if (igb_thermal_sensor_event(hw
,
3944 E1000_THSTAT_LINK_THROTTLE
)) {
3945 netdev_info(netdev
, "The network adapter link "
3946 "speed was downshifted because it "
3950 /* adjust timeout factor according to speed/duplex */
3951 adapter
->tx_timeout_factor
= 1;
3952 switch (adapter
->link_speed
) {
3954 adapter
->tx_timeout_factor
= 14;
3957 /* maybe add some timeout factor ? */
3961 netif_carrier_on(netdev
);
3963 igb_ping_all_vfs(adapter
);
3964 igb_check_vf_rate_limit(adapter
);
3966 /* link state has changed, schedule phy info update */
3967 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3968 mod_timer(&adapter
->phy_info_timer
,
3969 round_jiffies(jiffies
+ 2 * HZ
));
3972 if (netif_carrier_ok(netdev
)) {
3973 adapter
->link_speed
= 0;
3974 adapter
->link_duplex
= 0;
3976 /* check for thermal sensor event */
3977 if (igb_thermal_sensor_event(hw
,
3978 E1000_THSTAT_PWR_DOWN
)) {
3979 netdev_err(netdev
, "The network adapter was "
3980 "stopped because it overheated\n");
3983 /* Links status message must follow this format */
3984 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
3986 netif_carrier_off(netdev
);
3988 igb_ping_all_vfs(adapter
);
3990 /* link state has changed, schedule phy info update */
3991 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3992 mod_timer(&adapter
->phy_info_timer
,
3993 round_jiffies(jiffies
+ 2 * HZ
));
3995 pm_schedule_suspend(netdev
->dev
.parent
,
4000 spin_lock(&adapter
->stats64_lock
);
4001 igb_update_stats(adapter
, &adapter
->stats64
);
4002 spin_unlock(&adapter
->stats64_lock
);
4004 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4005 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4006 if (!netif_carrier_ok(netdev
)) {
4007 /* We've lost link, so the controller stops DMA,
4008 * but we've got queued Tx work that's never going
4009 * to get done, so reset controller to flush Tx.
4010 * (Do the reset outside of interrupt context).
4012 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4013 adapter
->tx_timeout_count
++;
4014 schedule_work(&adapter
->reset_task
);
4015 /* return immediately since reset is imminent */
4020 /* Force detection of hung controller every watchdog period */
4021 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4024 /* Cause software interrupt to ensure Rx ring is cleaned */
4025 if (adapter
->msix_entries
) {
4027 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4028 eics
|= adapter
->q_vector
[i
]->eims_value
;
4029 wr32(E1000_EICS
, eics
);
4031 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4034 igb_spoof_check(adapter
);
4035 igb_ptp_rx_hang(adapter
);
4037 /* Reset the timer */
4038 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4039 mod_timer(&adapter
->watchdog_timer
,
4040 round_jiffies(jiffies
+ 2 * HZ
));
4043 enum latency_range
{
4047 latency_invalid
= 255
4051 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4052 * @q_vector: pointer to q_vector
4054 * Stores a new ITR value based on strictly on packet size. This
4055 * algorithm is less sophisticated than that used in igb_update_itr,
4056 * due to the difficulty of synchronizing statistics across multiple
4057 * receive rings. The divisors and thresholds used by this function
4058 * were determined based on theoretical maximum wire speed and testing
4059 * data, in order to minimize response time while increasing bulk
4061 * This functionality is controlled by the InterruptThrottleRate module
4062 * parameter (see igb_param.c)
4063 * NOTE: This function is called only when operating in a multiqueue
4064 * receive environment.
4066 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4068 int new_val
= q_vector
->itr_val
;
4069 int avg_wire_size
= 0;
4070 struct igb_adapter
*adapter
= q_vector
->adapter
;
4071 unsigned int packets
;
4073 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4074 * ints/sec - ITR timer value of 120 ticks.
4076 if (adapter
->link_speed
!= SPEED_1000
) {
4077 new_val
= IGB_4K_ITR
;
4081 packets
= q_vector
->rx
.total_packets
;
4083 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4085 packets
= q_vector
->tx
.total_packets
;
4087 avg_wire_size
= max_t(u32
, avg_wire_size
,
4088 q_vector
->tx
.total_bytes
/ packets
);
4090 /* if avg_wire_size isn't set no work was done */
4094 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4095 avg_wire_size
+= 24;
4097 /* Don't starve jumbo frames */
4098 avg_wire_size
= min(avg_wire_size
, 3000);
4100 /* Give a little boost to mid-size frames */
4101 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4102 new_val
= avg_wire_size
/ 3;
4104 new_val
= avg_wire_size
/ 2;
4106 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4107 if (new_val
< IGB_20K_ITR
&&
4108 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4109 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4110 new_val
= IGB_20K_ITR
;
4113 if (new_val
!= q_vector
->itr_val
) {
4114 q_vector
->itr_val
= new_val
;
4115 q_vector
->set_itr
= 1;
4118 q_vector
->rx
.total_bytes
= 0;
4119 q_vector
->rx
.total_packets
= 0;
4120 q_vector
->tx
.total_bytes
= 0;
4121 q_vector
->tx
.total_packets
= 0;
4125 * igb_update_itr - update the dynamic ITR value based on statistics
4126 * @q_vector: pointer to q_vector
4127 * @ring_container: ring info to update the itr for
4129 * Stores a new ITR value based on packets and byte
4130 * counts during the last interrupt. The advantage of per interrupt
4131 * computation is faster updates and more accurate ITR for the current
4132 * traffic pattern. Constants in this function were computed
4133 * based on theoretical maximum wire speed and thresholds were set based
4134 * on testing data as well as attempting to minimize response time
4135 * while increasing bulk throughput.
4136 * this functionality is controlled by the InterruptThrottleRate module
4137 * parameter (see igb_param.c)
4138 * NOTE: These calculations are only valid when operating in a single-
4139 * queue environment.
4141 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4142 struct igb_ring_container
*ring_container
)
4144 unsigned int packets
= ring_container
->total_packets
;
4145 unsigned int bytes
= ring_container
->total_bytes
;
4146 u8 itrval
= ring_container
->itr
;
4148 /* no packets, exit with status unchanged */
4153 case lowest_latency
:
4154 /* handle TSO and jumbo frames */
4155 if (bytes
/packets
> 8000)
4156 itrval
= bulk_latency
;
4157 else if ((packets
< 5) && (bytes
> 512))
4158 itrval
= low_latency
;
4160 case low_latency
: /* 50 usec aka 20000 ints/s */
4161 if (bytes
> 10000) {
4162 /* this if handles the TSO accounting */
4163 if (bytes
/packets
> 8000) {
4164 itrval
= bulk_latency
;
4165 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
4166 itrval
= bulk_latency
;
4167 } else if ((packets
> 35)) {
4168 itrval
= lowest_latency
;
4170 } else if (bytes
/packets
> 2000) {
4171 itrval
= bulk_latency
;
4172 } else if (packets
<= 2 && bytes
< 512) {
4173 itrval
= lowest_latency
;
4176 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4177 if (bytes
> 25000) {
4179 itrval
= low_latency
;
4180 } else if (bytes
< 1500) {
4181 itrval
= low_latency
;
4186 /* clear work counters since we have the values we need */
4187 ring_container
->total_bytes
= 0;
4188 ring_container
->total_packets
= 0;
4190 /* write updated itr to ring container */
4191 ring_container
->itr
= itrval
;
4194 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4196 struct igb_adapter
*adapter
= q_vector
->adapter
;
4197 u32 new_itr
= q_vector
->itr_val
;
4200 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4201 if (adapter
->link_speed
!= SPEED_1000
) {
4203 new_itr
= IGB_4K_ITR
;
4207 igb_update_itr(q_vector
, &q_vector
->tx
);
4208 igb_update_itr(q_vector
, &q_vector
->rx
);
4210 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4212 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4213 if (current_itr
== lowest_latency
&&
4214 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4215 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4216 current_itr
= low_latency
;
4218 switch (current_itr
) {
4219 /* counts and packets in update_itr are dependent on these numbers */
4220 case lowest_latency
:
4221 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4224 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4227 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4234 if (new_itr
!= q_vector
->itr_val
) {
4235 /* this attempts to bias the interrupt rate towards Bulk
4236 * by adding intermediate steps when interrupt rate is
4239 new_itr
= new_itr
> q_vector
->itr_val
?
4240 max((new_itr
* q_vector
->itr_val
) /
4241 (new_itr
+ (q_vector
->itr_val
>> 2)),
4243 /* Don't write the value here; it resets the adapter's
4244 * internal timer, and causes us to delay far longer than
4245 * we should between interrupts. Instead, we write the ITR
4246 * value at the beginning of the next interrupt so the timing
4247 * ends up being correct.
4249 q_vector
->itr_val
= new_itr
;
4250 q_vector
->set_itr
= 1;
4254 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4255 u32 type_tucmd
, u32 mss_l4len_idx
)
4257 struct e1000_adv_tx_context_desc
*context_desc
;
4258 u16 i
= tx_ring
->next_to_use
;
4260 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4263 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4265 /* set bits to identify this as an advanced context descriptor */
4266 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4268 /* For 82575, context index must be unique per ring. */
4269 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4270 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4272 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4273 context_desc
->seqnum_seed
= 0;
4274 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4275 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4278 static int igb_tso(struct igb_ring
*tx_ring
,
4279 struct igb_tx_buffer
*first
,
4282 struct sk_buff
*skb
= first
->skb
;
4283 u32 vlan_macip_lens
, type_tucmd
;
4284 u32 mss_l4len_idx
, l4len
;
4286 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4289 if (!skb_is_gso(skb
))
4292 if (skb_header_cloned(skb
)) {
4293 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4298 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4299 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4301 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
4302 struct iphdr
*iph
= ip_hdr(skb
);
4305 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4309 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4310 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4313 } else if (skb_is_gso_v6(skb
)) {
4314 ipv6_hdr(skb
)->payload_len
= 0;
4315 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4316 &ipv6_hdr(skb
)->daddr
,
4318 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4322 /* compute header lengths */
4323 l4len
= tcp_hdrlen(skb
);
4324 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4326 /* update gso size and bytecount with header size */
4327 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4328 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4331 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4332 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4334 /* VLAN MACLEN IPLEN */
4335 vlan_macip_lens
= skb_network_header_len(skb
);
4336 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4337 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4339 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4344 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4346 struct sk_buff
*skb
= first
->skb
;
4347 u32 vlan_macip_lens
= 0;
4348 u32 mss_l4len_idx
= 0;
4351 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4352 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4356 switch (first
->protocol
) {
4357 case __constant_htons(ETH_P_IP
):
4358 vlan_macip_lens
|= skb_network_header_len(skb
);
4359 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4360 l4_hdr
= ip_hdr(skb
)->protocol
;
4362 case __constant_htons(ETH_P_IPV6
):
4363 vlan_macip_lens
|= skb_network_header_len(skb
);
4364 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4367 if (unlikely(net_ratelimit())) {
4368 dev_warn(tx_ring
->dev
,
4369 "partial checksum but proto=%x!\n",
4377 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4378 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4379 E1000_ADVTXD_L4LEN_SHIFT
;
4382 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4383 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4384 E1000_ADVTXD_L4LEN_SHIFT
;
4387 mss_l4len_idx
= sizeof(struct udphdr
) <<
4388 E1000_ADVTXD_L4LEN_SHIFT
;
4391 if (unlikely(net_ratelimit())) {
4392 dev_warn(tx_ring
->dev
,
4393 "partial checksum but l4 proto=%x!\n",
4399 /* update TX checksum flag */
4400 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4403 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4404 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4406 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4409 #define IGB_SET_FLAG(_input, _flag, _result) \
4410 ((_flag <= _result) ? \
4411 ((u32)(_input & _flag) * (_result / _flag)) : \
4412 ((u32)(_input & _flag) / (_flag / _result)))
4414 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4416 /* set type for advanced descriptor with frame checksum insertion */
4417 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4418 E1000_ADVTXD_DCMD_DEXT
|
4419 E1000_ADVTXD_DCMD_IFCS
;
4421 /* set HW vlan bit if vlan is present */
4422 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4423 (E1000_ADVTXD_DCMD_VLE
));
4425 /* set segmentation bits for TSO */
4426 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4427 (E1000_ADVTXD_DCMD_TSE
));
4429 /* set timestamp bit if present */
4430 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4431 (E1000_ADVTXD_MAC_TSTAMP
));
4433 /* insert frame checksum */
4434 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4439 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4440 union e1000_adv_tx_desc
*tx_desc
,
4441 u32 tx_flags
, unsigned int paylen
)
4443 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4445 /* 82575 requires a unique index per ring */
4446 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4447 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4449 /* insert L4 checksum */
4450 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4452 (E1000_TXD_POPTS_TXSM
<< 8));
4454 /* insert IPv4 checksum */
4455 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4457 (E1000_TXD_POPTS_IXSM
<< 8));
4459 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4462 static void igb_tx_map(struct igb_ring
*tx_ring
,
4463 struct igb_tx_buffer
*first
,
4466 struct sk_buff
*skb
= first
->skb
;
4467 struct igb_tx_buffer
*tx_buffer
;
4468 union e1000_adv_tx_desc
*tx_desc
;
4469 struct skb_frag_struct
*frag
;
4471 unsigned int data_len
, size
;
4472 u32 tx_flags
= first
->tx_flags
;
4473 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4474 u16 i
= tx_ring
->next_to_use
;
4476 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4478 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4480 size
= skb_headlen(skb
);
4481 data_len
= skb
->data_len
;
4483 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4487 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4488 if (dma_mapping_error(tx_ring
->dev
, dma
))
4491 /* record length, and DMA address */
4492 dma_unmap_len_set(tx_buffer
, len
, size
);
4493 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4495 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4497 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4498 tx_desc
->read
.cmd_type_len
=
4499 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4503 if (i
== tx_ring
->count
) {
4504 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4507 tx_desc
->read
.olinfo_status
= 0;
4509 dma
+= IGB_MAX_DATA_PER_TXD
;
4510 size
-= IGB_MAX_DATA_PER_TXD
;
4512 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4515 if (likely(!data_len
))
4518 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4522 if (i
== tx_ring
->count
) {
4523 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4526 tx_desc
->read
.olinfo_status
= 0;
4528 size
= skb_frag_size(frag
);
4531 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4532 size
, DMA_TO_DEVICE
);
4534 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4537 /* write last descriptor with RS and EOP bits */
4538 cmd_type
|= size
| IGB_TXD_DCMD
;
4539 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4541 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4543 /* set the timestamp */
4544 first
->time_stamp
= jiffies
;
4546 /* Force memory writes to complete before letting h/w know there
4547 * are new descriptors to fetch. (Only applicable for weak-ordered
4548 * memory model archs, such as IA-64).
4550 * We also need this memory barrier to make certain all of the
4551 * status bits have been updated before next_to_watch is written.
4555 /* set next_to_watch value indicating a packet is present */
4556 first
->next_to_watch
= tx_desc
;
4559 if (i
== tx_ring
->count
)
4562 tx_ring
->next_to_use
= i
;
4564 writel(i
, tx_ring
->tail
);
4566 /* we need this if more than one processor can write to our tail
4567 * at a time, it synchronizes IO on IA64/Altix systems
4574 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4576 /* clear dma mappings for failed tx_buffer_info map */
4578 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4579 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4580 if (tx_buffer
== first
)
4587 tx_ring
->next_to_use
= i
;
4590 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4592 struct net_device
*netdev
= tx_ring
->netdev
;
4594 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4596 /* Herbert's original patch had:
4597 * smp_mb__after_netif_stop_queue();
4598 * but since that doesn't exist yet, just open code it.
4602 /* We need to check again in a case another CPU has just
4603 * made room available.
4605 if (igb_desc_unused(tx_ring
) < size
)
4609 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4611 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4612 tx_ring
->tx_stats
.restart_queue2
++;
4613 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4618 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4620 if (igb_desc_unused(tx_ring
) >= size
)
4622 return __igb_maybe_stop_tx(tx_ring
, size
);
4625 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4626 struct igb_ring
*tx_ring
)
4628 struct igb_tx_buffer
*first
;
4631 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4632 __be16 protocol
= vlan_get_protocol(skb
);
4635 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4636 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4637 * + 2 desc gap to keep tail from touching head,
4638 * + 1 desc for context descriptor,
4639 * otherwise try next time
4641 if (NETDEV_FRAG_PAGE_MAX_SIZE
> IGB_MAX_DATA_PER_TXD
) {
4643 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4644 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4646 count
+= skb_shinfo(skb
)->nr_frags
;
4649 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
4650 /* this is a hard error */
4651 return NETDEV_TX_BUSY
;
4654 /* record the location of the first descriptor for this packet */
4655 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
4657 first
->bytecount
= skb
->len
;
4658 first
->gso_segs
= 1;
4660 skb_tx_timestamp(skb
);
4662 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
4663 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
4665 if (!(adapter
->ptp_tx_skb
)) {
4666 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
4667 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
4669 adapter
->ptp_tx_skb
= skb_get(skb
);
4670 adapter
->ptp_tx_start
= jiffies
;
4671 if (adapter
->hw
.mac
.type
== e1000_82576
)
4672 schedule_work(&adapter
->ptp_tx_work
);
4676 if (vlan_tx_tag_present(skb
)) {
4677 tx_flags
|= IGB_TX_FLAGS_VLAN
;
4678 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
4681 /* record initial flags and protocol */
4682 first
->tx_flags
= tx_flags
;
4683 first
->protocol
= protocol
;
4685 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
4689 igb_tx_csum(tx_ring
, first
);
4691 igb_tx_map(tx_ring
, first
, hdr_len
);
4693 /* Make sure there is space in the ring for the next send. */
4694 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
4696 return NETDEV_TX_OK
;
4699 igb_unmap_and_free_tx_resource(tx_ring
, first
);
4701 return NETDEV_TX_OK
;
4704 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
4705 struct sk_buff
*skb
)
4707 unsigned int r_idx
= skb
->queue_mapping
;
4709 if (r_idx
>= adapter
->num_tx_queues
)
4710 r_idx
= r_idx
% adapter
->num_tx_queues
;
4712 return adapter
->tx_ring
[r_idx
];
4715 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
4716 struct net_device
*netdev
)
4718 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4720 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
4721 dev_kfree_skb_any(skb
);
4722 return NETDEV_TX_OK
;
4725 if (skb
->len
<= 0) {
4726 dev_kfree_skb_any(skb
);
4727 return NETDEV_TX_OK
;
4730 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
4731 * in order to meet this minimum size requirement.
4733 if (unlikely(skb
->len
< 17)) {
4734 if (skb_pad(skb
, 17 - skb
->len
))
4735 return NETDEV_TX_OK
;
4737 skb_set_tail_pointer(skb
, 17);
4740 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
4744 * igb_tx_timeout - Respond to a Tx Hang
4745 * @netdev: network interface device structure
4747 static void igb_tx_timeout(struct net_device
*netdev
)
4749 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4750 struct e1000_hw
*hw
= &adapter
->hw
;
4752 /* Do the reset outside of interrupt context */
4753 adapter
->tx_timeout_count
++;
4755 if (hw
->mac
.type
>= e1000_82580
)
4756 hw
->dev_spec
._82575
.global_device_reset
= true;
4758 schedule_work(&adapter
->reset_task
);
4760 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
4763 static void igb_reset_task(struct work_struct
*work
)
4765 struct igb_adapter
*adapter
;
4766 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
4769 netdev_err(adapter
->netdev
, "Reset adapter\n");
4770 igb_reinit_locked(adapter
);
4774 * igb_get_stats64 - Get System Network Statistics
4775 * @netdev: network interface device structure
4776 * @stats: rtnl_link_stats64 pointer
4778 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
4779 struct rtnl_link_stats64
*stats
)
4781 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4783 spin_lock(&adapter
->stats64_lock
);
4784 igb_update_stats(adapter
, &adapter
->stats64
);
4785 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
4786 spin_unlock(&adapter
->stats64_lock
);
4792 * igb_change_mtu - Change the Maximum Transfer Unit
4793 * @netdev: network interface device structure
4794 * @new_mtu: new value for maximum frame size
4796 * Returns 0 on success, negative on failure
4798 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
4800 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4801 struct pci_dev
*pdev
= adapter
->pdev
;
4802 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
4804 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
4805 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
4809 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4810 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
4811 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
4815 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
4818 /* igb_down has a dependency on max_frame_size */
4819 adapter
->max_frame_size
= max_frame
;
4821 if (netif_running(netdev
))
4824 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
4825 netdev
->mtu
, new_mtu
);
4826 netdev
->mtu
= new_mtu
;
4828 if (netif_running(netdev
))
4833 clear_bit(__IGB_RESETTING
, &adapter
->state
);
4839 * igb_update_stats - Update the board statistics counters
4840 * @adapter: board private structure
4842 void igb_update_stats(struct igb_adapter
*adapter
,
4843 struct rtnl_link_stats64
*net_stats
)
4845 struct e1000_hw
*hw
= &adapter
->hw
;
4846 struct pci_dev
*pdev
= adapter
->pdev
;
4852 u64 _bytes
, _packets
;
4854 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4856 /* Prevent stats update while adapter is being reset, or if the pci
4857 * connection is down.
4859 if (adapter
->link_speed
== 0)
4861 if (pci_channel_offline(pdev
))
4866 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4867 u32 rqdpc
= rd32(E1000_RQDPC(i
));
4868 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
4871 ring
->rx_stats
.drops
+= rqdpc
;
4872 net_stats
->rx_fifo_errors
+= rqdpc
;
4876 start
= u64_stats_fetch_begin_bh(&ring
->rx_syncp
);
4877 _bytes
= ring
->rx_stats
.bytes
;
4878 _packets
= ring
->rx_stats
.packets
;
4879 } while (u64_stats_fetch_retry_bh(&ring
->rx_syncp
, start
));
4881 packets
+= _packets
;
4884 net_stats
->rx_bytes
= bytes
;
4885 net_stats
->rx_packets
= packets
;
4889 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4890 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
4892 start
= u64_stats_fetch_begin_bh(&ring
->tx_syncp
);
4893 _bytes
= ring
->tx_stats
.bytes
;
4894 _packets
= ring
->tx_stats
.packets
;
4895 } while (u64_stats_fetch_retry_bh(&ring
->tx_syncp
, start
));
4897 packets
+= _packets
;
4899 net_stats
->tx_bytes
= bytes
;
4900 net_stats
->tx_packets
= packets
;
4902 /* read stats registers */
4903 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
4904 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
4905 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
4906 rd32(E1000_GORCH
); /* clear GORCL */
4907 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
4908 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
4909 adapter
->stats
.roc
+= rd32(E1000_ROC
);
4911 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
4912 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
4913 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
4914 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
4915 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
4916 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
4917 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
4918 adapter
->stats
.sec
+= rd32(E1000_SEC
);
4920 mpc
= rd32(E1000_MPC
);
4921 adapter
->stats
.mpc
+= mpc
;
4922 net_stats
->rx_fifo_errors
+= mpc
;
4923 adapter
->stats
.scc
+= rd32(E1000_SCC
);
4924 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
4925 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
4926 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
4927 adapter
->stats
.dc
+= rd32(E1000_DC
);
4928 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
4929 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
4930 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
4931 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
4932 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
4933 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
4934 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
4935 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
4936 rd32(E1000_GOTCH
); /* clear GOTCL */
4937 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
4938 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
4939 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
4940 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
4941 adapter
->stats
.tor
+= rd32(E1000_TORH
);
4942 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
4943 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
4945 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
4946 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
4947 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
4948 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
4949 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
4950 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
4952 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
4953 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
4955 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
4956 adapter
->stats
.colc
+= rd32(E1000_COLC
);
4958 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
4959 /* read internal phy specific stats */
4960 reg
= rd32(E1000_CTRL_EXT
);
4961 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
4962 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
4964 /* this stat has invalid values on i210/i211 */
4965 if ((hw
->mac
.type
!= e1000_i210
) &&
4966 (hw
->mac
.type
!= e1000_i211
))
4967 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
4970 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
4971 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
4973 adapter
->stats
.iac
+= rd32(E1000_IAC
);
4974 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
4975 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
4976 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
4977 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
4978 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
4979 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
4980 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
4981 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
4983 /* Fill out the OS statistics structure */
4984 net_stats
->multicast
= adapter
->stats
.mprc
;
4985 net_stats
->collisions
= adapter
->stats
.colc
;
4989 /* RLEC on some newer hardware can be incorrect so build
4990 * our own version based on RUC and ROC
4992 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
4993 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
4994 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
4995 adapter
->stats
.cexterr
;
4996 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
4998 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
4999 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5000 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5003 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5004 adapter
->stats
.latecol
;
5005 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5006 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5007 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5009 /* Tx Dropped needs to be maintained elsewhere */
5012 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
5013 if ((adapter
->link_speed
== SPEED_1000
) &&
5014 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
5015 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
5016 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
5020 /* Management Stats */
5021 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5022 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5023 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5026 reg
= rd32(E1000_MANC
);
5027 if (reg
& E1000_MANC_EN_BMC2OS
) {
5028 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5029 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5030 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5031 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5035 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5037 struct igb_adapter
*adapter
= data
;
5038 struct e1000_hw
*hw
= &adapter
->hw
;
5039 u32 icr
= rd32(E1000_ICR
);
5040 /* reading ICR causes bit 31 of EICR to be cleared */
5042 if (icr
& E1000_ICR_DRSTA
)
5043 schedule_work(&adapter
->reset_task
);
5045 if (icr
& E1000_ICR_DOUTSYNC
) {
5046 /* HW is reporting DMA is out of sync */
5047 adapter
->stats
.doosync
++;
5048 /* The DMA Out of Sync is also indication of a spoof event
5049 * in IOV mode. Check the Wrong VM Behavior register to
5050 * see if it is really a spoof event.
5052 igb_check_wvbr(adapter
);
5055 /* Check for a mailbox event */
5056 if (icr
& E1000_ICR_VMMB
)
5057 igb_msg_task(adapter
);
5059 if (icr
& E1000_ICR_LSC
) {
5060 hw
->mac
.get_link_status
= 1;
5061 /* guard against interrupt when we're going down */
5062 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5063 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5066 if (icr
& E1000_ICR_TS
) {
5067 u32 tsicr
= rd32(E1000_TSICR
);
5069 if (tsicr
& E1000_TSICR_TXTS
) {
5070 /* acknowledge the interrupt */
5071 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5072 /* retrieve hardware timestamp */
5073 schedule_work(&adapter
->ptp_tx_work
);
5077 wr32(E1000_EIMS
, adapter
->eims_other
);
5082 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5084 struct igb_adapter
*adapter
= q_vector
->adapter
;
5085 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5087 if (!q_vector
->set_itr
)
5093 if (adapter
->hw
.mac
.type
== e1000_82575
)
5094 itr_val
|= itr_val
<< 16;
5096 itr_val
|= E1000_EITR_CNT_IGNR
;
5098 writel(itr_val
, q_vector
->itr_register
);
5099 q_vector
->set_itr
= 0;
5102 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5104 struct igb_q_vector
*q_vector
= data
;
5106 /* Write the ITR value calculated from the previous interrupt. */
5107 igb_write_itr(q_vector
);
5109 napi_schedule(&q_vector
->napi
);
5114 #ifdef CONFIG_IGB_DCA
5115 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5116 struct igb_ring
*tx_ring
,
5119 struct e1000_hw
*hw
= &adapter
->hw
;
5120 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5122 if (hw
->mac
.type
!= e1000_82575
)
5123 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5125 /* We can enable relaxed ordering for reads, but not writes when
5126 * DCA is enabled. This is due to a known issue in some chipsets
5127 * which will cause the DCA tag to be cleared.
5129 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5130 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5131 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5133 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5136 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5137 struct igb_ring
*rx_ring
,
5140 struct e1000_hw
*hw
= &adapter
->hw
;
5141 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5143 if (hw
->mac
.type
!= e1000_82575
)
5144 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5146 /* We can enable relaxed ordering for reads, but not writes when
5147 * DCA is enabled. This is due to a known issue in some chipsets
5148 * which will cause the DCA tag to be cleared.
5150 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5151 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5153 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5156 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5158 struct igb_adapter
*adapter
= q_vector
->adapter
;
5159 int cpu
= get_cpu();
5161 if (q_vector
->cpu
== cpu
)
5164 if (q_vector
->tx
.ring
)
5165 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5167 if (q_vector
->rx
.ring
)
5168 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5170 q_vector
->cpu
= cpu
;
5175 static void igb_setup_dca(struct igb_adapter
*adapter
)
5177 struct e1000_hw
*hw
= &adapter
->hw
;
5180 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5183 /* Always use CB2 mode, difference is masked in the CB driver. */
5184 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5186 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5187 adapter
->q_vector
[i
]->cpu
= -1;
5188 igb_update_dca(adapter
->q_vector
[i
]);
5192 static int __igb_notify_dca(struct device
*dev
, void *data
)
5194 struct net_device
*netdev
= dev_get_drvdata(dev
);
5195 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5196 struct pci_dev
*pdev
= adapter
->pdev
;
5197 struct e1000_hw
*hw
= &adapter
->hw
;
5198 unsigned long event
= *(unsigned long *)data
;
5201 case DCA_PROVIDER_ADD
:
5202 /* if already enabled, don't do it again */
5203 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5205 if (dca_add_requester(dev
) == 0) {
5206 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5207 dev_info(&pdev
->dev
, "DCA enabled\n");
5208 igb_setup_dca(adapter
);
5211 /* Fall Through since DCA is disabled. */
5212 case DCA_PROVIDER_REMOVE
:
5213 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5214 /* without this a class_device is left
5215 * hanging around in the sysfs model
5217 dca_remove_requester(dev
);
5218 dev_info(&pdev
->dev
, "DCA disabled\n");
5219 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5220 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5228 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5233 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5236 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5238 #endif /* CONFIG_IGB_DCA */
5240 #ifdef CONFIG_PCI_IOV
5241 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5243 unsigned char mac_addr
[ETH_ALEN
];
5245 eth_zero_addr(mac_addr
);
5246 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5248 /* By default spoof check is enabled for all VFs */
5249 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5255 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5257 struct e1000_hw
*hw
= &adapter
->hw
;
5261 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5262 ping
= E1000_PF_CONTROL_MSG
;
5263 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5264 ping
|= E1000_VT_MSGTYPE_CTS
;
5265 igb_write_mbx(hw
, &ping
, 1, i
);
5269 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5271 struct e1000_hw
*hw
= &adapter
->hw
;
5272 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5273 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5275 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5276 IGB_VF_FLAG_MULTI_PROMISC
);
5277 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5279 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5280 vmolr
|= E1000_VMOLR_MPME
;
5281 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5282 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5284 /* if we have hashes and we are clearing a multicast promisc
5285 * flag we need to write the hashes to the MTA as this step
5286 * was previously skipped
5288 if (vf_data
->num_vf_mc_hashes
> 30) {
5289 vmolr
|= E1000_VMOLR_MPME
;
5290 } else if (vf_data
->num_vf_mc_hashes
) {
5292 vmolr
|= E1000_VMOLR_ROMPE
;
5293 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5294 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5298 wr32(E1000_VMOLR(vf
), vmolr
);
5300 /* there are flags left unprocessed, likely not supported */
5301 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5307 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5308 u32
*msgbuf
, u32 vf
)
5310 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5311 u16
*hash_list
= (u16
*)&msgbuf
[1];
5312 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5315 /* salt away the number of multicast addresses assigned
5316 * to this VF for later use to restore when the PF multi cast
5319 vf_data
->num_vf_mc_hashes
= n
;
5321 /* only up to 30 hash values supported */
5325 /* store the hashes for later use */
5326 for (i
= 0; i
< n
; i
++)
5327 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5329 /* Flush and reset the mta with the new values */
5330 igb_set_rx_mode(adapter
->netdev
);
5335 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5337 struct e1000_hw
*hw
= &adapter
->hw
;
5338 struct vf_data_storage
*vf_data
;
5341 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5342 u32 vmolr
= rd32(E1000_VMOLR(i
));
5343 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5345 vf_data
= &adapter
->vf_data
[i
];
5347 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5348 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5349 vmolr
|= E1000_VMOLR_MPME
;
5350 } else if (vf_data
->num_vf_mc_hashes
) {
5351 vmolr
|= E1000_VMOLR_ROMPE
;
5352 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5353 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5355 wr32(E1000_VMOLR(i
), vmolr
);
5359 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5361 struct e1000_hw
*hw
= &adapter
->hw
;
5362 u32 pool_mask
, reg
, vid
;
5365 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5367 /* Find the vlan filter for this id */
5368 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5369 reg
= rd32(E1000_VLVF(i
));
5371 /* remove the vf from the pool */
5374 /* if pool is empty then remove entry from vfta */
5375 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5376 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5378 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5379 igb_vfta_set(hw
, vid
, false);
5382 wr32(E1000_VLVF(i
), reg
);
5385 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5388 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5390 struct e1000_hw
*hw
= &adapter
->hw
;
5393 /* The vlvf table only exists on 82576 hardware and newer */
5394 if (hw
->mac
.type
< e1000_82576
)
5397 /* we only need to do this if VMDq is enabled */
5398 if (!adapter
->vfs_allocated_count
)
5401 /* Find the vlan filter for this id */
5402 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5403 reg
= rd32(E1000_VLVF(i
));
5404 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5405 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5410 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5411 /* Did not find a matching VLAN ID entry that was
5412 * enabled. Search for a free filter entry, i.e.
5413 * one without the enable bit set
5415 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5416 reg
= rd32(E1000_VLVF(i
));
5417 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5421 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5422 /* Found an enabled/available entry */
5423 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5425 /* if !enabled we need to set this up in vfta */
5426 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5427 /* add VID to filter table */
5428 igb_vfta_set(hw
, vid
, true);
5429 reg
|= E1000_VLVF_VLANID_ENABLE
;
5431 reg
&= ~E1000_VLVF_VLANID_MASK
;
5433 wr32(E1000_VLVF(i
), reg
);
5435 /* do not modify RLPML for PF devices */
5436 if (vf
>= adapter
->vfs_allocated_count
)
5439 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5441 reg
= rd32(E1000_VMOLR(vf
));
5442 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5444 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5446 wr32(E1000_VMOLR(vf
), reg
);
5449 adapter
->vf_data
[vf
].vlans_enabled
++;
5452 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5453 /* remove vf from the pool */
5454 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5455 /* if pool is empty then remove entry from vfta */
5456 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5458 igb_vfta_set(hw
, vid
, false);
5460 wr32(E1000_VLVF(i
), reg
);
5462 /* do not modify RLPML for PF devices */
5463 if (vf
>= adapter
->vfs_allocated_count
)
5466 adapter
->vf_data
[vf
].vlans_enabled
--;
5467 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5469 reg
= rd32(E1000_VMOLR(vf
));
5470 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5472 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5474 wr32(E1000_VMOLR(vf
), reg
);
5481 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5483 struct e1000_hw
*hw
= &adapter
->hw
;
5486 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5488 wr32(E1000_VMVIR(vf
), 0);
5491 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5492 int vf
, u16 vlan
, u8 qos
)
5495 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5497 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5500 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5503 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5504 igb_set_vmolr(adapter
, vf
, !vlan
);
5505 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5506 adapter
->vf_data
[vf
].pf_qos
= qos
;
5507 dev_info(&adapter
->pdev
->dev
,
5508 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5509 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5510 dev_warn(&adapter
->pdev
->dev
,
5511 "The VF VLAN has been set, but the PF device is not up.\n");
5512 dev_warn(&adapter
->pdev
->dev
,
5513 "Bring the PF device up before attempting to use the VF device.\n");
5516 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5518 igb_set_vmvir(adapter
, vlan
, vf
);
5519 igb_set_vmolr(adapter
, vf
, true);
5520 adapter
->vf_data
[vf
].pf_vlan
= 0;
5521 adapter
->vf_data
[vf
].pf_qos
= 0;
5527 static int igb_find_vlvf_entry(struct igb_adapter
*adapter
, int vid
)
5529 struct e1000_hw
*hw
= &adapter
->hw
;
5533 /* Find the vlan filter for this id */
5534 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5535 reg
= rd32(E1000_VLVF(i
));
5536 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5537 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5541 if (i
>= E1000_VLVF_ARRAY_SIZE
)
5547 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5549 struct e1000_hw
*hw
= &adapter
->hw
;
5550 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5551 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5554 /* If in promiscuous mode we need to make sure the PF also has
5555 * the VLAN filter set.
5557 if (add
&& (adapter
->netdev
->flags
& IFF_PROMISC
))
5558 err
= igb_vlvf_set(adapter
, vid
, add
,
5559 adapter
->vfs_allocated_count
);
5563 err
= igb_vlvf_set(adapter
, vid
, add
, vf
);
5568 /* Go through all the checks to see if the VLAN filter should
5569 * be wiped completely.
5571 if (!add
&& (adapter
->netdev
->flags
& IFF_PROMISC
)) {
5574 int regndx
= igb_find_vlvf_entry(adapter
, vid
);
5577 /* See if any other pools are set for this VLAN filter
5578 * entry other than the PF.
5580 vlvf
= bits
= rd32(E1000_VLVF(regndx
));
5581 bits
&= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
5582 adapter
->vfs_allocated_count
);
5583 /* If the filter was removed then ensure PF pool bit
5584 * is cleared if the PF only added itself to the pool
5585 * because the PF is in promiscuous mode.
5587 if ((vlvf
& VLAN_VID_MASK
) == vid
&&
5588 !test_bit(vid
, adapter
->active_vlans
) &&
5590 igb_vlvf_set(adapter
, vid
, add
,
5591 adapter
->vfs_allocated_count
);
5598 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
5600 /* clear flags - except flag that indicates PF has set the MAC */
5601 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
5602 adapter
->vf_data
[vf
].last_nack
= jiffies
;
5604 /* reset offloads to defaults */
5605 igb_set_vmolr(adapter
, vf
, true);
5607 /* reset vlans for device */
5608 igb_clear_vf_vfta(adapter
, vf
);
5609 if (adapter
->vf_data
[vf
].pf_vlan
)
5610 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
5611 adapter
->vf_data
[vf
].pf_vlan
,
5612 adapter
->vf_data
[vf
].pf_qos
);
5614 igb_clear_vf_vfta(adapter
, vf
);
5616 /* reset multicast table array for vf */
5617 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
5619 /* Flush and reset the mta with the new values */
5620 igb_set_rx_mode(adapter
->netdev
);
5623 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
5625 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5627 /* clear mac address as we were hotplug removed/added */
5628 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
5629 eth_zero_addr(vf_mac
);
5631 /* process remaining reset events */
5632 igb_vf_reset(adapter
, vf
);
5635 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
5637 struct e1000_hw
*hw
= &adapter
->hw
;
5638 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5639 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5641 u8
*addr
= (u8
*)(&msgbuf
[1]);
5643 /* process all the same items cleared in a function level reset */
5644 igb_vf_reset(adapter
, vf
);
5646 /* set vf mac address */
5647 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
5649 /* enable transmit and receive for vf */
5650 reg
= rd32(E1000_VFTE
);
5651 wr32(E1000_VFTE
, reg
| (1 << vf
));
5652 reg
= rd32(E1000_VFRE
);
5653 wr32(E1000_VFRE
, reg
| (1 << vf
));
5655 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
5657 /* reply to reset with ack and vf mac address */
5658 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
5659 memcpy(addr
, vf_mac
, 6);
5660 igb_write_mbx(hw
, msgbuf
, 3, vf
);
5663 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
5665 /* The VF MAC Address is stored in a packed array of bytes
5666 * starting at the second 32 bit word of the msg array
5668 unsigned char *addr
= (char *)&msg
[1];
5671 if (is_valid_ether_addr(addr
))
5672 err
= igb_set_vf_mac(adapter
, vf
, addr
);
5677 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
5679 struct e1000_hw
*hw
= &adapter
->hw
;
5680 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5681 u32 msg
= E1000_VT_MSGTYPE_NACK
;
5683 /* if device isn't clear to send it shouldn't be reading either */
5684 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
5685 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
5686 igb_write_mbx(hw
, &msg
, 1, vf
);
5687 vf_data
->last_nack
= jiffies
;
5691 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
5693 struct pci_dev
*pdev
= adapter
->pdev
;
5694 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
5695 struct e1000_hw
*hw
= &adapter
->hw
;
5696 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5699 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
5702 /* if receive failed revoke VF CTS stats and restart init */
5703 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
5704 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
5705 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
5710 /* this is a message we already processed, do nothing */
5711 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
5714 /* until the vf completes a reset it should not be
5715 * allowed to start any configuration.
5717 if (msgbuf
[0] == E1000_VF_RESET
) {
5718 igb_vf_reset_msg(adapter
, vf
);
5722 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
5723 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
5729 switch ((msgbuf
[0] & 0xFFFF)) {
5730 case E1000_VF_SET_MAC_ADDR
:
5732 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
5733 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
5735 dev_warn(&pdev
->dev
,
5736 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
5739 case E1000_VF_SET_PROMISC
:
5740 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
5742 case E1000_VF_SET_MULTICAST
:
5743 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
5745 case E1000_VF_SET_LPE
:
5746 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
5748 case E1000_VF_SET_VLAN
:
5750 if (vf_data
->pf_vlan
)
5751 dev_warn(&pdev
->dev
,
5752 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
5755 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
5758 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
5763 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
5765 /* notify the VF of the results of what it sent us */
5767 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
5769 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
5771 igb_write_mbx(hw
, msgbuf
, 1, vf
);
5774 static void igb_msg_task(struct igb_adapter
*adapter
)
5776 struct e1000_hw
*hw
= &adapter
->hw
;
5779 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
5780 /* process any reset requests */
5781 if (!igb_check_for_rst(hw
, vf
))
5782 igb_vf_reset_event(adapter
, vf
);
5784 /* process any messages pending */
5785 if (!igb_check_for_msg(hw
, vf
))
5786 igb_rcv_msg_from_vf(adapter
, vf
);
5788 /* process any acks */
5789 if (!igb_check_for_ack(hw
, vf
))
5790 igb_rcv_ack_from_vf(adapter
, vf
);
5795 * igb_set_uta - Set unicast filter table address
5796 * @adapter: board private structure
5798 * The unicast table address is a register array of 32-bit registers.
5799 * The table is meant to be used in a way similar to how the MTA is used
5800 * however due to certain limitations in the hardware it is necessary to
5801 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5802 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5804 static void igb_set_uta(struct igb_adapter
*adapter
)
5806 struct e1000_hw
*hw
= &adapter
->hw
;
5809 /* The UTA table only exists on 82576 hardware and newer */
5810 if (hw
->mac
.type
< e1000_82576
)
5813 /* we only need to do this if VMDq is enabled */
5814 if (!adapter
->vfs_allocated_count
)
5817 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
5818 array_wr32(E1000_UTA
, i
, ~0);
5822 * igb_intr_msi - Interrupt Handler
5823 * @irq: interrupt number
5824 * @data: pointer to a network interface device structure
5826 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
5828 struct igb_adapter
*adapter
= data
;
5829 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
5830 struct e1000_hw
*hw
= &adapter
->hw
;
5831 /* read ICR disables interrupts using IAM */
5832 u32 icr
= rd32(E1000_ICR
);
5834 igb_write_itr(q_vector
);
5836 if (icr
& E1000_ICR_DRSTA
)
5837 schedule_work(&adapter
->reset_task
);
5839 if (icr
& E1000_ICR_DOUTSYNC
) {
5840 /* HW is reporting DMA is out of sync */
5841 adapter
->stats
.doosync
++;
5844 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
5845 hw
->mac
.get_link_status
= 1;
5846 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5847 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5850 if (icr
& E1000_ICR_TS
) {
5851 u32 tsicr
= rd32(E1000_TSICR
);
5853 if (tsicr
& E1000_TSICR_TXTS
) {
5854 /* acknowledge the interrupt */
5855 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5856 /* retrieve hardware timestamp */
5857 schedule_work(&adapter
->ptp_tx_work
);
5861 napi_schedule(&q_vector
->napi
);
5867 * igb_intr - Legacy Interrupt Handler
5868 * @irq: interrupt number
5869 * @data: pointer to a network interface device structure
5871 static irqreturn_t
igb_intr(int irq
, void *data
)
5873 struct igb_adapter
*adapter
= data
;
5874 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
5875 struct e1000_hw
*hw
= &adapter
->hw
;
5876 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5877 * need for the IMC write
5879 u32 icr
= rd32(E1000_ICR
);
5881 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5882 * not set, then the adapter didn't send an interrupt
5884 if (!(icr
& E1000_ICR_INT_ASSERTED
))
5887 igb_write_itr(q_vector
);
5889 if (icr
& E1000_ICR_DRSTA
)
5890 schedule_work(&adapter
->reset_task
);
5892 if (icr
& E1000_ICR_DOUTSYNC
) {
5893 /* HW is reporting DMA is out of sync */
5894 adapter
->stats
.doosync
++;
5897 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
5898 hw
->mac
.get_link_status
= 1;
5899 /* guard against interrupt when we're going down */
5900 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5901 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5904 if (icr
& E1000_ICR_TS
) {
5905 u32 tsicr
= rd32(E1000_TSICR
);
5907 if (tsicr
& E1000_TSICR_TXTS
) {
5908 /* acknowledge the interrupt */
5909 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5910 /* retrieve hardware timestamp */
5911 schedule_work(&adapter
->ptp_tx_work
);
5915 napi_schedule(&q_vector
->napi
);
5920 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
5922 struct igb_adapter
*adapter
= q_vector
->adapter
;
5923 struct e1000_hw
*hw
= &adapter
->hw
;
5925 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
5926 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
5927 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
5928 igb_set_itr(q_vector
);
5930 igb_update_ring_itr(q_vector
);
5933 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
5934 if (adapter
->msix_entries
)
5935 wr32(E1000_EIMS
, q_vector
->eims_value
);
5937 igb_irq_enable(adapter
);
5942 * igb_poll - NAPI Rx polling callback
5943 * @napi: napi polling structure
5944 * @budget: count of how many packets we should handle
5946 static int igb_poll(struct napi_struct
*napi
, int budget
)
5948 struct igb_q_vector
*q_vector
= container_of(napi
,
5949 struct igb_q_vector
,
5951 bool clean_complete
= true;
5953 #ifdef CONFIG_IGB_DCA
5954 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5955 igb_update_dca(q_vector
);
5957 if (q_vector
->tx
.ring
)
5958 clean_complete
= igb_clean_tx_irq(q_vector
);
5960 if (q_vector
->rx
.ring
)
5961 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
5963 /* If all work not completed, return budget and keep polling */
5964 if (!clean_complete
)
5967 /* If not enough Rx work done, exit the polling mode */
5968 napi_complete(napi
);
5969 igb_ring_irq_enable(q_vector
);
5975 * igb_clean_tx_irq - Reclaim resources after transmit completes
5976 * @q_vector: pointer to q_vector containing needed info
5978 * returns true if ring is completely cleaned
5980 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
5982 struct igb_adapter
*adapter
= q_vector
->adapter
;
5983 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
5984 struct igb_tx_buffer
*tx_buffer
;
5985 union e1000_adv_tx_desc
*tx_desc
;
5986 unsigned int total_bytes
= 0, total_packets
= 0;
5987 unsigned int budget
= q_vector
->tx
.work_limit
;
5988 unsigned int i
= tx_ring
->next_to_clean
;
5990 if (test_bit(__IGB_DOWN
, &adapter
->state
))
5993 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5994 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
5995 i
-= tx_ring
->count
;
5998 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6000 /* if next_to_watch is not set then there is no work pending */
6004 /* prevent any other reads prior to eop_desc */
6005 read_barrier_depends();
6007 /* if DD is not set pending work has not been completed */
6008 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6011 /* clear next_to_watch to prevent false hangs */
6012 tx_buffer
->next_to_watch
= NULL
;
6014 /* update the statistics for this packet */
6015 total_bytes
+= tx_buffer
->bytecount
;
6016 total_packets
+= tx_buffer
->gso_segs
;
6019 dev_kfree_skb_any(tx_buffer
->skb
);
6021 /* unmap skb header data */
6022 dma_unmap_single(tx_ring
->dev
,
6023 dma_unmap_addr(tx_buffer
, dma
),
6024 dma_unmap_len(tx_buffer
, len
),
6027 /* clear tx_buffer data */
6028 tx_buffer
->skb
= NULL
;
6029 dma_unmap_len_set(tx_buffer
, len
, 0);
6031 /* clear last DMA location and unmap remaining buffers */
6032 while (tx_desc
!= eop_desc
) {
6037 i
-= tx_ring
->count
;
6038 tx_buffer
= tx_ring
->tx_buffer_info
;
6039 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6042 /* unmap any remaining paged data */
6043 if (dma_unmap_len(tx_buffer
, len
)) {
6044 dma_unmap_page(tx_ring
->dev
,
6045 dma_unmap_addr(tx_buffer
, dma
),
6046 dma_unmap_len(tx_buffer
, len
),
6048 dma_unmap_len_set(tx_buffer
, len
, 0);
6052 /* move us one more past the eop_desc for start of next pkt */
6057 i
-= tx_ring
->count
;
6058 tx_buffer
= tx_ring
->tx_buffer_info
;
6059 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6062 /* issue prefetch for next Tx descriptor */
6065 /* update budget accounting */
6067 } while (likely(budget
));
6069 netdev_tx_completed_queue(txring_txq(tx_ring
),
6070 total_packets
, total_bytes
);
6071 i
+= tx_ring
->count
;
6072 tx_ring
->next_to_clean
= i
;
6073 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6074 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6075 tx_ring
->tx_stats
.packets
+= total_packets
;
6076 u64_stats_update_end(&tx_ring
->tx_syncp
);
6077 q_vector
->tx
.total_bytes
+= total_bytes
;
6078 q_vector
->tx
.total_packets
+= total_packets
;
6080 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6081 struct e1000_hw
*hw
= &adapter
->hw
;
6083 /* Detect a transmit hang in hardware, this serializes the
6084 * check with the clearing of time_stamp and movement of i
6086 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6087 if (tx_buffer
->next_to_watch
&&
6088 time_after(jiffies
, tx_buffer
->time_stamp
+
6089 (adapter
->tx_timeout_factor
* HZ
)) &&
6090 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6092 /* detected Tx unit hang */
6093 dev_err(tx_ring
->dev
,
6094 "Detected Tx Unit Hang\n"
6098 " next_to_use <%x>\n"
6099 " next_to_clean <%x>\n"
6100 "buffer_info[next_to_clean]\n"
6101 " time_stamp <%lx>\n"
6102 " next_to_watch <%p>\n"
6104 " desc.status <%x>\n",
6105 tx_ring
->queue_index
,
6106 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6107 readl(tx_ring
->tail
),
6108 tx_ring
->next_to_use
,
6109 tx_ring
->next_to_clean
,
6110 tx_buffer
->time_stamp
,
6111 tx_buffer
->next_to_watch
,
6113 tx_buffer
->next_to_watch
->wb
.status
);
6114 netif_stop_subqueue(tx_ring
->netdev
,
6115 tx_ring
->queue_index
);
6117 /* we are about to reset, no point in enabling stuff */
6122 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6123 if (unlikely(total_packets
&&
6124 netif_carrier_ok(tx_ring
->netdev
) &&
6125 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6126 /* Make sure that anybody stopping the queue after this
6127 * sees the new next_to_clean.
6130 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6131 tx_ring
->queue_index
) &&
6132 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6133 netif_wake_subqueue(tx_ring
->netdev
,
6134 tx_ring
->queue_index
);
6136 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6137 tx_ring
->tx_stats
.restart_queue
++;
6138 u64_stats_update_end(&tx_ring
->tx_syncp
);
6146 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6147 * @rx_ring: rx descriptor ring to store buffers on
6148 * @old_buff: donor buffer to have page reused
6150 * Synchronizes page for reuse by the adapter
6152 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6153 struct igb_rx_buffer
*old_buff
)
6155 struct igb_rx_buffer
*new_buff
;
6156 u16 nta
= rx_ring
->next_to_alloc
;
6158 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6160 /* update, and store next to alloc */
6162 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6164 /* transfer page from old buffer to new buffer */
6165 memcpy(new_buff
, old_buff
, sizeof(struct igb_rx_buffer
));
6167 /* sync the buffer for use by the device */
6168 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6169 old_buff
->page_offset
,
6174 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6176 unsigned int truesize
)
6178 /* avoid re-using remote pages */
6179 if (unlikely(page_to_nid(page
) != numa_node_id()))
6182 #if (PAGE_SIZE < 8192)
6183 /* if we are only owner of page we can reuse it */
6184 if (unlikely(page_count(page
) != 1))
6187 /* flip page offset to other buffer */
6188 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6190 /* since we are the only owner of the page and we need to
6191 * increment it, just set the value to 2 in order to avoid
6192 * an unnecessary locked operation
6194 atomic_set(&page
->_count
, 2);
6196 /* move offset up to the next cache line */
6197 rx_buffer
->page_offset
+= truesize
;
6199 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6202 /* bump ref count on page before it is given to the stack */
6210 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6211 * @rx_ring: rx descriptor ring to transact packets on
6212 * @rx_buffer: buffer containing page to add
6213 * @rx_desc: descriptor containing length of buffer written by hardware
6214 * @skb: sk_buff to place the data into
6216 * This function will add the data contained in rx_buffer->page to the skb.
6217 * This is done either through a direct copy if the data in the buffer is
6218 * less than the skb header size, otherwise it will just attach the page as
6219 * a frag to the skb.
6221 * The function will then update the page offset if necessary and return
6222 * true if the buffer can be reused by the adapter.
6224 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6225 struct igb_rx_buffer
*rx_buffer
,
6226 union e1000_adv_rx_desc
*rx_desc
,
6227 struct sk_buff
*skb
)
6229 struct page
*page
= rx_buffer
->page
;
6230 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6231 #if (PAGE_SIZE < 8192)
6232 unsigned int truesize
= IGB_RX_BUFSZ
;
6234 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
6237 if ((size
<= IGB_RX_HDR_LEN
) && !skb_is_nonlinear(skb
)) {
6238 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6240 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6241 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6242 va
+= IGB_TS_HDR_LEN
;
6243 size
-= IGB_TS_HDR_LEN
;
6246 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6248 /* we can reuse buffer as-is, just make sure it is local */
6249 if (likely(page_to_nid(page
) == numa_node_id()))
6252 /* this page cannot be reused so discard it */
6257 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6258 rx_buffer
->page_offset
, size
, truesize
);
6260 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6263 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6264 union e1000_adv_rx_desc
*rx_desc
,
6265 struct sk_buff
*skb
)
6267 struct igb_rx_buffer
*rx_buffer
;
6270 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6272 page
= rx_buffer
->page
;
6276 void *page_addr
= page_address(page
) +
6277 rx_buffer
->page_offset
;
6279 /* prefetch first cache line of first page */
6280 prefetch(page_addr
);
6281 #if L1_CACHE_BYTES < 128
6282 prefetch(page_addr
+ L1_CACHE_BYTES
);
6285 /* allocate a skb to store the frags */
6286 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
6288 if (unlikely(!skb
)) {
6289 rx_ring
->rx_stats
.alloc_failed
++;
6293 /* we will be copying header into skb->data in
6294 * pskb_may_pull so it is in our interest to prefetch
6295 * it now to avoid a possible cache miss
6297 prefetchw(skb
->data
);
6300 /* we are reusing so sync this buffer for CPU use */
6301 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6303 rx_buffer
->page_offset
,
6307 /* pull page into skb */
6308 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6309 /* hand second half of page back to the ring */
6310 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6312 /* we are not reusing the buffer so unmap it */
6313 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6314 PAGE_SIZE
, DMA_FROM_DEVICE
);
6317 /* clear contents of rx_buffer */
6318 rx_buffer
->page
= NULL
;
6323 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6324 union e1000_adv_rx_desc
*rx_desc
,
6325 struct sk_buff
*skb
)
6327 skb_checksum_none_assert(skb
);
6329 /* Ignore Checksum bit is set */
6330 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6333 /* Rx checksum disabled via ethtool */
6334 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6337 /* TCP/UDP checksum error bit is set */
6338 if (igb_test_staterr(rx_desc
,
6339 E1000_RXDEXT_STATERR_TCPE
|
6340 E1000_RXDEXT_STATERR_IPE
)) {
6341 /* work around errata with sctp packets where the TCPE aka
6342 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6343 * packets, (aka let the stack check the crc32c)
6345 if (!((skb
->len
== 60) &&
6346 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6347 u64_stats_update_begin(&ring
->rx_syncp
);
6348 ring
->rx_stats
.csum_err
++;
6349 u64_stats_update_end(&ring
->rx_syncp
);
6351 /* let the stack verify checksum errors */
6354 /* It must be a TCP or UDP packet with a valid checksum */
6355 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6356 E1000_RXD_STAT_UDPCS
))
6357 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6359 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6360 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6363 static inline void igb_rx_hash(struct igb_ring
*ring
,
6364 union e1000_adv_rx_desc
*rx_desc
,
6365 struct sk_buff
*skb
)
6367 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6368 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
6372 * igb_is_non_eop - process handling of non-EOP buffers
6373 * @rx_ring: Rx ring being processed
6374 * @rx_desc: Rx descriptor for current buffer
6375 * @skb: current socket buffer containing buffer in progress
6377 * This function updates next to clean. If the buffer is an EOP buffer
6378 * this function exits returning false, otherwise it will place the
6379 * sk_buff in the next buffer to be chained and return true indicating
6380 * that this is in fact a non-EOP buffer.
6382 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6383 union e1000_adv_rx_desc
*rx_desc
)
6385 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6387 /* fetch, update, and store next to clean */
6388 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6389 rx_ring
->next_to_clean
= ntc
;
6391 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6393 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6400 * igb_get_headlen - determine size of header for LRO/GRO
6401 * @data: pointer to the start of the headers
6402 * @max_len: total length of section to find headers in
6404 * This function is meant to determine the length of headers that will
6405 * be recognized by hardware for LRO, and GRO offloads. The main
6406 * motivation of doing this is to only perform one pull for IPv4 TCP
6407 * packets so that we can do basic things like calculating the gso_size
6408 * based on the average data per packet.
6410 static unsigned int igb_get_headlen(unsigned char *data
,
6411 unsigned int max_len
)
6414 unsigned char *network
;
6417 struct vlan_hdr
*vlan
;
6420 struct ipv6hdr
*ipv6
;
6423 u8 nexthdr
= 0; /* default to not TCP */
6426 /* this should never happen, but better safe than sorry */
6427 if (max_len
< ETH_HLEN
)
6430 /* initialize network frame pointer */
6433 /* set first protocol and move network header forward */
6434 protocol
= hdr
.eth
->h_proto
;
6435 hdr
.network
+= ETH_HLEN
;
6437 /* handle any vlan tag if present */
6438 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6439 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
6442 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
6443 hdr
.network
+= VLAN_HLEN
;
6446 /* handle L3 protocols */
6447 if (protocol
== __constant_htons(ETH_P_IP
)) {
6448 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
6451 /* access ihl as a u8 to avoid unaligned access on ia64 */
6452 hlen
= (hdr
.network
[0] & 0x0F) << 2;
6454 /* verify hlen meets minimum size requirements */
6455 if (hlen
< sizeof(struct iphdr
))
6456 return hdr
.network
- data
;
6458 /* record next protocol if header is present */
6459 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
6460 nexthdr
= hdr
.ipv4
->protocol
;
6461 } else if (protocol
== __constant_htons(ETH_P_IPV6
)) {
6462 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
6465 /* record next protocol */
6466 nexthdr
= hdr
.ipv6
->nexthdr
;
6467 hlen
= sizeof(struct ipv6hdr
);
6469 return hdr
.network
- data
;
6472 /* relocate pointer to start of L4 header */
6473 hdr
.network
+= hlen
;
6475 /* finally sort out TCP */
6476 if (nexthdr
== IPPROTO_TCP
) {
6477 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
6480 /* access doff as a u8 to avoid unaligned access on ia64 */
6481 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
6483 /* verify hlen meets minimum size requirements */
6484 if (hlen
< sizeof(struct tcphdr
))
6485 return hdr
.network
- data
;
6487 hdr
.network
+= hlen
;
6488 } else if (nexthdr
== IPPROTO_UDP
) {
6489 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
6492 hdr
.network
+= sizeof(struct udphdr
);
6495 /* If everything has gone correctly hdr.network should be the
6496 * data section of the packet and will be the end of the header.
6497 * If not then it probably represents the end of the last recognized
6500 if ((hdr
.network
- data
) < max_len
)
6501 return hdr
.network
- data
;
6507 * igb_pull_tail - igb specific version of skb_pull_tail
6508 * @rx_ring: rx descriptor ring packet is being transacted on
6509 * @rx_desc: pointer to the EOP Rx descriptor
6510 * @skb: pointer to current skb being adjusted
6512 * This function is an igb specific version of __pskb_pull_tail. The
6513 * main difference between this version and the original function is that
6514 * this function can make several assumptions about the state of things
6515 * that allow for significant optimizations versus the standard function.
6516 * As a result we can do things like drop a frag and maintain an accurate
6517 * truesize for the skb.
6519 static void igb_pull_tail(struct igb_ring
*rx_ring
,
6520 union e1000_adv_rx_desc
*rx_desc
,
6521 struct sk_buff
*skb
)
6523 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6525 unsigned int pull_len
;
6527 /* it is valid to use page_address instead of kmap since we are
6528 * working with pages allocated out of the lomem pool per
6529 * alloc_page(GFP_ATOMIC)
6531 va
= skb_frag_address(frag
);
6533 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6534 /* retrieve timestamp from buffer */
6535 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6537 /* update pointers to remove timestamp header */
6538 skb_frag_size_sub(frag
, IGB_TS_HDR_LEN
);
6539 frag
->page_offset
+= IGB_TS_HDR_LEN
;
6540 skb
->data_len
-= IGB_TS_HDR_LEN
;
6541 skb
->len
-= IGB_TS_HDR_LEN
;
6543 /* move va to start of packet data */
6544 va
+= IGB_TS_HDR_LEN
;
6547 /* we need the header to contain the greater of either ETH_HLEN or
6548 * 60 bytes if the skb->len is less than 60 for skb_pad.
6550 pull_len
= igb_get_headlen(va
, IGB_RX_HDR_LEN
);
6552 /* align pull length to size of long to optimize memcpy performance */
6553 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
6555 /* update all of the pointers */
6556 skb_frag_size_sub(frag
, pull_len
);
6557 frag
->page_offset
+= pull_len
;
6558 skb
->data_len
-= pull_len
;
6559 skb
->tail
+= pull_len
;
6563 * igb_cleanup_headers - Correct corrupted or empty headers
6564 * @rx_ring: rx descriptor ring packet is being transacted on
6565 * @rx_desc: pointer to the EOP Rx descriptor
6566 * @skb: pointer to current skb being fixed
6568 * Address the case where we are pulling data in on pages only
6569 * and as such no data is present in the skb header.
6571 * In addition if skb is not at least 60 bytes we need to pad it so that
6572 * it is large enough to qualify as a valid Ethernet frame.
6574 * Returns true if an error was encountered and skb was freed.
6576 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6577 union e1000_adv_rx_desc
*rx_desc
,
6578 struct sk_buff
*skb
)
6580 if (unlikely((igb_test_staterr(rx_desc
,
6581 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6582 struct net_device
*netdev
= rx_ring
->netdev
;
6583 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6584 dev_kfree_skb_any(skb
);
6589 /* place header in linear portion of buffer */
6590 if (skb_is_nonlinear(skb
))
6591 igb_pull_tail(rx_ring
, rx_desc
, skb
);
6593 /* if skb_pad returns an error the skb was freed */
6594 if (unlikely(skb
->len
< 60)) {
6595 int pad_len
= 60 - skb
->len
;
6597 if (skb_pad(skb
, pad_len
))
6599 __skb_put(skb
, pad_len
);
6606 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6607 * @rx_ring: rx descriptor ring packet is being transacted on
6608 * @rx_desc: pointer to the EOP Rx descriptor
6609 * @skb: pointer to current skb being populated
6611 * This function checks the ring, descriptor, and packet information in
6612 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6613 * other fields within the skb.
6615 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6616 union e1000_adv_rx_desc
*rx_desc
,
6617 struct sk_buff
*skb
)
6619 struct net_device
*dev
= rx_ring
->netdev
;
6621 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6623 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6625 igb_ptp_rx_hwtstamp(rx_ring
->q_vector
, rx_desc
, skb
);
6627 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
6628 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6630 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6631 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6632 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6634 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6636 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
6639 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6641 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6644 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6646 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6647 struct sk_buff
*skb
= rx_ring
->skb
;
6648 unsigned int total_bytes
= 0, total_packets
= 0;
6649 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6652 union e1000_adv_rx_desc
*rx_desc
;
6654 /* return some buffers to hardware, one at a time is too slow */
6655 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
6656 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6660 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
6662 if (!igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
))
6665 /* This memory barrier is needed to keep us from reading
6666 * any other fields out of the rx_desc until we know the
6667 * RXD_STAT_DD bit is set
6671 /* retrieve a buffer from the ring */
6672 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
6674 /* exit if we failed to retrieve a buffer */
6680 /* fetch next buffer in frame if non-eop */
6681 if (igb_is_non_eop(rx_ring
, rx_desc
))
6684 /* verify the packet layout is correct */
6685 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
6690 /* probably a little skewed due to removing CRC */
6691 total_bytes
+= skb
->len
;
6693 /* populate checksum, timestamp, VLAN, and protocol */
6694 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
6696 napi_gro_receive(&q_vector
->napi
, skb
);
6698 /* reset skb pointer */
6701 /* update budget accounting */
6703 } while (likely(total_packets
< budget
));
6705 /* place incomplete frames back on ring for completion */
6708 u64_stats_update_begin(&rx_ring
->rx_syncp
);
6709 rx_ring
->rx_stats
.packets
+= total_packets
;
6710 rx_ring
->rx_stats
.bytes
+= total_bytes
;
6711 u64_stats_update_end(&rx_ring
->rx_syncp
);
6712 q_vector
->rx
.total_packets
+= total_packets
;
6713 q_vector
->rx
.total_bytes
+= total_bytes
;
6716 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6718 return (total_packets
< budget
);
6721 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
6722 struct igb_rx_buffer
*bi
)
6724 struct page
*page
= bi
->page
;
6727 /* since we are recycling buffers we should seldom need to alloc */
6731 /* alloc new page for storage */
6732 page
= __skb_alloc_page(GFP_ATOMIC
| __GFP_COLD
, NULL
);
6733 if (unlikely(!page
)) {
6734 rx_ring
->rx_stats
.alloc_failed
++;
6738 /* map page for use */
6739 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
6741 /* if mapping failed free memory back to system since
6742 * there isn't much point in holding memory we can't use
6744 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
6747 rx_ring
->rx_stats
.alloc_failed
++;
6753 bi
->page_offset
= 0;
6759 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6760 * @adapter: address of board private structure
6762 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
6764 union e1000_adv_rx_desc
*rx_desc
;
6765 struct igb_rx_buffer
*bi
;
6766 u16 i
= rx_ring
->next_to_use
;
6772 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
6773 bi
= &rx_ring
->rx_buffer_info
[i
];
6774 i
-= rx_ring
->count
;
6777 if (!igb_alloc_mapped_page(rx_ring
, bi
))
6780 /* Refresh the desc even if buffer_addrs didn't change
6781 * because each write-back erases this info.
6783 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
6789 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
6790 bi
= rx_ring
->rx_buffer_info
;
6791 i
-= rx_ring
->count
;
6794 /* clear the hdr_addr for the next_to_use descriptor */
6795 rx_desc
->read
.hdr_addr
= 0;
6798 } while (cleaned_count
);
6800 i
+= rx_ring
->count
;
6802 if (rx_ring
->next_to_use
!= i
) {
6803 /* record the next descriptor to use */
6804 rx_ring
->next_to_use
= i
;
6806 /* update next to alloc since we have filled the ring */
6807 rx_ring
->next_to_alloc
= i
;
6809 /* Force memory writes to complete before letting h/w
6810 * know there are new descriptors to fetch. (Only
6811 * applicable for weak-ordered memory model archs,
6815 writel(i
, rx_ring
->tail
);
6825 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
6827 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6828 struct mii_ioctl_data
*data
= if_mii(ifr
);
6830 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
6835 data
->phy_id
= adapter
->hw
.phy
.addr
;
6838 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
6855 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
6861 return igb_mii_ioctl(netdev
, ifr
, cmd
);
6863 return igb_ptp_hwtstamp_ioctl(netdev
, ifr
, cmd
);
6869 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
6871 struct igb_adapter
*adapter
= hw
->back
;
6873 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
6874 return -E1000_ERR_CONFIG
;
6879 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
6881 struct igb_adapter
*adapter
= hw
->back
;
6883 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
6884 return -E1000_ERR_CONFIG
;
6889 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
6891 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6892 struct e1000_hw
*hw
= &adapter
->hw
;
6894 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
6897 /* enable VLAN tag insert/strip */
6898 ctrl
= rd32(E1000_CTRL
);
6899 ctrl
|= E1000_CTRL_VME
;
6900 wr32(E1000_CTRL
, ctrl
);
6902 /* Disable CFI check */
6903 rctl
= rd32(E1000_RCTL
);
6904 rctl
&= ~E1000_RCTL_CFIEN
;
6905 wr32(E1000_RCTL
, rctl
);
6907 /* disable VLAN tag insert/strip */
6908 ctrl
= rd32(E1000_CTRL
);
6909 ctrl
&= ~E1000_CTRL_VME
;
6910 wr32(E1000_CTRL
, ctrl
);
6913 igb_rlpml_set(adapter
);
6916 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
6917 __be16 proto
, u16 vid
)
6919 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6920 struct e1000_hw
*hw
= &adapter
->hw
;
6921 int pf_id
= adapter
->vfs_allocated_count
;
6923 /* attempt to add filter to vlvf array */
6924 igb_vlvf_set(adapter
, vid
, true, pf_id
);
6926 /* add the filter since PF can receive vlans w/o entry in vlvf */
6927 igb_vfta_set(hw
, vid
, true);
6929 set_bit(vid
, adapter
->active_vlans
);
6934 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
6935 __be16 proto
, u16 vid
)
6937 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6938 struct e1000_hw
*hw
= &adapter
->hw
;
6939 int pf_id
= adapter
->vfs_allocated_count
;
6942 /* remove vlan from VLVF table array */
6943 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
6945 /* if vid was not present in VLVF just remove it from table */
6947 igb_vfta_set(hw
, vid
, false);
6949 clear_bit(vid
, adapter
->active_vlans
);
6954 static void igb_restore_vlan(struct igb_adapter
*adapter
)
6958 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
6960 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
6961 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
6964 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
6966 struct pci_dev
*pdev
= adapter
->pdev
;
6967 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
6971 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6972 * for the switch() below to work
6974 if ((spd
& 1) || (dplx
& ~1))
6977 /* Fiber NIC's only allow 1000 gbps Full duplex
6978 * and 100Mbps Full duplex for 100baseFx sfp
6980 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
6981 switch (spd
+ dplx
) {
6982 case SPEED_10
+ DUPLEX_HALF
:
6983 case SPEED_10
+ DUPLEX_FULL
:
6984 case SPEED_100
+ DUPLEX_HALF
:
6991 switch (spd
+ dplx
) {
6992 case SPEED_10
+ DUPLEX_HALF
:
6993 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
6995 case SPEED_10
+ DUPLEX_FULL
:
6996 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
6998 case SPEED_100
+ DUPLEX_HALF
:
6999 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7001 case SPEED_100
+ DUPLEX_FULL
:
7002 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7004 case SPEED_1000
+ DUPLEX_FULL
:
7006 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7008 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7013 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7014 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7019 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7023 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7026 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7027 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7028 struct e1000_hw
*hw
= &adapter
->hw
;
7029 u32 ctrl
, rctl
, status
;
7030 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7035 netif_device_detach(netdev
);
7037 if (netif_running(netdev
))
7038 __igb_close(netdev
, true);
7040 igb_clear_interrupt_scheme(adapter
);
7043 retval
= pci_save_state(pdev
);
7048 status
= rd32(E1000_STATUS
);
7049 if (status
& E1000_STATUS_LU
)
7050 wufc
&= ~E1000_WUFC_LNKC
;
7053 igb_setup_rctl(adapter
);
7054 igb_set_rx_mode(netdev
);
7056 /* turn on all-multi mode if wake on multicast is enabled */
7057 if (wufc
& E1000_WUFC_MC
) {
7058 rctl
= rd32(E1000_RCTL
);
7059 rctl
|= E1000_RCTL_MPE
;
7060 wr32(E1000_RCTL
, rctl
);
7063 ctrl
= rd32(E1000_CTRL
);
7064 /* advertise wake from D3Cold */
7065 #define E1000_CTRL_ADVD3WUC 0x00100000
7066 /* phy power management enable */
7067 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7068 ctrl
|= E1000_CTRL_ADVD3WUC
;
7069 wr32(E1000_CTRL
, ctrl
);
7071 /* Allow time for pending master requests to run */
7072 igb_disable_pcie_master(hw
);
7074 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7075 wr32(E1000_WUFC
, wufc
);
7078 wr32(E1000_WUFC
, 0);
7081 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7083 igb_power_down_link(adapter
);
7085 igb_power_up_link(adapter
);
7087 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7088 * would have already happened in close and is redundant.
7090 igb_release_hw_control(adapter
);
7092 pci_disable_device(pdev
);
7098 #ifdef CONFIG_PM_SLEEP
7099 static int igb_suspend(struct device
*dev
)
7103 struct pci_dev
*pdev
= to_pci_dev(dev
);
7105 retval
= __igb_shutdown(pdev
, &wake
, 0);
7110 pci_prepare_to_sleep(pdev
);
7112 pci_wake_from_d3(pdev
, false);
7113 pci_set_power_state(pdev
, PCI_D3hot
);
7118 #endif /* CONFIG_PM_SLEEP */
7120 static int igb_resume(struct device
*dev
)
7122 struct pci_dev
*pdev
= to_pci_dev(dev
);
7123 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7124 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7125 struct e1000_hw
*hw
= &adapter
->hw
;
7128 pci_set_power_state(pdev
, PCI_D0
);
7129 pci_restore_state(pdev
);
7130 pci_save_state(pdev
);
7132 err
= pci_enable_device_mem(pdev
);
7135 "igb: Cannot enable PCI device from suspend\n");
7138 pci_set_master(pdev
);
7140 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7141 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7143 if (igb_init_interrupt_scheme(adapter
, true)) {
7144 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7150 /* let the f/w know that the h/w is now under the control of the
7153 igb_get_hw_control(adapter
);
7155 wr32(E1000_WUS
, ~0);
7157 if (netdev
->flags
& IFF_UP
) {
7159 err
= __igb_open(netdev
, true);
7165 netif_device_attach(netdev
);
7169 #ifdef CONFIG_PM_RUNTIME
7170 static int igb_runtime_idle(struct device
*dev
)
7172 struct pci_dev
*pdev
= to_pci_dev(dev
);
7173 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7174 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7176 if (!igb_has_link(adapter
))
7177 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7182 static int igb_runtime_suspend(struct device
*dev
)
7184 struct pci_dev
*pdev
= to_pci_dev(dev
);
7188 retval
= __igb_shutdown(pdev
, &wake
, 1);
7193 pci_prepare_to_sleep(pdev
);
7195 pci_wake_from_d3(pdev
, false);
7196 pci_set_power_state(pdev
, PCI_D3hot
);
7202 static int igb_runtime_resume(struct device
*dev
)
7204 return igb_resume(dev
);
7206 #endif /* CONFIG_PM_RUNTIME */
7209 static void igb_shutdown(struct pci_dev
*pdev
)
7213 __igb_shutdown(pdev
, &wake
, 0);
7215 if (system_state
== SYSTEM_POWER_OFF
) {
7216 pci_wake_from_d3(pdev
, wake
);
7217 pci_set_power_state(pdev
, PCI_D3hot
);
7221 #ifdef CONFIG_PCI_IOV
7222 static int igb_sriov_reinit(struct pci_dev
*dev
)
7224 struct net_device
*netdev
= pci_get_drvdata(dev
);
7225 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7226 struct pci_dev
*pdev
= adapter
->pdev
;
7230 if (netif_running(netdev
))
7233 igb_clear_interrupt_scheme(adapter
);
7235 igb_init_queue_configuration(adapter
);
7237 if (igb_init_interrupt_scheme(adapter
, true)) {
7238 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7242 if (netif_running(netdev
))
7250 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7252 int err
= igb_disable_sriov(dev
);
7255 err
= igb_sriov_reinit(dev
);
7260 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7262 int err
= igb_enable_sriov(dev
, num_vfs
);
7267 err
= igb_sriov_reinit(dev
);
7276 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7278 #ifdef CONFIG_PCI_IOV
7280 return igb_pci_disable_sriov(dev
);
7282 return igb_pci_enable_sriov(dev
, num_vfs
);
7287 #ifdef CONFIG_NET_POLL_CONTROLLER
7288 /* Polling 'interrupt' - used by things like netconsole to send skbs
7289 * without having to re-enable interrupts. It's not called while
7290 * the interrupt routine is executing.
7292 static void igb_netpoll(struct net_device
*netdev
)
7294 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7295 struct e1000_hw
*hw
= &adapter
->hw
;
7296 struct igb_q_vector
*q_vector
;
7299 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7300 q_vector
= adapter
->q_vector
[i
];
7301 if (adapter
->msix_entries
)
7302 wr32(E1000_EIMC
, q_vector
->eims_value
);
7304 igb_irq_disable(adapter
);
7305 napi_schedule(&q_vector
->napi
);
7308 #endif /* CONFIG_NET_POLL_CONTROLLER */
7311 * igb_io_error_detected - called when PCI error is detected
7312 * @pdev: Pointer to PCI device
7313 * @state: The current pci connection state
7315 * This function is called after a PCI bus error affecting
7316 * this device has been detected.
7318 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7319 pci_channel_state_t state
)
7321 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7322 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7324 netif_device_detach(netdev
);
7326 if (state
== pci_channel_io_perm_failure
)
7327 return PCI_ERS_RESULT_DISCONNECT
;
7329 if (netif_running(netdev
))
7331 pci_disable_device(pdev
);
7333 /* Request a slot slot reset. */
7334 return PCI_ERS_RESULT_NEED_RESET
;
7338 * igb_io_slot_reset - called after the pci bus has been reset.
7339 * @pdev: Pointer to PCI device
7341 * Restart the card from scratch, as if from a cold-boot. Implementation
7342 * resembles the first-half of the igb_resume routine.
7344 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7346 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7347 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7348 struct e1000_hw
*hw
= &adapter
->hw
;
7349 pci_ers_result_t result
;
7352 if (pci_enable_device_mem(pdev
)) {
7354 "Cannot re-enable PCI device after reset.\n");
7355 result
= PCI_ERS_RESULT_DISCONNECT
;
7357 pci_set_master(pdev
);
7358 pci_restore_state(pdev
);
7359 pci_save_state(pdev
);
7361 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7362 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7365 wr32(E1000_WUS
, ~0);
7366 result
= PCI_ERS_RESULT_RECOVERED
;
7369 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7372 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7374 /* non-fatal, continue */
7381 * igb_io_resume - called when traffic can start flowing again.
7382 * @pdev: Pointer to PCI device
7384 * This callback is called when the error recovery driver tells us that
7385 * its OK to resume normal operation. Implementation resembles the
7386 * second-half of the igb_resume routine.
7388 static void igb_io_resume(struct pci_dev
*pdev
)
7390 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7391 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7393 if (netif_running(netdev
)) {
7394 if (igb_up(adapter
)) {
7395 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7400 netif_device_attach(netdev
);
7402 /* let the f/w know that the h/w is now under the control of the
7405 igb_get_hw_control(adapter
);
7408 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7411 u32 rar_low
, rar_high
;
7412 struct e1000_hw
*hw
= &adapter
->hw
;
7414 /* HW expects these in little endian so we reverse the byte order
7415 * from network order (big endian) to little endian
7417 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7418 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7419 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7421 /* Indicate to hardware the Address is Valid. */
7422 rar_high
|= E1000_RAH_AV
;
7424 if (hw
->mac
.type
== e1000_82575
)
7425 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7427 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7429 wr32(E1000_RAL(index
), rar_low
);
7431 wr32(E1000_RAH(index
), rar_high
);
7435 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7436 int vf
, unsigned char *mac_addr
)
7438 struct e1000_hw
*hw
= &adapter
->hw
;
7439 /* VF MAC addresses start at end of receive addresses and moves
7440 * towards the first, as a result a collision should not be possible
7442 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7444 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7446 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7451 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7453 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7454 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7456 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7457 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7458 dev_info(&adapter
->pdev
->dev
,
7459 "Reload the VF driver to make this change effective.");
7460 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7461 dev_warn(&adapter
->pdev
->dev
,
7462 "The VF MAC address has been set, but the PF device is not up.\n");
7463 dev_warn(&adapter
->pdev
->dev
,
7464 "Bring the PF device up before attempting to use the VF device.\n");
7466 return igb_set_vf_mac(adapter
, vf
, mac
);
7469 static int igb_link_mbps(int internal_link_speed
)
7471 switch (internal_link_speed
) {
7481 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7488 /* Calculate the rate factor values to set */
7489 rf_int
= link_speed
/ tx_rate
;
7490 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7491 rf_dec
= (rf_dec
* (1 << E1000_RTTBCNRC_RF_INT_SHIFT
)) /
7494 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7495 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
7496 E1000_RTTBCNRC_RF_INT_MASK
);
7497 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7502 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7503 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7504 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7506 wr32(E1000_RTTBCNRM
, 0x14);
7507 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7510 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7512 int actual_link_speed
, i
;
7513 bool reset_rate
= false;
7515 /* VF TX rate limit was not set or not supported */
7516 if ((adapter
->vf_rate_link_speed
== 0) ||
7517 (adapter
->hw
.mac
.type
!= e1000_82576
))
7520 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7521 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7523 adapter
->vf_rate_link_speed
= 0;
7524 dev_info(&adapter
->pdev
->dev
,
7525 "Link speed has been changed. VF Transmit rate is disabled\n");
7528 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7530 adapter
->vf_data
[i
].tx_rate
= 0;
7532 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7533 adapter
->vf_data
[i
].tx_rate
,
7538 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
)
7540 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7541 struct e1000_hw
*hw
= &adapter
->hw
;
7542 int actual_link_speed
;
7544 if (hw
->mac
.type
!= e1000_82576
)
7547 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7548 if ((vf
>= adapter
->vfs_allocated_count
) ||
7549 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7550 (tx_rate
< 0) || (tx_rate
> actual_link_speed
))
7553 adapter
->vf_rate_link_speed
= actual_link_speed
;
7554 adapter
->vf_data
[vf
].tx_rate
= (u16
)tx_rate
;
7555 igb_set_vf_rate_limit(hw
, vf
, tx_rate
, actual_link_speed
);
7560 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
7563 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7564 struct e1000_hw
*hw
= &adapter
->hw
;
7565 u32 reg_val
, reg_offset
;
7567 if (!adapter
->vfs_allocated_count
)
7570 if (vf
>= adapter
->vfs_allocated_count
)
7573 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
7574 reg_val
= rd32(reg_offset
);
7576 reg_val
|= ((1 << vf
) |
7577 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7579 reg_val
&= ~((1 << vf
) |
7580 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7581 wr32(reg_offset
, reg_val
);
7583 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
7584 return E1000_SUCCESS
;
7587 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7588 int vf
, struct ifla_vf_info
*ivi
)
7590 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7591 if (vf
>= adapter
->vfs_allocated_count
)
7594 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7595 ivi
->tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7596 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7597 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7598 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
7602 static void igb_vmm_control(struct igb_adapter
*adapter
)
7604 struct e1000_hw
*hw
= &adapter
->hw
;
7607 switch (hw
->mac
.type
) {
7613 /* replication is not supported for 82575 */
7616 /* notify HW that the MAC is adding vlan tags */
7617 reg
= rd32(E1000_DTXCTL
);
7618 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7619 wr32(E1000_DTXCTL
, reg
);
7621 /* enable replication vlan tag stripping */
7622 reg
= rd32(E1000_RPLOLR
);
7623 reg
|= E1000_RPLOLR_STRVLAN
;
7624 wr32(E1000_RPLOLR
, reg
);
7626 /* none of the above registers are supported by i350 */
7630 if (adapter
->vfs_allocated_count
) {
7631 igb_vmdq_set_loopback_pf(hw
, true);
7632 igb_vmdq_set_replication_pf(hw
, true);
7633 igb_vmdq_set_anti_spoofing_pf(hw
, true,
7634 adapter
->vfs_allocated_count
);
7636 igb_vmdq_set_loopback_pf(hw
, false);
7637 igb_vmdq_set_replication_pf(hw
, false);
7641 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
7643 struct e1000_hw
*hw
= &adapter
->hw
;
7647 if (hw
->mac
.type
> e1000_82580
) {
7648 if (adapter
->flags
& IGB_FLAG_DMAC
) {
7651 /* force threshold to 0. */
7652 wr32(E1000_DMCTXTH
, 0);
7654 /* DMA Coalescing high water mark needs to be greater
7655 * than the Rx threshold. Set hwm to PBA - max frame
7656 * size in 16B units, capping it at PBA - 6KB.
7658 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
7659 if (hwm
< 64 * (pba
- 6))
7660 hwm
= 64 * (pba
- 6);
7661 reg
= rd32(E1000_FCRTC
);
7662 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
7663 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
7664 & E1000_FCRTC_RTH_COAL_MASK
);
7665 wr32(E1000_FCRTC
, reg
);
7667 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7668 * frame size, capping it at PBA - 10KB.
7670 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
7671 if (dmac_thr
< pba
- 10)
7672 dmac_thr
= pba
- 10;
7673 reg
= rd32(E1000_DMACR
);
7674 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
7675 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
7676 & E1000_DMACR_DMACTHR_MASK
);
7678 /* transition to L0x or L1 if available..*/
7679 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
7681 /* watchdog timer= +-1000 usec in 32usec intervals */
7684 /* Disable BMC-to-OS Watchdog Enable */
7685 if (hw
->mac
.type
!= e1000_i354
)
7686 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
7688 wr32(E1000_DMACR
, reg
);
7690 /* no lower threshold to disable
7691 * coalescing(smart fifb)-UTRESH=0
7693 wr32(E1000_DMCRTRH
, 0);
7695 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
7697 wr32(E1000_DMCTLX
, reg
);
7699 /* free space in tx packet buffer to wake from
7702 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
7703 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
7705 /* make low power state decision controlled
7708 reg
= rd32(E1000_PCIEMISC
);
7709 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
7710 wr32(E1000_PCIEMISC
, reg
);
7711 } /* endif adapter->dmac is not disabled */
7712 } else if (hw
->mac
.type
== e1000_82580
) {
7713 u32 reg
= rd32(E1000_PCIEMISC
);
7714 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
7715 wr32(E1000_DMACR
, 0);
7720 * igb_read_i2c_byte - Reads 8 bit word over I2C
7721 * @hw: pointer to hardware structure
7722 * @byte_offset: byte offset to read
7723 * @dev_addr: device address
7726 * Performs byte read operation over I2C interface at
7727 * a specified device address.
7729 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
7730 u8 dev_addr
, u8
*data
)
7732 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
7733 struct i2c_client
*this_client
= adapter
->i2c_client
;
7738 return E1000_ERR_I2C
;
7740 swfw_mask
= E1000_SWFW_PHY0_SM
;
7742 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
)
7744 return E1000_ERR_SWFW_SYNC
;
7746 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
7747 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
7750 return E1000_ERR_I2C
;
7753 return E1000_SUCCESS
;
7758 * igb_write_i2c_byte - Writes 8 bit word over I2C
7759 * @hw: pointer to hardware structure
7760 * @byte_offset: byte offset to write
7761 * @dev_addr: device address
7762 * @data: value to write
7764 * Performs byte write operation over I2C interface at
7765 * a specified device address.
7767 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
7768 u8 dev_addr
, u8 data
)
7770 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
7771 struct i2c_client
*this_client
= adapter
->i2c_client
;
7773 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
7776 return E1000_ERR_I2C
;
7778 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
) != E1000_SUCCESS
)
7779 return E1000_ERR_SWFW_SYNC
;
7780 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
7781 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
7784 return E1000_ERR_I2C
;
7786 return E1000_SUCCESS
;