1 /*******************************************************************************
3 Intel(R) Gigabit Ethernet Linux driver
4 Copyright(c) 2007-2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/init.h>
33 #include <linux/bitops.h>
34 #include <linux/vmalloc.h>
35 #include <linux/pagemap.h>
36 #include <linux/netdevice.h>
37 #include <linux/ipv6.h>
38 #include <linux/slab.h>
39 #include <net/checksum.h>
40 #include <net/ip6_checksum.h>
41 #include <linux/net_tstamp.h>
42 #include <linux/mii.h>
43 #include <linux/ethtool.h>
45 #include <linux/if_vlan.h>
46 #include <linux/pci.h>
47 #include <linux/pci-aspm.h>
48 #include <linux/delay.h>
49 #include <linux/interrupt.h>
51 #include <linux/tcp.h>
52 #include <linux/sctp.h>
53 #include <linux/if_ether.h>
54 #include <linux/aer.h>
55 #include <linux/prefetch.h>
56 #include <linux/pm_runtime.h>
58 #include <linux/dca.h>
60 #include <linux/i2c.h>
66 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
67 __stringify(BUILD) "-k"
68 char igb_driver_name
[] = "igb";
69 char igb_driver_version
[] = DRV_VERSION
;
70 static const char igb_driver_string
[] =
71 "Intel(R) Gigabit Ethernet Network Driver";
72 static const char igb_copyright
[] =
73 "Copyright (c) 2007-2013 Intel Corporation.";
75 static const struct e1000_info
*igb_info_tbl
[] = {
76 [board_82575
] = &e1000_82575_info
,
79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl
) = {
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
110 /* required last entry */
114 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
116 void igb_reset(struct igb_adapter
*);
117 static int igb_setup_all_tx_resources(struct igb_adapter
*);
118 static int igb_setup_all_rx_resources(struct igb_adapter
*);
119 static void igb_free_all_tx_resources(struct igb_adapter
*);
120 static void igb_free_all_rx_resources(struct igb_adapter
*);
121 static void igb_setup_mrqc(struct igb_adapter
*);
122 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
123 static void igb_remove(struct pci_dev
*pdev
);
124 static int igb_sw_init(struct igb_adapter
*);
125 static int igb_open(struct net_device
*);
126 static int igb_close(struct net_device
*);
127 static void igb_configure(struct igb_adapter
*);
128 static void igb_configure_tx(struct igb_adapter
*);
129 static void igb_configure_rx(struct igb_adapter
*);
130 static void igb_clean_all_tx_rings(struct igb_adapter
*);
131 static void igb_clean_all_rx_rings(struct igb_adapter
*);
132 static void igb_clean_tx_ring(struct igb_ring
*);
133 static void igb_clean_rx_ring(struct igb_ring
*);
134 static void igb_set_rx_mode(struct net_device
*);
135 static void igb_update_phy_info(unsigned long);
136 static void igb_watchdog(unsigned long);
137 static void igb_watchdog_task(struct work_struct
*);
138 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
139 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
140 struct rtnl_link_stats64
*stats
);
141 static int igb_change_mtu(struct net_device
*, int);
142 static int igb_set_mac(struct net_device
*, void *);
143 static void igb_set_uta(struct igb_adapter
*adapter
);
144 static irqreturn_t
igb_intr(int irq
, void *);
145 static irqreturn_t
igb_intr_msi(int irq
, void *);
146 static irqreturn_t
igb_msix_other(int irq
, void *);
147 static irqreturn_t
igb_msix_ring(int irq
, void *);
148 #ifdef CONFIG_IGB_DCA
149 static void igb_update_dca(struct igb_q_vector
*);
150 static void igb_setup_dca(struct igb_adapter
*);
151 #endif /* CONFIG_IGB_DCA */
152 static int igb_poll(struct napi_struct
*, int);
153 static bool igb_clean_tx_irq(struct igb_q_vector
*);
154 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
155 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
156 static void igb_tx_timeout(struct net_device
*);
157 static void igb_reset_task(struct work_struct
*);
158 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
);
159 static int igb_vlan_rx_add_vid(struct net_device
*, u16
);
160 static int igb_vlan_rx_kill_vid(struct net_device
*, u16
);
161 static void igb_restore_vlan(struct igb_adapter
*);
162 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
163 static void igb_ping_all_vfs(struct igb_adapter
*);
164 static void igb_msg_task(struct igb_adapter
*);
165 static void igb_vmm_control(struct igb_adapter
*);
166 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
167 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
168 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
169 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
170 int vf
, u16 vlan
, u8 qos
);
171 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
);
172 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
173 struct ifla_vf_info
*ivi
);
174 static void igb_check_vf_rate_limit(struct igb_adapter
*);
176 #ifdef CONFIG_PCI_IOV
177 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
178 static bool igb_vfs_are_assigned(struct igb_adapter
*adapter
);
182 #ifdef CONFIG_PM_SLEEP
183 static int igb_suspend(struct device
*);
185 static int igb_resume(struct device
*);
186 #ifdef CONFIG_PM_RUNTIME
187 static int igb_runtime_suspend(struct device
*dev
);
188 static int igb_runtime_resume(struct device
*dev
);
189 static int igb_runtime_idle(struct device
*dev
);
191 static const struct dev_pm_ops igb_pm_ops
= {
192 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
193 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
197 static void igb_shutdown(struct pci_dev
*);
198 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
199 #ifdef CONFIG_IGB_DCA
200 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
201 static struct notifier_block dca_notifier
= {
202 .notifier_call
= igb_notify_dca
,
207 #ifdef CONFIG_NET_POLL_CONTROLLER
208 /* for netdump / net console */
209 static void igb_netpoll(struct net_device
*);
211 #ifdef CONFIG_PCI_IOV
212 static unsigned int max_vfs
= 0;
213 module_param(max_vfs
, uint
, 0);
214 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate "
215 "per physical function");
216 #endif /* CONFIG_PCI_IOV */
218 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
219 pci_channel_state_t
);
220 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
221 static void igb_io_resume(struct pci_dev
*);
223 static const struct pci_error_handlers igb_err_handler
= {
224 .error_detected
= igb_io_error_detected
,
225 .slot_reset
= igb_io_slot_reset
,
226 .resume
= igb_io_resume
,
229 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
231 static struct pci_driver igb_driver
= {
232 .name
= igb_driver_name
,
233 .id_table
= igb_pci_tbl
,
235 .remove
= igb_remove
,
237 .driver
.pm
= &igb_pm_ops
,
239 .shutdown
= igb_shutdown
,
240 .sriov_configure
= igb_pci_sriov_configure
,
241 .err_handler
= &igb_err_handler
244 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
245 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
246 MODULE_LICENSE("GPL");
247 MODULE_VERSION(DRV_VERSION
);
249 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
250 static int debug
= -1;
251 module_param(debug
, int, 0);
252 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
254 struct igb_reg_info
{
259 static const struct igb_reg_info igb_reg_info_tbl
[] = {
261 /* General Registers */
262 {E1000_CTRL
, "CTRL"},
263 {E1000_STATUS
, "STATUS"},
264 {E1000_CTRL_EXT
, "CTRL_EXT"},
266 /* Interrupt Registers */
270 {E1000_RCTL
, "RCTL"},
271 {E1000_RDLEN(0), "RDLEN"},
272 {E1000_RDH(0), "RDH"},
273 {E1000_RDT(0), "RDT"},
274 {E1000_RXDCTL(0), "RXDCTL"},
275 {E1000_RDBAL(0), "RDBAL"},
276 {E1000_RDBAH(0), "RDBAH"},
279 {E1000_TCTL
, "TCTL"},
280 {E1000_TDBAL(0), "TDBAL"},
281 {E1000_TDBAH(0), "TDBAH"},
282 {E1000_TDLEN(0), "TDLEN"},
283 {E1000_TDH(0), "TDH"},
284 {E1000_TDT(0), "TDT"},
285 {E1000_TXDCTL(0), "TXDCTL"},
286 {E1000_TDFH
, "TDFH"},
287 {E1000_TDFT
, "TDFT"},
288 {E1000_TDFHS
, "TDFHS"},
289 {E1000_TDFPC
, "TDFPC"},
291 /* List Terminator */
296 * igb_regdump - register printout routine
298 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
304 switch (reginfo
->ofs
) {
306 for (n
= 0; n
< 4; n
++)
307 regs
[n
] = rd32(E1000_RDLEN(n
));
310 for (n
= 0; n
< 4; n
++)
311 regs
[n
] = rd32(E1000_RDH(n
));
314 for (n
= 0; n
< 4; n
++)
315 regs
[n
] = rd32(E1000_RDT(n
));
317 case E1000_RXDCTL(0):
318 for (n
= 0; n
< 4; n
++)
319 regs
[n
] = rd32(E1000_RXDCTL(n
));
322 for (n
= 0; n
< 4; n
++)
323 regs
[n
] = rd32(E1000_RDBAL(n
));
326 for (n
= 0; n
< 4; n
++)
327 regs
[n
] = rd32(E1000_RDBAH(n
));
330 for (n
= 0; n
< 4; n
++)
331 regs
[n
] = rd32(E1000_RDBAL(n
));
334 for (n
= 0; n
< 4; n
++)
335 regs
[n
] = rd32(E1000_TDBAH(n
));
338 for (n
= 0; n
< 4; n
++)
339 regs
[n
] = rd32(E1000_TDLEN(n
));
342 for (n
= 0; n
< 4; n
++)
343 regs
[n
] = rd32(E1000_TDH(n
));
346 for (n
= 0; n
< 4; n
++)
347 regs
[n
] = rd32(E1000_TDT(n
));
349 case E1000_TXDCTL(0):
350 for (n
= 0; n
< 4; n
++)
351 regs
[n
] = rd32(E1000_TXDCTL(n
));
354 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
358 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
359 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
364 * igb_dump - Print registers, tx-rings and rx-rings
366 static void igb_dump(struct igb_adapter
*adapter
)
368 struct net_device
*netdev
= adapter
->netdev
;
369 struct e1000_hw
*hw
= &adapter
->hw
;
370 struct igb_reg_info
*reginfo
;
371 struct igb_ring
*tx_ring
;
372 union e1000_adv_tx_desc
*tx_desc
;
373 struct my_u0
{ u64 a
; u64 b
; } *u0
;
374 struct igb_ring
*rx_ring
;
375 union e1000_adv_rx_desc
*rx_desc
;
379 if (!netif_msg_hw(adapter
))
382 /* Print netdevice Info */
384 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
385 pr_info("Device Name state trans_start "
387 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
388 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
391 /* Print Registers */
392 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
393 pr_info(" Register Name Value\n");
394 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
395 reginfo
->name
; reginfo
++) {
396 igb_regdump(hw
, reginfo
);
399 /* Print TX Ring Summary */
400 if (!netdev
|| !netif_running(netdev
))
403 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
404 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
405 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
406 struct igb_tx_buffer
*buffer_info
;
407 tx_ring
= adapter
->tx_ring
[n
];
408 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
409 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
410 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
411 (u64
)dma_unmap_addr(buffer_info
, dma
),
412 dma_unmap_len(buffer_info
, len
),
413 buffer_info
->next_to_watch
,
414 (u64
)buffer_info
->time_stamp
);
418 if (!netif_msg_tx_done(adapter
))
419 goto rx_ring_summary
;
421 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
423 /* Transmit Descriptor Formats
425 * Advanced Transmit Descriptor
426 * +--------------------------------------------------------------+
427 * 0 | Buffer Address [63:0] |
428 * +--------------------------------------------------------------+
429 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
430 * +--------------------------------------------------------------+
431 * 63 46 45 40 39 38 36 35 32 31 24 15 0
434 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
435 tx_ring
= adapter
->tx_ring
[n
];
436 pr_info("------------------------------------\n");
437 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
438 pr_info("------------------------------------\n");
439 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
440 "[bi->dma ] leng ntw timestamp "
443 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
444 const char *next_desc
;
445 struct igb_tx_buffer
*buffer_info
;
446 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
447 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
448 u0
= (struct my_u0
*)tx_desc
;
449 if (i
== tx_ring
->next_to_use
&&
450 i
== tx_ring
->next_to_clean
)
451 next_desc
= " NTC/U";
452 else if (i
== tx_ring
->next_to_use
)
454 else if (i
== tx_ring
->next_to_clean
)
459 pr_info("T [0x%03X] %016llX %016llX %016llX"
460 " %04X %p %016llX %p%s\n", i
,
463 (u64
)dma_unmap_addr(buffer_info
, dma
),
464 dma_unmap_len(buffer_info
, len
),
465 buffer_info
->next_to_watch
,
466 (u64
)buffer_info
->time_stamp
,
467 buffer_info
->skb
, next_desc
);
469 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
470 print_hex_dump(KERN_INFO
, "",
472 16, 1, buffer_info
->skb
->data
,
473 dma_unmap_len(buffer_info
, len
),
478 /* Print RX Rings Summary */
480 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
481 pr_info("Queue [NTU] [NTC]\n");
482 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
483 rx_ring
= adapter
->rx_ring
[n
];
484 pr_info(" %5d %5X %5X\n",
485 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
489 if (!netif_msg_rx_status(adapter
))
492 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
494 /* Advanced Receive Descriptor (Read) Format
496 * +-----------------------------------------------------+
497 * 0 | Packet Buffer Address [63:1] |A0/NSE|
498 * +----------------------------------------------+------+
499 * 8 | Header Buffer Address [63:1] | DD |
500 * +-----------------------------------------------------+
503 * Advanced Receive Descriptor (Write-Back) Format
505 * 63 48 47 32 31 30 21 20 17 16 4 3 0
506 * +------------------------------------------------------+
507 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
508 * | Checksum Ident | | | | Type | Type |
509 * +------------------------------------------------------+
510 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
511 * +------------------------------------------------------+
512 * 63 48 47 32 31 20 19 0
515 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
516 rx_ring
= adapter
->rx_ring
[n
];
517 pr_info("------------------------------------\n");
518 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
519 pr_info("------------------------------------\n");
520 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
521 "[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
522 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
523 "----------- [bi->skb] <-- Adv Rx Write-Back format\n");
525 for (i
= 0; i
< rx_ring
->count
; i
++) {
526 const char *next_desc
;
527 struct igb_rx_buffer
*buffer_info
;
528 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
529 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
530 u0
= (struct my_u0
*)rx_desc
;
531 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
533 if (i
== rx_ring
->next_to_use
)
535 else if (i
== rx_ring
->next_to_clean
)
540 if (staterr
& E1000_RXD_STAT_DD
) {
541 /* Descriptor Done */
542 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
548 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
552 (u64
)buffer_info
->dma
,
555 if (netif_msg_pktdata(adapter
) &&
556 buffer_info
->dma
&& buffer_info
->page
) {
557 print_hex_dump(KERN_INFO
, "",
560 page_address(buffer_info
->page
) +
561 buffer_info
->page_offset
,
572 /* igb_get_i2c_data - Reads the I2C SDA data bit
573 * @hw: pointer to hardware structure
574 * @i2cctl: Current value of I2CCTL register
576 * Returns the I2C data bit value
578 static int igb_get_i2c_data(void *data
)
580 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
581 struct e1000_hw
*hw
= &adapter
->hw
;
582 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
584 return ((i2cctl
& E1000_I2C_DATA_IN
) != 0);
587 /* igb_set_i2c_data - Sets the I2C data bit
588 * @data: pointer to hardware structure
589 * @state: I2C data value (0 or 1) to set
591 * Sets the I2C data bit
593 static void igb_set_i2c_data(void *data
, int state
)
595 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
596 struct e1000_hw
*hw
= &adapter
->hw
;
597 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
600 i2cctl
|= E1000_I2C_DATA_OUT
;
602 i2cctl
&= ~E1000_I2C_DATA_OUT
;
604 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
605 i2cctl
|= E1000_I2C_CLK_OE_N
;
606 wr32(E1000_I2CPARAMS
, i2cctl
);
611 /* igb_set_i2c_clk - Sets the I2C SCL clock
612 * @data: pointer to hardware structure
613 * @state: state to set clock
615 * Sets the I2C clock line to state
617 static void igb_set_i2c_clk(void *data
, int state
)
619 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
620 struct e1000_hw
*hw
= &adapter
->hw
;
621 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
624 i2cctl
|= E1000_I2C_CLK_OUT
;
625 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
627 i2cctl
&= ~E1000_I2C_CLK_OUT
;
628 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
630 wr32(E1000_I2CPARAMS
, i2cctl
);
634 /* igb_get_i2c_clk - Gets the I2C SCL clock state
635 * @data: pointer to hardware structure
637 * Gets the I2C clock state
639 static int igb_get_i2c_clk(void *data
)
641 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
642 struct e1000_hw
*hw
= &adapter
->hw
;
643 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
645 return ((i2cctl
& E1000_I2C_CLK_IN
) != 0);
648 static const struct i2c_algo_bit_data igb_i2c_algo
= {
649 .setsda
= igb_set_i2c_data
,
650 .setscl
= igb_set_i2c_clk
,
651 .getsda
= igb_get_i2c_data
,
652 .getscl
= igb_get_i2c_clk
,
658 * igb_get_hw_dev - return device
659 * used by hardware layer to print debugging information
661 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
663 struct igb_adapter
*adapter
= hw
->back
;
664 return adapter
->netdev
;
668 * igb_init_module - Driver Registration Routine
670 * igb_init_module is the first routine called when the driver is
671 * loaded. All it does is register with the PCI subsystem.
673 static int __init
igb_init_module(void)
676 pr_info("%s - version %s\n",
677 igb_driver_string
, igb_driver_version
);
679 pr_info("%s\n", igb_copyright
);
681 #ifdef CONFIG_IGB_DCA
682 dca_register_notify(&dca_notifier
);
684 ret
= pci_register_driver(&igb_driver
);
688 module_init(igb_init_module
);
691 * igb_exit_module - Driver Exit Cleanup Routine
693 * igb_exit_module is called just before the driver is removed
696 static void __exit
igb_exit_module(void)
698 #ifdef CONFIG_IGB_DCA
699 dca_unregister_notify(&dca_notifier
);
701 pci_unregister_driver(&igb_driver
);
704 module_exit(igb_exit_module
);
706 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
708 * igb_cache_ring_register - Descriptor ring to register mapping
709 * @adapter: board private structure to initialize
711 * Once we know the feature-set enabled for the device, we'll cache
712 * the register offset the descriptor ring is assigned to.
714 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
717 u32 rbase_offset
= adapter
->vfs_allocated_count
;
719 switch (adapter
->hw
.mac
.type
) {
721 /* The queues are allocated for virtualization such that VF 0
722 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
723 * In order to avoid collision we start at the first free queue
724 * and continue consuming queues in the same sequence
726 if (adapter
->vfs_allocated_count
) {
727 for (; i
< adapter
->rss_queues
; i
++)
728 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
737 for (; i
< adapter
->num_rx_queues
; i
++)
738 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
739 for (; j
< adapter
->num_tx_queues
; j
++)
740 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
746 * igb_write_ivar - configure ivar for given MSI-X vector
747 * @hw: pointer to the HW structure
748 * @msix_vector: vector number we are allocating to a given ring
749 * @index: row index of IVAR register to write within IVAR table
750 * @offset: column offset of in IVAR, should be multiple of 8
752 * This function is intended to handle the writing of the IVAR register
753 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
754 * each containing an cause allocation for an Rx and Tx ring, and a
755 * variable number of rows depending on the number of queues supported.
757 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
758 int index
, int offset
)
760 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
762 /* clear any bits that are currently set */
763 ivar
&= ~((u32
)0xFF << offset
);
765 /* write vector and valid bit */
766 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
768 array_wr32(E1000_IVAR0
, index
, ivar
);
771 #define IGB_N0_QUEUE -1
772 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
774 struct igb_adapter
*adapter
= q_vector
->adapter
;
775 struct e1000_hw
*hw
= &adapter
->hw
;
776 int rx_queue
= IGB_N0_QUEUE
;
777 int tx_queue
= IGB_N0_QUEUE
;
780 if (q_vector
->rx
.ring
)
781 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
782 if (q_vector
->tx
.ring
)
783 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
785 switch (hw
->mac
.type
) {
787 /* The 82575 assigns vectors using a bitmask, which matches the
788 bitmask for the EICR/EIMS/EIMC registers. To assign one
789 or more queues to a vector, we write the appropriate bits
790 into the MSIXBM register for that vector. */
791 if (rx_queue
> IGB_N0_QUEUE
)
792 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
793 if (tx_queue
> IGB_N0_QUEUE
)
794 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
795 if (!adapter
->msix_entries
&& msix_vector
== 0)
796 msixbm
|= E1000_EIMS_OTHER
;
797 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
798 q_vector
->eims_value
= msixbm
;
802 * 82576 uses a table that essentially consists of 2 columns
803 * with 8 rows. The ordering is column-major so we use the
804 * lower 3 bits as the row index, and the 4th bit as the
807 if (rx_queue
> IGB_N0_QUEUE
)
808 igb_write_ivar(hw
, msix_vector
,
810 (rx_queue
& 0x8) << 1);
811 if (tx_queue
> IGB_N0_QUEUE
)
812 igb_write_ivar(hw
, msix_vector
,
814 ((tx_queue
& 0x8) << 1) + 8);
815 q_vector
->eims_value
= 1 << msix_vector
;
822 * On 82580 and newer adapters the scheme is similar to 82576
823 * however instead of ordering column-major we have things
824 * ordered row-major. So we traverse the table by using
825 * bit 0 as the column offset, and the remaining bits as the
828 if (rx_queue
> IGB_N0_QUEUE
)
829 igb_write_ivar(hw
, msix_vector
,
831 (rx_queue
& 0x1) << 4);
832 if (tx_queue
> IGB_N0_QUEUE
)
833 igb_write_ivar(hw
, msix_vector
,
835 ((tx_queue
& 0x1) << 4) + 8);
836 q_vector
->eims_value
= 1 << msix_vector
;
843 /* add q_vector eims value to global eims_enable_mask */
844 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
846 /* configure q_vector to set itr on first interrupt */
847 q_vector
->set_itr
= 1;
851 * igb_configure_msix - Configure MSI-X hardware
853 * igb_configure_msix sets up the hardware to properly
854 * generate MSI-X interrupts.
856 static void igb_configure_msix(struct igb_adapter
*adapter
)
860 struct e1000_hw
*hw
= &adapter
->hw
;
862 adapter
->eims_enable_mask
= 0;
864 /* set vector for other causes, i.e. link changes */
865 switch (hw
->mac
.type
) {
867 tmp
= rd32(E1000_CTRL_EXT
);
868 /* enable MSI-X PBA support*/
869 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
871 /* Auto-Mask interrupts upon ICR read. */
872 tmp
|= E1000_CTRL_EXT_EIAME
;
873 tmp
|= E1000_CTRL_EXT_IRCA
;
875 wr32(E1000_CTRL_EXT
, tmp
);
877 /* enable msix_other interrupt */
878 array_wr32(E1000_MSIXBM(0), vector
++,
880 adapter
->eims_other
= E1000_EIMS_OTHER
;
889 /* Turn on MSI-X capability first, or our settings
890 * won't stick. And it will take days to debug. */
891 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
892 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
895 /* enable msix_other interrupt */
896 adapter
->eims_other
= 1 << vector
;
897 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
899 wr32(E1000_IVAR_MISC
, tmp
);
902 /* do nothing, since nothing else supports MSI-X */
904 } /* switch (hw->mac.type) */
906 adapter
->eims_enable_mask
|= adapter
->eims_other
;
908 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
909 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
915 * igb_request_msix - Initialize MSI-X interrupts
917 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
920 static int igb_request_msix(struct igb_adapter
*adapter
)
922 struct net_device
*netdev
= adapter
->netdev
;
923 struct e1000_hw
*hw
= &adapter
->hw
;
924 int i
, err
= 0, vector
= 0, free_vector
= 0;
926 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
927 igb_msix_other
, 0, netdev
->name
, adapter
);
931 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
932 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
936 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
938 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
939 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
940 q_vector
->rx
.ring
->queue_index
);
941 else if (q_vector
->tx
.ring
)
942 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
943 q_vector
->tx
.ring
->queue_index
);
944 else if (q_vector
->rx
.ring
)
945 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
946 q_vector
->rx
.ring
->queue_index
);
948 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
950 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
951 igb_msix_ring
, 0, q_vector
->name
,
957 igb_configure_msix(adapter
);
961 /* free already assigned IRQs */
962 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
965 for (i
= 0; i
< vector
; i
++) {
966 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
967 adapter
->q_vector
[i
]);
973 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
975 if (adapter
->msix_entries
) {
976 pci_disable_msix(adapter
->pdev
);
977 kfree(adapter
->msix_entries
);
978 adapter
->msix_entries
= NULL
;
979 } else if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
980 pci_disable_msi(adapter
->pdev
);
985 * igb_free_q_vector - Free memory allocated for specific interrupt vector
986 * @adapter: board private structure to initialize
987 * @v_idx: Index of vector to be freed
989 * This function frees the memory allocated to the q_vector. In addition if
990 * NAPI is enabled it will delete any references to the NAPI struct prior
991 * to freeing the q_vector.
993 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
995 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
997 if (q_vector
->tx
.ring
)
998 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1000 if (q_vector
->rx
.ring
)
1001 adapter
->tx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1003 adapter
->q_vector
[v_idx
] = NULL
;
1004 netif_napi_del(&q_vector
->napi
);
1007 * ixgbe_get_stats64() might access the rings on this vector,
1008 * we must wait a grace period before freeing it.
1010 kfree_rcu(q_vector
, rcu
);
1014 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1015 * @adapter: board private structure to initialize
1017 * This function frees the memory allocated to the q_vectors. In addition if
1018 * NAPI is enabled it will delete any references to the NAPI struct prior
1019 * to freeing the q_vector.
1021 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1023 int v_idx
= adapter
->num_q_vectors
;
1025 adapter
->num_tx_queues
= 0;
1026 adapter
->num_rx_queues
= 0;
1027 adapter
->num_q_vectors
= 0;
1030 igb_free_q_vector(adapter
, v_idx
);
1034 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1036 * This function resets the device so that it has 0 rx queues, tx queues, and
1037 * MSI-X interrupts allocated.
1039 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1041 igb_free_q_vectors(adapter
);
1042 igb_reset_interrupt_capability(adapter
);
1046 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1048 * Attempt to configure interrupts using the best available
1049 * capabilities of the hardware and kernel.
1051 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1059 /* Number of supported queues. */
1060 adapter
->num_rx_queues
= adapter
->rss_queues
;
1061 if (adapter
->vfs_allocated_count
)
1062 adapter
->num_tx_queues
= 1;
1064 adapter
->num_tx_queues
= adapter
->rss_queues
;
1066 /* start with one vector for every rx queue */
1067 numvecs
= adapter
->num_rx_queues
;
1069 /* if tx handler is separate add 1 for every tx queue */
1070 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1071 numvecs
+= adapter
->num_tx_queues
;
1073 /* store the number of vectors reserved for queues */
1074 adapter
->num_q_vectors
= numvecs
;
1076 /* add 1 vector for link status interrupts */
1078 adapter
->msix_entries
= kcalloc(numvecs
, sizeof(struct msix_entry
),
1081 if (!adapter
->msix_entries
)
1084 for (i
= 0; i
< numvecs
; i
++)
1085 adapter
->msix_entries
[i
].entry
= i
;
1087 err
= pci_enable_msix(adapter
->pdev
,
1088 adapter
->msix_entries
,
1093 igb_reset_interrupt_capability(adapter
);
1095 /* If we can't do MSI-X, try MSI */
1097 #ifdef CONFIG_PCI_IOV
1098 /* disable SR-IOV for non MSI-X configurations */
1099 if (adapter
->vf_data
) {
1100 struct e1000_hw
*hw
= &adapter
->hw
;
1101 /* disable iov and allow time for transactions to clear */
1102 pci_disable_sriov(adapter
->pdev
);
1105 kfree(adapter
->vf_data
);
1106 adapter
->vf_data
= NULL
;
1107 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1110 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1113 adapter
->vfs_allocated_count
= 0;
1114 adapter
->rss_queues
= 1;
1115 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1116 adapter
->num_rx_queues
= 1;
1117 adapter
->num_tx_queues
= 1;
1118 adapter
->num_q_vectors
= 1;
1119 if (!pci_enable_msi(adapter
->pdev
))
1120 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1123 static void igb_add_ring(struct igb_ring
*ring
,
1124 struct igb_ring_container
*head
)
1131 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1132 * @adapter: board private structure to initialize
1133 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1134 * @v_idx: index of vector in adapter struct
1135 * @txr_count: total number of Tx rings to allocate
1136 * @txr_idx: index of first Tx ring to allocate
1137 * @rxr_count: total number of Rx rings to allocate
1138 * @rxr_idx: index of first Rx ring to allocate
1140 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1142 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1143 int v_count
, int v_idx
,
1144 int txr_count
, int txr_idx
,
1145 int rxr_count
, int rxr_idx
)
1147 struct igb_q_vector
*q_vector
;
1148 struct igb_ring
*ring
;
1149 int ring_count
, size
;
1151 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1152 if (txr_count
> 1 || rxr_count
> 1)
1155 ring_count
= txr_count
+ rxr_count
;
1156 size
= sizeof(struct igb_q_vector
) +
1157 (sizeof(struct igb_ring
) * ring_count
);
1159 /* allocate q_vector and rings */
1160 q_vector
= kzalloc(size
, GFP_KERNEL
);
1164 /* initialize NAPI */
1165 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1168 /* tie q_vector and adapter together */
1169 adapter
->q_vector
[v_idx
] = q_vector
;
1170 q_vector
->adapter
= adapter
;
1172 /* initialize work limits */
1173 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1175 /* initialize ITR configuration */
1176 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1177 q_vector
->itr_val
= IGB_START_ITR
;
1179 /* initialize pointer to rings */
1180 ring
= q_vector
->ring
;
1183 /* assign generic ring traits */
1184 ring
->dev
= &adapter
->pdev
->dev
;
1185 ring
->netdev
= adapter
->netdev
;
1187 /* configure backlink on ring */
1188 ring
->q_vector
= q_vector
;
1190 /* update q_vector Tx values */
1191 igb_add_ring(ring
, &q_vector
->tx
);
1193 /* For 82575, context index must be unique per ring. */
1194 if (adapter
->hw
.mac
.type
== e1000_82575
)
1195 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1197 /* apply Tx specific ring traits */
1198 ring
->count
= adapter
->tx_ring_count
;
1199 ring
->queue_index
= txr_idx
;
1201 /* assign ring to adapter */
1202 adapter
->tx_ring
[txr_idx
] = ring
;
1204 /* push pointer to next ring */
1209 /* assign generic ring traits */
1210 ring
->dev
= &adapter
->pdev
->dev
;
1211 ring
->netdev
= adapter
->netdev
;
1213 /* configure backlink on ring */
1214 ring
->q_vector
= q_vector
;
1216 /* update q_vector Rx values */
1217 igb_add_ring(ring
, &q_vector
->rx
);
1219 /* set flag indicating ring supports SCTP checksum offload */
1220 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1221 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1224 * On i350, i210, and i211, loopback VLAN packets
1225 * have the tag byte-swapped.
1227 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1228 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1230 /* apply Rx specific ring traits */
1231 ring
->count
= adapter
->rx_ring_count
;
1232 ring
->queue_index
= rxr_idx
;
1234 /* assign ring to adapter */
1235 adapter
->rx_ring
[rxr_idx
] = ring
;
1243 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1244 * @adapter: board private structure to initialize
1246 * We allocate one q_vector per queue interrupt. If allocation fails we
1249 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1251 int q_vectors
= adapter
->num_q_vectors
;
1252 int rxr_remaining
= adapter
->num_rx_queues
;
1253 int txr_remaining
= adapter
->num_tx_queues
;
1254 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1257 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1258 for (; rxr_remaining
; v_idx
++) {
1259 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1265 /* update counts and index */
1271 for (; v_idx
< q_vectors
; v_idx
++) {
1272 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1273 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1274 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1275 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1280 /* update counts and index */
1281 rxr_remaining
-= rqpv
;
1282 txr_remaining
-= tqpv
;
1290 adapter
->num_tx_queues
= 0;
1291 adapter
->num_rx_queues
= 0;
1292 adapter
->num_q_vectors
= 0;
1295 igb_free_q_vector(adapter
, v_idx
);
1301 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1303 * This function initializes the interrupts and allocates all of the queues.
1305 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1307 struct pci_dev
*pdev
= adapter
->pdev
;
1310 igb_set_interrupt_capability(adapter
, msix
);
1312 err
= igb_alloc_q_vectors(adapter
);
1314 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1315 goto err_alloc_q_vectors
;
1318 igb_cache_ring_register(adapter
);
1322 err_alloc_q_vectors
:
1323 igb_reset_interrupt_capability(adapter
);
1328 * igb_request_irq - initialize interrupts
1330 * Attempts to configure interrupts using the best available
1331 * capabilities of the hardware and kernel.
1333 static int igb_request_irq(struct igb_adapter
*adapter
)
1335 struct net_device
*netdev
= adapter
->netdev
;
1336 struct pci_dev
*pdev
= adapter
->pdev
;
1339 if (adapter
->msix_entries
) {
1340 err
= igb_request_msix(adapter
);
1343 /* fall back to MSI */
1344 igb_free_all_tx_resources(adapter
);
1345 igb_free_all_rx_resources(adapter
);
1347 igb_clear_interrupt_scheme(adapter
);
1348 err
= igb_init_interrupt_scheme(adapter
, false);
1352 igb_setup_all_tx_resources(adapter
);
1353 igb_setup_all_rx_resources(adapter
);
1354 igb_configure(adapter
);
1357 igb_assign_vector(adapter
->q_vector
[0], 0);
1359 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1360 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1361 netdev
->name
, adapter
);
1365 /* fall back to legacy interrupts */
1366 igb_reset_interrupt_capability(adapter
);
1367 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1370 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1371 netdev
->name
, adapter
);
1374 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1381 static void igb_free_irq(struct igb_adapter
*adapter
)
1383 if (adapter
->msix_entries
) {
1386 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1388 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1389 free_irq(adapter
->msix_entries
[vector
++].vector
,
1390 adapter
->q_vector
[i
]);
1392 free_irq(adapter
->pdev
->irq
, adapter
);
1397 * igb_irq_disable - Mask off interrupt generation on the NIC
1398 * @adapter: board private structure
1400 static void igb_irq_disable(struct igb_adapter
*adapter
)
1402 struct e1000_hw
*hw
= &adapter
->hw
;
1405 * we need to be careful when disabling interrupts. The VFs are also
1406 * mapped into these registers and so clearing the bits can cause
1407 * issues on the VF drivers so we only need to clear what we set
1409 if (adapter
->msix_entries
) {
1410 u32 regval
= rd32(E1000_EIAM
);
1411 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1412 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1413 regval
= rd32(E1000_EIAC
);
1414 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1418 wr32(E1000_IMC
, ~0);
1420 if (adapter
->msix_entries
) {
1422 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1423 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1425 synchronize_irq(adapter
->pdev
->irq
);
1430 * igb_irq_enable - Enable default interrupt generation settings
1431 * @adapter: board private structure
1433 static void igb_irq_enable(struct igb_adapter
*adapter
)
1435 struct e1000_hw
*hw
= &adapter
->hw
;
1437 if (adapter
->msix_entries
) {
1438 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1439 u32 regval
= rd32(E1000_EIAC
);
1440 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1441 regval
= rd32(E1000_EIAM
);
1442 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1443 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1444 if (adapter
->vfs_allocated_count
) {
1445 wr32(E1000_MBVFIMR
, 0xFF);
1446 ims
|= E1000_IMS_VMMB
;
1448 wr32(E1000_IMS
, ims
);
1450 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1452 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1457 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1459 struct e1000_hw
*hw
= &adapter
->hw
;
1460 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1461 u16 old_vid
= adapter
->mng_vlan_id
;
1463 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1464 /* add VID to filter table */
1465 igb_vfta_set(hw
, vid
, true);
1466 adapter
->mng_vlan_id
= vid
;
1468 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1471 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1473 !test_bit(old_vid
, adapter
->active_vlans
)) {
1474 /* remove VID from filter table */
1475 igb_vfta_set(hw
, old_vid
, false);
1480 * igb_release_hw_control - release control of the h/w to f/w
1481 * @adapter: address of board private structure
1483 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1484 * For ASF and Pass Through versions of f/w this means that the
1485 * driver is no longer loaded.
1488 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1490 struct e1000_hw
*hw
= &adapter
->hw
;
1493 /* Let firmware take over control of h/w */
1494 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1495 wr32(E1000_CTRL_EXT
,
1496 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1500 * igb_get_hw_control - get control of the h/w from f/w
1501 * @adapter: address of board private structure
1503 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1504 * For ASF and Pass Through versions of f/w this means that
1505 * the driver is loaded.
1508 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1510 struct e1000_hw
*hw
= &adapter
->hw
;
1513 /* Let firmware know the driver has taken over */
1514 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1515 wr32(E1000_CTRL_EXT
,
1516 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1520 * igb_configure - configure the hardware for RX and TX
1521 * @adapter: private board structure
1523 static void igb_configure(struct igb_adapter
*adapter
)
1525 struct net_device
*netdev
= adapter
->netdev
;
1528 igb_get_hw_control(adapter
);
1529 igb_set_rx_mode(netdev
);
1531 igb_restore_vlan(adapter
);
1533 igb_setup_tctl(adapter
);
1534 igb_setup_mrqc(adapter
);
1535 igb_setup_rctl(adapter
);
1537 igb_configure_tx(adapter
);
1538 igb_configure_rx(adapter
);
1540 igb_rx_fifo_flush_82575(&adapter
->hw
);
1542 /* call igb_desc_unused which always leaves
1543 * at least 1 descriptor unused to make sure
1544 * next_to_use != next_to_clean */
1545 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1546 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1547 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1552 * igb_power_up_link - Power up the phy/serdes link
1553 * @adapter: address of board private structure
1555 void igb_power_up_link(struct igb_adapter
*adapter
)
1557 igb_reset_phy(&adapter
->hw
);
1559 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1560 igb_power_up_phy_copper(&adapter
->hw
);
1562 igb_power_up_serdes_link_82575(&adapter
->hw
);
1566 * igb_power_down_link - Power down the phy/serdes link
1567 * @adapter: address of board private structure
1569 static void igb_power_down_link(struct igb_adapter
*adapter
)
1571 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1572 igb_power_down_phy_copper_82575(&adapter
->hw
);
1574 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1578 * igb_up - Open the interface and prepare it to handle traffic
1579 * @adapter: board private structure
1581 int igb_up(struct igb_adapter
*adapter
)
1583 struct e1000_hw
*hw
= &adapter
->hw
;
1586 /* hardware has been reset, we need to reload some things */
1587 igb_configure(adapter
);
1589 clear_bit(__IGB_DOWN
, &adapter
->state
);
1591 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1592 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1594 if (adapter
->msix_entries
)
1595 igb_configure_msix(adapter
);
1597 igb_assign_vector(adapter
->q_vector
[0], 0);
1599 /* Clear any pending interrupts. */
1601 igb_irq_enable(adapter
);
1603 /* notify VFs that reset has been completed */
1604 if (adapter
->vfs_allocated_count
) {
1605 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1606 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1607 wr32(E1000_CTRL_EXT
, reg_data
);
1610 netif_tx_start_all_queues(adapter
->netdev
);
1612 /* start the watchdog. */
1613 hw
->mac
.get_link_status
= 1;
1614 schedule_work(&adapter
->watchdog_task
);
1619 void igb_down(struct igb_adapter
*adapter
)
1621 struct net_device
*netdev
= adapter
->netdev
;
1622 struct e1000_hw
*hw
= &adapter
->hw
;
1626 /* signal that we're down so the interrupt handler does not
1627 * reschedule our watchdog timer */
1628 set_bit(__IGB_DOWN
, &adapter
->state
);
1630 /* disable receives in the hardware */
1631 rctl
= rd32(E1000_RCTL
);
1632 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1633 /* flush and sleep below */
1635 netif_tx_stop_all_queues(netdev
);
1637 /* disable transmits in the hardware */
1638 tctl
= rd32(E1000_TCTL
);
1639 tctl
&= ~E1000_TCTL_EN
;
1640 wr32(E1000_TCTL
, tctl
);
1641 /* flush both disables and wait for them to finish */
1645 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1646 napi_disable(&(adapter
->q_vector
[i
]->napi
));
1648 igb_irq_disable(adapter
);
1650 del_timer_sync(&adapter
->watchdog_timer
);
1651 del_timer_sync(&adapter
->phy_info_timer
);
1653 netif_carrier_off(netdev
);
1655 /* record the stats before reset*/
1656 spin_lock(&adapter
->stats64_lock
);
1657 igb_update_stats(adapter
, &adapter
->stats64
);
1658 spin_unlock(&adapter
->stats64_lock
);
1660 adapter
->link_speed
= 0;
1661 adapter
->link_duplex
= 0;
1663 if (!pci_channel_offline(adapter
->pdev
))
1665 igb_clean_all_tx_rings(adapter
);
1666 igb_clean_all_rx_rings(adapter
);
1667 #ifdef CONFIG_IGB_DCA
1669 /* since we reset the hardware DCA settings were cleared */
1670 igb_setup_dca(adapter
);
1674 void igb_reinit_locked(struct igb_adapter
*adapter
)
1676 WARN_ON(in_interrupt());
1677 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1681 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1684 void igb_reset(struct igb_adapter
*adapter
)
1686 struct pci_dev
*pdev
= adapter
->pdev
;
1687 struct e1000_hw
*hw
= &adapter
->hw
;
1688 struct e1000_mac_info
*mac
= &hw
->mac
;
1689 struct e1000_fc_info
*fc
= &hw
->fc
;
1690 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1692 /* Repartition Pba for greater than 9k mtu
1693 * To take effect CTRL.RST is required.
1695 switch (mac
->type
) {
1698 pba
= rd32(E1000_RXPBS
);
1699 pba
= igb_rxpbs_adjust_82580(pba
);
1702 pba
= rd32(E1000_RXPBS
);
1703 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1709 pba
= E1000_PBA_34K
;
1713 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1714 (mac
->type
< e1000_82576
)) {
1715 /* adjust PBA for jumbo frames */
1716 wr32(E1000_PBA
, pba
);
1718 /* To maintain wire speed transmits, the Tx FIFO should be
1719 * large enough to accommodate two full transmit packets,
1720 * rounded up to the next 1KB and expressed in KB. Likewise,
1721 * the Rx FIFO should be large enough to accommodate at least
1722 * one full receive packet and is similarly rounded up and
1723 * expressed in KB. */
1724 pba
= rd32(E1000_PBA
);
1725 /* upper 16 bits has Tx packet buffer allocation size in KB */
1726 tx_space
= pba
>> 16;
1727 /* lower 16 bits has Rx packet buffer allocation size in KB */
1729 /* the tx fifo also stores 16 bytes of information about the tx
1730 * but don't include ethernet FCS because hardware appends it */
1731 min_tx_space
= (adapter
->max_frame_size
+
1732 sizeof(union e1000_adv_tx_desc
) -
1734 min_tx_space
= ALIGN(min_tx_space
, 1024);
1735 min_tx_space
>>= 10;
1736 /* software strips receive CRC, so leave room for it */
1737 min_rx_space
= adapter
->max_frame_size
;
1738 min_rx_space
= ALIGN(min_rx_space
, 1024);
1739 min_rx_space
>>= 10;
1741 /* If current Tx allocation is less than the min Tx FIFO size,
1742 * and the min Tx FIFO size is less than the current Rx FIFO
1743 * allocation, take space away from current Rx allocation */
1744 if (tx_space
< min_tx_space
&&
1745 ((min_tx_space
- tx_space
) < pba
)) {
1746 pba
= pba
- (min_tx_space
- tx_space
);
1748 /* if short on rx space, rx wins and must trump tx
1750 if (pba
< min_rx_space
)
1753 wr32(E1000_PBA
, pba
);
1756 /* flow control settings */
1757 /* The high water mark must be low enough to fit one full frame
1758 * (or the size used for early receive) above it in the Rx FIFO.
1759 * Set it to the lower of:
1760 * - 90% of the Rx FIFO size, or
1761 * - the full Rx FIFO size minus one full frame */
1762 hwm
= min(((pba
<< 10) * 9 / 10),
1763 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1765 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1766 fc
->low_water
= fc
->high_water
- 16;
1767 fc
->pause_time
= 0xFFFF;
1769 fc
->current_mode
= fc
->requested_mode
;
1771 /* disable receive for all VFs and wait one second */
1772 if (adapter
->vfs_allocated_count
) {
1774 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1775 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1777 /* ping all the active vfs to let them know we are going down */
1778 igb_ping_all_vfs(adapter
);
1780 /* disable transmits and receives */
1781 wr32(E1000_VFRE
, 0);
1782 wr32(E1000_VFTE
, 0);
1785 /* Allow time for pending master requests to run */
1786 hw
->mac
.ops
.reset_hw(hw
);
1789 if (hw
->mac
.ops
.init_hw(hw
))
1790 dev_err(&pdev
->dev
, "Hardware Error\n");
1793 * Flow control settings reset on hardware reset, so guarantee flow
1794 * control is off when forcing speed.
1796 if (!hw
->mac
.autoneg
)
1797 igb_force_mac_fc(hw
);
1799 igb_init_dmac(adapter
, pba
);
1800 #ifdef CONFIG_IGB_HWMON
1801 /* Re-initialize the thermal sensor on i350 devices. */
1802 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1803 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
1804 /* If present, re-initialize the external thermal sensor
1808 mac
->ops
.init_thermal_sensor_thresh(hw
);
1812 if (!netif_running(adapter
->netdev
))
1813 igb_power_down_link(adapter
);
1815 igb_update_mng_vlan(adapter
);
1817 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1818 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
1820 /* Re-enable PTP, where applicable. */
1821 igb_ptp_reset(adapter
);
1823 igb_get_phy_info(hw
);
1826 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
1827 netdev_features_t features
)
1830 * Since there is no support for separate rx/tx vlan accel
1831 * enable/disable make sure tx flag is always in same state as rx.
1833 if (features
& NETIF_F_HW_VLAN_RX
)
1834 features
|= NETIF_F_HW_VLAN_TX
;
1836 features
&= ~NETIF_F_HW_VLAN_TX
;
1841 static int igb_set_features(struct net_device
*netdev
,
1842 netdev_features_t features
)
1844 netdev_features_t changed
= netdev
->features
^ features
;
1845 struct igb_adapter
*adapter
= netdev_priv(netdev
);
1847 if (changed
& NETIF_F_HW_VLAN_RX
)
1848 igb_vlan_mode(netdev
, features
);
1850 if (!(changed
& NETIF_F_RXALL
))
1853 netdev
->features
= features
;
1855 if (netif_running(netdev
))
1856 igb_reinit_locked(adapter
);
1863 static const struct net_device_ops igb_netdev_ops
= {
1864 .ndo_open
= igb_open
,
1865 .ndo_stop
= igb_close
,
1866 .ndo_start_xmit
= igb_xmit_frame
,
1867 .ndo_get_stats64
= igb_get_stats64
,
1868 .ndo_set_rx_mode
= igb_set_rx_mode
,
1869 .ndo_set_mac_address
= igb_set_mac
,
1870 .ndo_change_mtu
= igb_change_mtu
,
1871 .ndo_do_ioctl
= igb_ioctl
,
1872 .ndo_tx_timeout
= igb_tx_timeout
,
1873 .ndo_validate_addr
= eth_validate_addr
,
1874 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
1875 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
1876 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
1877 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
1878 .ndo_set_vf_tx_rate
= igb_ndo_set_vf_bw
,
1879 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
1880 #ifdef CONFIG_NET_POLL_CONTROLLER
1881 .ndo_poll_controller
= igb_netpoll
,
1883 .ndo_fix_features
= igb_fix_features
,
1884 .ndo_set_features
= igb_set_features
,
1888 * igb_set_fw_version - Configure version string for ethtool
1889 * @adapter: adapter struct
1892 void igb_set_fw_version(struct igb_adapter
*adapter
)
1894 struct e1000_hw
*hw
= &adapter
->hw
;
1895 struct e1000_fw_version fw
;
1897 igb_get_fw_version(hw
, &fw
);
1899 switch (hw
->mac
.type
) {
1901 snprintf(adapter
->fw_version
, sizeof(adapter
->fw_version
),
1903 fw
.invm_major
, fw
.invm_minor
, fw
.invm_img_type
);
1907 /* if option is rom valid, display its version too */
1909 snprintf(adapter
->fw_version
,
1910 sizeof(adapter
->fw_version
),
1911 "%d.%d, 0x%08x, %d.%d.%d",
1912 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
1913 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
1916 snprintf(adapter
->fw_version
,
1917 sizeof(adapter
->fw_version
),
1919 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
1926 /* igb_init_i2c - Init I2C interface
1927 * @adapter: pointer to adapter structure
1930 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
1932 s32 status
= E1000_SUCCESS
;
1934 /* I2C interface supported on i350 devices */
1935 if (adapter
->hw
.mac
.type
!= e1000_i350
)
1936 return E1000_SUCCESS
;
1938 /* Initialize the i2c bus which is controlled by the registers.
1939 * This bus will use the i2c_algo_bit structue that implements
1940 * the protocol through toggling of the 4 bits in the register.
1942 adapter
->i2c_adap
.owner
= THIS_MODULE
;
1943 adapter
->i2c_algo
= igb_i2c_algo
;
1944 adapter
->i2c_algo
.data
= adapter
;
1945 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
1946 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
1947 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
1948 sizeof(adapter
->i2c_adap
.name
));
1949 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
1954 * igb_probe - Device Initialization Routine
1955 * @pdev: PCI device information struct
1956 * @ent: entry in igb_pci_tbl
1958 * Returns 0 on success, negative on failure
1960 * igb_probe initializes an adapter identified by a pci_dev structure.
1961 * The OS initialization, configuring of the adapter private structure,
1962 * and a hardware reset occur.
1964 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1966 struct net_device
*netdev
;
1967 struct igb_adapter
*adapter
;
1968 struct e1000_hw
*hw
;
1969 u16 eeprom_data
= 0;
1971 static int global_quad_port_a
; /* global quad port a indication */
1972 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
1973 unsigned long mmio_start
, mmio_len
;
1974 int err
, pci_using_dac
;
1975 u8 part_str
[E1000_PBANUM_LENGTH
];
1977 /* Catch broken hardware that put the wrong VF device ID in
1978 * the PCIe SR-IOV capability.
1980 if (pdev
->is_virtfn
) {
1981 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
1982 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
1986 err
= pci_enable_device_mem(pdev
);
1991 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64));
1993 err
= dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64));
1997 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
1999 err
= dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(32));
2001 dev_err(&pdev
->dev
, "No usable DMA "
2002 "configuration, aborting\n");
2008 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2014 pci_enable_pcie_error_reporting(pdev
);
2016 pci_set_master(pdev
);
2017 pci_save_state(pdev
);
2020 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2023 goto err_alloc_etherdev
;
2025 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2027 pci_set_drvdata(pdev
, netdev
);
2028 adapter
= netdev_priv(netdev
);
2029 adapter
->netdev
= netdev
;
2030 adapter
->pdev
= pdev
;
2033 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2035 mmio_start
= pci_resource_start(pdev
, 0);
2036 mmio_len
= pci_resource_len(pdev
, 0);
2039 hw
->hw_addr
= ioremap(mmio_start
, mmio_len
);
2043 netdev
->netdev_ops
= &igb_netdev_ops
;
2044 igb_set_ethtool_ops(netdev
);
2045 netdev
->watchdog_timeo
= 5 * HZ
;
2047 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2049 netdev
->mem_start
= mmio_start
;
2050 netdev
->mem_end
= mmio_start
+ mmio_len
;
2052 /* PCI config space info */
2053 hw
->vendor_id
= pdev
->vendor
;
2054 hw
->device_id
= pdev
->device
;
2055 hw
->revision_id
= pdev
->revision
;
2056 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2057 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2059 /* Copy the default MAC, PHY and NVM function pointers */
2060 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2061 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2062 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2063 /* Initialize skew-specific constants */
2064 err
= ei
->get_invariants(hw
);
2068 /* setup the private structure */
2069 err
= igb_sw_init(adapter
);
2073 igb_get_bus_info_pcie(hw
);
2075 hw
->phy
.autoneg_wait_to_complete
= false;
2077 /* Copper options */
2078 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2079 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2080 hw
->phy
.disable_polarity_correction
= false;
2081 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2084 if (igb_check_reset_block(hw
))
2085 dev_info(&pdev
->dev
,
2086 "PHY reset is blocked due to SOL/IDER session.\n");
2089 * features is initialized to 0 in allocation, it might have bits
2090 * set by igb_sw_init so we should use an or instead of an
2093 netdev
->features
|= NETIF_F_SG
|
2100 NETIF_F_HW_VLAN_RX
|
2103 /* copy netdev features into list of user selectable features */
2104 netdev
->hw_features
|= netdev
->features
;
2105 netdev
->hw_features
|= NETIF_F_RXALL
;
2107 /* set this bit last since it cannot be part of hw_features */
2108 netdev
->features
|= NETIF_F_HW_VLAN_FILTER
;
2110 netdev
->vlan_features
|= NETIF_F_TSO
|
2116 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2118 if (pci_using_dac
) {
2119 netdev
->features
|= NETIF_F_HIGHDMA
;
2120 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2123 if (hw
->mac
.type
>= e1000_82576
) {
2124 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2125 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2128 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2130 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2132 /* before reading the NVM, reset the controller to put the device in a
2133 * known good starting state */
2134 hw
->mac
.ops
.reset_hw(hw
);
2137 * make sure the NVM is good , i211 parts have special NVM that
2138 * doesn't contain a checksum
2140 if (hw
->mac
.type
!= e1000_i211
) {
2141 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2142 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2148 /* copy the MAC address out of the NVM */
2149 if (hw
->mac
.ops
.read_mac_addr(hw
))
2150 dev_err(&pdev
->dev
, "NVM Read Error\n");
2152 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2154 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2155 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2160 /* get firmware version for ethtool -i */
2161 igb_set_fw_version(adapter
);
2163 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2164 (unsigned long) adapter
);
2165 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2166 (unsigned long) adapter
);
2168 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2169 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2171 /* Initialize link properties that are user-changeable */
2172 adapter
->fc_autoneg
= true;
2173 hw
->mac
.autoneg
= true;
2174 hw
->phy
.autoneg_advertised
= 0x2f;
2176 hw
->fc
.requested_mode
= e1000_fc_default
;
2177 hw
->fc
.current_mode
= e1000_fc_default
;
2179 igb_validate_mdi_setting(hw
);
2181 /* By default, support wake on port A */
2182 if (hw
->bus
.func
== 0)
2183 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2185 /* Check the NVM for wake support on non-port A ports */
2186 if (hw
->mac
.type
>= e1000_82580
)
2187 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2188 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2190 else if (hw
->bus
.func
== 1)
2191 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2193 if (eeprom_data
& IGB_EEPROM_APME
)
2194 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2196 /* now that we have the eeprom settings, apply the special cases where
2197 * the eeprom may be wrong or the board simply won't support wake on
2198 * lan on a particular port */
2199 switch (pdev
->device
) {
2200 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2201 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2203 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2204 case E1000_DEV_ID_82576_FIBER
:
2205 case E1000_DEV_ID_82576_SERDES
:
2206 /* Wake events only supported on port A for dual fiber
2207 * regardless of eeprom setting */
2208 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2209 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2211 case E1000_DEV_ID_82576_QUAD_COPPER
:
2212 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2213 /* if quad port adapter, disable WoL on all but port A */
2214 if (global_quad_port_a
!= 0)
2215 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2217 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2218 /* Reset for multiple quad port adapters */
2219 if (++global_quad_port_a
== 4)
2220 global_quad_port_a
= 0;
2223 /* If the device can't wake, don't set software support */
2224 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2225 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2228 /* initialize the wol settings based on the eeprom settings */
2229 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2230 adapter
->wol
|= E1000_WUFC_MAG
;
2232 /* Some vendors want WoL disabled by default, but still supported */
2233 if ((hw
->mac
.type
== e1000_i350
) &&
2234 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2235 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2239 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2240 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2242 /* reset the hardware with the new settings */
2245 /* Init the I2C interface */
2246 err
= igb_init_i2c(adapter
);
2248 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2252 /* let the f/w know that the h/w is now under the control of the
2254 igb_get_hw_control(adapter
);
2256 strcpy(netdev
->name
, "eth%d");
2257 err
= register_netdev(netdev
);
2261 /* carrier off reporting is important to ethtool even BEFORE open */
2262 netif_carrier_off(netdev
);
2264 #ifdef CONFIG_IGB_DCA
2265 if (dca_add_requester(&pdev
->dev
) == 0) {
2266 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2267 dev_info(&pdev
->dev
, "DCA enabled\n");
2268 igb_setup_dca(adapter
);
2272 #ifdef CONFIG_IGB_HWMON
2273 /* Initialize the thermal sensor on i350 devices. */
2274 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2278 * Read the NVM to determine if this i350 device supports an
2279 * external thermal sensor.
2281 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2282 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2283 adapter
->ets
= true;
2285 adapter
->ets
= false;
2286 if (igb_sysfs_init(adapter
))
2288 "failed to allocate sysfs resources\n");
2290 adapter
->ets
= false;
2293 /* do hw tstamp init after resetting */
2294 igb_ptp_init(adapter
);
2296 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2297 /* print bus type/speed/width info */
2298 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2300 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2301 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2303 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ? "Width x4" :
2304 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ? "Width x2" :
2305 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ? "Width x1" :
2309 ret_val
= igb_read_part_string(hw
, part_str
, E1000_PBANUM_LENGTH
);
2311 strcpy(part_str
, "Unknown");
2312 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2313 dev_info(&pdev
->dev
,
2314 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2315 adapter
->msix_entries
? "MSI-X" :
2316 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2317 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2318 switch (hw
->mac
.type
) {
2322 igb_set_eee_i350(hw
);
2328 pm_runtime_put_noidle(&pdev
->dev
);
2332 igb_release_hw_control(adapter
);
2333 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2335 if (!igb_check_reset_block(hw
))
2338 if (hw
->flash_address
)
2339 iounmap(hw
->flash_address
);
2341 igb_clear_interrupt_scheme(adapter
);
2342 iounmap(hw
->hw_addr
);
2344 free_netdev(netdev
);
2346 pci_release_selected_regions(pdev
,
2347 pci_select_bars(pdev
, IORESOURCE_MEM
));
2350 pci_disable_device(pdev
);
2354 #ifdef CONFIG_PCI_IOV
2355 static int igb_disable_sriov(struct pci_dev
*pdev
)
2357 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2358 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2359 struct e1000_hw
*hw
= &adapter
->hw
;
2361 /* reclaim resources allocated to VFs */
2362 if (adapter
->vf_data
) {
2363 /* disable iov and allow time for transactions to clear */
2364 if (igb_vfs_are_assigned(adapter
)) {
2365 dev_warn(&pdev
->dev
,
2366 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2369 pci_disable_sriov(pdev
);
2373 kfree(adapter
->vf_data
);
2374 adapter
->vf_data
= NULL
;
2375 adapter
->vfs_allocated_count
= 0;
2376 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2379 dev_info(&pdev
->dev
, "IOV Disabled\n");
2381 /* Re-enable DMA Coalescing flag since IOV is turned off */
2382 adapter
->flags
|= IGB_FLAG_DMAC
;
2388 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2390 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2391 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2392 int old_vfs
= pci_num_vf(pdev
);
2398 else if (old_vfs
&& old_vfs
== num_vfs
)
2400 else if (old_vfs
&& old_vfs
!= num_vfs
)
2401 err
= igb_disable_sriov(pdev
);
2411 adapter
->vfs_allocated_count
= num_vfs
;
2413 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2414 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2416 /* if allocation failed then we do not support SR-IOV */
2417 if (!adapter
->vf_data
) {
2418 adapter
->vfs_allocated_count
= 0;
2420 "Unable to allocate memory for VF Data Storage\n");
2425 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2429 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2430 adapter
->vfs_allocated_count
);
2431 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2432 igb_vf_configure(adapter
, i
);
2434 /* DMA Coalescing is not supported in IOV mode. */
2435 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2439 kfree(adapter
->vf_data
);
2440 adapter
->vf_data
= NULL
;
2441 adapter
->vfs_allocated_count
= 0;
2448 * igb_remove_i2c - Cleanup I2C interface
2449 * @adapter: pointer to adapter structure
2452 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2455 /* free the adapter bus structure */
2456 i2c_del_adapter(&adapter
->i2c_adap
);
2460 * igb_remove - Device Removal Routine
2461 * @pdev: PCI device information struct
2463 * igb_remove is called by the PCI subsystem to alert the driver
2464 * that it should release a PCI device. The could be caused by a
2465 * Hot-Plug event, or because the driver is going to be removed from
2468 static void igb_remove(struct pci_dev
*pdev
)
2470 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2471 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2472 struct e1000_hw
*hw
= &adapter
->hw
;
2474 pm_runtime_get_noresume(&pdev
->dev
);
2475 #ifdef CONFIG_IGB_HWMON
2476 igb_sysfs_exit(adapter
);
2478 igb_remove_i2c(adapter
);
2479 igb_ptp_stop(adapter
);
2481 * The watchdog timer may be rescheduled, so explicitly
2482 * disable watchdog from being rescheduled.
2484 set_bit(__IGB_DOWN
, &adapter
->state
);
2485 del_timer_sync(&adapter
->watchdog_timer
);
2486 del_timer_sync(&adapter
->phy_info_timer
);
2488 cancel_work_sync(&adapter
->reset_task
);
2489 cancel_work_sync(&adapter
->watchdog_task
);
2491 #ifdef CONFIG_IGB_DCA
2492 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2493 dev_info(&pdev
->dev
, "DCA disabled\n");
2494 dca_remove_requester(&pdev
->dev
);
2495 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2496 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2500 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2501 * would have already happened in close and is redundant. */
2502 igb_release_hw_control(adapter
);
2504 unregister_netdev(netdev
);
2506 igb_clear_interrupt_scheme(adapter
);
2508 #ifdef CONFIG_PCI_IOV
2509 igb_disable_sriov(pdev
);
2512 iounmap(hw
->hw_addr
);
2513 if (hw
->flash_address
)
2514 iounmap(hw
->flash_address
);
2515 pci_release_selected_regions(pdev
,
2516 pci_select_bars(pdev
, IORESOURCE_MEM
));
2518 kfree(adapter
->shadow_vfta
);
2519 free_netdev(netdev
);
2521 pci_disable_pcie_error_reporting(pdev
);
2523 pci_disable_device(pdev
);
2527 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2528 * @adapter: board private structure to initialize
2530 * This function initializes the vf specific data storage and then attempts to
2531 * allocate the VFs. The reason for ordering it this way is because it is much
2532 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2533 * the memory for the VFs.
2535 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2537 #ifdef CONFIG_PCI_IOV
2538 struct pci_dev
*pdev
= adapter
->pdev
;
2539 struct e1000_hw
*hw
= &adapter
->hw
;
2541 /* Virtualization features not supported on i210 family. */
2542 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2545 pci_sriov_set_totalvfs(pdev
, 7);
2546 igb_enable_sriov(pdev
, max_vfs
);
2548 #endif /* CONFIG_PCI_IOV */
2551 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2553 struct e1000_hw
*hw
= &adapter
->hw
;
2556 /* Determine the maximum number of RSS queues supported. */
2557 switch (hw
->mac
.type
) {
2559 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2563 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2566 /* I350 cannot do RSS and SR-IOV at the same time */
2567 if (!!adapter
->vfs_allocated_count
) {
2573 if (!!adapter
->vfs_allocated_count
) {
2580 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2584 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2586 /* Determine if we need to pair queues. */
2587 switch (hw
->mac
.type
) {
2590 /* Device supports enough interrupts without queue pairing. */
2594 * If VFs are going to be allocated with RSS queues then we
2595 * should pair the queues in order to conserve interrupts due
2596 * to limited supply.
2598 if ((adapter
->rss_queues
> 1) &&
2599 (adapter
->vfs_allocated_count
> 6))
2600 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2607 * If rss_queues > half of max_rss_queues, pair the queues in
2608 * order to conserve interrupts due to limited supply.
2610 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2611 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2617 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2618 * @adapter: board private structure to initialize
2620 * igb_sw_init initializes the Adapter private data structure.
2621 * Fields are initialized based on PCI device information and
2622 * OS network device settings (MTU size).
2624 static int igb_sw_init(struct igb_adapter
*adapter
)
2626 struct e1000_hw
*hw
= &adapter
->hw
;
2627 struct net_device
*netdev
= adapter
->netdev
;
2628 struct pci_dev
*pdev
= adapter
->pdev
;
2630 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2632 /* set default ring sizes */
2633 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2634 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2636 /* set default ITR values */
2637 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2638 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2640 /* set default work limits */
2641 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2643 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2645 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2647 spin_lock_init(&adapter
->stats64_lock
);
2648 #ifdef CONFIG_PCI_IOV
2649 switch (hw
->mac
.type
) {
2653 dev_warn(&pdev
->dev
,
2654 "Maximum of 7 VFs per PF, using max\n");
2655 max_vfs
= adapter
->vfs_allocated_count
= 7;
2657 adapter
->vfs_allocated_count
= max_vfs
;
2658 if (adapter
->vfs_allocated_count
)
2659 dev_warn(&pdev
->dev
,
2660 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2665 #endif /* CONFIG_PCI_IOV */
2667 igb_init_queue_configuration(adapter
);
2669 /* Setup and initialize a copy of the hw vlan table array */
2670 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2673 /* This call may decrease the number of queues */
2674 if (igb_init_interrupt_scheme(adapter
, true)) {
2675 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2679 igb_probe_vfs(adapter
);
2681 /* Explicitly disable IRQ since the NIC can be in any state. */
2682 igb_irq_disable(adapter
);
2684 if (hw
->mac
.type
>= e1000_i350
)
2685 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2687 set_bit(__IGB_DOWN
, &adapter
->state
);
2692 * igb_open - Called when a network interface is made active
2693 * @netdev: network interface device structure
2695 * Returns 0 on success, negative value on failure
2697 * The open entry point is called when a network interface is made
2698 * active by the system (IFF_UP). At this point all resources needed
2699 * for transmit and receive operations are allocated, the interrupt
2700 * handler is registered with the OS, the watchdog timer is started,
2701 * and the stack is notified that the interface is ready.
2703 static int __igb_open(struct net_device
*netdev
, bool resuming
)
2705 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2706 struct e1000_hw
*hw
= &adapter
->hw
;
2707 struct pci_dev
*pdev
= adapter
->pdev
;
2711 /* disallow open during test */
2712 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
2718 pm_runtime_get_sync(&pdev
->dev
);
2720 netif_carrier_off(netdev
);
2722 /* allocate transmit descriptors */
2723 err
= igb_setup_all_tx_resources(adapter
);
2727 /* allocate receive descriptors */
2728 err
= igb_setup_all_rx_resources(adapter
);
2732 igb_power_up_link(adapter
);
2734 /* before we allocate an interrupt, we must be ready to handle it.
2735 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2736 * as soon as we call pci_request_irq, so we have to setup our
2737 * clean_rx handler before we do so. */
2738 igb_configure(adapter
);
2740 err
= igb_request_irq(adapter
);
2744 /* Notify the stack of the actual queue counts. */
2745 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
2746 adapter
->num_tx_queues
);
2748 goto err_set_queues
;
2750 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
2751 adapter
->num_rx_queues
);
2753 goto err_set_queues
;
2755 /* From here on the code is the same as igb_up() */
2756 clear_bit(__IGB_DOWN
, &adapter
->state
);
2758 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
2759 napi_enable(&(adapter
->q_vector
[i
]->napi
));
2761 /* Clear any pending interrupts. */
2764 igb_irq_enable(adapter
);
2766 /* notify VFs that reset has been completed */
2767 if (adapter
->vfs_allocated_count
) {
2768 u32 reg_data
= rd32(E1000_CTRL_EXT
);
2769 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
2770 wr32(E1000_CTRL_EXT
, reg_data
);
2773 netif_tx_start_all_queues(netdev
);
2776 pm_runtime_put(&pdev
->dev
);
2778 /* start the watchdog. */
2779 hw
->mac
.get_link_status
= 1;
2780 schedule_work(&adapter
->watchdog_task
);
2785 igb_free_irq(adapter
);
2787 igb_release_hw_control(adapter
);
2788 igb_power_down_link(adapter
);
2789 igb_free_all_rx_resources(adapter
);
2791 igb_free_all_tx_resources(adapter
);
2795 pm_runtime_put(&pdev
->dev
);
2800 static int igb_open(struct net_device
*netdev
)
2802 return __igb_open(netdev
, false);
2806 * igb_close - Disables a network interface
2807 * @netdev: network interface device structure
2809 * Returns 0, this is not allowed to fail
2811 * The close entry point is called when an interface is de-activated
2812 * by the OS. The hardware is still under the driver's control, but
2813 * needs to be disabled. A global MAC reset is issued to stop the
2814 * hardware, and all transmit and receive resources are freed.
2816 static int __igb_close(struct net_device
*netdev
, bool suspending
)
2818 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2819 struct pci_dev
*pdev
= adapter
->pdev
;
2821 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
2824 pm_runtime_get_sync(&pdev
->dev
);
2827 igb_free_irq(adapter
);
2829 igb_free_all_tx_resources(adapter
);
2830 igb_free_all_rx_resources(adapter
);
2833 pm_runtime_put_sync(&pdev
->dev
);
2837 static int igb_close(struct net_device
*netdev
)
2839 return __igb_close(netdev
, false);
2843 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
2844 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2846 * Return 0 on success, negative on failure
2848 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
2850 struct device
*dev
= tx_ring
->dev
;
2853 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
2855 tx_ring
->tx_buffer_info
= vzalloc(size
);
2856 if (!tx_ring
->tx_buffer_info
)
2859 /* round up to nearest 4K */
2860 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
2861 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2863 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
2864 &tx_ring
->dma
, GFP_KERNEL
);
2868 tx_ring
->next_to_use
= 0;
2869 tx_ring
->next_to_clean
= 0;
2874 vfree(tx_ring
->tx_buffer_info
);
2875 tx_ring
->tx_buffer_info
= NULL
;
2876 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
2881 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
2882 * (Descriptors) for all queues
2883 * @adapter: board private structure
2885 * Return 0 on success, negative on failure
2887 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
2889 struct pci_dev
*pdev
= adapter
->pdev
;
2892 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2893 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
2896 "Allocation for Tx Queue %u failed\n", i
);
2897 for (i
--; i
>= 0; i
--)
2898 igb_free_tx_resources(adapter
->tx_ring
[i
]);
2907 * igb_setup_tctl - configure the transmit control registers
2908 * @adapter: Board private structure
2910 void igb_setup_tctl(struct igb_adapter
*adapter
)
2912 struct e1000_hw
*hw
= &adapter
->hw
;
2915 /* disable queue 0 which is enabled by default on 82575 and 82576 */
2916 wr32(E1000_TXDCTL(0), 0);
2918 /* Program the Transmit Control Register */
2919 tctl
= rd32(E1000_TCTL
);
2920 tctl
&= ~E1000_TCTL_CT
;
2921 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
2922 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
2924 igb_config_collision_dist(hw
);
2926 /* Enable transmits */
2927 tctl
|= E1000_TCTL_EN
;
2929 wr32(E1000_TCTL
, tctl
);
2933 * igb_configure_tx_ring - Configure transmit ring after Reset
2934 * @adapter: board private structure
2935 * @ring: tx ring to configure
2937 * Configure a transmit ring after a reset.
2939 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
2940 struct igb_ring
*ring
)
2942 struct e1000_hw
*hw
= &adapter
->hw
;
2944 u64 tdba
= ring
->dma
;
2945 int reg_idx
= ring
->reg_idx
;
2947 /* disable the queue */
2948 wr32(E1000_TXDCTL(reg_idx
), 0);
2952 wr32(E1000_TDLEN(reg_idx
),
2953 ring
->count
* sizeof(union e1000_adv_tx_desc
));
2954 wr32(E1000_TDBAL(reg_idx
),
2955 tdba
& 0x00000000ffffffffULL
);
2956 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
2958 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
2959 wr32(E1000_TDH(reg_idx
), 0);
2960 writel(0, ring
->tail
);
2962 txdctl
|= IGB_TX_PTHRESH
;
2963 txdctl
|= IGB_TX_HTHRESH
<< 8;
2964 txdctl
|= IGB_TX_WTHRESH
<< 16;
2966 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
2967 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
2971 * igb_configure_tx - Configure transmit Unit after Reset
2972 * @adapter: board private structure
2974 * Configure the Tx unit of the MAC after a reset.
2976 static void igb_configure_tx(struct igb_adapter
*adapter
)
2980 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2981 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2985 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
2986 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2988 * Returns 0 on success, negative on failure
2990 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
2992 struct device
*dev
= rx_ring
->dev
;
2995 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
2997 rx_ring
->rx_buffer_info
= vzalloc(size
);
2998 if (!rx_ring
->rx_buffer_info
)
3001 /* Round up to nearest 4K */
3002 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3003 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3005 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3006 &rx_ring
->dma
, GFP_KERNEL
);
3010 rx_ring
->next_to_alloc
= 0;
3011 rx_ring
->next_to_clean
= 0;
3012 rx_ring
->next_to_use
= 0;
3017 vfree(rx_ring
->rx_buffer_info
);
3018 rx_ring
->rx_buffer_info
= NULL
;
3019 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3024 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3025 * (Descriptors) for all queues
3026 * @adapter: board private structure
3028 * Return 0 on success, negative on failure
3030 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3032 struct pci_dev
*pdev
= adapter
->pdev
;
3035 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3036 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3039 "Allocation for Rx Queue %u failed\n", i
);
3040 for (i
--; i
>= 0; i
--)
3041 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3050 * igb_setup_mrqc - configure the multiple receive queue control registers
3051 * @adapter: Board private structure
3053 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3055 struct e1000_hw
*hw
= &adapter
->hw
;
3057 u32 j
, num_rx_queues
, shift
= 0;
3058 static const u32 rsskey
[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3059 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3060 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3063 /* Fill out hash function seeds */
3064 for (j
= 0; j
< 10; j
++)
3065 wr32(E1000_RSSRK(j
), rsskey
[j
]);
3067 num_rx_queues
= adapter
->rss_queues
;
3069 switch (hw
->mac
.type
) {
3074 /* 82576 supports 2 RSS queues for SR-IOV */
3075 if (adapter
->vfs_allocated_count
) {
3085 * Populate the indirection table 4 entries at a time. To do this
3086 * we are generating the results for n and n+2 and then interleaving
3087 * those with the results with n+1 and n+3.
3089 for (j
= 0; j
< 32; j
++) {
3090 /* first pass generates n and n+2 */
3091 u32 base
= ((j
* 0x00040004) + 0x00020000) * num_rx_queues
;
3092 u32 reta
= (base
& 0x07800780) >> (7 - shift
);
3094 /* second pass generates n+1 and n+3 */
3095 base
+= 0x00010001 * num_rx_queues
;
3096 reta
|= (base
& 0x07800780) << (1 + shift
);
3098 wr32(E1000_RETA(j
), reta
);
3102 * Disable raw packet checksumming so that RSS hash is placed in
3103 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3104 * offloads as they are enabled by default
3106 rxcsum
= rd32(E1000_RXCSUM
);
3107 rxcsum
|= E1000_RXCSUM_PCSD
;
3109 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3110 /* Enable Receive Checksum Offload for SCTP */
3111 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3113 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3114 wr32(E1000_RXCSUM
, rxcsum
);
3116 /* Generate RSS hash based on packet types, TCP/UDP
3117 * port numbers and/or IPv4/v6 src and dst addresses
3119 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3120 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3121 E1000_MRQC_RSS_FIELD_IPV6
|
3122 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3123 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3125 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3126 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3127 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3128 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3130 /* If VMDq is enabled then we set the appropriate mode for that, else
3131 * we default to RSS so that an RSS hash is calculated per packet even
3132 * if we are only using one queue */
3133 if (adapter
->vfs_allocated_count
) {
3134 if (hw
->mac
.type
> e1000_82575
) {
3135 /* Set the default pool for the PF's first queue */
3136 u32 vtctl
= rd32(E1000_VT_CTL
);
3137 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3138 E1000_VT_CTL_DISABLE_DEF_POOL
);
3139 vtctl
|= adapter
->vfs_allocated_count
<<
3140 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3141 wr32(E1000_VT_CTL
, vtctl
);
3143 if (adapter
->rss_queues
> 1)
3144 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3146 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3148 if (hw
->mac
.type
!= e1000_i211
)
3149 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3151 igb_vmm_control(adapter
);
3153 wr32(E1000_MRQC
, mrqc
);
3157 * igb_setup_rctl - configure the receive control registers
3158 * @adapter: Board private structure
3160 void igb_setup_rctl(struct igb_adapter
*adapter
)
3162 struct e1000_hw
*hw
= &adapter
->hw
;
3165 rctl
= rd32(E1000_RCTL
);
3167 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3168 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3170 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3171 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3174 * enable stripping of CRC. It's unlikely this will break BMC
3175 * redirection as it did with e1000. Newer features require
3176 * that the HW strips the CRC.
3178 rctl
|= E1000_RCTL_SECRC
;
3180 /* disable store bad packets and clear size bits. */
3181 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3183 /* enable LPE to prevent packets larger than max_frame_size */
3184 rctl
|= E1000_RCTL_LPE
;
3186 /* disable queue 0 to prevent tail write w/o re-config */
3187 wr32(E1000_RXDCTL(0), 0);
3189 /* Attention!!! For SR-IOV PF driver operations you must enable
3190 * queue drop for all VF and PF queues to prevent head of line blocking
3191 * if an un-trusted VF does not provide descriptors to hardware.
3193 if (adapter
->vfs_allocated_count
) {
3194 /* set all queue drop enable bits */
3195 wr32(E1000_QDE
, ALL_QUEUES
);
3198 /* This is useful for sniffing bad packets. */
3199 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3200 /* UPE and MPE will be handled by normal PROMISC logic
3201 * in e1000e_set_rx_mode */
3202 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3203 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3204 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3206 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3207 E1000_RCTL_DPF
| /* Allow filtered pause */
3208 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3209 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3210 * and that breaks VLANs.
3214 wr32(E1000_RCTL
, rctl
);
3217 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3220 struct e1000_hw
*hw
= &adapter
->hw
;
3223 /* if it isn't the PF check to see if VFs are enabled and
3224 * increase the size to support vlan tags */
3225 if (vfn
< adapter
->vfs_allocated_count
&&
3226 adapter
->vf_data
[vfn
].vlans_enabled
)
3227 size
+= VLAN_TAG_SIZE
;
3229 vmolr
= rd32(E1000_VMOLR(vfn
));
3230 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3231 vmolr
|= size
| E1000_VMOLR_LPE
;
3232 wr32(E1000_VMOLR(vfn
), vmolr
);
3238 * igb_rlpml_set - set maximum receive packet size
3239 * @adapter: board private structure
3241 * Configure maximum receivable packet size.
3243 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3245 u32 max_frame_size
= adapter
->max_frame_size
;
3246 struct e1000_hw
*hw
= &adapter
->hw
;
3247 u16 pf_id
= adapter
->vfs_allocated_count
;
3250 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3252 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3253 * to our max jumbo frame size, in case we need to enable
3254 * jumbo frames on one of the rings later.
3255 * This will not pass over-length frames into the default
3256 * queue because it's gated by the VMOLR.RLPML.
3258 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3261 wr32(E1000_RLPML
, max_frame_size
);
3264 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3267 struct e1000_hw
*hw
= &adapter
->hw
;
3271 * This register exists only on 82576 and newer so if we are older then
3272 * we should exit and do nothing
3274 if (hw
->mac
.type
< e1000_82576
)
3277 vmolr
= rd32(E1000_VMOLR(vfn
));
3278 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3280 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3282 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3284 /* clear all bits that might not be set */
3285 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3287 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3288 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3290 * for VMDq only allow the VFs and pool 0 to accept broadcast and
3293 if (vfn
<= adapter
->vfs_allocated_count
)
3294 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3296 wr32(E1000_VMOLR(vfn
), vmolr
);
3300 * igb_configure_rx_ring - Configure a receive ring after Reset
3301 * @adapter: board private structure
3302 * @ring: receive ring to be configured
3304 * Configure the Rx unit of the MAC after a reset.
3306 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3307 struct igb_ring
*ring
)
3309 struct e1000_hw
*hw
= &adapter
->hw
;
3310 u64 rdba
= ring
->dma
;
3311 int reg_idx
= ring
->reg_idx
;
3312 u32 srrctl
= 0, rxdctl
= 0;
3314 /* disable the queue */
3315 wr32(E1000_RXDCTL(reg_idx
), 0);
3317 /* Set DMA base address registers */
3318 wr32(E1000_RDBAL(reg_idx
),
3319 rdba
& 0x00000000ffffffffULL
);
3320 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3321 wr32(E1000_RDLEN(reg_idx
),
3322 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3324 /* initialize head and tail */
3325 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3326 wr32(E1000_RDH(reg_idx
), 0);
3327 writel(0, ring
->tail
);
3329 /* set descriptor configuration */
3330 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3331 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3332 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3333 if (hw
->mac
.type
>= e1000_82580
)
3334 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3335 /* Only set Drop Enable if we are supporting multiple queues */
3336 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3337 srrctl
|= E1000_SRRCTL_DROP_EN
;
3339 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3341 /* set filtering for VMDQ pools */
3342 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3344 rxdctl
|= IGB_RX_PTHRESH
;
3345 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3346 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3348 /* enable receive descriptor fetching */
3349 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3350 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3353 static void igb_set_rx_buffer_len(struct igb_adapter
*adapter
,
3354 struct igb_ring
*rx_ring
)
3356 #define IGB_MAX_BUILD_SKB_SIZE \
3357 (SKB_WITH_OVERHEAD(IGB_RX_BUFSZ) - \
3358 (NET_SKB_PAD + NET_IP_ALIGN + IGB_TS_HDR_LEN))
3360 /* set build_skb flag */
3361 if (adapter
->max_frame_size
<= IGB_MAX_BUILD_SKB_SIZE
)
3362 set_ring_build_skb_enabled(rx_ring
);
3364 clear_ring_build_skb_enabled(rx_ring
);
3368 * igb_configure_rx - Configure receive Unit after Reset
3369 * @adapter: board private structure
3371 * Configure the Rx unit of the MAC after a reset.
3373 static void igb_configure_rx(struct igb_adapter
*adapter
)
3377 /* set UTA to appropriate mode */
3378 igb_set_uta(adapter
);
3380 /* set the correct pool for the PF default MAC address in entry 0 */
3381 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3382 adapter
->vfs_allocated_count
);
3384 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3385 * the Base and Length of the Rx Descriptor Ring */
3386 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3387 struct igb_ring
*rx_ring
= adapter
->rx_ring
[i
];
3388 igb_set_rx_buffer_len(adapter
, rx_ring
);
3389 igb_configure_rx_ring(adapter
, rx_ring
);
3394 * igb_free_tx_resources - Free Tx Resources per Queue
3395 * @tx_ring: Tx descriptor ring for a specific queue
3397 * Free all transmit software resources
3399 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3401 igb_clean_tx_ring(tx_ring
);
3403 vfree(tx_ring
->tx_buffer_info
);
3404 tx_ring
->tx_buffer_info
= NULL
;
3406 /* if not set, then don't free */
3410 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3411 tx_ring
->desc
, tx_ring
->dma
);
3413 tx_ring
->desc
= NULL
;
3417 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3418 * @adapter: board private structure
3420 * Free all transmit software resources
3422 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3426 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3427 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3430 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3431 struct igb_tx_buffer
*tx_buffer
)
3433 if (tx_buffer
->skb
) {
3434 dev_kfree_skb_any(tx_buffer
->skb
);
3435 if (dma_unmap_len(tx_buffer
, len
))
3436 dma_unmap_single(ring
->dev
,
3437 dma_unmap_addr(tx_buffer
, dma
),
3438 dma_unmap_len(tx_buffer
, len
),
3440 } else if (dma_unmap_len(tx_buffer
, len
)) {
3441 dma_unmap_page(ring
->dev
,
3442 dma_unmap_addr(tx_buffer
, dma
),
3443 dma_unmap_len(tx_buffer
, len
),
3446 tx_buffer
->next_to_watch
= NULL
;
3447 tx_buffer
->skb
= NULL
;
3448 dma_unmap_len_set(tx_buffer
, len
, 0);
3449 /* buffer_info must be completely set up in the transmit path */
3453 * igb_clean_tx_ring - Free Tx Buffers
3454 * @tx_ring: ring to be cleaned
3456 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3458 struct igb_tx_buffer
*buffer_info
;
3462 if (!tx_ring
->tx_buffer_info
)
3464 /* Free all the Tx ring sk_buffs */
3466 for (i
= 0; i
< tx_ring
->count
; i
++) {
3467 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3468 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3471 netdev_tx_reset_queue(txring_txq(tx_ring
));
3473 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3474 memset(tx_ring
->tx_buffer_info
, 0, size
);
3476 /* Zero out the descriptor ring */
3477 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3479 tx_ring
->next_to_use
= 0;
3480 tx_ring
->next_to_clean
= 0;
3484 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3485 * @adapter: board private structure
3487 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3491 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3492 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3496 * igb_free_rx_resources - Free Rx Resources
3497 * @rx_ring: ring to clean the resources from
3499 * Free all receive software resources
3501 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3503 igb_clean_rx_ring(rx_ring
);
3505 vfree(rx_ring
->rx_buffer_info
);
3506 rx_ring
->rx_buffer_info
= NULL
;
3508 /* if not set, then don't free */
3512 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3513 rx_ring
->desc
, rx_ring
->dma
);
3515 rx_ring
->desc
= NULL
;
3519 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3520 * @adapter: board private structure
3522 * Free all receive software resources
3524 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3528 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3529 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3533 * igb_clean_rx_ring - Free Rx Buffers per Queue
3534 * @rx_ring: ring to free buffers from
3536 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3542 dev_kfree_skb(rx_ring
->skb
);
3543 rx_ring
->skb
= NULL
;
3545 if (!rx_ring
->rx_buffer_info
)
3548 /* Free all the Rx ring sk_buffs */
3549 for (i
= 0; i
< rx_ring
->count
; i
++) {
3550 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3552 if (!buffer_info
->page
)
3555 dma_unmap_page(rx_ring
->dev
,
3559 __free_page(buffer_info
->page
);
3561 buffer_info
->page
= NULL
;
3564 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3565 memset(rx_ring
->rx_buffer_info
, 0, size
);
3567 /* Zero out the descriptor ring */
3568 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3570 rx_ring
->next_to_alloc
= 0;
3571 rx_ring
->next_to_clean
= 0;
3572 rx_ring
->next_to_use
= 0;
3576 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3577 * @adapter: board private structure
3579 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3583 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3584 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3588 * igb_set_mac - Change the Ethernet Address of the NIC
3589 * @netdev: network interface device structure
3590 * @p: pointer to an address structure
3592 * Returns 0 on success, negative on failure
3594 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3596 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3597 struct e1000_hw
*hw
= &adapter
->hw
;
3598 struct sockaddr
*addr
= p
;
3600 if (!is_valid_ether_addr(addr
->sa_data
))
3601 return -EADDRNOTAVAIL
;
3603 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3604 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3606 /* set the correct pool for the new PF MAC address in entry 0 */
3607 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3608 adapter
->vfs_allocated_count
);
3614 * igb_write_mc_addr_list - write multicast addresses to MTA
3615 * @netdev: network interface device structure
3617 * Writes multicast address list to the MTA hash table.
3618 * Returns: -ENOMEM on failure
3619 * 0 on no addresses written
3620 * X on writing X addresses to MTA
3622 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3624 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3625 struct e1000_hw
*hw
= &adapter
->hw
;
3626 struct netdev_hw_addr
*ha
;
3630 if (netdev_mc_empty(netdev
)) {
3631 /* nothing to program, so clear mc list */
3632 igb_update_mc_addr_list(hw
, NULL
, 0);
3633 igb_restore_vf_multicasts(adapter
);
3637 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3641 /* The shared function expects a packed array of only addresses. */
3643 netdev_for_each_mc_addr(ha
, netdev
)
3644 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3646 igb_update_mc_addr_list(hw
, mta_list
, i
);
3649 return netdev_mc_count(netdev
);
3653 * igb_write_uc_addr_list - write unicast addresses to RAR table
3654 * @netdev: network interface device structure
3656 * Writes unicast address list to the RAR table.
3657 * Returns: -ENOMEM on failure/insufficient address space
3658 * 0 on no addresses written
3659 * X on writing X addresses to the RAR table
3661 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3663 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3664 struct e1000_hw
*hw
= &adapter
->hw
;
3665 unsigned int vfn
= adapter
->vfs_allocated_count
;
3666 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3669 /* return ENOMEM indicating insufficient memory for addresses */
3670 if (netdev_uc_count(netdev
) > rar_entries
)
3673 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3674 struct netdev_hw_addr
*ha
;
3676 netdev_for_each_uc_addr(ha
, netdev
) {
3679 igb_rar_set_qsel(adapter
, ha
->addr
,
3685 /* write the addresses in reverse order to avoid write combining */
3686 for (; rar_entries
> 0 ; rar_entries
--) {
3687 wr32(E1000_RAH(rar_entries
), 0);
3688 wr32(E1000_RAL(rar_entries
), 0);
3696 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3697 * @netdev: network interface device structure
3699 * The set_rx_mode entry point is called whenever the unicast or multicast
3700 * address lists or the network interface flags are updated. This routine is
3701 * responsible for configuring the hardware for proper unicast, multicast,
3702 * promiscuous mode, and all-multi behavior.
3704 static void igb_set_rx_mode(struct net_device
*netdev
)
3706 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3707 struct e1000_hw
*hw
= &adapter
->hw
;
3708 unsigned int vfn
= adapter
->vfs_allocated_count
;
3709 u32 rctl
, vmolr
= 0;
3712 /* Check for Promiscuous and All Multicast modes */
3713 rctl
= rd32(E1000_RCTL
);
3715 /* clear the effected bits */
3716 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
3718 if (netdev
->flags
& IFF_PROMISC
) {
3719 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
3720 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
3722 if (netdev
->flags
& IFF_ALLMULTI
) {
3723 rctl
|= E1000_RCTL_MPE
;
3724 vmolr
|= E1000_VMOLR_MPME
;
3727 * Write addresses to the MTA, if the attempt fails
3728 * then we should just turn on promiscuous mode so
3729 * that we can at least receive multicast traffic
3731 count
= igb_write_mc_addr_list(netdev
);
3733 rctl
|= E1000_RCTL_MPE
;
3734 vmolr
|= E1000_VMOLR_MPME
;
3736 vmolr
|= E1000_VMOLR_ROMPE
;
3740 * Write addresses to available RAR registers, if there is not
3741 * sufficient space to store all the addresses then enable
3742 * unicast promiscuous mode
3744 count
= igb_write_uc_addr_list(netdev
);
3746 rctl
|= E1000_RCTL_UPE
;
3747 vmolr
|= E1000_VMOLR_ROPE
;
3749 rctl
|= E1000_RCTL_VFE
;
3751 wr32(E1000_RCTL
, rctl
);
3754 * In order to support SR-IOV and eventually VMDq it is necessary to set
3755 * the VMOLR to enable the appropriate modes. Without this workaround
3756 * we will have issues with VLAN tag stripping not being done for frames
3757 * that are only arriving because we are the default pool
3759 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
3762 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
3763 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
3764 wr32(E1000_VMOLR(vfn
), vmolr
);
3765 igb_restore_vf_multicasts(adapter
);
3768 static void igb_check_wvbr(struct igb_adapter
*adapter
)
3770 struct e1000_hw
*hw
= &adapter
->hw
;
3773 switch (hw
->mac
.type
) {
3776 if (!(wvbr
= rd32(E1000_WVBR
)))
3783 adapter
->wvbr
|= wvbr
;
3786 #define IGB_STAGGERED_QUEUE_OFFSET 8
3788 static void igb_spoof_check(struct igb_adapter
*adapter
)
3795 for(j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
3796 if (adapter
->wvbr
& (1 << j
) ||
3797 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
3798 dev_warn(&adapter
->pdev
->dev
,
3799 "Spoof event(s) detected on VF %d\n", j
);
3802 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
3807 /* Need to wait a few seconds after link up to get diagnostic information from
3809 static void igb_update_phy_info(unsigned long data
)
3811 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
3812 igb_get_phy_info(&adapter
->hw
);
3816 * igb_has_link - check shared code for link and determine up/down
3817 * @adapter: pointer to driver private info
3819 bool igb_has_link(struct igb_adapter
*adapter
)
3821 struct e1000_hw
*hw
= &adapter
->hw
;
3822 bool link_active
= false;
3825 /* get_link_status is set on LSC (link status) interrupt or
3826 * rx sequence error interrupt. get_link_status will stay
3827 * false until the e1000_check_for_link establishes link
3828 * for copper adapters ONLY
3830 switch (hw
->phy
.media_type
) {
3831 case e1000_media_type_copper
:
3832 if (hw
->mac
.get_link_status
) {
3833 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
3834 link_active
= !hw
->mac
.get_link_status
;
3839 case e1000_media_type_internal_serdes
:
3840 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
3841 link_active
= hw
->mac
.serdes_has_link
;
3844 case e1000_media_type_unknown
:
3851 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
3854 u32 ctrl_ext
, thstat
;
3856 /* check for thermal sensor event on i350 copper only */
3857 if (hw
->mac
.type
== e1000_i350
) {
3858 thstat
= rd32(E1000_THSTAT
);
3859 ctrl_ext
= rd32(E1000_CTRL_EXT
);
3861 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
3862 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
3863 ret
= !!(thstat
& event
);
3871 * igb_watchdog - Timer Call-back
3872 * @data: pointer to adapter cast into an unsigned long
3874 static void igb_watchdog(unsigned long data
)
3876 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
3877 /* Do the rest outside of interrupt context */
3878 schedule_work(&adapter
->watchdog_task
);
3881 static void igb_watchdog_task(struct work_struct
*work
)
3883 struct igb_adapter
*adapter
= container_of(work
,
3886 struct e1000_hw
*hw
= &adapter
->hw
;
3887 struct net_device
*netdev
= adapter
->netdev
;
3891 link
= igb_has_link(adapter
);
3893 /* Cancel scheduled suspend requests. */
3894 pm_runtime_resume(netdev
->dev
.parent
);
3896 if (!netif_carrier_ok(netdev
)) {
3898 hw
->mac
.ops
.get_speed_and_duplex(hw
,
3899 &adapter
->link_speed
,
3900 &adapter
->link_duplex
);
3902 ctrl
= rd32(E1000_CTRL
);
3903 /* Links status message must follow this format */
3904 printk(KERN_INFO
"igb: %s NIC Link is Up %d Mbps %s "
3905 "Duplex, Flow Control: %s\n",
3907 adapter
->link_speed
,
3908 adapter
->link_duplex
== FULL_DUPLEX
?
3910 (ctrl
& E1000_CTRL_TFCE
) &&
3911 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
3912 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
3913 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
3915 /* check for thermal sensor event */
3916 if (igb_thermal_sensor_event(hw
,
3917 E1000_THSTAT_LINK_THROTTLE
)) {
3918 netdev_info(netdev
, "The network adapter link "
3919 "speed was downshifted because it "
3923 /* adjust timeout factor according to speed/duplex */
3924 adapter
->tx_timeout_factor
= 1;
3925 switch (adapter
->link_speed
) {
3927 adapter
->tx_timeout_factor
= 14;
3930 /* maybe add some timeout factor ? */
3934 netif_carrier_on(netdev
);
3936 igb_ping_all_vfs(adapter
);
3937 igb_check_vf_rate_limit(adapter
);
3939 /* link state has changed, schedule phy info update */
3940 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3941 mod_timer(&adapter
->phy_info_timer
,
3942 round_jiffies(jiffies
+ 2 * HZ
));
3945 if (netif_carrier_ok(netdev
)) {
3946 adapter
->link_speed
= 0;
3947 adapter
->link_duplex
= 0;
3949 /* check for thermal sensor event */
3950 if (igb_thermal_sensor_event(hw
,
3951 E1000_THSTAT_PWR_DOWN
)) {
3952 netdev_err(netdev
, "The network adapter was "
3953 "stopped because it overheated\n");
3956 /* Links status message must follow this format */
3957 printk(KERN_INFO
"igb: %s NIC Link is Down\n",
3959 netif_carrier_off(netdev
);
3961 igb_ping_all_vfs(adapter
);
3963 /* link state has changed, schedule phy info update */
3964 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
3965 mod_timer(&adapter
->phy_info_timer
,
3966 round_jiffies(jiffies
+ 2 * HZ
));
3968 pm_schedule_suspend(netdev
->dev
.parent
,
3973 spin_lock(&adapter
->stats64_lock
);
3974 igb_update_stats(adapter
, &adapter
->stats64
);
3975 spin_unlock(&adapter
->stats64_lock
);
3977 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3978 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
3979 if (!netif_carrier_ok(netdev
)) {
3980 /* We've lost link, so the controller stops DMA,
3981 * but we've got queued Tx work that's never going
3982 * to get done, so reset controller to flush Tx.
3983 * (Do the reset outside of interrupt context). */
3984 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
3985 adapter
->tx_timeout_count
++;
3986 schedule_work(&adapter
->reset_task
);
3987 /* return immediately since reset is imminent */
3992 /* Force detection of hung controller every watchdog period */
3993 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
3996 /* Cause software interrupt to ensure rx ring is cleaned */
3997 if (adapter
->msix_entries
) {
3999 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4000 eics
|= adapter
->q_vector
[i
]->eims_value
;
4001 wr32(E1000_EICS
, eics
);
4003 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4006 igb_spoof_check(adapter
);
4007 igb_ptp_rx_hang(adapter
);
4009 /* Reset the timer */
4010 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4011 mod_timer(&adapter
->watchdog_timer
,
4012 round_jiffies(jiffies
+ 2 * HZ
));
4015 enum latency_range
{
4019 latency_invalid
= 255
4023 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4025 * Stores a new ITR value based on strictly on packet size. This
4026 * algorithm is less sophisticated than that used in igb_update_itr,
4027 * due to the difficulty of synchronizing statistics across multiple
4028 * receive rings. The divisors and thresholds used by this function
4029 * were determined based on theoretical maximum wire speed and testing
4030 * data, in order to minimize response time while increasing bulk
4032 * This functionality is controlled by the InterruptThrottleRate module
4033 * parameter (see igb_param.c)
4034 * NOTE: This function is called only when operating in a multiqueue
4035 * receive environment.
4036 * @q_vector: pointer to q_vector
4038 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4040 int new_val
= q_vector
->itr_val
;
4041 int avg_wire_size
= 0;
4042 struct igb_adapter
*adapter
= q_vector
->adapter
;
4043 unsigned int packets
;
4045 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4046 * ints/sec - ITR timer value of 120 ticks.
4048 if (adapter
->link_speed
!= SPEED_1000
) {
4049 new_val
= IGB_4K_ITR
;
4053 packets
= q_vector
->rx
.total_packets
;
4055 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4057 packets
= q_vector
->tx
.total_packets
;
4059 avg_wire_size
= max_t(u32
, avg_wire_size
,
4060 q_vector
->tx
.total_bytes
/ packets
);
4062 /* if avg_wire_size isn't set no work was done */
4066 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4067 avg_wire_size
+= 24;
4069 /* Don't starve jumbo frames */
4070 avg_wire_size
= min(avg_wire_size
, 3000);
4072 /* Give a little boost to mid-size frames */
4073 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4074 new_val
= avg_wire_size
/ 3;
4076 new_val
= avg_wire_size
/ 2;
4078 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4079 if (new_val
< IGB_20K_ITR
&&
4080 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4081 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4082 new_val
= IGB_20K_ITR
;
4085 if (new_val
!= q_vector
->itr_val
) {
4086 q_vector
->itr_val
= new_val
;
4087 q_vector
->set_itr
= 1;
4090 q_vector
->rx
.total_bytes
= 0;
4091 q_vector
->rx
.total_packets
= 0;
4092 q_vector
->tx
.total_bytes
= 0;
4093 q_vector
->tx
.total_packets
= 0;
4097 * igb_update_itr - update the dynamic ITR value based on statistics
4098 * Stores a new ITR value based on packets and byte
4099 * counts during the last interrupt. The advantage of per interrupt
4100 * computation is faster updates and more accurate ITR for the current
4101 * traffic pattern. Constants in this function were computed
4102 * based on theoretical maximum wire speed and thresholds were set based
4103 * on testing data as well as attempting to minimize response time
4104 * while increasing bulk throughput.
4105 * this functionality is controlled by the InterruptThrottleRate module
4106 * parameter (see igb_param.c)
4107 * NOTE: These calculations are only valid when operating in a single-
4108 * queue environment.
4109 * @q_vector: pointer to q_vector
4110 * @ring_container: ring info to update the itr for
4112 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4113 struct igb_ring_container
*ring_container
)
4115 unsigned int packets
= ring_container
->total_packets
;
4116 unsigned int bytes
= ring_container
->total_bytes
;
4117 u8 itrval
= ring_container
->itr
;
4119 /* no packets, exit with status unchanged */
4124 case lowest_latency
:
4125 /* handle TSO and jumbo frames */
4126 if (bytes
/packets
> 8000)
4127 itrval
= bulk_latency
;
4128 else if ((packets
< 5) && (bytes
> 512))
4129 itrval
= low_latency
;
4131 case low_latency
: /* 50 usec aka 20000 ints/s */
4132 if (bytes
> 10000) {
4133 /* this if handles the TSO accounting */
4134 if (bytes
/packets
> 8000) {
4135 itrval
= bulk_latency
;
4136 } else if ((packets
< 10) || ((bytes
/packets
) > 1200)) {
4137 itrval
= bulk_latency
;
4138 } else if ((packets
> 35)) {
4139 itrval
= lowest_latency
;
4141 } else if (bytes
/packets
> 2000) {
4142 itrval
= bulk_latency
;
4143 } else if (packets
<= 2 && bytes
< 512) {
4144 itrval
= lowest_latency
;
4147 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4148 if (bytes
> 25000) {
4150 itrval
= low_latency
;
4151 } else if (bytes
< 1500) {
4152 itrval
= low_latency
;
4157 /* clear work counters since we have the values we need */
4158 ring_container
->total_bytes
= 0;
4159 ring_container
->total_packets
= 0;
4161 /* write updated itr to ring container */
4162 ring_container
->itr
= itrval
;
4165 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4167 struct igb_adapter
*adapter
= q_vector
->adapter
;
4168 u32 new_itr
= q_vector
->itr_val
;
4171 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4172 if (adapter
->link_speed
!= SPEED_1000
) {
4174 new_itr
= IGB_4K_ITR
;
4178 igb_update_itr(q_vector
, &q_vector
->tx
);
4179 igb_update_itr(q_vector
, &q_vector
->rx
);
4181 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4183 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4184 if (current_itr
== lowest_latency
&&
4185 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4186 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4187 current_itr
= low_latency
;
4189 switch (current_itr
) {
4190 /* counts and packets in update_itr are dependent on these numbers */
4191 case lowest_latency
:
4192 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4195 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4198 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4205 if (new_itr
!= q_vector
->itr_val
) {
4206 /* this attempts to bias the interrupt rate towards Bulk
4207 * by adding intermediate steps when interrupt rate is
4209 new_itr
= new_itr
> q_vector
->itr_val
?
4210 max((new_itr
* q_vector
->itr_val
) /
4211 (new_itr
+ (q_vector
->itr_val
>> 2)),
4214 /* Don't write the value here; it resets the adapter's
4215 * internal timer, and causes us to delay far longer than
4216 * we should between interrupts. Instead, we write the ITR
4217 * value at the beginning of the next interrupt so the timing
4218 * ends up being correct.
4220 q_vector
->itr_val
= new_itr
;
4221 q_vector
->set_itr
= 1;
4225 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4226 u32 type_tucmd
, u32 mss_l4len_idx
)
4228 struct e1000_adv_tx_context_desc
*context_desc
;
4229 u16 i
= tx_ring
->next_to_use
;
4231 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4234 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4236 /* set bits to identify this as an advanced context descriptor */
4237 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4239 /* For 82575, context index must be unique per ring. */
4240 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4241 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4243 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4244 context_desc
->seqnum_seed
= 0;
4245 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4246 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4249 static int igb_tso(struct igb_ring
*tx_ring
,
4250 struct igb_tx_buffer
*first
,
4253 struct sk_buff
*skb
= first
->skb
;
4254 u32 vlan_macip_lens
, type_tucmd
;
4255 u32 mss_l4len_idx
, l4len
;
4257 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4260 if (!skb_is_gso(skb
))
4263 if (skb_header_cloned(skb
)) {
4264 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
4269 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4270 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4272 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
4273 struct iphdr
*iph
= ip_hdr(skb
);
4276 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4280 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4281 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4284 } else if (skb_is_gso_v6(skb
)) {
4285 ipv6_hdr(skb
)->payload_len
= 0;
4286 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4287 &ipv6_hdr(skb
)->daddr
,
4289 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4293 /* compute header lengths */
4294 l4len
= tcp_hdrlen(skb
);
4295 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4297 /* update gso size and bytecount with header size */
4298 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4299 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4302 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4303 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4305 /* VLAN MACLEN IPLEN */
4306 vlan_macip_lens
= skb_network_header_len(skb
);
4307 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4308 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4310 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4315 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4317 struct sk_buff
*skb
= first
->skb
;
4318 u32 vlan_macip_lens
= 0;
4319 u32 mss_l4len_idx
= 0;
4322 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4323 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4327 switch (first
->protocol
) {
4328 case __constant_htons(ETH_P_IP
):
4329 vlan_macip_lens
|= skb_network_header_len(skb
);
4330 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4331 l4_hdr
= ip_hdr(skb
)->protocol
;
4333 case __constant_htons(ETH_P_IPV6
):
4334 vlan_macip_lens
|= skb_network_header_len(skb
);
4335 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4338 if (unlikely(net_ratelimit())) {
4339 dev_warn(tx_ring
->dev
,
4340 "partial checksum but proto=%x!\n",
4348 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4349 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4350 E1000_ADVTXD_L4LEN_SHIFT
;
4353 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4354 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4355 E1000_ADVTXD_L4LEN_SHIFT
;
4358 mss_l4len_idx
= sizeof(struct udphdr
) <<
4359 E1000_ADVTXD_L4LEN_SHIFT
;
4362 if (unlikely(net_ratelimit())) {
4363 dev_warn(tx_ring
->dev
,
4364 "partial checksum but l4 proto=%x!\n",
4370 /* update TX checksum flag */
4371 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4374 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4375 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4377 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4380 #define IGB_SET_FLAG(_input, _flag, _result) \
4381 ((_flag <= _result) ? \
4382 ((u32)(_input & _flag) * (_result / _flag)) : \
4383 ((u32)(_input & _flag) / (_flag / _result)))
4385 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4387 /* set type for advanced descriptor with frame checksum insertion */
4388 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4389 E1000_ADVTXD_DCMD_DEXT
|
4390 E1000_ADVTXD_DCMD_IFCS
;
4392 /* set HW vlan bit if vlan is present */
4393 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4394 (E1000_ADVTXD_DCMD_VLE
));
4396 /* set segmentation bits for TSO */
4397 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4398 (E1000_ADVTXD_DCMD_TSE
));
4400 /* set timestamp bit if present */
4401 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4402 (E1000_ADVTXD_MAC_TSTAMP
));
4404 /* insert frame checksum */
4405 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4410 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4411 union e1000_adv_tx_desc
*tx_desc
,
4412 u32 tx_flags
, unsigned int paylen
)
4414 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4416 /* 82575 requires a unique index per ring */
4417 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4418 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4420 /* insert L4 checksum */
4421 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4423 (E1000_TXD_POPTS_TXSM
<< 8));
4425 /* insert IPv4 checksum */
4426 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4428 (E1000_TXD_POPTS_IXSM
<< 8));
4430 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4433 static void igb_tx_map(struct igb_ring
*tx_ring
,
4434 struct igb_tx_buffer
*first
,
4437 struct sk_buff
*skb
= first
->skb
;
4438 struct igb_tx_buffer
*tx_buffer
;
4439 union e1000_adv_tx_desc
*tx_desc
;
4440 struct skb_frag_struct
*frag
;
4442 unsigned int data_len
, size
;
4443 u32 tx_flags
= first
->tx_flags
;
4444 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4445 u16 i
= tx_ring
->next_to_use
;
4447 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4449 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4451 size
= skb_headlen(skb
);
4452 data_len
= skb
->data_len
;
4454 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4458 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4459 if (dma_mapping_error(tx_ring
->dev
, dma
))
4462 /* record length, and DMA address */
4463 dma_unmap_len_set(tx_buffer
, len
, size
);
4464 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4466 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4468 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4469 tx_desc
->read
.cmd_type_len
=
4470 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4474 if (i
== tx_ring
->count
) {
4475 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4478 tx_desc
->read
.olinfo_status
= 0;
4480 dma
+= IGB_MAX_DATA_PER_TXD
;
4481 size
-= IGB_MAX_DATA_PER_TXD
;
4483 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4486 if (likely(!data_len
))
4489 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4493 if (i
== tx_ring
->count
) {
4494 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4497 tx_desc
->read
.olinfo_status
= 0;
4499 size
= skb_frag_size(frag
);
4502 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4503 size
, DMA_TO_DEVICE
);
4505 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4508 /* write last descriptor with RS and EOP bits */
4509 cmd_type
|= size
| IGB_TXD_DCMD
;
4510 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4512 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4514 /* set the timestamp */
4515 first
->time_stamp
= jiffies
;
4518 * Force memory writes to complete before letting h/w know there
4519 * are new descriptors to fetch. (Only applicable for weak-ordered
4520 * memory model archs, such as IA-64).
4522 * We also need this memory barrier to make certain all of the
4523 * status bits have been updated before next_to_watch is written.
4527 /* set next_to_watch value indicating a packet is present */
4528 first
->next_to_watch
= tx_desc
;
4531 if (i
== tx_ring
->count
)
4534 tx_ring
->next_to_use
= i
;
4536 writel(i
, tx_ring
->tail
);
4538 /* we need this if more than one processor can write to our tail
4539 * at a time, it syncronizes IO on IA64/Altix systems */
4545 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4547 /* clear dma mappings for failed tx_buffer_info map */
4549 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4550 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4551 if (tx_buffer
== first
)
4558 tx_ring
->next_to_use
= i
;
4561 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4563 struct net_device
*netdev
= tx_ring
->netdev
;
4565 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4567 /* Herbert's original patch had:
4568 * smp_mb__after_netif_stop_queue();
4569 * but since that doesn't exist yet, just open code it. */
4572 /* We need to check again in a case another CPU has just
4573 * made room available. */
4574 if (igb_desc_unused(tx_ring
) < size
)
4578 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4580 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4581 tx_ring
->tx_stats
.restart_queue2
++;
4582 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4587 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4589 if (igb_desc_unused(tx_ring
) >= size
)
4591 return __igb_maybe_stop_tx(tx_ring
, size
);
4594 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4595 struct igb_ring
*tx_ring
)
4597 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
4598 struct igb_tx_buffer
*first
;
4601 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4602 __be16 protocol
= vlan_get_protocol(skb
);
4605 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4606 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4607 * + 2 desc gap to keep tail from touching head,
4608 * + 1 desc for context descriptor,
4609 * otherwise try next time
4611 if (NETDEV_FRAG_PAGE_MAX_SIZE
> IGB_MAX_DATA_PER_TXD
) {
4613 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4614 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4616 count
+= skb_shinfo(skb
)->nr_frags
;
4619 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
4620 /* this is a hard error */
4621 return NETDEV_TX_BUSY
;
4624 /* record the location of the first descriptor for this packet */
4625 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
4627 first
->bytecount
= skb
->len
;
4628 first
->gso_segs
= 1;
4630 skb_tx_timestamp(skb
);
4632 if (unlikely((skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
4633 !(adapter
->ptp_tx_skb
))) {
4634 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
4635 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
4637 adapter
->ptp_tx_skb
= skb_get(skb
);
4638 adapter
->ptp_tx_start
= jiffies
;
4639 if (adapter
->hw
.mac
.type
== e1000_82576
)
4640 schedule_work(&adapter
->ptp_tx_work
);
4643 if (vlan_tx_tag_present(skb
)) {
4644 tx_flags
|= IGB_TX_FLAGS_VLAN
;
4645 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
4648 /* record initial flags and protocol */
4649 first
->tx_flags
= tx_flags
;
4650 first
->protocol
= protocol
;
4652 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
4656 igb_tx_csum(tx_ring
, first
);
4658 igb_tx_map(tx_ring
, first
, hdr_len
);
4660 /* Make sure there is space in the ring for the next send. */
4661 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
4663 return NETDEV_TX_OK
;
4666 igb_unmap_and_free_tx_resource(tx_ring
, first
);
4668 return NETDEV_TX_OK
;
4671 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
4672 struct sk_buff
*skb
)
4674 unsigned int r_idx
= skb
->queue_mapping
;
4676 if (r_idx
>= adapter
->num_tx_queues
)
4677 r_idx
= r_idx
% adapter
->num_tx_queues
;
4679 return adapter
->tx_ring
[r_idx
];
4682 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
4683 struct net_device
*netdev
)
4685 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4687 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
4688 dev_kfree_skb_any(skb
);
4689 return NETDEV_TX_OK
;
4692 if (skb
->len
<= 0) {
4693 dev_kfree_skb_any(skb
);
4694 return NETDEV_TX_OK
;
4698 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
4699 * in order to meet this minimum size requirement.
4701 if (unlikely(skb
->len
< 17)) {
4702 if (skb_pad(skb
, 17 - skb
->len
))
4703 return NETDEV_TX_OK
;
4705 skb_set_tail_pointer(skb
, 17);
4708 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
4712 * igb_tx_timeout - Respond to a Tx Hang
4713 * @netdev: network interface device structure
4715 static void igb_tx_timeout(struct net_device
*netdev
)
4717 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4718 struct e1000_hw
*hw
= &adapter
->hw
;
4720 /* Do the reset outside of interrupt context */
4721 adapter
->tx_timeout_count
++;
4723 if (hw
->mac
.type
>= e1000_82580
)
4724 hw
->dev_spec
._82575
.global_device_reset
= true;
4726 schedule_work(&adapter
->reset_task
);
4728 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
4731 static void igb_reset_task(struct work_struct
*work
)
4733 struct igb_adapter
*adapter
;
4734 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
4737 netdev_err(adapter
->netdev
, "Reset adapter\n");
4738 igb_reinit_locked(adapter
);
4742 * igb_get_stats64 - Get System Network Statistics
4743 * @netdev: network interface device structure
4744 * @stats: rtnl_link_stats64 pointer
4747 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
4748 struct rtnl_link_stats64
*stats
)
4750 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4752 spin_lock(&adapter
->stats64_lock
);
4753 igb_update_stats(adapter
, &adapter
->stats64
);
4754 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
4755 spin_unlock(&adapter
->stats64_lock
);
4761 * igb_change_mtu - Change the Maximum Transfer Unit
4762 * @netdev: network interface device structure
4763 * @new_mtu: new value for maximum frame size
4765 * Returns 0 on success, negative on failure
4767 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
4769 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4770 struct pci_dev
*pdev
= adapter
->pdev
;
4771 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
4773 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
4774 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
4778 #define MAX_STD_JUMBO_FRAME_SIZE 9238
4779 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
4780 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
4784 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
4787 /* igb_down has a dependency on max_frame_size */
4788 adapter
->max_frame_size
= max_frame
;
4790 if (netif_running(netdev
))
4793 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
4794 netdev
->mtu
, new_mtu
);
4795 netdev
->mtu
= new_mtu
;
4797 if (netif_running(netdev
))
4802 clear_bit(__IGB_RESETTING
, &adapter
->state
);
4808 * igb_update_stats - Update the board statistics counters
4809 * @adapter: board private structure
4812 void igb_update_stats(struct igb_adapter
*adapter
,
4813 struct rtnl_link_stats64
*net_stats
)
4815 struct e1000_hw
*hw
= &adapter
->hw
;
4816 struct pci_dev
*pdev
= adapter
->pdev
;
4822 u64 _bytes
, _packets
;
4824 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
4827 * Prevent stats update while adapter is being reset, or if the pci
4828 * connection is down.
4830 if (adapter
->link_speed
== 0)
4832 if (pci_channel_offline(pdev
))
4837 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4838 u32 rqdpc
= rd32(E1000_RQDPC(i
));
4839 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
4842 ring
->rx_stats
.drops
+= rqdpc
;
4843 net_stats
->rx_fifo_errors
+= rqdpc
;
4847 start
= u64_stats_fetch_begin_bh(&ring
->rx_syncp
);
4848 _bytes
= ring
->rx_stats
.bytes
;
4849 _packets
= ring
->rx_stats
.packets
;
4850 } while (u64_stats_fetch_retry_bh(&ring
->rx_syncp
, start
));
4852 packets
+= _packets
;
4855 net_stats
->rx_bytes
= bytes
;
4856 net_stats
->rx_packets
= packets
;
4860 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4861 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
4863 start
= u64_stats_fetch_begin_bh(&ring
->tx_syncp
);
4864 _bytes
= ring
->tx_stats
.bytes
;
4865 _packets
= ring
->tx_stats
.packets
;
4866 } while (u64_stats_fetch_retry_bh(&ring
->tx_syncp
, start
));
4868 packets
+= _packets
;
4870 net_stats
->tx_bytes
= bytes
;
4871 net_stats
->tx_packets
= packets
;
4873 /* read stats registers */
4874 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
4875 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
4876 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
4877 rd32(E1000_GORCH
); /* clear GORCL */
4878 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
4879 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
4880 adapter
->stats
.roc
+= rd32(E1000_ROC
);
4882 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
4883 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
4884 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
4885 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
4886 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
4887 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
4888 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
4889 adapter
->stats
.sec
+= rd32(E1000_SEC
);
4891 mpc
= rd32(E1000_MPC
);
4892 adapter
->stats
.mpc
+= mpc
;
4893 net_stats
->rx_fifo_errors
+= mpc
;
4894 adapter
->stats
.scc
+= rd32(E1000_SCC
);
4895 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
4896 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
4897 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
4898 adapter
->stats
.dc
+= rd32(E1000_DC
);
4899 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
4900 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
4901 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
4902 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
4903 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
4904 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
4905 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
4906 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
4907 rd32(E1000_GOTCH
); /* clear GOTCL */
4908 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
4909 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
4910 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
4911 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
4912 adapter
->stats
.tor
+= rd32(E1000_TORH
);
4913 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
4914 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
4916 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
4917 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
4918 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
4919 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
4920 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
4921 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
4923 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
4924 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
4926 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
4927 adapter
->stats
.colc
+= rd32(E1000_COLC
);
4929 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
4930 /* read internal phy specific stats */
4931 reg
= rd32(E1000_CTRL_EXT
);
4932 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
4933 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
4935 /* this stat has invalid values on i210/i211 */
4936 if ((hw
->mac
.type
!= e1000_i210
) &&
4937 (hw
->mac
.type
!= e1000_i211
))
4938 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
4941 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
4942 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
4944 adapter
->stats
.iac
+= rd32(E1000_IAC
);
4945 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
4946 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
4947 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
4948 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
4949 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
4950 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
4951 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
4952 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
4954 /* Fill out the OS statistics structure */
4955 net_stats
->multicast
= adapter
->stats
.mprc
;
4956 net_stats
->collisions
= adapter
->stats
.colc
;
4960 /* RLEC on some newer hardware can be incorrect so build
4961 * our own version based on RUC and ROC */
4962 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
4963 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
4964 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
4965 adapter
->stats
.cexterr
;
4966 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
4968 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
4969 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
4970 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
4973 net_stats
->tx_errors
= adapter
->stats
.ecol
+
4974 adapter
->stats
.latecol
;
4975 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
4976 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
4977 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
4979 /* Tx Dropped needs to be maintained elsewhere */
4982 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4983 if ((adapter
->link_speed
== SPEED_1000
) &&
4984 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
4985 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
4986 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
4990 /* Management Stats */
4991 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
4992 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
4993 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
4996 reg
= rd32(E1000_MANC
);
4997 if (reg
& E1000_MANC_EN_BMC2OS
) {
4998 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
4999 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5000 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5001 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5005 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5007 struct igb_adapter
*adapter
= data
;
5008 struct e1000_hw
*hw
= &adapter
->hw
;
5009 u32 icr
= rd32(E1000_ICR
);
5010 /* reading ICR causes bit 31 of EICR to be cleared */
5012 if (icr
& E1000_ICR_DRSTA
)
5013 schedule_work(&adapter
->reset_task
);
5015 if (icr
& E1000_ICR_DOUTSYNC
) {
5016 /* HW is reporting DMA is out of sync */
5017 adapter
->stats
.doosync
++;
5018 /* The DMA Out of Sync is also indication of a spoof event
5019 * in IOV mode. Check the Wrong VM Behavior register to
5020 * see if it is really a spoof event. */
5021 igb_check_wvbr(adapter
);
5024 /* Check for a mailbox event */
5025 if (icr
& E1000_ICR_VMMB
)
5026 igb_msg_task(adapter
);
5028 if (icr
& E1000_ICR_LSC
) {
5029 hw
->mac
.get_link_status
= 1;
5030 /* guard against interrupt when we're going down */
5031 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5032 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5035 if (icr
& E1000_ICR_TS
) {
5036 u32 tsicr
= rd32(E1000_TSICR
);
5038 if (tsicr
& E1000_TSICR_TXTS
) {
5039 /* acknowledge the interrupt */
5040 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5041 /* retrieve hardware timestamp */
5042 schedule_work(&adapter
->ptp_tx_work
);
5046 wr32(E1000_EIMS
, adapter
->eims_other
);
5051 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5053 struct igb_adapter
*adapter
= q_vector
->adapter
;
5054 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5056 if (!q_vector
->set_itr
)
5062 if (adapter
->hw
.mac
.type
== e1000_82575
)
5063 itr_val
|= itr_val
<< 16;
5065 itr_val
|= E1000_EITR_CNT_IGNR
;
5067 writel(itr_val
, q_vector
->itr_register
);
5068 q_vector
->set_itr
= 0;
5071 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5073 struct igb_q_vector
*q_vector
= data
;
5075 /* Write the ITR value calculated from the previous interrupt. */
5076 igb_write_itr(q_vector
);
5078 napi_schedule(&q_vector
->napi
);
5083 #ifdef CONFIG_IGB_DCA
5084 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5085 struct igb_ring
*tx_ring
,
5088 struct e1000_hw
*hw
= &adapter
->hw
;
5089 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5091 if (hw
->mac
.type
!= e1000_82575
)
5092 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5095 * We can enable relaxed ordering for reads, but not writes when
5096 * DCA is enabled. This is due to a known issue in some chipsets
5097 * which will cause the DCA tag to be cleared.
5099 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5100 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5101 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5103 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5106 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5107 struct igb_ring
*rx_ring
,
5110 struct e1000_hw
*hw
= &adapter
->hw
;
5111 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5113 if (hw
->mac
.type
!= e1000_82575
)
5114 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5117 * We can enable relaxed ordering for reads, but not writes when
5118 * DCA is enabled. This is due to a known issue in some chipsets
5119 * which will cause the DCA tag to be cleared.
5121 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5122 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5124 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5127 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5129 struct igb_adapter
*adapter
= q_vector
->adapter
;
5130 int cpu
= get_cpu();
5132 if (q_vector
->cpu
== cpu
)
5135 if (q_vector
->tx
.ring
)
5136 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5138 if (q_vector
->rx
.ring
)
5139 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5141 q_vector
->cpu
= cpu
;
5146 static void igb_setup_dca(struct igb_adapter
*adapter
)
5148 struct e1000_hw
*hw
= &adapter
->hw
;
5151 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5154 /* Always use CB2 mode, difference is masked in the CB driver. */
5155 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5157 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5158 adapter
->q_vector
[i
]->cpu
= -1;
5159 igb_update_dca(adapter
->q_vector
[i
]);
5163 static int __igb_notify_dca(struct device
*dev
, void *data
)
5165 struct net_device
*netdev
= dev_get_drvdata(dev
);
5166 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5167 struct pci_dev
*pdev
= adapter
->pdev
;
5168 struct e1000_hw
*hw
= &adapter
->hw
;
5169 unsigned long event
= *(unsigned long *)data
;
5172 case DCA_PROVIDER_ADD
:
5173 /* if already enabled, don't do it again */
5174 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5176 if (dca_add_requester(dev
) == 0) {
5177 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5178 dev_info(&pdev
->dev
, "DCA enabled\n");
5179 igb_setup_dca(adapter
);
5182 /* Fall Through since DCA is disabled. */
5183 case DCA_PROVIDER_REMOVE
:
5184 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5185 /* without this a class_device is left
5186 * hanging around in the sysfs model */
5187 dca_remove_requester(dev
);
5188 dev_info(&pdev
->dev
, "DCA disabled\n");
5189 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5190 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5198 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5203 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5206 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5208 #endif /* CONFIG_IGB_DCA */
5210 #ifdef CONFIG_PCI_IOV
5211 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5213 unsigned char mac_addr
[ETH_ALEN
];
5215 eth_zero_addr(mac_addr
);
5216 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5221 static bool igb_vfs_are_assigned(struct igb_adapter
*adapter
)
5223 struct pci_dev
*pdev
= adapter
->pdev
;
5224 struct pci_dev
*vfdev
;
5227 switch (adapter
->hw
.mac
.type
) {
5229 dev_id
= IGB_82576_VF_DEV_ID
;
5232 dev_id
= IGB_I350_VF_DEV_ID
;
5238 /* loop through all the VFs to see if we own any that are assigned */
5239 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, dev_id
, NULL
);
5241 /* if we don't own it we don't care */
5242 if (vfdev
->is_virtfn
&& vfdev
->physfn
== pdev
) {
5243 /* if it is assigned we cannot release it */
5244 if (vfdev
->dev_flags
& PCI_DEV_FLAGS_ASSIGNED
)
5248 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, dev_id
, vfdev
);
5255 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5257 struct e1000_hw
*hw
= &adapter
->hw
;
5261 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5262 ping
= E1000_PF_CONTROL_MSG
;
5263 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5264 ping
|= E1000_VT_MSGTYPE_CTS
;
5265 igb_write_mbx(hw
, &ping
, 1, i
);
5269 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5271 struct e1000_hw
*hw
= &adapter
->hw
;
5272 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5273 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5275 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5276 IGB_VF_FLAG_MULTI_PROMISC
);
5277 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5279 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5280 vmolr
|= E1000_VMOLR_MPME
;
5281 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5282 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5285 * if we have hashes and we are clearing a multicast promisc
5286 * flag we need to write the hashes to the MTA as this step
5287 * was previously skipped
5289 if (vf_data
->num_vf_mc_hashes
> 30) {
5290 vmolr
|= E1000_VMOLR_MPME
;
5291 } else if (vf_data
->num_vf_mc_hashes
) {
5293 vmolr
|= E1000_VMOLR_ROMPE
;
5294 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5295 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5299 wr32(E1000_VMOLR(vf
), vmolr
);
5301 /* there are flags left unprocessed, likely not supported */
5302 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5309 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5310 u32
*msgbuf
, u32 vf
)
5312 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5313 u16
*hash_list
= (u16
*)&msgbuf
[1];
5314 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5317 /* salt away the number of multicast addresses assigned
5318 * to this VF for later use to restore when the PF multi cast
5321 vf_data
->num_vf_mc_hashes
= n
;
5323 /* only up to 30 hash values supported */
5327 /* store the hashes for later use */
5328 for (i
= 0; i
< n
; i
++)
5329 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5331 /* Flush and reset the mta with the new values */
5332 igb_set_rx_mode(adapter
->netdev
);
5337 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5339 struct e1000_hw
*hw
= &adapter
->hw
;
5340 struct vf_data_storage
*vf_data
;
5343 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5344 u32 vmolr
= rd32(E1000_VMOLR(i
));
5345 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5347 vf_data
= &adapter
->vf_data
[i
];
5349 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5350 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5351 vmolr
|= E1000_VMOLR_MPME
;
5352 } else if (vf_data
->num_vf_mc_hashes
) {
5353 vmolr
|= E1000_VMOLR_ROMPE
;
5354 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5355 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5357 wr32(E1000_VMOLR(i
), vmolr
);
5361 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5363 struct e1000_hw
*hw
= &adapter
->hw
;
5364 u32 pool_mask
, reg
, vid
;
5367 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5369 /* Find the vlan filter for this id */
5370 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5371 reg
= rd32(E1000_VLVF(i
));
5373 /* remove the vf from the pool */
5376 /* if pool is empty then remove entry from vfta */
5377 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5378 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5380 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5381 igb_vfta_set(hw
, vid
, false);
5384 wr32(E1000_VLVF(i
), reg
);
5387 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5390 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5392 struct e1000_hw
*hw
= &adapter
->hw
;
5395 /* The vlvf table only exists on 82576 hardware and newer */
5396 if (hw
->mac
.type
< e1000_82576
)
5399 /* we only need to do this if VMDq is enabled */
5400 if (!adapter
->vfs_allocated_count
)
5403 /* Find the vlan filter for this id */
5404 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5405 reg
= rd32(E1000_VLVF(i
));
5406 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5407 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5412 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5413 /* Did not find a matching VLAN ID entry that was
5414 * enabled. Search for a free filter entry, i.e.
5415 * one without the enable bit set
5417 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5418 reg
= rd32(E1000_VLVF(i
));
5419 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5423 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5424 /* Found an enabled/available entry */
5425 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5427 /* if !enabled we need to set this up in vfta */
5428 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5429 /* add VID to filter table */
5430 igb_vfta_set(hw
, vid
, true);
5431 reg
|= E1000_VLVF_VLANID_ENABLE
;
5433 reg
&= ~E1000_VLVF_VLANID_MASK
;
5435 wr32(E1000_VLVF(i
), reg
);
5437 /* do not modify RLPML for PF devices */
5438 if (vf
>= adapter
->vfs_allocated_count
)
5441 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5443 reg
= rd32(E1000_VMOLR(vf
));
5444 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5446 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5448 wr32(E1000_VMOLR(vf
), reg
);
5451 adapter
->vf_data
[vf
].vlans_enabled
++;
5454 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5455 /* remove vf from the pool */
5456 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5457 /* if pool is empty then remove entry from vfta */
5458 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5460 igb_vfta_set(hw
, vid
, false);
5462 wr32(E1000_VLVF(i
), reg
);
5464 /* do not modify RLPML for PF devices */
5465 if (vf
>= adapter
->vfs_allocated_count
)
5468 adapter
->vf_data
[vf
].vlans_enabled
--;
5469 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5471 reg
= rd32(E1000_VMOLR(vf
));
5472 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5474 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5476 wr32(E1000_VMOLR(vf
), reg
);
5483 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5485 struct e1000_hw
*hw
= &adapter
->hw
;
5488 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5490 wr32(E1000_VMVIR(vf
), 0);
5493 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5494 int vf
, u16 vlan
, u8 qos
)
5497 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5499 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5502 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5505 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5506 igb_set_vmolr(adapter
, vf
, !vlan
);
5507 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5508 adapter
->vf_data
[vf
].pf_qos
= qos
;
5509 dev_info(&adapter
->pdev
->dev
,
5510 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5511 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5512 dev_warn(&adapter
->pdev
->dev
,
5513 "The VF VLAN has been set,"
5514 " but the PF device is not up.\n");
5515 dev_warn(&adapter
->pdev
->dev
,
5516 "Bring the PF device up before"
5517 " attempting to use the VF device.\n");
5520 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5522 igb_set_vmvir(adapter
, vlan
, vf
);
5523 igb_set_vmolr(adapter
, vf
, true);
5524 adapter
->vf_data
[vf
].pf_vlan
= 0;
5525 adapter
->vf_data
[vf
].pf_qos
= 0;
5531 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5533 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5534 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5536 return igb_vlvf_set(adapter
, vid
, add
, vf
);
5539 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
5541 /* clear flags - except flag that indicates PF has set the MAC */
5542 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
5543 adapter
->vf_data
[vf
].last_nack
= jiffies
;
5545 /* reset offloads to defaults */
5546 igb_set_vmolr(adapter
, vf
, true);
5548 /* reset vlans for device */
5549 igb_clear_vf_vfta(adapter
, vf
);
5550 if (adapter
->vf_data
[vf
].pf_vlan
)
5551 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
5552 adapter
->vf_data
[vf
].pf_vlan
,
5553 adapter
->vf_data
[vf
].pf_qos
);
5555 igb_clear_vf_vfta(adapter
, vf
);
5557 /* reset multicast table array for vf */
5558 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
5560 /* Flush and reset the mta with the new values */
5561 igb_set_rx_mode(adapter
->netdev
);
5564 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
5566 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5568 /* clear mac address as we were hotplug removed/added */
5569 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
5570 eth_zero_addr(vf_mac
);
5572 /* process remaining reset events */
5573 igb_vf_reset(adapter
, vf
);
5576 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
5578 struct e1000_hw
*hw
= &adapter
->hw
;
5579 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5580 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5582 u8
*addr
= (u8
*)(&msgbuf
[1]);
5584 /* process all the same items cleared in a function level reset */
5585 igb_vf_reset(adapter
, vf
);
5587 /* set vf mac address */
5588 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
5590 /* enable transmit and receive for vf */
5591 reg
= rd32(E1000_VFTE
);
5592 wr32(E1000_VFTE
, reg
| (1 << vf
));
5593 reg
= rd32(E1000_VFRE
);
5594 wr32(E1000_VFRE
, reg
| (1 << vf
));
5596 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
5598 /* reply to reset with ack and vf mac address */
5599 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
5600 memcpy(addr
, vf_mac
, 6);
5601 igb_write_mbx(hw
, msgbuf
, 3, vf
);
5604 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
5607 * The VF MAC Address is stored in a packed array of bytes
5608 * starting at the second 32 bit word of the msg array
5610 unsigned char *addr
= (char *)&msg
[1];
5613 if (is_valid_ether_addr(addr
))
5614 err
= igb_set_vf_mac(adapter
, vf
, addr
);
5619 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
5621 struct e1000_hw
*hw
= &adapter
->hw
;
5622 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5623 u32 msg
= E1000_VT_MSGTYPE_NACK
;
5625 /* if device isn't clear to send it shouldn't be reading either */
5626 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
5627 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
5628 igb_write_mbx(hw
, &msg
, 1, vf
);
5629 vf_data
->last_nack
= jiffies
;
5633 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
5635 struct pci_dev
*pdev
= adapter
->pdev
;
5636 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
5637 struct e1000_hw
*hw
= &adapter
->hw
;
5638 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5641 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
5644 /* if receive failed revoke VF CTS stats and restart init */
5645 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
5646 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
5647 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
5652 /* this is a message we already processed, do nothing */
5653 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
5657 * until the vf completes a reset it should not be
5658 * allowed to start any configuration.
5661 if (msgbuf
[0] == E1000_VF_RESET
) {
5662 igb_vf_reset_msg(adapter
, vf
);
5666 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
5667 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
5673 switch ((msgbuf
[0] & 0xFFFF)) {
5674 case E1000_VF_SET_MAC_ADDR
:
5676 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
5677 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
5679 dev_warn(&pdev
->dev
,
5680 "VF %d attempted to override administratively "
5681 "set MAC address\nReload the VF driver to "
5682 "resume operations\n", vf
);
5684 case E1000_VF_SET_PROMISC
:
5685 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
5687 case E1000_VF_SET_MULTICAST
:
5688 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
5690 case E1000_VF_SET_LPE
:
5691 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
5693 case E1000_VF_SET_VLAN
:
5695 if (vf_data
->pf_vlan
)
5696 dev_warn(&pdev
->dev
,
5697 "VF %d attempted to override administratively "
5698 "set VLAN tag\nReload the VF driver to "
5699 "resume operations\n", vf
);
5701 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
5704 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
5709 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
5711 /* notify the VF of the results of what it sent us */
5713 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
5715 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
5717 igb_write_mbx(hw
, msgbuf
, 1, vf
);
5720 static void igb_msg_task(struct igb_adapter
*adapter
)
5722 struct e1000_hw
*hw
= &adapter
->hw
;
5725 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
5726 /* process any reset requests */
5727 if (!igb_check_for_rst(hw
, vf
))
5728 igb_vf_reset_event(adapter
, vf
);
5730 /* process any messages pending */
5731 if (!igb_check_for_msg(hw
, vf
))
5732 igb_rcv_msg_from_vf(adapter
, vf
);
5734 /* process any acks */
5735 if (!igb_check_for_ack(hw
, vf
))
5736 igb_rcv_ack_from_vf(adapter
, vf
);
5741 * igb_set_uta - Set unicast filter table address
5742 * @adapter: board private structure
5744 * The unicast table address is a register array of 32-bit registers.
5745 * The table is meant to be used in a way similar to how the MTA is used
5746 * however due to certain limitations in the hardware it is necessary to
5747 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
5748 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
5750 static void igb_set_uta(struct igb_adapter
*adapter
)
5752 struct e1000_hw
*hw
= &adapter
->hw
;
5755 /* The UTA table only exists on 82576 hardware and newer */
5756 if (hw
->mac
.type
< e1000_82576
)
5759 /* we only need to do this if VMDq is enabled */
5760 if (!adapter
->vfs_allocated_count
)
5763 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
5764 array_wr32(E1000_UTA
, i
, ~0);
5768 * igb_intr_msi - Interrupt Handler
5769 * @irq: interrupt number
5770 * @data: pointer to a network interface device structure
5772 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
5774 struct igb_adapter
*adapter
= data
;
5775 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
5776 struct e1000_hw
*hw
= &adapter
->hw
;
5777 /* read ICR disables interrupts using IAM */
5778 u32 icr
= rd32(E1000_ICR
);
5780 igb_write_itr(q_vector
);
5782 if (icr
& E1000_ICR_DRSTA
)
5783 schedule_work(&adapter
->reset_task
);
5785 if (icr
& E1000_ICR_DOUTSYNC
) {
5786 /* HW is reporting DMA is out of sync */
5787 adapter
->stats
.doosync
++;
5790 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
5791 hw
->mac
.get_link_status
= 1;
5792 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5793 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5796 if (icr
& E1000_ICR_TS
) {
5797 u32 tsicr
= rd32(E1000_TSICR
);
5799 if (tsicr
& E1000_TSICR_TXTS
) {
5800 /* acknowledge the interrupt */
5801 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5802 /* retrieve hardware timestamp */
5803 schedule_work(&adapter
->ptp_tx_work
);
5807 napi_schedule(&q_vector
->napi
);
5813 * igb_intr - Legacy Interrupt Handler
5814 * @irq: interrupt number
5815 * @data: pointer to a network interface device structure
5817 static irqreturn_t
igb_intr(int irq
, void *data
)
5819 struct igb_adapter
*adapter
= data
;
5820 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
5821 struct e1000_hw
*hw
= &adapter
->hw
;
5822 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
5823 * need for the IMC write */
5824 u32 icr
= rd32(E1000_ICR
);
5826 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
5827 * not set, then the adapter didn't send an interrupt */
5828 if (!(icr
& E1000_ICR_INT_ASSERTED
))
5831 igb_write_itr(q_vector
);
5833 if (icr
& E1000_ICR_DRSTA
)
5834 schedule_work(&adapter
->reset_task
);
5836 if (icr
& E1000_ICR_DOUTSYNC
) {
5837 /* HW is reporting DMA is out of sync */
5838 adapter
->stats
.doosync
++;
5841 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
5842 hw
->mac
.get_link_status
= 1;
5843 /* guard against interrupt when we're going down */
5844 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5845 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5848 if (icr
& E1000_ICR_TS
) {
5849 u32 tsicr
= rd32(E1000_TSICR
);
5851 if (tsicr
& E1000_TSICR_TXTS
) {
5852 /* acknowledge the interrupt */
5853 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5854 /* retrieve hardware timestamp */
5855 schedule_work(&adapter
->ptp_tx_work
);
5859 napi_schedule(&q_vector
->napi
);
5864 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
5866 struct igb_adapter
*adapter
= q_vector
->adapter
;
5867 struct e1000_hw
*hw
= &adapter
->hw
;
5869 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
5870 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
5871 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
5872 igb_set_itr(q_vector
);
5874 igb_update_ring_itr(q_vector
);
5877 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
5878 if (adapter
->msix_entries
)
5879 wr32(E1000_EIMS
, q_vector
->eims_value
);
5881 igb_irq_enable(adapter
);
5886 * igb_poll - NAPI Rx polling callback
5887 * @napi: napi polling structure
5888 * @budget: count of how many packets we should handle
5890 static int igb_poll(struct napi_struct
*napi
, int budget
)
5892 struct igb_q_vector
*q_vector
= container_of(napi
,
5893 struct igb_q_vector
,
5895 bool clean_complete
= true;
5897 #ifdef CONFIG_IGB_DCA
5898 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5899 igb_update_dca(q_vector
);
5901 if (q_vector
->tx
.ring
)
5902 clean_complete
= igb_clean_tx_irq(q_vector
);
5904 if (q_vector
->rx
.ring
)
5905 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
5907 /* If all work not completed, return budget and keep polling */
5908 if (!clean_complete
)
5911 /* If not enough Rx work done, exit the polling mode */
5912 napi_complete(napi
);
5913 igb_ring_irq_enable(q_vector
);
5919 * igb_clean_tx_irq - Reclaim resources after transmit completes
5920 * @q_vector: pointer to q_vector containing needed info
5922 * returns true if ring is completely cleaned
5924 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
5926 struct igb_adapter
*adapter
= q_vector
->adapter
;
5927 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
5928 struct igb_tx_buffer
*tx_buffer
;
5929 union e1000_adv_tx_desc
*tx_desc
;
5930 unsigned int total_bytes
= 0, total_packets
= 0;
5931 unsigned int budget
= q_vector
->tx
.work_limit
;
5932 unsigned int i
= tx_ring
->next_to_clean
;
5934 if (test_bit(__IGB_DOWN
, &adapter
->state
))
5937 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5938 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
5939 i
-= tx_ring
->count
;
5942 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
5944 /* if next_to_watch is not set then there is no work pending */
5948 /* prevent any other reads prior to eop_desc */
5949 read_barrier_depends();
5951 /* if DD is not set pending work has not been completed */
5952 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
5955 /* clear next_to_watch to prevent false hangs */
5956 tx_buffer
->next_to_watch
= NULL
;
5958 /* update the statistics for this packet */
5959 total_bytes
+= tx_buffer
->bytecount
;
5960 total_packets
+= tx_buffer
->gso_segs
;
5963 dev_kfree_skb_any(tx_buffer
->skb
);
5965 /* unmap skb header data */
5966 dma_unmap_single(tx_ring
->dev
,
5967 dma_unmap_addr(tx_buffer
, dma
),
5968 dma_unmap_len(tx_buffer
, len
),
5971 /* clear tx_buffer data */
5972 tx_buffer
->skb
= NULL
;
5973 dma_unmap_len_set(tx_buffer
, len
, 0);
5975 /* clear last DMA location and unmap remaining buffers */
5976 while (tx_desc
!= eop_desc
) {
5981 i
-= tx_ring
->count
;
5982 tx_buffer
= tx_ring
->tx_buffer_info
;
5983 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
5986 /* unmap any remaining paged data */
5987 if (dma_unmap_len(tx_buffer
, len
)) {
5988 dma_unmap_page(tx_ring
->dev
,
5989 dma_unmap_addr(tx_buffer
, dma
),
5990 dma_unmap_len(tx_buffer
, len
),
5992 dma_unmap_len_set(tx_buffer
, len
, 0);
5996 /* move us one more past the eop_desc for start of next pkt */
6001 i
-= tx_ring
->count
;
6002 tx_buffer
= tx_ring
->tx_buffer_info
;
6003 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6006 /* issue prefetch for next Tx descriptor */
6009 /* update budget accounting */
6011 } while (likely(budget
));
6013 netdev_tx_completed_queue(txring_txq(tx_ring
),
6014 total_packets
, total_bytes
);
6015 i
+= tx_ring
->count
;
6016 tx_ring
->next_to_clean
= i
;
6017 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6018 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6019 tx_ring
->tx_stats
.packets
+= total_packets
;
6020 u64_stats_update_end(&tx_ring
->tx_syncp
);
6021 q_vector
->tx
.total_bytes
+= total_bytes
;
6022 q_vector
->tx
.total_packets
+= total_packets
;
6024 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6025 struct e1000_hw
*hw
= &adapter
->hw
;
6027 /* Detect a transmit hang in hardware, this serializes the
6028 * check with the clearing of time_stamp and movement of i */
6029 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6030 if (tx_buffer
->next_to_watch
&&
6031 time_after(jiffies
, tx_buffer
->time_stamp
+
6032 (adapter
->tx_timeout_factor
* HZ
)) &&
6033 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6035 /* detected Tx unit hang */
6036 dev_err(tx_ring
->dev
,
6037 "Detected Tx Unit Hang\n"
6041 " next_to_use <%x>\n"
6042 " next_to_clean <%x>\n"
6043 "buffer_info[next_to_clean]\n"
6044 " time_stamp <%lx>\n"
6045 " next_to_watch <%p>\n"
6047 " desc.status <%x>\n",
6048 tx_ring
->queue_index
,
6049 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6050 readl(tx_ring
->tail
),
6051 tx_ring
->next_to_use
,
6052 tx_ring
->next_to_clean
,
6053 tx_buffer
->time_stamp
,
6054 tx_buffer
->next_to_watch
,
6056 tx_buffer
->next_to_watch
->wb
.status
);
6057 netif_stop_subqueue(tx_ring
->netdev
,
6058 tx_ring
->queue_index
);
6060 /* we are about to reset, no point in enabling stuff */
6065 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6066 if (unlikely(total_packets
&&
6067 netif_carrier_ok(tx_ring
->netdev
) &&
6068 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6069 /* Make sure that anybody stopping the queue after this
6070 * sees the new next_to_clean.
6073 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6074 tx_ring
->queue_index
) &&
6075 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6076 netif_wake_subqueue(tx_ring
->netdev
,
6077 tx_ring
->queue_index
);
6079 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6080 tx_ring
->tx_stats
.restart_queue
++;
6081 u64_stats_update_end(&tx_ring
->tx_syncp
);
6089 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6090 * @rx_ring: rx descriptor ring to store buffers on
6091 * @old_buff: donor buffer to have page reused
6093 * Synchronizes page for reuse by the adapter
6095 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6096 struct igb_rx_buffer
*old_buff
)
6098 struct igb_rx_buffer
*new_buff
;
6099 u16 nta
= rx_ring
->next_to_alloc
;
6101 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6103 /* update, and store next to alloc */
6105 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6107 /* transfer page from old buffer to new buffer */
6108 memcpy(new_buff
, old_buff
, sizeof(struct igb_rx_buffer
));
6110 /* sync the buffer for use by the device */
6111 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6112 old_buff
->page_offset
,
6117 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6119 unsigned int truesize
)
6121 /* avoid re-using remote pages */
6122 if (unlikely(page_to_nid(page
) != numa_node_id()))
6125 #if (PAGE_SIZE < 8192)
6126 /* if we are only owner of page we can reuse it */
6127 if (unlikely(page_count(page
) != 1))
6130 /* flip page offset to other buffer */
6131 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6133 /* since we are the only owner of the page and we need to
6134 * increment it, just set the value to 2 in order to avoid
6135 * an unnecessary locked operation
6137 atomic_set(&page
->_count
, 2);
6139 /* move offset up to the next cache line */
6140 rx_buffer
->page_offset
+= truesize
;
6142 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6145 /* bump ref count on page before it is given to the stack */
6153 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6154 * @rx_ring: rx descriptor ring to transact packets on
6155 * @rx_buffer: buffer containing page to add
6156 * @rx_desc: descriptor containing length of buffer written by hardware
6157 * @skb: sk_buff to place the data into
6159 * This function will add the data contained in rx_buffer->page to the skb.
6160 * This is done either through a direct copy if the data in the buffer is
6161 * less than the skb header size, otherwise it will just attach the page as
6162 * a frag to the skb.
6164 * The function will then update the page offset if necessary and return
6165 * true if the buffer can be reused by the adapter.
6167 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6168 struct igb_rx_buffer
*rx_buffer
,
6169 union e1000_adv_rx_desc
*rx_desc
,
6170 struct sk_buff
*skb
)
6172 struct page
*page
= rx_buffer
->page
;
6173 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6174 #if (PAGE_SIZE < 8192)
6175 unsigned int truesize
= IGB_RX_BUFSZ
;
6177 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
6180 if ((size
<= IGB_RX_HDR_LEN
) && !skb_is_nonlinear(skb
)) {
6181 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6183 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6184 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6185 va
+= IGB_TS_HDR_LEN
;
6186 size
-= IGB_TS_HDR_LEN
;
6189 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6191 /* we can reuse buffer as-is, just make sure it is local */
6192 if (likely(page_to_nid(page
) == numa_node_id()))
6195 /* this page cannot be reused so discard it */
6200 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6201 rx_buffer
->page_offset
, size
, truesize
);
6203 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6206 static struct sk_buff
*igb_build_rx_buffer(struct igb_ring
*rx_ring
,
6207 union e1000_adv_rx_desc
*rx_desc
)
6209 struct igb_rx_buffer
*rx_buffer
;
6210 struct sk_buff
*skb
;
6213 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6214 #if (PAGE_SIZE < 8192)
6215 unsigned int truesize
= IGB_RX_BUFSZ
;
6217 unsigned int truesize
= SKB_DATA_ALIGN(sizeof(struct skb_shared_info
)) +
6218 SKB_DATA_ALIGN(NET_SKB_PAD
+
6223 /* If we spanned a buffer we have a huge mess so test for it */
6224 BUG_ON(unlikely(!igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)));
6226 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6227 page
= rx_buffer
->page
;
6230 page_addr
= page_address(page
) + rx_buffer
->page_offset
;
6232 /* prefetch first cache line of first page */
6233 prefetch(page_addr
+ NET_SKB_PAD
+ NET_IP_ALIGN
);
6234 #if L1_CACHE_BYTES < 128
6235 prefetch(page_addr
+ L1_CACHE_BYTES
+ NET_SKB_PAD
+ NET_IP_ALIGN
);
6238 /* build an skb to around the page buffer */
6239 skb
= build_skb(page_addr
, truesize
);
6240 if (unlikely(!skb
)) {
6241 rx_ring
->rx_stats
.alloc_failed
++;
6245 /* we are reusing so sync this buffer for CPU use */
6246 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6248 rx_buffer
->page_offset
,
6252 /* update pointers within the skb to store the data */
6253 skb_reserve(skb
, NET_IP_ALIGN
+ NET_SKB_PAD
);
6254 __skb_put(skb
, size
);
6256 /* pull timestamp out of packet data */
6257 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6258 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, skb
->data
, skb
);
6259 __skb_pull(skb
, IGB_TS_HDR_LEN
);
6262 if (igb_can_reuse_rx_page(rx_buffer
, page
, truesize
)) {
6263 /* hand second half of page back to the ring */
6264 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6266 /* we are not reusing the buffer so unmap it */
6267 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6268 PAGE_SIZE
, DMA_FROM_DEVICE
);
6271 /* clear contents of buffer_info */
6273 rx_buffer
->page
= NULL
;
6278 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6279 union e1000_adv_rx_desc
*rx_desc
,
6280 struct sk_buff
*skb
)
6282 struct igb_rx_buffer
*rx_buffer
;
6285 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6287 page
= rx_buffer
->page
;
6291 void *page_addr
= page_address(page
) +
6292 rx_buffer
->page_offset
;
6294 /* prefetch first cache line of first page */
6295 prefetch(page_addr
);
6296 #if L1_CACHE_BYTES < 128
6297 prefetch(page_addr
+ L1_CACHE_BYTES
);
6300 /* allocate a skb to store the frags */
6301 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
6303 if (unlikely(!skb
)) {
6304 rx_ring
->rx_stats
.alloc_failed
++;
6309 * we will be copying header into skb->data in
6310 * pskb_may_pull so it is in our interest to prefetch
6311 * it now to avoid a possible cache miss
6313 prefetchw(skb
->data
);
6316 /* we are reusing so sync this buffer for CPU use */
6317 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6319 rx_buffer
->page_offset
,
6323 /* pull page into skb */
6324 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6325 /* hand second half of page back to the ring */
6326 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6328 /* we are not reusing the buffer so unmap it */
6329 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6330 PAGE_SIZE
, DMA_FROM_DEVICE
);
6333 /* clear contents of rx_buffer */
6334 rx_buffer
->page
= NULL
;
6339 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6340 union e1000_adv_rx_desc
*rx_desc
,
6341 struct sk_buff
*skb
)
6343 skb_checksum_none_assert(skb
);
6345 /* Ignore Checksum bit is set */
6346 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6349 /* Rx checksum disabled via ethtool */
6350 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6353 /* TCP/UDP checksum error bit is set */
6354 if (igb_test_staterr(rx_desc
,
6355 E1000_RXDEXT_STATERR_TCPE
|
6356 E1000_RXDEXT_STATERR_IPE
)) {
6358 * work around errata with sctp packets where the TCPE aka
6359 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6360 * packets, (aka let the stack check the crc32c)
6362 if (!((skb
->len
== 60) &&
6363 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6364 u64_stats_update_begin(&ring
->rx_syncp
);
6365 ring
->rx_stats
.csum_err
++;
6366 u64_stats_update_end(&ring
->rx_syncp
);
6368 /* let the stack verify checksum errors */
6371 /* It must be a TCP or UDP packet with a valid checksum */
6372 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6373 E1000_RXD_STAT_UDPCS
))
6374 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6376 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6377 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6380 static inline void igb_rx_hash(struct igb_ring
*ring
,
6381 union e1000_adv_rx_desc
*rx_desc
,
6382 struct sk_buff
*skb
)
6384 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6385 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
6389 * igb_is_non_eop - process handling of non-EOP buffers
6390 * @rx_ring: Rx ring being processed
6391 * @rx_desc: Rx descriptor for current buffer
6392 * @skb: current socket buffer containing buffer in progress
6394 * This function updates next to clean. If the buffer is an EOP buffer
6395 * this function exits returning false, otherwise it will place the
6396 * sk_buff in the next buffer to be chained and return true indicating
6397 * that this is in fact a non-EOP buffer.
6399 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6400 union e1000_adv_rx_desc
*rx_desc
)
6402 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6404 /* fetch, update, and store next to clean */
6405 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6406 rx_ring
->next_to_clean
= ntc
;
6408 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6410 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6417 * igb_get_headlen - determine size of header for LRO/GRO
6418 * @data: pointer to the start of the headers
6419 * @max_len: total length of section to find headers in
6421 * This function is meant to determine the length of headers that will
6422 * be recognized by hardware for LRO, and GRO offloads. The main
6423 * motivation of doing this is to only perform one pull for IPv4 TCP
6424 * packets so that we can do basic things like calculating the gso_size
6425 * based on the average data per packet.
6427 static unsigned int igb_get_headlen(unsigned char *data
,
6428 unsigned int max_len
)
6431 unsigned char *network
;
6434 struct vlan_hdr
*vlan
;
6437 struct ipv6hdr
*ipv6
;
6440 u8 nexthdr
= 0; /* default to not TCP */
6443 /* this should never happen, but better safe than sorry */
6444 if (max_len
< ETH_HLEN
)
6447 /* initialize network frame pointer */
6450 /* set first protocol and move network header forward */
6451 protocol
= hdr
.eth
->h_proto
;
6452 hdr
.network
+= ETH_HLEN
;
6454 /* handle any vlan tag if present */
6455 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6456 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
6459 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
6460 hdr
.network
+= VLAN_HLEN
;
6463 /* handle L3 protocols */
6464 if (protocol
== __constant_htons(ETH_P_IP
)) {
6465 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
6468 /* access ihl as a u8 to avoid unaligned access on ia64 */
6469 hlen
= (hdr
.network
[0] & 0x0F) << 2;
6471 /* verify hlen meets minimum size requirements */
6472 if (hlen
< sizeof(struct iphdr
))
6473 return hdr
.network
- data
;
6475 /* record next protocol if header is present */
6476 if (!hdr
.ipv4
->frag_off
)
6477 nexthdr
= hdr
.ipv4
->protocol
;
6478 } else if (protocol
== __constant_htons(ETH_P_IPV6
)) {
6479 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
6482 /* record next protocol */
6483 nexthdr
= hdr
.ipv6
->nexthdr
;
6484 hlen
= sizeof(struct ipv6hdr
);
6486 return hdr
.network
- data
;
6489 /* relocate pointer to start of L4 header */
6490 hdr
.network
+= hlen
;
6492 /* finally sort out TCP */
6493 if (nexthdr
== IPPROTO_TCP
) {
6494 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
6497 /* access doff as a u8 to avoid unaligned access on ia64 */
6498 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
6500 /* verify hlen meets minimum size requirements */
6501 if (hlen
< sizeof(struct tcphdr
))
6502 return hdr
.network
- data
;
6504 hdr
.network
+= hlen
;
6505 } else if (nexthdr
== IPPROTO_UDP
) {
6506 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
6509 hdr
.network
+= sizeof(struct udphdr
);
6513 * If everything has gone correctly hdr.network should be the
6514 * data section of the packet and will be the end of the header.
6515 * If not then it probably represents the end of the last recognized
6518 if ((hdr
.network
- data
) < max_len
)
6519 return hdr
.network
- data
;
6525 * igb_pull_tail - igb specific version of skb_pull_tail
6526 * @rx_ring: rx descriptor ring packet is being transacted on
6527 * @rx_desc: pointer to the EOP Rx descriptor
6528 * @skb: pointer to current skb being adjusted
6530 * This function is an igb specific version of __pskb_pull_tail. The
6531 * main difference between this version and the original function is that
6532 * this function can make several assumptions about the state of things
6533 * that allow for significant optimizations versus the standard function.
6534 * As a result we can do things like drop a frag and maintain an accurate
6535 * truesize for the skb.
6537 static void igb_pull_tail(struct igb_ring
*rx_ring
,
6538 union e1000_adv_rx_desc
*rx_desc
,
6539 struct sk_buff
*skb
)
6541 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6543 unsigned int pull_len
;
6546 * it is valid to use page_address instead of kmap since we are
6547 * working with pages allocated out of the lomem pool per
6548 * alloc_page(GFP_ATOMIC)
6550 va
= skb_frag_address(frag
);
6552 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6553 /* retrieve timestamp from buffer */
6554 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6556 /* update pointers to remove timestamp header */
6557 skb_frag_size_sub(frag
, IGB_TS_HDR_LEN
);
6558 frag
->page_offset
+= IGB_TS_HDR_LEN
;
6559 skb
->data_len
-= IGB_TS_HDR_LEN
;
6560 skb
->len
-= IGB_TS_HDR_LEN
;
6562 /* move va to start of packet data */
6563 va
+= IGB_TS_HDR_LEN
;
6567 * we need the header to contain the greater of either ETH_HLEN or
6568 * 60 bytes if the skb->len is less than 60 for skb_pad.
6570 pull_len
= igb_get_headlen(va
, IGB_RX_HDR_LEN
);
6572 /* align pull length to size of long to optimize memcpy performance */
6573 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
6575 /* update all of the pointers */
6576 skb_frag_size_sub(frag
, pull_len
);
6577 frag
->page_offset
+= pull_len
;
6578 skb
->data_len
-= pull_len
;
6579 skb
->tail
+= pull_len
;
6583 * igb_cleanup_headers - Correct corrupted or empty headers
6584 * @rx_ring: rx descriptor ring packet is being transacted on
6585 * @rx_desc: pointer to the EOP Rx descriptor
6586 * @skb: pointer to current skb being fixed
6588 * Address the case where we are pulling data in on pages only
6589 * and as such no data is present in the skb header.
6591 * In addition if skb is not at least 60 bytes we need to pad it so that
6592 * it is large enough to qualify as a valid Ethernet frame.
6594 * Returns true if an error was encountered and skb was freed.
6596 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6597 union e1000_adv_rx_desc
*rx_desc
,
6598 struct sk_buff
*skb
)
6601 if (unlikely((igb_test_staterr(rx_desc
,
6602 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6603 struct net_device
*netdev
= rx_ring
->netdev
;
6604 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6605 dev_kfree_skb_any(skb
);
6610 /* place header in linear portion of buffer */
6611 if (skb_is_nonlinear(skb
))
6612 igb_pull_tail(rx_ring
, rx_desc
, skb
);
6614 /* if skb_pad returns an error the skb was freed */
6615 if (unlikely(skb
->len
< 60)) {
6616 int pad_len
= 60 - skb
->len
;
6618 if (skb_pad(skb
, pad_len
))
6620 __skb_put(skb
, pad_len
);
6627 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6628 * @rx_ring: rx descriptor ring packet is being transacted on
6629 * @rx_desc: pointer to the EOP Rx descriptor
6630 * @skb: pointer to current skb being populated
6632 * This function checks the ring, descriptor, and packet information in
6633 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6634 * other fields within the skb.
6636 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6637 union e1000_adv_rx_desc
*rx_desc
,
6638 struct sk_buff
*skb
)
6640 struct net_device
*dev
= rx_ring
->netdev
;
6642 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6644 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6646 igb_ptp_rx_hwtstamp(rx_ring
->q_vector
, rx_desc
, skb
);
6648 if ((dev
->features
& NETIF_F_HW_VLAN_RX
) &&
6649 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6651 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6652 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6653 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6655 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6657 __vlan_hwaccel_put_tag(skb
, vid
);
6660 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6662 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6665 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6667 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6668 struct sk_buff
*skb
= rx_ring
->skb
;
6669 unsigned int total_bytes
= 0, total_packets
= 0;
6670 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6673 union e1000_adv_rx_desc
*rx_desc
;
6675 /* return some buffers to hardware, one at a time is too slow */
6676 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
6677 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6681 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
6683 if (!igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
))
6686 /* This memory barrier is needed to keep us from reading
6687 * any other fields out of the rx_desc until we know the
6688 * RXD_STAT_DD bit is set
6692 /* retrieve a buffer from the ring */
6693 if (ring_uses_build_skb(rx_ring
))
6694 skb
= igb_build_rx_buffer(rx_ring
, rx_desc
);
6696 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
6698 /* exit if we failed to retrieve a buffer */
6704 /* fetch next buffer in frame if non-eop */
6705 if (igb_is_non_eop(rx_ring
, rx_desc
))
6708 /* verify the packet layout is correct */
6709 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
6714 /* probably a little skewed due to removing CRC */
6715 total_bytes
+= skb
->len
;
6717 /* populate checksum, timestamp, VLAN, and protocol */
6718 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
6720 napi_gro_receive(&q_vector
->napi
, skb
);
6722 /* reset skb pointer */
6725 /* update budget accounting */
6727 } while (likely(total_packets
< budget
));
6729 /* place incomplete frames back on ring for completion */
6732 u64_stats_update_begin(&rx_ring
->rx_syncp
);
6733 rx_ring
->rx_stats
.packets
+= total_packets
;
6734 rx_ring
->rx_stats
.bytes
+= total_bytes
;
6735 u64_stats_update_end(&rx_ring
->rx_syncp
);
6736 q_vector
->rx
.total_packets
+= total_packets
;
6737 q_vector
->rx
.total_bytes
+= total_bytes
;
6740 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6742 return (total_packets
< budget
);
6745 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
6746 struct igb_rx_buffer
*bi
)
6748 struct page
*page
= bi
->page
;
6751 /* since we are recycling buffers we should seldom need to alloc */
6755 /* alloc new page for storage */
6756 page
= __skb_alloc_page(GFP_ATOMIC
| __GFP_COLD
, NULL
);
6757 if (unlikely(!page
)) {
6758 rx_ring
->rx_stats
.alloc_failed
++;
6762 /* map page for use */
6763 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
6766 * if mapping failed free memory back to system since
6767 * there isn't much point in holding memory we can't use
6769 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
6772 rx_ring
->rx_stats
.alloc_failed
++;
6778 bi
->page_offset
= 0;
6783 static inline unsigned int igb_rx_offset(struct igb_ring
*rx_ring
)
6785 if (ring_uses_build_skb(rx_ring
))
6786 return NET_SKB_PAD
+ NET_IP_ALIGN
;
6792 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
6793 * @adapter: address of board private structure
6795 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
6797 union e1000_adv_rx_desc
*rx_desc
;
6798 struct igb_rx_buffer
*bi
;
6799 u16 i
= rx_ring
->next_to_use
;
6805 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
6806 bi
= &rx_ring
->rx_buffer_info
[i
];
6807 i
-= rx_ring
->count
;
6810 if (!igb_alloc_mapped_page(rx_ring
, bi
))
6814 * Refresh the desc even if buffer_addrs didn't change
6815 * because each write-back erases this info.
6817 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+
6819 igb_rx_offset(rx_ring
));
6825 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
6826 bi
= rx_ring
->rx_buffer_info
;
6827 i
-= rx_ring
->count
;
6830 /* clear the hdr_addr for the next_to_use descriptor */
6831 rx_desc
->read
.hdr_addr
= 0;
6834 } while (cleaned_count
);
6836 i
+= rx_ring
->count
;
6838 if (rx_ring
->next_to_use
!= i
) {
6839 /* record the next descriptor to use */
6840 rx_ring
->next_to_use
= i
;
6842 /* update next to alloc since we have filled the ring */
6843 rx_ring
->next_to_alloc
= i
;
6846 * Force memory writes to complete before letting h/w
6847 * know there are new descriptors to fetch. (Only
6848 * applicable for weak-ordered memory model archs,
6852 writel(i
, rx_ring
->tail
);
6862 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
6864 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6865 struct mii_ioctl_data
*data
= if_mii(ifr
);
6867 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
6872 data
->phy_id
= adapter
->hw
.phy
.addr
;
6875 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
6892 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
6898 return igb_mii_ioctl(netdev
, ifr
, cmd
);
6900 return igb_ptp_hwtstamp_ioctl(netdev
, ifr
, cmd
);
6906 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
6908 struct igb_adapter
*adapter
= hw
->back
;
6910 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
6911 return -E1000_ERR_CONFIG
;
6916 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
6918 struct igb_adapter
*adapter
= hw
->back
;
6920 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
6921 return -E1000_ERR_CONFIG
;
6926 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
6928 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6929 struct e1000_hw
*hw
= &adapter
->hw
;
6931 bool enable
= !!(features
& NETIF_F_HW_VLAN_RX
);
6934 /* enable VLAN tag insert/strip */
6935 ctrl
= rd32(E1000_CTRL
);
6936 ctrl
|= E1000_CTRL_VME
;
6937 wr32(E1000_CTRL
, ctrl
);
6939 /* Disable CFI check */
6940 rctl
= rd32(E1000_RCTL
);
6941 rctl
&= ~E1000_RCTL_CFIEN
;
6942 wr32(E1000_RCTL
, rctl
);
6944 /* disable VLAN tag insert/strip */
6945 ctrl
= rd32(E1000_CTRL
);
6946 ctrl
&= ~E1000_CTRL_VME
;
6947 wr32(E1000_CTRL
, ctrl
);
6950 igb_rlpml_set(adapter
);
6953 static int igb_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
6955 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6956 struct e1000_hw
*hw
= &adapter
->hw
;
6957 int pf_id
= adapter
->vfs_allocated_count
;
6959 /* attempt to add filter to vlvf array */
6960 igb_vlvf_set(adapter
, vid
, true, pf_id
);
6962 /* add the filter since PF can receive vlans w/o entry in vlvf */
6963 igb_vfta_set(hw
, vid
, true);
6965 set_bit(vid
, adapter
->active_vlans
);
6970 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
6972 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6973 struct e1000_hw
*hw
= &adapter
->hw
;
6974 int pf_id
= adapter
->vfs_allocated_count
;
6977 /* remove vlan from VLVF table array */
6978 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
6980 /* if vid was not present in VLVF just remove it from table */
6982 igb_vfta_set(hw
, vid
, false);
6984 clear_bit(vid
, adapter
->active_vlans
);
6989 static void igb_restore_vlan(struct igb_adapter
*adapter
)
6993 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
6995 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
6996 igb_vlan_rx_add_vid(adapter
->netdev
, vid
);
6999 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7001 struct pci_dev
*pdev
= adapter
->pdev
;
7002 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7006 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7007 * for the switch() below to work */
7008 if ((spd
& 1) || (dplx
& ~1))
7011 /* Fiber NIC's only allow 1000 Gbps Full duplex */
7012 if ((adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) &&
7013 spd
!= SPEED_1000
&&
7014 dplx
!= DUPLEX_FULL
)
7017 switch (spd
+ dplx
) {
7018 case SPEED_10
+ DUPLEX_HALF
:
7019 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7021 case SPEED_10
+ DUPLEX_FULL
:
7022 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7024 case SPEED_100
+ DUPLEX_HALF
:
7025 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7027 case SPEED_100
+ DUPLEX_FULL
:
7028 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7030 case SPEED_1000
+ DUPLEX_FULL
:
7032 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7034 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7039 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7040 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7045 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7049 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7052 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7053 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7054 struct e1000_hw
*hw
= &adapter
->hw
;
7055 u32 ctrl
, rctl
, status
;
7056 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7061 netif_device_detach(netdev
);
7063 if (netif_running(netdev
))
7064 __igb_close(netdev
, true);
7066 igb_clear_interrupt_scheme(adapter
);
7069 retval
= pci_save_state(pdev
);
7074 status
= rd32(E1000_STATUS
);
7075 if (status
& E1000_STATUS_LU
)
7076 wufc
&= ~E1000_WUFC_LNKC
;
7079 igb_setup_rctl(adapter
);
7080 igb_set_rx_mode(netdev
);
7082 /* turn on all-multi mode if wake on multicast is enabled */
7083 if (wufc
& E1000_WUFC_MC
) {
7084 rctl
= rd32(E1000_RCTL
);
7085 rctl
|= E1000_RCTL_MPE
;
7086 wr32(E1000_RCTL
, rctl
);
7089 ctrl
= rd32(E1000_CTRL
);
7090 /* advertise wake from D3Cold */
7091 #define E1000_CTRL_ADVD3WUC 0x00100000
7092 /* phy power management enable */
7093 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7094 ctrl
|= E1000_CTRL_ADVD3WUC
;
7095 wr32(E1000_CTRL
, ctrl
);
7097 /* Allow time for pending master requests to run */
7098 igb_disable_pcie_master(hw
);
7100 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7101 wr32(E1000_WUFC
, wufc
);
7104 wr32(E1000_WUFC
, 0);
7107 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7109 igb_power_down_link(adapter
);
7111 igb_power_up_link(adapter
);
7113 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7114 * would have already happened in close and is redundant. */
7115 igb_release_hw_control(adapter
);
7117 pci_disable_device(pdev
);
7123 #ifdef CONFIG_PM_SLEEP
7124 static int igb_suspend(struct device
*dev
)
7128 struct pci_dev
*pdev
= to_pci_dev(dev
);
7130 retval
= __igb_shutdown(pdev
, &wake
, 0);
7135 pci_prepare_to_sleep(pdev
);
7137 pci_wake_from_d3(pdev
, false);
7138 pci_set_power_state(pdev
, PCI_D3hot
);
7143 #endif /* CONFIG_PM_SLEEP */
7145 static int igb_resume(struct device
*dev
)
7147 struct pci_dev
*pdev
= to_pci_dev(dev
);
7148 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7149 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7150 struct e1000_hw
*hw
= &adapter
->hw
;
7153 pci_set_power_state(pdev
, PCI_D0
);
7154 pci_restore_state(pdev
);
7155 pci_save_state(pdev
);
7157 err
= pci_enable_device_mem(pdev
);
7160 "igb: Cannot enable PCI device from suspend\n");
7163 pci_set_master(pdev
);
7165 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7166 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7168 if (igb_init_interrupt_scheme(adapter
, true)) {
7169 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7175 /* let the f/w know that the h/w is now under the control of the
7177 igb_get_hw_control(adapter
);
7179 wr32(E1000_WUS
, ~0);
7181 if (netdev
->flags
& IFF_UP
) {
7183 err
= __igb_open(netdev
, true);
7189 netif_device_attach(netdev
);
7193 #ifdef CONFIG_PM_RUNTIME
7194 static int igb_runtime_idle(struct device
*dev
)
7196 struct pci_dev
*pdev
= to_pci_dev(dev
);
7197 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7198 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7200 if (!igb_has_link(adapter
))
7201 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7206 static int igb_runtime_suspend(struct device
*dev
)
7208 struct pci_dev
*pdev
= to_pci_dev(dev
);
7212 retval
= __igb_shutdown(pdev
, &wake
, 1);
7217 pci_prepare_to_sleep(pdev
);
7219 pci_wake_from_d3(pdev
, false);
7220 pci_set_power_state(pdev
, PCI_D3hot
);
7226 static int igb_runtime_resume(struct device
*dev
)
7228 return igb_resume(dev
);
7230 #endif /* CONFIG_PM_RUNTIME */
7233 static void igb_shutdown(struct pci_dev
*pdev
)
7237 __igb_shutdown(pdev
, &wake
, 0);
7239 if (system_state
== SYSTEM_POWER_OFF
) {
7240 pci_wake_from_d3(pdev
, wake
);
7241 pci_set_power_state(pdev
, PCI_D3hot
);
7245 #ifdef CONFIG_PCI_IOV
7246 static int igb_sriov_reinit(struct pci_dev
*dev
)
7248 struct net_device
*netdev
= pci_get_drvdata(dev
);
7249 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7250 struct pci_dev
*pdev
= adapter
->pdev
;
7254 if (netif_running(netdev
))
7257 igb_clear_interrupt_scheme(adapter
);
7259 igb_init_queue_configuration(adapter
);
7261 if (igb_init_interrupt_scheme(adapter
, true)) {
7262 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7266 if (netif_running(netdev
))
7274 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7276 int err
= igb_disable_sriov(dev
);
7279 err
= igb_sriov_reinit(dev
);
7284 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7286 int err
= igb_enable_sriov(dev
, num_vfs
);
7291 err
= igb_sriov_reinit(dev
);
7300 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7302 #ifdef CONFIG_PCI_IOV
7304 return igb_pci_disable_sriov(dev
);
7306 return igb_pci_enable_sriov(dev
, num_vfs
);
7311 #ifdef CONFIG_NET_POLL_CONTROLLER
7313 * Polling 'interrupt' - used by things like netconsole to send skbs
7314 * without having to re-enable interrupts. It's not called while
7315 * the interrupt routine is executing.
7317 static void igb_netpoll(struct net_device
*netdev
)
7319 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7320 struct e1000_hw
*hw
= &adapter
->hw
;
7321 struct igb_q_vector
*q_vector
;
7324 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7325 q_vector
= adapter
->q_vector
[i
];
7326 if (adapter
->msix_entries
)
7327 wr32(E1000_EIMC
, q_vector
->eims_value
);
7329 igb_irq_disable(adapter
);
7330 napi_schedule(&q_vector
->napi
);
7333 #endif /* CONFIG_NET_POLL_CONTROLLER */
7336 * igb_io_error_detected - called when PCI error is detected
7337 * @pdev: Pointer to PCI device
7338 * @state: The current pci connection state
7340 * This function is called after a PCI bus error affecting
7341 * this device has been detected.
7343 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7344 pci_channel_state_t state
)
7346 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7347 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7349 netif_device_detach(netdev
);
7351 if (state
== pci_channel_io_perm_failure
)
7352 return PCI_ERS_RESULT_DISCONNECT
;
7354 if (netif_running(netdev
))
7356 pci_disable_device(pdev
);
7358 /* Request a slot slot reset. */
7359 return PCI_ERS_RESULT_NEED_RESET
;
7363 * igb_io_slot_reset - called after the pci bus has been reset.
7364 * @pdev: Pointer to PCI device
7366 * Restart the card from scratch, as if from a cold-boot. Implementation
7367 * resembles the first-half of the igb_resume routine.
7369 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7371 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7372 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7373 struct e1000_hw
*hw
= &adapter
->hw
;
7374 pci_ers_result_t result
;
7377 if (pci_enable_device_mem(pdev
)) {
7379 "Cannot re-enable PCI device after reset.\n");
7380 result
= PCI_ERS_RESULT_DISCONNECT
;
7382 pci_set_master(pdev
);
7383 pci_restore_state(pdev
);
7384 pci_save_state(pdev
);
7386 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7387 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7390 wr32(E1000_WUS
, ~0);
7391 result
= PCI_ERS_RESULT_RECOVERED
;
7394 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7396 dev_err(&pdev
->dev
, "pci_cleanup_aer_uncorrect_error_status "
7397 "failed 0x%0x\n", err
);
7398 /* non-fatal, continue */
7405 * igb_io_resume - called when traffic can start flowing again.
7406 * @pdev: Pointer to PCI device
7408 * This callback is called when the error recovery driver tells us that
7409 * its OK to resume normal operation. Implementation resembles the
7410 * second-half of the igb_resume routine.
7412 static void igb_io_resume(struct pci_dev
*pdev
)
7414 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7415 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7417 if (netif_running(netdev
)) {
7418 if (igb_up(adapter
)) {
7419 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7424 netif_device_attach(netdev
);
7426 /* let the f/w know that the h/w is now under the control of the
7428 igb_get_hw_control(adapter
);
7431 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7434 u32 rar_low
, rar_high
;
7435 struct e1000_hw
*hw
= &adapter
->hw
;
7437 /* HW expects these in little endian so we reverse the byte order
7438 * from network order (big endian) to little endian
7440 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7441 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7442 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7444 /* Indicate to hardware the Address is Valid. */
7445 rar_high
|= E1000_RAH_AV
;
7447 if (hw
->mac
.type
== e1000_82575
)
7448 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7450 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7452 wr32(E1000_RAL(index
), rar_low
);
7454 wr32(E1000_RAH(index
), rar_high
);
7458 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7459 int vf
, unsigned char *mac_addr
)
7461 struct e1000_hw
*hw
= &adapter
->hw
;
7462 /* VF MAC addresses start at end of receive addresses and moves
7463 * torwards the first, as a result a collision should not be possible */
7464 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7466 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7468 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7473 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7475 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7476 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7478 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7479 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7480 dev_info(&adapter
->pdev
->dev
, "Reload the VF driver to make this"
7481 " change effective.");
7482 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7483 dev_warn(&adapter
->pdev
->dev
, "The VF MAC address has been set,"
7484 " but the PF device is not up.\n");
7485 dev_warn(&adapter
->pdev
->dev
, "Bring the PF device up before"
7486 " attempting to use the VF device.\n");
7488 return igb_set_vf_mac(adapter
, vf
, mac
);
7491 static int igb_link_mbps(int internal_link_speed
)
7493 switch (internal_link_speed
) {
7503 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7510 /* Calculate the rate factor values to set */
7511 rf_int
= link_speed
/ tx_rate
;
7512 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7513 rf_dec
= (rf_dec
* (1<<E1000_RTTBCNRC_RF_INT_SHIFT
)) / tx_rate
;
7515 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7516 bcnrc_val
|= ((rf_int
<<E1000_RTTBCNRC_RF_INT_SHIFT
) &
7517 E1000_RTTBCNRC_RF_INT_MASK
);
7518 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7523 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7525 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7526 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7528 wr32(E1000_RTTBCNRM
, 0x14);
7529 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7532 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7534 int actual_link_speed
, i
;
7535 bool reset_rate
= false;
7537 /* VF TX rate limit was not set or not supported */
7538 if ((adapter
->vf_rate_link_speed
== 0) ||
7539 (adapter
->hw
.mac
.type
!= e1000_82576
))
7542 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7543 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7545 adapter
->vf_rate_link_speed
= 0;
7546 dev_info(&adapter
->pdev
->dev
,
7547 "Link speed has been changed. VF Transmit "
7548 "rate is disabled\n");
7551 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7553 adapter
->vf_data
[i
].tx_rate
= 0;
7555 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7556 adapter
->vf_data
[i
].tx_rate
,
7561 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
)
7563 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7564 struct e1000_hw
*hw
= &adapter
->hw
;
7565 int actual_link_speed
;
7567 if (hw
->mac
.type
!= e1000_82576
)
7570 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7571 if ((vf
>= adapter
->vfs_allocated_count
) ||
7572 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7573 (tx_rate
< 0) || (tx_rate
> actual_link_speed
))
7576 adapter
->vf_rate_link_speed
= actual_link_speed
;
7577 adapter
->vf_data
[vf
].tx_rate
= (u16
)tx_rate
;
7578 igb_set_vf_rate_limit(hw
, vf
, tx_rate
, actual_link_speed
);
7583 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7584 int vf
, struct ifla_vf_info
*ivi
)
7586 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7587 if (vf
>= adapter
->vfs_allocated_count
)
7590 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7591 ivi
->tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7592 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7593 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7597 static void igb_vmm_control(struct igb_adapter
*adapter
)
7599 struct e1000_hw
*hw
= &adapter
->hw
;
7602 switch (hw
->mac
.type
) {
7607 /* replication is not supported for 82575 */
7610 /* notify HW that the MAC is adding vlan tags */
7611 reg
= rd32(E1000_DTXCTL
);
7612 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7613 wr32(E1000_DTXCTL
, reg
);
7615 /* enable replication vlan tag stripping */
7616 reg
= rd32(E1000_RPLOLR
);
7617 reg
|= E1000_RPLOLR_STRVLAN
;
7618 wr32(E1000_RPLOLR
, reg
);
7620 /* none of the above registers are supported by i350 */
7624 if (adapter
->vfs_allocated_count
) {
7625 igb_vmdq_set_loopback_pf(hw
, true);
7626 igb_vmdq_set_replication_pf(hw
, true);
7627 igb_vmdq_set_anti_spoofing_pf(hw
, true,
7628 adapter
->vfs_allocated_count
);
7630 igb_vmdq_set_loopback_pf(hw
, false);
7631 igb_vmdq_set_replication_pf(hw
, false);
7635 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
7637 struct e1000_hw
*hw
= &adapter
->hw
;
7641 if (hw
->mac
.type
> e1000_82580
) {
7642 if (adapter
->flags
& IGB_FLAG_DMAC
) {
7645 /* force threshold to 0. */
7646 wr32(E1000_DMCTXTH
, 0);
7649 * DMA Coalescing high water mark needs to be greater
7650 * than the Rx threshold. Set hwm to PBA - max frame
7651 * size in 16B units, capping it at PBA - 6KB.
7653 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
7654 if (hwm
< 64 * (pba
- 6))
7655 hwm
= 64 * (pba
- 6);
7656 reg
= rd32(E1000_FCRTC
);
7657 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
7658 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
7659 & E1000_FCRTC_RTH_COAL_MASK
);
7660 wr32(E1000_FCRTC
, reg
);
7663 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
7664 * frame size, capping it at PBA - 10KB.
7666 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
7667 if (dmac_thr
< pba
- 10)
7668 dmac_thr
= pba
- 10;
7669 reg
= rd32(E1000_DMACR
);
7670 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
7671 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
7672 & E1000_DMACR_DMACTHR_MASK
);
7674 /* transition to L0x or L1 if available..*/
7675 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
7677 /* watchdog timer= +-1000 usec in 32usec intervals */
7680 /* Disable BMC-to-OS Watchdog Enable */
7681 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
7682 wr32(E1000_DMACR
, reg
);
7685 * no lower threshold to disable
7686 * coalescing(smart fifb)-UTRESH=0
7688 wr32(E1000_DMCRTRH
, 0);
7690 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
7692 wr32(E1000_DMCTLX
, reg
);
7695 * free space in tx packet buffer to wake from
7698 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
7699 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
7702 * make low power state decision controlled
7705 reg
= rd32(E1000_PCIEMISC
);
7706 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
7707 wr32(E1000_PCIEMISC
, reg
);
7708 } /* endif adapter->dmac is not disabled */
7709 } else if (hw
->mac
.type
== e1000_82580
) {
7710 u32 reg
= rd32(E1000_PCIEMISC
);
7711 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
7712 wr32(E1000_DMACR
, 0);
7716 /* igb_read_i2c_byte - Reads 8 bit word over I2C
7717 * @hw: pointer to hardware structure
7718 * @byte_offset: byte offset to read
7719 * @dev_addr: device address
7722 * Performs byte read operation over I2C interface at
7723 * a specified device address.
7725 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
7726 u8 dev_addr
, u8
*data
)
7728 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
7729 struct i2c_client
*this_client
= adapter
->i2c_client
;
7734 return E1000_ERR_I2C
;
7736 swfw_mask
= E1000_SWFW_PHY0_SM
;
7738 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
)
7740 return E1000_ERR_SWFW_SYNC
;
7742 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
7743 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
7746 return E1000_ERR_I2C
;
7749 return E1000_SUCCESS
;
7753 /* igb_write_i2c_byte - Writes 8 bit word over I2C
7754 * @hw: pointer to hardware structure
7755 * @byte_offset: byte offset to write
7756 * @dev_addr: device address
7757 * @data: value to write
7759 * Performs byte write operation over I2C interface at
7760 * a specified device address.
7762 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
7763 u8 dev_addr
, u8 data
)
7765 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
7766 struct i2c_client
*this_client
= adapter
->i2c_client
;
7768 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
7771 return E1000_ERR_I2C
;
7773 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
) != E1000_SUCCESS
)
7774 return E1000_ERR_SWFW_SYNC
;
7775 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
7776 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
7779 return E1000_ERR_I2C
;
7781 return E1000_SUCCESS
;