1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
54 #include <linux/dca.h>
56 #include <linux/i2c.h>
62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
63 __stringify(BUILD) "-k"
64 char igb_driver_name
[] = "igb";
65 char igb_driver_version
[] = DRV_VERSION
;
66 static const char igb_driver_string
[] =
67 "Intel(R) Gigabit Ethernet Network Driver";
68 static const char igb_copyright
[] =
69 "Copyright (c) 2007-2014 Intel Corporation.";
71 static const struct e1000_info
*igb_info_tbl
[] = {
72 [board_82575
] = &e1000_82575_info
,
75 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl
) = {
76 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
111 /* required last entry */
115 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
117 void igb_reset(struct igb_adapter
*);
118 static int igb_setup_all_tx_resources(struct igb_adapter
*);
119 static int igb_setup_all_rx_resources(struct igb_adapter
*);
120 static void igb_free_all_tx_resources(struct igb_adapter
*);
121 static void igb_free_all_rx_resources(struct igb_adapter
*);
122 static void igb_setup_mrqc(struct igb_adapter
*);
123 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
124 static void igb_remove(struct pci_dev
*pdev
);
125 static int igb_sw_init(struct igb_adapter
*);
126 static int igb_open(struct net_device
*);
127 static int igb_close(struct net_device
*);
128 static void igb_configure(struct igb_adapter
*);
129 static void igb_configure_tx(struct igb_adapter
*);
130 static void igb_configure_rx(struct igb_adapter
*);
131 static void igb_clean_all_tx_rings(struct igb_adapter
*);
132 static void igb_clean_all_rx_rings(struct igb_adapter
*);
133 static void igb_clean_tx_ring(struct igb_ring
*);
134 static void igb_clean_rx_ring(struct igb_ring
*);
135 static void igb_set_rx_mode(struct net_device
*);
136 static void igb_update_phy_info(unsigned long);
137 static void igb_watchdog(unsigned long);
138 static void igb_watchdog_task(struct work_struct
*);
139 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
140 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
141 struct rtnl_link_stats64
*stats
);
142 static int igb_change_mtu(struct net_device
*, int);
143 static int igb_set_mac(struct net_device
*, void *);
144 static void igb_set_uta(struct igb_adapter
*adapter
);
145 static irqreturn_t
igb_intr(int irq
, void *);
146 static irqreturn_t
igb_intr_msi(int irq
, void *);
147 static irqreturn_t
igb_msix_other(int irq
, void *);
148 static irqreturn_t
igb_msix_ring(int irq
, void *);
149 #ifdef CONFIG_IGB_DCA
150 static void igb_update_dca(struct igb_q_vector
*);
151 static void igb_setup_dca(struct igb_adapter
*);
152 #endif /* CONFIG_IGB_DCA */
153 static int igb_poll(struct napi_struct
*, int);
154 static bool igb_clean_tx_irq(struct igb_q_vector
*);
155 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
156 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
157 static void igb_tx_timeout(struct net_device
*);
158 static void igb_reset_task(struct work_struct
*);
159 static void igb_vlan_mode(struct net_device
*netdev
,
160 netdev_features_t features
);
161 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
162 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
163 static void igb_restore_vlan(struct igb_adapter
*);
164 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
165 static void igb_ping_all_vfs(struct igb_adapter
*);
166 static void igb_msg_task(struct igb_adapter
*);
167 static void igb_vmm_control(struct igb_adapter
*);
168 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
169 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
170 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
171 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
172 int vf
, u16 vlan
, u8 qos
);
173 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
);
174 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
176 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
177 struct ifla_vf_info
*ivi
);
178 static void igb_check_vf_rate_limit(struct igb_adapter
*);
180 #ifdef CONFIG_PCI_IOV
181 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
182 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
186 #ifdef CONFIG_PM_SLEEP
187 static int igb_suspend(struct device
*);
189 static int igb_resume(struct device
*);
190 #ifdef CONFIG_PM_RUNTIME
191 static int igb_runtime_suspend(struct device
*dev
);
192 static int igb_runtime_resume(struct device
*dev
);
193 static int igb_runtime_idle(struct device
*dev
);
195 static const struct dev_pm_ops igb_pm_ops
= {
196 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
197 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
201 static void igb_shutdown(struct pci_dev
*);
202 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
203 #ifdef CONFIG_IGB_DCA
204 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
205 static struct notifier_block dca_notifier
= {
206 .notifier_call
= igb_notify_dca
,
211 #ifdef CONFIG_NET_POLL_CONTROLLER
212 /* for netdump / net console */
213 static void igb_netpoll(struct net_device
*);
215 #ifdef CONFIG_PCI_IOV
216 static unsigned int max_vfs
= 0;
217 module_param(max_vfs
, uint
, 0);
218 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
219 #endif /* CONFIG_PCI_IOV */
221 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
222 pci_channel_state_t
);
223 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
224 static void igb_io_resume(struct pci_dev
*);
226 static const struct pci_error_handlers igb_err_handler
= {
227 .error_detected
= igb_io_error_detected
,
228 .slot_reset
= igb_io_slot_reset
,
229 .resume
= igb_io_resume
,
232 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
234 static struct pci_driver igb_driver
= {
235 .name
= igb_driver_name
,
236 .id_table
= igb_pci_tbl
,
238 .remove
= igb_remove
,
240 .driver
.pm
= &igb_pm_ops
,
242 .shutdown
= igb_shutdown
,
243 .sriov_configure
= igb_pci_sriov_configure
,
244 .err_handler
= &igb_err_handler
247 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
248 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
249 MODULE_LICENSE("GPL");
250 MODULE_VERSION(DRV_VERSION
);
252 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
253 static int debug
= -1;
254 module_param(debug
, int, 0);
255 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
257 struct igb_reg_info
{
262 static const struct igb_reg_info igb_reg_info_tbl
[] = {
264 /* General Registers */
265 {E1000_CTRL
, "CTRL"},
266 {E1000_STATUS
, "STATUS"},
267 {E1000_CTRL_EXT
, "CTRL_EXT"},
269 /* Interrupt Registers */
273 {E1000_RCTL
, "RCTL"},
274 {E1000_RDLEN(0), "RDLEN"},
275 {E1000_RDH(0), "RDH"},
276 {E1000_RDT(0), "RDT"},
277 {E1000_RXDCTL(0), "RXDCTL"},
278 {E1000_RDBAL(0), "RDBAL"},
279 {E1000_RDBAH(0), "RDBAH"},
282 {E1000_TCTL
, "TCTL"},
283 {E1000_TDBAL(0), "TDBAL"},
284 {E1000_TDBAH(0), "TDBAH"},
285 {E1000_TDLEN(0), "TDLEN"},
286 {E1000_TDH(0), "TDH"},
287 {E1000_TDT(0), "TDT"},
288 {E1000_TXDCTL(0), "TXDCTL"},
289 {E1000_TDFH
, "TDFH"},
290 {E1000_TDFT
, "TDFT"},
291 {E1000_TDFHS
, "TDFHS"},
292 {E1000_TDFPC
, "TDFPC"},
294 /* List Terminator */
298 /* igb_regdump - register printout routine */
299 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
305 switch (reginfo
->ofs
) {
307 for (n
= 0; n
< 4; n
++)
308 regs
[n
] = rd32(E1000_RDLEN(n
));
311 for (n
= 0; n
< 4; n
++)
312 regs
[n
] = rd32(E1000_RDH(n
));
315 for (n
= 0; n
< 4; n
++)
316 regs
[n
] = rd32(E1000_RDT(n
));
318 case E1000_RXDCTL(0):
319 for (n
= 0; n
< 4; n
++)
320 regs
[n
] = rd32(E1000_RXDCTL(n
));
323 for (n
= 0; n
< 4; n
++)
324 regs
[n
] = rd32(E1000_RDBAL(n
));
327 for (n
= 0; n
< 4; n
++)
328 regs
[n
] = rd32(E1000_RDBAH(n
));
331 for (n
= 0; n
< 4; n
++)
332 regs
[n
] = rd32(E1000_RDBAL(n
));
335 for (n
= 0; n
< 4; n
++)
336 regs
[n
] = rd32(E1000_TDBAH(n
));
339 for (n
= 0; n
< 4; n
++)
340 regs
[n
] = rd32(E1000_TDLEN(n
));
343 for (n
= 0; n
< 4; n
++)
344 regs
[n
] = rd32(E1000_TDH(n
));
347 for (n
= 0; n
< 4; n
++)
348 regs
[n
] = rd32(E1000_TDT(n
));
350 case E1000_TXDCTL(0):
351 for (n
= 0; n
< 4; n
++)
352 regs
[n
] = rd32(E1000_TXDCTL(n
));
355 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
359 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
360 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
364 /* igb_dump - Print registers, Tx-rings and Rx-rings */
365 static void igb_dump(struct igb_adapter
*adapter
)
367 struct net_device
*netdev
= adapter
->netdev
;
368 struct e1000_hw
*hw
= &adapter
->hw
;
369 struct igb_reg_info
*reginfo
;
370 struct igb_ring
*tx_ring
;
371 union e1000_adv_tx_desc
*tx_desc
;
372 struct my_u0
{ u64 a
; u64 b
; } *u0
;
373 struct igb_ring
*rx_ring
;
374 union e1000_adv_rx_desc
*rx_desc
;
378 if (!netif_msg_hw(adapter
))
381 /* Print netdevice Info */
383 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
384 pr_info("Device Name state trans_start last_rx\n");
385 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
386 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
389 /* Print Registers */
390 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
391 pr_info(" Register Name Value\n");
392 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
393 reginfo
->name
; reginfo
++) {
394 igb_regdump(hw
, reginfo
);
397 /* Print TX Ring Summary */
398 if (!netdev
|| !netif_running(netdev
))
401 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
402 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
403 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
404 struct igb_tx_buffer
*buffer_info
;
405 tx_ring
= adapter
->tx_ring
[n
];
406 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
407 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
408 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
409 (u64
)dma_unmap_addr(buffer_info
, dma
),
410 dma_unmap_len(buffer_info
, len
),
411 buffer_info
->next_to_watch
,
412 (u64
)buffer_info
->time_stamp
);
416 if (!netif_msg_tx_done(adapter
))
417 goto rx_ring_summary
;
419 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
421 /* Transmit Descriptor Formats
423 * Advanced Transmit Descriptor
424 * +--------------------------------------------------------------+
425 * 0 | Buffer Address [63:0] |
426 * +--------------------------------------------------------------+
427 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
428 * +--------------------------------------------------------------+
429 * 63 46 45 40 39 38 36 35 32 31 24 15 0
432 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
433 tx_ring
= adapter
->tx_ring
[n
];
434 pr_info("------------------------------------\n");
435 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
436 pr_info("------------------------------------\n");
437 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
439 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
440 const char *next_desc
;
441 struct igb_tx_buffer
*buffer_info
;
442 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
443 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
444 u0
= (struct my_u0
*)tx_desc
;
445 if (i
== tx_ring
->next_to_use
&&
446 i
== tx_ring
->next_to_clean
)
447 next_desc
= " NTC/U";
448 else if (i
== tx_ring
->next_to_use
)
450 else if (i
== tx_ring
->next_to_clean
)
455 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
456 i
, le64_to_cpu(u0
->a
),
458 (u64
)dma_unmap_addr(buffer_info
, dma
),
459 dma_unmap_len(buffer_info
, len
),
460 buffer_info
->next_to_watch
,
461 (u64
)buffer_info
->time_stamp
,
462 buffer_info
->skb
, next_desc
);
464 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
465 print_hex_dump(KERN_INFO
, "",
467 16, 1, buffer_info
->skb
->data
,
468 dma_unmap_len(buffer_info
, len
),
473 /* Print RX Rings Summary */
475 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
476 pr_info("Queue [NTU] [NTC]\n");
477 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
478 rx_ring
= adapter
->rx_ring
[n
];
479 pr_info(" %5d %5X %5X\n",
480 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
484 if (!netif_msg_rx_status(adapter
))
487 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
489 /* Advanced Receive Descriptor (Read) Format
491 * +-----------------------------------------------------+
492 * 0 | Packet Buffer Address [63:1] |A0/NSE|
493 * +----------------------------------------------+------+
494 * 8 | Header Buffer Address [63:1] | DD |
495 * +-----------------------------------------------------+
498 * Advanced Receive Descriptor (Write-Back) Format
500 * 63 48 47 32 31 30 21 20 17 16 4 3 0
501 * +------------------------------------------------------+
502 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
503 * | Checksum Ident | | | | Type | Type |
504 * +------------------------------------------------------+
505 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
506 * +------------------------------------------------------+
507 * 63 48 47 32 31 20 19 0
510 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
511 rx_ring
= adapter
->rx_ring
[n
];
512 pr_info("------------------------------------\n");
513 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
514 pr_info("------------------------------------\n");
515 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
516 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
518 for (i
= 0; i
< rx_ring
->count
; i
++) {
519 const char *next_desc
;
520 struct igb_rx_buffer
*buffer_info
;
521 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
522 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
523 u0
= (struct my_u0
*)rx_desc
;
524 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
526 if (i
== rx_ring
->next_to_use
)
528 else if (i
== rx_ring
->next_to_clean
)
533 if (staterr
& E1000_RXD_STAT_DD
) {
534 /* Descriptor Done */
535 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
541 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
545 (u64
)buffer_info
->dma
,
548 if (netif_msg_pktdata(adapter
) &&
549 buffer_info
->dma
&& buffer_info
->page
) {
550 print_hex_dump(KERN_INFO
, "",
553 page_address(buffer_info
->page
) +
554 buffer_info
->page_offset
,
566 * igb_get_i2c_data - Reads the I2C SDA data bit
567 * @hw: pointer to hardware structure
568 * @i2cctl: Current value of I2CCTL register
570 * Returns the I2C data bit value
572 static int igb_get_i2c_data(void *data
)
574 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
575 struct e1000_hw
*hw
= &adapter
->hw
;
576 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
578 return !!(i2cctl
& E1000_I2C_DATA_IN
);
582 * igb_set_i2c_data - Sets the I2C data bit
583 * @data: pointer to hardware structure
584 * @state: I2C data value (0 or 1) to set
586 * Sets the I2C data bit
588 static void igb_set_i2c_data(void *data
, int state
)
590 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
591 struct e1000_hw
*hw
= &adapter
->hw
;
592 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
595 i2cctl
|= E1000_I2C_DATA_OUT
;
597 i2cctl
&= ~E1000_I2C_DATA_OUT
;
599 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
600 i2cctl
|= E1000_I2C_CLK_OE_N
;
601 wr32(E1000_I2CPARAMS
, i2cctl
);
607 * igb_set_i2c_clk - Sets the I2C SCL clock
608 * @data: pointer to hardware structure
609 * @state: state to set clock
611 * Sets the I2C clock line to state
613 static void igb_set_i2c_clk(void *data
, int state
)
615 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
616 struct e1000_hw
*hw
= &adapter
->hw
;
617 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
620 i2cctl
|= E1000_I2C_CLK_OUT
;
621 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
623 i2cctl
&= ~E1000_I2C_CLK_OUT
;
624 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
626 wr32(E1000_I2CPARAMS
, i2cctl
);
631 * igb_get_i2c_clk - Gets the I2C SCL clock state
632 * @data: pointer to hardware structure
634 * Gets the I2C clock state
636 static int igb_get_i2c_clk(void *data
)
638 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
639 struct e1000_hw
*hw
= &adapter
->hw
;
640 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
642 return !!(i2cctl
& E1000_I2C_CLK_IN
);
645 static const struct i2c_algo_bit_data igb_i2c_algo
= {
646 .setsda
= igb_set_i2c_data
,
647 .setscl
= igb_set_i2c_clk
,
648 .getsda
= igb_get_i2c_data
,
649 .getscl
= igb_get_i2c_clk
,
655 * igb_get_hw_dev - return device
656 * @hw: pointer to hardware structure
658 * used by hardware layer to print debugging information
660 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
662 struct igb_adapter
*adapter
= hw
->back
;
663 return adapter
->netdev
;
667 * igb_init_module - Driver Registration Routine
669 * igb_init_module is the first routine called when the driver is
670 * loaded. All it does is register with the PCI subsystem.
672 static int __init
igb_init_module(void)
676 pr_info("%s - version %s\n",
677 igb_driver_string
, igb_driver_version
);
678 pr_info("%s\n", igb_copyright
);
680 #ifdef CONFIG_IGB_DCA
681 dca_register_notify(&dca_notifier
);
683 ret
= pci_register_driver(&igb_driver
);
687 module_init(igb_init_module
);
690 * igb_exit_module - Driver Exit Cleanup Routine
692 * igb_exit_module is called just before the driver is removed
695 static void __exit
igb_exit_module(void)
697 #ifdef CONFIG_IGB_DCA
698 dca_unregister_notify(&dca_notifier
);
700 pci_unregister_driver(&igb_driver
);
703 module_exit(igb_exit_module
);
705 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
707 * igb_cache_ring_register - Descriptor ring to register mapping
708 * @adapter: board private structure to initialize
710 * Once we know the feature-set enabled for the device, we'll cache
711 * the register offset the descriptor ring is assigned to.
713 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
716 u32 rbase_offset
= adapter
->vfs_allocated_count
;
718 switch (adapter
->hw
.mac
.type
) {
720 /* The queues are allocated for virtualization such that VF 0
721 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
722 * In order to avoid collision we start at the first free queue
723 * and continue consuming queues in the same sequence
725 if (adapter
->vfs_allocated_count
) {
726 for (; i
< adapter
->rss_queues
; i
++)
727 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
739 for (; i
< adapter
->num_rx_queues
; i
++)
740 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
741 for (; j
< adapter
->num_tx_queues
; j
++)
742 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
747 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
749 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
750 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
753 if (E1000_REMOVED(hw_addr
))
756 value
= readl(&hw_addr
[reg
]);
758 /* reads should not return all F's */
759 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
760 struct net_device
*netdev
= igb
->netdev
;
762 netif_device_detach(netdev
);
763 netdev_err(netdev
, "PCIe link lost, device now detached\n");
770 * igb_write_ivar - configure ivar for given MSI-X vector
771 * @hw: pointer to the HW structure
772 * @msix_vector: vector number we are allocating to a given ring
773 * @index: row index of IVAR register to write within IVAR table
774 * @offset: column offset of in IVAR, should be multiple of 8
776 * This function is intended to handle the writing of the IVAR register
777 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
778 * each containing an cause allocation for an Rx and Tx ring, and a
779 * variable number of rows depending on the number of queues supported.
781 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
782 int index
, int offset
)
784 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
786 /* clear any bits that are currently set */
787 ivar
&= ~((u32
)0xFF << offset
);
789 /* write vector and valid bit */
790 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
792 array_wr32(E1000_IVAR0
, index
, ivar
);
795 #define IGB_N0_QUEUE -1
796 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
798 struct igb_adapter
*adapter
= q_vector
->adapter
;
799 struct e1000_hw
*hw
= &adapter
->hw
;
800 int rx_queue
= IGB_N0_QUEUE
;
801 int tx_queue
= IGB_N0_QUEUE
;
804 if (q_vector
->rx
.ring
)
805 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
806 if (q_vector
->tx
.ring
)
807 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
809 switch (hw
->mac
.type
) {
811 /* The 82575 assigns vectors using a bitmask, which matches the
812 * bitmask for the EICR/EIMS/EIMC registers. To assign one
813 * or more queues to a vector, we write the appropriate bits
814 * into the MSIXBM register for that vector.
816 if (rx_queue
> IGB_N0_QUEUE
)
817 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
818 if (tx_queue
> IGB_N0_QUEUE
)
819 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
820 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
821 msixbm
|= E1000_EIMS_OTHER
;
822 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
823 q_vector
->eims_value
= msixbm
;
826 /* 82576 uses a table that essentially consists of 2 columns
827 * with 8 rows. The ordering is column-major so we use the
828 * lower 3 bits as the row index, and the 4th bit as the
831 if (rx_queue
> IGB_N0_QUEUE
)
832 igb_write_ivar(hw
, msix_vector
,
834 (rx_queue
& 0x8) << 1);
835 if (tx_queue
> IGB_N0_QUEUE
)
836 igb_write_ivar(hw
, msix_vector
,
838 ((tx_queue
& 0x8) << 1) + 8);
839 q_vector
->eims_value
= 1 << msix_vector
;
846 /* On 82580 and newer adapters the scheme is similar to 82576
847 * however instead of ordering column-major we have things
848 * ordered row-major. So we traverse the table by using
849 * bit 0 as the column offset, and the remaining bits as the
852 if (rx_queue
> IGB_N0_QUEUE
)
853 igb_write_ivar(hw
, msix_vector
,
855 (rx_queue
& 0x1) << 4);
856 if (tx_queue
> IGB_N0_QUEUE
)
857 igb_write_ivar(hw
, msix_vector
,
859 ((tx_queue
& 0x1) << 4) + 8);
860 q_vector
->eims_value
= 1 << msix_vector
;
867 /* add q_vector eims value to global eims_enable_mask */
868 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
870 /* configure q_vector to set itr on first interrupt */
871 q_vector
->set_itr
= 1;
875 * igb_configure_msix - Configure MSI-X hardware
876 * @adapter: board private structure to initialize
878 * igb_configure_msix sets up the hardware to properly
879 * generate MSI-X interrupts.
881 static void igb_configure_msix(struct igb_adapter
*adapter
)
885 struct e1000_hw
*hw
= &adapter
->hw
;
887 adapter
->eims_enable_mask
= 0;
889 /* set vector for other causes, i.e. link changes */
890 switch (hw
->mac
.type
) {
892 tmp
= rd32(E1000_CTRL_EXT
);
893 /* enable MSI-X PBA support*/
894 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
896 /* Auto-Mask interrupts upon ICR read. */
897 tmp
|= E1000_CTRL_EXT_EIAME
;
898 tmp
|= E1000_CTRL_EXT_IRCA
;
900 wr32(E1000_CTRL_EXT
, tmp
);
902 /* enable msix_other interrupt */
903 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
904 adapter
->eims_other
= E1000_EIMS_OTHER
;
914 /* Turn on MSI-X capability first, or our settings
915 * won't stick. And it will take days to debug.
917 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
918 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
921 /* enable msix_other interrupt */
922 adapter
->eims_other
= 1 << vector
;
923 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
925 wr32(E1000_IVAR_MISC
, tmp
);
928 /* do nothing, since nothing else supports MSI-X */
930 } /* switch (hw->mac.type) */
932 adapter
->eims_enable_mask
|= adapter
->eims_other
;
934 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
935 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
941 * igb_request_msix - Initialize MSI-X interrupts
942 * @adapter: board private structure to initialize
944 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
947 static int igb_request_msix(struct igb_adapter
*adapter
)
949 struct net_device
*netdev
= adapter
->netdev
;
950 struct e1000_hw
*hw
= &adapter
->hw
;
951 int i
, err
= 0, vector
= 0, free_vector
= 0;
953 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
954 igb_msix_other
, 0, netdev
->name
, adapter
);
958 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
959 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
963 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
965 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
966 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
967 q_vector
->rx
.ring
->queue_index
);
968 else if (q_vector
->tx
.ring
)
969 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
970 q_vector
->tx
.ring
->queue_index
);
971 else if (q_vector
->rx
.ring
)
972 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
973 q_vector
->rx
.ring
->queue_index
);
975 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
977 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
978 igb_msix_ring
, 0, q_vector
->name
,
984 igb_configure_msix(adapter
);
988 /* free already assigned IRQs */
989 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
992 for (i
= 0; i
< vector
; i
++) {
993 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
994 adapter
->q_vector
[i
]);
1001 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1002 * @adapter: board private structure to initialize
1003 * @v_idx: Index of vector to be freed
1005 * This function frees the memory allocated to the q_vector.
1007 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1009 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1011 adapter
->q_vector
[v_idx
] = NULL
;
1013 /* igb_get_stats64() might access the rings on this vector,
1014 * we must wait a grace period before freeing it.
1016 kfree_rcu(q_vector
, rcu
);
1020 * igb_reset_q_vector - Reset config for interrupt vector
1021 * @adapter: board private structure to initialize
1022 * @v_idx: Index of vector to be reset
1024 * If NAPI is enabled it will delete any references to the
1025 * NAPI struct. This is preparation for igb_free_q_vector.
1027 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1029 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1031 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1032 * allocated. So, q_vector is NULL so we should stop here.
1037 if (q_vector
->tx
.ring
)
1038 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1040 if (q_vector
->rx
.ring
)
1041 adapter
->tx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1043 netif_napi_del(&q_vector
->napi
);
1047 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1049 int v_idx
= adapter
->num_q_vectors
;
1051 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1052 pci_disable_msix(adapter
->pdev
);
1053 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1054 pci_disable_msi(adapter
->pdev
);
1057 igb_reset_q_vector(adapter
, v_idx
);
1061 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1062 * @adapter: board private structure to initialize
1064 * This function frees the memory allocated to the q_vectors. In addition if
1065 * NAPI is enabled it will delete any references to the NAPI struct prior
1066 * to freeing the q_vector.
1068 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1070 int v_idx
= adapter
->num_q_vectors
;
1072 adapter
->num_tx_queues
= 0;
1073 adapter
->num_rx_queues
= 0;
1074 adapter
->num_q_vectors
= 0;
1077 igb_reset_q_vector(adapter
, v_idx
);
1078 igb_free_q_vector(adapter
, v_idx
);
1083 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1084 * @adapter: board private structure to initialize
1086 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1087 * MSI-X interrupts allocated.
1089 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1091 igb_free_q_vectors(adapter
);
1092 igb_reset_interrupt_capability(adapter
);
1096 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1097 * @adapter: board private structure to initialize
1098 * @msix: boolean value of MSIX capability
1100 * Attempt to configure interrupts using the best available
1101 * capabilities of the hardware and kernel.
1103 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1110 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1112 /* Number of supported queues. */
1113 adapter
->num_rx_queues
= adapter
->rss_queues
;
1114 if (adapter
->vfs_allocated_count
)
1115 adapter
->num_tx_queues
= 1;
1117 adapter
->num_tx_queues
= adapter
->rss_queues
;
1119 /* start with one vector for every Rx queue */
1120 numvecs
= adapter
->num_rx_queues
;
1122 /* if Tx handler is separate add 1 for every Tx queue */
1123 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1124 numvecs
+= adapter
->num_tx_queues
;
1126 /* store the number of vectors reserved for queues */
1127 adapter
->num_q_vectors
= numvecs
;
1129 /* add 1 vector for link status interrupts */
1131 for (i
= 0; i
< numvecs
; i
++)
1132 adapter
->msix_entries
[i
].entry
= i
;
1134 err
= pci_enable_msix_range(adapter
->pdev
,
1135 adapter
->msix_entries
,
1141 igb_reset_interrupt_capability(adapter
);
1143 /* If we can't do MSI-X, try MSI */
1145 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1146 #ifdef CONFIG_PCI_IOV
1147 /* disable SR-IOV for non MSI-X configurations */
1148 if (adapter
->vf_data
) {
1149 struct e1000_hw
*hw
= &adapter
->hw
;
1150 /* disable iov and allow time for transactions to clear */
1151 pci_disable_sriov(adapter
->pdev
);
1154 kfree(adapter
->vf_data
);
1155 adapter
->vf_data
= NULL
;
1156 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1159 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1162 adapter
->vfs_allocated_count
= 0;
1163 adapter
->rss_queues
= 1;
1164 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1165 adapter
->num_rx_queues
= 1;
1166 adapter
->num_tx_queues
= 1;
1167 adapter
->num_q_vectors
= 1;
1168 if (!pci_enable_msi(adapter
->pdev
))
1169 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1172 static void igb_add_ring(struct igb_ring
*ring
,
1173 struct igb_ring_container
*head
)
1180 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1181 * @adapter: board private structure to initialize
1182 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1183 * @v_idx: index of vector in adapter struct
1184 * @txr_count: total number of Tx rings to allocate
1185 * @txr_idx: index of first Tx ring to allocate
1186 * @rxr_count: total number of Rx rings to allocate
1187 * @rxr_idx: index of first Rx ring to allocate
1189 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1191 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1192 int v_count
, int v_idx
,
1193 int txr_count
, int txr_idx
,
1194 int rxr_count
, int rxr_idx
)
1196 struct igb_q_vector
*q_vector
;
1197 struct igb_ring
*ring
;
1198 int ring_count
, size
;
1200 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1201 if (txr_count
> 1 || rxr_count
> 1)
1204 ring_count
= txr_count
+ rxr_count
;
1205 size
= sizeof(struct igb_q_vector
) +
1206 (sizeof(struct igb_ring
) * ring_count
);
1208 /* allocate q_vector and rings */
1209 q_vector
= adapter
->q_vector
[v_idx
];
1211 q_vector
= kzalloc(size
, GFP_KERNEL
);
1215 /* initialize NAPI */
1216 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1219 /* tie q_vector and adapter together */
1220 adapter
->q_vector
[v_idx
] = q_vector
;
1221 q_vector
->adapter
= adapter
;
1223 /* initialize work limits */
1224 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1226 /* initialize ITR configuration */
1227 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1228 q_vector
->itr_val
= IGB_START_ITR
;
1230 /* initialize pointer to rings */
1231 ring
= q_vector
->ring
;
1235 /* rx or rx/tx vector */
1236 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1237 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1239 /* tx only vector */
1240 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1241 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1245 /* assign generic ring traits */
1246 ring
->dev
= &adapter
->pdev
->dev
;
1247 ring
->netdev
= adapter
->netdev
;
1249 /* configure backlink on ring */
1250 ring
->q_vector
= q_vector
;
1252 /* update q_vector Tx values */
1253 igb_add_ring(ring
, &q_vector
->tx
);
1255 /* For 82575, context index must be unique per ring. */
1256 if (adapter
->hw
.mac
.type
== e1000_82575
)
1257 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1259 /* apply Tx specific ring traits */
1260 ring
->count
= adapter
->tx_ring_count
;
1261 ring
->queue_index
= txr_idx
;
1263 u64_stats_init(&ring
->tx_syncp
);
1264 u64_stats_init(&ring
->tx_syncp2
);
1266 /* assign ring to adapter */
1267 adapter
->tx_ring
[txr_idx
] = ring
;
1269 /* push pointer to next ring */
1274 /* assign generic ring traits */
1275 ring
->dev
= &adapter
->pdev
->dev
;
1276 ring
->netdev
= adapter
->netdev
;
1278 /* configure backlink on ring */
1279 ring
->q_vector
= q_vector
;
1281 /* update q_vector Rx values */
1282 igb_add_ring(ring
, &q_vector
->rx
);
1284 /* set flag indicating ring supports SCTP checksum offload */
1285 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1286 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1288 /* On i350, i354, i210, and i211, loopback VLAN packets
1289 * have the tag byte-swapped.
1291 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1292 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1294 /* apply Rx specific ring traits */
1295 ring
->count
= adapter
->rx_ring_count
;
1296 ring
->queue_index
= rxr_idx
;
1298 u64_stats_init(&ring
->rx_syncp
);
1300 /* assign ring to adapter */
1301 adapter
->rx_ring
[rxr_idx
] = ring
;
1309 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1310 * @adapter: board private structure to initialize
1312 * We allocate one q_vector per queue interrupt. If allocation fails we
1315 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1317 int q_vectors
= adapter
->num_q_vectors
;
1318 int rxr_remaining
= adapter
->num_rx_queues
;
1319 int txr_remaining
= adapter
->num_tx_queues
;
1320 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1323 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1324 for (; rxr_remaining
; v_idx
++) {
1325 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1331 /* update counts and index */
1337 for (; v_idx
< q_vectors
; v_idx
++) {
1338 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1339 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1341 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1342 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1347 /* update counts and index */
1348 rxr_remaining
-= rqpv
;
1349 txr_remaining
-= tqpv
;
1357 adapter
->num_tx_queues
= 0;
1358 adapter
->num_rx_queues
= 0;
1359 adapter
->num_q_vectors
= 0;
1362 igb_free_q_vector(adapter
, v_idx
);
1368 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1369 * @adapter: board private structure to initialize
1370 * @msix: boolean value of MSIX capability
1372 * This function initializes the interrupts and allocates all of the queues.
1374 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1376 struct pci_dev
*pdev
= adapter
->pdev
;
1379 igb_set_interrupt_capability(adapter
, msix
);
1381 err
= igb_alloc_q_vectors(adapter
);
1383 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1384 goto err_alloc_q_vectors
;
1387 igb_cache_ring_register(adapter
);
1391 err_alloc_q_vectors
:
1392 igb_reset_interrupt_capability(adapter
);
1397 * igb_request_irq - initialize interrupts
1398 * @adapter: board private structure to initialize
1400 * Attempts to configure interrupts using the best available
1401 * capabilities of the hardware and kernel.
1403 static int igb_request_irq(struct igb_adapter
*adapter
)
1405 struct net_device
*netdev
= adapter
->netdev
;
1406 struct pci_dev
*pdev
= adapter
->pdev
;
1409 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1410 err
= igb_request_msix(adapter
);
1413 /* fall back to MSI */
1414 igb_free_all_tx_resources(adapter
);
1415 igb_free_all_rx_resources(adapter
);
1417 igb_clear_interrupt_scheme(adapter
);
1418 err
= igb_init_interrupt_scheme(adapter
, false);
1422 igb_setup_all_tx_resources(adapter
);
1423 igb_setup_all_rx_resources(adapter
);
1424 igb_configure(adapter
);
1427 igb_assign_vector(adapter
->q_vector
[0], 0);
1429 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1430 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1431 netdev
->name
, adapter
);
1435 /* fall back to legacy interrupts */
1436 igb_reset_interrupt_capability(adapter
);
1437 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1440 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1441 netdev
->name
, adapter
);
1444 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1451 static void igb_free_irq(struct igb_adapter
*adapter
)
1453 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1456 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1458 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1459 free_irq(adapter
->msix_entries
[vector
++].vector
,
1460 adapter
->q_vector
[i
]);
1462 free_irq(adapter
->pdev
->irq
, adapter
);
1467 * igb_irq_disable - Mask off interrupt generation on the NIC
1468 * @adapter: board private structure
1470 static void igb_irq_disable(struct igb_adapter
*adapter
)
1472 struct e1000_hw
*hw
= &adapter
->hw
;
1474 /* we need to be careful when disabling interrupts. The VFs are also
1475 * mapped into these registers and so clearing the bits can cause
1476 * issues on the VF drivers so we only need to clear what we set
1478 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1479 u32 regval
= rd32(E1000_EIAM
);
1481 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1482 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1483 regval
= rd32(E1000_EIAC
);
1484 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1488 wr32(E1000_IMC
, ~0);
1490 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1493 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1494 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1496 synchronize_irq(adapter
->pdev
->irq
);
1501 * igb_irq_enable - Enable default interrupt generation settings
1502 * @adapter: board private structure
1504 static void igb_irq_enable(struct igb_adapter
*adapter
)
1506 struct e1000_hw
*hw
= &adapter
->hw
;
1508 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1509 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1510 u32 regval
= rd32(E1000_EIAC
);
1512 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1513 regval
= rd32(E1000_EIAM
);
1514 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1515 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1516 if (adapter
->vfs_allocated_count
) {
1517 wr32(E1000_MBVFIMR
, 0xFF);
1518 ims
|= E1000_IMS_VMMB
;
1520 wr32(E1000_IMS
, ims
);
1522 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1524 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1529 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1531 struct e1000_hw
*hw
= &adapter
->hw
;
1532 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1533 u16 old_vid
= adapter
->mng_vlan_id
;
1535 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1536 /* add VID to filter table */
1537 igb_vfta_set(hw
, vid
, true);
1538 adapter
->mng_vlan_id
= vid
;
1540 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1543 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1545 !test_bit(old_vid
, adapter
->active_vlans
)) {
1546 /* remove VID from filter table */
1547 igb_vfta_set(hw
, old_vid
, false);
1552 * igb_release_hw_control - release control of the h/w to f/w
1553 * @adapter: address of board private structure
1555 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1556 * For ASF and Pass Through versions of f/w this means that the
1557 * driver is no longer loaded.
1559 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1561 struct e1000_hw
*hw
= &adapter
->hw
;
1564 /* Let firmware take over control of h/w */
1565 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1566 wr32(E1000_CTRL_EXT
,
1567 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1571 * igb_get_hw_control - get control of the h/w from f/w
1572 * @adapter: address of board private structure
1574 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1575 * For ASF and Pass Through versions of f/w this means that
1576 * the driver is loaded.
1578 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1580 struct e1000_hw
*hw
= &adapter
->hw
;
1583 /* Let firmware know the driver has taken over */
1584 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1585 wr32(E1000_CTRL_EXT
,
1586 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1590 * igb_configure - configure the hardware for RX and TX
1591 * @adapter: private board structure
1593 static void igb_configure(struct igb_adapter
*adapter
)
1595 struct net_device
*netdev
= adapter
->netdev
;
1598 igb_get_hw_control(adapter
);
1599 igb_set_rx_mode(netdev
);
1601 igb_restore_vlan(adapter
);
1603 igb_setup_tctl(adapter
);
1604 igb_setup_mrqc(adapter
);
1605 igb_setup_rctl(adapter
);
1607 igb_configure_tx(adapter
);
1608 igb_configure_rx(adapter
);
1610 igb_rx_fifo_flush_82575(&adapter
->hw
);
1612 /* call igb_desc_unused which always leaves
1613 * at least 1 descriptor unused to make sure
1614 * next_to_use != next_to_clean
1616 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1617 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1618 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1623 * igb_power_up_link - Power up the phy/serdes link
1624 * @adapter: address of board private structure
1626 void igb_power_up_link(struct igb_adapter
*adapter
)
1628 igb_reset_phy(&adapter
->hw
);
1630 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1631 igb_power_up_phy_copper(&adapter
->hw
);
1633 igb_power_up_serdes_link_82575(&adapter
->hw
);
1637 * igb_power_down_link - Power down the phy/serdes link
1638 * @adapter: address of board private structure
1640 static void igb_power_down_link(struct igb_adapter
*adapter
)
1642 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1643 igb_power_down_phy_copper_82575(&adapter
->hw
);
1645 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1649 * Detect and switch function for Media Auto Sense
1650 * @adapter: address of the board private structure
1652 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1654 struct e1000_hw
*hw
= &adapter
->hw
;
1655 u32 ctrl_ext
, connsw
;
1656 bool swap_now
= false;
1658 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1659 connsw
= rd32(E1000_CONNSW
);
1661 /* need to live swap if current media is copper and we have fiber/serdes
1665 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1666 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1668 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1669 /* copper signal takes time to appear */
1670 if (adapter
->copper_tries
< 4) {
1671 adapter
->copper_tries
++;
1672 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1673 wr32(E1000_CONNSW
, connsw
);
1676 adapter
->copper_tries
= 0;
1677 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1678 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1680 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1681 wr32(E1000_CONNSW
, connsw
);
1689 switch (hw
->phy
.media_type
) {
1690 case e1000_media_type_copper
:
1691 netdev_info(adapter
->netdev
,
1692 "MAS: changing media to fiber/serdes\n");
1694 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1695 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1696 adapter
->copper_tries
= 0;
1698 case e1000_media_type_internal_serdes
:
1699 case e1000_media_type_fiber
:
1700 netdev_info(adapter
->netdev
,
1701 "MAS: changing media to copper\n");
1703 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1704 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1707 /* shouldn't get here during regular operation */
1708 netdev_err(adapter
->netdev
,
1709 "AMS: Invalid media type found, returning\n");
1712 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1716 * igb_up - Open the interface and prepare it to handle traffic
1717 * @adapter: board private structure
1719 int igb_up(struct igb_adapter
*adapter
)
1721 struct e1000_hw
*hw
= &adapter
->hw
;
1724 /* hardware has been reset, we need to reload some things */
1725 igb_configure(adapter
);
1727 clear_bit(__IGB_DOWN
, &adapter
->state
);
1729 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1730 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1732 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1733 igb_configure_msix(adapter
);
1735 igb_assign_vector(adapter
->q_vector
[0], 0);
1737 /* Clear any pending interrupts. */
1739 igb_irq_enable(adapter
);
1741 /* notify VFs that reset has been completed */
1742 if (adapter
->vfs_allocated_count
) {
1743 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1745 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1746 wr32(E1000_CTRL_EXT
, reg_data
);
1749 netif_tx_start_all_queues(adapter
->netdev
);
1751 /* start the watchdog. */
1752 hw
->mac
.get_link_status
= 1;
1753 schedule_work(&adapter
->watchdog_task
);
1755 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1756 (!hw
->dev_spec
._82575
.eee_disable
))
1757 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1762 void igb_down(struct igb_adapter
*adapter
)
1764 struct net_device
*netdev
= adapter
->netdev
;
1765 struct e1000_hw
*hw
= &adapter
->hw
;
1769 /* signal that we're down so the interrupt handler does not
1770 * reschedule our watchdog timer
1772 set_bit(__IGB_DOWN
, &adapter
->state
);
1774 /* disable receives in the hardware */
1775 rctl
= rd32(E1000_RCTL
);
1776 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1777 /* flush and sleep below */
1779 netif_tx_stop_all_queues(netdev
);
1781 /* disable transmits in the hardware */
1782 tctl
= rd32(E1000_TCTL
);
1783 tctl
&= ~E1000_TCTL_EN
;
1784 wr32(E1000_TCTL
, tctl
);
1785 /* flush both disables and wait for them to finish */
1787 usleep_range(10000, 11000);
1789 igb_irq_disable(adapter
);
1791 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1793 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1794 napi_synchronize(&(adapter
->q_vector
[i
]->napi
));
1795 napi_disable(&(adapter
->q_vector
[i
]->napi
));
1799 del_timer_sync(&adapter
->watchdog_timer
);
1800 del_timer_sync(&adapter
->phy_info_timer
);
1802 netif_carrier_off(netdev
);
1804 /* record the stats before reset*/
1805 spin_lock(&adapter
->stats64_lock
);
1806 igb_update_stats(adapter
, &adapter
->stats64
);
1807 spin_unlock(&adapter
->stats64_lock
);
1809 adapter
->link_speed
= 0;
1810 adapter
->link_duplex
= 0;
1812 if (!pci_channel_offline(adapter
->pdev
))
1814 igb_clean_all_tx_rings(adapter
);
1815 igb_clean_all_rx_rings(adapter
);
1816 #ifdef CONFIG_IGB_DCA
1818 /* since we reset the hardware DCA settings were cleared */
1819 igb_setup_dca(adapter
);
1823 void igb_reinit_locked(struct igb_adapter
*adapter
)
1825 WARN_ON(in_interrupt());
1826 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1827 usleep_range(1000, 2000);
1830 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1833 /** igb_enable_mas - Media Autosense re-enable after swap
1835 * @adapter: adapter struct
1837 static s32
igb_enable_mas(struct igb_adapter
*adapter
)
1839 struct e1000_hw
*hw
= &adapter
->hw
;
1843 connsw
= rd32(E1000_CONNSW
);
1844 if (!(hw
->phy
.media_type
== e1000_media_type_copper
))
1847 /* configure for SerDes media detect */
1848 if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1849 connsw
|= E1000_CONNSW_ENRGSRC
;
1850 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1851 wr32(E1000_CONNSW
, connsw
);
1853 } else if (connsw
& E1000_CONNSW_SERDESD
) {
1854 /* already SerDes, no need to enable anything */
1857 netdev_info(adapter
->netdev
,
1858 "MAS: Unable to configure feature, disabling..\n");
1859 adapter
->flags
&= ~IGB_FLAG_MAS_ENABLE
;
1864 void igb_reset(struct igb_adapter
*adapter
)
1866 struct pci_dev
*pdev
= adapter
->pdev
;
1867 struct e1000_hw
*hw
= &adapter
->hw
;
1868 struct e1000_mac_info
*mac
= &hw
->mac
;
1869 struct e1000_fc_info
*fc
= &hw
->fc
;
1870 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1872 /* Repartition Pba for greater than 9k mtu
1873 * To take effect CTRL.RST is required.
1875 switch (mac
->type
) {
1879 pba
= rd32(E1000_RXPBS
);
1880 pba
= igb_rxpbs_adjust_82580(pba
);
1883 pba
= rd32(E1000_RXPBS
);
1884 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1890 pba
= E1000_PBA_34K
;
1894 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1895 (mac
->type
< e1000_82576
)) {
1896 /* adjust PBA for jumbo frames */
1897 wr32(E1000_PBA
, pba
);
1899 /* To maintain wire speed transmits, the Tx FIFO should be
1900 * large enough to accommodate two full transmit packets,
1901 * rounded up to the next 1KB and expressed in KB. Likewise,
1902 * the Rx FIFO should be large enough to accommodate at least
1903 * one full receive packet and is similarly rounded up and
1906 pba
= rd32(E1000_PBA
);
1907 /* upper 16 bits has Tx packet buffer allocation size in KB */
1908 tx_space
= pba
>> 16;
1909 /* lower 16 bits has Rx packet buffer allocation size in KB */
1911 /* the Tx fifo also stores 16 bytes of information about the Tx
1912 * but don't include ethernet FCS because hardware appends it
1914 min_tx_space
= (adapter
->max_frame_size
+
1915 sizeof(union e1000_adv_tx_desc
) -
1917 min_tx_space
= ALIGN(min_tx_space
, 1024);
1918 min_tx_space
>>= 10;
1919 /* software strips receive CRC, so leave room for it */
1920 min_rx_space
= adapter
->max_frame_size
;
1921 min_rx_space
= ALIGN(min_rx_space
, 1024);
1922 min_rx_space
>>= 10;
1924 /* If current Tx allocation is less than the min Tx FIFO size,
1925 * and the min Tx FIFO size is less than the current Rx FIFO
1926 * allocation, take space away from current Rx allocation
1928 if (tx_space
< min_tx_space
&&
1929 ((min_tx_space
- tx_space
) < pba
)) {
1930 pba
= pba
- (min_tx_space
- tx_space
);
1932 /* if short on Rx space, Rx wins and must trump Tx
1935 if (pba
< min_rx_space
)
1938 wr32(E1000_PBA
, pba
);
1941 /* flow control settings */
1942 /* The high water mark must be low enough to fit one full frame
1943 * (or the size used for early receive) above it in the Rx FIFO.
1944 * Set it to the lower of:
1945 * - 90% of the Rx FIFO size, or
1946 * - the full Rx FIFO size minus one full frame
1948 hwm
= min(((pba
<< 10) * 9 / 10),
1949 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1951 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1952 fc
->low_water
= fc
->high_water
- 16;
1953 fc
->pause_time
= 0xFFFF;
1955 fc
->current_mode
= fc
->requested_mode
;
1957 /* disable receive for all VFs and wait one second */
1958 if (adapter
->vfs_allocated_count
) {
1961 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1962 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1964 /* ping all the active vfs to let them know we are going down */
1965 igb_ping_all_vfs(adapter
);
1967 /* disable transmits and receives */
1968 wr32(E1000_VFRE
, 0);
1969 wr32(E1000_VFTE
, 0);
1972 /* Allow time for pending master requests to run */
1973 hw
->mac
.ops
.reset_hw(hw
);
1976 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1977 /* need to resetup here after media swap */
1978 adapter
->ei
.get_invariants(hw
);
1979 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1981 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
1982 if (igb_enable_mas(adapter
))
1984 "Error enabling Media Auto Sense\n");
1986 if (hw
->mac
.ops
.init_hw(hw
))
1987 dev_err(&pdev
->dev
, "Hardware Error\n");
1989 /* Flow control settings reset on hardware reset, so guarantee flow
1990 * control is off when forcing speed.
1992 if (!hw
->mac
.autoneg
)
1993 igb_force_mac_fc(hw
);
1995 igb_init_dmac(adapter
, pba
);
1996 #ifdef CONFIG_IGB_HWMON
1997 /* Re-initialize the thermal sensor on i350 devices. */
1998 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1999 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
2000 /* If present, re-initialize the external thermal sensor
2004 mac
->ops
.init_thermal_sensor_thresh(hw
);
2008 /* Re-establish EEE setting */
2009 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2010 switch (mac
->type
) {
2014 igb_set_eee_i350(hw
);
2017 igb_set_eee_i354(hw
);
2023 if (!netif_running(adapter
->netdev
))
2024 igb_power_down_link(adapter
);
2026 igb_update_mng_vlan(adapter
);
2028 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2029 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2031 /* Re-enable PTP, where applicable. */
2032 igb_ptp_reset(adapter
);
2034 igb_get_phy_info(hw
);
2037 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2038 netdev_features_t features
)
2040 /* Since there is no support for separate Rx/Tx vlan accel
2041 * enable/disable make sure Tx flag is always in same state as Rx.
2043 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2044 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2046 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2051 static int igb_set_features(struct net_device
*netdev
,
2052 netdev_features_t features
)
2054 netdev_features_t changed
= netdev
->features
^ features
;
2055 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2057 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2058 igb_vlan_mode(netdev
, features
);
2060 if (!(changed
& NETIF_F_RXALL
))
2063 netdev
->features
= features
;
2065 if (netif_running(netdev
))
2066 igb_reinit_locked(adapter
);
2073 static const struct net_device_ops igb_netdev_ops
= {
2074 .ndo_open
= igb_open
,
2075 .ndo_stop
= igb_close
,
2076 .ndo_start_xmit
= igb_xmit_frame
,
2077 .ndo_get_stats64
= igb_get_stats64
,
2078 .ndo_set_rx_mode
= igb_set_rx_mode
,
2079 .ndo_set_mac_address
= igb_set_mac
,
2080 .ndo_change_mtu
= igb_change_mtu
,
2081 .ndo_do_ioctl
= igb_ioctl
,
2082 .ndo_tx_timeout
= igb_tx_timeout
,
2083 .ndo_validate_addr
= eth_validate_addr
,
2084 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2085 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2086 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2087 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2088 .ndo_set_vf_tx_rate
= igb_ndo_set_vf_bw
,
2089 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2090 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2091 #ifdef CONFIG_NET_POLL_CONTROLLER
2092 .ndo_poll_controller
= igb_netpoll
,
2094 .ndo_fix_features
= igb_fix_features
,
2095 .ndo_set_features
= igb_set_features
,
2099 * igb_set_fw_version - Configure version string for ethtool
2100 * @adapter: adapter struct
2102 void igb_set_fw_version(struct igb_adapter
*adapter
)
2104 struct e1000_hw
*hw
= &adapter
->hw
;
2105 struct e1000_fw_version fw
;
2107 igb_get_fw_version(hw
, &fw
);
2109 switch (hw
->mac
.type
) {
2112 if (!(igb_get_flash_presence_i210(hw
))) {
2113 snprintf(adapter
->fw_version
,
2114 sizeof(adapter
->fw_version
),
2116 fw
.invm_major
, fw
.invm_minor
,
2122 /* if option is rom valid, display its version too */
2124 snprintf(adapter
->fw_version
,
2125 sizeof(adapter
->fw_version
),
2126 "%d.%d, 0x%08x, %d.%d.%d",
2127 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2128 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2130 } else if (fw
.etrack_id
!= 0X0000) {
2131 snprintf(adapter
->fw_version
,
2132 sizeof(adapter
->fw_version
),
2134 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2136 snprintf(adapter
->fw_version
,
2137 sizeof(adapter
->fw_version
),
2139 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2147 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2149 * @adapter: adapter struct
2151 static void igb_init_mas(struct igb_adapter
*adapter
)
2153 struct e1000_hw
*hw
= &adapter
->hw
;
2156 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2157 switch (hw
->bus
.func
) {
2159 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2160 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2161 netdev_info(adapter
->netdev
,
2162 "MAS: Enabling Media Autosense for port %d\n",
2167 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2168 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2169 netdev_info(adapter
->netdev
,
2170 "MAS: Enabling Media Autosense for port %d\n",
2175 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2176 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2177 netdev_info(adapter
->netdev
,
2178 "MAS: Enabling Media Autosense for port %d\n",
2183 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2184 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2185 netdev_info(adapter
->netdev
,
2186 "MAS: Enabling Media Autosense for port %d\n",
2191 /* Shouldn't get here */
2192 netdev_err(adapter
->netdev
,
2193 "MAS: Invalid port configuration, returning\n");
2199 * igb_init_i2c - Init I2C interface
2200 * @adapter: pointer to adapter structure
2202 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2204 s32 status
= E1000_SUCCESS
;
2206 /* I2C interface supported on i350 devices */
2207 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2208 return E1000_SUCCESS
;
2210 /* Initialize the i2c bus which is controlled by the registers.
2211 * This bus will use the i2c_algo_bit structue that implements
2212 * the protocol through toggling of the 4 bits in the register.
2214 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2215 adapter
->i2c_algo
= igb_i2c_algo
;
2216 adapter
->i2c_algo
.data
= adapter
;
2217 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2218 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2219 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2220 sizeof(adapter
->i2c_adap
.name
));
2221 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2226 * igb_probe - Device Initialization Routine
2227 * @pdev: PCI device information struct
2228 * @ent: entry in igb_pci_tbl
2230 * Returns 0 on success, negative on failure
2232 * igb_probe initializes an adapter identified by a pci_dev structure.
2233 * The OS initialization, configuring of the adapter private structure,
2234 * and a hardware reset occur.
2236 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2238 struct net_device
*netdev
;
2239 struct igb_adapter
*adapter
;
2240 struct e1000_hw
*hw
;
2241 u16 eeprom_data
= 0;
2243 static int global_quad_port_a
; /* global quad port a indication */
2244 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2245 int err
, pci_using_dac
;
2246 u8 part_str
[E1000_PBANUM_LENGTH
];
2248 /* Catch broken hardware that put the wrong VF device ID in
2249 * the PCIe SR-IOV capability.
2251 if (pdev
->is_virtfn
) {
2252 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2253 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2257 err
= pci_enable_device_mem(pdev
);
2262 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2266 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2269 "No usable DMA configuration, aborting\n");
2274 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2280 pci_enable_pcie_error_reporting(pdev
);
2282 pci_set_master(pdev
);
2283 pci_save_state(pdev
);
2286 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2289 goto err_alloc_etherdev
;
2291 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2293 pci_set_drvdata(pdev
, netdev
);
2294 adapter
= netdev_priv(netdev
);
2295 adapter
->netdev
= netdev
;
2296 adapter
->pdev
= pdev
;
2299 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2302 hw
->hw_addr
= pci_iomap(pdev
, 0, 0);
2306 netdev
->netdev_ops
= &igb_netdev_ops
;
2307 igb_set_ethtool_ops(netdev
);
2308 netdev
->watchdog_timeo
= 5 * HZ
;
2310 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2312 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2313 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2315 /* PCI config space info */
2316 hw
->vendor_id
= pdev
->vendor
;
2317 hw
->device_id
= pdev
->device
;
2318 hw
->revision_id
= pdev
->revision
;
2319 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2320 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2322 /* Copy the default MAC, PHY and NVM function pointers */
2323 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2324 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2325 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2326 /* Initialize skew-specific constants */
2327 err
= ei
->get_invariants(hw
);
2331 /* setup the private structure */
2332 err
= igb_sw_init(adapter
);
2336 igb_get_bus_info_pcie(hw
);
2338 hw
->phy
.autoneg_wait_to_complete
= false;
2340 /* Copper options */
2341 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2342 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2343 hw
->phy
.disable_polarity_correction
= false;
2344 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2347 if (igb_check_reset_block(hw
))
2348 dev_info(&pdev
->dev
,
2349 "PHY reset is blocked due to SOL/IDER session.\n");
2351 /* features is initialized to 0 in allocation, it might have bits
2352 * set by igb_sw_init so we should use an or instead of an
2355 netdev
->features
|= NETIF_F_SG
|
2362 NETIF_F_HW_VLAN_CTAG_RX
|
2363 NETIF_F_HW_VLAN_CTAG_TX
;
2365 /* copy netdev features into list of user selectable features */
2366 netdev
->hw_features
|= netdev
->features
;
2367 netdev
->hw_features
|= NETIF_F_RXALL
;
2369 /* set this bit last since it cannot be part of hw_features */
2370 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
2372 netdev
->vlan_features
|= NETIF_F_TSO
|
2378 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2380 if (pci_using_dac
) {
2381 netdev
->features
|= NETIF_F_HIGHDMA
;
2382 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2385 if (hw
->mac
.type
>= e1000_82576
) {
2386 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2387 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2390 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2392 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2394 /* before reading the NVM, reset the controller to put the device in a
2395 * known good starting state
2397 hw
->mac
.ops
.reset_hw(hw
);
2399 /* make sure the NVM is good , i211/i210 parts can have special NVM
2400 * that doesn't contain a checksum
2402 switch (hw
->mac
.type
) {
2405 if (igb_get_flash_presence_i210(hw
)) {
2406 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2408 "The NVM Checksum Is Not Valid\n");
2415 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2416 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2423 /* copy the MAC address out of the NVM */
2424 if (hw
->mac
.ops
.read_mac_addr(hw
))
2425 dev_err(&pdev
->dev
, "NVM Read Error\n");
2427 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2429 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2430 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2435 /* get firmware version for ethtool -i */
2436 igb_set_fw_version(adapter
);
2438 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2439 (unsigned long) adapter
);
2440 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2441 (unsigned long) adapter
);
2443 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2444 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2446 /* Initialize link properties that are user-changeable */
2447 adapter
->fc_autoneg
= true;
2448 hw
->mac
.autoneg
= true;
2449 hw
->phy
.autoneg_advertised
= 0x2f;
2451 hw
->fc
.requested_mode
= e1000_fc_default
;
2452 hw
->fc
.current_mode
= e1000_fc_default
;
2454 igb_validate_mdi_setting(hw
);
2456 /* By default, support wake on port A */
2457 if (hw
->bus
.func
== 0)
2458 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2460 /* Check the NVM for wake support on non-port A ports */
2461 if (hw
->mac
.type
>= e1000_82580
)
2462 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2463 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2465 else if (hw
->bus
.func
== 1)
2466 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2468 if (eeprom_data
& IGB_EEPROM_APME
)
2469 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2471 /* now that we have the eeprom settings, apply the special cases where
2472 * the eeprom may be wrong or the board simply won't support wake on
2473 * lan on a particular port
2475 switch (pdev
->device
) {
2476 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2477 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2479 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2480 case E1000_DEV_ID_82576_FIBER
:
2481 case E1000_DEV_ID_82576_SERDES
:
2482 /* Wake events only supported on port A for dual fiber
2483 * regardless of eeprom setting
2485 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2486 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2488 case E1000_DEV_ID_82576_QUAD_COPPER
:
2489 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2490 /* if quad port adapter, disable WoL on all but port A */
2491 if (global_quad_port_a
!= 0)
2492 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2494 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2495 /* Reset for multiple quad port adapters */
2496 if (++global_quad_port_a
== 4)
2497 global_quad_port_a
= 0;
2500 /* If the device can't wake, don't set software support */
2501 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2502 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2505 /* initialize the wol settings based on the eeprom settings */
2506 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2507 adapter
->wol
|= E1000_WUFC_MAG
;
2509 /* Some vendors want WoL disabled by default, but still supported */
2510 if ((hw
->mac
.type
== e1000_i350
) &&
2511 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2512 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2516 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2517 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2519 /* reset the hardware with the new settings */
2522 /* Init the I2C interface */
2523 err
= igb_init_i2c(adapter
);
2525 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2529 /* let the f/w know that the h/w is now under the control of the
2532 igb_get_hw_control(adapter
);
2534 strcpy(netdev
->name
, "eth%d");
2535 err
= register_netdev(netdev
);
2539 /* carrier off reporting is important to ethtool even BEFORE open */
2540 netif_carrier_off(netdev
);
2542 #ifdef CONFIG_IGB_DCA
2543 if (dca_add_requester(&pdev
->dev
) == 0) {
2544 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2545 dev_info(&pdev
->dev
, "DCA enabled\n");
2546 igb_setup_dca(adapter
);
2550 #ifdef CONFIG_IGB_HWMON
2551 /* Initialize the thermal sensor on i350 devices. */
2552 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2555 /* Read the NVM to determine if this i350 device supports an
2556 * external thermal sensor.
2558 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2559 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2560 adapter
->ets
= true;
2562 adapter
->ets
= false;
2563 if (igb_sysfs_init(adapter
))
2565 "failed to allocate sysfs resources\n");
2567 adapter
->ets
= false;
2570 /* Check if Media Autosense is enabled */
2572 if (hw
->dev_spec
._82575
.mas_capable
)
2573 igb_init_mas(adapter
);
2575 /* do hw tstamp init after resetting */
2576 igb_ptp_init(adapter
);
2578 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2579 /* print bus type/speed/width info, not applicable to i354 */
2580 if (hw
->mac
.type
!= e1000_i354
) {
2581 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2583 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2584 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2586 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2588 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2590 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2591 "Width x1" : "unknown"), netdev
->dev_addr
);
2594 if ((hw
->mac
.type
>= e1000_i210
||
2595 igb_get_flash_presence_i210(hw
))) {
2596 ret_val
= igb_read_part_string(hw
, part_str
,
2597 E1000_PBANUM_LENGTH
);
2599 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2603 strcpy(part_str
, "Unknown");
2604 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2605 dev_info(&pdev
->dev
,
2606 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2607 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2608 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2609 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2610 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2611 switch (hw
->mac
.type
) {
2615 /* Enable EEE for internal copper PHY devices */
2616 err
= igb_set_eee_i350(hw
);
2618 (!hw
->dev_spec
._82575
.eee_disable
)) {
2619 adapter
->eee_advert
=
2620 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2621 adapter
->flags
|= IGB_FLAG_EEE
;
2625 if ((rd32(E1000_CTRL_EXT
) &
2626 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2627 err
= igb_set_eee_i354(hw
);
2629 (!hw
->dev_spec
._82575
.eee_disable
)) {
2630 adapter
->eee_advert
=
2631 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2632 adapter
->flags
|= IGB_FLAG_EEE
;
2640 pm_runtime_put_noidle(&pdev
->dev
);
2644 igb_release_hw_control(adapter
);
2645 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2647 if (!igb_check_reset_block(hw
))
2650 if (hw
->flash_address
)
2651 iounmap(hw
->flash_address
);
2653 igb_clear_interrupt_scheme(adapter
);
2654 pci_iounmap(pdev
, hw
->hw_addr
);
2656 free_netdev(netdev
);
2658 pci_release_selected_regions(pdev
,
2659 pci_select_bars(pdev
, IORESOURCE_MEM
));
2662 pci_disable_device(pdev
);
2666 #ifdef CONFIG_PCI_IOV
2667 static int igb_disable_sriov(struct pci_dev
*pdev
)
2669 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2670 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2671 struct e1000_hw
*hw
= &adapter
->hw
;
2673 /* reclaim resources allocated to VFs */
2674 if (adapter
->vf_data
) {
2675 /* disable iov and allow time for transactions to clear */
2676 if (pci_vfs_assigned(pdev
)) {
2677 dev_warn(&pdev
->dev
,
2678 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2681 pci_disable_sriov(pdev
);
2685 kfree(adapter
->vf_data
);
2686 adapter
->vf_data
= NULL
;
2687 adapter
->vfs_allocated_count
= 0;
2688 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2691 dev_info(&pdev
->dev
, "IOV Disabled\n");
2693 /* Re-enable DMA Coalescing flag since IOV is turned off */
2694 adapter
->flags
|= IGB_FLAG_DMAC
;
2700 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2702 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2703 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2704 int old_vfs
= pci_num_vf(pdev
);
2708 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2716 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2718 adapter
->vfs_allocated_count
= old_vfs
;
2720 adapter
->vfs_allocated_count
= num_vfs
;
2722 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2723 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2725 /* if allocation failed then we do not support SR-IOV */
2726 if (!adapter
->vf_data
) {
2727 adapter
->vfs_allocated_count
= 0;
2729 "Unable to allocate memory for VF Data Storage\n");
2734 /* only call pci_enable_sriov() if no VFs are allocated already */
2736 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2740 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2741 adapter
->vfs_allocated_count
);
2742 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2743 igb_vf_configure(adapter
, i
);
2745 /* DMA Coalescing is not supported in IOV mode. */
2746 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2750 kfree(adapter
->vf_data
);
2751 adapter
->vf_data
= NULL
;
2752 adapter
->vfs_allocated_count
= 0;
2759 * igb_remove_i2c - Cleanup I2C interface
2760 * @adapter: pointer to adapter structure
2762 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2764 /* free the adapter bus structure */
2765 i2c_del_adapter(&adapter
->i2c_adap
);
2769 * igb_remove - Device Removal Routine
2770 * @pdev: PCI device information struct
2772 * igb_remove is called by the PCI subsystem to alert the driver
2773 * that it should release a PCI device. The could be caused by a
2774 * Hot-Plug event, or because the driver is going to be removed from
2777 static void igb_remove(struct pci_dev
*pdev
)
2779 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2780 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2781 struct e1000_hw
*hw
= &adapter
->hw
;
2783 pm_runtime_get_noresume(&pdev
->dev
);
2784 #ifdef CONFIG_IGB_HWMON
2785 igb_sysfs_exit(adapter
);
2787 igb_remove_i2c(adapter
);
2788 igb_ptp_stop(adapter
);
2789 /* The watchdog timer may be rescheduled, so explicitly
2790 * disable watchdog from being rescheduled.
2792 set_bit(__IGB_DOWN
, &adapter
->state
);
2793 del_timer_sync(&adapter
->watchdog_timer
);
2794 del_timer_sync(&adapter
->phy_info_timer
);
2796 cancel_work_sync(&adapter
->reset_task
);
2797 cancel_work_sync(&adapter
->watchdog_task
);
2799 #ifdef CONFIG_IGB_DCA
2800 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2801 dev_info(&pdev
->dev
, "DCA disabled\n");
2802 dca_remove_requester(&pdev
->dev
);
2803 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2804 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2808 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2809 * would have already happened in close and is redundant.
2811 igb_release_hw_control(adapter
);
2813 unregister_netdev(netdev
);
2815 igb_clear_interrupt_scheme(adapter
);
2817 #ifdef CONFIG_PCI_IOV
2818 igb_disable_sriov(pdev
);
2821 pci_iounmap(pdev
, hw
->hw_addr
);
2822 if (hw
->flash_address
)
2823 iounmap(hw
->flash_address
);
2824 pci_release_selected_regions(pdev
,
2825 pci_select_bars(pdev
, IORESOURCE_MEM
));
2827 kfree(adapter
->shadow_vfta
);
2828 free_netdev(netdev
);
2830 pci_disable_pcie_error_reporting(pdev
);
2832 pci_disable_device(pdev
);
2836 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2837 * @adapter: board private structure to initialize
2839 * This function initializes the vf specific data storage and then attempts to
2840 * allocate the VFs. The reason for ordering it this way is because it is much
2841 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2842 * the memory for the VFs.
2844 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2846 #ifdef CONFIG_PCI_IOV
2847 struct pci_dev
*pdev
= adapter
->pdev
;
2848 struct e1000_hw
*hw
= &adapter
->hw
;
2850 /* Virtualization features not supported on i210 family. */
2851 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2854 pci_sriov_set_totalvfs(pdev
, 7);
2855 igb_pci_enable_sriov(pdev
, max_vfs
);
2857 #endif /* CONFIG_PCI_IOV */
2860 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2862 struct e1000_hw
*hw
= &adapter
->hw
;
2865 /* Determine the maximum number of RSS queues supported. */
2866 switch (hw
->mac
.type
) {
2868 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2872 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2875 /* I350 cannot do RSS and SR-IOV at the same time */
2876 if (!!adapter
->vfs_allocated_count
) {
2882 if (!!adapter
->vfs_allocated_count
) {
2890 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2894 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2896 /* Determine if we need to pair queues. */
2897 switch (hw
->mac
.type
) {
2900 /* Device supports enough interrupts without queue pairing. */
2903 /* If VFs are going to be allocated with RSS queues then we
2904 * should pair the queues in order to conserve interrupts due
2905 * to limited supply.
2907 if ((adapter
->rss_queues
> 1) &&
2908 (adapter
->vfs_allocated_count
> 6))
2909 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2916 /* If rss_queues > half of max_rss_queues, pair the queues in
2917 * order to conserve interrupts due to limited supply.
2919 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2920 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2926 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2927 * @adapter: board private structure to initialize
2929 * igb_sw_init initializes the Adapter private data structure.
2930 * Fields are initialized based on PCI device information and
2931 * OS network device settings (MTU size).
2933 static int igb_sw_init(struct igb_adapter
*adapter
)
2935 struct e1000_hw
*hw
= &adapter
->hw
;
2936 struct net_device
*netdev
= adapter
->netdev
;
2937 struct pci_dev
*pdev
= adapter
->pdev
;
2939 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2941 /* set default ring sizes */
2942 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2943 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2945 /* set default ITR values */
2946 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2947 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2949 /* set default work limits */
2950 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2952 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2954 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2956 spin_lock_init(&adapter
->stats64_lock
);
2957 #ifdef CONFIG_PCI_IOV
2958 switch (hw
->mac
.type
) {
2962 dev_warn(&pdev
->dev
,
2963 "Maximum of 7 VFs per PF, using max\n");
2964 max_vfs
= adapter
->vfs_allocated_count
= 7;
2966 adapter
->vfs_allocated_count
= max_vfs
;
2967 if (adapter
->vfs_allocated_count
)
2968 dev_warn(&pdev
->dev
,
2969 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2974 #endif /* CONFIG_PCI_IOV */
2976 igb_init_queue_configuration(adapter
);
2978 /* Setup and initialize a copy of the hw vlan table array */
2979 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2982 /* This call may decrease the number of queues */
2983 if (igb_init_interrupt_scheme(adapter
, true)) {
2984 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2988 igb_probe_vfs(adapter
);
2990 /* Explicitly disable IRQ since the NIC can be in any state. */
2991 igb_irq_disable(adapter
);
2993 if (hw
->mac
.type
>= e1000_i350
)
2994 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2996 set_bit(__IGB_DOWN
, &adapter
->state
);
3001 * igb_open - Called when a network interface is made active
3002 * @netdev: network interface device structure
3004 * Returns 0 on success, negative value on failure
3006 * The open entry point is called when a network interface is made
3007 * active by the system (IFF_UP). At this point all resources needed
3008 * for transmit and receive operations are allocated, the interrupt
3009 * handler is registered with the OS, the watchdog timer is started,
3010 * and the stack is notified that the interface is ready.
3012 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3014 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3015 struct e1000_hw
*hw
= &adapter
->hw
;
3016 struct pci_dev
*pdev
= adapter
->pdev
;
3020 /* disallow open during test */
3021 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3027 pm_runtime_get_sync(&pdev
->dev
);
3029 netif_carrier_off(netdev
);
3031 /* allocate transmit descriptors */
3032 err
= igb_setup_all_tx_resources(adapter
);
3036 /* allocate receive descriptors */
3037 err
= igb_setup_all_rx_resources(adapter
);
3041 igb_power_up_link(adapter
);
3043 /* before we allocate an interrupt, we must be ready to handle it.
3044 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3045 * as soon as we call pci_request_irq, so we have to setup our
3046 * clean_rx handler before we do so.
3048 igb_configure(adapter
);
3050 err
= igb_request_irq(adapter
);
3054 /* Notify the stack of the actual queue counts. */
3055 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3056 adapter
->num_tx_queues
);
3058 goto err_set_queues
;
3060 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3061 adapter
->num_rx_queues
);
3063 goto err_set_queues
;
3065 /* From here on the code is the same as igb_up() */
3066 clear_bit(__IGB_DOWN
, &adapter
->state
);
3068 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3069 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3071 /* Clear any pending interrupts. */
3074 igb_irq_enable(adapter
);
3076 /* notify VFs that reset has been completed */
3077 if (adapter
->vfs_allocated_count
) {
3078 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3080 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3081 wr32(E1000_CTRL_EXT
, reg_data
);
3084 netif_tx_start_all_queues(netdev
);
3087 pm_runtime_put(&pdev
->dev
);
3089 /* start the watchdog. */
3090 hw
->mac
.get_link_status
= 1;
3091 schedule_work(&adapter
->watchdog_task
);
3096 igb_free_irq(adapter
);
3098 igb_release_hw_control(adapter
);
3099 igb_power_down_link(adapter
);
3100 igb_free_all_rx_resources(adapter
);
3102 igb_free_all_tx_resources(adapter
);
3106 pm_runtime_put(&pdev
->dev
);
3111 static int igb_open(struct net_device
*netdev
)
3113 return __igb_open(netdev
, false);
3117 * igb_close - Disables a network interface
3118 * @netdev: network interface device structure
3120 * Returns 0, this is not allowed to fail
3122 * The close entry point is called when an interface is de-activated
3123 * by the OS. The hardware is still under the driver's control, but
3124 * needs to be disabled. A global MAC reset is issued to stop the
3125 * hardware, and all transmit and receive resources are freed.
3127 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3129 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3130 struct pci_dev
*pdev
= adapter
->pdev
;
3132 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3135 pm_runtime_get_sync(&pdev
->dev
);
3138 igb_free_irq(adapter
);
3140 igb_free_all_tx_resources(adapter
);
3141 igb_free_all_rx_resources(adapter
);
3144 pm_runtime_put_sync(&pdev
->dev
);
3148 static int igb_close(struct net_device
*netdev
)
3150 return __igb_close(netdev
, false);
3154 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3155 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3157 * Return 0 on success, negative on failure
3159 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3161 struct device
*dev
= tx_ring
->dev
;
3164 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3166 tx_ring
->tx_buffer_info
= vzalloc(size
);
3167 if (!tx_ring
->tx_buffer_info
)
3170 /* round up to nearest 4K */
3171 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3172 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3174 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3175 &tx_ring
->dma
, GFP_KERNEL
);
3179 tx_ring
->next_to_use
= 0;
3180 tx_ring
->next_to_clean
= 0;
3185 vfree(tx_ring
->tx_buffer_info
);
3186 tx_ring
->tx_buffer_info
= NULL
;
3187 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3192 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3193 * (Descriptors) for all queues
3194 * @adapter: board private structure
3196 * Return 0 on success, negative on failure
3198 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3200 struct pci_dev
*pdev
= adapter
->pdev
;
3203 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3204 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3207 "Allocation for Tx Queue %u failed\n", i
);
3208 for (i
--; i
>= 0; i
--)
3209 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3218 * igb_setup_tctl - configure the transmit control registers
3219 * @adapter: Board private structure
3221 void igb_setup_tctl(struct igb_adapter
*adapter
)
3223 struct e1000_hw
*hw
= &adapter
->hw
;
3226 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3227 wr32(E1000_TXDCTL(0), 0);
3229 /* Program the Transmit Control Register */
3230 tctl
= rd32(E1000_TCTL
);
3231 tctl
&= ~E1000_TCTL_CT
;
3232 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3233 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3235 igb_config_collision_dist(hw
);
3237 /* Enable transmits */
3238 tctl
|= E1000_TCTL_EN
;
3240 wr32(E1000_TCTL
, tctl
);
3244 * igb_configure_tx_ring - Configure transmit ring after Reset
3245 * @adapter: board private structure
3246 * @ring: tx ring to configure
3248 * Configure a transmit ring after a reset.
3250 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3251 struct igb_ring
*ring
)
3253 struct e1000_hw
*hw
= &adapter
->hw
;
3255 u64 tdba
= ring
->dma
;
3256 int reg_idx
= ring
->reg_idx
;
3258 /* disable the queue */
3259 wr32(E1000_TXDCTL(reg_idx
), 0);
3263 wr32(E1000_TDLEN(reg_idx
),
3264 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3265 wr32(E1000_TDBAL(reg_idx
),
3266 tdba
& 0x00000000ffffffffULL
);
3267 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3269 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
3270 wr32(E1000_TDH(reg_idx
), 0);
3271 writel(0, ring
->tail
);
3273 txdctl
|= IGB_TX_PTHRESH
;
3274 txdctl
|= IGB_TX_HTHRESH
<< 8;
3275 txdctl
|= IGB_TX_WTHRESH
<< 16;
3277 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3278 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3282 * igb_configure_tx - Configure transmit Unit after Reset
3283 * @adapter: board private structure
3285 * Configure the Tx unit of the MAC after a reset.
3287 static void igb_configure_tx(struct igb_adapter
*adapter
)
3291 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3292 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3296 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3297 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3299 * Returns 0 on success, negative on failure
3301 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3303 struct device
*dev
= rx_ring
->dev
;
3306 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3308 rx_ring
->rx_buffer_info
= vzalloc(size
);
3309 if (!rx_ring
->rx_buffer_info
)
3312 /* Round up to nearest 4K */
3313 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3314 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3316 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3317 &rx_ring
->dma
, GFP_KERNEL
);
3321 rx_ring
->next_to_alloc
= 0;
3322 rx_ring
->next_to_clean
= 0;
3323 rx_ring
->next_to_use
= 0;
3328 vfree(rx_ring
->rx_buffer_info
);
3329 rx_ring
->rx_buffer_info
= NULL
;
3330 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3335 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3336 * (Descriptors) for all queues
3337 * @adapter: board private structure
3339 * Return 0 on success, negative on failure
3341 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3343 struct pci_dev
*pdev
= adapter
->pdev
;
3346 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3347 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3350 "Allocation for Rx Queue %u failed\n", i
);
3351 for (i
--; i
>= 0; i
--)
3352 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3361 * igb_setup_mrqc - configure the multiple receive queue control registers
3362 * @adapter: Board private structure
3364 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3366 struct e1000_hw
*hw
= &adapter
->hw
;
3368 u32 j
, num_rx_queues
;
3369 static const u32 rsskey
[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3370 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3371 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3374 /* Fill out hash function seeds */
3375 for (j
= 0; j
< 10; j
++)
3376 wr32(E1000_RSSRK(j
), rsskey
[j
]);
3378 num_rx_queues
= adapter
->rss_queues
;
3380 switch (hw
->mac
.type
) {
3382 /* 82576 supports 2 RSS queues for SR-IOV */
3383 if (adapter
->vfs_allocated_count
)
3390 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3391 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3392 adapter
->rss_indir_tbl
[j
] =
3393 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3394 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3396 igb_write_rss_indir_tbl(adapter
);
3398 /* Disable raw packet checksumming so that RSS hash is placed in
3399 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3400 * offloads as they are enabled by default
3402 rxcsum
= rd32(E1000_RXCSUM
);
3403 rxcsum
|= E1000_RXCSUM_PCSD
;
3405 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3406 /* Enable Receive Checksum Offload for SCTP */
3407 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3409 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3410 wr32(E1000_RXCSUM
, rxcsum
);
3412 /* Generate RSS hash based on packet types, TCP/UDP
3413 * port numbers and/or IPv4/v6 src and dst addresses
3415 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3416 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3417 E1000_MRQC_RSS_FIELD_IPV6
|
3418 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3419 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3421 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3422 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3423 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3424 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3426 /* If VMDq is enabled then we set the appropriate mode for that, else
3427 * we default to RSS so that an RSS hash is calculated per packet even
3428 * if we are only using one queue
3430 if (adapter
->vfs_allocated_count
) {
3431 if (hw
->mac
.type
> e1000_82575
) {
3432 /* Set the default pool for the PF's first queue */
3433 u32 vtctl
= rd32(E1000_VT_CTL
);
3435 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3436 E1000_VT_CTL_DISABLE_DEF_POOL
);
3437 vtctl
|= adapter
->vfs_allocated_count
<<
3438 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3439 wr32(E1000_VT_CTL
, vtctl
);
3441 if (adapter
->rss_queues
> 1)
3442 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3444 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3446 if (hw
->mac
.type
!= e1000_i211
)
3447 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3449 igb_vmm_control(adapter
);
3451 wr32(E1000_MRQC
, mrqc
);
3455 * igb_setup_rctl - configure the receive control registers
3456 * @adapter: Board private structure
3458 void igb_setup_rctl(struct igb_adapter
*adapter
)
3460 struct e1000_hw
*hw
= &adapter
->hw
;
3463 rctl
= rd32(E1000_RCTL
);
3465 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3466 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3468 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3469 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3471 /* enable stripping of CRC. It's unlikely this will break BMC
3472 * redirection as it did with e1000. Newer features require
3473 * that the HW strips the CRC.
3475 rctl
|= E1000_RCTL_SECRC
;
3477 /* disable store bad packets and clear size bits. */
3478 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3480 /* enable LPE to prevent packets larger than max_frame_size */
3481 rctl
|= E1000_RCTL_LPE
;
3483 /* disable queue 0 to prevent tail write w/o re-config */
3484 wr32(E1000_RXDCTL(0), 0);
3486 /* Attention!!! For SR-IOV PF driver operations you must enable
3487 * queue drop for all VF and PF queues to prevent head of line blocking
3488 * if an un-trusted VF does not provide descriptors to hardware.
3490 if (adapter
->vfs_allocated_count
) {
3491 /* set all queue drop enable bits */
3492 wr32(E1000_QDE
, ALL_QUEUES
);
3495 /* This is useful for sniffing bad packets. */
3496 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3497 /* UPE and MPE will be handled by normal PROMISC logic
3498 * in e1000e_set_rx_mode
3500 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3501 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3502 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3504 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3505 E1000_RCTL_DPF
| /* Allow filtered pause */
3506 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3507 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3508 * and that breaks VLANs.
3512 wr32(E1000_RCTL
, rctl
);
3515 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3518 struct e1000_hw
*hw
= &adapter
->hw
;
3521 /* if it isn't the PF check to see if VFs are enabled and
3522 * increase the size to support vlan tags
3524 if (vfn
< adapter
->vfs_allocated_count
&&
3525 adapter
->vf_data
[vfn
].vlans_enabled
)
3526 size
+= VLAN_TAG_SIZE
;
3528 vmolr
= rd32(E1000_VMOLR(vfn
));
3529 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3530 vmolr
|= size
| E1000_VMOLR_LPE
;
3531 wr32(E1000_VMOLR(vfn
), vmolr
);
3537 * igb_rlpml_set - set maximum receive packet size
3538 * @adapter: board private structure
3540 * Configure maximum receivable packet size.
3542 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3544 u32 max_frame_size
= adapter
->max_frame_size
;
3545 struct e1000_hw
*hw
= &adapter
->hw
;
3546 u16 pf_id
= adapter
->vfs_allocated_count
;
3549 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3550 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3551 * to our max jumbo frame size, in case we need to enable
3552 * jumbo frames on one of the rings later.
3553 * This will not pass over-length frames into the default
3554 * queue because it's gated by the VMOLR.RLPML.
3556 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3559 wr32(E1000_RLPML
, max_frame_size
);
3562 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3565 struct e1000_hw
*hw
= &adapter
->hw
;
3568 /* This register exists only on 82576 and newer so if we are older then
3569 * we should exit and do nothing
3571 if (hw
->mac
.type
< e1000_82576
)
3574 vmolr
= rd32(E1000_VMOLR(vfn
));
3575 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3576 if (hw
->mac
.type
== e1000_i350
) {
3579 dvmolr
= rd32(E1000_DVMOLR(vfn
));
3580 dvmolr
|= E1000_DVMOLR_STRVLAN
;
3581 wr32(E1000_DVMOLR(vfn
), dvmolr
);
3584 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3586 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3588 /* clear all bits that might not be set */
3589 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3591 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3592 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3593 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3596 if (vfn
<= adapter
->vfs_allocated_count
)
3597 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3599 wr32(E1000_VMOLR(vfn
), vmolr
);
3603 * igb_configure_rx_ring - Configure a receive ring after Reset
3604 * @adapter: board private structure
3605 * @ring: receive ring to be configured
3607 * Configure the Rx unit of the MAC after a reset.
3609 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3610 struct igb_ring
*ring
)
3612 struct e1000_hw
*hw
= &adapter
->hw
;
3613 u64 rdba
= ring
->dma
;
3614 int reg_idx
= ring
->reg_idx
;
3615 u32 srrctl
= 0, rxdctl
= 0;
3617 /* disable the queue */
3618 wr32(E1000_RXDCTL(reg_idx
), 0);
3620 /* Set DMA base address registers */
3621 wr32(E1000_RDBAL(reg_idx
),
3622 rdba
& 0x00000000ffffffffULL
);
3623 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3624 wr32(E1000_RDLEN(reg_idx
),
3625 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3627 /* initialize head and tail */
3628 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3629 wr32(E1000_RDH(reg_idx
), 0);
3630 writel(0, ring
->tail
);
3632 /* set descriptor configuration */
3633 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3634 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3635 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3636 if (hw
->mac
.type
>= e1000_82580
)
3637 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3638 /* Only set Drop Enable if we are supporting multiple queues */
3639 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3640 srrctl
|= E1000_SRRCTL_DROP_EN
;
3642 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3644 /* set filtering for VMDQ pools */
3645 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3647 rxdctl
|= IGB_RX_PTHRESH
;
3648 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3649 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3651 /* enable receive descriptor fetching */
3652 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3653 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3657 * igb_configure_rx - Configure receive Unit after Reset
3658 * @adapter: board private structure
3660 * Configure the Rx unit of the MAC after a reset.
3662 static void igb_configure_rx(struct igb_adapter
*adapter
)
3666 /* set UTA to appropriate mode */
3667 igb_set_uta(adapter
);
3669 /* set the correct pool for the PF default MAC address in entry 0 */
3670 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3671 adapter
->vfs_allocated_count
);
3673 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3674 * the Base and Length of the Rx Descriptor Ring
3676 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3677 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3681 * igb_free_tx_resources - Free Tx Resources per Queue
3682 * @tx_ring: Tx descriptor ring for a specific queue
3684 * Free all transmit software resources
3686 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3688 igb_clean_tx_ring(tx_ring
);
3690 vfree(tx_ring
->tx_buffer_info
);
3691 tx_ring
->tx_buffer_info
= NULL
;
3693 /* if not set, then don't free */
3697 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3698 tx_ring
->desc
, tx_ring
->dma
);
3700 tx_ring
->desc
= NULL
;
3704 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3705 * @adapter: board private structure
3707 * Free all transmit software resources
3709 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3713 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3714 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3717 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3718 struct igb_tx_buffer
*tx_buffer
)
3720 if (tx_buffer
->skb
) {
3721 dev_kfree_skb_any(tx_buffer
->skb
);
3722 if (dma_unmap_len(tx_buffer
, len
))
3723 dma_unmap_single(ring
->dev
,
3724 dma_unmap_addr(tx_buffer
, dma
),
3725 dma_unmap_len(tx_buffer
, len
),
3727 } else if (dma_unmap_len(tx_buffer
, len
)) {
3728 dma_unmap_page(ring
->dev
,
3729 dma_unmap_addr(tx_buffer
, dma
),
3730 dma_unmap_len(tx_buffer
, len
),
3733 tx_buffer
->next_to_watch
= NULL
;
3734 tx_buffer
->skb
= NULL
;
3735 dma_unmap_len_set(tx_buffer
, len
, 0);
3736 /* buffer_info must be completely set up in the transmit path */
3740 * igb_clean_tx_ring - Free Tx Buffers
3741 * @tx_ring: ring to be cleaned
3743 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3745 struct igb_tx_buffer
*buffer_info
;
3749 if (!tx_ring
->tx_buffer_info
)
3751 /* Free all the Tx ring sk_buffs */
3753 for (i
= 0; i
< tx_ring
->count
; i
++) {
3754 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3755 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3758 netdev_tx_reset_queue(txring_txq(tx_ring
));
3760 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3761 memset(tx_ring
->tx_buffer_info
, 0, size
);
3763 /* Zero out the descriptor ring */
3764 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3766 tx_ring
->next_to_use
= 0;
3767 tx_ring
->next_to_clean
= 0;
3771 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3772 * @adapter: board private structure
3774 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3778 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3779 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3783 * igb_free_rx_resources - Free Rx Resources
3784 * @rx_ring: ring to clean the resources from
3786 * Free all receive software resources
3788 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3790 igb_clean_rx_ring(rx_ring
);
3792 vfree(rx_ring
->rx_buffer_info
);
3793 rx_ring
->rx_buffer_info
= NULL
;
3795 /* if not set, then don't free */
3799 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3800 rx_ring
->desc
, rx_ring
->dma
);
3802 rx_ring
->desc
= NULL
;
3806 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3807 * @adapter: board private structure
3809 * Free all receive software resources
3811 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3815 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3816 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3820 * igb_clean_rx_ring - Free Rx Buffers per Queue
3821 * @rx_ring: ring to free buffers from
3823 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3829 dev_kfree_skb(rx_ring
->skb
);
3830 rx_ring
->skb
= NULL
;
3832 if (!rx_ring
->rx_buffer_info
)
3835 /* Free all the Rx ring sk_buffs */
3836 for (i
= 0; i
< rx_ring
->count
; i
++) {
3837 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3839 if (!buffer_info
->page
)
3842 dma_unmap_page(rx_ring
->dev
,
3846 __free_page(buffer_info
->page
);
3848 buffer_info
->page
= NULL
;
3851 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3852 memset(rx_ring
->rx_buffer_info
, 0, size
);
3854 /* Zero out the descriptor ring */
3855 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3857 rx_ring
->next_to_alloc
= 0;
3858 rx_ring
->next_to_clean
= 0;
3859 rx_ring
->next_to_use
= 0;
3863 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3864 * @adapter: board private structure
3866 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3870 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3871 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3875 * igb_set_mac - Change the Ethernet Address of the NIC
3876 * @netdev: network interface device structure
3877 * @p: pointer to an address structure
3879 * Returns 0 on success, negative on failure
3881 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3883 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3884 struct e1000_hw
*hw
= &adapter
->hw
;
3885 struct sockaddr
*addr
= p
;
3887 if (!is_valid_ether_addr(addr
->sa_data
))
3888 return -EADDRNOTAVAIL
;
3890 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3891 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3893 /* set the correct pool for the new PF MAC address in entry 0 */
3894 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3895 adapter
->vfs_allocated_count
);
3901 * igb_write_mc_addr_list - write multicast addresses to MTA
3902 * @netdev: network interface device structure
3904 * Writes multicast address list to the MTA hash table.
3905 * Returns: -ENOMEM on failure
3906 * 0 on no addresses written
3907 * X on writing X addresses to MTA
3909 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3911 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3912 struct e1000_hw
*hw
= &adapter
->hw
;
3913 struct netdev_hw_addr
*ha
;
3917 if (netdev_mc_empty(netdev
)) {
3918 /* nothing to program, so clear mc list */
3919 igb_update_mc_addr_list(hw
, NULL
, 0);
3920 igb_restore_vf_multicasts(adapter
);
3924 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3928 /* The shared function expects a packed array of only addresses. */
3930 netdev_for_each_mc_addr(ha
, netdev
)
3931 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3933 igb_update_mc_addr_list(hw
, mta_list
, i
);
3936 return netdev_mc_count(netdev
);
3940 * igb_write_uc_addr_list - write unicast addresses to RAR table
3941 * @netdev: network interface device structure
3943 * Writes unicast address list to the RAR table.
3944 * Returns: -ENOMEM on failure/insufficient address space
3945 * 0 on no addresses written
3946 * X on writing X addresses to the RAR table
3948 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3950 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3951 struct e1000_hw
*hw
= &adapter
->hw
;
3952 unsigned int vfn
= adapter
->vfs_allocated_count
;
3953 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3956 /* return ENOMEM indicating insufficient memory for addresses */
3957 if (netdev_uc_count(netdev
) > rar_entries
)
3960 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3961 struct netdev_hw_addr
*ha
;
3963 netdev_for_each_uc_addr(ha
, netdev
) {
3966 igb_rar_set_qsel(adapter
, ha
->addr
,
3972 /* write the addresses in reverse order to avoid write combining */
3973 for (; rar_entries
> 0 ; rar_entries
--) {
3974 wr32(E1000_RAH(rar_entries
), 0);
3975 wr32(E1000_RAL(rar_entries
), 0);
3983 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3984 * @netdev: network interface device structure
3986 * The set_rx_mode entry point is called whenever the unicast or multicast
3987 * address lists or the network interface flags are updated. This routine is
3988 * responsible for configuring the hardware for proper unicast, multicast,
3989 * promiscuous mode, and all-multi behavior.
3991 static void igb_set_rx_mode(struct net_device
*netdev
)
3993 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3994 struct e1000_hw
*hw
= &adapter
->hw
;
3995 unsigned int vfn
= adapter
->vfs_allocated_count
;
3996 u32 rctl
, vmolr
= 0;
3999 /* Check for Promiscuous and All Multicast modes */
4000 rctl
= rd32(E1000_RCTL
);
4002 /* clear the effected bits */
4003 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
4005 if (netdev
->flags
& IFF_PROMISC
) {
4006 /* retain VLAN HW filtering if in VT mode */
4007 if (adapter
->vfs_allocated_count
)
4008 rctl
|= E1000_RCTL_VFE
;
4009 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
4010 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
4012 if (netdev
->flags
& IFF_ALLMULTI
) {
4013 rctl
|= E1000_RCTL_MPE
;
4014 vmolr
|= E1000_VMOLR_MPME
;
4016 /* Write addresses to the MTA, if the attempt fails
4017 * then we should just turn on promiscuous mode so
4018 * that we can at least receive multicast traffic
4020 count
= igb_write_mc_addr_list(netdev
);
4022 rctl
|= E1000_RCTL_MPE
;
4023 vmolr
|= E1000_VMOLR_MPME
;
4025 vmolr
|= E1000_VMOLR_ROMPE
;
4028 /* Write addresses to available RAR registers, if there is not
4029 * sufficient space to store all the addresses then enable
4030 * unicast promiscuous mode
4032 count
= igb_write_uc_addr_list(netdev
);
4034 rctl
|= E1000_RCTL_UPE
;
4035 vmolr
|= E1000_VMOLR_ROPE
;
4037 rctl
|= E1000_RCTL_VFE
;
4039 wr32(E1000_RCTL
, rctl
);
4041 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4042 * the VMOLR to enable the appropriate modes. Without this workaround
4043 * we will have issues with VLAN tag stripping not being done for frames
4044 * that are only arriving because we are the default pool
4046 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4049 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4050 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4051 wr32(E1000_VMOLR(vfn
), vmolr
);
4052 igb_restore_vf_multicasts(adapter
);
4055 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4057 struct e1000_hw
*hw
= &adapter
->hw
;
4060 switch (hw
->mac
.type
) {
4063 wvbr
= rd32(E1000_WVBR
);
4071 adapter
->wvbr
|= wvbr
;
4074 #define IGB_STAGGERED_QUEUE_OFFSET 8
4076 static void igb_spoof_check(struct igb_adapter
*adapter
)
4083 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4084 if (adapter
->wvbr
& (1 << j
) ||
4085 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
4086 dev_warn(&adapter
->pdev
->dev
,
4087 "Spoof event(s) detected on VF %d\n", j
);
4090 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
4095 /* Need to wait a few seconds after link up to get diagnostic information from
4098 static void igb_update_phy_info(unsigned long data
)
4100 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4101 igb_get_phy_info(&adapter
->hw
);
4105 * igb_has_link - check shared code for link and determine up/down
4106 * @adapter: pointer to driver private info
4108 bool igb_has_link(struct igb_adapter
*adapter
)
4110 struct e1000_hw
*hw
= &adapter
->hw
;
4111 bool link_active
= false;
4113 /* get_link_status is set on LSC (link status) interrupt or
4114 * rx sequence error interrupt. get_link_status will stay
4115 * false until the e1000_check_for_link establishes link
4116 * for copper adapters ONLY
4118 switch (hw
->phy
.media_type
) {
4119 case e1000_media_type_copper
:
4120 if (!hw
->mac
.get_link_status
)
4122 case e1000_media_type_internal_serdes
:
4123 hw
->mac
.ops
.check_for_link(hw
);
4124 link_active
= !hw
->mac
.get_link_status
;
4127 case e1000_media_type_unknown
:
4131 if (((hw
->mac
.type
== e1000_i210
) ||
4132 (hw
->mac
.type
== e1000_i211
)) &&
4133 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4134 if (!netif_carrier_ok(adapter
->netdev
)) {
4135 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4136 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4137 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4138 adapter
->link_check_timeout
= jiffies
;
4145 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4148 u32 ctrl_ext
, thstat
;
4150 /* check for thermal sensor event on i350 copper only */
4151 if (hw
->mac
.type
== e1000_i350
) {
4152 thstat
= rd32(E1000_THSTAT
);
4153 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4155 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4156 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4157 ret
= !!(thstat
& event
);
4164 * igb_watchdog - Timer Call-back
4165 * @data: pointer to adapter cast into an unsigned long
4167 static void igb_watchdog(unsigned long data
)
4169 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4170 /* Do the rest outside of interrupt context */
4171 schedule_work(&adapter
->watchdog_task
);
4174 static void igb_watchdog_task(struct work_struct
*work
)
4176 struct igb_adapter
*adapter
= container_of(work
,
4179 struct e1000_hw
*hw
= &adapter
->hw
;
4180 struct e1000_phy_info
*phy
= &hw
->phy
;
4181 struct net_device
*netdev
= adapter
->netdev
;
4186 link
= igb_has_link(adapter
);
4188 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4189 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4190 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4195 /* Force link down if we have fiber to swap to */
4196 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4197 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4198 connsw
= rd32(E1000_CONNSW
);
4199 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4204 /* Perform a reset if the media type changed. */
4205 if (hw
->dev_spec
._82575
.media_changed
) {
4206 hw
->dev_spec
._82575
.media_changed
= false;
4207 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4210 /* Cancel scheduled suspend requests. */
4211 pm_runtime_resume(netdev
->dev
.parent
);
4213 if (!netif_carrier_ok(netdev
)) {
4216 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4217 &adapter
->link_speed
,
4218 &adapter
->link_duplex
);
4220 ctrl
= rd32(E1000_CTRL
);
4221 /* Links status message must follow this format */
4223 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4225 adapter
->link_speed
,
4226 adapter
->link_duplex
== FULL_DUPLEX
?
4228 (ctrl
& E1000_CTRL_TFCE
) &&
4229 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4230 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4231 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4233 /* disable EEE if enabled */
4234 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4235 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4236 dev_info(&adapter
->pdev
->dev
,
4237 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4238 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4239 adapter
->flags
&= ~IGB_FLAG_EEE
;
4242 /* check if SmartSpeed worked */
4243 igb_check_downshift(hw
);
4244 if (phy
->speed_downgraded
)
4245 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4247 /* check for thermal sensor event */
4248 if (igb_thermal_sensor_event(hw
,
4249 E1000_THSTAT_LINK_THROTTLE
))
4250 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4252 /* adjust timeout factor according to speed/duplex */
4253 adapter
->tx_timeout_factor
= 1;
4254 switch (adapter
->link_speed
) {
4256 adapter
->tx_timeout_factor
= 14;
4259 /* maybe add some timeout factor ? */
4263 netif_carrier_on(netdev
);
4265 igb_ping_all_vfs(adapter
);
4266 igb_check_vf_rate_limit(adapter
);
4268 /* link state has changed, schedule phy info update */
4269 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4270 mod_timer(&adapter
->phy_info_timer
,
4271 round_jiffies(jiffies
+ 2 * HZ
));
4274 if (netif_carrier_ok(netdev
)) {
4275 adapter
->link_speed
= 0;
4276 adapter
->link_duplex
= 0;
4278 /* check for thermal sensor event */
4279 if (igb_thermal_sensor_event(hw
,
4280 E1000_THSTAT_PWR_DOWN
)) {
4281 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4284 /* Links status message must follow this format */
4285 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4287 netif_carrier_off(netdev
);
4289 igb_ping_all_vfs(adapter
);
4291 /* link state has changed, schedule phy info update */
4292 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4293 mod_timer(&adapter
->phy_info_timer
,
4294 round_jiffies(jiffies
+ 2 * HZ
));
4296 /* link is down, time to check for alternate media */
4297 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4298 igb_check_swap_media(adapter
);
4299 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4300 schedule_work(&adapter
->reset_task
);
4301 /* return immediately */
4305 pm_schedule_suspend(netdev
->dev
.parent
,
4308 /* also check for alternate media here */
4309 } else if (!netif_carrier_ok(netdev
) &&
4310 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4311 igb_check_swap_media(adapter
);
4312 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4313 schedule_work(&adapter
->reset_task
);
4314 /* return immediately */
4320 spin_lock(&adapter
->stats64_lock
);
4321 igb_update_stats(adapter
, &adapter
->stats64
);
4322 spin_unlock(&adapter
->stats64_lock
);
4324 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4325 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4326 if (!netif_carrier_ok(netdev
)) {
4327 /* We've lost link, so the controller stops DMA,
4328 * but we've got queued Tx work that's never going
4329 * to get done, so reset controller to flush Tx.
4330 * (Do the reset outside of interrupt context).
4332 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4333 adapter
->tx_timeout_count
++;
4334 schedule_work(&adapter
->reset_task
);
4335 /* return immediately since reset is imminent */
4340 /* Force detection of hung controller every watchdog period */
4341 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4344 /* Cause software interrupt to ensure Rx ring is cleaned */
4345 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4348 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4349 eics
|= adapter
->q_vector
[i
]->eims_value
;
4350 wr32(E1000_EICS
, eics
);
4352 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4355 igb_spoof_check(adapter
);
4356 igb_ptp_rx_hang(adapter
);
4358 /* Reset the timer */
4359 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4360 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4361 mod_timer(&adapter
->watchdog_timer
,
4362 round_jiffies(jiffies
+ HZ
));
4364 mod_timer(&adapter
->watchdog_timer
,
4365 round_jiffies(jiffies
+ 2 * HZ
));
4369 enum latency_range
{
4373 latency_invalid
= 255
4377 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4378 * @q_vector: pointer to q_vector
4380 * Stores a new ITR value based on strictly on packet size. This
4381 * algorithm is less sophisticated than that used in igb_update_itr,
4382 * due to the difficulty of synchronizing statistics across multiple
4383 * receive rings. The divisors and thresholds used by this function
4384 * were determined based on theoretical maximum wire speed and testing
4385 * data, in order to minimize response time while increasing bulk
4387 * This functionality is controlled by ethtool's coalescing settings.
4388 * NOTE: This function is called only when operating in a multiqueue
4389 * receive environment.
4391 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4393 int new_val
= q_vector
->itr_val
;
4394 int avg_wire_size
= 0;
4395 struct igb_adapter
*adapter
= q_vector
->adapter
;
4396 unsigned int packets
;
4398 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4399 * ints/sec - ITR timer value of 120 ticks.
4401 if (adapter
->link_speed
!= SPEED_1000
) {
4402 new_val
= IGB_4K_ITR
;
4406 packets
= q_vector
->rx
.total_packets
;
4408 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4410 packets
= q_vector
->tx
.total_packets
;
4412 avg_wire_size
= max_t(u32
, avg_wire_size
,
4413 q_vector
->tx
.total_bytes
/ packets
);
4415 /* if avg_wire_size isn't set no work was done */
4419 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4420 avg_wire_size
+= 24;
4422 /* Don't starve jumbo frames */
4423 avg_wire_size
= min(avg_wire_size
, 3000);
4425 /* Give a little boost to mid-size frames */
4426 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4427 new_val
= avg_wire_size
/ 3;
4429 new_val
= avg_wire_size
/ 2;
4431 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4432 if (new_val
< IGB_20K_ITR
&&
4433 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4434 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4435 new_val
= IGB_20K_ITR
;
4438 if (new_val
!= q_vector
->itr_val
) {
4439 q_vector
->itr_val
= new_val
;
4440 q_vector
->set_itr
= 1;
4443 q_vector
->rx
.total_bytes
= 0;
4444 q_vector
->rx
.total_packets
= 0;
4445 q_vector
->tx
.total_bytes
= 0;
4446 q_vector
->tx
.total_packets
= 0;
4450 * igb_update_itr - update the dynamic ITR value based on statistics
4451 * @q_vector: pointer to q_vector
4452 * @ring_container: ring info to update the itr for
4454 * Stores a new ITR value based on packets and byte
4455 * counts during the last interrupt. The advantage of per interrupt
4456 * computation is faster updates and more accurate ITR for the current
4457 * traffic pattern. Constants in this function were computed
4458 * based on theoretical maximum wire speed and thresholds were set based
4459 * on testing data as well as attempting to minimize response time
4460 * while increasing bulk throughput.
4461 * This functionality is controlled by ethtool's coalescing settings.
4462 * NOTE: These calculations are only valid when operating in a single-
4463 * queue environment.
4465 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4466 struct igb_ring_container
*ring_container
)
4468 unsigned int packets
= ring_container
->total_packets
;
4469 unsigned int bytes
= ring_container
->total_bytes
;
4470 u8 itrval
= ring_container
->itr
;
4472 /* no packets, exit with status unchanged */
4477 case lowest_latency
:
4478 /* handle TSO and jumbo frames */
4479 if (bytes
/packets
> 8000)
4480 itrval
= bulk_latency
;
4481 else if ((packets
< 5) && (bytes
> 512))
4482 itrval
= low_latency
;
4484 case low_latency
: /* 50 usec aka 20000 ints/s */
4485 if (bytes
> 10000) {
4486 /* this if handles the TSO accounting */
4487 if (bytes
/packets
> 8000)
4488 itrval
= bulk_latency
;
4489 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4490 itrval
= bulk_latency
;
4491 else if ((packets
> 35))
4492 itrval
= lowest_latency
;
4493 } else if (bytes
/packets
> 2000) {
4494 itrval
= bulk_latency
;
4495 } else if (packets
<= 2 && bytes
< 512) {
4496 itrval
= lowest_latency
;
4499 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4500 if (bytes
> 25000) {
4502 itrval
= low_latency
;
4503 } else if (bytes
< 1500) {
4504 itrval
= low_latency
;
4509 /* clear work counters since we have the values we need */
4510 ring_container
->total_bytes
= 0;
4511 ring_container
->total_packets
= 0;
4513 /* write updated itr to ring container */
4514 ring_container
->itr
= itrval
;
4517 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4519 struct igb_adapter
*adapter
= q_vector
->adapter
;
4520 u32 new_itr
= q_vector
->itr_val
;
4523 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4524 if (adapter
->link_speed
!= SPEED_1000
) {
4526 new_itr
= IGB_4K_ITR
;
4530 igb_update_itr(q_vector
, &q_vector
->tx
);
4531 igb_update_itr(q_vector
, &q_vector
->rx
);
4533 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4535 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4536 if (current_itr
== lowest_latency
&&
4537 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4538 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4539 current_itr
= low_latency
;
4541 switch (current_itr
) {
4542 /* counts and packets in update_itr are dependent on these numbers */
4543 case lowest_latency
:
4544 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4547 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4550 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4557 if (new_itr
!= q_vector
->itr_val
) {
4558 /* this attempts to bias the interrupt rate towards Bulk
4559 * by adding intermediate steps when interrupt rate is
4562 new_itr
= new_itr
> q_vector
->itr_val
?
4563 max((new_itr
* q_vector
->itr_val
) /
4564 (new_itr
+ (q_vector
->itr_val
>> 2)),
4566 /* Don't write the value here; it resets the adapter's
4567 * internal timer, and causes us to delay far longer than
4568 * we should between interrupts. Instead, we write the ITR
4569 * value at the beginning of the next interrupt so the timing
4570 * ends up being correct.
4572 q_vector
->itr_val
= new_itr
;
4573 q_vector
->set_itr
= 1;
4577 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4578 u32 type_tucmd
, u32 mss_l4len_idx
)
4580 struct e1000_adv_tx_context_desc
*context_desc
;
4581 u16 i
= tx_ring
->next_to_use
;
4583 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4586 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4588 /* set bits to identify this as an advanced context descriptor */
4589 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4591 /* For 82575, context index must be unique per ring. */
4592 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4593 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4595 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4596 context_desc
->seqnum_seed
= 0;
4597 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4598 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4601 static int igb_tso(struct igb_ring
*tx_ring
,
4602 struct igb_tx_buffer
*first
,
4605 struct sk_buff
*skb
= first
->skb
;
4606 u32 vlan_macip_lens
, type_tucmd
;
4607 u32 mss_l4len_idx
, l4len
;
4610 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4613 if (!skb_is_gso(skb
))
4616 err
= skb_cow_head(skb
, 0);
4620 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4621 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4623 if (first
->protocol
== htons(ETH_P_IP
)) {
4624 struct iphdr
*iph
= ip_hdr(skb
);
4627 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4631 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4632 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4635 } else if (skb_is_gso_v6(skb
)) {
4636 ipv6_hdr(skb
)->payload_len
= 0;
4637 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4638 &ipv6_hdr(skb
)->daddr
,
4640 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4644 /* compute header lengths */
4645 l4len
= tcp_hdrlen(skb
);
4646 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4648 /* update gso size and bytecount with header size */
4649 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4650 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4653 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4654 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4656 /* VLAN MACLEN IPLEN */
4657 vlan_macip_lens
= skb_network_header_len(skb
);
4658 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4659 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4661 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4666 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4668 struct sk_buff
*skb
= first
->skb
;
4669 u32 vlan_macip_lens
= 0;
4670 u32 mss_l4len_idx
= 0;
4673 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4674 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4679 switch (first
->protocol
) {
4680 case htons(ETH_P_IP
):
4681 vlan_macip_lens
|= skb_network_header_len(skb
);
4682 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4683 l4_hdr
= ip_hdr(skb
)->protocol
;
4685 case htons(ETH_P_IPV6
):
4686 vlan_macip_lens
|= skb_network_header_len(skb
);
4687 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4690 if (unlikely(net_ratelimit())) {
4691 dev_warn(tx_ring
->dev
,
4692 "partial checksum but proto=%x!\n",
4700 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4701 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4702 E1000_ADVTXD_L4LEN_SHIFT
;
4705 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4706 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4707 E1000_ADVTXD_L4LEN_SHIFT
;
4710 mss_l4len_idx
= sizeof(struct udphdr
) <<
4711 E1000_ADVTXD_L4LEN_SHIFT
;
4714 if (unlikely(net_ratelimit())) {
4715 dev_warn(tx_ring
->dev
,
4716 "partial checksum but l4 proto=%x!\n",
4722 /* update TX checksum flag */
4723 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4726 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4727 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4729 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4732 #define IGB_SET_FLAG(_input, _flag, _result) \
4733 ((_flag <= _result) ? \
4734 ((u32)(_input & _flag) * (_result / _flag)) : \
4735 ((u32)(_input & _flag) / (_flag / _result)))
4737 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4739 /* set type for advanced descriptor with frame checksum insertion */
4740 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4741 E1000_ADVTXD_DCMD_DEXT
|
4742 E1000_ADVTXD_DCMD_IFCS
;
4744 /* set HW vlan bit if vlan is present */
4745 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4746 (E1000_ADVTXD_DCMD_VLE
));
4748 /* set segmentation bits for TSO */
4749 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4750 (E1000_ADVTXD_DCMD_TSE
));
4752 /* set timestamp bit if present */
4753 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4754 (E1000_ADVTXD_MAC_TSTAMP
));
4756 /* insert frame checksum */
4757 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4762 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4763 union e1000_adv_tx_desc
*tx_desc
,
4764 u32 tx_flags
, unsigned int paylen
)
4766 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4768 /* 82575 requires a unique index per ring */
4769 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4770 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4772 /* insert L4 checksum */
4773 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4775 (E1000_TXD_POPTS_TXSM
<< 8));
4777 /* insert IPv4 checksum */
4778 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4780 (E1000_TXD_POPTS_IXSM
<< 8));
4782 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4785 static void igb_tx_map(struct igb_ring
*tx_ring
,
4786 struct igb_tx_buffer
*first
,
4789 struct sk_buff
*skb
= first
->skb
;
4790 struct igb_tx_buffer
*tx_buffer
;
4791 union e1000_adv_tx_desc
*tx_desc
;
4792 struct skb_frag_struct
*frag
;
4794 unsigned int data_len
, size
;
4795 u32 tx_flags
= first
->tx_flags
;
4796 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4797 u16 i
= tx_ring
->next_to_use
;
4799 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4801 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4803 size
= skb_headlen(skb
);
4804 data_len
= skb
->data_len
;
4806 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4810 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4811 if (dma_mapping_error(tx_ring
->dev
, dma
))
4814 /* record length, and DMA address */
4815 dma_unmap_len_set(tx_buffer
, len
, size
);
4816 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4818 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4820 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4821 tx_desc
->read
.cmd_type_len
=
4822 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4826 if (i
== tx_ring
->count
) {
4827 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4830 tx_desc
->read
.olinfo_status
= 0;
4832 dma
+= IGB_MAX_DATA_PER_TXD
;
4833 size
-= IGB_MAX_DATA_PER_TXD
;
4835 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4838 if (likely(!data_len
))
4841 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4845 if (i
== tx_ring
->count
) {
4846 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4849 tx_desc
->read
.olinfo_status
= 0;
4851 size
= skb_frag_size(frag
);
4854 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4855 size
, DMA_TO_DEVICE
);
4857 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4860 /* write last descriptor with RS and EOP bits */
4861 cmd_type
|= size
| IGB_TXD_DCMD
;
4862 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4864 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4866 /* set the timestamp */
4867 first
->time_stamp
= jiffies
;
4869 /* Force memory writes to complete before letting h/w know there
4870 * are new descriptors to fetch. (Only applicable for weak-ordered
4871 * memory model archs, such as IA-64).
4873 * We also need this memory barrier to make certain all of the
4874 * status bits have been updated before next_to_watch is written.
4878 /* set next_to_watch value indicating a packet is present */
4879 first
->next_to_watch
= tx_desc
;
4882 if (i
== tx_ring
->count
)
4885 tx_ring
->next_to_use
= i
;
4887 writel(i
, tx_ring
->tail
);
4889 /* we need this if more than one processor can write to our tail
4890 * at a time, it synchronizes IO on IA64/Altix systems
4897 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4899 /* clear dma mappings for failed tx_buffer_info map */
4901 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4902 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4903 if (tx_buffer
== first
)
4910 tx_ring
->next_to_use
= i
;
4913 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4915 struct net_device
*netdev
= tx_ring
->netdev
;
4917 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4919 /* Herbert's original patch had:
4920 * smp_mb__after_netif_stop_queue();
4921 * but since that doesn't exist yet, just open code it.
4925 /* We need to check again in a case another CPU has just
4926 * made room available.
4928 if (igb_desc_unused(tx_ring
) < size
)
4932 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4934 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4935 tx_ring
->tx_stats
.restart_queue2
++;
4936 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4941 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4943 if (igb_desc_unused(tx_ring
) >= size
)
4945 return __igb_maybe_stop_tx(tx_ring
, size
);
4948 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4949 struct igb_ring
*tx_ring
)
4951 struct igb_tx_buffer
*first
;
4954 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4955 __be16 protocol
= vlan_get_protocol(skb
);
4958 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4959 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4960 * + 2 desc gap to keep tail from touching head,
4961 * + 1 desc for context descriptor,
4962 * otherwise try next time
4964 if (NETDEV_FRAG_PAGE_MAX_SIZE
> IGB_MAX_DATA_PER_TXD
) {
4967 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
4968 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
4970 count
+= skb_shinfo(skb
)->nr_frags
;
4973 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
4974 /* this is a hard error */
4975 return NETDEV_TX_BUSY
;
4978 /* record the location of the first descriptor for this packet */
4979 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
4981 first
->bytecount
= skb
->len
;
4982 first
->gso_segs
= 1;
4984 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
4985 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
4987 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
4989 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
4990 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
4992 adapter
->ptp_tx_skb
= skb_get(skb
);
4993 adapter
->ptp_tx_start
= jiffies
;
4994 if (adapter
->hw
.mac
.type
== e1000_82576
)
4995 schedule_work(&adapter
->ptp_tx_work
);
4999 skb_tx_timestamp(skb
);
5001 if (vlan_tx_tag_present(skb
)) {
5002 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5003 tx_flags
|= (vlan_tx_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5006 /* record initial flags and protocol */
5007 first
->tx_flags
= tx_flags
;
5008 first
->protocol
= protocol
;
5010 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5014 igb_tx_csum(tx_ring
, first
);
5016 igb_tx_map(tx_ring
, first
, hdr_len
);
5018 /* Make sure there is space in the ring for the next send. */
5019 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
5021 return NETDEV_TX_OK
;
5024 igb_unmap_and_free_tx_resource(tx_ring
, first
);
5026 return NETDEV_TX_OK
;
5029 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5030 struct sk_buff
*skb
)
5032 unsigned int r_idx
= skb
->queue_mapping
;
5034 if (r_idx
>= adapter
->num_tx_queues
)
5035 r_idx
= r_idx
% adapter
->num_tx_queues
;
5037 return adapter
->tx_ring
[r_idx
];
5040 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5041 struct net_device
*netdev
)
5043 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5045 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5046 dev_kfree_skb_any(skb
);
5047 return NETDEV_TX_OK
;
5050 if (skb
->len
<= 0) {
5051 dev_kfree_skb_any(skb
);
5052 return NETDEV_TX_OK
;
5055 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5056 * in order to meet this minimum size requirement.
5058 if (unlikely(skb
->len
< 17)) {
5059 if (skb_pad(skb
, 17 - skb
->len
))
5060 return NETDEV_TX_OK
;
5062 skb_set_tail_pointer(skb
, 17);
5065 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5069 * igb_tx_timeout - Respond to a Tx Hang
5070 * @netdev: network interface device structure
5072 static void igb_tx_timeout(struct net_device
*netdev
)
5074 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5075 struct e1000_hw
*hw
= &adapter
->hw
;
5077 /* Do the reset outside of interrupt context */
5078 adapter
->tx_timeout_count
++;
5080 if (hw
->mac
.type
>= e1000_82580
)
5081 hw
->dev_spec
._82575
.global_device_reset
= true;
5083 schedule_work(&adapter
->reset_task
);
5085 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5088 static void igb_reset_task(struct work_struct
*work
)
5090 struct igb_adapter
*adapter
;
5091 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5094 netdev_err(adapter
->netdev
, "Reset adapter\n");
5095 igb_reinit_locked(adapter
);
5099 * igb_get_stats64 - Get System Network Statistics
5100 * @netdev: network interface device structure
5101 * @stats: rtnl_link_stats64 pointer
5103 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
5104 struct rtnl_link_stats64
*stats
)
5106 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5108 spin_lock(&adapter
->stats64_lock
);
5109 igb_update_stats(adapter
, &adapter
->stats64
);
5110 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5111 spin_unlock(&adapter
->stats64_lock
);
5117 * igb_change_mtu - Change the Maximum Transfer Unit
5118 * @netdev: network interface device structure
5119 * @new_mtu: new value for maximum frame size
5121 * Returns 0 on success, negative on failure
5123 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5125 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5126 struct pci_dev
*pdev
= adapter
->pdev
;
5127 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5129 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
5130 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
5134 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5135 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
5136 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
5140 /* adjust max frame to be at least the size of a standard frame */
5141 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5142 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5144 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5145 usleep_range(1000, 2000);
5147 /* igb_down has a dependency on max_frame_size */
5148 adapter
->max_frame_size
= max_frame
;
5150 if (netif_running(netdev
))
5153 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5154 netdev
->mtu
, new_mtu
);
5155 netdev
->mtu
= new_mtu
;
5157 if (netif_running(netdev
))
5162 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5168 * igb_update_stats - Update the board statistics counters
5169 * @adapter: board private structure
5171 void igb_update_stats(struct igb_adapter
*adapter
,
5172 struct rtnl_link_stats64
*net_stats
)
5174 struct e1000_hw
*hw
= &adapter
->hw
;
5175 struct pci_dev
*pdev
= adapter
->pdev
;
5181 u64 _bytes
, _packets
;
5183 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5185 /* Prevent stats update while adapter is being reset, or if the pci
5186 * connection is down.
5188 if (adapter
->link_speed
== 0)
5190 if (pci_channel_offline(pdev
))
5197 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5198 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5199 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5200 if (hw
->mac
.type
>= e1000_i210
)
5201 wr32(E1000_RQDPC(i
), 0);
5204 ring
->rx_stats
.drops
+= rqdpc
;
5205 net_stats
->rx_fifo_errors
+= rqdpc
;
5209 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5210 _bytes
= ring
->rx_stats
.bytes
;
5211 _packets
= ring
->rx_stats
.packets
;
5212 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5214 packets
+= _packets
;
5217 net_stats
->rx_bytes
= bytes
;
5218 net_stats
->rx_packets
= packets
;
5222 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5223 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5225 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5226 _bytes
= ring
->tx_stats
.bytes
;
5227 _packets
= ring
->tx_stats
.packets
;
5228 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5230 packets
+= _packets
;
5232 net_stats
->tx_bytes
= bytes
;
5233 net_stats
->tx_packets
= packets
;
5236 /* read stats registers */
5237 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5238 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5239 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5240 rd32(E1000_GORCH
); /* clear GORCL */
5241 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5242 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5243 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5245 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5246 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5247 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5248 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5249 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5250 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5251 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5252 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5254 mpc
= rd32(E1000_MPC
);
5255 adapter
->stats
.mpc
+= mpc
;
5256 net_stats
->rx_fifo_errors
+= mpc
;
5257 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5258 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5259 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5260 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5261 adapter
->stats
.dc
+= rd32(E1000_DC
);
5262 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5263 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5264 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5265 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5266 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5267 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5268 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5269 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5270 rd32(E1000_GOTCH
); /* clear GOTCL */
5271 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5272 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5273 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5274 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5275 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5276 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5277 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5279 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5280 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5281 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5282 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5283 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5284 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5286 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5287 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5289 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5290 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5292 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5293 /* read internal phy specific stats */
5294 reg
= rd32(E1000_CTRL_EXT
);
5295 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5296 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5298 /* this stat has invalid values on i210/i211 */
5299 if ((hw
->mac
.type
!= e1000_i210
) &&
5300 (hw
->mac
.type
!= e1000_i211
))
5301 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5304 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5305 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5307 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5308 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5309 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5310 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5311 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5312 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5313 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5314 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5315 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5317 /* Fill out the OS statistics structure */
5318 net_stats
->multicast
= adapter
->stats
.mprc
;
5319 net_stats
->collisions
= adapter
->stats
.colc
;
5323 /* RLEC on some newer hardware can be incorrect so build
5324 * our own version based on RUC and ROC
5326 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5327 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5328 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5329 adapter
->stats
.cexterr
;
5330 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5332 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5333 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5334 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5337 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5338 adapter
->stats
.latecol
;
5339 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5340 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5341 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5343 /* Tx Dropped needs to be maintained elsewhere */
5346 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
5347 if ((adapter
->link_speed
== SPEED_1000
) &&
5348 (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
, &phy_tmp
))) {
5349 phy_tmp
&= PHY_IDLE_ERROR_COUNT_MASK
;
5350 adapter
->phy_stats
.idle_errors
+= phy_tmp
;
5354 /* Management Stats */
5355 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5356 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5357 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5360 reg
= rd32(E1000_MANC
);
5361 if (reg
& E1000_MANC_EN_BMC2OS
) {
5362 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5363 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5364 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5365 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5369 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5371 struct igb_adapter
*adapter
= data
;
5372 struct e1000_hw
*hw
= &adapter
->hw
;
5373 u32 icr
= rd32(E1000_ICR
);
5374 /* reading ICR causes bit 31 of EICR to be cleared */
5376 if (icr
& E1000_ICR_DRSTA
)
5377 schedule_work(&adapter
->reset_task
);
5379 if (icr
& E1000_ICR_DOUTSYNC
) {
5380 /* HW is reporting DMA is out of sync */
5381 adapter
->stats
.doosync
++;
5382 /* The DMA Out of Sync is also indication of a spoof event
5383 * in IOV mode. Check the Wrong VM Behavior register to
5384 * see if it is really a spoof event.
5386 igb_check_wvbr(adapter
);
5389 /* Check for a mailbox event */
5390 if (icr
& E1000_ICR_VMMB
)
5391 igb_msg_task(adapter
);
5393 if (icr
& E1000_ICR_LSC
) {
5394 hw
->mac
.get_link_status
= 1;
5395 /* guard against interrupt when we're going down */
5396 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5397 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5400 if (icr
& E1000_ICR_TS
) {
5401 u32 tsicr
= rd32(E1000_TSICR
);
5403 if (tsicr
& E1000_TSICR_TXTS
) {
5404 /* acknowledge the interrupt */
5405 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
5406 /* retrieve hardware timestamp */
5407 schedule_work(&adapter
->ptp_tx_work
);
5411 wr32(E1000_EIMS
, adapter
->eims_other
);
5416 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5418 struct igb_adapter
*adapter
= q_vector
->adapter
;
5419 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5421 if (!q_vector
->set_itr
)
5427 if (adapter
->hw
.mac
.type
== e1000_82575
)
5428 itr_val
|= itr_val
<< 16;
5430 itr_val
|= E1000_EITR_CNT_IGNR
;
5432 writel(itr_val
, q_vector
->itr_register
);
5433 q_vector
->set_itr
= 0;
5436 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5438 struct igb_q_vector
*q_vector
= data
;
5440 /* Write the ITR value calculated from the previous interrupt. */
5441 igb_write_itr(q_vector
);
5443 napi_schedule(&q_vector
->napi
);
5448 #ifdef CONFIG_IGB_DCA
5449 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5450 struct igb_ring
*tx_ring
,
5453 struct e1000_hw
*hw
= &adapter
->hw
;
5454 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5456 if (hw
->mac
.type
!= e1000_82575
)
5457 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5459 /* We can enable relaxed ordering for reads, but not writes when
5460 * DCA is enabled. This is due to a known issue in some chipsets
5461 * which will cause the DCA tag to be cleared.
5463 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5464 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5465 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5467 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5470 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5471 struct igb_ring
*rx_ring
,
5474 struct e1000_hw
*hw
= &adapter
->hw
;
5475 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5477 if (hw
->mac
.type
!= e1000_82575
)
5478 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5480 /* We can enable relaxed ordering for reads, but not writes when
5481 * DCA is enabled. This is due to a known issue in some chipsets
5482 * which will cause the DCA tag to be cleared.
5484 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5485 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5487 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5490 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5492 struct igb_adapter
*adapter
= q_vector
->adapter
;
5493 int cpu
= get_cpu();
5495 if (q_vector
->cpu
== cpu
)
5498 if (q_vector
->tx
.ring
)
5499 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5501 if (q_vector
->rx
.ring
)
5502 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5504 q_vector
->cpu
= cpu
;
5509 static void igb_setup_dca(struct igb_adapter
*adapter
)
5511 struct e1000_hw
*hw
= &adapter
->hw
;
5514 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5517 /* Always use CB2 mode, difference is masked in the CB driver. */
5518 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5520 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5521 adapter
->q_vector
[i
]->cpu
= -1;
5522 igb_update_dca(adapter
->q_vector
[i
]);
5526 static int __igb_notify_dca(struct device
*dev
, void *data
)
5528 struct net_device
*netdev
= dev_get_drvdata(dev
);
5529 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5530 struct pci_dev
*pdev
= adapter
->pdev
;
5531 struct e1000_hw
*hw
= &adapter
->hw
;
5532 unsigned long event
= *(unsigned long *)data
;
5535 case DCA_PROVIDER_ADD
:
5536 /* if already enabled, don't do it again */
5537 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5539 if (dca_add_requester(dev
) == 0) {
5540 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5541 dev_info(&pdev
->dev
, "DCA enabled\n");
5542 igb_setup_dca(adapter
);
5545 /* Fall Through since DCA is disabled. */
5546 case DCA_PROVIDER_REMOVE
:
5547 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5548 /* without this a class_device is left
5549 * hanging around in the sysfs model
5551 dca_remove_requester(dev
);
5552 dev_info(&pdev
->dev
, "DCA disabled\n");
5553 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5554 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5562 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5567 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5570 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5572 #endif /* CONFIG_IGB_DCA */
5574 #ifdef CONFIG_PCI_IOV
5575 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5577 unsigned char mac_addr
[ETH_ALEN
];
5579 eth_zero_addr(mac_addr
);
5580 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5582 /* By default spoof check is enabled for all VFs */
5583 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5589 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5591 struct e1000_hw
*hw
= &adapter
->hw
;
5595 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5596 ping
= E1000_PF_CONTROL_MSG
;
5597 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5598 ping
|= E1000_VT_MSGTYPE_CTS
;
5599 igb_write_mbx(hw
, &ping
, 1, i
);
5603 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5605 struct e1000_hw
*hw
= &adapter
->hw
;
5606 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5607 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5609 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5610 IGB_VF_FLAG_MULTI_PROMISC
);
5611 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5613 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5614 vmolr
|= E1000_VMOLR_MPME
;
5615 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5616 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5618 /* if we have hashes and we are clearing a multicast promisc
5619 * flag we need to write the hashes to the MTA as this step
5620 * was previously skipped
5622 if (vf_data
->num_vf_mc_hashes
> 30) {
5623 vmolr
|= E1000_VMOLR_MPME
;
5624 } else if (vf_data
->num_vf_mc_hashes
) {
5627 vmolr
|= E1000_VMOLR_ROMPE
;
5628 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5629 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5633 wr32(E1000_VMOLR(vf
), vmolr
);
5635 /* there are flags left unprocessed, likely not supported */
5636 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5642 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5643 u32
*msgbuf
, u32 vf
)
5645 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5646 u16
*hash_list
= (u16
*)&msgbuf
[1];
5647 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5650 /* salt away the number of multicast addresses assigned
5651 * to this VF for later use to restore when the PF multi cast
5654 vf_data
->num_vf_mc_hashes
= n
;
5656 /* only up to 30 hash values supported */
5660 /* store the hashes for later use */
5661 for (i
= 0; i
< n
; i
++)
5662 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5664 /* Flush and reset the mta with the new values */
5665 igb_set_rx_mode(adapter
->netdev
);
5670 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5672 struct e1000_hw
*hw
= &adapter
->hw
;
5673 struct vf_data_storage
*vf_data
;
5676 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5677 u32 vmolr
= rd32(E1000_VMOLR(i
));
5679 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5681 vf_data
= &adapter
->vf_data
[i
];
5683 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5684 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5685 vmolr
|= E1000_VMOLR_MPME
;
5686 } else if (vf_data
->num_vf_mc_hashes
) {
5687 vmolr
|= E1000_VMOLR_ROMPE
;
5688 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5689 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5691 wr32(E1000_VMOLR(i
), vmolr
);
5695 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5697 struct e1000_hw
*hw
= &adapter
->hw
;
5698 u32 pool_mask
, reg
, vid
;
5701 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5703 /* Find the vlan filter for this id */
5704 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5705 reg
= rd32(E1000_VLVF(i
));
5707 /* remove the vf from the pool */
5710 /* if pool is empty then remove entry from vfta */
5711 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5712 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5714 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5715 igb_vfta_set(hw
, vid
, false);
5718 wr32(E1000_VLVF(i
), reg
);
5721 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5724 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5726 struct e1000_hw
*hw
= &adapter
->hw
;
5729 /* The vlvf table only exists on 82576 hardware and newer */
5730 if (hw
->mac
.type
< e1000_82576
)
5733 /* we only need to do this if VMDq is enabled */
5734 if (!adapter
->vfs_allocated_count
)
5737 /* Find the vlan filter for this id */
5738 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5739 reg
= rd32(E1000_VLVF(i
));
5740 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5741 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5746 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5747 /* Did not find a matching VLAN ID entry that was
5748 * enabled. Search for a free filter entry, i.e.
5749 * one without the enable bit set
5751 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5752 reg
= rd32(E1000_VLVF(i
));
5753 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5757 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5758 /* Found an enabled/available entry */
5759 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5761 /* if !enabled we need to set this up in vfta */
5762 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5763 /* add VID to filter table */
5764 igb_vfta_set(hw
, vid
, true);
5765 reg
|= E1000_VLVF_VLANID_ENABLE
;
5767 reg
&= ~E1000_VLVF_VLANID_MASK
;
5769 wr32(E1000_VLVF(i
), reg
);
5771 /* do not modify RLPML for PF devices */
5772 if (vf
>= adapter
->vfs_allocated_count
)
5775 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5778 reg
= rd32(E1000_VMOLR(vf
));
5779 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5781 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5783 wr32(E1000_VMOLR(vf
), reg
);
5786 adapter
->vf_data
[vf
].vlans_enabled
++;
5789 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5790 /* remove vf from the pool */
5791 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5792 /* if pool is empty then remove entry from vfta */
5793 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5795 igb_vfta_set(hw
, vid
, false);
5797 wr32(E1000_VLVF(i
), reg
);
5799 /* do not modify RLPML for PF devices */
5800 if (vf
>= adapter
->vfs_allocated_count
)
5803 adapter
->vf_data
[vf
].vlans_enabled
--;
5804 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5807 reg
= rd32(E1000_VMOLR(vf
));
5808 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5810 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5812 wr32(E1000_VMOLR(vf
), reg
);
5819 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5821 struct e1000_hw
*hw
= &adapter
->hw
;
5824 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5826 wr32(E1000_VMVIR(vf
), 0);
5829 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5830 int vf
, u16 vlan
, u8 qos
)
5833 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5835 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5838 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5841 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5842 igb_set_vmolr(adapter
, vf
, !vlan
);
5843 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5844 adapter
->vf_data
[vf
].pf_qos
= qos
;
5845 dev_info(&adapter
->pdev
->dev
,
5846 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5847 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5848 dev_warn(&adapter
->pdev
->dev
,
5849 "The VF VLAN has been set, but the PF device is not up.\n");
5850 dev_warn(&adapter
->pdev
->dev
,
5851 "Bring the PF device up before attempting to use the VF device.\n");
5854 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5856 igb_set_vmvir(adapter
, vlan
, vf
);
5857 igb_set_vmolr(adapter
, vf
, true);
5858 adapter
->vf_data
[vf
].pf_vlan
= 0;
5859 adapter
->vf_data
[vf
].pf_qos
= 0;
5865 static int igb_find_vlvf_entry(struct igb_adapter
*adapter
, int vid
)
5867 struct e1000_hw
*hw
= &adapter
->hw
;
5871 /* Find the vlan filter for this id */
5872 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5873 reg
= rd32(E1000_VLVF(i
));
5874 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5875 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5879 if (i
>= E1000_VLVF_ARRAY_SIZE
)
5885 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5887 struct e1000_hw
*hw
= &adapter
->hw
;
5888 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5889 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5892 /* If in promiscuous mode we need to make sure the PF also has
5893 * the VLAN filter set.
5895 if (add
&& (adapter
->netdev
->flags
& IFF_PROMISC
))
5896 err
= igb_vlvf_set(adapter
, vid
, add
,
5897 adapter
->vfs_allocated_count
);
5901 err
= igb_vlvf_set(adapter
, vid
, add
, vf
);
5906 /* Go through all the checks to see if the VLAN filter should
5907 * be wiped completely.
5909 if (!add
&& (adapter
->netdev
->flags
& IFF_PROMISC
)) {
5911 int regndx
= igb_find_vlvf_entry(adapter
, vid
);
5915 /* See if any other pools are set for this VLAN filter
5916 * entry other than the PF.
5918 vlvf
= bits
= rd32(E1000_VLVF(regndx
));
5919 bits
&= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
5920 adapter
->vfs_allocated_count
);
5921 /* If the filter was removed then ensure PF pool bit
5922 * is cleared if the PF only added itself to the pool
5923 * because the PF is in promiscuous mode.
5925 if ((vlvf
& VLAN_VID_MASK
) == vid
&&
5926 !test_bit(vid
, adapter
->active_vlans
) &&
5928 igb_vlvf_set(adapter
, vid
, add
,
5929 adapter
->vfs_allocated_count
);
5936 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
5938 /* clear flags - except flag that indicates PF has set the MAC */
5939 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
5940 adapter
->vf_data
[vf
].last_nack
= jiffies
;
5942 /* reset offloads to defaults */
5943 igb_set_vmolr(adapter
, vf
, true);
5945 /* reset vlans for device */
5946 igb_clear_vf_vfta(adapter
, vf
);
5947 if (adapter
->vf_data
[vf
].pf_vlan
)
5948 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
5949 adapter
->vf_data
[vf
].pf_vlan
,
5950 adapter
->vf_data
[vf
].pf_qos
);
5952 igb_clear_vf_vfta(adapter
, vf
);
5954 /* reset multicast table array for vf */
5955 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
5957 /* Flush and reset the mta with the new values */
5958 igb_set_rx_mode(adapter
->netdev
);
5961 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
5963 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5965 /* clear mac address as we were hotplug removed/added */
5966 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
5967 eth_zero_addr(vf_mac
);
5969 /* process remaining reset events */
5970 igb_vf_reset(adapter
, vf
);
5973 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
5975 struct e1000_hw
*hw
= &adapter
->hw
;
5976 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
5977 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
5979 u8
*addr
= (u8
*)(&msgbuf
[1]);
5981 /* process all the same items cleared in a function level reset */
5982 igb_vf_reset(adapter
, vf
);
5984 /* set vf mac address */
5985 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
5987 /* enable transmit and receive for vf */
5988 reg
= rd32(E1000_VFTE
);
5989 wr32(E1000_VFTE
, reg
| (1 << vf
));
5990 reg
= rd32(E1000_VFRE
);
5991 wr32(E1000_VFRE
, reg
| (1 << vf
));
5993 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
5995 /* reply to reset with ack and vf mac address */
5996 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
5997 memcpy(addr
, vf_mac
, ETH_ALEN
);
5998 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6001 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6003 /* The VF MAC Address is stored in a packed array of bytes
6004 * starting at the second 32 bit word of the msg array
6006 unsigned char *addr
= (char *)&msg
[1];
6009 if (is_valid_ether_addr(addr
))
6010 err
= igb_set_vf_mac(adapter
, vf
, addr
);
6015 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6017 struct e1000_hw
*hw
= &adapter
->hw
;
6018 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6019 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6021 /* if device isn't clear to send it shouldn't be reading either */
6022 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6023 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6024 igb_write_mbx(hw
, &msg
, 1, vf
);
6025 vf_data
->last_nack
= jiffies
;
6029 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6031 struct pci_dev
*pdev
= adapter
->pdev
;
6032 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6033 struct e1000_hw
*hw
= &adapter
->hw
;
6034 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6037 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
6040 /* if receive failed revoke VF CTS stats and restart init */
6041 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6042 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6043 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6048 /* this is a message we already processed, do nothing */
6049 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6052 /* until the vf completes a reset it should not be
6053 * allowed to start any configuration.
6055 if (msgbuf
[0] == E1000_VF_RESET
) {
6056 igb_vf_reset_msg(adapter
, vf
);
6060 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6061 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6067 switch ((msgbuf
[0] & 0xFFFF)) {
6068 case E1000_VF_SET_MAC_ADDR
:
6070 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
6071 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6073 dev_warn(&pdev
->dev
,
6074 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6077 case E1000_VF_SET_PROMISC
:
6078 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6080 case E1000_VF_SET_MULTICAST
:
6081 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6083 case E1000_VF_SET_LPE
:
6084 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6086 case E1000_VF_SET_VLAN
:
6088 if (vf_data
->pf_vlan
)
6089 dev_warn(&pdev
->dev
,
6090 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6093 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
6096 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6101 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6103 /* notify the VF of the results of what it sent us */
6105 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6107 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6109 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6112 static void igb_msg_task(struct igb_adapter
*adapter
)
6114 struct e1000_hw
*hw
= &adapter
->hw
;
6117 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6118 /* process any reset requests */
6119 if (!igb_check_for_rst(hw
, vf
))
6120 igb_vf_reset_event(adapter
, vf
);
6122 /* process any messages pending */
6123 if (!igb_check_for_msg(hw
, vf
))
6124 igb_rcv_msg_from_vf(adapter
, vf
);
6126 /* process any acks */
6127 if (!igb_check_for_ack(hw
, vf
))
6128 igb_rcv_ack_from_vf(adapter
, vf
);
6133 * igb_set_uta - Set unicast filter table address
6134 * @adapter: board private structure
6136 * The unicast table address is a register array of 32-bit registers.
6137 * The table is meant to be used in a way similar to how the MTA is used
6138 * however due to certain limitations in the hardware it is necessary to
6139 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6140 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6142 static void igb_set_uta(struct igb_adapter
*adapter
)
6144 struct e1000_hw
*hw
= &adapter
->hw
;
6147 /* The UTA table only exists on 82576 hardware and newer */
6148 if (hw
->mac
.type
< e1000_82576
)
6151 /* we only need to do this if VMDq is enabled */
6152 if (!adapter
->vfs_allocated_count
)
6155 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
6156 array_wr32(E1000_UTA
, i
, ~0);
6160 * igb_intr_msi - Interrupt Handler
6161 * @irq: interrupt number
6162 * @data: pointer to a network interface device structure
6164 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6166 struct igb_adapter
*adapter
= data
;
6167 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6168 struct e1000_hw
*hw
= &adapter
->hw
;
6169 /* read ICR disables interrupts using IAM */
6170 u32 icr
= rd32(E1000_ICR
);
6172 igb_write_itr(q_vector
);
6174 if (icr
& E1000_ICR_DRSTA
)
6175 schedule_work(&adapter
->reset_task
);
6177 if (icr
& E1000_ICR_DOUTSYNC
) {
6178 /* HW is reporting DMA is out of sync */
6179 adapter
->stats
.doosync
++;
6182 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6183 hw
->mac
.get_link_status
= 1;
6184 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6185 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6188 if (icr
& E1000_ICR_TS
) {
6189 u32 tsicr
= rd32(E1000_TSICR
);
6191 if (tsicr
& E1000_TSICR_TXTS
) {
6192 /* acknowledge the interrupt */
6193 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6194 /* retrieve hardware timestamp */
6195 schedule_work(&adapter
->ptp_tx_work
);
6199 napi_schedule(&q_vector
->napi
);
6205 * igb_intr - Legacy Interrupt Handler
6206 * @irq: interrupt number
6207 * @data: pointer to a network interface device structure
6209 static irqreturn_t
igb_intr(int irq
, void *data
)
6211 struct igb_adapter
*adapter
= data
;
6212 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6213 struct e1000_hw
*hw
= &adapter
->hw
;
6214 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6215 * need for the IMC write
6217 u32 icr
= rd32(E1000_ICR
);
6219 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6220 * not set, then the adapter didn't send an interrupt
6222 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6225 igb_write_itr(q_vector
);
6227 if (icr
& E1000_ICR_DRSTA
)
6228 schedule_work(&adapter
->reset_task
);
6230 if (icr
& E1000_ICR_DOUTSYNC
) {
6231 /* HW is reporting DMA is out of sync */
6232 adapter
->stats
.doosync
++;
6235 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6236 hw
->mac
.get_link_status
= 1;
6237 /* guard against interrupt when we're going down */
6238 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6239 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6242 if (icr
& E1000_ICR_TS
) {
6243 u32 tsicr
= rd32(E1000_TSICR
);
6245 if (tsicr
& E1000_TSICR_TXTS
) {
6246 /* acknowledge the interrupt */
6247 wr32(E1000_TSICR
, E1000_TSICR_TXTS
);
6248 /* retrieve hardware timestamp */
6249 schedule_work(&adapter
->ptp_tx_work
);
6253 napi_schedule(&q_vector
->napi
);
6258 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6260 struct igb_adapter
*adapter
= q_vector
->adapter
;
6261 struct e1000_hw
*hw
= &adapter
->hw
;
6263 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6264 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6265 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6266 igb_set_itr(q_vector
);
6268 igb_update_ring_itr(q_vector
);
6271 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6272 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6273 wr32(E1000_EIMS
, q_vector
->eims_value
);
6275 igb_irq_enable(adapter
);
6280 * igb_poll - NAPI Rx polling callback
6281 * @napi: napi polling structure
6282 * @budget: count of how many packets we should handle
6284 static int igb_poll(struct napi_struct
*napi
, int budget
)
6286 struct igb_q_vector
*q_vector
= container_of(napi
,
6287 struct igb_q_vector
,
6289 bool clean_complete
= true;
6291 #ifdef CONFIG_IGB_DCA
6292 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6293 igb_update_dca(q_vector
);
6295 if (q_vector
->tx
.ring
)
6296 clean_complete
= igb_clean_tx_irq(q_vector
);
6298 if (q_vector
->rx
.ring
)
6299 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
6301 /* If all work not completed, return budget and keep polling */
6302 if (!clean_complete
)
6305 /* If not enough Rx work done, exit the polling mode */
6306 napi_complete(napi
);
6307 igb_ring_irq_enable(q_vector
);
6313 * igb_clean_tx_irq - Reclaim resources after transmit completes
6314 * @q_vector: pointer to q_vector containing needed info
6316 * returns true if ring is completely cleaned
6318 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
6320 struct igb_adapter
*adapter
= q_vector
->adapter
;
6321 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6322 struct igb_tx_buffer
*tx_buffer
;
6323 union e1000_adv_tx_desc
*tx_desc
;
6324 unsigned int total_bytes
= 0, total_packets
= 0;
6325 unsigned int budget
= q_vector
->tx
.work_limit
;
6326 unsigned int i
= tx_ring
->next_to_clean
;
6328 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6331 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6332 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6333 i
-= tx_ring
->count
;
6336 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6338 /* if next_to_watch is not set then there is no work pending */
6342 /* prevent any other reads prior to eop_desc */
6343 read_barrier_depends();
6345 /* if DD is not set pending work has not been completed */
6346 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6349 /* clear next_to_watch to prevent false hangs */
6350 tx_buffer
->next_to_watch
= NULL
;
6352 /* update the statistics for this packet */
6353 total_bytes
+= tx_buffer
->bytecount
;
6354 total_packets
+= tx_buffer
->gso_segs
;
6357 dev_kfree_skb_any(tx_buffer
->skb
);
6359 /* unmap skb header data */
6360 dma_unmap_single(tx_ring
->dev
,
6361 dma_unmap_addr(tx_buffer
, dma
),
6362 dma_unmap_len(tx_buffer
, len
),
6365 /* clear tx_buffer data */
6366 tx_buffer
->skb
= NULL
;
6367 dma_unmap_len_set(tx_buffer
, len
, 0);
6369 /* clear last DMA location and unmap remaining buffers */
6370 while (tx_desc
!= eop_desc
) {
6375 i
-= tx_ring
->count
;
6376 tx_buffer
= tx_ring
->tx_buffer_info
;
6377 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6380 /* unmap any remaining paged data */
6381 if (dma_unmap_len(tx_buffer
, len
)) {
6382 dma_unmap_page(tx_ring
->dev
,
6383 dma_unmap_addr(tx_buffer
, dma
),
6384 dma_unmap_len(tx_buffer
, len
),
6386 dma_unmap_len_set(tx_buffer
, len
, 0);
6390 /* move us one more past the eop_desc for start of next pkt */
6395 i
-= tx_ring
->count
;
6396 tx_buffer
= tx_ring
->tx_buffer_info
;
6397 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6400 /* issue prefetch for next Tx descriptor */
6403 /* update budget accounting */
6405 } while (likely(budget
));
6407 netdev_tx_completed_queue(txring_txq(tx_ring
),
6408 total_packets
, total_bytes
);
6409 i
+= tx_ring
->count
;
6410 tx_ring
->next_to_clean
= i
;
6411 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6412 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6413 tx_ring
->tx_stats
.packets
+= total_packets
;
6414 u64_stats_update_end(&tx_ring
->tx_syncp
);
6415 q_vector
->tx
.total_bytes
+= total_bytes
;
6416 q_vector
->tx
.total_packets
+= total_packets
;
6418 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6419 struct e1000_hw
*hw
= &adapter
->hw
;
6421 /* Detect a transmit hang in hardware, this serializes the
6422 * check with the clearing of time_stamp and movement of i
6424 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6425 if (tx_buffer
->next_to_watch
&&
6426 time_after(jiffies
, tx_buffer
->time_stamp
+
6427 (adapter
->tx_timeout_factor
* HZ
)) &&
6428 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6430 /* detected Tx unit hang */
6431 dev_err(tx_ring
->dev
,
6432 "Detected Tx Unit Hang\n"
6436 " next_to_use <%x>\n"
6437 " next_to_clean <%x>\n"
6438 "buffer_info[next_to_clean]\n"
6439 " time_stamp <%lx>\n"
6440 " next_to_watch <%p>\n"
6442 " desc.status <%x>\n",
6443 tx_ring
->queue_index
,
6444 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6445 readl(tx_ring
->tail
),
6446 tx_ring
->next_to_use
,
6447 tx_ring
->next_to_clean
,
6448 tx_buffer
->time_stamp
,
6449 tx_buffer
->next_to_watch
,
6451 tx_buffer
->next_to_watch
->wb
.status
);
6452 netif_stop_subqueue(tx_ring
->netdev
,
6453 tx_ring
->queue_index
);
6455 /* we are about to reset, no point in enabling stuff */
6460 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6461 if (unlikely(total_packets
&&
6462 netif_carrier_ok(tx_ring
->netdev
) &&
6463 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6464 /* Make sure that anybody stopping the queue after this
6465 * sees the new next_to_clean.
6468 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6469 tx_ring
->queue_index
) &&
6470 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6471 netif_wake_subqueue(tx_ring
->netdev
,
6472 tx_ring
->queue_index
);
6474 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6475 tx_ring
->tx_stats
.restart_queue
++;
6476 u64_stats_update_end(&tx_ring
->tx_syncp
);
6484 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6485 * @rx_ring: rx descriptor ring to store buffers on
6486 * @old_buff: donor buffer to have page reused
6488 * Synchronizes page for reuse by the adapter
6490 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6491 struct igb_rx_buffer
*old_buff
)
6493 struct igb_rx_buffer
*new_buff
;
6494 u16 nta
= rx_ring
->next_to_alloc
;
6496 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6498 /* update, and store next to alloc */
6500 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6502 /* transfer page from old buffer to new buffer */
6503 memcpy(new_buff
, old_buff
, sizeof(struct igb_rx_buffer
));
6505 /* sync the buffer for use by the device */
6506 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6507 old_buff
->page_offset
,
6512 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6514 unsigned int truesize
)
6516 /* avoid re-using remote pages */
6517 if (unlikely(page_to_nid(page
) != numa_node_id()))
6520 #if (PAGE_SIZE < 8192)
6521 /* if we are only owner of page we can reuse it */
6522 if (unlikely(page_count(page
) != 1))
6525 /* flip page offset to other buffer */
6526 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6528 /* since we are the only owner of the page and we need to
6529 * increment it, just set the value to 2 in order to avoid
6530 * an unnecessary locked operation
6532 atomic_set(&page
->_count
, 2);
6534 /* move offset up to the next cache line */
6535 rx_buffer
->page_offset
+= truesize
;
6537 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6540 /* bump ref count on page before it is given to the stack */
6548 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6549 * @rx_ring: rx descriptor ring to transact packets on
6550 * @rx_buffer: buffer containing page to add
6551 * @rx_desc: descriptor containing length of buffer written by hardware
6552 * @skb: sk_buff to place the data into
6554 * This function will add the data contained in rx_buffer->page to the skb.
6555 * This is done either through a direct copy if the data in the buffer is
6556 * less than the skb header size, otherwise it will just attach the page as
6557 * a frag to the skb.
6559 * The function will then update the page offset if necessary and return
6560 * true if the buffer can be reused by the adapter.
6562 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6563 struct igb_rx_buffer
*rx_buffer
,
6564 union e1000_adv_rx_desc
*rx_desc
,
6565 struct sk_buff
*skb
)
6567 struct page
*page
= rx_buffer
->page
;
6568 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6569 #if (PAGE_SIZE < 8192)
6570 unsigned int truesize
= IGB_RX_BUFSZ
;
6572 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
6575 if ((size
<= IGB_RX_HDR_LEN
) && !skb_is_nonlinear(skb
)) {
6576 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6578 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6579 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6580 va
+= IGB_TS_HDR_LEN
;
6581 size
-= IGB_TS_HDR_LEN
;
6584 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6586 /* we can reuse buffer as-is, just make sure it is local */
6587 if (likely(page_to_nid(page
) == numa_node_id()))
6590 /* this page cannot be reused so discard it */
6595 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6596 rx_buffer
->page_offset
, size
, truesize
);
6598 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6601 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6602 union e1000_adv_rx_desc
*rx_desc
,
6603 struct sk_buff
*skb
)
6605 struct igb_rx_buffer
*rx_buffer
;
6608 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6610 page
= rx_buffer
->page
;
6614 void *page_addr
= page_address(page
) +
6615 rx_buffer
->page_offset
;
6617 /* prefetch first cache line of first page */
6618 prefetch(page_addr
);
6619 #if L1_CACHE_BYTES < 128
6620 prefetch(page_addr
+ L1_CACHE_BYTES
);
6623 /* allocate a skb to store the frags */
6624 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
6626 if (unlikely(!skb
)) {
6627 rx_ring
->rx_stats
.alloc_failed
++;
6631 /* we will be copying header into skb->data in
6632 * pskb_may_pull so it is in our interest to prefetch
6633 * it now to avoid a possible cache miss
6635 prefetchw(skb
->data
);
6638 /* we are reusing so sync this buffer for CPU use */
6639 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6641 rx_buffer
->page_offset
,
6645 /* pull page into skb */
6646 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6647 /* hand second half of page back to the ring */
6648 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6650 /* we are not reusing the buffer so unmap it */
6651 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6652 PAGE_SIZE
, DMA_FROM_DEVICE
);
6655 /* clear contents of rx_buffer */
6656 rx_buffer
->page
= NULL
;
6661 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6662 union e1000_adv_rx_desc
*rx_desc
,
6663 struct sk_buff
*skb
)
6665 skb_checksum_none_assert(skb
);
6667 /* Ignore Checksum bit is set */
6668 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6671 /* Rx checksum disabled via ethtool */
6672 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6675 /* TCP/UDP checksum error bit is set */
6676 if (igb_test_staterr(rx_desc
,
6677 E1000_RXDEXT_STATERR_TCPE
|
6678 E1000_RXDEXT_STATERR_IPE
)) {
6679 /* work around errata with sctp packets where the TCPE aka
6680 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6681 * packets, (aka let the stack check the crc32c)
6683 if (!((skb
->len
== 60) &&
6684 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6685 u64_stats_update_begin(&ring
->rx_syncp
);
6686 ring
->rx_stats
.csum_err
++;
6687 u64_stats_update_end(&ring
->rx_syncp
);
6689 /* let the stack verify checksum errors */
6692 /* It must be a TCP or UDP packet with a valid checksum */
6693 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6694 E1000_RXD_STAT_UDPCS
))
6695 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6697 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6698 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6701 static inline void igb_rx_hash(struct igb_ring
*ring
,
6702 union e1000_adv_rx_desc
*rx_desc
,
6703 struct sk_buff
*skb
)
6705 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6707 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
6712 * igb_is_non_eop - process handling of non-EOP buffers
6713 * @rx_ring: Rx ring being processed
6714 * @rx_desc: Rx descriptor for current buffer
6715 * @skb: current socket buffer containing buffer in progress
6717 * This function updates next to clean. If the buffer is an EOP buffer
6718 * this function exits returning false, otherwise it will place the
6719 * sk_buff in the next buffer to be chained and return true indicating
6720 * that this is in fact a non-EOP buffer.
6722 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6723 union e1000_adv_rx_desc
*rx_desc
)
6725 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6727 /* fetch, update, and store next to clean */
6728 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6729 rx_ring
->next_to_clean
= ntc
;
6731 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6733 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6740 * igb_get_headlen - determine size of header for LRO/GRO
6741 * @data: pointer to the start of the headers
6742 * @max_len: total length of section to find headers in
6744 * This function is meant to determine the length of headers that will
6745 * be recognized by hardware for LRO, and GRO offloads. The main
6746 * motivation of doing this is to only perform one pull for IPv4 TCP
6747 * packets so that we can do basic things like calculating the gso_size
6748 * based on the average data per packet.
6750 static unsigned int igb_get_headlen(unsigned char *data
,
6751 unsigned int max_len
)
6754 unsigned char *network
;
6757 struct vlan_hdr
*vlan
;
6760 struct ipv6hdr
*ipv6
;
6763 u8 nexthdr
= 0; /* default to not TCP */
6766 /* this should never happen, but better safe than sorry */
6767 if (max_len
< ETH_HLEN
)
6770 /* initialize network frame pointer */
6773 /* set first protocol and move network header forward */
6774 protocol
= hdr
.eth
->h_proto
;
6775 hdr
.network
+= ETH_HLEN
;
6777 /* handle any vlan tag if present */
6778 if (protocol
== htons(ETH_P_8021Q
)) {
6779 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
6782 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
6783 hdr
.network
+= VLAN_HLEN
;
6786 /* handle L3 protocols */
6787 if (protocol
== htons(ETH_P_IP
)) {
6788 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
6791 /* access ihl as a u8 to avoid unaligned access on ia64 */
6792 hlen
= (hdr
.network
[0] & 0x0F) << 2;
6794 /* verify hlen meets minimum size requirements */
6795 if (hlen
< sizeof(struct iphdr
))
6796 return hdr
.network
- data
;
6798 /* record next protocol if header is present */
6799 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
6800 nexthdr
= hdr
.ipv4
->protocol
;
6801 } else if (protocol
== htons(ETH_P_IPV6
)) {
6802 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
6805 /* record next protocol */
6806 nexthdr
= hdr
.ipv6
->nexthdr
;
6807 hlen
= sizeof(struct ipv6hdr
);
6809 return hdr
.network
- data
;
6812 /* relocate pointer to start of L4 header */
6813 hdr
.network
+= hlen
;
6815 /* finally sort out TCP */
6816 if (nexthdr
== IPPROTO_TCP
) {
6817 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
6820 /* access doff as a u8 to avoid unaligned access on ia64 */
6821 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
6823 /* verify hlen meets minimum size requirements */
6824 if (hlen
< sizeof(struct tcphdr
))
6825 return hdr
.network
- data
;
6827 hdr
.network
+= hlen
;
6828 } else if (nexthdr
== IPPROTO_UDP
) {
6829 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
6832 hdr
.network
+= sizeof(struct udphdr
);
6835 /* If everything has gone correctly hdr.network should be the
6836 * data section of the packet and will be the end of the header.
6837 * If not then it probably represents the end of the last recognized
6840 if ((hdr
.network
- data
) < max_len
)
6841 return hdr
.network
- data
;
6847 * igb_pull_tail - igb specific version of skb_pull_tail
6848 * @rx_ring: rx descriptor ring packet is being transacted on
6849 * @rx_desc: pointer to the EOP Rx descriptor
6850 * @skb: pointer to current skb being adjusted
6852 * This function is an igb specific version of __pskb_pull_tail. The
6853 * main difference between this version and the original function is that
6854 * this function can make several assumptions about the state of things
6855 * that allow for significant optimizations versus the standard function.
6856 * As a result we can do things like drop a frag and maintain an accurate
6857 * truesize for the skb.
6859 static void igb_pull_tail(struct igb_ring
*rx_ring
,
6860 union e1000_adv_rx_desc
*rx_desc
,
6861 struct sk_buff
*skb
)
6863 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
6865 unsigned int pull_len
;
6867 /* it is valid to use page_address instead of kmap since we are
6868 * working with pages allocated out of the lomem pool per
6869 * alloc_page(GFP_ATOMIC)
6871 va
= skb_frag_address(frag
);
6873 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
6874 /* retrieve timestamp from buffer */
6875 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6877 /* update pointers to remove timestamp header */
6878 skb_frag_size_sub(frag
, IGB_TS_HDR_LEN
);
6879 frag
->page_offset
+= IGB_TS_HDR_LEN
;
6880 skb
->data_len
-= IGB_TS_HDR_LEN
;
6881 skb
->len
-= IGB_TS_HDR_LEN
;
6883 /* move va to start of packet data */
6884 va
+= IGB_TS_HDR_LEN
;
6887 /* we need the header to contain the greater of either ETH_HLEN or
6888 * 60 bytes if the skb->len is less than 60 for skb_pad.
6890 pull_len
= igb_get_headlen(va
, IGB_RX_HDR_LEN
);
6892 /* align pull length to size of long to optimize memcpy performance */
6893 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
6895 /* update all of the pointers */
6896 skb_frag_size_sub(frag
, pull_len
);
6897 frag
->page_offset
+= pull_len
;
6898 skb
->data_len
-= pull_len
;
6899 skb
->tail
+= pull_len
;
6903 * igb_cleanup_headers - Correct corrupted or empty headers
6904 * @rx_ring: rx descriptor ring packet is being transacted on
6905 * @rx_desc: pointer to the EOP Rx descriptor
6906 * @skb: pointer to current skb being fixed
6908 * Address the case where we are pulling data in on pages only
6909 * and as such no data is present in the skb header.
6911 * In addition if skb is not at least 60 bytes we need to pad it so that
6912 * it is large enough to qualify as a valid Ethernet frame.
6914 * Returns true if an error was encountered and skb was freed.
6916 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6917 union e1000_adv_rx_desc
*rx_desc
,
6918 struct sk_buff
*skb
)
6920 if (unlikely((igb_test_staterr(rx_desc
,
6921 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6922 struct net_device
*netdev
= rx_ring
->netdev
;
6923 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6924 dev_kfree_skb_any(skb
);
6929 /* place header in linear portion of buffer */
6930 if (skb_is_nonlinear(skb
))
6931 igb_pull_tail(rx_ring
, rx_desc
, skb
);
6933 /* if skb_pad returns an error the skb was freed */
6934 if (unlikely(skb
->len
< 60)) {
6935 int pad_len
= 60 - skb
->len
;
6937 if (skb_pad(skb
, pad_len
))
6939 __skb_put(skb
, pad_len
);
6946 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6947 * @rx_ring: rx descriptor ring packet is being transacted on
6948 * @rx_desc: pointer to the EOP Rx descriptor
6949 * @skb: pointer to current skb being populated
6951 * This function checks the ring, descriptor, and packet information in
6952 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6953 * other fields within the skb.
6955 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6956 union e1000_adv_rx_desc
*rx_desc
,
6957 struct sk_buff
*skb
)
6959 struct net_device
*dev
= rx_ring
->netdev
;
6961 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6963 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6965 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
6966 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
6967 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
6969 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
6970 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6973 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6974 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6975 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6977 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6979 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
6982 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6984 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6987 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6989 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6990 struct sk_buff
*skb
= rx_ring
->skb
;
6991 unsigned int total_bytes
= 0, total_packets
= 0;
6992 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6994 while (likely(total_packets
< budget
)) {
6995 union e1000_adv_rx_desc
*rx_desc
;
6997 /* return some buffers to hardware, one at a time is too slow */
6998 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
6999 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7003 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
7005 if (!igb_test_staterr(rx_desc
, E1000_RXD_STAT_DD
))
7008 /* This memory barrier is needed to keep us from reading
7009 * any other fields out of the rx_desc until we know the
7010 * RXD_STAT_DD bit is set
7014 /* retrieve a buffer from the ring */
7015 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
7017 /* exit if we failed to retrieve a buffer */
7023 /* fetch next buffer in frame if non-eop */
7024 if (igb_is_non_eop(rx_ring
, rx_desc
))
7027 /* verify the packet layout is correct */
7028 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
7033 /* probably a little skewed due to removing CRC */
7034 total_bytes
+= skb
->len
;
7036 /* populate checksum, timestamp, VLAN, and protocol */
7037 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
7039 napi_gro_receive(&q_vector
->napi
, skb
);
7041 /* reset skb pointer */
7044 /* update budget accounting */
7048 /* place incomplete frames back on ring for completion */
7051 u64_stats_update_begin(&rx_ring
->rx_syncp
);
7052 rx_ring
->rx_stats
.packets
+= total_packets
;
7053 rx_ring
->rx_stats
.bytes
+= total_bytes
;
7054 u64_stats_update_end(&rx_ring
->rx_syncp
);
7055 q_vector
->rx
.total_packets
+= total_packets
;
7056 q_vector
->rx
.total_bytes
+= total_bytes
;
7059 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7061 return total_packets
< budget
;
7064 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
7065 struct igb_rx_buffer
*bi
)
7067 struct page
*page
= bi
->page
;
7070 /* since we are recycling buffers we should seldom need to alloc */
7074 /* alloc new page for storage */
7075 page
= __skb_alloc_page(GFP_ATOMIC
| __GFP_COLD
, NULL
);
7076 if (unlikely(!page
)) {
7077 rx_ring
->rx_stats
.alloc_failed
++;
7081 /* map page for use */
7082 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
7084 /* if mapping failed free memory back to system since
7085 * there isn't much point in holding memory we can't use
7087 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7090 rx_ring
->rx_stats
.alloc_failed
++;
7096 bi
->page_offset
= 0;
7102 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7103 * @adapter: address of board private structure
7105 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7107 union e1000_adv_rx_desc
*rx_desc
;
7108 struct igb_rx_buffer
*bi
;
7109 u16 i
= rx_ring
->next_to_use
;
7115 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7116 bi
= &rx_ring
->rx_buffer_info
[i
];
7117 i
-= rx_ring
->count
;
7120 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7123 /* Refresh the desc even if buffer_addrs didn't change
7124 * because each write-back erases this info.
7126 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7132 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7133 bi
= rx_ring
->rx_buffer_info
;
7134 i
-= rx_ring
->count
;
7137 /* clear the hdr_addr for the next_to_use descriptor */
7138 rx_desc
->read
.hdr_addr
= 0;
7141 } while (cleaned_count
);
7143 i
+= rx_ring
->count
;
7145 if (rx_ring
->next_to_use
!= i
) {
7146 /* record the next descriptor to use */
7147 rx_ring
->next_to_use
= i
;
7149 /* update next to alloc since we have filled the ring */
7150 rx_ring
->next_to_alloc
= i
;
7152 /* Force memory writes to complete before letting h/w
7153 * know there are new descriptors to fetch. (Only
7154 * applicable for weak-ordered memory model archs,
7158 writel(i
, rx_ring
->tail
);
7168 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7170 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7171 struct mii_ioctl_data
*data
= if_mii(ifr
);
7173 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7178 data
->phy_id
= adapter
->hw
.phy
.addr
;
7181 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7198 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7204 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7206 return igb_ptp_get_ts_config(netdev
, ifr
);
7208 return igb_ptp_set_ts_config(netdev
, ifr
);
7214 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7216 struct igb_adapter
*adapter
= hw
->back
;
7218 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7219 return -E1000_ERR_CONFIG
;
7224 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7226 struct igb_adapter
*adapter
= hw
->back
;
7228 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7229 return -E1000_ERR_CONFIG
;
7234 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7236 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7237 struct e1000_hw
*hw
= &adapter
->hw
;
7239 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7242 /* enable VLAN tag insert/strip */
7243 ctrl
= rd32(E1000_CTRL
);
7244 ctrl
|= E1000_CTRL_VME
;
7245 wr32(E1000_CTRL
, ctrl
);
7247 /* Disable CFI check */
7248 rctl
= rd32(E1000_RCTL
);
7249 rctl
&= ~E1000_RCTL_CFIEN
;
7250 wr32(E1000_RCTL
, rctl
);
7252 /* disable VLAN tag insert/strip */
7253 ctrl
= rd32(E1000_CTRL
);
7254 ctrl
&= ~E1000_CTRL_VME
;
7255 wr32(E1000_CTRL
, ctrl
);
7258 igb_rlpml_set(adapter
);
7261 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7262 __be16 proto
, u16 vid
)
7264 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7265 struct e1000_hw
*hw
= &adapter
->hw
;
7266 int pf_id
= adapter
->vfs_allocated_count
;
7268 /* attempt to add filter to vlvf array */
7269 igb_vlvf_set(adapter
, vid
, true, pf_id
);
7271 /* add the filter since PF can receive vlans w/o entry in vlvf */
7272 igb_vfta_set(hw
, vid
, true);
7274 set_bit(vid
, adapter
->active_vlans
);
7279 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7280 __be16 proto
, u16 vid
)
7282 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7283 struct e1000_hw
*hw
= &adapter
->hw
;
7284 int pf_id
= adapter
->vfs_allocated_count
;
7287 /* remove vlan from VLVF table array */
7288 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
7290 /* if vid was not present in VLVF just remove it from table */
7292 igb_vfta_set(hw
, vid
, false);
7294 clear_bit(vid
, adapter
->active_vlans
);
7299 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7303 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7305 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7306 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7309 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7311 struct pci_dev
*pdev
= adapter
->pdev
;
7312 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7316 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7317 * for the switch() below to work
7319 if ((spd
& 1) || (dplx
& ~1))
7322 /* Fiber NIC's only allow 1000 gbps Full duplex
7323 * and 100Mbps Full duplex for 100baseFx sfp
7325 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7326 switch (spd
+ dplx
) {
7327 case SPEED_10
+ DUPLEX_HALF
:
7328 case SPEED_10
+ DUPLEX_FULL
:
7329 case SPEED_100
+ DUPLEX_HALF
:
7336 switch (spd
+ dplx
) {
7337 case SPEED_10
+ DUPLEX_HALF
:
7338 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7340 case SPEED_10
+ DUPLEX_FULL
:
7341 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7343 case SPEED_100
+ DUPLEX_HALF
:
7344 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7346 case SPEED_100
+ DUPLEX_FULL
:
7347 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7349 case SPEED_1000
+ DUPLEX_FULL
:
7351 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7353 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7358 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7359 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7364 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7368 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7371 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7372 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7373 struct e1000_hw
*hw
= &adapter
->hw
;
7374 u32 ctrl
, rctl
, status
;
7375 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7380 netif_device_detach(netdev
);
7382 if (netif_running(netdev
))
7383 __igb_close(netdev
, true);
7385 igb_clear_interrupt_scheme(adapter
);
7388 retval
= pci_save_state(pdev
);
7393 status
= rd32(E1000_STATUS
);
7394 if (status
& E1000_STATUS_LU
)
7395 wufc
&= ~E1000_WUFC_LNKC
;
7398 igb_setup_rctl(adapter
);
7399 igb_set_rx_mode(netdev
);
7401 /* turn on all-multi mode if wake on multicast is enabled */
7402 if (wufc
& E1000_WUFC_MC
) {
7403 rctl
= rd32(E1000_RCTL
);
7404 rctl
|= E1000_RCTL_MPE
;
7405 wr32(E1000_RCTL
, rctl
);
7408 ctrl
= rd32(E1000_CTRL
);
7409 /* advertise wake from D3Cold */
7410 #define E1000_CTRL_ADVD3WUC 0x00100000
7411 /* phy power management enable */
7412 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7413 ctrl
|= E1000_CTRL_ADVD3WUC
;
7414 wr32(E1000_CTRL
, ctrl
);
7416 /* Allow time for pending master requests to run */
7417 igb_disable_pcie_master(hw
);
7419 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7420 wr32(E1000_WUFC
, wufc
);
7423 wr32(E1000_WUFC
, 0);
7426 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7428 igb_power_down_link(adapter
);
7430 igb_power_up_link(adapter
);
7432 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7433 * would have already happened in close and is redundant.
7435 igb_release_hw_control(adapter
);
7437 pci_disable_device(pdev
);
7443 #ifdef CONFIG_PM_SLEEP
7444 static int igb_suspend(struct device
*dev
)
7448 struct pci_dev
*pdev
= to_pci_dev(dev
);
7450 retval
= __igb_shutdown(pdev
, &wake
, 0);
7455 pci_prepare_to_sleep(pdev
);
7457 pci_wake_from_d3(pdev
, false);
7458 pci_set_power_state(pdev
, PCI_D3hot
);
7463 #endif /* CONFIG_PM_SLEEP */
7465 static int igb_resume(struct device
*dev
)
7467 struct pci_dev
*pdev
= to_pci_dev(dev
);
7468 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7469 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7470 struct e1000_hw
*hw
= &adapter
->hw
;
7473 pci_set_power_state(pdev
, PCI_D0
);
7474 pci_restore_state(pdev
);
7475 pci_save_state(pdev
);
7477 err
= pci_enable_device_mem(pdev
);
7480 "igb: Cannot enable PCI device from suspend\n");
7483 pci_set_master(pdev
);
7485 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7486 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7488 if (igb_init_interrupt_scheme(adapter
, true)) {
7489 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7495 /* let the f/w know that the h/w is now under the control of the
7498 igb_get_hw_control(adapter
);
7500 wr32(E1000_WUS
, ~0);
7502 if (netdev
->flags
& IFF_UP
) {
7504 err
= __igb_open(netdev
, true);
7510 netif_device_attach(netdev
);
7514 #ifdef CONFIG_PM_RUNTIME
7515 static int igb_runtime_idle(struct device
*dev
)
7517 struct pci_dev
*pdev
= to_pci_dev(dev
);
7518 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7519 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7521 if (!igb_has_link(adapter
))
7522 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7527 static int igb_runtime_suspend(struct device
*dev
)
7529 struct pci_dev
*pdev
= to_pci_dev(dev
);
7533 retval
= __igb_shutdown(pdev
, &wake
, 1);
7538 pci_prepare_to_sleep(pdev
);
7540 pci_wake_from_d3(pdev
, false);
7541 pci_set_power_state(pdev
, PCI_D3hot
);
7547 static int igb_runtime_resume(struct device
*dev
)
7549 return igb_resume(dev
);
7551 #endif /* CONFIG_PM_RUNTIME */
7554 static void igb_shutdown(struct pci_dev
*pdev
)
7558 __igb_shutdown(pdev
, &wake
, 0);
7560 if (system_state
== SYSTEM_POWER_OFF
) {
7561 pci_wake_from_d3(pdev
, wake
);
7562 pci_set_power_state(pdev
, PCI_D3hot
);
7566 #ifdef CONFIG_PCI_IOV
7567 static int igb_sriov_reinit(struct pci_dev
*dev
)
7569 struct net_device
*netdev
= pci_get_drvdata(dev
);
7570 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7571 struct pci_dev
*pdev
= adapter
->pdev
;
7575 if (netif_running(netdev
))
7578 igb_clear_interrupt_scheme(adapter
);
7580 igb_init_queue_configuration(adapter
);
7582 if (igb_init_interrupt_scheme(adapter
, true)) {
7583 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7587 if (netif_running(netdev
))
7595 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7597 int err
= igb_disable_sriov(dev
);
7600 err
= igb_sriov_reinit(dev
);
7605 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7607 int err
= igb_enable_sriov(dev
, num_vfs
);
7612 err
= igb_sriov_reinit(dev
);
7621 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7623 #ifdef CONFIG_PCI_IOV
7625 return igb_pci_disable_sriov(dev
);
7627 return igb_pci_enable_sriov(dev
, num_vfs
);
7632 #ifdef CONFIG_NET_POLL_CONTROLLER
7633 /* Polling 'interrupt' - used by things like netconsole to send skbs
7634 * without having to re-enable interrupts. It's not called while
7635 * the interrupt routine is executing.
7637 static void igb_netpoll(struct net_device
*netdev
)
7639 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7640 struct e1000_hw
*hw
= &adapter
->hw
;
7641 struct igb_q_vector
*q_vector
;
7644 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7645 q_vector
= adapter
->q_vector
[i
];
7646 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
7647 wr32(E1000_EIMC
, q_vector
->eims_value
);
7649 igb_irq_disable(adapter
);
7650 napi_schedule(&q_vector
->napi
);
7653 #endif /* CONFIG_NET_POLL_CONTROLLER */
7656 * igb_io_error_detected - called when PCI error is detected
7657 * @pdev: Pointer to PCI device
7658 * @state: The current pci connection state
7660 * This function is called after a PCI bus error affecting
7661 * this device has been detected.
7663 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7664 pci_channel_state_t state
)
7666 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7667 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7669 netif_device_detach(netdev
);
7671 if (state
== pci_channel_io_perm_failure
)
7672 return PCI_ERS_RESULT_DISCONNECT
;
7674 if (netif_running(netdev
))
7676 pci_disable_device(pdev
);
7678 /* Request a slot slot reset. */
7679 return PCI_ERS_RESULT_NEED_RESET
;
7683 * igb_io_slot_reset - called after the pci bus has been reset.
7684 * @pdev: Pointer to PCI device
7686 * Restart the card from scratch, as if from a cold-boot. Implementation
7687 * resembles the first-half of the igb_resume routine.
7689 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7691 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7692 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7693 struct e1000_hw
*hw
= &adapter
->hw
;
7694 pci_ers_result_t result
;
7697 if (pci_enable_device_mem(pdev
)) {
7699 "Cannot re-enable PCI device after reset.\n");
7700 result
= PCI_ERS_RESULT_DISCONNECT
;
7702 pci_set_master(pdev
);
7703 pci_restore_state(pdev
);
7704 pci_save_state(pdev
);
7706 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7707 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7710 wr32(E1000_WUS
, ~0);
7711 result
= PCI_ERS_RESULT_RECOVERED
;
7714 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7717 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7719 /* non-fatal, continue */
7726 * igb_io_resume - called when traffic can start flowing again.
7727 * @pdev: Pointer to PCI device
7729 * This callback is called when the error recovery driver tells us that
7730 * its OK to resume normal operation. Implementation resembles the
7731 * second-half of the igb_resume routine.
7733 static void igb_io_resume(struct pci_dev
*pdev
)
7735 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7736 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7738 if (netif_running(netdev
)) {
7739 if (igb_up(adapter
)) {
7740 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7745 netif_device_attach(netdev
);
7747 /* let the f/w know that the h/w is now under the control of the
7750 igb_get_hw_control(adapter
);
7753 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7756 u32 rar_low
, rar_high
;
7757 struct e1000_hw
*hw
= &adapter
->hw
;
7759 /* HW expects these in little endian so we reverse the byte order
7760 * from network order (big endian) to little endian
7762 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7763 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7764 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7766 /* Indicate to hardware the Address is Valid. */
7767 rar_high
|= E1000_RAH_AV
;
7769 if (hw
->mac
.type
== e1000_82575
)
7770 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7772 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7774 wr32(E1000_RAL(index
), rar_low
);
7776 wr32(E1000_RAH(index
), rar_high
);
7780 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7781 int vf
, unsigned char *mac_addr
)
7783 struct e1000_hw
*hw
= &adapter
->hw
;
7784 /* VF MAC addresses start at end of receive addresses and moves
7785 * towards the first, as a result a collision should not be possible
7787 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7789 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7791 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7796 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7798 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7799 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7801 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7802 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7803 dev_info(&adapter
->pdev
->dev
,
7804 "Reload the VF driver to make this change effective.");
7805 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7806 dev_warn(&adapter
->pdev
->dev
,
7807 "The VF MAC address has been set, but the PF device is not up.\n");
7808 dev_warn(&adapter
->pdev
->dev
,
7809 "Bring the PF device up before attempting to use the VF device.\n");
7811 return igb_set_vf_mac(adapter
, vf
, mac
);
7814 static int igb_link_mbps(int internal_link_speed
)
7816 switch (internal_link_speed
) {
7826 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7833 /* Calculate the rate factor values to set */
7834 rf_int
= link_speed
/ tx_rate
;
7835 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7836 rf_dec
= (rf_dec
* (1 << E1000_RTTBCNRC_RF_INT_SHIFT
)) /
7839 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7840 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
7841 E1000_RTTBCNRC_RF_INT_MASK
);
7842 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7847 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7848 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7849 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7851 wr32(E1000_RTTBCNRM
, 0x14);
7852 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7855 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7857 int actual_link_speed
, i
;
7858 bool reset_rate
= false;
7860 /* VF TX rate limit was not set or not supported */
7861 if ((adapter
->vf_rate_link_speed
== 0) ||
7862 (adapter
->hw
.mac
.type
!= e1000_82576
))
7865 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7866 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7868 adapter
->vf_rate_link_speed
= 0;
7869 dev_info(&adapter
->pdev
->dev
,
7870 "Link speed has been changed. VF Transmit rate is disabled\n");
7873 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7875 adapter
->vf_data
[i
].tx_rate
= 0;
7877 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7878 adapter
->vf_data
[i
].tx_rate
,
7883 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
, int tx_rate
)
7885 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7886 struct e1000_hw
*hw
= &adapter
->hw
;
7887 int actual_link_speed
;
7889 if (hw
->mac
.type
!= e1000_82576
)
7892 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7893 if ((vf
>= adapter
->vfs_allocated_count
) ||
7894 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7895 (tx_rate
< 0) || (tx_rate
> actual_link_speed
))
7898 adapter
->vf_rate_link_speed
= actual_link_speed
;
7899 adapter
->vf_data
[vf
].tx_rate
= (u16
)tx_rate
;
7900 igb_set_vf_rate_limit(hw
, vf
, tx_rate
, actual_link_speed
);
7905 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
7908 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7909 struct e1000_hw
*hw
= &adapter
->hw
;
7910 u32 reg_val
, reg_offset
;
7912 if (!adapter
->vfs_allocated_count
)
7915 if (vf
>= adapter
->vfs_allocated_count
)
7918 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
7919 reg_val
= rd32(reg_offset
);
7921 reg_val
|= ((1 << vf
) |
7922 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7924 reg_val
&= ~((1 << vf
) |
7925 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7926 wr32(reg_offset
, reg_val
);
7928 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
7929 return E1000_SUCCESS
;
7932 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7933 int vf
, struct ifla_vf_info
*ivi
)
7935 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7936 if (vf
>= adapter
->vfs_allocated_count
)
7939 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7940 ivi
->tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7941 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7942 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7943 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
7947 static void igb_vmm_control(struct igb_adapter
*adapter
)
7949 struct e1000_hw
*hw
= &adapter
->hw
;
7952 switch (hw
->mac
.type
) {
7958 /* replication is not supported for 82575 */
7961 /* notify HW that the MAC is adding vlan tags */
7962 reg
= rd32(E1000_DTXCTL
);
7963 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7964 wr32(E1000_DTXCTL
, reg
);
7967 /* enable replication vlan tag stripping */
7968 reg
= rd32(E1000_RPLOLR
);
7969 reg
|= E1000_RPLOLR_STRVLAN
;
7970 wr32(E1000_RPLOLR
, reg
);
7973 /* none of the above registers are supported by i350 */
7977 if (adapter
->vfs_allocated_count
) {
7978 igb_vmdq_set_loopback_pf(hw
, true);
7979 igb_vmdq_set_replication_pf(hw
, true);
7980 igb_vmdq_set_anti_spoofing_pf(hw
, true,
7981 adapter
->vfs_allocated_count
);
7983 igb_vmdq_set_loopback_pf(hw
, false);
7984 igb_vmdq_set_replication_pf(hw
, false);
7988 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
7990 struct e1000_hw
*hw
= &adapter
->hw
;
7994 if (hw
->mac
.type
> e1000_82580
) {
7995 if (adapter
->flags
& IGB_FLAG_DMAC
) {
7998 /* force threshold to 0. */
7999 wr32(E1000_DMCTXTH
, 0);
8001 /* DMA Coalescing high water mark needs to be greater
8002 * than the Rx threshold. Set hwm to PBA - max frame
8003 * size in 16B units, capping it at PBA - 6KB.
8005 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
8006 if (hwm
< 64 * (pba
- 6))
8007 hwm
= 64 * (pba
- 6);
8008 reg
= rd32(E1000_FCRTC
);
8009 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
8010 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
8011 & E1000_FCRTC_RTH_COAL_MASK
);
8012 wr32(E1000_FCRTC
, reg
);
8014 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8015 * frame size, capping it at PBA - 10KB.
8017 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
8018 if (dmac_thr
< pba
- 10)
8019 dmac_thr
= pba
- 10;
8020 reg
= rd32(E1000_DMACR
);
8021 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
8022 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
8023 & E1000_DMACR_DMACTHR_MASK
);
8025 /* transition to L0x or L1 if available..*/
8026 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
8028 /* watchdog timer= +-1000 usec in 32usec intervals */
8031 /* Disable BMC-to-OS Watchdog Enable */
8032 if (hw
->mac
.type
!= e1000_i354
)
8033 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
8035 wr32(E1000_DMACR
, reg
);
8037 /* no lower threshold to disable
8038 * coalescing(smart fifb)-UTRESH=0
8040 wr32(E1000_DMCRTRH
, 0);
8042 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
8044 wr32(E1000_DMCTLX
, reg
);
8046 /* free space in tx packet buffer to wake from
8049 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
8050 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
8052 /* make low power state decision controlled
8055 reg
= rd32(E1000_PCIEMISC
);
8056 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
8057 wr32(E1000_PCIEMISC
, reg
);
8058 } /* endif adapter->dmac is not disabled */
8059 } else if (hw
->mac
.type
== e1000_82580
) {
8060 u32 reg
= rd32(E1000_PCIEMISC
);
8062 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
8063 wr32(E1000_DMACR
, 0);
8068 * igb_read_i2c_byte - Reads 8 bit word over I2C
8069 * @hw: pointer to hardware structure
8070 * @byte_offset: byte offset to read
8071 * @dev_addr: device address
8074 * Performs byte read operation over I2C interface at
8075 * a specified device address.
8077 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8078 u8 dev_addr
, u8
*data
)
8080 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8081 struct i2c_client
*this_client
= adapter
->i2c_client
;
8086 return E1000_ERR_I2C
;
8088 swfw_mask
= E1000_SWFW_PHY0_SM
;
8090 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
)
8092 return E1000_ERR_SWFW_SYNC
;
8094 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8095 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8098 return E1000_ERR_I2C
;
8101 return E1000_SUCCESS
;
8106 * igb_write_i2c_byte - Writes 8 bit word over I2C
8107 * @hw: pointer to hardware structure
8108 * @byte_offset: byte offset to write
8109 * @dev_addr: device address
8110 * @data: value to write
8112 * Performs byte write operation over I2C interface at
8113 * a specified device address.
8115 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8116 u8 dev_addr
, u8 data
)
8118 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8119 struct i2c_client
*this_client
= adapter
->i2c_client
;
8121 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8124 return E1000_ERR_I2C
;
8126 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
) != E1000_SUCCESS
)
8127 return E1000_ERR_SWFW_SYNC
;
8128 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8129 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8132 return E1000_ERR_I2C
;
8134 return E1000_SUCCESS
;
8138 int igb_reinit_queues(struct igb_adapter
*adapter
)
8140 struct net_device
*netdev
= adapter
->netdev
;
8141 struct pci_dev
*pdev
= adapter
->pdev
;
8144 if (netif_running(netdev
))
8147 igb_reset_interrupt_capability(adapter
);
8149 if (igb_init_interrupt_scheme(adapter
, true)) {
8150 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8154 if (netif_running(netdev
))
8155 err
= igb_open(netdev
);