1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
54 #include <linux/dca.h>
56 #include <linux/i2c.h>
62 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
63 __stringify(BUILD) "-k"
64 char igb_driver_name
[] = "igb";
65 char igb_driver_version
[] = DRV_VERSION
;
66 static const char igb_driver_string
[] =
67 "Intel(R) Gigabit Ethernet Network Driver";
68 static const char igb_copyright
[] =
69 "Copyright (c) 2007-2014 Intel Corporation.";
71 static const struct e1000_info
*igb_info_tbl
[] = {
72 [board_82575
] = &e1000_82575_info
,
75 static const struct pci_device_id igb_pci_tbl
[] = {
76 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
111 /* required last entry */
115 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
117 static int igb_setup_all_tx_resources(struct igb_adapter
*);
118 static int igb_setup_all_rx_resources(struct igb_adapter
*);
119 static void igb_free_all_tx_resources(struct igb_adapter
*);
120 static void igb_free_all_rx_resources(struct igb_adapter
*);
121 static void igb_setup_mrqc(struct igb_adapter
*);
122 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
123 static void igb_remove(struct pci_dev
*pdev
);
124 static int igb_sw_init(struct igb_adapter
*);
125 static int igb_open(struct net_device
*);
126 static int igb_close(struct net_device
*);
127 static void igb_configure(struct igb_adapter
*);
128 static void igb_configure_tx(struct igb_adapter
*);
129 static void igb_configure_rx(struct igb_adapter
*);
130 static void igb_clean_all_tx_rings(struct igb_adapter
*);
131 static void igb_clean_all_rx_rings(struct igb_adapter
*);
132 static void igb_clean_tx_ring(struct igb_ring
*);
133 static void igb_clean_rx_ring(struct igb_ring
*);
134 static void igb_set_rx_mode(struct net_device
*);
135 static void igb_update_phy_info(unsigned long);
136 static void igb_watchdog(unsigned long);
137 static void igb_watchdog_task(struct work_struct
*);
138 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
139 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*dev
,
140 struct rtnl_link_stats64
*stats
);
141 static int igb_change_mtu(struct net_device
*, int);
142 static int igb_set_mac(struct net_device
*, void *);
143 static void igb_set_uta(struct igb_adapter
*adapter
);
144 static irqreturn_t
igb_intr(int irq
, void *);
145 static irqreturn_t
igb_intr_msi(int irq
, void *);
146 static irqreturn_t
igb_msix_other(int irq
, void *);
147 static irqreturn_t
igb_msix_ring(int irq
, void *);
148 #ifdef CONFIG_IGB_DCA
149 static void igb_update_dca(struct igb_q_vector
*);
150 static void igb_setup_dca(struct igb_adapter
*);
151 #endif /* CONFIG_IGB_DCA */
152 static int igb_poll(struct napi_struct
*, int);
153 static bool igb_clean_tx_irq(struct igb_q_vector
*);
154 static bool igb_clean_rx_irq(struct igb_q_vector
*, int);
155 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
156 static void igb_tx_timeout(struct net_device
*);
157 static void igb_reset_task(struct work_struct
*);
158 static void igb_vlan_mode(struct net_device
*netdev
,
159 netdev_features_t features
);
160 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
161 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
162 static void igb_restore_vlan(struct igb_adapter
*);
163 static void igb_rar_set_qsel(struct igb_adapter
*, u8
*, u32
, u8
);
164 static void igb_ping_all_vfs(struct igb_adapter
*);
165 static void igb_msg_task(struct igb_adapter
*);
166 static void igb_vmm_control(struct igb_adapter
*);
167 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
168 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
169 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
170 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
171 int vf
, u16 vlan
, u8 qos
);
172 static int igb_ndo_set_vf_bw(struct net_device
*, int, int, int);
173 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
175 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
176 struct ifla_vf_info
*ivi
);
177 static void igb_check_vf_rate_limit(struct igb_adapter
*);
179 #ifdef CONFIG_PCI_IOV
180 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
181 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
185 #ifdef CONFIG_PM_SLEEP
186 static int igb_suspend(struct device
*);
188 static int igb_resume(struct device
*);
189 static int igb_runtime_suspend(struct device
*dev
);
190 static int igb_runtime_resume(struct device
*dev
);
191 static int igb_runtime_idle(struct device
*dev
);
192 static const struct dev_pm_ops igb_pm_ops
= {
193 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
194 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
198 static void igb_shutdown(struct pci_dev
*);
199 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
200 #ifdef CONFIG_IGB_DCA
201 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
202 static struct notifier_block dca_notifier
= {
203 .notifier_call
= igb_notify_dca
,
208 #ifdef CONFIG_NET_POLL_CONTROLLER
209 /* for netdump / net console */
210 static void igb_netpoll(struct net_device
*);
212 #ifdef CONFIG_PCI_IOV
213 static unsigned int max_vfs
;
214 module_param(max_vfs
, uint
, 0);
215 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
216 #endif /* CONFIG_PCI_IOV */
218 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
219 pci_channel_state_t
);
220 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
221 static void igb_io_resume(struct pci_dev
*);
223 static const struct pci_error_handlers igb_err_handler
= {
224 .error_detected
= igb_io_error_detected
,
225 .slot_reset
= igb_io_slot_reset
,
226 .resume
= igb_io_resume
,
229 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
231 static struct pci_driver igb_driver
= {
232 .name
= igb_driver_name
,
233 .id_table
= igb_pci_tbl
,
235 .remove
= igb_remove
,
237 .driver
.pm
= &igb_pm_ops
,
239 .shutdown
= igb_shutdown
,
240 .sriov_configure
= igb_pci_sriov_configure
,
241 .err_handler
= &igb_err_handler
244 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
245 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
246 MODULE_LICENSE("GPL");
247 MODULE_VERSION(DRV_VERSION
);
249 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
250 static int debug
= -1;
251 module_param(debug
, int, 0);
252 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
254 struct igb_reg_info
{
259 static const struct igb_reg_info igb_reg_info_tbl
[] = {
261 /* General Registers */
262 {E1000_CTRL
, "CTRL"},
263 {E1000_STATUS
, "STATUS"},
264 {E1000_CTRL_EXT
, "CTRL_EXT"},
266 /* Interrupt Registers */
270 {E1000_RCTL
, "RCTL"},
271 {E1000_RDLEN(0), "RDLEN"},
272 {E1000_RDH(0), "RDH"},
273 {E1000_RDT(0), "RDT"},
274 {E1000_RXDCTL(0), "RXDCTL"},
275 {E1000_RDBAL(0), "RDBAL"},
276 {E1000_RDBAH(0), "RDBAH"},
279 {E1000_TCTL
, "TCTL"},
280 {E1000_TDBAL(0), "TDBAL"},
281 {E1000_TDBAH(0), "TDBAH"},
282 {E1000_TDLEN(0), "TDLEN"},
283 {E1000_TDH(0), "TDH"},
284 {E1000_TDT(0), "TDT"},
285 {E1000_TXDCTL(0), "TXDCTL"},
286 {E1000_TDFH
, "TDFH"},
287 {E1000_TDFT
, "TDFT"},
288 {E1000_TDFHS
, "TDFHS"},
289 {E1000_TDFPC
, "TDFPC"},
291 /* List Terminator */
295 /* igb_regdump - register printout routine */
296 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
302 switch (reginfo
->ofs
) {
304 for (n
= 0; n
< 4; n
++)
305 regs
[n
] = rd32(E1000_RDLEN(n
));
308 for (n
= 0; n
< 4; n
++)
309 regs
[n
] = rd32(E1000_RDH(n
));
312 for (n
= 0; n
< 4; n
++)
313 regs
[n
] = rd32(E1000_RDT(n
));
315 case E1000_RXDCTL(0):
316 for (n
= 0; n
< 4; n
++)
317 regs
[n
] = rd32(E1000_RXDCTL(n
));
320 for (n
= 0; n
< 4; n
++)
321 regs
[n
] = rd32(E1000_RDBAL(n
));
324 for (n
= 0; n
< 4; n
++)
325 regs
[n
] = rd32(E1000_RDBAH(n
));
328 for (n
= 0; n
< 4; n
++)
329 regs
[n
] = rd32(E1000_RDBAL(n
));
332 for (n
= 0; n
< 4; n
++)
333 regs
[n
] = rd32(E1000_TDBAH(n
));
336 for (n
= 0; n
< 4; n
++)
337 regs
[n
] = rd32(E1000_TDLEN(n
));
340 for (n
= 0; n
< 4; n
++)
341 regs
[n
] = rd32(E1000_TDH(n
));
344 for (n
= 0; n
< 4; n
++)
345 regs
[n
] = rd32(E1000_TDT(n
));
347 case E1000_TXDCTL(0):
348 for (n
= 0; n
< 4; n
++)
349 regs
[n
] = rd32(E1000_TXDCTL(n
));
352 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
356 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
357 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
361 /* igb_dump - Print registers, Tx-rings and Rx-rings */
362 static void igb_dump(struct igb_adapter
*adapter
)
364 struct net_device
*netdev
= adapter
->netdev
;
365 struct e1000_hw
*hw
= &adapter
->hw
;
366 struct igb_reg_info
*reginfo
;
367 struct igb_ring
*tx_ring
;
368 union e1000_adv_tx_desc
*tx_desc
;
369 struct my_u0
{ u64 a
; u64 b
; } *u0
;
370 struct igb_ring
*rx_ring
;
371 union e1000_adv_rx_desc
*rx_desc
;
375 if (!netif_msg_hw(adapter
))
378 /* Print netdevice Info */
380 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
381 pr_info("Device Name state trans_start last_rx\n");
382 pr_info("%-15s %016lX %016lX %016lX\n", netdev
->name
,
383 netdev
->state
, netdev
->trans_start
, netdev
->last_rx
);
386 /* Print Registers */
387 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
388 pr_info(" Register Name Value\n");
389 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
390 reginfo
->name
; reginfo
++) {
391 igb_regdump(hw
, reginfo
);
394 /* Print TX Ring Summary */
395 if (!netdev
|| !netif_running(netdev
))
398 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
399 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
400 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
401 struct igb_tx_buffer
*buffer_info
;
402 tx_ring
= adapter
->tx_ring
[n
];
403 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
404 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
405 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
406 (u64
)dma_unmap_addr(buffer_info
, dma
),
407 dma_unmap_len(buffer_info
, len
),
408 buffer_info
->next_to_watch
,
409 (u64
)buffer_info
->time_stamp
);
413 if (!netif_msg_tx_done(adapter
))
414 goto rx_ring_summary
;
416 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
418 /* Transmit Descriptor Formats
420 * Advanced Transmit Descriptor
421 * +--------------------------------------------------------------+
422 * 0 | Buffer Address [63:0] |
423 * +--------------------------------------------------------------+
424 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
425 * +--------------------------------------------------------------+
426 * 63 46 45 40 39 38 36 35 32 31 24 15 0
429 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
430 tx_ring
= adapter
->tx_ring
[n
];
431 pr_info("------------------------------------\n");
432 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
433 pr_info("------------------------------------\n");
434 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
436 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
437 const char *next_desc
;
438 struct igb_tx_buffer
*buffer_info
;
439 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
440 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
441 u0
= (struct my_u0
*)tx_desc
;
442 if (i
== tx_ring
->next_to_use
&&
443 i
== tx_ring
->next_to_clean
)
444 next_desc
= " NTC/U";
445 else if (i
== tx_ring
->next_to_use
)
447 else if (i
== tx_ring
->next_to_clean
)
452 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
453 i
, le64_to_cpu(u0
->a
),
455 (u64
)dma_unmap_addr(buffer_info
, dma
),
456 dma_unmap_len(buffer_info
, len
),
457 buffer_info
->next_to_watch
,
458 (u64
)buffer_info
->time_stamp
,
459 buffer_info
->skb
, next_desc
);
461 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
462 print_hex_dump(KERN_INFO
, "",
464 16, 1, buffer_info
->skb
->data
,
465 dma_unmap_len(buffer_info
, len
),
470 /* Print RX Rings Summary */
472 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
473 pr_info("Queue [NTU] [NTC]\n");
474 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
475 rx_ring
= adapter
->rx_ring
[n
];
476 pr_info(" %5d %5X %5X\n",
477 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
481 if (!netif_msg_rx_status(adapter
))
484 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
486 /* Advanced Receive Descriptor (Read) Format
488 * +-----------------------------------------------------+
489 * 0 | Packet Buffer Address [63:1] |A0/NSE|
490 * +----------------------------------------------+------+
491 * 8 | Header Buffer Address [63:1] | DD |
492 * +-----------------------------------------------------+
495 * Advanced Receive Descriptor (Write-Back) Format
497 * 63 48 47 32 31 30 21 20 17 16 4 3 0
498 * +------------------------------------------------------+
499 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
500 * | Checksum Ident | | | | Type | Type |
501 * +------------------------------------------------------+
502 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
503 * +------------------------------------------------------+
504 * 63 48 47 32 31 20 19 0
507 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
508 rx_ring
= adapter
->rx_ring
[n
];
509 pr_info("------------------------------------\n");
510 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
511 pr_info("------------------------------------\n");
512 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
513 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
515 for (i
= 0; i
< rx_ring
->count
; i
++) {
516 const char *next_desc
;
517 struct igb_rx_buffer
*buffer_info
;
518 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
519 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
520 u0
= (struct my_u0
*)rx_desc
;
521 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
523 if (i
== rx_ring
->next_to_use
)
525 else if (i
== rx_ring
->next_to_clean
)
530 if (staterr
& E1000_RXD_STAT_DD
) {
531 /* Descriptor Done */
532 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
538 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
542 (u64
)buffer_info
->dma
,
545 if (netif_msg_pktdata(adapter
) &&
546 buffer_info
->dma
&& buffer_info
->page
) {
547 print_hex_dump(KERN_INFO
, "",
550 page_address(buffer_info
->page
) +
551 buffer_info
->page_offset
,
563 * igb_get_i2c_data - Reads the I2C SDA data bit
564 * @hw: pointer to hardware structure
565 * @i2cctl: Current value of I2CCTL register
567 * Returns the I2C data bit value
569 static int igb_get_i2c_data(void *data
)
571 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
572 struct e1000_hw
*hw
= &adapter
->hw
;
573 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
575 return !!(i2cctl
& E1000_I2C_DATA_IN
);
579 * igb_set_i2c_data - Sets the I2C data bit
580 * @data: pointer to hardware structure
581 * @state: I2C data value (0 or 1) to set
583 * Sets the I2C data bit
585 static void igb_set_i2c_data(void *data
, int state
)
587 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
588 struct e1000_hw
*hw
= &adapter
->hw
;
589 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
592 i2cctl
|= E1000_I2C_DATA_OUT
;
594 i2cctl
&= ~E1000_I2C_DATA_OUT
;
596 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
597 i2cctl
|= E1000_I2C_CLK_OE_N
;
598 wr32(E1000_I2CPARAMS
, i2cctl
);
604 * igb_set_i2c_clk - Sets the I2C SCL clock
605 * @data: pointer to hardware structure
606 * @state: state to set clock
608 * Sets the I2C clock line to state
610 static void igb_set_i2c_clk(void *data
, int state
)
612 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
613 struct e1000_hw
*hw
= &adapter
->hw
;
614 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
617 i2cctl
|= E1000_I2C_CLK_OUT
;
618 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
620 i2cctl
&= ~E1000_I2C_CLK_OUT
;
621 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
623 wr32(E1000_I2CPARAMS
, i2cctl
);
628 * igb_get_i2c_clk - Gets the I2C SCL clock state
629 * @data: pointer to hardware structure
631 * Gets the I2C clock state
633 static int igb_get_i2c_clk(void *data
)
635 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
636 struct e1000_hw
*hw
= &adapter
->hw
;
637 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
639 return !!(i2cctl
& E1000_I2C_CLK_IN
);
642 static const struct i2c_algo_bit_data igb_i2c_algo
= {
643 .setsda
= igb_set_i2c_data
,
644 .setscl
= igb_set_i2c_clk
,
645 .getsda
= igb_get_i2c_data
,
646 .getscl
= igb_get_i2c_clk
,
652 * igb_get_hw_dev - return device
653 * @hw: pointer to hardware structure
655 * used by hardware layer to print debugging information
657 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
659 struct igb_adapter
*adapter
= hw
->back
;
660 return adapter
->netdev
;
664 * igb_init_module - Driver Registration Routine
666 * igb_init_module is the first routine called when the driver is
667 * loaded. All it does is register with the PCI subsystem.
669 static int __init
igb_init_module(void)
673 pr_info("%s - version %s\n",
674 igb_driver_string
, igb_driver_version
);
675 pr_info("%s\n", igb_copyright
);
677 #ifdef CONFIG_IGB_DCA
678 dca_register_notify(&dca_notifier
);
680 ret
= pci_register_driver(&igb_driver
);
684 module_init(igb_init_module
);
687 * igb_exit_module - Driver Exit Cleanup Routine
689 * igb_exit_module is called just before the driver is removed
692 static void __exit
igb_exit_module(void)
694 #ifdef CONFIG_IGB_DCA
695 dca_unregister_notify(&dca_notifier
);
697 pci_unregister_driver(&igb_driver
);
700 module_exit(igb_exit_module
);
702 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
704 * igb_cache_ring_register - Descriptor ring to register mapping
705 * @adapter: board private structure to initialize
707 * Once we know the feature-set enabled for the device, we'll cache
708 * the register offset the descriptor ring is assigned to.
710 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
713 u32 rbase_offset
= adapter
->vfs_allocated_count
;
715 switch (adapter
->hw
.mac
.type
) {
717 /* The queues are allocated for virtualization such that VF 0
718 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
719 * In order to avoid collision we start at the first free queue
720 * and continue consuming queues in the same sequence
722 if (adapter
->vfs_allocated_count
) {
723 for (; i
< adapter
->rss_queues
; i
++)
724 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
736 for (; i
< adapter
->num_rx_queues
; i
++)
737 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
738 for (; j
< adapter
->num_tx_queues
; j
++)
739 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
744 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
746 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
747 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
750 if (E1000_REMOVED(hw_addr
))
753 value
= readl(&hw_addr
[reg
]);
755 /* reads should not return all F's */
756 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
757 struct net_device
*netdev
= igb
->netdev
;
759 netif_device_detach(netdev
);
760 netdev_err(netdev
, "PCIe link lost, device now detached\n");
767 * igb_write_ivar - configure ivar for given MSI-X vector
768 * @hw: pointer to the HW structure
769 * @msix_vector: vector number we are allocating to a given ring
770 * @index: row index of IVAR register to write within IVAR table
771 * @offset: column offset of in IVAR, should be multiple of 8
773 * This function is intended to handle the writing of the IVAR register
774 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
775 * each containing an cause allocation for an Rx and Tx ring, and a
776 * variable number of rows depending on the number of queues supported.
778 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
779 int index
, int offset
)
781 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
783 /* clear any bits that are currently set */
784 ivar
&= ~((u32
)0xFF << offset
);
786 /* write vector and valid bit */
787 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
789 array_wr32(E1000_IVAR0
, index
, ivar
);
792 #define IGB_N0_QUEUE -1
793 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
795 struct igb_adapter
*adapter
= q_vector
->adapter
;
796 struct e1000_hw
*hw
= &adapter
->hw
;
797 int rx_queue
= IGB_N0_QUEUE
;
798 int tx_queue
= IGB_N0_QUEUE
;
801 if (q_vector
->rx
.ring
)
802 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
803 if (q_vector
->tx
.ring
)
804 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
806 switch (hw
->mac
.type
) {
808 /* The 82575 assigns vectors using a bitmask, which matches the
809 * bitmask for the EICR/EIMS/EIMC registers. To assign one
810 * or more queues to a vector, we write the appropriate bits
811 * into the MSIXBM register for that vector.
813 if (rx_queue
> IGB_N0_QUEUE
)
814 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
815 if (tx_queue
> IGB_N0_QUEUE
)
816 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
817 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
818 msixbm
|= E1000_EIMS_OTHER
;
819 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
820 q_vector
->eims_value
= msixbm
;
823 /* 82576 uses a table that essentially consists of 2 columns
824 * with 8 rows. The ordering is column-major so we use the
825 * lower 3 bits as the row index, and the 4th bit as the
828 if (rx_queue
> IGB_N0_QUEUE
)
829 igb_write_ivar(hw
, msix_vector
,
831 (rx_queue
& 0x8) << 1);
832 if (tx_queue
> IGB_N0_QUEUE
)
833 igb_write_ivar(hw
, msix_vector
,
835 ((tx_queue
& 0x8) << 1) + 8);
836 q_vector
->eims_value
= 1 << msix_vector
;
843 /* On 82580 and newer adapters the scheme is similar to 82576
844 * however instead of ordering column-major we have things
845 * ordered row-major. So we traverse the table by using
846 * bit 0 as the column offset, and the remaining bits as the
849 if (rx_queue
> IGB_N0_QUEUE
)
850 igb_write_ivar(hw
, msix_vector
,
852 (rx_queue
& 0x1) << 4);
853 if (tx_queue
> IGB_N0_QUEUE
)
854 igb_write_ivar(hw
, msix_vector
,
856 ((tx_queue
& 0x1) << 4) + 8);
857 q_vector
->eims_value
= 1 << msix_vector
;
864 /* add q_vector eims value to global eims_enable_mask */
865 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
867 /* configure q_vector to set itr on first interrupt */
868 q_vector
->set_itr
= 1;
872 * igb_configure_msix - Configure MSI-X hardware
873 * @adapter: board private structure to initialize
875 * igb_configure_msix sets up the hardware to properly
876 * generate MSI-X interrupts.
878 static void igb_configure_msix(struct igb_adapter
*adapter
)
882 struct e1000_hw
*hw
= &adapter
->hw
;
884 adapter
->eims_enable_mask
= 0;
886 /* set vector for other causes, i.e. link changes */
887 switch (hw
->mac
.type
) {
889 tmp
= rd32(E1000_CTRL_EXT
);
890 /* enable MSI-X PBA support*/
891 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
893 /* Auto-Mask interrupts upon ICR read. */
894 tmp
|= E1000_CTRL_EXT_EIAME
;
895 tmp
|= E1000_CTRL_EXT_IRCA
;
897 wr32(E1000_CTRL_EXT
, tmp
);
899 /* enable msix_other interrupt */
900 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
901 adapter
->eims_other
= E1000_EIMS_OTHER
;
911 /* Turn on MSI-X capability first, or our settings
912 * won't stick. And it will take days to debug.
914 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
915 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
918 /* enable msix_other interrupt */
919 adapter
->eims_other
= 1 << vector
;
920 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
922 wr32(E1000_IVAR_MISC
, tmp
);
925 /* do nothing, since nothing else supports MSI-X */
927 } /* switch (hw->mac.type) */
929 adapter
->eims_enable_mask
|= adapter
->eims_other
;
931 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
932 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
938 * igb_request_msix - Initialize MSI-X interrupts
939 * @adapter: board private structure to initialize
941 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
944 static int igb_request_msix(struct igb_adapter
*adapter
)
946 struct net_device
*netdev
= adapter
->netdev
;
947 struct e1000_hw
*hw
= &adapter
->hw
;
948 int i
, err
= 0, vector
= 0, free_vector
= 0;
950 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
951 igb_msix_other
, 0, netdev
->name
, adapter
);
955 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
956 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
960 q_vector
->itr_register
= hw
->hw_addr
+ E1000_EITR(vector
);
962 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
963 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
964 q_vector
->rx
.ring
->queue_index
);
965 else if (q_vector
->tx
.ring
)
966 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
967 q_vector
->tx
.ring
->queue_index
);
968 else if (q_vector
->rx
.ring
)
969 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
970 q_vector
->rx
.ring
->queue_index
);
972 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
974 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
975 igb_msix_ring
, 0, q_vector
->name
,
981 igb_configure_msix(adapter
);
985 /* free already assigned IRQs */
986 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
989 for (i
= 0; i
< vector
; i
++) {
990 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
991 adapter
->q_vector
[i
]);
998 * igb_free_q_vector - Free memory allocated for specific interrupt vector
999 * @adapter: board private structure to initialize
1000 * @v_idx: Index of vector to be freed
1002 * This function frees the memory allocated to the q_vector.
1004 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1006 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1008 adapter
->q_vector
[v_idx
] = NULL
;
1010 /* igb_get_stats64() might access the rings on this vector,
1011 * we must wait a grace period before freeing it.
1014 kfree_rcu(q_vector
, rcu
);
1018 * igb_reset_q_vector - Reset config for interrupt vector
1019 * @adapter: board private structure to initialize
1020 * @v_idx: Index of vector to be reset
1022 * If NAPI is enabled it will delete any references to the
1023 * NAPI struct. This is preparation for igb_free_q_vector.
1025 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1027 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1029 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1030 * allocated. So, q_vector is NULL so we should stop here.
1035 if (q_vector
->tx
.ring
)
1036 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1038 if (q_vector
->rx
.ring
)
1039 adapter
->rx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1041 netif_napi_del(&q_vector
->napi
);
1045 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1047 int v_idx
= adapter
->num_q_vectors
;
1049 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1050 pci_disable_msix(adapter
->pdev
);
1051 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1052 pci_disable_msi(adapter
->pdev
);
1055 igb_reset_q_vector(adapter
, v_idx
);
1059 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1060 * @adapter: board private structure to initialize
1062 * This function frees the memory allocated to the q_vectors. In addition if
1063 * NAPI is enabled it will delete any references to the NAPI struct prior
1064 * to freeing the q_vector.
1066 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1068 int v_idx
= adapter
->num_q_vectors
;
1070 adapter
->num_tx_queues
= 0;
1071 adapter
->num_rx_queues
= 0;
1072 adapter
->num_q_vectors
= 0;
1075 igb_reset_q_vector(adapter
, v_idx
);
1076 igb_free_q_vector(adapter
, v_idx
);
1081 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1082 * @adapter: board private structure to initialize
1084 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1085 * MSI-X interrupts allocated.
1087 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1089 igb_free_q_vectors(adapter
);
1090 igb_reset_interrupt_capability(adapter
);
1094 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1095 * @adapter: board private structure to initialize
1096 * @msix: boolean value of MSIX capability
1098 * Attempt to configure interrupts using the best available
1099 * capabilities of the hardware and kernel.
1101 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1108 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1110 /* Number of supported queues. */
1111 adapter
->num_rx_queues
= adapter
->rss_queues
;
1112 if (adapter
->vfs_allocated_count
)
1113 adapter
->num_tx_queues
= 1;
1115 adapter
->num_tx_queues
= adapter
->rss_queues
;
1117 /* start with one vector for every Rx queue */
1118 numvecs
= adapter
->num_rx_queues
;
1120 /* if Tx handler is separate add 1 for every Tx queue */
1121 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1122 numvecs
+= adapter
->num_tx_queues
;
1124 /* store the number of vectors reserved for queues */
1125 adapter
->num_q_vectors
= numvecs
;
1127 /* add 1 vector for link status interrupts */
1129 for (i
= 0; i
< numvecs
; i
++)
1130 adapter
->msix_entries
[i
].entry
= i
;
1132 err
= pci_enable_msix_range(adapter
->pdev
,
1133 adapter
->msix_entries
,
1139 igb_reset_interrupt_capability(adapter
);
1141 /* If we can't do MSI-X, try MSI */
1143 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1144 #ifdef CONFIG_PCI_IOV
1145 /* disable SR-IOV for non MSI-X configurations */
1146 if (adapter
->vf_data
) {
1147 struct e1000_hw
*hw
= &adapter
->hw
;
1148 /* disable iov and allow time for transactions to clear */
1149 pci_disable_sriov(adapter
->pdev
);
1152 kfree(adapter
->vf_data
);
1153 adapter
->vf_data
= NULL
;
1154 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1157 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1160 adapter
->vfs_allocated_count
= 0;
1161 adapter
->rss_queues
= 1;
1162 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1163 adapter
->num_rx_queues
= 1;
1164 adapter
->num_tx_queues
= 1;
1165 adapter
->num_q_vectors
= 1;
1166 if (!pci_enable_msi(adapter
->pdev
))
1167 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1170 static void igb_add_ring(struct igb_ring
*ring
,
1171 struct igb_ring_container
*head
)
1178 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1179 * @adapter: board private structure to initialize
1180 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1181 * @v_idx: index of vector in adapter struct
1182 * @txr_count: total number of Tx rings to allocate
1183 * @txr_idx: index of first Tx ring to allocate
1184 * @rxr_count: total number of Rx rings to allocate
1185 * @rxr_idx: index of first Rx ring to allocate
1187 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1189 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1190 int v_count
, int v_idx
,
1191 int txr_count
, int txr_idx
,
1192 int rxr_count
, int rxr_idx
)
1194 struct igb_q_vector
*q_vector
;
1195 struct igb_ring
*ring
;
1196 int ring_count
, size
;
1198 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1199 if (txr_count
> 1 || rxr_count
> 1)
1202 ring_count
= txr_count
+ rxr_count
;
1203 size
= sizeof(struct igb_q_vector
) +
1204 (sizeof(struct igb_ring
) * ring_count
);
1206 /* allocate q_vector and rings */
1207 q_vector
= adapter
->q_vector
[v_idx
];
1209 q_vector
= kzalloc(size
, GFP_KERNEL
);
1210 } else if (size
> ksize(q_vector
)) {
1211 kfree_rcu(q_vector
, rcu
);
1212 q_vector
= kzalloc(size
, GFP_KERNEL
);
1214 memset(q_vector
, 0, size
);
1219 /* initialize NAPI */
1220 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1223 /* tie q_vector and adapter together */
1224 adapter
->q_vector
[v_idx
] = q_vector
;
1225 q_vector
->adapter
= adapter
;
1227 /* initialize work limits */
1228 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1230 /* initialize ITR configuration */
1231 q_vector
->itr_register
= adapter
->hw
.hw_addr
+ E1000_EITR(0);
1232 q_vector
->itr_val
= IGB_START_ITR
;
1234 /* initialize pointer to rings */
1235 ring
= q_vector
->ring
;
1239 /* rx or rx/tx vector */
1240 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1241 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1243 /* tx only vector */
1244 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1245 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1249 /* assign generic ring traits */
1250 ring
->dev
= &adapter
->pdev
->dev
;
1251 ring
->netdev
= adapter
->netdev
;
1253 /* configure backlink on ring */
1254 ring
->q_vector
= q_vector
;
1256 /* update q_vector Tx values */
1257 igb_add_ring(ring
, &q_vector
->tx
);
1259 /* For 82575, context index must be unique per ring. */
1260 if (adapter
->hw
.mac
.type
== e1000_82575
)
1261 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1263 /* apply Tx specific ring traits */
1264 ring
->count
= adapter
->tx_ring_count
;
1265 ring
->queue_index
= txr_idx
;
1267 u64_stats_init(&ring
->tx_syncp
);
1268 u64_stats_init(&ring
->tx_syncp2
);
1270 /* assign ring to adapter */
1271 adapter
->tx_ring
[txr_idx
] = ring
;
1273 /* push pointer to next ring */
1278 /* assign generic ring traits */
1279 ring
->dev
= &adapter
->pdev
->dev
;
1280 ring
->netdev
= adapter
->netdev
;
1282 /* configure backlink on ring */
1283 ring
->q_vector
= q_vector
;
1285 /* update q_vector Rx values */
1286 igb_add_ring(ring
, &q_vector
->rx
);
1288 /* set flag indicating ring supports SCTP checksum offload */
1289 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1290 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1292 /* On i350, i354, i210, and i211, loopback VLAN packets
1293 * have the tag byte-swapped.
1295 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1296 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1298 /* apply Rx specific ring traits */
1299 ring
->count
= adapter
->rx_ring_count
;
1300 ring
->queue_index
= rxr_idx
;
1302 u64_stats_init(&ring
->rx_syncp
);
1304 /* assign ring to adapter */
1305 adapter
->rx_ring
[rxr_idx
] = ring
;
1313 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1314 * @adapter: board private structure to initialize
1316 * We allocate one q_vector per queue interrupt. If allocation fails we
1319 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1321 int q_vectors
= adapter
->num_q_vectors
;
1322 int rxr_remaining
= adapter
->num_rx_queues
;
1323 int txr_remaining
= adapter
->num_tx_queues
;
1324 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1327 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1328 for (; rxr_remaining
; v_idx
++) {
1329 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1335 /* update counts and index */
1341 for (; v_idx
< q_vectors
; v_idx
++) {
1342 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1343 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1345 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1346 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1351 /* update counts and index */
1352 rxr_remaining
-= rqpv
;
1353 txr_remaining
-= tqpv
;
1361 adapter
->num_tx_queues
= 0;
1362 adapter
->num_rx_queues
= 0;
1363 adapter
->num_q_vectors
= 0;
1366 igb_free_q_vector(adapter
, v_idx
);
1372 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1373 * @adapter: board private structure to initialize
1374 * @msix: boolean value of MSIX capability
1376 * This function initializes the interrupts and allocates all of the queues.
1378 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1380 struct pci_dev
*pdev
= adapter
->pdev
;
1383 igb_set_interrupt_capability(adapter
, msix
);
1385 err
= igb_alloc_q_vectors(adapter
);
1387 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1388 goto err_alloc_q_vectors
;
1391 igb_cache_ring_register(adapter
);
1395 err_alloc_q_vectors
:
1396 igb_reset_interrupt_capability(adapter
);
1401 * igb_request_irq - initialize interrupts
1402 * @adapter: board private structure to initialize
1404 * Attempts to configure interrupts using the best available
1405 * capabilities of the hardware and kernel.
1407 static int igb_request_irq(struct igb_adapter
*adapter
)
1409 struct net_device
*netdev
= adapter
->netdev
;
1410 struct pci_dev
*pdev
= adapter
->pdev
;
1413 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1414 err
= igb_request_msix(adapter
);
1417 /* fall back to MSI */
1418 igb_free_all_tx_resources(adapter
);
1419 igb_free_all_rx_resources(adapter
);
1421 igb_clear_interrupt_scheme(adapter
);
1422 err
= igb_init_interrupt_scheme(adapter
, false);
1426 igb_setup_all_tx_resources(adapter
);
1427 igb_setup_all_rx_resources(adapter
);
1428 igb_configure(adapter
);
1431 igb_assign_vector(adapter
->q_vector
[0], 0);
1433 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1434 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1435 netdev
->name
, adapter
);
1439 /* fall back to legacy interrupts */
1440 igb_reset_interrupt_capability(adapter
);
1441 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1444 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1445 netdev
->name
, adapter
);
1448 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1455 static void igb_free_irq(struct igb_adapter
*adapter
)
1457 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1460 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1462 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1463 free_irq(adapter
->msix_entries
[vector
++].vector
,
1464 adapter
->q_vector
[i
]);
1466 free_irq(adapter
->pdev
->irq
, adapter
);
1471 * igb_irq_disable - Mask off interrupt generation on the NIC
1472 * @adapter: board private structure
1474 static void igb_irq_disable(struct igb_adapter
*adapter
)
1476 struct e1000_hw
*hw
= &adapter
->hw
;
1478 /* we need to be careful when disabling interrupts. The VFs are also
1479 * mapped into these registers and so clearing the bits can cause
1480 * issues on the VF drivers so we only need to clear what we set
1482 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1483 u32 regval
= rd32(E1000_EIAM
);
1485 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1486 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1487 regval
= rd32(E1000_EIAC
);
1488 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1492 wr32(E1000_IMC
, ~0);
1494 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1497 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1498 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1500 synchronize_irq(adapter
->pdev
->irq
);
1505 * igb_irq_enable - Enable default interrupt generation settings
1506 * @adapter: board private structure
1508 static void igb_irq_enable(struct igb_adapter
*adapter
)
1510 struct e1000_hw
*hw
= &adapter
->hw
;
1512 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1513 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1514 u32 regval
= rd32(E1000_EIAC
);
1516 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1517 regval
= rd32(E1000_EIAM
);
1518 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1519 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1520 if (adapter
->vfs_allocated_count
) {
1521 wr32(E1000_MBVFIMR
, 0xFF);
1522 ims
|= E1000_IMS_VMMB
;
1524 wr32(E1000_IMS
, ims
);
1526 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1528 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1533 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1535 struct e1000_hw
*hw
= &adapter
->hw
;
1536 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1537 u16 old_vid
= adapter
->mng_vlan_id
;
1539 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1540 /* add VID to filter table */
1541 igb_vfta_set(hw
, vid
, true);
1542 adapter
->mng_vlan_id
= vid
;
1544 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1547 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1549 !test_bit(old_vid
, adapter
->active_vlans
)) {
1550 /* remove VID from filter table */
1551 igb_vfta_set(hw
, old_vid
, false);
1556 * igb_release_hw_control - release control of the h/w to f/w
1557 * @adapter: address of board private structure
1559 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1560 * For ASF and Pass Through versions of f/w this means that the
1561 * driver is no longer loaded.
1563 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1565 struct e1000_hw
*hw
= &adapter
->hw
;
1568 /* Let firmware take over control of h/w */
1569 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1570 wr32(E1000_CTRL_EXT
,
1571 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1575 * igb_get_hw_control - get control of the h/w from f/w
1576 * @adapter: address of board private structure
1578 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1579 * For ASF and Pass Through versions of f/w this means that
1580 * the driver is loaded.
1582 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1584 struct e1000_hw
*hw
= &adapter
->hw
;
1587 /* Let firmware know the driver has taken over */
1588 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1589 wr32(E1000_CTRL_EXT
,
1590 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1594 * igb_configure - configure the hardware for RX and TX
1595 * @adapter: private board structure
1597 static void igb_configure(struct igb_adapter
*adapter
)
1599 struct net_device
*netdev
= adapter
->netdev
;
1602 igb_get_hw_control(adapter
);
1603 igb_set_rx_mode(netdev
);
1605 igb_restore_vlan(adapter
);
1607 igb_setup_tctl(adapter
);
1608 igb_setup_mrqc(adapter
);
1609 igb_setup_rctl(adapter
);
1611 igb_configure_tx(adapter
);
1612 igb_configure_rx(adapter
);
1614 igb_rx_fifo_flush_82575(&adapter
->hw
);
1616 /* call igb_desc_unused which always leaves
1617 * at least 1 descriptor unused to make sure
1618 * next_to_use != next_to_clean
1620 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1621 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1622 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1627 * igb_power_up_link - Power up the phy/serdes link
1628 * @adapter: address of board private structure
1630 void igb_power_up_link(struct igb_adapter
*adapter
)
1632 igb_reset_phy(&adapter
->hw
);
1634 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1635 igb_power_up_phy_copper(&adapter
->hw
);
1637 igb_power_up_serdes_link_82575(&adapter
->hw
);
1639 igb_setup_link(&adapter
->hw
);
1643 * igb_power_down_link - Power down the phy/serdes link
1644 * @adapter: address of board private structure
1646 static void igb_power_down_link(struct igb_adapter
*adapter
)
1648 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1649 igb_power_down_phy_copper_82575(&adapter
->hw
);
1651 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1655 * Detect and switch function for Media Auto Sense
1656 * @adapter: address of the board private structure
1658 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1660 struct e1000_hw
*hw
= &adapter
->hw
;
1661 u32 ctrl_ext
, connsw
;
1662 bool swap_now
= false;
1664 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1665 connsw
= rd32(E1000_CONNSW
);
1667 /* need to live swap if current media is copper and we have fiber/serdes
1671 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1672 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1674 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1675 /* copper signal takes time to appear */
1676 if (adapter
->copper_tries
< 4) {
1677 adapter
->copper_tries
++;
1678 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1679 wr32(E1000_CONNSW
, connsw
);
1682 adapter
->copper_tries
= 0;
1683 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1684 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1686 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1687 wr32(E1000_CONNSW
, connsw
);
1695 switch (hw
->phy
.media_type
) {
1696 case e1000_media_type_copper
:
1697 netdev_info(adapter
->netdev
,
1698 "MAS: changing media to fiber/serdes\n");
1700 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1701 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1702 adapter
->copper_tries
= 0;
1704 case e1000_media_type_internal_serdes
:
1705 case e1000_media_type_fiber
:
1706 netdev_info(adapter
->netdev
,
1707 "MAS: changing media to copper\n");
1709 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1710 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1713 /* shouldn't get here during regular operation */
1714 netdev_err(adapter
->netdev
,
1715 "AMS: Invalid media type found, returning\n");
1718 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1722 * igb_up - Open the interface and prepare it to handle traffic
1723 * @adapter: board private structure
1725 int igb_up(struct igb_adapter
*adapter
)
1727 struct e1000_hw
*hw
= &adapter
->hw
;
1730 /* hardware has been reset, we need to reload some things */
1731 igb_configure(adapter
);
1733 clear_bit(__IGB_DOWN
, &adapter
->state
);
1735 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1736 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1738 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1739 igb_configure_msix(adapter
);
1741 igb_assign_vector(adapter
->q_vector
[0], 0);
1743 /* Clear any pending interrupts. */
1745 igb_irq_enable(adapter
);
1747 /* notify VFs that reset has been completed */
1748 if (adapter
->vfs_allocated_count
) {
1749 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1751 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1752 wr32(E1000_CTRL_EXT
, reg_data
);
1755 netif_tx_start_all_queues(adapter
->netdev
);
1757 /* start the watchdog. */
1758 hw
->mac
.get_link_status
= 1;
1759 schedule_work(&adapter
->watchdog_task
);
1761 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1762 (!hw
->dev_spec
._82575
.eee_disable
))
1763 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1768 void igb_down(struct igb_adapter
*adapter
)
1770 struct net_device
*netdev
= adapter
->netdev
;
1771 struct e1000_hw
*hw
= &adapter
->hw
;
1775 /* signal that we're down so the interrupt handler does not
1776 * reschedule our watchdog timer
1778 set_bit(__IGB_DOWN
, &adapter
->state
);
1780 /* disable receives in the hardware */
1781 rctl
= rd32(E1000_RCTL
);
1782 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1783 /* flush and sleep below */
1785 netif_carrier_off(netdev
);
1786 netif_tx_stop_all_queues(netdev
);
1788 /* disable transmits in the hardware */
1789 tctl
= rd32(E1000_TCTL
);
1790 tctl
&= ~E1000_TCTL_EN
;
1791 wr32(E1000_TCTL
, tctl
);
1792 /* flush both disables and wait for them to finish */
1794 usleep_range(10000, 11000);
1796 igb_irq_disable(adapter
);
1798 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1800 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1801 if (adapter
->q_vector
[i
]) {
1802 napi_synchronize(&adapter
->q_vector
[i
]->napi
);
1803 napi_disable(&adapter
->q_vector
[i
]->napi
);
1807 del_timer_sync(&adapter
->watchdog_timer
);
1808 del_timer_sync(&adapter
->phy_info_timer
);
1810 /* record the stats before reset*/
1811 spin_lock(&adapter
->stats64_lock
);
1812 igb_update_stats(adapter
, &adapter
->stats64
);
1813 spin_unlock(&adapter
->stats64_lock
);
1815 adapter
->link_speed
= 0;
1816 adapter
->link_duplex
= 0;
1818 if (!pci_channel_offline(adapter
->pdev
))
1820 igb_clean_all_tx_rings(adapter
);
1821 igb_clean_all_rx_rings(adapter
);
1822 #ifdef CONFIG_IGB_DCA
1824 /* since we reset the hardware DCA settings were cleared */
1825 igb_setup_dca(adapter
);
1829 void igb_reinit_locked(struct igb_adapter
*adapter
)
1831 WARN_ON(in_interrupt());
1832 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1833 usleep_range(1000, 2000);
1836 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1839 /** igb_enable_mas - Media Autosense re-enable after swap
1841 * @adapter: adapter struct
1843 static void igb_enable_mas(struct igb_adapter
*adapter
)
1845 struct e1000_hw
*hw
= &adapter
->hw
;
1846 u32 connsw
= rd32(E1000_CONNSW
);
1848 /* configure for SerDes media detect */
1849 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1850 (!(connsw
& E1000_CONNSW_SERDESD
))) {
1851 connsw
|= E1000_CONNSW_ENRGSRC
;
1852 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1853 wr32(E1000_CONNSW
, connsw
);
1858 void igb_reset(struct igb_adapter
*adapter
)
1860 struct pci_dev
*pdev
= adapter
->pdev
;
1861 struct e1000_hw
*hw
= &adapter
->hw
;
1862 struct e1000_mac_info
*mac
= &hw
->mac
;
1863 struct e1000_fc_info
*fc
= &hw
->fc
;
1864 u32 pba
= 0, tx_space
, min_tx_space
, min_rx_space
, hwm
;
1866 /* Repartition Pba for greater than 9k mtu
1867 * To take effect CTRL.RST is required.
1869 switch (mac
->type
) {
1873 pba
= rd32(E1000_RXPBS
);
1874 pba
= igb_rxpbs_adjust_82580(pba
);
1877 pba
= rd32(E1000_RXPBS
);
1878 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1884 pba
= E1000_PBA_34K
;
1888 if ((adapter
->max_frame_size
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) &&
1889 (mac
->type
< e1000_82576
)) {
1890 /* adjust PBA for jumbo frames */
1891 wr32(E1000_PBA
, pba
);
1893 /* To maintain wire speed transmits, the Tx FIFO should be
1894 * large enough to accommodate two full transmit packets,
1895 * rounded up to the next 1KB and expressed in KB. Likewise,
1896 * the Rx FIFO should be large enough to accommodate at least
1897 * one full receive packet and is similarly rounded up and
1900 pba
= rd32(E1000_PBA
);
1901 /* upper 16 bits has Tx packet buffer allocation size in KB */
1902 tx_space
= pba
>> 16;
1903 /* lower 16 bits has Rx packet buffer allocation size in KB */
1905 /* the Tx fifo also stores 16 bytes of information about the Tx
1906 * but don't include ethernet FCS because hardware appends it
1908 min_tx_space
= (adapter
->max_frame_size
+
1909 sizeof(union e1000_adv_tx_desc
) -
1911 min_tx_space
= ALIGN(min_tx_space
, 1024);
1912 min_tx_space
>>= 10;
1913 /* software strips receive CRC, so leave room for it */
1914 min_rx_space
= adapter
->max_frame_size
;
1915 min_rx_space
= ALIGN(min_rx_space
, 1024);
1916 min_rx_space
>>= 10;
1918 /* If current Tx allocation is less than the min Tx FIFO size,
1919 * and the min Tx FIFO size is less than the current Rx FIFO
1920 * allocation, take space away from current Rx allocation
1922 if (tx_space
< min_tx_space
&&
1923 ((min_tx_space
- tx_space
) < pba
)) {
1924 pba
= pba
- (min_tx_space
- tx_space
);
1926 /* if short on Rx space, Rx wins and must trump Tx
1929 if (pba
< min_rx_space
)
1932 wr32(E1000_PBA
, pba
);
1935 /* flow control settings */
1936 /* The high water mark must be low enough to fit one full frame
1937 * (or the size used for early receive) above it in the Rx FIFO.
1938 * Set it to the lower of:
1939 * - 90% of the Rx FIFO size, or
1940 * - the full Rx FIFO size minus one full frame
1942 hwm
= min(((pba
<< 10) * 9 / 10),
1943 ((pba
<< 10) - 2 * adapter
->max_frame_size
));
1945 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1946 fc
->low_water
= fc
->high_water
- 16;
1947 fc
->pause_time
= 0xFFFF;
1949 fc
->current_mode
= fc
->requested_mode
;
1951 /* disable receive for all VFs and wait one second */
1952 if (adapter
->vfs_allocated_count
) {
1955 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1956 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1958 /* ping all the active vfs to let them know we are going down */
1959 igb_ping_all_vfs(adapter
);
1961 /* disable transmits and receives */
1962 wr32(E1000_VFRE
, 0);
1963 wr32(E1000_VFTE
, 0);
1966 /* Allow time for pending master requests to run */
1967 hw
->mac
.ops
.reset_hw(hw
);
1970 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1971 /* need to resetup here after media swap */
1972 adapter
->ei
.get_invariants(hw
);
1973 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1975 if ((mac
->type
== e1000_82575
) &&
1976 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
1977 igb_enable_mas(adapter
);
1979 if (hw
->mac
.ops
.init_hw(hw
))
1980 dev_err(&pdev
->dev
, "Hardware Error\n");
1982 /* Flow control settings reset on hardware reset, so guarantee flow
1983 * control is off when forcing speed.
1985 if (!hw
->mac
.autoneg
)
1986 igb_force_mac_fc(hw
);
1988 igb_init_dmac(adapter
, pba
);
1989 #ifdef CONFIG_IGB_HWMON
1990 /* Re-initialize the thermal sensor on i350 devices. */
1991 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
1992 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
1993 /* If present, re-initialize the external thermal sensor
1997 mac
->ops
.init_thermal_sensor_thresh(hw
);
2001 /* Re-establish EEE setting */
2002 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2003 switch (mac
->type
) {
2007 igb_set_eee_i350(hw
, true, true);
2010 igb_set_eee_i354(hw
, true, true);
2016 if (!netif_running(adapter
->netdev
))
2017 igb_power_down_link(adapter
);
2019 igb_update_mng_vlan(adapter
);
2021 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2022 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2024 /* Re-enable PTP, where applicable. */
2025 igb_ptp_reset(adapter
);
2027 igb_get_phy_info(hw
);
2030 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2031 netdev_features_t features
)
2033 /* Since there is no support for separate Rx/Tx vlan accel
2034 * enable/disable make sure Tx flag is always in same state as Rx.
2036 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2037 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2039 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2044 static int igb_set_features(struct net_device
*netdev
,
2045 netdev_features_t features
)
2047 netdev_features_t changed
= netdev
->features
^ features
;
2048 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2050 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2051 igb_vlan_mode(netdev
, features
);
2053 if (!(changed
& NETIF_F_RXALL
))
2056 netdev
->features
= features
;
2058 if (netif_running(netdev
))
2059 igb_reinit_locked(adapter
);
2066 static const struct net_device_ops igb_netdev_ops
= {
2067 .ndo_open
= igb_open
,
2068 .ndo_stop
= igb_close
,
2069 .ndo_start_xmit
= igb_xmit_frame
,
2070 .ndo_get_stats64
= igb_get_stats64
,
2071 .ndo_set_rx_mode
= igb_set_rx_mode
,
2072 .ndo_set_mac_address
= igb_set_mac
,
2073 .ndo_change_mtu
= igb_change_mtu
,
2074 .ndo_do_ioctl
= igb_ioctl
,
2075 .ndo_tx_timeout
= igb_tx_timeout
,
2076 .ndo_validate_addr
= eth_validate_addr
,
2077 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2078 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2079 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2080 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2081 .ndo_set_vf_rate
= igb_ndo_set_vf_bw
,
2082 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2083 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2084 #ifdef CONFIG_NET_POLL_CONTROLLER
2085 .ndo_poll_controller
= igb_netpoll
,
2087 .ndo_fix_features
= igb_fix_features
,
2088 .ndo_set_features
= igb_set_features
,
2089 .ndo_features_check
= passthru_features_check
,
2093 * igb_set_fw_version - Configure version string for ethtool
2094 * @adapter: adapter struct
2096 void igb_set_fw_version(struct igb_adapter
*adapter
)
2098 struct e1000_hw
*hw
= &adapter
->hw
;
2099 struct e1000_fw_version fw
;
2101 igb_get_fw_version(hw
, &fw
);
2103 switch (hw
->mac
.type
) {
2106 if (!(igb_get_flash_presence_i210(hw
))) {
2107 snprintf(adapter
->fw_version
,
2108 sizeof(adapter
->fw_version
),
2110 fw
.invm_major
, fw
.invm_minor
,
2116 /* if option is rom valid, display its version too */
2118 snprintf(adapter
->fw_version
,
2119 sizeof(adapter
->fw_version
),
2120 "%d.%d, 0x%08x, %d.%d.%d",
2121 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2122 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2124 } else if (fw
.etrack_id
!= 0X0000) {
2125 snprintf(adapter
->fw_version
,
2126 sizeof(adapter
->fw_version
),
2128 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2130 snprintf(adapter
->fw_version
,
2131 sizeof(adapter
->fw_version
),
2133 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2140 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2142 * @adapter: adapter struct
2144 static void igb_init_mas(struct igb_adapter
*adapter
)
2146 struct e1000_hw
*hw
= &adapter
->hw
;
2149 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2150 switch (hw
->bus
.func
) {
2152 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2153 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2154 netdev_info(adapter
->netdev
,
2155 "MAS: Enabling Media Autosense for port %d\n",
2160 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2161 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2162 netdev_info(adapter
->netdev
,
2163 "MAS: Enabling Media Autosense for port %d\n",
2168 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2169 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2170 netdev_info(adapter
->netdev
,
2171 "MAS: Enabling Media Autosense for port %d\n",
2176 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2177 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2178 netdev_info(adapter
->netdev
,
2179 "MAS: Enabling Media Autosense for port %d\n",
2184 /* Shouldn't get here */
2185 netdev_err(adapter
->netdev
,
2186 "MAS: Invalid port configuration, returning\n");
2192 * igb_init_i2c - Init I2C interface
2193 * @adapter: pointer to adapter structure
2195 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2199 /* I2C interface supported on i350 devices */
2200 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2203 /* Initialize the i2c bus which is controlled by the registers.
2204 * This bus will use the i2c_algo_bit structue that implements
2205 * the protocol through toggling of the 4 bits in the register.
2207 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2208 adapter
->i2c_algo
= igb_i2c_algo
;
2209 adapter
->i2c_algo
.data
= adapter
;
2210 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2211 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2212 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2213 sizeof(adapter
->i2c_adap
.name
));
2214 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2219 * igb_probe - Device Initialization Routine
2220 * @pdev: PCI device information struct
2221 * @ent: entry in igb_pci_tbl
2223 * Returns 0 on success, negative on failure
2225 * igb_probe initializes an adapter identified by a pci_dev structure.
2226 * The OS initialization, configuring of the adapter private structure,
2227 * and a hardware reset occur.
2229 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2231 struct net_device
*netdev
;
2232 struct igb_adapter
*adapter
;
2233 struct e1000_hw
*hw
;
2234 u16 eeprom_data
= 0;
2236 static int global_quad_port_a
; /* global quad port a indication */
2237 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2238 int err
, pci_using_dac
;
2239 u8 part_str
[E1000_PBANUM_LENGTH
];
2241 /* Catch broken hardware that put the wrong VF device ID in
2242 * the PCIe SR-IOV capability.
2244 if (pdev
->is_virtfn
) {
2245 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2246 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2250 err
= pci_enable_device_mem(pdev
);
2255 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2259 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2262 "No usable DMA configuration, aborting\n");
2267 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
2273 pci_enable_pcie_error_reporting(pdev
);
2275 pci_set_master(pdev
);
2276 pci_save_state(pdev
);
2279 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2282 goto err_alloc_etherdev
;
2284 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2286 pci_set_drvdata(pdev
, netdev
);
2287 adapter
= netdev_priv(netdev
);
2288 adapter
->netdev
= netdev
;
2289 adapter
->pdev
= pdev
;
2292 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2295 hw
->hw_addr
= pci_iomap(pdev
, 0, 0);
2299 netdev
->netdev_ops
= &igb_netdev_ops
;
2300 igb_set_ethtool_ops(netdev
);
2301 netdev
->watchdog_timeo
= 5 * HZ
;
2303 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2305 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2306 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2308 /* PCI config space info */
2309 hw
->vendor_id
= pdev
->vendor
;
2310 hw
->device_id
= pdev
->device
;
2311 hw
->revision_id
= pdev
->revision
;
2312 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2313 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2315 /* Copy the default MAC, PHY and NVM function pointers */
2316 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2317 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2318 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2319 /* Initialize skew-specific constants */
2320 err
= ei
->get_invariants(hw
);
2324 /* setup the private structure */
2325 err
= igb_sw_init(adapter
);
2329 igb_get_bus_info_pcie(hw
);
2331 hw
->phy
.autoneg_wait_to_complete
= false;
2333 /* Copper options */
2334 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2335 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2336 hw
->phy
.disable_polarity_correction
= false;
2337 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2340 if (igb_check_reset_block(hw
))
2341 dev_info(&pdev
->dev
,
2342 "PHY reset is blocked due to SOL/IDER session.\n");
2344 /* features is initialized to 0 in allocation, it might have bits
2345 * set by igb_sw_init so we should use an or instead of an
2348 netdev
->features
|= NETIF_F_SG
|
2355 NETIF_F_HW_VLAN_CTAG_RX
|
2356 NETIF_F_HW_VLAN_CTAG_TX
;
2358 /* copy netdev features into list of user selectable features */
2359 netdev
->hw_features
|= netdev
->features
;
2360 netdev
->hw_features
|= NETIF_F_RXALL
;
2362 /* set this bit last since it cannot be part of hw_features */
2363 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
2365 netdev
->vlan_features
|= NETIF_F_TSO
|
2371 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2373 if (pci_using_dac
) {
2374 netdev
->features
|= NETIF_F_HIGHDMA
;
2375 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
2378 if (hw
->mac
.type
>= e1000_82576
) {
2379 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
;
2380 netdev
->features
|= NETIF_F_SCTP_CSUM
;
2383 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2385 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2387 /* before reading the NVM, reset the controller to put the device in a
2388 * known good starting state
2390 hw
->mac
.ops
.reset_hw(hw
);
2392 /* make sure the NVM is good , i211/i210 parts can have special NVM
2393 * that doesn't contain a checksum
2395 switch (hw
->mac
.type
) {
2398 if (igb_get_flash_presence_i210(hw
)) {
2399 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2401 "The NVM Checksum Is Not Valid\n");
2408 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2409 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2416 /* copy the MAC address out of the NVM */
2417 if (hw
->mac
.ops
.read_mac_addr(hw
))
2418 dev_err(&pdev
->dev
, "NVM Read Error\n");
2420 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2422 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2423 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2428 /* get firmware version for ethtool -i */
2429 igb_set_fw_version(adapter
);
2431 /* configure RXPBSIZE and TXPBSIZE */
2432 if (hw
->mac
.type
== e1000_i210
) {
2433 wr32(E1000_RXPBS
, I210_RXPBSIZE_DEFAULT
);
2434 wr32(E1000_TXPBS
, I210_TXPBSIZE_DEFAULT
);
2437 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2438 (unsigned long) adapter
);
2439 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2440 (unsigned long) adapter
);
2442 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2443 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2445 /* Initialize link properties that are user-changeable */
2446 adapter
->fc_autoneg
= true;
2447 hw
->mac
.autoneg
= true;
2448 hw
->phy
.autoneg_advertised
= 0x2f;
2450 hw
->fc
.requested_mode
= e1000_fc_default
;
2451 hw
->fc
.current_mode
= e1000_fc_default
;
2453 igb_validate_mdi_setting(hw
);
2455 /* By default, support wake on port A */
2456 if (hw
->bus
.func
== 0)
2457 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2459 /* Check the NVM for wake support on non-port A ports */
2460 if (hw
->mac
.type
>= e1000_82580
)
2461 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2462 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2464 else if (hw
->bus
.func
== 1)
2465 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2467 if (eeprom_data
& IGB_EEPROM_APME
)
2468 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2470 /* now that we have the eeprom settings, apply the special cases where
2471 * the eeprom may be wrong or the board simply won't support wake on
2472 * lan on a particular port
2474 switch (pdev
->device
) {
2475 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2476 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2478 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2479 case E1000_DEV_ID_82576_FIBER
:
2480 case E1000_DEV_ID_82576_SERDES
:
2481 /* Wake events only supported on port A for dual fiber
2482 * regardless of eeprom setting
2484 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2485 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2487 case E1000_DEV_ID_82576_QUAD_COPPER
:
2488 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2489 /* if quad port adapter, disable WoL on all but port A */
2490 if (global_quad_port_a
!= 0)
2491 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2493 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2494 /* Reset for multiple quad port adapters */
2495 if (++global_quad_port_a
== 4)
2496 global_quad_port_a
= 0;
2499 /* If the device can't wake, don't set software support */
2500 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2501 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2504 /* initialize the wol settings based on the eeprom settings */
2505 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2506 adapter
->wol
|= E1000_WUFC_MAG
;
2508 /* Some vendors want WoL disabled by default, but still supported */
2509 if ((hw
->mac
.type
== e1000_i350
) &&
2510 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2511 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2515 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2516 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2518 /* reset the hardware with the new settings */
2521 /* Init the I2C interface */
2522 err
= igb_init_i2c(adapter
);
2524 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2528 /* let the f/w know that the h/w is now under the control of the
2531 igb_get_hw_control(adapter
);
2533 strcpy(netdev
->name
, "eth%d");
2534 err
= register_netdev(netdev
);
2538 /* carrier off reporting is important to ethtool even BEFORE open */
2539 netif_carrier_off(netdev
);
2541 #ifdef CONFIG_IGB_DCA
2542 if (dca_add_requester(&pdev
->dev
) == 0) {
2543 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2544 dev_info(&pdev
->dev
, "DCA enabled\n");
2545 igb_setup_dca(adapter
);
2549 #ifdef CONFIG_IGB_HWMON
2550 /* Initialize the thermal sensor on i350 devices. */
2551 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2554 /* Read the NVM to determine if this i350 device supports an
2555 * external thermal sensor.
2557 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2558 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2559 adapter
->ets
= true;
2561 adapter
->ets
= false;
2562 if (igb_sysfs_init(adapter
))
2564 "failed to allocate sysfs resources\n");
2566 adapter
->ets
= false;
2569 /* Check if Media Autosense is enabled */
2571 if (hw
->dev_spec
._82575
.mas_capable
)
2572 igb_init_mas(adapter
);
2574 /* do hw tstamp init after resetting */
2575 igb_ptp_init(adapter
);
2577 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2578 /* print bus type/speed/width info, not applicable to i354 */
2579 if (hw
->mac
.type
!= e1000_i354
) {
2580 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2582 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2583 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2585 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2587 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2589 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2590 "Width x1" : "unknown"), netdev
->dev_addr
);
2593 if ((hw
->mac
.type
>= e1000_i210
||
2594 igb_get_flash_presence_i210(hw
))) {
2595 ret_val
= igb_read_part_string(hw
, part_str
,
2596 E1000_PBANUM_LENGTH
);
2598 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2602 strcpy(part_str
, "Unknown");
2603 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2604 dev_info(&pdev
->dev
,
2605 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2606 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2607 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2608 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2609 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2610 switch (hw
->mac
.type
) {
2614 /* Enable EEE for internal copper PHY devices */
2615 err
= igb_set_eee_i350(hw
, true, true);
2617 (!hw
->dev_spec
._82575
.eee_disable
)) {
2618 adapter
->eee_advert
=
2619 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2620 adapter
->flags
|= IGB_FLAG_EEE
;
2624 if ((rd32(E1000_CTRL_EXT
) &
2625 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2626 err
= igb_set_eee_i354(hw
, true, true);
2628 (!hw
->dev_spec
._82575
.eee_disable
)) {
2629 adapter
->eee_advert
=
2630 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2631 adapter
->flags
|= IGB_FLAG_EEE
;
2639 pm_runtime_put_noidle(&pdev
->dev
);
2643 igb_release_hw_control(adapter
);
2644 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2646 if (!igb_check_reset_block(hw
))
2649 if (hw
->flash_address
)
2650 iounmap(hw
->flash_address
);
2652 kfree(adapter
->shadow_vfta
);
2653 igb_clear_interrupt_scheme(adapter
);
2654 pci_iounmap(pdev
, hw
->hw_addr
);
2656 free_netdev(netdev
);
2658 pci_release_selected_regions(pdev
,
2659 pci_select_bars(pdev
, IORESOURCE_MEM
));
2662 pci_disable_device(pdev
);
2666 #ifdef CONFIG_PCI_IOV
2667 static int igb_disable_sriov(struct pci_dev
*pdev
)
2669 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2670 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2671 struct e1000_hw
*hw
= &adapter
->hw
;
2673 /* reclaim resources allocated to VFs */
2674 if (adapter
->vf_data
) {
2675 /* disable iov and allow time for transactions to clear */
2676 if (pci_vfs_assigned(pdev
)) {
2677 dev_warn(&pdev
->dev
,
2678 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2681 pci_disable_sriov(pdev
);
2685 kfree(adapter
->vf_data
);
2686 adapter
->vf_data
= NULL
;
2687 adapter
->vfs_allocated_count
= 0;
2688 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2691 dev_info(&pdev
->dev
, "IOV Disabled\n");
2693 /* Re-enable DMA Coalescing flag since IOV is turned off */
2694 adapter
->flags
|= IGB_FLAG_DMAC
;
2700 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2702 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2703 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2704 int old_vfs
= pci_num_vf(pdev
);
2708 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2716 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2718 adapter
->vfs_allocated_count
= old_vfs
;
2720 adapter
->vfs_allocated_count
= num_vfs
;
2722 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2723 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2725 /* if allocation failed then we do not support SR-IOV */
2726 if (!adapter
->vf_data
) {
2727 adapter
->vfs_allocated_count
= 0;
2729 "Unable to allocate memory for VF Data Storage\n");
2734 /* only call pci_enable_sriov() if no VFs are allocated already */
2736 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2740 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2741 adapter
->vfs_allocated_count
);
2742 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2743 igb_vf_configure(adapter
, i
);
2745 /* DMA Coalescing is not supported in IOV mode. */
2746 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2750 kfree(adapter
->vf_data
);
2751 adapter
->vf_data
= NULL
;
2752 adapter
->vfs_allocated_count
= 0;
2759 * igb_remove_i2c - Cleanup I2C interface
2760 * @adapter: pointer to adapter structure
2762 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2764 /* free the adapter bus structure */
2765 i2c_del_adapter(&adapter
->i2c_adap
);
2769 * igb_remove - Device Removal Routine
2770 * @pdev: PCI device information struct
2772 * igb_remove is called by the PCI subsystem to alert the driver
2773 * that it should release a PCI device. The could be caused by a
2774 * Hot-Plug event, or because the driver is going to be removed from
2777 static void igb_remove(struct pci_dev
*pdev
)
2779 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2780 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2781 struct e1000_hw
*hw
= &adapter
->hw
;
2783 pm_runtime_get_noresume(&pdev
->dev
);
2784 #ifdef CONFIG_IGB_HWMON
2785 igb_sysfs_exit(adapter
);
2787 igb_remove_i2c(adapter
);
2788 igb_ptp_stop(adapter
);
2789 /* The watchdog timer may be rescheduled, so explicitly
2790 * disable watchdog from being rescheduled.
2792 set_bit(__IGB_DOWN
, &adapter
->state
);
2793 del_timer_sync(&adapter
->watchdog_timer
);
2794 del_timer_sync(&adapter
->phy_info_timer
);
2796 cancel_work_sync(&adapter
->reset_task
);
2797 cancel_work_sync(&adapter
->watchdog_task
);
2799 #ifdef CONFIG_IGB_DCA
2800 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2801 dev_info(&pdev
->dev
, "DCA disabled\n");
2802 dca_remove_requester(&pdev
->dev
);
2803 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2804 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2808 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2809 * would have already happened in close and is redundant.
2811 igb_release_hw_control(adapter
);
2813 #ifdef CONFIG_PCI_IOV
2814 igb_disable_sriov(pdev
);
2817 unregister_netdev(netdev
);
2819 igb_clear_interrupt_scheme(adapter
);
2821 pci_iounmap(pdev
, hw
->hw_addr
);
2822 if (hw
->flash_address
)
2823 iounmap(hw
->flash_address
);
2824 pci_release_selected_regions(pdev
,
2825 pci_select_bars(pdev
, IORESOURCE_MEM
));
2827 kfree(adapter
->shadow_vfta
);
2828 free_netdev(netdev
);
2830 pci_disable_pcie_error_reporting(pdev
);
2832 pci_disable_device(pdev
);
2836 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
2837 * @adapter: board private structure to initialize
2839 * This function initializes the vf specific data storage and then attempts to
2840 * allocate the VFs. The reason for ordering it this way is because it is much
2841 * mor expensive time wise to disable SR-IOV than it is to allocate and free
2842 * the memory for the VFs.
2844 static void igb_probe_vfs(struct igb_adapter
*adapter
)
2846 #ifdef CONFIG_PCI_IOV
2847 struct pci_dev
*pdev
= adapter
->pdev
;
2848 struct e1000_hw
*hw
= &adapter
->hw
;
2850 /* Virtualization features not supported on i210 family. */
2851 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
2854 pci_sriov_set_totalvfs(pdev
, 7);
2855 igb_enable_sriov(pdev
, max_vfs
);
2857 #endif /* CONFIG_PCI_IOV */
2860 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
2862 struct e1000_hw
*hw
= &adapter
->hw
;
2865 /* Determine the maximum number of RSS queues supported. */
2866 switch (hw
->mac
.type
) {
2868 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
2872 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
2875 /* I350 cannot do RSS and SR-IOV at the same time */
2876 if (!!adapter
->vfs_allocated_count
) {
2882 if (!!adapter
->vfs_allocated_count
) {
2890 max_rss_queues
= IGB_MAX_RX_QUEUES
;
2894 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
2896 igb_set_flag_queue_pairs(adapter
, max_rss_queues
);
2899 void igb_set_flag_queue_pairs(struct igb_adapter
*adapter
,
2900 const u32 max_rss_queues
)
2902 struct e1000_hw
*hw
= &adapter
->hw
;
2904 /* Determine if we need to pair queues. */
2905 switch (hw
->mac
.type
) {
2908 /* Device supports enough interrupts without queue pairing. */
2911 /* If VFs are going to be allocated with RSS queues then we
2912 * should pair the queues in order to conserve interrupts due
2913 * to limited supply.
2915 if ((adapter
->rss_queues
> 1) &&
2916 (adapter
->vfs_allocated_count
> 6))
2917 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2924 /* If rss_queues > half of max_rss_queues, pair the queues in
2925 * order to conserve interrupts due to limited supply.
2927 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
2928 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
2934 * igb_sw_init - Initialize general software structures (struct igb_adapter)
2935 * @adapter: board private structure to initialize
2937 * igb_sw_init initializes the Adapter private data structure.
2938 * Fields are initialized based on PCI device information and
2939 * OS network device settings (MTU size).
2941 static int igb_sw_init(struct igb_adapter
*adapter
)
2943 struct e1000_hw
*hw
= &adapter
->hw
;
2944 struct net_device
*netdev
= adapter
->netdev
;
2945 struct pci_dev
*pdev
= adapter
->pdev
;
2947 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
2949 /* set default ring sizes */
2950 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
2951 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
2953 /* set default ITR values */
2954 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
2955 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
2957 /* set default work limits */
2958 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
2960 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
2962 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
2964 spin_lock_init(&adapter
->stats64_lock
);
2965 #ifdef CONFIG_PCI_IOV
2966 switch (hw
->mac
.type
) {
2970 dev_warn(&pdev
->dev
,
2971 "Maximum of 7 VFs per PF, using max\n");
2972 max_vfs
= adapter
->vfs_allocated_count
= 7;
2974 adapter
->vfs_allocated_count
= max_vfs
;
2975 if (adapter
->vfs_allocated_count
)
2976 dev_warn(&pdev
->dev
,
2977 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
2982 #endif /* CONFIG_PCI_IOV */
2984 igb_init_queue_configuration(adapter
);
2986 /* Setup and initialize a copy of the hw vlan table array */
2987 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
2990 /* This call may decrease the number of queues */
2991 if (igb_init_interrupt_scheme(adapter
, true)) {
2992 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
2996 igb_probe_vfs(adapter
);
2998 /* Explicitly disable IRQ since the NIC can be in any state. */
2999 igb_irq_disable(adapter
);
3001 if (hw
->mac
.type
>= e1000_i350
)
3002 adapter
->flags
&= ~IGB_FLAG_DMAC
;
3004 set_bit(__IGB_DOWN
, &adapter
->state
);
3009 * igb_open - Called when a network interface is made active
3010 * @netdev: network interface device structure
3012 * Returns 0 on success, negative value on failure
3014 * The open entry point is called when a network interface is made
3015 * active by the system (IFF_UP). At this point all resources needed
3016 * for transmit and receive operations are allocated, the interrupt
3017 * handler is registered with the OS, the watchdog timer is started,
3018 * and the stack is notified that the interface is ready.
3020 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3022 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3023 struct e1000_hw
*hw
= &adapter
->hw
;
3024 struct pci_dev
*pdev
= adapter
->pdev
;
3028 /* disallow open during test */
3029 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3035 pm_runtime_get_sync(&pdev
->dev
);
3037 netif_carrier_off(netdev
);
3039 /* allocate transmit descriptors */
3040 err
= igb_setup_all_tx_resources(adapter
);
3044 /* allocate receive descriptors */
3045 err
= igb_setup_all_rx_resources(adapter
);
3049 igb_power_up_link(adapter
);
3051 /* before we allocate an interrupt, we must be ready to handle it.
3052 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3053 * as soon as we call pci_request_irq, so we have to setup our
3054 * clean_rx handler before we do so.
3056 igb_configure(adapter
);
3058 err
= igb_request_irq(adapter
);
3062 /* Notify the stack of the actual queue counts. */
3063 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3064 adapter
->num_tx_queues
);
3066 goto err_set_queues
;
3068 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3069 adapter
->num_rx_queues
);
3071 goto err_set_queues
;
3073 /* From here on the code is the same as igb_up() */
3074 clear_bit(__IGB_DOWN
, &adapter
->state
);
3076 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3077 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3079 /* Clear any pending interrupts. */
3082 igb_irq_enable(adapter
);
3084 /* notify VFs that reset has been completed */
3085 if (adapter
->vfs_allocated_count
) {
3086 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3088 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3089 wr32(E1000_CTRL_EXT
, reg_data
);
3092 netif_tx_start_all_queues(netdev
);
3095 pm_runtime_put(&pdev
->dev
);
3097 /* start the watchdog. */
3098 hw
->mac
.get_link_status
= 1;
3099 schedule_work(&adapter
->watchdog_task
);
3104 igb_free_irq(adapter
);
3106 igb_release_hw_control(adapter
);
3107 igb_power_down_link(adapter
);
3108 igb_free_all_rx_resources(adapter
);
3110 igb_free_all_tx_resources(adapter
);
3114 pm_runtime_put(&pdev
->dev
);
3119 static int igb_open(struct net_device
*netdev
)
3121 return __igb_open(netdev
, false);
3125 * igb_close - Disables a network interface
3126 * @netdev: network interface device structure
3128 * Returns 0, this is not allowed to fail
3130 * The close entry point is called when an interface is de-activated
3131 * by the OS. The hardware is still under the driver's control, but
3132 * needs to be disabled. A global MAC reset is issued to stop the
3133 * hardware, and all transmit and receive resources are freed.
3135 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3137 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3138 struct pci_dev
*pdev
= adapter
->pdev
;
3140 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3143 pm_runtime_get_sync(&pdev
->dev
);
3146 igb_free_irq(adapter
);
3148 igb_free_all_tx_resources(adapter
);
3149 igb_free_all_rx_resources(adapter
);
3152 pm_runtime_put_sync(&pdev
->dev
);
3156 static int igb_close(struct net_device
*netdev
)
3158 return __igb_close(netdev
, false);
3162 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3163 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3165 * Return 0 on success, negative on failure
3167 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3169 struct device
*dev
= tx_ring
->dev
;
3172 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3174 tx_ring
->tx_buffer_info
= vzalloc(size
);
3175 if (!tx_ring
->tx_buffer_info
)
3178 /* round up to nearest 4K */
3179 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3180 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3182 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3183 &tx_ring
->dma
, GFP_KERNEL
);
3187 tx_ring
->next_to_use
= 0;
3188 tx_ring
->next_to_clean
= 0;
3193 vfree(tx_ring
->tx_buffer_info
);
3194 tx_ring
->tx_buffer_info
= NULL
;
3195 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3200 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3201 * (Descriptors) for all queues
3202 * @adapter: board private structure
3204 * Return 0 on success, negative on failure
3206 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3208 struct pci_dev
*pdev
= adapter
->pdev
;
3211 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3212 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3215 "Allocation for Tx Queue %u failed\n", i
);
3216 for (i
--; i
>= 0; i
--)
3217 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3226 * igb_setup_tctl - configure the transmit control registers
3227 * @adapter: Board private structure
3229 void igb_setup_tctl(struct igb_adapter
*adapter
)
3231 struct e1000_hw
*hw
= &adapter
->hw
;
3234 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3235 wr32(E1000_TXDCTL(0), 0);
3237 /* Program the Transmit Control Register */
3238 tctl
= rd32(E1000_TCTL
);
3239 tctl
&= ~E1000_TCTL_CT
;
3240 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3241 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3243 igb_config_collision_dist(hw
);
3245 /* Enable transmits */
3246 tctl
|= E1000_TCTL_EN
;
3248 wr32(E1000_TCTL
, tctl
);
3252 * igb_configure_tx_ring - Configure transmit ring after Reset
3253 * @adapter: board private structure
3254 * @ring: tx ring to configure
3256 * Configure a transmit ring after a reset.
3258 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3259 struct igb_ring
*ring
)
3261 struct e1000_hw
*hw
= &adapter
->hw
;
3263 u64 tdba
= ring
->dma
;
3264 int reg_idx
= ring
->reg_idx
;
3266 /* disable the queue */
3267 wr32(E1000_TXDCTL(reg_idx
), 0);
3271 wr32(E1000_TDLEN(reg_idx
),
3272 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3273 wr32(E1000_TDBAL(reg_idx
),
3274 tdba
& 0x00000000ffffffffULL
);
3275 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3277 ring
->tail
= hw
->hw_addr
+ E1000_TDT(reg_idx
);
3278 wr32(E1000_TDH(reg_idx
), 0);
3279 writel(0, ring
->tail
);
3281 txdctl
|= IGB_TX_PTHRESH
;
3282 txdctl
|= IGB_TX_HTHRESH
<< 8;
3283 txdctl
|= IGB_TX_WTHRESH
<< 16;
3285 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3286 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3290 * igb_configure_tx - Configure transmit Unit after Reset
3291 * @adapter: board private structure
3293 * Configure the Tx unit of the MAC after a reset.
3295 static void igb_configure_tx(struct igb_adapter
*adapter
)
3299 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3300 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3304 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3305 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3307 * Returns 0 on success, negative on failure
3309 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3311 struct device
*dev
= rx_ring
->dev
;
3314 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3316 rx_ring
->rx_buffer_info
= vzalloc(size
);
3317 if (!rx_ring
->rx_buffer_info
)
3320 /* Round up to nearest 4K */
3321 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3322 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3324 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3325 &rx_ring
->dma
, GFP_KERNEL
);
3329 rx_ring
->next_to_alloc
= 0;
3330 rx_ring
->next_to_clean
= 0;
3331 rx_ring
->next_to_use
= 0;
3336 vfree(rx_ring
->rx_buffer_info
);
3337 rx_ring
->rx_buffer_info
= NULL
;
3338 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3343 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3344 * (Descriptors) for all queues
3345 * @adapter: board private structure
3347 * Return 0 on success, negative on failure
3349 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3351 struct pci_dev
*pdev
= adapter
->pdev
;
3354 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3355 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3358 "Allocation for Rx Queue %u failed\n", i
);
3359 for (i
--; i
>= 0; i
--)
3360 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3369 * igb_setup_mrqc - configure the multiple receive queue control registers
3370 * @adapter: Board private structure
3372 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3374 struct e1000_hw
*hw
= &adapter
->hw
;
3376 u32 j
, num_rx_queues
;
3379 netdev_rss_key_fill(rss_key
, sizeof(rss_key
));
3380 for (j
= 0; j
< 10; j
++)
3381 wr32(E1000_RSSRK(j
), rss_key
[j
]);
3383 num_rx_queues
= adapter
->rss_queues
;
3385 switch (hw
->mac
.type
) {
3387 /* 82576 supports 2 RSS queues for SR-IOV */
3388 if (adapter
->vfs_allocated_count
)
3395 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3396 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3397 adapter
->rss_indir_tbl
[j
] =
3398 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3399 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3401 igb_write_rss_indir_tbl(adapter
);
3403 /* Disable raw packet checksumming so that RSS hash is placed in
3404 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3405 * offloads as they are enabled by default
3407 rxcsum
= rd32(E1000_RXCSUM
);
3408 rxcsum
|= E1000_RXCSUM_PCSD
;
3410 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3411 /* Enable Receive Checksum Offload for SCTP */
3412 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3414 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3415 wr32(E1000_RXCSUM
, rxcsum
);
3417 /* Generate RSS hash based on packet types, TCP/UDP
3418 * port numbers and/or IPv4/v6 src and dst addresses
3420 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3421 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3422 E1000_MRQC_RSS_FIELD_IPV6
|
3423 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3424 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3426 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3427 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3428 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3429 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3431 /* If VMDq is enabled then we set the appropriate mode for that, else
3432 * we default to RSS so that an RSS hash is calculated per packet even
3433 * if we are only using one queue
3435 if (adapter
->vfs_allocated_count
) {
3436 if (hw
->mac
.type
> e1000_82575
) {
3437 /* Set the default pool for the PF's first queue */
3438 u32 vtctl
= rd32(E1000_VT_CTL
);
3440 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3441 E1000_VT_CTL_DISABLE_DEF_POOL
);
3442 vtctl
|= adapter
->vfs_allocated_count
<<
3443 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3444 wr32(E1000_VT_CTL
, vtctl
);
3446 if (adapter
->rss_queues
> 1)
3447 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_2Q
;
3449 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3451 if (hw
->mac
.type
!= e1000_i211
)
3452 mrqc
|= E1000_MRQC_ENABLE_RSS_4Q
;
3454 igb_vmm_control(adapter
);
3456 wr32(E1000_MRQC
, mrqc
);
3460 * igb_setup_rctl - configure the receive control registers
3461 * @adapter: Board private structure
3463 void igb_setup_rctl(struct igb_adapter
*adapter
)
3465 struct e1000_hw
*hw
= &adapter
->hw
;
3468 rctl
= rd32(E1000_RCTL
);
3470 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3471 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3473 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3474 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3476 /* enable stripping of CRC. It's unlikely this will break BMC
3477 * redirection as it did with e1000. Newer features require
3478 * that the HW strips the CRC.
3480 rctl
|= E1000_RCTL_SECRC
;
3482 /* disable store bad packets and clear size bits. */
3483 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3485 /* enable LPE to prevent packets larger than max_frame_size */
3486 rctl
|= E1000_RCTL_LPE
;
3488 /* disable queue 0 to prevent tail write w/o re-config */
3489 wr32(E1000_RXDCTL(0), 0);
3491 /* Attention!!! For SR-IOV PF driver operations you must enable
3492 * queue drop for all VF and PF queues to prevent head of line blocking
3493 * if an un-trusted VF does not provide descriptors to hardware.
3495 if (adapter
->vfs_allocated_count
) {
3496 /* set all queue drop enable bits */
3497 wr32(E1000_QDE
, ALL_QUEUES
);
3500 /* This is useful for sniffing bad packets. */
3501 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3502 /* UPE and MPE will be handled by normal PROMISC logic
3503 * in e1000e_set_rx_mode
3505 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3506 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3507 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3509 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3510 E1000_RCTL_DPF
| /* Allow filtered pause */
3511 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3512 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3513 * and that breaks VLANs.
3517 wr32(E1000_RCTL
, rctl
);
3520 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3523 struct e1000_hw
*hw
= &adapter
->hw
;
3526 /* if it isn't the PF check to see if VFs are enabled and
3527 * increase the size to support vlan tags
3529 if (vfn
< adapter
->vfs_allocated_count
&&
3530 adapter
->vf_data
[vfn
].vlans_enabled
)
3531 size
+= VLAN_TAG_SIZE
;
3533 vmolr
= rd32(E1000_VMOLR(vfn
));
3534 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3535 vmolr
|= size
| E1000_VMOLR_LPE
;
3536 wr32(E1000_VMOLR(vfn
), vmolr
);
3542 * igb_rlpml_set - set maximum receive packet size
3543 * @adapter: board private structure
3545 * Configure maximum receivable packet size.
3547 static void igb_rlpml_set(struct igb_adapter
*adapter
)
3549 u32 max_frame_size
= adapter
->max_frame_size
;
3550 struct e1000_hw
*hw
= &adapter
->hw
;
3551 u16 pf_id
= adapter
->vfs_allocated_count
;
3554 igb_set_vf_rlpml(adapter
, max_frame_size
, pf_id
);
3555 /* If we're in VMDQ or SR-IOV mode, then set global RLPML
3556 * to our max jumbo frame size, in case we need to enable
3557 * jumbo frames on one of the rings later.
3558 * This will not pass over-length frames into the default
3559 * queue because it's gated by the VMOLR.RLPML.
3561 max_frame_size
= MAX_JUMBO_FRAME_SIZE
;
3564 wr32(E1000_RLPML
, max_frame_size
);
3567 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3570 struct e1000_hw
*hw
= &adapter
->hw
;
3573 /* This register exists only on 82576 and newer so if we are older then
3574 * we should exit and do nothing
3576 if (hw
->mac
.type
< e1000_82576
)
3579 vmolr
= rd32(E1000_VMOLR(vfn
));
3580 vmolr
|= E1000_VMOLR_STRVLAN
; /* Strip vlan tags */
3581 if (hw
->mac
.type
== e1000_i350
) {
3584 dvmolr
= rd32(E1000_DVMOLR(vfn
));
3585 dvmolr
|= E1000_DVMOLR_STRVLAN
;
3586 wr32(E1000_DVMOLR(vfn
), dvmolr
);
3589 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3591 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3593 /* clear all bits that might not be set */
3594 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3596 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3597 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3598 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3601 if (vfn
<= adapter
->vfs_allocated_count
)
3602 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3604 wr32(E1000_VMOLR(vfn
), vmolr
);
3608 * igb_configure_rx_ring - Configure a receive ring after Reset
3609 * @adapter: board private structure
3610 * @ring: receive ring to be configured
3612 * Configure the Rx unit of the MAC after a reset.
3614 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3615 struct igb_ring
*ring
)
3617 struct e1000_hw
*hw
= &adapter
->hw
;
3618 u64 rdba
= ring
->dma
;
3619 int reg_idx
= ring
->reg_idx
;
3620 u32 srrctl
= 0, rxdctl
= 0;
3622 /* disable the queue */
3623 wr32(E1000_RXDCTL(reg_idx
), 0);
3625 /* Set DMA base address registers */
3626 wr32(E1000_RDBAL(reg_idx
),
3627 rdba
& 0x00000000ffffffffULL
);
3628 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3629 wr32(E1000_RDLEN(reg_idx
),
3630 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3632 /* initialize head and tail */
3633 ring
->tail
= hw
->hw_addr
+ E1000_RDT(reg_idx
);
3634 wr32(E1000_RDH(reg_idx
), 0);
3635 writel(0, ring
->tail
);
3637 /* set descriptor configuration */
3638 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3639 srrctl
|= IGB_RX_BUFSZ
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3640 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3641 if (hw
->mac
.type
>= e1000_82580
)
3642 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3643 /* Only set Drop Enable if we are supporting multiple queues */
3644 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3645 srrctl
|= E1000_SRRCTL_DROP_EN
;
3647 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3649 /* set filtering for VMDQ pools */
3650 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3652 rxdctl
|= IGB_RX_PTHRESH
;
3653 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3654 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3656 /* enable receive descriptor fetching */
3657 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3658 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3662 * igb_configure_rx - Configure receive Unit after Reset
3663 * @adapter: board private structure
3665 * Configure the Rx unit of the MAC after a reset.
3667 static void igb_configure_rx(struct igb_adapter
*adapter
)
3671 /* set UTA to appropriate mode */
3672 igb_set_uta(adapter
);
3674 /* set the correct pool for the PF default MAC address in entry 0 */
3675 igb_rar_set_qsel(adapter
, adapter
->hw
.mac
.addr
, 0,
3676 adapter
->vfs_allocated_count
);
3678 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3679 * the Base and Length of the Rx Descriptor Ring
3681 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3682 igb_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3686 * igb_free_tx_resources - Free Tx Resources per Queue
3687 * @tx_ring: Tx descriptor ring for a specific queue
3689 * Free all transmit software resources
3691 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3693 igb_clean_tx_ring(tx_ring
);
3695 vfree(tx_ring
->tx_buffer_info
);
3696 tx_ring
->tx_buffer_info
= NULL
;
3698 /* if not set, then don't free */
3702 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3703 tx_ring
->desc
, tx_ring
->dma
);
3705 tx_ring
->desc
= NULL
;
3709 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3710 * @adapter: board private structure
3712 * Free all transmit software resources
3714 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3718 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3719 if (adapter
->tx_ring
[i
])
3720 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3723 void igb_unmap_and_free_tx_resource(struct igb_ring
*ring
,
3724 struct igb_tx_buffer
*tx_buffer
)
3726 if (tx_buffer
->skb
) {
3727 dev_kfree_skb_any(tx_buffer
->skb
);
3728 if (dma_unmap_len(tx_buffer
, len
))
3729 dma_unmap_single(ring
->dev
,
3730 dma_unmap_addr(tx_buffer
, dma
),
3731 dma_unmap_len(tx_buffer
, len
),
3733 } else if (dma_unmap_len(tx_buffer
, len
)) {
3734 dma_unmap_page(ring
->dev
,
3735 dma_unmap_addr(tx_buffer
, dma
),
3736 dma_unmap_len(tx_buffer
, len
),
3739 tx_buffer
->next_to_watch
= NULL
;
3740 tx_buffer
->skb
= NULL
;
3741 dma_unmap_len_set(tx_buffer
, len
, 0);
3742 /* buffer_info must be completely set up in the transmit path */
3746 * igb_clean_tx_ring - Free Tx Buffers
3747 * @tx_ring: ring to be cleaned
3749 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3751 struct igb_tx_buffer
*buffer_info
;
3755 if (!tx_ring
->tx_buffer_info
)
3757 /* Free all the Tx ring sk_buffs */
3759 for (i
= 0; i
< tx_ring
->count
; i
++) {
3760 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
3761 igb_unmap_and_free_tx_resource(tx_ring
, buffer_info
);
3764 netdev_tx_reset_queue(txring_txq(tx_ring
));
3766 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3767 memset(tx_ring
->tx_buffer_info
, 0, size
);
3769 /* Zero out the descriptor ring */
3770 memset(tx_ring
->desc
, 0, tx_ring
->size
);
3772 tx_ring
->next_to_use
= 0;
3773 tx_ring
->next_to_clean
= 0;
3777 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3778 * @adapter: board private structure
3780 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3784 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3785 if (adapter
->tx_ring
[i
])
3786 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3790 * igb_free_rx_resources - Free Rx Resources
3791 * @rx_ring: ring to clean the resources from
3793 * Free all receive software resources
3795 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
3797 igb_clean_rx_ring(rx_ring
);
3799 vfree(rx_ring
->rx_buffer_info
);
3800 rx_ring
->rx_buffer_info
= NULL
;
3802 /* if not set, then don't free */
3806 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
3807 rx_ring
->desc
, rx_ring
->dma
);
3809 rx_ring
->desc
= NULL
;
3813 * igb_free_all_rx_resources - Free Rx Resources for All Queues
3814 * @adapter: board private structure
3816 * Free all receive software resources
3818 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
3822 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3823 if (adapter
->rx_ring
[i
])
3824 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3828 * igb_clean_rx_ring - Free Rx Buffers per Queue
3829 * @rx_ring: ring to free buffers from
3831 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
3837 dev_kfree_skb(rx_ring
->skb
);
3838 rx_ring
->skb
= NULL
;
3840 if (!rx_ring
->rx_buffer_info
)
3843 /* Free all the Rx ring sk_buffs */
3844 for (i
= 0; i
< rx_ring
->count
; i
++) {
3845 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
3847 if (!buffer_info
->page
)
3850 dma_unmap_page(rx_ring
->dev
,
3854 __free_page(buffer_info
->page
);
3856 buffer_info
->page
= NULL
;
3859 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3860 memset(rx_ring
->rx_buffer_info
, 0, size
);
3862 /* Zero out the descriptor ring */
3863 memset(rx_ring
->desc
, 0, rx_ring
->size
);
3865 rx_ring
->next_to_alloc
= 0;
3866 rx_ring
->next_to_clean
= 0;
3867 rx_ring
->next_to_use
= 0;
3871 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
3872 * @adapter: board private structure
3874 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
3878 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3879 if (adapter
->rx_ring
[i
])
3880 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
3884 * igb_set_mac - Change the Ethernet Address of the NIC
3885 * @netdev: network interface device structure
3886 * @p: pointer to an address structure
3888 * Returns 0 on success, negative on failure
3890 static int igb_set_mac(struct net_device
*netdev
, void *p
)
3892 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3893 struct e1000_hw
*hw
= &adapter
->hw
;
3894 struct sockaddr
*addr
= p
;
3896 if (!is_valid_ether_addr(addr
->sa_data
))
3897 return -EADDRNOTAVAIL
;
3899 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
3900 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
3902 /* set the correct pool for the new PF MAC address in entry 0 */
3903 igb_rar_set_qsel(adapter
, hw
->mac
.addr
, 0,
3904 adapter
->vfs_allocated_count
);
3910 * igb_write_mc_addr_list - write multicast addresses to MTA
3911 * @netdev: network interface device structure
3913 * Writes multicast address list to the MTA hash table.
3914 * Returns: -ENOMEM on failure
3915 * 0 on no addresses written
3916 * X on writing X addresses to MTA
3918 static int igb_write_mc_addr_list(struct net_device
*netdev
)
3920 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3921 struct e1000_hw
*hw
= &adapter
->hw
;
3922 struct netdev_hw_addr
*ha
;
3926 if (netdev_mc_empty(netdev
)) {
3927 /* nothing to program, so clear mc list */
3928 igb_update_mc_addr_list(hw
, NULL
, 0);
3929 igb_restore_vf_multicasts(adapter
);
3933 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
3937 /* The shared function expects a packed array of only addresses. */
3939 netdev_for_each_mc_addr(ha
, netdev
)
3940 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3942 igb_update_mc_addr_list(hw
, mta_list
, i
);
3945 return netdev_mc_count(netdev
);
3949 * igb_write_uc_addr_list - write unicast addresses to RAR table
3950 * @netdev: network interface device structure
3952 * Writes unicast address list to the RAR table.
3953 * Returns: -ENOMEM on failure/insufficient address space
3954 * 0 on no addresses written
3955 * X on writing X addresses to the RAR table
3957 static int igb_write_uc_addr_list(struct net_device
*netdev
)
3959 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3960 struct e1000_hw
*hw
= &adapter
->hw
;
3961 unsigned int vfn
= adapter
->vfs_allocated_count
;
3962 unsigned int rar_entries
= hw
->mac
.rar_entry_count
- (vfn
+ 1);
3965 /* return ENOMEM indicating insufficient memory for addresses */
3966 if (netdev_uc_count(netdev
) > rar_entries
)
3969 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3970 struct netdev_hw_addr
*ha
;
3972 netdev_for_each_uc_addr(ha
, netdev
) {
3975 igb_rar_set_qsel(adapter
, ha
->addr
,
3981 /* write the addresses in reverse order to avoid write combining */
3982 for (; rar_entries
> 0 ; rar_entries
--) {
3983 wr32(E1000_RAH(rar_entries
), 0);
3984 wr32(E1000_RAL(rar_entries
), 0);
3992 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
3993 * @netdev: network interface device structure
3995 * The set_rx_mode entry point is called whenever the unicast or multicast
3996 * address lists or the network interface flags are updated. This routine is
3997 * responsible for configuring the hardware for proper unicast, multicast,
3998 * promiscuous mode, and all-multi behavior.
4000 static void igb_set_rx_mode(struct net_device
*netdev
)
4002 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4003 struct e1000_hw
*hw
= &adapter
->hw
;
4004 unsigned int vfn
= adapter
->vfs_allocated_count
;
4005 u32 rctl
, vmolr
= 0;
4008 /* Check for Promiscuous and All Multicast modes */
4009 rctl
= rd32(E1000_RCTL
);
4011 /* clear the effected bits */
4012 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
| E1000_RCTL_VFE
);
4014 if (netdev
->flags
& IFF_PROMISC
) {
4015 /* retain VLAN HW filtering if in VT mode */
4016 if (adapter
->vfs_allocated_count
)
4017 rctl
|= E1000_RCTL_VFE
;
4018 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
4019 vmolr
|= (E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
);
4021 if (netdev
->flags
& IFF_ALLMULTI
) {
4022 rctl
|= E1000_RCTL_MPE
;
4023 vmolr
|= E1000_VMOLR_MPME
;
4025 /* Write addresses to the MTA, if the attempt fails
4026 * then we should just turn on promiscuous mode so
4027 * that we can at least receive multicast traffic
4029 count
= igb_write_mc_addr_list(netdev
);
4031 rctl
|= E1000_RCTL_MPE
;
4032 vmolr
|= E1000_VMOLR_MPME
;
4034 vmolr
|= E1000_VMOLR_ROMPE
;
4037 /* Write addresses to available RAR registers, if there is not
4038 * sufficient space to store all the addresses then enable
4039 * unicast promiscuous mode
4041 count
= igb_write_uc_addr_list(netdev
);
4043 rctl
|= E1000_RCTL_UPE
;
4044 vmolr
|= E1000_VMOLR_ROPE
;
4046 rctl
|= E1000_RCTL_VFE
;
4048 wr32(E1000_RCTL
, rctl
);
4050 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4051 * the VMOLR to enable the appropriate modes. Without this workaround
4052 * we will have issues with VLAN tag stripping not being done for frames
4053 * that are only arriving because we are the default pool
4055 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4058 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4059 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4060 wr32(E1000_VMOLR(vfn
), vmolr
);
4061 igb_restore_vf_multicasts(adapter
);
4064 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4066 struct e1000_hw
*hw
= &adapter
->hw
;
4069 switch (hw
->mac
.type
) {
4072 wvbr
= rd32(E1000_WVBR
);
4080 adapter
->wvbr
|= wvbr
;
4083 #define IGB_STAGGERED_QUEUE_OFFSET 8
4085 static void igb_spoof_check(struct igb_adapter
*adapter
)
4092 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4093 if (adapter
->wvbr
& (1 << j
) ||
4094 adapter
->wvbr
& (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
))) {
4095 dev_warn(&adapter
->pdev
->dev
,
4096 "Spoof event(s) detected on VF %d\n", j
);
4099 (1 << (j
+ IGB_STAGGERED_QUEUE_OFFSET
)));
4104 /* Need to wait a few seconds after link up to get diagnostic information from
4107 static void igb_update_phy_info(unsigned long data
)
4109 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4110 igb_get_phy_info(&adapter
->hw
);
4114 * igb_has_link - check shared code for link and determine up/down
4115 * @adapter: pointer to driver private info
4117 bool igb_has_link(struct igb_adapter
*adapter
)
4119 struct e1000_hw
*hw
= &adapter
->hw
;
4120 bool link_active
= false;
4122 /* get_link_status is set on LSC (link status) interrupt or
4123 * rx sequence error interrupt. get_link_status will stay
4124 * false until the e1000_check_for_link establishes link
4125 * for copper adapters ONLY
4127 switch (hw
->phy
.media_type
) {
4128 case e1000_media_type_copper
:
4129 if (!hw
->mac
.get_link_status
)
4131 case e1000_media_type_internal_serdes
:
4132 hw
->mac
.ops
.check_for_link(hw
);
4133 link_active
= !hw
->mac
.get_link_status
;
4136 case e1000_media_type_unknown
:
4140 if (((hw
->mac
.type
== e1000_i210
) ||
4141 (hw
->mac
.type
== e1000_i211
)) &&
4142 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4143 if (!netif_carrier_ok(adapter
->netdev
)) {
4144 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4145 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4146 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4147 adapter
->link_check_timeout
= jiffies
;
4154 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4157 u32 ctrl_ext
, thstat
;
4159 /* check for thermal sensor event on i350 copper only */
4160 if (hw
->mac
.type
== e1000_i350
) {
4161 thstat
= rd32(E1000_THSTAT
);
4162 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4164 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4165 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4166 ret
= !!(thstat
& event
);
4173 * igb_check_lvmmc - check for malformed packets received
4174 * and indicated in LVMMC register
4175 * @adapter: pointer to adapter
4177 static void igb_check_lvmmc(struct igb_adapter
*adapter
)
4179 struct e1000_hw
*hw
= &adapter
->hw
;
4182 lvmmc
= rd32(E1000_LVMMC
);
4184 if (unlikely(net_ratelimit())) {
4185 netdev_warn(adapter
->netdev
,
4186 "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4193 * igb_watchdog - Timer Call-back
4194 * @data: pointer to adapter cast into an unsigned long
4196 static void igb_watchdog(unsigned long data
)
4198 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4199 /* Do the rest outside of interrupt context */
4200 schedule_work(&adapter
->watchdog_task
);
4203 static void igb_watchdog_task(struct work_struct
*work
)
4205 struct igb_adapter
*adapter
= container_of(work
,
4208 struct e1000_hw
*hw
= &adapter
->hw
;
4209 struct e1000_phy_info
*phy
= &hw
->phy
;
4210 struct net_device
*netdev
= adapter
->netdev
;
4215 link
= igb_has_link(adapter
);
4217 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4218 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4219 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4224 /* Force link down if we have fiber to swap to */
4225 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4226 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4227 connsw
= rd32(E1000_CONNSW
);
4228 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4233 /* Perform a reset if the media type changed. */
4234 if (hw
->dev_spec
._82575
.media_changed
) {
4235 hw
->dev_spec
._82575
.media_changed
= false;
4236 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4239 /* Cancel scheduled suspend requests. */
4240 pm_runtime_resume(netdev
->dev
.parent
);
4242 if (!netif_carrier_ok(netdev
)) {
4245 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4246 &adapter
->link_speed
,
4247 &adapter
->link_duplex
);
4249 ctrl
= rd32(E1000_CTRL
);
4250 /* Links status message must follow this format */
4252 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4254 adapter
->link_speed
,
4255 adapter
->link_duplex
== FULL_DUPLEX
?
4257 (ctrl
& E1000_CTRL_TFCE
) &&
4258 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4259 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4260 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4262 /* disable EEE if enabled */
4263 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4264 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4265 dev_info(&adapter
->pdev
->dev
,
4266 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4267 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4268 adapter
->flags
&= ~IGB_FLAG_EEE
;
4271 /* check if SmartSpeed worked */
4272 igb_check_downshift(hw
);
4273 if (phy
->speed_downgraded
)
4274 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4276 /* check for thermal sensor event */
4277 if (igb_thermal_sensor_event(hw
,
4278 E1000_THSTAT_LINK_THROTTLE
))
4279 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4281 /* adjust timeout factor according to speed/duplex */
4282 adapter
->tx_timeout_factor
= 1;
4283 switch (adapter
->link_speed
) {
4285 adapter
->tx_timeout_factor
= 14;
4288 /* maybe add some timeout factor ? */
4292 netif_carrier_on(netdev
);
4294 igb_ping_all_vfs(adapter
);
4295 igb_check_vf_rate_limit(adapter
);
4297 /* link state has changed, schedule phy info update */
4298 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4299 mod_timer(&adapter
->phy_info_timer
,
4300 round_jiffies(jiffies
+ 2 * HZ
));
4303 if (netif_carrier_ok(netdev
)) {
4304 adapter
->link_speed
= 0;
4305 adapter
->link_duplex
= 0;
4307 /* check for thermal sensor event */
4308 if (igb_thermal_sensor_event(hw
,
4309 E1000_THSTAT_PWR_DOWN
)) {
4310 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4313 /* Links status message must follow this format */
4314 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4316 netif_carrier_off(netdev
);
4318 igb_ping_all_vfs(adapter
);
4320 /* link state has changed, schedule phy info update */
4321 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4322 mod_timer(&adapter
->phy_info_timer
,
4323 round_jiffies(jiffies
+ 2 * HZ
));
4325 /* link is down, time to check for alternate media */
4326 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4327 igb_check_swap_media(adapter
);
4328 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4329 schedule_work(&adapter
->reset_task
);
4330 /* return immediately */
4334 pm_schedule_suspend(netdev
->dev
.parent
,
4337 /* also check for alternate media here */
4338 } else if (!netif_carrier_ok(netdev
) &&
4339 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4340 igb_check_swap_media(adapter
);
4341 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4342 schedule_work(&adapter
->reset_task
);
4343 /* return immediately */
4349 spin_lock(&adapter
->stats64_lock
);
4350 igb_update_stats(adapter
, &adapter
->stats64
);
4351 spin_unlock(&adapter
->stats64_lock
);
4353 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4354 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4355 if (!netif_carrier_ok(netdev
)) {
4356 /* We've lost link, so the controller stops DMA,
4357 * but we've got queued Tx work that's never going
4358 * to get done, so reset controller to flush Tx.
4359 * (Do the reset outside of interrupt context).
4361 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4362 adapter
->tx_timeout_count
++;
4363 schedule_work(&adapter
->reset_task
);
4364 /* return immediately since reset is imminent */
4369 /* Force detection of hung controller every watchdog period */
4370 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4373 /* Cause software interrupt to ensure Rx ring is cleaned */
4374 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4377 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4378 eics
|= adapter
->q_vector
[i
]->eims_value
;
4379 wr32(E1000_EICS
, eics
);
4381 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4384 igb_spoof_check(adapter
);
4385 igb_ptp_rx_hang(adapter
);
4387 /* Check LVMMC register on i350/i354 only */
4388 if ((adapter
->hw
.mac
.type
== e1000_i350
) ||
4389 (adapter
->hw
.mac
.type
== e1000_i354
))
4390 igb_check_lvmmc(adapter
);
4392 /* Reset the timer */
4393 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4394 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4395 mod_timer(&adapter
->watchdog_timer
,
4396 round_jiffies(jiffies
+ HZ
));
4398 mod_timer(&adapter
->watchdog_timer
,
4399 round_jiffies(jiffies
+ 2 * HZ
));
4403 enum latency_range
{
4407 latency_invalid
= 255
4411 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4412 * @q_vector: pointer to q_vector
4414 * Stores a new ITR value based on strictly on packet size. This
4415 * algorithm is less sophisticated than that used in igb_update_itr,
4416 * due to the difficulty of synchronizing statistics across multiple
4417 * receive rings. The divisors and thresholds used by this function
4418 * were determined based on theoretical maximum wire speed and testing
4419 * data, in order to minimize response time while increasing bulk
4421 * This functionality is controlled by ethtool's coalescing settings.
4422 * NOTE: This function is called only when operating in a multiqueue
4423 * receive environment.
4425 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4427 int new_val
= q_vector
->itr_val
;
4428 int avg_wire_size
= 0;
4429 struct igb_adapter
*adapter
= q_vector
->adapter
;
4430 unsigned int packets
;
4432 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4433 * ints/sec - ITR timer value of 120 ticks.
4435 if (adapter
->link_speed
!= SPEED_1000
) {
4436 new_val
= IGB_4K_ITR
;
4440 packets
= q_vector
->rx
.total_packets
;
4442 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4444 packets
= q_vector
->tx
.total_packets
;
4446 avg_wire_size
= max_t(u32
, avg_wire_size
,
4447 q_vector
->tx
.total_bytes
/ packets
);
4449 /* if avg_wire_size isn't set no work was done */
4453 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4454 avg_wire_size
+= 24;
4456 /* Don't starve jumbo frames */
4457 avg_wire_size
= min(avg_wire_size
, 3000);
4459 /* Give a little boost to mid-size frames */
4460 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4461 new_val
= avg_wire_size
/ 3;
4463 new_val
= avg_wire_size
/ 2;
4465 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4466 if (new_val
< IGB_20K_ITR
&&
4467 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4468 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4469 new_val
= IGB_20K_ITR
;
4472 if (new_val
!= q_vector
->itr_val
) {
4473 q_vector
->itr_val
= new_val
;
4474 q_vector
->set_itr
= 1;
4477 q_vector
->rx
.total_bytes
= 0;
4478 q_vector
->rx
.total_packets
= 0;
4479 q_vector
->tx
.total_bytes
= 0;
4480 q_vector
->tx
.total_packets
= 0;
4484 * igb_update_itr - update the dynamic ITR value based on statistics
4485 * @q_vector: pointer to q_vector
4486 * @ring_container: ring info to update the itr for
4488 * Stores a new ITR value based on packets and byte
4489 * counts during the last interrupt. The advantage of per interrupt
4490 * computation is faster updates and more accurate ITR for the current
4491 * traffic pattern. Constants in this function were computed
4492 * based on theoretical maximum wire speed and thresholds were set based
4493 * on testing data as well as attempting to minimize response time
4494 * while increasing bulk throughput.
4495 * This functionality is controlled by ethtool's coalescing settings.
4496 * NOTE: These calculations are only valid when operating in a single-
4497 * queue environment.
4499 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4500 struct igb_ring_container
*ring_container
)
4502 unsigned int packets
= ring_container
->total_packets
;
4503 unsigned int bytes
= ring_container
->total_bytes
;
4504 u8 itrval
= ring_container
->itr
;
4506 /* no packets, exit with status unchanged */
4511 case lowest_latency
:
4512 /* handle TSO and jumbo frames */
4513 if (bytes
/packets
> 8000)
4514 itrval
= bulk_latency
;
4515 else if ((packets
< 5) && (bytes
> 512))
4516 itrval
= low_latency
;
4518 case low_latency
: /* 50 usec aka 20000 ints/s */
4519 if (bytes
> 10000) {
4520 /* this if handles the TSO accounting */
4521 if (bytes
/packets
> 8000)
4522 itrval
= bulk_latency
;
4523 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4524 itrval
= bulk_latency
;
4525 else if ((packets
> 35))
4526 itrval
= lowest_latency
;
4527 } else if (bytes
/packets
> 2000) {
4528 itrval
= bulk_latency
;
4529 } else if (packets
<= 2 && bytes
< 512) {
4530 itrval
= lowest_latency
;
4533 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4534 if (bytes
> 25000) {
4536 itrval
= low_latency
;
4537 } else if (bytes
< 1500) {
4538 itrval
= low_latency
;
4543 /* clear work counters since we have the values we need */
4544 ring_container
->total_bytes
= 0;
4545 ring_container
->total_packets
= 0;
4547 /* write updated itr to ring container */
4548 ring_container
->itr
= itrval
;
4551 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4553 struct igb_adapter
*adapter
= q_vector
->adapter
;
4554 u32 new_itr
= q_vector
->itr_val
;
4557 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4558 if (adapter
->link_speed
!= SPEED_1000
) {
4560 new_itr
= IGB_4K_ITR
;
4564 igb_update_itr(q_vector
, &q_vector
->tx
);
4565 igb_update_itr(q_vector
, &q_vector
->rx
);
4567 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4569 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4570 if (current_itr
== lowest_latency
&&
4571 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4572 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4573 current_itr
= low_latency
;
4575 switch (current_itr
) {
4576 /* counts and packets in update_itr are dependent on these numbers */
4577 case lowest_latency
:
4578 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4581 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4584 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4591 if (new_itr
!= q_vector
->itr_val
) {
4592 /* this attempts to bias the interrupt rate towards Bulk
4593 * by adding intermediate steps when interrupt rate is
4596 new_itr
= new_itr
> q_vector
->itr_val
?
4597 max((new_itr
* q_vector
->itr_val
) /
4598 (new_itr
+ (q_vector
->itr_val
>> 2)),
4600 /* Don't write the value here; it resets the adapter's
4601 * internal timer, and causes us to delay far longer than
4602 * we should between interrupts. Instead, we write the ITR
4603 * value at the beginning of the next interrupt so the timing
4604 * ends up being correct.
4606 q_vector
->itr_val
= new_itr
;
4607 q_vector
->set_itr
= 1;
4611 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4612 u32 type_tucmd
, u32 mss_l4len_idx
)
4614 struct e1000_adv_tx_context_desc
*context_desc
;
4615 u16 i
= tx_ring
->next_to_use
;
4617 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4620 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4622 /* set bits to identify this as an advanced context descriptor */
4623 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4625 /* For 82575, context index must be unique per ring. */
4626 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4627 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4629 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4630 context_desc
->seqnum_seed
= 0;
4631 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4632 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4635 static int igb_tso(struct igb_ring
*tx_ring
,
4636 struct igb_tx_buffer
*first
,
4639 struct sk_buff
*skb
= first
->skb
;
4640 u32 vlan_macip_lens
, type_tucmd
;
4641 u32 mss_l4len_idx
, l4len
;
4644 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4647 if (!skb_is_gso(skb
))
4650 err
= skb_cow_head(skb
, 0);
4654 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
4655 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
4657 if (first
->protocol
== htons(ETH_P_IP
)) {
4658 struct iphdr
*iph
= ip_hdr(skb
);
4661 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
4665 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4666 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4669 } else if (skb_is_gso_v6(skb
)) {
4670 ipv6_hdr(skb
)->payload_len
= 0;
4671 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
4672 &ipv6_hdr(skb
)->daddr
,
4674 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
4678 /* compute header lengths */
4679 l4len
= tcp_hdrlen(skb
);
4680 *hdr_len
= skb_transport_offset(skb
) + l4len
;
4682 /* update gso size and bytecount with header size */
4683 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
4684 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
4687 mss_l4len_idx
= l4len
<< E1000_ADVTXD_L4LEN_SHIFT
;
4688 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
4690 /* VLAN MACLEN IPLEN */
4691 vlan_macip_lens
= skb_network_header_len(skb
);
4692 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4693 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4695 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4700 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
4702 struct sk_buff
*skb
= first
->skb
;
4703 u32 vlan_macip_lens
= 0;
4704 u32 mss_l4len_idx
= 0;
4707 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
4708 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
4713 switch (first
->protocol
) {
4714 case htons(ETH_P_IP
):
4715 vlan_macip_lens
|= skb_network_header_len(skb
);
4716 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
4717 l4_hdr
= ip_hdr(skb
)->protocol
;
4719 case htons(ETH_P_IPV6
):
4720 vlan_macip_lens
|= skb_network_header_len(skb
);
4721 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
4724 if (unlikely(net_ratelimit())) {
4725 dev_warn(tx_ring
->dev
,
4726 "partial checksum but proto=%x!\n",
4734 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_TCP
;
4735 mss_l4len_idx
= tcp_hdrlen(skb
) <<
4736 E1000_ADVTXD_L4LEN_SHIFT
;
4739 type_tucmd
|= E1000_ADVTXD_TUCMD_L4T_SCTP
;
4740 mss_l4len_idx
= sizeof(struct sctphdr
) <<
4741 E1000_ADVTXD_L4LEN_SHIFT
;
4744 mss_l4len_idx
= sizeof(struct udphdr
) <<
4745 E1000_ADVTXD_L4LEN_SHIFT
;
4748 if (unlikely(net_ratelimit())) {
4749 dev_warn(tx_ring
->dev
,
4750 "partial checksum but l4 proto=%x!\n",
4756 /* update TX checksum flag */
4757 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
4760 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
4761 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
4763 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
4766 #define IGB_SET_FLAG(_input, _flag, _result) \
4767 ((_flag <= _result) ? \
4768 ((u32)(_input & _flag) * (_result / _flag)) : \
4769 ((u32)(_input & _flag) / (_flag / _result)))
4771 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
4773 /* set type for advanced descriptor with frame checksum insertion */
4774 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
4775 E1000_ADVTXD_DCMD_DEXT
|
4776 E1000_ADVTXD_DCMD_IFCS
;
4778 /* set HW vlan bit if vlan is present */
4779 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
4780 (E1000_ADVTXD_DCMD_VLE
));
4782 /* set segmentation bits for TSO */
4783 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
4784 (E1000_ADVTXD_DCMD_TSE
));
4786 /* set timestamp bit if present */
4787 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
4788 (E1000_ADVTXD_MAC_TSTAMP
));
4790 /* insert frame checksum */
4791 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
4796 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
4797 union e1000_adv_tx_desc
*tx_desc
,
4798 u32 tx_flags
, unsigned int paylen
)
4800 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
4802 /* 82575 requires a unique index per ring */
4803 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4804 olinfo_status
|= tx_ring
->reg_idx
<< 4;
4806 /* insert L4 checksum */
4807 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4809 (E1000_TXD_POPTS_TXSM
<< 8));
4811 /* insert IPv4 checksum */
4812 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
4814 (E1000_TXD_POPTS_IXSM
<< 8));
4816 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
4819 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4821 struct net_device
*netdev
= tx_ring
->netdev
;
4823 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
4825 /* Herbert's original patch had:
4826 * smp_mb__after_netif_stop_queue();
4827 * but since that doesn't exist yet, just open code it.
4831 /* We need to check again in a case another CPU has just
4832 * made room available.
4834 if (igb_desc_unused(tx_ring
) < size
)
4838 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
4840 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
4841 tx_ring
->tx_stats
.restart_queue2
++;
4842 u64_stats_update_end(&tx_ring
->tx_syncp2
);
4847 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
4849 if (igb_desc_unused(tx_ring
) >= size
)
4851 return __igb_maybe_stop_tx(tx_ring
, size
);
4854 static void igb_tx_map(struct igb_ring
*tx_ring
,
4855 struct igb_tx_buffer
*first
,
4858 struct sk_buff
*skb
= first
->skb
;
4859 struct igb_tx_buffer
*tx_buffer
;
4860 union e1000_adv_tx_desc
*tx_desc
;
4861 struct skb_frag_struct
*frag
;
4863 unsigned int data_len
, size
;
4864 u32 tx_flags
= first
->tx_flags
;
4865 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
4866 u16 i
= tx_ring
->next_to_use
;
4868 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
4870 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
4872 size
= skb_headlen(skb
);
4873 data_len
= skb
->data_len
;
4875 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
4879 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
4880 if (dma_mapping_error(tx_ring
->dev
, dma
))
4883 /* record length, and DMA address */
4884 dma_unmap_len_set(tx_buffer
, len
, size
);
4885 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
4887 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4889 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
4890 tx_desc
->read
.cmd_type_len
=
4891 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
4895 if (i
== tx_ring
->count
) {
4896 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4899 tx_desc
->read
.olinfo_status
= 0;
4901 dma
+= IGB_MAX_DATA_PER_TXD
;
4902 size
-= IGB_MAX_DATA_PER_TXD
;
4904 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
4907 if (likely(!data_len
))
4910 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
4914 if (i
== tx_ring
->count
) {
4915 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
4918 tx_desc
->read
.olinfo_status
= 0;
4920 size
= skb_frag_size(frag
);
4923 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
4924 size
, DMA_TO_DEVICE
);
4926 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4929 /* write last descriptor with RS and EOP bits */
4930 cmd_type
|= size
| IGB_TXD_DCMD
;
4931 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
4933 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
4935 /* set the timestamp */
4936 first
->time_stamp
= jiffies
;
4938 /* Force memory writes to complete before letting h/w know there
4939 * are new descriptors to fetch. (Only applicable for weak-ordered
4940 * memory model archs, such as IA-64).
4942 * We also need this memory barrier to make certain all of the
4943 * status bits have been updated before next_to_watch is written.
4947 /* set next_to_watch value indicating a packet is present */
4948 first
->next_to_watch
= tx_desc
;
4951 if (i
== tx_ring
->count
)
4954 tx_ring
->next_to_use
= i
;
4956 /* Make sure there is space in the ring for the next send. */
4957 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
4959 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
4960 writel(i
, tx_ring
->tail
);
4962 /* we need this if more than one processor can write to our tail
4963 * at a time, it synchronizes IO on IA64/Altix systems
4970 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
4972 /* clear dma mappings for failed tx_buffer_info map */
4974 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
4975 igb_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
4976 if (tx_buffer
== first
)
4983 tx_ring
->next_to_use
= i
;
4986 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
4987 struct igb_ring
*tx_ring
)
4989 struct igb_tx_buffer
*first
;
4993 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
4994 __be16 protocol
= vlan_get_protocol(skb
);
4997 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
4998 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
4999 * + 2 desc gap to keep tail from touching head,
5000 * + 1 desc for context descriptor,
5001 * otherwise try next time
5003 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
5004 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
5006 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
5007 /* this is a hard error */
5008 return NETDEV_TX_BUSY
;
5011 /* record the location of the first descriptor for this packet */
5012 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
5014 first
->bytecount
= skb
->len
;
5015 first
->gso_segs
= 1;
5017 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
5018 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
5020 if (!test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
5022 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
5023 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
5025 adapter
->ptp_tx_skb
= skb_get(skb
);
5026 adapter
->ptp_tx_start
= jiffies
;
5027 if (adapter
->hw
.mac
.type
== e1000_82576
)
5028 schedule_work(&adapter
->ptp_tx_work
);
5032 skb_tx_timestamp(skb
);
5034 if (skb_vlan_tag_present(skb
)) {
5035 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5036 tx_flags
|= (skb_vlan_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5039 /* record initial flags and protocol */
5040 first
->tx_flags
= tx_flags
;
5041 first
->protocol
= protocol
;
5043 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5047 igb_tx_csum(tx_ring
, first
);
5049 igb_tx_map(tx_ring
, first
, hdr_len
);
5051 return NETDEV_TX_OK
;
5054 igb_unmap_and_free_tx_resource(tx_ring
, first
);
5056 return NETDEV_TX_OK
;
5059 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5060 struct sk_buff
*skb
)
5062 unsigned int r_idx
= skb
->queue_mapping
;
5064 if (r_idx
>= adapter
->num_tx_queues
)
5065 r_idx
= r_idx
% adapter
->num_tx_queues
;
5067 return adapter
->tx_ring
[r_idx
];
5070 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5071 struct net_device
*netdev
)
5073 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5075 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5076 dev_kfree_skb_any(skb
);
5077 return NETDEV_TX_OK
;
5080 if (skb
->len
<= 0) {
5081 dev_kfree_skb_any(skb
);
5082 return NETDEV_TX_OK
;
5085 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5086 * in order to meet this minimum size requirement.
5088 if (skb_put_padto(skb
, 17))
5089 return NETDEV_TX_OK
;
5091 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5095 * igb_tx_timeout - Respond to a Tx Hang
5096 * @netdev: network interface device structure
5098 static void igb_tx_timeout(struct net_device
*netdev
)
5100 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5101 struct e1000_hw
*hw
= &adapter
->hw
;
5103 /* Do the reset outside of interrupt context */
5104 adapter
->tx_timeout_count
++;
5106 if (hw
->mac
.type
>= e1000_82580
)
5107 hw
->dev_spec
._82575
.global_device_reset
= true;
5109 schedule_work(&adapter
->reset_task
);
5111 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5114 static void igb_reset_task(struct work_struct
*work
)
5116 struct igb_adapter
*adapter
;
5117 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5120 netdev_err(adapter
->netdev
, "Reset adapter\n");
5121 igb_reinit_locked(adapter
);
5125 * igb_get_stats64 - Get System Network Statistics
5126 * @netdev: network interface device structure
5127 * @stats: rtnl_link_stats64 pointer
5129 static struct rtnl_link_stats64
*igb_get_stats64(struct net_device
*netdev
,
5130 struct rtnl_link_stats64
*stats
)
5132 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5134 spin_lock(&adapter
->stats64_lock
);
5135 igb_update_stats(adapter
, &adapter
->stats64
);
5136 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5137 spin_unlock(&adapter
->stats64_lock
);
5143 * igb_change_mtu - Change the Maximum Transfer Unit
5144 * @netdev: network interface device structure
5145 * @new_mtu: new value for maximum frame size
5147 * Returns 0 on success, negative on failure
5149 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5151 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5152 struct pci_dev
*pdev
= adapter
->pdev
;
5153 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5155 if ((new_mtu
< 68) || (max_frame
> MAX_JUMBO_FRAME_SIZE
)) {
5156 dev_err(&pdev
->dev
, "Invalid MTU setting\n");
5160 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5161 if (max_frame
> MAX_STD_JUMBO_FRAME_SIZE
) {
5162 dev_err(&pdev
->dev
, "MTU > 9216 not supported.\n");
5166 /* adjust max frame to be at least the size of a standard frame */
5167 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5168 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5170 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5171 usleep_range(1000, 2000);
5173 /* igb_down has a dependency on max_frame_size */
5174 adapter
->max_frame_size
= max_frame
;
5176 if (netif_running(netdev
))
5179 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5180 netdev
->mtu
, new_mtu
);
5181 netdev
->mtu
= new_mtu
;
5183 if (netif_running(netdev
))
5188 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5194 * igb_update_stats - Update the board statistics counters
5195 * @adapter: board private structure
5197 void igb_update_stats(struct igb_adapter
*adapter
,
5198 struct rtnl_link_stats64
*net_stats
)
5200 struct e1000_hw
*hw
= &adapter
->hw
;
5201 struct pci_dev
*pdev
= adapter
->pdev
;
5206 u64 _bytes
, _packets
;
5208 /* Prevent stats update while adapter is being reset, or if the pci
5209 * connection is down.
5211 if (adapter
->link_speed
== 0)
5213 if (pci_channel_offline(pdev
))
5220 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5221 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5222 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5223 if (hw
->mac
.type
>= e1000_i210
)
5224 wr32(E1000_RQDPC(i
), 0);
5227 ring
->rx_stats
.drops
+= rqdpc
;
5228 net_stats
->rx_fifo_errors
+= rqdpc
;
5232 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5233 _bytes
= ring
->rx_stats
.bytes
;
5234 _packets
= ring
->rx_stats
.packets
;
5235 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5237 packets
+= _packets
;
5240 net_stats
->rx_bytes
= bytes
;
5241 net_stats
->rx_packets
= packets
;
5245 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5246 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5248 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5249 _bytes
= ring
->tx_stats
.bytes
;
5250 _packets
= ring
->tx_stats
.packets
;
5251 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5253 packets
+= _packets
;
5255 net_stats
->tx_bytes
= bytes
;
5256 net_stats
->tx_packets
= packets
;
5259 /* read stats registers */
5260 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5261 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5262 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5263 rd32(E1000_GORCH
); /* clear GORCL */
5264 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5265 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5266 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5268 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5269 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5270 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5271 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5272 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5273 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5274 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5275 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5277 mpc
= rd32(E1000_MPC
);
5278 adapter
->stats
.mpc
+= mpc
;
5279 net_stats
->rx_fifo_errors
+= mpc
;
5280 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5281 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5282 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5283 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5284 adapter
->stats
.dc
+= rd32(E1000_DC
);
5285 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5286 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5287 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5288 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5289 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5290 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5291 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5292 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5293 rd32(E1000_GOTCH
); /* clear GOTCL */
5294 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5295 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5296 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5297 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5298 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5299 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5300 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5302 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5303 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5304 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5305 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5306 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5307 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5309 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5310 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5312 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5313 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5315 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5316 /* read internal phy specific stats */
5317 reg
= rd32(E1000_CTRL_EXT
);
5318 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5319 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5321 /* this stat has invalid values on i210/i211 */
5322 if ((hw
->mac
.type
!= e1000_i210
) &&
5323 (hw
->mac
.type
!= e1000_i211
))
5324 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5327 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5328 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5330 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5331 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5332 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5333 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5334 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5335 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5336 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5337 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5338 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5340 /* Fill out the OS statistics structure */
5341 net_stats
->multicast
= adapter
->stats
.mprc
;
5342 net_stats
->collisions
= adapter
->stats
.colc
;
5346 /* RLEC on some newer hardware can be incorrect so build
5347 * our own version based on RUC and ROC
5349 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5350 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5351 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5352 adapter
->stats
.cexterr
;
5353 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5355 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5356 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5357 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5360 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5361 adapter
->stats
.latecol
;
5362 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5363 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5364 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5366 /* Tx Dropped needs to be maintained elsewhere */
5368 /* Management Stats */
5369 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5370 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5371 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5374 reg
= rd32(E1000_MANC
);
5375 if (reg
& E1000_MANC_EN_BMC2OS
) {
5376 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5377 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5378 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5379 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5383 static void igb_tsync_interrupt(struct igb_adapter
*adapter
)
5385 struct e1000_hw
*hw
= &adapter
->hw
;
5386 struct ptp_clock_event event
;
5388 u32 ack
= 0, tsauxc
, sec
, nsec
, tsicr
= rd32(E1000_TSICR
);
5390 if (tsicr
& TSINTR_SYS_WRAP
) {
5391 event
.type
= PTP_CLOCK_PPS
;
5392 if (adapter
->ptp_caps
.pps
)
5393 ptp_clock_event(adapter
->ptp_clock
, &event
);
5395 dev_err(&adapter
->pdev
->dev
, "unexpected SYS WRAP");
5396 ack
|= TSINTR_SYS_WRAP
;
5399 if (tsicr
& E1000_TSICR_TXTS
) {
5400 /* retrieve hardware timestamp */
5401 schedule_work(&adapter
->ptp_tx_work
);
5402 ack
|= E1000_TSICR_TXTS
;
5405 if (tsicr
& TSINTR_TT0
) {
5406 spin_lock(&adapter
->tmreg_lock
);
5407 ts
= timespec_add(adapter
->perout
[0].start
,
5408 adapter
->perout
[0].period
);
5409 wr32(E1000_TRGTTIML0
, ts
.tv_nsec
);
5410 wr32(E1000_TRGTTIMH0
, ts
.tv_sec
);
5411 tsauxc
= rd32(E1000_TSAUXC
);
5412 tsauxc
|= TSAUXC_EN_TT0
;
5413 wr32(E1000_TSAUXC
, tsauxc
);
5414 adapter
->perout
[0].start
= ts
;
5415 spin_unlock(&adapter
->tmreg_lock
);
5419 if (tsicr
& TSINTR_TT1
) {
5420 spin_lock(&adapter
->tmreg_lock
);
5421 ts
= timespec_add(adapter
->perout
[1].start
,
5422 adapter
->perout
[1].period
);
5423 wr32(E1000_TRGTTIML1
, ts
.tv_nsec
);
5424 wr32(E1000_TRGTTIMH1
, ts
.tv_sec
);
5425 tsauxc
= rd32(E1000_TSAUXC
);
5426 tsauxc
|= TSAUXC_EN_TT1
;
5427 wr32(E1000_TSAUXC
, tsauxc
);
5428 adapter
->perout
[1].start
= ts
;
5429 spin_unlock(&adapter
->tmreg_lock
);
5433 if (tsicr
& TSINTR_AUTT0
) {
5434 nsec
= rd32(E1000_AUXSTMPL0
);
5435 sec
= rd32(E1000_AUXSTMPH0
);
5436 event
.type
= PTP_CLOCK_EXTTS
;
5438 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5439 ptp_clock_event(adapter
->ptp_clock
, &event
);
5440 ack
|= TSINTR_AUTT0
;
5443 if (tsicr
& TSINTR_AUTT1
) {
5444 nsec
= rd32(E1000_AUXSTMPL1
);
5445 sec
= rd32(E1000_AUXSTMPH1
);
5446 event
.type
= PTP_CLOCK_EXTTS
;
5448 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5449 ptp_clock_event(adapter
->ptp_clock
, &event
);
5450 ack
|= TSINTR_AUTT1
;
5453 /* acknowledge the interrupts */
5454 wr32(E1000_TSICR
, ack
);
5457 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5459 struct igb_adapter
*adapter
= data
;
5460 struct e1000_hw
*hw
= &adapter
->hw
;
5461 u32 icr
= rd32(E1000_ICR
);
5462 /* reading ICR causes bit 31 of EICR to be cleared */
5464 if (icr
& E1000_ICR_DRSTA
)
5465 schedule_work(&adapter
->reset_task
);
5467 if (icr
& E1000_ICR_DOUTSYNC
) {
5468 /* HW is reporting DMA is out of sync */
5469 adapter
->stats
.doosync
++;
5470 /* The DMA Out of Sync is also indication of a spoof event
5471 * in IOV mode. Check the Wrong VM Behavior register to
5472 * see if it is really a spoof event.
5474 igb_check_wvbr(adapter
);
5477 /* Check for a mailbox event */
5478 if (icr
& E1000_ICR_VMMB
)
5479 igb_msg_task(adapter
);
5481 if (icr
& E1000_ICR_LSC
) {
5482 hw
->mac
.get_link_status
= 1;
5483 /* guard against interrupt when we're going down */
5484 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5485 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5488 if (icr
& E1000_ICR_TS
)
5489 igb_tsync_interrupt(adapter
);
5491 wr32(E1000_EIMS
, adapter
->eims_other
);
5496 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5498 struct igb_adapter
*adapter
= q_vector
->adapter
;
5499 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5501 if (!q_vector
->set_itr
)
5507 if (adapter
->hw
.mac
.type
== e1000_82575
)
5508 itr_val
|= itr_val
<< 16;
5510 itr_val
|= E1000_EITR_CNT_IGNR
;
5512 writel(itr_val
, q_vector
->itr_register
);
5513 q_vector
->set_itr
= 0;
5516 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5518 struct igb_q_vector
*q_vector
= data
;
5520 /* Write the ITR value calculated from the previous interrupt. */
5521 igb_write_itr(q_vector
);
5523 napi_schedule(&q_vector
->napi
);
5528 #ifdef CONFIG_IGB_DCA
5529 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5530 struct igb_ring
*tx_ring
,
5533 struct e1000_hw
*hw
= &adapter
->hw
;
5534 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5536 if (hw
->mac
.type
!= e1000_82575
)
5537 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5539 /* We can enable relaxed ordering for reads, but not writes when
5540 * DCA is enabled. This is due to a known issue in some chipsets
5541 * which will cause the DCA tag to be cleared.
5543 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5544 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5545 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5547 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5550 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5551 struct igb_ring
*rx_ring
,
5554 struct e1000_hw
*hw
= &adapter
->hw
;
5555 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5557 if (hw
->mac
.type
!= e1000_82575
)
5558 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5560 /* We can enable relaxed ordering for reads, but not writes when
5561 * DCA is enabled. This is due to a known issue in some chipsets
5562 * which will cause the DCA tag to be cleared.
5564 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5565 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5567 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5570 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5572 struct igb_adapter
*adapter
= q_vector
->adapter
;
5573 int cpu
= get_cpu();
5575 if (q_vector
->cpu
== cpu
)
5578 if (q_vector
->tx
.ring
)
5579 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5581 if (q_vector
->rx
.ring
)
5582 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5584 q_vector
->cpu
= cpu
;
5589 static void igb_setup_dca(struct igb_adapter
*adapter
)
5591 struct e1000_hw
*hw
= &adapter
->hw
;
5594 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5597 /* Always use CB2 mode, difference is masked in the CB driver. */
5598 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5600 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5601 adapter
->q_vector
[i
]->cpu
= -1;
5602 igb_update_dca(adapter
->q_vector
[i
]);
5606 static int __igb_notify_dca(struct device
*dev
, void *data
)
5608 struct net_device
*netdev
= dev_get_drvdata(dev
);
5609 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5610 struct pci_dev
*pdev
= adapter
->pdev
;
5611 struct e1000_hw
*hw
= &adapter
->hw
;
5612 unsigned long event
= *(unsigned long *)data
;
5615 case DCA_PROVIDER_ADD
:
5616 /* if already enabled, don't do it again */
5617 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5619 if (dca_add_requester(dev
) == 0) {
5620 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5621 dev_info(&pdev
->dev
, "DCA enabled\n");
5622 igb_setup_dca(adapter
);
5625 /* Fall Through since DCA is disabled. */
5626 case DCA_PROVIDER_REMOVE
:
5627 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5628 /* without this a class_device is left
5629 * hanging around in the sysfs model
5631 dca_remove_requester(dev
);
5632 dev_info(&pdev
->dev
, "DCA disabled\n");
5633 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5634 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5642 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
5647 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
5650 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
5652 #endif /* CONFIG_IGB_DCA */
5654 #ifdef CONFIG_PCI_IOV
5655 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
5657 unsigned char mac_addr
[ETH_ALEN
];
5659 eth_zero_addr(mac_addr
);
5660 igb_set_vf_mac(adapter
, vf
, mac_addr
);
5662 /* By default spoof check is enabled for all VFs */
5663 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
5669 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
5671 struct e1000_hw
*hw
= &adapter
->hw
;
5675 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
5676 ping
= E1000_PF_CONTROL_MSG
;
5677 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
5678 ping
|= E1000_VT_MSGTYPE_CTS
;
5679 igb_write_mbx(hw
, &ping
, 1, i
);
5683 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5685 struct e1000_hw
*hw
= &adapter
->hw
;
5686 u32 vmolr
= rd32(E1000_VMOLR(vf
));
5687 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5689 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
5690 IGB_VF_FLAG_MULTI_PROMISC
);
5691 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5693 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
5694 vmolr
|= E1000_VMOLR_MPME
;
5695 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
5696 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
5698 /* if we have hashes and we are clearing a multicast promisc
5699 * flag we need to write the hashes to the MTA as this step
5700 * was previously skipped
5702 if (vf_data
->num_vf_mc_hashes
> 30) {
5703 vmolr
|= E1000_VMOLR_MPME
;
5704 } else if (vf_data
->num_vf_mc_hashes
) {
5707 vmolr
|= E1000_VMOLR_ROMPE
;
5708 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5709 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5713 wr32(E1000_VMOLR(vf
), vmolr
);
5715 /* there are flags left unprocessed, likely not supported */
5716 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
5722 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
5723 u32
*msgbuf
, u32 vf
)
5725 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5726 u16
*hash_list
= (u16
*)&msgbuf
[1];
5727 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
5730 /* salt away the number of multicast addresses assigned
5731 * to this VF for later use to restore when the PF multi cast
5734 vf_data
->num_vf_mc_hashes
= n
;
5736 /* only up to 30 hash values supported */
5740 /* store the hashes for later use */
5741 for (i
= 0; i
< n
; i
++)
5742 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
5744 /* Flush and reset the mta with the new values */
5745 igb_set_rx_mode(adapter
->netdev
);
5750 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
5752 struct e1000_hw
*hw
= &adapter
->hw
;
5753 struct vf_data_storage
*vf_data
;
5756 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
5757 u32 vmolr
= rd32(E1000_VMOLR(i
));
5759 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
5761 vf_data
= &adapter
->vf_data
[i
];
5763 if ((vf_data
->num_vf_mc_hashes
> 30) ||
5764 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
5765 vmolr
|= E1000_VMOLR_MPME
;
5766 } else if (vf_data
->num_vf_mc_hashes
) {
5767 vmolr
|= E1000_VMOLR_ROMPE
;
5768 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
5769 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
5771 wr32(E1000_VMOLR(i
), vmolr
);
5775 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
5777 struct e1000_hw
*hw
= &adapter
->hw
;
5778 u32 pool_mask
, reg
, vid
;
5781 pool_mask
= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5783 /* Find the vlan filter for this id */
5784 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5785 reg
= rd32(E1000_VLVF(i
));
5787 /* remove the vf from the pool */
5790 /* if pool is empty then remove entry from vfta */
5791 if (!(reg
& E1000_VLVF_POOLSEL_MASK
) &&
5792 (reg
& E1000_VLVF_VLANID_ENABLE
)) {
5794 vid
= reg
& E1000_VLVF_VLANID_MASK
;
5795 igb_vfta_set(hw
, vid
, false);
5798 wr32(E1000_VLVF(i
), reg
);
5801 adapter
->vf_data
[vf
].vlans_enabled
= 0;
5804 static s32
igb_vlvf_set(struct igb_adapter
*adapter
, u32 vid
, bool add
, u32 vf
)
5806 struct e1000_hw
*hw
= &adapter
->hw
;
5809 /* The vlvf table only exists on 82576 hardware and newer */
5810 if (hw
->mac
.type
< e1000_82576
)
5813 /* we only need to do this if VMDq is enabled */
5814 if (!adapter
->vfs_allocated_count
)
5817 /* Find the vlan filter for this id */
5818 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5819 reg
= rd32(E1000_VLVF(i
));
5820 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5821 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5826 if (i
== E1000_VLVF_ARRAY_SIZE
) {
5827 /* Did not find a matching VLAN ID entry that was
5828 * enabled. Search for a free filter entry, i.e.
5829 * one without the enable bit set
5831 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5832 reg
= rd32(E1000_VLVF(i
));
5833 if (!(reg
& E1000_VLVF_VLANID_ENABLE
))
5837 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5838 /* Found an enabled/available entry */
5839 reg
|= 1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
);
5841 /* if !enabled we need to set this up in vfta */
5842 if (!(reg
& E1000_VLVF_VLANID_ENABLE
)) {
5843 /* add VID to filter table */
5844 igb_vfta_set(hw
, vid
, true);
5845 reg
|= E1000_VLVF_VLANID_ENABLE
;
5847 reg
&= ~E1000_VLVF_VLANID_MASK
;
5849 wr32(E1000_VLVF(i
), reg
);
5851 /* do not modify RLPML for PF devices */
5852 if (vf
>= adapter
->vfs_allocated_count
)
5855 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5858 reg
= rd32(E1000_VMOLR(vf
));
5859 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5861 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5863 wr32(E1000_VMOLR(vf
), reg
);
5866 adapter
->vf_data
[vf
].vlans_enabled
++;
5869 if (i
< E1000_VLVF_ARRAY_SIZE
) {
5870 /* remove vf from the pool */
5871 reg
&= ~(1 << (E1000_VLVF_POOLSEL_SHIFT
+ vf
));
5872 /* if pool is empty then remove entry from vfta */
5873 if (!(reg
& E1000_VLVF_POOLSEL_MASK
)) {
5875 igb_vfta_set(hw
, vid
, false);
5877 wr32(E1000_VLVF(i
), reg
);
5879 /* do not modify RLPML for PF devices */
5880 if (vf
>= adapter
->vfs_allocated_count
)
5883 adapter
->vf_data
[vf
].vlans_enabled
--;
5884 if (!adapter
->vf_data
[vf
].vlans_enabled
) {
5887 reg
= rd32(E1000_VMOLR(vf
));
5888 size
= reg
& E1000_VMOLR_RLPML_MASK
;
5890 reg
&= ~E1000_VMOLR_RLPML_MASK
;
5892 wr32(E1000_VMOLR(vf
), reg
);
5899 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
5901 struct e1000_hw
*hw
= &adapter
->hw
;
5904 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
5906 wr32(E1000_VMVIR(vf
), 0);
5909 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
5910 int vf
, u16 vlan
, u8 qos
)
5913 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5915 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
5918 err
= igb_vlvf_set(adapter
, vlan
, !!vlan
, vf
);
5921 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
5922 igb_set_vmolr(adapter
, vf
, !vlan
);
5923 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
5924 adapter
->vf_data
[vf
].pf_qos
= qos
;
5925 dev_info(&adapter
->pdev
->dev
,
5926 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
5927 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
5928 dev_warn(&adapter
->pdev
->dev
,
5929 "The VF VLAN has been set, but the PF device is not up.\n");
5930 dev_warn(&adapter
->pdev
->dev
,
5931 "Bring the PF device up before attempting to use the VF device.\n");
5934 igb_vlvf_set(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
5936 igb_set_vmvir(adapter
, vlan
, vf
);
5937 igb_set_vmolr(adapter
, vf
, true);
5938 adapter
->vf_data
[vf
].pf_vlan
= 0;
5939 adapter
->vf_data
[vf
].pf_qos
= 0;
5945 static int igb_find_vlvf_entry(struct igb_adapter
*adapter
, int vid
)
5947 struct e1000_hw
*hw
= &adapter
->hw
;
5951 /* Find the vlan filter for this id */
5952 for (i
= 0; i
< E1000_VLVF_ARRAY_SIZE
; i
++) {
5953 reg
= rd32(E1000_VLVF(i
));
5954 if ((reg
& E1000_VLVF_VLANID_ENABLE
) &&
5955 vid
== (reg
& E1000_VLVF_VLANID_MASK
))
5959 if (i
>= E1000_VLVF_ARRAY_SIZE
)
5965 static int igb_set_vf_vlan(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
5967 struct e1000_hw
*hw
= &adapter
->hw
;
5968 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
5969 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
5972 /* If in promiscuous mode we need to make sure the PF also has
5973 * the VLAN filter set.
5975 if (add
&& (adapter
->netdev
->flags
& IFF_PROMISC
))
5976 err
= igb_vlvf_set(adapter
, vid
, add
,
5977 adapter
->vfs_allocated_count
);
5981 err
= igb_vlvf_set(adapter
, vid
, add
, vf
);
5986 /* Go through all the checks to see if the VLAN filter should
5987 * be wiped completely.
5989 if (!add
&& (adapter
->netdev
->flags
& IFF_PROMISC
)) {
5991 int regndx
= igb_find_vlvf_entry(adapter
, vid
);
5995 /* See if any other pools are set for this VLAN filter
5996 * entry other than the PF.
5998 vlvf
= bits
= rd32(E1000_VLVF(regndx
));
5999 bits
&= 1 << (E1000_VLVF_POOLSEL_SHIFT
+
6000 adapter
->vfs_allocated_count
);
6001 /* If the filter was removed then ensure PF pool bit
6002 * is cleared if the PF only added itself to the pool
6003 * because the PF is in promiscuous mode.
6005 if ((vlvf
& VLAN_VID_MASK
) == vid
&&
6006 !test_bit(vid
, adapter
->active_vlans
) &&
6008 igb_vlvf_set(adapter
, vid
, add
,
6009 adapter
->vfs_allocated_count
);
6016 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
6018 /* clear flags - except flag that indicates PF has set the MAC */
6019 adapter
->vf_data
[vf
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
6020 adapter
->vf_data
[vf
].last_nack
= jiffies
;
6022 /* reset offloads to defaults */
6023 igb_set_vmolr(adapter
, vf
, true);
6025 /* reset vlans for device */
6026 igb_clear_vf_vfta(adapter
, vf
);
6027 if (adapter
->vf_data
[vf
].pf_vlan
)
6028 igb_ndo_set_vf_vlan(adapter
->netdev
, vf
,
6029 adapter
->vf_data
[vf
].pf_vlan
,
6030 adapter
->vf_data
[vf
].pf_qos
);
6032 igb_clear_vf_vfta(adapter
, vf
);
6034 /* reset multicast table array for vf */
6035 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
6037 /* Flush and reset the mta with the new values */
6038 igb_set_rx_mode(adapter
->netdev
);
6041 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
6043 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6045 /* clear mac address as we were hotplug removed/added */
6046 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
6047 eth_zero_addr(vf_mac
);
6049 /* process remaining reset events */
6050 igb_vf_reset(adapter
, vf
);
6053 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
6055 struct e1000_hw
*hw
= &adapter
->hw
;
6056 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6057 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
6059 u8
*addr
= (u8
*)(&msgbuf
[1]);
6061 /* process all the same items cleared in a function level reset */
6062 igb_vf_reset(adapter
, vf
);
6064 /* set vf mac address */
6065 igb_rar_set_qsel(adapter
, vf_mac
, rar_entry
, vf
);
6067 /* enable transmit and receive for vf */
6068 reg
= rd32(E1000_VFTE
);
6069 wr32(E1000_VFTE
, reg
| (1 << vf
));
6070 reg
= rd32(E1000_VFRE
);
6071 wr32(E1000_VFRE
, reg
| (1 << vf
));
6073 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
6075 /* reply to reset with ack and vf mac address */
6076 if (!is_zero_ether_addr(vf_mac
)) {
6077 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
6078 memcpy(addr
, vf_mac
, ETH_ALEN
);
6080 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_NACK
;
6082 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6085 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6087 /* The VF MAC Address is stored in a packed array of bytes
6088 * starting at the second 32 bit word of the msg array
6090 unsigned char *addr
= (char *)&msg
[1];
6093 if (is_valid_ether_addr(addr
))
6094 err
= igb_set_vf_mac(adapter
, vf
, addr
);
6099 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6101 struct e1000_hw
*hw
= &adapter
->hw
;
6102 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6103 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6105 /* if device isn't clear to send it shouldn't be reading either */
6106 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6107 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6108 igb_write_mbx(hw
, &msg
, 1, vf
);
6109 vf_data
->last_nack
= jiffies
;
6113 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6115 struct pci_dev
*pdev
= adapter
->pdev
;
6116 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6117 struct e1000_hw
*hw
= &adapter
->hw
;
6118 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6121 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
);
6124 /* if receive failed revoke VF CTS stats and restart init */
6125 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6126 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6127 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6132 /* this is a message we already processed, do nothing */
6133 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6136 /* until the vf completes a reset it should not be
6137 * allowed to start any configuration.
6139 if (msgbuf
[0] == E1000_VF_RESET
) {
6140 igb_vf_reset_msg(adapter
, vf
);
6144 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6145 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6151 switch ((msgbuf
[0] & 0xFFFF)) {
6152 case E1000_VF_SET_MAC_ADDR
:
6154 if (!(vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
))
6155 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6157 dev_warn(&pdev
->dev
,
6158 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6161 case E1000_VF_SET_PROMISC
:
6162 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6164 case E1000_VF_SET_MULTICAST
:
6165 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6167 case E1000_VF_SET_LPE
:
6168 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6170 case E1000_VF_SET_VLAN
:
6172 if (vf_data
->pf_vlan
)
6173 dev_warn(&pdev
->dev
,
6174 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6177 retval
= igb_set_vf_vlan(adapter
, msgbuf
, vf
);
6180 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6185 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6187 /* notify the VF of the results of what it sent us */
6189 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6191 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6193 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6196 static void igb_msg_task(struct igb_adapter
*adapter
)
6198 struct e1000_hw
*hw
= &adapter
->hw
;
6201 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6202 /* process any reset requests */
6203 if (!igb_check_for_rst(hw
, vf
))
6204 igb_vf_reset_event(adapter
, vf
);
6206 /* process any messages pending */
6207 if (!igb_check_for_msg(hw
, vf
))
6208 igb_rcv_msg_from_vf(adapter
, vf
);
6210 /* process any acks */
6211 if (!igb_check_for_ack(hw
, vf
))
6212 igb_rcv_ack_from_vf(adapter
, vf
);
6217 * igb_set_uta - Set unicast filter table address
6218 * @adapter: board private structure
6220 * The unicast table address is a register array of 32-bit registers.
6221 * The table is meant to be used in a way similar to how the MTA is used
6222 * however due to certain limitations in the hardware it is necessary to
6223 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6224 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6226 static void igb_set_uta(struct igb_adapter
*adapter
)
6228 struct e1000_hw
*hw
= &adapter
->hw
;
6231 /* The UTA table only exists on 82576 hardware and newer */
6232 if (hw
->mac
.type
< e1000_82576
)
6235 /* we only need to do this if VMDq is enabled */
6236 if (!adapter
->vfs_allocated_count
)
6239 for (i
= 0; i
< hw
->mac
.uta_reg_count
; i
++)
6240 array_wr32(E1000_UTA
, i
, ~0);
6244 * igb_intr_msi - Interrupt Handler
6245 * @irq: interrupt number
6246 * @data: pointer to a network interface device structure
6248 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6250 struct igb_adapter
*adapter
= data
;
6251 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6252 struct e1000_hw
*hw
= &adapter
->hw
;
6253 /* read ICR disables interrupts using IAM */
6254 u32 icr
= rd32(E1000_ICR
);
6256 igb_write_itr(q_vector
);
6258 if (icr
& E1000_ICR_DRSTA
)
6259 schedule_work(&adapter
->reset_task
);
6261 if (icr
& E1000_ICR_DOUTSYNC
) {
6262 /* HW is reporting DMA is out of sync */
6263 adapter
->stats
.doosync
++;
6266 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6267 hw
->mac
.get_link_status
= 1;
6268 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6269 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6272 if (icr
& E1000_ICR_TS
)
6273 igb_tsync_interrupt(adapter
);
6275 napi_schedule(&q_vector
->napi
);
6281 * igb_intr - Legacy Interrupt Handler
6282 * @irq: interrupt number
6283 * @data: pointer to a network interface device structure
6285 static irqreturn_t
igb_intr(int irq
, void *data
)
6287 struct igb_adapter
*adapter
= data
;
6288 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6289 struct e1000_hw
*hw
= &adapter
->hw
;
6290 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6291 * need for the IMC write
6293 u32 icr
= rd32(E1000_ICR
);
6295 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6296 * not set, then the adapter didn't send an interrupt
6298 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6301 igb_write_itr(q_vector
);
6303 if (icr
& E1000_ICR_DRSTA
)
6304 schedule_work(&adapter
->reset_task
);
6306 if (icr
& E1000_ICR_DOUTSYNC
) {
6307 /* HW is reporting DMA is out of sync */
6308 adapter
->stats
.doosync
++;
6311 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6312 hw
->mac
.get_link_status
= 1;
6313 /* guard against interrupt when we're going down */
6314 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6315 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6318 if (icr
& E1000_ICR_TS
)
6319 igb_tsync_interrupt(adapter
);
6321 napi_schedule(&q_vector
->napi
);
6326 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6328 struct igb_adapter
*adapter
= q_vector
->adapter
;
6329 struct e1000_hw
*hw
= &adapter
->hw
;
6331 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6332 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6333 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6334 igb_set_itr(q_vector
);
6336 igb_update_ring_itr(q_vector
);
6339 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6340 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6341 wr32(E1000_EIMS
, q_vector
->eims_value
);
6343 igb_irq_enable(adapter
);
6348 * igb_poll - NAPI Rx polling callback
6349 * @napi: napi polling structure
6350 * @budget: count of how many packets we should handle
6352 static int igb_poll(struct napi_struct
*napi
, int budget
)
6354 struct igb_q_vector
*q_vector
= container_of(napi
,
6355 struct igb_q_vector
,
6357 bool clean_complete
= true;
6359 #ifdef CONFIG_IGB_DCA
6360 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6361 igb_update_dca(q_vector
);
6363 if (q_vector
->tx
.ring
)
6364 clean_complete
= igb_clean_tx_irq(q_vector
);
6366 if (q_vector
->rx
.ring
)
6367 clean_complete
&= igb_clean_rx_irq(q_vector
, budget
);
6369 /* If all work not completed, return budget and keep polling */
6370 if (!clean_complete
)
6373 /* If not enough Rx work done, exit the polling mode */
6374 napi_complete(napi
);
6375 igb_ring_irq_enable(q_vector
);
6381 * igb_clean_tx_irq - Reclaim resources after transmit completes
6382 * @q_vector: pointer to q_vector containing needed info
6384 * returns true if ring is completely cleaned
6386 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
)
6388 struct igb_adapter
*adapter
= q_vector
->adapter
;
6389 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6390 struct igb_tx_buffer
*tx_buffer
;
6391 union e1000_adv_tx_desc
*tx_desc
;
6392 unsigned int total_bytes
= 0, total_packets
= 0;
6393 unsigned int budget
= q_vector
->tx
.work_limit
;
6394 unsigned int i
= tx_ring
->next_to_clean
;
6396 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6399 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6400 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6401 i
-= tx_ring
->count
;
6404 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6406 /* if next_to_watch is not set then there is no work pending */
6410 /* prevent any other reads prior to eop_desc */
6411 read_barrier_depends();
6413 /* if DD is not set pending work has not been completed */
6414 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6417 /* clear next_to_watch to prevent false hangs */
6418 tx_buffer
->next_to_watch
= NULL
;
6420 /* update the statistics for this packet */
6421 total_bytes
+= tx_buffer
->bytecount
;
6422 total_packets
+= tx_buffer
->gso_segs
;
6425 dev_consume_skb_any(tx_buffer
->skb
);
6427 /* unmap skb header data */
6428 dma_unmap_single(tx_ring
->dev
,
6429 dma_unmap_addr(tx_buffer
, dma
),
6430 dma_unmap_len(tx_buffer
, len
),
6433 /* clear tx_buffer data */
6434 tx_buffer
->skb
= NULL
;
6435 dma_unmap_len_set(tx_buffer
, len
, 0);
6437 /* clear last DMA location and unmap remaining buffers */
6438 while (tx_desc
!= eop_desc
) {
6443 i
-= tx_ring
->count
;
6444 tx_buffer
= tx_ring
->tx_buffer_info
;
6445 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6448 /* unmap any remaining paged data */
6449 if (dma_unmap_len(tx_buffer
, len
)) {
6450 dma_unmap_page(tx_ring
->dev
,
6451 dma_unmap_addr(tx_buffer
, dma
),
6452 dma_unmap_len(tx_buffer
, len
),
6454 dma_unmap_len_set(tx_buffer
, len
, 0);
6458 /* move us one more past the eop_desc for start of next pkt */
6463 i
-= tx_ring
->count
;
6464 tx_buffer
= tx_ring
->tx_buffer_info
;
6465 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
6468 /* issue prefetch for next Tx descriptor */
6471 /* update budget accounting */
6473 } while (likely(budget
));
6475 netdev_tx_completed_queue(txring_txq(tx_ring
),
6476 total_packets
, total_bytes
);
6477 i
+= tx_ring
->count
;
6478 tx_ring
->next_to_clean
= i
;
6479 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6480 tx_ring
->tx_stats
.bytes
+= total_bytes
;
6481 tx_ring
->tx_stats
.packets
+= total_packets
;
6482 u64_stats_update_end(&tx_ring
->tx_syncp
);
6483 q_vector
->tx
.total_bytes
+= total_bytes
;
6484 q_vector
->tx
.total_packets
+= total_packets
;
6486 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
6487 struct e1000_hw
*hw
= &adapter
->hw
;
6489 /* Detect a transmit hang in hardware, this serializes the
6490 * check with the clearing of time_stamp and movement of i
6492 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
6493 if (tx_buffer
->next_to_watch
&&
6494 time_after(jiffies
, tx_buffer
->time_stamp
+
6495 (adapter
->tx_timeout_factor
* HZ
)) &&
6496 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
6498 /* detected Tx unit hang */
6499 dev_err(tx_ring
->dev
,
6500 "Detected Tx Unit Hang\n"
6504 " next_to_use <%x>\n"
6505 " next_to_clean <%x>\n"
6506 "buffer_info[next_to_clean]\n"
6507 " time_stamp <%lx>\n"
6508 " next_to_watch <%p>\n"
6510 " desc.status <%x>\n",
6511 tx_ring
->queue_index
,
6512 rd32(E1000_TDH(tx_ring
->reg_idx
)),
6513 readl(tx_ring
->tail
),
6514 tx_ring
->next_to_use
,
6515 tx_ring
->next_to_clean
,
6516 tx_buffer
->time_stamp
,
6517 tx_buffer
->next_to_watch
,
6519 tx_buffer
->next_to_watch
->wb
.status
);
6520 netif_stop_subqueue(tx_ring
->netdev
,
6521 tx_ring
->queue_index
);
6523 /* we are about to reset, no point in enabling stuff */
6528 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
6529 if (unlikely(total_packets
&&
6530 netif_carrier_ok(tx_ring
->netdev
) &&
6531 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
6532 /* Make sure that anybody stopping the queue after this
6533 * sees the new next_to_clean.
6536 if (__netif_subqueue_stopped(tx_ring
->netdev
,
6537 tx_ring
->queue_index
) &&
6538 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
6539 netif_wake_subqueue(tx_ring
->netdev
,
6540 tx_ring
->queue_index
);
6542 u64_stats_update_begin(&tx_ring
->tx_syncp
);
6543 tx_ring
->tx_stats
.restart_queue
++;
6544 u64_stats_update_end(&tx_ring
->tx_syncp
);
6552 * igb_reuse_rx_page - page flip buffer and store it back on the ring
6553 * @rx_ring: rx descriptor ring to store buffers on
6554 * @old_buff: donor buffer to have page reused
6556 * Synchronizes page for reuse by the adapter
6558 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
6559 struct igb_rx_buffer
*old_buff
)
6561 struct igb_rx_buffer
*new_buff
;
6562 u16 nta
= rx_ring
->next_to_alloc
;
6564 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
6566 /* update, and store next to alloc */
6568 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
6570 /* transfer page from old buffer to new buffer */
6571 *new_buff
= *old_buff
;
6573 /* sync the buffer for use by the device */
6574 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
6575 old_buff
->page_offset
,
6580 static inline bool igb_page_is_reserved(struct page
*page
)
6582 return (page_to_nid(page
) != numa_mem_id()) || page
->pfmemalloc
;
6585 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
,
6587 unsigned int truesize
)
6589 /* avoid re-using remote pages */
6590 if (unlikely(igb_page_is_reserved(page
)))
6593 #if (PAGE_SIZE < 8192)
6594 /* if we are only owner of page we can reuse it */
6595 if (unlikely(page_count(page
) != 1))
6598 /* flip page offset to other buffer */
6599 rx_buffer
->page_offset
^= IGB_RX_BUFSZ
;
6601 /* move offset up to the next cache line */
6602 rx_buffer
->page_offset
+= truesize
;
6604 if (rx_buffer
->page_offset
> (PAGE_SIZE
- IGB_RX_BUFSZ
))
6608 /* Even if we own the page, we are not allowed to use atomic_set()
6609 * This would break get_page_unless_zero() users.
6611 atomic_inc(&page
->_count
);
6617 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
6618 * @rx_ring: rx descriptor ring to transact packets on
6619 * @rx_buffer: buffer containing page to add
6620 * @rx_desc: descriptor containing length of buffer written by hardware
6621 * @skb: sk_buff to place the data into
6623 * This function will add the data contained in rx_buffer->page to the skb.
6624 * This is done either through a direct copy if the data in the buffer is
6625 * less than the skb header size, otherwise it will just attach the page as
6626 * a frag to the skb.
6628 * The function will then update the page offset if necessary and return
6629 * true if the buffer can be reused by the adapter.
6631 static bool igb_add_rx_frag(struct igb_ring
*rx_ring
,
6632 struct igb_rx_buffer
*rx_buffer
,
6633 union e1000_adv_rx_desc
*rx_desc
,
6634 struct sk_buff
*skb
)
6636 struct page
*page
= rx_buffer
->page
;
6637 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
6638 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
6639 #if (PAGE_SIZE < 8192)
6640 unsigned int truesize
= IGB_RX_BUFSZ
;
6642 unsigned int truesize
= SKB_DATA_ALIGN(size
);
6644 unsigned int pull_len
;
6646 if (unlikely(skb_is_nonlinear(skb
)))
6649 if (unlikely(igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))) {
6650 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
6651 va
+= IGB_TS_HDR_LEN
;
6652 size
-= IGB_TS_HDR_LEN
;
6655 if (likely(size
<= IGB_RX_HDR_LEN
)) {
6656 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
6658 /* page is not reserved, we can reuse buffer as-is */
6659 if (likely(!igb_page_is_reserved(page
)))
6662 /* this page cannot be reused so discard it */
6667 /* we need the header to contain the greater of either ETH_HLEN or
6668 * 60 bytes if the skb->len is less than 60 for skb_pad.
6670 pull_len
= eth_get_headlen(va
, IGB_RX_HDR_LEN
);
6672 /* align pull length to size of long to optimize memcpy performance */
6673 memcpy(__skb_put(skb
, pull_len
), va
, ALIGN(pull_len
, sizeof(long)));
6675 /* update all of the pointers */
6680 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
6681 (unsigned long)va
& ~PAGE_MASK
, size
, truesize
);
6683 return igb_can_reuse_rx_page(rx_buffer
, page
, truesize
);
6686 static struct sk_buff
*igb_fetch_rx_buffer(struct igb_ring
*rx_ring
,
6687 union e1000_adv_rx_desc
*rx_desc
,
6688 struct sk_buff
*skb
)
6690 struct igb_rx_buffer
*rx_buffer
;
6693 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
6694 page
= rx_buffer
->page
;
6698 void *page_addr
= page_address(page
) +
6699 rx_buffer
->page_offset
;
6701 /* prefetch first cache line of first page */
6702 prefetch(page_addr
);
6703 #if L1_CACHE_BYTES < 128
6704 prefetch(page_addr
+ L1_CACHE_BYTES
);
6707 /* allocate a skb to store the frags */
6708 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
, IGB_RX_HDR_LEN
);
6709 if (unlikely(!skb
)) {
6710 rx_ring
->rx_stats
.alloc_failed
++;
6714 /* we will be copying header into skb->data in
6715 * pskb_may_pull so it is in our interest to prefetch
6716 * it now to avoid a possible cache miss
6718 prefetchw(skb
->data
);
6721 /* we are reusing so sync this buffer for CPU use */
6722 dma_sync_single_range_for_cpu(rx_ring
->dev
,
6724 rx_buffer
->page_offset
,
6728 /* pull page into skb */
6729 if (igb_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
6730 /* hand second half of page back to the ring */
6731 igb_reuse_rx_page(rx_ring
, rx_buffer
);
6733 /* we are not reusing the buffer so unmap it */
6734 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
6735 PAGE_SIZE
, DMA_FROM_DEVICE
);
6738 /* clear contents of rx_buffer */
6739 rx_buffer
->page
= NULL
;
6744 static inline void igb_rx_checksum(struct igb_ring
*ring
,
6745 union e1000_adv_rx_desc
*rx_desc
,
6746 struct sk_buff
*skb
)
6748 skb_checksum_none_assert(skb
);
6750 /* Ignore Checksum bit is set */
6751 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
6754 /* Rx checksum disabled via ethtool */
6755 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
6758 /* TCP/UDP checksum error bit is set */
6759 if (igb_test_staterr(rx_desc
,
6760 E1000_RXDEXT_STATERR_TCPE
|
6761 E1000_RXDEXT_STATERR_IPE
)) {
6762 /* work around errata with sctp packets where the TCPE aka
6763 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
6764 * packets, (aka let the stack check the crc32c)
6766 if (!((skb
->len
== 60) &&
6767 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
6768 u64_stats_update_begin(&ring
->rx_syncp
);
6769 ring
->rx_stats
.csum_err
++;
6770 u64_stats_update_end(&ring
->rx_syncp
);
6772 /* let the stack verify checksum errors */
6775 /* It must be a TCP or UDP packet with a valid checksum */
6776 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
6777 E1000_RXD_STAT_UDPCS
))
6778 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
6780 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
6781 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
6784 static inline void igb_rx_hash(struct igb_ring
*ring
,
6785 union e1000_adv_rx_desc
*rx_desc
,
6786 struct sk_buff
*skb
)
6788 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
6790 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
6795 * igb_is_non_eop - process handling of non-EOP buffers
6796 * @rx_ring: Rx ring being processed
6797 * @rx_desc: Rx descriptor for current buffer
6798 * @skb: current socket buffer containing buffer in progress
6800 * This function updates next to clean. If the buffer is an EOP buffer
6801 * this function exits returning false, otherwise it will place the
6802 * sk_buff in the next buffer to be chained and return true indicating
6803 * that this is in fact a non-EOP buffer.
6805 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
6806 union e1000_adv_rx_desc
*rx_desc
)
6808 u32 ntc
= rx_ring
->next_to_clean
+ 1;
6810 /* fetch, update, and store next to clean */
6811 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
6812 rx_ring
->next_to_clean
= ntc
;
6814 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
6816 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
6823 * igb_cleanup_headers - Correct corrupted or empty headers
6824 * @rx_ring: rx descriptor ring packet is being transacted on
6825 * @rx_desc: pointer to the EOP Rx descriptor
6826 * @skb: pointer to current skb being fixed
6828 * Address the case where we are pulling data in on pages only
6829 * and as such no data is present in the skb header.
6831 * In addition if skb is not at least 60 bytes we need to pad it so that
6832 * it is large enough to qualify as a valid Ethernet frame.
6834 * Returns true if an error was encountered and skb was freed.
6836 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
6837 union e1000_adv_rx_desc
*rx_desc
,
6838 struct sk_buff
*skb
)
6840 if (unlikely((igb_test_staterr(rx_desc
,
6841 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
6842 struct net_device
*netdev
= rx_ring
->netdev
;
6843 if (!(netdev
->features
& NETIF_F_RXALL
)) {
6844 dev_kfree_skb_any(skb
);
6849 /* if eth_skb_pad returns an error the skb was freed */
6850 if (eth_skb_pad(skb
))
6857 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
6858 * @rx_ring: rx descriptor ring packet is being transacted on
6859 * @rx_desc: pointer to the EOP Rx descriptor
6860 * @skb: pointer to current skb being populated
6862 * This function checks the ring, descriptor, and packet information in
6863 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
6864 * other fields within the skb.
6866 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
6867 union e1000_adv_rx_desc
*rx_desc
,
6868 struct sk_buff
*skb
)
6870 struct net_device
*dev
= rx_ring
->netdev
;
6872 igb_rx_hash(rx_ring
, rx_desc
, skb
);
6874 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
6876 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
6877 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
6878 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
6880 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
6881 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
6884 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
6885 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
6886 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6888 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
6890 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
6893 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
6895 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
6898 static bool igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
6900 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
6901 struct sk_buff
*skb
= rx_ring
->skb
;
6902 unsigned int total_bytes
= 0, total_packets
= 0;
6903 u16 cleaned_count
= igb_desc_unused(rx_ring
);
6905 while (likely(total_packets
< budget
)) {
6906 union e1000_adv_rx_desc
*rx_desc
;
6908 /* return some buffers to hardware, one at a time is too slow */
6909 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
6910 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6914 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
6916 if (!rx_desc
->wb
.upper
.status_error
)
6919 /* This memory barrier is needed to keep us from reading
6920 * any other fields out of the rx_desc until we know the
6921 * descriptor has been written back
6925 /* retrieve a buffer from the ring */
6926 skb
= igb_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
6928 /* exit if we failed to retrieve a buffer */
6934 /* fetch next buffer in frame if non-eop */
6935 if (igb_is_non_eop(rx_ring
, rx_desc
))
6938 /* verify the packet layout is correct */
6939 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
6944 /* probably a little skewed due to removing CRC */
6945 total_bytes
+= skb
->len
;
6947 /* populate checksum, timestamp, VLAN, and protocol */
6948 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
6950 napi_gro_receive(&q_vector
->napi
, skb
);
6952 /* reset skb pointer */
6955 /* update budget accounting */
6959 /* place incomplete frames back on ring for completion */
6962 u64_stats_update_begin(&rx_ring
->rx_syncp
);
6963 rx_ring
->rx_stats
.packets
+= total_packets
;
6964 rx_ring
->rx_stats
.bytes
+= total_bytes
;
6965 u64_stats_update_end(&rx_ring
->rx_syncp
);
6966 q_vector
->rx
.total_packets
+= total_packets
;
6967 q_vector
->rx
.total_bytes
+= total_bytes
;
6970 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
6972 return total_packets
< budget
;
6975 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
6976 struct igb_rx_buffer
*bi
)
6978 struct page
*page
= bi
->page
;
6981 /* since we are recycling buffers we should seldom need to alloc */
6985 /* alloc new page for storage */
6986 page
= dev_alloc_page();
6987 if (unlikely(!page
)) {
6988 rx_ring
->rx_stats
.alloc_failed
++;
6992 /* map page for use */
6993 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
6995 /* if mapping failed free memory back to system since
6996 * there isn't much point in holding memory we can't use
6998 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7001 rx_ring
->rx_stats
.alloc_failed
++;
7007 bi
->page_offset
= 0;
7013 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7014 * @adapter: address of board private structure
7016 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7018 union e1000_adv_rx_desc
*rx_desc
;
7019 struct igb_rx_buffer
*bi
;
7020 u16 i
= rx_ring
->next_to_use
;
7026 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7027 bi
= &rx_ring
->rx_buffer_info
[i
];
7028 i
-= rx_ring
->count
;
7031 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7034 /* Refresh the desc even if buffer_addrs didn't change
7035 * because each write-back erases this info.
7037 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7043 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7044 bi
= rx_ring
->rx_buffer_info
;
7045 i
-= rx_ring
->count
;
7048 /* clear the status bits for the next_to_use descriptor */
7049 rx_desc
->wb
.upper
.status_error
= 0;
7052 } while (cleaned_count
);
7054 i
+= rx_ring
->count
;
7056 if (rx_ring
->next_to_use
!= i
) {
7057 /* record the next descriptor to use */
7058 rx_ring
->next_to_use
= i
;
7060 /* update next to alloc since we have filled the ring */
7061 rx_ring
->next_to_alloc
= i
;
7063 /* Force memory writes to complete before letting h/w
7064 * know there are new descriptors to fetch. (Only
7065 * applicable for weak-ordered memory model archs,
7069 writel(i
, rx_ring
->tail
);
7079 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7081 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7082 struct mii_ioctl_data
*data
= if_mii(ifr
);
7084 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7089 data
->phy_id
= adapter
->hw
.phy
.addr
;
7092 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7109 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7115 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7117 return igb_ptp_get_ts_config(netdev
, ifr
);
7119 return igb_ptp_set_ts_config(netdev
, ifr
);
7125 void igb_read_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7127 struct igb_adapter
*adapter
= hw
->back
;
7129 pci_read_config_word(adapter
->pdev
, reg
, value
);
7132 void igb_write_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7134 struct igb_adapter
*adapter
= hw
->back
;
7136 pci_write_config_word(adapter
->pdev
, reg
, *value
);
7139 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7141 struct igb_adapter
*adapter
= hw
->back
;
7143 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7144 return -E1000_ERR_CONFIG
;
7149 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7151 struct igb_adapter
*adapter
= hw
->back
;
7153 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7154 return -E1000_ERR_CONFIG
;
7159 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7161 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7162 struct e1000_hw
*hw
= &adapter
->hw
;
7164 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7167 /* enable VLAN tag insert/strip */
7168 ctrl
= rd32(E1000_CTRL
);
7169 ctrl
|= E1000_CTRL_VME
;
7170 wr32(E1000_CTRL
, ctrl
);
7172 /* Disable CFI check */
7173 rctl
= rd32(E1000_RCTL
);
7174 rctl
&= ~E1000_RCTL_CFIEN
;
7175 wr32(E1000_RCTL
, rctl
);
7177 /* disable VLAN tag insert/strip */
7178 ctrl
= rd32(E1000_CTRL
);
7179 ctrl
&= ~E1000_CTRL_VME
;
7180 wr32(E1000_CTRL
, ctrl
);
7183 igb_rlpml_set(adapter
);
7186 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7187 __be16 proto
, u16 vid
)
7189 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7190 struct e1000_hw
*hw
= &adapter
->hw
;
7191 int pf_id
= adapter
->vfs_allocated_count
;
7193 /* attempt to add filter to vlvf array */
7194 igb_vlvf_set(adapter
, vid
, true, pf_id
);
7196 /* add the filter since PF can receive vlans w/o entry in vlvf */
7197 igb_vfta_set(hw
, vid
, true);
7199 set_bit(vid
, adapter
->active_vlans
);
7204 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7205 __be16 proto
, u16 vid
)
7207 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7208 struct e1000_hw
*hw
= &adapter
->hw
;
7209 int pf_id
= adapter
->vfs_allocated_count
;
7212 /* remove vlan from VLVF table array */
7213 err
= igb_vlvf_set(adapter
, vid
, false, pf_id
);
7215 /* if vid was not present in VLVF just remove it from table */
7217 igb_vfta_set(hw
, vid
, false);
7219 clear_bit(vid
, adapter
->active_vlans
);
7224 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7228 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7230 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7231 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7234 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7236 struct pci_dev
*pdev
= adapter
->pdev
;
7237 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7241 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7242 * for the switch() below to work
7244 if ((spd
& 1) || (dplx
& ~1))
7247 /* Fiber NIC's only allow 1000 gbps Full duplex
7248 * and 100Mbps Full duplex for 100baseFx sfp
7250 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7251 switch (spd
+ dplx
) {
7252 case SPEED_10
+ DUPLEX_HALF
:
7253 case SPEED_10
+ DUPLEX_FULL
:
7254 case SPEED_100
+ DUPLEX_HALF
:
7261 switch (spd
+ dplx
) {
7262 case SPEED_10
+ DUPLEX_HALF
:
7263 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7265 case SPEED_10
+ DUPLEX_FULL
:
7266 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7268 case SPEED_100
+ DUPLEX_HALF
:
7269 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7271 case SPEED_100
+ DUPLEX_FULL
:
7272 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7274 case SPEED_1000
+ DUPLEX_FULL
:
7276 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7278 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7283 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7284 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7289 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7293 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7296 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7297 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7298 struct e1000_hw
*hw
= &adapter
->hw
;
7299 u32 ctrl
, rctl
, status
;
7300 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7305 netif_device_detach(netdev
);
7307 if (netif_running(netdev
))
7308 __igb_close(netdev
, true);
7310 igb_clear_interrupt_scheme(adapter
);
7313 retval
= pci_save_state(pdev
);
7318 status
= rd32(E1000_STATUS
);
7319 if (status
& E1000_STATUS_LU
)
7320 wufc
&= ~E1000_WUFC_LNKC
;
7323 igb_setup_rctl(adapter
);
7324 igb_set_rx_mode(netdev
);
7326 /* turn on all-multi mode if wake on multicast is enabled */
7327 if (wufc
& E1000_WUFC_MC
) {
7328 rctl
= rd32(E1000_RCTL
);
7329 rctl
|= E1000_RCTL_MPE
;
7330 wr32(E1000_RCTL
, rctl
);
7333 ctrl
= rd32(E1000_CTRL
);
7334 /* advertise wake from D3Cold */
7335 #define E1000_CTRL_ADVD3WUC 0x00100000
7336 /* phy power management enable */
7337 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7338 ctrl
|= E1000_CTRL_ADVD3WUC
;
7339 wr32(E1000_CTRL
, ctrl
);
7341 /* Allow time for pending master requests to run */
7342 igb_disable_pcie_master(hw
);
7344 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7345 wr32(E1000_WUFC
, wufc
);
7348 wr32(E1000_WUFC
, 0);
7351 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7353 igb_power_down_link(adapter
);
7355 igb_power_up_link(adapter
);
7357 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7358 * would have already happened in close and is redundant.
7360 igb_release_hw_control(adapter
);
7362 pci_disable_device(pdev
);
7368 #ifdef CONFIG_PM_SLEEP
7369 static int igb_suspend(struct device
*dev
)
7373 struct pci_dev
*pdev
= to_pci_dev(dev
);
7375 retval
= __igb_shutdown(pdev
, &wake
, 0);
7380 pci_prepare_to_sleep(pdev
);
7382 pci_wake_from_d3(pdev
, false);
7383 pci_set_power_state(pdev
, PCI_D3hot
);
7388 #endif /* CONFIG_PM_SLEEP */
7390 static int igb_resume(struct device
*dev
)
7392 struct pci_dev
*pdev
= to_pci_dev(dev
);
7393 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7394 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7395 struct e1000_hw
*hw
= &adapter
->hw
;
7398 pci_set_power_state(pdev
, PCI_D0
);
7399 pci_restore_state(pdev
);
7400 pci_save_state(pdev
);
7402 if (!pci_device_is_present(pdev
))
7404 err
= pci_enable_device_mem(pdev
);
7407 "igb: Cannot enable PCI device from suspend\n");
7410 pci_set_master(pdev
);
7412 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7413 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7415 if (igb_init_interrupt_scheme(adapter
, true)) {
7416 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7423 /* let the f/w know that the h/w is now under the control of the
7426 igb_get_hw_control(adapter
);
7428 wr32(E1000_WUS
, ~0);
7430 if (netdev
->flags
& IFF_UP
) {
7432 err
= __igb_open(netdev
, true);
7438 netif_device_attach(netdev
);
7442 static int igb_runtime_idle(struct device
*dev
)
7444 struct pci_dev
*pdev
= to_pci_dev(dev
);
7445 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7446 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7448 if (!igb_has_link(adapter
))
7449 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
7454 static int igb_runtime_suspend(struct device
*dev
)
7456 struct pci_dev
*pdev
= to_pci_dev(dev
);
7460 retval
= __igb_shutdown(pdev
, &wake
, 1);
7465 pci_prepare_to_sleep(pdev
);
7467 pci_wake_from_d3(pdev
, false);
7468 pci_set_power_state(pdev
, PCI_D3hot
);
7474 static int igb_runtime_resume(struct device
*dev
)
7476 return igb_resume(dev
);
7478 #endif /* CONFIG_PM */
7480 static void igb_shutdown(struct pci_dev
*pdev
)
7484 __igb_shutdown(pdev
, &wake
, 0);
7486 if (system_state
== SYSTEM_POWER_OFF
) {
7487 pci_wake_from_d3(pdev
, wake
);
7488 pci_set_power_state(pdev
, PCI_D3hot
);
7492 #ifdef CONFIG_PCI_IOV
7493 static int igb_sriov_reinit(struct pci_dev
*dev
)
7495 struct net_device
*netdev
= pci_get_drvdata(dev
);
7496 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7497 struct pci_dev
*pdev
= adapter
->pdev
;
7501 if (netif_running(netdev
))
7506 igb_clear_interrupt_scheme(adapter
);
7508 igb_init_queue_configuration(adapter
);
7510 if (igb_init_interrupt_scheme(adapter
, true)) {
7512 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
7516 if (netif_running(netdev
))
7524 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
7526 int err
= igb_disable_sriov(dev
);
7529 err
= igb_sriov_reinit(dev
);
7534 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
7536 int err
= igb_enable_sriov(dev
, num_vfs
);
7541 err
= igb_sriov_reinit(dev
);
7550 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
7552 #ifdef CONFIG_PCI_IOV
7554 return igb_pci_disable_sriov(dev
);
7556 return igb_pci_enable_sriov(dev
, num_vfs
);
7561 #ifdef CONFIG_NET_POLL_CONTROLLER
7562 /* Polling 'interrupt' - used by things like netconsole to send skbs
7563 * without having to re-enable interrupts. It's not called while
7564 * the interrupt routine is executing.
7566 static void igb_netpoll(struct net_device
*netdev
)
7568 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7569 struct e1000_hw
*hw
= &adapter
->hw
;
7570 struct igb_q_vector
*q_vector
;
7573 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
7574 q_vector
= adapter
->q_vector
[i
];
7575 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
7576 wr32(E1000_EIMC
, q_vector
->eims_value
);
7578 igb_irq_disable(adapter
);
7579 napi_schedule(&q_vector
->napi
);
7582 #endif /* CONFIG_NET_POLL_CONTROLLER */
7585 * igb_io_error_detected - called when PCI error is detected
7586 * @pdev: Pointer to PCI device
7587 * @state: The current pci connection state
7589 * This function is called after a PCI bus error affecting
7590 * this device has been detected.
7592 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
7593 pci_channel_state_t state
)
7595 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7596 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7598 netif_device_detach(netdev
);
7600 if (state
== pci_channel_io_perm_failure
)
7601 return PCI_ERS_RESULT_DISCONNECT
;
7603 if (netif_running(netdev
))
7605 pci_disable_device(pdev
);
7607 /* Request a slot slot reset. */
7608 return PCI_ERS_RESULT_NEED_RESET
;
7612 * igb_io_slot_reset - called after the pci bus has been reset.
7613 * @pdev: Pointer to PCI device
7615 * Restart the card from scratch, as if from a cold-boot. Implementation
7616 * resembles the first-half of the igb_resume routine.
7618 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
7620 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7621 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7622 struct e1000_hw
*hw
= &adapter
->hw
;
7623 pci_ers_result_t result
;
7626 if (pci_enable_device_mem(pdev
)) {
7628 "Cannot re-enable PCI device after reset.\n");
7629 result
= PCI_ERS_RESULT_DISCONNECT
;
7631 pci_set_master(pdev
);
7632 pci_restore_state(pdev
);
7633 pci_save_state(pdev
);
7635 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7636 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7639 wr32(E1000_WUS
, ~0);
7640 result
= PCI_ERS_RESULT_RECOVERED
;
7643 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7646 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
7648 /* non-fatal, continue */
7655 * igb_io_resume - called when traffic can start flowing again.
7656 * @pdev: Pointer to PCI device
7658 * This callback is called when the error recovery driver tells us that
7659 * its OK to resume normal operation. Implementation resembles the
7660 * second-half of the igb_resume routine.
7662 static void igb_io_resume(struct pci_dev
*pdev
)
7664 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7665 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7667 if (netif_running(netdev
)) {
7668 if (igb_up(adapter
)) {
7669 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
7674 netif_device_attach(netdev
);
7676 /* let the f/w know that the h/w is now under the control of the
7679 igb_get_hw_control(adapter
);
7682 static void igb_rar_set_qsel(struct igb_adapter
*adapter
, u8
*addr
, u32 index
,
7685 u32 rar_low
, rar_high
;
7686 struct e1000_hw
*hw
= &adapter
->hw
;
7688 /* HW expects these in little endian so we reverse the byte order
7689 * from network order (big endian) to little endian
7691 rar_low
= ((u32
) addr
[0] | ((u32
) addr
[1] << 8) |
7692 ((u32
) addr
[2] << 16) | ((u32
) addr
[3] << 24));
7693 rar_high
= ((u32
) addr
[4] | ((u32
) addr
[5] << 8));
7695 /* Indicate to hardware the Address is Valid. */
7696 rar_high
|= E1000_RAH_AV
;
7698 if (hw
->mac
.type
== e1000_82575
)
7699 rar_high
|= E1000_RAH_POOL_1
* qsel
;
7701 rar_high
|= E1000_RAH_POOL_1
<< qsel
;
7703 wr32(E1000_RAL(index
), rar_low
);
7705 wr32(E1000_RAH(index
), rar_high
);
7709 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
7710 int vf
, unsigned char *mac_addr
)
7712 struct e1000_hw
*hw
= &adapter
->hw
;
7713 /* VF MAC addresses start at end of receive addresses and moves
7714 * towards the first, as a result a collision should not be possible
7716 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
7718 memcpy(adapter
->vf_data
[vf
].vf_mac_addresses
, mac_addr
, ETH_ALEN
);
7720 igb_rar_set_qsel(adapter
, mac_addr
, rar_entry
, vf
);
7725 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
7727 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7728 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
7730 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
7731 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
7732 dev_info(&adapter
->pdev
->dev
,
7733 "Reload the VF driver to make this change effective.");
7734 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
7735 dev_warn(&adapter
->pdev
->dev
,
7736 "The VF MAC address has been set, but the PF device is not up.\n");
7737 dev_warn(&adapter
->pdev
->dev
,
7738 "Bring the PF device up before attempting to use the VF device.\n");
7740 return igb_set_vf_mac(adapter
, vf
, mac
);
7743 static int igb_link_mbps(int internal_link_speed
)
7745 switch (internal_link_speed
) {
7755 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
7762 /* Calculate the rate factor values to set */
7763 rf_int
= link_speed
/ tx_rate
;
7764 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
7765 rf_dec
= (rf_dec
* (1 << E1000_RTTBCNRC_RF_INT_SHIFT
)) /
7768 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
7769 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
7770 E1000_RTTBCNRC_RF_INT_MASK
);
7771 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
7776 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
7777 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
7778 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
7780 wr32(E1000_RTTBCNRM
, 0x14);
7781 wr32(E1000_RTTBCNRC
, bcnrc_val
);
7784 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
7786 int actual_link_speed
, i
;
7787 bool reset_rate
= false;
7789 /* VF TX rate limit was not set or not supported */
7790 if ((adapter
->vf_rate_link_speed
== 0) ||
7791 (adapter
->hw
.mac
.type
!= e1000_82576
))
7794 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7795 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
7797 adapter
->vf_rate_link_speed
= 0;
7798 dev_info(&adapter
->pdev
->dev
,
7799 "Link speed has been changed. VF Transmit rate is disabled\n");
7802 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
7804 adapter
->vf_data
[i
].tx_rate
= 0;
7806 igb_set_vf_rate_limit(&adapter
->hw
, i
,
7807 adapter
->vf_data
[i
].tx_rate
,
7812 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
,
7813 int min_tx_rate
, int max_tx_rate
)
7815 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7816 struct e1000_hw
*hw
= &adapter
->hw
;
7817 int actual_link_speed
;
7819 if (hw
->mac
.type
!= e1000_82576
)
7825 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
7826 if ((vf
>= adapter
->vfs_allocated_count
) ||
7827 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
7828 (max_tx_rate
< 0) ||
7829 (max_tx_rate
> actual_link_speed
))
7832 adapter
->vf_rate_link_speed
= actual_link_speed
;
7833 adapter
->vf_data
[vf
].tx_rate
= (u16
)max_tx_rate
;
7834 igb_set_vf_rate_limit(hw
, vf
, max_tx_rate
, actual_link_speed
);
7839 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
7842 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7843 struct e1000_hw
*hw
= &adapter
->hw
;
7844 u32 reg_val
, reg_offset
;
7846 if (!adapter
->vfs_allocated_count
)
7849 if (vf
>= adapter
->vfs_allocated_count
)
7852 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
7853 reg_val
= rd32(reg_offset
);
7855 reg_val
|= ((1 << vf
) |
7856 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7858 reg_val
&= ~((1 << vf
) |
7859 (1 << (vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
)));
7860 wr32(reg_offset
, reg_val
);
7862 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
7866 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
7867 int vf
, struct ifla_vf_info
*ivi
)
7869 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7870 if (vf
>= adapter
->vfs_allocated_count
)
7873 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
7874 ivi
->max_tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
7875 ivi
->min_tx_rate
= 0;
7876 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
7877 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
7878 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
7882 static void igb_vmm_control(struct igb_adapter
*adapter
)
7884 struct e1000_hw
*hw
= &adapter
->hw
;
7887 switch (hw
->mac
.type
) {
7893 /* replication is not supported for 82575 */
7896 /* notify HW that the MAC is adding vlan tags */
7897 reg
= rd32(E1000_DTXCTL
);
7898 reg
|= E1000_DTXCTL_VLAN_ADDED
;
7899 wr32(E1000_DTXCTL
, reg
);
7902 /* enable replication vlan tag stripping */
7903 reg
= rd32(E1000_RPLOLR
);
7904 reg
|= E1000_RPLOLR_STRVLAN
;
7905 wr32(E1000_RPLOLR
, reg
);
7908 /* none of the above registers are supported by i350 */
7912 if (adapter
->vfs_allocated_count
) {
7913 igb_vmdq_set_loopback_pf(hw
, true);
7914 igb_vmdq_set_replication_pf(hw
, true);
7915 igb_vmdq_set_anti_spoofing_pf(hw
, true,
7916 adapter
->vfs_allocated_count
);
7918 igb_vmdq_set_loopback_pf(hw
, false);
7919 igb_vmdq_set_replication_pf(hw
, false);
7923 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
7925 struct e1000_hw
*hw
= &adapter
->hw
;
7929 if (hw
->mac
.type
> e1000_82580
) {
7930 if (adapter
->flags
& IGB_FLAG_DMAC
) {
7933 /* force threshold to 0. */
7934 wr32(E1000_DMCTXTH
, 0);
7936 /* DMA Coalescing high water mark needs to be greater
7937 * than the Rx threshold. Set hwm to PBA - max frame
7938 * size in 16B units, capping it at PBA - 6KB.
7940 hwm
= 64 * pba
- adapter
->max_frame_size
/ 16;
7941 if (hwm
< 64 * (pba
- 6))
7942 hwm
= 64 * (pba
- 6);
7943 reg
= rd32(E1000_FCRTC
);
7944 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
7945 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
7946 & E1000_FCRTC_RTH_COAL_MASK
);
7947 wr32(E1000_FCRTC
, reg
);
7949 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
7950 * frame size, capping it at PBA - 10KB.
7952 dmac_thr
= pba
- adapter
->max_frame_size
/ 512;
7953 if (dmac_thr
< pba
- 10)
7954 dmac_thr
= pba
- 10;
7955 reg
= rd32(E1000_DMACR
);
7956 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
7957 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
7958 & E1000_DMACR_DMACTHR_MASK
);
7960 /* transition to L0x or L1 if available..*/
7961 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
7963 /* watchdog timer= +-1000 usec in 32usec intervals */
7966 /* Disable BMC-to-OS Watchdog Enable */
7967 if (hw
->mac
.type
!= e1000_i354
)
7968 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
7970 wr32(E1000_DMACR
, reg
);
7972 /* no lower threshold to disable
7973 * coalescing(smart fifb)-UTRESH=0
7975 wr32(E1000_DMCRTRH
, 0);
7977 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
7979 wr32(E1000_DMCTLX
, reg
);
7981 /* free space in tx packet buffer to wake from
7984 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
7985 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
7987 /* make low power state decision controlled
7990 reg
= rd32(E1000_PCIEMISC
);
7991 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
7992 wr32(E1000_PCIEMISC
, reg
);
7993 } /* endif adapter->dmac is not disabled */
7994 } else if (hw
->mac
.type
== e1000_82580
) {
7995 u32 reg
= rd32(E1000_PCIEMISC
);
7997 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
7998 wr32(E1000_DMACR
, 0);
8003 * igb_read_i2c_byte - Reads 8 bit word over I2C
8004 * @hw: pointer to hardware structure
8005 * @byte_offset: byte offset to read
8006 * @dev_addr: device address
8009 * Performs byte read operation over I2C interface at
8010 * a specified device address.
8012 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8013 u8 dev_addr
, u8
*data
)
8015 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8016 struct i2c_client
*this_client
= adapter
->i2c_client
;
8021 return E1000_ERR_I2C
;
8023 swfw_mask
= E1000_SWFW_PHY0_SM
;
8025 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8026 return E1000_ERR_SWFW_SYNC
;
8028 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8029 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8032 return E1000_ERR_I2C
;
8040 * igb_write_i2c_byte - Writes 8 bit word over I2C
8041 * @hw: pointer to hardware structure
8042 * @byte_offset: byte offset to write
8043 * @dev_addr: device address
8044 * @data: value to write
8046 * Performs byte write operation over I2C interface at
8047 * a specified device address.
8049 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8050 u8 dev_addr
, u8 data
)
8052 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8053 struct i2c_client
*this_client
= adapter
->i2c_client
;
8055 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8058 return E1000_ERR_I2C
;
8060 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8061 return E1000_ERR_SWFW_SYNC
;
8062 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8063 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8066 return E1000_ERR_I2C
;
8072 int igb_reinit_queues(struct igb_adapter
*adapter
)
8074 struct net_device
*netdev
= adapter
->netdev
;
8075 struct pci_dev
*pdev
= adapter
->pdev
;
8078 if (netif_running(netdev
))
8081 igb_reset_interrupt_capability(adapter
);
8083 if (igb_init_interrupt_scheme(adapter
, true)) {
8084 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8088 if (netif_running(netdev
))
8089 err
= igb_open(netdev
);