1 /* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
3 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, see <http://www.gnu.org/licenses/>.
18 #include <linux/module.h>
19 #include <linux/device.h>
20 #include <linux/pci.h>
21 #include <linux/ptp_classify.h>
25 #define INCVALUE_MASK 0x7fffffff
26 #define ISGN 0x80000000
28 /* The 82580 timesync updates the system timer every 8ns by 8ns,
29 * and this update value cannot be reprogrammed.
31 * Neither the 82576 nor the 82580 offer registers wide enough to hold
32 * nanoseconds time values for very long. For the 82580, SYSTIM always
33 * counts nanoseconds, but the upper 24 bits are not availible. The
34 * frequency is adjusted by changing the 32 bit fractional nanoseconds
37 * For the 82576, the SYSTIM register time unit is affect by the
38 * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
39 * field are needed to provide the nominal 16 nanosecond period,
40 * leaving 19 bits for fractional nanoseconds.
42 * We scale the NIC clock cycle by a large factor so that relatively
43 * small clock corrections can be added or subtracted at each clock
44 * tick. The drawbacks of a large factor are a) that the clock
45 * register overflows more quickly (not such a big deal) and b) that
46 * the increment per tick has to fit into 24 bits. As a result we
47 * need to use a shift of 19 so we can fit a value of 16 into the
52 * +--------------+ +---+---+------+
53 * 82576 | 32 | | 8 | 5 | 19 |
54 * +--------------+ +---+---+------+
55 * \________ 45 bits _______/ fract
57 * +----------+---+ +--------------+
58 * 82580 | 24 | 8 | | 32 |
59 * +----------+---+ +--------------+
60 * reserved \______ 40 bits _____/
63 * The 45 bit 82576 SYSTIM overflows every
64 * 2^45 * 10^-9 / 3600 = 9.77 hours.
66 * The 40 bit 82580 SYSTIM overflows every
67 * 2^40 * 10^-9 / 60 = 18.3 minutes.
70 #define IGB_SYSTIM_OVERFLOW_PERIOD (HZ * 60 * 9)
71 #define IGB_PTP_TX_TIMEOUT (HZ * 15)
72 #define INCPERIOD_82576 (1 << E1000_TIMINCA_16NS_SHIFT)
73 #define INCVALUE_82576_MASK ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
74 #define INCVALUE_82576 (16 << IGB_82576_TSYNC_SHIFT)
75 #define IGB_NBITS_82580 40
77 static void igb_ptp_tx_hwtstamp(struct igb_adapter
*adapter
);
79 /* SYSTIM read access for the 82576 */
80 static cycle_t
igb_ptp_read_82576(const struct cyclecounter
*cc
)
82 struct igb_adapter
*igb
= container_of(cc
, struct igb_adapter
, cc
);
83 struct e1000_hw
*hw
= &igb
->hw
;
87 lo
= rd32(E1000_SYSTIML
);
88 hi
= rd32(E1000_SYSTIMH
);
90 val
= ((u64
) hi
) << 32;
96 /* SYSTIM read access for the 82580 */
97 static cycle_t
igb_ptp_read_82580(const struct cyclecounter
*cc
)
99 struct igb_adapter
*igb
= container_of(cc
, struct igb_adapter
, cc
);
100 struct e1000_hw
*hw
= &igb
->hw
;
104 /* The timestamp latches on lowest register read. For the 82580
105 * the lowest register is SYSTIMR instead of SYSTIML. However we only
106 * need to provide nanosecond resolution, so we just ignore it.
109 lo
= rd32(E1000_SYSTIML
);
110 hi
= rd32(E1000_SYSTIMH
);
112 val
= ((u64
) hi
) << 32;
118 /* SYSTIM read access for I210/I211 */
119 static void igb_ptp_read_i210(struct igb_adapter
*adapter
, struct timespec
*ts
)
121 struct e1000_hw
*hw
= &adapter
->hw
;
124 /* The timestamp latches on lowest register read. For I210/I211, the
125 * lowest register is SYSTIMR. Since we only need to provide nanosecond
126 * resolution, we can ignore it.
129 nsec
= rd32(E1000_SYSTIML
);
130 sec
= rd32(E1000_SYSTIMH
);
136 static void igb_ptp_write_i210(struct igb_adapter
*adapter
,
137 const struct timespec
*ts
)
139 struct e1000_hw
*hw
= &adapter
->hw
;
141 /* Writing the SYSTIMR register is not necessary as it only provides
142 * sub-nanosecond resolution.
144 wr32(E1000_SYSTIML
, ts
->tv_nsec
);
145 wr32(E1000_SYSTIMH
, ts
->tv_sec
);
149 * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
150 * @adapter: board private structure
151 * @hwtstamps: timestamp structure to update
152 * @systim: unsigned 64bit system time value.
154 * We need to convert the system time value stored in the RX/TXSTMP registers
155 * into a hwtstamp which can be used by the upper level timestamping functions.
157 * The 'tmreg_lock' spinlock is used to protect the consistency of the
158 * system time value. This is needed because reading the 64 bit time
159 * value involves reading two (or three) 32 bit registers. The first
160 * read latches the value. Ditto for writing.
162 * In addition, here have extended the system time with an overflow
163 * counter in software.
165 static void igb_ptp_systim_to_hwtstamp(struct igb_adapter
*adapter
,
166 struct skb_shared_hwtstamps
*hwtstamps
,
172 switch (adapter
->hw
.mac
.type
) {
177 spin_lock_irqsave(&adapter
->tmreg_lock
, flags
);
179 ns
= timecounter_cyc2time(&adapter
->tc
, systim
);
181 spin_unlock_irqrestore(&adapter
->tmreg_lock
, flags
);
183 memset(hwtstamps
, 0, sizeof(*hwtstamps
));
184 hwtstamps
->hwtstamp
= ns_to_ktime(ns
);
188 memset(hwtstamps
, 0, sizeof(*hwtstamps
));
189 /* Upper 32 bits contain s, lower 32 bits contain ns. */
190 hwtstamps
->hwtstamp
= ktime_set(systim
>> 32,
191 systim
& 0xFFFFFFFF);
198 /* PTP clock operations */
199 static int igb_ptp_adjfreq_82576(struct ptp_clock_info
*ptp
, s32 ppb
)
201 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
203 struct e1000_hw
*hw
= &igb
->hw
;
214 rate
= div_u64(rate
, 1953125);
216 incvalue
= 16 << IGB_82576_TSYNC_SHIFT
;
223 wr32(E1000_TIMINCA
, INCPERIOD_82576
| (incvalue
& INCVALUE_82576_MASK
));
228 static int igb_ptp_adjfreq_82580(struct ptp_clock_info
*ptp
, s32 ppb
)
230 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
232 struct e1000_hw
*hw
= &igb
->hw
;
243 rate
= div_u64(rate
, 1953125);
245 inca
= rate
& INCVALUE_MASK
;
249 wr32(E1000_TIMINCA
, inca
);
254 static int igb_ptp_adjtime_82576(struct ptp_clock_info
*ptp
, s64 delta
)
256 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
261 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
263 now
= timecounter_read(&igb
->tc
);
265 timecounter_init(&igb
->tc
, &igb
->cc
, now
);
267 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
272 static int igb_ptp_adjtime_i210(struct ptp_clock_info
*ptp
, s64 delta
)
274 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
277 struct timespec now
, then
= ns_to_timespec(delta
);
279 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
281 igb_ptp_read_i210(igb
, &now
);
282 now
= timespec_add(now
, then
);
283 igb_ptp_write_i210(igb
, (const struct timespec
*)&now
);
285 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
290 static int igb_ptp_gettime_82576(struct ptp_clock_info
*ptp
,
293 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
299 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
301 ns
= timecounter_read(&igb
->tc
);
303 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
305 ts
->tv_sec
= div_u64_rem(ns
, 1000000000, &remainder
);
306 ts
->tv_nsec
= remainder
;
311 static int igb_ptp_gettime_i210(struct ptp_clock_info
*ptp
,
314 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
318 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
320 igb_ptp_read_i210(igb
, ts
);
322 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
327 static int igb_ptp_settime_82576(struct ptp_clock_info
*ptp
,
328 const struct timespec
*ts
)
330 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
335 ns
= ts
->tv_sec
* 1000000000ULL;
338 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
340 timecounter_init(&igb
->tc
, &igb
->cc
, ns
);
342 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
347 static int igb_ptp_settime_i210(struct ptp_clock_info
*ptp
,
348 const struct timespec
*ts
)
350 struct igb_adapter
*igb
= container_of(ptp
, struct igb_adapter
,
354 spin_lock_irqsave(&igb
->tmreg_lock
, flags
);
356 igb_ptp_write_i210(igb
, ts
);
358 spin_unlock_irqrestore(&igb
->tmreg_lock
, flags
);
363 static int igb_ptp_enable(struct ptp_clock_info
*ptp
,
364 struct ptp_clock_request
*rq
, int on
)
371 * @work: pointer to work struct
373 * This work function polls the TSYNCTXCTL valid bit to determine when a
374 * timestamp has been taken for the current stored skb.
376 static void igb_ptp_tx_work(struct work_struct
*work
)
378 struct igb_adapter
*adapter
= container_of(work
, struct igb_adapter
,
380 struct e1000_hw
*hw
= &adapter
->hw
;
383 if (!adapter
->ptp_tx_skb
)
386 if (time_is_before_jiffies(adapter
->ptp_tx_start
+
387 IGB_PTP_TX_TIMEOUT
)) {
388 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
389 adapter
->ptp_tx_skb
= NULL
;
390 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS
, &adapter
->state
);
391 adapter
->tx_hwtstamp_timeouts
++;
392 dev_warn(&adapter
->pdev
->dev
, "clearing Tx timestamp hang");
396 tsynctxctl
= rd32(E1000_TSYNCTXCTL
);
397 if (tsynctxctl
& E1000_TSYNCTXCTL_VALID
)
398 igb_ptp_tx_hwtstamp(adapter
);
400 /* reschedule to check later */
401 schedule_work(&adapter
->ptp_tx_work
);
404 static void igb_ptp_overflow_check(struct work_struct
*work
)
406 struct igb_adapter
*igb
=
407 container_of(work
, struct igb_adapter
, ptp_overflow_work
.work
);
410 igb
->ptp_caps
.gettime(&igb
->ptp_caps
, &ts
);
412 pr_debug("igb overflow check at %ld.%09lu\n", ts
.tv_sec
, ts
.tv_nsec
);
414 schedule_delayed_work(&igb
->ptp_overflow_work
,
415 IGB_SYSTIM_OVERFLOW_PERIOD
);
419 * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
420 * @adapter: private network adapter structure
422 * This watchdog task is scheduled to detect error case where hardware has
423 * dropped an Rx packet that was timestamped when the ring is full. The
424 * particular error is rare but leaves the device in a state unable to timestamp
425 * any future packets.
427 void igb_ptp_rx_hang(struct igb_adapter
*adapter
)
429 struct e1000_hw
*hw
= &adapter
->hw
;
430 struct igb_ring
*rx_ring
;
431 u32 tsyncrxctl
= rd32(E1000_TSYNCRXCTL
);
432 unsigned long rx_event
;
435 if (hw
->mac
.type
!= e1000_82576
)
438 /* If we don't have a valid timestamp in the registers, just update the
439 * timeout counter and exit
441 if (!(tsyncrxctl
& E1000_TSYNCRXCTL_VALID
)) {
442 adapter
->last_rx_ptp_check
= jiffies
;
446 /* Determine the most recent watchdog or rx_timestamp event */
447 rx_event
= adapter
->last_rx_ptp_check
;
448 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
449 rx_ring
= adapter
->rx_ring
[n
];
450 if (time_after(rx_ring
->last_rx_timestamp
, rx_event
))
451 rx_event
= rx_ring
->last_rx_timestamp
;
454 /* Only need to read the high RXSTMP register to clear the lock */
455 if (time_is_before_jiffies(rx_event
+ 5 * HZ
)) {
457 adapter
->last_rx_ptp_check
= jiffies
;
458 adapter
->rx_hwtstamp_cleared
++;
459 dev_warn(&adapter
->pdev
->dev
, "clearing Rx timestamp hang");
464 * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
465 * @adapter: Board private structure.
467 * If we were asked to do hardware stamping and such a time stamp is
468 * available, then it must have been for this skb here because we only
469 * allow only one such packet into the queue.
471 static void igb_ptp_tx_hwtstamp(struct igb_adapter
*adapter
)
473 struct e1000_hw
*hw
= &adapter
->hw
;
474 struct skb_shared_hwtstamps shhwtstamps
;
477 regval
= rd32(E1000_TXSTMPL
);
478 regval
|= (u64
)rd32(E1000_TXSTMPH
) << 32;
480 igb_ptp_systim_to_hwtstamp(adapter
, &shhwtstamps
, regval
);
481 skb_tstamp_tx(adapter
->ptp_tx_skb
, &shhwtstamps
);
482 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
483 adapter
->ptp_tx_skb
= NULL
;
484 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS
, &adapter
->state
);
488 * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
489 * @q_vector: Pointer to interrupt specific structure
490 * @va: Pointer to address containing Rx buffer
491 * @skb: Buffer containing timestamp and packet
493 * This function is meant to retrieve a timestamp from the first buffer of an
494 * incoming frame. The value is stored in little endian format starting on
497 void igb_ptp_rx_pktstamp(struct igb_q_vector
*q_vector
,
501 __le64
*regval
= (__le64
*)va
;
503 /* The timestamp is recorded in little endian format.
505 * Field: Reserved Reserved SYSTIML SYSTIMH
507 igb_ptp_systim_to_hwtstamp(q_vector
->adapter
, skb_hwtstamps(skb
),
508 le64_to_cpu(regval
[1]));
512 * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
513 * @q_vector: Pointer to interrupt specific structure
514 * @skb: Buffer containing timestamp and packet
516 * This function is meant to retrieve a timestamp from the internal registers
517 * of the adapter and store it in the skb.
519 void igb_ptp_rx_rgtstamp(struct igb_q_vector
*q_vector
,
522 struct igb_adapter
*adapter
= q_vector
->adapter
;
523 struct e1000_hw
*hw
= &adapter
->hw
;
526 /* If this bit is set, then the RX registers contain the time stamp. No
527 * other packet will be time stamped until we read these registers, so
528 * read the registers to make them available again. Because only one
529 * packet can be time stamped at a time, we know that the register
530 * values must belong to this one here and therefore we don't need to
531 * compare any of the additional attributes stored for it.
533 * If nothing went wrong, then it should have a shared tx_flags that we
534 * can turn into a skb_shared_hwtstamps.
536 if (!(rd32(E1000_TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
))
539 regval
= rd32(E1000_RXSTMPL
);
540 regval
|= (u64
)rd32(E1000_RXSTMPH
) << 32;
542 igb_ptp_systim_to_hwtstamp(adapter
, skb_hwtstamps(skb
), regval
);
546 * igb_ptp_get_ts_config - get hardware time stamping config
550 * Get the hwtstamp_config settings to return to the user. Rather than attempt
551 * to deconstruct the settings from the registers, just return a shadow copy
552 * of the last known settings.
554 int igb_ptp_get_ts_config(struct net_device
*netdev
, struct ifreq
*ifr
)
556 struct igb_adapter
*adapter
= netdev_priv(netdev
);
557 struct hwtstamp_config
*config
= &adapter
->tstamp_config
;
559 return copy_to_user(ifr
->ifr_data
, config
, sizeof(*config
)) ?
563 * igb_ptp_set_ts_config - control hardware time stamping
567 * Outgoing time stamping can be enabled and disabled. Play nice and
568 * disable it when requested, although it shouldn't case any overhead
569 * when no packet needs it. At most one packet in the queue may be
570 * marked for time stamping, otherwise it would be impossible to tell
571 * for sure to which packet the hardware time stamp belongs.
573 * Incoming time stamping has to be configured via the hardware
574 * filters. Not all combinations are supported, in particular event
575 * type has to be specified. Matching the kind of event packet is
576 * not supported, with the exception of "all V2 events regardless of
579 int igb_ptp_set_ts_config(struct net_device
*netdev
, struct ifreq
*ifr
)
581 struct igb_adapter
*adapter
= netdev_priv(netdev
);
582 struct e1000_hw
*hw
= &adapter
->hw
;
583 struct hwtstamp_config
*config
= &adapter
->tstamp_config
;
584 u32 tsync_tx_ctl
= E1000_TSYNCTXCTL_ENABLED
;
585 u32 tsync_rx_ctl
= E1000_TSYNCRXCTL_ENABLED
;
586 u32 tsync_rx_cfg
= 0;
591 if (copy_from_user(config
, ifr
->ifr_data
, sizeof(*config
)))
594 /* reserved for future extensions */
598 switch (config
->tx_type
) {
599 case HWTSTAMP_TX_OFF
:
607 switch (config
->rx_filter
) {
608 case HWTSTAMP_FILTER_NONE
:
611 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
612 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L4_V1
;
613 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE
;
616 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
617 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L4_V1
;
618 tsync_rx_cfg
= E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE
;
621 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
622 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
623 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
624 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
625 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
626 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
627 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
628 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
629 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
630 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
631 config
->rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
635 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
636 case HWTSTAMP_FILTER_ALL
:
637 /* 82576 cannot timestamp all packets, which it needs to do to
638 * support both V1 Sync and Delay_Req messages
640 if (hw
->mac
.type
!= e1000_82576
) {
641 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_ALL
;
642 config
->rx_filter
= HWTSTAMP_FILTER_ALL
;
647 config
->rx_filter
= HWTSTAMP_FILTER_NONE
;
651 if (hw
->mac
.type
== e1000_82575
) {
652 if (tsync_rx_ctl
| tsync_tx_ctl
)
657 /* Per-packet timestamping only works if all packets are
658 * timestamped, so enable timestamping in all packets as
659 * long as one Rx filter was configured.
661 if ((hw
->mac
.type
>= e1000_82580
) && tsync_rx_ctl
) {
662 tsync_rx_ctl
= E1000_TSYNCRXCTL_ENABLED
;
663 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_ALL
;
664 config
->rx_filter
= HWTSTAMP_FILTER_ALL
;
668 if ((hw
->mac
.type
== e1000_i210
) ||
669 (hw
->mac
.type
== e1000_i211
)) {
670 regval
= rd32(E1000_RXPBS
);
671 regval
|= E1000_RXPBS_CFG_TS_EN
;
672 wr32(E1000_RXPBS
, regval
);
676 /* enable/disable TX */
677 regval
= rd32(E1000_TSYNCTXCTL
);
678 regval
&= ~E1000_TSYNCTXCTL_ENABLED
;
679 regval
|= tsync_tx_ctl
;
680 wr32(E1000_TSYNCTXCTL
, regval
);
682 /* enable/disable RX */
683 regval
= rd32(E1000_TSYNCRXCTL
);
684 regval
&= ~(E1000_TSYNCRXCTL_ENABLED
| E1000_TSYNCRXCTL_TYPE_MASK
);
685 regval
|= tsync_rx_ctl
;
686 wr32(E1000_TSYNCRXCTL
, regval
);
688 /* define which PTP packets are time stamped */
689 wr32(E1000_TSYNCRXCFG
, tsync_rx_cfg
);
691 /* define ethertype filter for timestamped packets */
694 (E1000_ETQF_FILTER_ENABLE
| /* enable filter */
695 E1000_ETQF_1588
| /* enable timestamping */
696 ETH_P_1588
)); /* 1588 eth protocol type */
698 wr32(E1000_ETQF(3), 0);
700 /* L4 Queue Filter[3]: filter by destination port and protocol */
702 u32 ftqf
= (IPPROTO_UDP
/* UDP */
703 | E1000_FTQF_VF_BP
/* VF not compared */
704 | E1000_FTQF_1588_TIME_STAMP
/* Enable Timestamping */
705 | E1000_FTQF_MASK
); /* mask all inputs */
706 ftqf
&= ~E1000_FTQF_MASK_PROTO_BP
; /* enable protocol check */
708 wr32(E1000_IMIR(3), htons(PTP_EV_PORT
));
709 wr32(E1000_IMIREXT(3),
710 (E1000_IMIREXT_SIZE_BP
| E1000_IMIREXT_CTRL_BP
));
711 if (hw
->mac
.type
== e1000_82576
) {
712 /* enable source port check */
713 wr32(E1000_SPQF(3), htons(PTP_EV_PORT
));
714 ftqf
&= ~E1000_FTQF_MASK_SOURCE_PORT_BP
;
716 wr32(E1000_FTQF(3), ftqf
);
718 wr32(E1000_FTQF(3), E1000_FTQF_MASK
);
722 /* clear TX/RX time stamp registers, just to be sure */
723 regval
= rd32(E1000_TXSTMPL
);
724 regval
= rd32(E1000_TXSTMPH
);
725 regval
= rd32(E1000_RXSTMPL
);
726 regval
= rd32(E1000_RXSTMPH
);
728 return copy_to_user(ifr
->ifr_data
, config
, sizeof(*config
)) ?
732 void igb_ptp_init(struct igb_adapter
*adapter
)
734 struct e1000_hw
*hw
= &adapter
->hw
;
735 struct net_device
*netdev
= adapter
->netdev
;
737 switch (hw
->mac
.type
) {
739 snprintf(adapter
->ptp_caps
.name
, 16, "%pm", netdev
->dev_addr
);
740 adapter
->ptp_caps
.owner
= THIS_MODULE
;
741 adapter
->ptp_caps
.max_adj
= 999999881;
742 adapter
->ptp_caps
.n_ext_ts
= 0;
743 adapter
->ptp_caps
.pps
= 0;
744 adapter
->ptp_caps
.adjfreq
= igb_ptp_adjfreq_82576
;
745 adapter
->ptp_caps
.adjtime
= igb_ptp_adjtime_82576
;
746 adapter
->ptp_caps
.gettime
= igb_ptp_gettime_82576
;
747 adapter
->ptp_caps
.settime
= igb_ptp_settime_82576
;
748 adapter
->ptp_caps
.enable
= igb_ptp_enable
;
749 adapter
->cc
.read
= igb_ptp_read_82576
;
750 adapter
->cc
.mask
= CLOCKSOURCE_MASK(64);
751 adapter
->cc
.mult
= 1;
752 adapter
->cc
.shift
= IGB_82576_TSYNC_SHIFT
;
753 /* Dial the nominal frequency. */
754 wr32(E1000_TIMINCA
, INCPERIOD_82576
| INCVALUE_82576
);
759 snprintf(adapter
->ptp_caps
.name
, 16, "%pm", netdev
->dev_addr
);
760 adapter
->ptp_caps
.owner
= THIS_MODULE
;
761 adapter
->ptp_caps
.max_adj
= 62499999;
762 adapter
->ptp_caps
.n_ext_ts
= 0;
763 adapter
->ptp_caps
.pps
= 0;
764 adapter
->ptp_caps
.adjfreq
= igb_ptp_adjfreq_82580
;
765 adapter
->ptp_caps
.adjtime
= igb_ptp_adjtime_82576
;
766 adapter
->ptp_caps
.gettime
= igb_ptp_gettime_82576
;
767 adapter
->ptp_caps
.settime
= igb_ptp_settime_82576
;
768 adapter
->ptp_caps
.enable
= igb_ptp_enable
;
769 adapter
->cc
.read
= igb_ptp_read_82580
;
770 adapter
->cc
.mask
= CLOCKSOURCE_MASK(IGB_NBITS_82580
);
771 adapter
->cc
.mult
= 1;
772 adapter
->cc
.shift
= 0;
773 /* Enable the timer functions by clearing bit 31. */
774 wr32(E1000_TSAUXC
, 0x0);
778 snprintf(adapter
->ptp_caps
.name
, 16, "%pm", netdev
->dev_addr
);
779 adapter
->ptp_caps
.owner
= THIS_MODULE
;
780 adapter
->ptp_caps
.max_adj
= 62499999;
781 adapter
->ptp_caps
.n_ext_ts
= 0;
782 adapter
->ptp_caps
.pps
= 0;
783 adapter
->ptp_caps
.adjfreq
= igb_ptp_adjfreq_82580
;
784 adapter
->ptp_caps
.adjtime
= igb_ptp_adjtime_i210
;
785 adapter
->ptp_caps
.gettime
= igb_ptp_gettime_i210
;
786 adapter
->ptp_caps
.settime
= igb_ptp_settime_i210
;
787 adapter
->ptp_caps
.enable
= igb_ptp_enable
;
788 /* Enable the timer functions by clearing bit 31. */
789 wr32(E1000_TSAUXC
, 0x0);
792 adapter
->ptp_clock
= NULL
;
798 spin_lock_init(&adapter
->tmreg_lock
);
799 INIT_WORK(&adapter
->ptp_tx_work
, igb_ptp_tx_work
);
801 /* Initialize the clock and overflow work for devices that need it. */
802 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
)) {
803 struct timespec ts
= ktime_to_timespec(ktime_get_real());
805 igb_ptp_settime_i210(&adapter
->ptp_caps
, &ts
);
807 timecounter_init(&adapter
->tc
, &adapter
->cc
,
808 ktime_to_ns(ktime_get_real()));
810 INIT_DELAYED_WORK(&adapter
->ptp_overflow_work
,
811 igb_ptp_overflow_check
);
813 schedule_delayed_work(&adapter
->ptp_overflow_work
,
814 IGB_SYSTIM_OVERFLOW_PERIOD
);
817 /* Initialize the time sync interrupts for devices that support it. */
818 if (hw
->mac
.type
>= e1000_82580
) {
819 wr32(E1000_TSIM
, TSYNC_INTERRUPTS
);
820 wr32(E1000_IMS
, E1000_IMS_TS
);
823 adapter
->ptp_clock
= ptp_clock_register(&adapter
->ptp_caps
,
824 &adapter
->pdev
->dev
);
825 if (IS_ERR(adapter
->ptp_clock
)) {
826 adapter
->ptp_clock
= NULL
;
827 dev_err(&adapter
->pdev
->dev
, "ptp_clock_register failed\n");
829 dev_info(&adapter
->pdev
->dev
, "added PHC on %s\n",
830 adapter
->netdev
->name
);
831 adapter
->flags
|= IGB_FLAG_PTP
;
836 * igb_ptp_stop - Disable PTP device and stop the overflow check.
837 * @adapter: Board private structure.
839 * This function stops the PTP support and cancels the delayed work.
841 void igb_ptp_stop(struct igb_adapter
*adapter
)
843 switch (adapter
->hw
.mac
.type
) {
848 cancel_delayed_work_sync(&adapter
->ptp_overflow_work
);
852 /* No delayed work to cancel. */
858 cancel_work_sync(&adapter
->ptp_tx_work
);
859 if (adapter
->ptp_tx_skb
) {
860 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
861 adapter
->ptp_tx_skb
= NULL
;
862 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS
, &adapter
->state
);
865 if (adapter
->ptp_clock
) {
866 ptp_clock_unregister(adapter
->ptp_clock
);
867 dev_info(&adapter
->pdev
->dev
, "removed PHC on %s\n",
868 adapter
->netdev
->name
);
869 adapter
->flags
&= ~IGB_FLAG_PTP
;
874 * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
875 * @adapter: Board private structure.
877 * This function handles the reset work required to re-enable the PTP device.
879 void igb_ptp_reset(struct igb_adapter
*adapter
)
881 struct e1000_hw
*hw
= &adapter
->hw
;
883 if (!(adapter
->flags
& IGB_FLAG_PTP
))
886 /* reset the tstamp_config */
887 memset(&adapter
->tstamp_config
, 0, sizeof(adapter
->tstamp_config
));
889 switch (adapter
->hw
.mac
.type
) {
891 /* Dial the nominal frequency. */
892 wr32(E1000_TIMINCA
, INCPERIOD_82576
| INCVALUE_82576
);
899 /* Enable the timer functions and interrupts. */
900 wr32(E1000_TSAUXC
, 0x0);
901 wr32(E1000_TSIM
, TSYNC_INTERRUPTS
);
902 wr32(E1000_IMS
, E1000_IMS_TS
);
909 /* Re-initialize the timer. */
910 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
)) {
911 struct timespec ts
= ktime_to_timespec(ktime_get_real());
913 igb_ptp_settime_i210(&adapter
->ptp_caps
, &ts
);
915 timecounter_init(&adapter
->tc
, &adapter
->cc
,
916 ktime_to_ns(ktime_get_real()));