drivers/net/ethernet/intel/igb/igb_ptp.c

   1 /* PTP Hardware Clock (PHC) driver for the Intel 82576 and 82580
   2  *
   3  * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, see <http://www.gnu.org/licenses/>.
  17  */
  18 #include <linux/module.h>
  19 #include <linux/device.h>
  20 #include <linux/pci.h>
  21 #include <linux/ptp_classify.h>
  22
  23 #include "igb.h"
  24
  25 #define INCVALUE_MASK           0x7fffffff
  26 #define ISGN                    0x80000000
  27
  28 /* The 82580 timesync updates the system timer every 8ns by 8ns,
  29  * and this update value cannot be reprogrammed.
  30  *
  31  * Neither the 82576 nor the 82580 offer registers wide enough to hold
  32  * nanoseconds time values for very long. For the 82580, SYSTIM always
  33  * counts nanoseconds, but the upper 24 bits are not availible. The
  34  * frequency is adjusted by changing the 32 bit fractional nanoseconds
  35  * register, TIMINCA.
  36  *
  37  * For the 82576, the SYSTIM register time unit is affect by the
  38  * choice of the 24 bit TININCA:IV (incvalue) field. Five bits of this
  39  * field are needed to provide the nominal 16 nanosecond period,
  40  * leaving 19 bits for fractional nanoseconds.
  41  *
  42  * We scale the NIC clock cycle by a large factor so that relatively
  43  * small clock corrections can be added or subtracted at each clock
  44  * tick. The drawbacks of a large factor are a) that the clock
  45  * register overflows more quickly (not such a big deal) and b) that
  46  * the increment per tick has to fit into 24 bits.  As a result we
  47  * need to use a shift of 19 so we can fit a value of 16 into the
  48  * TIMINCA register.
  49  *
  50  *
  51  *             SYSTIMH            SYSTIML
  52  *        +--------------+   +---+---+------+
  53  *  82576 |      32      |   | 8 | 5 |  19  |
  54  *        +--------------+   +---+---+------+
  55  *         \________ 45 bits _______/  fract
  56  *
  57  *        +----------+---+   +--------------+
  58  *  82580 |    24    | 8 |   |      32      |
  59  *        +----------+---+   +--------------+
  60  *          reserved  \______ 40 bits _____/
  61  *
  62  *
  63  * The 45 bit 82576 SYSTIM overflows every
  64  *   2^45 * 10^-9 / 3600 = 9.77 hours.
  65  *
  66  * The 40 bit 82580 SYSTIM overflows every
  67  *   2^40 * 10^-9 /  60  = 18.3 minutes.
  68  */
  69
  70 #define IGB_SYSTIM_OVERFLOW_PERIOD      (HZ * 60 * 9)
  71 #define IGB_PTP_TX_TIMEOUT              (HZ * 15)
  72 #define INCPERIOD_82576                 (1 << E1000_TIMINCA_16NS_SHIFT)
  73 #define INCVALUE_82576_MASK             ((1 << E1000_TIMINCA_16NS_SHIFT) - 1)
  74 #define INCVALUE_82576                  (16 << IGB_82576_TSYNC_SHIFT)
  75 #define IGB_NBITS_82580                 40
  76
  77 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter);
  78
  79 /* SYSTIM read access for the 82576 */
  80 static cycle_t igb_ptp_read_82576(const struct cyclecounter *cc)
  81 {
  82         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
  83         struct e1000_hw *hw = &igb->hw;
  84         u64 val;
  85         u32 lo, hi;
  86
  87         lo = rd32(E1000_SYSTIML);
  88         hi = rd32(E1000_SYSTIMH);
  89
  90         val = ((u64) hi) << 32;
  91         val |= lo;
  92
  93         return val;
  94 }
  95
  96 /* SYSTIM read access for the 82580 */
  97 static cycle_t igb_ptp_read_82580(const struct cyclecounter *cc)
  98 {
  99         struct igb_adapter *igb = container_of(cc, struct igb_adapter, cc);
 100         struct e1000_hw *hw = &igb->hw;
 101         u32 lo, hi;
 102         u64 val;
 103
 104         /* The timestamp latches on lowest register read. For the 82580
 105          * the lowest register is SYSTIMR instead of SYSTIML.  However we only
 106          * need to provide nanosecond resolution, so we just ignore it.
 107          */
 108         rd32(E1000_SYSTIMR);
 109         lo = rd32(E1000_SYSTIML);
 110         hi = rd32(E1000_SYSTIMH);
 111
 112         val = ((u64) hi) << 32;
 113         val |= lo;
 114
 115         return val;
 116 }
 117
 118 /* SYSTIM read access for I210/I211 */
 119 static void igb_ptp_read_i210(struct igb_adapter *adapter, struct timespec *ts)
 120 {
 121         struct e1000_hw *hw = &adapter->hw;
 122         u32 sec, nsec;
 123
 124         /* The timestamp latches on lowest register read. For I210/I211, the
 125          * lowest register is SYSTIMR. Since we only need to provide nanosecond
 126          * resolution, we can ignore it.
 127          */
 128         rd32(E1000_SYSTIMR);
 129         nsec = rd32(E1000_SYSTIML);
 130         sec = rd32(E1000_SYSTIMH);
 131
 132         ts->tv_sec = sec;
 133         ts->tv_nsec = nsec;
 134 }
 135
 136 static void igb_ptp_write_i210(struct igb_adapter *adapter,
 137                                const struct timespec *ts)
 138 {
 139         struct e1000_hw *hw = &adapter->hw;
 140
 141         /* Writing the SYSTIMR register is not necessary as it only provides
 142          * sub-nanosecond resolution.
 143          */
 144         wr32(E1000_SYSTIML, ts->tv_nsec);
 145         wr32(E1000_SYSTIMH, ts->tv_sec);
 146 }
 147
 148 /**
 149  * igb_ptp_systim_to_hwtstamp - convert system time value to hw timestamp
 150  * @adapter: board private structure
 151  * @hwtstamps: timestamp structure to update
 152  * @systim: unsigned 64bit system time value.
 153  *
 154  * We need to convert the system time value stored in the RX/TXSTMP registers
 155  * into a hwtstamp which can be used by the upper level timestamping functions.
 156  *
 157  * The 'tmreg_lock' spinlock is used to protect the consistency of the
 158  * system time value. This is needed because reading the 64 bit time
 159  * value involves reading two (or three) 32 bit registers. The first
 160  * read latches the value. Ditto for writing.
 161  *
 162  * In addition, here have extended the system time with an overflow
 163  * counter in software.
 164  **/
 165 static void igb_ptp_systim_to_hwtstamp(struct igb_adapter *adapter,
 166                                        struct skb_shared_hwtstamps *hwtstamps,
 167                                        u64 systim)
 168 {
 169         unsigned long flags;
 170         u64 ns;
 171
 172         switch (adapter->hw.mac.type) {
 173         case e1000_82576:
 174         case e1000_82580:
 175         case e1000_i354:
 176         case e1000_i350:
 177                 spin_lock_irqsave(&adapter->tmreg_lock, flags);
 178
 179                 ns = timecounter_cyc2time(&adapter->tc, systim);
 180
 181                 spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 182
 183                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 184                 hwtstamps->hwtstamp = ns_to_ktime(ns);
 185                 break;
 186         case e1000_i210:
 187         case e1000_i211:
 188                 memset(hwtstamps, 0, sizeof(*hwtstamps));
 189                 /* Upper 32 bits contain s, lower 32 bits contain ns. */
 190                 hwtstamps->hwtstamp = ktime_set(systim >> 32,
 191                                                 systim & 0xFFFFFFFF);
 192                 break;
 193         default:
 194                 break;
 195         }
 196 }
 197
 198 /* PTP clock operations */
 199 static int igb_ptp_adjfreq_82576(struct ptp_clock_info *ptp, s32 ppb)
 200 {
 201         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 202                                                ptp_caps);
 203         struct e1000_hw *hw = &igb->hw;
 204         int neg_adj = 0;
 205         u64 rate;
 206         u32 incvalue;
 207
 208         if (ppb < 0) {
 209                 neg_adj = 1;
 210                 ppb = -ppb;
 211         }
 212         rate = ppb;
 213         rate <<= 14;
 214         rate = div_u64(rate, 1953125);
 215
 216         incvalue = 16 << IGB_82576_TSYNC_SHIFT;
 217
 218         if (neg_adj)
 219                 incvalue -= rate;
 220         else
 221                 incvalue += rate;
 222
 223         wr32(E1000_TIMINCA, INCPERIOD_82576 | (incvalue & INCVALUE_82576_MASK));
 224
 225         return 0;
 226 }
 227
 228 static int igb_ptp_adjfreq_82580(struct ptp_clock_info *ptp, s32 ppb)
 229 {
 230         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 231                                                ptp_caps);
 232         struct e1000_hw *hw = &igb->hw;
 233         int neg_adj = 0;
 234         u64 rate;
 235         u32 inca;
 236
 237         if (ppb < 0) {
 238                 neg_adj = 1;
 239                 ppb = -ppb;
 240         }
 241         rate = ppb;
 242         rate <<= 26;
 243         rate = div_u64(rate, 1953125);
 244
 245         inca = rate & INCVALUE_MASK;
 246         if (neg_adj)
 247                 inca |= ISGN;
 248
 249         wr32(E1000_TIMINCA, inca);
 250
 251         return 0;
 252 }
 253
 254 static int igb_ptp_adjtime_82576(struct ptp_clock_info *ptp, s64 delta)
 255 {
 256         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 257                                                ptp_caps);
 258         unsigned long flags;
 259
 260         spin_lock_irqsave(&igb->tmreg_lock, flags);
 261         timecounter_adjtime(&igb->tc, delta);
 262         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 263
 264         return 0;
 265 }
 266
 267 static int igb_ptp_adjtime_i210(struct ptp_clock_info *ptp, s64 delta)
 268 {
 269         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 270                                                ptp_caps);
 271         unsigned long flags;
 272         struct timespec now, then = ns_to_timespec(delta);
 273
 274         spin_lock_irqsave(&igb->tmreg_lock, flags);
 275
 276         igb_ptp_read_i210(igb, &now);
 277         now = timespec_add(now, then);
 278         igb_ptp_write_i210(igb, (const struct timespec *)&now);
 279
 280         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 281
 282         return 0;
 283 }
 284
 285 static int igb_ptp_gettime_82576(struct ptp_clock_info *ptp,
 286                                  struct timespec *ts)
 287 {
 288         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 289                                                ptp_caps);
 290         unsigned long flags;
 291         u64 ns;
 292         u32 remainder;
 293
 294         spin_lock_irqsave(&igb->tmreg_lock, flags);
 295
 296         ns = timecounter_read(&igb->tc);
 297
 298         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 299
 300         ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
 301         ts->tv_nsec = remainder;
 302
 303         return 0;
 304 }
 305
 306 static int igb_ptp_gettime_i210(struct ptp_clock_info *ptp,
 307                                 struct timespec *ts)
 308 {
 309         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 310                                                ptp_caps);
 311         unsigned long flags;
 312
 313         spin_lock_irqsave(&igb->tmreg_lock, flags);
 314
 315         igb_ptp_read_i210(igb, ts);
 316
 317         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 318
 319         return 0;
 320 }
 321
 322 static int igb_ptp_settime_82576(struct ptp_clock_info *ptp,
 323                                  const struct timespec *ts)
 324 {
 325         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 326                                                ptp_caps);
 327         unsigned long flags;
 328         u64 ns;
 329
 330         ns = ts->tv_sec * 1000000000ULL;
 331         ns += ts->tv_nsec;
 332
 333         spin_lock_irqsave(&igb->tmreg_lock, flags);
 334
 335         timecounter_init(&igb->tc, &igb->cc, ns);
 336
 337         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 338
 339         return 0;
 340 }
 341
 342 static int igb_ptp_settime_i210(struct ptp_clock_info *ptp,
 343                                 const struct timespec *ts)
 344 {
 345         struct igb_adapter *igb = container_of(ptp, struct igb_adapter,
 346                                                ptp_caps);
 347         unsigned long flags;
 348
 349         spin_lock_irqsave(&igb->tmreg_lock, flags);
 350
 351         igb_ptp_write_i210(igb, ts);
 352
 353         spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 354
 355         return 0;
 356 }
 357
 358 static int igb_ptp_feature_enable_i210(struct ptp_clock_info *ptp,
 359                                        struct ptp_clock_request *rq, int on)
 360 {
 361         struct igb_adapter *igb =
 362                 container_of(ptp, struct igb_adapter, ptp_caps);
 363         struct e1000_hw *hw = &igb->hw;
 364         unsigned long flags;
 365         u32 tsim;
 366
 367         switch (rq->type) {
 368         case PTP_CLK_REQ_PPS:
 369                 spin_lock_irqsave(&igb->tmreg_lock, flags);
 370                 tsim = rd32(E1000_TSIM);
 371                 if (on)
 372                         tsim |= TSINTR_SYS_WRAP;
 373                 else
 374                         tsim &= ~TSINTR_SYS_WRAP;
 375                 wr32(E1000_TSIM, tsim);
 376                 spin_unlock_irqrestore(&igb->tmreg_lock, flags);
 377                 return 0;
 378
 379         default:
 380                 break;
 381         }
 382
 383         return -EOPNOTSUPP;
 384 }
 385
 386 static int igb_ptp_feature_enable(struct ptp_clock_info *ptp,
 387                                   struct ptp_clock_request *rq, int on)
 388 {
 389         return -EOPNOTSUPP;
 390 }
 391
 392 /**
 393  * igb_ptp_tx_work
 394  * @work: pointer to work struct
 395  *
 396  * This work function polls the TSYNCTXCTL valid bit to determine when a
 397  * timestamp has been taken for the current stored skb.
 398  **/
 399 static void igb_ptp_tx_work(struct work_struct *work)
 400 {
 401         struct igb_adapter *adapter = container_of(work, struct igb_adapter,
 402                                                    ptp_tx_work);
 403         struct e1000_hw *hw = &adapter->hw;
 404         u32 tsynctxctl;
 405
 406         if (!adapter->ptp_tx_skb)
 407                 return;
 408
 409         if (time_is_before_jiffies(adapter->ptp_tx_start +
 410                                    IGB_PTP_TX_TIMEOUT)) {
 411                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 412                 adapter->ptp_tx_skb = NULL;
 413                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 414                 adapter->tx_hwtstamp_timeouts++;
 415                 dev_warn(&adapter->pdev->dev, "clearing Tx timestamp hang\n");
 416                 return;
 417         }
 418
 419         tsynctxctl = rd32(E1000_TSYNCTXCTL);
 420         if (tsynctxctl & E1000_TSYNCTXCTL_VALID)
 421                 igb_ptp_tx_hwtstamp(adapter);
 422         else
 423                 /* reschedule to check later */
 424                 schedule_work(&adapter->ptp_tx_work);
 425 }
 426
 427 static void igb_ptp_overflow_check(struct work_struct *work)
 428 {
 429         struct igb_adapter *igb =
 430                 container_of(work, struct igb_adapter, ptp_overflow_work.work);
 431         struct timespec ts;
 432
 433         igb->ptp_caps.gettime(&igb->ptp_caps, &ts);
 434
 435         pr_debug("igb overflow check at %ld.%09lu\n", ts.tv_sec, ts.tv_nsec);
 436
 437         schedule_delayed_work(&igb->ptp_overflow_work,
 438                               IGB_SYSTIM_OVERFLOW_PERIOD);
 439 }
 440
 441 /**
 442  * igb_ptp_rx_hang - detect error case when Rx timestamp registers latched
 443  * @adapter: private network adapter structure
 444  *
 445  * This watchdog task is scheduled to detect error case where hardware has
 446  * dropped an Rx packet that was timestamped when the ring is full. The
 447  * particular error is rare but leaves the device in a state unable to timestamp
 448  * any future packets.
 449  **/
 450 void igb_ptp_rx_hang(struct igb_adapter *adapter)
 451 {
 452         struct e1000_hw *hw = &adapter->hw;
 453         u32 tsyncrxctl = rd32(E1000_TSYNCRXCTL);
 454         unsigned long rx_event;
 455
 456         if (hw->mac.type != e1000_82576)
 457                 return;
 458
 459         /* If we don't have a valid timestamp in the registers, just update the
 460          * timeout counter and exit
 461          */
 462         if (!(tsyncrxctl & E1000_TSYNCRXCTL_VALID)) {
 463                 adapter->last_rx_ptp_check = jiffies;
 464                 return;
 465         }
 466
 467         /* Determine the most recent watchdog or rx_timestamp event */
 468         rx_event = adapter->last_rx_ptp_check;
 469         if (time_after(adapter->last_rx_timestamp, rx_event))
 470                 rx_event = adapter->last_rx_timestamp;
 471
 472         /* Only need to read the high RXSTMP register to clear the lock */
 473         if (time_is_before_jiffies(rx_event + 5 * HZ)) {
 474                 rd32(E1000_RXSTMPH);
 475                 adapter->last_rx_ptp_check = jiffies;
 476                 adapter->rx_hwtstamp_cleared++;
 477                 dev_warn(&adapter->pdev->dev, "clearing Rx timestamp hang\n");
 478         }
 479 }
 480
 481 /**
 482  * igb_ptp_tx_hwtstamp - utility function which checks for TX time stamp
 483  * @adapter: Board private structure.
 484  *
 485  * If we were asked to do hardware stamping and such a time stamp is
 486  * available, then it must have been for this skb here because we only
 487  * allow only one such packet into the queue.
 488  **/
 489 static void igb_ptp_tx_hwtstamp(struct igb_adapter *adapter)
 490 {
 491         struct e1000_hw *hw = &adapter->hw;
 492         struct skb_shared_hwtstamps shhwtstamps;
 493         u64 regval;
 494
 495         regval = rd32(E1000_TXSTMPL);
 496         regval |= (u64)rd32(E1000_TXSTMPH) << 32;
 497
 498         igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval);
 499         skb_tstamp_tx(adapter->ptp_tx_skb, &shhwtstamps);
 500         dev_kfree_skb_any(adapter->ptp_tx_skb);
 501         adapter->ptp_tx_skb = NULL;
 502         clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 503 }
 504
 505 /**
 506  * igb_ptp_rx_pktstamp - retrieve Rx per packet timestamp
 507  * @q_vector: Pointer to interrupt specific structure
 508  * @va: Pointer to address containing Rx buffer
 509  * @skb: Buffer containing timestamp and packet
 510  *
 511  * This function is meant to retrieve a timestamp from the first buffer of an
 512  * incoming frame.  The value is stored in little endian format starting on
 513  * byte 8.
 514  **/
 515 void igb_ptp_rx_pktstamp(struct igb_q_vector *q_vector,
 516                          unsigned char *va,
 517                          struct sk_buff *skb)
 518 {
 519         __le64 *regval = (__le64 *)va;
 520
 521         /* The timestamp is recorded in little endian format.
 522          * DWORD: 0        1        2        3
 523          * Field: Reserved Reserved SYSTIML  SYSTIMH
 524          */
 525         igb_ptp_systim_to_hwtstamp(q_vector->adapter, skb_hwtstamps(skb),
 526                                    le64_to_cpu(regval[1]));
 527 }
 528
 529 /**
 530  * igb_ptp_rx_rgtstamp - retrieve Rx timestamp stored in register
 531  * @q_vector: Pointer to interrupt specific structure
 532  * @skb: Buffer containing timestamp and packet
 533  *
 534  * This function is meant to retrieve a timestamp from the internal registers
 535  * of the adapter and store it in the skb.
 536  **/
 537 void igb_ptp_rx_rgtstamp(struct igb_q_vector *q_vector,
 538                          struct sk_buff *skb)
 539 {
 540         struct igb_adapter *adapter = q_vector->adapter;
 541         struct e1000_hw *hw = &adapter->hw;
 542         u64 regval;
 543
 544         /* If this bit is set, then the RX registers contain the time stamp. No
 545          * other packet will be time stamped until we read these registers, so
 546          * read the registers to make them available again. Because only one
 547          * packet can be time stamped at a time, we know that the register
 548          * values must belong to this one here and therefore we don't need to
 549          * compare any of the additional attributes stored for it.
 550          *
 551          * If nothing went wrong, then it should have a shared tx_flags that we
 552          * can turn into a skb_shared_hwtstamps.
 553          */
 554         if (!(rd32(E1000_TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
 555                 return;
 556
 557         regval = rd32(E1000_RXSTMPL);
 558         regval |= (u64)rd32(E1000_RXSTMPH) << 32;
 559
 560         igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval);
 561
 562         /* Update the last_rx_timestamp timer in order to enable watchdog check
 563          * for error case of latched timestamp on a dropped packet.
 564          */
 565         adapter->last_rx_timestamp = jiffies;
 566 }
 567
 568 /**
 569  * igb_ptp_get_ts_config - get hardware time stamping config
 570  * @netdev:
 571  * @ifreq:
 572  *
 573  * Get the hwtstamp_config settings to return to the user. Rather than attempt
 574  * to deconstruct the settings from the registers, just return a shadow copy
 575  * of the last known settings.
 576  **/
 577 int igb_ptp_get_ts_config(struct net_device *netdev, struct ifreq *ifr)
 578 {
 579         struct igb_adapter *adapter = netdev_priv(netdev);
 580         struct hwtstamp_config *config = &adapter->tstamp_config;
 581
 582         return copy_to_user(ifr->ifr_data, config, sizeof(*config)) ?
 583                 -EFAULT : 0;
 584 }
 585
 586 /**
 587  * igb_ptp_set_timestamp_mode - setup hardware for timestamping
 588  * @adapter: networking device structure
 589  * @config: hwtstamp configuration
 590  *
 591  * Outgoing time stamping can be enabled and disabled. Play nice and
 592  * disable it when requested, although it shouldn't case any overhead
 593  * when no packet needs it. At most one packet in the queue may be
 594  * marked for time stamping, otherwise it would be impossible to tell
 595  * for sure to which packet the hardware time stamp belongs.
 596  *
 597  * Incoming time stamping has to be configured via the hardware
 598  * filters. Not all combinations are supported, in particular event
 599  * type has to be specified. Matching the kind of event packet is
 600  * not supported, with the exception of "all V2 events regardless of
 601  * level 2 or 4".
 602  */
 603 static int igb_ptp_set_timestamp_mode(struct igb_adapter *adapter,
 604                                       struct hwtstamp_config *config)
 605 {
 606         struct e1000_hw *hw = &adapter->hw;
 607         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
 608         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 609         u32 tsync_rx_cfg = 0;
 610         bool is_l4 = false;
 611         bool is_l2 = false;
 612         u32 regval;
 613
 614         /* reserved for future extensions */
 615         if (config->flags)
 616                 return -EINVAL;
 617
 618         switch (config->tx_type) {
 619         case HWTSTAMP_TX_OFF:
 620                 tsync_tx_ctl = 0;
 621         case HWTSTAMP_TX_ON:
 622                 break;
 623         default:
 624                 return -ERANGE;
 625         }
 626
 627         switch (config->rx_filter) {
 628         case HWTSTAMP_FILTER_NONE:
 629                 tsync_rx_ctl = 0;
 630                 break;
 631         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 632                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 633                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_SYNC_MESSAGE;
 634                 is_l4 = true;
 635                 break;
 636         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 637                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
 638                 tsync_rx_cfg = E1000_TSYNCRXCFG_PTP_V1_DELAY_REQ_MESSAGE;
 639                 is_l4 = true;
 640                 break;
 641         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 642         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 643         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 644         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 645         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 646         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 647         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 648         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 649         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 650                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
 651                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 652                 is_l2 = true;
 653                 is_l4 = true;
 654                 break;
 655         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 656         case HWTSTAMP_FILTER_ALL:
 657                 /* 82576 cannot timestamp all packets, which it needs to do to
 658                  * support both V1 Sync and Delay_Req messages
 659                  */
 660                 if (hw->mac.type != e1000_82576) {
 661                         tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 662                         config->rx_filter = HWTSTAMP_FILTER_ALL;
 663                         break;
 664                 }
 665                 /* fall through */
 666         default:
 667                 config->rx_filter = HWTSTAMP_FILTER_NONE;
 668                 return -ERANGE;
 669         }
 670
 671         if (hw->mac.type == e1000_82575) {
 672                 if (tsync_rx_ctl | tsync_tx_ctl)
 673                         return -EINVAL;
 674                 return 0;
 675         }
 676
 677         /* Per-packet timestamping only works if all packets are
 678          * timestamped, so enable timestamping in all packets as
 679          * long as one Rx filter was configured.
 680          */
 681         if ((hw->mac.type >= e1000_82580) && tsync_rx_ctl) {
 682                 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
 683                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
 684                 config->rx_filter = HWTSTAMP_FILTER_ALL;
 685                 is_l2 = true;
 686                 is_l4 = true;
 687
 688                 if ((hw->mac.type == e1000_i210) ||
 689                     (hw->mac.type == e1000_i211)) {
 690                         regval = rd32(E1000_RXPBS);
 691                         regval |= E1000_RXPBS_CFG_TS_EN;
 692                         wr32(E1000_RXPBS, regval);
 693                 }
 694         }
 695
 696         /* enable/disable TX */
 697         regval = rd32(E1000_TSYNCTXCTL);
 698         regval &= ~E1000_TSYNCTXCTL_ENABLED;
 699         regval |= tsync_tx_ctl;
 700         wr32(E1000_TSYNCTXCTL, regval);
 701
 702         /* enable/disable RX */
 703         regval = rd32(E1000_TSYNCRXCTL);
 704         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
 705         regval |= tsync_rx_ctl;
 706         wr32(E1000_TSYNCRXCTL, regval);
 707
 708         /* define which PTP packets are time stamped */
 709         wr32(E1000_TSYNCRXCFG, tsync_rx_cfg);
 710
 711         /* define ethertype filter for timestamped packets */
 712         if (is_l2)
 713                 wr32(E1000_ETQF(3),
 714                      (E1000_ETQF_FILTER_ENABLE | /* enable filter */
 715                       E1000_ETQF_1588 | /* enable timestamping */
 716                       ETH_P_1588));     /* 1588 eth protocol type */
 717         else
 718                 wr32(E1000_ETQF(3), 0);
 719
 720         /* L4 Queue Filter[3]: filter by destination port and protocol */
 721         if (is_l4) {
 722                 u32 ftqf = (IPPROTO_UDP /* UDP */
 723                         | E1000_FTQF_VF_BP /* VF not compared */
 724                         | E1000_FTQF_1588_TIME_STAMP /* Enable Timestamping */
 725                         | E1000_FTQF_MASK); /* mask all inputs */
 726                 ftqf &= ~E1000_FTQF_MASK_PROTO_BP; /* enable protocol check */
 727
 728                 wr32(E1000_IMIR(3), htons(PTP_EV_PORT));
 729                 wr32(E1000_IMIREXT(3),
 730                      (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 731                 if (hw->mac.type == e1000_82576) {
 732                         /* enable source port check */
 733                         wr32(E1000_SPQF(3), htons(PTP_EV_PORT));
 734                         ftqf &= ~E1000_FTQF_MASK_SOURCE_PORT_BP;
 735                 }
 736                 wr32(E1000_FTQF(3), ftqf);
 737         } else {
 738                 wr32(E1000_FTQF(3), E1000_FTQF_MASK);
 739         }
 740         wrfl();
 741
 742         /* clear TX/RX time stamp registers, just to be sure */
 743         regval = rd32(E1000_TXSTMPL);
 744         regval = rd32(E1000_TXSTMPH);
 745         regval = rd32(E1000_RXSTMPL);
 746         regval = rd32(E1000_RXSTMPH);
 747
 748         return 0;
 749 }
 750
 751 /**
 752  * igb_ptp_set_ts_config - set hardware time stamping config
 753  * @netdev:
 754  * @ifreq:
 755  *
 756  **/
 757 int igb_ptp_set_ts_config(struct net_device *netdev, struct ifreq *ifr)
 758 {
 759         struct igb_adapter *adapter = netdev_priv(netdev);
 760         struct hwtstamp_config config;
 761         int err;
 762
 763         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
 764                 return -EFAULT;
 765
 766         err = igb_ptp_set_timestamp_mode(adapter, &config);
 767         if (err)
 768                 return err;
 769
 770         /* save these settings for future reference */
 771         memcpy(&adapter->tstamp_config, &config,
 772                sizeof(adapter->tstamp_config));
 773
 774         return copy_to_user(ifr->ifr_data, &config, sizeof(config)) ?
 775                 -EFAULT : 0;
 776 }
 777
 778 void igb_ptp_init(struct igb_adapter *adapter)
 779 {
 780         struct e1000_hw *hw = &adapter->hw;
 781         struct net_device *netdev = adapter->netdev;
 782
 783         switch (hw->mac.type) {
 784         case e1000_82576:
 785                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 786                 adapter->ptp_caps.owner = THIS_MODULE;
 787                 adapter->ptp_caps.max_adj = 999999881;
 788                 adapter->ptp_caps.n_ext_ts = 0;
 789                 adapter->ptp_caps.pps = 0;
 790                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82576;
 791                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 792                 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 793                 adapter->ptp_caps.settime = igb_ptp_settime_82576;
 794                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
 795                 adapter->cc.read = igb_ptp_read_82576;
 796                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
 797                 adapter->cc.mult = 1;
 798                 adapter->cc.shift = IGB_82576_TSYNC_SHIFT;
 799                 /* Dial the nominal frequency. */
 800                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 801                 break;
 802         case e1000_82580:
 803         case e1000_i354:
 804         case e1000_i350:
 805                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 806                 adapter->ptp_caps.owner = THIS_MODULE;
 807                 adapter->ptp_caps.max_adj = 62499999;
 808                 adapter->ptp_caps.n_ext_ts = 0;
 809                 adapter->ptp_caps.pps = 0;
 810                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 811                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_82576;
 812                 adapter->ptp_caps.gettime = igb_ptp_gettime_82576;
 813                 adapter->ptp_caps.settime = igb_ptp_settime_82576;
 814                 adapter->ptp_caps.enable = igb_ptp_feature_enable;
 815                 adapter->cc.read = igb_ptp_read_82580;
 816                 adapter->cc.mask = CYCLECOUNTER_MASK(IGB_NBITS_82580);
 817                 adapter->cc.mult = 1;
 818                 adapter->cc.shift = 0;
 819                 /* Enable the timer functions by clearing bit 31. */
 820                 wr32(E1000_TSAUXC, 0x0);
 821                 break;
 822         case e1000_i210:
 823         case e1000_i211:
 824                 snprintf(adapter->ptp_caps.name, 16, "%pm", netdev->dev_addr);
 825                 adapter->ptp_caps.owner = THIS_MODULE;
 826                 adapter->ptp_caps.max_adj = 62499999;
 827                 adapter->ptp_caps.n_ext_ts = 0;
 828                 adapter->ptp_caps.pps = 1;
 829                 adapter->ptp_caps.adjfreq = igb_ptp_adjfreq_82580;
 830                 adapter->ptp_caps.adjtime = igb_ptp_adjtime_i210;
 831                 adapter->ptp_caps.gettime = igb_ptp_gettime_i210;
 832                 adapter->ptp_caps.settime = igb_ptp_settime_i210;
 833                 adapter->ptp_caps.enable = igb_ptp_feature_enable_i210;
 834                 /* Enable the timer functions by clearing bit 31. */
 835                 wr32(E1000_TSAUXC, 0x0);
 836                 break;
 837         default:
 838                 adapter->ptp_clock = NULL;
 839                 return;
 840         }
 841
 842         wrfl();
 843
 844         spin_lock_init(&adapter->tmreg_lock);
 845         INIT_WORK(&adapter->ptp_tx_work, igb_ptp_tx_work);
 846
 847         /* Initialize the clock and overflow work for devices that need it. */
 848         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 849                 struct timespec ts = ktime_to_timespec(ktime_get_real());
 850
 851                 igb_ptp_settime_i210(&adapter->ptp_caps, &ts);
 852         } else {
 853                 timecounter_init(&adapter->tc, &adapter->cc,
 854                                  ktime_to_ns(ktime_get_real()));
 855
 856                 INIT_DELAYED_WORK(&adapter->ptp_overflow_work,
 857                                   igb_ptp_overflow_check);
 858
 859                 schedule_delayed_work(&adapter->ptp_overflow_work,
 860                                       IGB_SYSTIM_OVERFLOW_PERIOD);
 861         }
 862
 863         /* Initialize the time sync interrupts for devices that support it. */
 864         if (hw->mac.type >= e1000_82580) {
 865                 wr32(E1000_TSIM, TSYNC_INTERRUPTS);
 866                 wr32(E1000_IMS, E1000_IMS_TS);
 867         }
 868
 869         adapter->tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
 870         adapter->tstamp_config.tx_type = HWTSTAMP_TX_OFF;
 871
 872         adapter->ptp_clock = ptp_clock_register(&adapter->ptp_caps,
 873                                                 &adapter->pdev->dev);
 874         if (IS_ERR(adapter->ptp_clock)) {
 875                 adapter->ptp_clock = NULL;
 876                 dev_err(&adapter->pdev->dev, "ptp_clock_register failed\n");
 877         } else {
 878                 dev_info(&adapter->pdev->dev, "added PHC on %s\n",
 879                          adapter->netdev->name);
 880                 adapter->flags |= IGB_FLAG_PTP;
 881         }
 882 }
 883
 884 /**
 885  * igb_ptp_stop - Disable PTP device and stop the overflow check.
 886  * @adapter: Board private structure.
 887  *
 888  * This function stops the PTP support and cancels the delayed work.
 889  **/
 890 void igb_ptp_stop(struct igb_adapter *adapter)
 891 {
 892         switch (adapter->hw.mac.type) {
 893         case e1000_82576:
 894         case e1000_82580:
 895         case e1000_i354:
 896         case e1000_i350:
 897                 cancel_delayed_work_sync(&adapter->ptp_overflow_work);
 898                 break;
 899         case e1000_i210:
 900         case e1000_i211:
 901                 /* No delayed work to cancel. */
 902                 break;
 903         default:
 904                 return;
 905         }
 906
 907         cancel_work_sync(&adapter->ptp_tx_work);
 908         if (adapter->ptp_tx_skb) {
 909                 dev_kfree_skb_any(adapter->ptp_tx_skb);
 910                 adapter->ptp_tx_skb = NULL;
 911                 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS, &adapter->state);
 912         }
 913
 914         if (adapter->ptp_clock) {
 915                 ptp_clock_unregister(adapter->ptp_clock);
 916                 dev_info(&adapter->pdev->dev, "removed PHC on %s\n",
 917                          adapter->netdev->name);
 918                 adapter->flags &= ~IGB_FLAG_PTP;
 919         }
 920 }
 921
 922 /**
 923  * igb_ptp_reset - Re-enable the adapter for PTP following a reset.
 924  * @adapter: Board private structure.
 925  *
 926  * This function handles the reset work required to re-enable the PTP device.
 927  **/
 928 void igb_ptp_reset(struct igb_adapter *adapter)
 929 {
 930         struct e1000_hw *hw = &adapter->hw;
 931         unsigned long flags;
 932
 933         if (!(adapter->flags & IGB_FLAG_PTP))
 934                 return;
 935
 936         /* reset the tstamp_config */
 937         igb_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
 938
 939         spin_lock_irqsave(&adapter->tmreg_lock, flags);
 940
 941         switch (adapter->hw.mac.type) {
 942         case e1000_82576:
 943                 /* Dial the nominal frequency. */
 944                 wr32(E1000_TIMINCA, INCPERIOD_82576 | INCVALUE_82576);
 945                 break;
 946         case e1000_82580:
 947         case e1000_i354:
 948         case e1000_i350:
 949         case e1000_i210:
 950         case e1000_i211:
 951                 wr32(E1000_TSAUXC, 0x0);
 952                 wr32(E1000_TSIM, TSYNC_INTERRUPTS);
 953                 wr32(E1000_IMS, E1000_IMS_TS);
 954                 break;
 955         default:
 956                 /* No work to do. */
 957                 goto out;
 958         }
 959
 960         /* Re-initialize the timer. */
 961         if ((hw->mac.type == e1000_i210) || (hw->mac.type == e1000_i211)) {
 962                 struct timespec ts = ktime_to_timespec(ktime_get_real());
 963
 964                 igb_ptp_write_i210(adapter, &ts);
 965         } else {
 966                 timecounter_init(&adapter->tc, &adapter->cc,
 967                                  ktime_to_ns(ktime_get_real()));
 968         }
 969 out:
 970         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 971 }