Merge tag 'powerpc-4.4-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[deliverable/linux.git] / drivers / net / ethernet / intel / ixgbe / ixgbe_fcoe.h
1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2013 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #ifndef _IXGBE_FCOE_H
30 #define _IXGBE_FCOE_H
31
32 #include <scsi/fc/fc_fs.h>
33 #include <scsi/fc/fc_fcoe.h>
34
35 /* shift bits within STAT fo FCSTAT */
36 #define IXGBE_RXDADV_FCSTAT_SHIFT 4
37
38 /* ddp user buffer */
39 #define IXGBE_BUFFCNT_MAX 256 /* 8 bits bufcnt */
40 #define IXGBE_FCPTR_ALIGN 16
41 #define IXGBE_FCPTR_MAX (IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t))
42 #define IXGBE_FCBUFF_4KB 0x0
43 #define IXGBE_FCBUFF_8KB 0x1
44 #define IXGBE_FCBUFF_16KB 0x2
45 #define IXGBE_FCBUFF_64KB 0x3
46 #define IXGBE_FCBUFF_MAX 65536 /* 64KB max */
47 #define IXGBE_FCBUFF_MIN 4096 /* 4KB min */
48 #define IXGBE_FCOE_DDP_MAX 512 /* 9 bits xid */
49 #define IXGBE_FCOE_DDP_MAX_X550 2048 /* 11 bits xid */
50
51 /* Default traffic class to use for FCoE */
52 #define IXGBE_FCOE_DEFTC 3
53
54 /* fcerr */
55 #define IXGBE_FCERR_BADCRC 0x00100000
56
57 /* FCoE DDP for target mode */
58 #define __IXGBE_FCOE_TARGET 1
59
60 struct ixgbe_fcoe_ddp {
61 int len;
62 u32 err;
63 unsigned int sgc;
64 struct scatterlist *sgl;
65 dma_addr_t udp;
66 u64 *udl;
67 struct dma_pool *pool;
68 };
69
70 /* per cpu variables */
71 struct ixgbe_fcoe_ddp_pool {
72 struct dma_pool *pool;
73 u64 noddp;
74 u64 noddp_ext_buff;
75 };
76
77 struct ixgbe_fcoe {
78 struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool;
79 atomic_t refcnt;
80 spinlock_t lock;
81 struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550];
82 void *extra_ddp_buffer;
83 dma_addr_t extra_ddp_buffer_dma;
84 unsigned long mode;
85 u8 up;
86 };
87
88 #endif /* _IXGBE_FCOE_H */
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