1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2013 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_macvlan.h>
48 #include <linux/if_bridge.h>
49 #include <linux/prefetch.h>
50 #include <scsi/fc/fc_fcoe.h>
53 #include "ixgbe_common.h"
54 #include "ixgbe_dcb_82599.h"
55 #include "ixgbe_sriov.h"
57 char ixgbe_driver_name
[] = "ixgbe";
58 static const char ixgbe_driver_string
[] =
59 "Intel(R) 10 Gigabit PCI Express Network Driver";
61 char ixgbe_default_device_descr
[] =
62 "Intel(R) 10 Gigabit Network Connection";
64 static char ixgbe_default_device_descr
[] =
65 "Intel(R) 10 Gigabit Network Connection";
67 #define DRV_VERSION "3.19.1-k"
68 const char ixgbe_driver_version
[] = DRV_VERSION
;
69 static const char ixgbe_copyright
[] =
70 "Copyright (c) 1999-2013 Intel Corporation.";
72 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
73 [board_82598
] = &ixgbe_82598_info
,
74 [board_82599
] = &ixgbe_82599_info
,
75 [board_X540
] = &ixgbe_X540_info
,
78 /* ixgbe_pci_tbl - PCI Device ID Table
80 * Wildcard entries (PCI_ANY_ID) should come last
81 * Last entry must be all 0s
83 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
84 * Class, Class Mask, private data (not used) }
86 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
87 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
88 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
125 static struct notifier_block dca_notifier
= {
126 .notifier_call
= ixgbe_notify_dca
,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs
;
134 module_param(max_vfs
, uint
, 0);
135 MODULE_PARM_DESC(max_vfs
,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp
;
140 module_param(allow_unsupported_sfp
, uint
, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp
,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug
= -1;
146 module_param(debug
, int, 0);
147 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION
);
154 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
157 struct pci_dev
*parent_dev
;
158 struct pci_bus
*parent_bus
;
160 parent_bus
= adapter
->pdev
->bus
->parent
;
164 parent_dev
= parent_bus
->self
;
168 if (!pci_is_pcie(parent_dev
))
171 pcie_capability_read_word(parent_dev
, reg
, value
);
175 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
177 struct ixgbe_hw
*hw
= &adapter
->hw
;
181 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
183 /* Get the negotiated link width and speed from PCI config space of the
184 * parent, as this device is behind a switch
186 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
188 /* assume caller will handle error case */
192 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
193 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
199 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
200 * @hw: hw specific details
202 * This function is used by probe to determine whether a device's PCI-Express
203 * bandwidth details should be gathered from the parent bus instead of from the
204 * device. Used to ensure that various locations all have the correct device ID
207 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
209 switch (hw
->device_id
) {
210 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
211 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
218 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
222 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
223 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
224 struct pci_dev
*pdev
;
226 /* determine whether to use the the parent device
228 if (ixgbe_pcie_from_parent(&adapter
->hw
))
229 pdev
= adapter
->pdev
->bus
->parent
->self
;
231 pdev
= adapter
->pdev
;
233 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
234 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
235 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
240 case PCIE_SPEED_2_5GT
:
241 /* 8b/10b encoding reduces max throughput by 20% */
244 case PCIE_SPEED_5_0GT
:
245 /* 8b/10b encoding reduces max throughput by 20% */
248 case PCIE_SPEED_8_0GT
:
249 /* 128b/130b encoding reduces throughput by less than 2% */
253 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
257 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
259 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
260 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
261 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
262 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
265 (speed
== PCIE_SPEED_2_5GT
? "20%" :
266 speed
== PCIE_SPEED_5_0GT
? "20%" :
267 speed
== PCIE_SPEED_8_0GT
? "<2%" :
270 if (max_gts
< expected_gts
) {
271 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
272 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
274 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
278 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
280 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
281 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
282 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
283 schedule_work(&adapter
->service_task
);
286 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
288 struct ixgbe_adapter
*adapter
= hw
->back
;
293 e_dev_err("Adapter removed\n");
294 ixgbe_service_event_schedule(adapter
);
297 void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
301 /* The following check not only optimizes a bit by not
302 * performing a read on the status register when the
303 * register just read was a status register read that
304 * returned IXGBE_FAILED_READ_REG. It also blocks any
305 * potential recursion.
307 if (reg
== IXGBE_STATUS
) {
308 ixgbe_remove_adapter(hw
);
311 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
312 if (value
== IXGBE_FAILED_READ_REG
)
313 ixgbe_remove_adapter(hw
);
316 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
318 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
320 /* flush memory to make sure state is correct before next watchdog */
321 smp_mb__before_clear_bit();
322 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
325 struct ixgbe_reg_info
{
330 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
332 /* General Registers */
333 {IXGBE_CTRL
, "CTRL"},
334 {IXGBE_STATUS
, "STATUS"},
335 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
337 /* Interrupt Registers */
338 {IXGBE_EICR
, "EICR"},
341 {IXGBE_SRRCTL(0), "SRRCTL"},
342 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
343 {IXGBE_RDLEN(0), "RDLEN"},
344 {IXGBE_RDH(0), "RDH"},
345 {IXGBE_RDT(0), "RDT"},
346 {IXGBE_RXDCTL(0), "RXDCTL"},
347 {IXGBE_RDBAL(0), "RDBAL"},
348 {IXGBE_RDBAH(0), "RDBAH"},
351 {IXGBE_TDBAL(0), "TDBAL"},
352 {IXGBE_TDBAH(0), "TDBAH"},
353 {IXGBE_TDLEN(0), "TDLEN"},
354 {IXGBE_TDH(0), "TDH"},
355 {IXGBE_TDT(0), "TDT"},
356 {IXGBE_TXDCTL(0), "TXDCTL"},
358 /* List Terminator */
364 * ixgbe_regdump - register printout routine
366 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
372 switch (reginfo
->ofs
) {
373 case IXGBE_SRRCTL(0):
374 for (i
= 0; i
< 64; i
++)
375 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
377 case IXGBE_DCA_RXCTRL(0):
378 for (i
= 0; i
< 64; i
++)
379 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
382 for (i
= 0; i
< 64; i
++)
383 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
386 for (i
= 0; i
< 64; i
++)
387 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
390 for (i
= 0; i
< 64; i
++)
391 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
393 case IXGBE_RXDCTL(0):
394 for (i
= 0; i
< 64; i
++)
395 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
398 for (i
= 0; i
< 64; i
++)
399 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
402 for (i
= 0; i
< 64; i
++)
403 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
406 for (i
= 0; i
< 64; i
++)
407 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
410 for (i
= 0; i
< 64; i
++)
411 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
414 for (i
= 0; i
< 64; i
++)
415 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
418 for (i
= 0; i
< 64; i
++)
419 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
422 for (i
= 0; i
< 64; i
++)
423 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
425 case IXGBE_TXDCTL(0):
426 for (i
= 0; i
< 64; i
++)
427 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
430 pr_info("%-15s %08x\n", reginfo
->name
,
431 IXGBE_READ_REG(hw
, reginfo
->ofs
));
435 for (i
= 0; i
< 8; i
++) {
436 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
437 pr_err("%-15s", rname
);
438 for (j
= 0; j
< 8; j
++)
439 pr_cont(" %08x", regs
[i
*8+j
]);
446 * ixgbe_dump - Print registers, tx-rings and rx-rings
448 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
450 struct net_device
*netdev
= adapter
->netdev
;
451 struct ixgbe_hw
*hw
= &adapter
->hw
;
452 struct ixgbe_reg_info
*reginfo
;
454 struct ixgbe_ring
*tx_ring
;
455 struct ixgbe_tx_buffer
*tx_buffer
;
456 union ixgbe_adv_tx_desc
*tx_desc
;
457 struct my_u0
{ u64 a
; u64 b
; } *u0
;
458 struct ixgbe_ring
*rx_ring
;
459 union ixgbe_adv_rx_desc
*rx_desc
;
460 struct ixgbe_rx_buffer
*rx_buffer_info
;
464 if (!netif_msg_hw(adapter
))
467 /* Print netdevice Info */
469 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
470 pr_info("Device Name state "
471 "trans_start last_rx\n");
472 pr_info("%-15s %016lX %016lX %016lX\n",
479 /* Print Registers */
480 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
481 pr_info(" Register Name Value\n");
482 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
483 reginfo
->name
; reginfo
++) {
484 ixgbe_regdump(hw
, reginfo
);
487 /* Print TX Ring Summary */
488 if (!netdev
|| !netif_running(netdev
))
491 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
492 pr_info(" %s %s %s %s\n",
493 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
494 "leng", "ntw", "timestamp");
495 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
496 tx_ring
= adapter
->tx_ring
[n
];
497 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
498 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
499 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
500 (u64
)dma_unmap_addr(tx_buffer
, dma
),
501 dma_unmap_len(tx_buffer
, len
),
502 tx_buffer
->next_to_watch
,
503 (u64
)tx_buffer
->time_stamp
);
507 if (!netif_msg_tx_done(adapter
))
508 goto rx_ring_summary
;
510 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
512 /* Transmit Descriptor Formats
514 * 82598 Advanced Transmit Descriptor
515 * +--------------------------------------------------------------+
516 * 0 | Buffer Address [63:0] |
517 * +--------------------------------------------------------------+
518 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
519 * +--------------------------------------------------------------+
520 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
522 * 82598 Advanced Transmit Descriptor (Write-Back Format)
523 * +--------------------------------------------------------------+
525 * +--------------------------------------------------------------+
526 * 8 | RSV | STA | NXTSEQ |
527 * +--------------------------------------------------------------+
530 * 82599+ Advanced Transmit Descriptor
531 * +--------------------------------------------------------------+
532 * 0 | Buffer Address [63:0] |
533 * +--------------------------------------------------------------+
534 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
535 * +--------------------------------------------------------------+
536 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
538 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
539 * +--------------------------------------------------------------+
541 * +--------------------------------------------------------------+
542 * 8 | RSV | STA | RSV |
543 * +--------------------------------------------------------------+
547 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
548 tx_ring
= adapter
->tx_ring
[n
];
549 pr_info("------------------------------------\n");
550 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
551 pr_info("------------------------------------\n");
552 pr_info("%s%s %s %s %s %s\n",
553 "T [desc] [address 63:0 ] ",
554 "[PlPOIdStDDt Ln] [bi->dma ] ",
555 "leng", "ntw", "timestamp", "bi->skb");
557 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
558 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
559 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
560 u0
= (struct my_u0
*)tx_desc
;
561 if (dma_unmap_len(tx_buffer
, len
) > 0) {
562 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
566 (u64
)dma_unmap_addr(tx_buffer
, dma
),
567 dma_unmap_len(tx_buffer
, len
),
568 tx_buffer
->next_to_watch
,
569 (u64
)tx_buffer
->time_stamp
,
571 if (i
== tx_ring
->next_to_use
&&
572 i
== tx_ring
->next_to_clean
)
574 else if (i
== tx_ring
->next_to_use
)
576 else if (i
== tx_ring
->next_to_clean
)
581 if (netif_msg_pktdata(adapter
) &&
583 print_hex_dump(KERN_INFO
, "",
584 DUMP_PREFIX_ADDRESS
, 16, 1,
585 tx_buffer
->skb
->data
,
586 dma_unmap_len(tx_buffer
, len
),
592 /* Print RX Rings Summary */
594 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
595 pr_info("Queue [NTU] [NTC]\n");
596 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
597 rx_ring
= adapter
->rx_ring
[n
];
598 pr_info("%5d %5X %5X\n",
599 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
603 if (!netif_msg_rx_status(adapter
))
606 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
608 /* Receive Descriptor Formats
610 * 82598 Advanced Receive Descriptor (Read) Format
612 * +-----------------------------------------------------+
613 * 0 | Packet Buffer Address [63:1] |A0/NSE|
614 * +----------------------------------------------+------+
615 * 8 | Header Buffer Address [63:1] | DD |
616 * +-----------------------------------------------------+
619 * 82598 Advanced Receive Descriptor (Write-Back) Format
621 * 63 48 47 32 31 30 21 20 16 15 4 3 0
622 * +------------------------------------------------------+
623 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
624 * | Packet | IP | | | | Type | Type |
625 * | Checksum | Ident | | | | | |
626 * +------------------------------------------------------+
627 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
628 * +------------------------------------------------------+
629 * 63 48 47 32 31 20 19 0
631 * 82599+ Advanced Receive Descriptor (Read) Format
633 * +-----------------------------------------------------+
634 * 0 | Packet Buffer Address [63:1] |A0/NSE|
635 * +----------------------------------------------+------+
636 * 8 | Header Buffer Address [63:1] | DD |
637 * +-----------------------------------------------------+
640 * 82599+ Advanced Receive Descriptor (Write-Back) Format
642 * 63 48 47 32 31 30 21 20 17 16 4 3 0
643 * +------------------------------------------------------+
644 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
645 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
646 * |/ Flow Dir Flt ID | | | | | |
647 * +------------------------------------------------------+
648 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
649 * +------------------------------------------------------+
650 * 63 48 47 32 31 20 19 0
653 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
654 rx_ring
= adapter
->rx_ring
[n
];
655 pr_info("------------------------------------\n");
656 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
657 pr_info("------------------------------------\n");
659 "R [desc] [ PktBuf A0] ",
660 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
661 "<-- Adv Rx Read format\n");
663 "RWB[desc] [PcsmIpSHl PtRs] ",
664 "[vl er S cks ln] ---------------- [bi->skb ] ",
665 "<-- Adv Rx Write-Back format\n");
667 for (i
= 0; i
< rx_ring
->count
; i
++) {
668 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
669 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
670 u0
= (struct my_u0
*)rx_desc
;
671 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
672 if (staterr
& IXGBE_RXD_STAT_DD
) {
673 /* Descriptor Done */
674 pr_info("RWB[0x%03X] %016llX "
675 "%016llX ---------------- %p", i
,
678 rx_buffer_info
->skb
);
680 pr_info("R [0x%03X] %016llX "
681 "%016llX %016llX %p", i
,
684 (u64
)rx_buffer_info
->dma
,
685 rx_buffer_info
->skb
);
687 if (netif_msg_pktdata(adapter
) &&
688 rx_buffer_info
->dma
) {
689 print_hex_dump(KERN_INFO
, "",
690 DUMP_PREFIX_ADDRESS
, 16, 1,
691 page_address(rx_buffer_info
->page
) +
692 rx_buffer_info
->page_offset
,
693 ixgbe_rx_bufsz(rx_ring
), true);
697 if (i
== rx_ring
->next_to_use
)
699 else if (i
== rx_ring
->next_to_clean
)
711 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
715 /* Let firmware take over control of h/w */
716 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
717 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
718 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
721 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
725 /* Let firmware know the driver has taken over */
726 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
727 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
728 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
732 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
733 * @adapter: pointer to adapter struct
734 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
735 * @queue: queue to map the corresponding interrupt to
736 * @msix_vector: the vector to map to the corresponding queue
739 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
740 u8 queue
, u8 msix_vector
)
743 struct ixgbe_hw
*hw
= &adapter
->hw
;
744 switch (hw
->mac
.type
) {
745 case ixgbe_mac_82598EB
:
746 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
749 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
750 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
751 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
752 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
753 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
755 case ixgbe_mac_82599EB
:
757 if (direction
== -1) {
759 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
760 index
= ((queue
& 1) * 8);
761 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
762 ivar
&= ~(0xFF << index
);
763 ivar
|= (msix_vector
<< index
);
764 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
767 /* tx or rx causes */
768 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
769 index
= ((16 * (queue
& 1)) + (8 * direction
));
770 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
771 ivar
&= ~(0xFF << index
);
772 ivar
|= (msix_vector
<< index
);
773 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
781 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
786 switch (adapter
->hw
.mac
.type
) {
787 case ixgbe_mac_82598EB
:
788 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
789 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
791 case ixgbe_mac_82599EB
:
793 mask
= (qmask
& 0xFFFFFFFF);
794 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
795 mask
= (qmask
>> 32);
796 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
803 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
804 struct ixgbe_tx_buffer
*tx_buffer
)
806 if (tx_buffer
->skb
) {
807 dev_kfree_skb_any(tx_buffer
->skb
);
808 if (dma_unmap_len(tx_buffer
, len
))
809 dma_unmap_single(ring
->dev
,
810 dma_unmap_addr(tx_buffer
, dma
),
811 dma_unmap_len(tx_buffer
, len
),
813 } else if (dma_unmap_len(tx_buffer
, len
)) {
814 dma_unmap_page(ring
->dev
,
815 dma_unmap_addr(tx_buffer
, dma
),
816 dma_unmap_len(tx_buffer
, len
),
819 tx_buffer
->next_to_watch
= NULL
;
820 tx_buffer
->skb
= NULL
;
821 dma_unmap_len_set(tx_buffer
, len
, 0);
822 /* tx_buffer must be completely set up in the transmit path */
825 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
827 struct ixgbe_hw
*hw
= &adapter
->hw
;
828 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
832 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
833 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
836 switch (hw
->mac
.type
) {
837 case ixgbe_mac_82598EB
:
838 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
841 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
843 hwstats
->lxoffrxc
+= data
;
845 /* refill credits (no tx hang) if we received xoff */
849 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
850 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
851 &adapter
->tx_ring
[i
]->state
);
854 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
856 struct ixgbe_hw
*hw
= &adapter
->hw
;
857 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
861 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
863 if (adapter
->ixgbe_ieee_pfc
)
864 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
866 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
867 ixgbe_update_xoff_rx_lfc(adapter
);
871 /* update stats for each tc, only valid with PFC enabled */
872 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
875 switch (hw
->mac
.type
) {
876 case ixgbe_mac_82598EB
:
877 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
880 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
882 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
883 /* Get the TC for given UP */
884 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
885 xoff
[tc
] += pxoffrxc
;
888 /* disarm tx queues that have received xoff frames */
889 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
890 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
892 tc
= tx_ring
->dcb_tc
;
894 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
898 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
900 return ring
->stats
.packets
;
903 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
905 struct ixgbe_adapter
*adapter
;
909 if (ring
->l2_accel_priv
)
910 adapter
= ring
->l2_accel_priv
->real_adapter
;
912 adapter
= netdev_priv(ring
->netdev
);
915 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
916 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
919 return (head
< tail
) ?
920 tail
- head
: (tail
+ ring
->count
- head
);
925 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
927 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
928 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
929 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
932 clear_check_for_tx_hang(tx_ring
);
935 * Check for a hung queue, but be thorough. This verifies
936 * that a transmit has been completed since the previous
937 * check AND there is at least one packet pending. The
938 * ARMED bit is set to indicate a potential hang. The
939 * bit is cleared if a pause frame is received to remove
940 * false hang detection due to PFC or 802.3x frames. By
941 * requiring this to fail twice we avoid races with
942 * pfc clearing the ARMED bit and conditions where we
943 * run the check_tx_hang logic with a transmit completion
944 * pending but without time to complete it yet.
946 if ((tx_done_old
== tx_done
) && tx_pending
) {
947 /* make sure it is true for two checks in a row */
948 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
951 /* update completed stats and continue */
952 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
953 /* reset the countdown */
954 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
961 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
962 * @adapter: driver private struct
964 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
967 /* Do the reset outside of interrupt context */
968 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
969 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
970 e_warn(drv
, "initiating reset due to tx timeout\n");
971 ixgbe_service_event_schedule(adapter
);
976 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
977 * @q_vector: structure containing interrupt and ring information
978 * @tx_ring: tx ring to clean
980 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
981 struct ixgbe_ring
*tx_ring
)
983 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
984 struct ixgbe_tx_buffer
*tx_buffer
;
985 union ixgbe_adv_tx_desc
*tx_desc
;
986 unsigned int total_bytes
= 0, total_packets
= 0;
987 unsigned int budget
= q_vector
->tx
.work_limit
;
988 unsigned int i
= tx_ring
->next_to_clean
;
990 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
993 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
994 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
998 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1000 /* if next_to_watch is not set then there is no work pending */
1004 /* prevent any other reads prior to eop_desc */
1005 read_barrier_depends();
1007 /* if DD is not set pending work has not been completed */
1008 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1011 /* clear next_to_watch to prevent false hangs */
1012 tx_buffer
->next_to_watch
= NULL
;
1014 /* update the statistics for this packet */
1015 total_bytes
+= tx_buffer
->bytecount
;
1016 total_packets
+= tx_buffer
->gso_segs
;
1019 dev_kfree_skb_any(tx_buffer
->skb
);
1021 /* unmap skb header data */
1022 dma_unmap_single(tx_ring
->dev
,
1023 dma_unmap_addr(tx_buffer
, dma
),
1024 dma_unmap_len(tx_buffer
, len
),
1027 /* clear tx_buffer data */
1028 tx_buffer
->skb
= NULL
;
1029 dma_unmap_len_set(tx_buffer
, len
, 0);
1031 /* unmap remaining buffers */
1032 while (tx_desc
!= eop_desc
) {
1037 i
-= tx_ring
->count
;
1038 tx_buffer
= tx_ring
->tx_buffer_info
;
1039 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1042 /* unmap any remaining paged data */
1043 if (dma_unmap_len(tx_buffer
, len
)) {
1044 dma_unmap_page(tx_ring
->dev
,
1045 dma_unmap_addr(tx_buffer
, dma
),
1046 dma_unmap_len(tx_buffer
, len
),
1048 dma_unmap_len_set(tx_buffer
, len
, 0);
1052 /* move us one more past the eop_desc for start of next pkt */
1057 i
-= tx_ring
->count
;
1058 tx_buffer
= tx_ring
->tx_buffer_info
;
1059 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1062 /* issue prefetch for next Tx descriptor */
1065 /* update budget accounting */
1067 } while (likely(budget
));
1069 i
+= tx_ring
->count
;
1070 tx_ring
->next_to_clean
= i
;
1071 u64_stats_update_begin(&tx_ring
->syncp
);
1072 tx_ring
->stats
.bytes
+= total_bytes
;
1073 tx_ring
->stats
.packets
+= total_packets
;
1074 u64_stats_update_end(&tx_ring
->syncp
);
1075 q_vector
->tx
.total_bytes
+= total_bytes
;
1076 q_vector
->tx
.total_packets
+= total_packets
;
1078 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1079 /* schedule immediate reset if we believe we hung */
1080 struct ixgbe_hw
*hw
= &adapter
->hw
;
1081 e_err(drv
, "Detected Tx Unit Hang\n"
1083 " TDH, TDT <%x>, <%x>\n"
1084 " next_to_use <%x>\n"
1085 " next_to_clean <%x>\n"
1086 "tx_buffer_info[next_to_clean]\n"
1087 " time_stamp <%lx>\n"
1089 tx_ring
->queue_index
,
1090 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1091 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1092 tx_ring
->next_to_use
, i
,
1093 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1095 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1098 "tx hang %d detected on queue %d, resetting adapter\n",
1099 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1101 /* schedule immediate reset if we believe we hung */
1102 ixgbe_tx_timeout_reset(adapter
);
1104 /* the adapter is about to reset, no point in enabling stuff */
1108 netdev_tx_completed_queue(txring_txq(tx_ring
),
1109 total_packets
, total_bytes
);
1111 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1112 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1113 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1114 /* Make sure that anybody stopping the queue after this
1115 * sees the new next_to_clean.
1118 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1119 tx_ring
->queue_index
)
1120 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1121 netif_wake_subqueue(tx_ring
->netdev
,
1122 tx_ring
->queue_index
);
1123 ++tx_ring
->tx_stats
.restart_queue
;
1130 #ifdef CONFIG_IXGBE_DCA
1131 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1132 struct ixgbe_ring
*tx_ring
,
1135 struct ixgbe_hw
*hw
= &adapter
->hw
;
1136 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1139 switch (hw
->mac
.type
) {
1140 case ixgbe_mac_82598EB
:
1141 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1143 case ixgbe_mac_82599EB
:
1144 case ixgbe_mac_X540
:
1145 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1146 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1149 /* for unknown hardware do not write register */
1154 * We can enable relaxed ordering for reads, but not writes when
1155 * DCA is enabled. This is due to a known issue in some chipsets
1156 * which will cause the DCA tag to be cleared.
1158 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1159 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1160 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1162 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1165 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1166 struct ixgbe_ring
*rx_ring
,
1169 struct ixgbe_hw
*hw
= &adapter
->hw
;
1170 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1171 u8 reg_idx
= rx_ring
->reg_idx
;
1174 switch (hw
->mac
.type
) {
1175 case ixgbe_mac_82599EB
:
1176 case ixgbe_mac_X540
:
1177 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1184 * We can enable relaxed ordering for reads, but not writes when
1185 * DCA is enabled. This is due to a known issue in some chipsets
1186 * which will cause the DCA tag to be cleared.
1188 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1189 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1191 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1194 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1196 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1197 struct ixgbe_ring
*ring
;
1198 int cpu
= get_cpu();
1200 if (q_vector
->cpu
== cpu
)
1203 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1204 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1206 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1207 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1209 q_vector
->cpu
= cpu
;
1214 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1218 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1221 /* always use CB2 mode, difference is masked in the CB driver */
1222 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1224 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1225 adapter
->q_vector
[i
]->cpu
= -1;
1226 ixgbe_update_dca(adapter
->q_vector
[i
]);
1230 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1232 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1233 unsigned long event
= *(unsigned long *)data
;
1235 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1239 case DCA_PROVIDER_ADD
:
1240 /* if we're already enabled, don't do it again */
1241 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1243 if (dca_add_requester(dev
) == 0) {
1244 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1245 ixgbe_setup_dca(adapter
);
1248 /* Fall Through since DCA is disabled. */
1249 case DCA_PROVIDER_REMOVE
:
1250 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1251 dca_remove_requester(dev
);
1252 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1253 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1261 #endif /* CONFIG_IXGBE_DCA */
1262 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1263 union ixgbe_adv_rx_desc
*rx_desc
,
1264 struct sk_buff
*skb
)
1266 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1267 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
1272 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1273 * @ring: structure containing ring specific data
1274 * @rx_desc: advanced rx descriptor
1276 * Returns : true if it is FCoE pkt
1278 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1279 union ixgbe_adv_rx_desc
*rx_desc
)
1281 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1283 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1284 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1285 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1286 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1289 #endif /* IXGBE_FCOE */
1291 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1292 * @ring: structure containing ring specific data
1293 * @rx_desc: current Rx descriptor being processed
1294 * @skb: skb currently being received and modified
1296 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1297 union ixgbe_adv_rx_desc
*rx_desc
,
1298 struct sk_buff
*skb
)
1300 skb_checksum_none_assert(skb
);
1302 /* Rx csum disabled */
1303 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1306 /* if IP and error */
1307 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1308 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1309 ring
->rx_stats
.csum_err
++;
1313 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1316 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1317 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1320 * 82599 errata, UDP frames with a 0 checksum can be marked as
1323 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1324 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1327 ring
->rx_stats
.csum_err
++;
1331 /* It must be a TCP or UDP packet with a valid checksum */
1332 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1335 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1337 rx_ring
->next_to_use
= val
;
1339 /* update next to alloc since we have filled the ring */
1340 rx_ring
->next_to_alloc
= val
;
1342 * Force memory writes to complete before letting h/w
1343 * know there are new descriptors to fetch. (Only
1344 * applicable for weak-ordered memory model archs,
1348 ixgbe_write_tail(rx_ring
, val
);
1351 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1352 struct ixgbe_rx_buffer
*bi
)
1354 struct page
*page
= bi
->page
;
1355 dma_addr_t dma
= bi
->dma
;
1357 /* since we are recycling buffers we should seldom need to alloc */
1361 /* alloc new page for storage */
1362 if (likely(!page
)) {
1363 page
= __skb_alloc_pages(GFP_ATOMIC
| __GFP_COLD
| __GFP_COMP
,
1364 bi
->skb
, ixgbe_rx_pg_order(rx_ring
));
1365 if (unlikely(!page
)) {
1366 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1372 /* map page for use */
1373 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1374 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1377 * if mapping failed free memory back to system since
1378 * there isn't much point in holding memory we can't use
1380 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1381 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1384 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1389 bi
->page_offset
= 0;
1395 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1396 * @rx_ring: ring to place buffers on
1397 * @cleaned_count: number of buffers to replace
1399 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1401 union ixgbe_adv_rx_desc
*rx_desc
;
1402 struct ixgbe_rx_buffer
*bi
;
1403 u16 i
= rx_ring
->next_to_use
;
1409 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1410 bi
= &rx_ring
->rx_buffer_info
[i
];
1411 i
-= rx_ring
->count
;
1414 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1418 * Refresh the desc even if buffer_addrs didn't change
1419 * because each write-back erases this info.
1421 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1427 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1428 bi
= rx_ring
->rx_buffer_info
;
1429 i
-= rx_ring
->count
;
1432 /* clear the hdr_addr for the next_to_use descriptor */
1433 rx_desc
->read
.hdr_addr
= 0;
1436 } while (cleaned_count
);
1438 i
+= rx_ring
->count
;
1440 if (rx_ring
->next_to_use
!= i
)
1441 ixgbe_release_rx_desc(rx_ring
, i
);
1445 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1446 * @data: pointer to the start of the headers
1447 * @max_len: total length of section to find headers in
1449 * This function is meant to determine the length of headers that will
1450 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1451 * motivation of doing this is to only perform one pull for IPv4 TCP
1452 * packets so that we can do basic things like calculating the gso_size
1453 * based on the average data per packet.
1455 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1456 unsigned int max_len
)
1459 unsigned char *network
;
1462 struct vlan_hdr
*vlan
;
1465 struct ipv6hdr
*ipv6
;
1468 u8 nexthdr
= 0; /* default to not TCP */
1471 /* this should never happen, but better safe than sorry */
1472 if (max_len
< ETH_HLEN
)
1475 /* initialize network frame pointer */
1478 /* set first protocol and move network header forward */
1479 protocol
= hdr
.eth
->h_proto
;
1480 hdr
.network
+= ETH_HLEN
;
1482 /* handle any vlan tag if present */
1483 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
1484 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1487 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1488 hdr
.network
+= VLAN_HLEN
;
1491 /* handle L3 protocols */
1492 if (protocol
== __constant_htons(ETH_P_IP
)) {
1493 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1496 /* access ihl as a u8 to avoid unaligned access on ia64 */
1497 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1499 /* verify hlen meets minimum size requirements */
1500 if (hlen
< sizeof(struct iphdr
))
1501 return hdr
.network
- data
;
1503 /* record next protocol if header is present */
1504 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
1505 nexthdr
= hdr
.ipv4
->protocol
;
1506 } else if (protocol
== __constant_htons(ETH_P_IPV6
)) {
1507 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
1510 /* record next protocol */
1511 nexthdr
= hdr
.ipv6
->nexthdr
;
1512 hlen
= sizeof(struct ipv6hdr
);
1514 } else if (protocol
== __constant_htons(ETH_P_FCOE
)) {
1515 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1517 hlen
= FCOE_HEADER_LEN
;
1520 return hdr
.network
- data
;
1523 /* relocate pointer to start of L4 header */
1524 hdr
.network
+= hlen
;
1526 /* finally sort out TCP/UDP */
1527 if (nexthdr
== IPPROTO_TCP
) {
1528 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1531 /* access doff as a u8 to avoid unaligned access on ia64 */
1532 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1534 /* verify hlen meets minimum size requirements */
1535 if (hlen
< sizeof(struct tcphdr
))
1536 return hdr
.network
- data
;
1538 hdr
.network
+= hlen
;
1539 } else if (nexthdr
== IPPROTO_UDP
) {
1540 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
1543 hdr
.network
+= sizeof(struct udphdr
);
1547 * If everything has gone correctly hdr.network should be the
1548 * data section of the packet and will be the end of the header.
1549 * If not then it probably represents the end of the last recognized
1552 if ((hdr
.network
- data
) < max_len
)
1553 return hdr
.network
- data
;
1558 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1559 struct sk_buff
*skb
)
1561 u16 hdr_len
= skb_headlen(skb
);
1563 /* set gso_size to avoid messing up TCP MSS */
1564 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1565 IXGBE_CB(skb
)->append_cnt
);
1566 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1569 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1570 struct sk_buff
*skb
)
1572 /* if append_cnt is 0 then frame is not RSC */
1573 if (!IXGBE_CB(skb
)->append_cnt
)
1576 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1577 rx_ring
->rx_stats
.rsc_flush
++;
1579 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1581 /* gso_size is computed using append_cnt so always clear it last */
1582 IXGBE_CB(skb
)->append_cnt
= 0;
1586 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1587 * @rx_ring: rx descriptor ring packet is being transacted on
1588 * @rx_desc: pointer to the EOP Rx descriptor
1589 * @skb: pointer to current skb being populated
1591 * This function checks the ring, descriptor, and packet information in
1592 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1593 * other fields within the skb.
1595 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1596 union ixgbe_adv_rx_desc
*rx_desc
,
1597 struct sk_buff
*skb
)
1599 struct net_device
*dev
= rx_ring
->netdev
;
1601 ixgbe_update_rsc_stats(rx_ring
, skb
);
1603 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1605 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1607 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1609 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1610 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1611 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1612 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1615 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1617 skb
->protocol
= eth_type_trans(skb
, dev
);
1620 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1621 struct sk_buff
*skb
)
1623 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1625 if (ixgbe_qv_busy_polling(q_vector
))
1626 netif_receive_skb(skb
);
1627 else if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1628 napi_gro_receive(&q_vector
->napi
, skb
);
1634 * ixgbe_is_non_eop - process handling of non-EOP buffers
1635 * @rx_ring: Rx ring being processed
1636 * @rx_desc: Rx descriptor for current buffer
1637 * @skb: Current socket buffer containing buffer in progress
1639 * This function updates next to clean. If the buffer is an EOP buffer
1640 * this function exits returning false, otherwise it will place the
1641 * sk_buff in the next buffer to be chained and return true indicating
1642 * that this is in fact a non-EOP buffer.
1644 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1645 union ixgbe_adv_rx_desc
*rx_desc
,
1646 struct sk_buff
*skb
)
1648 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1650 /* fetch, update, and store next to clean */
1651 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1652 rx_ring
->next_to_clean
= ntc
;
1654 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1656 /* update RSC append count if present */
1657 if (ring_is_rsc_enabled(rx_ring
)) {
1658 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1659 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1661 if (unlikely(rsc_enabled
)) {
1662 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1664 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1665 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1667 /* update ntc based on RSC value */
1668 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1669 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1670 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1674 /* if we are the last buffer then there is nothing else to do */
1675 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1678 /* place skb in next buffer to be received */
1679 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1680 rx_ring
->rx_stats
.non_eop_descs
++;
1686 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1687 * @rx_ring: rx descriptor ring packet is being transacted on
1688 * @skb: pointer to current skb being adjusted
1690 * This function is an ixgbe specific version of __pskb_pull_tail. The
1691 * main difference between this version and the original function is that
1692 * this function can make several assumptions about the state of things
1693 * that allow for significant optimizations versus the standard function.
1694 * As a result we can do things like drop a frag and maintain an accurate
1695 * truesize for the skb.
1697 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1698 struct sk_buff
*skb
)
1700 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1702 unsigned int pull_len
;
1705 * it is valid to use page_address instead of kmap since we are
1706 * working with pages allocated out of the lomem pool per
1707 * alloc_page(GFP_ATOMIC)
1709 va
= skb_frag_address(frag
);
1712 * we need the header to contain the greater of either ETH_HLEN or
1713 * 60 bytes if the skb->len is less than 60 for skb_pad.
1715 pull_len
= ixgbe_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1717 /* align pull length to size of long to optimize memcpy performance */
1718 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1720 /* update all of the pointers */
1721 skb_frag_size_sub(frag
, pull_len
);
1722 frag
->page_offset
+= pull_len
;
1723 skb
->data_len
-= pull_len
;
1724 skb
->tail
+= pull_len
;
1728 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1729 * @rx_ring: rx descriptor ring packet is being transacted on
1730 * @skb: pointer to current skb being updated
1732 * This function provides a basic DMA sync up for the first fragment of an
1733 * skb. The reason for doing this is that the first fragment cannot be
1734 * unmapped until we have reached the end of packet descriptor for a buffer
1737 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1738 struct sk_buff
*skb
)
1740 /* if the page was released unmap it, else just sync our portion */
1741 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1742 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1743 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1744 IXGBE_CB(skb
)->page_released
= false;
1746 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1748 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1751 ixgbe_rx_bufsz(rx_ring
),
1754 IXGBE_CB(skb
)->dma
= 0;
1758 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1759 * @rx_ring: rx descriptor ring packet is being transacted on
1760 * @rx_desc: pointer to the EOP Rx descriptor
1761 * @skb: pointer to current skb being fixed
1763 * Check for corrupted packet headers caused by senders on the local L2
1764 * embedded NIC switch not setting up their Tx Descriptors right. These
1765 * should be very rare.
1767 * Also address the case where we are pulling data in on pages only
1768 * and as such no data is present in the skb header.
1770 * In addition if skb is not at least 60 bytes we need to pad it so that
1771 * it is large enough to qualify as a valid Ethernet frame.
1773 * Returns true if an error was encountered and skb was freed.
1775 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1776 union ixgbe_adv_rx_desc
*rx_desc
,
1777 struct sk_buff
*skb
)
1779 struct net_device
*netdev
= rx_ring
->netdev
;
1781 /* verify that the packet does not have any known errors */
1782 if (unlikely(ixgbe_test_staterr(rx_desc
,
1783 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1784 !(netdev
->features
& NETIF_F_RXALL
))) {
1785 dev_kfree_skb_any(skb
);
1789 /* place header in linear portion of buffer */
1790 if (skb_is_nonlinear(skb
))
1791 ixgbe_pull_tail(rx_ring
, skb
);
1794 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1795 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1799 /* if skb_pad returns an error the skb was freed */
1800 if (unlikely(skb
->len
< 60)) {
1801 int pad_len
= 60 - skb
->len
;
1803 if (skb_pad(skb
, pad_len
))
1805 __skb_put(skb
, pad_len
);
1812 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1813 * @rx_ring: rx descriptor ring to store buffers on
1814 * @old_buff: donor buffer to have page reused
1816 * Synchronizes page for reuse by the adapter
1818 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1819 struct ixgbe_rx_buffer
*old_buff
)
1821 struct ixgbe_rx_buffer
*new_buff
;
1822 u16 nta
= rx_ring
->next_to_alloc
;
1824 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1826 /* update, and store next to alloc */
1828 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1830 /* transfer page from old buffer to new buffer */
1831 new_buff
->page
= old_buff
->page
;
1832 new_buff
->dma
= old_buff
->dma
;
1833 new_buff
->page_offset
= old_buff
->page_offset
;
1835 /* sync the buffer for use by the device */
1836 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1837 new_buff
->page_offset
,
1838 ixgbe_rx_bufsz(rx_ring
),
1843 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1844 * @rx_ring: rx descriptor ring to transact packets on
1845 * @rx_buffer: buffer containing page to add
1846 * @rx_desc: descriptor containing length of buffer written by hardware
1847 * @skb: sk_buff to place the data into
1849 * This function will add the data contained in rx_buffer->page to the skb.
1850 * This is done either through a direct copy if the data in the buffer is
1851 * less than the skb header size, otherwise it will just attach the page as
1852 * a frag to the skb.
1854 * The function will then update the page offset if necessary and return
1855 * true if the buffer can be reused by the adapter.
1857 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1858 struct ixgbe_rx_buffer
*rx_buffer
,
1859 union ixgbe_adv_rx_desc
*rx_desc
,
1860 struct sk_buff
*skb
)
1862 struct page
*page
= rx_buffer
->page
;
1863 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1864 #if (PAGE_SIZE < 8192)
1865 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1867 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1868 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1869 ixgbe_rx_bufsz(rx_ring
);
1872 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1873 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1875 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1877 /* we can reuse buffer as-is, just make sure it is local */
1878 if (likely(page_to_nid(page
) == numa_node_id()))
1881 /* this page cannot be reused so discard it */
1886 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1887 rx_buffer
->page_offset
, size
, truesize
);
1889 /* avoid re-using remote pages */
1890 if (unlikely(page_to_nid(page
) != numa_node_id()))
1893 #if (PAGE_SIZE < 8192)
1894 /* if we are only owner of page we can reuse it */
1895 if (unlikely(page_count(page
) != 1))
1898 /* flip page offset to other buffer */
1899 rx_buffer
->page_offset
^= truesize
;
1902 * since we are the only owner of the page and we need to
1903 * increment it, just set the value to 2 in order to avoid
1904 * an unecessary locked operation
1906 atomic_set(&page
->_count
, 2);
1908 /* move offset up to the next cache line */
1909 rx_buffer
->page_offset
+= truesize
;
1911 if (rx_buffer
->page_offset
> last_offset
)
1914 /* bump ref count on page before it is given to the stack */
1921 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
1922 union ixgbe_adv_rx_desc
*rx_desc
)
1924 struct ixgbe_rx_buffer
*rx_buffer
;
1925 struct sk_buff
*skb
;
1928 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
1929 page
= rx_buffer
->page
;
1932 skb
= rx_buffer
->skb
;
1935 void *page_addr
= page_address(page
) +
1936 rx_buffer
->page_offset
;
1938 /* prefetch first cache line of first page */
1939 prefetch(page_addr
);
1940 #if L1_CACHE_BYTES < 128
1941 prefetch(page_addr
+ L1_CACHE_BYTES
);
1944 /* allocate a skb to store the frags */
1945 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
1947 if (unlikely(!skb
)) {
1948 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1953 * we will be copying header into skb->data in
1954 * pskb_may_pull so it is in our interest to prefetch
1955 * it now to avoid a possible cache miss
1957 prefetchw(skb
->data
);
1960 * Delay unmapping of the first packet. It carries the
1961 * header information, HW may still access the header
1962 * after the writeback. Only unmap it when EOP is
1965 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1968 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1970 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
1971 ixgbe_dma_sync_frag(rx_ring
, skb
);
1974 /* we are reusing so sync this buffer for CPU use */
1975 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1977 rx_buffer
->page_offset
,
1978 ixgbe_rx_bufsz(rx_ring
),
1982 /* pull page into skb */
1983 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
1984 /* hand second half of page back to the ring */
1985 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1986 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1987 /* the page has been released from the ring */
1988 IXGBE_CB(skb
)->page_released
= true;
1990 /* we are not reusing the buffer so unmap it */
1991 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1992 ixgbe_rx_pg_size(rx_ring
),
1996 /* clear contents of buffer_info */
1997 rx_buffer
->skb
= NULL
;
1999 rx_buffer
->page
= NULL
;
2005 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2006 * @q_vector: structure containing interrupt and ring information
2007 * @rx_ring: rx descriptor ring to transact packets on
2008 * @budget: Total limit on number of packets to process
2010 * This function provides a "bounce buffer" approach to Rx interrupt
2011 * processing. The advantage to this is that on systems that have
2012 * expensive overhead for IOMMU access this provides a means of avoiding
2013 * it by maintaining the mapping of the page to the syste.
2015 * Returns amount of work completed
2017 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2018 struct ixgbe_ring
*rx_ring
,
2021 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
2023 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2025 unsigned int mss
= 0;
2026 #endif /* IXGBE_FCOE */
2027 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2030 union ixgbe_adv_rx_desc
*rx_desc
;
2031 struct sk_buff
*skb
;
2033 /* return some buffers to hardware, one at a time is too slow */
2034 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2035 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2039 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2041 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
2045 * This memory barrier is needed to keep us from reading
2046 * any other fields out of the rx_desc until we know the
2047 * RXD_STAT_DD bit is set
2051 /* retrieve a buffer from the ring */
2052 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2054 /* exit if we failed to retrieve a buffer */
2060 /* place incomplete frames back on ring for completion */
2061 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2064 /* verify the packet layout is correct */
2065 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2068 /* probably a little skewed due to removing CRC */
2069 total_rx_bytes
+= skb
->len
;
2071 /* populate checksum, timestamp, VLAN, and protocol */
2072 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2075 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2076 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2077 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2078 /* include DDPed FCoE data */
2079 if (ddp_bytes
> 0) {
2081 mss
= rx_ring
->netdev
->mtu
-
2082 sizeof(struct fcoe_hdr
) -
2083 sizeof(struct fc_frame_header
) -
2084 sizeof(struct fcoe_crc_eof
);
2088 total_rx_bytes
+= ddp_bytes
;
2089 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2093 dev_kfree_skb_any(skb
);
2098 #endif /* IXGBE_FCOE */
2099 skb_mark_napi_id(skb
, &q_vector
->napi
);
2100 ixgbe_rx_skb(q_vector
, skb
);
2102 /* update budget accounting */
2104 } while (likely(total_rx_packets
< budget
));
2106 u64_stats_update_begin(&rx_ring
->syncp
);
2107 rx_ring
->stats
.packets
+= total_rx_packets
;
2108 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2109 u64_stats_update_end(&rx_ring
->syncp
);
2110 q_vector
->rx
.total_packets
+= total_rx_packets
;
2111 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2114 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2116 return total_rx_packets
;
2119 #ifdef CONFIG_NET_RX_BUSY_POLL
2120 /* must be called with local_bh_disable()d */
2121 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2123 struct ixgbe_q_vector
*q_vector
=
2124 container_of(napi
, struct ixgbe_q_vector
, napi
);
2125 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2126 struct ixgbe_ring
*ring
;
2129 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2130 return LL_FLUSH_FAILED
;
2132 if (!ixgbe_qv_lock_poll(q_vector
))
2133 return LL_FLUSH_BUSY
;
2135 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2136 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2137 #ifdef BP_EXTENDED_STATS
2139 ring
->stats
.cleaned
+= found
;
2141 ring
->stats
.misses
++;
2147 ixgbe_qv_unlock_poll(q_vector
);
2151 #endif /* CONFIG_NET_RX_BUSY_POLL */
2154 * ixgbe_configure_msix - Configure MSI-X hardware
2155 * @adapter: board private structure
2157 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2160 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2162 struct ixgbe_q_vector
*q_vector
;
2166 /* Populate MSIX to EITR Select */
2167 if (adapter
->num_vfs
> 32) {
2168 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2169 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2173 * Populate the IVAR table and set the ITR values to the
2174 * corresponding register.
2176 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2177 struct ixgbe_ring
*ring
;
2178 q_vector
= adapter
->q_vector
[v_idx
];
2180 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2181 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2183 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2184 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2186 ixgbe_write_eitr(q_vector
);
2189 switch (adapter
->hw
.mac
.type
) {
2190 case ixgbe_mac_82598EB
:
2191 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2194 case ixgbe_mac_82599EB
:
2195 case ixgbe_mac_X540
:
2196 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2201 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2203 /* set up to autoclear timer, and the vectors */
2204 mask
= IXGBE_EIMS_ENABLE_MASK
;
2205 mask
&= ~(IXGBE_EIMS_OTHER
|
2206 IXGBE_EIMS_MAILBOX
|
2209 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2212 enum latency_range
{
2216 latency_invalid
= 255
2220 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2221 * @q_vector: structure containing interrupt and ring information
2222 * @ring_container: structure containing ring performance data
2224 * Stores a new ITR value based on packets and byte
2225 * counts during the last interrupt. The advantage of per interrupt
2226 * computation is faster updates and more accurate ITR for the current
2227 * traffic pattern. Constants in this function were computed
2228 * based on theoretical maximum wire speed and thresholds were set based
2229 * on testing data as well as attempting to minimize response time
2230 * while increasing bulk throughput.
2231 * this functionality is controlled by the InterruptThrottleRate module
2232 * parameter (see ixgbe_param.c)
2234 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2235 struct ixgbe_ring_container
*ring_container
)
2237 int bytes
= ring_container
->total_bytes
;
2238 int packets
= ring_container
->total_packets
;
2241 u8 itr_setting
= ring_container
->itr
;
2246 /* simple throttlerate management
2247 * 0-10MB/s lowest (100000 ints/s)
2248 * 10-20MB/s low (20000 ints/s)
2249 * 20-1249MB/s bulk (8000 ints/s)
2251 /* what was last interrupt timeslice? */
2252 timepassed_us
= q_vector
->itr
>> 2;
2253 if (timepassed_us
== 0)
2256 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2258 switch (itr_setting
) {
2259 case lowest_latency
:
2260 if (bytes_perint
> 10)
2261 itr_setting
= low_latency
;
2264 if (bytes_perint
> 20)
2265 itr_setting
= bulk_latency
;
2266 else if (bytes_perint
<= 10)
2267 itr_setting
= lowest_latency
;
2270 if (bytes_perint
<= 20)
2271 itr_setting
= low_latency
;
2275 /* clear work counters since we have the values we need */
2276 ring_container
->total_bytes
= 0;
2277 ring_container
->total_packets
= 0;
2279 /* write updated itr to ring container */
2280 ring_container
->itr
= itr_setting
;
2284 * ixgbe_write_eitr - write EITR register in hardware specific way
2285 * @q_vector: structure containing interrupt and ring information
2287 * This function is made to be called by ethtool and by the driver
2288 * when it needs to update EITR registers at runtime. Hardware
2289 * specific quirks/differences are taken care of here.
2291 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2293 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2294 struct ixgbe_hw
*hw
= &adapter
->hw
;
2295 int v_idx
= q_vector
->v_idx
;
2296 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2298 switch (adapter
->hw
.mac
.type
) {
2299 case ixgbe_mac_82598EB
:
2300 /* must write high and low 16 bits to reset counter */
2301 itr_reg
|= (itr_reg
<< 16);
2303 case ixgbe_mac_82599EB
:
2304 case ixgbe_mac_X540
:
2306 * set the WDIS bit to not clear the timer bits and cause an
2307 * immediate assertion of the interrupt
2309 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2314 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2317 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2319 u32 new_itr
= q_vector
->itr
;
2322 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2323 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2325 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2327 switch (current_itr
) {
2328 /* counts and packets in update_itr are dependent on these numbers */
2329 case lowest_latency
:
2330 new_itr
= IXGBE_100K_ITR
;
2333 new_itr
= IXGBE_20K_ITR
;
2336 new_itr
= IXGBE_8K_ITR
;
2342 if (new_itr
!= q_vector
->itr
) {
2343 /* do an exponential smoothing */
2344 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2345 ((9 * new_itr
) + q_vector
->itr
);
2347 /* save the algorithm value here */
2348 q_vector
->itr
= new_itr
;
2350 ixgbe_write_eitr(q_vector
);
2355 * ixgbe_check_overtemp_subtask - check for over temperature
2356 * @adapter: pointer to adapter
2358 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2360 struct ixgbe_hw
*hw
= &adapter
->hw
;
2361 u32 eicr
= adapter
->interrupt_event
;
2363 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2366 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2367 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2370 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2372 switch (hw
->device_id
) {
2373 case IXGBE_DEV_ID_82599_T3_LOM
:
2375 * Since the warning interrupt is for both ports
2376 * we don't have to check if:
2377 * - This interrupt wasn't for our port.
2378 * - We may have missed the interrupt so always have to
2379 * check if we got a LSC
2381 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2382 !(eicr
& IXGBE_EICR_LSC
))
2385 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2387 bool link_up
= false;
2389 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2395 /* Check if this is not due to overtemp */
2396 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2401 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2406 "Network adapter has been stopped because it has over heated. "
2407 "Restart the computer. If the problem persists, "
2408 "power off the system and replace the adapter\n");
2410 adapter
->interrupt_event
= 0;
2413 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2415 struct ixgbe_hw
*hw
= &adapter
->hw
;
2417 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2418 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2419 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2420 /* write to clear the interrupt */
2421 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2425 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2427 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2430 switch (adapter
->hw
.mac
.type
) {
2431 case ixgbe_mac_82599EB
:
2433 * Need to check link state so complete overtemp check
2436 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2437 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2438 adapter
->interrupt_event
= eicr
;
2439 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2440 ixgbe_service_event_schedule(adapter
);
2444 case ixgbe_mac_X540
:
2445 if (!(eicr
& IXGBE_EICR_TS
))
2453 "Network adapter has been stopped because it has over heated. "
2454 "Restart the computer. If the problem persists, "
2455 "power off the system and replace the adapter\n");
2458 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2460 struct ixgbe_hw
*hw
= &adapter
->hw
;
2462 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2463 /* Clear the interrupt */
2464 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2465 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2466 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2467 ixgbe_service_event_schedule(adapter
);
2471 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2472 /* Clear the interrupt */
2473 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2474 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2475 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2476 ixgbe_service_event_schedule(adapter
);
2481 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2483 struct ixgbe_hw
*hw
= &adapter
->hw
;
2486 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2487 adapter
->link_check_timeout
= jiffies
;
2488 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2489 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2490 IXGBE_WRITE_FLUSH(hw
);
2491 ixgbe_service_event_schedule(adapter
);
2495 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2499 struct ixgbe_hw
*hw
= &adapter
->hw
;
2501 switch (hw
->mac
.type
) {
2502 case ixgbe_mac_82598EB
:
2503 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2504 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2506 case ixgbe_mac_82599EB
:
2507 case ixgbe_mac_X540
:
2508 mask
= (qmask
& 0xFFFFFFFF);
2510 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2511 mask
= (qmask
>> 32);
2513 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2518 /* skip the flush */
2521 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2525 struct ixgbe_hw
*hw
= &adapter
->hw
;
2527 switch (hw
->mac
.type
) {
2528 case ixgbe_mac_82598EB
:
2529 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2530 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2532 case ixgbe_mac_82599EB
:
2533 case ixgbe_mac_X540
:
2534 mask
= (qmask
& 0xFFFFFFFF);
2536 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2537 mask
= (qmask
>> 32);
2539 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2544 /* skip the flush */
2548 * ixgbe_irq_enable - Enable default interrupt generation settings
2549 * @adapter: board private structure
2551 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2554 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2556 /* don't reenable LSC while waiting for link */
2557 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2558 mask
&= ~IXGBE_EIMS_LSC
;
2560 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2561 switch (adapter
->hw
.mac
.type
) {
2562 case ixgbe_mac_82599EB
:
2563 mask
|= IXGBE_EIMS_GPI_SDP0
;
2565 case ixgbe_mac_X540
:
2566 mask
|= IXGBE_EIMS_TS
;
2571 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2572 mask
|= IXGBE_EIMS_GPI_SDP1
;
2573 switch (adapter
->hw
.mac
.type
) {
2574 case ixgbe_mac_82599EB
:
2575 mask
|= IXGBE_EIMS_GPI_SDP1
;
2576 mask
|= IXGBE_EIMS_GPI_SDP2
;
2577 case ixgbe_mac_X540
:
2578 mask
|= IXGBE_EIMS_ECC
;
2579 mask
|= IXGBE_EIMS_MAILBOX
;
2585 if (adapter
->hw
.mac
.type
== ixgbe_mac_X540
)
2586 mask
|= IXGBE_EIMS_TIMESYNC
;
2588 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2589 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2590 mask
|= IXGBE_EIMS_FLOW_DIR
;
2592 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2594 ixgbe_irq_enable_queues(adapter
, ~0);
2596 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2599 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2601 struct ixgbe_adapter
*adapter
= data
;
2602 struct ixgbe_hw
*hw
= &adapter
->hw
;
2606 * Workaround for Silicon errata. Use clear-by-write instead
2607 * of clear-by-read. Reading with EICS will return the
2608 * interrupt causes without clearing, which later be done
2609 * with the write to EICR.
2611 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2613 /* The lower 16bits of the EICR register are for the queue interrupts
2614 * which should be masked here in order to not accidently clear them if
2615 * the bits are high when ixgbe_msix_other is called. There is a race
2616 * condition otherwise which results in possible performance loss
2617 * especially if the ixgbe_msix_other interrupt is triggering
2618 * consistently (as it would when PPS is turned on for the X540 device)
2622 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2624 if (eicr
& IXGBE_EICR_LSC
)
2625 ixgbe_check_lsc(adapter
);
2627 if (eicr
& IXGBE_EICR_MAILBOX
)
2628 ixgbe_msg_task(adapter
);
2630 switch (hw
->mac
.type
) {
2631 case ixgbe_mac_82599EB
:
2632 case ixgbe_mac_X540
:
2633 if (eicr
& IXGBE_EICR_ECC
)
2634 e_info(link
, "Received unrecoverable ECC Err, please "
2636 /* Handle Flow Director Full threshold interrupt */
2637 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2638 int reinit_count
= 0;
2640 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2641 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2642 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2647 /* no more flow director interrupts until after init */
2648 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2649 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2650 ixgbe_service_event_schedule(adapter
);
2653 ixgbe_check_sfp_event(adapter
, eicr
);
2654 ixgbe_check_overtemp_event(adapter
, eicr
);
2660 ixgbe_check_fan_failure(adapter
, eicr
);
2662 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2663 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2665 /* re-enable the original interrupt state, no lsc, no queues */
2666 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2667 ixgbe_irq_enable(adapter
, false, false);
2672 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2674 struct ixgbe_q_vector
*q_vector
= data
;
2676 /* EIAM disabled interrupts (on this vector) for us */
2678 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2679 napi_schedule(&q_vector
->napi
);
2685 * ixgbe_poll - NAPI Rx polling callback
2686 * @napi: structure for representing this polling device
2687 * @budget: how many packets driver is allowed to clean
2689 * This function is used for legacy and MSI, NAPI mode
2691 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2693 struct ixgbe_q_vector
*q_vector
=
2694 container_of(napi
, struct ixgbe_q_vector
, napi
);
2695 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2696 struct ixgbe_ring
*ring
;
2697 int per_ring_budget
;
2698 bool clean_complete
= true;
2700 #ifdef CONFIG_IXGBE_DCA
2701 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2702 ixgbe_update_dca(q_vector
);
2705 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2706 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2708 if (!ixgbe_qv_lock_napi(q_vector
))
2711 /* attempt to distribute budget to each queue fairly, but don't allow
2712 * the budget to go below 1 because we'll exit polling */
2713 if (q_vector
->rx
.count
> 1)
2714 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2716 per_ring_budget
= budget
;
2718 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2719 clean_complete
&= (ixgbe_clean_rx_irq(q_vector
, ring
,
2720 per_ring_budget
) < per_ring_budget
);
2722 ixgbe_qv_unlock_napi(q_vector
);
2723 /* If all work not completed, return budget and keep polling */
2724 if (!clean_complete
)
2727 /* all work done, exit the polling mode */
2728 napi_complete(napi
);
2729 if (adapter
->rx_itr_setting
& 1)
2730 ixgbe_set_itr(q_vector
);
2731 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2732 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2738 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2739 * @adapter: board private structure
2741 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2742 * interrupts from the kernel.
2744 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2746 struct net_device
*netdev
= adapter
->netdev
;
2750 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2751 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2752 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2754 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2755 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2756 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2758 } else if (q_vector
->rx
.ring
) {
2759 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2760 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2761 } else if (q_vector
->tx
.ring
) {
2762 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2763 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2765 /* skip this unused q_vector */
2768 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2769 q_vector
->name
, q_vector
);
2771 e_err(probe
, "request_irq failed for MSIX interrupt "
2772 "Error: %d\n", err
);
2773 goto free_queue_irqs
;
2775 /* If Flow Director is enabled, set interrupt affinity */
2776 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2777 /* assign the mask for this irq */
2778 irq_set_affinity_hint(entry
->vector
,
2779 &q_vector
->affinity_mask
);
2783 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2784 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2786 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2787 goto free_queue_irqs
;
2795 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2797 free_irq(adapter
->msix_entries
[vector
].vector
,
2798 adapter
->q_vector
[vector
]);
2800 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2801 pci_disable_msix(adapter
->pdev
);
2802 kfree(adapter
->msix_entries
);
2803 adapter
->msix_entries
= NULL
;
2808 * ixgbe_intr - legacy mode Interrupt Handler
2809 * @irq: interrupt number
2810 * @data: pointer to a network interface device structure
2812 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2814 struct ixgbe_adapter
*adapter
= data
;
2815 struct ixgbe_hw
*hw
= &adapter
->hw
;
2816 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2820 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2821 * before the read of EICR.
2823 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2825 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2826 * therefore no explicit interrupt disable is necessary */
2827 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2830 * shared interrupt alert!
2831 * make sure interrupts are enabled because the read will
2832 * have disabled interrupts due to EIAM
2833 * finish the workaround of silicon errata on 82598. Unmask
2834 * the interrupt that we masked before the EICR read.
2836 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2837 ixgbe_irq_enable(adapter
, true, true);
2838 return IRQ_NONE
; /* Not our interrupt */
2841 if (eicr
& IXGBE_EICR_LSC
)
2842 ixgbe_check_lsc(adapter
);
2844 switch (hw
->mac
.type
) {
2845 case ixgbe_mac_82599EB
:
2846 ixgbe_check_sfp_event(adapter
, eicr
);
2848 case ixgbe_mac_X540
:
2849 if (eicr
& IXGBE_EICR_ECC
)
2850 e_info(link
, "Received unrecoverable ECC err, please "
2852 ixgbe_check_overtemp_event(adapter
, eicr
);
2858 ixgbe_check_fan_failure(adapter
, eicr
);
2859 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2860 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2862 /* would disable interrupts here but EIAM disabled it */
2863 napi_schedule(&q_vector
->napi
);
2866 * re-enable link(maybe) and non-queue interrupts, no flush.
2867 * ixgbe_poll will re-enable the queue interrupts
2869 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2870 ixgbe_irq_enable(adapter
, false, false);
2876 * ixgbe_request_irq - initialize interrupts
2877 * @adapter: board private structure
2879 * Attempts to configure interrupts using the best available
2880 * capabilities of the hardware and kernel.
2882 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2884 struct net_device
*netdev
= adapter
->netdev
;
2887 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2888 err
= ixgbe_request_msix_irqs(adapter
);
2889 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2890 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2891 netdev
->name
, adapter
);
2893 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2894 netdev
->name
, adapter
);
2897 e_err(probe
, "request_irq failed, Error %d\n", err
);
2902 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2906 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2907 free_irq(adapter
->pdev
->irq
, adapter
);
2911 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2912 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2913 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2915 /* free only the irqs that were actually requested */
2916 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
2919 /* clear the affinity_mask in the IRQ descriptor */
2920 irq_set_affinity_hint(entry
->vector
, NULL
);
2922 free_irq(entry
->vector
, q_vector
);
2925 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
2929 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2930 * @adapter: board private structure
2932 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2934 switch (adapter
->hw
.mac
.type
) {
2935 case ixgbe_mac_82598EB
:
2936 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2938 case ixgbe_mac_82599EB
:
2939 case ixgbe_mac_X540
:
2940 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2941 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2942 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2947 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2948 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2951 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
2952 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
2954 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
2956 synchronize_irq(adapter
->pdev
->irq
);
2961 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2964 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2966 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2968 ixgbe_write_eitr(q_vector
);
2970 ixgbe_set_ivar(adapter
, 0, 0, 0);
2971 ixgbe_set_ivar(adapter
, 1, 0, 0);
2973 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2977 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2978 * @adapter: board private structure
2979 * @ring: structure containing ring specific data
2981 * Configure the Tx descriptor ring after a reset.
2983 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2984 struct ixgbe_ring
*ring
)
2986 struct ixgbe_hw
*hw
= &adapter
->hw
;
2987 u64 tdba
= ring
->dma
;
2989 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2990 u8 reg_idx
= ring
->reg_idx
;
2992 /* disable queue to avoid issues while updating state */
2993 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2994 IXGBE_WRITE_FLUSH(hw
);
2996 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2997 (tdba
& DMA_BIT_MASK(32)));
2998 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2999 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3000 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3001 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3002 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3003 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3006 * set WTHRESH to encourage burst writeback, it should not be set
3007 * higher than 1 when:
3008 * - ITR is 0 as it could cause false TX hangs
3009 * - ITR is set to > 100k int/sec and BQL is enabled
3011 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3012 * to or less than the number of on chip descriptors, which is
3015 #if IS_ENABLED(CONFIG_BQL)
3016 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3018 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
3020 txdctl
|= (1 << 16); /* WTHRESH = 1 */
3022 txdctl
|= (8 << 16); /* WTHRESH = 8 */
3025 * Setting PTHRESH to 32 both improves performance
3026 * and avoids a TX hang with DFP enabled
3028 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
3029 32; /* PTHRESH = 32 */
3031 /* reinitialize flowdirector state */
3032 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3033 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3034 ring
->atr_count
= 0;
3035 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3037 ring
->atr_sample_rate
= 0;
3040 /* initialize XPS */
3041 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3042 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3045 netif_set_xps_queue(ring
->netdev
,
3046 &q_vector
->affinity_mask
,
3050 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3053 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3055 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3056 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3057 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3060 /* poll to verify queue is enabled */
3062 usleep_range(1000, 2000);
3063 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3064 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3066 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3069 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3071 struct ixgbe_hw
*hw
= &adapter
->hw
;
3073 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3075 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3078 /* disable the arbiter while setting MTQC */
3079 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3080 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3081 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3083 /* set transmit pool layout */
3084 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3085 mtqc
= IXGBE_MTQC_VT_ENA
;
3087 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3089 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3090 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3091 mtqc
|= IXGBE_MTQC_32VF
;
3093 mtqc
|= IXGBE_MTQC_64VF
;
3096 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3098 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3100 mtqc
= IXGBE_MTQC_64Q_1PB
;
3103 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3105 /* Enable Security TX Buffer IFG for multiple pb */
3107 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3108 sectx
|= IXGBE_SECTX_DCB
;
3109 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3112 /* re-enable the arbiter */
3113 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3114 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3118 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3119 * @adapter: board private structure
3121 * Configure the Tx unit of the MAC after a reset.
3123 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3125 struct ixgbe_hw
*hw
= &adapter
->hw
;
3129 ixgbe_setup_mtqc(adapter
);
3131 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3132 /* DMATXCTL.EN must be before Tx queues are enabled */
3133 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3134 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3135 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3138 /* Setup the HW Tx Head and Tail descriptor pointers */
3139 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3140 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3143 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3144 struct ixgbe_ring
*ring
)
3146 struct ixgbe_hw
*hw
= &adapter
->hw
;
3147 u8 reg_idx
= ring
->reg_idx
;
3148 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3150 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3152 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3155 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3156 struct ixgbe_ring
*ring
)
3158 struct ixgbe_hw
*hw
= &adapter
->hw
;
3159 u8 reg_idx
= ring
->reg_idx
;
3160 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3162 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3164 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3167 #ifdef CONFIG_IXGBE_DCB
3168 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3170 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3174 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3176 if (adapter
->ixgbe_ieee_pfc
)
3177 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3180 * We should set the drop enable bit if:
3183 * Number of Rx queues > 1 and flow control is disabled
3185 * This allows us to avoid head of line blocking for security
3186 * and performance reasons.
3188 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3189 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3190 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3191 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3193 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3194 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3198 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3200 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3201 struct ixgbe_ring
*rx_ring
)
3203 struct ixgbe_hw
*hw
= &adapter
->hw
;
3205 u8 reg_idx
= rx_ring
->reg_idx
;
3207 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3208 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3211 * if VMDq is not active we must program one srrctl register
3212 * per RSS queue since we have enabled RDRXCTL.MVMEN
3217 /* configure header buffer length, needed for RSC */
3218 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3220 /* configure the packet buffer length */
3221 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3223 /* configure descriptor type */
3224 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3226 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3229 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3231 struct ixgbe_hw
*hw
= &adapter
->hw
;
3232 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3233 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3234 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3235 u32 mrqc
= 0, reta
= 0;
3238 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3241 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3242 * make full use of any rings they may have. We will use the
3243 * PSRTYPE register to control how many rings we use within the PF.
3245 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3248 /* Fill out hash function seeds */
3249 for (i
= 0; i
< 10; i
++)
3250 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
3252 /* Fill out redirection table */
3253 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
3256 /* reta = 4-byte sliding window of
3257 * 0x00..(indices-1)(indices-1)00..etc. */
3258 reta
= (reta
<< 8) | (j
* 0x11);
3260 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3263 /* Disable indicating checksum in descriptor, enables RSS hash */
3264 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3265 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3266 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3268 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3269 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3270 mrqc
= IXGBE_MRQC_RSSEN
;
3272 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3274 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3276 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3278 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3279 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3280 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3282 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3285 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3287 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3289 mrqc
= IXGBE_MRQC_RSSEN
;
3293 /* Perform hash on these packet types */
3294 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3295 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3296 IXGBE_MRQC_RSS_FIELD_IPV6
|
3297 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3299 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3300 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3301 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3302 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3304 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3308 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3309 * @adapter: address of board private structure
3310 * @index: index of ring to set
3312 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3313 struct ixgbe_ring
*ring
)
3315 struct ixgbe_hw
*hw
= &adapter
->hw
;
3317 u8 reg_idx
= ring
->reg_idx
;
3319 if (!ring_is_rsc_enabled(ring
))
3322 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3323 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3325 * we must limit the number of descriptors so that the
3326 * total size of max desc * buf_len is not greater
3329 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3330 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3333 #define IXGBE_MAX_RX_DESC_POLL 10
3334 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3335 struct ixgbe_ring
*ring
)
3337 struct ixgbe_hw
*hw
= &adapter
->hw
;
3338 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3340 u8 reg_idx
= ring
->reg_idx
;
3342 if (ixgbe_removed(hw
->hw_addr
))
3344 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3345 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3346 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3350 usleep_range(1000, 2000);
3351 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3352 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3355 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3356 "the polling period\n", reg_idx
);
3360 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3361 struct ixgbe_ring
*ring
)
3363 struct ixgbe_hw
*hw
= &adapter
->hw
;
3364 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3366 u8 reg_idx
= ring
->reg_idx
;
3368 if (ixgbe_removed(hw
->hw_addr
))
3370 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3371 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3373 /* write value back with RXDCTL.ENABLE bit cleared */
3374 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3376 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3377 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3380 /* the hardware may take up to 100us to really disable the rx queue */
3383 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3384 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3387 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3388 "the polling period\n", reg_idx
);
3392 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3393 struct ixgbe_ring
*ring
)
3395 struct ixgbe_hw
*hw
= &adapter
->hw
;
3396 u64 rdba
= ring
->dma
;
3398 u8 reg_idx
= ring
->reg_idx
;
3400 /* disable queue to avoid issues while updating state */
3401 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3402 ixgbe_disable_rx_queue(adapter
, ring
);
3404 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3405 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3406 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3407 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3408 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3409 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3410 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3412 ixgbe_configure_srrctl(adapter
, ring
);
3413 ixgbe_configure_rscctl(adapter
, ring
);
3415 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3417 * enable cache line friendly hardware writes:
3418 * PTHRESH=32 descriptors (half the internal cache),
3419 * this also removes ugly rx_no_buffer_count increment
3420 * HTHRESH=4 descriptors (to minimize latency on fetch)
3421 * WTHRESH=8 burst writeback up to two cache lines
3423 rxdctl
&= ~0x3FFFFF;
3427 /* enable receive descriptor ring */
3428 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3429 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3431 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3432 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3435 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3437 struct ixgbe_hw
*hw
= &adapter
->hw
;
3438 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3441 /* PSRTYPE must be initialized in non 82598 adapters */
3442 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3443 IXGBE_PSRTYPE_UDPHDR
|
3444 IXGBE_PSRTYPE_IPV4HDR
|
3445 IXGBE_PSRTYPE_L2HDR
|
3446 IXGBE_PSRTYPE_IPV6HDR
;
3448 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3456 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3457 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3460 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3462 struct ixgbe_hw
*hw
= &adapter
->hw
;
3463 u32 reg_offset
, vf_shift
;
3464 u32 gcr_ext
, vmdctl
;
3467 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3470 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3471 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3472 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3473 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3474 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3475 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3477 vf_shift
= VMDQ_P(0) % 32;
3478 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3480 /* Enable only the PF's pool for Tx/Rx */
3481 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3482 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3483 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3484 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3485 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
3486 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3488 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3489 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3492 * Set up VF register offsets for selected VT Mode,
3493 * i.e. 32 or 64 VFs for SR-IOV
3495 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3496 case IXGBE_82599_VMDQ_8Q_MASK
:
3497 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3499 case IXGBE_82599_VMDQ_4Q_MASK
:
3500 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3503 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3507 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3510 /* Enable MAC Anti-Spoofing */
3511 hw
->mac
.ops
.set_mac_anti_spoofing(hw
, (adapter
->num_vfs
!= 0),
3513 /* For VFs that have spoof checking turned off */
3514 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3515 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3516 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3520 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3522 struct ixgbe_hw
*hw
= &adapter
->hw
;
3523 struct net_device
*netdev
= adapter
->netdev
;
3524 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3525 struct ixgbe_ring
*rx_ring
;
3530 /* adjust max frame to be able to do baby jumbo for FCoE */
3531 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3532 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3533 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3535 #endif /* IXGBE_FCOE */
3537 /* adjust max frame to be at least the size of a standard frame */
3538 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3539 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3541 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3542 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3543 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3544 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3546 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3549 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3550 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3551 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3552 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3555 * Setup the HW Rx Head and Tail Descriptor Pointers and
3556 * the Base and Length of the Rx Descriptor Ring
3558 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3559 rx_ring
= adapter
->rx_ring
[i
];
3560 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3561 set_ring_rsc_enabled(rx_ring
);
3563 clear_ring_rsc_enabled(rx_ring
);
3567 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3569 struct ixgbe_hw
*hw
= &adapter
->hw
;
3570 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3572 switch (hw
->mac
.type
) {
3573 case ixgbe_mac_82598EB
:
3575 * For VMDq support of different descriptor types or
3576 * buffer sizes through the use of multiple SRRCTL
3577 * registers, RDRXCTL.MVMEN must be set to 1
3579 * also, the manual doesn't mention it clearly but DCA hints
3580 * will only use queue 0's tags unless this bit is set. Side
3581 * effects of setting this bit are only that SRRCTL must be
3582 * fully programmed [0..15]
3584 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3586 case ixgbe_mac_82599EB
:
3587 case ixgbe_mac_X540
:
3588 /* Disable RSC for ACK packets */
3589 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3590 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3591 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3592 /* hardware requires some bits to be set by default */
3593 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3594 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3597 /* We should do nothing since we don't know this hardware */
3601 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3605 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3606 * @adapter: board private structure
3608 * Configure the Rx unit of the MAC after a reset.
3610 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3612 struct ixgbe_hw
*hw
= &adapter
->hw
;
3616 /* disable receives while setting up the descriptors */
3617 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3618 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3620 ixgbe_setup_psrtype(adapter
);
3621 ixgbe_setup_rdrxctl(adapter
);
3624 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3625 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3626 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3627 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3628 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3630 /* Program registers for the distribution of queues */
3631 ixgbe_setup_mrqc(adapter
);
3633 /* set_rx_buffer_len must be called before ring initialization */
3634 ixgbe_set_rx_buffer_len(adapter
);
3637 * Setup the HW Rx Head and Tail Descriptor Pointers and
3638 * the Base and Length of the Rx Descriptor Ring
3640 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3641 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3643 /* disable drop enable for 82598 parts */
3644 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3645 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3647 /* enable all receives */
3648 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3649 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3652 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3653 __be16 proto
, u16 vid
)
3655 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3656 struct ixgbe_hw
*hw
= &adapter
->hw
;
3658 /* add VID to filter table */
3659 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true);
3660 set_bit(vid
, adapter
->active_vlans
);
3665 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
3666 __be16 proto
, u16 vid
)
3668 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3669 struct ixgbe_hw
*hw
= &adapter
->hw
;
3671 /* remove VID from filter table */
3672 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), false);
3673 clear_bit(vid
, adapter
->active_vlans
);
3679 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3680 * @adapter: driver data
3682 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3684 struct ixgbe_hw
*hw
= &adapter
->hw
;
3687 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3688 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3689 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3693 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3694 * @adapter: driver data
3696 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3698 struct ixgbe_hw
*hw
= &adapter
->hw
;
3701 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3702 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3703 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3704 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3708 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3709 * @adapter: driver data
3711 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3713 struct ixgbe_hw
*hw
= &adapter
->hw
;
3717 switch (hw
->mac
.type
) {
3718 case ixgbe_mac_82598EB
:
3719 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3720 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3721 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3723 case ixgbe_mac_82599EB
:
3724 case ixgbe_mac_X540
:
3725 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3726 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3728 if (ring
->l2_accel_priv
)
3731 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3732 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3733 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3742 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3743 * @adapter: driver data
3745 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3747 struct ixgbe_hw
*hw
= &adapter
->hw
;
3751 switch (hw
->mac
.type
) {
3752 case ixgbe_mac_82598EB
:
3753 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3754 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3755 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3757 case ixgbe_mac_82599EB
:
3758 case ixgbe_mac_X540
:
3759 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3760 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3762 if (ring
->l2_accel_priv
)
3765 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3766 vlnctrl
|= IXGBE_RXDCTL_VME
;
3767 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3775 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3779 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
3781 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3782 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
3786 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3787 * @netdev: network interface device structure
3789 * Writes unicast address list to the RAR table.
3790 * Returns: -ENOMEM on failure/insufficient address space
3791 * 0 on no addresses written
3792 * X on writing X addresses to the RAR table
3794 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3796 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3797 struct ixgbe_hw
*hw
= &adapter
->hw
;
3798 unsigned int rar_entries
= hw
->mac
.num_rar_entries
- 1;
3801 /* In SR-IOV/VMDQ modes significantly less RAR entries are available */
3802 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3803 rar_entries
= IXGBE_MAX_PF_MACVLANS
- 1;
3805 /* return ENOMEM indicating insufficient memory for addresses */
3806 if (netdev_uc_count(netdev
) > rar_entries
)
3809 if (!netdev_uc_empty(netdev
)) {
3810 struct netdev_hw_addr
*ha
;
3811 /* return error if we do not support writing to RAR table */
3812 if (!hw
->mac
.ops
.set_rar
)
3815 netdev_for_each_uc_addr(ha
, netdev
) {
3818 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3819 VMDQ_P(0), IXGBE_RAH_AV
);
3823 /* write the addresses in reverse order to avoid write combining */
3824 for (; rar_entries
> 0 ; rar_entries
--)
3825 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3831 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3832 * @netdev: network interface device structure
3834 * The set_rx_method entry point is called whenever the unicast/multicast
3835 * address list or the network interface flags are updated. This routine is
3836 * responsible for configuring the hardware for proper unicast, multicast and
3839 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3841 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3842 struct ixgbe_hw
*hw
= &adapter
->hw
;
3843 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3846 /* Check for Promiscuous and All Multicast modes */
3848 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3850 /* set all bits that we expect to always be set */
3851 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3852 fctrl
|= IXGBE_FCTRL_BAM
;
3853 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3854 fctrl
|= IXGBE_FCTRL_PMCF
;
3856 /* clear the bits we are changing the status of */
3857 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3859 if (netdev
->flags
& IFF_PROMISC
) {
3860 hw
->addr_ctrl
.user_set_promisc
= true;
3861 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3862 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3863 /* Only disable hardware filter vlans in promiscuous mode
3864 * if SR-IOV and VMDQ are disabled - otherwise ensure
3865 * that hardware VLAN filters remain enabled.
3867 if (!(adapter
->flags
& (IXGBE_FLAG_VMDQ_ENABLED
|
3868 IXGBE_FLAG_SRIOV_ENABLED
)))
3869 ixgbe_vlan_filter_disable(adapter
);
3871 ixgbe_vlan_filter_enable(adapter
);
3873 if (netdev
->flags
& IFF_ALLMULTI
) {
3874 fctrl
|= IXGBE_FCTRL_MPE
;
3875 vmolr
|= IXGBE_VMOLR_MPE
;
3877 ixgbe_vlan_filter_enable(adapter
);
3878 hw
->addr_ctrl
.user_set_promisc
= false;
3882 * Write addresses to available RAR registers, if there is not
3883 * sufficient space to store all the addresses then enable
3884 * unicast promiscuous mode
3886 count
= ixgbe_write_uc_addr_list(netdev
);
3888 fctrl
|= IXGBE_FCTRL_UPE
;
3889 vmolr
|= IXGBE_VMOLR_ROPE
;
3892 /* Write addresses to the MTA, if the attempt fails
3893 * then we should just turn on promiscuous mode so
3894 * that we can at least receive multicast traffic
3896 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3897 vmolr
|= IXGBE_VMOLR_ROMPE
;
3899 if (adapter
->num_vfs
)
3900 ixgbe_restore_vf_multicasts(adapter
);
3902 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3903 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
3904 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3906 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
3909 /* This is useful for sniffing bad packets. */
3910 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3911 /* UPE and MPE will be handled by normal PROMISC logic
3912 * in e1000e_set_rx_mode */
3913 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3914 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3915 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3917 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3918 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3921 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3923 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
3924 ixgbe_vlan_strip_enable(adapter
);
3926 ixgbe_vlan_strip_disable(adapter
);
3929 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3933 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
3934 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
3935 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
3939 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3943 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
3944 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
3945 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
3946 pr_info("QV %d locked\n", q_idx
);
3947 usleep_range(1000, 20000);
3952 #ifdef CONFIG_IXGBE_DCB
3954 * ixgbe_configure_dcb - Configure DCB hardware
3955 * @adapter: ixgbe adapter struct
3957 * This is called by the driver on open to configure the DCB hardware.
3958 * This is also called by the gennetlink interface when reconfiguring
3961 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3963 struct ixgbe_hw
*hw
= &adapter
->hw
;
3964 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3966 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3967 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3968 netif_set_gso_max_size(adapter
->netdev
, 65536);
3972 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3973 netif_set_gso_max_size(adapter
->netdev
, 32768);
3976 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3977 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3980 /* reconfigure the hardware */
3981 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
3982 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3984 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3986 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
3987 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
3988 ixgbe_dcb_hw_ets(&adapter
->hw
,
3989 adapter
->ixgbe_ieee_ets
,
3991 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
3992 adapter
->ixgbe_ieee_pfc
->pfc_en
,
3993 adapter
->ixgbe_ieee_ets
->prio_tc
);
3996 /* Enable RSS Hash per TC */
3997 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3999 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4006 /* write msb to all 8 TCs in one write */
4007 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4012 /* Additional bittime to account for IXGBE framing */
4013 #define IXGBE_ETH_FRAMING 20
4016 * ixgbe_hpbthresh - calculate high water mark for flow control
4018 * @adapter: board private structure to calculate for
4019 * @pb: packet buffer to calculate
4021 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4023 struct ixgbe_hw
*hw
= &adapter
->hw
;
4024 struct net_device
*dev
= adapter
->netdev
;
4025 int link
, tc
, kb
, marker
;
4028 /* Calculate max LAN frame size */
4029 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4032 /* FCoE traffic class uses FCOE jumbo frames */
4033 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4034 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4035 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4036 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4039 /* Calculate delay value for device */
4040 switch (hw
->mac
.type
) {
4041 case ixgbe_mac_X540
:
4042 dv_id
= IXGBE_DV_X540(link
, tc
);
4045 dv_id
= IXGBE_DV(link
, tc
);
4049 /* Loopback switch introduces additional latency */
4050 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4051 dv_id
+= IXGBE_B2BT(tc
);
4053 /* Delay value is calculated in bit times convert to KB */
4054 kb
= IXGBE_BT2KB(dv_id
);
4055 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4057 marker
= rx_pba
- kb
;
4059 /* It is possible that the packet buffer is not large enough
4060 * to provide required headroom. In this case throw an error
4061 * to user and a do the best we can.
4064 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4065 "headroom to support flow control."
4066 "Decrease MTU or number of traffic classes\n", pb
);
4074 * ixgbe_lpbthresh - calculate low water mark for for flow control
4076 * @adapter: board private structure to calculate for
4077 * @pb: packet buffer to calculate
4079 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
4081 struct ixgbe_hw
*hw
= &adapter
->hw
;
4082 struct net_device
*dev
= adapter
->netdev
;
4086 /* Calculate max LAN frame size */
4087 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4089 /* Calculate delay value for device */
4090 switch (hw
->mac
.type
) {
4091 case ixgbe_mac_X540
:
4092 dv_id
= IXGBE_LOW_DV_X540(tc
);
4095 dv_id
= IXGBE_LOW_DV(tc
);
4099 /* Delay value is calculated in bit times convert to KB */
4100 return IXGBE_BT2KB(dv_id
);
4104 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4106 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4108 struct ixgbe_hw
*hw
= &adapter
->hw
;
4109 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4115 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
4117 for (i
= 0; i
< num_tc
; i
++) {
4118 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4120 /* Low water marks must not be larger than high water marks */
4121 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
4122 hw
->fc
.low_water
= 0;
4126 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4128 struct ixgbe_hw
*hw
= &adapter
->hw
;
4130 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4132 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4133 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4134 hdrm
= 32 << adapter
->fdir_pballoc
;
4138 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4139 ixgbe_pbthresh_setup(adapter
);
4142 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4144 struct ixgbe_hw
*hw
= &adapter
->hw
;
4145 struct hlist_node
*node2
;
4146 struct ixgbe_fdir_filter
*filter
;
4148 spin_lock(&adapter
->fdir_perfect_lock
);
4150 if (!hlist_empty(&adapter
->fdir_filter_list
))
4151 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4153 hlist_for_each_entry_safe(filter
, node2
,
4154 &adapter
->fdir_filter_list
, fdir_node
) {
4155 ixgbe_fdir_write_perfect_filter_82599(hw
,
4158 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4159 IXGBE_FDIR_DROP_QUEUE
:
4160 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4163 spin_unlock(&adapter
->fdir_perfect_lock
);
4166 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4167 struct ixgbe_adapter
*adapter
)
4169 struct ixgbe_hw
*hw
= &adapter
->hw
;
4172 /* No unicast promiscuous support for VMDQ devices. */
4173 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4174 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4176 /* clear the affected bit */
4177 vmolr
&= ~IXGBE_VMOLR_MPE
;
4179 if (dev
->flags
& IFF_ALLMULTI
) {
4180 vmolr
|= IXGBE_VMOLR_MPE
;
4182 vmolr
|= IXGBE_VMOLR_ROMPE
;
4183 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4185 ixgbe_write_uc_addr_list(adapter
->netdev
);
4186 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4189 static void ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4192 struct ixgbe_hw
*hw
= &adapter
->hw
;
4195 entry
= hw
->mac
.num_rar_entries
- pool
;
4196 hw
->mac
.ops
.set_rar(hw
, entry
, addr
, VMDQ_P(pool
), IXGBE_RAH_AV
);
4199 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4201 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4202 int rss_i
= adapter
->num_rx_queues_per_pool
;
4203 struct ixgbe_hw
*hw
= &adapter
->hw
;
4204 u16 pool
= vadapter
->pool
;
4205 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4206 IXGBE_PSRTYPE_UDPHDR
|
4207 IXGBE_PSRTYPE_IPV4HDR
|
4208 IXGBE_PSRTYPE_L2HDR
|
4209 IXGBE_PSRTYPE_IPV6HDR
;
4211 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4219 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4223 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4224 * @rx_ring: ring to free buffers from
4226 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4228 struct device
*dev
= rx_ring
->dev
;
4232 /* ring already cleared, nothing to do */
4233 if (!rx_ring
->rx_buffer_info
)
4236 /* Free all the Rx ring sk_buffs */
4237 for (i
= 0; i
< rx_ring
->count
; i
++) {
4238 struct ixgbe_rx_buffer
*rx_buffer
;
4240 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4241 if (rx_buffer
->skb
) {
4242 struct sk_buff
*skb
= rx_buffer
->skb
;
4243 if (IXGBE_CB(skb
)->page_released
) {
4246 ixgbe_rx_bufsz(rx_ring
),
4248 IXGBE_CB(skb
)->page_released
= false;
4252 rx_buffer
->skb
= NULL
;
4254 dma_unmap_page(dev
, rx_buffer
->dma
,
4255 ixgbe_rx_pg_size(rx_ring
),
4258 if (rx_buffer
->page
)
4259 __free_pages(rx_buffer
->page
,
4260 ixgbe_rx_pg_order(rx_ring
));
4261 rx_buffer
->page
= NULL
;
4264 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4265 memset(rx_ring
->rx_buffer_info
, 0, size
);
4267 /* Zero out the descriptor ring */
4268 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4270 rx_ring
->next_to_alloc
= 0;
4271 rx_ring
->next_to_clean
= 0;
4272 rx_ring
->next_to_use
= 0;
4275 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4276 struct ixgbe_ring
*rx_ring
)
4278 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4279 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4281 /* shutdown specific queue receive and wait for dma to settle */
4282 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4283 usleep_range(10000, 20000);
4284 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << index
));
4285 ixgbe_clean_rx_ring(rx_ring
);
4286 rx_ring
->l2_accel_priv
= NULL
;
4289 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4290 struct ixgbe_fwd_adapter
*accel
)
4292 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4293 unsigned int rxbase
= accel
->rx_base_queue
;
4294 unsigned int txbase
= accel
->tx_base_queue
;
4297 netif_tx_stop_all_queues(vdev
);
4299 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4300 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4301 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4304 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4305 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4306 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4313 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4314 struct ixgbe_fwd_adapter
*accel
)
4316 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4317 unsigned int rxbase
, txbase
, queues
;
4318 int i
, baseq
, err
= 0;
4320 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4323 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4324 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4325 accel
->pool
, adapter
->num_rx_pools
,
4326 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4327 adapter
->fwd_bitmask
);
4329 accel
->netdev
= vdev
;
4330 accel
->rx_base_queue
= rxbase
= baseq
;
4331 accel
->tx_base_queue
= txbase
= baseq
;
4333 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4334 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4336 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4337 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4338 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4339 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4342 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4343 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4344 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4347 queues
= min_t(unsigned int,
4348 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4349 err
= netif_set_real_num_tx_queues(vdev
, queues
);
4353 err
= netif_set_real_num_rx_queues(vdev
, queues
);
4357 if (is_valid_ether_addr(vdev
->dev_addr
))
4358 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
4360 ixgbe_fwd_psrtype(accel
);
4361 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
4364 ixgbe_fwd_ring_down(vdev
, accel
);
4368 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
4370 struct net_device
*upper
;
4371 struct list_head
*iter
;
4374 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4375 if (netif_is_macvlan(upper
)) {
4376 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
4377 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
4379 if (dfwd
->fwd_priv
) {
4380 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
4388 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
4390 struct ixgbe_hw
*hw
= &adapter
->hw
;
4392 ixgbe_configure_pb(adapter
);
4393 #ifdef CONFIG_IXGBE_DCB
4394 ixgbe_configure_dcb(adapter
);
4397 * We must restore virtualization before VLANs or else
4398 * the VLVF registers will not be populated
4400 ixgbe_configure_virtualization(adapter
);
4402 ixgbe_set_rx_mode(adapter
->netdev
);
4403 ixgbe_restore_vlan(adapter
);
4405 switch (hw
->mac
.type
) {
4406 case ixgbe_mac_82599EB
:
4407 case ixgbe_mac_X540
:
4408 hw
->mac
.ops
.disable_rx_buff(hw
);
4414 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
4415 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
4416 adapter
->fdir_pballoc
);
4417 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
4418 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
4419 adapter
->fdir_pballoc
);
4420 ixgbe_fdir_filter_restore(adapter
);
4423 switch (hw
->mac
.type
) {
4424 case ixgbe_mac_82599EB
:
4425 case ixgbe_mac_X540
:
4426 hw
->mac
.ops
.enable_rx_buff(hw
);
4433 /* configure FCoE L2 filters, redirection table, and Rx control */
4434 ixgbe_configure_fcoe(adapter
);
4436 #endif /* IXGBE_FCOE */
4437 ixgbe_configure_tx(adapter
);
4438 ixgbe_configure_rx(adapter
);
4439 ixgbe_configure_dfwd(adapter
);
4442 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
4444 switch (hw
->phy
.type
) {
4445 case ixgbe_phy_sfp_avago
:
4446 case ixgbe_phy_sfp_ftl
:
4447 case ixgbe_phy_sfp_intel
:
4448 case ixgbe_phy_sfp_unknown
:
4449 case ixgbe_phy_sfp_passive_tyco
:
4450 case ixgbe_phy_sfp_passive_unknown
:
4451 case ixgbe_phy_sfp_active_unknown
:
4452 case ixgbe_phy_sfp_ftl_active
:
4453 case ixgbe_phy_qsfp_passive_unknown
:
4454 case ixgbe_phy_qsfp_active_unknown
:
4455 case ixgbe_phy_qsfp_intel
:
4456 case ixgbe_phy_qsfp_unknown
:
4459 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4467 * ixgbe_sfp_link_config - set up SFP+ link
4468 * @adapter: pointer to private adapter struct
4470 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
4473 * We are assuming the worst case scenario here, and that
4474 * is that an SFP was inserted/removed after the reset
4475 * but before SFP detection was enabled. As such the best
4476 * solution is to just start searching as soon as we start
4478 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
4479 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
4481 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
4485 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4486 * @hw: pointer to private hardware struct
4488 * Returns 0 on success, negative on failure
4490 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
4493 bool autoneg
, link_up
= false;
4494 u32 ret
= IXGBE_ERR_LINK_SETUP
;
4496 if (hw
->mac
.ops
.check_link
)
4497 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
4502 speed
= hw
->phy
.autoneg_advertised
;
4503 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
4504 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
4509 if (hw
->mac
.ops
.setup_link
)
4510 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
4515 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
4517 struct ixgbe_hw
*hw
= &adapter
->hw
;
4520 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4521 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
4523 gpie
|= IXGBE_GPIE_EIAME
;
4525 * use EIAM to auto-mask when MSI-X interrupt is asserted
4526 * this saves a register write for every interrupt
4528 switch (hw
->mac
.type
) {
4529 case ixgbe_mac_82598EB
:
4530 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4532 case ixgbe_mac_82599EB
:
4533 case ixgbe_mac_X540
:
4535 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4536 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4540 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4541 * specifically only auto mask tx and rx interrupts */
4542 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4545 /* XXX: to interrupt immediately for EICS writes, enable this */
4546 /* gpie |= IXGBE_GPIE_EIMEN; */
4548 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
4549 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
4551 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
4552 case IXGBE_82599_VMDQ_8Q_MASK
:
4553 gpie
|= IXGBE_GPIE_VTMODE_16
;
4555 case IXGBE_82599_VMDQ_4Q_MASK
:
4556 gpie
|= IXGBE_GPIE_VTMODE_32
;
4559 gpie
|= IXGBE_GPIE_VTMODE_64
;
4564 /* Enable Thermal over heat sensor interrupt */
4565 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
4566 switch (adapter
->hw
.mac
.type
) {
4567 case ixgbe_mac_82599EB
:
4568 gpie
|= IXGBE_SDP0_GPIEN
;
4570 case ixgbe_mac_X540
:
4571 gpie
|= IXGBE_EIMS_TS
;
4578 /* Enable fan failure interrupt */
4579 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
4580 gpie
|= IXGBE_SDP1_GPIEN
;
4582 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4583 gpie
|= IXGBE_SDP1_GPIEN
;
4584 gpie
|= IXGBE_SDP2_GPIEN
;
4587 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
4590 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
4592 struct ixgbe_hw
*hw
= &adapter
->hw
;
4593 struct net_device
*upper
;
4594 struct list_head
*iter
;
4598 ixgbe_get_hw_control(adapter
);
4599 ixgbe_setup_gpie(adapter
);
4601 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4602 ixgbe_configure_msix(adapter
);
4604 ixgbe_configure_msi_and_legacy(adapter
);
4606 /* enable the optics for 82599 SFP+ fiber */
4607 if (hw
->mac
.ops
.enable_tx_laser
)
4608 hw
->mac
.ops
.enable_tx_laser(hw
);
4610 smp_mb__before_clear_bit();
4611 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
4612 ixgbe_napi_enable_all(adapter
);
4614 if (ixgbe_is_sfp(hw
)) {
4615 ixgbe_sfp_link_config(adapter
);
4617 err
= ixgbe_non_sfp_link_config(hw
);
4619 e_err(probe
, "link_config FAILED %d\n", err
);
4622 /* clear any pending interrupts, may auto mask */
4623 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4624 ixgbe_irq_enable(adapter
, true, true);
4627 * If this adapter has a fan, check to see if we had a failure
4628 * before we enabled the interrupt.
4630 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4631 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4632 if (esdp
& IXGBE_ESDP_SDP1
)
4633 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4636 /* enable transmits */
4637 netif_tx_start_all_queues(adapter
->netdev
);
4639 /* enable any upper devices */
4640 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4641 if (netif_is_macvlan(upper
)) {
4642 struct macvlan_dev
*vlan
= netdev_priv(upper
);
4645 netif_tx_start_all_queues(upper
);
4649 /* bring the link up in the watchdog, this could race with our first
4650 * link up interrupt but shouldn't be a problem */
4651 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4652 adapter
->link_check_timeout
= jiffies
;
4653 mod_timer(&adapter
->service_timer
, jiffies
);
4655 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4656 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4657 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4658 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4661 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4663 WARN_ON(in_interrupt());
4664 /* put off any impending NetWatchDogTimeout */
4665 adapter
->netdev
->trans_start
= jiffies
;
4667 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4668 usleep_range(1000, 2000);
4669 ixgbe_down(adapter
);
4671 * If SR-IOV enabled then wait a bit before bringing the adapter
4672 * back up to give the VFs time to respond to the reset. The
4673 * two second wait is based upon the watchdog timer cycle in
4676 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4679 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4682 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4684 /* hardware has been reset, we need to reload some things */
4685 ixgbe_configure(adapter
);
4687 ixgbe_up_complete(adapter
);
4690 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4692 struct ixgbe_hw
*hw
= &adapter
->hw
;
4695 if (ixgbe_removed(hw
->hw_addr
))
4697 /* lock SFP init bit to prevent race conditions with the watchdog */
4698 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4699 usleep_range(1000, 2000);
4701 /* clear all SFP and link config related flags while holding SFP_INIT */
4702 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4703 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4704 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4706 err
= hw
->mac
.ops
.init_hw(hw
);
4709 case IXGBE_ERR_SFP_NOT_PRESENT
:
4710 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4712 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4713 e_dev_err("master disable timed out\n");
4715 case IXGBE_ERR_EEPROM_VERSION
:
4716 /* We are running on a pre-production device, log a warning */
4717 e_dev_warn("This device is a pre-production adapter/LOM. "
4718 "Please be aware there may be issues associated with "
4719 "your hardware. If you are experiencing problems "
4720 "please contact your Intel or hardware "
4721 "representative who provided you with this "
4725 e_dev_err("Hardware Error: %d\n", err
);
4728 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4730 /* reprogram the RAR[0] in case user changed it. */
4731 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
4733 /* update SAN MAC vmdq pool selection */
4734 if (hw
->mac
.san_mac_rar_index
)
4735 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
4737 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
4738 ixgbe_ptp_reset(adapter
);
4742 * ixgbe_clean_tx_ring - Free Tx Buffers
4743 * @tx_ring: ring to be cleaned
4745 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4747 struct ixgbe_tx_buffer
*tx_buffer_info
;
4751 /* ring already cleared, nothing to do */
4752 if (!tx_ring
->tx_buffer_info
)
4755 /* Free all the Tx ring sk_buffs */
4756 for (i
= 0; i
< tx_ring
->count
; i
++) {
4757 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4758 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4761 netdev_tx_reset_queue(txring_txq(tx_ring
));
4763 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4764 memset(tx_ring
->tx_buffer_info
, 0, size
);
4766 /* Zero out the descriptor ring */
4767 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4769 tx_ring
->next_to_use
= 0;
4770 tx_ring
->next_to_clean
= 0;
4774 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4775 * @adapter: board private structure
4777 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4781 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4782 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4786 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4787 * @adapter: board private structure
4789 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4793 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4794 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4797 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4799 struct hlist_node
*node2
;
4800 struct ixgbe_fdir_filter
*filter
;
4802 spin_lock(&adapter
->fdir_perfect_lock
);
4804 hlist_for_each_entry_safe(filter
, node2
,
4805 &adapter
->fdir_filter_list
, fdir_node
) {
4806 hlist_del(&filter
->fdir_node
);
4809 adapter
->fdir_filter_count
= 0;
4811 spin_unlock(&adapter
->fdir_perfect_lock
);
4814 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4816 struct net_device
*netdev
= adapter
->netdev
;
4817 struct ixgbe_hw
*hw
= &adapter
->hw
;
4818 struct net_device
*upper
;
4819 struct list_head
*iter
;
4823 /* signal that we are down to the interrupt handler */
4824 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
4825 return; /* do nothing if already down */
4827 /* disable receives */
4828 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4829 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4831 /* disable all enabled rx queues */
4832 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4833 /* this call also flushes the previous write */
4834 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4836 usleep_range(10000, 20000);
4838 netif_tx_stop_all_queues(netdev
);
4840 /* call carrier off first to avoid false dev_watchdog timeouts */
4841 netif_carrier_off(netdev
);
4842 netif_tx_disable(netdev
);
4844 /* disable any upper devices */
4845 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4846 if (netif_is_macvlan(upper
)) {
4847 struct macvlan_dev
*vlan
= netdev_priv(upper
);
4849 if (vlan
->fwd_priv
) {
4850 netif_tx_stop_all_queues(upper
);
4851 netif_carrier_off(upper
);
4852 netif_tx_disable(upper
);
4857 ixgbe_irq_disable(adapter
);
4859 ixgbe_napi_disable_all(adapter
);
4861 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4862 IXGBE_FLAG2_RESET_REQUESTED
);
4863 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4865 del_timer_sync(&adapter
->service_timer
);
4867 if (adapter
->num_vfs
) {
4868 /* Clear EITR Select mapping */
4869 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4871 /* Mark all the VFs as inactive */
4872 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4873 adapter
->vfinfo
[i
].clear_to_send
= false;
4875 /* ping all the active vfs to let them know we are going down */
4876 ixgbe_ping_all_vfs(adapter
);
4878 /* Disable all VFTE/VFRE TX/RX */
4879 ixgbe_disable_tx_rx(adapter
);
4882 /* disable transmits in the hardware now that interrupts are off */
4883 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4884 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4885 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4888 /* Disable the Tx DMA engine on 82599 and X540 */
4889 switch (hw
->mac
.type
) {
4890 case ixgbe_mac_82599EB
:
4891 case ixgbe_mac_X540
:
4892 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4893 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4894 ~IXGBE_DMATXCTL_TE
));
4900 if (!pci_channel_offline(adapter
->pdev
))
4901 ixgbe_reset(adapter
);
4903 /* power down the optics for 82599 SFP+ fiber */
4904 if (hw
->mac
.ops
.disable_tx_laser
)
4905 hw
->mac
.ops
.disable_tx_laser(hw
);
4907 ixgbe_clean_all_tx_rings(adapter
);
4908 ixgbe_clean_all_rx_rings(adapter
);
4910 #ifdef CONFIG_IXGBE_DCA
4911 /* since we reset the hardware DCA settings were cleared */
4912 ixgbe_setup_dca(adapter
);
4917 * ixgbe_tx_timeout - Respond to a Tx Hang
4918 * @netdev: network interface device structure
4920 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4922 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4924 /* Do the reset outside of interrupt context */
4925 ixgbe_tx_timeout_reset(adapter
);
4929 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4930 * @adapter: board private structure to initialize
4932 * ixgbe_sw_init initializes the Adapter private data structure.
4933 * Fields are initialized based on PCI device information and
4934 * OS network device settings (MTU size).
4936 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4938 struct ixgbe_hw
*hw
= &adapter
->hw
;
4939 struct pci_dev
*pdev
= adapter
->pdev
;
4940 unsigned int rss
, fdir
;
4942 #ifdef CONFIG_IXGBE_DCB
4944 struct tc_configuration
*tc
;
4947 /* PCI config space info */
4949 hw
->vendor_id
= pdev
->vendor
;
4950 hw
->device_id
= pdev
->device
;
4951 hw
->revision_id
= pdev
->revision
;
4952 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4953 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4955 /* Set common capability flags and settings */
4956 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
4957 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
4958 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4959 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4960 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
4961 adapter
->atr_sample_rate
= 20;
4962 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
4963 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
4964 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
4965 #ifdef CONFIG_IXGBE_DCA
4966 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
4969 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4970 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4971 #ifdef CONFIG_IXGBE_DCB
4972 /* Default traffic class to use for FCoE */
4973 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4974 #endif /* CONFIG_IXGBE_DCB */
4975 #endif /* IXGBE_FCOE */
4977 /* Set MAC specific capability flags and exceptions */
4978 switch (hw
->mac
.type
) {
4979 case ixgbe_mac_82598EB
:
4980 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
4981 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
4983 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4984 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4986 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
4987 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
4988 adapter
->atr_sample_rate
= 0;
4989 adapter
->fdir_pballoc
= 0;
4991 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
4992 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4993 #ifdef CONFIG_IXGBE_DCB
4994 adapter
->fcoe
.up
= 0;
4995 #endif /* IXGBE_DCB */
4996 #endif /* IXGBE_FCOE */
4998 case ixgbe_mac_82599EB
:
4999 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5000 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5002 case ixgbe_mac_X540
:
5003 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM
);
5004 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5005 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5012 /* FCoE support exists, always init the FCoE lock */
5013 spin_lock_init(&adapter
->fcoe
.lock
);
5016 /* n-tuple support exists, always init our spinlock */
5017 spin_lock_init(&adapter
->fdir_perfect_lock
);
5019 #ifdef CONFIG_IXGBE_DCB
5020 switch (hw
->mac
.type
) {
5021 case ixgbe_mac_X540
:
5022 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5023 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5026 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5027 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5031 /* Configure DCB traffic classes */
5032 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5033 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5034 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5035 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5036 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5037 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5038 tc
->dcb_pfc
= pfc_disabled
;
5041 /* Initialize default user to priority mapping, UPx->TC0 */
5042 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5043 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5044 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5046 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5047 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5048 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5049 adapter
->dcb_set_bitmap
= 0x00;
5050 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5051 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5052 sizeof(adapter
->temp_dcb_cfg
));
5056 /* default flow control settings */
5057 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5058 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5059 ixgbe_pbthresh_setup(adapter
);
5060 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5061 hw
->fc
.send_xon
= true;
5062 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5064 #ifdef CONFIG_PCI_IOV
5066 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5068 /* assign number of SR-IOV VFs */
5069 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5070 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5071 adapter
->num_vfs
= 0;
5072 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5074 adapter
->num_vfs
= max_vfs
;
5077 #endif /* CONFIG_PCI_IOV */
5079 /* enable itr by default in dynamic mode */
5080 adapter
->rx_itr_setting
= 1;
5081 adapter
->tx_itr_setting
= 1;
5083 /* set default ring sizes */
5084 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5085 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5087 /* set default work limits */
5088 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5090 /* initialize eeprom parameters */
5091 if (ixgbe_init_eeprom_params_generic(hw
)) {
5092 e_dev_err("EEPROM initialization failed\n");
5096 /* PF holds first pool slot */
5097 set_bit(0, &adapter
->fwd_bitmask
);
5098 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5104 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5105 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5107 * Return 0 on success, negative on failure
5109 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5111 struct device
*dev
= tx_ring
->dev
;
5112 int orig_node
= dev_to_node(dev
);
5116 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5118 if (tx_ring
->q_vector
)
5119 numa_node
= tx_ring
->q_vector
->numa_node
;
5121 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
5122 if (!tx_ring
->tx_buffer_info
)
5123 tx_ring
->tx_buffer_info
= vzalloc(size
);
5124 if (!tx_ring
->tx_buffer_info
)
5127 u64_stats_init(&tx_ring
->syncp
);
5129 /* round up to nearest 4K */
5130 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5131 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5133 set_dev_node(dev
, numa_node
);
5134 tx_ring
->desc
= dma_alloc_coherent(dev
,
5138 set_dev_node(dev
, orig_node
);
5140 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5141 &tx_ring
->dma
, GFP_KERNEL
);
5145 tx_ring
->next_to_use
= 0;
5146 tx_ring
->next_to_clean
= 0;
5150 vfree(tx_ring
->tx_buffer_info
);
5151 tx_ring
->tx_buffer_info
= NULL
;
5152 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5157 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5158 * @adapter: board private structure
5160 * If this function returns with an error, then it's possible one or
5161 * more of the rings is populated (while the rest are not). It is the
5162 * callers duty to clean those orphaned rings.
5164 * Return 0 on success, negative on failure
5166 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5170 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5171 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5175 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5181 /* rewind the index freeing the rings as we go */
5183 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5188 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5189 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5191 * Returns 0 on success, negative on failure
5193 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5195 struct device
*dev
= rx_ring
->dev
;
5196 int orig_node
= dev_to_node(dev
);
5200 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5202 if (rx_ring
->q_vector
)
5203 numa_node
= rx_ring
->q_vector
->numa_node
;
5205 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
5206 if (!rx_ring
->rx_buffer_info
)
5207 rx_ring
->rx_buffer_info
= vzalloc(size
);
5208 if (!rx_ring
->rx_buffer_info
)
5211 u64_stats_init(&rx_ring
->syncp
);
5213 /* Round up to nearest 4K */
5214 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5215 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5217 set_dev_node(dev
, numa_node
);
5218 rx_ring
->desc
= dma_alloc_coherent(dev
,
5222 set_dev_node(dev
, orig_node
);
5224 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5225 &rx_ring
->dma
, GFP_KERNEL
);
5229 rx_ring
->next_to_clean
= 0;
5230 rx_ring
->next_to_use
= 0;
5234 vfree(rx_ring
->rx_buffer_info
);
5235 rx_ring
->rx_buffer_info
= NULL
;
5236 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5241 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5242 * @adapter: board private structure
5244 * If this function returns with an error, then it's possible one or
5245 * more of the rings is populated (while the rest are not). It is the
5246 * callers duty to clean those orphaned rings.
5248 * Return 0 on success, negative on failure
5250 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5254 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5255 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5259 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5264 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5269 /* rewind the index freeing the rings as we go */
5271 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5276 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5277 * @tx_ring: Tx descriptor ring for a specific queue
5279 * Free all transmit software resources
5281 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5283 ixgbe_clean_tx_ring(tx_ring
);
5285 vfree(tx_ring
->tx_buffer_info
);
5286 tx_ring
->tx_buffer_info
= NULL
;
5288 /* if not set, then don't free */
5292 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5293 tx_ring
->desc
, tx_ring
->dma
);
5295 tx_ring
->desc
= NULL
;
5299 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5300 * @adapter: board private structure
5302 * Free all transmit software resources
5304 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5308 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5309 if (adapter
->tx_ring
[i
]->desc
)
5310 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5314 * ixgbe_free_rx_resources - Free Rx Resources
5315 * @rx_ring: ring to clean the resources from
5317 * Free all receive software resources
5319 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
5321 ixgbe_clean_rx_ring(rx_ring
);
5323 vfree(rx_ring
->rx_buffer_info
);
5324 rx_ring
->rx_buffer_info
= NULL
;
5326 /* if not set, then don't free */
5330 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
5331 rx_ring
->desc
, rx_ring
->dma
);
5333 rx_ring
->desc
= NULL
;
5337 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5338 * @adapter: board private structure
5340 * Free all receive software resources
5342 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5347 ixgbe_free_fcoe_ddp_resources(adapter
);
5350 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5351 if (adapter
->rx_ring
[i
]->desc
)
5352 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5356 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5357 * @netdev: network interface device structure
5358 * @new_mtu: new value for maximum frame size
5360 * Returns 0 on success, negative on failure
5362 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5364 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5365 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5367 /* MTU < 68 is an error and causes problems on some kernels */
5368 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5372 * For 82599EB we cannot allow legacy VFs to enable their receive
5373 * paths when MTU greater than 1500 is configured. So display a
5374 * warning that legacy VFs will be disabled.
5376 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
5377 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
5378 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
5379 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
5381 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5383 /* must set new MTU before calling down or up */
5384 netdev
->mtu
= new_mtu
;
5386 if (netif_running(netdev
))
5387 ixgbe_reinit_locked(adapter
);
5393 * ixgbe_open - Called when a network interface is made active
5394 * @netdev: network interface device structure
5396 * Returns 0 on success, negative value on failure
5398 * The open entry point is called when a network interface is made
5399 * active by the system (IFF_UP). At this point all resources needed
5400 * for transmit and receive operations are allocated, the interrupt
5401 * handler is registered with the OS, the watchdog timer is started,
5402 * and the stack is notified that the interface is ready.
5404 static int ixgbe_open(struct net_device
*netdev
)
5406 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5409 /* disallow open during test */
5410 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
5413 netif_carrier_off(netdev
);
5415 /* allocate transmit descriptors */
5416 err
= ixgbe_setup_all_tx_resources(adapter
);
5420 /* allocate receive descriptors */
5421 err
= ixgbe_setup_all_rx_resources(adapter
);
5425 ixgbe_configure(adapter
);
5427 err
= ixgbe_request_irq(adapter
);
5431 /* Notify the stack of the actual queue counts. */
5432 if (adapter
->num_rx_pools
> 1)
5433 queues
= adapter
->num_rx_queues_per_pool
;
5435 queues
= adapter
->num_tx_queues
;
5437 err
= netif_set_real_num_tx_queues(netdev
, queues
);
5439 goto err_set_queues
;
5441 if (adapter
->num_rx_pools
> 1 &&
5442 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
5443 queues
= IXGBE_MAX_L2A_QUEUES
;
5445 queues
= adapter
->num_rx_queues
;
5446 err
= netif_set_real_num_rx_queues(netdev
, queues
);
5448 goto err_set_queues
;
5450 ixgbe_ptp_init(adapter
);
5452 ixgbe_up_complete(adapter
);
5457 ixgbe_free_irq(adapter
);
5459 ixgbe_free_all_rx_resources(adapter
);
5461 ixgbe_free_all_tx_resources(adapter
);
5463 ixgbe_reset(adapter
);
5469 * ixgbe_close - Disables a network interface
5470 * @netdev: network interface device structure
5472 * Returns 0, this is not allowed to fail
5474 * The close entry point is called when an interface is de-activated
5475 * by the OS. The hardware is still under the drivers control, but
5476 * needs to be disabled. A global MAC reset is issued to stop the
5477 * hardware, and all transmit and receive resources are freed.
5479 static int ixgbe_close(struct net_device
*netdev
)
5481 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5483 ixgbe_ptp_stop(adapter
);
5485 ixgbe_down(adapter
);
5486 ixgbe_free_irq(adapter
);
5488 ixgbe_fdir_filter_exit(adapter
);
5490 ixgbe_free_all_tx_resources(adapter
);
5491 ixgbe_free_all_rx_resources(adapter
);
5493 ixgbe_release_hw_control(adapter
);
5499 static int ixgbe_resume(struct pci_dev
*pdev
)
5501 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5502 struct net_device
*netdev
= adapter
->netdev
;
5505 pci_set_power_state(pdev
, PCI_D0
);
5506 pci_restore_state(pdev
);
5508 * pci_restore_state clears dev->state_saved so call
5509 * pci_save_state to restore it.
5511 pci_save_state(pdev
);
5513 err
= pci_enable_device_mem(pdev
);
5515 e_dev_err("Cannot enable PCI device from suspend\n");
5518 pci_set_master(pdev
);
5520 pci_wake_from_d3(pdev
, false);
5522 ixgbe_reset(adapter
);
5524 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5527 err
= ixgbe_init_interrupt_scheme(adapter
);
5528 if (!err
&& netif_running(netdev
))
5529 err
= ixgbe_open(netdev
);
5536 netif_device_attach(netdev
);
5540 #endif /* CONFIG_PM */
5542 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5544 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5545 struct net_device
*netdev
= adapter
->netdev
;
5546 struct ixgbe_hw
*hw
= &adapter
->hw
;
5548 u32 wufc
= adapter
->wol
;
5553 netif_device_detach(netdev
);
5556 if (netif_running(netdev
)) {
5557 ixgbe_down(adapter
);
5558 ixgbe_free_irq(adapter
);
5559 ixgbe_free_all_tx_resources(adapter
);
5560 ixgbe_free_all_rx_resources(adapter
);
5564 ixgbe_clear_interrupt_scheme(adapter
);
5567 retval
= pci_save_state(pdev
);
5572 if (hw
->mac
.ops
.stop_link_on_d3
)
5573 hw
->mac
.ops
.stop_link_on_d3(hw
);
5576 ixgbe_set_rx_mode(netdev
);
5578 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5579 if (hw
->mac
.ops
.enable_tx_laser
)
5580 hw
->mac
.ops
.enable_tx_laser(hw
);
5582 /* turn on all-multi mode if wake on multicast is enabled */
5583 if (wufc
& IXGBE_WUFC_MC
) {
5584 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5585 fctrl
|= IXGBE_FCTRL_MPE
;
5586 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5589 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5590 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5591 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5593 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5595 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5596 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5599 switch (hw
->mac
.type
) {
5600 case ixgbe_mac_82598EB
:
5601 pci_wake_from_d3(pdev
, false);
5603 case ixgbe_mac_82599EB
:
5604 case ixgbe_mac_X540
:
5605 pci_wake_from_d3(pdev
, !!wufc
);
5611 *enable_wake
= !!wufc
;
5613 ixgbe_release_hw_control(adapter
);
5615 pci_disable_device(pdev
);
5621 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5626 retval
= __ixgbe_shutdown(pdev
, &wake
);
5631 pci_prepare_to_sleep(pdev
);
5633 pci_wake_from_d3(pdev
, false);
5634 pci_set_power_state(pdev
, PCI_D3hot
);
5639 #endif /* CONFIG_PM */
5641 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5645 __ixgbe_shutdown(pdev
, &wake
);
5647 if (system_state
== SYSTEM_POWER_OFF
) {
5648 pci_wake_from_d3(pdev
, wake
);
5649 pci_set_power_state(pdev
, PCI_D3hot
);
5654 * ixgbe_update_stats - Update the board statistics counters.
5655 * @adapter: board private structure
5657 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5659 struct net_device
*netdev
= adapter
->netdev
;
5660 struct ixgbe_hw
*hw
= &adapter
->hw
;
5661 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5663 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5664 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5665 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5666 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5668 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5669 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5672 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5675 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5676 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5677 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5679 adapter
->rsc_total_count
= rsc_count
;
5680 adapter
->rsc_total_flush
= rsc_flush
;
5683 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5684 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5685 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5686 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5687 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5688 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5689 bytes
+= rx_ring
->stats
.bytes
;
5690 packets
+= rx_ring
->stats
.packets
;
5692 adapter
->non_eop_descs
= non_eop_descs
;
5693 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5694 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5695 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5696 netdev
->stats
.rx_bytes
= bytes
;
5697 netdev
->stats
.rx_packets
= packets
;
5701 /* gather some stats to the adapter struct that are per queue */
5702 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5703 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5704 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5705 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5706 bytes
+= tx_ring
->stats
.bytes
;
5707 packets
+= tx_ring
->stats
.packets
;
5709 adapter
->restart_queue
= restart_queue
;
5710 adapter
->tx_busy
= tx_busy
;
5711 netdev
->stats
.tx_bytes
= bytes
;
5712 netdev
->stats
.tx_packets
= packets
;
5714 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5716 /* 8 register reads */
5717 for (i
= 0; i
< 8; i
++) {
5718 /* for packet buffers not used, the register should read 0 */
5719 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5721 hwstats
->mpc
[i
] += mpc
;
5722 total_mpc
+= hwstats
->mpc
[i
];
5723 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5724 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5725 switch (hw
->mac
.type
) {
5726 case ixgbe_mac_82598EB
:
5727 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5728 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5729 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5730 hwstats
->pxonrxc
[i
] +=
5731 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5733 case ixgbe_mac_82599EB
:
5734 case ixgbe_mac_X540
:
5735 hwstats
->pxonrxc
[i
] +=
5736 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5743 /*16 register reads */
5744 for (i
= 0; i
< 16; i
++) {
5745 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5746 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5747 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5748 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5749 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5750 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5751 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5752 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5756 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5757 /* work around hardware counting issue */
5758 hwstats
->gprc
-= missed_rx
;
5760 ixgbe_update_xoff_received(adapter
);
5762 /* 82598 hardware only has a 32 bit counter in the high register */
5763 switch (hw
->mac
.type
) {
5764 case ixgbe_mac_82598EB
:
5765 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5766 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5767 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5768 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5770 case ixgbe_mac_X540
:
5771 /* OS2BMC stats are X540 only*/
5772 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5773 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5774 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5775 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5776 case ixgbe_mac_82599EB
:
5777 for (i
= 0; i
< 16; i
++)
5778 adapter
->hw_rx_no_dma_resources
+=
5779 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5780 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5781 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5782 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5783 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5784 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5785 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5786 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5787 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5788 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5790 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5791 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5792 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5793 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5794 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5795 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5796 /* Add up per cpu counters for total ddp aloc fail */
5797 if (adapter
->fcoe
.ddp_pool
) {
5798 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5799 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
5801 u64 noddp
= 0, noddp_ext_buff
= 0;
5802 for_each_possible_cpu(cpu
) {
5803 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
5804 noddp
+= ddp_pool
->noddp
;
5805 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
5807 hwstats
->fcoe_noddp
= noddp
;
5808 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
5810 #endif /* IXGBE_FCOE */
5815 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5816 hwstats
->bprc
+= bprc
;
5817 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5818 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5819 hwstats
->mprc
-= bprc
;
5820 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5821 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5822 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5823 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5824 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5825 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5826 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5827 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5828 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5829 hwstats
->lxontxc
+= lxon
;
5830 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5831 hwstats
->lxofftxc
+= lxoff
;
5832 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5833 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5835 * 82598 errata - tx of flow control packets is included in tx counters
5837 xon_off_tot
= lxon
+ lxoff
;
5838 hwstats
->gptc
-= xon_off_tot
;
5839 hwstats
->mptc
-= xon_off_tot
;
5840 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5841 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5842 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5843 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5844 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5845 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5846 hwstats
->ptc64
-= xon_off_tot
;
5847 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5848 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5849 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5850 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5851 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5852 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5854 /* Fill out the OS statistics structure */
5855 netdev
->stats
.multicast
= hwstats
->mprc
;
5858 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5859 netdev
->stats
.rx_dropped
= 0;
5860 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5861 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5862 netdev
->stats
.rx_missed_errors
= total_mpc
;
5866 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5867 * @adapter: pointer to the device adapter structure
5869 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5871 struct ixgbe_hw
*hw
= &adapter
->hw
;
5874 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5877 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5879 /* if interface is down do nothing */
5880 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5883 /* do nothing if we are not using signature filters */
5884 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5887 adapter
->fdir_overflow
++;
5889 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5890 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5891 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5892 &(adapter
->tx_ring
[i
]->state
));
5893 /* re-enable flow director interrupts */
5894 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5896 e_err(probe
, "failed to finish FDIR re-initialization, "
5897 "ignored adding FDIR ATR filters\n");
5902 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5903 * @adapter: pointer to the device adapter structure
5905 * This function serves two purposes. First it strobes the interrupt lines
5906 * in order to make certain interrupts are occurring. Secondly it sets the
5907 * bits needed to check for TX hangs. As a result we should immediately
5908 * determine if a hang has occurred.
5910 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5912 struct ixgbe_hw
*hw
= &adapter
->hw
;
5916 /* If we're down, removing or resetting, just bail */
5917 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5918 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
5919 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5922 /* Force detection of hung controller */
5923 if (netif_carrier_ok(adapter
->netdev
)) {
5924 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5925 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5928 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5930 * for legacy and MSI interrupts don't set any bits
5931 * that are enabled for EIAM, because this operation
5932 * would set *both* EIMS and EICS for any bit in EIAM
5934 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5935 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5937 /* get one bit for every active tx/rx interrupt vector */
5938 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5939 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5940 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5941 eics
|= ((u64
)1 << i
);
5945 /* Cause software interrupt to ensure rings are cleaned */
5946 ixgbe_irq_rearm_queues(adapter
, eics
);
5951 * ixgbe_watchdog_update_link - update the link status
5952 * @adapter: pointer to the device adapter structure
5953 * @link_speed: pointer to a u32 to store the link_speed
5955 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
5957 struct ixgbe_hw
*hw
= &adapter
->hw
;
5958 u32 link_speed
= adapter
->link_speed
;
5959 bool link_up
= adapter
->link_up
;
5960 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
5962 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5965 if (hw
->mac
.ops
.check_link
) {
5966 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5968 /* always assume link is up, if no check link function */
5969 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
5973 if (adapter
->ixgbe_ieee_pfc
)
5974 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
5976 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
5977 hw
->mac
.ops
.fc_enable(hw
);
5978 ixgbe_set_rx_drop_en(adapter
);
5982 time_after(jiffies
, (adapter
->link_check_timeout
+
5983 IXGBE_TRY_LINK_TIMEOUT
))) {
5984 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5985 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5986 IXGBE_WRITE_FLUSH(hw
);
5989 adapter
->link_up
= link_up
;
5990 adapter
->link_speed
= link_speed
;
5993 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
5995 #ifdef CONFIG_IXGBE_DCB
5996 struct net_device
*netdev
= adapter
->netdev
;
5997 struct dcb_app app
= {
5998 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6003 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6004 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6006 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6011 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6012 * print link up message
6013 * @adapter: pointer to the device adapter structure
6015 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6017 struct net_device
*netdev
= adapter
->netdev
;
6018 struct ixgbe_hw
*hw
= &adapter
->hw
;
6019 u32 link_speed
= adapter
->link_speed
;
6020 bool flow_rx
, flow_tx
;
6022 /* only continue if link was previously down */
6023 if (netif_carrier_ok(netdev
))
6026 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6028 switch (hw
->mac
.type
) {
6029 case ixgbe_mac_82598EB
: {
6030 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6031 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6032 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6033 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6036 case ixgbe_mac_X540
:
6037 case ixgbe_mac_82599EB
: {
6038 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6039 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6040 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6041 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6050 adapter
->last_rx_ptp_check
= jiffies
;
6052 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6053 ixgbe_ptp_start_cyclecounter(adapter
);
6055 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
6056 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
6058 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
6060 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
6063 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6065 (flow_tx
? "TX" : "None"))));
6067 netif_carrier_on(netdev
);
6068 ixgbe_check_vf_rate_limit(adapter
);
6070 /* update the default user priority for VFs */
6071 ixgbe_update_default_up(adapter
);
6073 /* ping all the active vfs to let them know link has changed */
6074 ixgbe_ping_all_vfs(adapter
);
6078 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6079 * print link down message
6080 * @adapter: pointer to the adapter structure
6082 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6084 struct net_device
*netdev
= adapter
->netdev
;
6085 struct ixgbe_hw
*hw
= &adapter
->hw
;
6087 adapter
->link_up
= false;
6088 adapter
->link_speed
= 0;
6090 /* only continue if link was up previously */
6091 if (!netif_carrier_ok(netdev
))
6094 /* poll for SFP+ cable when link is down */
6095 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6096 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6098 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6099 ixgbe_ptp_start_cyclecounter(adapter
);
6101 e_info(drv
, "NIC Link is Down\n");
6102 netif_carrier_off(netdev
);
6104 /* ping all the active vfs to let them know link has changed */
6105 ixgbe_ping_all_vfs(adapter
);
6109 * ixgbe_watchdog_flush_tx - flush queues on link down
6110 * @adapter: pointer to the device adapter structure
6112 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6115 int some_tx_pending
= 0;
6117 if (!netif_carrier_ok(adapter
->netdev
)) {
6118 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6119 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6120 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
6121 some_tx_pending
= 1;
6126 if (some_tx_pending
) {
6127 /* We've lost link, so the controller stops DMA,
6128 * but we've got queued Tx work that's never going
6129 * to get done, so reset controller to flush Tx.
6130 * (Do the reset outside of interrupt context).
6132 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6133 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6138 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
6142 /* Do not perform spoof check for 82598 or if not in IOV mode */
6143 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
6144 adapter
->num_vfs
== 0)
6147 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
6150 * ssvpc register is cleared on read, if zero then no
6151 * spoofed packets in the last interval.
6156 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
6160 * ixgbe_watchdog_subtask - check and bring link up
6161 * @adapter: pointer to the device adapter structure
6163 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
6165 /* if interface is down, removing or resetting, do nothing */
6166 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6167 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6168 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6171 ixgbe_watchdog_update_link(adapter
);
6173 if (adapter
->link_up
)
6174 ixgbe_watchdog_link_is_up(adapter
);
6176 ixgbe_watchdog_link_is_down(adapter
);
6178 ixgbe_spoof_check(adapter
);
6179 ixgbe_update_stats(adapter
);
6181 ixgbe_watchdog_flush_tx(adapter
);
6185 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6186 * @adapter: the ixgbe adapter structure
6188 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
6190 struct ixgbe_hw
*hw
= &adapter
->hw
;
6193 /* not searching for SFP so there is nothing to do here */
6194 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
6195 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6198 /* someone else is in init, wait until next service event */
6199 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6202 err
= hw
->phy
.ops
.identify_sfp(hw
);
6203 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6206 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
6207 /* If no cable is present, then we need to reset
6208 * the next time we find a good cable. */
6209 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
6216 /* exit if reset not needed */
6217 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6220 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
6223 * A module may be identified correctly, but the EEPROM may not have
6224 * support for that module. setup_sfp() will fail in that case, so
6225 * we should not allow that module to load.
6227 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6228 err
= hw
->phy
.ops
.reset(hw
);
6230 err
= hw
->mac
.ops
.setup_sfp(hw
);
6232 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6235 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
6236 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
6239 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6241 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
6242 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
6243 e_dev_err("failed to initialize because an unsupported "
6244 "SFP+ module type was detected.\n");
6245 e_dev_err("Reload the driver after installing a "
6246 "supported module.\n");
6247 unregister_netdev(adapter
->netdev
);
6252 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6253 * @adapter: the ixgbe adapter structure
6255 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
6257 struct ixgbe_hw
*hw
= &adapter
->hw
;
6259 bool autoneg
= false;
6261 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
6264 /* someone else is in init, wait until next service event */
6265 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6268 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
6270 speed
= hw
->phy
.autoneg_advertised
;
6271 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
6272 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
6274 /* setup the highest link when no autoneg */
6276 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
6277 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6281 if (hw
->mac
.ops
.setup_link
)
6282 hw
->mac
.ops
.setup_link(hw
, speed
, true);
6284 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
6285 adapter
->link_check_timeout
= jiffies
;
6286 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6289 #ifdef CONFIG_PCI_IOV
6290 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6293 struct ixgbe_hw
*hw
= &adapter
->hw
;
6294 struct net_device
*netdev
= adapter
->netdev
;
6298 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6299 if (gpc
) /* If incrementing then no need for the check below */
6302 * Check to see if a bad DMA write target from an errant or
6303 * malicious VF has caused a PCIe error. If so then we can
6304 * issue a VFLR to the offending VF(s) and then resume without
6305 * requesting a full slot reset.
6308 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
6309 ciaa
= (vf
<< 16) | 0x80000000;
6310 /* 32 bit read so align, we really want status at offset 6 */
6311 ciaa
|= PCI_COMMAND
;
6312 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6313 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
6315 /* disable debug mode asap after reading data */
6316 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6317 /* Get the upper 16 bits which will be the PCI status reg */
6319 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
6320 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
6322 ciaa
= (vf
<< 16) | 0x80000000;
6324 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6325 ciad
= 0x00008000; /* VFLR */
6326 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
6328 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6335 * ixgbe_service_timer - Timer Call-back
6336 * @data: pointer to adapter cast into an unsigned long
6338 static void ixgbe_service_timer(unsigned long data
)
6340 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
6341 unsigned long next_event_offset
;
6344 /* poll faster when waiting for link */
6345 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
6346 next_event_offset
= HZ
/ 10;
6348 next_event_offset
= HZ
* 2;
6350 #ifdef CONFIG_PCI_IOV
6352 * don't bother with SR-IOV VF DMA hang check if there are
6353 * no VFs or the link is down
6355 if (!adapter
->num_vfs
||
6356 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6357 goto normal_timer_service
;
6359 /* If we have VFs allocated then we must check for DMA hangs */
6360 ixgbe_check_for_bad_vf(adapter
);
6361 next_event_offset
= HZ
/ 50;
6362 adapter
->timer_event_accumulator
++;
6364 if (adapter
->timer_event_accumulator
>= 100)
6365 adapter
->timer_event_accumulator
= 0;
6369 normal_timer_service
:
6371 /* Reset the timer */
6372 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
6375 ixgbe_service_event_schedule(adapter
);
6378 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
6380 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
6383 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
6385 /* If we're already down, removing or resetting, just bail */
6386 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6387 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6388 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6391 ixgbe_dump(adapter
);
6392 netdev_err(adapter
->netdev
, "Reset adapter\n");
6393 adapter
->tx_timeout_count
++;
6396 ixgbe_reinit_locked(adapter
);
6401 * ixgbe_service_task - manages and runs subtasks
6402 * @work: pointer to work_struct containing our data
6404 static void ixgbe_service_task(struct work_struct
*work
)
6406 struct ixgbe_adapter
*adapter
= container_of(work
,
6407 struct ixgbe_adapter
,
6409 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
6410 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
6412 ixgbe_down(adapter
);
6415 ixgbe_service_event_complete(adapter
);
6418 ixgbe_reset_subtask(adapter
);
6419 ixgbe_sfp_detection_subtask(adapter
);
6420 ixgbe_sfp_link_config_subtask(adapter
);
6421 ixgbe_check_overtemp_subtask(adapter
);
6422 ixgbe_watchdog_subtask(adapter
);
6423 ixgbe_fdir_reinit_subtask(adapter
);
6424 ixgbe_check_hang_subtask(adapter
);
6426 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
6427 ixgbe_ptp_overflow_check(adapter
);
6428 ixgbe_ptp_rx_hang(adapter
);
6431 ixgbe_service_event_complete(adapter
);
6434 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
6435 struct ixgbe_tx_buffer
*first
,
6438 struct sk_buff
*skb
= first
->skb
;
6439 u32 vlan_macip_lens
, type_tucmd
;
6440 u32 mss_l4len_idx
, l4len
;
6442 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
6445 if (!skb_is_gso(skb
))
6448 if (skb_header_cloned(skb
)) {
6449 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
6454 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6455 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6457 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6458 struct iphdr
*iph
= ip_hdr(skb
);
6461 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
6465 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6466 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6467 IXGBE_TX_FLAGS_CSUM
|
6468 IXGBE_TX_FLAGS_IPV4
;
6469 } else if (skb_is_gso_v6(skb
)) {
6470 ipv6_hdr(skb
)->payload_len
= 0;
6471 tcp_hdr(skb
)->check
=
6472 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
6473 &ipv6_hdr(skb
)->daddr
,
6475 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6476 IXGBE_TX_FLAGS_CSUM
;
6479 /* compute header lengths */
6480 l4len
= tcp_hdrlen(skb
);
6481 *hdr_len
= skb_transport_offset(skb
) + l4len
;
6483 /* update gso size and bytecount with header size */
6484 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
6485 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
6487 /* mss_l4len_id: use 0 as index for TSO */
6488 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
6489 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
6491 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6492 vlan_macip_lens
= skb_network_header_len(skb
);
6493 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6494 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6496 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
6502 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
6503 struct ixgbe_tx_buffer
*first
)
6505 struct sk_buff
*skb
= first
->skb
;
6506 u32 vlan_macip_lens
= 0;
6507 u32 mss_l4len_idx
= 0;
6510 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
6511 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
6512 !(first
->tx_flags
& IXGBE_TX_FLAGS_CC
))
6516 switch (first
->protocol
) {
6517 case __constant_htons(ETH_P_IP
):
6518 vlan_macip_lens
|= skb_network_header_len(skb
);
6519 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6520 l4_hdr
= ip_hdr(skb
)->protocol
;
6522 case __constant_htons(ETH_P_IPV6
):
6523 vlan_macip_lens
|= skb_network_header_len(skb
);
6524 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
6527 if (unlikely(net_ratelimit())) {
6528 dev_warn(tx_ring
->dev
,
6529 "partial checksum but proto=%x!\n",
6537 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6538 mss_l4len_idx
= tcp_hdrlen(skb
) <<
6539 IXGBE_ADVTXD_L4LEN_SHIFT
;
6542 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
6543 mss_l4len_idx
= sizeof(struct sctphdr
) <<
6544 IXGBE_ADVTXD_L4LEN_SHIFT
;
6547 mss_l4len_idx
= sizeof(struct udphdr
) <<
6548 IXGBE_ADVTXD_L4LEN_SHIFT
;
6551 if (unlikely(net_ratelimit())) {
6552 dev_warn(tx_ring
->dev
,
6553 "partial checksum but l4 proto=%x!\n",
6559 /* update TX checksum flag */
6560 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6563 /* vlan_macip_lens: MACLEN, VLAN tag */
6564 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6565 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6567 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
6568 type_tucmd
, mss_l4len_idx
);
6571 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6572 ((_flag <= _result) ? \
6573 ((u32)(_input & _flag) * (_result / _flag)) : \
6574 ((u32)(_input & _flag) / (_flag / _result)))
6576 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
6578 /* set type for advanced descriptor with frame checksum insertion */
6579 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
6580 IXGBE_ADVTXD_DCMD_DEXT
|
6581 IXGBE_ADVTXD_DCMD_IFCS
;
6583 /* set HW vlan bit if vlan is present */
6584 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
6585 IXGBE_ADVTXD_DCMD_VLE
);
6587 /* set segmentation enable bits for TSO/FSO */
6588 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
6589 IXGBE_ADVTXD_DCMD_TSE
);
6591 /* set timestamp bit if present */
6592 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
6593 IXGBE_ADVTXD_MAC_TSTAMP
);
6595 /* insert frame checksum */
6596 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
6601 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
6602 u32 tx_flags
, unsigned int paylen
)
6604 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
6606 /* enable L4 checksum for TSO and TX checksum offload */
6607 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6608 IXGBE_TX_FLAGS_CSUM
,
6609 IXGBE_ADVTXD_POPTS_TXSM
);
6611 /* enble IPv4 checksum for TSO */
6612 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6613 IXGBE_TX_FLAGS_IPV4
,
6614 IXGBE_ADVTXD_POPTS_IXSM
);
6617 * Check Context must be set if Tx switch is enabled, which it
6618 * always is for case where virtual functions are running
6620 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6624 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
6627 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6630 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
6631 struct ixgbe_tx_buffer
*first
,
6634 struct sk_buff
*skb
= first
->skb
;
6635 struct ixgbe_tx_buffer
*tx_buffer
;
6636 union ixgbe_adv_tx_desc
*tx_desc
;
6637 struct skb_frag_struct
*frag
;
6639 unsigned int data_len
, size
;
6640 u32 tx_flags
= first
->tx_flags
;
6641 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
6642 u16 i
= tx_ring
->next_to_use
;
6644 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
6646 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
6648 size
= skb_headlen(skb
);
6649 data_len
= skb
->data_len
;
6652 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6653 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
6654 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
6657 data_len
-= sizeof(struct fcoe_crc_eof
);
6662 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
6666 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
6667 if (dma_mapping_error(tx_ring
->dev
, dma
))
6670 /* record length, and DMA address */
6671 dma_unmap_len_set(tx_buffer
, len
, size
);
6672 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6674 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6676 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
6677 tx_desc
->read
.cmd_type_len
=
6678 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
6682 if (i
== tx_ring
->count
) {
6683 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6686 tx_desc
->read
.olinfo_status
= 0;
6688 dma
+= IXGBE_MAX_DATA_PER_TXD
;
6689 size
-= IXGBE_MAX_DATA_PER_TXD
;
6691 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6694 if (likely(!data_len
))
6697 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
6701 if (i
== tx_ring
->count
) {
6702 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6705 tx_desc
->read
.olinfo_status
= 0;
6708 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6710 size
= skb_frag_size(frag
);
6714 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6717 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6720 /* write last descriptor with RS and EOP bits */
6721 cmd_type
|= size
| IXGBE_TXD_CMD
;
6722 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
6724 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
6726 /* set the timestamp */
6727 first
->time_stamp
= jiffies
;
6730 * Force memory writes to complete before letting h/w know there
6731 * are new descriptors to fetch. (Only applicable for weak-ordered
6732 * memory model archs, such as IA-64).
6734 * We also need this memory barrier to make certain all of the
6735 * status bits have been updated before next_to_watch is written.
6739 /* set next_to_watch value indicating a packet is present */
6740 first
->next_to_watch
= tx_desc
;
6743 if (i
== tx_ring
->count
)
6746 tx_ring
->next_to_use
= i
;
6748 /* notify HW of packet */
6749 ixgbe_write_tail(tx_ring
, i
);
6753 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6755 /* clear dma mappings for failed tx_buffer_info map */
6757 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6758 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6759 if (tx_buffer
== first
)
6766 tx_ring
->next_to_use
= i
;
6769 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6770 struct ixgbe_tx_buffer
*first
)
6772 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6773 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6774 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6776 unsigned char *network
;
6778 struct ipv6hdr
*ipv6
;
6783 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6787 /* do nothing if sampling is disabled */
6788 if (!ring
->atr_sample_rate
)
6793 /* snag network header to get L4 type and address */
6794 hdr
.network
= skb_network_header(first
->skb
);
6796 /* Currently only IPv4/IPv6 with TCP is supported */
6797 if ((first
->protocol
!= __constant_htons(ETH_P_IPV6
) ||
6798 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6799 (first
->protocol
!= __constant_htons(ETH_P_IP
) ||
6800 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6803 th
= tcp_hdr(first
->skb
);
6805 /* skip this packet since it is invalid or the socket is closing */
6809 /* sample on all syn packets or once every atr sample count */
6810 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6813 /* reset sample count */
6814 ring
->atr_count
= 0;
6816 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6819 * src and dst are inverted, think how the receiver sees them
6821 * The input is broken into two sections, a non-compressed section
6822 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6823 * is XORed together and stored in the compressed dword.
6825 input
.formatted
.vlan_id
= vlan_id
;
6828 * since src port and flex bytes occupy the same word XOR them together
6829 * and write the value to source port portion of compressed dword
6831 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6832 common
.port
.src
^= th
->dest
^ __constant_htons(ETH_P_8021Q
);
6834 common
.port
.src
^= th
->dest
^ first
->protocol
;
6835 common
.port
.dst
^= th
->source
;
6837 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6838 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6839 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6841 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6842 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6843 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6844 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6845 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6846 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6847 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6848 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6849 hdr
.ipv6
->daddr
.s6_addr32
[3];
6852 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6853 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6854 input
, common
, ring
->queue_index
);
6857 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6859 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6860 /* Herbert's original patch had:
6861 * smp_mb__after_netif_stop_queue();
6862 * but since that doesn't exist yet, just open code it. */
6865 /* We need to check again in a case another CPU has just
6866 * made room available. */
6867 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6870 /* A reprieve! - use start_queue because it doesn't call schedule */
6871 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6872 ++tx_ring
->tx_stats
.restart_queue
;
6876 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6878 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6880 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6883 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
6884 void *accel_priv
, select_queue_fallback_t fallback
)
6886 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
6888 struct ixgbe_adapter
*adapter
;
6889 struct ixgbe_ring_feature
*f
;
6894 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
6899 * only execute the code below if protocol is FCoE
6900 * or FIP and we have FCoE enabled on the adapter
6902 switch (vlan_get_protocol(skb
)) {
6903 case __constant_htons(ETH_P_FCOE
):
6904 case __constant_htons(ETH_P_FIP
):
6905 adapter
= netdev_priv(dev
);
6907 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
6910 return fallback(dev
, skb
);
6913 f
= &adapter
->ring_feature
[RING_F_FCOE
];
6915 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6918 while (txq
>= f
->indices
)
6921 return txq
+ f
->offset
;
6923 return fallback(dev
, skb
);
6927 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6928 struct ixgbe_adapter
*adapter
,
6929 struct ixgbe_ring
*tx_ring
)
6931 struct ixgbe_tx_buffer
*first
;
6935 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
6936 __be16 protocol
= skb
->protocol
;
6940 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6941 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6942 * + 2 desc gap to keep tail from touching head,
6943 * + 1 desc for context descriptor,
6944 * otherwise try next time
6946 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6947 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6949 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
6950 tx_ring
->tx_stats
.tx_busy
++;
6951 return NETDEV_TX_BUSY
;
6954 /* record the location of the first descriptor for this packet */
6955 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
6957 first
->bytecount
= skb
->len
;
6958 first
->gso_segs
= 1;
6960 /* if we have a HW VLAN tag being added default to the HW one */
6961 if (vlan_tx_tag_present(skb
)) {
6962 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
6963 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6964 /* else if it is a SW VLAN check the next protocol and store the tag */
6965 } else if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6966 struct vlan_hdr
*vhdr
, _vhdr
;
6967 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
6971 protocol
= vhdr
->h_vlan_encapsulated_proto
;
6972 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
6973 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6974 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
6977 skb_tx_timestamp(skb
);
6979 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
6980 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
6981 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
6983 /* schedule check for Tx timestamp */
6984 adapter
->ptp_tx_skb
= skb_get(skb
);
6985 adapter
->ptp_tx_start
= jiffies
;
6986 schedule_work(&adapter
->ptp_tx_work
);
6989 #ifdef CONFIG_PCI_IOV
6991 * Use the l2switch_enable flag - would be false if the DMA
6992 * Tx switch had been disabled.
6994 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6995 tx_flags
|= IXGBE_TX_FLAGS_CC
;
6998 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6999 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7000 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7001 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7002 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7003 tx_flags
|= (skb
->priority
& 0x7) <<
7004 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7005 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7006 struct vlan_ethhdr
*vhdr
;
7007 if (skb_header_cloned(skb
) &&
7008 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
7010 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7011 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7012 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7014 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7018 /* record initial flags and protocol */
7019 first
->tx_flags
= tx_flags
;
7020 first
->protocol
= protocol
;
7023 /* setup tx offload for FCoE */
7024 if ((protocol
== __constant_htons(ETH_P_FCOE
)) &&
7025 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7026 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7033 #endif /* IXGBE_FCOE */
7034 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7038 ixgbe_tx_csum(tx_ring
, first
);
7040 /* add the ATR filter if ATR is on */
7041 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7042 ixgbe_atr(tx_ring
, first
);
7046 #endif /* IXGBE_FCOE */
7047 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7049 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7051 return NETDEV_TX_OK
;
7054 dev_kfree_skb_any(first
->skb
);
7057 return NETDEV_TX_OK
;
7060 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7061 struct net_device
*netdev
,
7062 struct ixgbe_ring
*ring
)
7064 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7065 struct ixgbe_ring
*tx_ring
;
7068 * The minimum packet size for olinfo paylen is 17 so pad the skb
7069 * in order to meet this minimum size requirement.
7071 if (unlikely(skb
->len
< 17)) {
7072 if (skb_pad(skb
, 17 - skb
->len
))
7073 return NETDEV_TX_OK
;
7075 skb_set_tail_pointer(skb
, 17);
7078 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7080 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7083 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7084 struct net_device
*netdev
)
7086 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7090 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7091 * @netdev: network interface device structure
7092 * @p: pointer to an address structure
7094 * Returns 0 on success, negative on failure
7096 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
7098 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7099 struct ixgbe_hw
*hw
= &adapter
->hw
;
7100 struct sockaddr
*addr
= p
;
7102 if (!is_valid_ether_addr(addr
->sa_data
))
7103 return -EADDRNOTAVAIL
;
7105 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
7106 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
7108 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
7114 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
7116 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7117 struct ixgbe_hw
*hw
= &adapter
->hw
;
7121 if (prtad
!= hw
->phy
.mdio
.prtad
)
7123 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
7129 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
7130 u16 addr
, u16 value
)
7132 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7133 struct ixgbe_hw
*hw
= &adapter
->hw
;
7135 if (prtad
!= hw
->phy
.mdio
.prtad
)
7137 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
7140 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
7142 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7146 return ixgbe_ptp_hwtstamp_ioctl(adapter
, req
, cmd
);
7148 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
7153 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7155 * @netdev: network interface device structure
7157 * Returns non-zero on failure
7159 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
7162 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7163 struct ixgbe_hw
*hw
= &adapter
->hw
;
7165 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
7167 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
7170 /* update SAN MAC vmdq pool selection */
7171 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
7177 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7179 * @netdev: network interface device structure
7181 * Returns non-zero on failure
7183 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
7186 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7187 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
7189 if (is_valid_ether_addr(mac
->san_addr
)) {
7191 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
7197 #ifdef CONFIG_NET_POLL_CONTROLLER
7199 * Polling 'interrupt' - used by things like netconsole to send skbs
7200 * without having to re-enable interrupts. It's not called while
7201 * the interrupt routine is executing.
7203 static void ixgbe_netpoll(struct net_device
*netdev
)
7205 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7208 /* if interface is down do nothing */
7209 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
7212 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
7213 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
7214 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
7215 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
7217 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
7219 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
7223 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
7224 struct rtnl_link_stats64
*stats
)
7226 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7230 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
7231 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
7237 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
7238 packets
= ring
->stats
.packets
;
7239 bytes
= ring
->stats
.bytes
;
7240 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
7241 stats
->rx_packets
+= packets
;
7242 stats
->rx_bytes
+= bytes
;
7246 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
7247 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
7253 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
7254 packets
= ring
->stats
.packets
;
7255 bytes
= ring
->stats
.bytes
;
7256 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
7257 stats
->tx_packets
+= packets
;
7258 stats
->tx_bytes
+= bytes
;
7262 /* following stats updated by ixgbe_watchdog_task() */
7263 stats
->multicast
= netdev
->stats
.multicast
;
7264 stats
->rx_errors
= netdev
->stats
.rx_errors
;
7265 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
7266 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
7267 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
7271 #ifdef CONFIG_IXGBE_DCB
7273 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7274 * @adapter: pointer to ixgbe_adapter
7275 * @tc: number of traffic classes currently enabled
7277 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7278 * 802.1Q priority maps to a packet buffer that exists.
7280 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
7282 struct ixgbe_hw
*hw
= &adapter
->hw
;
7286 /* 82598 have a static priority to TC mapping that can not
7287 * be changed so no validation is needed.
7289 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7292 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
7295 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
7296 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
7298 /* If up2tc is out of bounds default to zero */
7300 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
7304 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
7310 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7311 * @adapter: Pointer to adapter struct
7313 * Populate the netdev user priority to tc map
7315 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
7317 struct net_device
*dev
= adapter
->netdev
;
7318 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
7319 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
7322 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
7325 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
7326 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
7328 tc
= ets
->prio_tc
[prio
];
7330 netdev_set_prio_tc_map(dev
, prio
, tc
);
7334 #endif /* CONFIG_IXGBE_DCB */
7336 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7338 * @netdev: net device to configure
7339 * @tc: number of traffic classes to enable
7341 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
7343 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7344 struct ixgbe_hw
*hw
= &adapter
->hw
;
7347 /* Hardware supports up to 8 traffic classes */
7348 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
7349 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
7350 tc
< MAX_TRAFFIC_CLASS
))
7353 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
7354 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
7357 /* Hardware has to reinitialize queues and interrupts to
7358 * match packet buffer alignment. Unfortunately, the
7359 * hardware is not flexible enough to do this dynamically.
7361 if (netif_running(dev
))
7363 ixgbe_clear_interrupt_scheme(adapter
);
7365 #ifdef CONFIG_IXGBE_DCB
7367 netdev_set_num_tc(dev
, tc
);
7368 ixgbe_set_prio_tc_map(adapter
);
7370 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
7372 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
7373 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
7374 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
7377 netdev_reset_tc(dev
);
7379 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
7380 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
7382 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
7384 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
7385 adapter
->dcb_cfg
.pfc_mode_enable
= false;
7388 ixgbe_validate_rtr(adapter
, tc
);
7390 #endif /* CONFIG_IXGBE_DCB */
7391 ixgbe_init_interrupt_scheme(adapter
);
7393 if (netif_running(dev
))
7394 return ixgbe_open(dev
);
7399 #ifdef CONFIG_PCI_IOV
7400 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
7402 struct net_device
*netdev
= adapter
->netdev
;
7405 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
7410 void ixgbe_do_reset(struct net_device
*netdev
)
7412 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7414 if (netif_running(netdev
))
7415 ixgbe_reinit_locked(adapter
);
7417 ixgbe_reset(adapter
);
7420 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
7421 netdev_features_t features
)
7423 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7425 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7426 if (!(features
& NETIF_F_RXCSUM
))
7427 features
&= ~NETIF_F_LRO
;
7429 /* Turn off LRO if not RSC capable */
7430 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
7431 features
&= ~NETIF_F_LRO
;
7436 static int ixgbe_set_features(struct net_device
*netdev
,
7437 netdev_features_t features
)
7439 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7440 netdev_features_t changed
= netdev
->features
^ features
;
7441 bool need_reset
= false;
7443 /* Make sure RSC matches LRO, reset if change */
7444 if (!(features
& NETIF_F_LRO
)) {
7445 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7447 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
7448 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
7449 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
7450 if (adapter
->rx_itr_setting
== 1 ||
7451 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
7452 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
7454 } else if ((changed
^ features
) & NETIF_F_LRO
) {
7455 e_info(probe
, "rx-usecs set too low, "
7461 * Check if Flow Director n-tuple support was enabled or disabled. If
7462 * the state changed, we need to reset.
7464 switch (features
& NETIF_F_NTUPLE
) {
7465 case NETIF_F_NTUPLE
:
7466 /* turn off ATR, enable perfect filters and reset */
7467 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
7470 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7471 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7474 /* turn off perfect filters, enable ATR and reset */
7475 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7478 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7480 /* We cannot enable ATR if SR-IOV is enabled */
7481 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7484 /* We cannot enable ATR if we have 2 or more traffic classes */
7485 if (netdev_get_num_tc(netdev
) > 1)
7488 /* We cannot enable ATR if RSS is disabled */
7489 if (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1)
7492 /* A sample rate of 0 indicates ATR disabled */
7493 if (!adapter
->atr_sample_rate
)
7496 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7500 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
7501 ixgbe_vlan_strip_enable(adapter
);
7503 ixgbe_vlan_strip_disable(adapter
);
7505 if (changed
& NETIF_F_RXALL
)
7508 netdev
->features
= features
;
7510 ixgbe_do_reset(netdev
);
7515 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
7516 struct net_device
*dev
,
7517 const unsigned char *addr
,
7520 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7523 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7524 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, flags
);
7526 /* Hardware does not support aging addresses so if a
7527 * ndm_state is given only allow permanent addresses
7529 if (ndm
->ndm_state
&& !(ndm
->ndm_state
& NUD_PERMANENT
)) {
7530 pr_info("%s: FDB only supports static addresses\n",
7535 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
7536 u32 rar_uc_entries
= IXGBE_MAX_PF_MACVLANS
;
7538 if (netdev_uc_count(dev
) < rar_uc_entries
)
7539 err
= dev_uc_add_excl(dev
, addr
);
7542 } else if (is_multicast_ether_addr(addr
)) {
7543 err
= dev_mc_add_excl(dev
, addr
);
7548 /* Only return duplicate errors if NLM_F_EXCL is set */
7549 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
7555 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
7556 struct nlmsghdr
*nlh
)
7558 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7559 struct nlattr
*attr
, *br_spec
;
7562 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7565 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
7567 nla_for_each_nested(attr
, br_spec
, rem
) {
7571 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
7574 mode
= nla_get_u16(attr
);
7575 if (mode
== BRIDGE_MODE_VEPA
) {
7577 adapter
->flags2
&= ~IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7578 } else if (mode
== BRIDGE_MODE_VEB
) {
7579 reg
= IXGBE_PFDTXGSWC_VT_LBEN
;
7580 adapter
->flags2
|= IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, reg
);
7586 e_info(drv
, "enabling bridge mode: %s\n",
7587 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
7593 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
7594 struct net_device
*dev
,
7597 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7600 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7603 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
7604 mode
= BRIDGE_MODE_VEB
;
7606 mode
= BRIDGE_MODE_VEPA
;
7608 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
, mode
);
7611 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
7613 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
7614 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
7619 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
7620 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
7622 return ERR_PTR(-EINVAL
);
7625 /* Check for hardware restriction on number of rx/tx queues */
7626 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
7627 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
7629 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7631 return ERR_PTR(-EINVAL
);
7634 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7635 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
7636 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
7637 return ERR_PTR(-EBUSY
);
7639 fwd_adapter
= kcalloc(1, sizeof(struct ixgbe_fwd_adapter
), GFP_KERNEL
);
7641 return ERR_PTR(-ENOMEM
);
7643 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
7644 adapter
->num_rx_pools
++;
7645 set_bit(pool
, &adapter
->fwd_bitmask
);
7646 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7648 /* Enable VMDq flag so device will be set in VM mode */
7649 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
7650 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7651 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
7653 /* Force reinit of ring allocation with VMDQ enabled */
7654 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7657 fwd_adapter
->pool
= pool
;
7658 fwd_adapter
->real_adapter
= adapter
;
7659 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
7662 netif_tx_start_all_queues(vdev
);
7665 /* unwind counter and free adapter struct */
7667 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
7668 clear_bit(pool
, &adapter
->fwd_bitmask
);
7669 adapter
->num_rx_pools
--;
7671 return ERR_PTR(err
);
7674 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
7676 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
7677 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
7680 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
7681 adapter
->num_rx_pools
--;
7683 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7684 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7685 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
7686 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7687 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7688 fwd_adapter
->pool
, adapter
->num_rx_pools
,
7689 fwd_adapter
->rx_base_queue
,
7690 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
7691 adapter
->fwd_bitmask
);
7695 static const struct net_device_ops ixgbe_netdev_ops
= {
7696 .ndo_open
= ixgbe_open
,
7697 .ndo_stop
= ixgbe_close
,
7698 .ndo_start_xmit
= ixgbe_xmit_frame
,
7699 .ndo_select_queue
= ixgbe_select_queue
,
7700 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
7701 .ndo_validate_addr
= eth_validate_addr
,
7702 .ndo_set_mac_address
= ixgbe_set_mac
,
7703 .ndo_change_mtu
= ixgbe_change_mtu
,
7704 .ndo_tx_timeout
= ixgbe_tx_timeout
,
7705 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
7706 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
7707 .ndo_do_ioctl
= ixgbe_ioctl
,
7708 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
7709 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
7710 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
7711 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
7712 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
7713 .ndo_get_stats64
= ixgbe_get_stats64
,
7714 #ifdef CONFIG_IXGBE_DCB
7715 .ndo_setup_tc
= ixgbe_setup_tc
,
7717 #ifdef CONFIG_NET_POLL_CONTROLLER
7718 .ndo_poll_controller
= ixgbe_netpoll
,
7720 #ifdef CONFIG_NET_RX_BUSY_POLL
7721 .ndo_busy_poll
= ixgbe_low_latency_recv
,
7724 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
7725 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
7726 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
7727 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
7728 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
7729 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
7730 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
7731 #endif /* IXGBE_FCOE */
7732 .ndo_set_features
= ixgbe_set_features
,
7733 .ndo_fix_features
= ixgbe_fix_features
,
7734 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
7735 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
7736 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
7737 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
7738 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
7742 * ixgbe_enumerate_functions - Get the number of ports this device has
7743 * @adapter: adapter structure
7745 * This function enumerates the phsyical functions co-located on a single slot,
7746 * in order to determine how many ports a device has. This is most useful in
7747 * determining the required GT/s of PCIe bandwidth necessary for optimal
7750 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
7752 struct list_head
*entry
;
7755 /* Some cards can not use the generic count PCIe functions method,
7756 * because they are behind a parent switch, so we hardcode these with
7757 * the correct number of functions.
7759 if (ixgbe_pcie_from_parent(&adapter
->hw
)) {
7762 list_for_each(entry
, &adapter
->pdev
->bus_list
) {
7763 struct pci_dev
*pdev
=
7764 list_entry(entry
, struct pci_dev
, bus_list
);
7765 /* don't count virtual functions */
7766 if (!pdev
->is_virtfn
)
7775 * ixgbe_wol_supported - Check whether device supports WoL
7776 * @hw: hw specific details
7777 * @device_id: the device ID
7778 * @subdev_id: the subsystem device ID
7780 * This function is used by probe and ethtool to determine
7781 * which devices have WoL support
7784 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
7787 struct ixgbe_hw
*hw
= &adapter
->hw
;
7788 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
7789 int is_wol_supported
= 0;
7791 switch (device_id
) {
7792 case IXGBE_DEV_ID_82599_SFP
:
7793 /* Only these subdevices could supports WOL */
7794 switch (subdevice_id
) {
7795 case IXGBE_SUBDEV_ID_82599_560FLR
:
7796 /* only support first port */
7797 if (hw
->bus
.func
!= 0)
7799 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
7800 case IXGBE_SUBDEV_ID_82599_SFP
:
7801 case IXGBE_SUBDEV_ID_82599_RNDC
:
7802 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
7803 case IXGBE_SUBDEV_ID_82599_LOM_SFP
:
7804 is_wol_supported
= 1;
7808 case IXGBE_DEV_ID_82599EN_SFP
:
7809 /* Only this subdevice supports WOL */
7810 switch (subdevice_id
) {
7811 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
7812 is_wol_supported
= 1;
7816 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
7817 /* All except this subdevice support WOL */
7818 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
7819 is_wol_supported
= 1;
7821 case IXGBE_DEV_ID_82599_KX4
:
7822 is_wol_supported
= 1;
7824 case IXGBE_DEV_ID_X540T
:
7825 case IXGBE_DEV_ID_X540T1
:
7826 /* check eeprom to see if enabled wol */
7827 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
7828 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
7829 (hw
->bus
.func
== 0))) {
7830 is_wol_supported
= 1;
7835 return is_wol_supported
;
7839 * ixgbe_probe - Device Initialization Routine
7840 * @pdev: PCI device information struct
7841 * @ent: entry in ixgbe_pci_tbl
7843 * Returns 0 on success, negative on failure
7845 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7846 * The OS initialization, configuring of the adapter private structure,
7847 * and a hardware reset occur.
7849 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
7851 struct net_device
*netdev
;
7852 struct ixgbe_adapter
*adapter
= NULL
;
7853 struct ixgbe_hw
*hw
;
7854 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
7855 static int cards_found
;
7856 int i
, err
, pci_using_dac
, expected_gts
;
7857 unsigned int indices
= MAX_TX_QUEUES
;
7858 u8 part_str
[IXGBE_PBANUM_LENGTH
];
7864 /* Catch broken hardware that put the wrong VF device ID in
7865 * the PCIe SR-IOV capability.
7867 if (pdev
->is_virtfn
) {
7868 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
7869 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
7873 err
= pci_enable_device_mem(pdev
);
7877 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
7880 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
7883 "No usable DMA configuration, aborting\n");
7889 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
7890 IORESOURCE_MEM
), ixgbe_driver_name
);
7893 "pci_request_selected_regions failed 0x%x\n", err
);
7897 pci_enable_pcie_error_reporting(pdev
);
7899 pci_set_master(pdev
);
7900 pci_save_state(pdev
);
7902 if (ii
->mac
== ixgbe_mac_82598EB
) {
7903 #ifdef CONFIG_IXGBE_DCB
7904 /* 8 TC w/ 4 queues per TC */
7905 indices
= 4 * MAX_TRAFFIC_CLASS
;
7907 indices
= IXGBE_MAX_RSS_INDICES
;
7911 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
7914 goto err_alloc_etherdev
;
7917 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7919 adapter
= netdev_priv(netdev
);
7920 pci_set_drvdata(pdev
, adapter
);
7922 adapter
->netdev
= netdev
;
7923 adapter
->pdev
= pdev
;
7926 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
7928 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
7929 pci_resource_len(pdev
, 0));
7930 adapter
->io_addr
= hw
->hw_addr
;
7936 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
7937 ixgbe_set_ethtool_ops(netdev
);
7938 netdev
->watchdog_timeo
= 5 * HZ
;
7939 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
7941 adapter
->bd_number
= cards_found
;
7944 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
7945 hw
->mac
.type
= ii
->mac
;
7948 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
7949 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
7950 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7951 if (!(eec
& (1 << 8)))
7952 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
7955 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
7956 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
7957 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7958 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
7959 hw
->phy
.mdio
.mmds
= 0;
7960 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
7961 hw
->phy
.mdio
.dev
= netdev
;
7962 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
7963 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
7965 ii
->get_invariants(hw
);
7967 /* setup the private structure */
7968 err
= ixgbe_sw_init(adapter
);
7972 /* Cache if MNG FW is up so we don't have to read the REG later */
7973 if (hw
->mac
.ops
.mng_fw_enabled
)
7974 hw
->mng_fw_enabled
= hw
->mac
.ops
.mng_fw_enabled(hw
);
7976 /* Make it possible the adapter to be woken up via WOL */
7977 switch (adapter
->hw
.mac
.type
) {
7978 case ixgbe_mac_82599EB
:
7979 case ixgbe_mac_X540
:
7980 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7987 * If there is a fan on this device and it has failed log the
7990 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
7991 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
7992 if (esdp
& IXGBE_ESDP_SDP1
)
7993 e_crit(probe
, "Fan has stopped, replace the adapter\n");
7996 if (allow_unsupported_sfp
)
7997 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
7999 /* reset_hw fills in the perm_addr as well */
8000 hw
->phy
.reset_if_overtemp
= true;
8001 err
= hw
->mac
.ops
.reset_hw(hw
);
8002 hw
->phy
.reset_if_overtemp
= false;
8003 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
8004 hw
->mac
.type
== ixgbe_mac_82598EB
) {
8006 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
8007 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8008 e_dev_err("Reload the driver after installing a supported module.\n");
8011 e_dev_err("HW Init failed: %d\n", err
);
8015 #ifdef CONFIG_PCI_IOV
8016 /* SR-IOV not supported on the 82598 */
8017 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8020 ixgbe_init_mbx_params_pf(hw
);
8021 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
, sizeof(hw
->mbx
.ops
));
8022 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
8023 ixgbe_enable_sriov(adapter
);
8027 netdev
->features
= NETIF_F_SG
|
8030 NETIF_F_HW_VLAN_CTAG_TX
|
8031 NETIF_F_HW_VLAN_CTAG_RX
|
8032 NETIF_F_HW_VLAN_CTAG_FILTER
|
8038 netdev
->hw_features
= netdev
->features
| NETIF_F_HW_L2FW_DOFFLOAD
;
8040 switch (adapter
->hw
.mac
.type
) {
8041 case ixgbe_mac_82599EB
:
8042 case ixgbe_mac_X540
:
8043 netdev
->features
|= NETIF_F_SCTP_CSUM
;
8044 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
8051 netdev
->hw_features
|= NETIF_F_RXALL
;
8053 netdev
->vlan_features
|= NETIF_F_TSO
;
8054 netdev
->vlan_features
|= NETIF_F_TSO6
;
8055 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
8056 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
8057 netdev
->vlan_features
|= NETIF_F_SG
;
8059 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
8060 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
8062 #ifdef CONFIG_IXGBE_DCB
8063 netdev
->dcbnl_ops
= &dcbnl_ops
;
8067 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
8068 unsigned int fcoe_l
;
8070 if (hw
->mac
.ops
.get_device_caps
) {
8071 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
8072 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
8073 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
8077 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
8078 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
8080 netdev
->features
|= NETIF_F_FSO
|
8083 netdev
->vlan_features
|= NETIF_F_FSO
|
8087 #endif /* IXGBE_FCOE */
8088 if (pci_using_dac
) {
8089 netdev
->features
|= NETIF_F_HIGHDMA
;
8090 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
8093 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
8094 netdev
->hw_features
|= NETIF_F_LRO
;
8095 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8096 netdev
->features
|= NETIF_F_LRO
;
8098 /* make sure the EEPROM is good */
8099 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
8100 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8105 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
8107 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
8108 e_dev_err("invalid MAC address\n");
8113 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
8114 (unsigned long) adapter
);
8116 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
8117 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
8119 err
= ixgbe_init_interrupt_scheme(adapter
);
8123 /* WOL not supported for all devices */
8125 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
8126 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
8127 pdev
->subsystem_device
);
8128 if (hw
->wol_enabled
)
8129 adapter
->wol
= IXGBE_WUFC_MAG
;
8131 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
8133 /* save off EEPROM version number */
8134 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
8135 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
8137 /* pick up the PCI bus settings for reporting later */
8138 hw
->mac
.ops
.get_bus_info(hw
);
8139 if (ixgbe_pcie_from_parent(hw
))
8140 ixgbe_get_parent_bus_info(adapter
);
8142 /* calculate the expected PCIe bandwidth required for optimal
8143 * performance. Note that some older parts will never have enough
8144 * bandwidth due to being older generation PCIe parts. We clamp these
8145 * parts to ensure no warning is displayed if it can't be fixed.
8147 switch (hw
->mac
.type
) {
8148 case ixgbe_mac_82598EB
:
8149 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
8152 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
8155 ixgbe_check_minimum_link(adapter
, expected_gts
);
8157 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
8159 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
8160 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
8161 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8162 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
8165 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8166 hw
->mac
.type
, hw
->phy
.type
, part_str
);
8168 e_dev_info("%pM\n", netdev
->dev_addr
);
8170 /* reset the hardware with the new settings */
8171 err
= hw
->mac
.ops
.start_hw(hw
);
8172 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
8173 /* We are running on a pre-production device, log a warning */
8174 e_dev_warn("This device is a pre-production adapter/LOM. "
8175 "Please be aware there may be issues associated "
8176 "with your hardware. If you are experiencing "
8177 "problems please contact your Intel or hardware "
8178 "representative who provided you with this "
8181 strcpy(netdev
->name
, "eth%d");
8182 err
= register_netdev(netdev
);
8186 /* power down the optics for 82599 SFP+ fiber */
8187 if (hw
->mac
.ops
.disable_tx_laser
)
8188 hw
->mac
.ops
.disable_tx_laser(hw
);
8190 /* carrier off reporting is important to ethtool even BEFORE open */
8191 netif_carrier_off(netdev
);
8193 #ifdef CONFIG_IXGBE_DCA
8194 if (dca_add_requester(&pdev
->dev
) == 0) {
8195 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
8196 ixgbe_setup_dca(adapter
);
8199 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
8200 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
8201 for (i
= 0; i
< adapter
->num_vfs
; i
++)
8202 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
8205 /* firmware requires driver version to be 0xFFFFFFFF
8206 * since os does not support feature
8208 if (hw
->mac
.ops
.set_fw_drv_ver
)
8209 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
8212 /* add san mac addr to netdev */
8213 ixgbe_add_sanmac_netdev(netdev
);
8215 e_dev_info("%s\n", ixgbe_default_device_descr
);
8218 #ifdef CONFIG_IXGBE_HWMON
8219 if (ixgbe_sysfs_init(adapter
))
8220 e_err(probe
, "failed to allocate sysfs resources\n");
8221 #endif /* CONFIG_IXGBE_HWMON */
8223 ixgbe_dbg_adapter_init(adapter
);
8225 /* Need link setup for MNG FW, else wait for IXGBE_UP */
8226 if (hw
->mng_fw_enabled
&& hw
->mac
.ops
.setup_link
)
8227 hw
->mac
.ops
.setup_link(hw
,
8228 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
8234 ixgbe_release_hw_control(adapter
);
8235 ixgbe_clear_interrupt_scheme(adapter
);
8237 ixgbe_disable_sriov(adapter
);
8238 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
8239 iounmap(adapter
->io_addr
);
8241 free_netdev(netdev
);
8243 pci_release_selected_regions(pdev
,
8244 pci_select_bars(pdev
, IORESOURCE_MEM
));
8247 pci_disable_device(pdev
);
8252 * ixgbe_remove - Device Removal Routine
8253 * @pdev: PCI device information struct
8255 * ixgbe_remove is called by the PCI subsystem to alert the driver
8256 * that it should release a PCI device. The could be caused by a
8257 * Hot-Plug event, or because the driver is going to be removed from
8260 static void ixgbe_remove(struct pci_dev
*pdev
)
8262 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8263 struct net_device
*netdev
= adapter
->netdev
;
8265 ixgbe_dbg_adapter_exit(adapter
);
8267 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
8268 cancel_work_sync(&adapter
->service_task
);
8271 #ifdef CONFIG_IXGBE_DCA
8272 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
8273 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
8274 dca_remove_requester(&pdev
->dev
);
8275 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
8279 #ifdef CONFIG_IXGBE_HWMON
8280 ixgbe_sysfs_exit(adapter
);
8281 #endif /* CONFIG_IXGBE_HWMON */
8283 /* remove the added san mac */
8284 ixgbe_del_sanmac_netdev(netdev
);
8286 if (netdev
->reg_state
== NETREG_REGISTERED
)
8287 unregister_netdev(netdev
);
8289 #ifdef CONFIG_PCI_IOV
8291 * Only disable SR-IOV on unload if the user specified the now
8292 * deprecated max_vfs module parameter.
8295 ixgbe_disable_sriov(adapter
);
8297 ixgbe_clear_interrupt_scheme(adapter
);
8299 ixgbe_release_hw_control(adapter
);
8302 kfree(adapter
->ixgbe_ieee_pfc
);
8303 kfree(adapter
->ixgbe_ieee_ets
);
8306 iounmap(adapter
->io_addr
);
8307 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
8310 e_dev_info("complete\n");
8312 free_netdev(netdev
);
8314 pci_disable_pcie_error_reporting(pdev
);
8316 pci_disable_device(pdev
);
8320 * ixgbe_io_error_detected - called when PCI error is detected
8321 * @pdev: Pointer to PCI device
8322 * @state: The current pci connection state
8324 * This function is called after a PCI bus error affecting
8325 * this device has been detected.
8327 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
8328 pci_channel_state_t state
)
8330 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8331 struct net_device
*netdev
= adapter
->netdev
;
8333 #ifdef CONFIG_PCI_IOV
8334 struct pci_dev
*bdev
, *vfdev
;
8335 u32 dw0
, dw1
, dw2
, dw3
;
8337 u16 req_id
, pf_func
;
8339 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
8340 adapter
->num_vfs
== 0)
8341 goto skip_bad_vf_detection
;
8343 bdev
= pdev
->bus
->self
;
8344 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
8345 bdev
= bdev
->bus
->self
;
8348 goto skip_bad_vf_detection
;
8350 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
8352 goto skip_bad_vf_detection
;
8354 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
, &dw0
);
8355 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 4, &dw1
);
8356 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 8, &dw2
);
8357 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 12, &dw3
);
8360 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8361 if (!(req_id
& 0x0080))
8362 goto skip_bad_vf_detection
;
8364 pf_func
= req_id
& 0x01;
8365 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
8366 unsigned int device_id
;
8368 vf
= (req_id
& 0x7F) >> 1;
8369 e_dev_err("VF %d has caused a PCIe error\n", vf
);
8370 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8371 "%8.8x\tdw3: %8.8x\n",
8372 dw0
, dw1
, dw2
, dw3
);
8373 switch (adapter
->hw
.mac
.type
) {
8374 case ixgbe_mac_82599EB
:
8375 device_id
= IXGBE_82599_VF_DEVICE_ID
;
8377 case ixgbe_mac_X540
:
8378 device_id
= IXGBE_X540_VF_DEVICE_ID
;
8385 /* Find the pci device of the offending VF */
8386 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
8388 if (vfdev
->devfn
== (req_id
& 0xFF))
8390 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
8394 * There's a slim chance the VF could have been hot plugged,
8395 * so if it is no longer present we don't need to issue the
8396 * VFLR. Just clean up the AER in that case.
8399 e_dev_err("Issuing VFLR to VF %d\n", vf
);
8400 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
8401 /* Free device reference count */
8405 pci_cleanup_aer_uncorrect_error_status(pdev
);
8409 * Even though the error may have occurred on the other port
8410 * we still need to increment the vf error reference count for
8411 * both ports because the I/O resume function will be called
8414 adapter
->vferr_refcount
++;
8416 return PCI_ERS_RESULT_RECOVERED
;
8418 skip_bad_vf_detection
:
8419 #endif /* CONFIG_PCI_IOV */
8420 netif_device_detach(netdev
);
8422 if (state
== pci_channel_io_perm_failure
)
8423 return PCI_ERS_RESULT_DISCONNECT
;
8425 if (netif_running(netdev
))
8426 ixgbe_down(adapter
);
8427 pci_disable_device(pdev
);
8429 /* Request a slot reset. */
8430 return PCI_ERS_RESULT_NEED_RESET
;
8434 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8435 * @pdev: Pointer to PCI device
8437 * Restart the card from scratch, as if from a cold-boot.
8439 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
8441 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8442 pci_ers_result_t result
;
8445 if (pci_enable_device_mem(pdev
)) {
8446 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
8447 result
= PCI_ERS_RESULT_DISCONNECT
;
8449 pci_set_master(pdev
);
8450 pci_restore_state(pdev
);
8451 pci_save_state(pdev
);
8453 pci_wake_from_d3(pdev
, false);
8455 ixgbe_reset(adapter
);
8456 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
8457 result
= PCI_ERS_RESULT_RECOVERED
;
8460 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
8462 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8463 "failed 0x%0x\n", err
);
8464 /* non-fatal, continue */
8471 * ixgbe_io_resume - called when traffic can start flowing again.
8472 * @pdev: Pointer to PCI device
8474 * This callback is called when the error recovery driver tells us that
8475 * its OK to resume normal operation.
8477 static void ixgbe_io_resume(struct pci_dev
*pdev
)
8479 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8480 struct net_device
*netdev
= adapter
->netdev
;
8482 #ifdef CONFIG_PCI_IOV
8483 if (adapter
->vferr_refcount
) {
8484 e_info(drv
, "Resuming after VF err\n");
8485 adapter
->vferr_refcount
--;
8490 if (netif_running(netdev
))
8493 netif_device_attach(netdev
);
8496 static const struct pci_error_handlers ixgbe_err_handler
= {
8497 .error_detected
= ixgbe_io_error_detected
,
8498 .slot_reset
= ixgbe_io_slot_reset
,
8499 .resume
= ixgbe_io_resume
,
8502 static struct pci_driver ixgbe_driver
= {
8503 .name
= ixgbe_driver_name
,
8504 .id_table
= ixgbe_pci_tbl
,
8505 .probe
= ixgbe_probe
,
8506 .remove
= ixgbe_remove
,
8508 .suspend
= ixgbe_suspend
,
8509 .resume
= ixgbe_resume
,
8511 .shutdown
= ixgbe_shutdown
,
8512 .sriov_configure
= ixgbe_pci_sriov_configure
,
8513 .err_handler
= &ixgbe_err_handler
8517 * ixgbe_init_module - Driver Registration Routine
8519 * ixgbe_init_module is the first routine called when the driver is
8520 * loaded. All it does is register with the PCI subsystem.
8522 static int __init
ixgbe_init_module(void)
8525 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
8526 pr_info("%s\n", ixgbe_copyright
);
8530 ret
= pci_register_driver(&ixgbe_driver
);
8536 #ifdef CONFIG_IXGBE_DCA
8537 dca_register_notify(&dca_notifier
);
8543 module_init(ixgbe_init_module
);
8546 * ixgbe_exit_module - Driver Exit Cleanup Routine
8548 * ixgbe_exit_module is called just before the driver is removed
8551 static void __exit
ixgbe_exit_module(void)
8553 #ifdef CONFIG_IXGBE_DCA
8554 dca_unregister_notify(&dca_notifier
);
8556 pci_unregister_driver(&ixgbe_driver
);
8560 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8563 #ifdef CONFIG_IXGBE_DCA
8564 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
8569 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
8570 __ixgbe_notify_dca
);
8572 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
8575 #endif /* CONFIG_IXGBE_DCA */
8577 module_exit(ixgbe_exit_module
);