1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
55 #include <linux/of_net.h>
59 #include <asm/idprom.h>
64 #include "ixgbe_common.h"
65 #include "ixgbe_dcb_82599.h"
66 #include "ixgbe_sriov.h"
68 char ixgbe_driver_name
[] = "ixgbe";
69 static const char ixgbe_driver_string
[] =
70 "Intel(R) 10 Gigabit PCI Express Network Driver";
72 char ixgbe_default_device_descr
[] =
73 "Intel(R) 10 Gigabit Network Connection";
75 static char ixgbe_default_device_descr
[] =
76 "Intel(R) 10 Gigabit Network Connection";
78 #define DRV_VERSION "4.0.1-k"
79 const char ixgbe_driver_version
[] = DRV_VERSION
;
80 static const char ixgbe_copyright
[] =
81 "Copyright (c) 1999-2014 Intel Corporation.";
83 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
84 [board_82598
] = &ixgbe_82598_info
,
85 [board_82599
] = &ixgbe_82599_info
,
86 [board_X540
] = &ixgbe_X540_info
,
87 [board_X550
] = &ixgbe_X550_info
,
88 [board_X550EM_x
] = &ixgbe_X550EM_x_info
,
91 /* ixgbe_pci_tbl - PCI Device ID Table
93 * Wildcard entries (PCI_ANY_ID) should come last
94 * Last entry must be all 0s
96 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
97 * Class, Class Mask, private data (not used) }
99 static const struct pci_device_id ixgbe_pci_tbl
[] = {
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
118 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
119 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
120 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
121 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
122 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
123 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
124 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
125 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
126 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
127 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
128 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
129 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
130 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T
), board_X550
},
131 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KX4
), board_X550EM_x
},
132 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KR
), board_X550EM_x
},
133 /* required last entry */
136 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
138 #ifdef CONFIG_IXGBE_DCA
139 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
141 static struct notifier_block dca_notifier
= {
142 .notifier_call
= ixgbe_notify_dca
,
148 #ifdef CONFIG_PCI_IOV
149 static unsigned int max_vfs
;
150 module_param(max_vfs
, uint
, 0);
151 MODULE_PARM_DESC(max_vfs
,
152 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
153 #endif /* CONFIG_PCI_IOV */
155 static unsigned int allow_unsupported_sfp
;
156 module_param(allow_unsupported_sfp
, uint
, 0);
157 MODULE_PARM_DESC(allow_unsupported_sfp
,
158 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
160 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
161 static int debug
= -1;
162 module_param(debug
, int, 0);
163 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
165 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
166 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
167 MODULE_LICENSE("GPL");
168 MODULE_VERSION(DRV_VERSION
);
170 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
172 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
175 struct pci_dev
*parent_dev
;
176 struct pci_bus
*parent_bus
;
178 parent_bus
= adapter
->pdev
->bus
->parent
;
182 parent_dev
= parent_bus
->self
;
186 if (!pci_is_pcie(parent_dev
))
189 pcie_capability_read_word(parent_dev
, reg
, value
);
190 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
191 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
196 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
198 struct ixgbe_hw
*hw
= &adapter
->hw
;
202 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
204 /* Get the negotiated link width and speed from PCI config space of the
205 * parent, as this device is behind a switch
207 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
209 /* assume caller will handle error case */
213 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
214 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
220 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
221 * @hw: hw specific details
223 * This function is used by probe to determine whether a device's PCI-Express
224 * bandwidth details should be gathered from the parent bus instead of from the
225 * device. Used to ensure that various locations all have the correct device ID
228 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
230 switch (hw
->device_id
) {
231 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
232 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
239 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
243 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
244 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
245 struct pci_dev
*pdev
;
247 /* determine whether to use the the parent device
249 if (ixgbe_pcie_from_parent(&adapter
->hw
))
250 pdev
= adapter
->pdev
->bus
->parent
->self
;
252 pdev
= adapter
->pdev
;
254 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
255 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
256 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
261 case PCIE_SPEED_2_5GT
:
262 /* 8b/10b encoding reduces max throughput by 20% */
265 case PCIE_SPEED_5_0GT
:
266 /* 8b/10b encoding reduces max throughput by 20% */
269 case PCIE_SPEED_8_0GT
:
270 /* 128b/130b encoding reduces throughput by less than 2% */
274 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
278 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
280 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
281 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
282 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
283 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
286 (speed
== PCIE_SPEED_2_5GT
? "20%" :
287 speed
== PCIE_SPEED_5_0GT
? "20%" :
288 speed
== PCIE_SPEED_8_0GT
? "<2%" :
291 if (max_gts
< expected_gts
) {
292 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
293 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
295 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
299 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
301 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
302 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
303 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
304 schedule_work(&adapter
->service_task
);
307 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
309 struct ixgbe_adapter
*adapter
= hw
->back
;
314 e_dev_err("Adapter removed\n");
315 if (test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
316 ixgbe_service_event_schedule(adapter
);
319 static void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
323 /* The following check not only optimizes a bit by not
324 * performing a read on the status register when the
325 * register just read was a status register read that
326 * returned IXGBE_FAILED_READ_REG. It also blocks any
327 * potential recursion.
329 if (reg
== IXGBE_STATUS
) {
330 ixgbe_remove_adapter(hw
);
333 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
334 if (value
== IXGBE_FAILED_READ_REG
)
335 ixgbe_remove_adapter(hw
);
339 * ixgbe_read_reg - Read from device register
340 * @hw: hw specific details
341 * @reg: offset of register to read
343 * Returns : value read or IXGBE_FAILED_READ_REG if removed
345 * This function is used to read device registers. It checks for device
346 * removal by confirming any read that returns all ones by checking the
347 * status register value for all ones. This function avoids reading from
348 * the hardware if a removal was previously detected in which case it
349 * returns IXGBE_FAILED_READ_REG (all ones).
351 u32
ixgbe_read_reg(struct ixgbe_hw
*hw
, u32 reg
)
353 u8 __iomem
*reg_addr
= ACCESS_ONCE(hw
->hw_addr
);
356 if (ixgbe_removed(reg_addr
))
357 return IXGBE_FAILED_READ_REG
;
358 value
= readl(reg_addr
+ reg
);
359 if (unlikely(value
== IXGBE_FAILED_READ_REG
))
360 ixgbe_check_remove(hw
, reg
);
364 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
368 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
369 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
370 ixgbe_remove_adapter(hw
);
376 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
378 struct ixgbe_adapter
*adapter
= hw
->back
;
381 if (ixgbe_removed(hw
->hw_addr
))
382 return IXGBE_FAILED_READ_CFG_WORD
;
383 pci_read_config_word(adapter
->pdev
, reg
, &value
);
384 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
385 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
386 return IXGBE_FAILED_READ_CFG_WORD
;
390 #ifdef CONFIG_PCI_IOV
391 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
393 struct ixgbe_adapter
*adapter
= hw
->back
;
396 if (ixgbe_removed(hw
->hw_addr
))
397 return IXGBE_FAILED_READ_CFG_DWORD
;
398 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
399 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
400 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
401 return IXGBE_FAILED_READ_CFG_DWORD
;
404 #endif /* CONFIG_PCI_IOV */
406 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
408 struct ixgbe_adapter
*adapter
= hw
->back
;
410 if (ixgbe_removed(hw
->hw_addr
))
412 pci_write_config_word(adapter
->pdev
, reg
, value
);
415 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
417 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
419 /* flush memory to make sure state is correct before next watchdog */
420 smp_mb__before_atomic();
421 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
424 struct ixgbe_reg_info
{
429 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
431 /* General Registers */
432 {IXGBE_CTRL
, "CTRL"},
433 {IXGBE_STATUS
, "STATUS"},
434 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
436 /* Interrupt Registers */
437 {IXGBE_EICR
, "EICR"},
440 {IXGBE_SRRCTL(0), "SRRCTL"},
441 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
442 {IXGBE_RDLEN(0), "RDLEN"},
443 {IXGBE_RDH(0), "RDH"},
444 {IXGBE_RDT(0), "RDT"},
445 {IXGBE_RXDCTL(0), "RXDCTL"},
446 {IXGBE_RDBAL(0), "RDBAL"},
447 {IXGBE_RDBAH(0), "RDBAH"},
450 {IXGBE_TDBAL(0), "TDBAL"},
451 {IXGBE_TDBAH(0), "TDBAH"},
452 {IXGBE_TDLEN(0), "TDLEN"},
453 {IXGBE_TDH(0), "TDH"},
454 {IXGBE_TDT(0), "TDT"},
455 {IXGBE_TXDCTL(0), "TXDCTL"},
457 /* List Terminator */
463 * ixgbe_regdump - register printout routine
465 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
471 switch (reginfo
->ofs
) {
472 case IXGBE_SRRCTL(0):
473 for (i
= 0; i
< 64; i
++)
474 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
476 case IXGBE_DCA_RXCTRL(0):
477 for (i
= 0; i
< 64; i
++)
478 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
481 for (i
= 0; i
< 64; i
++)
482 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
485 for (i
= 0; i
< 64; i
++)
486 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
489 for (i
= 0; i
< 64; i
++)
490 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
492 case IXGBE_RXDCTL(0):
493 for (i
= 0; i
< 64; i
++)
494 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
497 for (i
= 0; i
< 64; i
++)
498 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
501 for (i
= 0; i
< 64; i
++)
502 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
505 for (i
= 0; i
< 64; i
++)
506 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
509 for (i
= 0; i
< 64; i
++)
510 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
513 for (i
= 0; i
< 64; i
++)
514 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
517 for (i
= 0; i
< 64; i
++)
518 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
521 for (i
= 0; i
< 64; i
++)
522 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
524 case IXGBE_TXDCTL(0):
525 for (i
= 0; i
< 64; i
++)
526 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
529 pr_info("%-15s %08x\n", reginfo
->name
,
530 IXGBE_READ_REG(hw
, reginfo
->ofs
));
534 for (i
= 0; i
< 8; i
++) {
535 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
536 pr_err("%-15s", rname
);
537 for (j
= 0; j
< 8; j
++)
538 pr_cont(" %08x", regs
[i
*8+j
]);
545 * ixgbe_dump - Print registers, tx-rings and rx-rings
547 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
549 struct net_device
*netdev
= adapter
->netdev
;
550 struct ixgbe_hw
*hw
= &adapter
->hw
;
551 struct ixgbe_reg_info
*reginfo
;
553 struct ixgbe_ring
*tx_ring
;
554 struct ixgbe_tx_buffer
*tx_buffer
;
555 union ixgbe_adv_tx_desc
*tx_desc
;
556 struct my_u0
{ u64 a
; u64 b
; } *u0
;
557 struct ixgbe_ring
*rx_ring
;
558 union ixgbe_adv_rx_desc
*rx_desc
;
559 struct ixgbe_rx_buffer
*rx_buffer_info
;
563 if (!netif_msg_hw(adapter
))
566 /* Print netdevice Info */
568 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
569 pr_info("Device Name state "
570 "trans_start last_rx\n");
571 pr_info("%-15s %016lX %016lX %016lX\n",
578 /* Print Registers */
579 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
580 pr_info(" Register Name Value\n");
581 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
582 reginfo
->name
; reginfo
++) {
583 ixgbe_regdump(hw
, reginfo
);
586 /* Print TX Ring Summary */
587 if (!netdev
|| !netif_running(netdev
))
590 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
591 pr_info(" %s %s %s %s\n",
592 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
593 "leng", "ntw", "timestamp");
594 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
595 tx_ring
= adapter
->tx_ring
[n
];
596 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
597 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
598 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
599 (u64
)dma_unmap_addr(tx_buffer
, dma
),
600 dma_unmap_len(tx_buffer
, len
),
601 tx_buffer
->next_to_watch
,
602 (u64
)tx_buffer
->time_stamp
);
606 if (!netif_msg_tx_done(adapter
))
607 goto rx_ring_summary
;
609 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
611 /* Transmit Descriptor Formats
613 * 82598 Advanced Transmit Descriptor
614 * +--------------------------------------------------------------+
615 * 0 | Buffer Address [63:0] |
616 * +--------------------------------------------------------------+
617 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
618 * +--------------------------------------------------------------+
619 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
621 * 82598 Advanced Transmit Descriptor (Write-Back Format)
622 * +--------------------------------------------------------------+
624 * +--------------------------------------------------------------+
625 * 8 | RSV | STA | NXTSEQ |
626 * +--------------------------------------------------------------+
629 * 82599+ Advanced Transmit Descriptor
630 * +--------------------------------------------------------------+
631 * 0 | Buffer Address [63:0] |
632 * +--------------------------------------------------------------+
633 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
634 * +--------------------------------------------------------------+
635 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
637 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
638 * +--------------------------------------------------------------+
640 * +--------------------------------------------------------------+
641 * 8 | RSV | STA | RSV |
642 * +--------------------------------------------------------------+
646 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
647 tx_ring
= adapter
->tx_ring
[n
];
648 pr_info("------------------------------------\n");
649 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
650 pr_info("------------------------------------\n");
651 pr_info("%s%s %s %s %s %s\n",
652 "T [desc] [address 63:0 ] ",
653 "[PlPOIdStDDt Ln] [bi->dma ] ",
654 "leng", "ntw", "timestamp", "bi->skb");
656 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
657 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
658 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
659 u0
= (struct my_u0
*)tx_desc
;
660 if (dma_unmap_len(tx_buffer
, len
) > 0) {
661 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
665 (u64
)dma_unmap_addr(tx_buffer
, dma
),
666 dma_unmap_len(tx_buffer
, len
),
667 tx_buffer
->next_to_watch
,
668 (u64
)tx_buffer
->time_stamp
,
670 if (i
== tx_ring
->next_to_use
&&
671 i
== tx_ring
->next_to_clean
)
673 else if (i
== tx_ring
->next_to_use
)
675 else if (i
== tx_ring
->next_to_clean
)
680 if (netif_msg_pktdata(adapter
) &&
682 print_hex_dump(KERN_INFO
, "",
683 DUMP_PREFIX_ADDRESS
, 16, 1,
684 tx_buffer
->skb
->data
,
685 dma_unmap_len(tx_buffer
, len
),
691 /* Print RX Rings Summary */
693 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
694 pr_info("Queue [NTU] [NTC]\n");
695 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
696 rx_ring
= adapter
->rx_ring
[n
];
697 pr_info("%5d %5X %5X\n",
698 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
702 if (!netif_msg_rx_status(adapter
))
705 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
707 /* Receive Descriptor Formats
709 * 82598 Advanced Receive Descriptor (Read) Format
711 * +-----------------------------------------------------+
712 * 0 | Packet Buffer Address [63:1] |A0/NSE|
713 * +----------------------------------------------+------+
714 * 8 | Header Buffer Address [63:1] | DD |
715 * +-----------------------------------------------------+
718 * 82598 Advanced Receive Descriptor (Write-Back) Format
720 * 63 48 47 32 31 30 21 20 16 15 4 3 0
721 * +------------------------------------------------------+
722 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
723 * | Packet | IP | | | | Type | Type |
724 * | Checksum | Ident | | | | | |
725 * +------------------------------------------------------+
726 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
727 * +------------------------------------------------------+
728 * 63 48 47 32 31 20 19 0
730 * 82599+ Advanced Receive Descriptor (Read) Format
732 * +-----------------------------------------------------+
733 * 0 | Packet Buffer Address [63:1] |A0/NSE|
734 * +----------------------------------------------+------+
735 * 8 | Header Buffer Address [63:1] | DD |
736 * +-----------------------------------------------------+
739 * 82599+ Advanced Receive Descriptor (Write-Back) Format
741 * 63 48 47 32 31 30 21 20 17 16 4 3 0
742 * +------------------------------------------------------+
743 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
744 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
745 * |/ Flow Dir Flt ID | | | | | |
746 * +------------------------------------------------------+
747 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
748 * +------------------------------------------------------+
749 * 63 48 47 32 31 20 19 0
752 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
753 rx_ring
= adapter
->rx_ring
[n
];
754 pr_info("------------------------------------\n");
755 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
756 pr_info("------------------------------------\n");
758 "R [desc] [ PktBuf A0] ",
759 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
760 "<-- Adv Rx Read format\n");
762 "RWB[desc] [PcsmIpSHl PtRs] ",
763 "[vl er S cks ln] ---------------- [bi->skb ] ",
764 "<-- Adv Rx Write-Back format\n");
766 for (i
= 0; i
< rx_ring
->count
; i
++) {
767 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
768 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
769 u0
= (struct my_u0
*)rx_desc
;
770 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
771 if (staterr
& IXGBE_RXD_STAT_DD
) {
772 /* Descriptor Done */
773 pr_info("RWB[0x%03X] %016llX "
774 "%016llX ---------------- %p", i
,
777 rx_buffer_info
->skb
);
779 pr_info("R [0x%03X] %016llX "
780 "%016llX %016llX %p", i
,
783 (u64
)rx_buffer_info
->dma
,
784 rx_buffer_info
->skb
);
786 if (netif_msg_pktdata(adapter
) &&
787 rx_buffer_info
->dma
) {
788 print_hex_dump(KERN_INFO
, "",
789 DUMP_PREFIX_ADDRESS
, 16, 1,
790 page_address(rx_buffer_info
->page
) +
791 rx_buffer_info
->page_offset
,
792 ixgbe_rx_bufsz(rx_ring
), true);
796 if (i
== rx_ring
->next_to_use
)
798 else if (i
== rx_ring
->next_to_clean
)
807 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
811 /* Let firmware take over control of h/w */
812 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
813 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
814 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
817 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
821 /* Let firmware know the driver has taken over */
822 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
823 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
824 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
828 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
829 * @adapter: pointer to adapter struct
830 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
831 * @queue: queue to map the corresponding interrupt to
832 * @msix_vector: the vector to map to the corresponding queue
835 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
836 u8 queue
, u8 msix_vector
)
839 struct ixgbe_hw
*hw
= &adapter
->hw
;
840 switch (hw
->mac
.type
) {
841 case ixgbe_mac_82598EB
:
842 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
845 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
846 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
847 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
848 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
849 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
851 case ixgbe_mac_82599EB
:
854 case ixgbe_mac_X550EM_x
:
855 if (direction
== -1) {
857 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
858 index
= ((queue
& 1) * 8);
859 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
860 ivar
&= ~(0xFF << index
);
861 ivar
|= (msix_vector
<< index
);
862 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
865 /* tx or rx causes */
866 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
867 index
= ((16 * (queue
& 1)) + (8 * direction
));
868 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
869 ivar
&= ~(0xFF << index
);
870 ivar
|= (msix_vector
<< index
);
871 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
879 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
884 switch (adapter
->hw
.mac
.type
) {
885 case ixgbe_mac_82598EB
:
886 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
887 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
889 case ixgbe_mac_82599EB
:
892 case ixgbe_mac_X550EM_x
:
893 mask
= (qmask
& 0xFFFFFFFF);
894 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
895 mask
= (qmask
>> 32);
896 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
903 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
904 struct ixgbe_tx_buffer
*tx_buffer
)
906 if (tx_buffer
->skb
) {
907 dev_kfree_skb_any(tx_buffer
->skb
);
908 if (dma_unmap_len(tx_buffer
, len
))
909 dma_unmap_single(ring
->dev
,
910 dma_unmap_addr(tx_buffer
, dma
),
911 dma_unmap_len(tx_buffer
, len
),
913 } else if (dma_unmap_len(tx_buffer
, len
)) {
914 dma_unmap_page(ring
->dev
,
915 dma_unmap_addr(tx_buffer
, dma
),
916 dma_unmap_len(tx_buffer
, len
),
919 tx_buffer
->next_to_watch
= NULL
;
920 tx_buffer
->skb
= NULL
;
921 dma_unmap_len_set(tx_buffer
, len
, 0);
922 /* tx_buffer must be completely set up in the transmit path */
925 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
927 struct ixgbe_hw
*hw
= &adapter
->hw
;
928 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
932 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
933 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
936 switch (hw
->mac
.type
) {
937 case ixgbe_mac_82598EB
:
938 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
941 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
943 hwstats
->lxoffrxc
+= data
;
945 /* refill credits (no tx hang) if we received xoff */
949 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
950 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
951 &adapter
->tx_ring
[i
]->state
);
954 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
956 struct ixgbe_hw
*hw
= &adapter
->hw
;
957 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
961 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
963 if (adapter
->ixgbe_ieee_pfc
)
964 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
966 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
967 ixgbe_update_xoff_rx_lfc(adapter
);
971 /* update stats for each tc, only valid with PFC enabled */
972 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
975 switch (hw
->mac
.type
) {
976 case ixgbe_mac_82598EB
:
977 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
980 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
982 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
983 /* Get the TC for given UP */
984 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
985 xoff
[tc
] += pxoffrxc
;
988 /* disarm tx queues that have received xoff frames */
989 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
990 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
992 tc
= tx_ring
->dcb_tc
;
994 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
998 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
1000 return ring
->stats
.packets
;
1003 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
1005 struct ixgbe_adapter
*adapter
;
1006 struct ixgbe_hw
*hw
;
1009 if (ring
->l2_accel_priv
)
1010 adapter
= ring
->l2_accel_priv
->real_adapter
;
1012 adapter
= netdev_priv(ring
->netdev
);
1015 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
1016 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
1019 return (head
< tail
) ?
1020 tail
- head
: (tail
+ ring
->count
- head
);
1025 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
1027 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
1028 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1029 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
1031 clear_check_for_tx_hang(tx_ring
);
1034 * Check for a hung queue, but be thorough. This verifies
1035 * that a transmit has been completed since the previous
1036 * check AND there is at least one packet pending. The
1037 * ARMED bit is set to indicate a potential hang. The
1038 * bit is cleared if a pause frame is received to remove
1039 * false hang detection due to PFC or 802.3x frames. By
1040 * requiring this to fail twice we avoid races with
1041 * pfc clearing the ARMED bit and conditions where we
1042 * run the check_tx_hang logic with a transmit completion
1043 * pending but without time to complete it yet.
1045 if (tx_done_old
== tx_done
&& tx_pending
)
1046 /* make sure it is true for two checks in a row */
1047 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1049 /* update completed stats and continue */
1050 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1051 /* reset the countdown */
1052 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1058 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1059 * @adapter: driver private struct
1061 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1064 /* Do the reset outside of interrupt context */
1065 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1066 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
1067 e_warn(drv
, "initiating reset due to tx timeout\n");
1068 ixgbe_service_event_schedule(adapter
);
1073 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1074 * @q_vector: structure containing interrupt and ring information
1075 * @tx_ring: tx ring to clean
1077 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1078 struct ixgbe_ring
*tx_ring
)
1080 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1081 struct ixgbe_tx_buffer
*tx_buffer
;
1082 union ixgbe_adv_tx_desc
*tx_desc
;
1083 unsigned int total_bytes
= 0, total_packets
= 0;
1084 unsigned int budget
= q_vector
->tx
.work_limit
;
1085 unsigned int i
= tx_ring
->next_to_clean
;
1087 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1090 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1091 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1092 i
-= tx_ring
->count
;
1095 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1097 /* if next_to_watch is not set then there is no work pending */
1101 /* prevent any other reads prior to eop_desc */
1102 read_barrier_depends();
1104 /* if DD is not set pending work has not been completed */
1105 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1108 /* clear next_to_watch to prevent false hangs */
1109 tx_buffer
->next_to_watch
= NULL
;
1111 /* update the statistics for this packet */
1112 total_bytes
+= tx_buffer
->bytecount
;
1113 total_packets
+= tx_buffer
->gso_segs
;
1116 dev_consume_skb_any(tx_buffer
->skb
);
1118 /* unmap skb header data */
1119 dma_unmap_single(tx_ring
->dev
,
1120 dma_unmap_addr(tx_buffer
, dma
),
1121 dma_unmap_len(tx_buffer
, len
),
1124 /* clear tx_buffer data */
1125 tx_buffer
->skb
= NULL
;
1126 dma_unmap_len_set(tx_buffer
, len
, 0);
1128 /* unmap remaining buffers */
1129 while (tx_desc
!= eop_desc
) {
1134 i
-= tx_ring
->count
;
1135 tx_buffer
= tx_ring
->tx_buffer_info
;
1136 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1139 /* unmap any remaining paged data */
1140 if (dma_unmap_len(tx_buffer
, len
)) {
1141 dma_unmap_page(tx_ring
->dev
,
1142 dma_unmap_addr(tx_buffer
, dma
),
1143 dma_unmap_len(tx_buffer
, len
),
1145 dma_unmap_len_set(tx_buffer
, len
, 0);
1149 /* move us one more past the eop_desc for start of next pkt */
1154 i
-= tx_ring
->count
;
1155 tx_buffer
= tx_ring
->tx_buffer_info
;
1156 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1159 /* issue prefetch for next Tx descriptor */
1162 /* update budget accounting */
1164 } while (likely(budget
));
1166 i
+= tx_ring
->count
;
1167 tx_ring
->next_to_clean
= i
;
1168 u64_stats_update_begin(&tx_ring
->syncp
);
1169 tx_ring
->stats
.bytes
+= total_bytes
;
1170 tx_ring
->stats
.packets
+= total_packets
;
1171 u64_stats_update_end(&tx_ring
->syncp
);
1172 q_vector
->tx
.total_bytes
+= total_bytes
;
1173 q_vector
->tx
.total_packets
+= total_packets
;
1175 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1176 /* schedule immediate reset if we believe we hung */
1177 struct ixgbe_hw
*hw
= &adapter
->hw
;
1178 e_err(drv
, "Detected Tx Unit Hang\n"
1180 " TDH, TDT <%x>, <%x>\n"
1181 " next_to_use <%x>\n"
1182 " next_to_clean <%x>\n"
1183 "tx_buffer_info[next_to_clean]\n"
1184 " time_stamp <%lx>\n"
1186 tx_ring
->queue_index
,
1187 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1188 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1189 tx_ring
->next_to_use
, i
,
1190 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1192 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1195 "tx hang %d detected on queue %d, resetting adapter\n",
1196 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1198 /* schedule immediate reset if we believe we hung */
1199 ixgbe_tx_timeout_reset(adapter
);
1201 /* the adapter is about to reset, no point in enabling stuff */
1205 netdev_tx_completed_queue(txring_txq(tx_ring
),
1206 total_packets
, total_bytes
);
1208 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1209 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1210 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1211 /* Make sure that anybody stopping the queue after this
1212 * sees the new next_to_clean.
1215 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1216 tx_ring
->queue_index
)
1217 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1218 netif_wake_subqueue(tx_ring
->netdev
,
1219 tx_ring
->queue_index
);
1220 ++tx_ring
->tx_stats
.restart_queue
;
1227 #ifdef CONFIG_IXGBE_DCA
1228 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1229 struct ixgbe_ring
*tx_ring
,
1232 struct ixgbe_hw
*hw
= &adapter
->hw
;
1233 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1236 switch (hw
->mac
.type
) {
1237 case ixgbe_mac_82598EB
:
1238 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1240 case ixgbe_mac_82599EB
:
1241 case ixgbe_mac_X540
:
1242 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1243 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1246 /* for unknown hardware do not write register */
1251 * We can enable relaxed ordering for reads, but not writes when
1252 * DCA is enabled. This is due to a known issue in some chipsets
1253 * which will cause the DCA tag to be cleared.
1255 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1256 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1257 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1259 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1262 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1263 struct ixgbe_ring
*rx_ring
,
1266 struct ixgbe_hw
*hw
= &adapter
->hw
;
1267 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1268 u8 reg_idx
= rx_ring
->reg_idx
;
1271 switch (hw
->mac
.type
) {
1272 case ixgbe_mac_82599EB
:
1273 case ixgbe_mac_X540
:
1274 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1281 * We can enable relaxed ordering for reads, but not writes when
1282 * DCA is enabled. This is due to a known issue in some chipsets
1283 * which will cause the DCA tag to be cleared.
1285 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1286 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1288 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1291 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1293 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1294 struct ixgbe_ring
*ring
;
1295 int cpu
= get_cpu();
1297 if (q_vector
->cpu
== cpu
)
1300 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1301 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1303 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1304 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1306 q_vector
->cpu
= cpu
;
1311 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1315 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1318 /* always use CB2 mode, difference is masked in the CB driver */
1319 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1321 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1322 adapter
->q_vector
[i
]->cpu
= -1;
1323 ixgbe_update_dca(adapter
->q_vector
[i
]);
1327 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1329 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1330 unsigned long event
= *(unsigned long *)data
;
1332 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1336 case DCA_PROVIDER_ADD
:
1337 /* if we're already enabled, don't do it again */
1338 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1340 if (dca_add_requester(dev
) == 0) {
1341 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1342 ixgbe_setup_dca(adapter
);
1345 /* Fall Through since DCA is disabled. */
1346 case DCA_PROVIDER_REMOVE
:
1347 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1348 dca_remove_requester(dev
);
1349 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1350 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1358 #endif /* CONFIG_IXGBE_DCA */
1359 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1360 union ixgbe_adv_rx_desc
*rx_desc
,
1361 struct sk_buff
*skb
)
1363 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1365 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1371 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1372 * @ring: structure containing ring specific data
1373 * @rx_desc: advanced rx descriptor
1375 * Returns : true if it is FCoE pkt
1377 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1378 union ixgbe_adv_rx_desc
*rx_desc
)
1380 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1382 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1383 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1384 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1385 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1388 #endif /* IXGBE_FCOE */
1390 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1391 * @ring: structure containing ring specific data
1392 * @rx_desc: current Rx descriptor being processed
1393 * @skb: skb currently being received and modified
1395 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1396 union ixgbe_adv_rx_desc
*rx_desc
,
1397 struct sk_buff
*skb
)
1399 skb_checksum_none_assert(skb
);
1401 /* Rx csum disabled */
1402 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1405 /* if IP and error */
1406 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1407 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1408 ring
->rx_stats
.csum_err
++;
1412 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1415 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1416 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1419 * 82599 errata, UDP frames with a 0 checksum can be marked as
1422 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1423 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1426 ring
->rx_stats
.csum_err
++;
1430 /* It must be a TCP or UDP packet with a valid checksum */
1431 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1434 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1435 struct ixgbe_rx_buffer
*bi
)
1437 struct page
*page
= bi
->page
;
1440 /* since we are recycling buffers we should seldom need to alloc */
1444 /* alloc new page for storage */
1445 page
= dev_alloc_pages(ixgbe_rx_pg_order(rx_ring
));
1446 if (unlikely(!page
)) {
1447 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1451 /* map page for use */
1452 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1453 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1456 * if mapping failed free memory back to system since
1457 * there isn't much point in holding memory we can't use
1459 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1460 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1462 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1468 bi
->page_offset
= 0;
1474 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1475 * @rx_ring: ring to place buffers on
1476 * @cleaned_count: number of buffers to replace
1478 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1480 union ixgbe_adv_rx_desc
*rx_desc
;
1481 struct ixgbe_rx_buffer
*bi
;
1482 u16 i
= rx_ring
->next_to_use
;
1488 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1489 bi
= &rx_ring
->rx_buffer_info
[i
];
1490 i
-= rx_ring
->count
;
1493 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1497 * Refresh the desc even if buffer_addrs didn't change
1498 * because each write-back erases this info.
1500 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1506 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1507 bi
= rx_ring
->rx_buffer_info
;
1508 i
-= rx_ring
->count
;
1511 /* clear the status bits for the next_to_use descriptor */
1512 rx_desc
->wb
.upper
.status_error
= 0;
1515 } while (cleaned_count
);
1517 i
+= rx_ring
->count
;
1519 if (rx_ring
->next_to_use
!= i
) {
1520 rx_ring
->next_to_use
= i
;
1522 /* update next to alloc since we have filled the ring */
1523 rx_ring
->next_to_alloc
= i
;
1525 /* Force memory writes to complete before letting h/w
1526 * know there are new descriptors to fetch. (Only
1527 * applicable for weak-ordered memory model archs,
1531 writel(i
, rx_ring
->tail
);
1535 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1536 struct sk_buff
*skb
)
1538 u16 hdr_len
= skb_headlen(skb
);
1540 /* set gso_size to avoid messing up TCP MSS */
1541 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1542 IXGBE_CB(skb
)->append_cnt
);
1543 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1546 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1547 struct sk_buff
*skb
)
1549 /* if append_cnt is 0 then frame is not RSC */
1550 if (!IXGBE_CB(skb
)->append_cnt
)
1553 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1554 rx_ring
->rx_stats
.rsc_flush
++;
1556 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1558 /* gso_size is computed using append_cnt so always clear it last */
1559 IXGBE_CB(skb
)->append_cnt
= 0;
1563 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1564 * @rx_ring: rx descriptor ring packet is being transacted on
1565 * @rx_desc: pointer to the EOP Rx descriptor
1566 * @skb: pointer to current skb being populated
1568 * This function checks the ring, descriptor, and packet information in
1569 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1570 * other fields within the skb.
1572 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1573 union ixgbe_adv_rx_desc
*rx_desc
,
1574 struct sk_buff
*skb
)
1576 struct net_device
*dev
= rx_ring
->netdev
;
1578 ixgbe_update_rsc_stats(rx_ring
, skb
);
1580 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1582 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1584 if (unlikely(ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_STAT_TS
)))
1585 ixgbe_ptp_rx_hwtstamp(rx_ring
->q_vector
->adapter
, skb
);
1587 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1588 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1589 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1590 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1593 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1595 skb
->protocol
= eth_type_trans(skb
, dev
);
1598 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1599 struct sk_buff
*skb
)
1601 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1603 if (ixgbe_qv_busy_polling(q_vector
))
1604 netif_receive_skb(skb
);
1605 else if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1606 napi_gro_receive(&q_vector
->napi
, skb
);
1612 * ixgbe_is_non_eop - process handling of non-EOP buffers
1613 * @rx_ring: Rx ring being processed
1614 * @rx_desc: Rx descriptor for current buffer
1615 * @skb: Current socket buffer containing buffer in progress
1617 * This function updates next to clean. If the buffer is an EOP buffer
1618 * this function exits returning false, otherwise it will place the
1619 * sk_buff in the next buffer to be chained and return true indicating
1620 * that this is in fact a non-EOP buffer.
1622 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1623 union ixgbe_adv_rx_desc
*rx_desc
,
1624 struct sk_buff
*skb
)
1626 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1628 /* fetch, update, and store next to clean */
1629 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1630 rx_ring
->next_to_clean
= ntc
;
1632 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1634 /* update RSC append count if present */
1635 if (ring_is_rsc_enabled(rx_ring
)) {
1636 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1637 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1639 if (unlikely(rsc_enabled
)) {
1640 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1642 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1643 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1645 /* update ntc based on RSC value */
1646 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1647 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1648 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1652 /* if we are the last buffer then there is nothing else to do */
1653 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1656 /* place skb in next buffer to be received */
1657 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1658 rx_ring
->rx_stats
.non_eop_descs
++;
1664 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1665 * @rx_ring: rx descriptor ring packet is being transacted on
1666 * @skb: pointer to current skb being adjusted
1668 * This function is an ixgbe specific version of __pskb_pull_tail. The
1669 * main difference between this version and the original function is that
1670 * this function can make several assumptions about the state of things
1671 * that allow for significant optimizations versus the standard function.
1672 * As a result we can do things like drop a frag and maintain an accurate
1673 * truesize for the skb.
1675 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1676 struct sk_buff
*skb
)
1678 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1680 unsigned int pull_len
;
1683 * it is valid to use page_address instead of kmap since we are
1684 * working with pages allocated out of the lomem pool per
1685 * alloc_page(GFP_ATOMIC)
1687 va
= skb_frag_address(frag
);
1690 * we need the header to contain the greater of either ETH_HLEN or
1691 * 60 bytes if the skb->len is less than 60 for skb_pad.
1693 pull_len
= eth_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1695 /* align pull length to size of long to optimize memcpy performance */
1696 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1698 /* update all of the pointers */
1699 skb_frag_size_sub(frag
, pull_len
);
1700 frag
->page_offset
+= pull_len
;
1701 skb
->data_len
-= pull_len
;
1702 skb
->tail
+= pull_len
;
1706 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1707 * @rx_ring: rx descriptor ring packet is being transacted on
1708 * @skb: pointer to current skb being updated
1710 * This function provides a basic DMA sync up for the first fragment of an
1711 * skb. The reason for doing this is that the first fragment cannot be
1712 * unmapped until we have reached the end of packet descriptor for a buffer
1715 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1716 struct sk_buff
*skb
)
1718 /* if the page was released unmap it, else just sync our portion */
1719 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1720 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1721 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1722 IXGBE_CB(skb
)->page_released
= false;
1724 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1726 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1729 ixgbe_rx_bufsz(rx_ring
),
1732 IXGBE_CB(skb
)->dma
= 0;
1736 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1737 * @rx_ring: rx descriptor ring packet is being transacted on
1738 * @rx_desc: pointer to the EOP Rx descriptor
1739 * @skb: pointer to current skb being fixed
1741 * Check for corrupted packet headers caused by senders on the local L2
1742 * embedded NIC switch not setting up their Tx Descriptors right. These
1743 * should be very rare.
1745 * Also address the case where we are pulling data in on pages only
1746 * and as such no data is present in the skb header.
1748 * In addition if skb is not at least 60 bytes we need to pad it so that
1749 * it is large enough to qualify as a valid Ethernet frame.
1751 * Returns true if an error was encountered and skb was freed.
1753 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1754 union ixgbe_adv_rx_desc
*rx_desc
,
1755 struct sk_buff
*skb
)
1757 struct net_device
*netdev
= rx_ring
->netdev
;
1759 /* verify that the packet does not have any known errors */
1760 if (unlikely(ixgbe_test_staterr(rx_desc
,
1761 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1762 !(netdev
->features
& NETIF_F_RXALL
))) {
1763 dev_kfree_skb_any(skb
);
1767 /* place header in linear portion of buffer */
1768 if (skb_is_nonlinear(skb
))
1769 ixgbe_pull_tail(rx_ring
, skb
);
1772 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1773 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1777 /* if eth_skb_pad returns an error the skb was freed */
1778 if (eth_skb_pad(skb
))
1785 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1786 * @rx_ring: rx descriptor ring to store buffers on
1787 * @old_buff: donor buffer to have page reused
1789 * Synchronizes page for reuse by the adapter
1791 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1792 struct ixgbe_rx_buffer
*old_buff
)
1794 struct ixgbe_rx_buffer
*new_buff
;
1795 u16 nta
= rx_ring
->next_to_alloc
;
1797 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1799 /* update, and store next to alloc */
1801 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1803 /* transfer page from old buffer to new buffer */
1804 *new_buff
= *old_buff
;
1806 /* sync the buffer for use by the device */
1807 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1808 new_buff
->page_offset
,
1809 ixgbe_rx_bufsz(rx_ring
),
1813 static inline bool ixgbe_page_is_reserved(struct page
*page
)
1815 return (page_to_nid(page
) != numa_mem_id()) || page
->pfmemalloc
;
1819 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1820 * @rx_ring: rx descriptor ring to transact packets on
1821 * @rx_buffer: buffer containing page to add
1822 * @rx_desc: descriptor containing length of buffer written by hardware
1823 * @skb: sk_buff to place the data into
1825 * This function will add the data contained in rx_buffer->page to the skb.
1826 * This is done either through a direct copy if the data in the buffer is
1827 * less than the skb header size, otherwise it will just attach the page as
1828 * a frag to the skb.
1830 * The function will then update the page offset if necessary and return
1831 * true if the buffer can be reused by the adapter.
1833 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1834 struct ixgbe_rx_buffer
*rx_buffer
,
1835 union ixgbe_adv_rx_desc
*rx_desc
,
1836 struct sk_buff
*skb
)
1838 struct page
*page
= rx_buffer
->page
;
1839 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1840 #if (PAGE_SIZE < 8192)
1841 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1843 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1844 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1845 ixgbe_rx_bufsz(rx_ring
);
1848 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1849 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1851 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1853 /* page is not reserved, we can reuse buffer as-is */
1854 if (likely(!ixgbe_page_is_reserved(page
)))
1857 /* this page cannot be reused so discard it */
1858 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1862 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1863 rx_buffer
->page_offset
, size
, truesize
);
1865 /* avoid re-using remote pages */
1866 if (unlikely(ixgbe_page_is_reserved(page
)))
1869 #if (PAGE_SIZE < 8192)
1870 /* if we are only owner of page we can reuse it */
1871 if (unlikely(page_count(page
) != 1))
1874 /* flip page offset to other buffer */
1875 rx_buffer
->page_offset
^= truesize
;
1877 /* move offset up to the next cache line */
1878 rx_buffer
->page_offset
+= truesize
;
1880 if (rx_buffer
->page_offset
> last_offset
)
1884 /* Even if we own the page, we are not allowed to use atomic_set()
1885 * This would break get_page_unless_zero() users.
1887 atomic_inc(&page
->_count
);
1892 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
1893 union ixgbe_adv_rx_desc
*rx_desc
)
1895 struct ixgbe_rx_buffer
*rx_buffer
;
1896 struct sk_buff
*skb
;
1899 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
1900 page
= rx_buffer
->page
;
1903 skb
= rx_buffer
->skb
;
1906 void *page_addr
= page_address(page
) +
1907 rx_buffer
->page_offset
;
1909 /* prefetch first cache line of first page */
1910 prefetch(page_addr
);
1911 #if L1_CACHE_BYTES < 128
1912 prefetch(page_addr
+ L1_CACHE_BYTES
);
1915 /* allocate a skb to store the frags */
1916 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
,
1918 if (unlikely(!skb
)) {
1919 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1924 * we will be copying header into skb->data in
1925 * pskb_may_pull so it is in our interest to prefetch
1926 * it now to avoid a possible cache miss
1928 prefetchw(skb
->data
);
1931 * Delay unmapping of the first packet. It carries the
1932 * header information, HW may still access the header
1933 * after the writeback. Only unmap it when EOP is
1936 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1939 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1941 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
1942 ixgbe_dma_sync_frag(rx_ring
, skb
);
1945 /* we are reusing so sync this buffer for CPU use */
1946 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1948 rx_buffer
->page_offset
,
1949 ixgbe_rx_bufsz(rx_ring
),
1952 rx_buffer
->skb
= NULL
;
1955 /* pull page into skb */
1956 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
1957 /* hand second half of page back to the ring */
1958 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1959 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1960 /* the page has been released from the ring */
1961 IXGBE_CB(skb
)->page_released
= true;
1963 /* we are not reusing the buffer so unmap it */
1964 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1965 ixgbe_rx_pg_size(rx_ring
),
1969 /* clear contents of buffer_info */
1970 rx_buffer
->page
= NULL
;
1976 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1977 * @q_vector: structure containing interrupt and ring information
1978 * @rx_ring: rx descriptor ring to transact packets on
1979 * @budget: Total limit on number of packets to process
1981 * This function provides a "bounce buffer" approach to Rx interrupt
1982 * processing. The advantage to this is that on systems that have
1983 * expensive overhead for IOMMU access this provides a means of avoiding
1984 * it by maintaining the mapping of the page to the syste.
1986 * Returns amount of work completed
1988 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1989 struct ixgbe_ring
*rx_ring
,
1992 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1994 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1996 unsigned int mss
= 0;
1997 #endif /* IXGBE_FCOE */
1998 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2000 while (likely(total_rx_packets
< budget
)) {
2001 union ixgbe_adv_rx_desc
*rx_desc
;
2002 struct sk_buff
*skb
;
2004 /* return some buffers to hardware, one at a time is too slow */
2005 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2006 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2010 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2012 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
2016 * This memory barrier is needed to keep us from reading
2017 * any other fields out of the rx_desc until we know the
2018 * RXD_STAT_DD bit is set
2022 /* retrieve a buffer from the ring */
2023 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2025 /* exit if we failed to retrieve a buffer */
2031 /* place incomplete frames back on ring for completion */
2032 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2035 /* verify the packet layout is correct */
2036 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2039 /* probably a little skewed due to removing CRC */
2040 total_rx_bytes
+= skb
->len
;
2042 /* populate checksum, timestamp, VLAN, and protocol */
2043 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2046 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2047 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2048 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2049 /* include DDPed FCoE data */
2050 if (ddp_bytes
> 0) {
2052 mss
= rx_ring
->netdev
->mtu
-
2053 sizeof(struct fcoe_hdr
) -
2054 sizeof(struct fc_frame_header
) -
2055 sizeof(struct fcoe_crc_eof
);
2059 total_rx_bytes
+= ddp_bytes
;
2060 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2064 dev_kfree_skb_any(skb
);
2069 #endif /* IXGBE_FCOE */
2070 skb_mark_napi_id(skb
, &q_vector
->napi
);
2071 ixgbe_rx_skb(q_vector
, skb
);
2073 /* update budget accounting */
2077 u64_stats_update_begin(&rx_ring
->syncp
);
2078 rx_ring
->stats
.packets
+= total_rx_packets
;
2079 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2080 u64_stats_update_end(&rx_ring
->syncp
);
2081 q_vector
->rx
.total_packets
+= total_rx_packets
;
2082 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2084 return total_rx_packets
;
2087 #ifdef CONFIG_NET_RX_BUSY_POLL
2088 /* must be called with local_bh_disable()d */
2089 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2091 struct ixgbe_q_vector
*q_vector
=
2092 container_of(napi
, struct ixgbe_q_vector
, napi
);
2093 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2094 struct ixgbe_ring
*ring
;
2097 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2098 return LL_FLUSH_FAILED
;
2100 if (!ixgbe_qv_lock_poll(q_vector
))
2101 return LL_FLUSH_BUSY
;
2103 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2104 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2105 #ifdef BP_EXTENDED_STATS
2107 ring
->stats
.cleaned
+= found
;
2109 ring
->stats
.misses
++;
2115 ixgbe_qv_unlock_poll(q_vector
);
2119 #endif /* CONFIG_NET_RX_BUSY_POLL */
2122 * ixgbe_configure_msix - Configure MSI-X hardware
2123 * @adapter: board private structure
2125 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2128 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2130 struct ixgbe_q_vector
*q_vector
;
2134 /* Populate MSIX to EITR Select */
2135 if (adapter
->num_vfs
> 32) {
2136 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2137 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2141 * Populate the IVAR table and set the ITR values to the
2142 * corresponding register.
2144 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2145 struct ixgbe_ring
*ring
;
2146 q_vector
= adapter
->q_vector
[v_idx
];
2148 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2149 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2151 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2152 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2154 ixgbe_write_eitr(q_vector
);
2157 switch (adapter
->hw
.mac
.type
) {
2158 case ixgbe_mac_82598EB
:
2159 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2162 case ixgbe_mac_82599EB
:
2163 case ixgbe_mac_X540
:
2164 case ixgbe_mac_X550
:
2165 case ixgbe_mac_X550EM_x
:
2166 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2171 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2173 /* set up to autoclear timer, and the vectors */
2174 mask
= IXGBE_EIMS_ENABLE_MASK
;
2175 mask
&= ~(IXGBE_EIMS_OTHER
|
2176 IXGBE_EIMS_MAILBOX
|
2179 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2182 enum latency_range
{
2186 latency_invalid
= 255
2190 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2191 * @q_vector: structure containing interrupt and ring information
2192 * @ring_container: structure containing ring performance data
2194 * Stores a new ITR value based on packets and byte
2195 * counts during the last interrupt. The advantage of per interrupt
2196 * computation is faster updates and more accurate ITR for the current
2197 * traffic pattern. Constants in this function were computed
2198 * based on theoretical maximum wire speed and thresholds were set based
2199 * on testing data as well as attempting to minimize response time
2200 * while increasing bulk throughput.
2201 * this functionality is controlled by the InterruptThrottleRate module
2202 * parameter (see ixgbe_param.c)
2204 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2205 struct ixgbe_ring_container
*ring_container
)
2207 int bytes
= ring_container
->total_bytes
;
2208 int packets
= ring_container
->total_packets
;
2211 u8 itr_setting
= ring_container
->itr
;
2216 /* simple throttlerate management
2217 * 0-10MB/s lowest (100000 ints/s)
2218 * 10-20MB/s low (20000 ints/s)
2219 * 20-1249MB/s bulk (8000 ints/s)
2221 /* what was last interrupt timeslice? */
2222 timepassed_us
= q_vector
->itr
>> 2;
2223 if (timepassed_us
== 0)
2226 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2228 switch (itr_setting
) {
2229 case lowest_latency
:
2230 if (bytes_perint
> 10)
2231 itr_setting
= low_latency
;
2234 if (bytes_perint
> 20)
2235 itr_setting
= bulk_latency
;
2236 else if (bytes_perint
<= 10)
2237 itr_setting
= lowest_latency
;
2240 if (bytes_perint
<= 20)
2241 itr_setting
= low_latency
;
2245 /* clear work counters since we have the values we need */
2246 ring_container
->total_bytes
= 0;
2247 ring_container
->total_packets
= 0;
2249 /* write updated itr to ring container */
2250 ring_container
->itr
= itr_setting
;
2254 * ixgbe_write_eitr - write EITR register in hardware specific way
2255 * @q_vector: structure containing interrupt and ring information
2257 * This function is made to be called by ethtool and by the driver
2258 * when it needs to update EITR registers at runtime. Hardware
2259 * specific quirks/differences are taken care of here.
2261 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2263 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2264 struct ixgbe_hw
*hw
= &adapter
->hw
;
2265 int v_idx
= q_vector
->v_idx
;
2266 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2268 switch (adapter
->hw
.mac
.type
) {
2269 case ixgbe_mac_82598EB
:
2270 /* must write high and low 16 bits to reset counter */
2271 itr_reg
|= (itr_reg
<< 16);
2273 case ixgbe_mac_82599EB
:
2274 case ixgbe_mac_X540
:
2275 case ixgbe_mac_X550
:
2276 case ixgbe_mac_X550EM_x
:
2278 * set the WDIS bit to not clear the timer bits and cause an
2279 * immediate assertion of the interrupt
2281 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2286 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2289 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2291 u32 new_itr
= q_vector
->itr
;
2294 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2295 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2297 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2299 switch (current_itr
) {
2300 /* counts and packets in update_itr are dependent on these numbers */
2301 case lowest_latency
:
2302 new_itr
= IXGBE_100K_ITR
;
2305 new_itr
= IXGBE_20K_ITR
;
2308 new_itr
= IXGBE_8K_ITR
;
2314 if (new_itr
!= q_vector
->itr
) {
2315 /* do an exponential smoothing */
2316 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2317 ((9 * new_itr
) + q_vector
->itr
);
2319 /* save the algorithm value here */
2320 q_vector
->itr
= new_itr
;
2322 ixgbe_write_eitr(q_vector
);
2327 * ixgbe_check_overtemp_subtask - check for over temperature
2328 * @adapter: pointer to adapter
2330 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2332 struct ixgbe_hw
*hw
= &adapter
->hw
;
2333 u32 eicr
= adapter
->interrupt_event
;
2335 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2338 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2339 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2342 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2344 switch (hw
->device_id
) {
2345 case IXGBE_DEV_ID_82599_T3_LOM
:
2347 * Since the warning interrupt is for both ports
2348 * we don't have to check if:
2349 * - This interrupt wasn't for our port.
2350 * - We may have missed the interrupt so always have to
2351 * check if we got a LSC
2353 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2354 !(eicr
& IXGBE_EICR_LSC
))
2357 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2359 bool link_up
= false;
2361 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2367 /* Check if this is not due to overtemp */
2368 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2373 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2378 "Network adapter has been stopped because it has over heated. "
2379 "Restart the computer. If the problem persists, "
2380 "power off the system and replace the adapter\n");
2382 adapter
->interrupt_event
= 0;
2385 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2387 struct ixgbe_hw
*hw
= &adapter
->hw
;
2389 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2390 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2391 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2392 /* write to clear the interrupt */
2393 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2397 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2399 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2402 switch (adapter
->hw
.mac
.type
) {
2403 case ixgbe_mac_82599EB
:
2405 * Need to check link state so complete overtemp check
2408 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2409 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2410 adapter
->interrupt_event
= eicr
;
2411 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2412 ixgbe_service_event_schedule(adapter
);
2416 case ixgbe_mac_X540
:
2417 if (!(eicr
& IXGBE_EICR_TS
))
2425 "Network adapter has been stopped because it has over heated. "
2426 "Restart the computer. If the problem persists, "
2427 "power off the system and replace the adapter\n");
2430 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2432 struct ixgbe_hw
*hw
= &adapter
->hw
;
2434 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2435 /* Clear the interrupt */
2436 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2437 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2438 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2439 ixgbe_service_event_schedule(adapter
);
2443 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2444 /* Clear the interrupt */
2445 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2446 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2447 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2448 ixgbe_service_event_schedule(adapter
);
2453 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2455 struct ixgbe_hw
*hw
= &adapter
->hw
;
2458 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2459 adapter
->link_check_timeout
= jiffies
;
2460 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2461 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2462 IXGBE_WRITE_FLUSH(hw
);
2463 ixgbe_service_event_schedule(adapter
);
2467 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2471 struct ixgbe_hw
*hw
= &adapter
->hw
;
2473 switch (hw
->mac
.type
) {
2474 case ixgbe_mac_82598EB
:
2475 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2476 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2478 case ixgbe_mac_82599EB
:
2479 case ixgbe_mac_X540
:
2480 case ixgbe_mac_X550
:
2481 case ixgbe_mac_X550EM_x
:
2482 mask
= (qmask
& 0xFFFFFFFF);
2484 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2485 mask
= (qmask
>> 32);
2487 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2492 /* skip the flush */
2495 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2499 struct ixgbe_hw
*hw
= &adapter
->hw
;
2501 switch (hw
->mac
.type
) {
2502 case ixgbe_mac_82598EB
:
2503 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2504 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2506 case ixgbe_mac_82599EB
:
2507 case ixgbe_mac_X540
:
2508 case ixgbe_mac_X550
:
2509 case ixgbe_mac_X550EM_x
:
2510 mask
= (qmask
& 0xFFFFFFFF);
2512 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2513 mask
= (qmask
>> 32);
2515 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2520 /* skip the flush */
2524 * ixgbe_irq_enable - Enable default interrupt generation settings
2525 * @adapter: board private structure
2527 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2530 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2532 /* don't reenable LSC while waiting for link */
2533 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2534 mask
&= ~IXGBE_EIMS_LSC
;
2536 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2537 switch (adapter
->hw
.mac
.type
) {
2538 case ixgbe_mac_82599EB
:
2539 mask
|= IXGBE_EIMS_GPI_SDP0
;
2541 case ixgbe_mac_X540
:
2542 case ixgbe_mac_X550
:
2543 case ixgbe_mac_X550EM_x
:
2544 mask
|= IXGBE_EIMS_TS
;
2549 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2550 mask
|= IXGBE_EIMS_GPI_SDP1
;
2551 switch (adapter
->hw
.mac
.type
) {
2552 case ixgbe_mac_82599EB
:
2553 mask
|= IXGBE_EIMS_GPI_SDP1
;
2554 mask
|= IXGBE_EIMS_GPI_SDP2
;
2556 case ixgbe_mac_X540
:
2557 case ixgbe_mac_X550
:
2558 case ixgbe_mac_X550EM_x
:
2559 mask
|= IXGBE_EIMS_ECC
;
2560 mask
|= IXGBE_EIMS_MAILBOX
;
2566 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2567 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2568 mask
|= IXGBE_EIMS_FLOW_DIR
;
2570 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2572 ixgbe_irq_enable_queues(adapter
, ~0);
2574 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2577 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2579 struct ixgbe_adapter
*adapter
= data
;
2580 struct ixgbe_hw
*hw
= &adapter
->hw
;
2584 * Workaround for Silicon errata. Use clear-by-write instead
2585 * of clear-by-read. Reading with EICS will return the
2586 * interrupt causes without clearing, which later be done
2587 * with the write to EICR.
2589 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2591 /* The lower 16bits of the EICR register are for the queue interrupts
2592 * which should be masked here in order to not accidently clear them if
2593 * the bits are high when ixgbe_msix_other is called. There is a race
2594 * condition otherwise which results in possible performance loss
2595 * especially if the ixgbe_msix_other interrupt is triggering
2596 * consistently (as it would when PPS is turned on for the X540 device)
2600 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2602 if (eicr
& IXGBE_EICR_LSC
)
2603 ixgbe_check_lsc(adapter
);
2605 if (eicr
& IXGBE_EICR_MAILBOX
)
2606 ixgbe_msg_task(adapter
);
2608 switch (hw
->mac
.type
) {
2609 case ixgbe_mac_82599EB
:
2610 case ixgbe_mac_X540
:
2611 case ixgbe_mac_X550
:
2612 case ixgbe_mac_X550EM_x
:
2613 if (eicr
& IXGBE_EICR_ECC
) {
2614 e_info(link
, "Received ECC Err, initiating reset\n");
2615 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2616 ixgbe_service_event_schedule(adapter
);
2617 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2619 /* Handle Flow Director Full threshold interrupt */
2620 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2621 int reinit_count
= 0;
2623 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2624 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2625 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2630 /* no more flow director interrupts until after init */
2631 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2632 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2633 ixgbe_service_event_schedule(adapter
);
2636 ixgbe_check_sfp_event(adapter
, eicr
);
2637 ixgbe_check_overtemp_event(adapter
, eicr
);
2643 ixgbe_check_fan_failure(adapter
, eicr
);
2645 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2646 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2648 /* re-enable the original interrupt state, no lsc, no queues */
2649 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2650 ixgbe_irq_enable(adapter
, false, false);
2655 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2657 struct ixgbe_q_vector
*q_vector
= data
;
2659 /* EIAM disabled interrupts (on this vector) for us */
2661 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2662 napi_schedule(&q_vector
->napi
);
2668 * ixgbe_poll - NAPI Rx polling callback
2669 * @napi: structure for representing this polling device
2670 * @budget: how many packets driver is allowed to clean
2672 * This function is used for legacy and MSI, NAPI mode
2674 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2676 struct ixgbe_q_vector
*q_vector
=
2677 container_of(napi
, struct ixgbe_q_vector
, napi
);
2678 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2679 struct ixgbe_ring
*ring
;
2680 int per_ring_budget
;
2681 bool clean_complete
= true;
2683 #ifdef CONFIG_IXGBE_DCA
2684 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2685 ixgbe_update_dca(q_vector
);
2688 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2689 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2691 if (!ixgbe_qv_lock_napi(q_vector
))
2694 /* attempt to distribute budget to each queue fairly, but don't allow
2695 * the budget to go below 1 because we'll exit polling */
2696 if (q_vector
->rx
.count
> 1)
2697 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2699 per_ring_budget
= budget
;
2701 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2702 clean_complete
&= (ixgbe_clean_rx_irq(q_vector
, ring
,
2703 per_ring_budget
) < per_ring_budget
);
2705 ixgbe_qv_unlock_napi(q_vector
);
2706 /* If all work not completed, return budget and keep polling */
2707 if (!clean_complete
)
2710 /* all work done, exit the polling mode */
2711 napi_complete(napi
);
2712 if (adapter
->rx_itr_setting
& 1)
2713 ixgbe_set_itr(q_vector
);
2714 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2715 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2721 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2722 * @adapter: board private structure
2724 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2725 * interrupts from the kernel.
2727 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2729 struct net_device
*netdev
= adapter
->netdev
;
2733 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2734 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2735 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2737 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2738 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2739 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2741 } else if (q_vector
->rx
.ring
) {
2742 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2743 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2744 } else if (q_vector
->tx
.ring
) {
2745 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2746 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2748 /* skip this unused q_vector */
2751 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2752 q_vector
->name
, q_vector
);
2754 e_err(probe
, "request_irq failed for MSIX interrupt "
2755 "Error: %d\n", err
);
2756 goto free_queue_irqs
;
2758 /* If Flow Director is enabled, set interrupt affinity */
2759 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2760 /* assign the mask for this irq */
2761 irq_set_affinity_hint(entry
->vector
,
2762 &q_vector
->affinity_mask
);
2766 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2767 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2769 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2770 goto free_queue_irqs
;
2778 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2780 free_irq(adapter
->msix_entries
[vector
].vector
,
2781 adapter
->q_vector
[vector
]);
2783 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2784 pci_disable_msix(adapter
->pdev
);
2785 kfree(adapter
->msix_entries
);
2786 adapter
->msix_entries
= NULL
;
2791 * ixgbe_intr - legacy mode Interrupt Handler
2792 * @irq: interrupt number
2793 * @data: pointer to a network interface device structure
2795 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2797 struct ixgbe_adapter
*adapter
= data
;
2798 struct ixgbe_hw
*hw
= &adapter
->hw
;
2799 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2803 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2804 * before the read of EICR.
2806 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2808 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2809 * therefore no explicit interrupt disable is necessary */
2810 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2813 * shared interrupt alert!
2814 * make sure interrupts are enabled because the read will
2815 * have disabled interrupts due to EIAM
2816 * finish the workaround of silicon errata on 82598. Unmask
2817 * the interrupt that we masked before the EICR read.
2819 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2820 ixgbe_irq_enable(adapter
, true, true);
2821 return IRQ_NONE
; /* Not our interrupt */
2824 if (eicr
& IXGBE_EICR_LSC
)
2825 ixgbe_check_lsc(adapter
);
2827 switch (hw
->mac
.type
) {
2828 case ixgbe_mac_82599EB
:
2829 ixgbe_check_sfp_event(adapter
, eicr
);
2831 case ixgbe_mac_X540
:
2832 case ixgbe_mac_X550
:
2833 case ixgbe_mac_X550EM_x
:
2834 if (eicr
& IXGBE_EICR_ECC
) {
2835 e_info(link
, "Received ECC Err, initiating reset\n");
2836 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2837 ixgbe_service_event_schedule(adapter
);
2838 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2840 ixgbe_check_overtemp_event(adapter
, eicr
);
2846 ixgbe_check_fan_failure(adapter
, eicr
);
2847 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2848 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2850 /* would disable interrupts here but EIAM disabled it */
2851 napi_schedule(&q_vector
->napi
);
2854 * re-enable link(maybe) and non-queue interrupts, no flush.
2855 * ixgbe_poll will re-enable the queue interrupts
2857 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2858 ixgbe_irq_enable(adapter
, false, false);
2864 * ixgbe_request_irq - initialize interrupts
2865 * @adapter: board private structure
2867 * Attempts to configure interrupts using the best available
2868 * capabilities of the hardware and kernel.
2870 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2872 struct net_device
*netdev
= adapter
->netdev
;
2875 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2876 err
= ixgbe_request_msix_irqs(adapter
);
2877 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2878 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2879 netdev
->name
, adapter
);
2881 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2882 netdev
->name
, adapter
);
2885 e_err(probe
, "request_irq failed, Error %d\n", err
);
2890 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2894 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2895 free_irq(adapter
->pdev
->irq
, adapter
);
2899 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2900 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2901 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2903 /* free only the irqs that were actually requested */
2904 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
2907 /* clear the affinity_mask in the IRQ descriptor */
2908 irq_set_affinity_hint(entry
->vector
, NULL
);
2910 free_irq(entry
->vector
, q_vector
);
2913 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
2917 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2918 * @adapter: board private structure
2920 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2922 switch (adapter
->hw
.mac
.type
) {
2923 case ixgbe_mac_82598EB
:
2924 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2926 case ixgbe_mac_82599EB
:
2927 case ixgbe_mac_X540
:
2928 case ixgbe_mac_X550
:
2929 case ixgbe_mac_X550EM_x
:
2930 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2931 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2932 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2937 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2938 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2941 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
2942 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
2944 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
2946 synchronize_irq(adapter
->pdev
->irq
);
2951 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2954 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2956 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2958 ixgbe_write_eitr(q_vector
);
2960 ixgbe_set_ivar(adapter
, 0, 0, 0);
2961 ixgbe_set_ivar(adapter
, 1, 0, 0);
2963 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2967 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2968 * @adapter: board private structure
2969 * @ring: structure containing ring specific data
2971 * Configure the Tx descriptor ring after a reset.
2973 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2974 struct ixgbe_ring
*ring
)
2976 struct ixgbe_hw
*hw
= &adapter
->hw
;
2977 u64 tdba
= ring
->dma
;
2979 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2980 u8 reg_idx
= ring
->reg_idx
;
2982 /* disable queue to avoid issues while updating state */
2983 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2984 IXGBE_WRITE_FLUSH(hw
);
2986 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2987 (tdba
& DMA_BIT_MASK(32)));
2988 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2989 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2990 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2991 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2992 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2993 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
2996 * set WTHRESH to encourage burst writeback, it should not be set
2997 * higher than 1 when:
2998 * - ITR is 0 as it could cause false TX hangs
2999 * - ITR is set to > 100k int/sec and BQL is enabled
3001 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3002 * to or less than the number of on chip descriptors, which is
3005 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3006 txdctl
|= (1 << 16); /* WTHRESH = 1 */
3008 txdctl
|= (8 << 16); /* WTHRESH = 8 */
3011 * Setting PTHRESH to 32 both improves performance
3012 * and avoids a TX hang with DFP enabled
3014 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
3015 32; /* PTHRESH = 32 */
3017 /* reinitialize flowdirector state */
3018 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3019 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3020 ring
->atr_count
= 0;
3021 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3023 ring
->atr_sample_rate
= 0;
3026 /* initialize XPS */
3027 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3028 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3031 netif_set_xps_queue(ring
->netdev
,
3032 &q_vector
->affinity_mask
,
3036 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3039 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3041 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3042 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3043 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3046 /* poll to verify queue is enabled */
3048 usleep_range(1000, 2000);
3049 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3050 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3052 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3055 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3057 struct ixgbe_hw
*hw
= &adapter
->hw
;
3059 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3061 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3064 /* disable the arbiter while setting MTQC */
3065 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3066 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3067 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3069 /* set transmit pool layout */
3070 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3071 mtqc
= IXGBE_MTQC_VT_ENA
;
3073 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3075 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3076 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3077 mtqc
|= IXGBE_MTQC_32VF
;
3079 mtqc
|= IXGBE_MTQC_64VF
;
3082 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3084 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3086 mtqc
= IXGBE_MTQC_64Q_1PB
;
3089 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3091 /* Enable Security TX Buffer IFG for multiple pb */
3093 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3094 sectx
|= IXGBE_SECTX_DCB
;
3095 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3098 /* re-enable the arbiter */
3099 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3100 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3104 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3105 * @adapter: board private structure
3107 * Configure the Tx unit of the MAC after a reset.
3109 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3111 struct ixgbe_hw
*hw
= &adapter
->hw
;
3115 ixgbe_setup_mtqc(adapter
);
3117 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3118 /* DMATXCTL.EN must be before Tx queues are enabled */
3119 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3120 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3121 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3124 /* Setup the HW Tx Head and Tail descriptor pointers */
3125 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3126 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3129 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3130 struct ixgbe_ring
*ring
)
3132 struct ixgbe_hw
*hw
= &adapter
->hw
;
3133 u8 reg_idx
= ring
->reg_idx
;
3134 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3136 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3138 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3141 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3142 struct ixgbe_ring
*ring
)
3144 struct ixgbe_hw
*hw
= &adapter
->hw
;
3145 u8 reg_idx
= ring
->reg_idx
;
3146 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3148 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3150 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3153 #ifdef CONFIG_IXGBE_DCB
3154 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3156 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3160 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3162 if (adapter
->ixgbe_ieee_pfc
)
3163 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3166 * We should set the drop enable bit if:
3169 * Number of Rx queues > 1 and flow control is disabled
3171 * This allows us to avoid head of line blocking for security
3172 * and performance reasons.
3174 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3175 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3176 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3177 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3179 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3180 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3184 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3186 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3187 struct ixgbe_ring
*rx_ring
)
3189 struct ixgbe_hw
*hw
= &adapter
->hw
;
3191 u8 reg_idx
= rx_ring
->reg_idx
;
3193 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3194 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3197 * if VMDq is not active we must program one srrctl register
3198 * per RSS queue since we have enabled RDRXCTL.MVMEN
3203 /* configure header buffer length, needed for RSC */
3204 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3206 /* configure the packet buffer length */
3207 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3209 /* configure descriptor type */
3210 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3212 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3215 static void ixgbe_setup_reta(struct ixgbe_adapter
*adapter
, const u32
*seed
)
3217 struct ixgbe_hw
*hw
= &adapter
->hw
;
3220 int reta_entries
= 128;
3221 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3225 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3226 * make full use of any rings they may have. We will use the
3227 * PSRTYPE register to control how many rings we use within the PF.
3229 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3232 /* Fill out hash function seeds */
3233 for (i
= 0; i
< 10; i
++)
3234 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
3236 /* Fill out the redirection table as follows:
3237 * 82598: 128 (8 bit wide) entries containing pair of 4 bit RSS indices
3238 * 82599/X540: 128 (8 bit wide) entries containing 4 bit RSS index
3239 * X550: 512 (8 bit wide) entries containing 6 bit RSS index
3241 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3242 indices_multi
= 0x11;
3244 indices_multi
= 0x1;
3246 switch (adapter
->hw
.mac
.type
) {
3247 case ixgbe_mac_X550
:
3248 case ixgbe_mac_X550EM_x
:
3249 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3255 /* Fill out redirection table */
3256 for (i
= 0, j
= 0; i
< reta_entries
; i
++, j
++) {
3259 reta
= (reta
<< 8) | (j
* indices_multi
);
3262 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3264 IXGBE_WRITE_REG(hw
, IXGBE_ERETA((i
>> 2) - 32),
3270 static void ixgbe_setup_vfreta(struct ixgbe_adapter
*adapter
, const u32
*seed
)
3272 struct ixgbe_hw
*hw
= &adapter
->hw
;
3274 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3275 unsigned int pf_pool
= adapter
->num_vfs
;
3278 /* Fill out hash function seeds */
3279 for (i
= 0; i
< 10; i
++)
3280 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRSSRK(i
, pf_pool
), seed
[i
]);
3282 /* Fill out the redirection table */
3283 for (i
= 0, j
= 0; i
< 64; i
++, j
++) {
3286 vfreta
= (vfreta
<< 8) | j
;
3288 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRETA(i
>> 2, pf_pool
),
3293 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3295 struct ixgbe_hw
*hw
= &adapter
->hw
;
3296 u32 mrqc
= 0, rss_field
= 0, vfmrqc
= 0;
3300 /* Disable indicating checksum in descriptor, enables RSS hash */
3301 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3302 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3303 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3305 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3306 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3307 mrqc
= IXGBE_MRQC_RSSEN
;
3309 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3311 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3313 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3315 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3316 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3317 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3319 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3322 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3324 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3326 mrqc
= IXGBE_MRQC_RSSEN
;
3330 /* Perform hash on these packet types */
3331 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3332 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3333 IXGBE_MRQC_RSS_FIELD_IPV6
|
3334 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3336 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3337 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3338 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3339 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3341 netdev_rss_key_fill(rss_key
, sizeof(rss_key
));
3342 if ((hw
->mac
.type
>= ixgbe_mac_X550
) &&
3343 (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)) {
3344 unsigned int pf_pool
= adapter
->num_vfs
;
3346 /* Enable VF RSS mode */
3347 mrqc
|= IXGBE_MRQC_MULTIPLE_RSS
;
3348 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3350 /* Setup RSS through the VF registers */
3351 ixgbe_setup_vfreta(adapter
, rss_key
);
3352 vfmrqc
= IXGBE_MRQC_RSSEN
;
3353 vfmrqc
|= rss_field
;
3354 IXGBE_WRITE_REG(hw
, IXGBE_PFVFMRQC(pf_pool
), vfmrqc
);
3356 ixgbe_setup_reta(adapter
, rss_key
);
3358 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3363 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3364 * @adapter: address of board private structure
3365 * @index: index of ring to set
3367 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3368 struct ixgbe_ring
*ring
)
3370 struct ixgbe_hw
*hw
= &adapter
->hw
;
3372 u8 reg_idx
= ring
->reg_idx
;
3374 if (!ring_is_rsc_enabled(ring
))
3377 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3378 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3380 * we must limit the number of descriptors so that the
3381 * total size of max desc * buf_len is not greater
3384 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3385 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3388 #define IXGBE_MAX_RX_DESC_POLL 10
3389 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3390 struct ixgbe_ring
*ring
)
3392 struct ixgbe_hw
*hw
= &adapter
->hw
;
3393 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3395 u8 reg_idx
= ring
->reg_idx
;
3397 if (ixgbe_removed(hw
->hw_addr
))
3399 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3400 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3401 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3405 usleep_range(1000, 2000);
3406 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3407 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3410 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3411 "the polling period\n", reg_idx
);
3415 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3416 struct ixgbe_ring
*ring
)
3418 struct ixgbe_hw
*hw
= &adapter
->hw
;
3419 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3421 u8 reg_idx
= ring
->reg_idx
;
3423 if (ixgbe_removed(hw
->hw_addr
))
3425 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3426 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3428 /* write value back with RXDCTL.ENABLE bit cleared */
3429 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3431 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3432 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3435 /* the hardware may take up to 100us to really disable the rx queue */
3438 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3439 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3442 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3443 "the polling period\n", reg_idx
);
3447 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3448 struct ixgbe_ring
*ring
)
3450 struct ixgbe_hw
*hw
= &adapter
->hw
;
3451 u64 rdba
= ring
->dma
;
3453 u8 reg_idx
= ring
->reg_idx
;
3455 /* disable queue to avoid issues while updating state */
3456 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3457 ixgbe_disable_rx_queue(adapter
, ring
);
3459 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3460 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3461 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3462 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3463 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3464 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3465 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3467 ixgbe_configure_srrctl(adapter
, ring
);
3468 ixgbe_configure_rscctl(adapter
, ring
);
3470 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3472 * enable cache line friendly hardware writes:
3473 * PTHRESH=32 descriptors (half the internal cache),
3474 * this also removes ugly rx_no_buffer_count increment
3475 * HTHRESH=4 descriptors (to minimize latency on fetch)
3476 * WTHRESH=8 burst writeback up to two cache lines
3478 rxdctl
&= ~0x3FFFFF;
3482 /* enable receive descriptor ring */
3483 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3484 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3486 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3487 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3490 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3492 struct ixgbe_hw
*hw
= &adapter
->hw
;
3493 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3496 /* PSRTYPE must be initialized in non 82598 adapters */
3497 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3498 IXGBE_PSRTYPE_UDPHDR
|
3499 IXGBE_PSRTYPE_IPV4HDR
|
3500 IXGBE_PSRTYPE_L2HDR
|
3501 IXGBE_PSRTYPE_IPV6HDR
;
3503 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3511 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3512 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3515 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3517 struct ixgbe_hw
*hw
= &adapter
->hw
;
3518 u32 reg_offset
, vf_shift
;
3519 u32 gcr_ext
, vmdctl
;
3522 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3525 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3526 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3527 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3528 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3529 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3530 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3532 vf_shift
= VMDQ_P(0) % 32;
3533 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3535 /* Enable only the PF's pool for Tx/Rx */
3536 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3537 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3538 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3539 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3540 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
3541 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3543 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3544 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3547 * Set up VF register offsets for selected VT Mode,
3548 * i.e. 32 or 64 VFs for SR-IOV
3550 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3551 case IXGBE_82599_VMDQ_8Q_MASK
:
3552 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3554 case IXGBE_82599_VMDQ_4Q_MASK
:
3555 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3558 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3562 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3565 /* Enable MAC Anti-Spoofing */
3566 hw
->mac
.ops
.set_mac_anti_spoofing(hw
, (adapter
->num_vfs
!= 0),
3568 /* For VFs that have spoof checking turned off */
3569 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3570 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3571 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3575 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3577 struct ixgbe_hw
*hw
= &adapter
->hw
;
3578 struct net_device
*netdev
= adapter
->netdev
;
3579 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3580 struct ixgbe_ring
*rx_ring
;
3585 /* adjust max frame to be able to do baby jumbo for FCoE */
3586 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3587 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3588 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3590 #endif /* IXGBE_FCOE */
3592 /* adjust max frame to be at least the size of a standard frame */
3593 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3594 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3596 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3597 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3598 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3599 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3601 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3604 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3605 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3606 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3607 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3610 * Setup the HW Rx Head and Tail Descriptor Pointers and
3611 * the Base and Length of the Rx Descriptor Ring
3613 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3614 rx_ring
= adapter
->rx_ring
[i
];
3615 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3616 set_ring_rsc_enabled(rx_ring
);
3618 clear_ring_rsc_enabled(rx_ring
);
3622 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3624 struct ixgbe_hw
*hw
= &adapter
->hw
;
3625 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3627 switch (hw
->mac
.type
) {
3628 case ixgbe_mac_X550
:
3629 case ixgbe_mac_X550EM_x
:
3630 case ixgbe_mac_82598EB
:
3632 * For VMDq support of different descriptor types or
3633 * buffer sizes through the use of multiple SRRCTL
3634 * registers, RDRXCTL.MVMEN must be set to 1
3636 * also, the manual doesn't mention it clearly but DCA hints
3637 * will only use queue 0's tags unless this bit is set. Side
3638 * effects of setting this bit are only that SRRCTL must be
3639 * fully programmed [0..15]
3641 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3643 case ixgbe_mac_82599EB
:
3644 case ixgbe_mac_X540
:
3645 /* Disable RSC for ACK packets */
3646 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3647 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3648 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3649 /* hardware requires some bits to be set by default */
3650 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3651 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3654 /* We should do nothing since we don't know this hardware */
3658 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3662 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3663 * @adapter: board private structure
3665 * Configure the Rx unit of the MAC after a reset.
3667 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3669 struct ixgbe_hw
*hw
= &adapter
->hw
;
3673 /* disable receives while setting up the descriptors */
3674 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3675 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3677 ixgbe_setup_psrtype(adapter
);
3678 ixgbe_setup_rdrxctl(adapter
);
3681 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3682 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3683 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3684 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3685 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3687 /* Program registers for the distribution of queues */
3688 ixgbe_setup_mrqc(adapter
);
3690 /* set_rx_buffer_len must be called before ring initialization */
3691 ixgbe_set_rx_buffer_len(adapter
);
3694 * Setup the HW Rx Head and Tail Descriptor Pointers and
3695 * the Base and Length of the Rx Descriptor Ring
3697 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3698 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3700 /* disable drop enable for 82598 parts */
3701 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3702 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3704 /* enable all receives */
3705 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3706 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3709 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3710 __be16 proto
, u16 vid
)
3712 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3713 struct ixgbe_hw
*hw
= &adapter
->hw
;
3715 /* add VID to filter table */
3716 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true);
3717 set_bit(vid
, adapter
->active_vlans
);
3722 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
3723 __be16 proto
, u16 vid
)
3725 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3726 struct ixgbe_hw
*hw
= &adapter
->hw
;
3728 /* remove VID from filter table */
3729 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), false);
3730 clear_bit(vid
, adapter
->active_vlans
);
3736 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3737 * @adapter: driver data
3739 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3741 struct ixgbe_hw
*hw
= &adapter
->hw
;
3745 switch (hw
->mac
.type
) {
3746 case ixgbe_mac_82598EB
:
3747 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3748 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3749 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3751 case ixgbe_mac_82599EB
:
3752 case ixgbe_mac_X540
:
3753 case ixgbe_mac_X550
:
3754 case ixgbe_mac_X550EM_x
:
3755 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3756 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3758 if (ring
->l2_accel_priv
)
3761 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3762 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3763 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3772 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3773 * @adapter: driver data
3775 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3777 struct ixgbe_hw
*hw
= &adapter
->hw
;
3781 switch (hw
->mac
.type
) {
3782 case ixgbe_mac_82598EB
:
3783 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3784 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3785 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3787 case ixgbe_mac_82599EB
:
3788 case ixgbe_mac_X540
:
3789 case ixgbe_mac_X550
:
3790 case ixgbe_mac_X550EM_x
:
3791 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3792 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3794 if (ring
->l2_accel_priv
)
3797 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3798 vlnctrl
|= IXGBE_RXDCTL_VME
;
3799 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3807 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3811 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
3813 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3814 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
3818 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
3819 * @netdev: network interface device structure
3821 * Writes multicast address list to the MTA hash table.
3822 * Returns: -ENOMEM on failure
3823 * 0 on no addresses written
3824 * X on writing X addresses to MTA
3826 static int ixgbe_write_mc_addr_list(struct net_device
*netdev
)
3828 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3829 struct ixgbe_hw
*hw
= &adapter
->hw
;
3831 if (!netif_running(netdev
))
3834 if (hw
->mac
.ops
.update_mc_addr_list
)
3835 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3839 #ifdef CONFIG_PCI_IOV
3840 ixgbe_restore_vf_multicasts(adapter
);
3843 return netdev_mc_count(netdev
);
3846 #ifdef CONFIG_PCI_IOV
3847 void ixgbe_full_sync_mac_table(struct ixgbe_adapter
*adapter
)
3849 struct ixgbe_hw
*hw
= &adapter
->hw
;
3851 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3852 if (adapter
->mac_table
[i
].state
& IXGBE_MAC_STATE_IN_USE
)
3853 hw
->mac
.ops
.set_rar(hw
, i
, adapter
->mac_table
[i
].addr
,
3854 adapter
->mac_table
[i
].queue
,
3857 hw
->mac
.ops
.clear_rar(hw
, i
);
3859 adapter
->mac_table
[i
].state
&= ~(IXGBE_MAC_STATE_MODIFIED
);
3864 static void ixgbe_sync_mac_table(struct ixgbe_adapter
*adapter
)
3866 struct ixgbe_hw
*hw
= &adapter
->hw
;
3868 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3869 if (adapter
->mac_table
[i
].state
& IXGBE_MAC_STATE_MODIFIED
) {
3870 if (adapter
->mac_table
[i
].state
&
3871 IXGBE_MAC_STATE_IN_USE
)
3872 hw
->mac
.ops
.set_rar(hw
, i
,
3873 adapter
->mac_table
[i
].addr
,
3874 adapter
->mac_table
[i
].queue
,
3877 hw
->mac
.ops
.clear_rar(hw
, i
);
3879 adapter
->mac_table
[i
].state
&=
3880 ~(IXGBE_MAC_STATE_MODIFIED
);
3885 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter
*adapter
)
3888 struct ixgbe_hw
*hw
= &adapter
->hw
;
3890 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3891 adapter
->mac_table
[i
].state
|= IXGBE_MAC_STATE_MODIFIED
;
3892 adapter
->mac_table
[i
].state
&= ~IXGBE_MAC_STATE_IN_USE
;
3893 memset(adapter
->mac_table
[i
].addr
, 0, ETH_ALEN
);
3894 adapter
->mac_table
[i
].queue
= 0;
3896 ixgbe_sync_mac_table(adapter
);
3899 static int ixgbe_available_rars(struct ixgbe_adapter
*adapter
)
3901 struct ixgbe_hw
*hw
= &adapter
->hw
;
3904 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3905 if (adapter
->mac_table
[i
].state
== 0)
3911 /* this function destroys the first RAR entry */
3912 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter
*adapter
,
3915 struct ixgbe_hw
*hw
= &adapter
->hw
;
3917 memcpy(&adapter
->mac_table
[0].addr
, addr
, ETH_ALEN
);
3918 adapter
->mac_table
[0].queue
= VMDQ_P(0);
3919 adapter
->mac_table
[0].state
= (IXGBE_MAC_STATE_DEFAULT
|
3920 IXGBE_MAC_STATE_IN_USE
);
3921 hw
->mac
.ops
.set_rar(hw
, 0, adapter
->mac_table
[0].addr
,
3922 adapter
->mac_table
[0].queue
,
3926 int ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
, u8
*addr
, u16 queue
)
3928 struct ixgbe_hw
*hw
= &adapter
->hw
;
3931 if (is_zero_ether_addr(addr
))
3934 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3935 if (adapter
->mac_table
[i
].state
& IXGBE_MAC_STATE_IN_USE
)
3937 adapter
->mac_table
[i
].state
|= (IXGBE_MAC_STATE_MODIFIED
|
3938 IXGBE_MAC_STATE_IN_USE
);
3939 ether_addr_copy(adapter
->mac_table
[i
].addr
, addr
);
3940 adapter
->mac_table
[i
].queue
= queue
;
3941 ixgbe_sync_mac_table(adapter
);
3947 int ixgbe_del_mac_filter(struct ixgbe_adapter
*adapter
, u8
*addr
, u16 queue
)
3949 /* search table for addr, if found, set to 0 and sync */
3951 struct ixgbe_hw
*hw
= &adapter
->hw
;
3953 if (is_zero_ether_addr(addr
))
3956 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++) {
3957 if (ether_addr_equal(addr
, adapter
->mac_table
[i
].addr
) &&
3958 adapter
->mac_table
[i
].queue
== queue
) {
3959 adapter
->mac_table
[i
].state
|= IXGBE_MAC_STATE_MODIFIED
;
3960 adapter
->mac_table
[i
].state
&= ~IXGBE_MAC_STATE_IN_USE
;
3961 memset(adapter
->mac_table
[i
].addr
, 0, ETH_ALEN
);
3962 adapter
->mac_table
[i
].queue
= 0;
3963 ixgbe_sync_mac_table(adapter
);
3970 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3971 * @netdev: network interface device structure
3973 * Writes unicast address list to the RAR table.
3974 * Returns: -ENOMEM on failure/insufficient address space
3975 * 0 on no addresses written
3976 * X on writing X addresses to the RAR table
3978 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
, int vfn
)
3980 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3983 /* return ENOMEM indicating insufficient memory for addresses */
3984 if (netdev_uc_count(netdev
) > ixgbe_available_rars(adapter
))
3987 if (!netdev_uc_empty(netdev
)) {
3988 struct netdev_hw_addr
*ha
;
3989 netdev_for_each_uc_addr(ha
, netdev
) {
3990 ixgbe_del_mac_filter(adapter
, ha
->addr
, vfn
);
3991 ixgbe_add_mac_filter(adapter
, ha
->addr
, vfn
);
3999 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4000 * @netdev: network interface device structure
4002 * The set_rx_method entry point is called whenever the unicast/multicast
4003 * address list or the network interface flags are updated. This routine is
4004 * responsible for configuring the hardware for proper unicast, multicast and
4007 void ixgbe_set_rx_mode(struct net_device
*netdev
)
4009 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4010 struct ixgbe_hw
*hw
= &adapter
->hw
;
4011 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
4015 /* Check for Promiscuous and All Multicast modes */
4016 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4017 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4019 /* set all bits that we expect to always be set */
4020 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
4021 fctrl
|= IXGBE_FCTRL_BAM
;
4022 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
4023 fctrl
|= IXGBE_FCTRL_PMCF
;
4025 /* clear the bits we are changing the status of */
4026 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4027 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
4028 if (netdev
->flags
& IFF_PROMISC
) {
4029 hw
->addr_ctrl
.user_set_promisc
= true;
4030 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4031 vmolr
|= IXGBE_VMOLR_MPE
;
4032 /* Only disable hardware filter vlans in promiscuous mode
4033 * if SR-IOV and VMDQ are disabled - otherwise ensure
4034 * that hardware VLAN filters remain enabled.
4036 if (adapter
->flags
& (IXGBE_FLAG_VMDQ_ENABLED
|
4037 IXGBE_FLAG_SRIOV_ENABLED
))
4038 vlnctrl
|= (IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
4040 if (netdev
->flags
& IFF_ALLMULTI
) {
4041 fctrl
|= IXGBE_FCTRL_MPE
;
4042 vmolr
|= IXGBE_VMOLR_MPE
;
4044 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4045 hw
->addr_ctrl
.user_set_promisc
= false;
4049 * Write addresses to available RAR registers, if there is not
4050 * sufficient space to store all the addresses then enable
4051 * unicast promiscuous mode
4053 count
= ixgbe_write_uc_addr_list(netdev
, VMDQ_P(0));
4055 fctrl
|= IXGBE_FCTRL_UPE
;
4056 vmolr
|= IXGBE_VMOLR_ROPE
;
4059 /* Write addresses to the MTA, if the attempt fails
4060 * then we should just turn on promiscuous mode so
4061 * that we can at least receive multicast traffic
4063 count
= ixgbe_write_mc_addr_list(netdev
);
4065 fctrl
|= IXGBE_FCTRL_MPE
;
4066 vmolr
|= IXGBE_VMOLR_MPE
;
4068 vmolr
|= IXGBE_VMOLR_ROMPE
;
4071 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4072 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
4073 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
4075 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
4078 /* This is useful for sniffing bad packets. */
4079 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
4080 /* UPE and MPE will be handled by normal PROMISC logic
4081 * in e1000e_set_rx_mode */
4082 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
4083 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
4084 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
4086 fctrl
&= ~(IXGBE_FCTRL_DPF
);
4087 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4090 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4091 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4093 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
4094 ixgbe_vlan_strip_enable(adapter
);
4096 ixgbe_vlan_strip_disable(adapter
);
4099 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
4103 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4104 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
4105 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4109 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4113 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4114 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4115 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
4116 pr_info("QV %d locked\n", q_idx
);
4117 usleep_range(1000, 20000);
4122 #ifdef CONFIG_IXGBE_DCB
4124 * ixgbe_configure_dcb - Configure DCB hardware
4125 * @adapter: ixgbe adapter struct
4127 * This is called by the driver on open to configure the DCB hardware.
4128 * This is also called by the gennetlink interface when reconfiguring
4131 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
4133 struct ixgbe_hw
*hw
= &adapter
->hw
;
4134 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4136 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
4137 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4138 netif_set_gso_max_size(adapter
->netdev
, 65536);
4142 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4143 netif_set_gso_max_size(adapter
->netdev
, 32768);
4146 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
4147 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
4150 /* reconfigure the hardware */
4151 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
4152 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4154 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4156 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
4157 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
4158 ixgbe_dcb_hw_ets(&adapter
->hw
,
4159 adapter
->ixgbe_ieee_ets
,
4161 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
4162 adapter
->ixgbe_ieee_pfc
->pfc_en
,
4163 adapter
->ixgbe_ieee_ets
->prio_tc
);
4166 /* Enable RSS Hash per TC */
4167 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4169 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4176 /* write msb to all 8 TCs in one write */
4177 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4182 /* Additional bittime to account for IXGBE framing */
4183 #define IXGBE_ETH_FRAMING 20
4186 * ixgbe_hpbthresh - calculate high water mark for flow control
4188 * @adapter: board private structure to calculate for
4189 * @pb: packet buffer to calculate
4191 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4193 struct ixgbe_hw
*hw
= &adapter
->hw
;
4194 struct net_device
*dev
= adapter
->netdev
;
4195 int link
, tc
, kb
, marker
;
4198 /* Calculate max LAN frame size */
4199 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4202 /* FCoE traffic class uses FCOE jumbo frames */
4203 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4204 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4205 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4206 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4209 /* Calculate delay value for device */
4210 switch (hw
->mac
.type
) {
4211 case ixgbe_mac_X540
:
4212 case ixgbe_mac_X550
:
4213 case ixgbe_mac_X550EM_x
:
4214 dv_id
= IXGBE_DV_X540(link
, tc
);
4217 dv_id
= IXGBE_DV(link
, tc
);
4221 /* Loopback switch introduces additional latency */
4222 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4223 dv_id
+= IXGBE_B2BT(tc
);
4225 /* Delay value is calculated in bit times convert to KB */
4226 kb
= IXGBE_BT2KB(dv_id
);
4227 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4229 marker
= rx_pba
- kb
;
4231 /* It is possible that the packet buffer is not large enough
4232 * to provide required headroom. In this case throw an error
4233 * to user and a do the best we can.
4236 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4237 "headroom to support flow control."
4238 "Decrease MTU or number of traffic classes\n", pb
);
4246 * ixgbe_lpbthresh - calculate low water mark for for flow control
4248 * @adapter: board private structure to calculate for
4249 * @pb: packet buffer to calculate
4251 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4253 struct ixgbe_hw
*hw
= &adapter
->hw
;
4254 struct net_device
*dev
= adapter
->netdev
;
4258 /* Calculate max LAN frame size */
4259 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4262 /* FCoE traffic class uses FCOE jumbo frames */
4263 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4264 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4265 (pb
== netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
)))
4266 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4269 /* Calculate delay value for device */
4270 switch (hw
->mac
.type
) {
4271 case ixgbe_mac_X540
:
4272 case ixgbe_mac_X550
:
4273 case ixgbe_mac_X550EM_x
:
4274 dv_id
= IXGBE_LOW_DV_X540(tc
);
4277 dv_id
= IXGBE_LOW_DV(tc
);
4281 /* Delay value is calculated in bit times convert to KB */
4282 return IXGBE_BT2KB(dv_id
);
4286 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4288 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4290 struct ixgbe_hw
*hw
= &adapter
->hw
;
4291 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4297 for (i
= 0; i
< num_tc
; i
++) {
4298 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4299 hw
->fc
.low_water
[i
] = ixgbe_lpbthresh(adapter
, i
);
4301 /* Low water marks must not be larger than high water marks */
4302 if (hw
->fc
.low_water
[i
] > hw
->fc
.high_water
[i
])
4303 hw
->fc
.low_water
[i
] = 0;
4306 for (; i
< MAX_TRAFFIC_CLASS
; i
++)
4307 hw
->fc
.high_water
[i
] = 0;
4310 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4312 struct ixgbe_hw
*hw
= &adapter
->hw
;
4314 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4316 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4317 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4318 hdrm
= 32 << adapter
->fdir_pballoc
;
4322 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4323 ixgbe_pbthresh_setup(adapter
);
4326 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4328 struct ixgbe_hw
*hw
= &adapter
->hw
;
4329 struct hlist_node
*node2
;
4330 struct ixgbe_fdir_filter
*filter
;
4332 spin_lock(&adapter
->fdir_perfect_lock
);
4334 if (!hlist_empty(&adapter
->fdir_filter_list
))
4335 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4337 hlist_for_each_entry_safe(filter
, node2
,
4338 &adapter
->fdir_filter_list
, fdir_node
) {
4339 ixgbe_fdir_write_perfect_filter_82599(hw
,
4342 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4343 IXGBE_FDIR_DROP_QUEUE
:
4344 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4347 spin_unlock(&adapter
->fdir_perfect_lock
);
4350 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4351 struct ixgbe_adapter
*adapter
)
4353 struct ixgbe_hw
*hw
= &adapter
->hw
;
4356 /* No unicast promiscuous support for VMDQ devices. */
4357 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4358 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4360 /* clear the affected bit */
4361 vmolr
&= ~IXGBE_VMOLR_MPE
;
4363 if (dev
->flags
& IFF_ALLMULTI
) {
4364 vmolr
|= IXGBE_VMOLR_MPE
;
4366 vmolr
|= IXGBE_VMOLR_ROMPE
;
4367 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4369 ixgbe_write_uc_addr_list(adapter
->netdev
, pool
);
4370 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4373 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4375 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4376 int rss_i
= adapter
->num_rx_queues_per_pool
;
4377 struct ixgbe_hw
*hw
= &adapter
->hw
;
4378 u16 pool
= vadapter
->pool
;
4379 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4380 IXGBE_PSRTYPE_UDPHDR
|
4381 IXGBE_PSRTYPE_IPV4HDR
|
4382 IXGBE_PSRTYPE_L2HDR
|
4383 IXGBE_PSRTYPE_IPV6HDR
;
4385 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4393 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4397 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4398 * @rx_ring: ring to free buffers from
4400 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4402 struct device
*dev
= rx_ring
->dev
;
4406 /* ring already cleared, nothing to do */
4407 if (!rx_ring
->rx_buffer_info
)
4410 /* Free all the Rx ring sk_buffs */
4411 for (i
= 0; i
< rx_ring
->count
; i
++) {
4412 struct ixgbe_rx_buffer
*rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4414 if (rx_buffer
->skb
) {
4415 struct sk_buff
*skb
= rx_buffer
->skb
;
4416 if (IXGBE_CB(skb
)->page_released
)
4419 ixgbe_rx_bufsz(rx_ring
),
4422 rx_buffer
->skb
= NULL
;
4425 if (!rx_buffer
->page
)
4428 dma_unmap_page(dev
, rx_buffer
->dma
,
4429 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
4430 __free_pages(rx_buffer
->page
, ixgbe_rx_pg_order(rx_ring
));
4432 rx_buffer
->page
= NULL
;
4435 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4436 memset(rx_ring
->rx_buffer_info
, 0, size
);
4438 /* Zero out the descriptor ring */
4439 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4441 rx_ring
->next_to_alloc
= 0;
4442 rx_ring
->next_to_clean
= 0;
4443 rx_ring
->next_to_use
= 0;
4446 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4447 struct ixgbe_ring
*rx_ring
)
4449 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4450 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4452 /* shutdown specific queue receive and wait for dma to settle */
4453 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4454 usleep_range(10000, 20000);
4455 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << index
));
4456 ixgbe_clean_rx_ring(rx_ring
);
4457 rx_ring
->l2_accel_priv
= NULL
;
4460 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4461 struct ixgbe_fwd_adapter
*accel
)
4463 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4464 unsigned int rxbase
= accel
->rx_base_queue
;
4465 unsigned int txbase
= accel
->tx_base_queue
;
4468 netif_tx_stop_all_queues(vdev
);
4470 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4471 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4472 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4475 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4476 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4477 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4484 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4485 struct ixgbe_fwd_adapter
*accel
)
4487 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4488 unsigned int rxbase
, txbase
, queues
;
4489 int i
, baseq
, err
= 0;
4491 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4494 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4495 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4496 accel
->pool
, adapter
->num_rx_pools
,
4497 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4498 adapter
->fwd_bitmask
);
4500 accel
->netdev
= vdev
;
4501 accel
->rx_base_queue
= rxbase
= baseq
;
4502 accel
->tx_base_queue
= txbase
= baseq
;
4504 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4505 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4507 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4508 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4509 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4510 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4513 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4514 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4515 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4518 queues
= min_t(unsigned int,
4519 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4520 err
= netif_set_real_num_tx_queues(vdev
, queues
);
4524 err
= netif_set_real_num_rx_queues(vdev
, queues
);
4528 if (is_valid_ether_addr(vdev
->dev_addr
))
4529 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
4531 ixgbe_fwd_psrtype(accel
);
4532 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
4535 ixgbe_fwd_ring_down(vdev
, accel
);
4539 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
4541 struct net_device
*upper
;
4542 struct list_head
*iter
;
4545 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4546 if (netif_is_macvlan(upper
)) {
4547 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
4548 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
4550 if (dfwd
->fwd_priv
) {
4551 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
4559 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
4561 struct ixgbe_hw
*hw
= &adapter
->hw
;
4563 ixgbe_configure_pb(adapter
);
4564 #ifdef CONFIG_IXGBE_DCB
4565 ixgbe_configure_dcb(adapter
);
4568 * We must restore virtualization before VLANs or else
4569 * the VLVF registers will not be populated
4571 ixgbe_configure_virtualization(adapter
);
4573 ixgbe_set_rx_mode(adapter
->netdev
);
4574 ixgbe_restore_vlan(adapter
);
4576 switch (hw
->mac
.type
) {
4577 case ixgbe_mac_82599EB
:
4578 case ixgbe_mac_X540
:
4579 hw
->mac
.ops
.disable_rx_buff(hw
);
4585 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
4586 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
4587 adapter
->fdir_pballoc
);
4588 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
4589 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
4590 adapter
->fdir_pballoc
);
4591 ixgbe_fdir_filter_restore(adapter
);
4594 switch (hw
->mac
.type
) {
4595 case ixgbe_mac_82599EB
:
4596 case ixgbe_mac_X540
:
4597 hw
->mac
.ops
.enable_rx_buff(hw
);
4604 /* configure FCoE L2 filters, redirection table, and Rx control */
4605 ixgbe_configure_fcoe(adapter
);
4607 #endif /* IXGBE_FCOE */
4608 ixgbe_configure_tx(adapter
);
4609 ixgbe_configure_rx(adapter
);
4610 ixgbe_configure_dfwd(adapter
);
4613 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
4615 switch (hw
->phy
.type
) {
4616 case ixgbe_phy_sfp_avago
:
4617 case ixgbe_phy_sfp_ftl
:
4618 case ixgbe_phy_sfp_intel
:
4619 case ixgbe_phy_sfp_unknown
:
4620 case ixgbe_phy_sfp_passive_tyco
:
4621 case ixgbe_phy_sfp_passive_unknown
:
4622 case ixgbe_phy_sfp_active_unknown
:
4623 case ixgbe_phy_sfp_ftl_active
:
4624 case ixgbe_phy_qsfp_passive_unknown
:
4625 case ixgbe_phy_qsfp_active_unknown
:
4626 case ixgbe_phy_qsfp_intel
:
4627 case ixgbe_phy_qsfp_unknown
:
4628 /* ixgbe_phy_none is set when no SFP module is present */
4629 case ixgbe_phy_none
:
4632 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4640 * ixgbe_sfp_link_config - set up SFP+ link
4641 * @adapter: pointer to private adapter struct
4643 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
4646 * We are assuming the worst case scenario here, and that
4647 * is that an SFP was inserted/removed after the reset
4648 * but before SFP detection was enabled. As such the best
4649 * solution is to just start searching as soon as we start
4651 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
4652 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
4654 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
4658 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4659 * @hw: pointer to private hardware struct
4661 * Returns 0 on success, negative on failure
4663 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
4666 bool autoneg
, link_up
= false;
4667 u32 ret
= IXGBE_ERR_LINK_SETUP
;
4669 if (hw
->mac
.ops
.check_link
)
4670 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
4675 speed
= hw
->phy
.autoneg_advertised
;
4676 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
4677 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
4682 if (hw
->mac
.ops
.setup_link
)
4683 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
4688 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
4690 struct ixgbe_hw
*hw
= &adapter
->hw
;
4693 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4694 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
4696 gpie
|= IXGBE_GPIE_EIAME
;
4698 * use EIAM to auto-mask when MSI-X interrupt is asserted
4699 * this saves a register write for every interrupt
4701 switch (hw
->mac
.type
) {
4702 case ixgbe_mac_82598EB
:
4703 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4705 case ixgbe_mac_82599EB
:
4706 case ixgbe_mac_X540
:
4707 case ixgbe_mac_X550
:
4708 case ixgbe_mac_X550EM_x
:
4710 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4711 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4715 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4716 * specifically only auto mask tx and rx interrupts */
4717 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4720 /* XXX: to interrupt immediately for EICS writes, enable this */
4721 /* gpie |= IXGBE_GPIE_EIMEN; */
4723 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
4724 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
4726 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
4727 case IXGBE_82599_VMDQ_8Q_MASK
:
4728 gpie
|= IXGBE_GPIE_VTMODE_16
;
4730 case IXGBE_82599_VMDQ_4Q_MASK
:
4731 gpie
|= IXGBE_GPIE_VTMODE_32
;
4734 gpie
|= IXGBE_GPIE_VTMODE_64
;
4739 /* Enable Thermal over heat sensor interrupt */
4740 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
4741 switch (adapter
->hw
.mac
.type
) {
4742 case ixgbe_mac_82599EB
:
4743 gpie
|= IXGBE_SDP0_GPIEN
;
4745 case ixgbe_mac_X540
:
4746 gpie
|= IXGBE_EIMS_TS
;
4753 /* Enable fan failure interrupt */
4754 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
4755 gpie
|= IXGBE_SDP1_GPIEN
;
4757 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4758 gpie
|= IXGBE_SDP1_GPIEN
;
4759 gpie
|= IXGBE_SDP2_GPIEN
;
4762 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
4765 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
4767 struct ixgbe_hw
*hw
= &adapter
->hw
;
4771 ixgbe_get_hw_control(adapter
);
4772 ixgbe_setup_gpie(adapter
);
4774 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4775 ixgbe_configure_msix(adapter
);
4777 ixgbe_configure_msi_and_legacy(adapter
);
4779 /* enable the optics for 82599 SFP+ fiber */
4780 if (hw
->mac
.ops
.enable_tx_laser
)
4781 hw
->mac
.ops
.enable_tx_laser(hw
);
4783 smp_mb__before_atomic();
4784 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
4785 ixgbe_napi_enable_all(adapter
);
4787 if (ixgbe_is_sfp(hw
)) {
4788 ixgbe_sfp_link_config(adapter
);
4790 err
= ixgbe_non_sfp_link_config(hw
);
4792 e_err(probe
, "link_config FAILED %d\n", err
);
4795 /* clear any pending interrupts, may auto mask */
4796 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4797 ixgbe_irq_enable(adapter
, true, true);
4800 * If this adapter has a fan, check to see if we had a failure
4801 * before we enabled the interrupt.
4803 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4804 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4805 if (esdp
& IXGBE_ESDP_SDP1
)
4806 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4809 /* bring the link up in the watchdog, this could race with our first
4810 * link up interrupt but shouldn't be a problem */
4811 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4812 adapter
->link_check_timeout
= jiffies
;
4813 mod_timer(&adapter
->service_timer
, jiffies
);
4815 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4816 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4817 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4818 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4821 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4823 WARN_ON(in_interrupt());
4824 /* put off any impending NetWatchDogTimeout */
4825 adapter
->netdev
->trans_start
= jiffies
;
4827 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4828 usleep_range(1000, 2000);
4829 ixgbe_down(adapter
);
4831 * If SR-IOV enabled then wait a bit before bringing the adapter
4832 * back up to give the VFs time to respond to the reset. The
4833 * two second wait is based upon the watchdog timer cycle in
4836 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4839 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4842 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4844 /* hardware has been reset, we need to reload some things */
4845 ixgbe_configure(adapter
);
4847 ixgbe_up_complete(adapter
);
4850 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4852 struct ixgbe_hw
*hw
= &adapter
->hw
;
4853 struct net_device
*netdev
= adapter
->netdev
;
4855 u8 old_addr
[ETH_ALEN
];
4857 if (ixgbe_removed(hw
->hw_addr
))
4859 /* lock SFP init bit to prevent race conditions with the watchdog */
4860 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4861 usleep_range(1000, 2000);
4863 /* clear all SFP and link config related flags while holding SFP_INIT */
4864 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4865 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4866 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4868 err
= hw
->mac
.ops
.init_hw(hw
);
4871 case IXGBE_ERR_SFP_NOT_PRESENT
:
4872 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4874 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4875 e_dev_err("master disable timed out\n");
4877 case IXGBE_ERR_EEPROM_VERSION
:
4878 /* We are running on a pre-production device, log a warning */
4879 e_dev_warn("This device is a pre-production adapter/LOM. "
4880 "Please be aware there may be issues associated with "
4881 "your hardware. If you are experiencing problems "
4882 "please contact your Intel or hardware "
4883 "representative who provided you with this "
4887 e_dev_err("Hardware Error: %d\n", err
);
4890 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4891 /* do not flush user set addresses */
4892 memcpy(old_addr
, &adapter
->mac_table
[0].addr
, netdev
->addr_len
);
4893 ixgbe_flush_sw_mac_table(adapter
);
4894 ixgbe_mac_set_default_filter(adapter
, old_addr
);
4896 /* update SAN MAC vmdq pool selection */
4897 if (hw
->mac
.san_mac_rar_index
)
4898 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
4900 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
4901 ixgbe_ptp_reset(adapter
);
4905 * ixgbe_clean_tx_ring - Free Tx Buffers
4906 * @tx_ring: ring to be cleaned
4908 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4910 struct ixgbe_tx_buffer
*tx_buffer_info
;
4914 /* ring already cleared, nothing to do */
4915 if (!tx_ring
->tx_buffer_info
)
4918 /* Free all the Tx ring sk_buffs */
4919 for (i
= 0; i
< tx_ring
->count
; i
++) {
4920 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4921 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4924 netdev_tx_reset_queue(txring_txq(tx_ring
));
4926 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4927 memset(tx_ring
->tx_buffer_info
, 0, size
);
4929 /* Zero out the descriptor ring */
4930 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4932 tx_ring
->next_to_use
= 0;
4933 tx_ring
->next_to_clean
= 0;
4937 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4938 * @adapter: board private structure
4940 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4944 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4945 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4949 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4950 * @adapter: board private structure
4952 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4956 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4957 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4960 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4962 struct hlist_node
*node2
;
4963 struct ixgbe_fdir_filter
*filter
;
4965 spin_lock(&adapter
->fdir_perfect_lock
);
4967 hlist_for_each_entry_safe(filter
, node2
,
4968 &adapter
->fdir_filter_list
, fdir_node
) {
4969 hlist_del(&filter
->fdir_node
);
4972 adapter
->fdir_filter_count
= 0;
4974 spin_unlock(&adapter
->fdir_perfect_lock
);
4977 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4979 struct net_device
*netdev
= adapter
->netdev
;
4980 struct ixgbe_hw
*hw
= &adapter
->hw
;
4981 struct net_device
*upper
;
4982 struct list_head
*iter
;
4986 /* signal that we are down to the interrupt handler */
4987 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
4988 return; /* do nothing if already down */
4990 /* disable receives */
4991 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4992 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4994 /* disable all enabled rx queues */
4995 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4996 /* this call also flushes the previous write */
4997 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4999 usleep_range(10000, 20000);
5001 netif_tx_stop_all_queues(netdev
);
5003 /* call carrier off first to avoid false dev_watchdog timeouts */
5004 netif_carrier_off(netdev
);
5005 netif_tx_disable(netdev
);
5007 /* disable any upper devices */
5008 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5009 if (netif_is_macvlan(upper
)) {
5010 struct macvlan_dev
*vlan
= netdev_priv(upper
);
5012 if (vlan
->fwd_priv
) {
5013 netif_tx_stop_all_queues(upper
);
5014 netif_carrier_off(upper
);
5015 netif_tx_disable(upper
);
5020 ixgbe_irq_disable(adapter
);
5022 ixgbe_napi_disable_all(adapter
);
5024 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
5025 IXGBE_FLAG2_RESET_REQUESTED
);
5026 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5028 del_timer_sync(&adapter
->service_timer
);
5030 if (adapter
->num_vfs
) {
5031 /* Clear EITR Select mapping */
5032 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
5034 /* Mark all the VFs as inactive */
5035 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
5036 adapter
->vfinfo
[i
].clear_to_send
= false;
5038 /* ping all the active vfs to let them know we are going down */
5039 ixgbe_ping_all_vfs(adapter
);
5041 /* Disable all VFTE/VFRE TX/RX */
5042 ixgbe_disable_tx_rx(adapter
);
5045 /* disable transmits in the hardware now that interrupts are off */
5046 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5047 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
5048 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5051 /* Disable the Tx DMA engine on 82599 and later MAC */
5052 switch (hw
->mac
.type
) {
5053 case ixgbe_mac_82599EB
:
5054 case ixgbe_mac_X540
:
5055 case ixgbe_mac_X550
:
5056 case ixgbe_mac_X550EM_x
:
5057 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
5058 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
5059 ~IXGBE_DMATXCTL_TE
));
5065 if (!pci_channel_offline(adapter
->pdev
))
5066 ixgbe_reset(adapter
);
5068 /* power down the optics for 82599 SFP+ fiber */
5069 if (hw
->mac
.ops
.disable_tx_laser
)
5070 hw
->mac
.ops
.disable_tx_laser(hw
);
5072 ixgbe_clean_all_tx_rings(adapter
);
5073 ixgbe_clean_all_rx_rings(adapter
);
5075 #ifdef CONFIG_IXGBE_DCA
5076 /* since we reset the hardware DCA settings were cleared */
5077 ixgbe_setup_dca(adapter
);
5082 * ixgbe_tx_timeout - Respond to a Tx Hang
5083 * @netdev: network interface device structure
5085 static void ixgbe_tx_timeout(struct net_device
*netdev
)
5087 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5089 /* Do the reset outside of interrupt context */
5090 ixgbe_tx_timeout_reset(adapter
);
5094 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5095 * @adapter: board private structure to initialize
5097 * ixgbe_sw_init initializes the Adapter private data structure.
5098 * Fields are initialized based on PCI device information and
5099 * OS network device settings (MTU size).
5101 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
5103 struct ixgbe_hw
*hw
= &adapter
->hw
;
5104 struct pci_dev
*pdev
= adapter
->pdev
;
5105 unsigned int rss
, fdir
;
5107 #ifdef CONFIG_IXGBE_DCB
5109 struct tc_configuration
*tc
;
5112 /* PCI config space info */
5114 hw
->vendor_id
= pdev
->vendor
;
5115 hw
->device_id
= pdev
->device
;
5116 hw
->revision_id
= pdev
->revision
;
5117 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
5118 hw
->subsystem_device_id
= pdev
->subsystem_device
;
5120 /* Set common capability flags and settings */
5121 rss
= min_t(int, ixgbe_max_rss_indices(adapter
), num_online_cpus());
5122 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
5123 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
5124 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
5125 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
5126 adapter
->atr_sample_rate
= 20;
5127 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
5128 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
5129 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
5130 #ifdef CONFIG_IXGBE_DCA
5131 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
5134 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
5135 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5136 #ifdef CONFIG_IXGBE_DCB
5137 /* Default traffic class to use for FCoE */
5138 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
5139 #endif /* CONFIG_IXGBE_DCB */
5140 #endif /* IXGBE_FCOE */
5142 adapter
->mac_table
= kzalloc(sizeof(struct ixgbe_mac_addr
) *
5143 hw
->mac
.num_rar_entries
,
5146 /* Set MAC specific capability flags and exceptions */
5147 switch (hw
->mac
.type
) {
5148 case ixgbe_mac_82598EB
:
5149 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
5150 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
5152 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
5153 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
5155 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
5156 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
5157 adapter
->atr_sample_rate
= 0;
5158 adapter
->fdir_pballoc
= 0;
5160 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5161 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5162 #ifdef CONFIG_IXGBE_DCB
5163 adapter
->fcoe
.up
= 0;
5164 #endif /* IXGBE_DCB */
5165 #endif /* IXGBE_FCOE */
5167 case ixgbe_mac_82599EB
:
5168 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5169 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5171 case ixgbe_mac_X540
:
5172 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM
);
5173 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5174 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5176 case ixgbe_mac_X550EM_x
:
5177 case ixgbe_mac_X550
:
5178 #ifdef CONFIG_IXGBE_DCA
5179 adapter
->flags
&= ~IXGBE_FLAG_DCA_CAPABLE
;
5187 /* FCoE support exists, always init the FCoE lock */
5188 spin_lock_init(&adapter
->fcoe
.lock
);
5191 /* n-tuple support exists, always init our spinlock */
5192 spin_lock_init(&adapter
->fdir_perfect_lock
);
5194 #ifdef CONFIG_IXGBE_DCB
5195 switch (hw
->mac
.type
) {
5196 case ixgbe_mac_X540
:
5197 case ixgbe_mac_X550
:
5198 case ixgbe_mac_X550EM_x
:
5199 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5200 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5203 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5204 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5208 /* Configure DCB traffic classes */
5209 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5210 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5211 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5212 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5213 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5214 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5215 tc
->dcb_pfc
= pfc_disabled
;
5218 /* Initialize default user to priority mapping, UPx->TC0 */
5219 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5220 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5221 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5223 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5224 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5225 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5226 adapter
->dcb_set_bitmap
= 0x00;
5227 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5228 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5229 sizeof(adapter
->temp_dcb_cfg
));
5233 /* default flow control settings */
5234 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5235 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5236 ixgbe_pbthresh_setup(adapter
);
5237 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5238 hw
->fc
.send_xon
= true;
5239 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5241 #ifdef CONFIG_PCI_IOV
5243 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5245 /* assign number of SR-IOV VFs */
5246 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5247 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5248 adapter
->num_vfs
= 0;
5249 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5251 adapter
->num_vfs
= max_vfs
;
5254 #endif /* CONFIG_PCI_IOV */
5256 /* enable itr by default in dynamic mode */
5257 adapter
->rx_itr_setting
= 1;
5258 adapter
->tx_itr_setting
= 1;
5260 /* set default ring sizes */
5261 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5262 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5264 /* set default work limits */
5265 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5267 /* initialize eeprom parameters */
5268 if (ixgbe_init_eeprom_params_generic(hw
)) {
5269 e_dev_err("EEPROM initialization failed\n");
5273 /* PF holds first pool slot */
5274 set_bit(0, &adapter
->fwd_bitmask
);
5275 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5281 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5282 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5284 * Return 0 on success, negative on failure
5286 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5288 struct device
*dev
= tx_ring
->dev
;
5289 int orig_node
= dev_to_node(dev
);
5293 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5295 if (tx_ring
->q_vector
)
5296 ring_node
= tx_ring
->q_vector
->numa_node
;
5298 tx_ring
->tx_buffer_info
= vzalloc_node(size
, ring_node
);
5299 if (!tx_ring
->tx_buffer_info
)
5300 tx_ring
->tx_buffer_info
= vzalloc(size
);
5301 if (!tx_ring
->tx_buffer_info
)
5304 u64_stats_init(&tx_ring
->syncp
);
5306 /* round up to nearest 4K */
5307 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5308 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5310 set_dev_node(dev
, ring_node
);
5311 tx_ring
->desc
= dma_alloc_coherent(dev
,
5315 set_dev_node(dev
, orig_node
);
5317 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5318 &tx_ring
->dma
, GFP_KERNEL
);
5322 tx_ring
->next_to_use
= 0;
5323 tx_ring
->next_to_clean
= 0;
5327 vfree(tx_ring
->tx_buffer_info
);
5328 tx_ring
->tx_buffer_info
= NULL
;
5329 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5334 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5335 * @adapter: board private structure
5337 * If this function returns with an error, then it's possible one or
5338 * more of the rings is populated (while the rest are not). It is the
5339 * callers duty to clean those orphaned rings.
5341 * Return 0 on success, negative on failure
5343 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5347 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5348 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5352 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5358 /* rewind the index freeing the rings as we go */
5360 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5365 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5366 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5368 * Returns 0 on success, negative on failure
5370 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5372 struct device
*dev
= rx_ring
->dev
;
5373 int orig_node
= dev_to_node(dev
);
5377 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5379 if (rx_ring
->q_vector
)
5380 ring_node
= rx_ring
->q_vector
->numa_node
;
5382 rx_ring
->rx_buffer_info
= vzalloc_node(size
, ring_node
);
5383 if (!rx_ring
->rx_buffer_info
)
5384 rx_ring
->rx_buffer_info
= vzalloc(size
);
5385 if (!rx_ring
->rx_buffer_info
)
5388 u64_stats_init(&rx_ring
->syncp
);
5390 /* Round up to nearest 4K */
5391 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5392 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5394 set_dev_node(dev
, ring_node
);
5395 rx_ring
->desc
= dma_alloc_coherent(dev
,
5399 set_dev_node(dev
, orig_node
);
5401 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5402 &rx_ring
->dma
, GFP_KERNEL
);
5406 rx_ring
->next_to_clean
= 0;
5407 rx_ring
->next_to_use
= 0;
5411 vfree(rx_ring
->rx_buffer_info
);
5412 rx_ring
->rx_buffer_info
= NULL
;
5413 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5418 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5419 * @adapter: board private structure
5421 * If this function returns with an error, then it's possible one or
5422 * more of the rings is populated (while the rest are not). It is the
5423 * callers duty to clean those orphaned rings.
5425 * Return 0 on success, negative on failure
5427 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5431 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5432 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5436 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5441 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5446 /* rewind the index freeing the rings as we go */
5448 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5453 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5454 * @tx_ring: Tx descriptor ring for a specific queue
5456 * Free all transmit software resources
5458 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5460 ixgbe_clean_tx_ring(tx_ring
);
5462 vfree(tx_ring
->tx_buffer_info
);
5463 tx_ring
->tx_buffer_info
= NULL
;
5465 /* if not set, then don't free */
5469 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5470 tx_ring
->desc
, tx_ring
->dma
);
5472 tx_ring
->desc
= NULL
;
5476 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5477 * @adapter: board private structure
5479 * Free all transmit software resources
5481 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5485 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5486 if (adapter
->tx_ring
[i
]->desc
)
5487 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5491 * ixgbe_free_rx_resources - Free Rx Resources
5492 * @rx_ring: ring to clean the resources from
5494 * Free all receive software resources
5496 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
5498 ixgbe_clean_rx_ring(rx_ring
);
5500 vfree(rx_ring
->rx_buffer_info
);
5501 rx_ring
->rx_buffer_info
= NULL
;
5503 /* if not set, then don't free */
5507 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
5508 rx_ring
->desc
, rx_ring
->dma
);
5510 rx_ring
->desc
= NULL
;
5514 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5515 * @adapter: board private structure
5517 * Free all receive software resources
5519 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5524 ixgbe_free_fcoe_ddp_resources(adapter
);
5527 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5528 if (adapter
->rx_ring
[i
]->desc
)
5529 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5533 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5534 * @netdev: network interface device structure
5535 * @new_mtu: new value for maximum frame size
5537 * Returns 0 on success, negative on failure
5539 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5541 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5542 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5544 /* MTU < 68 is an error and causes problems on some kernels */
5545 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5549 * For 82599EB we cannot allow legacy VFs to enable their receive
5550 * paths when MTU greater than 1500 is configured. So display a
5551 * warning that legacy VFs will be disabled.
5553 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
5554 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
5555 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
5556 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
5558 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5560 /* must set new MTU before calling down or up */
5561 netdev
->mtu
= new_mtu
;
5563 if (netif_running(netdev
))
5564 ixgbe_reinit_locked(adapter
);
5570 * ixgbe_open - Called when a network interface is made active
5571 * @netdev: network interface device structure
5573 * Returns 0 on success, negative value on failure
5575 * The open entry point is called when a network interface is made
5576 * active by the system (IFF_UP). At this point all resources needed
5577 * for transmit and receive operations are allocated, the interrupt
5578 * handler is registered with the OS, the watchdog timer is started,
5579 * and the stack is notified that the interface is ready.
5581 static int ixgbe_open(struct net_device
*netdev
)
5583 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5586 /* disallow open during test */
5587 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
5590 netif_carrier_off(netdev
);
5592 /* allocate transmit descriptors */
5593 err
= ixgbe_setup_all_tx_resources(adapter
);
5597 /* allocate receive descriptors */
5598 err
= ixgbe_setup_all_rx_resources(adapter
);
5602 ixgbe_configure(adapter
);
5604 err
= ixgbe_request_irq(adapter
);
5608 /* Notify the stack of the actual queue counts. */
5609 if (adapter
->num_rx_pools
> 1)
5610 queues
= adapter
->num_rx_queues_per_pool
;
5612 queues
= adapter
->num_tx_queues
;
5614 err
= netif_set_real_num_tx_queues(netdev
, queues
);
5616 goto err_set_queues
;
5618 if (adapter
->num_rx_pools
> 1 &&
5619 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
5620 queues
= IXGBE_MAX_L2A_QUEUES
;
5622 queues
= adapter
->num_rx_queues
;
5623 err
= netif_set_real_num_rx_queues(netdev
, queues
);
5625 goto err_set_queues
;
5627 ixgbe_ptp_init(adapter
);
5629 ixgbe_up_complete(adapter
);
5634 ixgbe_free_irq(adapter
);
5636 ixgbe_free_all_rx_resources(adapter
);
5638 ixgbe_free_all_tx_resources(adapter
);
5640 ixgbe_reset(adapter
);
5645 static void ixgbe_close_suspend(struct ixgbe_adapter
*adapter
)
5647 ixgbe_ptp_suspend(adapter
);
5649 ixgbe_down(adapter
);
5650 ixgbe_free_irq(adapter
);
5652 ixgbe_free_all_tx_resources(adapter
);
5653 ixgbe_free_all_rx_resources(adapter
);
5657 * ixgbe_close - Disables a network interface
5658 * @netdev: network interface device structure
5660 * Returns 0, this is not allowed to fail
5662 * The close entry point is called when an interface is de-activated
5663 * by the OS. The hardware is still under the drivers control, but
5664 * needs to be disabled. A global MAC reset is issued to stop the
5665 * hardware, and all transmit and receive resources are freed.
5667 static int ixgbe_close(struct net_device
*netdev
)
5669 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5671 ixgbe_ptp_stop(adapter
);
5673 ixgbe_close_suspend(adapter
);
5675 ixgbe_fdir_filter_exit(adapter
);
5677 ixgbe_release_hw_control(adapter
);
5683 static int ixgbe_resume(struct pci_dev
*pdev
)
5685 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5686 struct net_device
*netdev
= adapter
->netdev
;
5689 adapter
->hw
.hw_addr
= adapter
->io_addr
;
5690 pci_set_power_state(pdev
, PCI_D0
);
5691 pci_restore_state(pdev
);
5693 * pci_restore_state clears dev->state_saved so call
5694 * pci_save_state to restore it.
5696 pci_save_state(pdev
);
5698 err
= pci_enable_device_mem(pdev
);
5700 e_dev_err("Cannot enable PCI device from suspend\n");
5703 smp_mb__before_atomic();
5704 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
5705 pci_set_master(pdev
);
5707 pci_wake_from_d3(pdev
, false);
5709 ixgbe_reset(adapter
);
5711 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5714 err
= ixgbe_init_interrupt_scheme(adapter
);
5715 if (!err
&& netif_running(netdev
))
5716 err
= ixgbe_open(netdev
);
5723 netif_device_attach(netdev
);
5727 #endif /* CONFIG_PM */
5729 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5731 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5732 struct net_device
*netdev
= adapter
->netdev
;
5733 struct ixgbe_hw
*hw
= &adapter
->hw
;
5735 u32 wufc
= adapter
->wol
;
5740 netif_device_detach(netdev
);
5743 if (netif_running(netdev
))
5744 ixgbe_close_suspend(adapter
);
5747 ixgbe_clear_interrupt_scheme(adapter
);
5750 retval
= pci_save_state(pdev
);
5755 if (hw
->mac
.ops
.stop_link_on_d3
)
5756 hw
->mac
.ops
.stop_link_on_d3(hw
);
5759 ixgbe_set_rx_mode(netdev
);
5761 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5762 if (hw
->mac
.ops
.enable_tx_laser
)
5763 hw
->mac
.ops
.enable_tx_laser(hw
);
5765 /* turn on all-multi mode if wake on multicast is enabled */
5766 if (wufc
& IXGBE_WUFC_MC
) {
5767 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5768 fctrl
|= IXGBE_FCTRL_MPE
;
5769 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5772 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5773 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5774 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5776 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5778 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5779 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5782 switch (hw
->mac
.type
) {
5783 case ixgbe_mac_82598EB
:
5784 pci_wake_from_d3(pdev
, false);
5786 case ixgbe_mac_82599EB
:
5787 case ixgbe_mac_X540
:
5788 case ixgbe_mac_X550
:
5789 case ixgbe_mac_X550EM_x
:
5790 pci_wake_from_d3(pdev
, !!wufc
);
5796 *enable_wake
= !!wufc
;
5798 ixgbe_release_hw_control(adapter
);
5800 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
5801 pci_disable_device(pdev
);
5807 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5812 retval
= __ixgbe_shutdown(pdev
, &wake
);
5817 pci_prepare_to_sleep(pdev
);
5819 pci_wake_from_d3(pdev
, false);
5820 pci_set_power_state(pdev
, PCI_D3hot
);
5825 #endif /* CONFIG_PM */
5827 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5831 __ixgbe_shutdown(pdev
, &wake
);
5833 if (system_state
== SYSTEM_POWER_OFF
) {
5834 pci_wake_from_d3(pdev
, wake
);
5835 pci_set_power_state(pdev
, PCI_D3hot
);
5840 * ixgbe_update_stats - Update the board statistics counters.
5841 * @adapter: board private structure
5843 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5845 struct net_device
*netdev
= adapter
->netdev
;
5846 struct ixgbe_hw
*hw
= &adapter
->hw
;
5847 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5849 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5850 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5851 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5852 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5854 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5855 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5858 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5861 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5862 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5863 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5865 adapter
->rsc_total_count
= rsc_count
;
5866 adapter
->rsc_total_flush
= rsc_flush
;
5869 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5870 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5871 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5872 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5873 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5874 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5875 bytes
+= rx_ring
->stats
.bytes
;
5876 packets
+= rx_ring
->stats
.packets
;
5878 adapter
->non_eop_descs
= non_eop_descs
;
5879 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5880 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5881 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5882 netdev
->stats
.rx_bytes
= bytes
;
5883 netdev
->stats
.rx_packets
= packets
;
5887 /* gather some stats to the adapter struct that are per queue */
5888 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5889 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5890 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5891 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5892 bytes
+= tx_ring
->stats
.bytes
;
5893 packets
+= tx_ring
->stats
.packets
;
5895 adapter
->restart_queue
= restart_queue
;
5896 adapter
->tx_busy
= tx_busy
;
5897 netdev
->stats
.tx_bytes
= bytes
;
5898 netdev
->stats
.tx_packets
= packets
;
5900 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5902 /* 8 register reads */
5903 for (i
= 0; i
< 8; i
++) {
5904 /* for packet buffers not used, the register should read 0 */
5905 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5907 hwstats
->mpc
[i
] += mpc
;
5908 total_mpc
+= hwstats
->mpc
[i
];
5909 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5910 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5911 switch (hw
->mac
.type
) {
5912 case ixgbe_mac_82598EB
:
5913 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5914 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5915 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5916 hwstats
->pxonrxc
[i
] +=
5917 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5919 case ixgbe_mac_82599EB
:
5920 case ixgbe_mac_X540
:
5921 case ixgbe_mac_X550
:
5922 case ixgbe_mac_X550EM_x
:
5923 hwstats
->pxonrxc
[i
] +=
5924 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5931 /*16 register reads */
5932 for (i
= 0; i
< 16; i
++) {
5933 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5934 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5935 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5936 (hw
->mac
.type
== ixgbe_mac_X540
) ||
5937 (hw
->mac
.type
== ixgbe_mac_X550
) ||
5938 (hw
->mac
.type
== ixgbe_mac_X550EM_x
)) {
5939 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5940 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5941 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5942 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5946 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5947 /* work around hardware counting issue */
5948 hwstats
->gprc
-= missed_rx
;
5950 ixgbe_update_xoff_received(adapter
);
5952 /* 82598 hardware only has a 32 bit counter in the high register */
5953 switch (hw
->mac
.type
) {
5954 case ixgbe_mac_82598EB
:
5955 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5956 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5957 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5958 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5960 case ixgbe_mac_X540
:
5961 case ixgbe_mac_X550
:
5962 case ixgbe_mac_X550EM_x
:
5963 /* OS2BMC stats are X540 and later */
5964 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5965 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5966 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5967 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5968 case ixgbe_mac_82599EB
:
5969 for (i
= 0; i
< 16; i
++)
5970 adapter
->hw_rx_no_dma_resources
+=
5971 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5972 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5973 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5974 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5975 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5976 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5977 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5978 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5979 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5980 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5982 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5983 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5984 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5985 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5986 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5987 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5988 /* Add up per cpu counters for total ddp aloc fail */
5989 if (adapter
->fcoe
.ddp_pool
) {
5990 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5991 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
5993 u64 noddp
= 0, noddp_ext_buff
= 0;
5994 for_each_possible_cpu(cpu
) {
5995 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
5996 noddp
+= ddp_pool
->noddp
;
5997 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
5999 hwstats
->fcoe_noddp
= noddp
;
6000 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
6002 #endif /* IXGBE_FCOE */
6007 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
6008 hwstats
->bprc
+= bprc
;
6009 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
6010 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6011 hwstats
->mprc
-= bprc
;
6012 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
6013 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
6014 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
6015 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
6016 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
6017 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
6018 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
6019 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
6020 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
6021 hwstats
->lxontxc
+= lxon
;
6022 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
6023 hwstats
->lxofftxc
+= lxoff
;
6024 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
6025 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
6027 * 82598 errata - tx of flow control packets is included in tx counters
6029 xon_off_tot
= lxon
+ lxoff
;
6030 hwstats
->gptc
-= xon_off_tot
;
6031 hwstats
->mptc
-= xon_off_tot
;
6032 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
6033 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
6034 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
6035 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
6036 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
6037 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
6038 hwstats
->ptc64
-= xon_off_tot
;
6039 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
6040 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
6041 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
6042 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
6043 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
6044 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
6046 /* Fill out the OS statistics structure */
6047 netdev
->stats
.multicast
= hwstats
->mprc
;
6050 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
6051 netdev
->stats
.rx_dropped
= 0;
6052 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
6053 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
6054 netdev
->stats
.rx_missed_errors
= total_mpc
;
6058 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6059 * @adapter: pointer to the device adapter structure
6061 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
6063 struct ixgbe_hw
*hw
= &adapter
->hw
;
6066 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
6069 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
6071 /* if interface is down do nothing */
6072 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6075 /* do nothing if we are not using signature filters */
6076 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
6079 adapter
->fdir_overflow
++;
6081 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
6082 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6083 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
6084 &(adapter
->tx_ring
[i
]->state
));
6085 /* re-enable flow director interrupts */
6086 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
6088 e_err(probe
, "failed to finish FDIR re-initialization, "
6089 "ignored adding FDIR ATR filters\n");
6094 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6095 * @adapter: pointer to the device adapter structure
6097 * This function serves two purposes. First it strobes the interrupt lines
6098 * in order to make certain interrupts are occurring. Secondly it sets the
6099 * bits needed to check for TX hangs. As a result we should immediately
6100 * determine if a hang has occurred.
6102 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
6104 struct ixgbe_hw
*hw
= &adapter
->hw
;
6108 /* If we're down, removing or resetting, just bail */
6109 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6110 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6111 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6114 /* Force detection of hung controller */
6115 if (netif_carrier_ok(adapter
->netdev
)) {
6116 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6117 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
6120 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6122 * for legacy and MSI interrupts don't set any bits
6123 * that are enabled for EIAM, because this operation
6124 * would set *both* EIMS and EICS for any bit in EIAM
6126 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
6127 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
6129 /* get one bit for every active tx/rx interrupt vector */
6130 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
6131 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
6132 if (qv
->rx
.ring
|| qv
->tx
.ring
)
6133 eics
|= ((u64
)1 << i
);
6137 /* Cause software interrupt to ensure rings are cleaned */
6138 ixgbe_irq_rearm_queues(adapter
, eics
);
6143 * ixgbe_watchdog_update_link - update the link status
6144 * @adapter: pointer to the device adapter structure
6145 * @link_speed: pointer to a u32 to store the link_speed
6147 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
6149 struct ixgbe_hw
*hw
= &adapter
->hw
;
6150 u32 link_speed
= adapter
->link_speed
;
6151 bool link_up
= adapter
->link_up
;
6152 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
6154 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6157 if (hw
->mac
.ops
.check_link
) {
6158 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
6160 /* always assume link is up, if no check link function */
6161 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6165 if (adapter
->ixgbe_ieee_pfc
)
6166 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
6168 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
6169 hw
->mac
.ops
.fc_enable(hw
);
6170 ixgbe_set_rx_drop_en(adapter
);
6174 time_after(jiffies
, (adapter
->link_check_timeout
+
6175 IXGBE_TRY_LINK_TIMEOUT
))) {
6176 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6177 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
6178 IXGBE_WRITE_FLUSH(hw
);
6181 adapter
->link_up
= link_up
;
6182 adapter
->link_speed
= link_speed
;
6185 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
6187 #ifdef CONFIG_IXGBE_DCB
6188 struct net_device
*netdev
= adapter
->netdev
;
6189 struct dcb_app app
= {
6190 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6195 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6196 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6198 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6203 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6204 * print link up message
6205 * @adapter: pointer to the device adapter structure
6207 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6209 struct net_device
*netdev
= adapter
->netdev
;
6210 struct ixgbe_hw
*hw
= &adapter
->hw
;
6211 struct net_device
*upper
;
6212 struct list_head
*iter
;
6213 u32 link_speed
= adapter
->link_speed
;
6214 bool flow_rx
, flow_tx
;
6216 /* only continue if link was previously down */
6217 if (netif_carrier_ok(netdev
))
6220 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6222 switch (hw
->mac
.type
) {
6223 case ixgbe_mac_82598EB
: {
6224 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6225 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6226 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6227 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6230 case ixgbe_mac_X540
:
6231 case ixgbe_mac_X550
:
6232 case ixgbe_mac_X550EM_x
:
6233 case ixgbe_mac_82599EB
: {
6234 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6235 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6236 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6237 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6246 adapter
->last_rx_ptp_check
= jiffies
;
6248 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6249 ixgbe_ptp_start_cyclecounter(adapter
);
6251 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
6252 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
6254 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
6256 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
6259 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6261 (flow_tx
? "TX" : "None"))));
6263 netif_carrier_on(netdev
);
6264 ixgbe_check_vf_rate_limit(adapter
);
6266 /* enable transmits */
6267 netif_tx_wake_all_queues(adapter
->netdev
);
6269 /* enable any upper devices */
6271 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
6272 if (netif_is_macvlan(upper
)) {
6273 struct macvlan_dev
*vlan
= netdev_priv(upper
);
6276 netif_tx_wake_all_queues(upper
);
6281 /* update the default user priority for VFs */
6282 ixgbe_update_default_up(adapter
);
6284 /* ping all the active vfs to let them know link has changed */
6285 ixgbe_ping_all_vfs(adapter
);
6289 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6290 * print link down message
6291 * @adapter: pointer to the adapter structure
6293 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6295 struct net_device
*netdev
= adapter
->netdev
;
6296 struct ixgbe_hw
*hw
= &adapter
->hw
;
6298 adapter
->link_up
= false;
6299 adapter
->link_speed
= 0;
6301 /* only continue if link was up previously */
6302 if (!netif_carrier_ok(netdev
))
6305 /* poll for SFP+ cable when link is down */
6306 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6307 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6309 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6310 ixgbe_ptp_start_cyclecounter(adapter
);
6312 e_info(drv
, "NIC Link is Down\n");
6313 netif_carrier_off(netdev
);
6315 /* ping all the active vfs to let them know link has changed */
6316 ixgbe_ping_all_vfs(adapter
);
6319 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter
*adapter
)
6323 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6324 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6326 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
)
6333 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter
*adapter
)
6335 struct ixgbe_hw
*hw
= &adapter
->hw
;
6336 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
6337 u32 q_per_pool
= __ALIGN_MASK(1, ~vmdq
->mask
);
6341 if (!adapter
->num_vfs
)
6344 /* resetting the PF is only needed for MAC before X550 */
6345 if (hw
->mac
.type
>= ixgbe_mac_X550
)
6348 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
6349 for (j
= 0; j
< q_per_pool
; j
++) {
6352 h
= IXGBE_READ_REG(hw
, IXGBE_PVFTDHN(q_per_pool
, i
, j
));
6353 t
= IXGBE_READ_REG(hw
, IXGBE_PVFTDTN(q_per_pool
, i
, j
));
6364 * ixgbe_watchdog_flush_tx - flush queues on link down
6365 * @adapter: pointer to the device adapter structure
6367 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6369 if (!netif_carrier_ok(adapter
->netdev
)) {
6370 if (ixgbe_ring_tx_pending(adapter
) ||
6371 ixgbe_vf_tx_pending(adapter
)) {
6372 /* We've lost link, so the controller stops DMA,
6373 * but we've got queued Tx work that's never going
6374 * to get done, so reset controller to flush Tx.
6375 * (Do the reset outside of interrupt context).
6377 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6378 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6383 #ifdef CONFIG_PCI_IOV
6384 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter
*adapter
,
6385 struct pci_dev
*vfdev
)
6387 if (!pci_wait_for_pending_transaction(vfdev
))
6388 e_dev_warn("Issuing VFLR with pending transactions\n");
6390 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev
));
6391 pcie_capability_set_word(vfdev
, PCI_EXP_DEVCTL
, PCI_EXP_DEVCTL_BCR_FLR
);
6396 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6398 struct ixgbe_hw
*hw
= &adapter
->hw
;
6399 struct pci_dev
*pdev
= adapter
->pdev
;
6400 struct pci_dev
*vfdev
;
6403 unsigned short vf_id
;
6405 if (!(netif_carrier_ok(adapter
->netdev
)))
6408 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6409 if (gpc
) /* If incrementing then no need for the check below */
6411 /* Check to see if a bad DMA write target from an errant or
6412 * malicious VF has caused a PCIe error. If so then we can
6413 * issue a VFLR to the offending VF(s) and then resume without
6414 * requesting a full slot reset.
6420 pos
= pci_find_ext_capability(pdev
, PCI_EXT_CAP_ID_SRIOV
);
6424 /* get the device ID for the VF */
6425 pci_read_config_word(pdev
, pos
+ PCI_SRIOV_VF_DID
, &vf_id
);
6427 /* check status reg for all VFs owned by this PF */
6428 vfdev
= pci_get_device(pdev
->vendor
, vf_id
, NULL
);
6430 if (vfdev
->is_virtfn
&& (vfdev
->physfn
== pdev
)) {
6433 pci_read_config_word(vfdev
, PCI_STATUS
, &status_reg
);
6434 if (status_reg
& PCI_STATUS_REC_MASTER_ABORT
)
6436 ixgbe_issue_vf_flr(adapter
, vfdev
);
6439 vfdev
= pci_get_device(pdev
->vendor
, vf_id
, vfdev
);
6443 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
6447 /* Do not perform spoof check for 82598 or if not in IOV mode */
6448 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
6449 adapter
->num_vfs
== 0)
6452 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
6455 * ssvpc register is cleared on read, if zero then no
6456 * spoofed packets in the last interval.
6461 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
6464 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused
*adapter
)
6469 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused
*adapter
)
6472 #endif /* CONFIG_PCI_IOV */
6476 * ixgbe_watchdog_subtask - check and bring link up
6477 * @adapter: pointer to the device adapter structure
6479 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
6481 /* if interface is down, removing or resetting, do nothing */
6482 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6483 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6484 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6487 ixgbe_watchdog_update_link(adapter
);
6489 if (adapter
->link_up
)
6490 ixgbe_watchdog_link_is_up(adapter
);
6492 ixgbe_watchdog_link_is_down(adapter
);
6494 ixgbe_check_for_bad_vf(adapter
);
6495 ixgbe_spoof_check(adapter
);
6496 ixgbe_update_stats(adapter
);
6498 ixgbe_watchdog_flush_tx(adapter
);
6502 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6503 * @adapter: the ixgbe adapter structure
6505 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
6507 struct ixgbe_hw
*hw
= &adapter
->hw
;
6510 /* not searching for SFP so there is nothing to do here */
6511 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
6512 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6515 /* someone else is in init, wait until next service event */
6516 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6519 err
= hw
->phy
.ops
.identify_sfp(hw
);
6520 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6523 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
6524 /* If no cable is present, then we need to reset
6525 * the next time we find a good cable. */
6526 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
6533 /* exit if reset not needed */
6534 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6537 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
6540 * A module may be identified correctly, but the EEPROM may not have
6541 * support for that module. setup_sfp() will fail in that case, so
6542 * we should not allow that module to load.
6544 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6545 err
= hw
->phy
.ops
.reset(hw
);
6547 err
= hw
->mac
.ops
.setup_sfp(hw
);
6549 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6552 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
6553 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
6556 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6558 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
6559 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
6560 e_dev_err("failed to initialize because an unsupported "
6561 "SFP+ module type was detected.\n");
6562 e_dev_err("Reload the driver after installing a "
6563 "supported module.\n");
6564 unregister_netdev(adapter
->netdev
);
6569 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6570 * @adapter: the ixgbe adapter structure
6572 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
6574 struct ixgbe_hw
*hw
= &adapter
->hw
;
6576 bool autoneg
= false;
6578 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
6581 /* someone else is in init, wait until next service event */
6582 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6585 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
6587 speed
= hw
->phy
.autoneg_advertised
;
6588 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
6589 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
6591 /* setup the highest link when no autoneg */
6593 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
6594 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6598 if (hw
->mac
.ops
.setup_link
)
6599 hw
->mac
.ops
.setup_link(hw
, speed
, true);
6601 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
6602 adapter
->link_check_timeout
= jiffies
;
6603 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6607 * ixgbe_service_timer - Timer Call-back
6608 * @data: pointer to adapter cast into an unsigned long
6610 static void ixgbe_service_timer(unsigned long data
)
6612 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
6613 unsigned long next_event_offset
;
6615 /* poll faster when waiting for link */
6616 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
6617 next_event_offset
= HZ
/ 10;
6619 next_event_offset
= HZ
* 2;
6621 /* Reset the timer */
6622 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
6624 ixgbe_service_event_schedule(adapter
);
6627 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
6629 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
6632 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
6634 /* If we're already down, removing or resetting, just bail */
6635 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6636 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6637 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6640 ixgbe_dump(adapter
);
6641 netdev_err(adapter
->netdev
, "Reset adapter\n");
6642 adapter
->tx_timeout_count
++;
6645 ixgbe_reinit_locked(adapter
);
6650 * ixgbe_service_task - manages and runs subtasks
6651 * @work: pointer to work_struct containing our data
6653 static void ixgbe_service_task(struct work_struct
*work
)
6655 struct ixgbe_adapter
*adapter
= container_of(work
,
6656 struct ixgbe_adapter
,
6658 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
6659 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
6661 ixgbe_down(adapter
);
6664 ixgbe_service_event_complete(adapter
);
6667 ixgbe_reset_subtask(adapter
);
6668 ixgbe_sfp_detection_subtask(adapter
);
6669 ixgbe_sfp_link_config_subtask(adapter
);
6670 ixgbe_check_overtemp_subtask(adapter
);
6671 ixgbe_watchdog_subtask(adapter
);
6672 ixgbe_fdir_reinit_subtask(adapter
);
6673 ixgbe_check_hang_subtask(adapter
);
6675 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
6676 ixgbe_ptp_overflow_check(adapter
);
6677 ixgbe_ptp_rx_hang(adapter
);
6680 ixgbe_service_event_complete(adapter
);
6683 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
6684 struct ixgbe_tx_buffer
*first
,
6687 struct sk_buff
*skb
= first
->skb
;
6688 u32 vlan_macip_lens
, type_tucmd
;
6689 u32 mss_l4len_idx
, l4len
;
6692 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
6695 if (!skb_is_gso(skb
))
6698 err
= skb_cow_head(skb
, 0);
6702 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6703 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6705 if (first
->protocol
== htons(ETH_P_IP
)) {
6706 struct iphdr
*iph
= ip_hdr(skb
);
6709 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
6713 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6714 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6715 IXGBE_TX_FLAGS_CSUM
|
6716 IXGBE_TX_FLAGS_IPV4
;
6717 } else if (skb_is_gso_v6(skb
)) {
6718 ipv6_hdr(skb
)->payload_len
= 0;
6719 tcp_hdr(skb
)->check
=
6720 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
6721 &ipv6_hdr(skb
)->daddr
,
6723 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6724 IXGBE_TX_FLAGS_CSUM
;
6727 /* compute header lengths */
6728 l4len
= tcp_hdrlen(skb
);
6729 *hdr_len
= skb_transport_offset(skb
) + l4len
;
6731 /* update gso size and bytecount with header size */
6732 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
6733 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
6735 /* mss_l4len_id: use 0 as index for TSO */
6736 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
6737 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
6739 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6740 vlan_macip_lens
= skb_network_header_len(skb
);
6741 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6742 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6744 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
6750 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
6751 struct ixgbe_tx_buffer
*first
)
6753 struct sk_buff
*skb
= first
->skb
;
6754 u32 vlan_macip_lens
= 0;
6755 u32 mss_l4len_idx
= 0;
6758 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
6759 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
6760 !(first
->tx_flags
& IXGBE_TX_FLAGS_CC
))
6764 switch (first
->protocol
) {
6765 case htons(ETH_P_IP
):
6766 vlan_macip_lens
|= skb_network_header_len(skb
);
6767 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6768 l4_hdr
= ip_hdr(skb
)->protocol
;
6770 case htons(ETH_P_IPV6
):
6771 vlan_macip_lens
|= skb_network_header_len(skb
);
6772 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
6775 if (unlikely(net_ratelimit())) {
6776 dev_warn(tx_ring
->dev
,
6777 "partial checksum but proto=%x!\n",
6785 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6786 mss_l4len_idx
= tcp_hdrlen(skb
) <<
6787 IXGBE_ADVTXD_L4LEN_SHIFT
;
6790 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
6791 mss_l4len_idx
= sizeof(struct sctphdr
) <<
6792 IXGBE_ADVTXD_L4LEN_SHIFT
;
6795 mss_l4len_idx
= sizeof(struct udphdr
) <<
6796 IXGBE_ADVTXD_L4LEN_SHIFT
;
6799 if (unlikely(net_ratelimit())) {
6800 dev_warn(tx_ring
->dev
,
6801 "partial checksum but l4 proto=%x!\n",
6807 /* update TX checksum flag */
6808 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6811 /* vlan_macip_lens: MACLEN, VLAN tag */
6812 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6813 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6815 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
6816 type_tucmd
, mss_l4len_idx
);
6819 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6820 ((_flag <= _result) ? \
6821 ((u32)(_input & _flag) * (_result / _flag)) : \
6822 ((u32)(_input & _flag) / (_flag / _result)))
6824 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
6826 /* set type for advanced descriptor with frame checksum insertion */
6827 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
6828 IXGBE_ADVTXD_DCMD_DEXT
|
6829 IXGBE_ADVTXD_DCMD_IFCS
;
6831 /* set HW vlan bit if vlan is present */
6832 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
6833 IXGBE_ADVTXD_DCMD_VLE
);
6835 /* set segmentation enable bits for TSO/FSO */
6836 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
6837 IXGBE_ADVTXD_DCMD_TSE
);
6839 /* set timestamp bit if present */
6840 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
6841 IXGBE_ADVTXD_MAC_TSTAMP
);
6843 /* insert frame checksum */
6844 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
6849 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
6850 u32 tx_flags
, unsigned int paylen
)
6852 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
6854 /* enable L4 checksum for TSO and TX checksum offload */
6855 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6856 IXGBE_TX_FLAGS_CSUM
,
6857 IXGBE_ADVTXD_POPTS_TXSM
);
6859 /* enble IPv4 checksum for TSO */
6860 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6861 IXGBE_TX_FLAGS_IPV4
,
6862 IXGBE_ADVTXD_POPTS_IXSM
);
6865 * Check Context must be set if Tx switch is enabled, which it
6866 * always is for case where virtual functions are running
6868 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6872 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
6875 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6877 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6879 /* Herbert's original patch had:
6880 * smp_mb__after_netif_stop_queue();
6881 * but since that doesn't exist yet, just open code it.
6885 /* We need to check again in a case another CPU has just
6886 * made room available.
6888 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6891 /* A reprieve! - use start_queue because it doesn't call schedule */
6892 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6893 ++tx_ring
->tx_stats
.restart_queue
;
6897 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6899 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6902 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6905 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6908 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
6909 struct ixgbe_tx_buffer
*first
,
6912 struct sk_buff
*skb
= first
->skb
;
6913 struct ixgbe_tx_buffer
*tx_buffer
;
6914 union ixgbe_adv_tx_desc
*tx_desc
;
6915 struct skb_frag_struct
*frag
;
6917 unsigned int data_len
, size
;
6918 u32 tx_flags
= first
->tx_flags
;
6919 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
6920 u16 i
= tx_ring
->next_to_use
;
6922 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
6924 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
6926 size
= skb_headlen(skb
);
6927 data_len
= skb
->data_len
;
6930 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6931 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
6932 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
6935 data_len
-= sizeof(struct fcoe_crc_eof
);
6940 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
6944 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
6945 if (dma_mapping_error(tx_ring
->dev
, dma
))
6948 /* record length, and DMA address */
6949 dma_unmap_len_set(tx_buffer
, len
, size
);
6950 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6952 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6954 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
6955 tx_desc
->read
.cmd_type_len
=
6956 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
6960 if (i
== tx_ring
->count
) {
6961 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6964 tx_desc
->read
.olinfo_status
= 0;
6966 dma
+= IXGBE_MAX_DATA_PER_TXD
;
6967 size
-= IXGBE_MAX_DATA_PER_TXD
;
6969 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6972 if (likely(!data_len
))
6975 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
6979 if (i
== tx_ring
->count
) {
6980 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6983 tx_desc
->read
.olinfo_status
= 0;
6986 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6988 size
= skb_frag_size(frag
);
6992 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6995 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6998 /* write last descriptor with RS and EOP bits */
6999 cmd_type
|= size
| IXGBE_TXD_CMD
;
7000 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
7002 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
7004 /* set the timestamp */
7005 first
->time_stamp
= jiffies
;
7008 * Force memory writes to complete before letting h/w know there
7009 * are new descriptors to fetch. (Only applicable for weak-ordered
7010 * memory model archs, such as IA-64).
7012 * We also need this memory barrier to make certain all of the
7013 * status bits have been updated before next_to_watch is written.
7017 /* set next_to_watch value indicating a packet is present */
7018 first
->next_to_watch
= tx_desc
;
7021 if (i
== tx_ring
->count
)
7024 tx_ring
->next_to_use
= i
;
7026 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7028 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
7029 writel(i
, tx_ring
->tail
);
7031 /* we need this if more than one processor can write to our tail
7032 * at a time, it synchronizes IO on IA64/Altix systems
7039 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
7041 /* clear dma mappings for failed tx_buffer_info map */
7043 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7044 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
7045 if (tx_buffer
== first
)
7052 tx_ring
->next_to_use
= i
;
7055 static void ixgbe_atr(struct ixgbe_ring
*ring
,
7056 struct ixgbe_tx_buffer
*first
)
7058 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
7059 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
7060 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
7062 unsigned char *network
;
7064 struct ipv6hdr
*ipv6
;
7069 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7073 /* do nothing if sampling is disabled */
7074 if (!ring
->atr_sample_rate
)
7079 /* snag network header to get L4 type and address */
7080 hdr
.network
= skb_network_header(first
->skb
);
7082 /* Currently only IPv4/IPv6 with TCP is supported */
7083 if ((first
->protocol
!= htons(ETH_P_IPV6
) ||
7084 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
7085 (first
->protocol
!= htons(ETH_P_IP
) ||
7086 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
7089 th
= tcp_hdr(first
->skb
);
7091 /* skip this packet since it is invalid or the socket is closing */
7095 /* sample on all syn packets or once every atr sample count */
7096 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
7099 /* reset sample count */
7100 ring
->atr_count
= 0;
7102 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
7105 * src and dst are inverted, think how the receiver sees them
7107 * The input is broken into two sections, a non-compressed section
7108 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7109 * is XORed together and stored in the compressed dword.
7111 input
.formatted
.vlan_id
= vlan_id
;
7114 * since src port and flex bytes occupy the same word XOR them together
7115 * and write the value to source port portion of compressed dword
7117 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
7118 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
7120 common
.port
.src
^= th
->dest
^ first
->protocol
;
7121 common
.port
.dst
^= th
->source
;
7123 if (first
->protocol
== htons(ETH_P_IP
)) {
7124 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
7125 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
7127 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
7128 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
7129 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
7130 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
7131 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
7132 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
7133 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
7134 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
7135 hdr
.ipv6
->daddr
.s6_addr32
[3];
7138 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7139 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
7140 input
, common
, ring
->queue_index
);
7143 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
7144 void *accel_priv
, select_queue_fallback_t fallback
)
7146 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
7148 struct ixgbe_adapter
*adapter
;
7149 struct ixgbe_ring_feature
*f
;
7154 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
7159 * only execute the code below if protocol is FCoE
7160 * or FIP and we have FCoE enabled on the adapter
7162 switch (vlan_get_protocol(skb
)) {
7163 case htons(ETH_P_FCOE
):
7164 case htons(ETH_P_FIP
):
7165 adapter
= netdev_priv(dev
);
7167 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7170 return fallback(dev
, skb
);
7173 f
= &adapter
->ring_feature
[RING_F_FCOE
];
7175 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
7178 while (txq
>= f
->indices
)
7181 return txq
+ f
->offset
;
7183 return fallback(dev
, skb
);
7187 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
7188 struct ixgbe_adapter
*adapter
,
7189 struct ixgbe_ring
*tx_ring
)
7191 struct ixgbe_tx_buffer
*first
;
7195 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
7196 __be16 protocol
= skb
->protocol
;
7200 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7201 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7202 * + 2 desc gap to keep tail from touching head,
7203 * + 1 desc for context descriptor,
7204 * otherwise try next time
7206 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
7207 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
7209 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
7210 tx_ring
->tx_stats
.tx_busy
++;
7211 return NETDEV_TX_BUSY
;
7214 /* record the location of the first descriptor for this packet */
7215 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
7217 first
->bytecount
= skb
->len
;
7218 first
->gso_segs
= 1;
7220 /* if we have a HW VLAN tag being added default to the HW one */
7221 if (vlan_tx_tag_present(skb
)) {
7222 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
7223 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7224 /* else if it is a SW VLAN check the next protocol and store the tag */
7225 } else if (protocol
== htons(ETH_P_8021Q
)) {
7226 struct vlan_hdr
*vhdr
, _vhdr
;
7227 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
7231 protocol
= vhdr
->h_vlan_encapsulated_proto
;
7232 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
7233 IXGBE_TX_FLAGS_VLAN_SHIFT
;
7234 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
7237 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
7238 adapter
->ptp_clock
&&
7239 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
7241 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
7242 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
7244 /* schedule check for Tx timestamp */
7245 adapter
->ptp_tx_skb
= skb_get(skb
);
7246 adapter
->ptp_tx_start
= jiffies
;
7247 schedule_work(&adapter
->ptp_tx_work
);
7250 skb_tx_timestamp(skb
);
7252 #ifdef CONFIG_PCI_IOV
7254 * Use the l2switch_enable flag - would be false if the DMA
7255 * Tx switch had been disabled.
7257 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7258 tx_flags
|= IXGBE_TX_FLAGS_CC
;
7261 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7262 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7263 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7264 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7265 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7266 tx_flags
|= (skb
->priority
& 0x7) <<
7267 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7268 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7269 struct vlan_ethhdr
*vhdr
;
7271 if (skb_cow_head(skb
, 0))
7273 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7274 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7275 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7277 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7281 /* record initial flags and protocol */
7282 first
->tx_flags
= tx_flags
;
7283 first
->protocol
= protocol
;
7286 /* setup tx offload for FCoE */
7287 if ((protocol
== htons(ETH_P_FCOE
)) &&
7288 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7289 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7296 #endif /* IXGBE_FCOE */
7297 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7301 ixgbe_tx_csum(tx_ring
, first
);
7303 /* add the ATR filter if ATR is on */
7304 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7305 ixgbe_atr(tx_ring
, first
);
7309 #endif /* IXGBE_FCOE */
7310 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7312 return NETDEV_TX_OK
;
7315 dev_kfree_skb_any(first
->skb
);
7318 return NETDEV_TX_OK
;
7321 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7322 struct net_device
*netdev
,
7323 struct ixgbe_ring
*ring
)
7325 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7326 struct ixgbe_ring
*tx_ring
;
7329 * The minimum packet size for olinfo paylen is 17 so pad the skb
7330 * in order to meet this minimum size requirement.
7332 if (skb_put_padto(skb
, 17))
7333 return NETDEV_TX_OK
;
7335 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7337 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7340 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7341 struct net_device
*netdev
)
7343 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7347 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7348 * @netdev: network interface device structure
7349 * @p: pointer to an address structure
7351 * Returns 0 on success, negative on failure
7353 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
7355 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7356 struct ixgbe_hw
*hw
= &adapter
->hw
;
7357 struct sockaddr
*addr
= p
;
7360 if (!is_valid_ether_addr(addr
->sa_data
))
7361 return -EADDRNOTAVAIL
;
7363 ixgbe_del_mac_filter(adapter
, hw
->mac
.addr
, VMDQ_P(0));
7364 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
7365 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
7367 ret
= ixgbe_add_mac_filter(adapter
, hw
->mac
.addr
, VMDQ_P(0));
7368 return ret
> 0 ? 0 : ret
;
7372 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
7374 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7375 struct ixgbe_hw
*hw
= &adapter
->hw
;
7379 if (prtad
!= hw
->phy
.mdio
.prtad
)
7381 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
7387 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
7388 u16 addr
, u16 value
)
7390 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7391 struct ixgbe_hw
*hw
= &adapter
->hw
;
7393 if (prtad
!= hw
->phy
.mdio
.prtad
)
7395 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
7398 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
7400 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7404 return ixgbe_ptp_set_ts_config(adapter
, req
);
7406 return ixgbe_ptp_get_ts_config(adapter
, req
);
7408 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
7413 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7415 * @netdev: network interface device structure
7417 * Returns non-zero on failure
7419 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
7422 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7423 struct ixgbe_hw
*hw
= &adapter
->hw
;
7425 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
7427 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
7430 /* update SAN MAC vmdq pool selection */
7431 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
7437 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7439 * @netdev: network interface device structure
7441 * Returns non-zero on failure
7443 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
7446 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7447 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
7449 if (is_valid_ether_addr(mac
->san_addr
)) {
7451 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
7457 #ifdef CONFIG_NET_POLL_CONTROLLER
7459 * Polling 'interrupt' - used by things like netconsole to send skbs
7460 * without having to re-enable interrupts. It's not called while
7461 * the interrupt routine is executing.
7463 static void ixgbe_netpoll(struct net_device
*netdev
)
7465 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7468 /* if interface is down do nothing */
7469 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
7472 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
7473 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
7474 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
7475 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
7477 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
7479 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
7483 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
7484 struct rtnl_link_stats64
*stats
)
7486 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7490 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
7491 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
7497 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
7498 packets
= ring
->stats
.packets
;
7499 bytes
= ring
->stats
.bytes
;
7500 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
7501 stats
->rx_packets
+= packets
;
7502 stats
->rx_bytes
+= bytes
;
7506 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
7507 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
7513 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
7514 packets
= ring
->stats
.packets
;
7515 bytes
= ring
->stats
.bytes
;
7516 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
7517 stats
->tx_packets
+= packets
;
7518 stats
->tx_bytes
+= bytes
;
7522 /* following stats updated by ixgbe_watchdog_task() */
7523 stats
->multicast
= netdev
->stats
.multicast
;
7524 stats
->rx_errors
= netdev
->stats
.rx_errors
;
7525 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
7526 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
7527 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
7531 #ifdef CONFIG_IXGBE_DCB
7533 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7534 * @adapter: pointer to ixgbe_adapter
7535 * @tc: number of traffic classes currently enabled
7537 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7538 * 802.1Q priority maps to a packet buffer that exists.
7540 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
7542 struct ixgbe_hw
*hw
= &adapter
->hw
;
7546 /* 82598 have a static priority to TC mapping that can not
7547 * be changed so no validation is needed.
7549 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7552 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
7555 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
7556 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
7558 /* If up2tc is out of bounds default to zero */
7560 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
7564 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
7570 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7571 * @adapter: Pointer to adapter struct
7573 * Populate the netdev user priority to tc map
7575 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
7577 struct net_device
*dev
= adapter
->netdev
;
7578 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
7579 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
7582 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
7585 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
7586 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
7588 tc
= ets
->prio_tc
[prio
];
7590 netdev_set_prio_tc_map(dev
, prio
, tc
);
7594 #endif /* CONFIG_IXGBE_DCB */
7596 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7598 * @netdev: net device to configure
7599 * @tc: number of traffic classes to enable
7601 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
7603 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7604 struct ixgbe_hw
*hw
= &adapter
->hw
;
7607 /* Hardware supports up to 8 traffic classes */
7608 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
7609 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
7610 tc
< MAX_TRAFFIC_CLASS
))
7613 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
7614 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
7617 /* Hardware has to reinitialize queues and interrupts to
7618 * match packet buffer alignment. Unfortunately, the
7619 * hardware is not flexible enough to do this dynamically.
7621 if (netif_running(dev
))
7623 ixgbe_clear_interrupt_scheme(adapter
);
7625 #ifdef CONFIG_IXGBE_DCB
7627 netdev_set_num_tc(dev
, tc
);
7628 ixgbe_set_prio_tc_map(adapter
);
7630 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
7632 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
7633 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
7634 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
7637 netdev_reset_tc(dev
);
7639 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
7640 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
7642 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
7644 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
7645 adapter
->dcb_cfg
.pfc_mode_enable
= false;
7648 ixgbe_validate_rtr(adapter
, tc
);
7650 #endif /* CONFIG_IXGBE_DCB */
7651 ixgbe_init_interrupt_scheme(adapter
);
7653 if (netif_running(dev
))
7654 return ixgbe_open(dev
);
7659 #ifdef CONFIG_PCI_IOV
7660 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
7662 struct net_device
*netdev
= adapter
->netdev
;
7665 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
7670 void ixgbe_do_reset(struct net_device
*netdev
)
7672 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7674 if (netif_running(netdev
))
7675 ixgbe_reinit_locked(adapter
);
7677 ixgbe_reset(adapter
);
7680 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
7681 netdev_features_t features
)
7683 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7685 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7686 if (!(features
& NETIF_F_RXCSUM
))
7687 features
&= ~NETIF_F_LRO
;
7689 /* Turn off LRO if not RSC capable */
7690 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
7691 features
&= ~NETIF_F_LRO
;
7696 static int ixgbe_set_features(struct net_device
*netdev
,
7697 netdev_features_t features
)
7699 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7700 netdev_features_t changed
= netdev
->features
^ features
;
7701 bool need_reset
= false;
7703 /* Make sure RSC matches LRO, reset if change */
7704 if (!(features
& NETIF_F_LRO
)) {
7705 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7707 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
7708 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
7709 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
7710 if (adapter
->rx_itr_setting
== 1 ||
7711 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
7712 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
7714 } else if ((changed
^ features
) & NETIF_F_LRO
) {
7715 e_info(probe
, "rx-usecs set too low, "
7721 * Check if Flow Director n-tuple support was enabled or disabled. If
7722 * the state changed, we need to reset.
7724 switch (features
& NETIF_F_NTUPLE
) {
7725 case NETIF_F_NTUPLE
:
7726 /* turn off ATR, enable perfect filters and reset */
7727 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
7730 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7731 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7734 /* turn off perfect filters, enable ATR and reset */
7735 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7738 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7740 /* We cannot enable ATR if SR-IOV is enabled */
7741 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7744 /* We cannot enable ATR if we have 2 or more traffic classes */
7745 if (netdev_get_num_tc(netdev
) > 1)
7748 /* We cannot enable ATR if RSS is disabled */
7749 if (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1)
7752 /* A sample rate of 0 indicates ATR disabled */
7753 if (!adapter
->atr_sample_rate
)
7756 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7760 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
7761 ixgbe_vlan_strip_enable(adapter
);
7763 ixgbe_vlan_strip_disable(adapter
);
7765 if (changed
& NETIF_F_RXALL
)
7768 netdev
->features
= features
;
7770 ixgbe_do_reset(netdev
);
7775 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
7776 struct net_device
*dev
,
7777 const unsigned char *addr
, u16 vid
,
7780 /* guarantee we can provide a unique filter for the unicast address */
7781 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
7782 if (IXGBE_MAX_PF_MACVLANS
<= netdev_uc_count(dev
))
7786 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
7789 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
7790 struct nlmsghdr
*nlh
)
7792 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7793 struct nlattr
*attr
, *br_spec
;
7796 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7799 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
7803 nla_for_each_nested(attr
, br_spec
, rem
) {
7807 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
7810 if (nla_len(attr
) < sizeof(mode
))
7813 mode
= nla_get_u16(attr
);
7814 if (mode
== BRIDGE_MODE_VEPA
) {
7816 adapter
->flags2
&= ~IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7817 } else if (mode
== BRIDGE_MODE_VEB
) {
7818 reg
= IXGBE_PFDTXGSWC_VT_LBEN
;
7819 adapter
->flags2
|= IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7823 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, reg
);
7825 e_info(drv
, "enabling bridge mode: %s\n",
7826 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
7832 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
7833 struct net_device
*dev
,
7836 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7839 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7842 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
7843 mode
= BRIDGE_MODE_VEB
;
7845 mode
= BRIDGE_MODE_VEPA
;
7847 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
, mode
, 0, 0);
7850 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
7852 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
7853 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
7854 int used_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
7858 /* Hardware has a limited number of available pools. Each VF, and the
7859 * PF require a pool. Check to ensure we don't attempt to use more
7860 * then the available number of pools.
7862 if (used_pools
>= IXGBE_MAX_VF_FUNCTIONS
)
7863 return ERR_PTR(-EINVAL
);
7866 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
7867 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
7869 return ERR_PTR(-EINVAL
);
7872 /* Check for hardware restriction on number of rx/tx queues */
7873 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
7874 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
7876 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7878 return ERR_PTR(-EINVAL
);
7881 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7882 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
7883 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
7884 return ERR_PTR(-EBUSY
);
7886 fwd_adapter
= kcalloc(1, sizeof(struct ixgbe_fwd_adapter
), GFP_KERNEL
);
7888 return ERR_PTR(-ENOMEM
);
7890 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
7891 adapter
->num_rx_pools
++;
7892 set_bit(pool
, &adapter
->fwd_bitmask
);
7893 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7895 /* Enable VMDq flag so device will be set in VM mode */
7896 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
7897 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7898 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
7900 /* Force reinit of ring allocation with VMDQ enabled */
7901 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7904 fwd_adapter
->pool
= pool
;
7905 fwd_adapter
->real_adapter
= adapter
;
7906 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
7909 netif_tx_start_all_queues(vdev
);
7912 /* unwind counter and free adapter struct */
7914 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
7915 clear_bit(pool
, &adapter
->fwd_bitmask
);
7916 adapter
->num_rx_pools
--;
7918 return ERR_PTR(err
);
7921 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
7923 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
7924 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
7927 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
7928 adapter
->num_rx_pools
--;
7930 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7931 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7932 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
7933 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7934 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7935 fwd_adapter
->pool
, adapter
->num_rx_pools
,
7936 fwd_adapter
->rx_base_queue
,
7937 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
7938 adapter
->fwd_bitmask
);
7942 static const struct net_device_ops ixgbe_netdev_ops
= {
7943 .ndo_open
= ixgbe_open
,
7944 .ndo_stop
= ixgbe_close
,
7945 .ndo_start_xmit
= ixgbe_xmit_frame
,
7946 .ndo_select_queue
= ixgbe_select_queue
,
7947 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
7948 .ndo_validate_addr
= eth_validate_addr
,
7949 .ndo_set_mac_address
= ixgbe_set_mac
,
7950 .ndo_change_mtu
= ixgbe_change_mtu
,
7951 .ndo_tx_timeout
= ixgbe_tx_timeout
,
7952 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
7953 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
7954 .ndo_do_ioctl
= ixgbe_ioctl
,
7955 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
7956 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
7957 .ndo_set_vf_rate
= ixgbe_ndo_set_vf_bw
,
7958 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
7959 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
7960 .ndo_get_stats64
= ixgbe_get_stats64
,
7961 #ifdef CONFIG_IXGBE_DCB
7962 .ndo_setup_tc
= ixgbe_setup_tc
,
7964 #ifdef CONFIG_NET_POLL_CONTROLLER
7965 .ndo_poll_controller
= ixgbe_netpoll
,
7967 #ifdef CONFIG_NET_RX_BUSY_POLL
7968 .ndo_busy_poll
= ixgbe_low_latency_recv
,
7971 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
7972 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
7973 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
7974 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
7975 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
7976 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
7977 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
7978 #endif /* IXGBE_FCOE */
7979 .ndo_set_features
= ixgbe_set_features
,
7980 .ndo_fix_features
= ixgbe_fix_features
,
7981 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
7982 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
7983 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
7984 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
7985 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
7989 * ixgbe_enumerate_functions - Get the number of ports this device has
7990 * @adapter: adapter structure
7992 * This function enumerates the phsyical functions co-located on a single slot,
7993 * in order to determine how many ports a device has. This is most useful in
7994 * determining the required GT/s of PCIe bandwidth necessary for optimal
7997 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
7999 struct pci_dev
*entry
, *pdev
= adapter
->pdev
;
8002 /* Some cards can not use the generic count PCIe functions method,
8003 * because they are behind a parent switch, so we hardcode these with
8004 * the correct number of functions.
8006 if (ixgbe_pcie_from_parent(&adapter
->hw
))
8009 list_for_each_entry(entry
, &adapter
->pdev
->bus
->devices
, bus_list
) {
8010 /* don't count virtual functions */
8011 if (entry
->is_virtfn
)
8014 /* When the devices on the bus don't all match our device ID,
8015 * we can't reliably determine the correct number of
8016 * functions. This can occur if a function has been direct
8017 * attached to a virtual machine using VT-d, for example. In
8018 * this case, simply return -1 to indicate this.
8020 if ((entry
->vendor
!= pdev
->vendor
) ||
8021 (entry
->device
!= pdev
->device
))
8031 * ixgbe_wol_supported - Check whether device supports WoL
8032 * @hw: hw specific details
8033 * @device_id: the device ID
8034 * @subdev_id: the subsystem device ID
8036 * This function is used by probe and ethtool to determine
8037 * which devices have WoL support
8040 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
8043 struct ixgbe_hw
*hw
= &adapter
->hw
;
8044 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
8045 int is_wol_supported
= 0;
8047 switch (device_id
) {
8048 case IXGBE_DEV_ID_82599_SFP
:
8049 /* Only these subdevices could supports WOL */
8050 switch (subdevice_id
) {
8051 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
8052 case IXGBE_SUBDEV_ID_82599_560FLR
:
8053 /* only support first port */
8054 if (hw
->bus
.func
!= 0)
8056 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
8057 case IXGBE_SUBDEV_ID_82599_SFP
:
8058 case IXGBE_SUBDEV_ID_82599_RNDC
:
8059 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
8060 case IXGBE_SUBDEV_ID_82599_LOM_SFP
:
8061 is_wol_supported
= 1;
8065 case IXGBE_DEV_ID_82599EN_SFP
:
8066 /* Only this subdevice supports WOL */
8067 switch (subdevice_id
) {
8068 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
8069 is_wol_supported
= 1;
8073 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
8074 /* All except this subdevice support WOL */
8075 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
8076 is_wol_supported
= 1;
8078 case IXGBE_DEV_ID_82599_KX4
:
8079 is_wol_supported
= 1;
8081 case IXGBE_DEV_ID_X540T
:
8082 case IXGBE_DEV_ID_X540T1
:
8083 /* check eeprom to see if enabled wol */
8084 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
8085 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
8086 (hw
->bus
.func
== 0))) {
8087 is_wol_supported
= 1;
8092 return is_wol_supported
;
8096 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
8097 * @adapter: Pointer to adapter struct
8099 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter
*adapter
)
8102 struct device_node
*dp
= pci_device_to_OF_node(adapter
->pdev
);
8103 struct ixgbe_hw
*hw
= &adapter
->hw
;
8104 const unsigned char *addr
;
8106 addr
= of_get_mac_address(dp
);
8108 ether_addr_copy(hw
->mac
.perm_addr
, addr
);
8111 #endif /* CONFIG_OF */
8114 ether_addr_copy(hw
->mac
.perm_addr
, idprom
->id_ethaddr
);
8115 #endif /* CONFIG_SPARC */
8119 * ixgbe_probe - Device Initialization Routine
8120 * @pdev: PCI device information struct
8121 * @ent: entry in ixgbe_pci_tbl
8123 * Returns 0 on success, negative on failure
8125 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
8126 * The OS initialization, configuring of the adapter private structure,
8127 * and a hardware reset occur.
8129 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
8131 struct net_device
*netdev
;
8132 struct ixgbe_adapter
*adapter
= NULL
;
8133 struct ixgbe_hw
*hw
;
8134 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
8135 int i
, err
, pci_using_dac
, expected_gts
;
8136 unsigned int indices
= MAX_TX_QUEUES
;
8137 u8 part_str
[IXGBE_PBANUM_LENGTH
];
8138 bool disable_dev
= false;
8144 /* Catch broken hardware that put the wrong VF device ID in
8145 * the PCIe SR-IOV capability.
8147 if (pdev
->is_virtfn
) {
8148 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
8149 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
8153 err
= pci_enable_device_mem(pdev
);
8157 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
8160 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
8163 "No usable DMA configuration, aborting\n");
8169 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
8170 IORESOURCE_MEM
), ixgbe_driver_name
);
8173 "pci_request_selected_regions failed 0x%x\n", err
);
8177 pci_enable_pcie_error_reporting(pdev
);
8179 pci_set_master(pdev
);
8180 pci_save_state(pdev
);
8182 if (ii
->mac
== ixgbe_mac_82598EB
) {
8183 #ifdef CONFIG_IXGBE_DCB
8184 /* 8 TC w/ 4 queues per TC */
8185 indices
= 4 * MAX_TRAFFIC_CLASS
;
8187 indices
= IXGBE_MAX_RSS_INDICES
;
8191 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
8194 goto err_alloc_etherdev
;
8197 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
8199 adapter
= netdev_priv(netdev
);
8201 adapter
->netdev
= netdev
;
8202 adapter
->pdev
= pdev
;
8205 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
8207 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
8208 pci_resource_len(pdev
, 0));
8209 adapter
->io_addr
= hw
->hw_addr
;
8215 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
8216 ixgbe_set_ethtool_ops(netdev
);
8217 netdev
->watchdog_timeo
= 5 * HZ
;
8218 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
8221 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
8222 hw
->mac
.type
= ii
->mac
;
8225 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
8226 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
8227 if (ixgbe_removed(hw
->hw_addr
)) {
8231 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8232 if (!(eec
& (1 << 8)))
8233 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
8236 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
8237 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
8238 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8239 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
8240 hw
->phy
.mdio
.mmds
= 0;
8241 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
8242 hw
->phy
.mdio
.dev
= netdev
;
8243 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
8244 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
8246 ii
->get_invariants(hw
);
8248 /* setup the private structure */
8249 err
= ixgbe_sw_init(adapter
);
8253 /* Make it possible the adapter to be woken up via WOL */
8254 switch (adapter
->hw
.mac
.type
) {
8255 case ixgbe_mac_82599EB
:
8256 case ixgbe_mac_X540
:
8257 case ixgbe_mac_X550
:
8258 case ixgbe_mac_X550EM_x
:
8259 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
8266 * If there is a fan on this device and it has failed log the
8269 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
8270 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
8271 if (esdp
& IXGBE_ESDP_SDP1
)
8272 e_crit(probe
, "Fan has stopped, replace the adapter\n");
8275 if (allow_unsupported_sfp
)
8276 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
8278 /* reset_hw fills in the perm_addr as well */
8279 hw
->phy
.reset_if_overtemp
= true;
8280 err
= hw
->mac
.ops
.reset_hw(hw
);
8281 hw
->phy
.reset_if_overtemp
= false;
8282 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
8283 hw
->mac
.type
== ixgbe_mac_82598EB
) {
8285 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
8286 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8287 e_dev_err("Reload the driver after installing a supported module.\n");
8290 e_dev_err("HW Init failed: %d\n", err
);
8294 #ifdef CONFIG_PCI_IOV
8295 /* SR-IOV not supported on the 82598 */
8296 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8299 ixgbe_init_mbx_params_pf(hw
);
8300 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
, sizeof(hw
->mbx
.ops
));
8301 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
8302 ixgbe_enable_sriov(adapter
);
8306 netdev
->features
= NETIF_F_SG
|
8309 NETIF_F_HW_VLAN_CTAG_TX
|
8310 NETIF_F_HW_VLAN_CTAG_RX
|
8311 NETIF_F_HW_VLAN_CTAG_FILTER
|
8317 netdev
->hw_features
= netdev
->features
| NETIF_F_HW_L2FW_DOFFLOAD
;
8319 switch (adapter
->hw
.mac
.type
) {
8320 case ixgbe_mac_82599EB
:
8321 case ixgbe_mac_X540
:
8322 case ixgbe_mac_X550
:
8323 case ixgbe_mac_X550EM_x
:
8324 netdev
->features
|= NETIF_F_SCTP_CSUM
;
8325 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
8332 netdev
->hw_features
|= NETIF_F_RXALL
;
8334 netdev
->vlan_features
|= NETIF_F_TSO
;
8335 netdev
->vlan_features
|= NETIF_F_TSO6
;
8336 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
8337 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
8338 netdev
->vlan_features
|= NETIF_F_SG
;
8340 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
8341 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
8343 #ifdef CONFIG_IXGBE_DCB
8344 netdev
->dcbnl_ops
= &dcbnl_ops
;
8348 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
8349 unsigned int fcoe_l
;
8351 if (hw
->mac
.ops
.get_device_caps
) {
8352 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
8353 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
8354 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
8358 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
8359 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
8361 netdev
->features
|= NETIF_F_FSO
|
8364 netdev
->vlan_features
|= NETIF_F_FSO
|
8368 #endif /* IXGBE_FCOE */
8369 if (pci_using_dac
) {
8370 netdev
->features
|= NETIF_F_HIGHDMA
;
8371 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
8374 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
8375 netdev
->hw_features
|= NETIF_F_LRO
;
8376 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8377 netdev
->features
|= NETIF_F_LRO
;
8379 /* make sure the EEPROM is good */
8380 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
8381 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8386 ixgbe_get_platform_mac_addr(adapter
);
8388 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
8390 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
8391 e_dev_err("invalid MAC address\n");
8396 ixgbe_mac_set_default_filter(adapter
, hw
->mac
.perm_addr
);
8398 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
8399 (unsigned long) adapter
);
8401 if (ixgbe_removed(hw
->hw_addr
)) {
8405 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
8406 set_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
);
8407 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
8409 err
= ixgbe_init_interrupt_scheme(adapter
);
8413 /* WOL not supported for all devices */
8415 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
8416 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
8417 pdev
->subsystem_device
);
8418 if (hw
->wol_enabled
)
8419 adapter
->wol
= IXGBE_WUFC_MAG
;
8421 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
8423 /* save off EEPROM version number */
8424 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
8425 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
8427 /* pick up the PCI bus settings for reporting later */
8428 hw
->mac
.ops
.get_bus_info(hw
);
8429 if (ixgbe_pcie_from_parent(hw
))
8430 ixgbe_get_parent_bus_info(adapter
);
8432 /* calculate the expected PCIe bandwidth required for optimal
8433 * performance. Note that some older parts will never have enough
8434 * bandwidth due to being older generation PCIe parts. We clamp these
8435 * parts to ensure no warning is displayed if it can't be fixed.
8437 switch (hw
->mac
.type
) {
8438 case ixgbe_mac_82598EB
:
8439 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
8442 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
8446 /* don't check link if we failed to enumerate functions */
8447 if (expected_gts
> 0)
8448 ixgbe_check_minimum_link(adapter
, expected_gts
);
8450 err
= ixgbe_read_pba_string_generic(hw
, part_str
, sizeof(part_str
));
8452 strlcpy(part_str
, "Unknown", sizeof(part_str
));
8453 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
8454 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8455 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
8458 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8459 hw
->mac
.type
, hw
->phy
.type
, part_str
);
8461 e_dev_info("%pM\n", netdev
->dev_addr
);
8463 /* reset the hardware with the new settings */
8464 err
= hw
->mac
.ops
.start_hw(hw
);
8465 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
8466 /* We are running on a pre-production device, log a warning */
8467 e_dev_warn("This device is a pre-production adapter/LOM. "
8468 "Please be aware there may be issues associated "
8469 "with your hardware. If you are experiencing "
8470 "problems please contact your Intel or hardware "
8471 "representative who provided you with this "
8474 strcpy(netdev
->name
, "eth%d");
8475 err
= register_netdev(netdev
);
8479 pci_set_drvdata(pdev
, adapter
);
8481 /* power down the optics for 82599 SFP+ fiber */
8482 if (hw
->mac
.ops
.disable_tx_laser
)
8483 hw
->mac
.ops
.disable_tx_laser(hw
);
8485 /* carrier off reporting is important to ethtool even BEFORE open */
8486 netif_carrier_off(netdev
);
8488 #ifdef CONFIG_IXGBE_DCA
8489 if (dca_add_requester(&pdev
->dev
) == 0) {
8490 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
8491 ixgbe_setup_dca(adapter
);
8494 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
8495 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
8496 for (i
= 0; i
< adapter
->num_vfs
; i
++)
8497 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
8500 /* firmware requires driver version to be 0xFFFFFFFF
8501 * since os does not support feature
8503 if (hw
->mac
.ops
.set_fw_drv_ver
)
8504 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
8507 /* add san mac addr to netdev */
8508 ixgbe_add_sanmac_netdev(netdev
);
8510 e_dev_info("%s\n", ixgbe_default_device_descr
);
8512 #ifdef CONFIG_IXGBE_HWMON
8513 if (ixgbe_sysfs_init(adapter
))
8514 e_err(probe
, "failed to allocate sysfs resources\n");
8515 #endif /* CONFIG_IXGBE_HWMON */
8517 ixgbe_dbg_adapter_init(adapter
);
8519 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
8520 if (ixgbe_mng_enabled(hw
) && ixgbe_is_sfp(hw
) && hw
->mac
.ops
.setup_link
)
8521 hw
->mac
.ops
.setup_link(hw
,
8522 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
8528 ixgbe_release_hw_control(adapter
);
8529 ixgbe_clear_interrupt_scheme(adapter
);
8531 ixgbe_disable_sriov(adapter
);
8532 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
8533 iounmap(adapter
->io_addr
);
8534 kfree(adapter
->mac_table
);
8536 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
8537 free_netdev(netdev
);
8539 pci_release_selected_regions(pdev
,
8540 pci_select_bars(pdev
, IORESOURCE_MEM
));
8543 if (!adapter
|| disable_dev
)
8544 pci_disable_device(pdev
);
8549 * ixgbe_remove - Device Removal Routine
8550 * @pdev: PCI device information struct
8552 * ixgbe_remove is called by the PCI subsystem to alert the driver
8553 * that it should release a PCI device. The could be caused by a
8554 * Hot-Plug event, or because the driver is going to be removed from
8557 static void ixgbe_remove(struct pci_dev
*pdev
)
8559 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8560 struct net_device
*netdev
;
8563 /* if !adapter then we already cleaned up in probe */
8567 netdev
= adapter
->netdev
;
8568 ixgbe_dbg_adapter_exit(adapter
);
8570 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
8571 cancel_work_sync(&adapter
->service_task
);
8574 #ifdef CONFIG_IXGBE_DCA
8575 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
8576 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
8577 dca_remove_requester(&pdev
->dev
);
8578 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
8582 #ifdef CONFIG_IXGBE_HWMON
8583 ixgbe_sysfs_exit(adapter
);
8584 #endif /* CONFIG_IXGBE_HWMON */
8586 /* remove the added san mac */
8587 ixgbe_del_sanmac_netdev(netdev
);
8589 if (netdev
->reg_state
== NETREG_REGISTERED
)
8590 unregister_netdev(netdev
);
8592 #ifdef CONFIG_PCI_IOV
8594 * Only disable SR-IOV on unload if the user specified the now
8595 * deprecated max_vfs module parameter.
8598 ixgbe_disable_sriov(adapter
);
8600 ixgbe_clear_interrupt_scheme(adapter
);
8602 ixgbe_release_hw_control(adapter
);
8605 kfree(adapter
->ixgbe_ieee_pfc
);
8606 kfree(adapter
->ixgbe_ieee_ets
);
8609 iounmap(adapter
->io_addr
);
8610 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
8613 e_dev_info("complete\n");
8615 kfree(adapter
->mac_table
);
8616 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
8617 free_netdev(netdev
);
8619 pci_disable_pcie_error_reporting(pdev
);
8622 pci_disable_device(pdev
);
8626 * ixgbe_io_error_detected - called when PCI error is detected
8627 * @pdev: Pointer to PCI device
8628 * @state: The current pci connection state
8630 * This function is called after a PCI bus error affecting
8631 * this device has been detected.
8633 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
8634 pci_channel_state_t state
)
8636 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8637 struct net_device
*netdev
= adapter
->netdev
;
8639 #ifdef CONFIG_PCI_IOV
8640 struct ixgbe_hw
*hw
= &adapter
->hw
;
8641 struct pci_dev
*bdev
, *vfdev
;
8642 u32 dw0
, dw1
, dw2
, dw3
;
8644 u16 req_id
, pf_func
;
8646 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
8647 adapter
->num_vfs
== 0)
8648 goto skip_bad_vf_detection
;
8650 bdev
= pdev
->bus
->self
;
8651 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
8652 bdev
= bdev
->bus
->self
;
8655 goto skip_bad_vf_detection
;
8657 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
8659 goto skip_bad_vf_detection
;
8661 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
8662 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
8663 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
8664 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
8665 if (ixgbe_removed(hw
->hw_addr
))
8666 goto skip_bad_vf_detection
;
8669 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8670 if (!(req_id
& 0x0080))
8671 goto skip_bad_vf_detection
;
8673 pf_func
= req_id
& 0x01;
8674 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
8675 unsigned int device_id
;
8677 vf
= (req_id
& 0x7F) >> 1;
8678 e_dev_err("VF %d has caused a PCIe error\n", vf
);
8679 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8680 "%8.8x\tdw3: %8.8x\n",
8681 dw0
, dw1
, dw2
, dw3
);
8682 switch (adapter
->hw
.mac
.type
) {
8683 case ixgbe_mac_82599EB
:
8684 device_id
= IXGBE_82599_VF_DEVICE_ID
;
8686 case ixgbe_mac_X540
:
8687 device_id
= IXGBE_X540_VF_DEVICE_ID
;
8689 case ixgbe_mac_X550
:
8690 device_id
= IXGBE_DEV_ID_X550_VF
;
8692 case ixgbe_mac_X550EM_x
:
8693 device_id
= IXGBE_DEV_ID_X550EM_X_VF
;
8700 /* Find the pci device of the offending VF */
8701 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
8703 if (vfdev
->devfn
== (req_id
& 0xFF))
8705 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
8709 * There's a slim chance the VF could have been hot plugged,
8710 * so if it is no longer present we don't need to issue the
8711 * VFLR. Just clean up the AER in that case.
8714 ixgbe_issue_vf_flr(adapter
, vfdev
);
8715 /* Free device reference count */
8719 pci_cleanup_aer_uncorrect_error_status(pdev
);
8723 * Even though the error may have occurred on the other port
8724 * we still need to increment the vf error reference count for
8725 * both ports because the I/O resume function will be called
8728 adapter
->vferr_refcount
++;
8730 return PCI_ERS_RESULT_RECOVERED
;
8732 skip_bad_vf_detection
:
8733 #endif /* CONFIG_PCI_IOV */
8734 if (!test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
8735 return PCI_ERS_RESULT_DISCONNECT
;
8738 netif_device_detach(netdev
);
8740 if (state
== pci_channel_io_perm_failure
) {
8742 return PCI_ERS_RESULT_DISCONNECT
;
8745 if (netif_running(netdev
))
8746 ixgbe_down(adapter
);
8748 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
8749 pci_disable_device(pdev
);
8752 /* Request a slot reset. */
8753 return PCI_ERS_RESULT_NEED_RESET
;
8757 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8758 * @pdev: Pointer to PCI device
8760 * Restart the card from scratch, as if from a cold-boot.
8762 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
8764 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8765 pci_ers_result_t result
;
8768 if (pci_enable_device_mem(pdev
)) {
8769 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
8770 result
= PCI_ERS_RESULT_DISCONNECT
;
8772 smp_mb__before_atomic();
8773 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
8774 adapter
->hw
.hw_addr
= adapter
->io_addr
;
8775 pci_set_master(pdev
);
8776 pci_restore_state(pdev
);
8777 pci_save_state(pdev
);
8779 pci_wake_from_d3(pdev
, false);
8781 ixgbe_reset(adapter
);
8782 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
8783 result
= PCI_ERS_RESULT_RECOVERED
;
8786 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
8788 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8789 "failed 0x%0x\n", err
);
8790 /* non-fatal, continue */
8797 * ixgbe_io_resume - called when traffic can start flowing again.
8798 * @pdev: Pointer to PCI device
8800 * This callback is called when the error recovery driver tells us that
8801 * its OK to resume normal operation.
8803 static void ixgbe_io_resume(struct pci_dev
*pdev
)
8805 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8806 struct net_device
*netdev
= adapter
->netdev
;
8808 #ifdef CONFIG_PCI_IOV
8809 if (adapter
->vferr_refcount
) {
8810 e_info(drv
, "Resuming after VF err\n");
8811 adapter
->vferr_refcount
--;
8816 if (netif_running(netdev
))
8819 netif_device_attach(netdev
);
8822 static const struct pci_error_handlers ixgbe_err_handler
= {
8823 .error_detected
= ixgbe_io_error_detected
,
8824 .slot_reset
= ixgbe_io_slot_reset
,
8825 .resume
= ixgbe_io_resume
,
8828 static struct pci_driver ixgbe_driver
= {
8829 .name
= ixgbe_driver_name
,
8830 .id_table
= ixgbe_pci_tbl
,
8831 .probe
= ixgbe_probe
,
8832 .remove
= ixgbe_remove
,
8834 .suspend
= ixgbe_suspend
,
8835 .resume
= ixgbe_resume
,
8837 .shutdown
= ixgbe_shutdown
,
8838 .sriov_configure
= ixgbe_pci_sriov_configure
,
8839 .err_handler
= &ixgbe_err_handler
8843 * ixgbe_init_module - Driver Registration Routine
8845 * ixgbe_init_module is the first routine called when the driver is
8846 * loaded. All it does is register with the PCI subsystem.
8848 static int __init
ixgbe_init_module(void)
8851 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
8852 pr_info("%s\n", ixgbe_copyright
);
8856 ret
= pci_register_driver(&ixgbe_driver
);
8862 #ifdef CONFIG_IXGBE_DCA
8863 dca_register_notify(&dca_notifier
);
8869 module_init(ixgbe_init_module
);
8872 * ixgbe_exit_module - Driver Exit Cleanup Routine
8874 * ixgbe_exit_module is called just before the driver is removed
8877 static void __exit
ixgbe_exit_module(void)
8879 #ifdef CONFIG_IXGBE_DCA
8880 dca_unregister_notify(&dca_notifier
);
8882 pci_unregister_driver(&ixgbe_driver
);
8886 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8889 #ifdef CONFIG_IXGBE_DCA
8890 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
8895 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
8896 __ixgbe_notify_dca
);
8898 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
8901 #endif /* CONFIG_IXGBE_DCA */
8903 module_exit(ixgbe_exit_module
);