1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
54 #include <net/pkt_cls.h>
55 #include <net/tc_act/tc_gact.h>
56 #include <net/tc_act/tc_mirred.h>
59 #include "ixgbe_common.h"
60 #include "ixgbe_dcb_82599.h"
61 #include "ixgbe_sriov.h"
62 #include "ixgbe_model.h"
64 char ixgbe_driver_name
[] = "ixgbe";
65 static const char ixgbe_driver_string
[] =
66 "Intel(R) 10 Gigabit PCI Express Network Driver";
68 char ixgbe_default_device_descr
[] =
69 "Intel(R) 10 Gigabit Network Connection";
71 static char ixgbe_default_device_descr
[] =
72 "Intel(R) 10 Gigabit Network Connection";
74 #define DRV_VERSION "4.4.0-k"
75 const char ixgbe_driver_version
[] = DRV_VERSION
;
76 static const char ixgbe_copyright
[] =
77 "Copyright (c) 1999-2016 Intel Corporation.";
79 static const char ixgbe_overheat_msg
[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
81 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
82 [board_82598
] = &ixgbe_82598_info
,
83 [board_82599
] = &ixgbe_82599_info
,
84 [board_X540
] = &ixgbe_X540_info
,
85 [board_X550
] = &ixgbe_X550_info
,
86 [board_X550EM_x
] = &ixgbe_X550EM_x_info
,
87 [board_x550em_a
] = &ixgbe_x550em_a_info
,
90 /* ixgbe_pci_tbl - PCI Device ID Table
92 * Wildcard entries (PCI_ANY_ID) should come last
93 * Last entry must be all 0s
95 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
96 * Class, Class Mask, private data (not used) }
98 static const struct pci_device_id ixgbe_pci_tbl
[] = {
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
118 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
119 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
120 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
121 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
122 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
123 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
124 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
125 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
126 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
127 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
128 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
129 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T
), board_X550
},
130 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T1
), board_X550
},
131 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KX4
), board_X550EM_x
},
132 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KR
), board_X550EM_x
},
133 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_10G_T
), board_X550EM_x
},
134 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_SFP
), board_X550EM_x
},
135 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR
), board_x550em_a
},
136 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR_L
), board_x550em_a
},
137 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP_N
), board_x550em_a
},
138 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII
), board_x550em_a
},
139 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII_L
), board_x550em_a
},
140 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP
), board_x550em_a
},
141 /* required last entry */
144 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
146 #ifdef CONFIG_IXGBE_DCA
147 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
149 static struct notifier_block dca_notifier
= {
150 .notifier_call
= ixgbe_notify_dca
,
156 #ifdef CONFIG_PCI_IOV
157 static unsigned int max_vfs
;
158 module_param(max_vfs
, uint
, 0);
159 MODULE_PARM_DESC(max_vfs
,
160 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
161 #endif /* CONFIG_PCI_IOV */
163 static unsigned int allow_unsupported_sfp
;
164 module_param(allow_unsupported_sfp
, uint
, 0);
165 MODULE_PARM_DESC(allow_unsupported_sfp
,
166 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
169 static int debug
= -1;
170 module_param(debug
, int, 0);
171 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION
);
178 static struct workqueue_struct
*ixgbe_wq
;
180 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
182 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
185 struct pci_dev
*parent_dev
;
186 struct pci_bus
*parent_bus
;
188 parent_bus
= adapter
->pdev
->bus
->parent
;
192 parent_dev
= parent_bus
->self
;
196 if (!pci_is_pcie(parent_dev
))
199 pcie_capability_read_word(parent_dev
, reg
, value
);
200 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
201 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
206 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
208 struct ixgbe_hw
*hw
= &adapter
->hw
;
212 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
214 /* Get the negotiated link width and speed from PCI config space of the
215 * parent, as this device is behind a switch
217 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
219 /* assume caller will handle error case */
223 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
224 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
230 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
231 * @hw: hw specific details
233 * This function is used by probe to determine whether a device's PCI-Express
234 * bandwidth details should be gathered from the parent bus instead of from the
235 * device. Used to ensure that various locations all have the correct device ID
238 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
240 switch (hw
->device_id
) {
241 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
242 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
249 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
252 struct ixgbe_hw
*hw
= &adapter
->hw
;
254 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
255 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
256 struct pci_dev
*pdev
;
258 /* Some devices are not connected over PCIe and thus do not negotiate
259 * speed. These devices do not have valid bus info, and thus any report
260 * we generate may not be correct.
262 if (hw
->bus
.type
== ixgbe_bus_type_internal
)
265 /* determine whether to use the parent device */
266 if (ixgbe_pcie_from_parent(&adapter
->hw
))
267 pdev
= adapter
->pdev
->bus
->parent
->self
;
269 pdev
= adapter
->pdev
;
271 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
272 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
273 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
278 case PCIE_SPEED_2_5GT
:
279 /* 8b/10b encoding reduces max throughput by 20% */
282 case PCIE_SPEED_5_0GT
:
283 /* 8b/10b encoding reduces max throughput by 20% */
286 case PCIE_SPEED_8_0GT
:
287 /* 128b/130b encoding reduces throughput by less than 2% */
291 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
295 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
297 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
298 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
299 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
300 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
303 (speed
== PCIE_SPEED_2_5GT
? "20%" :
304 speed
== PCIE_SPEED_5_0GT
? "20%" :
305 speed
== PCIE_SPEED_8_0GT
? "<2%" :
308 if (max_gts
< expected_gts
) {
309 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
310 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
312 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
316 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
318 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
319 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
320 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
321 queue_work(ixgbe_wq
, &adapter
->service_task
);
324 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
326 struct ixgbe_adapter
*adapter
= hw
->back
;
331 e_dev_err("Adapter removed\n");
332 if (test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
333 ixgbe_service_event_schedule(adapter
);
336 static void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
340 /* The following check not only optimizes a bit by not
341 * performing a read on the status register when the
342 * register just read was a status register read that
343 * returned IXGBE_FAILED_READ_REG. It also blocks any
344 * potential recursion.
346 if (reg
== IXGBE_STATUS
) {
347 ixgbe_remove_adapter(hw
);
350 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
351 if (value
== IXGBE_FAILED_READ_REG
)
352 ixgbe_remove_adapter(hw
);
356 * ixgbe_read_reg - Read from device register
357 * @hw: hw specific details
358 * @reg: offset of register to read
360 * Returns : value read or IXGBE_FAILED_READ_REG if removed
362 * This function is used to read device registers. It checks for device
363 * removal by confirming any read that returns all ones by checking the
364 * status register value for all ones. This function avoids reading from
365 * the hardware if a removal was previously detected in which case it
366 * returns IXGBE_FAILED_READ_REG (all ones).
368 u32
ixgbe_read_reg(struct ixgbe_hw
*hw
, u32 reg
)
370 u8 __iomem
*reg_addr
= ACCESS_ONCE(hw
->hw_addr
);
373 if (ixgbe_removed(reg_addr
))
374 return IXGBE_FAILED_READ_REG
;
375 if (unlikely(hw
->phy
.nw_mng_if_sel
&
376 IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M
)) {
377 struct ixgbe_adapter
*adapter
;
380 for (i
= 0; i
< 200; ++i
) {
381 value
= readl(reg_addr
+ IXGBE_MAC_SGMII_BUSY
);
383 goto writes_completed
;
384 if (value
== IXGBE_FAILED_READ_REG
) {
385 ixgbe_remove_adapter(hw
);
386 return IXGBE_FAILED_READ_REG
;
392 e_warn(hw
, "register writes incomplete %08x\n", value
);
396 value
= readl(reg_addr
+ reg
);
397 if (unlikely(value
== IXGBE_FAILED_READ_REG
))
398 ixgbe_check_remove(hw
, reg
);
402 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
406 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
407 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
408 ixgbe_remove_adapter(hw
);
414 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
416 struct ixgbe_adapter
*adapter
= hw
->back
;
419 if (ixgbe_removed(hw
->hw_addr
))
420 return IXGBE_FAILED_READ_CFG_WORD
;
421 pci_read_config_word(adapter
->pdev
, reg
, &value
);
422 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
423 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
424 return IXGBE_FAILED_READ_CFG_WORD
;
428 #ifdef CONFIG_PCI_IOV
429 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
431 struct ixgbe_adapter
*adapter
= hw
->back
;
434 if (ixgbe_removed(hw
->hw_addr
))
435 return IXGBE_FAILED_READ_CFG_DWORD
;
436 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
437 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
438 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
439 return IXGBE_FAILED_READ_CFG_DWORD
;
442 #endif /* CONFIG_PCI_IOV */
444 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
446 struct ixgbe_adapter
*adapter
= hw
->back
;
448 if (ixgbe_removed(hw
->hw_addr
))
450 pci_write_config_word(adapter
->pdev
, reg
, value
);
453 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
455 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
457 /* flush memory to make sure state is correct before next watchdog */
458 smp_mb__before_atomic();
459 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
462 struct ixgbe_reg_info
{
467 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
469 /* General Registers */
470 {IXGBE_CTRL
, "CTRL"},
471 {IXGBE_STATUS
, "STATUS"},
472 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
474 /* Interrupt Registers */
475 {IXGBE_EICR
, "EICR"},
478 {IXGBE_SRRCTL(0), "SRRCTL"},
479 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
480 {IXGBE_RDLEN(0), "RDLEN"},
481 {IXGBE_RDH(0), "RDH"},
482 {IXGBE_RDT(0), "RDT"},
483 {IXGBE_RXDCTL(0), "RXDCTL"},
484 {IXGBE_RDBAL(0), "RDBAL"},
485 {IXGBE_RDBAH(0), "RDBAH"},
488 {IXGBE_TDBAL(0), "TDBAL"},
489 {IXGBE_TDBAH(0), "TDBAH"},
490 {IXGBE_TDLEN(0), "TDLEN"},
491 {IXGBE_TDH(0), "TDH"},
492 {IXGBE_TDT(0), "TDT"},
493 {IXGBE_TXDCTL(0), "TXDCTL"},
495 /* List Terminator */
501 * ixgbe_regdump - register printout routine
503 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
509 switch (reginfo
->ofs
) {
510 case IXGBE_SRRCTL(0):
511 for (i
= 0; i
< 64; i
++)
512 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
514 case IXGBE_DCA_RXCTRL(0):
515 for (i
= 0; i
< 64; i
++)
516 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
519 for (i
= 0; i
< 64; i
++)
520 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
523 for (i
= 0; i
< 64; i
++)
524 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
527 for (i
= 0; i
< 64; i
++)
528 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
530 case IXGBE_RXDCTL(0):
531 for (i
= 0; i
< 64; i
++)
532 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
535 for (i
= 0; i
< 64; i
++)
536 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
539 for (i
= 0; i
< 64; i
++)
540 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
543 for (i
= 0; i
< 64; i
++)
544 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
547 for (i
= 0; i
< 64; i
++)
548 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
551 for (i
= 0; i
< 64; i
++)
552 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
555 for (i
= 0; i
< 64; i
++)
556 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
559 for (i
= 0; i
< 64; i
++)
560 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
562 case IXGBE_TXDCTL(0):
563 for (i
= 0; i
< 64; i
++)
564 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
567 pr_info("%-15s %08x\n", reginfo
->name
,
568 IXGBE_READ_REG(hw
, reginfo
->ofs
));
572 for (i
= 0; i
< 8; i
++) {
573 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
574 pr_err("%-15s", rname
);
575 for (j
= 0; j
< 8; j
++)
576 pr_cont(" %08x", regs
[i
*8+j
]);
583 * ixgbe_dump - Print registers, tx-rings and rx-rings
585 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
587 struct net_device
*netdev
= adapter
->netdev
;
588 struct ixgbe_hw
*hw
= &adapter
->hw
;
589 struct ixgbe_reg_info
*reginfo
;
591 struct ixgbe_ring
*tx_ring
;
592 struct ixgbe_tx_buffer
*tx_buffer
;
593 union ixgbe_adv_tx_desc
*tx_desc
;
594 struct my_u0
{ u64 a
; u64 b
; } *u0
;
595 struct ixgbe_ring
*rx_ring
;
596 union ixgbe_adv_rx_desc
*rx_desc
;
597 struct ixgbe_rx_buffer
*rx_buffer_info
;
601 if (!netif_msg_hw(adapter
))
604 /* Print netdevice Info */
606 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
607 pr_info("Device Name state "
608 "trans_start last_rx\n");
609 pr_info("%-15s %016lX %016lX %016lX\n",
612 dev_trans_start(netdev
),
616 /* Print Registers */
617 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
618 pr_info(" Register Name Value\n");
619 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
620 reginfo
->name
; reginfo
++) {
621 ixgbe_regdump(hw
, reginfo
);
624 /* Print TX Ring Summary */
625 if (!netdev
|| !netif_running(netdev
))
628 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
629 pr_info(" %s %s %s %s\n",
630 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
631 "leng", "ntw", "timestamp");
632 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
633 tx_ring
= adapter
->tx_ring
[n
];
634 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
635 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
636 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
637 (u64
)dma_unmap_addr(tx_buffer
, dma
),
638 dma_unmap_len(tx_buffer
, len
),
639 tx_buffer
->next_to_watch
,
640 (u64
)tx_buffer
->time_stamp
);
644 if (!netif_msg_tx_done(adapter
))
645 goto rx_ring_summary
;
647 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
649 /* Transmit Descriptor Formats
651 * 82598 Advanced Transmit Descriptor
652 * +--------------------------------------------------------------+
653 * 0 | Buffer Address [63:0] |
654 * +--------------------------------------------------------------+
655 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
656 * +--------------------------------------------------------------+
657 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
659 * 82598 Advanced Transmit Descriptor (Write-Back Format)
660 * +--------------------------------------------------------------+
662 * +--------------------------------------------------------------+
663 * 8 | RSV | STA | NXTSEQ |
664 * +--------------------------------------------------------------+
667 * 82599+ Advanced Transmit Descriptor
668 * +--------------------------------------------------------------+
669 * 0 | Buffer Address [63:0] |
670 * +--------------------------------------------------------------+
671 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
672 * +--------------------------------------------------------------+
673 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
675 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
676 * +--------------------------------------------------------------+
678 * +--------------------------------------------------------------+
679 * 8 | RSV | STA | RSV |
680 * +--------------------------------------------------------------+
684 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
685 tx_ring
= adapter
->tx_ring
[n
];
686 pr_info("------------------------------------\n");
687 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
688 pr_info("------------------------------------\n");
689 pr_info("%s%s %s %s %s %s\n",
690 "T [desc] [address 63:0 ] ",
691 "[PlPOIdStDDt Ln] [bi->dma ] ",
692 "leng", "ntw", "timestamp", "bi->skb");
694 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
695 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
696 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
697 u0
= (struct my_u0
*)tx_desc
;
698 if (dma_unmap_len(tx_buffer
, len
) > 0) {
699 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
703 (u64
)dma_unmap_addr(tx_buffer
, dma
),
704 dma_unmap_len(tx_buffer
, len
),
705 tx_buffer
->next_to_watch
,
706 (u64
)tx_buffer
->time_stamp
,
708 if (i
== tx_ring
->next_to_use
&&
709 i
== tx_ring
->next_to_clean
)
711 else if (i
== tx_ring
->next_to_use
)
713 else if (i
== tx_ring
->next_to_clean
)
718 if (netif_msg_pktdata(adapter
) &&
720 print_hex_dump(KERN_INFO
, "",
721 DUMP_PREFIX_ADDRESS
, 16, 1,
722 tx_buffer
->skb
->data
,
723 dma_unmap_len(tx_buffer
, len
),
729 /* Print RX Rings Summary */
731 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
732 pr_info("Queue [NTU] [NTC]\n");
733 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
734 rx_ring
= adapter
->rx_ring
[n
];
735 pr_info("%5d %5X %5X\n",
736 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
740 if (!netif_msg_rx_status(adapter
))
743 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
745 /* Receive Descriptor Formats
747 * 82598 Advanced Receive Descriptor (Read) Format
749 * +-----------------------------------------------------+
750 * 0 | Packet Buffer Address [63:1] |A0/NSE|
751 * +----------------------------------------------+------+
752 * 8 | Header Buffer Address [63:1] | DD |
753 * +-----------------------------------------------------+
756 * 82598 Advanced Receive Descriptor (Write-Back) Format
758 * 63 48 47 32 31 30 21 20 16 15 4 3 0
759 * +------------------------------------------------------+
760 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
761 * | Packet | IP | | | | Type | Type |
762 * | Checksum | Ident | | | | | |
763 * +------------------------------------------------------+
764 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
765 * +------------------------------------------------------+
766 * 63 48 47 32 31 20 19 0
768 * 82599+ Advanced Receive Descriptor (Read) Format
770 * +-----------------------------------------------------+
771 * 0 | Packet Buffer Address [63:1] |A0/NSE|
772 * +----------------------------------------------+------+
773 * 8 | Header Buffer Address [63:1] | DD |
774 * +-----------------------------------------------------+
777 * 82599+ Advanced Receive Descriptor (Write-Back) Format
779 * 63 48 47 32 31 30 21 20 17 16 4 3 0
780 * +------------------------------------------------------+
781 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
782 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
783 * |/ Flow Dir Flt ID | | | | | |
784 * +------------------------------------------------------+
785 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
786 * +------------------------------------------------------+
787 * 63 48 47 32 31 20 19 0
790 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
791 rx_ring
= adapter
->rx_ring
[n
];
792 pr_info("------------------------------------\n");
793 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
794 pr_info("------------------------------------\n");
796 "R [desc] [ PktBuf A0] ",
797 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
798 "<-- Adv Rx Read format\n");
800 "RWB[desc] [PcsmIpSHl PtRs] ",
801 "[vl er S cks ln] ---------------- [bi->skb ] ",
802 "<-- Adv Rx Write-Back format\n");
804 for (i
= 0; i
< rx_ring
->count
; i
++) {
805 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
806 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
807 u0
= (struct my_u0
*)rx_desc
;
808 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
809 if (staterr
& IXGBE_RXD_STAT_DD
) {
810 /* Descriptor Done */
811 pr_info("RWB[0x%03X] %016llX "
812 "%016llX ---------------- %p", i
,
815 rx_buffer_info
->skb
);
817 pr_info("R [0x%03X] %016llX "
818 "%016llX %016llX %p", i
,
821 (u64
)rx_buffer_info
->dma
,
822 rx_buffer_info
->skb
);
824 if (netif_msg_pktdata(adapter
) &&
825 rx_buffer_info
->dma
) {
826 print_hex_dump(KERN_INFO
, "",
827 DUMP_PREFIX_ADDRESS
, 16, 1,
828 page_address(rx_buffer_info
->page
) +
829 rx_buffer_info
->page_offset
,
830 ixgbe_rx_bufsz(rx_ring
), true);
834 if (i
== rx_ring
->next_to_use
)
836 else if (i
== rx_ring
->next_to_clean
)
845 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
849 /* Let firmware take over control of h/w */
850 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
851 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
852 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
855 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
859 /* Let firmware know the driver has taken over */
860 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
861 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
862 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
866 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
867 * @adapter: pointer to adapter struct
868 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
869 * @queue: queue to map the corresponding interrupt to
870 * @msix_vector: the vector to map to the corresponding queue
873 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
874 u8 queue
, u8 msix_vector
)
877 struct ixgbe_hw
*hw
= &adapter
->hw
;
878 switch (hw
->mac
.type
) {
879 case ixgbe_mac_82598EB
:
880 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
883 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
884 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
885 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
886 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
887 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
889 case ixgbe_mac_82599EB
:
892 case ixgbe_mac_X550EM_x
:
893 case ixgbe_mac_x550em_a
:
894 if (direction
== -1) {
896 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
897 index
= ((queue
& 1) * 8);
898 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
899 ivar
&= ~(0xFF << index
);
900 ivar
|= (msix_vector
<< index
);
901 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
904 /* tx or rx causes */
905 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
906 index
= ((16 * (queue
& 1)) + (8 * direction
));
907 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
908 ivar
&= ~(0xFF << index
);
909 ivar
|= (msix_vector
<< index
);
910 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
918 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
923 switch (adapter
->hw
.mac
.type
) {
924 case ixgbe_mac_82598EB
:
925 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
926 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
928 case ixgbe_mac_82599EB
:
931 case ixgbe_mac_X550EM_x
:
932 case ixgbe_mac_x550em_a
:
933 mask
= (qmask
& 0xFFFFFFFF);
934 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
935 mask
= (qmask
>> 32);
936 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
943 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
944 struct ixgbe_tx_buffer
*tx_buffer
)
946 if (tx_buffer
->skb
) {
947 dev_kfree_skb_any(tx_buffer
->skb
);
948 if (dma_unmap_len(tx_buffer
, len
))
949 dma_unmap_single(ring
->dev
,
950 dma_unmap_addr(tx_buffer
, dma
),
951 dma_unmap_len(tx_buffer
, len
),
953 } else if (dma_unmap_len(tx_buffer
, len
)) {
954 dma_unmap_page(ring
->dev
,
955 dma_unmap_addr(tx_buffer
, dma
),
956 dma_unmap_len(tx_buffer
, len
),
959 tx_buffer
->next_to_watch
= NULL
;
960 tx_buffer
->skb
= NULL
;
961 dma_unmap_len_set(tx_buffer
, len
, 0);
962 /* tx_buffer must be completely set up in the transmit path */
965 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
967 struct ixgbe_hw
*hw
= &adapter
->hw
;
968 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
972 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
973 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
976 switch (hw
->mac
.type
) {
977 case ixgbe_mac_82598EB
:
978 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
981 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
983 hwstats
->lxoffrxc
+= data
;
985 /* refill credits (no tx hang) if we received xoff */
989 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
990 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
991 &adapter
->tx_ring
[i
]->state
);
994 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
996 struct ixgbe_hw
*hw
= &adapter
->hw
;
997 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
1001 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
1003 if (adapter
->ixgbe_ieee_pfc
)
1004 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
1006 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
1007 ixgbe_update_xoff_rx_lfc(adapter
);
1011 /* update stats for each tc, only valid with PFC enabled */
1012 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
1015 switch (hw
->mac
.type
) {
1016 case ixgbe_mac_82598EB
:
1017 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
1020 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
1022 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
1023 /* Get the TC for given UP */
1024 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
1025 xoff
[tc
] += pxoffrxc
;
1028 /* disarm tx queues that have received xoff frames */
1029 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1030 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
1032 tc
= tx_ring
->dcb_tc
;
1034 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1038 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
1040 return ring
->stats
.packets
;
1043 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
1045 struct ixgbe_adapter
*adapter
;
1046 struct ixgbe_hw
*hw
;
1049 if (ring
->l2_accel_priv
)
1050 adapter
= ring
->l2_accel_priv
->real_adapter
;
1052 adapter
= netdev_priv(ring
->netdev
);
1055 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
1056 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
1059 return (head
< tail
) ?
1060 tail
- head
: (tail
+ ring
->count
- head
);
1065 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
1067 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
1068 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1069 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
1071 clear_check_for_tx_hang(tx_ring
);
1074 * Check for a hung queue, but be thorough. This verifies
1075 * that a transmit has been completed since the previous
1076 * check AND there is at least one packet pending. The
1077 * ARMED bit is set to indicate a potential hang. The
1078 * bit is cleared if a pause frame is received to remove
1079 * false hang detection due to PFC or 802.3x frames. By
1080 * requiring this to fail twice we avoid races with
1081 * pfc clearing the ARMED bit and conditions where we
1082 * run the check_tx_hang logic with a transmit completion
1083 * pending but without time to complete it yet.
1085 if (tx_done_old
== tx_done
&& tx_pending
)
1086 /* make sure it is true for two checks in a row */
1087 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1089 /* update completed stats and continue */
1090 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1091 /* reset the countdown */
1092 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1098 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1099 * @adapter: driver private struct
1101 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1104 /* Do the reset outside of interrupt context */
1105 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1106 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
1107 e_warn(drv
, "initiating reset due to tx timeout\n");
1108 ixgbe_service_event_schedule(adapter
);
1113 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1115 static int ixgbe_tx_maxrate(struct net_device
*netdev
,
1116 int queue_index
, u32 maxrate
)
1118 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1119 struct ixgbe_hw
*hw
= &adapter
->hw
;
1120 u32 bcnrc_val
= ixgbe_link_mbps(adapter
);
1125 /* Calculate the rate factor values to set */
1126 bcnrc_val
<<= IXGBE_RTTBCNRC_RF_INT_SHIFT
;
1127 bcnrc_val
/= maxrate
;
1129 /* clear everything but the rate factor */
1130 bcnrc_val
&= IXGBE_RTTBCNRC_RF_INT_MASK
|
1131 IXGBE_RTTBCNRC_RF_DEC_MASK
;
1133 /* enable the rate scheduler */
1134 bcnrc_val
|= IXGBE_RTTBCNRC_RS_ENA
;
1136 IXGBE_WRITE_REG(hw
, IXGBE_RTTDQSEL
, queue_index
);
1137 IXGBE_WRITE_REG(hw
, IXGBE_RTTBCNRC
, bcnrc_val
);
1143 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1144 * @q_vector: structure containing interrupt and ring information
1145 * @tx_ring: tx ring to clean
1146 * @napi_budget: Used to determine if we are in netpoll
1148 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1149 struct ixgbe_ring
*tx_ring
, int napi_budget
)
1151 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1152 struct ixgbe_tx_buffer
*tx_buffer
;
1153 union ixgbe_adv_tx_desc
*tx_desc
;
1154 unsigned int total_bytes
= 0, total_packets
= 0;
1155 unsigned int budget
= q_vector
->tx
.work_limit
;
1156 unsigned int i
= tx_ring
->next_to_clean
;
1158 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1161 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1162 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1163 i
-= tx_ring
->count
;
1166 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1168 /* if next_to_watch is not set then there is no work pending */
1172 /* prevent any other reads prior to eop_desc */
1173 read_barrier_depends();
1175 /* if DD is not set pending work has not been completed */
1176 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1179 /* clear next_to_watch to prevent false hangs */
1180 tx_buffer
->next_to_watch
= NULL
;
1182 /* update the statistics for this packet */
1183 total_bytes
+= tx_buffer
->bytecount
;
1184 total_packets
+= tx_buffer
->gso_segs
;
1187 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
1189 /* unmap skb header data */
1190 dma_unmap_single(tx_ring
->dev
,
1191 dma_unmap_addr(tx_buffer
, dma
),
1192 dma_unmap_len(tx_buffer
, len
),
1195 /* clear tx_buffer data */
1196 tx_buffer
->skb
= NULL
;
1197 dma_unmap_len_set(tx_buffer
, len
, 0);
1199 /* unmap remaining buffers */
1200 while (tx_desc
!= eop_desc
) {
1205 i
-= tx_ring
->count
;
1206 tx_buffer
= tx_ring
->tx_buffer_info
;
1207 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1210 /* unmap any remaining paged data */
1211 if (dma_unmap_len(tx_buffer
, len
)) {
1212 dma_unmap_page(tx_ring
->dev
,
1213 dma_unmap_addr(tx_buffer
, dma
),
1214 dma_unmap_len(tx_buffer
, len
),
1216 dma_unmap_len_set(tx_buffer
, len
, 0);
1220 /* move us one more past the eop_desc for start of next pkt */
1225 i
-= tx_ring
->count
;
1226 tx_buffer
= tx_ring
->tx_buffer_info
;
1227 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1230 /* issue prefetch for next Tx descriptor */
1233 /* update budget accounting */
1235 } while (likely(budget
));
1237 i
+= tx_ring
->count
;
1238 tx_ring
->next_to_clean
= i
;
1239 u64_stats_update_begin(&tx_ring
->syncp
);
1240 tx_ring
->stats
.bytes
+= total_bytes
;
1241 tx_ring
->stats
.packets
+= total_packets
;
1242 u64_stats_update_end(&tx_ring
->syncp
);
1243 q_vector
->tx
.total_bytes
+= total_bytes
;
1244 q_vector
->tx
.total_packets
+= total_packets
;
1246 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1247 /* schedule immediate reset if we believe we hung */
1248 struct ixgbe_hw
*hw
= &adapter
->hw
;
1249 e_err(drv
, "Detected Tx Unit Hang\n"
1251 " TDH, TDT <%x>, <%x>\n"
1252 " next_to_use <%x>\n"
1253 " next_to_clean <%x>\n"
1254 "tx_buffer_info[next_to_clean]\n"
1255 " time_stamp <%lx>\n"
1257 tx_ring
->queue_index
,
1258 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1259 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1260 tx_ring
->next_to_use
, i
,
1261 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1263 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1266 "tx hang %d detected on queue %d, resetting adapter\n",
1267 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1269 /* schedule immediate reset if we believe we hung */
1270 ixgbe_tx_timeout_reset(adapter
);
1272 /* the adapter is about to reset, no point in enabling stuff */
1276 netdev_tx_completed_queue(txring_txq(tx_ring
),
1277 total_packets
, total_bytes
);
1279 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1280 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1281 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1282 /* Make sure that anybody stopping the queue after this
1283 * sees the new next_to_clean.
1286 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1287 tx_ring
->queue_index
)
1288 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1289 netif_wake_subqueue(tx_ring
->netdev
,
1290 tx_ring
->queue_index
);
1291 ++tx_ring
->tx_stats
.restart_queue
;
1298 #ifdef CONFIG_IXGBE_DCA
1299 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1300 struct ixgbe_ring
*tx_ring
,
1303 struct ixgbe_hw
*hw
= &adapter
->hw
;
1307 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1308 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1310 switch (hw
->mac
.type
) {
1311 case ixgbe_mac_82598EB
:
1312 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1314 case ixgbe_mac_82599EB
:
1315 case ixgbe_mac_X540
:
1316 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1317 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1320 /* for unknown hardware do not write register */
1325 * We can enable relaxed ordering for reads, but not writes when
1326 * DCA is enabled. This is due to a known issue in some chipsets
1327 * which will cause the DCA tag to be cleared.
1329 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1330 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1331 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1333 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1336 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1337 struct ixgbe_ring
*rx_ring
,
1340 struct ixgbe_hw
*hw
= &adapter
->hw
;
1342 u8 reg_idx
= rx_ring
->reg_idx
;
1344 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1345 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1347 switch (hw
->mac
.type
) {
1348 case ixgbe_mac_82599EB
:
1349 case ixgbe_mac_X540
:
1350 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1357 * We can enable relaxed ordering for reads, but not writes when
1358 * DCA is enabled. This is due to a known issue in some chipsets
1359 * which will cause the DCA tag to be cleared.
1361 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1362 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
1363 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1365 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1368 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1370 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1371 struct ixgbe_ring
*ring
;
1372 int cpu
= get_cpu();
1374 if (q_vector
->cpu
== cpu
)
1377 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1378 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1380 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1381 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1383 q_vector
->cpu
= cpu
;
1388 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1392 /* always use CB2 mode, difference is masked in the CB driver */
1393 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1394 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1395 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1397 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1398 IXGBE_DCA_CTRL_DCA_DISABLE
);
1400 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1401 adapter
->q_vector
[i
]->cpu
= -1;
1402 ixgbe_update_dca(adapter
->q_vector
[i
]);
1406 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1408 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1409 unsigned long event
= *(unsigned long *)data
;
1411 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1415 case DCA_PROVIDER_ADD
:
1416 /* if we're already enabled, don't do it again */
1417 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1419 if (dca_add_requester(dev
) == 0) {
1420 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1421 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1422 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1425 /* Fall Through since DCA is disabled. */
1426 case DCA_PROVIDER_REMOVE
:
1427 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1428 dca_remove_requester(dev
);
1429 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1430 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1431 IXGBE_DCA_CTRL_DCA_DISABLE
);
1439 #endif /* CONFIG_IXGBE_DCA */
1441 #define IXGBE_RSS_L4_TYPES_MASK \
1442 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1443 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1444 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1445 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1447 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1448 union ixgbe_adv_rx_desc
*rx_desc
,
1449 struct sk_buff
*skb
)
1453 if (!(ring
->netdev
->features
& NETIF_F_RXHASH
))
1456 rss_type
= le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
) &
1457 IXGBE_RXDADV_RSSTYPE_MASK
;
1462 skb_set_hash(skb
, le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1463 (IXGBE_RSS_L4_TYPES_MASK
& (1ul << rss_type
)) ?
1464 PKT_HASH_TYPE_L4
: PKT_HASH_TYPE_L3
);
1469 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1470 * @ring: structure containing ring specific data
1471 * @rx_desc: advanced rx descriptor
1473 * Returns : true if it is FCoE pkt
1475 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1476 union ixgbe_adv_rx_desc
*rx_desc
)
1478 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1480 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1481 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1482 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1483 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1486 #endif /* IXGBE_FCOE */
1488 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1489 * @ring: structure containing ring specific data
1490 * @rx_desc: current Rx descriptor being processed
1491 * @skb: skb currently being received and modified
1493 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1494 union ixgbe_adv_rx_desc
*rx_desc
,
1495 struct sk_buff
*skb
)
1497 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1498 __le16 hdr_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1499 bool encap_pkt
= false;
1501 skb_checksum_none_assert(skb
);
1503 /* Rx csum disabled */
1504 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1507 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN
)) &&
1508 (hdr_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL
>> 16))) {
1510 skb
->encapsulation
= 1;
1513 /* if IP and error */
1514 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1515 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1516 ring
->rx_stats
.csum_err
++;
1520 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1523 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1525 * 82599 errata, UDP frames with a 0 checksum can be marked as
1528 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1529 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1532 ring
->rx_stats
.csum_err
++;
1536 /* It must be a TCP or UDP packet with a valid checksum */
1537 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1539 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_OUTERIPCS
))
1542 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_OUTERIPER
)) {
1543 skb
->ip_summed
= CHECKSUM_NONE
;
1546 /* If we checked the outer header let the stack know */
1547 skb
->csum_level
= 1;
1551 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1552 struct ixgbe_rx_buffer
*bi
)
1554 struct page
*page
= bi
->page
;
1557 /* since we are recycling buffers we should seldom need to alloc */
1561 /* alloc new page for storage */
1562 page
= dev_alloc_pages(ixgbe_rx_pg_order(rx_ring
));
1563 if (unlikely(!page
)) {
1564 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1568 /* map page for use */
1569 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1570 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1573 * if mapping failed free memory back to system since
1574 * there isn't much point in holding memory we can't use
1576 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1577 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1579 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1585 bi
->page_offset
= 0;
1591 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1592 * @rx_ring: ring to place buffers on
1593 * @cleaned_count: number of buffers to replace
1595 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1597 union ixgbe_adv_rx_desc
*rx_desc
;
1598 struct ixgbe_rx_buffer
*bi
;
1599 u16 i
= rx_ring
->next_to_use
;
1605 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1606 bi
= &rx_ring
->rx_buffer_info
[i
];
1607 i
-= rx_ring
->count
;
1610 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1614 * Refresh the desc even if buffer_addrs didn't change
1615 * because each write-back erases this info.
1617 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1623 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1624 bi
= rx_ring
->rx_buffer_info
;
1625 i
-= rx_ring
->count
;
1628 /* clear the status bits for the next_to_use descriptor */
1629 rx_desc
->wb
.upper
.status_error
= 0;
1632 } while (cleaned_count
);
1634 i
+= rx_ring
->count
;
1636 if (rx_ring
->next_to_use
!= i
) {
1637 rx_ring
->next_to_use
= i
;
1639 /* update next to alloc since we have filled the ring */
1640 rx_ring
->next_to_alloc
= i
;
1642 /* Force memory writes to complete before letting h/w
1643 * know there are new descriptors to fetch. (Only
1644 * applicable for weak-ordered memory model archs,
1648 writel(i
, rx_ring
->tail
);
1652 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1653 struct sk_buff
*skb
)
1655 u16 hdr_len
= skb_headlen(skb
);
1657 /* set gso_size to avoid messing up TCP MSS */
1658 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1659 IXGBE_CB(skb
)->append_cnt
);
1660 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1663 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1664 struct sk_buff
*skb
)
1666 /* if append_cnt is 0 then frame is not RSC */
1667 if (!IXGBE_CB(skb
)->append_cnt
)
1670 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1671 rx_ring
->rx_stats
.rsc_flush
++;
1673 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1675 /* gso_size is computed using append_cnt so always clear it last */
1676 IXGBE_CB(skb
)->append_cnt
= 0;
1680 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1681 * @rx_ring: rx descriptor ring packet is being transacted on
1682 * @rx_desc: pointer to the EOP Rx descriptor
1683 * @skb: pointer to current skb being populated
1685 * This function checks the ring, descriptor, and packet information in
1686 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1687 * other fields within the skb.
1689 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1690 union ixgbe_adv_rx_desc
*rx_desc
,
1691 struct sk_buff
*skb
)
1693 struct net_device
*dev
= rx_ring
->netdev
;
1694 u32 flags
= rx_ring
->q_vector
->adapter
->flags
;
1696 ixgbe_update_rsc_stats(rx_ring
, skb
);
1698 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1700 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1702 if (unlikely(flags
& IXGBE_FLAG_RX_HWTSTAMP_ENABLED
))
1703 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1705 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1706 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1707 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1708 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1711 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1713 skb
->protocol
= eth_type_trans(skb
, dev
);
1716 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1717 struct sk_buff
*skb
)
1719 skb_mark_napi_id(skb
, &q_vector
->napi
);
1720 if (ixgbe_qv_busy_polling(q_vector
))
1721 netif_receive_skb(skb
);
1723 napi_gro_receive(&q_vector
->napi
, skb
);
1727 * ixgbe_is_non_eop - process handling of non-EOP buffers
1728 * @rx_ring: Rx ring being processed
1729 * @rx_desc: Rx descriptor for current buffer
1730 * @skb: Current socket buffer containing buffer in progress
1732 * This function updates next to clean. If the buffer is an EOP buffer
1733 * this function exits returning false, otherwise it will place the
1734 * sk_buff in the next buffer to be chained and return true indicating
1735 * that this is in fact a non-EOP buffer.
1737 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1738 union ixgbe_adv_rx_desc
*rx_desc
,
1739 struct sk_buff
*skb
)
1741 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1743 /* fetch, update, and store next to clean */
1744 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1745 rx_ring
->next_to_clean
= ntc
;
1747 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1749 /* update RSC append count if present */
1750 if (ring_is_rsc_enabled(rx_ring
)) {
1751 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1752 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1754 if (unlikely(rsc_enabled
)) {
1755 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1757 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1758 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1760 /* update ntc based on RSC value */
1761 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1762 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1763 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1767 /* if we are the last buffer then there is nothing else to do */
1768 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1771 /* place skb in next buffer to be received */
1772 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1773 rx_ring
->rx_stats
.non_eop_descs
++;
1779 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1780 * @rx_ring: rx descriptor ring packet is being transacted on
1781 * @skb: pointer to current skb being adjusted
1783 * This function is an ixgbe specific version of __pskb_pull_tail. The
1784 * main difference between this version and the original function is that
1785 * this function can make several assumptions about the state of things
1786 * that allow for significant optimizations versus the standard function.
1787 * As a result we can do things like drop a frag and maintain an accurate
1788 * truesize for the skb.
1790 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1791 struct sk_buff
*skb
)
1793 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1795 unsigned int pull_len
;
1798 * it is valid to use page_address instead of kmap since we are
1799 * working with pages allocated out of the lomem pool per
1800 * alloc_page(GFP_ATOMIC)
1802 va
= skb_frag_address(frag
);
1805 * we need the header to contain the greater of either ETH_HLEN or
1806 * 60 bytes if the skb->len is less than 60 for skb_pad.
1808 pull_len
= eth_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1810 /* align pull length to size of long to optimize memcpy performance */
1811 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1813 /* update all of the pointers */
1814 skb_frag_size_sub(frag
, pull_len
);
1815 frag
->page_offset
+= pull_len
;
1816 skb
->data_len
-= pull_len
;
1817 skb
->tail
+= pull_len
;
1821 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1822 * @rx_ring: rx descriptor ring packet is being transacted on
1823 * @skb: pointer to current skb being updated
1825 * This function provides a basic DMA sync up for the first fragment of an
1826 * skb. The reason for doing this is that the first fragment cannot be
1827 * unmapped until we have reached the end of packet descriptor for a buffer
1830 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1831 struct sk_buff
*skb
)
1833 /* if the page was released unmap it, else just sync our portion */
1834 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1835 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1836 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1837 IXGBE_CB(skb
)->page_released
= false;
1839 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1841 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1844 ixgbe_rx_bufsz(rx_ring
),
1847 IXGBE_CB(skb
)->dma
= 0;
1851 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1852 * @rx_ring: rx descriptor ring packet is being transacted on
1853 * @rx_desc: pointer to the EOP Rx descriptor
1854 * @skb: pointer to current skb being fixed
1856 * Check for corrupted packet headers caused by senders on the local L2
1857 * embedded NIC switch not setting up their Tx Descriptors right. These
1858 * should be very rare.
1860 * Also address the case where we are pulling data in on pages only
1861 * and as such no data is present in the skb header.
1863 * In addition if skb is not at least 60 bytes we need to pad it so that
1864 * it is large enough to qualify as a valid Ethernet frame.
1866 * Returns true if an error was encountered and skb was freed.
1868 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1869 union ixgbe_adv_rx_desc
*rx_desc
,
1870 struct sk_buff
*skb
)
1872 struct net_device
*netdev
= rx_ring
->netdev
;
1874 /* verify that the packet does not have any known errors */
1875 if (unlikely(ixgbe_test_staterr(rx_desc
,
1876 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1877 !(netdev
->features
& NETIF_F_RXALL
))) {
1878 dev_kfree_skb_any(skb
);
1882 /* place header in linear portion of buffer */
1883 if (skb_is_nonlinear(skb
))
1884 ixgbe_pull_tail(rx_ring
, skb
);
1887 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1888 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1892 /* if eth_skb_pad returns an error the skb was freed */
1893 if (eth_skb_pad(skb
))
1900 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1901 * @rx_ring: rx descriptor ring to store buffers on
1902 * @old_buff: donor buffer to have page reused
1904 * Synchronizes page for reuse by the adapter
1906 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1907 struct ixgbe_rx_buffer
*old_buff
)
1909 struct ixgbe_rx_buffer
*new_buff
;
1910 u16 nta
= rx_ring
->next_to_alloc
;
1912 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1914 /* update, and store next to alloc */
1916 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1918 /* transfer page from old buffer to new buffer */
1919 *new_buff
= *old_buff
;
1921 /* sync the buffer for use by the device */
1922 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1923 new_buff
->page_offset
,
1924 ixgbe_rx_bufsz(rx_ring
),
1928 static inline bool ixgbe_page_is_reserved(struct page
*page
)
1930 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
1934 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1935 * @rx_ring: rx descriptor ring to transact packets on
1936 * @rx_buffer: buffer containing page to add
1937 * @rx_desc: descriptor containing length of buffer written by hardware
1938 * @skb: sk_buff to place the data into
1940 * This function will add the data contained in rx_buffer->page to the skb.
1941 * This is done either through a direct copy if the data in the buffer is
1942 * less than the skb header size, otherwise it will just attach the page as
1943 * a frag to the skb.
1945 * The function will then update the page offset if necessary and return
1946 * true if the buffer can be reused by the adapter.
1948 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1949 struct ixgbe_rx_buffer
*rx_buffer
,
1950 union ixgbe_adv_rx_desc
*rx_desc
,
1951 struct sk_buff
*skb
)
1953 struct page
*page
= rx_buffer
->page
;
1954 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1955 #if (PAGE_SIZE < 8192)
1956 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1958 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1959 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1960 ixgbe_rx_bufsz(rx_ring
);
1963 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1964 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1966 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1968 /* page is not reserved, we can reuse buffer as-is */
1969 if (likely(!ixgbe_page_is_reserved(page
)))
1972 /* this page cannot be reused so discard it */
1973 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1977 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1978 rx_buffer
->page_offset
, size
, truesize
);
1980 /* avoid re-using remote pages */
1981 if (unlikely(ixgbe_page_is_reserved(page
)))
1984 #if (PAGE_SIZE < 8192)
1985 /* if we are only owner of page we can reuse it */
1986 if (unlikely(page_count(page
) != 1))
1989 /* flip page offset to other buffer */
1990 rx_buffer
->page_offset
^= truesize
;
1992 /* move offset up to the next cache line */
1993 rx_buffer
->page_offset
+= truesize
;
1995 if (rx_buffer
->page_offset
> last_offset
)
1999 /* Even if we own the page, we are not allowed to use atomic_set()
2000 * This would break get_page_unless_zero() users.
2007 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
2008 union ixgbe_adv_rx_desc
*rx_desc
)
2010 struct ixgbe_rx_buffer
*rx_buffer
;
2011 struct sk_buff
*skb
;
2014 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
2015 page
= rx_buffer
->page
;
2018 skb
= rx_buffer
->skb
;
2021 void *page_addr
= page_address(page
) +
2022 rx_buffer
->page_offset
;
2024 /* prefetch first cache line of first page */
2025 prefetch(page_addr
);
2026 #if L1_CACHE_BYTES < 128
2027 prefetch(page_addr
+ L1_CACHE_BYTES
);
2030 /* allocate a skb to store the frags */
2031 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
,
2033 if (unlikely(!skb
)) {
2034 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
2039 * we will be copying header into skb->data in
2040 * pskb_may_pull so it is in our interest to prefetch
2041 * it now to avoid a possible cache miss
2043 prefetchw(skb
->data
);
2046 * Delay unmapping of the first packet. It carries the
2047 * header information, HW may still access the header
2048 * after the writeback. Only unmap it when EOP is
2051 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
2054 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2056 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2057 ixgbe_dma_sync_frag(rx_ring
, skb
);
2060 /* we are reusing so sync this buffer for CPU use */
2061 dma_sync_single_range_for_cpu(rx_ring
->dev
,
2063 rx_buffer
->page_offset
,
2064 ixgbe_rx_bufsz(rx_ring
),
2067 rx_buffer
->skb
= NULL
;
2070 /* pull page into skb */
2071 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
2072 /* hand second half of page back to the ring */
2073 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
2074 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
2075 /* the page has been released from the ring */
2076 IXGBE_CB(skb
)->page_released
= true;
2078 /* we are not reusing the buffer so unmap it */
2079 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
2080 ixgbe_rx_pg_size(rx_ring
),
2084 /* clear contents of buffer_info */
2085 rx_buffer
->page
= NULL
;
2091 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2092 * @q_vector: structure containing interrupt and ring information
2093 * @rx_ring: rx descriptor ring to transact packets on
2094 * @budget: Total limit on number of packets to process
2096 * This function provides a "bounce buffer" approach to Rx interrupt
2097 * processing. The advantage to this is that on systems that have
2098 * expensive overhead for IOMMU access this provides a means of avoiding
2099 * it by maintaining the mapping of the page to the syste.
2101 * Returns amount of work completed
2103 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2104 struct ixgbe_ring
*rx_ring
,
2107 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
2109 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2111 unsigned int mss
= 0;
2112 #endif /* IXGBE_FCOE */
2113 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2115 while (likely(total_rx_packets
< budget
)) {
2116 union ixgbe_adv_rx_desc
*rx_desc
;
2117 struct sk_buff
*skb
;
2119 /* return some buffers to hardware, one at a time is too slow */
2120 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2121 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2125 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2127 if (!rx_desc
->wb
.upper
.status_error
)
2130 /* This memory barrier is needed to keep us from reading
2131 * any other fields out of the rx_desc until we know the
2132 * descriptor has been written back
2136 /* retrieve a buffer from the ring */
2137 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2139 /* exit if we failed to retrieve a buffer */
2145 /* place incomplete frames back on ring for completion */
2146 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2149 /* verify the packet layout is correct */
2150 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2153 /* probably a little skewed due to removing CRC */
2154 total_rx_bytes
+= skb
->len
;
2156 /* populate checksum, timestamp, VLAN, and protocol */
2157 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2160 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2161 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2162 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2163 /* include DDPed FCoE data */
2164 if (ddp_bytes
> 0) {
2166 mss
= rx_ring
->netdev
->mtu
-
2167 sizeof(struct fcoe_hdr
) -
2168 sizeof(struct fc_frame_header
) -
2169 sizeof(struct fcoe_crc_eof
);
2173 total_rx_bytes
+= ddp_bytes
;
2174 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2178 dev_kfree_skb_any(skb
);
2183 #endif /* IXGBE_FCOE */
2184 ixgbe_rx_skb(q_vector
, skb
);
2186 /* update budget accounting */
2190 u64_stats_update_begin(&rx_ring
->syncp
);
2191 rx_ring
->stats
.packets
+= total_rx_packets
;
2192 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2193 u64_stats_update_end(&rx_ring
->syncp
);
2194 q_vector
->rx
.total_packets
+= total_rx_packets
;
2195 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2197 return total_rx_packets
;
2200 #ifdef CONFIG_NET_RX_BUSY_POLL
2201 /* must be called with local_bh_disable()d */
2202 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2204 struct ixgbe_q_vector
*q_vector
=
2205 container_of(napi
, struct ixgbe_q_vector
, napi
);
2206 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2207 struct ixgbe_ring
*ring
;
2210 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2211 return LL_FLUSH_FAILED
;
2213 if (!ixgbe_qv_lock_poll(q_vector
))
2214 return LL_FLUSH_BUSY
;
2216 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2217 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2218 #ifdef BP_EXTENDED_STATS
2220 ring
->stats
.cleaned
+= found
;
2222 ring
->stats
.misses
++;
2228 ixgbe_qv_unlock_poll(q_vector
);
2232 #endif /* CONFIG_NET_RX_BUSY_POLL */
2235 * ixgbe_configure_msix - Configure MSI-X hardware
2236 * @adapter: board private structure
2238 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2241 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2243 struct ixgbe_q_vector
*q_vector
;
2247 /* Populate MSIX to EITR Select */
2248 if (adapter
->num_vfs
> 32) {
2249 u32 eitrsel
= BIT(adapter
->num_vfs
- 32) - 1;
2250 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2254 * Populate the IVAR table and set the ITR values to the
2255 * corresponding register.
2257 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2258 struct ixgbe_ring
*ring
;
2259 q_vector
= adapter
->q_vector
[v_idx
];
2261 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2262 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2264 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2265 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2267 ixgbe_write_eitr(q_vector
);
2270 switch (adapter
->hw
.mac
.type
) {
2271 case ixgbe_mac_82598EB
:
2272 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2275 case ixgbe_mac_82599EB
:
2276 case ixgbe_mac_X540
:
2277 case ixgbe_mac_X550
:
2278 case ixgbe_mac_X550EM_x
:
2279 case ixgbe_mac_x550em_a
:
2280 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2285 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2287 /* set up to autoclear timer, and the vectors */
2288 mask
= IXGBE_EIMS_ENABLE_MASK
;
2289 mask
&= ~(IXGBE_EIMS_OTHER
|
2290 IXGBE_EIMS_MAILBOX
|
2293 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2296 enum latency_range
{
2300 latency_invalid
= 255
2304 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2305 * @q_vector: structure containing interrupt and ring information
2306 * @ring_container: structure containing ring performance data
2308 * Stores a new ITR value based on packets and byte
2309 * counts during the last interrupt. The advantage of per interrupt
2310 * computation is faster updates and more accurate ITR for the current
2311 * traffic pattern. Constants in this function were computed
2312 * based on theoretical maximum wire speed and thresholds were set based
2313 * on testing data as well as attempting to minimize response time
2314 * while increasing bulk throughput.
2315 * this functionality is controlled by the InterruptThrottleRate module
2316 * parameter (see ixgbe_param.c)
2318 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2319 struct ixgbe_ring_container
*ring_container
)
2321 int bytes
= ring_container
->total_bytes
;
2322 int packets
= ring_container
->total_packets
;
2325 u8 itr_setting
= ring_container
->itr
;
2330 /* simple throttlerate management
2331 * 0-10MB/s lowest (100000 ints/s)
2332 * 10-20MB/s low (20000 ints/s)
2333 * 20-1249MB/s bulk (12000 ints/s)
2335 /* what was last interrupt timeslice? */
2336 timepassed_us
= q_vector
->itr
>> 2;
2337 if (timepassed_us
== 0)
2340 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2342 switch (itr_setting
) {
2343 case lowest_latency
:
2344 if (bytes_perint
> 10)
2345 itr_setting
= low_latency
;
2348 if (bytes_perint
> 20)
2349 itr_setting
= bulk_latency
;
2350 else if (bytes_perint
<= 10)
2351 itr_setting
= lowest_latency
;
2354 if (bytes_perint
<= 20)
2355 itr_setting
= low_latency
;
2359 /* clear work counters since we have the values we need */
2360 ring_container
->total_bytes
= 0;
2361 ring_container
->total_packets
= 0;
2363 /* write updated itr to ring container */
2364 ring_container
->itr
= itr_setting
;
2368 * ixgbe_write_eitr - write EITR register in hardware specific way
2369 * @q_vector: structure containing interrupt and ring information
2371 * This function is made to be called by ethtool and by the driver
2372 * when it needs to update EITR registers at runtime. Hardware
2373 * specific quirks/differences are taken care of here.
2375 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2377 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2378 struct ixgbe_hw
*hw
= &adapter
->hw
;
2379 int v_idx
= q_vector
->v_idx
;
2380 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2382 switch (adapter
->hw
.mac
.type
) {
2383 case ixgbe_mac_82598EB
:
2384 /* must write high and low 16 bits to reset counter */
2385 itr_reg
|= (itr_reg
<< 16);
2387 case ixgbe_mac_82599EB
:
2388 case ixgbe_mac_X540
:
2389 case ixgbe_mac_X550
:
2390 case ixgbe_mac_X550EM_x
:
2391 case ixgbe_mac_x550em_a
:
2393 * set the WDIS bit to not clear the timer bits and cause an
2394 * immediate assertion of the interrupt
2396 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2401 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2404 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2406 u32 new_itr
= q_vector
->itr
;
2409 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2410 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2412 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2414 switch (current_itr
) {
2415 /* counts and packets in update_itr are dependent on these numbers */
2416 case lowest_latency
:
2417 new_itr
= IXGBE_100K_ITR
;
2420 new_itr
= IXGBE_20K_ITR
;
2423 new_itr
= IXGBE_12K_ITR
;
2429 if (new_itr
!= q_vector
->itr
) {
2430 /* do an exponential smoothing */
2431 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2432 ((9 * new_itr
) + q_vector
->itr
);
2434 /* save the algorithm value here */
2435 q_vector
->itr
= new_itr
;
2437 ixgbe_write_eitr(q_vector
);
2442 * ixgbe_check_overtemp_subtask - check for over temperature
2443 * @adapter: pointer to adapter
2445 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2447 struct ixgbe_hw
*hw
= &adapter
->hw
;
2448 u32 eicr
= adapter
->interrupt_event
;
2450 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2453 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2454 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2457 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2459 switch (hw
->device_id
) {
2460 case IXGBE_DEV_ID_82599_T3_LOM
:
2462 * Since the warning interrupt is for both ports
2463 * we don't have to check if:
2464 * - This interrupt wasn't for our port.
2465 * - We may have missed the interrupt so always have to
2466 * check if we got a LSC
2468 if (!(eicr
& IXGBE_EICR_GPI_SDP0_8259X
) &&
2469 !(eicr
& IXGBE_EICR_LSC
))
2472 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2474 bool link_up
= false;
2476 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2482 /* Check if this is not due to overtemp */
2483 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2488 if (adapter
->hw
.mac
.type
>= ixgbe_mac_X540
)
2490 if (!(eicr
& IXGBE_EICR_GPI_SDP0(hw
)))
2494 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2496 adapter
->interrupt_event
= 0;
2499 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2501 struct ixgbe_hw
*hw
= &adapter
->hw
;
2503 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2504 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2505 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2506 /* write to clear the interrupt */
2507 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2511 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2513 struct ixgbe_hw
*hw
= &adapter
->hw
;
2515 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2518 switch (adapter
->hw
.mac
.type
) {
2519 case ixgbe_mac_82599EB
:
2521 * Need to check link state so complete overtemp check
2524 if (((eicr
& IXGBE_EICR_GPI_SDP0(hw
)) ||
2525 (eicr
& IXGBE_EICR_LSC
)) &&
2526 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2527 adapter
->interrupt_event
= eicr
;
2528 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2529 ixgbe_service_event_schedule(adapter
);
2533 case ixgbe_mac_X540
:
2534 if (!(eicr
& IXGBE_EICR_TS
))
2541 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2544 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2546 switch (hw
->mac
.type
) {
2547 case ixgbe_mac_82598EB
:
2548 if (hw
->phy
.type
== ixgbe_phy_nl
)
2551 case ixgbe_mac_82599EB
:
2552 case ixgbe_mac_X550EM_x
:
2553 case ixgbe_mac_x550em_a
:
2554 switch (hw
->mac
.ops
.get_media_type(hw
)) {
2555 case ixgbe_media_type_fiber
:
2556 case ixgbe_media_type_fiber_qsfp
:
2566 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2568 struct ixgbe_hw
*hw
= &adapter
->hw
;
2569 u32 eicr_mask
= IXGBE_EICR_GPI_SDP2(hw
);
2571 if (!ixgbe_is_sfp(hw
))
2574 /* Later MAC's use different SDP */
2575 if (hw
->mac
.type
>= ixgbe_mac_X540
)
2576 eicr_mask
= IXGBE_EICR_GPI_SDP0_X540
;
2578 if (eicr
& eicr_mask
) {
2579 /* Clear the interrupt */
2580 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr_mask
);
2581 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2582 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2583 adapter
->sfp_poll_time
= 0;
2584 ixgbe_service_event_schedule(adapter
);
2588 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
&&
2589 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2590 /* Clear the interrupt */
2591 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2592 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2593 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2594 ixgbe_service_event_schedule(adapter
);
2599 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2601 struct ixgbe_hw
*hw
= &adapter
->hw
;
2604 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2605 adapter
->link_check_timeout
= jiffies
;
2606 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2607 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2608 IXGBE_WRITE_FLUSH(hw
);
2609 ixgbe_service_event_schedule(adapter
);
2613 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2617 struct ixgbe_hw
*hw
= &adapter
->hw
;
2619 switch (hw
->mac
.type
) {
2620 case ixgbe_mac_82598EB
:
2621 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2622 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2624 case ixgbe_mac_82599EB
:
2625 case ixgbe_mac_X540
:
2626 case ixgbe_mac_X550
:
2627 case ixgbe_mac_X550EM_x
:
2628 case ixgbe_mac_x550em_a
:
2629 mask
= (qmask
& 0xFFFFFFFF);
2631 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2632 mask
= (qmask
>> 32);
2634 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2639 /* skip the flush */
2642 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2646 struct ixgbe_hw
*hw
= &adapter
->hw
;
2648 switch (hw
->mac
.type
) {
2649 case ixgbe_mac_82598EB
:
2650 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2651 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2653 case ixgbe_mac_82599EB
:
2654 case ixgbe_mac_X540
:
2655 case ixgbe_mac_X550
:
2656 case ixgbe_mac_X550EM_x
:
2657 case ixgbe_mac_x550em_a
:
2658 mask
= (qmask
& 0xFFFFFFFF);
2660 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2661 mask
= (qmask
>> 32);
2663 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2668 /* skip the flush */
2672 * ixgbe_irq_enable - Enable default interrupt generation settings
2673 * @adapter: board private structure
2675 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2678 struct ixgbe_hw
*hw
= &adapter
->hw
;
2679 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2681 /* don't reenable LSC while waiting for link */
2682 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2683 mask
&= ~IXGBE_EIMS_LSC
;
2685 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2686 switch (adapter
->hw
.mac
.type
) {
2687 case ixgbe_mac_82599EB
:
2688 mask
|= IXGBE_EIMS_GPI_SDP0(hw
);
2690 case ixgbe_mac_X540
:
2691 case ixgbe_mac_X550
:
2692 case ixgbe_mac_X550EM_x
:
2693 case ixgbe_mac_x550em_a
:
2694 mask
|= IXGBE_EIMS_TS
;
2699 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2700 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2701 switch (adapter
->hw
.mac
.type
) {
2702 case ixgbe_mac_82599EB
:
2703 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2704 mask
|= IXGBE_EIMS_GPI_SDP2(hw
);
2706 case ixgbe_mac_X540
:
2707 case ixgbe_mac_X550
:
2708 case ixgbe_mac_X550EM_x
:
2709 case ixgbe_mac_x550em_a
:
2710 if (adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_X_SFP
||
2711 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP
||
2712 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP_N
)
2713 mask
|= IXGBE_EIMS_GPI_SDP0(&adapter
->hw
);
2714 if (adapter
->hw
.phy
.type
== ixgbe_phy_x550em_ext_t
)
2715 mask
|= IXGBE_EICR_GPI_SDP0_X540
;
2716 mask
|= IXGBE_EIMS_ECC
;
2717 mask
|= IXGBE_EIMS_MAILBOX
;
2723 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2724 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2725 mask
|= IXGBE_EIMS_FLOW_DIR
;
2727 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2729 ixgbe_irq_enable_queues(adapter
, ~0);
2731 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2734 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2736 struct ixgbe_adapter
*adapter
= data
;
2737 struct ixgbe_hw
*hw
= &adapter
->hw
;
2741 * Workaround for Silicon errata. Use clear-by-write instead
2742 * of clear-by-read. Reading with EICS will return the
2743 * interrupt causes without clearing, which later be done
2744 * with the write to EICR.
2746 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2748 /* The lower 16bits of the EICR register are for the queue interrupts
2749 * which should be masked here in order to not accidentally clear them if
2750 * the bits are high when ixgbe_msix_other is called. There is a race
2751 * condition otherwise which results in possible performance loss
2752 * especially if the ixgbe_msix_other interrupt is triggering
2753 * consistently (as it would when PPS is turned on for the X540 device)
2757 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2759 if (eicr
& IXGBE_EICR_LSC
)
2760 ixgbe_check_lsc(adapter
);
2762 if (eicr
& IXGBE_EICR_MAILBOX
)
2763 ixgbe_msg_task(adapter
);
2765 switch (hw
->mac
.type
) {
2766 case ixgbe_mac_82599EB
:
2767 case ixgbe_mac_X540
:
2768 case ixgbe_mac_X550
:
2769 case ixgbe_mac_X550EM_x
:
2770 case ixgbe_mac_x550em_a
:
2771 if (hw
->phy
.type
== ixgbe_phy_x550em_ext_t
&&
2772 (eicr
& IXGBE_EICR_GPI_SDP0_X540
)) {
2773 adapter
->flags2
|= IXGBE_FLAG2_PHY_INTERRUPT
;
2774 ixgbe_service_event_schedule(adapter
);
2775 IXGBE_WRITE_REG(hw
, IXGBE_EICR
,
2776 IXGBE_EICR_GPI_SDP0_X540
);
2778 if (eicr
& IXGBE_EICR_ECC
) {
2779 e_info(link
, "Received ECC Err, initiating reset\n");
2780 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2781 ixgbe_service_event_schedule(adapter
);
2782 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2784 /* Handle Flow Director Full threshold interrupt */
2785 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2786 int reinit_count
= 0;
2788 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2789 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2790 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2795 /* no more flow director interrupts until after init */
2796 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2797 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2798 ixgbe_service_event_schedule(adapter
);
2801 ixgbe_check_sfp_event(adapter
, eicr
);
2802 ixgbe_check_overtemp_event(adapter
, eicr
);
2808 ixgbe_check_fan_failure(adapter
, eicr
);
2810 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2811 ixgbe_ptp_check_pps_event(adapter
);
2813 /* re-enable the original interrupt state, no lsc, no queues */
2814 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2815 ixgbe_irq_enable(adapter
, false, false);
2820 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2822 struct ixgbe_q_vector
*q_vector
= data
;
2824 /* EIAM disabled interrupts (on this vector) for us */
2826 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2827 napi_schedule_irqoff(&q_vector
->napi
);
2833 * ixgbe_poll - NAPI Rx polling callback
2834 * @napi: structure for representing this polling device
2835 * @budget: how many packets driver is allowed to clean
2837 * This function is used for legacy and MSI, NAPI mode
2839 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2841 struct ixgbe_q_vector
*q_vector
=
2842 container_of(napi
, struct ixgbe_q_vector
, napi
);
2843 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2844 struct ixgbe_ring
*ring
;
2845 int per_ring_budget
, work_done
= 0;
2846 bool clean_complete
= true;
2848 #ifdef CONFIG_IXGBE_DCA
2849 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2850 ixgbe_update_dca(q_vector
);
2853 ixgbe_for_each_ring(ring
, q_vector
->tx
) {
2854 if (!ixgbe_clean_tx_irq(q_vector
, ring
, budget
))
2855 clean_complete
= false;
2858 /* Exit if we are called by netpoll or busy polling is active */
2859 if ((budget
<= 0) || !ixgbe_qv_lock_napi(q_vector
))
2862 /* attempt to distribute budget to each queue fairly, but don't allow
2863 * the budget to go below 1 because we'll exit polling */
2864 if (q_vector
->rx
.count
> 1)
2865 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2867 per_ring_budget
= budget
;
2869 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2870 int cleaned
= ixgbe_clean_rx_irq(q_vector
, ring
,
2873 work_done
+= cleaned
;
2874 if (cleaned
>= per_ring_budget
)
2875 clean_complete
= false;
2878 ixgbe_qv_unlock_napi(q_vector
);
2879 /* If all work not completed, return budget and keep polling */
2880 if (!clean_complete
)
2883 /* all work done, exit the polling mode */
2884 napi_complete_done(napi
, work_done
);
2885 if (adapter
->rx_itr_setting
& 1)
2886 ixgbe_set_itr(q_vector
);
2887 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2888 ixgbe_irq_enable_queues(adapter
, BIT_ULL(q_vector
->v_idx
));
2894 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2895 * @adapter: board private structure
2897 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2898 * interrupts from the kernel.
2900 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2902 struct net_device
*netdev
= adapter
->netdev
;
2906 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2907 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2908 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2910 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2911 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2912 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2914 } else if (q_vector
->rx
.ring
) {
2915 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2916 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2917 } else if (q_vector
->tx
.ring
) {
2918 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2919 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2921 /* skip this unused q_vector */
2924 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2925 q_vector
->name
, q_vector
);
2927 e_err(probe
, "request_irq failed for MSIX interrupt "
2928 "Error: %d\n", err
);
2929 goto free_queue_irqs
;
2931 /* If Flow Director is enabled, set interrupt affinity */
2932 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2933 /* assign the mask for this irq */
2934 irq_set_affinity_hint(entry
->vector
,
2935 &q_vector
->affinity_mask
);
2939 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2940 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2942 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2943 goto free_queue_irqs
;
2951 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2953 free_irq(adapter
->msix_entries
[vector
].vector
,
2954 adapter
->q_vector
[vector
]);
2956 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2957 pci_disable_msix(adapter
->pdev
);
2958 kfree(adapter
->msix_entries
);
2959 adapter
->msix_entries
= NULL
;
2964 * ixgbe_intr - legacy mode Interrupt Handler
2965 * @irq: interrupt number
2966 * @data: pointer to a network interface device structure
2968 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2970 struct ixgbe_adapter
*adapter
= data
;
2971 struct ixgbe_hw
*hw
= &adapter
->hw
;
2972 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2976 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2977 * before the read of EICR.
2979 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2981 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2982 * therefore no explicit interrupt disable is necessary */
2983 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2986 * shared interrupt alert!
2987 * make sure interrupts are enabled because the read will
2988 * have disabled interrupts due to EIAM
2989 * finish the workaround of silicon errata on 82598. Unmask
2990 * the interrupt that we masked before the EICR read.
2992 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2993 ixgbe_irq_enable(adapter
, true, true);
2994 return IRQ_NONE
; /* Not our interrupt */
2997 if (eicr
& IXGBE_EICR_LSC
)
2998 ixgbe_check_lsc(adapter
);
3000 switch (hw
->mac
.type
) {
3001 case ixgbe_mac_82599EB
:
3002 ixgbe_check_sfp_event(adapter
, eicr
);
3004 case ixgbe_mac_X540
:
3005 case ixgbe_mac_X550
:
3006 case ixgbe_mac_X550EM_x
:
3007 case ixgbe_mac_x550em_a
:
3008 if (eicr
& IXGBE_EICR_ECC
) {
3009 e_info(link
, "Received ECC Err, initiating reset\n");
3010 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
3011 ixgbe_service_event_schedule(adapter
);
3012 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
3014 ixgbe_check_overtemp_event(adapter
, eicr
);
3020 ixgbe_check_fan_failure(adapter
, eicr
);
3021 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
3022 ixgbe_ptp_check_pps_event(adapter
);
3024 /* would disable interrupts here but EIAM disabled it */
3025 napi_schedule_irqoff(&q_vector
->napi
);
3028 * re-enable link(maybe) and non-queue interrupts, no flush.
3029 * ixgbe_poll will re-enable the queue interrupts
3031 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3032 ixgbe_irq_enable(adapter
, false, false);
3038 * ixgbe_request_irq - initialize interrupts
3039 * @adapter: board private structure
3041 * Attempts to configure interrupts using the best available
3042 * capabilities of the hardware and kernel.
3044 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
3046 struct net_device
*netdev
= adapter
->netdev
;
3049 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3050 err
= ixgbe_request_msix_irqs(adapter
);
3051 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
3052 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
3053 netdev
->name
, adapter
);
3055 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
3056 netdev
->name
, adapter
);
3059 e_err(probe
, "request_irq failed, Error %d\n", err
);
3064 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
3068 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
3069 free_irq(adapter
->pdev
->irq
, adapter
);
3073 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
3074 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
3075 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
3077 /* free only the irqs that were actually requested */
3078 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
3081 /* clear the affinity_mask in the IRQ descriptor */
3082 irq_set_affinity_hint(entry
->vector
, NULL
);
3084 free_irq(entry
->vector
, q_vector
);
3087 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
3091 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3092 * @adapter: board private structure
3094 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
3096 switch (adapter
->hw
.mac
.type
) {
3097 case ixgbe_mac_82598EB
:
3098 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
3100 case ixgbe_mac_82599EB
:
3101 case ixgbe_mac_X540
:
3102 case ixgbe_mac_X550
:
3103 case ixgbe_mac_X550EM_x
:
3104 case ixgbe_mac_x550em_a
:
3105 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
3106 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
3107 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
3112 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3113 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3116 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
3117 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
3119 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
3121 synchronize_irq(adapter
->pdev
->irq
);
3126 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3129 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
3131 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3133 ixgbe_write_eitr(q_vector
);
3135 ixgbe_set_ivar(adapter
, 0, 0, 0);
3136 ixgbe_set_ivar(adapter
, 1, 0, 0);
3138 e_info(hw
, "Legacy interrupt IVAR setup done\n");
3142 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3143 * @adapter: board private structure
3144 * @ring: structure containing ring specific data
3146 * Configure the Tx descriptor ring after a reset.
3148 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
3149 struct ixgbe_ring
*ring
)
3151 struct ixgbe_hw
*hw
= &adapter
->hw
;
3152 u64 tdba
= ring
->dma
;
3154 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
3155 u8 reg_idx
= ring
->reg_idx
;
3157 /* disable queue to avoid issues while updating state */
3158 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
3159 IXGBE_WRITE_FLUSH(hw
);
3161 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
3162 (tdba
& DMA_BIT_MASK(32)));
3163 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
3164 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3165 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3166 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3167 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3168 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3171 * set WTHRESH to encourage burst writeback, it should not be set
3172 * higher than 1 when:
3173 * - ITR is 0 as it could cause false TX hangs
3174 * - ITR is set to > 100k int/sec and BQL is enabled
3176 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3177 * to or less than the number of on chip descriptors, which is
3180 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3181 txdctl
|= 1u << 16; /* WTHRESH = 1 */
3183 txdctl
|= 8u << 16; /* WTHRESH = 8 */
3186 * Setting PTHRESH to 32 both improves performance
3187 * and avoids a TX hang with DFP enabled
3189 txdctl
|= (1u << 8) | /* HTHRESH = 1 */
3190 32; /* PTHRESH = 32 */
3192 /* reinitialize flowdirector state */
3193 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3194 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3195 ring
->atr_count
= 0;
3196 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3198 ring
->atr_sample_rate
= 0;
3201 /* initialize XPS */
3202 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3203 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3206 netif_set_xps_queue(ring
->netdev
,
3207 &q_vector
->affinity_mask
,
3211 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3214 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3216 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3217 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3218 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3221 /* poll to verify queue is enabled */
3223 usleep_range(1000, 2000);
3224 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3225 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3227 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3230 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3232 struct ixgbe_hw
*hw
= &adapter
->hw
;
3234 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3236 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3239 /* disable the arbiter while setting MTQC */
3240 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3241 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3242 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3244 /* set transmit pool layout */
3245 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3246 mtqc
= IXGBE_MTQC_VT_ENA
;
3248 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3250 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3251 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3252 mtqc
|= IXGBE_MTQC_32VF
;
3254 mtqc
|= IXGBE_MTQC_64VF
;
3257 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3259 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3261 mtqc
= IXGBE_MTQC_64Q_1PB
;
3264 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3266 /* Enable Security TX Buffer IFG for multiple pb */
3268 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3269 sectx
|= IXGBE_SECTX_DCB
;
3270 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3273 /* re-enable the arbiter */
3274 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3275 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3279 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3280 * @adapter: board private structure
3282 * Configure the Tx unit of the MAC after a reset.
3284 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3286 struct ixgbe_hw
*hw
= &adapter
->hw
;
3290 ixgbe_setup_mtqc(adapter
);
3292 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3293 /* DMATXCTL.EN must be before Tx queues are enabled */
3294 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3295 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3296 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3299 /* Setup the HW Tx Head and Tail descriptor pointers */
3300 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3301 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3304 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3305 struct ixgbe_ring
*ring
)
3307 struct ixgbe_hw
*hw
= &adapter
->hw
;
3308 u8 reg_idx
= ring
->reg_idx
;
3309 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3311 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3313 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3316 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3317 struct ixgbe_ring
*ring
)
3319 struct ixgbe_hw
*hw
= &adapter
->hw
;
3320 u8 reg_idx
= ring
->reg_idx
;
3321 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3323 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3325 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3328 #ifdef CONFIG_IXGBE_DCB
3329 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3331 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3335 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3337 if (adapter
->ixgbe_ieee_pfc
)
3338 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3341 * We should set the drop enable bit if:
3344 * Number of Rx queues > 1 and flow control is disabled
3346 * This allows us to avoid head of line blocking for security
3347 * and performance reasons.
3349 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3350 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3351 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3352 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3354 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3355 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3359 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3361 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3362 struct ixgbe_ring
*rx_ring
)
3364 struct ixgbe_hw
*hw
= &adapter
->hw
;
3366 u8 reg_idx
= rx_ring
->reg_idx
;
3368 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3369 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3372 * if VMDq is not active we must program one srrctl register
3373 * per RSS queue since we have enabled RDRXCTL.MVMEN
3378 /* configure header buffer length, needed for RSC */
3379 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3381 /* configure the packet buffer length */
3382 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3384 /* configure descriptor type */
3385 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3387 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3391 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3392 * @adapter: device handle
3394 * - 82598/82599/X540: 128
3395 * - X550(non-SRIOV mode): 512
3396 * - X550(SRIOV mode): 64
3398 u32
ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter
*adapter
)
3400 if (adapter
->hw
.mac
.type
< ixgbe_mac_X550
)
3402 else if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3409 * ixgbe_store_reta - Write the RETA table to HW
3410 * @adapter: device handle
3412 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3414 void ixgbe_store_reta(struct ixgbe_adapter
*adapter
)
3416 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3417 struct ixgbe_hw
*hw
= &adapter
->hw
;
3420 u8
*indir_tbl
= adapter
->rss_indir_tbl
;
3422 /* Fill out the redirection table as follows:
3423 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3425 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3426 * - X550: 8 bit wide entries containing 6 bit RSS index
3428 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3429 indices_multi
= 0x11;
3431 indices_multi
= 0x1;
3433 /* Write redirection table to HW */
3434 for (i
= 0; i
< reta_entries
; i
++) {
3435 reta
|= indices_multi
* indir_tbl
[i
] << (i
& 0x3) * 8;
3438 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3440 IXGBE_WRITE_REG(hw
, IXGBE_ERETA((i
>> 2) - 32),
3448 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3449 * @adapter: device handle
3451 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3453 static void ixgbe_store_vfreta(struct ixgbe_adapter
*adapter
)
3455 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3456 struct ixgbe_hw
*hw
= &adapter
->hw
;
3458 unsigned int pf_pool
= adapter
->num_vfs
;
3460 /* Write redirection table to HW */
3461 for (i
= 0; i
< reta_entries
; i
++) {
3462 vfreta
|= (u32
)adapter
->rss_indir_tbl
[i
] << (i
& 0x3) * 8;
3464 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRETA(i
>> 2, pf_pool
),
3471 static void ixgbe_setup_reta(struct ixgbe_adapter
*adapter
)
3473 struct ixgbe_hw
*hw
= &adapter
->hw
;
3475 u32 reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3476 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3478 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3479 * make full use of any rings they may have. We will use the
3480 * PSRTYPE register to control how many rings we use within the PF.
3482 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3485 /* Fill out hash function seeds */
3486 for (i
= 0; i
< 10; i
++)
3487 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), adapter
->rss_key
[i
]);
3489 /* Fill out redirection table */
3490 memset(adapter
->rss_indir_tbl
, 0, sizeof(adapter
->rss_indir_tbl
));
3492 for (i
= 0, j
= 0; i
< reta_entries
; i
++, j
++) {
3496 adapter
->rss_indir_tbl
[i
] = j
;
3499 ixgbe_store_reta(adapter
);
3502 static void ixgbe_setup_vfreta(struct ixgbe_adapter
*adapter
)
3504 struct ixgbe_hw
*hw
= &adapter
->hw
;
3505 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3506 unsigned int pf_pool
= adapter
->num_vfs
;
3509 /* Fill out hash function seeds */
3510 for (i
= 0; i
< 10; i
++)
3511 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRSSRK(i
, pf_pool
),
3512 adapter
->rss_key
[i
]);
3514 /* Fill out the redirection table */
3515 for (i
= 0, j
= 0; i
< 64; i
++, j
++) {
3519 adapter
->rss_indir_tbl
[i
] = j
;
3522 ixgbe_store_vfreta(adapter
);
3525 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3527 struct ixgbe_hw
*hw
= &adapter
->hw
;
3528 u32 mrqc
= 0, rss_field
= 0, vfmrqc
= 0;
3531 /* Disable indicating checksum in descriptor, enables RSS hash */
3532 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3533 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3534 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3536 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3537 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3538 mrqc
= IXGBE_MRQC_RSSEN
;
3540 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3542 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3544 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3546 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3547 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3548 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3550 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3553 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3555 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3557 mrqc
= IXGBE_MRQC_RSSEN
;
3561 /* Perform hash on these packet types */
3562 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3563 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3564 IXGBE_MRQC_RSS_FIELD_IPV6
|
3565 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3567 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3568 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3569 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3570 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3572 netdev_rss_key_fill(adapter
->rss_key
, sizeof(adapter
->rss_key
));
3573 if ((hw
->mac
.type
>= ixgbe_mac_X550
) &&
3574 (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)) {
3575 unsigned int pf_pool
= adapter
->num_vfs
;
3577 /* Enable VF RSS mode */
3578 mrqc
|= IXGBE_MRQC_MULTIPLE_RSS
;
3579 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3581 /* Setup RSS through the VF registers */
3582 ixgbe_setup_vfreta(adapter
);
3583 vfmrqc
= IXGBE_MRQC_RSSEN
;
3584 vfmrqc
|= rss_field
;
3585 IXGBE_WRITE_REG(hw
, IXGBE_PFVFMRQC(pf_pool
), vfmrqc
);
3587 ixgbe_setup_reta(adapter
);
3589 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3594 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3595 * @adapter: address of board private structure
3596 * @index: index of ring to set
3598 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3599 struct ixgbe_ring
*ring
)
3601 struct ixgbe_hw
*hw
= &adapter
->hw
;
3603 u8 reg_idx
= ring
->reg_idx
;
3605 if (!ring_is_rsc_enabled(ring
))
3608 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3609 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3611 * we must limit the number of descriptors so that the
3612 * total size of max desc * buf_len is not greater
3615 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3616 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3619 #define IXGBE_MAX_RX_DESC_POLL 10
3620 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3621 struct ixgbe_ring
*ring
)
3623 struct ixgbe_hw
*hw
= &adapter
->hw
;
3624 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3626 u8 reg_idx
= ring
->reg_idx
;
3628 if (ixgbe_removed(hw
->hw_addr
))
3630 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3631 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3632 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3636 usleep_range(1000, 2000);
3637 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3638 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3641 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3642 "the polling period\n", reg_idx
);
3646 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3647 struct ixgbe_ring
*ring
)
3649 struct ixgbe_hw
*hw
= &adapter
->hw
;
3650 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3652 u8 reg_idx
= ring
->reg_idx
;
3654 if (ixgbe_removed(hw
->hw_addr
))
3656 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3657 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3659 /* write value back with RXDCTL.ENABLE bit cleared */
3660 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3662 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3663 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3666 /* the hardware may take up to 100us to really disable the rx queue */
3669 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3670 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3673 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3674 "the polling period\n", reg_idx
);
3678 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3679 struct ixgbe_ring
*ring
)
3681 struct ixgbe_hw
*hw
= &adapter
->hw
;
3682 u64 rdba
= ring
->dma
;
3684 u8 reg_idx
= ring
->reg_idx
;
3686 /* disable queue to avoid issues while updating state */
3687 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3688 ixgbe_disable_rx_queue(adapter
, ring
);
3690 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3691 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3692 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3693 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3694 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3695 IXGBE_WRITE_FLUSH(hw
);
3697 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3698 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3699 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3701 ixgbe_configure_srrctl(adapter
, ring
);
3702 ixgbe_configure_rscctl(adapter
, ring
);
3704 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3706 * enable cache line friendly hardware writes:
3707 * PTHRESH=32 descriptors (half the internal cache),
3708 * this also removes ugly rx_no_buffer_count increment
3709 * HTHRESH=4 descriptors (to minimize latency on fetch)
3710 * WTHRESH=8 burst writeback up to two cache lines
3712 rxdctl
&= ~0x3FFFFF;
3716 /* enable receive descriptor ring */
3717 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3718 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3720 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3721 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3724 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3726 struct ixgbe_hw
*hw
= &adapter
->hw
;
3727 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3730 /* PSRTYPE must be initialized in non 82598 adapters */
3731 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3732 IXGBE_PSRTYPE_UDPHDR
|
3733 IXGBE_PSRTYPE_IPV4HDR
|
3734 IXGBE_PSRTYPE_L2HDR
|
3735 IXGBE_PSRTYPE_IPV6HDR
;
3737 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3741 psrtype
|= 2u << 29;
3743 psrtype
|= 1u << 29;
3745 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3746 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3749 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3751 struct ixgbe_hw
*hw
= &adapter
->hw
;
3752 u32 reg_offset
, vf_shift
;
3753 u32 gcr_ext
, vmdctl
;
3756 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3759 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3760 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3761 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3762 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3763 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3764 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3766 vf_shift
= VMDQ_P(0) % 32;
3767 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3769 /* Enable only the PF's pool for Tx/Rx */
3770 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), GENMASK(31, vf_shift
));
3771 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3772 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), GENMASK(31, vf_shift
));
3773 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3774 if (adapter
->bridge_mode
== BRIDGE_MODE_VEB
)
3775 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3777 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3778 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3780 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3781 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
3784 * Set up VF register offsets for selected VT Mode,
3785 * i.e. 32 or 64 VFs for SR-IOV
3787 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3788 case IXGBE_82599_VMDQ_8Q_MASK
:
3789 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3791 case IXGBE_82599_VMDQ_4Q_MASK
:
3792 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3795 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3799 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3801 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3802 /* configure spoof checking */
3803 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
,
3804 adapter
->vfinfo
[i
].spoofchk_enabled
);
3806 /* Enable/Disable RSS query feature */
3807 ixgbe_ndo_set_vf_rss_query_en(adapter
->netdev
, i
,
3808 adapter
->vfinfo
[i
].rss_query_enabled
);
3812 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3814 struct ixgbe_hw
*hw
= &adapter
->hw
;
3815 struct net_device
*netdev
= adapter
->netdev
;
3816 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3817 struct ixgbe_ring
*rx_ring
;
3822 /* adjust max frame to be able to do baby jumbo for FCoE */
3823 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3824 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3825 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3827 #endif /* IXGBE_FCOE */
3829 /* adjust max frame to be at least the size of a standard frame */
3830 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3831 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3833 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3834 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3835 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3836 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3838 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3841 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3842 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3843 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3844 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3847 * Setup the HW Rx Head and Tail Descriptor Pointers and
3848 * the Base and Length of the Rx Descriptor Ring
3850 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3851 rx_ring
= adapter
->rx_ring
[i
];
3852 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3853 set_ring_rsc_enabled(rx_ring
);
3855 clear_ring_rsc_enabled(rx_ring
);
3859 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3861 struct ixgbe_hw
*hw
= &adapter
->hw
;
3862 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3864 switch (hw
->mac
.type
) {
3865 case ixgbe_mac_82598EB
:
3867 * For VMDq support of different descriptor types or
3868 * buffer sizes through the use of multiple SRRCTL
3869 * registers, RDRXCTL.MVMEN must be set to 1
3871 * also, the manual doesn't mention it clearly but DCA hints
3872 * will only use queue 0's tags unless this bit is set. Side
3873 * effects of setting this bit are only that SRRCTL must be
3874 * fully programmed [0..15]
3876 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3878 case ixgbe_mac_X550
:
3879 case ixgbe_mac_X550EM_x
:
3880 case ixgbe_mac_x550em_a
:
3881 if (adapter
->num_vfs
)
3882 rdrxctl
|= IXGBE_RDRXCTL_PSP
;
3883 /* fall through for older HW */
3884 case ixgbe_mac_82599EB
:
3885 case ixgbe_mac_X540
:
3886 /* Disable RSC for ACK packets */
3887 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3888 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3889 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3890 /* hardware requires some bits to be set by default */
3891 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3892 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3895 /* We should do nothing since we don't know this hardware */
3899 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3903 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3904 * @adapter: board private structure
3906 * Configure the Rx unit of the MAC after a reset.
3908 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3910 struct ixgbe_hw
*hw
= &adapter
->hw
;
3914 /* disable receives while setting up the descriptors */
3915 hw
->mac
.ops
.disable_rx(hw
);
3917 ixgbe_setup_psrtype(adapter
);
3918 ixgbe_setup_rdrxctl(adapter
);
3921 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3922 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3923 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3924 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3925 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3927 /* Program registers for the distribution of queues */
3928 ixgbe_setup_mrqc(adapter
);
3930 /* set_rx_buffer_len must be called before ring initialization */
3931 ixgbe_set_rx_buffer_len(adapter
);
3934 * Setup the HW Rx Head and Tail Descriptor Pointers and
3935 * the Base and Length of the Rx Descriptor Ring
3937 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3938 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3940 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3941 /* disable drop enable for 82598 parts */
3942 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3943 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3945 /* enable all receives */
3946 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3947 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3950 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3951 __be16 proto
, u16 vid
)
3953 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3954 struct ixgbe_hw
*hw
= &adapter
->hw
;
3956 /* add VID to filter table */
3957 if (!vid
|| !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
3958 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true, !!vid
);
3960 set_bit(vid
, adapter
->active_vlans
);
3965 static int ixgbe_find_vlvf_entry(struct ixgbe_hw
*hw
, u32 vlan
)
3970 /* short cut the special case */
3974 /* Search for the vlan id in the VLVF entries */
3975 for (idx
= IXGBE_VLVF_ENTRIES
; --idx
;) {
3976 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(idx
));
3977 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
3984 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter
*adapter
, u32 vid
)
3986 struct ixgbe_hw
*hw
= &adapter
->hw
;
3990 idx
= ixgbe_find_vlvf_entry(hw
, vid
);
3994 /* See if any other pools are set for this VLAN filter
3995 * entry other than the PF.
3997 word
= idx
* 2 + (VMDQ_P(0) / 32);
3998 bits
= ~BIT(VMDQ_P(0) % 32);
3999 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4001 /* Disable the filter so this falls into the default pool. */
4002 if (!bits
&& !IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
^ 1))) {
4003 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4004 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), 0);
4005 IXGBE_WRITE_REG(hw
, IXGBE_VLVF(idx
), 0);
4009 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
4010 __be16 proto
, u16 vid
)
4012 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4013 struct ixgbe_hw
*hw
= &adapter
->hw
;
4015 /* remove VID from filter table */
4016 if (vid
&& !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4017 hw
->mac
.ops
.set_vfta(hw
, vid
, VMDQ_P(0), false, true);
4019 clear_bit(vid
, adapter
->active_vlans
);
4025 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4026 * @adapter: driver data
4028 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
4030 struct ixgbe_hw
*hw
= &adapter
->hw
;
4034 switch (hw
->mac
.type
) {
4035 case ixgbe_mac_82598EB
:
4036 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4037 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
4038 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4040 case ixgbe_mac_82599EB
:
4041 case ixgbe_mac_X540
:
4042 case ixgbe_mac_X550
:
4043 case ixgbe_mac_X550EM_x
:
4044 case ixgbe_mac_x550em_a
:
4045 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4046 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4048 if (ring
->l2_accel_priv
)
4051 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4052 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
4053 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4062 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4063 * @adapter: driver data
4065 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
4067 struct ixgbe_hw
*hw
= &adapter
->hw
;
4071 switch (hw
->mac
.type
) {
4072 case ixgbe_mac_82598EB
:
4073 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4074 vlnctrl
|= IXGBE_VLNCTRL_VME
;
4075 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4077 case ixgbe_mac_82599EB
:
4078 case ixgbe_mac_X540
:
4079 case ixgbe_mac_X550
:
4080 case ixgbe_mac_X550EM_x
:
4081 case ixgbe_mac_x550em_a
:
4082 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4083 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4085 if (ring
->l2_accel_priv
)
4088 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4089 vlnctrl
|= IXGBE_RXDCTL_VME
;
4090 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4098 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter
*adapter
)
4100 struct ixgbe_hw
*hw
= &adapter
->hw
;
4103 switch (hw
->mac
.type
) {
4104 case ixgbe_mac_82599EB
:
4105 case ixgbe_mac_X540
:
4106 case ixgbe_mac_X550
:
4107 case ixgbe_mac_X550EM_x
:
4108 case ixgbe_mac_x550em_a
:
4110 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4113 case ixgbe_mac_82598EB
:
4114 /* legacy case, we can just disable VLAN filtering */
4115 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4116 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
4117 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4121 /* We are already in VLAN promisc, nothing to do */
4122 if (adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
)
4125 /* Set flag so we don't redo unnecessary work */
4126 adapter
->flags2
|= IXGBE_FLAG2_VLAN_PROMISC
;
4128 /* Add PF to all active pools */
4129 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4130 u32 reg_offset
= IXGBE_VLVFB(i
* 2 + VMDQ_P(0) / 32);
4131 u32 vlvfb
= IXGBE_READ_REG(hw
, reg_offset
);
4133 vlvfb
|= BIT(VMDQ_P(0) % 32);
4134 IXGBE_WRITE_REG(hw
, reg_offset
, vlvfb
);
4137 /* Set all bits in the VLAN filter table array */
4138 for (i
= hw
->mac
.vft_size
; i
--;)
4139 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(i
), ~0U);
4142 #define VFTA_BLOCK_SIZE 8
4143 static void ixgbe_scrub_vfta(struct ixgbe_adapter
*adapter
, u32 vfta_offset
)
4145 struct ixgbe_hw
*hw
= &adapter
->hw
;
4146 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4147 u32 vid_start
= vfta_offset
* 32;
4148 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4149 u32 i
, vid
, word
, bits
;
4151 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4152 u32 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(i
));
4154 /* pull VLAN ID from VLVF */
4155 vid
= vlvf
& VLAN_VID_MASK
;
4157 /* only concern outselves with a certain range */
4158 if (vid
< vid_start
|| vid
>= vid_end
)
4162 /* record VLAN ID in VFTA */
4163 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4165 /* if PF is part of this then continue */
4166 if (test_bit(vid
, adapter
->active_vlans
))
4170 /* remove PF from the pool */
4171 word
= i
* 2 + VMDQ_P(0) / 32;
4172 bits
= ~BIT(VMDQ_P(0) % 32);
4173 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4174 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), bits
);
4177 /* extract values from active_vlans and write back to VFTA */
4178 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4179 vid
= (vfta_offset
+ i
) * 32;
4180 word
= vid
/ BITS_PER_LONG
;
4181 bits
= vid
% BITS_PER_LONG
;
4183 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4185 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(vfta_offset
+ i
), vfta
[i
]);
4189 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter
*adapter
)
4191 struct ixgbe_hw
*hw
= &adapter
->hw
;
4194 switch (hw
->mac
.type
) {
4195 case ixgbe_mac_82599EB
:
4196 case ixgbe_mac_X540
:
4197 case ixgbe_mac_X550
:
4198 case ixgbe_mac_X550EM_x
:
4199 case ixgbe_mac_x550em_a
:
4201 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4204 case ixgbe_mac_82598EB
:
4205 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4206 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
4207 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4208 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4212 /* We are not in VLAN promisc, nothing to do */
4213 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4216 /* Set flag so we don't redo unnecessary work */
4217 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
4219 for (i
= 0; i
< hw
->mac
.vft_size
; i
+= VFTA_BLOCK_SIZE
)
4220 ixgbe_scrub_vfta(adapter
, i
);
4223 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
4227 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
4229 for_each_set_bit_from(vid
, adapter
->active_vlans
, VLAN_N_VID
)
4230 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
4234 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4235 * @netdev: network interface device structure
4237 * Writes multicast address list to the MTA hash table.
4238 * Returns: -ENOMEM on failure
4239 * 0 on no addresses written
4240 * X on writing X addresses to MTA
4242 static int ixgbe_write_mc_addr_list(struct net_device
*netdev
)
4244 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4245 struct ixgbe_hw
*hw
= &adapter
->hw
;
4247 if (!netif_running(netdev
))
4250 if (hw
->mac
.ops
.update_mc_addr_list
)
4251 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
4255 #ifdef CONFIG_PCI_IOV
4256 ixgbe_restore_vf_multicasts(adapter
);
4259 return netdev_mc_count(netdev
);
4262 #ifdef CONFIG_PCI_IOV
4263 void ixgbe_full_sync_mac_table(struct ixgbe_adapter
*adapter
)
4265 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4266 struct ixgbe_hw
*hw
= &adapter
->hw
;
4269 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4270 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4272 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4273 hw
->mac
.ops
.set_rar(hw
, i
,
4278 hw
->mac
.ops
.clear_rar(hw
, i
);
4283 static void ixgbe_sync_mac_table(struct ixgbe_adapter
*adapter
)
4285 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4286 struct ixgbe_hw
*hw
= &adapter
->hw
;
4289 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4290 if (!(mac_table
->state
& IXGBE_MAC_STATE_MODIFIED
))
4293 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4295 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4296 hw
->mac
.ops
.set_rar(hw
, i
,
4301 hw
->mac
.ops
.clear_rar(hw
, i
);
4305 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter
*adapter
)
4307 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4308 struct ixgbe_hw
*hw
= &adapter
->hw
;
4311 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4312 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4313 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4316 ixgbe_sync_mac_table(adapter
);
4319 static int ixgbe_available_rars(struct ixgbe_adapter
*adapter
, u16 pool
)
4321 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4322 struct ixgbe_hw
*hw
= &adapter
->hw
;
4325 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4326 /* do not count default RAR as available */
4327 if (mac_table
->state
& IXGBE_MAC_STATE_DEFAULT
)
4330 /* only count unused and addresses that belong to us */
4331 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
) {
4332 if (mac_table
->pool
!= pool
)
4342 /* this function destroys the first RAR entry */
4343 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter
*adapter
)
4345 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4346 struct ixgbe_hw
*hw
= &adapter
->hw
;
4348 memcpy(&mac_table
->addr
, hw
->mac
.addr
, ETH_ALEN
);
4349 mac_table
->pool
= VMDQ_P(0);
4351 mac_table
->state
= IXGBE_MAC_STATE_DEFAULT
| IXGBE_MAC_STATE_IN_USE
;
4353 hw
->mac
.ops
.set_rar(hw
, 0, mac_table
->addr
, mac_table
->pool
,
4357 int ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4358 const u8
*addr
, u16 pool
)
4360 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4361 struct ixgbe_hw
*hw
= &adapter
->hw
;
4364 if (is_zero_ether_addr(addr
))
4367 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4368 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4371 ether_addr_copy(mac_table
->addr
, addr
);
4372 mac_table
->pool
= pool
;
4374 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
|
4375 IXGBE_MAC_STATE_IN_USE
;
4377 ixgbe_sync_mac_table(adapter
);
4385 int ixgbe_del_mac_filter(struct ixgbe_adapter
*adapter
,
4386 const u8
*addr
, u16 pool
)
4388 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4389 struct ixgbe_hw
*hw
= &adapter
->hw
;
4392 if (is_zero_ether_addr(addr
))
4395 /* search table for addr, if found clear IN_USE flag and sync */
4396 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4397 /* we can only delete an entry if it is in use */
4398 if (!(mac_table
->state
& IXGBE_MAC_STATE_IN_USE
))
4400 /* we only care about entries that belong to the given pool */
4401 if (mac_table
->pool
!= pool
)
4403 /* we only care about a specific MAC address */
4404 if (!ether_addr_equal(addr
, mac_table
->addr
))
4407 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4408 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4410 ixgbe_sync_mac_table(adapter
);
4418 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4419 * @netdev: network interface device structure
4421 * Writes unicast address list to the RAR table.
4422 * Returns: -ENOMEM on failure/insufficient address space
4423 * 0 on no addresses written
4424 * X on writing X addresses to the RAR table
4426 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
, int vfn
)
4428 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4431 /* return ENOMEM indicating insufficient memory for addresses */
4432 if (netdev_uc_count(netdev
) > ixgbe_available_rars(adapter
, vfn
))
4435 if (!netdev_uc_empty(netdev
)) {
4436 struct netdev_hw_addr
*ha
;
4437 netdev_for_each_uc_addr(ha
, netdev
) {
4438 ixgbe_del_mac_filter(adapter
, ha
->addr
, vfn
);
4439 ixgbe_add_mac_filter(adapter
, ha
->addr
, vfn
);
4446 static int ixgbe_uc_sync(struct net_device
*netdev
, const unsigned char *addr
)
4448 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4451 ret
= ixgbe_add_mac_filter(adapter
, addr
, VMDQ_P(0));
4453 return min_t(int, ret
, 0);
4456 static int ixgbe_uc_unsync(struct net_device
*netdev
, const unsigned char *addr
)
4458 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4460 ixgbe_del_mac_filter(adapter
, addr
, VMDQ_P(0));
4466 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4467 * @netdev: network interface device structure
4469 * The set_rx_method entry point is called whenever the unicast/multicast
4470 * address list or the network interface flags are updated. This routine is
4471 * responsible for configuring the hardware for proper unicast, multicast and
4474 void ixgbe_set_rx_mode(struct net_device
*netdev
)
4476 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4477 struct ixgbe_hw
*hw
= &adapter
->hw
;
4478 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
4479 netdev_features_t features
= netdev
->features
;
4482 /* Check for Promiscuous and All Multicast modes */
4483 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4485 /* set all bits that we expect to always be set */
4486 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
4487 fctrl
|= IXGBE_FCTRL_BAM
;
4488 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
4489 fctrl
|= IXGBE_FCTRL_PMCF
;
4491 /* clear the bits we are changing the status of */
4492 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4493 if (netdev
->flags
& IFF_PROMISC
) {
4494 hw
->addr_ctrl
.user_set_promisc
= true;
4495 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4496 vmolr
|= IXGBE_VMOLR_MPE
;
4497 features
&= ~NETIF_F_HW_VLAN_CTAG_FILTER
;
4499 if (netdev
->flags
& IFF_ALLMULTI
) {
4500 fctrl
|= IXGBE_FCTRL_MPE
;
4501 vmolr
|= IXGBE_VMOLR_MPE
;
4503 hw
->addr_ctrl
.user_set_promisc
= false;
4507 * Write addresses to available RAR registers, if there is not
4508 * sufficient space to store all the addresses then enable
4509 * unicast promiscuous mode
4511 if (__dev_uc_sync(netdev
, ixgbe_uc_sync
, ixgbe_uc_unsync
)) {
4512 fctrl
|= IXGBE_FCTRL_UPE
;
4513 vmolr
|= IXGBE_VMOLR_ROPE
;
4516 /* Write addresses to the MTA, if the attempt fails
4517 * then we should just turn on promiscuous mode so
4518 * that we can at least receive multicast traffic
4520 count
= ixgbe_write_mc_addr_list(netdev
);
4522 fctrl
|= IXGBE_FCTRL_MPE
;
4523 vmolr
|= IXGBE_VMOLR_MPE
;
4525 vmolr
|= IXGBE_VMOLR_ROMPE
;
4528 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4529 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
4530 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
4532 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
4535 /* This is useful for sniffing bad packets. */
4536 if (features
& NETIF_F_RXALL
) {
4537 /* UPE and MPE will be handled by normal PROMISC logic
4538 * in e1000e_set_rx_mode */
4539 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
4540 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
4541 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
4543 fctrl
&= ~(IXGBE_FCTRL_DPF
);
4544 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4547 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4549 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
4550 ixgbe_vlan_strip_enable(adapter
);
4552 ixgbe_vlan_strip_disable(adapter
);
4554 if (features
& NETIF_F_HW_VLAN_CTAG_FILTER
)
4555 ixgbe_vlan_promisc_disable(adapter
);
4557 ixgbe_vlan_promisc_enable(adapter
);
4560 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
4564 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4565 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
4566 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4570 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4574 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4575 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4576 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
4577 pr_info("QV %d locked\n", q_idx
);
4578 usleep_range(1000, 20000);
4583 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter
*adapter
)
4585 switch (adapter
->hw
.mac
.type
) {
4586 case ixgbe_mac_X550
:
4587 case ixgbe_mac_X550EM_x
:
4588 case ixgbe_mac_x550em_a
:
4589 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VXLANCTRL
, 0);
4590 adapter
->vxlan_port
= 0;
4597 #ifdef CONFIG_IXGBE_DCB
4599 * ixgbe_configure_dcb - Configure DCB hardware
4600 * @adapter: ixgbe adapter struct
4602 * This is called by the driver on open to configure the DCB hardware.
4603 * This is also called by the gennetlink interface when reconfiguring
4606 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
4608 struct ixgbe_hw
*hw
= &adapter
->hw
;
4609 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4611 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
4612 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4613 netif_set_gso_max_size(adapter
->netdev
, 65536);
4617 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4618 netif_set_gso_max_size(adapter
->netdev
, 32768);
4621 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
4622 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
4625 /* reconfigure the hardware */
4626 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
4627 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4629 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4631 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
4632 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
4633 ixgbe_dcb_hw_ets(&adapter
->hw
,
4634 adapter
->ixgbe_ieee_ets
,
4636 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
4637 adapter
->ixgbe_ieee_pfc
->pfc_en
,
4638 adapter
->ixgbe_ieee_ets
->prio_tc
);
4641 /* Enable RSS Hash per TC */
4642 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4644 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4651 /* write msb to all 8 TCs in one write */
4652 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4657 /* Additional bittime to account for IXGBE framing */
4658 #define IXGBE_ETH_FRAMING 20
4661 * ixgbe_hpbthresh - calculate high water mark for flow control
4663 * @adapter: board private structure to calculate for
4664 * @pb: packet buffer to calculate
4666 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4668 struct ixgbe_hw
*hw
= &adapter
->hw
;
4669 struct net_device
*dev
= adapter
->netdev
;
4670 int link
, tc
, kb
, marker
;
4673 /* Calculate max LAN frame size */
4674 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4677 /* FCoE traffic class uses FCOE jumbo frames */
4678 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4679 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4680 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4681 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4684 /* Calculate delay value for device */
4685 switch (hw
->mac
.type
) {
4686 case ixgbe_mac_X540
:
4687 case ixgbe_mac_X550
:
4688 case ixgbe_mac_X550EM_x
:
4689 case ixgbe_mac_x550em_a
:
4690 dv_id
= IXGBE_DV_X540(link
, tc
);
4693 dv_id
= IXGBE_DV(link
, tc
);
4697 /* Loopback switch introduces additional latency */
4698 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4699 dv_id
+= IXGBE_B2BT(tc
);
4701 /* Delay value is calculated in bit times convert to KB */
4702 kb
= IXGBE_BT2KB(dv_id
);
4703 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4705 marker
= rx_pba
- kb
;
4707 /* It is possible that the packet buffer is not large enough
4708 * to provide required headroom. In this case throw an error
4709 * to user and a do the best we can.
4712 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4713 "headroom to support flow control."
4714 "Decrease MTU or number of traffic classes\n", pb
);
4722 * ixgbe_lpbthresh - calculate low water mark for for flow control
4724 * @adapter: board private structure to calculate for
4725 * @pb: packet buffer to calculate
4727 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4729 struct ixgbe_hw
*hw
= &adapter
->hw
;
4730 struct net_device
*dev
= adapter
->netdev
;
4734 /* Calculate max LAN frame size */
4735 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4738 /* FCoE traffic class uses FCOE jumbo frames */
4739 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4740 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4741 (pb
== netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
)))
4742 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4745 /* Calculate delay value for device */
4746 switch (hw
->mac
.type
) {
4747 case ixgbe_mac_X540
:
4748 case ixgbe_mac_X550
:
4749 case ixgbe_mac_X550EM_x
:
4750 case ixgbe_mac_x550em_a
:
4751 dv_id
= IXGBE_LOW_DV_X540(tc
);
4754 dv_id
= IXGBE_LOW_DV(tc
);
4758 /* Delay value is calculated in bit times convert to KB */
4759 return IXGBE_BT2KB(dv_id
);
4763 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4765 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4767 struct ixgbe_hw
*hw
= &adapter
->hw
;
4768 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4774 for (i
= 0; i
< num_tc
; i
++) {
4775 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4776 hw
->fc
.low_water
[i
] = ixgbe_lpbthresh(adapter
, i
);
4778 /* Low water marks must not be larger than high water marks */
4779 if (hw
->fc
.low_water
[i
] > hw
->fc
.high_water
[i
])
4780 hw
->fc
.low_water
[i
] = 0;
4783 for (; i
< MAX_TRAFFIC_CLASS
; i
++)
4784 hw
->fc
.high_water
[i
] = 0;
4787 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4789 struct ixgbe_hw
*hw
= &adapter
->hw
;
4791 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4793 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4794 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4795 hdrm
= 32 << adapter
->fdir_pballoc
;
4799 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4800 ixgbe_pbthresh_setup(adapter
);
4803 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4805 struct ixgbe_hw
*hw
= &adapter
->hw
;
4806 struct hlist_node
*node2
;
4807 struct ixgbe_fdir_filter
*filter
;
4809 spin_lock(&adapter
->fdir_perfect_lock
);
4811 if (!hlist_empty(&adapter
->fdir_filter_list
))
4812 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4814 hlist_for_each_entry_safe(filter
, node2
,
4815 &adapter
->fdir_filter_list
, fdir_node
) {
4816 ixgbe_fdir_write_perfect_filter_82599(hw
,
4819 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4820 IXGBE_FDIR_DROP_QUEUE
:
4821 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4824 spin_unlock(&adapter
->fdir_perfect_lock
);
4827 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4828 struct ixgbe_adapter
*adapter
)
4830 struct ixgbe_hw
*hw
= &adapter
->hw
;
4833 /* No unicast promiscuous support for VMDQ devices. */
4834 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4835 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4837 /* clear the affected bit */
4838 vmolr
&= ~IXGBE_VMOLR_MPE
;
4840 if (dev
->flags
& IFF_ALLMULTI
) {
4841 vmolr
|= IXGBE_VMOLR_MPE
;
4843 vmolr
|= IXGBE_VMOLR_ROMPE
;
4844 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4846 ixgbe_write_uc_addr_list(adapter
->netdev
, pool
);
4847 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4850 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4852 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4853 int rss_i
= adapter
->num_rx_queues_per_pool
;
4854 struct ixgbe_hw
*hw
= &adapter
->hw
;
4855 u16 pool
= vadapter
->pool
;
4856 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4857 IXGBE_PSRTYPE_UDPHDR
|
4858 IXGBE_PSRTYPE_IPV4HDR
|
4859 IXGBE_PSRTYPE_L2HDR
|
4860 IXGBE_PSRTYPE_IPV6HDR
;
4862 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4866 psrtype
|= 2u << 29;
4868 psrtype
|= 1u << 29;
4870 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4874 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4875 * @rx_ring: ring to free buffers from
4877 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4879 struct device
*dev
= rx_ring
->dev
;
4883 /* ring already cleared, nothing to do */
4884 if (!rx_ring
->rx_buffer_info
)
4887 /* Free all the Rx ring sk_buffs */
4888 for (i
= 0; i
< rx_ring
->count
; i
++) {
4889 struct ixgbe_rx_buffer
*rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4891 if (rx_buffer
->skb
) {
4892 struct sk_buff
*skb
= rx_buffer
->skb
;
4893 if (IXGBE_CB(skb
)->page_released
)
4896 ixgbe_rx_bufsz(rx_ring
),
4899 rx_buffer
->skb
= NULL
;
4902 if (!rx_buffer
->page
)
4905 dma_unmap_page(dev
, rx_buffer
->dma
,
4906 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
4907 __free_pages(rx_buffer
->page
, ixgbe_rx_pg_order(rx_ring
));
4909 rx_buffer
->page
= NULL
;
4912 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4913 memset(rx_ring
->rx_buffer_info
, 0, size
);
4915 /* Zero out the descriptor ring */
4916 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4918 rx_ring
->next_to_alloc
= 0;
4919 rx_ring
->next_to_clean
= 0;
4920 rx_ring
->next_to_use
= 0;
4923 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4924 struct ixgbe_ring
*rx_ring
)
4926 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4927 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4929 /* shutdown specific queue receive and wait for dma to settle */
4930 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4931 usleep_range(10000, 20000);
4932 ixgbe_irq_disable_queues(adapter
, BIT_ULL(index
));
4933 ixgbe_clean_rx_ring(rx_ring
);
4934 rx_ring
->l2_accel_priv
= NULL
;
4937 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4938 struct ixgbe_fwd_adapter
*accel
)
4940 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4941 unsigned int rxbase
= accel
->rx_base_queue
;
4942 unsigned int txbase
= accel
->tx_base_queue
;
4945 netif_tx_stop_all_queues(vdev
);
4947 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4948 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4949 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4952 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4953 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4954 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4961 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4962 struct ixgbe_fwd_adapter
*accel
)
4964 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4965 unsigned int rxbase
, txbase
, queues
;
4966 int i
, baseq
, err
= 0;
4968 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4971 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4972 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4973 accel
->pool
, adapter
->num_rx_pools
,
4974 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4975 adapter
->fwd_bitmask
);
4977 accel
->netdev
= vdev
;
4978 accel
->rx_base_queue
= rxbase
= baseq
;
4979 accel
->tx_base_queue
= txbase
= baseq
;
4981 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4982 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4984 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4985 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4986 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4987 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4990 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4991 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4992 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4995 queues
= min_t(unsigned int,
4996 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4997 err
= netif_set_real_num_tx_queues(vdev
, queues
);
5001 err
= netif_set_real_num_rx_queues(vdev
, queues
);
5005 if (is_valid_ether_addr(vdev
->dev_addr
))
5006 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
5008 ixgbe_fwd_psrtype(accel
);
5009 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
5012 ixgbe_fwd_ring_down(vdev
, accel
);
5016 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
5018 struct net_device
*upper
;
5019 struct list_head
*iter
;
5022 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5023 if (netif_is_macvlan(upper
)) {
5024 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
5025 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
5027 if (dfwd
->fwd_priv
) {
5028 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
5036 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
5038 struct ixgbe_hw
*hw
= &adapter
->hw
;
5040 ixgbe_configure_pb(adapter
);
5041 #ifdef CONFIG_IXGBE_DCB
5042 ixgbe_configure_dcb(adapter
);
5045 * We must restore virtualization before VLANs or else
5046 * the VLVF registers will not be populated
5048 ixgbe_configure_virtualization(adapter
);
5050 ixgbe_set_rx_mode(adapter
->netdev
);
5051 ixgbe_restore_vlan(adapter
);
5053 switch (hw
->mac
.type
) {
5054 case ixgbe_mac_82599EB
:
5055 case ixgbe_mac_X540
:
5056 hw
->mac
.ops
.disable_rx_buff(hw
);
5062 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
5063 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
5064 adapter
->fdir_pballoc
);
5065 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
5066 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
5067 adapter
->fdir_pballoc
);
5068 ixgbe_fdir_filter_restore(adapter
);
5071 switch (hw
->mac
.type
) {
5072 case ixgbe_mac_82599EB
:
5073 case ixgbe_mac_X540
:
5074 hw
->mac
.ops
.enable_rx_buff(hw
);
5080 #ifdef CONFIG_IXGBE_DCA
5082 if (adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
)
5083 ixgbe_setup_dca(adapter
);
5084 #endif /* CONFIG_IXGBE_DCA */
5087 /* configure FCoE L2 filters, redirection table, and Rx control */
5088 ixgbe_configure_fcoe(adapter
);
5090 #endif /* IXGBE_FCOE */
5091 ixgbe_configure_tx(adapter
);
5092 ixgbe_configure_rx(adapter
);
5093 ixgbe_configure_dfwd(adapter
);
5097 * ixgbe_sfp_link_config - set up SFP+ link
5098 * @adapter: pointer to private adapter struct
5100 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
5103 * We are assuming the worst case scenario here, and that
5104 * is that an SFP was inserted/removed after the reset
5105 * but before SFP detection was enabled. As such the best
5106 * solution is to just start searching as soon as we start
5108 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5109 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5111 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5112 adapter
->sfp_poll_time
= 0;
5116 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5117 * @hw: pointer to private hardware struct
5119 * Returns 0 on success, negative on failure
5121 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
5124 bool autoneg
, link_up
= false;
5125 int ret
= IXGBE_ERR_LINK_SETUP
;
5127 if (hw
->mac
.ops
.check_link
)
5128 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
5133 speed
= hw
->phy
.autoneg_advertised
;
5134 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
5135 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
5140 if (hw
->mac
.ops
.setup_link
)
5141 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
5146 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
5148 struct ixgbe_hw
*hw
= &adapter
->hw
;
5151 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
5152 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
5154 gpie
|= IXGBE_GPIE_EIAME
;
5156 * use EIAM to auto-mask when MSI-X interrupt is asserted
5157 * this saves a register write for every interrupt
5159 switch (hw
->mac
.type
) {
5160 case ixgbe_mac_82598EB
:
5161 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5163 case ixgbe_mac_82599EB
:
5164 case ixgbe_mac_X540
:
5165 case ixgbe_mac_X550
:
5166 case ixgbe_mac_X550EM_x
:
5167 case ixgbe_mac_x550em_a
:
5169 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5170 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5174 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5175 * specifically only auto mask tx and rx interrupts */
5176 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5179 /* XXX: to interrupt immediately for EICS writes, enable this */
5180 /* gpie |= IXGBE_GPIE_EIMEN; */
5182 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
5183 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
5185 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
5186 case IXGBE_82599_VMDQ_8Q_MASK
:
5187 gpie
|= IXGBE_GPIE_VTMODE_16
;
5189 case IXGBE_82599_VMDQ_4Q_MASK
:
5190 gpie
|= IXGBE_GPIE_VTMODE_32
;
5193 gpie
|= IXGBE_GPIE_VTMODE_64
;
5198 /* Enable Thermal over heat sensor interrupt */
5199 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
5200 switch (adapter
->hw
.mac
.type
) {
5201 case ixgbe_mac_82599EB
:
5202 gpie
|= IXGBE_SDP0_GPIEN_8259X
;
5209 /* Enable fan failure interrupt */
5210 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
5211 gpie
|= IXGBE_SDP1_GPIEN(hw
);
5213 switch (hw
->mac
.type
) {
5214 case ixgbe_mac_82599EB
:
5215 gpie
|= IXGBE_SDP1_GPIEN_8259X
| IXGBE_SDP2_GPIEN_8259X
;
5217 case ixgbe_mac_X550EM_x
:
5218 case ixgbe_mac_x550em_a
:
5219 gpie
|= IXGBE_SDP0_GPIEN_X540
;
5225 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
5228 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
5230 struct ixgbe_hw
*hw
= &adapter
->hw
;
5234 ixgbe_get_hw_control(adapter
);
5235 ixgbe_setup_gpie(adapter
);
5237 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
5238 ixgbe_configure_msix(adapter
);
5240 ixgbe_configure_msi_and_legacy(adapter
);
5242 /* enable the optics for 82599 SFP+ fiber */
5243 if (hw
->mac
.ops
.enable_tx_laser
)
5244 hw
->mac
.ops
.enable_tx_laser(hw
);
5246 if (hw
->phy
.ops
.set_phy_power
)
5247 hw
->phy
.ops
.set_phy_power(hw
, true);
5249 smp_mb__before_atomic();
5250 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
5251 ixgbe_napi_enable_all(adapter
);
5253 if (ixgbe_is_sfp(hw
)) {
5254 ixgbe_sfp_link_config(adapter
);
5256 err
= ixgbe_non_sfp_link_config(hw
);
5258 e_err(probe
, "link_config FAILED %d\n", err
);
5261 /* clear any pending interrupts, may auto mask */
5262 IXGBE_READ_REG(hw
, IXGBE_EICR
);
5263 ixgbe_irq_enable(adapter
, true, true);
5266 * If this adapter has a fan, check to see if we had a failure
5267 * before we enabled the interrupt.
5269 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5270 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5271 if (esdp
& IXGBE_ESDP_SDP1
)
5272 e_crit(drv
, "Fan has stopped, replace the adapter\n");
5275 /* bring the link up in the watchdog, this could race with our first
5276 * link up interrupt but shouldn't be a problem */
5277 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5278 adapter
->link_check_timeout
= jiffies
;
5279 mod_timer(&adapter
->service_timer
, jiffies
);
5281 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5282 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
5283 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
5284 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
5287 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
5289 WARN_ON(in_interrupt());
5290 /* put off any impending NetWatchDogTimeout */
5291 netif_trans_update(adapter
->netdev
);
5293 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
5294 usleep_range(1000, 2000);
5295 ixgbe_down(adapter
);
5297 * If SR-IOV enabled then wait a bit before bringing the adapter
5298 * back up to give the VFs time to respond to the reset. The
5299 * two second wait is based upon the watchdog timer cycle in
5302 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
5305 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
5308 void ixgbe_up(struct ixgbe_adapter
*adapter
)
5310 /* hardware has been reset, we need to reload some things */
5311 ixgbe_configure(adapter
);
5313 ixgbe_up_complete(adapter
);
5316 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
5318 struct ixgbe_hw
*hw
= &adapter
->hw
;
5319 struct net_device
*netdev
= adapter
->netdev
;
5322 if (ixgbe_removed(hw
->hw_addr
))
5324 /* lock SFP init bit to prevent race conditions with the watchdog */
5325 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5326 usleep_range(1000, 2000);
5328 /* clear all SFP and link config related flags while holding SFP_INIT */
5329 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
5330 IXGBE_FLAG2_SFP_NEEDS_RESET
);
5331 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5333 err
= hw
->mac
.ops
.init_hw(hw
);
5336 case IXGBE_ERR_SFP_NOT_PRESENT
:
5337 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
5339 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
5340 e_dev_err("master disable timed out\n");
5342 case IXGBE_ERR_EEPROM_VERSION
:
5343 /* We are running on a pre-production device, log a warning */
5344 e_dev_warn("This device is a pre-production adapter/LOM. "
5345 "Please be aware there may be issues associated with "
5346 "your hardware. If you are experiencing problems "
5347 "please contact your Intel or hardware "
5348 "representative who provided you with this "
5352 e_dev_err("Hardware Error: %d\n", err
);
5355 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5357 /* flush entries out of MAC table */
5358 ixgbe_flush_sw_mac_table(adapter
);
5359 __dev_uc_unsync(netdev
, NULL
);
5361 /* do not flush user set addresses */
5362 ixgbe_mac_set_default_filter(adapter
);
5364 /* update SAN MAC vmdq pool selection */
5365 if (hw
->mac
.san_mac_rar_index
)
5366 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
5368 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
5369 ixgbe_ptp_reset(adapter
);
5371 if (hw
->phy
.ops
.set_phy_power
) {
5372 if (!netif_running(adapter
->netdev
) && !adapter
->wol
)
5373 hw
->phy
.ops
.set_phy_power(hw
, false);
5375 hw
->phy
.ops
.set_phy_power(hw
, true);
5380 * ixgbe_clean_tx_ring - Free Tx Buffers
5381 * @tx_ring: ring to be cleaned
5383 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
5385 struct ixgbe_tx_buffer
*tx_buffer_info
;
5389 /* ring already cleared, nothing to do */
5390 if (!tx_ring
->tx_buffer_info
)
5393 /* Free all the Tx ring sk_buffs */
5394 for (i
= 0; i
< tx_ring
->count
; i
++) {
5395 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5396 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
5399 netdev_tx_reset_queue(txring_txq(tx_ring
));
5401 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5402 memset(tx_ring
->tx_buffer_info
, 0, size
);
5404 /* Zero out the descriptor ring */
5405 memset(tx_ring
->desc
, 0, tx_ring
->size
);
5407 tx_ring
->next_to_use
= 0;
5408 tx_ring
->next_to_clean
= 0;
5412 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5413 * @adapter: board private structure
5415 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
5419 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5420 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
5424 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5425 * @adapter: board private structure
5427 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
5431 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5432 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
5435 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
5437 struct hlist_node
*node2
;
5438 struct ixgbe_fdir_filter
*filter
;
5440 spin_lock(&adapter
->fdir_perfect_lock
);
5442 hlist_for_each_entry_safe(filter
, node2
,
5443 &adapter
->fdir_filter_list
, fdir_node
) {
5444 hlist_del(&filter
->fdir_node
);
5447 adapter
->fdir_filter_count
= 0;
5449 spin_unlock(&adapter
->fdir_perfect_lock
);
5452 void ixgbe_down(struct ixgbe_adapter
*adapter
)
5454 struct net_device
*netdev
= adapter
->netdev
;
5455 struct ixgbe_hw
*hw
= &adapter
->hw
;
5456 struct net_device
*upper
;
5457 struct list_head
*iter
;
5460 /* signal that we are down to the interrupt handler */
5461 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
5462 return; /* do nothing if already down */
5464 /* disable receives */
5465 hw
->mac
.ops
.disable_rx(hw
);
5467 /* disable all enabled rx queues */
5468 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5469 /* this call also flushes the previous write */
5470 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
5472 usleep_range(10000, 20000);
5474 netif_tx_stop_all_queues(netdev
);
5476 /* call carrier off first to avoid false dev_watchdog timeouts */
5477 netif_carrier_off(netdev
);
5478 netif_tx_disable(netdev
);
5480 /* disable any upper devices */
5481 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5482 if (netif_is_macvlan(upper
)) {
5483 struct macvlan_dev
*vlan
= netdev_priv(upper
);
5485 if (vlan
->fwd_priv
) {
5486 netif_tx_stop_all_queues(upper
);
5487 netif_carrier_off(upper
);
5488 netif_tx_disable(upper
);
5493 ixgbe_irq_disable(adapter
);
5495 ixgbe_napi_disable_all(adapter
);
5497 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
5498 IXGBE_FLAG2_RESET_REQUESTED
);
5499 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5501 del_timer_sync(&adapter
->service_timer
);
5503 if (adapter
->num_vfs
) {
5504 /* Clear EITR Select mapping */
5505 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
5507 /* Mark all the VFs as inactive */
5508 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
5509 adapter
->vfinfo
[i
].clear_to_send
= false;
5511 /* ping all the active vfs to let them know we are going down */
5512 ixgbe_ping_all_vfs(adapter
);
5514 /* Disable all VFTE/VFRE TX/RX */
5515 ixgbe_disable_tx_rx(adapter
);
5518 /* disable transmits in the hardware now that interrupts are off */
5519 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5520 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
5521 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5524 /* Disable the Tx DMA engine on 82599 and later MAC */
5525 switch (hw
->mac
.type
) {
5526 case ixgbe_mac_82599EB
:
5527 case ixgbe_mac_X540
:
5528 case ixgbe_mac_X550
:
5529 case ixgbe_mac_X550EM_x
:
5530 case ixgbe_mac_x550em_a
:
5531 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
5532 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
5533 ~IXGBE_DMATXCTL_TE
));
5539 if (!pci_channel_offline(adapter
->pdev
))
5540 ixgbe_reset(adapter
);
5542 /* power down the optics for 82599 SFP+ fiber */
5543 if (hw
->mac
.ops
.disable_tx_laser
)
5544 hw
->mac
.ops
.disable_tx_laser(hw
);
5546 ixgbe_clean_all_tx_rings(adapter
);
5547 ixgbe_clean_all_rx_rings(adapter
);
5551 * ixgbe_tx_timeout - Respond to a Tx Hang
5552 * @netdev: network interface device structure
5554 static void ixgbe_tx_timeout(struct net_device
*netdev
)
5556 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5558 /* Do the reset outside of interrupt context */
5559 ixgbe_tx_timeout_reset(adapter
);
5562 #ifdef CONFIG_IXGBE_DCB
5563 static void ixgbe_init_dcb(struct ixgbe_adapter
*adapter
)
5565 struct ixgbe_hw
*hw
= &adapter
->hw
;
5566 struct tc_configuration
*tc
;
5569 switch (hw
->mac
.type
) {
5570 case ixgbe_mac_82598EB
:
5571 case ixgbe_mac_82599EB
:
5572 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5573 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5575 case ixgbe_mac_X540
:
5576 case ixgbe_mac_X550
:
5577 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5578 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5580 case ixgbe_mac_X550EM_x
:
5581 case ixgbe_mac_x550em_a
:
5583 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= DEF_TRAFFIC_CLASS
;
5584 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= DEF_TRAFFIC_CLASS
;
5588 /* Configure DCB traffic classes */
5589 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5590 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5591 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5592 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5593 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5594 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5595 tc
->dcb_pfc
= pfc_disabled
;
5598 /* Initialize default user to priority mapping, UPx->TC0 */
5599 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5600 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5601 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5603 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5604 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5605 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5606 adapter
->dcb_set_bitmap
= 0x00;
5607 if (adapter
->flags
& IXGBE_FLAG_DCB_CAPABLE
)
5608 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5609 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5610 sizeof(adapter
->temp_dcb_cfg
));
5615 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5616 * @adapter: board private structure to initialize
5618 * ixgbe_sw_init initializes the Adapter private data structure.
5619 * Fields are initialized based on PCI device information and
5620 * OS network device settings (MTU size).
5622 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
5624 struct ixgbe_hw
*hw
= &adapter
->hw
;
5625 struct pci_dev
*pdev
= adapter
->pdev
;
5626 unsigned int rss
, fdir
;
5631 /* PCI config space info */
5633 hw
->vendor_id
= pdev
->vendor
;
5634 hw
->device_id
= pdev
->device
;
5635 hw
->revision_id
= pdev
->revision
;
5636 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
5637 hw
->subsystem_device_id
= pdev
->subsystem_device
;
5639 /* Set common capability flags and settings */
5640 rss
= min_t(int, ixgbe_max_rss_indices(adapter
), num_online_cpus());
5641 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
5642 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
5643 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
5644 adapter
->atr_sample_rate
= 20;
5645 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
5646 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
5647 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
5648 #ifdef CONFIG_IXGBE_DCA
5649 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
5651 #ifdef CONFIG_IXGBE_DCB
5652 adapter
->flags
|= IXGBE_FLAG_DCB_CAPABLE
;
5653 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
5656 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
5657 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5658 #ifdef CONFIG_IXGBE_DCB
5659 /* Default traffic class to use for FCoE */
5660 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
5661 #endif /* CONFIG_IXGBE_DCB */
5662 #endif /* IXGBE_FCOE */
5664 /* initialize static ixgbe jump table entries */
5665 adapter
->jump_tables
[0] = kzalloc(sizeof(*adapter
->jump_tables
[0]),
5667 if (!adapter
->jump_tables
[0])
5669 adapter
->jump_tables
[0]->mat
= ixgbe_ipv4_fields
;
5671 for (i
= 1; i
< IXGBE_MAX_LINK_HANDLE
; i
++)
5672 adapter
->jump_tables
[i
] = NULL
;
5674 adapter
->mac_table
= kzalloc(sizeof(struct ixgbe_mac_addr
) *
5675 hw
->mac
.num_rar_entries
,
5677 if (!adapter
->mac_table
)
5680 /* Set MAC specific capability flags and exceptions */
5681 switch (hw
->mac
.type
) {
5682 case ixgbe_mac_82598EB
:
5683 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
5685 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
5686 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
5688 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
5689 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
5690 adapter
->atr_sample_rate
= 0;
5691 adapter
->fdir_pballoc
= 0;
5693 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5694 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5695 #ifdef CONFIG_IXGBE_DCB
5696 adapter
->fcoe
.up
= 0;
5697 #endif /* IXGBE_DCB */
5698 #endif /* IXGBE_FCOE */
5700 case ixgbe_mac_82599EB
:
5701 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5702 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5704 case ixgbe_mac_X540
:
5705 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM(hw
));
5706 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5707 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5709 case ixgbe_mac_X550EM_x
:
5710 case ixgbe_mac_x550em_a
:
5711 #ifdef CONFIG_IXGBE_DCB
5712 adapter
->flags
&= ~IXGBE_FLAG_DCB_CAPABLE
;
5715 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5716 #ifdef CONFIG_IXGBE_DCB
5717 adapter
->fcoe
.up
= 0;
5718 #endif /* IXGBE_DCB */
5719 #endif /* IXGBE_FCOE */
5721 case ixgbe_mac_X550
:
5722 #ifdef CONFIG_IXGBE_DCA
5723 adapter
->flags
&= ~IXGBE_FLAG_DCA_CAPABLE
;
5725 #ifdef CONFIG_IXGBE_VXLAN
5726 adapter
->flags
|= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
;
5734 /* FCoE support exists, always init the FCoE lock */
5735 spin_lock_init(&adapter
->fcoe
.lock
);
5738 /* n-tuple support exists, always init our spinlock */
5739 spin_lock_init(&adapter
->fdir_perfect_lock
);
5741 #ifdef CONFIG_IXGBE_DCB
5742 ixgbe_init_dcb(adapter
);
5745 /* default flow control settings */
5746 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5747 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5748 ixgbe_pbthresh_setup(adapter
);
5749 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5750 hw
->fc
.send_xon
= true;
5751 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5753 #ifdef CONFIG_PCI_IOV
5755 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5757 /* assign number of SR-IOV VFs */
5758 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5759 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5760 adapter
->num_vfs
= 0;
5761 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5763 adapter
->num_vfs
= max_vfs
;
5766 #endif /* CONFIG_PCI_IOV */
5768 /* enable itr by default in dynamic mode */
5769 adapter
->rx_itr_setting
= 1;
5770 adapter
->tx_itr_setting
= 1;
5772 /* set default ring sizes */
5773 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5774 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5776 /* Cache bit indicating need for crosstalk fix */
5777 switch (hw
->mac
.type
) {
5778 case ixgbe_mac_82599EB
:
5779 case ixgbe_mac_X550EM_x
:
5780 case ixgbe_mac_x550em_a
:
5781 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
5782 if (device_caps
& IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR
)
5783 adapter
->need_crosstalk_fix
= false;
5785 adapter
->need_crosstalk_fix
= true;
5788 adapter
->need_crosstalk_fix
= false;
5792 /* set default work limits */
5793 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5795 /* initialize eeprom parameters */
5796 if (ixgbe_init_eeprom_params_generic(hw
)) {
5797 e_dev_err("EEPROM initialization failed\n");
5801 /* PF holds first pool slot */
5802 set_bit(0, &adapter
->fwd_bitmask
);
5803 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5809 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5810 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5812 * Return 0 on success, negative on failure
5814 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5816 struct device
*dev
= tx_ring
->dev
;
5817 int orig_node
= dev_to_node(dev
);
5821 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5823 if (tx_ring
->q_vector
)
5824 ring_node
= tx_ring
->q_vector
->numa_node
;
5826 tx_ring
->tx_buffer_info
= vzalloc_node(size
, ring_node
);
5827 if (!tx_ring
->tx_buffer_info
)
5828 tx_ring
->tx_buffer_info
= vzalloc(size
);
5829 if (!tx_ring
->tx_buffer_info
)
5832 u64_stats_init(&tx_ring
->syncp
);
5834 /* round up to nearest 4K */
5835 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5836 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5838 set_dev_node(dev
, ring_node
);
5839 tx_ring
->desc
= dma_alloc_coherent(dev
,
5843 set_dev_node(dev
, orig_node
);
5845 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5846 &tx_ring
->dma
, GFP_KERNEL
);
5850 tx_ring
->next_to_use
= 0;
5851 tx_ring
->next_to_clean
= 0;
5855 vfree(tx_ring
->tx_buffer_info
);
5856 tx_ring
->tx_buffer_info
= NULL
;
5857 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5862 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5863 * @adapter: board private structure
5865 * If this function returns with an error, then it's possible one or
5866 * more of the rings is populated (while the rest are not). It is the
5867 * callers duty to clean those orphaned rings.
5869 * Return 0 on success, negative on failure
5871 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5875 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5876 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5880 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5886 /* rewind the index freeing the rings as we go */
5888 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5893 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5894 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5896 * Returns 0 on success, negative on failure
5898 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5900 struct device
*dev
= rx_ring
->dev
;
5901 int orig_node
= dev_to_node(dev
);
5905 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5907 if (rx_ring
->q_vector
)
5908 ring_node
= rx_ring
->q_vector
->numa_node
;
5910 rx_ring
->rx_buffer_info
= vzalloc_node(size
, ring_node
);
5911 if (!rx_ring
->rx_buffer_info
)
5912 rx_ring
->rx_buffer_info
= vzalloc(size
);
5913 if (!rx_ring
->rx_buffer_info
)
5916 u64_stats_init(&rx_ring
->syncp
);
5918 /* Round up to nearest 4K */
5919 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5920 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5922 set_dev_node(dev
, ring_node
);
5923 rx_ring
->desc
= dma_alloc_coherent(dev
,
5927 set_dev_node(dev
, orig_node
);
5929 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5930 &rx_ring
->dma
, GFP_KERNEL
);
5934 rx_ring
->next_to_clean
= 0;
5935 rx_ring
->next_to_use
= 0;
5939 vfree(rx_ring
->rx_buffer_info
);
5940 rx_ring
->rx_buffer_info
= NULL
;
5941 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5946 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5947 * @adapter: board private structure
5949 * If this function returns with an error, then it's possible one or
5950 * more of the rings is populated (while the rest are not). It is the
5951 * callers duty to clean those orphaned rings.
5953 * Return 0 on success, negative on failure
5955 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5959 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5960 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5964 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5969 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5974 /* rewind the index freeing the rings as we go */
5976 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5981 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5982 * @tx_ring: Tx descriptor ring for a specific queue
5984 * Free all transmit software resources
5986 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5988 ixgbe_clean_tx_ring(tx_ring
);
5990 vfree(tx_ring
->tx_buffer_info
);
5991 tx_ring
->tx_buffer_info
= NULL
;
5993 /* if not set, then don't free */
5997 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5998 tx_ring
->desc
, tx_ring
->dma
);
6000 tx_ring
->desc
= NULL
;
6004 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
6005 * @adapter: board private structure
6007 * Free all transmit software resources
6009 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
6013 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6014 if (adapter
->tx_ring
[i
]->desc
)
6015 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
6019 * ixgbe_free_rx_resources - Free Rx Resources
6020 * @rx_ring: ring to clean the resources from
6022 * Free all receive software resources
6024 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
6026 ixgbe_clean_rx_ring(rx_ring
);
6028 vfree(rx_ring
->rx_buffer_info
);
6029 rx_ring
->rx_buffer_info
= NULL
;
6031 /* if not set, then don't free */
6035 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
6036 rx_ring
->desc
, rx_ring
->dma
);
6038 rx_ring
->desc
= NULL
;
6042 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6043 * @adapter: board private structure
6045 * Free all receive software resources
6047 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
6052 ixgbe_free_fcoe_ddp_resources(adapter
);
6055 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
6056 if (adapter
->rx_ring
[i
]->desc
)
6057 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
6061 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6062 * @netdev: network interface device structure
6063 * @new_mtu: new value for maximum frame size
6065 * Returns 0 on success, negative on failure
6067 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
6069 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6070 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
6072 /* MTU < 68 is an error and causes problems on some kernels */
6073 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
6077 * For 82599EB we cannot allow legacy VFs to enable their receive
6078 * paths when MTU greater than 1500 is configured. So display a
6079 * warning that legacy VFs will be disabled.
6081 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
6082 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
6083 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
6084 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
6086 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
6088 /* must set new MTU before calling down or up */
6089 netdev
->mtu
= new_mtu
;
6091 if (netif_running(netdev
))
6092 ixgbe_reinit_locked(adapter
);
6098 * ixgbe_open - Called when a network interface is made active
6099 * @netdev: network interface device structure
6101 * Returns 0 on success, negative value on failure
6103 * The open entry point is called when a network interface is made
6104 * active by the system (IFF_UP). At this point all resources needed
6105 * for transmit and receive operations are allocated, the interrupt
6106 * handler is registered with the OS, the watchdog timer is started,
6107 * and the stack is notified that the interface is ready.
6109 int ixgbe_open(struct net_device
*netdev
)
6111 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6112 struct ixgbe_hw
*hw
= &adapter
->hw
;
6115 /* disallow open during test */
6116 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
6119 netif_carrier_off(netdev
);
6121 /* allocate transmit descriptors */
6122 err
= ixgbe_setup_all_tx_resources(adapter
);
6126 /* allocate receive descriptors */
6127 err
= ixgbe_setup_all_rx_resources(adapter
);
6131 ixgbe_configure(adapter
);
6133 err
= ixgbe_request_irq(adapter
);
6137 /* Notify the stack of the actual queue counts. */
6138 if (adapter
->num_rx_pools
> 1)
6139 queues
= adapter
->num_rx_queues_per_pool
;
6141 queues
= adapter
->num_tx_queues
;
6143 err
= netif_set_real_num_tx_queues(netdev
, queues
);
6145 goto err_set_queues
;
6147 if (adapter
->num_rx_pools
> 1 &&
6148 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
6149 queues
= IXGBE_MAX_L2A_QUEUES
;
6151 queues
= adapter
->num_rx_queues
;
6152 err
= netif_set_real_num_rx_queues(netdev
, queues
);
6154 goto err_set_queues
;
6156 ixgbe_ptp_init(adapter
);
6158 ixgbe_up_complete(adapter
);
6160 ixgbe_clear_vxlan_port(adapter
);
6161 #ifdef CONFIG_IXGBE_VXLAN
6162 vxlan_get_rx_port(netdev
);
6168 ixgbe_free_irq(adapter
);
6170 ixgbe_free_all_rx_resources(adapter
);
6171 if (hw
->phy
.ops
.set_phy_power
&& !adapter
->wol
)
6172 hw
->phy
.ops
.set_phy_power(&adapter
->hw
, false);
6174 ixgbe_free_all_tx_resources(adapter
);
6176 ixgbe_reset(adapter
);
6181 static void ixgbe_close_suspend(struct ixgbe_adapter
*adapter
)
6183 ixgbe_ptp_suspend(adapter
);
6185 if (adapter
->hw
.phy
.ops
.enter_lplu
) {
6186 adapter
->hw
.phy
.reset_disable
= true;
6187 ixgbe_down(adapter
);
6188 adapter
->hw
.phy
.ops
.enter_lplu(&adapter
->hw
);
6189 adapter
->hw
.phy
.reset_disable
= false;
6191 ixgbe_down(adapter
);
6194 ixgbe_free_irq(adapter
);
6196 ixgbe_free_all_tx_resources(adapter
);
6197 ixgbe_free_all_rx_resources(adapter
);
6201 * ixgbe_close - Disables a network interface
6202 * @netdev: network interface device structure
6204 * Returns 0, this is not allowed to fail
6206 * The close entry point is called when an interface is de-activated
6207 * by the OS. The hardware is still under the drivers control, but
6208 * needs to be disabled. A global MAC reset is issued to stop the
6209 * hardware, and all transmit and receive resources are freed.
6211 int ixgbe_close(struct net_device
*netdev
)
6213 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6215 ixgbe_ptp_stop(adapter
);
6217 ixgbe_close_suspend(adapter
);
6219 ixgbe_fdir_filter_exit(adapter
);
6221 ixgbe_release_hw_control(adapter
);
6227 static int ixgbe_resume(struct pci_dev
*pdev
)
6229 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6230 struct net_device
*netdev
= adapter
->netdev
;
6233 adapter
->hw
.hw_addr
= adapter
->io_addr
;
6234 pci_set_power_state(pdev
, PCI_D0
);
6235 pci_restore_state(pdev
);
6237 * pci_restore_state clears dev->state_saved so call
6238 * pci_save_state to restore it.
6240 pci_save_state(pdev
);
6242 err
= pci_enable_device_mem(pdev
);
6244 e_dev_err("Cannot enable PCI device from suspend\n");
6247 smp_mb__before_atomic();
6248 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
6249 pci_set_master(pdev
);
6251 pci_wake_from_d3(pdev
, false);
6253 ixgbe_reset(adapter
);
6255 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6258 err
= ixgbe_init_interrupt_scheme(adapter
);
6259 if (!err
&& netif_running(netdev
))
6260 err
= ixgbe_open(netdev
);
6267 netif_device_attach(netdev
);
6271 #endif /* CONFIG_PM */
6273 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
6275 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6276 struct net_device
*netdev
= adapter
->netdev
;
6277 struct ixgbe_hw
*hw
= &adapter
->hw
;
6279 u32 wufc
= adapter
->wol
;
6284 netif_device_detach(netdev
);
6287 if (netif_running(netdev
))
6288 ixgbe_close_suspend(adapter
);
6291 ixgbe_clear_interrupt_scheme(adapter
);
6294 retval
= pci_save_state(pdev
);
6299 if (hw
->mac
.ops
.stop_link_on_d3
)
6300 hw
->mac
.ops
.stop_link_on_d3(hw
);
6303 ixgbe_set_rx_mode(netdev
);
6305 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6306 if (hw
->mac
.ops
.enable_tx_laser
)
6307 hw
->mac
.ops
.enable_tx_laser(hw
);
6309 /* turn on all-multi mode if wake on multicast is enabled */
6310 if (wufc
& IXGBE_WUFC_MC
) {
6311 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6312 fctrl
|= IXGBE_FCTRL_MPE
;
6313 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
6316 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
6317 ctrl
|= IXGBE_CTRL_GIO_DIS
;
6318 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
6320 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
6322 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
6323 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
6326 switch (hw
->mac
.type
) {
6327 case ixgbe_mac_82598EB
:
6328 pci_wake_from_d3(pdev
, false);
6330 case ixgbe_mac_82599EB
:
6331 case ixgbe_mac_X540
:
6332 case ixgbe_mac_X550
:
6333 case ixgbe_mac_X550EM_x
:
6334 case ixgbe_mac_x550em_a
:
6335 pci_wake_from_d3(pdev
, !!wufc
);
6341 *enable_wake
= !!wufc
;
6342 if (hw
->phy
.ops
.set_phy_power
&& !*enable_wake
)
6343 hw
->phy
.ops
.set_phy_power(hw
, false);
6345 ixgbe_release_hw_control(adapter
);
6347 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
6348 pci_disable_device(pdev
);
6354 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
6359 retval
= __ixgbe_shutdown(pdev
, &wake
);
6364 pci_prepare_to_sleep(pdev
);
6366 pci_wake_from_d3(pdev
, false);
6367 pci_set_power_state(pdev
, PCI_D3hot
);
6372 #endif /* CONFIG_PM */
6374 static void ixgbe_shutdown(struct pci_dev
*pdev
)
6378 __ixgbe_shutdown(pdev
, &wake
);
6380 if (system_state
== SYSTEM_POWER_OFF
) {
6381 pci_wake_from_d3(pdev
, wake
);
6382 pci_set_power_state(pdev
, PCI_D3hot
);
6387 * ixgbe_update_stats - Update the board statistics counters.
6388 * @adapter: board private structure
6390 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
6392 struct net_device
*netdev
= adapter
->netdev
;
6393 struct ixgbe_hw
*hw
= &adapter
->hw
;
6394 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
6396 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
6397 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
6398 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
6399 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
6401 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6402 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6405 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
6408 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6409 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
6410 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
6412 adapter
->rsc_total_count
= rsc_count
;
6413 adapter
->rsc_total_flush
= rsc_flush
;
6416 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6417 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
6418 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
6419 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
6420 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
6421 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
6422 bytes
+= rx_ring
->stats
.bytes
;
6423 packets
+= rx_ring
->stats
.packets
;
6425 adapter
->non_eop_descs
= non_eop_descs
;
6426 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
6427 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
6428 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
6429 netdev
->stats
.rx_bytes
= bytes
;
6430 netdev
->stats
.rx_packets
= packets
;
6434 /* gather some stats to the adapter struct that are per queue */
6435 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6436 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6437 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
6438 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
6439 bytes
+= tx_ring
->stats
.bytes
;
6440 packets
+= tx_ring
->stats
.packets
;
6442 adapter
->restart_queue
= restart_queue
;
6443 adapter
->tx_busy
= tx_busy
;
6444 netdev
->stats
.tx_bytes
= bytes
;
6445 netdev
->stats
.tx_packets
= packets
;
6447 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
6449 /* 8 register reads */
6450 for (i
= 0; i
< 8; i
++) {
6451 /* for packet buffers not used, the register should read 0 */
6452 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
6454 hwstats
->mpc
[i
] += mpc
;
6455 total_mpc
+= hwstats
->mpc
[i
];
6456 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
6457 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
6458 switch (hw
->mac
.type
) {
6459 case ixgbe_mac_82598EB
:
6460 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
6461 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
6462 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
6463 hwstats
->pxonrxc
[i
] +=
6464 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
6466 case ixgbe_mac_82599EB
:
6467 case ixgbe_mac_X540
:
6468 case ixgbe_mac_X550
:
6469 case ixgbe_mac_X550EM_x
:
6470 case ixgbe_mac_x550em_a
:
6471 hwstats
->pxonrxc
[i
] +=
6472 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
6479 /*16 register reads */
6480 for (i
= 0; i
< 16; i
++) {
6481 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
6482 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
6483 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
6484 (hw
->mac
.type
== ixgbe_mac_X540
) ||
6485 (hw
->mac
.type
== ixgbe_mac_X550
) ||
6486 (hw
->mac
.type
== ixgbe_mac_X550EM_x
) ||
6487 (hw
->mac
.type
== ixgbe_mac_x550em_a
)) {
6488 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
6489 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
6490 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
6491 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
6495 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
6496 /* work around hardware counting issue */
6497 hwstats
->gprc
-= missed_rx
;
6499 ixgbe_update_xoff_received(adapter
);
6501 /* 82598 hardware only has a 32 bit counter in the high register */
6502 switch (hw
->mac
.type
) {
6503 case ixgbe_mac_82598EB
:
6504 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
6505 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
6506 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
6507 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
6509 case ixgbe_mac_X540
:
6510 case ixgbe_mac_X550
:
6511 case ixgbe_mac_X550EM_x
:
6512 case ixgbe_mac_x550em_a
:
6513 /* OS2BMC stats are X540 and later */
6514 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
6515 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
6516 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
6517 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
6518 case ixgbe_mac_82599EB
:
6519 for (i
= 0; i
< 16; i
++)
6520 adapter
->hw_rx_no_dma_resources
+=
6521 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
6522 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
6523 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
6524 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
6525 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
6526 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
6527 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
6528 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
6529 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
6530 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
6532 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
6533 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
6534 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
6535 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
6536 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
6537 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
6538 /* Add up per cpu counters for total ddp aloc fail */
6539 if (adapter
->fcoe
.ddp_pool
) {
6540 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
6541 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
6543 u64 noddp
= 0, noddp_ext_buff
= 0;
6544 for_each_possible_cpu(cpu
) {
6545 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
6546 noddp
+= ddp_pool
->noddp
;
6547 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
6549 hwstats
->fcoe_noddp
= noddp
;
6550 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
6552 #endif /* IXGBE_FCOE */
6557 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
6558 hwstats
->bprc
+= bprc
;
6559 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
6560 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6561 hwstats
->mprc
-= bprc
;
6562 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
6563 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
6564 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
6565 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
6566 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
6567 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
6568 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
6569 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
6570 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
6571 hwstats
->lxontxc
+= lxon
;
6572 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
6573 hwstats
->lxofftxc
+= lxoff
;
6574 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
6575 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
6577 * 82598 errata - tx of flow control packets is included in tx counters
6579 xon_off_tot
= lxon
+ lxoff
;
6580 hwstats
->gptc
-= xon_off_tot
;
6581 hwstats
->mptc
-= xon_off_tot
;
6582 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
6583 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
6584 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
6585 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
6586 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
6587 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
6588 hwstats
->ptc64
-= xon_off_tot
;
6589 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
6590 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
6591 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
6592 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
6593 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
6594 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
6596 /* Fill out the OS statistics structure */
6597 netdev
->stats
.multicast
= hwstats
->mprc
;
6600 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
6601 netdev
->stats
.rx_dropped
= 0;
6602 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
6603 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
6604 netdev
->stats
.rx_missed_errors
= total_mpc
;
6608 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6609 * @adapter: pointer to the device adapter structure
6611 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
6613 struct ixgbe_hw
*hw
= &adapter
->hw
;
6616 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
6619 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
6621 /* if interface is down do nothing */
6622 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6625 /* do nothing if we are not using signature filters */
6626 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
6629 adapter
->fdir_overflow
++;
6631 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
6632 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6633 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
6634 &(adapter
->tx_ring
[i
]->state
));
6635 /* re-enable flow director interrupts */
6636 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
6638 e_err(probe
, "failed to finish FDIR re-initialization, "
6639 "ignored adding FDIR ATR filters\n");
6644 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6645 * @adapter: pointer to the device adapter structure
6647 * This function serves two purposes. First it strobes the interrupt lines
6648 * in order to make certain interrupts are occurring. Secondly it sets the
6649 * bits needed to check for TX hangs. As a result we should immediately
6650 * determine if a hang has occurred.
6652 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
6654 struct ixgbe_hw
*hw
= &adapter
->hw
;
6658 /* If we're down, removing or resetting, just bail */
6659 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6660 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6661 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6664 /* Force detection of hung controller */
6665 if (netif_carrier_ok(adapter
->netdev
)) {
6666 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6667 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
6670 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6672 * for legacy and MSI interrupts don't set any bits
6673 * that are enabled for EIAM, because this operation
6674 * would set *both* EIMS and EICS for any bit in EIAM
6676 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
6677 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
6679 /* get one bit for every active tx/rx interrupt vector */
6680 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
6681 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
6682 if (qv
->rx
.ring
|| qv
->tx
.ring
)
6687 /* Cause software interrupt to ensure rings are cleaned */
6688 ixgbe_irq_rearm_queues(adapter
, eics
);
6692 * ixgbe_watchdog_update_link - update the link status
6693 * @adapter: pointer to the device adapter structure
6694 * @link_speed: pointer to a u32 to store the link_speed
6696 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
6698 struct ixgbe_hw
*hw
= &adapter
->hw
;
6699 u32 link_speed
= adapter
->link_speed
;
6700 bool link_up
= adapter
->link_up
;
6701 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
6703 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6706 if (hw
->mac
.ops
.check_link
) {
6707 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
6709 /* always assume link is up, if no check link function */
6710 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6714 /* If Crosstalk fix enabled do the sanity check of making sure
6715 * the SFP+ cage is empty.
6717 if (adapter
->need_crosstalk_fix
) {
6720 sfp_cage_full
= IXGBE_READ_REG(hw
, IXGBE_ESDP
) &
6722 if (ixgbe_is_sfp(hw
) && link_up
&& !sfp_cage_full
)
6726 if (adapter
->ixgbe_ieee_pfc
)
6727 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
6729 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
6730 hw
->mac
.ops
.fc_enable(hw
);
6731 ixgbe_set_rx_drop_en(adapter
);
6735 time_after(jiffies
, (adapter
->link_check_timeout
+
6736 IXGBE_TRY_LINK_TIMEOUT
))) {
6737 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6738 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
6739 IXGBE_WRITE_FLUSH(hw
);
6742 adapter
->link_up
= link_up
;
6743 adapter
->link_speed
= link_speed
;
6746 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
6748 #ifdef CONFIG_IXGBE_DCB
6749 struct net_device
*netdev
= adapter
->netdev
;
6750 struct dcb_app app
= {
6751 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6756 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6757 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6759 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6764 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6765 * print link up message
6766 * @adapter: pointer to the device adapter structure
6768 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6770 struct net_device
*netdev
= adapter
->netdev
;
6771 struct ixgbe_hw
*hw
= &adapter
->hw
;
6772 struct net_device
*upper
;
6773 struct list_head
*iter
;
6774 u32 link_speed
= adapter
->link_speed
;
6775 const char *speed_str
;
6776 bool flow_rx
, flow_tx
;
6778 /* only continue if link was previously down */
6779 if (netif_carrier_ok(netdev
))
6782 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6784 switch (hw
->mac
.type
) {
6785 case ixgbe_mac_82598EB
: {
6786 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6787 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6788 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6789 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6792 case ixgbe_mac_X540
:
6793 case ixgbe_mac_X550
:
6794 case ixgbe_mac_X550EM_x
:
6795 case ixgbe_mac_x550em_a
:
6796 case ixgbe_mac_82599EB
: {
6797 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6798 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6799 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6800 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6809 adapter
->last_rx_ptp_check
= jiffies
;
6811 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6812 ixgbe_ptp_start_cyclecounter(adapter
);
6814 switch (link_speed
) {
6815 case IXGBE_LINK_SPEED_10GB_FULL
:
6816 speed_str
= "10 Gbps";
6818 case IXGBE_LINK_SPEED_2_5GB_FULL
:
6819 speed_str
= "2.5 Gbps";
6821 case IXGBE_LINK_SPEED_1GB_FULL
:
6822 speed_str
= "1 Gbps";
6824 case IXGBE_LINK_SPEED_100_FULL
:
6825 speed_str
= "100 Mbps";
6828 speed_str
= "unknown speed";
6831 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n", speed_str
,
6832 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6834 (flow_tx
? "TX" : "None"))));
6836 netif_carrier_on(netdev
);
6837 ixgbe_check_vf_rate_limit(adapter
);
6839 /* enable transmits */
6840 netif_tx_wake_all_queues(adapter
->netdev
);
6842 /* enable any upper devices */
6844 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
6845 if (netif_is_macvlan(upper
)) {
6846 struct macvlan_dev
*vlan
= netdev_priv(upper
);
6849 netif_tx_wake_all_queues(upper
);
6854 /* update the default user priority for VFs */
6855 ixgbe_update_default_up(adapter
);
6857 /* ping all the active vfs to let them know link has changed */
6858 ixgbe_ping_all_vfs(adapter
);
6862 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6863 * print link down message
6864 * @adapter: pointer to the adapter structure
6866 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6868 struct net_device
*netdev
= adapter
->netdev
;
6869 struct ixgbe_hw
*hw
= &adapter
->hw
;
6871 adapter
->link_up
= false;
6872 adapter
->link_speed
= 0;
6874 /* only continue if link was up previously */
6875 if (!netif_carrier_ok(netdev
))
6878 /* poll for SFP+ cable when link is down */
6879 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6880 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6882 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6883 ixgbe_ptp_start_cyclecounter(adapter
);
6885 e_info(drv
, "NIC Link is Down\n");
6886 netif_carrier_off(netdev
);
6888 /* ping all the active vfs to let them know link has changed */
6889 ixgbe_ping_all_vfs(adapter
);
6892 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter
*adapter
)
6896 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6897 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6899 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
)
6906 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter
*adapter
)
6908 struct ixgbe_hw
*hw
= &adapter
->hw
;
6909 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
6910 u32 q_per_pool
= __ALIGN_MASK(1, ~vmdq
->mask
);
6914 if (!adapter
->num_vfs
)
6917 /* resetting the PF is only needed for MAC before X550 */
6918 if (hw
->mac
.type
>= ixgbe_mac_X550
)
6921 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
6922 for (j
= 0; j
< q_per_pool
; j
++) {
6925 h
= IXGBE_READ_REG(hw
, IXGBE_PVFTDHN(q_per_pool
, i
, j
));
6926 t
= IXGBE_READ_REG(hw
, IXGBE_PVFTDTN(q_per_pool
, i
, j
));
6937 * ixgbe_watchdog_flush_tx - flush queues on link down
6938 * @adapter: pointer to the device adapter structure
6940 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6942 if (!netif_carrier_ok(adapter
->netdev
)) {
6943 if (ixgbe_ring_tx_pending(adapter
) ||
6944 ixgbe_vf_tx_pending(adapter
)) {
6945 /* We've lost link, so the controller stops DMA,
6946 * but we've got queued Tx work that's never going
6947 * to get done, so reset controller to flush Tx.
6948 * (Do the reset outside of interrupt context).
6950 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6951 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6956 #ifdef CONFIG_PCI_IOV
6957 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter
*adapter
,
6958 struct pci_dev
*vfdev
)
6960 if (!pci_wait_for_pending_transaction(vfdev
))
6961 e_dev_warn("Issuing VFLR with pending transactions\n");
6963 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev
));
6964 pcie_capability_set_word(vfdev
, PCI_EXP_DEVCTL
, PCI_EXP_DEVCTL_BCR_FLR
);
6969 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6971 struct ixgbe_hw
*hw
= &adapter
->hw
;
6972 struct pci_dev
*pdev
= adapter
->pdev
;
6976 if (!(netif_carrier_ok(adapter
->netdev
)))
6979 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6980 if (gpc
) /* If incrementing then no need for the check below */
6982 /* Check to see if a bad DMA write target from an errant or
6983 * malicious VF has caused a PCIe error. If so then we can
6984 * issue a VFLR to the offending VF(s) and then resume without
6985 * requesting a full slot reset.
6991 /* check status reg for all VFs owned by this PF */
6992 for (vf
= 0; vf
< adapter
->num_vfs
; ++vf
) {
6993 struct pci_dev
*vfdev
= adapter
->vfinfo
[vf
].vfdev
;
6998 pci_read_config_word(vfdev
, PCI_STATUS
, &status_reg
);
6999 if (status_reg
!= IXGBE_FAILED_READ_CFG_WORD
&&
7000 status_reg
& PCI_STATUS_REC_MASTER_ABORT
)
7001 ixgbe_issue_vf_flr(adapter
, vfdev
);
7005 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
7009 /* Do not perform spoof check for 82598 or if not in IOV mode */
7010 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7011 adapter
->num_vfs
== 0)
7014 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
7017 * ssvpc register is cleared on read, if zero then no
7018 * spoofed packets in the last interval.
7023 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
7026 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused
*adapter
)
7031 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused
*adapter
)
7034 #endif /* CONFIG_PCI_IOV */
7038 * ixgbe_watchdog_subtask - check and bring link up
7039 * @adapter: pointer to the device adapter structure
7041 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
7043 /* if interface is down, removing or resetting, do nothing */
7044 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7045 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7046 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7049 ixgbe_watchdog_update_link(adapter
);
7051 if (adapter
->link_up
)
7052 ixgbe_watchdog_link_is_up(adapter
);
7054 ixgbe_watchdog_link_is_down(adapter
);
7056 ixgbe_check_for_bad_vf(adapter
);
7057 ixgbe_spoof_check(adapter
);
7058 ixgbe_update_stats(adapter
);
7060 ixgbe_watchdog_flush_tx(adapter
);
7064 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7065 * @adapter: the ixgbe adapter structure
7067 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
7069 struct ixgbe_hw
*hw
= &adapter
->hw
;
7072 /* If crosstalk fix enabled verify the SFP+ cage is full */
7073 if (adapter
->need_crosstalk_fix
) {
7076 sfp_cage_full
= IXGBE_READ_REG(hw
, IXGBE_ESDP
) &
7082 /* not searching for SFP so there is nothing to do here */
7083 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
7084 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7087 if (adapter
->sfp_poll_time
&&
7088 time_after(adapter
->sfp_poll_time
, jiffies
))
7089 return; /* If not yet time to poll for SFP */
7091 /* someone else is in init, wait until next service event */
7092 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7095 adapter
->sfp_poll_time
= jiffies
+ IXGBE_SFP_POLL_JIFFIES
- 1;
7097 err
= hw
->phy
.ops
.identify_sfp(hw
);
7098 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7101 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
7102 /* If no cable is present, then we need to reset
7103 * the next time we find a good cable. */
7104 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
7111 /* exit if reset not needed */
7112 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7115 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
7118 * A module may be identified correctly, but the EEPROM may not have
7119 * support for that module. setup_sfp() will fail in that case, so
7120 * we should not allow that module to load.
7122 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7123 err
= hw
->phy
.ops
.reset(hw
);
7125 err
= hw
->mac
.ops
.setup_sfp(hw
);
7127 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7130 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
7131 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
7134 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7136 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
7137 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
7138 e_dev_err("failed to initialize because an unsupported "
7139 "SFP+ module type was detected.\n");
7140 e_dev_err("Reload the driver after installing a "
7141 "supported module.\n");
7142 unregister_netdev(adapter
->netdev
);
7147 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7148 * @adapter: the ixgbe adapter structure
7150 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
7152 struct ixgbe_hw
*hw
= &adapter
->hw
;
7154 bool autoneg
= false;
7156 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
7159 /* someone else is in init, wait until next service event */
7160 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7163 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
7165 speed
= hw
->phy
.autoneg_advertised
;
7166 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
7167 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
7169 /* setup the highest link when no autoneg */
7171 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
7172 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
7176 if (hw
->mac
.ops
.setup_link
)
7177 hw
->mac
.ops
.setup_link(hw
, speed
, true);
7179 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
7180 adapter
->link_check_timeout
= jiffies
;
7181 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7185 * ixgbe_service_timer - Timer Call-back
7186 * @data: pointer to adapter cast into an unsigned long
7188 static void ixgbe_service_timer(unsigned long data
)
7190 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
7191 unsigned long next_event_offset
;
7193 /* poll faster when waiting for link */
7194 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
7195 next_event_offset
= HZ
/ 10;
7197 next_event_offset
= HZ
* 2;
7199 /* Reset the timer */
7200 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
7202 ixgbe_service_event_schedule(adapter
);
7205 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter
*adapter
)
7207 struct ixgbe_hw
*hw
= &adapter
->hw
;
7210 if (!(adapter
->flags2
& IXGBE_FLAG2_PHY_INTERRUPT
))
7213 adapter
->flags2
&= ~IXGBE_FLAG2_PHY_INTERRUPT
;
7215 if (!hw
->phy
.ops
.handle_lasi
)
7218 status
= hw
->phy
.ops
.handle_lasi(&adapter
->hw
);
7219 if (status
!= IXGBE_ERR_OVERTEMP
)
7222 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
7225 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
7227 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
7230 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
7232 /* If we're already down, removing or resetting, just bail */
7233 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7234 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7235 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7238 ixgbe_dump(adapter
);
7239 netdev_err(adapter
->netdev
, "Reset adapter\n");
7240 adapter
->tx_timeout_count
++;
7243 ixgbe_reinit_locked(adapter
);
7248 * ixgbe_service_task - manages and runs subtasks
7249 * @work: pointer to work_struct containing our data
7251 static void ixgbe_service_task(struct work_struct
*work
)
7253 struct ixgbe_adapter
*adapter
= container_of(work
,
7254 struct ixgbe_adapter
,
7256 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
7257 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
7259 ixgbe_down(adapter
);
7262 ixgbe_service_event_complete(adapter
);
7265 #ifdef CONFIG_IXGBE_VXLAN
7267 if (adapter
->flags2
& IXGBE_FLAG2_VXLAN_REREG_NEEDED
) {
7268 adapter
->flags2
&= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
7269 vxlan_get_rx_port(adapter
->netdev
);
7272 #endif /* CONFIG_IXGBE_VXLAN */
7273 ixgbe_reset_subtask(adapter
);
7274 ixgbe_phy_interrupt_subtask(adapter
);
7275 ixgbe_sfp_detection_subtask(adapter
);
7276 ixgbe_sfp_link_config_subtask(adapter
);
7277 ixgbe_check_overtemp_subtask(adapter
);
7278 ixgbe_watchdog_subtask(adapter
);
7279 ixgbe_fdir_reinit_subtask(adapter
);
7280 ixgbe_check_hang_subtask(adapter
);
7282 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
7283 ixgbe_ptp_overflow_check(adapter
);
7284 ixgbe_ptp_rx_hang(adapter
);
7287 ixgbe_service_event_complete(adapter
);
7290 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
7291 struct ixgbe_tx_buffer
*first
,
7294 u32 vlan_macip_lens
, type_tucmd
, mss_l4len_idx
;
7295 struct sk_buff
*skb
= first
->skb
;
7305 u32 paylen
, l4_offset
;
7308 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
7311 if (!skb_is_gso(skb
))
7314 err
= skb_cow_head(skb
, 0);
7318 ip
.hdr
= skb_network_header(skb
);
7319 l4
.hdr
= skb_checksum_start(skb
);
7321 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7322 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7324 /* initialize outer IP header fields */
7325 if (ip
.v4
->version
== 4) {
7326 /* IP header will have to cancel out any data that
7327 * is not a part of the outer IP header
7329 ip
.v4
->check
= csum_fold(csum_add(lco_csum(skb
),
7330 csum_unfold(l4
.tcp
->check
)));
7331 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
7334 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7335 IXGBE_TX_FLAGS_CSUM
|
7336 IXGBE_TX_FLAGS_IPV4
;
7338 ip
.v6
->payload_len
= 0;
7339 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7340 IXGBE_TX_FLAGS_CSUM
;
7343 /* determine offset of inner transport header */
7344 l4_offset
= l4
.hdr
- skb
->data
;
7346 /* compute length of segmentation header */
7347 *hdr_len
= (l4
.tcp
->doff
* 4) + l4_offset
;
7349 /* remove payload length from inner checksum */
7350 paylen
= skb
->len
- l4_offset
;
7351 csum_replace_by_diff(&l4
.tcp
->check
, htonl(paylen
));
7353 /* update gso size and bytecount with header size */
7354 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
7355 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
7357 /* mss_l4len_id: use 0 as index for TSO */
7358 mss_l4len_idx
= (*hdr_len
- l4_offset
) << IXGBE_ADVTXD_L4LEN_SHIFT
;
7359 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
7361 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7362 vlan_macip_lens
= l4
.hdr
- ip
.hdr
;
7363 vlan_macip_lens
|= (ip
.hdr
- skb
->data
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
7364 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7366 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
7372 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff
*skb
)
7374 unsigned int offset
= 0;
7376 ipv6_find_hdr(skb
, &offset
, IPPROTO_SCTP
, NULL
, NULL
);
7378 return offset
== skb_checksum_start_offset(skb
);
7381 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
7382 struct ixgbe_tx_buffer
*first
)
7384 struct sk_buff
*skb
= first
->skb
;
7385 u32 vlan_macip_lens
= 0;
7388 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
7390 if (!(first
->tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
|
7391 IXGBE_TX_FLAGS_CC
)))
7396 switch (skb
->csum_offset
) {
7397 case offsetof(struct tcphdr
, check
):
7398 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7400 case offsetof(struct udphdr
, check
):
7402 case offsetof(struct sctphdr
, checksum
):
7403 /* validate that this is actually an SCTP request */
7404 if (((first
->protocol
== htons(ETH_P_IP
)) &&
7405 (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)) ||
7406 ((first
->protocol
== htons(ETH_P_IPV6
)) &&
7407 ixgbe_ipv6_csum_is_sctp(skb
))) {
7408 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
7413 skb_checksum_help(skb
);
7417 /* update TX checksum flag */
7418 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
7419 vlan_macip_lens
= skb_checksum_start_offset(skb
) -
7420 skb_network_offset(skb
);
7422 /* vlan_macip_lens: MACLEN, VLAN tag */
7423 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
7424 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7426 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
, 0);
7429 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7430 ((_flag <= _result) ? \
7431 ((u32)(_input & _flag) * (_result / _flag)) : \
7432 ((u32)(_input & _flag) / (_flag / _result)))
7434 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
7436 /* set type for advanced descriptor with frame checksum insertion */
7437 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
7438 IXGBE_ADVTXD_DCMD_DEXT
|
7439 IXGBE_ADVTXD_DCMD_IFCS
;
7441 /* set HW vlan bit if vlan is present */
7442 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
7443 IXGBE_ADVTXD_DCMD_VLE
);
7445 /* set segmentation enable bits for TSO/FSO */
7446 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
7447 IXGBE_ADVTXD_DCMD_TSE
);
7449 /* set timestamp bit if present */
7450 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
7451 IXGBE_ADVTXD_MAC_TSTAMP
);
7453 /* insert frame checksum */
7454 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
7459 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
7460 u32 tx_flags
, unsigned int paylen
)
7462 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
7464 /* enable L4 checksum for TSO and TX checksum offload */
7465 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7466 IXGBE_TX_FLAGS_CSUM
,
7467 IXGBE_ADVTXD_POPTS_TXSM
);
7469 /* enble IPv4 checksum for TSO */
7470 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7471 IXGBE_TX_FLAGS_IPV4
,
7472 IXGBE_ADVTXD_POPTS_IXSM
);
7475 * Check Context must be set if Tx switch is enabled, which it
7476 * always is for case where virtual functions are running
7478 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7482 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
7485 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7487 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7489 /* Herbert's original patch had:
7490 * smp_mb__after_netif_stop_queue();
7491 * but since that doesn't exist yet, just open code it.
7495 /* We need to check again in a case another CPU has just
7496 * made room available.
7498 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
7501 /* A reprieve! - use start_queue because it doesn't call schedule */
7502 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7503 ++tx_ring
->tx_stats
.restart_queue
;
7507 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7509 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
7512 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
7515 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7518 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
7519 struct ixgbe_tx_buffer
*first
,
7522 struct sk_buff
*skb
= first
->skb
;
7523 struct ixgbe_tx_buffer
*tx_buffer
;
7524 union ixgbe_adv_tx_desc
*tx_desc
;
7525 struct skb_frag_struct
*frag
;
7527 unsigned int data_len
, size
;
7528 u32 tx_flags
= first
->tx_flags
;
7529 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
7530 u16 i
= tx_ring
->next_to_use
;
7532 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
7534 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
7536 size
= skb_headlen(skb
);
7537 data_len
= skb
->data_len
;
7540 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
7541 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
7542 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
7545 data_len
-= sizeof(struct fcoe_crc_eof
);
7550 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
7554 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
7555 if (dma_mapping_error(tx_ring
->dev
, dma
))
7558 /* record length, and DMA address */
7559 dma_unmap_len_set(tx_buffer
, len
, size
);
7560 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
7562 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7564 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
7565 tx_desc
->read
.cmd_type_len
=
7566 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
7570 if (i
== tx_ring
->count
) {
7571 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7574 tx_desc
->read
.olinfo_status
= 0;
7576 dma
+= IXGBE_MAX_DATA_PER_TXD
;
7577 size
-= IXGBE_MAX_DATA_PER_TXD
;
7579 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7582 if (likely(!data_len
))
7585 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
7589 if (i
== tx_ring
->count
) {
7590 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7593 tx_desc
->read
.olinfo_status
= 0;
7596 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
7598 size
= skb_frag_size(frag
);
7602 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
7605 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7608 /* write last descriptor with RS and EOP bits */
7609 cmd_type
|= size
| IXGBE_TXD_CMD
;
7610 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
7612 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
7614 /* set the timestamp */
7615 first
->time_stamp
= jiffies
;
7618 * Force memory writes to complete before letting h/w know there
7619 * are new descriptors to fetch. (Only applicable for weak-ordered
7620 * memory model archs, such as IA-64).
7622 * We also need this memory barrier to make certain all of the
7623 * status bits have been updated before next_to_watch is written.
7627 /* set next_to_watch value indicating a packet is present */
7628 first
->next_to_watch
= tx_desc
;
7631 if (i
== tx_ring
->count
)
7634 tx_ring
->next_to_use
= i
;
7636 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7638 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
7639 writel(i
, tx_ring
->tail
);
7641 /* we need this if more than one processor can write to our tail
7642 * at a time, it synchronizes IO on IA64/Altix systems
7649 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
7651 /* clear dma mappings for failed tx_buffer_info map */
7653 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7654 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
7655 if (tx_buffer
== first
)
7662 tx_ring
->next_to_use
= i
;
7665 static void ixgbe_atr(struct ixgbe_ring
*ring
,
7666 struct ixgbe_tx_buffer
*first
)
7668 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
7669 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
7670 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
7672 unsigned char *network
;
7674 struct ipv6hdr
*ipv6
;
7678 struct sk_buff
*skb
;
7682 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7686 /* do nothing if sampling is disabled */
7687 if (!ring
->atr_sample_rate
)
7692 /* currently only IPv4/IPv6 with TCP is supported */
7693 if ((first
->protocol
!= htons(ETH_P_IP
)) &&
7694 (first
->protocol
!= htons(ETH_P_IPV6
)))
7697 /* snag network header to get L4 type and address */
7699 hdr
.network
= skb_network_header(skb
);
7700 #ifdef CONFIG_IXGBE_VXLAN
7701 if (skb
->encapsulation
&&
7702 first
->protocol
== htons(ETH_P_IP
) &&
7703 hdr
.ipv4
->protocol
!= IPPROTO_UDP
) {
7704 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
7706 /* verify the port is recognized as VXLAN */
7707 if (adapter
->vxlan_port
&&
7708 udp_hdr(skb
)->dest
== adapter
->vxlan_port
)
7709 hdr
.network
= skb_inner_network_header(skb
);
7711 #endif /* CONFIG_IXGBE_VXLAN */
7713 /* Currently only IPv4/IPv6 with TCP is supported */
7714 switch (hdr
.ipv4
->version
) {
7716 /* access ihl as u8 to avoid unaligned access on ia64 */
7717 hlen
= (hdr
.network
[0] & 0x0F) << 2;
7718 l4_proto
= hdr
.ipv4
->protocol
;
7721 hlen
= hdr
.network
- skb
->data
;
7722 l4_proto
= ipv6_find_hdr(skb
, &hlen
, IPPROTO_TCP
, NULL
, NULL
);
7723 hlen
-= hdr
.network
- skb
->data
;
7729 if (l4_proto
!= IPPROTO_TCP
)
7732 th
= (struct tcphdr
*)(hdr
.network
+ hlen
);
7734 /* skip this packet since the socket is closing */
7738 /* sample on all syn packets or once every atr sample count */
7739 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
7742 /* reset sample count */
7743 ring
->atr_count
= 0;
7745 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
7748 * src and dst are inverted, think how the receiver sees them
7750 * The input is broken into two sections, a non-compressed section
7751 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7752 * is XORed together and stored in the compressed dword.
7754 input
.formatted
.vlan_id
= vlan_id
;
7757 * since src port and flex bytes occupy the same word XOR them together
7758 * and write the value to source port portion of compressed dword
7760 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
7761 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
7763 common
.port
.src
^= th
->dest
^ first
->protocol
;
7764 common
.port
.dst
^= th
->source
;
7766 switch (hdr
.ipv4
->version
) {
7768 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
7769 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
7772 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
7773 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
7774 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
7775 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
7776 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
7777 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
7778 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
7779 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
7780 hdr
.ipv6
->daddr
.s6_addr32
[3];
7786 if (hdr
.network
!= skb_network_header(skb
))
7787 input
.formatted
.flow_type
|= IXGBE_ATR_L4TYPE_TUNNEL_MASK
;
7789 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7790 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
7791 input
, common
, ring
->queue_index
);
7794 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
7795 void *accel_priv
, select_queue_fallback_t fallback
)
7797 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
7799 struct ixgbe_adapter
*adapter
;
7800 struct ixgbe_ring_feature
*f
;
7805 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
7810 * only execute the code below if protocol is FCoE
7811 * or FIP and we have FCoE enabled on the adapter
7813 switch (vlan_get_protocol(skb
)) {
7814 case htons(ETH_P_FCOE
):
7815 case htons(ETH_P_FIP
):
7816 adapter
= netdev_priv(dev
);
7818 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7821 return fallback(dev
, skb
);
7824 f
= &adapter
->ring_feature
[RING_F_FCOE
];
7826 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
7829 while (txq
>= f
->indices
)
7832 return txq
+ f
->offset
;
7834 return fallback(dev
, skb
);
7838 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
7839 struct ixgbe_adapter
*adapter
,
7840 struct ixgbe_ring
*tx_ring
)
7842 struct ixgbe_tx_buffer
*first
;
7846 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
7847 __be16 protocol
= skb
->protocol
;
7851 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7852 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7853 * + 2 desc gap to keep tail from touching head,
7854 * + 1 desc for context descriptor,
7855 * otherwise try next time
7857 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
7858 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
7860 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
7861 tx_ring
->tx_stats
.tx_busy
++;
7862 return NETDEV_TX_BUSY
;
7865 /* record the location of the first descriptor for this packet */
7866 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
7868 first
->bytecount
= skb
->len
;
7869 first
->gso_segs
= 1;
7871 /* if we have a HW VLAN tag being added default to the HW one */
7872 if (skb_vlan_tag_present(skb
)) {
7873 tx_flags
|= skb_vlan_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
7874 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7875 /* else if it is a SW VLAN check the next protocol and store the tag */
7876 } else if (protocol
== htons(ETH_P_8021Q
)) {
7877 struct vlan_hdr
*vhdr
, _vhdr
;
7878 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
7882 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
7883 IXGBE_TX_FLAGS_VLAN_SHIFT
;
7884 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
7886 protocol
= vlan_get_protocol(skb
);
7888 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
7889 adapter
->ptp_clock
&&
7890 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
7892 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
7893 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
7895 /* schedule check for Tx timestamp */
7896 adapter
->ptp_tx_skb
= skb_get(skb
);
7897 adapter
->ptp_tx_start
= jiffies
;
7898 schedule_work(&adapter
->ptp_tx_work
);
7901 skb_tx_timestamp(skb
);
7903 #ifdef CONFIG_PCI_IOV
7905 * Use the l2switch_enable flag - would be false if the DMA
7906 * Tx switch had been disabled.
7908 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7909 tx_flags
|= IXGBE_TX_FLAGS_CC
;
7912 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7913 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7914 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7915 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7916 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7917 tx_flags
|= (skb
->priority
& 0x7) <<
7918 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7919 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7920 struct vlan_ethhdr
*vhdr
;
7922 if (skb_cow_head(skb
, 0))
7924 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7925 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7926 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7928 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7932 /* record initial flags and protocol */
7933 first
->tx_flags
= tx_flags
;
7934 first
->protocol
= protocol
;
7937 /* setup tx offload for FCoE */
7938 if ((protocol
== htons(ETH_P_FCOE
)) &&
7939 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7940 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7947 #endif /* IXGBE_FCOE */
7948 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7952 ixgbe_tx_csum(tx_ring
, first
);
7954 /* add the ATR filter if ATR is on */
7955 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7956 ixgbe_atr(tx_ring
, first
);
7960 #endif /* IXGBE_FCOE */
7961 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7963 return NETDEV_TX_OK
;
7966 dev_kfree_skb_any(first
->skb
);
7969 return NETDEV_TX_OK
;
7972 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7973 struct net_device
*netdev
,
7974 struct ixgbe_ring
*ring
)
7976 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7977 struct ixgbe_ring
*tx_ring
;
7980 * The minimum packet size for olinfo paylen is 17 so pad the skb
7981 * in order to meet this minimum size requirement.
7983 if (skb_put_padto(skb
, 17))
7984 return NETDEV_TX_OK
;
7986 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7988 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7991 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7992 struct net_device
*netdev
)
7994 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7998 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7999 * @netdev: network interface device structure
8000 * @p: pointer to an address structure
8002 * Returns 0 on success, negative on failure
8004 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
8006 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8007 struct ixgbe_hw
*hw
= &adapter
->hw
;
8008 struct sockaddr
*addr
= p
;
8010 if (!is_valid_ether_addr(addr
->sa_data
))
8011 return -EADDRNOTAVAIL
;
8013 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
8014 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
8016 ixgbe_mac_set_default_filter(adapter
);
8022 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
8024 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8025 struct ixgbe_hw
*hw
= &adapter
->hw
;
8029 if (prtad
!= hw
->phy
.mdio
.prtad
)
8031 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
8037 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
8038 u16 addr
, u16 value
)
8040 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8041 struct ixgbe_hw
*hw
= &adapter
->hw
;
8043 if (prtad
!= hw
->phy
.mdio
.prtad
)
8045 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
8048 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
8050 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8054 return ixgbe_ptp_set_ts_config(adapter
, req
);
8056 return ixgbe_ptp_get_ts_config(adapter
, req
);
8058 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
8063 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8065 * @netdev: network interface device structure
8067 * Returns non-zero on failure
8069 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
8072 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8073 struct ixgbe_hw
*hw
= &adapter
->hw
;
8075 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
8077 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
8080 /* update SAN MAC vmdq pool selection */
8081 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
8087 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8089 * @netdev: network interface device structure
8091 * Returns non-zero on failure
8093 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
8096 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8097 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
8099 if (is_valid_ether_addr(mac
->san_addr
)) {
8101 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
8107 #ifdef CONFIG_NET_POLL_CONTROLLER
8109 * Polling 'interrupt' - used by things like netconsole to send skbs
8110 * without having to re-enable interrupts. It's not called while
8111 * the interrupt routine is executing.
8113 static void ixgbe_netpoll(struct net_device
*netdev
)
8115 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8118 /* if interface is down do nothing */
8119 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
8122 /* loop through and schedule all active queues */
8123 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
8124 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
8128 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
8129 struct rtnl_link_stats64
*stats
)
8131 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8135 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
8136 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
8142 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8143 packets
= ring
->stats
.packets
;
8144 bytes
= ring
->stats
.bytes
;
8145 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8146 stats
->rx_packets
+= packets
;
8147 stats
->rx_bytes
+= bytes
;
8151 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
8152 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
8158 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8159 packets
= ring
->stats
.packets
;
8160 bytes
= ring
->stats
.bytes
;
8161 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8162 stats
->tx_packets
+= packets
;
8163 stats
->tx_bytes
+= bytes
;
8167 /* following stats updated by ixgbe_watchdog_task() */
8168 stats
->multicast
= netdev
->stats
.multicast
;
8169 stats
->rx_errors
= netdev
->stats
.rx_errors
;
8170 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
8171 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
8172 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
8176 #ifdef CONFIG_IXGBE_DCB
8178 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8179 * @adapter: pointer to ixgbe_adapter
8180 * @tc: number of traffic classes currently enabled
8182 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8183 * 802.1Q priority maps to a packet buffer that exists.
8185 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
8187 struct ixgbe_hw
*hw
= &adapter
->hw
;
8191 /* 82598 have a static priority to TC mapping that can not
8192 * be changed so no validation is needed.
8194 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
8197 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
8200 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
8201 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
8203 /* If up2tc is out of bounds default to zero */
8205 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
8209 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
8215 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8216 * @adapter: Pointer to adapter struct
8218 * Populate the netdev user priority to tc map
8220 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
8222 struct net_device
*dev
= adapter
->netdev
;
8223 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
8224 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
8227 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
8230 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
8231 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
8233 tc
= ets
->prio_tc
[prio
];
8235 netdev_set_prio_tc_map(dev
, prio
, tc
);
8239 #endif /* CONFIG_IXGBE_DCB */
8241 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8243 * @netdev: net device to configure
8244 * @tc: number of traffic classes to enable
8246 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
8248 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8249 struct ixgbe_hw
*hw
= &adapter
->hw
;
8252 /* Hardware supports up to 8 traffic classes */
8253 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
)
8256 if (hw
->mac
.type
== ixgbe_mac_82598EB
&& tc
&& tc
< MAX_TRAFFIC_CLASS
)
8259 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
8260 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
8263 /* Hardware has to reinitialize queues and interrupts to
8264 * match packet buffer alignment. Unfortunately, the
8265 * hardware is not flexible enough to do this dynamically.
8267 if (netif_running(dev
))
8270 ixgbe_reset(adapter
);
8272 ixgbe_clear_interrupt_scheme(adapter
);
8274 #ifdef CONFIG_IXGBE_DCB
8276 netdev_set_num_tc(dev
, tc
);
8277 ixgbe_set_prio_tc_map(adapter
);
8279 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
8281 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
8282 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
8283 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
8286 netdev_reset_tc(dev
);
8288 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8289 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
8291 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
8293 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
8294 adapter
->dcb_cfg
.pfc_mode_enable
= false;
8297 ixgbe_validate_rtr(adapter
, tc
);
8299 #endif /* CONFIG_IXGBE_DCB */
8300 ixgbe_init_interrupt_scheme(adapter
);
8302 if (netif_running(dev
))
8303 return ixgbe_open(dev
);
8308 static int ixgbe_delete_clsu32(struct ixgbe_adapter
*adapter
,
8309 struct tc_cls_u32_offload
*cls
)
8311 u32 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
8315 if ((uhtid
!= 0x800) && (uhtid
>= IXGBE_MAX_LINK_HANDLE
))
8318 loc
= cls
->knode
.handle
& 0xfffff;
8320 spin_lock(&adapter
->fdir_perfect_lock
);
8321 err
= ixgbe_update_ethtool_fdir_entry(adapter
, NULL
, loc
);
8322 spin_unlock(&adapter
->fdir_perfect_lock
);
8326 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter
*adapter
,
8328 struct tc_cls_u32_offload
*cls
)
8330 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
8332 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8335 /* This ixgbe devices do not support hash tables at the moment
8336 * so abort when given hash tables.
8338 if (cls
->hnode
.divisor
> 0)
8341 set_bit(uhtid
- 1, &adapter
->tables
);
8345 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter
*adapter
,
8346 struct tc_cls_u32_offload
*cls
)
8348 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
8350 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8353 clear_bit(uhtid
- 1, &adapter
->tables
);
8357 #ifdef CONFIG_NET_CLS_ACT
8358 static int handle_redirect_action(struct ixgbe_adapter
*adapter
, int ifindex
,
8359 u8
*queue
, u64
*action
)
8361 unsigned int num_vfs
= adapter
->num_vfs
, vf
;
8362 struct net_device
*upper
;
8363 struct list_head
*iter
;
8365 /* redirect to a SRIOV VF */
8366 for (vf
= 0; vf
< num_vfs
; ++vf
) {
8367 upper
= pci_get_drvdata(adapter
->vfinfo
[vf
].vfdev
);
8368 if (upper
->ifindex
== ifindex
) {
8369 if (adapter
->num_rx_pools
> 1)
8372 *queue
= vf
* adapter
->num_rx_queues_per_pool
;
8375 *action
<<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF
;
8380 /* redirect to a offloaded macvlan netdev */
8381 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
8382 if (netif_is_macvlan(upper
)) {
8383 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
8384 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
8386 if (vadapter
&& vadapter
->netdev
->ifindex
== ifindex
) {
8387 *queue
= adapter
->rx_ring
[vadapter
->rx_base_queue
]->reg_idx
;
8397 static int parse_tc_actions(struct ixgbe_adapter
*adapter
,
8398 struct tcf_exts
*exts
, u64
*action
, u8
*queue
)
8400 const struct tc_action
*a
;
8403 if (tc_no_actions(exts
))
8406 tc_for_each_action(a
, exts
) {
8409 if (is_tcf_gact_shot(a
)) {
8410 *action
= IXGBE_FDIR_DROP_QUEUE
;
8411 *queue
= IXGBE_FDIR_DROP_QUEUE
;
8415 /* Redirect to a VF or a offloaded macvlan */
8416 if (is_tcf_mirred_redirect(a
)) {
8417 int ifindex
= tcf_mirred_ifindex(a
);
8419 err
= handle_redirect_action(adapter
, ifindex
, queue
,
8429 static int parse_tc_actions(struct ixgbe_adapter
*adapter
,
8430 struct tcf_exts
*exts
, u64
*action
, u8
*queue
)
8434 #endif /* CONFIG_NET_CLS_ACT */
8436 static int ixgbe_clsu32_build_input(struct ixgbe_fdir_filter
*input
,
8437 union ixgbe_atr_input
*mask
,
8438 struct tc_cls_u32_offload
*cls
,
8439 struct ixgbe_mat_field
*field_ptr
,
8440 struct ixgbe_nexthdr
*nexthdr
)
8444 bool found_entry
= false, found_jump_field
= false;
8446 for (i
= 0; i
< cls
->knode
.sel
->nkeys
; i
++) {
8447 off
= cls
->knode
.sel
->keys
[i
].off
;
8448 val
= cls
->knode
.sel
->keys
[i
].val
;
8449 m
= cls
->knode
.sel
->keys
[i
].mask
;
8451 for (j
= 0; field_ptr
[j
].val
; j
++) {
8452 if (field_ptr
[j
].off
== off
) {
8453 field_ptr
[j
].val(input
, mask
, val
, m
);
8454 input
->filter
.formatted
.flow_type
|=
8461 if (nexthdr
->off
== cls
->knode
.sel
->keys
[i
].off
&&
8462 nexthdr
->val
== cls
->knode
.sel
->keys
[i
].val
&&
8463 nexthdr
->mask
== cls
->knode
.sel
->keys
[i
].mask
)
8464 found_jump_field
= true;
8470 if (nexthdr
&& !found_jump_field
)
8476 mask
->formatted
.flow_type
= IXGBE_ATR_L4TYPE_IPV6_MASK
|
8477 IXGBE_ATR_L4TYPE_MASK
;
8479 if (input
->filter
.formatted
.flow_type
== IXGBE_ATR_FLOW_TYPE_IPV4
)
8480 mask
->formatted
.flow_type
&= IXGBE_ATR_L4TYPE_IPV6_MASK
;
8485 static int ixgbe_configure_clsu32(struct ixgbe_adapter
*adapter
,
8487 struct tc_cls_u32_offload
*cls
)
8489 u32 loc
= cls
->knode
.handle
& 0xfffff;
8490 struct ixgbe_hw
*hw
= &adapter
->hw
;
8491 struct ixgbe_mat_field
*field_ptr
;
8492 struct ixgbe_fdir_filter
*input
= NULL
;
8493 union ixgbe_atr_input
*mask
= NULL
;
8494 struct ixgbe_jump_table
*jump
= NULL
;
8495 int i
, err
= -EINVAL
;
8497 u32 uhtid
, link_uhtid
;
8499 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
8500 link_uhtid
= TC_U32_USERHTID(cls
->knode
.link_handle
);
8502 /* At the moment cls_u32 jumps to network layer and skips past
8503 * L2 headers. The canonical method to match L2 frames is to use
8504 * negative values. However this is error prone at best but really
8505 * just broken because there is no way to "know" what sort of hdr
8506 * is in front of the network layer. Fix cls_u32 to support L2
8507 * headers when needed.
8509 if (protocol
!= htons(ETH_P_IP
))
8512 if (loc
>= ((1024 << adapter
->fdir_pballoc
) - 2)) {
8513 e_err(drv
, "Location out of range\n");
8517 /* cls u32 is a graph starting at root node 0x800. The driver tracks
8518 * links and also the fields used to advance the parser across each
8519 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8520 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8521 * To add support for new nodes update ixgbe_model.h parse structures
8522 * this function _should_ be generic try not to hardcode values here.
8524 if (uhtid
== 0x800) {
8525 field_ptr
= (adapter
->jump_tables
[0])->mat
;
8527 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8529 if (!adapter
->jump_tables
[uhtid
])
8531 field_ptr
= (adapter
->jump_tables
[uhtid
])->mat
;
8537 /* At this point we know the field_ptr is valid and need to either
8538 * build cls_u32 link or attach filter. Because adding a link to
8539 * a handle that does not exist is invalid and the same for adding
8540 * rules to handles that don't exist.
8544 struct ixgbe_nexthdr
*nexthdr
= ixgbe_ipv4_jumps
;
8546 if (link_uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8549 if (!test_bit(link_uhtid
- 1, &adapter
->tables
))
8552 for (i
= 0; nexthdr
[i
].jump
; i
++) {
8553 if (nexthdr
[i
].o
!= cls
->knode
.sel
->offoff
||
8554 nexthdr
[i
].s
!= cls
->knode
.sel
->offshift
||
8555 nexthdr
[i
].m
!= cls
->knode
.sel
->offmask
)
8558 jump
= kzalloc(sizeof(*jump
), GFP_KERNEL
);
8561 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
8566 mask
= kzalloc(sizeof(*mask
), GFP_KERNEL
);
8571 jump
->input
= input
;
8573 err
= ixgbe_clsu32_build_input(input
, mask
, cls
,
8574 field_ptr
, &nexthdr
[i
]);
8576 jump
->mat
= nexthdr
[i
].jump
;
8577 adapter
->jump_tables
[link_uhtid
] = jump
;
8584 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
8587 mask
= kzalloc(sizeof(*mask
), GFP_KERNEL
);
8593 if ((uhtid
!= 0x800) && (adapter
->jump_tables
[uhtid
])) {
8594 if ((adapter
->jump_tables
[uhtid
])->input
)
8595 memcpy(input
, (adapter
->jump_tables
[uhtid
])->input
,
8597 if ((adapter
->jump_tables
[uhtid
])->mask
)
8598 memcpy(mask
, (adapter
->jump_tables
[uhtid
])->mask
,
8601 err
= ixgbe_clsu32_build_input(input
, mask
, cls
, field_ptr
, NULL
);
8605 err
= parse_tc_actions(adapter
, cls
->knode
.exts
, &input
->action
,
8610 input
->sw_idx
= loc
;
8612 spin_lock(&adapter
->fdir_perfect_lock
);
8614 if (hlist_empty(&adapter
->fdir_filter_list
)) {
8615 memcpy(&adapter
->fdir_mask
, mask
, sizeof(*mask
));
8616 err
= ixgbe_fdir_set_input_mask_82599(hw
, mask
);
8618 goto err_out_w_lock
;
8619 } else if (memcmp(&adapter
->fdir_mask
, mask
, sizeof(*mask
))) {
8621 goto err_out_w_lock
;
8624 ixgbe_atr_compute_perfect_hash_82599(&input
->filter
, mask
);
8625 err
= ixgbe_fdir_write_perfect_filter_82599(hw
, &input
->filter
,
8626 input
->sw_idx
, queue
);
8628 ixgbe_update_ethtool_fdir_entry(adapter
, input
, input
->sw_idx
);
8629 spin_unlock(&adapter
->fdir_perfect_lock
);
8634 spin_unlock(&adapter
->fdir_perfect_lock
);
8644 static int __ixgbe_setup_tc(struct net_device
*dev
, u32 handle
, __be16 proto
,
8645 struct tc_to_netdev
*tc
)
8647 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8649 if (TC_H_MAJ(handle
) == TC_H_MAJ(TC_H_INGRESS
) &&
8650 tc
->type
== TC_SETUP_CLSU32
) {
8651 switch (tc
->cls_u32
->command
) {
8652 case TC_CLSU32_NEW_KNODE
:
8653 case TC_CLSU32_REPLACE_KNODE
:
8654 return ixgbe_configure_clsu32(adapter
,
8655 proto
, tc
->cls_u32
);
8656 case TC_CLSU32_DELETE_KNODE
:
8657 return ixgbe_delete_clsu32(adapter
, tc
->cls_u32
);
8658 case TC_CLSU32_NEW_HNODE
:
8659 case TC_CLSU32_REPLACE_HNODE
:
8660 return ixgbe_configure_clsu32_add_hnode(adapter
, proto
,
8662 case TC_CLSU32_DELETE_HNODE
:
8663 return ixgbe_configure_clsu32_del_hnode(adapter
,
8670 if (tc
->type
!= TC_SETUP_MQPRIO
)
8673 return ixgbe_setup_tc(dev
, tc
->tc
);
8676 #ifdef CONFIG_PCI_IOV
8677 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
8679 struct net_device
*netdev
= adapter
->netdev
;
8682 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
8687 void ixgbe_do_reset(struct net_device
*netdev
)
8689 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8691 if (netif_running(netdev
))
8692 ixgbe_reinit_locked(adapter
);
8694 ixgbe_reset(adapter
);
8697 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
8698 netdev_features_t features
)
8700 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8702 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8703 if (!(features
& NETIF_F_RXCSUM
))
8704 features
&= ~NETIF_F_LRO
;
8706 /* Turn off LRO if not RSC capable */
8707 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
8708 features
&= ~NETIF_F_LRO
;
8713 static int ixgbe_set_features(struct net_device
*netdev
,
8714 netdev_features_t features
)
8716 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8717 netdev_features_t changed
= netdev
->features
^ features
;
8718 bool need_reset
= false;
8720 /* Make sure RSC matches LRO, reset if change */
8721 if (!(features
& NETIF_F_LRO
)) {
8722 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8724 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
8725 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
8726 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
8727 if (adapter
->rx_itr_setting
== 1 ||
8728 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
8729 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
8731 } else if ((changed
^ features
) & NETIF_F_LRO
) {
8732 e_info(probe
, "rx-usecs set too low, "
8738 * Check if Flow Director n-tuple support or hw_tc support was
8739 * enabled or disabled. If the state changed, we need to reset.
8741 if ((features
& NETIF_F_NTUPLE
) || (features
& NETIF_F_HW_TC
)) {
8742 /* turn off ATR, enable perfect filters and reset */
8743 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
8746 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8747 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8749 /* turn off perfect filters, enable ATR and reset */
8750 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
8753 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8755 /* We cannot enable ATR if SR-IOV is enabled */
8756 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
||
8757 /* We cannot enable ATR if we have 2 or more tcs */
8758 (netdev_get_num_tc(netdev
) > 1) ||
8759 /* We cannot enable ATR if RSS is disabled */
8760 (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1) ||
8761 /* A sample rate of 0 indicates ATR disabled */
8762 (!adapter
->atr_sample_rate
))
8763 ; /* do nothing not supported */
8764 else /* otherwise supported and set the flag */
8765 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8768 if (changed
& NETIF_F_RXALL
)
8771 netdev
->features
= features
;
8773 #ifdef CONFIG_IXGBE_VXLAN
8774 if ((adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
)) {
8775 if (features
& NETIF_F_RXCSUM
)
8776 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8778 ixgbe_clear_vxlan_port(adapter
);
8780 #endif /* CONFIG_IXGBE_VXLAN */
8783 ixgbe_do_reset(netdev
);
8784 else if (changed
& (NETIF_F_HW_VLAN_CTAG_RX
|
8785 NETIF_F_HW_VLAN_CTAG_FILTER
))
8786 ixgbe_set_rx_mode(netdev
);
8791 #ifdef CONFIG_IXGBE_VXLAN
8793 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8794 * @dev: The port's netdev
8795 * @sa_family: Socket Family that VXLAN is notifiying us about
8796 * @port: New UDP port number that VXLAN started listening to
8798 static void ixgbe_add_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8801 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8802 struct ixgbe_hw
*hw
= &adapter
->hw
;
8804 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8807 if (sa_family
== AF_INET6
)
8810 if (adapter
->vxlan_port
== port
)
8813 if (adapter
->vxlan_port
) {
8815 "Hit Max num of VXLAN ports, not adding port %d\n",
8820 adapter
->vxlan_port
= port
;
8821 IXGBE_WRITE_REG(hw
, IXGBE_VXLANCTRL
, ntohs(port
));
8825 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8826 * @dev: The port's netdev
8827 * @sa_family: Socket Family that VXLAN is notifying us about
8828 * @port: UDP port number that VXLAN stopped listening to
8830 static void ixgbe_del_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8833 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8835 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8838 if (sa_family
== AF_INET6
)
8841 if (adapter
->vxlan_port
!= port
) {
8842 netdev_info(dev
, "Port %d was not found, not deleting\n",
8847 ixgbe_clear_vxlan_port(adapter
);
8848 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8850 #endif /* CONFIG_IXGBE_VXLAN */
8852 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
8853 struct net_device
*dev
,
8854 const unsigned char *addr
, u16 vid
,
8857 /* guarantee we can provide a unique filter for the unicast address */
8858 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
8859 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8860 u16 pool
= VMDQ_P(0);
8862 if (netdev_uc_count(dev
) >= ixgbe_available_rars(adapter
, pool
))
8866 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
8870 * ixgbe_configure_bridge_mode - set various bridge modes
8871 * @adapter - the private structure
8872 * @mode - requested bridge mode
8874 * Configure some settings require for various bridge modes.
8876 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter
*adapter
,
8879 struct ixgbe_hw
*hw
= &adapter
->hw
;
8880 unsigned int p
, num_pools
;
8884 case BRIDGE_MODE_VEPA
:
8885 /* disable Tx loopback, rely on switch hairpin mode */
8886 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, 0);
8888 /* must enable Rx switching replication to allow multicast
8889 * packet reception on all VFs, and to enable source address
8892 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8893 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
8894 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8896 /* enable Rx source address pruning. Note, this requires
8897 * replication to be enabled or else it does nothing.
8899 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8900 for (p
= 0; p
< num_pools
; p
++) {
8901 if (hw
->mac
.ops
.set_source_address_pruning
)
8902 hw
->mac
.ops
.set_source_address_pruning(hw
,
8907 case BRIDGE_MODE_VEB
:
8908 /* enable Tx loopback for internal VF/PF communication */
8909 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
,
8910 IXGBE_PFDTXGSWC_VT_LBEN
);
8912 /* disable Rx switching replication unless we have SR-IOV
8915 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8916 if (!adapter
->num_vfs
)
8917 vmdctl
&= ~IXGBE_VT_CTL_REPLEN
;
8918 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8920 /* disable Rx source address pruning, since we don't expect to
8921 * be receiving external loopback of our transmitted frames.
8923 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8924 for (p
= 0; p
< num_pools
; p
++) {
8925 if (hw
->mac
.ops
.set_source_address_pruning
)
8926 hw
->mac
.ops
.set_source_address_pruning(hw
,
8935 adapter
->bridge_mode
= mode
;
8937 e_info(drv
, "enabling bridge mode: %s\n",
8938 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
8943 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
8944 struct nlmsghdr
*nlh
, u16 flags
)
8946 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8947 struct nlattr
*attr
, *br_spec
;
8950 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8953 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
8957 nla_for_each_nested(attr
, br_spec
, rem
) {
8961 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
8964 if (nla_len(attr
) < sizeof(mode
))
8967 mode
= nla_get_u16(attr
);
8968 status
= ixgbe_configure_bridge_mode(adapter
, mode
);
8978 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
8979 struct net_device
*dev
,
8980 u32 filter_mask
, int nlflags
)
8982 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8984 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8987 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
,
8988 adapter
->bridge_mode
, 0, 0, nlflags
,
8992 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
8994 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
8995 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
8996 int used_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
9000 /* Hardware has a limited number of available pools. Each VF, and the
9001 * PF require a pool. Check to ensure we don't attempt to use more
9002 * then the available number of pools.
9004 if (used_pools
>= IXGBE_MAX_VF_FUNCTIONS
)
9005 return ERR_PTR(-EINVAL
);
9008 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
9009 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
9011 return ERR_PTR(-EINVAL
);
9014 /* Check for hardware restriction on number of rx/tx queues */
9015 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
9016 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
9018 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
9020 return ERR_PTR(-EINVAL
);
9023 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
9024 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
9025 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
9026 return ERR_PTR(-EBUSY
);
9028 fwd_adapter
= kzalloc(sizeof(*fwd_adapter
), GFP_KERNEL
);
9030 return ERR_PTR(-ENOMEM
);
9032 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
9033 adapter
->num_rx_pools
++;
9034 set_bit(pool
, &adapter
->fwd_bitmask
);
9035 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
9037 /* Enable VMDq flag so device will be set in VM mode */
9038 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
9039 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
9040 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
9042 /* Force reinit of ring allocation with VMDQ enabled */
9043 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
9046 fwd_adapter
->pool
= pool
;
9047 fwd_adapter
->real_adapter
= adapter
;
9048 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
9051 netif_tx_start_all_queues(vdev
);
9054 /* unwind counter and free adapter struct */
9056 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
9057 clear_bit(pool
, &adapter
->fwd_bitmask
);
9058 adapter
->num_rx_pools
--;
9060 return ERR_PTR(err
);
9063 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
9065 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
9066 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
9069 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
9070 adapter
->num_rx_pools
--;
9072 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
9073 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
9074 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
9075 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
9076 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
9077 fwd_adapter
->pool
, adapter
->num_rx_pools
,
9078 fwd_adapter
->rx_base_queue
,
9079 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
9080 adapter
->fwd_bitmask
);
9084 #define IXGBE_MAX_MAC_HDR_LEN 127
9085 #define IXGBE_MAX_NETWORK_HDR_LEN 511
9087 static netdev_features_t
9088 ixgbe_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
9089 netdev_features_t features
)
9091 unsigned int network_hdr_len
, mac_hdr_len
;
9093 /* Make certain the headers can be described by a context descriptor */
9094 mac_hdr_len
= skb_network_header(skb
) - skb
->data
;
9095 if (unlikely(mac_hdr_len
> IXGBE_MAX_MAC_HDR_LEN
))
9096 return features
& ~(NETIF_F_HW_CSUM
|
9098 NETIF_F_HW_VLAN_CTAG_TX
|
9102 network_hdr_len
= skb_checksum_start(skb
) - skb_network_header(skb
);
9103 if (unlikely(network_hdr_len
> IXGBE_MAX_NETWORK_HDR_LEN
))
9104 return features
& ~(NETIF_F_HW_CSUM
|
9109 /* We can only support IPV4 TSO in tunnels if we can mangle the
9110 * inner IP ID field, so strip TSO if MANGLEID is not supported.
9112 if (skb
->encapsulation
&& !(features
& NETIF_F_TSO_MANGLEID
))
9113 features
&= ~NETIF_F_TSO
;
9118 static const struct net_device_ops ixgbe_netdev_ops
= {
9119 .ndo_open
= ixgbe_open
,
9120 .ndo_stop
= ixgbe_close
,
9121 .ndo_start_xmit
= ixgbe_xmit_frame
,
9122 .ndo_select_queue
= ixgbe_select_queue
,
9123 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
9124 .ndo_validate_addr
= eth_validate_addr
,
9125 .ndo_set_mac_address
= ixgbe_set_mac
,
9126 .ndo_change_mtu
= ixgbe_change_mtu
,
9127 .ndo_tx_timeout
= ixgbe_tx_timeout
,
9128 .ndo_set_tx_maxrate
= ixgbe_tx_maxrate
,
9129 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
9130 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
9131 .ndo_do_ioctl
= ixgbe_ioctl
,
9132 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
9133 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
9134 .ndo_set_vf_rate
= ixgbe_ndo_set_vf_bw
,
9135 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
9136 .ndo_set_vf_rss_query_en
= ixgbe_ndo_set_vf_rss_query_en
,
9137 .ndo_set_vf_trust
= ixgbe_ndo_set_vf_trust
,
9138 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
9139 .ndo_get_stats64
= ixgbe_get_stats64
,
9140 .ndo_setup_tc
= __ixgbe_setup_tc
,
9141 #ifdef CONFIG_NET_POLL_CONTROLLER
9142 .ndo_poll_controller
= ixgbe_netpoll
,
9144 #ifdef CONFIG_NET_RX_BUSY_POLL
9145 .ndo_busy_poll
= ixgbe_low_latency_recv
,
9148 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
9149 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
9150 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
9151 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
9152 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
9153 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
9154 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
9155 #endif /* IXGBE_FCOE */
9156 .ndo_set_features
= ixgbe_set_features
,
9157 .ndo_fix_features
= ixgbe_fix_features
,
9158 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
9159 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
9160 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
9161 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
9162 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
9163 #ifdef CONFIG_IXGBE_VXLAN
9164 .ndo_add_vxlan_port
= ixgbe_add_vxlan_port
,
9165 .ndo_del_vxlan_port
= ixgbe_del_vxlan_port
,
9166 #endif /* CONFIG_IXGBE_VXLAN */
9167 .ndo_features_check
= ixgbe_features_check
,
9171 * ixgbe_enumerate_functions - Get the number of ports this device has
9172 * @adapter: adapter structure
9174 * This function enumerates the phsyical functions co-located on a single slot,
9175 * in order to determine how many ports a device has. This is most useful in
9176 * determining the required GT/s of PCIe bandwidth necessary for optimal
9179 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
9181 struct pci_dev
*entry
, *pdev
= adapter
->pdev
;
9184 /* Some cards can not use the generic count PCIe functions method,
9185 * because they are behind a parent switch, so we hardcode these with
9186 * the correct number of functions.
9188 if (ixgbe_pcie_from_parent(&adapter
->hw
))
9191 list_for_each_entry(entry
, &adapter
->pdev
->bus
->devices
, bus_list
) {
9192 /* don't count virtual functions */
9193 if (entry
->is_virtfn
)
9196 /* When the devices on the bus don't all match our device ID,
9197 * we can't reliably determine the correct number of
9198 * functions. This can occur if a function has been direct
9199 * attached to a virtual machine using VT-d, for example. In
9200 * this case, simply return -1 to indicate this.
9202 if ((entry
->vendor
!= pdev
->vendor
) ||
9203 (entry
->device
!= pdev
->device
))
9213 * ixgbe_wol_supported - Check whether device supports WoL
9214 * @adapter: the adapter private structure
9215 * @device_id: the device ID
9216 * @subdev_id: the subsystem device ID
9218 * This function is used by probe and ethtool to determine
9219 * which devices have WoL support
9222 bool ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
9225 struct ixgbe_hw
*hw
= &adapter
->hw
;
9226 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
9228 /* WOL not supported on 82598 */
9229 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
9232 /* check eeprom to see if WOL is enabled for X540 and newer */
9233 if (hw
->mac
.type
>= ixgbe_mac_X540
) {
9234 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
9235 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
9236 (hw
->bus
.func
== 0)))
9240 /* WOL is determined based on device IDs for 82599 MACs */
9241 switch (device_id
) {
9242 case IXGBE_DEV_ID_82599_SFP
:
9243 /* Only these subdevices could supports WOL */
9244 switch (subdevice_id
) {
9245 case IXGBE_SUBDEV_ID_82599_560FLR
:
9246 case IXGBE_SUBDEV_ID_82599_LOM_SNAP6
:
9247 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
9248 case IXGBE_SUBDEV_ID_82599_SFP_2OCP
:
9249 /* only support first port */
9250 if (hw
->bus
.func
!= 0)
9252 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
9253 case IXGBE_SUBDEV_ID_82599_SFP
:
9254 case IXGBE_SUBDEV_ID_82599_RNDC
:
9255 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
9256 case IXGBE_SUBDEV_ID_82599_SFP_1OCP
:
9257 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM1
:
9258 case IXGBE_SUBDEV_ID_82599_SFP_LOM_OEM2
:
9262 case IXGBE_DEV_ID_82599EN_SFP
:
9263 /* Only these subdevices support WOL */
9264 switch (subdevice_id
) {
9265 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
9269 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
9270 /* All except this subdevice support WOL */
9271 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
9274 case IXGBE_DEV_ID_82599_KX4
:
9284 * ixgbe_probe - Device Initialization Routine
9285 * @pdev: PCI device information struct
9286 * @ent: entry in ixgbe_pci_tbl
9288 * Returns 0 on success, negative on failure
9290 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9291 * The OS initialization, configuring of the adapter private structure,
9292 * and a hardware reset occur.
9294 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
9296 struct net_device
*netdev
;
9297 struct ixgbe_adapter
*adapter
= NULL
;
9298 struct ixgbe_hw
*hw
;
9299 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
9300 int i
, err
, pci_using_dac
, expected_gts
;
9301 unsigned int indices
= MAX_TX_QUEUES
;
9302 u8 part_str
[IXGBE_PBANUM_LENGTH
];
9303 bool disable_dev
= false;
9309 /* Catch broken hardware that put the wrong VF device ID in
9310 * the PCIe SR-IOV capability.
9312 if (pdev
->is_virtfn
) {
9313 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
9314 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
9318 err
= pci_enable_device_mem(pdev
);
9322 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
9325 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
9328 "No usable DMA configuration, aborting\n");
9334 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
9335 IORESOURCE_MEM
), ixgbe_driver_name
);
9338 "pci_request_selected_regions failed 0x%x\n", err
);
9342 pci_enable_pcie_error_reporting(pdev
);
9344 pci_set_master(pdev
);
9345 pci_save_state(pdev
);
9347 if (ii
->mac
== ixgbe_mac_82598EB
) {
9348 #ifdef CONFIG_IXGBE_DCB
9349 /* 8 TC w/ 4 queues per TC */
9350 indices
= 4 * MAX_TRAFFIC_CLASS
;
9352 indices
= IXGBE_MAX_RSS_INDICES
;
9356 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
9359 goto err_alloc_etherdev
;
9362 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
9364 adapter
= netdev_priv(netdev
);
9366 adapter
->netdev
= netdev
;
9367 adapter
->pdev
= pdev
;
9370 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
9372 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
9373 pci_resource_len(pdev
, 0));
9374 adapter
->io_addr
= hw
->hw_addr
;
9380 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
9381 ixgbe_set_ethtool_ops(netdev
);
9382 netdev
->watchdog_timeo
= 5 * HZ
;
9383 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
9386 hw
->mac
.ops
= *ii
->mac_ops
;
9387 hw
->mac
.type
= ii
->mac
;
9388 hw
->mvals
= ii
->mvals
;
9391 hw
->eeprom
.ops
= *ii
->eeprom_ops
;
9392 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC(hw
));
9393 if (ixgbe_removed(hw
->hw_addr
)) {
9397 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9398 if (!(eec
& BIT(8)))
9399 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
9402 hw
->phy
.ops
= *ii
->phy_ops
;
9403 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
9404 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9405 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
9406 hw
->phy
.mdio
.mmds
= 0;
9407 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
9408 hw
->phy
.mdio
.dev
= netdev
;
9409 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
9410 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
9412 ii
->get_invariants(hw
);
9414 /* setup the private structure */
9415 err
= ixgbe_sw_init(adapter
);
9419 /* Make sure the SWFW semaphore is in a valid state */
9420 if (hw
->mac
.ops
.init_swfw_sync
)
9421 hw
->mac
.ops
.init_swfw_sync(hw
);
9423 /* Make it possible the adapter to be woken up via WOL */
9424 switch (adapter
->hw
.mac
.type
) {
9425 case ixgbe_mac_82599EB
:
9426 case ixgbe_mac_X540
:
9427 case ixgbe_mac_X550
:
9428 case ixgbe_mac_X550EM_x
:
9429 case ixgbe_mac_x550em_a
:
9430 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9437 * If there is a fan on this device and it has failed log the
9440 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
9441 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
9442 if (esdp
& IXGBE_ESDP_SDP1
)
9443 e_crit(probe
, "Fan has stopped, replace the adapter\n");
9446 if (allow_unsupported_sfp
)
9447 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
9449 /* reset_hw fills in the perm_addr as well */
9450 hw
->phy
.reset_if_overtemp
= true;
9451 err
= hw
->mac
.ops
.reset_hw(hw
);
9452 hw
->phy
.reset_if_overtemp
= false;
9453 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
9455 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
9456 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9457 e_dev_err("Reload the driver after installing a supported module.\n");
9460 e_dev_err("HW Init failed: %d\n", err
);
9464 #ifdef CONFIG_PCI_IOV
9465 /* SR-IOV not supported on the 82598 */
9466 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
9469 ixgbe_init_mbx_params_pf(hw
);
9470 hw
->mbx
.ops
= ii
->mbx_ops
;
9471 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
9472 ixgbe_enable_sriov(adapter
);
9476 netdev
->features
= NETIF_F_SG
|
9483 #define IXGBE_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
9484 NETIF_F_GSO_GRE_CSUM | \
9485 NETIF_F_GSO_IPIP | \
9487 NETIF_F_GSO_UDP_TUNNEL | \
9488 NETIF_F_GSO_UDP_TUNNEL_CSUM)
9490 netdev
->gso_partial_features
= IXGBE_GSO_PARTIAL_FEATURES
;
9491 netdev
->features
|= NETIF_F_GSO_PARTIAL
|
9492 IXGBE_GSO_PARTIAL_FEATURES
;
9494 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
9495 netdev
->features
|= NETIF_F_SCTP_CRC
;
9497 /* copy netdev features into list of user selectable features */
9498 netdev
->hw_features
|= netdev
->features
|
9499 NETIF_F_HW_VLAN_CTAG_RX
|
9500 NETIF_F_HW_VLAN_CTAG_TX
|
9502 NETIF_F_HW_L2FW_DOFFLOAD
;
9504 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
9505 netdev
->hw_features
|= NETIF_F_NTUPLE
|
9509 netdev
->features
|= NETIF_F_HIGHDMA
;
9511 /* set this bit last since it cannot be part of vlan_features */
9512 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
|
9513 NETIF_F_HW_VLAN_CTAG_RX
|
9514 NETIF_F_HW_VLAN_CTAG_TX
;
9516 netdev
->vlan_features
|= netdev
->features
| NETIF_F_TSO_MANGLEID
;
9517 netdev
->hw_enc_features
|= netdev
->vlan_features
;
9518 netdev
->mpls_features
|= NETIF_F_HW_CSUM
;
9520 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
9521 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
9523 #ifdef CONFIG_IXGBE_DCB
9524 if (adapter
->flags
& IXGBE_FLAG_DCB_CAPABLE
)
9525 netdev
->dcbnl_ops
= &dcbnl_ops
;
9529 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
9530 unsigned int fcoe_l
;
9532 if (hw
->mac
.ops
.get_device_caps
) {
9533 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
9534 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
9535 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
9539 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
9540 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
9542 netdev
->features
|= NETIF_F_FSO
|
9545 netdev
->vlan_features
|= NETIF_F_FSO
|
9549 #endif /* IXGBE_FCOE */
9551 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
9552 netdev
->hw_features
|= NETIF_F_LRO
;
9553 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
9554 netdev
->features
|= NETIF_F_LRO
;
9556 /* make sure the EEPROM is good */
9557 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
9558 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9563 eth_platform_get_mac_address(&adapter
->pdev
->dev
,
9564 adapter
->hw
.mac
.perm_addr
);
9566 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
9568 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
9569 e_dev_err("invalid MAC address\n");
9574 /* Set hw->mac.addr to permanent MAC address */
9575 ether_addr_copy(hw
->mac
.addr
, hw
->mac
.perm_addr
);
9576 ixgbe_mac_set_default_filter(adapter
);
9578 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
9579 (unsigned long) adapter
);
9581 if (ixgbe_removed(hw
->hw_addr
)) {
9585 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
9586 set_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
);
9587 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
9589 err
= ixgbe_init_interrupt_scheme(adapter
);
9593 /* WOL not supported for all devices */
9595 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
9596 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
9597 pdev
->subsystem_device
);
9598 if (hw
->wol_enabled
)
9599 adapter
->wol
= IXGBE_WUFC_MAG
;
9601 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
9603 /* save off EEPROM version number */
9604 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
9605 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
9607 /* pick up the PCI bus settings for reporting later */
9608 if (ixgbe_pcie_from_parent(hw
))
9609 ixgbe_get_parent_bus_info(adapter
);
9611 hw
->mac
.ops
.get_bus_info(hw
);
9613 /* calculate the expected PCIe bandwidth required for optimal
9614 * performance. Note that some older parts will never have enough
9615 * bandwidth due to being older generation PCIe parts. We clamp these
9616 * parts to ensure no warning is displayed if it can't be fixed.
9618 switch (hw
->mac
.type
) {
9619 case ixgbe_mac_82598EB
:
9620 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
9623 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
9627 /* don't check link if we failed to enumerate functions */
9628 if (expected_gts
> 0)
9629 ixgbe_check_minimum_link(adapter
, expected_gts
);
9631 err
= ixgbe_read_pba_string_generic(hw
, part_str
, sizeof(part_str
));
9633 strlcpy(part_str
, "Unknown", sizeof(part_str
));
9634 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
9635 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9636 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
9639 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9640 hw
->mac
.type
, hw
->phy
.type
, part_str
);
9642 e_dev_info("%pM\n", netdev
->dev_addr
);
9644 /* reset the hardware with the new settings */
9645 err
= hw
->mac
.ops
.start_hw(hw
);
9646 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
9647 /* We are running on a pre-production device, log a warning */
9648 e_dev_warn("This device is a pre-production adapter/LOM. "
9649 "Please be aware there may be issues associated "
9650 "with your hardware. If you are experiencing "
9651 "problems please contact your Intel or hardware "
9652 "representative who provided you with this "
9655 strcpy(netdev
->name
, "eth%d");
9656 err
= register_netdev(netdev
);
9660 pci_set_drvdata(pdev
, adapter
);
9662 /* power down the optics for 82599 SFP+ fiber */
9663 if (hw
->mac
.ops
.disable_tx_laser
)
9664 hw
->mac
.ops
.disable_tx_laser(hw
);
9666 /* carrier off reporting is important to ethtool even BEFORE open */
9667 netif_carrier_off(netdev
);
9669 #ifdef CONFIG_IXGBE_DCA
9670 if (dca_add_requester(&pdev
->dev
) == 0) {
9671 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
9672 ixgbe_setup_dca(adapter
);
9675 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
9676 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
9677 for (i
= 0; i
< adapter
->num_vfs
; i
++)
9678 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
9681 /* firmware requires driver version to be 0xFFFFFFFF
9682 * since os does not support feature
9684 if (hw
->mac
.ops
.set_fw_drv_ver
)
9685 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
9688 /* add san mac addr to netdev */
9689 ixgbe_add_sanmac_netdev(netdev
);
9691 e_dev_info("%s\n", ixgbe_default_device_descr
);
9693 #ifdef CONFIG_IXGBE_HWMON
9694 if (ixgbe_sysfs_init(adapter
))
9695 e_err(probe
, "failed to allocate sysfs resources\n");
9696 #endif /* CONFIG_IXGBE_HWMON */
9698 ixgbe_dbg_adapter_init(adapter
);
9700 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9701 if (ixgbe_mng_enabled(hw
) && ixgbe_is_sfp(hw
) && hw
->mac
.ops
.setup_link
)
9702 hw
->mac
.ops
.setup_link(hw
,
9703 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
9709 ixgbe_release_hw_control(adapter
);
9710 ixgbe_clear_interrupt_scheme(adapter
);
9712 ixgbe_disable_sriov(adapter
);
9713 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
9714 iounmap(adapter
->io_addr
);
9715 kfree(adapter
->jump_tables
[0]);
9716 kfree(adapter
->mac_table
);
9718 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9719 free_netdev(netdev
);
9721 pci_release_selected_regions(pdev
,
9722 pci_select_bars(pdev
, IORESOURCE_MEM
));
9725 if (!adapter
|| disable_dev
)
9726 pci_disable_device(pdev
);
9731 * ixgbe_remove - Device Removal Routine
9732 * @pdev: PCI device information struct
9734 * ixgbe_remove is called by the PCI subsystem to alert the driver
9735 * that it should release a PCI device. The could be caused by a
9736 * Hot-Plug event, or because the driver is going to be removed from
9739 static void ixgbe_remove(struct pci_dev
*pdev
)
9741 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9742 struct net_device
*netdev
;
9746 /* if !adapter then we already cleaned up in probe */
9750 netdev
= adapter
->netdev
;
9751 ixgbe_dbg_adapter_exit(adapter
);
9753 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
9754 cancel_work_sync(&adapter
->service_task
);
9757 #ifdef CONFIG_IXGBE_DCA
9758 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
9759 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
9760 dca_remove_requester(&pdev
->dev
);
9761 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
9762 IXGBE_DCA_CTRL_DCA_DISABLE
);
9766 #ifdef CONFIG_IXGBE_HWMON
9767 ixgbe_sysfs_exit(adapter
);
9768 #endif /* CONFIG_IXGBE_HWMON */
9770 /* remove the added san mac */
9771 ixgbe_del_sanmac_netdev(netdev
);
9773 #ifdef CONFIG_PCI_IOV
9774 ixgbe_disable_sriov(adapter
);
9776 if (netdev
->reg_state
== NETREG_REGISTERED
)
9777 unregister_netdev(netdev
);
9779 ixgbe_clear_interrupt_scheme(adapter
);
9781 ixgbe_release_hw_control(adapter
);
9784 kfree(adapter
->ixgbe_ieee_pfc
);
9785 kfree(adapter
->ixgbe_ieee_ets
);
9788 iounmap(adapter
->io_addr
);
9789 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
9792 e_dev_info("complete\n");
9794 for (i
= 0; i
< IXGBE_MAX_LINK_HANDLE
; i
++) {
9795 if (adapter
->jump_tables
[i
]) {
9796 kfree(adapter
->jump_tables
[i
]->input
);
9797 kfree(adapter
->jump_tables
[i
]->mask
);
9799 kfree(adapter
->jump_tables
[i
]);
9802 kfree(adapter
->mac_table
);
9803 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9804 free_netdev(netdev
);
9806 pci_disable_pcie_error_reporting(pdev
);
9809 pci_disable_device(pdev
);
9813 * ixgbe_io_error_detected - called when PCI error is detected
9814 * @pdev: Pointer to PCI device
9815 * @state: The current pci connection state
9817 * This function is called after a PCI bus error affecting
9818 * this device has been detected.
9820 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
9821 pci_channel_state_t state
)
9823 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9824 struct net_device
*netdev
= adapter
->netdev
;
9826 #ifdef CONFIG_PCI_IOV
9827 struct ixgbe_hw
*hw
= &adapter
->hw
;
9828 struct pci_dev
*bdev
, *vfdev
;
9829 u32 dw0
, dw1
, dw2
, dw3
;
9831 u16 req_id
, pf_func
;
9833 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
9834 adapter
->num_vfs
== 0)
9835 goto skip_bad_vf_detection
;
9837 bdev
= pdev
->bus
->self
;
9838 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
9839 bdev
= bdev
->bus
->self
;
9842 goto skip_bad_vf_detection
;
9844 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
9846 goto skip_bad_vf_detection
;
9848 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
9849 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
9850 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
9851 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
9852 if (ixgbe_removed(hw
->hw_addr
))
9853 goto skip_bad_vf_detection
;
9856 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9857 if (!(req_id
& 0x0080))
9858 goto skip_bad_vf_detection
;
9860 pf_func
= req_id
& 0x01;
9861 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
9862 unsigned int device_id
;
9864 vf
= (req_id
& 0x7F) >> 1;
9865 e_dev_err("VF %d has caused a PCIe error\n", vf
);
9866 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9867 "%8.8x\tdw3: %8.8x\n",
9868 dw0
, dw1
, dw2
, dw3
);
9869 switch (adapter
->hw
.mac
.type
) {
9870 case ixgbe_mac_82599EB
:
9871 device_id
= IXGBE_82599_VF_DEVICE_ID
;
9873 case ixgbe_mac_X540
:
9874 device_id
= IXGBE_X540_VF_DEVICE_ID
;
9876 case ixgbe_mac_X550
:
9877 device_id
= IXGBE_DEV_ID_X550_VF
;
9879 case ixgbe_mac_X550EM_x
:
9880 device_id
= IXGBE_DEV_ID_X550EM_X_VF
;
9882 case ixgbe_mac_x550em_a
:
9883 device_id
= IXGBE_DEV_ID_X550EM_A_VF
;
9890 /* Find the pci device of the offending VF */
9891 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
9893 if (vfdev
->devfn
== (req_id
& 0xFF))
9895 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
9899 * There's a slim chance the VF could have been hot plugged,
9900 * so if it is no longer present we don't need to issue the
9901 * VFLR. Just clean up the AER in that case.
9904 ixgbe_issue_vf_flr(adapter
, vfdev
);
9905 /* Free device reference count */
9909 pci_cleanup_aer_uncorrect_error_status(pdev
);
9913 * Even though the error may have occurred on the other port
9914 * we still need to increment the vf error reference count for
9915 * both ports because the I/O resume function will be called
9918 adapter
->vferr_refcount
++;
9920 return PCI_ERS_RESULT_RECOVERED
;
9922 skip_bad_vf_detection
:
9923 #endif /* CONFIG_PCI_IOV */
9924 if (!test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
9925 return PCI_ERS_RESULT_DISCONNECT
;
9928 netif_device_detach(netdev
);
9930 if (state
== pci_channel_io_perm_failure
) {
9932 return PCI_ERS_RESULT_DISCONNECT
;
9935 if (netif_running(netdev
))
9936 ixgbe_down(adapter
);
9938 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
9939 pci_disable_device(pdev
);
9942 /* Request a slot reset. */
9943 return PCI_ERS_RESULT_NEED_RESET
;
9947 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9948 * @pdev: Pointer to PCI device
9950 * Restart the card from scratch, as if from a cold-boot.
9952 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
9954 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9955 pci_ers_result_t result
;
9958 if (pci_enable_device_mem(pdev
)) {
9959 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
9960 result
= PCI_ERS_RESULT_DISCONNECT
;
9962 smp_mb__before_atomic();
9963 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
9964 adapter
->hw
.hw_addr
= adapter
->io_addr
;
9965 pci_set_master(pdev
);
9966 pci_restore_state(pdev
);
9967 pci_save_state(pdev
);
9969 pci_wake_from_d3(pdev
, false);
9971 ixgbe_reset(adapter
);
9972 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9973 result
= PCI_ERS_RESULT_RECOVERED
;
9976 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
9978 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9979 "failed 0x%0x\n", err
);
9980 /* non-fatal, continue */
9987 * ixgbe_io_resume - called when traffic can start flowing again.
9988 * @pdev: Pointer to PCI device
9990 * This callback is called when the error recovery driver tells us that
9991 * its OK to resume normal operation.
9993 static void ixgbe_io_resume(struct pci_dev
*pdev
)
9995 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9996 struct net_device
*netdev
= adapter
->netdev
;
9998 #ifdef CONFIG_PCI_IOV
9999 if (adapter
->vferr_refcount
) {
10000 e_info(drv
, "Resuming after VF err\n");
10001 adapter
->vferr_refcount
--;
10006 if (netif_running(netdev
))
10009 netif_device_attach(netdev
);
10012 static const struct pci_error_handlers ixgbe_err_handler
= {
10013 .error_detected
= ixgbe_io_error_detected
,
10014 .slot_reset
= ixgbe_io_slot_reset
,
10015 .resume
= ixgbe_io_resume
,
10018 static struct pci_driver ixgbe_driver
= {
10019 .name
= ixgbe_driver_name
,
10020 .id_table
= ixgbe_pci_tbl
,
10021 .probe
= ixgbe_probe
,
10022 .remove
= ixgbe_remove
,
10024 .suspend
= ixgbe_suspend
,
10025 .resume
= ixgbe_resume
,
10027 .shutdown
= ixgbe_shutdown
,
10028 .sriov_configure
= ixgbe_pci_sriov_configure
,
10029 .err_handler
= &ixgbe_err_handler
10033 * ixgbe_init_module - Driver Registration Routine
10035 * ixgbe_init_module is the first routine called when the driver is
10036 * loaded. All it does is register with the PCI subsystem.
10038 static int __init
ixgbe_init_module(void)
10041 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
10042 pr_info("%s\n", ixgbe_copyright
);
10044 ixgbe_wq
= create_singlethread_workqueue(ixgbe_driver_name
);
10046 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name
);
10052 ret
= pci_register_driver(&ixgbe_driver
);
10058 #ifdef CONFIG_IXGBE_DCA
10059 dca_register_notify(&dca_notifier
);
10065 module_init(ixgbe_init_module
);
10068 * ixgbe_exit_module - Driver Exit Cleanup Routine
10070 * ixgbe_exit_module is called just before the driver is removed
10073 static void __exit
ixgbe_exit_module(void)
10075 #ifdef CONFIG_IXGBE_DCA
10076 dca_unregister_notify(&dca_notifier
);
10078 pci_unregister_driver(&ixgbe_driver
);
10082 destroy_workqueue(ixgbe_wq
);
10087 #ifdef CONFIG_IXGBE_DCA
10088 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
10093 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
10094 __ixgbe_notify_dca
);
10096 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
10099 #endif /* CONFIG_IXGBE_DCA */
10101 module_exit(ixgbe_exit_module
);