1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2015 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
54 #include <net/pkt_cls.h>
55 #include <net/tc_act/tc_gact.h>
58 #include <linux/of_net.h>
62 #include <asm/idprom.h>
67 #include "ixgbe_common.h"
68 #include "ixgbe_dcb_82599.h"
69 #include "ixgbe_sriov.h"
70 #include "ixgbe_model.h"
72 char ixgbe_driver_name
[] = "ixgbe";
73 static const char ixgbe_driver_string
[] =
74 "Intel(R) 10 Gigabit PCI Express Network Driver";
76 char ixgbe_default_device_descr
[] =
77 "Intel(R) 10 Gigabit Network Connection";
79 static char ixgbe_default_device_descr
[] =
80 "Intel(R) 10 Gigabit Network Connection";
82 #define DRV_VERSION "4.2.1-k"
83 const char ixgbe_driver_version
[] = DRV_VERSION
;
84 static const char ixgbe_copyright
[] =
85 "Copyright (c) 1999-2015 Intel Corporation.";
87 static const char ixgbe_overheat_msg
[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
89 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
90 [board_82598
] = &ixgbe_82598_info
,
91 [board_82599
] = &ixgbe_82599_info
,
92 [board_X540
] = &ixgbe_X540_info
,
93 [board_X550
] = &ixgbe_X550_info
,
94 [board_X550EM_x
] = &ixgbe_X550EM_x_info
,
97 /* ixgbe_pci_tbl - PCI Device ID Table
99 * Wildcard entries (PCI_ANY_ID) should come last
100 * Last entry must be all 0s
102 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
103 * Class, Class Mask, private data (not used) }
105 static const struct pci_device_id ixgbe_pci_tbl
[] = {
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
118 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
119 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
120 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
121 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
122 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
123 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
124 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
125 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
126 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
127 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
128 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
129 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
130 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
131 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
132 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
133 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
134 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
135 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
136 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T
), board_X550
},
137 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KX4
), board_X550EM_x
},
138 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KR
), board_X550EM_x
},
139 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_10G_T
), board_X550EM_x
},
140 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_SFP
), board_X550EM_x
},
141 /* required last entry */
144 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
146 #ifdef CONFIG_IXGBE_DCA
147 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
149 static struct notifier_block dca_notifier
= {
150 .notifier_call
= ixgbe_notify_dca
,
156 #ifdef CONFIG_PCI_IOV
157 static unsigned int max_vfs
;
158 module_param(max_vfs
, uint
, 0);
159 MODULE_PARM_DESC(max_vfs
,
160 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
161 #endif /* CONFIG_PCI_IOV */
163 static unsigned int allow_unsupported_sfp
;
164 module_param(allow_unsupported_sfp
, uint
, 0);
165 MODULE_PARM_DESC(allow_unsupported_sfp
,
166 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
168 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
169 static int debug
= -1;
170 module_param(debug
, int, 0);
171 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
173 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
174 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
175 MODULE_LICENSE("GPL");
176 MODULE_VERSION(DRV_VERSION
);
178 static struct workqueue_struct
*ixgbe_wq
;
180 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
182 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
185 struct pci_dev
*parent_dev
;
186 struct pci_bus
*parent_bus
;
188 parent_bus
= adapter
->pdev
->bus
->parent
;
192 parent_dev
= parent_bus
->self
;
196 if (!pci_is_pcie(parent_dev
))
199 pcie_capability_read_word(parent_dev
, reg
, value
);
200 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
201 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
206 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
208 struct ixgbe_hw
*hw
= &adapter
->hw
;
212 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
214 /* Get the negotiated link width and speed from PCI config space of the
215 * parent, as this device is behind a switch
217 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
219 /* assume caller will handle error case */
223 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
224 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
230 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
231 * @hw: hw specific details
233 * This function is used by probe to determine whether a device's PCI-Express
234 * bandwidth details should be gathered from the parent bus instead of from the
235 * device. Used to ensure that various locations all have the correct device ID
238 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
240 switch (hw
->device_id
) {
241 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
242 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
249 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
252 struct ixgbe_hw
*hw
= &adapter
->hw
;
254 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
255 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
256 struct pci_dev
*pdev
;
258 /* Some devices are not connected over PCIe and thus do not negotiate
259 * speed. These devices do not have valid bus info, and thus any report
260 * we generate may not be correct.
262 if (hw
->bus
.type
== ixgbe_bus_type_internal
)
265 /* determine whether to use the parent device */
266 if (ixgbe_pcie_from_parent(&adapter
->hw
))
267 pdev
= adapter
->pdev
->bus
->parent
->self
;
269 pdev
= adapter
->pdev
;
271 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
272 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
273 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
278 case PCIE_SPEED_2_5GT
:
279 /* 8b/10b encoding reduces max throughput by 20% */
282 case PCIE_SPEED_5_0GT
:
283 /* 8b/10b encoding reduces max throughput by 20% */
286 case PCIE_SPEED_8_0GT
:
287 /* 128b/130b encoding reduces throughput by less than 2% */
291 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
295 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
297 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
298 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
299 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
300 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
303 (speed
== PCIE_SPEED_2_5GT
? "20%" :
304 speed
== PCIE_SPEED_5_0GT
? "20%" :
305 speed
== PCIE_SPEED_8_0GT
? "<2%" :
308 if (max_gts
< expected_gts
) {
309 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
310 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
312 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
316 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
318 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
319 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
320 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
321 queue_work(ixgbe_wq
, &adapter
->service_task
);
324 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
326 struct ixgbe_adapter
*adapter
= hw
->back
;
331 e_dev_err("Adapter removed\n");
332 if (test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
333 ixgbe_service_event_schedule(adapter
);
336 static void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
340 /* The following check not only optimizes a bit by not
341 * performing a read on the status register when the
342 * register just read was a status register read that
343 * returned IXGBE_FAILED_READ_REG. It also blocks any
344 * potential recursion.
346 if (reg
== IXGBE_STATUS
) {
347 ixgbe_remove_adapter(hw
);
350 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
351 if (value
== IXGBE_FAILED_READ_REG
)
352 ixgbe_remove_adapter(hw
);
356 * ixgbe_read_reg - Read from device register
357 * @hw: hw specific details
358 * @reg: offset of register to read
360 * Returns : value read or IXGBE_FAILED_READ_REG if removed
362 * This function is used to read device registers. It checks for device
363 * removal by confirming any read that returns all ones by checking the
364 * status register value for all ones. This function avoids reading from
365 * the hardware if a removal was previously detected in which case it
366 * returns IXGBE_FAILED_READ_REG (all ones).
368 u32
ixgbe_read_reg(struct ixgbe_hw
*hw
, u32 reg
)
370 u8 __iomem
*reg_addr
= ACCESS_ONCE(hw
->hw_addr
);
373 if (ixgbe_removed(reg_addr
))
374 return IXGBE_FAILED_READ_REG
;
375 value
= readl(reg_addr
+ reg
);
376 if (unlikely(value
== IXGBE_FAILED_READ_REG
))
377 ixgbe_check_remove(hw
, reg
);
381 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
385 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
386 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
387 ixgbe_remove_adapter(hw
);
393 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
395 struct ixgbe_adapter
*adapter
= hw
->back
;
398 if (ixgbe_removed(hw
->hw_addr
))
399 return IXGBE_FAILED_READ_CFG_WORD
;
400 pci_read_config_word(adapter
->pdev
, reg
, &value
);
401 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
402 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
403 return IXGBE_FAILED_READ_CFG_WORD
;
407 #ifdef CONFIG_PCI_IOV
408 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
410 struct ixgbe_adapter
*adapter
= hw
->back
;
413 if (ixgbe_removed(hw
->hw_addr
))
414 return IXGBE_FAILED_READ_CFG_DWORD
;
415 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
416 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
417 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
418 return IXGBE_FAILED_READ_CFG_DWORD
;
421 #endif /* CONFIG_PCI_IOV */
423 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
425 struct ixgbe_adapter
*adapter
= hw
->back
;
427 if (ixgbe_removed(hw
->hw_addr
))
429 pci_write_config_word(adapter
->pdev
, reg
, value
);
432 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
434 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
436 /* flush memory to make sure state is correct before next watchdog */
437 smp_mb__before_atomic();
438 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
441 struct ixgbe_reg_info
{
446 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
448 /* General Registers */
449 {IXGBE_CTRL
, "CTRL"},
450 {IXGBE_STATUS
, "STATUS"},
451 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
453 /* Interrupt Registers */
454 {IXGBE_EICR
, "EICR"},
457 {IXGBE_SRRCTL(0), "SRRCTL"},
458 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
459 {IXGBE_RDLEN(0), "RDLEN"},
460 {IXGBE_RDH(0), "RDH"},
461 {IXGBE_RDT(0), "RDT"},
462 {IXGBE_RXDCTL(0), "RXDCTL"},
463 {IXGBE_RDBAL(0), "RDBAL"},
464 {IXGBE_RDBAH(0), "RDBAH"},
467 {IXGBE_TDBAL(0), "TDBAL"},
468 {IXGBE_TDBAH(0), "TDBAH"},
469 {IXGBE_TDLEN(0), "TDLEN"},
470 {IXGBE_TDH(0), "TDH"},
471 {IXGBE_TDT(0), "TDT"},
472 {IXGBE_TXDCTL(0), "TXDCTL"},
474 /* List Terminator */
480 * ixgbe_regdump - register printout routine
482 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
488 switch (reginfo
->ofs
) {
489 case IXGBE_SRRCTL(0):
490 for (i
= 0; i
< 64; i
++)
491 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
493 case IXGBE_DCA_RXCTRL(0):
494 for (i
= 0; i
< 64; i
++)
495 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
498 for (i
= 0; i
< 64; i
++)
499 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
502 for (i
= 0; i
< 64; i
++)
503 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
506 for (i
= 0; i
< 64; i
++)
507 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
509 case IXGBE_RXDCTL(0):
510 for (i
= 0; i
< 64; i
++)
511 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
514 for (i
= 0; i
< 64; i
++)
515 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
518 for (i
= 0; i
< 64; i
++)
519 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
522 for (i
= 0; i
< 64; i
++)
523 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
526 for (i
= 0; i
< 64; i
++)
527 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
530 for (i
= 0; i
< 64; i
++)
531 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
534 for (i
= 0; i
< 64; i
++)
535 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
538 for (i
= 0; i
< 64; i
++)
539 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
541 case IXGBE_TXDCTL(0):
542 for (i
= 0; i
< 64; i
++)
543 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
546 pr_info("%-15s %08x\n", reginfo
->name
,
547 IXGBE_READ_REG(hw
, reginfo
->ofs
));
551 for (i
= 0; i
< 8; i
++) {
552 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
553 pr_err("%-15s", rname
);
554 for (j
= 0; j
< 8; j
++)
555 pr_cont(" %08x", regs
[i
*8+j
]);
562 * ixgbe_dump - Print registers, tx-rings and rx-rings
564 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
566 struct net_device
*netdev
= adapter
->netdev
;
567 struct ixgbe_hw
*hw
= &adapter
->hw
;
568 struct ixgbe_reg_info
*reginfo
;
570 struct ixgbe_ring
*tx_ring
;
571 struct ixgbe_tx_buffer
*tx_buffer
;
572 union ixgbe_adv_tx_desc
*tx_desc
;
573 struct my_u0
{ u64 a
; u64 b
; } *u0
;
574 struct ixgbe_ring
*rx_ring
;
575 union ixgbe_adv_rx_desc
*rx_desc
;
576 struct ixgbe_rx_buffer
*rx_buffer_info
;
580 if (!netif_msg_hw(adapter
))
583 /* Print netdevice Info */
585 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
586 pr_info("Device Name state "
587 "trans_start last_rx\n");
588 pr_info("%-15s %016lX %016lX %016lX\n",
595 /* Print Registers */
596 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
597 pr_info(" Register Name Value\n");
598 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
599 reginfo
->name
; reginfo
++) {
600 ixgbe_regdump(hw
, reginfo
);
603 /* Print TX Ring Summary */
604 if (!netdev
|| !netif_running(netdev
))
607 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
608 pr_info(" %s %s %s %s\n",
609 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
610 "leng", "ntw", "timestamp");
611 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
612 tx_ring
= adapter
->tx_ring
[n
];
613 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
614 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
615 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
616 (u64
)dma_unmap_addr(tx_buffer
, dma
),
617 dma_unmap_len(tx_buffer
, len
),
618 tx_buffer
->next_to_watch
,
619 (u64
)tx_buffer
->time_stamp
);
623 if (!netif_msg_tx_done(adapter
))
624 goto rx_ring_summary
;
626 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
628 /* Transmit Descriptor Formats
630 * 82598 Advanced Transmit Descriptor
631 * +--------------------------------------------------------------+
632 * 0 | Buffer Address [63:0] |
633 * +--------------------------------------------------------------+
634 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
635 * +--------------------------------------------------------------+
636 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
638 * 82598 Advanced Transmit Descriptor (Write-Back Format)
639 * +--------------------------------------------------------------+
641 * +--------------------------------------------------------------+
642 * 8 | RSV | STA | NXTSEQ |
643 * +--------------------------------------------------------------+
646 * 82599+ Advanced Transmit Descriptor
647 * +--------------------------------------------------------------+
648 * 0 | Buffer Address [63:0] |
649 * +--------------------------------------------------------------+
650 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
651 * +--------------------------------------------------------------+
652 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
654 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
655 * +--------------------------------------------------------------+
657 * +--------------------------------------------------------------+
658 * 8 | RSV | STA | RSV |
659 * +--------------------------------------------------------------+
663 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
664 tx_ring
= adapter
->tx_ring
[n
];
665 pr_info("------------------------------------\n");
666 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
667 pr_info("------------------------------------\n");
668 pr_info("%s%s %s %s %s %s\n",
669 "T [desc] [address 63:0 ] ",
670 "[PlPOIdStDDt Ln] [bi->dma ] ",
671 "leng", "ntw", "timestamp", "bi->skb");
673 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
674 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
675 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
676 u0
= (struct my_u0
*)tx_desc
;
677 if (dma_unmap_len(tx_buffer
, len
) > 0) {
678 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
682 (u64
)dma_unmap_addr(tx_buffer
, dma
),
683 dma_unmap_len(tx_buffer
, len
),
684 tx_buffer
->next_to_watch
,
685 (u64
)tx_buffer
->time_stamp
,
687 if (i
== tx_ring
->next_to_use
&&
688 i
== tx_ring
->next_to_clean
)
690 else if (i
== tx_ring
->next_to_use
)
692 else if (i
== tx_ring
->next_to_clean
)
697 if (netif_msg_pktdata(adapter
) &&
699 print_hex_dump(KERN_INFO
, "",
700 DUMP_PREFIX_ADDRESS
, 16, 1,
701 tx_buffer
->skb
->data
,
702 dma_unmap_len(tx_buffer
, len
),
708 /* Print RX Rings Summary */
710 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
711 pr_info("Queue [NTU] [NTC]\n");
712 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
713 rx_ring
= adapter
->rx_ring
[n
];
714 pr_info("%5d %5X %5X\n",
715 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
719 if (!netif_msg_rx_status(adapter
))
722 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
724 /* Receive Descriptor Formats
726 * 82598 Advanced Receive Descriptor (Read) Format
728 * +-----------------------------------------------------+
729 * 0 | Packet Buffer Address [63:1] |A0/NSE|
730 * +----------------------------------------------+------+
731 * 8 | Header Buffer Address [63:1] | DD |
732 * +-----------------------------------------------------+
735 * 82598 Advanced Receive Descriptor (Write-Back) Format
737 * 63 48 47 32 31 30 21 20 16 15 4 3 0
738 * +------------------------------------------------------+
739 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
740 * | Packet | IP | | | | Type | Type |
741 * | Checksum | Ident | | | | | |
742 * +------------------------------------------------------+
743 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
744 * +------------------------------------------------------+
745 * 63 48 47 32 31 20 19 0
747 * 82599+ Advanced Receive Descriptor (Read) Format
749 * +-----------------------------------------------------+
750 * 0 | Packet Buffer Address [63:1] |A0/NSE|
751 * +----------------------------------------------+------+
752 * 8 | Header Buffer Address [63:1] | DD |
753 * +-----------------------------------------------------+
756 * 82599+ Advanced Receive Descriptor (Write-Back) Format
758 * 63 48 47 32 31 30 21 20 17 16 4 3 0
759 * +------------------------------------------------------+
760 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
761 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
762 * |/ Flow Dir Flt ID | | | | | |
763 * +------------------------------------------------------+
764 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
765 * +------------------------------------------------------+
766 * 63 48 47 32 31 20 19 0
769 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
770 rx_ring
= adapter
->rx_ring
[n
];
771 pr_info("------------------------------------\n");
772 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
773 pr_info("------------------------------------\n");
775 "R [desc] [ PktBuf A0] ",
776 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
777 "<-- Adv Rx Read format\n");
779 "RWB[desc] [PcsmIpSHl PtRs] ",
780 "[vl er S cks ln] ---------------- [bi->skb ] ",
781 "<-- Adv Rx Write-Back format\n");
783 for (i
= 0; i
< rx_ring
->count
; i
++) {
784 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
785 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
786 u0
= (struct my_u0
*)rx_desc
;
787 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
788 if (staterr
& IXGBE_RXD_STAT_DD
) {
789 /* Descriptor Done */
790 pr_info("RWB[0x%03X] %016llX "
791 "%016llX ---------------- %p", i
,
794 rx_buffer_info
->skb
);
796 pr_info("R [0x%03X] %016llX "
797 "%016llX %016llX %p", i
,
800 (u64
)rx_buffer_info
->dma
,
801 rx_buffer_info
->skb
);
803 if (netif_msg_pktdata(adapter
) &&
804 rx_buffer_info
->dma
) {
805 print_hex_dump(KERN_INFO
, "",
806 DUMP_PREFIX_ADDRESS
, 16, 1,
807 page_address(rx_buffer_info
->page
) +
808 rx_buffer_info
->page_offset
,
809 ixgbe_rx_bufsz(rx_ring
), true);
813 if (i
== rx_ring
->next_to_use
)
815 else if (i
== rx_ring
->next_to_clean
)
824 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
828 /* Let firmware take over control of h/w */
829 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
830 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
831 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
834 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
838 /* Let firmware know the driver has taken over */
839 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
840 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
841 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
845 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
846 * @adapter: pointer to adapter struct
847 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
848 * @queue: queue to map the corresponding interrupt to
849 * @msix_vector: the vector to map to the corresponding queue
852 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
853 u8 queue
, u8 msix_vector
)
856 struct ixgbe_hw
*hw
= &adapter
->hw
;
857 switch (hw
->mac
.type
) {
858 case ixgbe_mac_82598EB
:
859 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
862 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
863 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
864 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
865 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
866 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
868 case ixgbe_mac_82599EB
:
871 case ixgbe_mac_X550EM_x
:
872 if (direction
== -1) {
874 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
875 index
= ((queue
& 1) * 8);
876 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
877 ivar
&= ~(0xFF << index
);
878 ivar
|= (msix_vector
<< index
);
879 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
882 /* tx or rx causes */
883 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
884 index
= ((16 * (queue
& 1)) + (8 * direction
));
885 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
886 ivar
&= ~(0xFF << index
);
887 ivar
|= (msix_vector
<< index
);
888 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
896 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
901 switch (adapter
->hw
.mac
.type
) {
902 case ixgbe_mac_82598EB
:
903 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
904 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
906 case ixgbe_mac_82599EB
:
909 case ixgbe_mac_X550EM_x
:
910 mask
= (qmask
& 0xFFFFFFFF);
911 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
912 mask
= (qmask
>> 32);
913 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
920 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
921 struct ixgbe_tx_buffer
*tx_buffer
)
923 if (tx_buffer
->skb
) {
924 dev_kfree_skb_any(tx_buffer
->skb
);
925 if (dma_unmap_len(tx_buffer
, len
))
926 dma_unmap_single(ring
->dev
,
927 dma_unmap_addr(tx_buffer
, dma
),
928 dma_unmap_len(tx_buffer
, len
),
930 } else if (dma_unmap_len(tx_buffer
, len
)) {
931 dma_unmap_page(ring
->dev
,
932 dma_unmap_addr(tx_buffer
, dma
),
933 dma_unmap_len(tx_buffer
, len
),
936 tx_buffer
->next_to_watch
= NULL
;
937 tx_buffer
->skb
= NULL
;
938 dma_unmap_len_set(tx_buffer
, len
, 0);
939 /* tx_buffer must be completely set up in the transmit path */
942 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
944 struct ixgbe_hw
*hw
= &adapter
->hw
;
945 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
949 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
950 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
953 switch (hw
->mac
.type
) {
954 case ixgbe_mac_82598EB
:
955 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
958 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
960 hwstats
->lxoffrxc
+= data
;
962 /* refill credits (no tx hang) if we received xoff */
966 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
967 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
968 &adapter
->tx_ring
[i
]->state
);
971 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
973 struct ixgbe_hw
*hw
= &adapter
->hw
;
974 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
978 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
980 if (adapter
->ixgbe_ieee_pfc
)
981 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
983 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
984 ixgbe_update_xoff_rx_lfc(adapter
);
988 /* update stats for each tc, only valid with PFC enabled */
989 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
992 switch (hw
->mac
.type
) {
993 case ixgbe_mac_82598EB
:
994 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
997 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
999 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
1000 /* Get the TC for given UP */
1001 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
1002 xoff
[tc
] += pxoffrxc
;
1005 /* disarm tx queues that have received xoff frames */
1006 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1007 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
1009 tc
= tx_ring
->dcb_tc
;
1011 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1015 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
1017 return ring
->stats
.packets
;
1020 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
1022 struct ixgbe_adapter
*adapter
;
1023 struct ixgbe_hw
*hw
;
1026 if (ring
->l2_accel_priv
)
1027 adapter
= ring
->l2_accel_priv
->real_adapter
;
1029 adapter
= netdev_priv(ring
->netdev
);
1032 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
1033 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
1036 return (head
< tail
) ?
1037 tail
- head
: (tail
+ ring
->count
- head
);
1042 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
1044 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
1045 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1046 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
1048 clear_check_for_tx_hang(tx_ring
);
1051 * Check for a hung queue, but be thorough. This verifies
1052 * that a transmit has been completed since the previous
1053 * check AND there is at least one packet pending. The
1054 * ARMED bit is set to indicate a potential hang. The
1055 * bit is cleared if a pause frame is received to remove
1056 * false hang detection due to PFC or 802.3x frames. By
1057 * requiring this to fail twice we avoid races with
1058 * pfc clearing the ARMED bit and conditions where we
1059 * run the check_tx_hang logic with a transmit completion
1060 * pending but without time to complete it yet.
1062 if (tx_done_old
== tx_done
&& tx_pending
)
1063 /* make sure it is true for two checks in a row */
1064 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1066 /* update completed stats and continue */
1067 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1068 /* reset the countdown */
1069 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1075 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1076 * @adapter: driver private struct
1078 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1081 /* Do the reset outside of interrupt context */
1082 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1083 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
1084 e_warn(drv
, "initiating reset due to tx timeout\n");
1085 ixgbe_service_event_schedule(adapter
);
1090 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1091 * @q_vector: structure containing interrupt and ring information
1092 * @tx_ring: tx ring to clean
1094 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1095 struct ixgbe_ring
*tx_ring
, int napi_budget
)
1097 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1098 struct ixgbe_tx_buffer
*tx_buffer
;
1099 union ixgbe_adv_tx_desc
*tx_desc
;
1100 unsigned int total_bytes
= 0, total_packets
= 0;
1101 unsigned int budget
= q_vector
->tx
.work_limit
;
1102 unsigned int i
= tx_ring
->next_to_clean
;
1104 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1107 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1108 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1109 i
-= tx_ring
->count
;
1112 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1114 /* if next_to_watch is not set then there is no work pending */
1118 /* prevent any other reads prior to eop_desc */
1119 read_barrier_depends();
1121 /* if DD is not set pending work has not been completed */
1122 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1125 /* clear next_to_watch to prevent false hangs */
1126 tx_buffer
->next_to_watch
= NULL
;
1128 /* update the statistics for this packet */
1129 total_bytes
+= tx_buffer
->bytecount
;
1130 total_packets
+= tx_buffer
->gso_segs
;
1133 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
1135 /* unmap skb header data */
1136 dma_unmap_single(tx_ring
->dev
,
1137 dma_unmap_addr(tx_buffer
, dma
),
1138 dma_unmap_len(tx_buffer
, len
),
1141 /* clear tx_buffer data */
1142 tx_buffer
->skb
= NULL
;
1143 dma_unmap_len_set(tx_buffer
, len
, 0);
1145 /* unmap remaining buffers */
1146 while (tx_desc
!= eop_desc
) {
1151 i
-= tx_ring
->count
;
1152 tx_buffer
= tx_ring
->tx_buffer_info
;
1153 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1156 /* unmap any remaining paged data */
1157 if (dma_unmap_len(tx_buffer
, len
)) {
1158 dma_unmap_page(tx_ring
->dev
,
1159 dma_unmap_addr(tx_buffer
, dma
),
1160 dma_unmap_len(tx_buffer
, len
),
1162 dma_unmap_len_set(tx_buffer
, len
, 0);
1166 /* move us one more past the eop_desc for start of next pkt */
1171 i
-= tx_ring
->count
;
1172 tx_buffer
= tx_ring
->tx_buffer_info
;
1173 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1176 /* issue prefetch for next Tx descriptor */
1179 /* update budget accounting */
1181 } while (likely(budget
));
1183 i
+= tx_ring
->count
;
1184 tx_ring
->next_to_clean
= i
;
1185 u64_stats_update_begin(&tx_ring
->syncp
);
1186 tx_ring
->stats
.bytes
+= total_bytes
;
1187 tx_ring
->stats
.packets
+= total_packets
;
1188 u64_stats_update_end(&tx_ring
->syncp
);
1189 q_vector
->tx
.total_bytes
+= total_bytes
;
1190 q_vector
->tx
.total_packets
+= total_packets
;
1192 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1193 /* schedule immediate reset if we believe we hung */
1194 struct ixgbe_hw
*hw
= &adapter
->hw
;
1195 e_err(drv
, "Detected Tx Unit Hang\n"
1197 " TDH, TDT <%x>, <%x>\n"
1198 " next_to_use <%x>\n"
1199 " next_to_clean <%x>\n"
1200 "tx_buffer_info[next_to_clean]\n"
1201 " time_stamp <%lx>\n"
1203 tx_ring
->queue_index
,
1204 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1205 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1206 tx_ring
->next_to_use
, i
,
1207 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1209 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1212 "tx hang %d detected on queue %d, resetting adapter\n",
1213 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1215 /* schedule immediate reset if we believe we hung */
1216 ixgbe_tx_timeout_reset(adapter
);
1218 /* the adapter is about to reset, no point in enabling stuff */
1222 netdev_tx_completed_queue(txring_txq(tx_ring
),
1223 total_packets
, total_bytes
);
1225 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1226 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1227 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1228 /* Make sure that anybody stopping the queue after this
1229 * sees the new next_to_clean.
1232 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1233 tx_ring
->queue_index
)
1234 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1235 netif_wake_subqueue(tx_ring
->netdev
,
1236 tx_ring
->queue_index
);
1237 ++tx_ring
->tx_stats
.restart_queue
;
1244 #ifdef CONFIG_IXGBE_DCA
1245 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1246 struct ixgbe_ring
*tx_ring
,
1249 struct ixgbe_hw
*hw
= &adapter
->hw
;
1253 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1254 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1256 switch (hw
->mac
.type
) {
1257 case ixgbe_mac_82598EB
:
1258 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1260 case ixgbe_mac_82599EB
:
1261 case ixgbe_mac_X540
:
1262 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1263 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1266 /* for unknown hardware do not write register */
1271 * We can enable relaxed ordering for reads, but not writes when
1272 * DCA is enabled. This is due to a known issue in some chipsets
1273 * which will cause the DCA tag to be cleared.
1275 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1276 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1277 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1279 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1282 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1283 struct ixgbe_ring
*rx_ring
,
1286 struct ixgbe_hw
*hw
= &adapter
->hw
;
1288 u8 reg_idx
= rx_ring
->reg_idx
;
1290 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1291 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1293 switch (hw
->mac
.type
) {
1294 case ixgbe_mac_82599EB
:
1295 case ixgbe_mac_X540
:
1296 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1303 * We can enable relaxed ordering for reads, but not writes when
1304 * DCA is enabled. This is due to a known issue in some chipsets
1305 * which will cause the DCA tag to be cleared.
1307 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1308 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
1309 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1311 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1314 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1316 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1317 struct ixgbe_ring
*ring
;
1318 int cpu
= get_cpu();
1320 if (q_vector
->cpu
== cpu
)
1323 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1324 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1326 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1327 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1329 q_vector
->cpu
= cpu
;
1334 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1338 /* always use CB2 mode, difference is masked in the CB driver */
1339 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1340 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1341 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1343 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1344 IXGBE_DCA_CTRL_DCA_DISABLE
);
1346 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1347 adapter
->q_vector
[i
]->cpu
= -1;
1348 ixgbe_update_dca(adapter
->q_vector
[i
]);
1352 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1354 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1355 unsigned long event
= *(unsigned long *)data
;
1357 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1361 case DCA_PROVIDER_ADD
:
1362 /* if we're already enabled, don't do it again */
1363 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1365 if (dca_add_requester(dev
) == 0) {
1366 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1367 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1368 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1371 /* Fall Through since DCA is disabled. */
1372 case DCA_PROVIDER_REMOVE
:
1373 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1374 dca_remove_requester(dev
);
1375 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1376 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1377 IXGBE_DCA_CTRL_DCA_DISABLE
);
1385 #endif /* CONFIG_IXGBE_DCA */
1387 #define IXGBE_RSS_L4_TYPES_MASK \
1388 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1389 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1390 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1391 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1393 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1394 union ixgbe_adv_rx_desc
*rx_desc
,
1395 struct sk_buff
*skb
)
1399 if (!(ring
->netdev
->features
& NETIF_F_RXHASH
))
1402 rss_type
= le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
) &
1403 IXGBE_RXDADV_RSSTYPE_MASK
;
1408 skb_set_hash(skb
, le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1409 (IXGBE_RSS_L4_TYPES_MASK
& (1ul << rss_type
)) ?
1410 PKT_HASH_TYPE_L4
: PKT_HASH_TYPE_L3
);
1415 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1416 * @ring: structure containing ring specific data
1417 * @rx_desc: advanced rx descriptor
1419 * Returns : true if it is FCoE pkt
1421 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1422 union ixgbe_adv_rx_desc
*rx_desc
)
1424 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1426 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1427 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1428 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1429 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1432 #endif /* IXGBE_FCOE */
1434 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1435 * @ring: structure containing ring specific data
1436 * @rx_desc: current Rx descriptor being processed
1437 * @skb: skb currently being received and modified
1439 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1440 union ixgbe_adv_rx_desc
*rx_desc
,
1441 struct sk_buff
*skb
)
1443 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1444 __le16 hdr_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1445 bool encap_pkt
= false;
1447 skb_checksum_none_assert(skb
);
1449 /* Rx csum disabled */
1450 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1453 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN
)) &&
1454 (hdr_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL
>> 16))) {
1456 skb
->encapsulation
= 1;
1459 /* if IP and error */
1460 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1461 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1462 ring
->rx_stats
.csum_err
++;
1466 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1469 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1471 * 82599 errata, UDP frames with a 0 checksum can be marked as
1474 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1475 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1478 ring
->rx_stats
.csum_err
++;
1482 /* It must be a TCP or UDP packet with a valid checksum */
1483 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1485 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_OUTERIPCS
))
1488 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_OUTERIPER
)) {
1489 skb
->ip_summed
= CHECKSUM_NONE
;
1492 /* If we checked the outer header let the stack know */
1493 skb
->csum_level
= 1;
1497 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1498 struct ixgbe_rx_buffer
*bi
)
1500 struct page
*page
= bi
->page
;
1503 /* since we are recycling buffers we should seldom need to alloc */
1507 /* alloc new page for storage */
1508 page
= dev_alloc_pages(ixgbe_rx_pg_order(rx_ring
));
1509 if (unlikely(!page
)) {
1510 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1514 /* map page for use */
1515 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1516 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1519 * if mapping failed free memory back to system since
1520 * there isn't much point in holding memory we can't use
1522 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1523 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1525 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1531 bi
->page_offset
= 0;
1537 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1538 * @rx_ring: ring to place buffers on
1539 * @cleaned_count: number of buffers to replace
1541 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1543 union ixgbe_adv_rx_desc
*rx_desc
;
1544 struct ixgbe_rx_buffer
*bi
;
1545 u16 i
= rx_ring
->next_to_use
;
1551 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1552 bi
= &rx_ring
->rx_buffer_info
[i
];
1553 i
-= rx_ring
->count
;
1556 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1560 * Refresh the desc even if buffer_addrs didn't change
1561 * because each write-back erases this info.
1563 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1569 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1570 bi
= rx_ring
->rx_buffer_info
;
1571 i
-= rx_ring
->count
;
1574 /* clear the status bits for the next_to_use descriptor */
1575 rx_desc
->wb
.upper
.status_error
= 0;
1578 } while (cleaned_count
);
1580 i
+= rx_ring
->count
;
1582 if (rx_ring
->next_to_use
!= i
) {
1583 rx_ring
->next_to_use
= i
;
1585 /* update next to alloc since we have filled the ring */
1586 rx_ring
->next_to_alloc
= i
;
1588 /* Force memory writes to complete before letting h/w
1589 * know there are new descriptors to fetch. (Only
1590 * applicable for weak-ordered memory model archs,
1594 writel(i
, rx_ring
->tail
);
1598 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1599 struct sk_buff
*skb
)
1601 u16 hdr_len
= skb_headlen(skb
);
1603 /* set gso_size to avoid messing up TCP MSS */
1604 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1605 IXGBE_CB(skb
)->append_cnt
);
1606 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1609 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1610 struct sk_buff
*skb
)
1612 /* if append_cnt is 0 then frame is not RSC */
1613 if (!IXGBE_CB(skb
)->append_cnt
)
1616 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1617 rx_ring
->rx_stats
.rsc_flush
++;
1619 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1621 /* gso_size is computed using append_cnt so always clear it last */
1622 IXGBE_CB(skb
)->append_cnt
= 0;
1626 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1627 * @rx_ring: rx descriptor ring packet is being transacted on
1628 * @rx_desc: pointer to the EOP Rx descriptor
1629 * @skb: pointer to current skb being populated
1631 * This function checks the ring, descriptor, and packet information in
1632 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1633 * other fields within the skb.
1635 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1636 union ixgbe_adv_rx_desc
*rx_desc
,
1637 struct sk_buff
*skb
)
1639 struct net_device
*dev
= rx_ring
->netdev
;
1640 u32 flags
= rx_ring
->q_vector
->adapter
->flags
;
1642 ixgbe_update_rsc_stats(rx_ring
, skb
);
1644 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1646 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1648 if (unlikely(flags
& IXGBE_FLAG_RX_HWTSTAMP_ENABLED
))
1649 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1651 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1652 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1653 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1654 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1657 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1659 skb
->protocol
= eth_type_trans(skb
, dev
);
1662 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1663 struct sk_buff
*skb
)
1665 skb_mark_napi_id(skb
, &q_vector
->napi
);
1666 if (ixgbe_qv_busy_polling(q_vector
))
1667 netif_receive_skb(skb
);
1669 napi_gro_receive(&q_vector
->napi
, skb
);
1673 * ixgbe_is_non_eop - process handling of non-EOP buffers
1674 * @rx_ring: Rx ring being processed
1675 * @rx_desc: Rx descriptor for current buffer
1676 * @skb: Current socket buffer containing buffer in progress
1678 * This function updates next to clean. If the buffer is an EOP buffer
1679 * this function exits returning false, otherwise it will place the
1680 * sk_buff in the next buffer to be chained and return true indicating
1681 * that this is in fact a non-EOP buffer.
1683 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1684 union ixgbe_adv_rx_desc
*rx_desc
,
1685 struct sk_buff
*skb
)
1687 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1689 /* fetch, update, and store next to clean */
1690 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1691 rx_ring
->next_to_clean
= ntc
;
1693 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1695 /* update RSC append count if present */
1696 if (ring_is_rsc_enabled(rx_ring
)) {
1697 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1698 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1700 if (unlikely(rsc_enabled
)) {
1701 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1703 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1704 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1706 /* update ntc based on RSC value */
1707 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1708 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1709 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1713 /* if we are the last buffer then there is nothing else to do */
1714 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1717 /* place skb in next buffer to be received */
1718 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1719 rx_ring
->rx_stats
.non_eop_descs
++;
1725 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1726 * @rx_ring: rx descriptor ring packet is being transacted on
1727 * @skb: pointer to current skb being adjusted
1729 * This function is an ixgbe specific version of __pskb_pull_tail. The
1730 * main difference between this version and the original function is that
1731 * this function can make several assumptions about the state of things
1732 * that allow for significant optimizations versus the standard function.
1733 * As a result we can do things like drop a frag and maintain an accurate
1734 * truesize for the skb.
1736 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1737 struct sk_buff
*skb
)
1739 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1741 unsigned int pull_len
;
1744 * it is valid to use page_address instead of kmap since we are
1745 * working with pages allocated out of the lomem pool per
1746 * alloc_page(GFP_ATOMIC)
1748 va
= skb_frag_address(frag
);
1751 * we need the header to contain the greater of either ETH_HLEN or
1752 * 60 bytes if the skb->len is less than 60 for skb_pad.
1754 pull_len
= eth_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1756 /* align pull length to size of long to optimize memcpy performance */
1757 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1759 /* update all of the pointers */
1760 skb_frag_size_sub(frag
, pull_len
);
1761 frag
->page_offset
+= pull_len
;
1762 skb
->data_len
-= pull_len
;
1763 skb
->tail
+= pull_len
;
1767 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1768 * @rx_ring: rx descriptor ring packet is being transacted on
1769 * @skb: pointer to current skb being updated
1771 * This function provides a basic DMA sync up for the first fragment of an
1772 * skb. The reason for doing this is that the first fragment cannot be
1773 * unmapped until we have reached the end of packet descriptor for a buffer
1776 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1777 struct sk_buff
*skb
)
1779 /* if the page was released unmap it, else just sync our portion */
1780 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1781 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1782 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1783 IXGBE_CB(skb
)->page_released
= false;
1785 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1787 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1790 ixgbe_rx_bufsz(rx_ring
),
1793 IXGBE_CB(skb
)->dma
= 0;
1797 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1798 * @rx_ring: rx descriptor ring packet is being transacted on
1799 * @rx_desc: pointer to the EOP Rx descriptor
1800 * @skb: pointer to current skb being fixed
1802 * Check for corrupted packet headers caused by senders on the local L2
1803 * embedded NIC switch not setting up their Tx Descriptors right. These
1804 * should be very rare.
1806 * Also address the case where we are pulling data in on pages only
1807 * and as such no data is present in the skb header.
1809 * In addition if skb is not at least 60 bytes we need to pad it so that
1810 * it is large enough to qualify as a valid Ethernet frame.
1812 * Returns true if an error was encountered and skb was freed.
1814 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1815 union ixgbe_adv_rx_desc
*rx_desc
,
1816 struct sk_buff
*skb
)
1818 struct net_device
*netdev
= rx_ring
->netdev
;
1820 /* verify that the packet does not have any known errors */
1821 if (unlikely(ixgbe_test_staterr(rx_desc
,
1822 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1823 !(netdev
->features
& NETIF_F_RXALL
))) {
1824 dev_kfree_skb_any(skb
);
1828 /* place header in linear portion of buffer */
1829 if (skb_is_nonlinear(skb
))
1830 ixgbe_pull_tail(rx_ring
, skb
);
1833 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1834 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1838 /* if eth_skb_pad returns an error the skb was freed */
1839 if (eth_skb_pad(skb
))
1846 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1847 * @rx_ring: rx descriptor ring to store buffers on
1848 * @old_buff: donor buffer to have page reused
1850 * Synchronizes page for reuse by the adapter
1852 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1853 struct ixgbe_rx_buffer
*old_buff
)
1855 struct ixgbe_rx_buffer
*new_buff
;
1856 u16 nta
= rx_ring
->next_to_alloc
;
1858 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1860 /* update, and store next to alloc */
1862 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1864 /* transfer page from old buffer to new buffer */
1865 *new_buff
= *old_buff
;
1867 /* sync the buffer for use by the device */
1868 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1869 new_buff
->page_offset
,
1870 ixgbe_rx_bufsz(rx_ring
),
1874 static inline bool ixgbe_page_is_reserved(struct page
*page
)
1876 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
1880 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1881 * @rx_ring: rx descriptor ring to transact packets on
1882 * @rx_buffer: buffer containing page to add
1883 * @rx_desc: descriptor containing length of buffer written by hardware
1884 * @skb: sk_buff to place the data into
1886 * This function will add the data contained in rx_buffer->page to the skb.
1887 * This is done either through a direct copy if the data in the buffer is
1888 * less than the skb header size, otherwise it will just attach the page as
1889 * a frag to the skb.
1891 * The function will then update the page offset if necessary and return
1892 * true if the buffer can be reused by the adapter.
1894 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1895 struct ixgbe_rx_buffer
*rx_buffer
,
1896 union ixgbe_adv_rx_desc
*rx_desc
,
1897 struct sk_buff
*skb
)
1899 struct page
*page
= rx_buffer
->page
;
1900 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1901 #if (PAGE_SIZE < 8192)
1902 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1904 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1905 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1906 ixgbe_rx_bufsz(rx_ring
);
1909 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1910 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1912 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1914 /* page is not reserved, we can reuse buffer as-is */
1915 if (likely(!ixgbe_page_is_reserved(page
)))
1918 /* this page cannot be reused so discard it */
1919 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1923 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1924 rx_buffer
->page_offset
, size
, truesize
);
1926 /* avoid re-using remote pages */
1927 if (unlikely(ixgbe_page_is_reserved(page
)))
1930 #if (PAGE_SIZE < 8192)
1931 /* if we are only owner of page we can reuse it */
1932 if (unlikely(page_count(page
) != 1))
1935 /* flip page offset to other buffer */
1936 rx_buffer
->page_offset
^= truesize
;
1938 /* move offset up to the next cache line */
1939 rx_buffer
->page_offset
+= truesize
;
1941 if (rx_buffer
->page_offset
> last_offset
)
1945 /* Even if we own the page, we are not allowed to use atomic_set()
1946 * This would break get_page_unless_zero() users.
1953 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
1954 union ixgbe_adv_rx_desc
*rx_desc
)
1956 struct ixgbe_rx_buffer
*rx_buffer
;
1957 struct sk_buff
*skb
;
1960 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
1961 page
= rx_buffer
->page
;
1964 skb
= rx_buffer
->skb
;
1967 void *page_addr
= page_address(page
) +
1968 rx_buffer
->page_offset
;
1970 /* prefetch first cache line of first page */
1971 prefetch(page_addr
);
1972 #if L1_CACHE_BYTES < 128
1973 prefetch(page_addr
+ L1_CACHE_BYTES
);
1976 /* allocate a skb to store the frags */
1977 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
,
1979 if (unlikely(!skb
)) {
1980 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1985 * we will be copying header into skb->data in
1986 * pskb_may_pull so it is in our interest to prefetch
1987 * it now to avoid a possible cache miss
1989 prefetchw(skb
->data
);
1992 * Delay unmapping of the first packet. It carries the
1993 * header information, HW may still access the header
1994 * after the writeback. Only unmap it when EOP is
1997 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
2000 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2002 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2003 ixgbe_dma_sync_frag(rx_ring
, skb
);
2006 /* we are reusing so sync this buffer for CPU use */
2007 dma_sync_single_range_for_cpu(rx_ring
->dev
,
2009 rx_buffer
->page_offset
,
2010 ixgbe_rx_bufsz(rx_ring
),
2013 rx_buffer
->skb
= NULL
;
2016 /* pull page into skb */
2017 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
2018 /* hand second half of page back to the ring */
2019 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
2020 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
2021 /* the page has been released from the ring */
2022 IXGBE_CB(skb
)->page_released
= true;
2024 /* we are not reusing the buffer so unmap it */
2025 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
2026 ixgbe_rx_pg_size(rx_ring
),
2030 /* clear contents of buffer_info */
2031 rx_buffer
->page
= NULL
;
2037 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2038 * @q_vector: structure containing interrupt and ring information
2039 * @rx_ring: rx descriptor ring to transact packets on
2040 * @budget: Total limit on number of packets to process
2042 * This function provides a "bounce buffer" approach to Rx interrupt
2043 * processing. The advantage to this is that on systems that have
2044 * expensive overhead for IOMMU access this provides a means of avoiding
2045 * it by maintaining the mapping of the page to the syste.
2047 * Returns amount of work completed
2049 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2050 struct ixgbe_ring
*rx_ring
,
2053 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
2055 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2057 unsigned int mss
= 0;
2058 #endif /* IXGBE_FCOE */
2059 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2061 while (likely(total_rx_packets
< budget
)) {
2062 union ixgbe_adv_rx_desc
*rx_desc
;
2063 struct sk_buff
*skb
;
2065 /* return some buffers to hardware, one at a time is too slow */
2066 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2067 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2071 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2073 if (!rx_desc
->wb
.upper
.status_error
)
2076 /* This memory barrier is needed to keep us from reading
2077 * any other fields out of the rx_desc until we know the
2078 * descriptor has been written back
2082 /* retrieve a buffer from the ring */
2083 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2085 /* exit if we failed to retrieve a buffer */
2091 /* place incomplete frames back on ring for completion */
2092 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2095 /* verify the packet layout is correct */
2096 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2099 /* probably a little skewed due to removing CRC */
2100 total_rx_bytes
+= skb
->len
;
2102 /* populate checksum, timestamp, VLAN, and protocol */
2103 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2106 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2107 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2108 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2109 /* include DDPed FCoE data */
2110 if (ddp_bytes
> 0) {
2112 mss
= rx_ring
->netdev
->mtu
-
2113 sizeof(struct fcoe_hdr
) -
2114 sizeof(struct fc_frame_header
) -
2115 sizeof(struct fcoe_crc_eof
);
2119 total_rx_bytes
+= ddp_bytes
;
2120 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2124 dev_kfree_skb_any(skb
);
2129 #endif /* IXGBE_FCOE */
2130 ixgbe_rx_skb(q_vector
, skb
);
2132 /* update budget accounting */
2136 u64_stats_update_begin(&rx_ring
->syncp
);
2137 rx_ring
->stats
.packets
+= total_rx_packets
;
2138 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2139 u64_stats_update_end(&rx_ring
->syncp
);
2140 q_vector
->rx
.total_packets
+= total_rx_packets
;
2141 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2143 return total_rx_packets
;
2146 #ifdef CONFIG_NET_RX_BUSY_POLL
2147 /* must be called with local_bh_disable()d */
2148 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2150 struct ixgbe_q_vector
*q_vector
=
2151 container_of(napi
, struct ixgbe_q_vector
, napi
);
2152 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2153 struct ixgbe_ring
*ring
;
2156 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2157 return LL_FLUSH_FAILED
;
2159 if (!ixgbe_qv_lock_poll(q_vector
))
2160 return LL_FLUSH_BUSY
;
2162 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2163 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2164 #ifdef BP_EXTENDED_STATS
2166 ring
->stats
.cleaned
+= found
;
2168 ring
->stats
.misses
++;
2174 ixgbe_qv_unlock_poll(q_vector
);
2178 #endif /* CONFIG_NET_RX_BUSY_POLL */
2181 * ixgbe_configure_msix - Configure MSI-X hardware
2182 * @adapter: board private structure
2184 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2187 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2189 struct ixgbe_q_vector
*q_vector
;
2193 /* Populate MSIX to EITR Select */
2194 if (adapter
->num_vfs
> 32) {
2195 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2196 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2200 * Populate the IVAR table and set the ITR values to the
2201 * corresponding register.
2203 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2204 struct ixgbe_ring
*ring
;
2205 q_vector
= adapter
->q_vector
[v_idx
];
2207 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2208 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2210 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2211 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2213 ixgbe_write_eitr(q_vector
);
2216 switch (adapter
->hw
.mac
.type
) {
2217 case ixgbe_mac_82598EB
:
2218 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2221 case ixgbe_mac_82599EB
:
2222 case ixgbe_mac_X540
:
2223 case ixgbe_mac_X550
:
2224 case ixgbe_mac_X550EM_x
:
2225 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2230 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2232 /* set up to autoclear timer, and the vectors */
2233 mask
= IXGBE_EIMS_ENABLE_MASK
;
2234 mask
&= ~(IXGBE_EIMS_OTHER
|
2235 IXGBE_EIMS_MAILBOX
|
2238 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2241 enum latency_range
{
2245 latency_invalid
= 255
2249 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2250 * @q_vector: structure containing interrupt and ring information
2251 * @ring_container: structure containing ring performance data
2253 * Stores a new ITR value based on packets and byte
2254 * counts during the last interrupt. The advantage of per interrupt
2255 * computation is faster updates and more accurate ITR for the current
2256 * traffic pattern. Constants in this function were computed
2257 * based on theoretical maximum wire speed and thresholds were set based
2258 * on testing data as well as attempting to minimize response time
2259 * while increasing bulk throughput.
2260 * this functionality is controlled by the InterruptThrottleRate module
2261 * parameter (see ixgbe_param.c)
2263 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2264 struct ixgbe_ring_container
*ring_container
)
2266 int bytes
= ring_container
->total_bytes
;
2267 int packets
= ring_container
->total_packets
;
2270 u8 itr_setting
= ring_container
->itr
;
2275 /* simple throttlerate management
2276 * 0-10MB/s lowest (100000 ints/s)
2277 * 10-20MB/s low (20000 ints/s)
2278 * 20-1249MB/s bulk (12000 ints/s)
2280 /* what was last interrupt timeslice? */
2281 timepassed_us
= q_vector
->itr
>> 2;
2282 if (timepassed_us
== 0)
2285 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2287 switch (itr_setting
) {
2288 case lowest_latency
:
2289 if (bytes_perint
> 10)
2290 itr_setting
= low_latency
;
2293 if (bytes_perint
> 20)
2294 itr_setting
= bulk_latency
;
2295 else if (bytes_perint
<= 10)
2296 itr_setting
= lowest_latency
;
2299 if (bytes_perint
<= 20)
2300 itr_setting
= low_latency
;
2304 /* clear work counters since we have the values we need */
2305 ring_container
->total_bytes
= 0;
2306 ring_container
->total_packets
= 0;
2308 /* write updated itr to ring container */
2309 ring_container
->itr
= itr_setting
;
2313 * ixgbe_write_eitr - write EITR register in hardware specific way
2314 * @q_vector: structure containing interrupt and ring information
2316 * This function is made to be called by ethtool and by the driver
2317 * when it needs to update EITR registers at runtime. Hardware
2318 * specific quirks/differences are taken care of here.
2320 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2322 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2323 struct ixgbe_hw
*hw
= &adapter
->hw
;
2324 int v_idx
= q_vector
->v_idx
;
2325 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2327 switch (adapter
->hw
.mac
.type
) {
2328 case ixgbe_mac_82598EB
:
2329 /* must write high and low 16 bits to reset counter */
2330 itr_reg
|= (itr_reg
<< 16);
2332 case ixgbe_mac_82599EB
:
2333 case ixgbe_mac_X540
:
2334 case ixgbe_mac_X550
:
2335 case ixgbe_mac_X550EM_x
:
2337 * set the WDIS bit to not clear the timer bits and cause an
2338 * immediate assertion of the interrupt
2340 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2345 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2348 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2350 u32 new_itr
= q_vector
->itr
;
2353 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2354 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2356 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2358 switch (current_itr
) {
2359 /* counts and packets in update_itr are dependent on these numbers */
2360 case lowest_latency
:
2361 new_itr
= IXGBE_100K_ITR
;
2364 new_itr
= IXGBE_20K_ITR
;
2367 new_itr
= IXGBE_12K_ITR
;
2373 if (new_itr
!= q_vector
->itr
) {
2374 /* do an exponential smoothing */
2375 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2376 ((9 * new_itr
) + q_vector
->itr
);
2378 /* save the algorithm value here */
2379 q_vector
->itr
= new_itr
;
2381 ixgbe_write_eitr(q_vector
);
2386 * ixgbe_check_overtemp_subtask - check for over temperature
2387 * @adapter: pointer to adapter
2389 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2391 struct ixgbe_hw
*hw
= &adapter
->hw
;
2392 u32 eicr
= adapter
->interrupt_event
;
2394 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2397 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2398 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2401 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2403 switch (hw
->device_id
) {
2404 case IXGBE_DEV_ID_82599_T3_LOM
:
2406 * Since the warning interrupt is for both ports
2407 * we don't have to check if:
2408 * - This interrupt wasn't for our port.
2409 * - We may have missed the interrupt so always have to
2410 * check if we got a LSC
2412 if (!(eicr
& IXGBE_EICR_GPI_SDP0_8259X
) &&
2413 !(eicr
& IXGBE_EICR_LSC
))
2416 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2418 bool link_up
= false;
2420 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2426 /* Check if this is not due to overtemp */
2427 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2432 if (adapter
->hw
.mac
.type
>= ixgbe_mac_X540
)
2434 if (!(eicr
& IXGBE_EICR_GPI_SDP0(hw
)))
2438 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2440 adapter
->interrupt_event
= 0;
2443 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2445 struct ixgbe_hw
*hw
= &adapter
->hw
;
2447 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2448 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2449 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2450 /* write to clear the interrupt */
2451 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2455 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2457 struct ixgbe_hw
*hw
= &adapter
->hw
;
2459 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2462 switch (adapter
->hw
.mac
.type
) {
2463 case ixgbe_mac_82599EB
:
2465 * Need to check link state so complete overtemp check
2468 if (((eicr
& IXGBE_EICR_GPI_SDP0(hw
)) ||
2469 (eicr
& IXGBE_EICR_LSC
)) &&
2470 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2471 adapter
->interrupt_event
= eicr
;
2472 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2473 ixgbe_service_event_schedule(adapter
);
2477 case ixgbe_mac_X540
:
2478 if (!(eicr
& IXGBE_EICR_TS
))
2485 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2488 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2490 switch (hw
->mac
.type
) {
2491 case ixgbe_mac_82598EB
:
2492 if (hw
->phy
.type
== ixgbe_phy_nl
)
2495 case ixgbe_mac_82599EB
:
2496 case ixgbe_mac_X550EM_x
:
2497 switch (hw
->mac
.ops
.get_media_type(hw
)) {
2498 case ixgbe_media_type_fiber
:
2499 case ixgbe_media_type_fiber_qsfp
:
2509 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2511 struct ixgbe_hw
*hw
= &adapter
->hw
;
2512 u32 eicr_mask
= IXGBE_EICR_GPI_SDP2(hw
);
2514 if (!ixgbe_is_sfp(hw
))
2517 /* Later MAC's use different SDP */
2518 if (hw
->mac
.type
>= ixgbe_mac_X540
)
2519 eicr_mask
= IXGBE_EICR_GPI_SDP0_X540
;
2521 if (eicr
& eicr_mask
) {
2522 /* Clear the interrupt */
2523 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr_mask
);
2524 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2525 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2526 adapter
->sfp_poll_time
= 0;
2527 ixgbe_service_event_schedule(adapter
);
2531 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
&&
2532 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2533 /* Clear the interrupt */
2534 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2535 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2536 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2537 ixgbe_service_event_schedule(adapter
);
2542 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2544 struct ixgbe_hw
*hw
= &adapter
->hw
;
2547 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2548 adapter
->link_check_timeout
= jiffies
;
2549 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2550 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2551 IXGBE_WRITE_FLUSH(hw
);
2552 ixgbe_service_event_schedule(adapter
);
2556 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2560 struct ixgbe_hw
*hw
= &adapter
->hw
;
2562 switch (hw
->mac
.type
) {
2563 case ixgbe_mac_82598EB
:
2564 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2565 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2567 case ixgbe_mac_82599EB
:
2568 case ixgbe_mac_X540
:
2569 case ixgbe_mac_X550
:
2570 case ixgbe_mac_X550EM_x
:
2571 mask
= (qmask
& 0xFFFFFFFF);
2573 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2574 mask
= (qmask
>> 32);
2576 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2581 /* skip the flush */
2584 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2588 struct ixgbe_hw
*hw
= &adapter
->hw
;
2590 switch (hw
->mac
.type
) {
2591 case ixgbe_mac_82598EB
:
2592 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2593 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2595 case ixgbe_mac_82599EB
:
2596 case ixgbe_mac_X540
:
2597 case ixgbe_mac_X550
:
2598 case ixgbe_mac_X550EM_x
:
2599 mask
= (qmask
& 0xFFFFFFFF);
2601 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2602 mask
= (qmask
>> 32);
2604 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2609 /* skip the flush */
2613 * ixgbe_irq_enable - Enable default interrupt generation settings
2614 * @adapter: board private structure
2616 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2619 struct ixgbe_hw
*hw
= &adapter
->hw
;
2620 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2622 /* don't reenable LSC while waiting for link */
2623 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2624 mask
&= ~IXGBE_EIMS_LSC
;
2626 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2627 switch (adapter
->hw
.mac
.type
) {
2628 case ixgbe_mac_82599EB
:
2629 mask
|= IXGBE_EIMS_GPI_SDP0(hw
);
2631 case ixgbe_mac_X540
:
2632 case ixgbe_mac_X550
:
2633 case ixgbe_mac_X550EM_x
:
2634 mask
|= IXGBE_EIMS_TS
;
2639 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2640 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2641 switch (adapter
->hw
.mac
.type
) {
2642 case ixgbe_mac_82599EB
:
2643 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2644 mask
|= IXGBE_EIMS_GPI_SDP2(hw
);
2646 case ixgbe_mac_X540
:
2647 case ixgbe_mac_X550
:
2648 case ixgbe_mac_X550EM_x
:
2649 if (adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_X_SFP
)
2650 mask
|= IXGBE_EIMS_GPI_SDP0(&adapter
->hw
);
2651 if (adapter
->hw
.phy
.type
== ixgbe_phy_x550em_ext_t
)
2652 mask
|= IXGBE_EICR_GPI_SDP0_X540
;
2653 mask
|= IXGBE_EIMS_ECC
;
2654 mask
|= IXGBE_EIMS_MAILBOX
;
2660 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2661 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2662 mask
|= IXGBE_EIMS_FLOW_DIR
;
2664 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2666 ixgbe_irq_enable_queues(adapter
, ~0);
2668 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2671 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2673 struct ixgbe_adapter
*adapter
= data
;
2674 struct ixgbe_hw
*hw
= &adapter
->hw
;
2678 * Workaround for Silicon errata. Use clear-by-write instead
2679 * of clear-by-read. Reading with EICS will return the
2680 * interrupt causes without clearing, which later be done
2681 * with the write to EICR.
2683 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2685 /* The lower 16bits of the EICR register are for the queue interrupts
2686 * which should be masked here in order to not accidentally clear them if
2687 * the bits are high when ixgbe_msix_other is called. There is a race
2688 * condition otherwise which results in possible performance loss
2689 * especially if the ixgbe_msix_other interrupt is triggering
2690 * consistently (as it would when PPS is turned on for the X540 device)
2694 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2696 if (eicr
& IXGBE_EICR_LSC
)
2697 ixgbe_check_lsc(adapter
);
2699 if (eicr
& IXGBE_EICR_MAILBOX
)
2700 ixgbe_msg_task(adapter
);
2702 switch (hw
->mac
.type
) {
2703 case ixgbe_mac_82599EB
:
2704 case ixgbe_mac_X540
:
2705 case ixgbe_mac_X550
:
2706 case ixgbe_mac_X550EM_x
:
2707 if (hw
->phy
.type
== ixgbe_phy_x550em_ext_t
&&
2708 (eicr
& IXGBE_EICR_GPI_SDP0_X540
)) {
2709 adapter
->flags2
|= IXGBE_FLAG2_PHY_INTERRUPT
;
2710 ixgbe_service_event_schedule(adapter
);
2711 IXGBE_WRITE_REG(hw
, IXGBE_EICR
,
2712 IXGBE_EICR_GPI_SDP0_X540
);
2714 if (eicr
& IXGBE_EICR_ECC
) {
2715 e_info(link
, "Received ECC Err, initiating reset\n");
2716 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2717 ixgbe_service_event_schedule(adapter
);
2718 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2720 /* Handle Flow Director Full threshold interrupt */
2721 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2722 int reinit_count
= 0;
2724 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2725 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2726 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2731 /* no more flow director interrupts until after init */
2732 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2733 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2734 ixgbe_service_event_schedule(adapter
);
2737 ixgbe_check_sfp_event(adapter
, eicr
);
2738 ixgbe_check_overtemp_event(adapter
, eicr
);
2744 ixgbe_check_fan_failure(adapter
, eicr
);
2746 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2747 ixgbe_ptp_check_pps_event(adapter
);
2749 /* re-enable the original interrupt state, no lsc, no queues */
2750 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2751 ixgbe_irq_enable(adapter
, false, false);
2756 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2758 struct ixgbe_q_vector
*q_vector
= data
;
2760 /* EIAM disabled interrupts (on this vector) for us */
2762 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2763 napi_schedule_irqoff(&q_vector
->napi
);
2769 * ixgbe_poll - NAPI Rx polling callback
2770 * @napi: structure for representing this polling device
2771 * @budget: how many packets driver is allowed to clean
2773 * This function is used for legacy and MSI, NAPI mode
2775 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2777 struct ixgbe_q_vector
*q_vector
=
2778 container_of(napi
, struct ixgbe_q_vector
, napi
);
2779 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2780 struct ixgbe_ring
*ring
;
2781 int per_ring_budget
, work_done
= 0;
2782 bool clean_complete
= true;
2784 #ifdef CONFIG_IXGBE_DCA
2785 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2786 ixgbe_update_dca(q_vector
);
2789 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2790 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
, budget
);
2792 /* Exit if we are called by netpoll or busy polling is active */
2793 if ((budget
<= 0) || !ixgbe_qv_lock_napi(q_vector
))
2796 /* attempt to distribute budget to each queue fairly, but don't allow
2797 * the budget to go below 1 because we'll exit polling */
2798 if (q_vector
->rx
.count
> 1)
2799 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2801 per_ring_budget
= budget
;
2803 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2804 int cleaned
= ixgbe_clean_rx_irq(q_vector
, ring
,
2807 work_done
+= cleaned
;
2808 clean_complete
&= (cleaned
< per_ring_budget
);
2811 ixgbe_qv_unlock_napi(q_vector
);
2812 /* If all work not completed, return budget and keep polling */
2813 if (!clean_complete
)
2816 /* all work done, exit the polling mode */
2817 napi_complete_done(napi
, work_done
);
2818 if (adapter
->rx_itr_setting
& 1)
2819 ixgbe_set_itr(q_vector
);
2820 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2821 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2827 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2828 * @adapter: board private structure
2830 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2831 * interrupts from the kernel.
2833 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2835 struct net_device
*netdev
= adapter
->netdev
;
2839 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2840 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2841 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2843 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2844 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2845 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2847 } else if (q_vector
->rx
.ring
) {
2848 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2849 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2850 } else if (q_vector
->tx
.ring
) {
2851 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2852 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2854 /* skip this unused q_vector */
2857 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2858 q_vector
->name
, q_vector
);
2860 e_err(probe
, "request_irq failed for MSIX interrupt "
2861 "Error: %d\n", err
);
2862 goto free_queue_irqs
;
2864 /* If Flow Director is enabled, set interrupt affinity */
2865 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2866 /* assign the mask for this irq */
2867 irq_set_affinity_hint(entry
->vector
,
2868 &q_vector
->affinity_mask
);
2872 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2873 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2875 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2876 goto free_queue_irqs
;
2884 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2886 free_irq(adapter
->msix_entries
[vector
].vector
,
2887 adapter
->q_vector
[vector
]);
2889 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2890 pci_disable_msix(adapter
->pdev
);
2891 kfree(adapter
->msix_entries
);
2892 adapter
->msix_entries
= NULL
;
2897 * ixgbe_intr - legacy mode Interrupt Handler
2898 * @irq: interrupt number
2899 * @data: pointer to a network interface device structure
2901 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2903 struct ixgbe_adapter
*adapter
= data
;
2904 struct ixgbe_hw
*hw
= &adapter
->hw
;
2905 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2909 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2910 * before the read of EICR.
2912 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2914 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2915 * therefore no explicit interrupt disable is necessary */
2916 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2919 * shared interrupt alert!
2920 * make sure interrupts are enabled because the read will
2921 * have disabled interrupts due to EIAM
2922 * finish the workaround of silicon errata on 82598. Unmask
2923 * the interrupt that we masked before the EICR read.
2925 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2926 ixgbe_irq_enable(adapter
, true, true);
2927 return IRQ_NONE
; /* Not our interrupt */
2930 if (eicr
& IXGBE_EICR_LSC
)
2931 ixgbe_check_lsc(adapter
);
2933 switch (hw
->mac
.type
) {
2934 case ixgbe_mac_82599EB
:
2935 ixgbe_check_sfp_event(adapter
, eicr
);
2937 case ixgbe_mac_X540
:
2938 case ixgbe_mac_X550
:
2939 case ixgbe_mac_X550EM_x
:
2940 if (eicr
& IXGBE_EICR_ECC
) {
2941 e_info(link
, "Received ECC Err, initiating reset\n");
2942 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2943 ixgbe_service_event_schedule(adapter
);
2944 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2946 ixgbe_check_overtemp_event(adapter
, eicr
);
2952 ixgbe_check_fan_failure(adapter
, eicr
);
2953 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2954 ixgbe_ptp_check_pps_event(adapter
);
2956 /* would disable interrupts here but EIAM disabled it */
2957 napi_schedule_irqoff(&q_vector
->napi
);
2960 * re-enable link(maybe) and non-queue interrupts, no flush.
2961 * ixgbe_poll will re-enable the queue interrupts
2963 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2964 ixgbe_irq_enable(adapter
, false, false);
2970 * ixgbe_request_irq - initialize interrupts
2971 * @adapter: board private structure
2973 * Attempts to configure interrupts using the best available
2974 * capabilities of the hardware and kernel.
2976 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2978 struct net_device
*netdev
= adapter
->netdev
;
2981 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2982 err
= ixgbe_request_msix_irqs(adapter
);
2983 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2984 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2985 netdev
->name
, adapter
);
2987 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2988 netdev
->name
, adapter
);
2991 e_err(probe
, "request_irq failed, Error %d\n", err
);
2996 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
3000 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
3001 free_irq(adapter
->pdev
->irq
, adapter
);
3005 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
3006 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
3007 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
3009 /* free only the irqs that were actually requested */
3010 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
3013 /* clear the affinity_mask in the IRQ descriptor */
3014 irq_set_affinity_hint(entry
->vector
, NULL
);
3016 free_irq(entry
->vector
, q_vector
);
3019 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
3023 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3024 * @adapter: board private structure
3026 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
3028 switch (adapter
->hw
.mac
.type
) {
3029 case ixgbe_mac_82598EB
:
3030 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
3032 case ixgbe_mac_82599EB
:
3033 case ixgbe_mac_X540
:
3034 case ixgbe_mac_X550
:
3035 case ixgbe_mac_X550EM_x
:
3036 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
3037 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
3038 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
3043 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3044 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3047 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
3048 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
3050 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
3052 synchronize_irq(adapter
->pdev
->irq
);
3057 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3060 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
3062 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3064 ixgbe_write_eitr(q_vector
);
3066 ixgbe_set_ivar(adapter
, 0, 0, 0);
3067 ixgbe_set_ivar(adapter
, 1, 0, 0);
3069 e_info(hw
, "Legacy interrupt IVAR setup done\n");
3073 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3074 * @adapter: board private structure
3075 * @ring: structure containing ring specific data
3077 * Configure the Tx descriptor ring after a reset.
3079 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
3080 struct ixgbe_ring
*ring
)
3082 struct ixgbe_hw
*hw
= &adapter
->hw
;
3083 u64 tdba
= ring
->dma
;
3085 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
3086 u8 reg_idx
= ring
->reg_idx
;
3088 /* disable queue to avoid issues while updating state */
3089 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
3090 IXGBE_WRITE_FLUSH(hw
);
3092 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
3093 (tdba
& DMA_BIT_MASK(32)));
3094 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
3095 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3096 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3097 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3098 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3099 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3102 * set WTHRESH to encourage burst writeback, it should not be set
3103 * higher than 1 when:
3104 * - ITR is 0 as it could cause false TX hangs
3105 * - ITR is set to > 100k int/sec and BQL is enabled
3107 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3108 * to or less than the number of on chip descriptors, which is
3111 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3112 txdctl
|= (1 << 16); /* WTHRESH = 1 */
3114 txdctl
|= (8 << 16); /* WTHRESH = 8 */
3117 * Setting PTHRESH to 32 both improves performance
3118 * and avoids a TX hang with DFP enabled
3120 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
3121 32; /* PTHRESH = 32 */
3123 /* reinitialize flowdirector state */
3124 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3125 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3126 ring
->atr_count
= 0;
3127 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3129 ring
->atr_sample_rate
= 0;
3132 /* initialize XPS */
3133 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3134 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3137 netif_set_xps_queue(ring
->netdev
,
3138 &q_vector
->affinity_mask
,
3142 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3145 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3147 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3148 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3149 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3152 /* poll to verify queue is enabled */
3154 usleep_range(1000, 2000);
3155 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3156 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3158 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3161 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3163 struct ixgbe_hw
*hw
= &adapter
->hw
;
3165 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3167 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3170 /* disable the arbiter while setting MTQC */
3171 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3172 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3173 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3175 /* set transmit pool layout */
3176 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3177 mtqc
= IXGBE_MTQC_VT_ENA
;
3179 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3181 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3182 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3183 mtqc
|= IXGBE_MTQC_32VF
;
3185 mtqc
|= IXGBE_MTQC_64VF
;
3188 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3190 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3192 mtqc
= IXGBE_MTQC_64Q_1PB
;
3195 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3197 /* Enable Security TX Buffer IFG for multiple pb */
3199 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3200 sectx
|= IXGBE_SECTX_DCB
;
3201 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3204 /* re-enable the arbiter */
3205 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3206 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3210 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3211 * @adapter: board private structure
3213 * Configure the Tx unit of the MAC after a reset.
3215 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3217 struct ixgbe_hw
*hw
= &adapter
->hw
;
3221 ixgbe_setup_mtqc(adapter
);
3223 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3224 /* DMATXCTL.EN must be before Tx queues are enabled */
3225 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3226 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3227 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3230 /* Setup the HW Tx Head and Tail descriptor pointers */
3231 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3232 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3235 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3236 struct ixgbe_ring
*ring
)
3238 struct ixgbe_hw
*hw
= &adapter
->hw
;
3239 u8 reg_idx
= ring
->reg_idx
;
3240 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3242 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3244 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3247 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3248 struct ixgbe_ring
*ring
)
3250 struct ixgbe_hw
*hw
= &adapter
->hw
;
3251 u8 reg_idx
= ring
->reg_idx
;
3252 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3254 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3256 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3259 #ifdef CONFIG_IXGBE_DCB
3260 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3262 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3266 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3268 if (adapter
->ixgbe_ieee_pfc
)
3269 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3272 * We should set the drop enable bit if:
3275 * Number of Rx queues > 1 and flow control is disabled
3277 * This allows us to avoid head of line blocking for security
3278 * and performance reasons.
3280 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3281 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3282 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3283 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3285 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3286 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3290 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3292 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3293 struct ixgbe_ring
*rx_ring
)
3295 struct ixgbe_hw
*hw
= &adapter
->hw
;
3297 u8 reg_idx
= rx_ring
->reg_idx
;
3299 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3300 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3303 * if VMDq is not active we must program one srrctl register
3304 * per RSS queue since we have enabled RDRXCTL.MVMEN
3309 /* configure header buffer length, needed for RSC */
3310 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3312 /* configure the packet buffer length */
3313 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3315 /* configure descriptor type */
3316 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3318 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3322 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3323 * @adapter: device handle
3325 * - 82598/82599/X540: 128
3326 * - X550(non-SRIOV mode): 512
3327 * - X550(SRIOV mode): 64
3329 u32
ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter
*adapter
)
3331 if (adapter
->hw
.mac
.type
< ixgbe_mac_X550
)
3333 else if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3340 * ixgbe_store_reta - Write the RETA table to HW
3341 * @adapter: device handle
3343 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3345 void ixgbe_store_reta(struct ixgbe_adapter
*adapter
)
3347 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3348 struct ixgbe_hw
*hw
= &adapter
->hw
;
3351 u8
*indir_tbl
= adapter
->rss_indir_tbl
;
3353 /* Fill out the redirection table as follows:
3354 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3356 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3357 * - X550: 8 bit wide entries containing 6 bit RSS index
3359 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3360 indices_multi
= 0x11;
3362 indices_multi
= 0x1;
3364 /* Write redirection table to HW */
3365 for (i
= 0; i
< reta_entries
; i
++) {
3366 reta
|= indices_multi
* indir_tbl
[i
] << (i
& 0x3) * 8;
3369 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3371 IXGBE_WRITE_REG(hw
, IXGBE_ERETA((i
>> 2) - 32),
3379 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3380 * @adapter: device handle
3382 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3384 static void ixgbe_store_vfreta(struct ixgbe_adapter
*adapter
)
3386 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3387 struct ixgbe_hw
*hw
= &adapter
->hw
;
3389 unsigned int pf_pool
= adapter
->num_vfs
;
3391 /* Write redirection table to HW */
3392 for (i
= 0; i
< reta_entries
; i
++) {
3393 vfreta
|= (u32
)adapter
->rss_indir_tbl
[i
] << (i
& 0x3) * 8;
3395 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRETA(i
>> 2, pf_pool
),
3402 static void ixgbe_setup_reta(struct ixgbe_adapter
*adapter
)
3404 struct ixgbe_hw
*hw
= &adapter
->hw
;
3406 u32 reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3407 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3409 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3410 * make full use of any rings they may have. We will use the
3411 * PSRTYPE register to control how many rings we use within the PF.
3413 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3416 /* Fill out hash function seeds */
3417 for (i
= 0; i
< 10; i
++)
3418 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), adapter
->rss_key
[i
]);
3420 /* Fill out redirection table */
3421 memset(adapter
->rss_indir_tbl
, 0, sizeof(adapter
->rss_indir_tbl
));
3423 for (i
= 0, j
= 0; i
< reta_entries
; i
++, j
++) {
3427 adapter
->rss_indir_tbl
[i
] = j
;
3430 ixgbe_store_reta(adapter
);
3433 static void ixgbe_setup_vfreta(struct ixgbe_adapter
*adapter
)
3435 struct ixgbe_hw
*hw
= &adapter
->hw
;
3436 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3437 unsigned int pf_pool
= adapter
->num_vfs
;
3440 /* Fill out hash function seeds */
3441 for (i
= 0; i
< 10; i
++)
3442 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRSSRK(i
, pf_pool
),
3443 adapter
->rss_key
[i
]);
3445 /* Fill out the redirection table */
3446 for (i
= 0, j
= 0; i
< 64; i
++, j
++) {
3450 adapter
->rss_indir_tbl
[i
] = j
;
3453 ixgbe_store_vfreta(adapter
);
3456 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3458 struct ixgbe_hw
*hw
= &adapter
->hw
;
3459 u32 mrqc
= 0, rss_field
= 0, vfmrqc
= 0;
3462 /* Disable indicating checksum in descriptor, enables RSS hash */
3463 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3464 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3465 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3467 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3468 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3469 mrqc
= IXGBE_MRQC_RSSEN
;
3471 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3473 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3475 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3477 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3478 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3479 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3481 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3484 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3486 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3488 mrqc
= IXGBE_MRQC_RSSEN
;
3492 /* Perform hash on these packet types */
3493 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3494 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3495 IXGBE_MRQC_RSS_FIELD_IPV6
|
3496 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3498 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3499 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3500 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3501 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3503 netdev_rss_key_fill(adapter
->rss_key
, sizeof(adapter
->rss_key
));
3504 if ((hw
->mac
.type
>= ixgbe_mac_X550
) &&
3505 (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)) {
3506 unsigned int pf_pool
= adapter
->num_vfs
;
3508 /* Enable VF RSS mode */
3509 mrqc
|= IXGBE_MRQC_MULTIPLE_RSS
;
3510 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3512 /* Setup RSS through the VF registers */
3513 ixgbe_setup_vfreta(adapter
);
3514 vfmrqc
= IXGBE_MRQC_RSSEN
;
3515 vfmrqc
|= rss_field
;
3516 IXGBE_WRITE_REG(hw
, IXGBE_PFVFMRQC(pf_pool
), vfmrqc
);
3518 ixgbe_setup_reta(adapter
);
3520 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3525 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3526 * @adapter: address of board private structure
3527 * @index: index of ring to set
3529 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3530 struct ixgbe_ring
*ring
)
3532 struct ixgbe_hw
*hw
= &adapter
->hw
;
3534 u8 reg_idx
= ring
->reg_idx
;
3536 if (!ring_is_rsc_enabled(ring
))
3539 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3540 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3542 * we must limit the number of descriptors so that the
3543 * total size of max desc * buf_len is not greater
3546 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3547 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3550 #define IXGBE_MAX_RX_DESC_POLL 10
3551 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3552 struct ixgbe_ring
*ring
)
3554 struct ixgbe_hw
*hw
= &adapter
->hw
;
3555 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3557 u8 reg_idx
= ring
->reg_idx
;
3559 if (ixgbe_removed(hw
->hw_addr
))
3561 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3562 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3563 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3567 usleep_range(1000, 2000);
3568 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3569 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3572 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3573 "the polling period\n", reg_idx
);
3577 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3578 struct ixgbe_ring
*ring
)
3580 struct ixgbe_hw
*hw
= &adapter
->hw
;
3581 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3583 u8 reg_idx
= ring
->reg_idx
;
3585 if (ixgbe_removed(hw
->hw_addr
))
3587 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3588 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3590 /* write value back with RXDCTL.ENABLE bit cleared */
3591 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3593 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3594 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3597 /* the hardware may take up to 100us to really disable the rx queue */
3600 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3601 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3604 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3605 "the polling period\n", reg_idx
);
3609 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3610 struct ixgbe_ring
*ring
)
3612 struct ixgbe_hw
*hw
= &adapter
->hw
;
3613 u64 rdba
= ring
->dma
;
3615 u8 reg_idx
= ring
->reg_idx
;
3617 /* disable queue to avoid issues while updating state */
3618 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3619 ixgbe_disable_rx_queue(adapter
, ring
);
3621 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3622 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3623 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3624 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3625 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3626 IXGBE_WRITE_FLUSH(hw
);
3628 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3629 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3630 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3632 ixgbe_configure_srrctl(adapter
, ring
);
3633 ixgbe_configure_rscctl(adapter
, ring
);
3635 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3637 * enable cache line friendly hardware writes:
3638 * PTHRESH=32 descriptors (half the internal cache),
3639 * this also removes ugly rx_no_buffer_count increment
3640 * HTHRESH=4 descriptors (to minimize latency on fetch)
3641 * WTHRESH=8 burst writeback up to two cache lines
3643 rxdctl
&= ~0x3FFFFF;
3647 /* enable receive descriptor ring */
3648 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3649 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3651 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3652 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3655 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3657 struct ixgbe_hw
*hw
= &adapter
->hw
;
3658 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3661 /* PSRTYPE must be initialized in non 82598 adapters */
3662 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3663 IXGBE_PSRTYPE_UDPHDR
|
3664 IXGBE_PSRTYPE_IPV4HDR
|
3665 IXGBE_PSRTYPE_L2HDR
|
3666 IXGBE_PSRTYPE_IPV6HDR
;
3668 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3676 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3677 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3680 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3682 struct ixgbe_hw
*hw
= &adapter
->hw
;
3683 u32 reg_offset
, vf_shift
;
3684 u32 gcr_ext
, vmdctl
;
3687 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3690 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3691 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3692 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3693 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3694 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3695 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3697 vf_shift
= VMDQ_P(0) % 32;
3698 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3700 /* Enable only the PF's pool for Tx/Rx */
3701 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3702 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3703 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3704 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3705 if (adapter
->bridge_mode
== BRIDGE_MODE_VEB
)
3706 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3708 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3709 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3711 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3712 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
3715 * Set up VF register offsets for selected VT Mode,
3716 * i.e. 32 or 64 VFs for SR-IOV
3718 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3719 case IXGBE_82599_VMDQ_8Q_MASK
:
3720 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3722 case IXGBE_82599_VMDQ_4Q_MASK
:
3723 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3726 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3730 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3733 /* Enable MAC Anti-Spoofing */
3734 hw
->mac
.ops
.set_mac_anti_spoofing(hw
, (adapter
->num_vfs
!= 0),
3737 /* Ensure LLDP and FC is set for Ethertype Antispoofing if we will be
3738 * calling set_ethertype_anti_spoofing for each VF in loop below
3740 if (hw
->mac
.ops
.set_ethertype_anti_spoofing
) {
3741 IXGBE_WRITE_REG(hw
, IXGBE_ETQF(IXGBE_ETQF_FILTER_LLDP
),
3742 (IXGBE_ETQF_FILTER_EN
|
3743 IXGBE_ETQF_TX_ANTISPOOF
|
3746 IXGBE_WRITE_REG(hw
, IXGBE_ETQF(IXGBE_ETQF_FILTER_FC
),
3747 (IXGBE_ETQF_FILTER_EN
|
3748 IXGBE_ETQF_TX_ANTISPOOF
|
3752 /* For VFs that have spoof checking turned off */
3753 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3754 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3755 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3757 /* enable ethertype anti spoofing if hw supports it */
3758 if (hw
->mac
.ops
.set_ethertype_anti_spoofing
)
3759 hw
->mac
.ops
.set_ethertype_anti_spoofing(hw
, true, i
);
3761 /* Enable/Disable RSS query feature */
3762 ixgbe_ndo_set_vf_rss_query_en(adapter
->netdev
, i
,
3763 adapter
->vfinfo
[i
].rss_query_enabled
);
3767 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3769 struct ixgbe_hw
*hw
= &adapter
->hw
;
3770 struct net_device
*netdev
= adapter
->netdev
;
3771 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3772 struct ixgbe_ring
*rx_ring
;
3777 /* adjust max frame to be able to do baby jumbo for FCoE */
3778 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3779 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3780 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3782 #endif /* IXGBE_FCOE */
3784 /* adjust max frame to be at least the size of a standard frame */
3785 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3786 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3788 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3789 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3790 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3791 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3793 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3796 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3797 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3798 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3799 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3802 * Setup the HW Rx Head and Tail Descriptor Pointers and
3803 * the Base and Length of the Rx Descriptor Ring
3805 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3806 rx_ring
= adapter
->rx_ring
[i
];
3807 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3808 set_ring_rsc_enabled(rx_ring
);
3810 clear_ring_rsc_enabled(rx_ring
);
3814 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3816 struct ixgbe_hw
*hw
= &adapter
->hw
;
3817 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3819 switch (hw
->mac
.type
) {
3820 case ixgbe_mac_82598EB
:
3822 * For VMDq support of different descriptor types or
3823 * buffer sizes through the use of multiple SRRCTL
3824 * registers, RDRXCTL.MVMEN must be set to 1
3826 * also, the manual doesn't mention it clearly but DCA hints
3827 * will only use queue 0's tags unless this bit is set. Side
3828 * effects of setting this bit are only that SRRCTL must be
3829 * fully programmed [0..15]
3831 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3833 case ixgbe_mac_X550
:
3834 case ixgbe_mac_X550EM_x
:
3835 if (adapter
->num_vfs
)
3836 rdrxctl
|= IXGBE_RDRXCTL_PSP
;
3837 /* fall through for older HW */
3838 case ixgbe_mac_82599EB
:
3839 case ixgbe_mac_X540
:
3840 /* Disable RSC for ACK packets */
3841 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3842 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3843 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3844 /* hardware requires some bits to be set by default */
3845 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3846 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3849 /* We should do nothing since we don't know this hardware */
3853 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3857 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3858 * @adapter: board private structure
3860 * Configure the Rx unit of the MAC after a reset.
3862 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3864 struct ixgbe_hw
*hw
= &adapter
->hw
;
3868 /* disable receives while setting up the descriptors */
3869 hw
->mac
.ops
.disable_rx(hw
);
3871 ixgbe_setup_psrtype(adapter
);
3872 ixgbe_setup_rdrxctl(adapter
);
3875 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3876 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3877 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3878 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3879 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3881 /* Program registers for the distribution of queues */
3882 ixgbe_setup_mrqc(adapter
);
3884 /* set_rx_buffer_len must be called before ring initialization */
3885 ixgbe_set_rx_buffer_len(adapter
);
3888 * Setup the HW Rx Head and Tail Descriptor Pointers and
3889 * the Base and Length of the Rx Descriptor Ring
3891 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3892 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3894 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3895 /* disable drop enable for 82598 parts */
3896 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3897 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3899 /* enable all receives */
3900 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3901 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3904 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3905 __be16 proto
, u16 vid
)
3907 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3908 struct ixgbe_hw
*hw
= &adapter
->hw
;
3910 /* add VID to filter table */
3911 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true, true);
3912 set_bit(vid
, adapter
->active_vlans
);
3917 static int ixgbe_find_vlvf_entry(struct ixgbe_hw
*hw
, u32 vlan
)
3922 /* short cut the special case */
3926 /* Search for the vlan id in the VLVF entries */
3927 for (idx
= IXGBE_VLVF_ENTRIES
; --idx
;) {
3928 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(idx
));
3929 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
3936 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter
*adapter
, u32 vid
)
3938 struct ixgbe_hw
*hw
= &adapter
->hw
;
3942 idx
= ixgbe_find_vlvf_entry(hw
, vid
);
3946 /* See if any other pools are set for this VLAN filter
3947 * entry other than the PF.
3949 word
= idx
* 2 + (VMDQ_P(0) / 32);
3950 bits
= ~(1 << (VMDQ_P(0)) % 32);
3951 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
3953 /* Disable the filter so this falls into the default pool. */
3954 if (!bits
&& !IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
^ 1))) {
3955 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
3956 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), 0);
3957 IXGBE_WRITE_REG(hw
, IXGBE_VLVF(idx
), 0);
3961 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
3962 __be16 proto
, u16 vid
)
3964 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3965 struct ixgbe_hw
*hw
= &adapter
->hw
;
3967 /* remove VID from filter table */
3968 if (adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
)
3969 ixgbe_update_pf_promisc_vlvf(adapter
, vid
);
3971 hw
->mac
.ops
.set_vfta(hw
, vid
, VMDQ_P(0), false, true);
3973 clear_bit(vid
, adapter
->active_vlans
);
3979 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3980 * @adapter: driver data
3982 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3984 struct ixgbe_hw
*hw
= &adapter
->hw
;
3988 switch (hw
->mac
.type
) {
3989 case ixgbe_mac_82598EB
:
3990 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3991 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3992 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3994 case ixgbe_mac_82599EB
:
3995 case ixgbe_mac_X540
:
3996 case ixgbe_mac_X550
:
3997 case ixgbe_mac_X550EM_x
:
3998 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3999 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4001 if (ring
->l2_accel_priv
)
4004 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4005 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
4006 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4015 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4016 * @adapter: driver data
4018 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
4020 struct ixgbe_hw
*hw
= &adapter
->hw
;
4024 switch (hw
->mac
.type
) {
4025 case ixgbe_mac_82598EB
:
4026 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4027 vlnctrl
|= IXGBE_VLNCTRL_VME
;
4028 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4030 case ixgbe_mac_82599EB
:
4031 case ixgbe_mac_X540
:
4032 case ixgbe_mac_X550
:
4033 case ixgbe_mac_X550EM_x
:
4034 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4035 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4037 if (ring
->l2_accel_priv
)
4040 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4041 vlnctrl
|= IXGBE_RXDCTL_VME
;
4042 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4050 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter
*adapter
)
4052 struct ixgbe_hw
*hw
= &adapter
->hw
;
4055 switch (hw
->mac
.type
) {
4056 case ixgbe_mac_82599EB
:
4057 case ixgbe_mac_X540
:
4058 case ixgbe_mac_X550
:
4059 case ixgbe_mac_X550EM_x
:
4061 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4064 case ixgbe_mac_82598EB
:
4065 /* legacy case, we can just disable VLAN filtering */
4066 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4067 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
4068 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4072 /* We are already in VLAN promisc, nothing to do */
4073 if (adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
)
4076 /* Set flag so we don't redo unnecessary work */
4077 adapter
->flags2
|= IXGBE_FLAG2_VLAN_PROMISC
;
4079 /* Add PF to all active pools */
4080 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4081 u32 reg_offset
= IXGBE_VLVFB(i
* 2 + VMDQ_P(0) / 32);
4082 u32 vlvfb
= IXGBE_READ_REG(hw
, reg_offset
);
4084 vlvfb
|= 1 << (VMDQ_P(0) % 32);
4085 IXGBE_WRITE_REG(hw
, reg_offset
, vlvfb
);
4088 /* Set all bits in the VLAN filter table array */
4089 for (i
= hw
->mac
.vft_size
; i
--;)
4090 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(i
), ~0U);
4093 #define VFTA_BLOCK_SIZE 8
4094 static void ixgbe_scrub_vfta(struct ixgbe_adapter
*adapter
, u32 vfta_offset
)
4096 struct ixgbe_hw
*hw
= &adapter
->hw
;
4097 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4098 u32 vid_start
= vfta_offset
* 32;
4099 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4100 u32 i
, vid
, word
, bits
;
4102 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4103 u32 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(i
));
4105 /* pull VLAN ID from VLVF */
4106 vid
= vlvf
& VLAN_VID_MASK
;
4108 /* only concern outselves with a certain range */
4109 if (vid
< vid_start
|| vid
>= vid_end
)
4113 /* record VLAN ID in VFTA */
4114 vfta
[(vid
- vid_start
) / 32] |= 1 << (vid
% 32);
4116 /* if PF is part of this then continue */
4117 if (test_bit(vid
, adapter
->active_vlans
))
4121 /* remove PF from the pool */
4122 word
= i
* 2 + VMDQ_P(0) / 32;
4123 bits
= ~(1 << (VMDQ_P(0) % 32));
4124 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4125 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), bits
);
4128 /* extract values from active_vlans and write back to VFTA */
4129 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4130 vid
= (vfta_offset
+ i
) * 32;
4131 word
= vid
/ BITS_PER_LONG
;
4132 bits
= vid
% BITS_PER_LONG
;
4134 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4136 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(vfta_offset
+ i
), vfta
[i
]);
4140 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter
*adapter
)
4142 struct ixgbe_hw
*hw
= &adapter
->hw
;
4145 switch (hw
->mac
.type
) {
4146 case ixgbe_mac_82599EB
:
4147 case ixgbe_mac_X540
:
4148 case ixgbe_mac_X550
:
4149 case ixgbe_mac_X550EM_x
:
4151 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4154 case ixgbe_mac_82598EB
:
4155 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4156 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
4157 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4158 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4162 /* We are not in VLAN promisc, nothing to do */
4163 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4166 /* Set flag so we don't redo unnecessary work */
4167 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
4169 for (i
= 0; i
< hw
->mac
.vft_size
; i
+= VFTA_BLOCK_SIZE
)
4170 ixgbe_scrub_vfta(adapter
, i
);
4173 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
4177 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
4179 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
4180 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
4184 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4185 * @netdev: network interface device structure
4187 * Writes multicast address list to the MTA hash table.
4188 * Returns: -ENOMEM on failure
4189 * 0 on no addresses written
4190 * X on writing X addresses to MTA
4192 static int ixgbe_write_mc_addr_list(struct net_device
*netdev
)
4194 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4195 struct ixgbe_hw
*hw
= &adapter
->hw
;
4197 if (!netif_running(netdev
))
4200 if (hw
->mac
.ops
.update_mc_addr_list
)
4201 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
4205 #ifdef CONFIG_PCI_IOV
4206 ixgbe_restore_vf_multicasts(adapter
);
4209 return netdev_mc_count(netdev
);
4212 #ifdef CONFIG_PCI_IOV
4213 void ixgbe_full_sync_mac_table(struct ixgbe_adapter
*adapter
)
4215 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4216 struct ixgbe_hw
*hw
= &adapter
->hw
;
4219 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4220 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4222 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4223 hw
->mac
.ops
.set_rar(hw
, i
,
4228 hw
->mac
.ops
.clear_rar(hw
, i
);
4233 static void ixgbe_sync_mac_table(struct ixgbe_adapter
*adapter
)
4235 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4236 struct ixgbe_hw
*hw
= &adapter
->hw
;
4239 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4240 if (!(mac_table
->state
& IXGBE_MAC_STATE_MODIFIED
))
4243 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4245 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4246 hw
->mac
.ops
.set_rar(hw
, i
,
4251 hw
->mac
.ops
.clear_rar(hw
, i
);
4255 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter
*adapter
)
4257 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4258 struct ixgbe_hw
*hw
= &adapter
->hw
;
4261 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4262 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4263 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4266 ixgbe_sync_mac_table(adapter
);
4269 static int ixgbe_available_rars(struct ixgbe_adapter
*adapter
, u16 pool
)
4271 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4272 struct ixgbe_hw
*hw
= &adapter
->hw
;
4275 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4276 /* do not count default RAR as available */
4277 if (mac_table
->state
& IXGBE_MAC_STATE_DEFAULT
)
4280 /* only count unused and addresses that belong to us */
4281 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
) {
4282 if (mac_table
->pool
!= pool
)
4292 /* this function destroys the first RAR entry */
4293 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter
*adapter
)
4295 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4296 struct ixgbe_hw
*hw
= &adapter
->hw
;
4298 memcpy(&mac_table
->addr
, hw
->mac
.addr
, ETH_ALEN
);
4299 mac_table
->pool
= VMDQ_P(0);
4301 mac_table
->state
= IXGBE_MAC_STATE_DEFAULT
| IXGBE_MAC_STATE_IN_USE
;
4303 hw
->mac
.ops
.set_rar(hw
, 0, mac_table
->addr
, mac_table
->pool
,
4307 int ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4308 const u8
*addr
, u16 pool
)
4310 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4311 struct ixgbe_hw
*hw
= &adapter
->hw
;
4314 if (is_zero_ether_addr(addr
))
4317 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4318 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4321 ether_addr_copy(mac_table
->addr
, addr
);
4322 mac_table
->pool
= pool
;
4324 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
|
4325 IXGBE_MAC_STATE_IN_USE
;
4327 ixgbe_sync_mac_table(adapter
);
4335 int ixgbe_del_mac_filter(struct ixgbe_adapter
*adapter
,
4336 const u8
*addr
, u16 pool
)
4338 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4339 struct ixgbe_hw
*hw
= &adapter
->hw
;
4342 if (is_zero_ether_addr(addr
))
4345 /* search table for addr, if found clear IN_USE flag and sync */
4346 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4347 /* we can only delete an entry if it is in use */
4348 if (!(mac_table
->state
& IXGBE_MAC_STATE_IN_USE
))
4350 /* we only care about entries that belong to the given pool */
4351 if (mac_table
->pool
!= pool
)
4353 /* we only care about a specific MAC address */
4354 if (!ether_addr_equal(addr
, mac_table
->addr
))
4357 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4358 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4360 ixgbe_sync_mac_table(adapter
);
4368 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4369 * @netdev: network interface device structure
4371 * Writes unicast address list to the RAR table.
4372 * Returns: -ENOMEM on failure/insufficient address space
4373 * 0 on no addresses written
4374 * X on writing X addresses to the RAR table
4376 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
, int vfn
)
4378 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4381 /* return ENOMEM indicating insufficient memory for addresses */
4382 if (netdev_uc_count(netdev
) > ixgbe_available_rars(adapter
, vfn
))
4385 if (!netdev_uc_empty(netdev
)) {
4386 struct netdev_hw_addr
*ha
;
4387 netdev_for_each_uc_addr(ha
, netdev
) {
4388 ixgbe_del_mac_filter(adapter
, ha
->addr
, vfn
);
4389 ixgbe_add_mac_filter(adapter
, ha
->addr
, vfn
);
4396 static int ixgbe_uc_sync(struct net_device
*netdev
, const unsigned char *addr
)
4398 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4401 ret
= ixgbe_add_mac_filter(adapter
, addr
, VMDQ_P(0));
4403 return min_t(int, ret
, 0);
4406 static int ixgbe_uc_unsync(struct net_device
*netdev
, const unsigned char *addr
)
4408 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4410 ixgbe_del_mac_filter(adapter
, addr
, VMDQ_P(0));
4416 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4417 * @netdev: network interface device structure
4419 * The set_rx_method entry point is called whenever the unicast/multicast
4420 * address list or the network interface flags are updated. This routine is
4421 * responsible for configuring the hardware for proper unicast, multicast and
4424 void ixgbe_set_rx_mode(struct net_device
*netdev
)
4426 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4427 struct ixgbe_hw
*hw
= &adapter
->hw
;
4428 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
4431 /* Check for Promiscuous and All Multicast modes */
4432 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4434 /* set all bits that we expect to always be set */
4435 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
4436 fctrl
|= IXGBE_FCTRL_BAM
;
4437 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
4438 fctrl
|= IXGBE_FCTRL_PMCF
;
4440 /* clear the bits we are changing the status of */
4441 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4442 if (netdev
->flags
& IFF_PROMISC
) {
4443 hw
->addr_ctrl
.user_set_promisc
= true;
4444 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4445 vmolr
|= IXGBE_VMOLR_MPE
;
4446 ixgbe_vlan_promisc_enable(adapter
);
4448 if (netdev
->flags
& IFF_ALLMULTI
) {
4449 fctrl
|= IXGBE_FCTRL_MPE
;
4450 vmolr
|= IXGBE_VMOLR_MPE
;
4452 hw
->addr_ctrl
.user_set_promisc
= false;
4453 ixgbe_vlan_promisc_disable(adapter
);
4457 * Write addresses to available RAR registers, if there is not
4458 * sufficient space to store all the addresses then enable
4459 * unicast promiscuous mode
4461 if (__dev_uc_sync(netdev
, ixgbe_uc_sync
, ixgbe_uc_unsync
)) {
4462 fctrl
|= IXGBE_FCTRL_UPE
;
4463 vmolr
|= IXGBE_VMOLR_ROPE
;
4466 /* Write addresses to the MTA, if the attempt fails
4467 * then we should just turn on promiscuous mode so
4468 * that we can at least receive multicast traffic
4470 count
= ixgbe_write_mc_addr_list(netdev
);
4472 fctrl
|= IXGBE_FCTRL_MPE
;
4473 vmolr
|= IXGBE_VMOLR_MPE
;
4475 vmolr
|= IXGBE_VMOLR_ROMPE
;
4478 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4479 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
4480 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
4482 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
4485 /* This is useful for sniffing bad packets. */
4486 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
4487 /* UPE and MPE will be handled by normal PROMISC logic
4488 * in e1000e_set_rx_mode */
4489 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
4490 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
4491 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
4493 fctrl
&= ~(IXGBE_FCTRL_DPF
);
4494 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4497 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4499 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
4500 ixgbe_vlan_strip_enable(adapter
);
4502 ixgbe_vlan_strip_disable(adapter
);
4505 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
4509 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4510 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
4511 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4515 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4519 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4520 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4521 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
4522 pr_info("QV %d locked\n", q_idx
);
4523 usleep_range(1000, 20000);
4528 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter
*adapter
)
4530 switch (adapter
->hw
.mac
.type
) {
4531 case ixgbe_mac_X550
:
4532 case ixgbe_mac_X550EM_x
:
4533 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VXLANCTRL
, 0);
4534 adapter
->vxlan_port
= 0;
4541 #ifdef CONFIG_IXGBE_DCB
4543 * ixgbe_configure_dcb - Configure DCB hardware
4544 * @adapter: ixgbe adapter struct
4546 * This is called by the driver on open to configure the DCB hardware.
4547 * This is also called by the gennetlink interface when reconfiguring
4550 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
4552 struct ixgbe_hw
*hw
= &adapter
->hw
;
4553 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4555 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
4556 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4557 netif_set_gso_max_size(adapter
->netdev
, 65536);
4561 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4562 netif_set_gso_max_size(adapter
->netdev
, 32768);
4565 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
4566 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
4569 /* reconfigure the hardware */
4570 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
4571 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4573 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4575 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
4576 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
4577 ixgbe_dcb_hw_ets(&adapter
->hw
,
4578 adapter
->ixgbe_ieee_ets
,
4580 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
4581 adapter
->ixgbe_ieee_pfc
->pfc_en
,
4582 adapter
->ixgbe_ieee_ets
->prio_tc
);
4585 /* Enable RSS Hash per TC */
4586 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4588 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4595 /* write msb to all 8 TCs in one write */
4596 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4601 /* Additional bittime to account for IXGBE framing */
4602 #define IXGBE_ETH_FRAMING 20
4605 * ixgbe_hpbthresh - calculate high water mark for flow control
4607 * @adapter: board private structure to calculate for
4608 * @pb: packet buffer to calculate
4610 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4612 struct ixgbe_hw
*hw
= &adapter
->hw
;
4613 struct net_device
*dev
= adapter
->netdev
;
4614 int link
, tc
, kb
, marker
;
4617 /* Calculate max LAN frame size */
4618 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4621 /* FCoE traffic class uses FCOE jumbo frames */
4622 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4623 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4624 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4625 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4628 /* Calculate delay value for device */
4629 switch (hw
->mac
.type
) {
4630 case ixgbe_mac_X540
:
4631 case ixgbe_mac_X550
:
4632 case ixgbe_mac_X550EM_x
:
4633 dv_id
= IXGBE_DV_X540(link
, tc
);
4636 dv_id
= IXGBE_DV(link
, tc
);
4640 /* Loopback switch introduces additional latency */
4641 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4642 dv_id
+= IXGBE_B2BT(tc
);
4644 /* Delay value is calculated in bit times convert to KB */
4645 kb
= IXGBE_BT2KB(dv_id
);
4646 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4648 marker
= rx_pba
- kb
;
4650 /* It is possible that the packet buffer is not large enough
4651 * to provide required headroom. In this case throw an error
4652 * to user and a do the best we can.
4655 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4656 "headroom to support flow control."
4657 "Decrease MTU or number of traffic classes\n", pb
);
4665 * ixgbe_lpbthresh - calculate low water mark for for flow control
4667 * @adapter: board private structure to calculate for
4668 * @pb: packet buffer to calculate
4670 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4672 struct ixgbe_hw
*hw
= &adapter
->hw
;
4673 struct net_device
*dev
= adapter
->netdev
;
4677 /* Calculate max LAN frame size */
4678 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4681 /* FCoE traffic class uses FCOE jumbo frames */
4682 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4683 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4684 (pb
== netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
)))
4685 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4688 /* Calculate delay value for device */
4689 switch (hw
->mac
.type
) {
4690 case ixgbe_mac_X540
:
4691 case ixgbe_mac_X550
:
4692 case ixgbe_mac_X550EM_x
:
4693 dv_id
= IXGBE_LOW_DV_X540(tc
);
4696 dv_id
= IXGBE_LOW_DV(tc
);
4700 /* Delay value is calculated in bit times convert to KB */
4701 return IXGBE_BT2KB(dv_id
);
4705 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4707 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4709 struct ixgbe_hw
*hw
= &adapter
->hw
;
4710 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4716 for (i
= 0; i
< num_tc
; i
++) {
4717 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4718 hw
->fc
.low_water
[i
] = ixgbe_lpbthresh(adapter
, i
);
4720 /* Low water marks must not be larger than high water marks */
4721 if (hw
->fc
.low_water
[i
] > hw
->fc
.high_water
[i
])
4722 hw
->fc
.low_water
[i
] = 0;
4725 for (; i
< MAX_TRAFFIC_CLASS
; i
++)
4726 hw
->fc
.high_water
[i
] = 0;
4729 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4731 struct ixgbe_hw
*hw
= &adapter
->hw
;
4733 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4735 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4736 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4737 hdrm
= 32 << adapter
->fdir_pballoc
;
4741 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4742 ixgbe_pbthresh_setup(adapter
);
4745 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4747 struct ixgbe_hw
*hw
= &adapter
->hw
;
4748 struct hlist_node
*node2
;
4749 struct ixgbe_fdir_filter
*filter
;
4751 spin_lock(&adapter
->fdir_perfect_lock
);
4753 if (!hlist_empty(&adapter
->fdir_filter_list
))
4754 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4756 hlist_for_each_entry_safe(filter
, node2
,
4757 &adapter
->fdir_filter_list
, fdir_node
) {
4758 ixgbe_fdir_write_perfect_filter_82599(hw
,
4761 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4762 IXGBE_FDIR_DROP_QUEUE
:
4763 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4766 spin_unlock(&adapter
->fdir_perfect_lock
);
4769 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4770 struct ixgbe_adapter
*adapter
)
4772 struct ixgbe_hw
*hw
= &adapter
->hw
;
4775 /* No unicast promiscuous support for VMDQ devices. */
4776 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4777 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4779 /* clear the affected bit */
4780 vmolr
&= ~IXGBE_VMOLR_MPE
;
4782 if (dev
->flags
& IFF_ALLMULTI
) {
4783 vmolr
|= IXGBE_VMOLR_MPE
;
4785 vmolr
|= IXGBE_VMOLR_ROMPE
;
4786 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4788 ixgbe_write_uc_addr_list(adapter
->netdev
, pool
);
4789 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4792 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4794 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4795 int rss_i
= adapter
->num_rx_queues_per_pool
;
4796 struct ixgbe_hw
*hw
= &adapter
->hw
;
4797 u16 pool
= vadapter
->pool
;
4798 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4799 IXGBE_PSRTYPE_UDPHDR
|
4800 IXGBE_PSRTYPE_IPV4HDR
|
4801 IXGBE_PSRTYPE_L2HDR
|
4802 IXGBE_PSRTYPE_IPV6HDR
;
4804 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4812 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4816 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4817 * @rx_ring: ring to free buffers from
4819 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4821 struct device
*dev
= rx_ring
->dev
;
4825 /* ring already cleared, nothing to do */
4826 if (!rx_ring
->rx_buffer_info
)
4829 /* Free all the Rx ring sk_buffs */
4830 for (i
= 0; i
< rx_ring
->count
; i
++) {
4831 struct ixgbe_rx_buffer
*rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4833 if (rx_buffer
->skb
) {
4834 struct sk_buff
*skb
= rx_buffer
->skb
;
4835 if (IXGBE_CB(skb
)->page_released
)
4838 ixgbe_rx_bufsz(rx_ring
),
4841 rx_buffer
->skb
= NULL
;
4844 if (!rx_buffer
->page
)
4847 dma_unmap_page(dev
, rx_buffer
->dma
,
4848 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
4849 __free_pages(rx_buffer
->page
, ixgbe_rx_pg_order(rx_ring
));
4851 rx_buffer
->page
= NULL
;
4854 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4855 memset(rx_ring
->rx_buffer_info
, 0, size
);
4857 /* Zero out the descriptor ring */
4858 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4860 rx_ring
->next_to_alloc
= 0;
4861 rx_ring
->next_to_clean
= 0;
4862 rx_ring
->next_to_use
= 0;
4865 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4866 struct ixgbe_ring
*rx_ring
)
4868 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4869 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4871 /* shutdown specific queue receive and wait for dma to settle */
4872 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4873 usleep_range(10000, 20000);
4874 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << index
));
4875 ixgbe_clean_rx_ring(rx_ring
);
4876 rx_ring
->l2_accel_priv
= NULL
;
4879 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4880 struct ixgbe_fwd_adapter
*accel
)
4882 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4883 unsigned int rxbase
= accel
->rx_base_queue
;
4884 unsigned int txbase
= accel
->tx_base_queue
;
4887 netif_tx_stop_all_queues(vdev
);
4889 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4890 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4891 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4894 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4895 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4896 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4903 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4904 struct ixgbe_fwd_adapter
*accel
)
4906 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4907 unsigned int rxbase
, txbase
, queues
;
4908 int i
, baseq
, err
= 0;
4910 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4913 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4914 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4915 accel
->pool
, adapter
->num_rx_pools
,
4916 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4917 adapter
->fwd_bitmask
);
4919 accel
->netdev
= vdev
;
4920 accel
->rx_base_queue
= rxbase
= baseq
;
4921 accel
->tx_base_queue
= txbase
= baseq
;
4923 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4924 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4926 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4927 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4928 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4929 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4932 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4933 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4934 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4937 queues
= min_t(unsigned int,
4938 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4939 err
= netif_set_real_num_tx_queues(vdev
, queues
);
4943 err
= netif_set_real_num_rx_queues(vdev
, queues
);
4947 if (is_valid_ether_addr(vdev
->dev_addr
))
4948 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
4950 ixgbe_fwd_psrtype(accel
);
4951 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
4954 ixgbe_fwd_ring_down(vdev
, accel
);
4958 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
4960 struct net_device
*upper
;
4961 struct list_head
*iter
;
4964 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4965 if (netif_is_macvlan(upper
)) {
4966 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
4967 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
4969 if (dfwd
->fwd_priv
) {
4970 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
4978 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
4980 struct ixgbe_hw
*hw
= &adapter
->hw
;
4982 ixgbe_configure_pb(adapter
);
4983 #ifdef CONFIG_IXGBE_DCB
4984 ixgbe_configure_dcb(adapter
);
4987 * We must restore virtualization before VLANs or else
4988 * the VLVF registers will not be populated
4990 ixgbe_configure_virtualization(adapter
);
4992 ixgbe_set_rx_mode(adapter
->netdev
);
4993 ixgbe_restore_vlan(adapter
);
4995 switch (hw
->mac
.type
) {
4996 case ixgbe_mac_82599EB
:
4997 case ixgbe_mac_X540
:
4998 hw
->mac
.ops
.disable_rx_buff(hw
);
5004 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
5005 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
5006 adapter
->fdir_pballoc
);
5007 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
5008 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
5009 adapter
->fdir_pballoc
);
5010 ixgbe_fdir_filter_restore(adapter
);
5013 switch (hw
->mac
.type
) {
5014 case ixgbe_mac_82599EB
:
5015 case ixgbe_mac_X540
:
5016 hw
->mac
.ops
.enable_rx_buff(hw
);
5022 #ifdef CONFIG_IXGBE_DCA
5024 if (adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
)
5025 ixgbe_setup_dca(adapter
);
5026 #endif /* CONFIG_IXGBE_DCA */
5029 /* configure FCoE L2 filters, redirection table, and Rx control */
5030 ixgbe_configure_fcoe(adapter
);
5032 #endif /* IXGBE_FCOE */
5033 ixgbe_configure_tx(adapter
);
5034 ixgbe_configure_rx(adapter
);
5035 ixgbe_configure_dfwd(adapter
);
5039 * ixgbe_sfp_link_config - set up SFP+ link
5040 * @adapter: pointer to private adapter struct
5042 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
5045 * We are assuming the worst case scenario here, and that
5046 * is that an SFP was inserted/removed after the reset
5047 * but before SFP detection was enabled. As such the best
5048 * solution is to just start searching as soon as we start
5050 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5051 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5053 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5054 adapter
->sfp_poll_time
= 0;
5058 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5059 * @hw: pointer to private hardware struct
5061 * Returns 0 on success, negative on failure
5063 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
5066 bool autoneg
, link_up
= false;
5067 int ret
= IXGBE_ERR_LINK_SETUP
;
5069 if (hw
->mac
.ops
.check_link
)
5070 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
5075 speed
= hw
->phy
.autoneg_advertised
;
5076 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
5077 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
5082 if (hw
->mac
.ops
.setup_link
)
5083 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
5088 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
5090 struct ixgbe_hw
*hw
= &adapter
->hw
;
5093 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
5094 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
5096 gpie
|= IXGBE_GPIE_EIAME
;
5098 * use EIAM to auto-mask when MSI-X interrupt is asserted
5099 * this saves a register write for every interrupt
5101 switch (hw
->mac
.type
) {
5102 case ixgbe_mac_82598EB
:
5103 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5105 case ixgbe_mac_82599EB
:
5106 case ixgbe_mac_X540
:
5107 case ixgbe_mac_X550
:
5108 case ixgbe_mac_X550EM_x
:
5110 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5111 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5115 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5116 * specifically only auto mask tx and rx interrupts */
5117 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5120 /* XXX: to interrupt immediately for EICS writes, enable this */
5121 /* gpie |= IXGBE_GPIE_EIMEN; */
5123 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
5124 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
5126 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
5127 case IXGBE_82599_VMDQ_8Q_MASK
:
5128 gpie
|= IXGBE_GPIE_VTMODE_16
;
5130 case IXGBE_82599_VMDQ_4Q_MASK
:
5131 gpie
|= IXGBE_GPIE_VTMODE_32
;
5134 gpie
|= IXGBE_GPIE_VTMODE_64
;
5139 /* Enable Thermal over heat sensor interrupt */
5140 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
5141 switch (adapter
->hw
.mac
.type
) {
5142 case ixgbe_mac_82599EB
:
5143 gpie
|= IXGBE_SDP0_GPIEN_8259X
;
5150 /* Enable fan failure interrupt */
5151 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
5152 gpie
|= IXGBE_SDP1_GPIEN(hw
);
5154 switch (hw
->mac
.type
) {
5155 case ixgbe_mac_82599EB
:
5156 gpie
|= IXGBE_SDP1_GPIEN_8259X
| IXGBE_SDP2_GPIEN_8259X
;
5158 case ixgbe_mac_X550EM_x
:
5159 gpie
|= IXGBE_SDP0_GPIEN_X540
;
5165 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
5168 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
5170 struct ixgbe_hw
*hw
= &adapter
->hw
;
5174 ixgbe_get_hw_control(adapter
);
5175 ixgbe_setup_gpie(adapter
);
5177 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
5178 ixgbe_configure_msix(adapter
);
5180 ixgbe_configure_msi_and_legacy(adapter
);
5182 /* enable the optics for 82599 SFP+ fiber */
5183 if (hw
->mac
.ops
.enable_tx_laser
)
5184 hw
->mac
.ops
.enable_tx_laser(hw
);
5186 if (hw
->phy
.ops
.set_phy_power
)
5187 hw
->phy
.ops
.set_phy_power(hw
, true);
5189 smp_mb__before_atomic();
5190 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
5191 ixgbe_napi_enable_all(adapter
);
5193 if (ixgbe_is_sfp(hw
)) {
5194 ixgbe_sfp_link_config(adapter
);
5196 err
= ixgbe_non_sfp_link_config(hw
);
5198 e_err(probe
, "link_config FAILED %d\n", err
);
5201 /* clear any pending interrupts, may auto mask */
5202 IXGBE_READ_REG(hw
, IXGBE_EICR
);
5203 ixgbe_irq_enable(adapter
, true, true);
5206 * If this adapter has a fan, check to see if we had a failure
5207 * before we enabled the interrupt.
5209 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5210 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5211 if (esdp
& IXGBE_ESDP_SDP1
)
5212 e_crit(drv
, "Fan has stopped, replace the adapter\n");
5215 /* bring the link up in the watchdog, this could race with our first
5216 * link up interrupt but shouldn't be a problem */
5217 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5218 adapter
->link_check_timeout
= jiffies
;
5219 mod_timer(&adapter
->service_timer
, jiffies
);
5221 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5222 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
5223 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
5224 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
5227 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
5229 WARN_ON(in_interrupt());
5230 /* put off any impending NetWatchDogTimeout */
5231 adapter
->netdev
->trans_start
= jiffies
;
5233 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
5234 usleep_range(1000, 2000);
5235 ixgbe_down(adapter
);
5237 * If SR-IOV enabled then wait a bit before bringing the adapter
5238 * back up to give the VFs time to respond to the reset. The
5239 * two second wait is based upon the watchdog timer cycle in
5242 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
5245 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
5248 void ixgbe_up(struct ixgbe_adapter
*adapter
)
5250 /* hardware has been reset, we need to reload some things */
5251 ixgbe_configure(adapter
);
5253 ixgbe_up_complete(adapter
);
5256 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
5258 struct ixgbe_hw
*hw
= &adapter
->hw
;
5259 struct net_device
*netdev
= adapter
->netdev
;
5262 if (ixgbe_removed(hw
->hw_addr
))
5264 /* lock SFP init bit to prevent race conditions with the watchdog */
5265 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5266 usleep_range(1000, 2000);
5268 /* clear all SFP and link config related flags while holding SFP_INIT */
5269 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
5270 IXGBE_FLAG2_SFP_NEEDS_RESET
);
5271 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5273 err
= hw
->mac
.ops
.init_hw(hw
);
5276 case IXGBE_ERR_SFP_NOT_PRESENT
:
5277 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
5279 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
5280 e_dev_err("master disable timed out\n");
5282 case IXGBE_ERR_EEPROM_VERSION
:
5283 /* We are running on a pre-production device, log a warning */
5284 e_dev_warn("This device is a pre-production adapter/LOM. "
5285 "Please be aware there may be issues associated with "
5286 "your hardware. If you are experiencing problems "
5287 "please contact your Intel or hardware "
5288 "representative who provided you with this "
5292 e_dev_err("Hardware Error: %d\n", err
);
5295 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5297 /* flush entries out of MAC table */
5298 ixgbe_flush_sw_mac_table(adapter
);
5299 __dev_uc_unsync(netdev
, NULL
);
5301 /* do not flush user set addresses */
5302 ixgbe_mac_set_default_filter(adapter
);
5304 /* update SAN MAC vmdq pool selection */
5305 if (hw
->mac
.san_mac_rar_index
)
5306 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
5308 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
5309 ixgbe_ptp_reset(adapter
);
5311 if (hw
->phy
.ops
.set_phy_power
) {
5312 if (!netif_running(adapter
->netdev
) && !adapter
->wol
)
5313 hw
->phy
.ops
.set_phy_power(hw
, false);
5315 hw
->phy
.ops
.set_phy_power(hw
, true);
5320 * ixgbe_clean_tx_ring - Free Tx Buffers
5321 * @tx_ring: ring to be cleaned
5323 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
5325 struct ixgbe_tx_buffer
*tx_buffer_info
;
5329 /* ring already cleared, nothing to do */
5330 if (!tx_ring
->tx_buffer_info
)
5333 /* Free all the Tx ring sk_buffs */
5334 for (i
= 0; i
< tx_ring
->count
; i
++) {
5335 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5336 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
5339 netdev_tx_reset_queue(txring_txq(tx_ring
));
5341 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5342 memset(tx_ring
->tx_buffer_info
, 0, size
);
5344 /* Zero out the descriptor ring */
5345 memset(tx_ring
->desc
, 0, tx_ring
->size
);
5347 tx_ring
->next_to_use
= 0;
5348 tx_ring
->next_to_clean
= 0;
5352 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5353 * @adapter: board private structure
5355 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
5359 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5360 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
5364 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5365 * @adapter: board private structure
5367 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
5371 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5372 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
5375 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
5377 struct hlist_node
*node2
;
5378 struct ixgbe_fdir_filter
*filter
;
5380 spin_lock(&adapter
->fdir_perfect_lock
);
5382 hlist_for_each_entry_safe(filter
, node2
,
5383 &adapter
->fdir_filter_list
, fdir_node
) {
5384 hlist_del(&filter
->fdir_node
);
5387 adapter
->fdir_filter_count
= 0;
5389 spin_unlock(&adapter
->fdir_perfect_lock
);
5392 void ixgbe_down(struct ixgbe_adapter
*adapter
)
5394 struct net_device
*netdev
= adapter
->netdev
;
5395 struct ixgbe_hw
*hw
= &adapter
->hw
;
5396 struct net_device
*upper
;
5397 struct list_head
*iter
;
5400 /* signal that we are down to the interrupt handler */
5401 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
5402 return; /* do nothing if already down */
5404 /* disable receives */
5405 hw
->mac
.ops
.disable_rx(hw
);
5407 /* disable all enabled rx queues */
5408 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5409 /* this call also flushes the previous write */
5410 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
5412 usleep_range(10000, 20000);
5414 netif_tx_stop_all_queues(netdev
);
5416 /* call carrier off first to avoid false dev_watchdog timeouts */
5417 netif_carrier_off(netdev
);
5418 netif_tx_disable(netdev
);
5420 /* disable any upper devices */
5421 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5422 if (netif_is_macvlan(upper
)) {
5423 struct macvlan_dev
*vlan
= netdev_priv(upper
);
5425 if (vlan
->fwd_priv
) {
5426 netif_tx_stop_all_queues(upper
);
5427 netif_carrier_off(upper
);
5428 netif_tx_disable(upper
);
5433 ixgbe_irq_disable(adapter
);
5435 ixgbe_napi_disable_all(adapter
);
5437 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
5438 IXGBE_FLAG2_RESET_REQUESTED
);
5439 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5441 del_timer_sync(&adapter
->service_timer
);
5443 if (adapter
->num_vfs
) {
5444 /* Clear EITR Select mapping */
5445 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
5447 /* Mark all the VFs as inactive */
5448 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
5449 adapter
->vfinfo
[i
].clear_to_send
= false;
5451 /* ping all the active vfs to let them know we are going down */
5452 ixgbe_ping_all_vfs(adapter
);
5454 /* Disable all VFTE/VFRE TX/RX */
5455 ixgbe_disable_tx_rx(adapter
);
5458 /* disable transmits in the hardware now that interrupts are off */
5459 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5460 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
5461 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5464 /* Disable the Tx DMA engine on 82599 and later MAC */
5465 switch (hw
->mac
.type
) {
5466 case ixgbe_mac_82599EB
:
5467 case ixgbe_mac_X540
:
5468 case ixgbe_mac_X550
:
5469 case ixgbe_mac_X550EM_x
:
5470 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
5471 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
5472 ~IXGBE_DMATXCTL_TE
));
5478 if (!pci_channel_offline(adapter
->pdev
))
5479 ixgbe_reset(adapter
);
5481 /* power down the optics for 82599 SFP+ fiber */
5482 if (hw
->mac
.ops
.disable_tx_laser
)
5483 hw
->mac
.ops
.disable_tx_laser(hw
);
5485 ixgbe_clean_all_tx_rings(adapter
);
5486 ixgbe_clean_all_rx_rings(adapter
);
5490 * ixgbe_tx_timeout - Respond to a Tx Hang
5491 * @netdev: network interface device structure
5493 static void ixgbe_tx_timeout(struct net_device
*netdev
)
5495 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5497 /* Do the reset outside of interrupt context */
5498 ixgbe_tx_timeout_reset(adapter
);
5502 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5503 * @adapter: board private structure to initialize
5505 * ixgbe_sw_init initializes the Adapter private data structure.
5506 * Fields are initialized based on PCI device information and
5507 * OS network device settings (MTU size).
5509 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
5511 struct ixgbe_hw
*hw
= &adapter
->hw
;
5512 struct pci_dev
*pdev
= adapter
->pdev
;
5513 unsigned int rss
, fdir
;
5515 #ifdef CONFIG_IXGBE_DCB
5517 struct tc_configuration
*tc
;
5520 /* PCI config space info */
5522 hw
->vendor_id
= pdev
->vendor
;
5523 hw
->device_id
= pdev
->device
;
5524 hw
->revision_id
= pdev
->revision
;
5525 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
5526 hw
->subsystem_device_id
= pdev
->subsystem_device
;
5528 /* Set common capability flags and settings */
5529 rss
= min_t(int, ixgbe_max_rss_indices(adapter
), num_online_cpus());
5530 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
5531 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
5532 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
5533 adapter
->atr_sample_rate
= 20;
5534 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
5535 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
5536 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
5537 #ifdef CONFIG_IXGBE_DCA
5538 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
5541 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
5542 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5543 #ifdef CONFIG_IXGBE_DCB
5544 /* Default traffic class to use for FCoE */
5545 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
5546 #endif /* CONFIG_IXGBE_DCB */
5547 #endif /* IXGBE_FCOE */
5549 /* initialize static ixgbe jump table entries */
5550 adapter
->jump_tables
[0] = ixgbe_ipv4_fields
;
5552 adapter
->mac_table
= kzalloc(sizeof(struct ixgbe_mac_addr
) *
5553 hw
->mac
.num_rar_entries
,
5555 if (!adapter
->mac_table
)
5558 /* Set MAC specific capability flags and exceptions */
5559 switch (hw
->mac
.type
) {
5560 case ixgbe_mac_82598EB
:
5561 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
5563 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
5564 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
5566 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
5567 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
5568 adapter
->atr_sample_rate
= 0;
5569 adapter
->fdir_pballoc
= 0;
5571 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5572 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5573 #ifdef CONFIG_IXGBE_DCB
5574 adapter
->fcoe
.up
= 0;
5575 #endif /* IXGBE_DCB */
5576 #endif /* IXGBE_FCOE */
5578 case ixgbe_mac_82599EB
:
5579 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5580 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5582 case ixgbe_mac_X540
:
5583 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM(hw
));
5584 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5585 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5587 case ixgbe_mac_X550EM_x
:
5588 case ixgbe_mac_X550
:
5589 #ifdef CONFIG_IXGBE_DCA
5590 adapter
->flags
&= ~IXGBE_FLAG_DCA_CAPABLE
;
5592 #ifdef CONFIG_IXGBE_VXLAN
5593 adapter
->flags
|= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
;
5601 /* FCoE support exists, always init the FCoE lock */
5602 spin_lock_init(&adapter
->fcoe
.lock
);
5605 /* n-tuple support exists, always init our spinlock */
5606 spin_lock_init(&adapter
->fdir_perfect_lock
);
5608 #ifdef CONFIG_IXGBE_DCB
5609 switch (hw
->mac
.type
) {
5610 case ixgbe_mac_X540
:
5611 case ixgbe_mac_X550
:
5612 case ixgbe_mac_X550EM_x
:
5613 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5614 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5617 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5618 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5622 /* Configure DCB traffic classes */
5623 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5624 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5625 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5626 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5627 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5628 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5629 tc
->dcb_pfc
= pfc_disabled
;
5632 /* Initialize default user to priority mapping, UPx->TC0 */
5633 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5634 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5635 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5637 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5638 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5639 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5640 adapter
->dcb_set_bitmap
= 0x00;
5641 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5642 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5643 sizeof(adapter
->temp_dcb_cfg
));
5647 /* default flow control settings */
5648 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5649 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5650 ixgbe_pbthresh_setup(adapter
);
5651 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5652 hw
->fc
.send_xon
= true;
5653 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5655 #ifdef CONFIG_PCI_IOV
5657 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5659 /* assign number of SR-IOV VFs */
5660 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5661 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5662 adapter
->num_vfs
= 0;
5663 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5665 adapter
->num_vfs
= max_vfs
;
5668 #endif /* CONFIG_PCI_IOV */
5670 /* enable itr by default in dynamic mode */
5671 adapter
->rx_itr_setting
= 1;
5672 adapter
->tx_itr_setting
= 1;
5674 /* set default ring sizes */
5675 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5676 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5678 /* set default work limits */
5679 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5681 /* initialize eeprom parameters */
5682 if (ixgbe_init_eeprom_params_generic(hw
)) {
5683 e_dev_err("EEPROM initialization failed\n");
5687 /* PF holds first pool slot */
5688 set_bit(0, &adapter
->fwd_bitmask
);
5689 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5695 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5696 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5698 * Return 0 on success, negative on failure
5700 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5702 struct device
*dev
= tx_ring
->dev
;
5703 int orig_node
= dev_to_node(dev
);
5707 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5709 if (tx_ring
->q_vector
)
5710 ring_node
= tx_ring
->q_vector
->numa_node
;
5712 tx_ring
->tx_buffer_info
= vzalloc_node(size
, ring_node
);
5713 if (!tx_ring
->tx_buffer_info
)
5714 tx_ring
->tx_buffer_info
= vzalloc(size
);
5715 if (!tx_ring
->tx_buffer_info
)
5718 u64_stats_init(&tx_ring
->syncp
);
5720 /* round up to nearest 4K */
5721 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5722 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5724 set_dev_node(dev
, ring_node
);
5725 tx_ring
->desc
= dma_alloc_coherent(dev
,
5729 set_dev_node(dev
, orig_node
);
5731 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5732 &tx_ring
->dma
, GFP_KERNEL
);
5736 tx_ring
->next_to_use
= 0;
5737 tx_ring
->next_to_clean
= 0;
5741 vfree(tx_ring
->tx_buffer_info
);
5742 tx_ring
->tx_buffer_info
= NULL
;
5743 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5748 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5749 * @adapter: board private structure
5751 * If this function returns with an error, then it's possible one or
5752 * more of the rings is populated (while the rest are not). It is the
5753 * callers duty to clean those orphaned rings.
5755 * Return 0 on success, negative on failure
5757 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5761 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5762 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5766 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5772 /* rewind the index freeing the rings as we go */
5774 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5779 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5780 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5782 * Returns 0 on success, negative on failure
5784 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5786 struct device
*dev
= rx_ring
->dev
;
5787 int orig_node
= dev_to_node(dev
);
5791 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5793 if (rx_ring
->q_vector
)
5794 ring_node
= rx_ring
->q_vector
->numa_node
;
5796 rx_ring
->rx_buffer_info
= vzalloc_node(size
, ring_node
);
5797 if (!rx_ring
->rx_buffer_info
)
5798 rx_ring
->rx_buffer_info
= vzalloc(size
);
5799 if (!rx_ring
->rx_buffer_info
)
5802 u64_stats_init(&rx_ring
->syncp
);
5804 /* Round up to nearest 4K */
5805 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5806 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5808 set_dev_node(dev
, ring_node
);
5809 rx_ring
->desc
= dma_alloc_coherent(dev
,
5813 set_dev_node(dev
, orig_node
);
5815 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5816 &rx_ring
->dma
, GFP_KERNEL
);
5820 rx_ring
->next_to_clean
= 0;
5821 rx_ring
->next_to_use
= 0;
5825 vfree(rx_ring
->rx_buffer_info
);
5826 rx_ring
->rx_buffer_info
= NULL
;
5827 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5832 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5833 * @adapter: board private structure
5835 * If this function returns with an error, then it's possible one or
5836 * more of the rings is populated (while the rest are not). It is the
5837 * callers duty to clean those orphaned rings.
5839 * Return 0 on success, negative on failure
5841 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5845 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5846 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5850 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5855 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5860 /* rewind the index freeing the rings as we go */
5862 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5867 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5868 * @tx_ring: Tx descriptor ring for a specific queue
5870 * Free all transmit software resources
5872 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5874 ixgbe_clean_tx_ring(tx_ring
);
5876 vfree(tx_ring
->tx_buffer_info
);
5877 tx_ring
->tx_buffer_info
= NULL
;
5879 /* if not set, then don't free */
5883 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5884 tx_ring
->desc
, tx_ring
->dma
);
5886 tx_ring
->desc
= NULL
;
5890 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5891 * @adapter: board private structure
5893 * Free all transmit software resources
5895 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5899 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5900 if (adapter
->tx_ring
[i
]->desc
)
5901 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5905 * ixgbe_free_rx_resources - Free Rx Resources
5906 * @rx_ring: ring to clean the resources from
5908 * Free all receive software resources
5910 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
5912 ixgbe_clean_rx_ring(rx_ring
);
5914 vfree(rx_ring
->rx_buffer_info
);
5915 rx_ring
->rx_buffer_info
= NULL
;
5917 /* if not set, then don't free */
5921 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
5922 rx_ring
->desc
, rx_ring
->dma
);
5924 rx_ring
->desc
= NULL
;
5928 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5929 * @adapter: board private structure
5931 * Free all receive software resources
5933 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5938 ixgbe_free_fcoe_ddp_resources(adapter
);
5941 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5942 if (adapter
->rx_ring
[i
]->desc
)
5943 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5947 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5948 * @netdev: network interface device structure
5949 * @new_mtu: new value for maximum frame size
5951 * Returns 0 on success, negative on failure
5953 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5955 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5956 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5958 /* MTU < 68 is an error and causes problems on some kernels */
5959 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5963 * For 82599EB we cannot allow legacy VFs to enable their receive
5964 * paths when MTU greater than 1500 is configured. So display a
5965 * warning that legacy VFs will be disabled.
5967 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
5968 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
5969 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
5970 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
5972 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5974 /* must set new MTU before calling down or up */
5975 netdev
->mtu
= new_mtu
;
5977 if (netif_running(netdev
))
5978 ixgbe_reinit_locked(adapter
);
5984 * ixgbe_open - Called when a network interface is made active
5985 * @netdev: network interface device structure
5987 * Returns 0 on success, negative value on failure
5989 * The open entry point is called when a network interface is made
5990 * active by the system (IFF_UP). At this point all resources needed
5991 * for transmit and receive operations are allocated, the interrupt
5992 * handler is registered with the OS, the watchdog timer is started,
5993 * and the stack is notified that the interface is ready.
5995 static int ixgbe_open(struct net_device
*netdev
)
5997 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5998 struct ixgbe_hw
*hw
= &adapter
->hw
;
6001 /* disallow open during test */
6002 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
6005 netif_carrier_off(netdev
);
6007 /* allocate transmit descriptors */
6008 err
= ixgbe_setup_all_tx_resources(adapter
);
6012 /* allocate receive descriptors */
6013 err
= ixgbe_setup_all_rx_resources(adapter
);
6017 ixgbe_configure(adapter
);
6019 err
= ixgbe_request_irq(adapter
);
6023 /* Notify the stack of the actual queue counts. */
6024 if (adapter
->num_rx_pools
> 1)
6025 queues
= adapter
->num_rx_queues_per_pool
;
6027 queues
= adapter
->num_tx_queues
;
6029 err
= netif_set_real_num_tx_queues(netdev
, queues
);
6031 goto err_set_queues
;
6033 if (adapter
->num_rx_pools
> 1 &&
6034 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
6035 queues
= IXGBE_MAX_L2A_QUEUES
;
6037 queues
= adapter
->num_rx_queues
;
6038 err
= netif_set_real_num_rx_queues(netdev
, queues
);
6040 goto err_set_queues
;
6042 ixgbe_ptp_init(adapter
);
6044 ixgbe_up_complete(adapter
);
6046 ixgbe_clear_vxlan_port(adapter
);
6047 #ifdef CONFIG_IXGBE_VXLAN
6048 vxlan_get_rx_port(netdev
);
6054 ixgbe_free_irq(adapter
);
6056 ixgbe_free_all_rx_resources(adapter
);
6057 if (hw
->phy
.ops
.set_phy_power
&& !adapter
->wol
)
6058 hw
->phy
.ops
.set_phy_power(&adapter
->hw
, false);
6060 ixgbe_free_all_tx_resources(adapter
);
6062 ixgbe_reset(adapter
);
6067 static void ixgbe_close_suspend(struct ixgbe_adapter
*adapter
)
6069 ixgbe_ptp_suspend(adapter
);
6071 if (adapter
->hw
.phy
.ops
.enter_lplu
) {
6072 adapter
->hw
.phy
.reset_disable
= true;
6073 ixgbe_down(adapter
);
6074 adapter
->hw
.phy
.ops
.enter_lplu(&adapter
->hw
);
6075 adapter
->hw
.phy
.reset_disable
= false;
6077 ixgbe_down(adapter
);
6080 ixgbe_free_irq(adapter
);
6082 ixgbe_free_all_tx_resources(adapter
);
6083 ixgbe_free_all_rx_resources(adapter
);
6087 * ixgbe_close - Disables a network interface
6088 * @netdev: network interface device structure
6090 * Returns 0, this is not allowed to fail
6092 * The close entry point is called when an interface is de-activated
6093 * by the OS. The hardware is still under the drivers control, but
6094 * needs to be disabled. A global MAC reset is issued to stop the
6095 * hardware, and all transmit and receive resources are freed.
6097 static int ixgbe_close(struct net_device
*netdev
)
6099 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6101 ixgbe_ptp_stop(adapter
);
6103 ixgbe_close_suspend(adapter
);
6105 ixgbe_fdir_filter_exit(adapter
);
6107 ixgbe_release_hw_control(adapter
);
6113 static int ixgbe_resume(struct pci_dev
*pdev
)
6115 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6116 struct net_device
*netdev
= adapter
->netdev
;
6119 adapter
->hw
.hw_addr
= adapter
->io_addr
;
6120 pci_set_power_state(pdev
, PCI_D0
);
6121 pci_restore_state(pdev
);
6123 * pci_restore_state clears dev->state_saved so call
6124 * pci_save_state to restore it.
6126 pci_save_state(pdev
);
6128 err
= pci_enable_device_mem(pdev
);
6130 e_dev_err("Cannot enable PCI device from suspend\n");
6133 smp_mb__before_atomic();
6134 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
6135 pci_set_master(pdev
);
6137 pci_wake_from_d3(pdev
, false);
6139 ixgbe_reset(adapter
);
6141 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6144 err
= ixgbe_init_interrupt_scheme(adapter
);
6145 if (!err
&& netif_running(netdev
))
6146 err
= ixgbe_open(netdev
);
6153 netif_device_attach(netdev
);
6157 #endif /* CONFIG_PM */
6159 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
6161 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6162 struct net_device
*netdev
= adapter
->netdev
;
6163 struct ixgbe_hw
*hw
= &adapter
->hw
;
6165 u32 wufc
= adapter
->wol
;
6170 netif_device_detach(netdev
);
6173 if (netif_running(netdev
))
6174 ixgbe_close_suspend(adapter
);
6177 ixgbe_clear_interrupt_scheme(adapter
);
6180 retval
= pci_save_state(pdev
);
6185 if (hw
->mac
.ops
.stop_link_on_d3
)
6186 hw
->mac
.ops
.stop_link_on_d3(hw
);
6189 ixgbe_set_rx_mode(netdev
);
6191 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6192 if (hw
->mac
.ops
.enable_tx_laser
)
6193 hw
->mac
.ops
.enable_tx_laser(hw
);
6195 /* turn on all-multi mode if wake on multicast is enabled */
6196 if (wufc
& IXGBE_WUFC_MC
) {
6197 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6198 fctrl
|= IXGBE_FCTRL_MPE
;
6199 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
6202 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
6203 ctrl
|= IXGBE_CTRL_GIO_DIS
;
6204 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
6206 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
6208 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
6209 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
6212 switch (hw
->mac
.type
) {
6213 case ixgbe_mac_82598EB
:
6214 pci_wake_from_d3(pdev
, false);
6216 case ixgbe_mac_82599EB
:
6217 case ixgbe_mac_X540
:
6218 case ixgbe_mac_X550
:
6219 case ixgbe_mac_X550EM_x
:
6220 pci_wake_from_d3(pdev
, !!wufc
);
6226 *enable_wake
= !!wufc
;
6227 if (hw
->phy
.ops
.set_phy_power
&& !*enable_wake
)
6228 hw
->phy
.ops
.set_phy_power(hw
, false);
6230 ixgbe_release_hw_control(adapter
);
6232 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
6233 pci_disable_device(pdev
);
6239 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
6244 retval
= __ixgbe_shutdown(pdev
, &wake
);
6249 pci_prepare_to_sleep(pdev
);
6251 pci_wake_from_d3(pdev
, false);
6252 pci_set_power_state(pdev
, PCI_D3hot
);
6257 #endif /* CONFIG_PM */
6259 static void ixgbe_shutdown(struct pci_dev
*pdev
)
6263 __ixgbe_shutdown(pdev
, &wake
);
6265 if (system_state
== SYSTEM_POWER_OFF
) {
6266 pci_wake_from_d3(pdev
, wake
);
6267 pci_set_power_state(pdev
, PCI_D3hot
);
6272 * ixgbe_update_stats - Update the board statistics counters.
6273 * @adapter: board private structure
6275 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
6277 struct net_device
*netdev
= adapter
->netdev
;
6278 struct ixgbe_hw
*hw
= &adapter
->hw
;
6279 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
6281 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
6282 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
6283 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
6284 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
6286 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6287 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6290 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
6293 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6294 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
6295 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
6297 adapter
->rsc_total_count
= rsc_count
;
6298 adapter
->rsc_total_flush
= rsc_flush
;
6301 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6302 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
6303 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
6304 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
6305 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
6306 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
6307 bytes
+= rx_ring
->stats
.bytes
;
6308 packets
+= rx_ring
->stats
.packets
;
6310 adapter
->non_eop_descs
= non_eop_descs
;
6311 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
6312 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
6313 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
6314 netdev
->stats
.rx_bytes
= bytes
;
6315 netdev
->stats
.rx_packets
= packets
;
6319 /* gather some stats to the adapter struct that are per queue */
6320 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6321 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6322 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
6323 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
6324 bytes
+= tx_ring
->stats
.bytes
;
6325 packets
+= tx_ring
->stats
.packets
;
6327 adapter
->restart_queue
= restart_queue
;
6328 adapter
->tx_busy
= tx_busy
;
6329 netdev
->stats
.tx_bytes
= bytes
;
6330 netdev
->stats
.tx_packets
= packets
;
6332 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
6334 /* 8 register reads */
6335 for (i
= 0; i
< 8; i
++) {
6336 /* for packet buffers not used, the register should read 0 */
6337 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
6339 hwstats
->mpc
[i
] += mpc
;
6340 total_mpc
+= hwstats
->mpc
[i
];
6341 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
6342 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
6343 switch (hw
->mac
.type
) {
6344 case ixgbe_mac_82598EB
:
6345 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
6346 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
6347 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
6348 hwstats
->pxonrxc
[i
] +=
6349 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
6351 case ixgbe_mac_82599EB
:
6352 case ixgbe_mac_X540
:
6353 case ixgbe_mac_X550
:
6354 case ixgbe_mac_X550EM_x
:
6355 hwstats
->pxonrxc
[i
] +=
6356 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
6363 /*16 register reads */
6364 for (i
= 0; i
< 16; i
++) {
6365 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
6366 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
6367 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
6368 (hw
->mac
.type
== ixgbe_mac_X540
) ||
6369 (hw
->mac
.type
== ixgbe_mac_X550
) ||
6370 (hw
->mac
.type
== ixgbe_mac_X550EM_x
)) {
6371 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
6372 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
6373 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
6374 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
6378 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
6379 /* work around hardware counting issue */
6380 hwstats
->gprc
-= missed_rx
;
6382 ixgbe_update_xoff_received(adapter
);
6384 /* 82598 hardware only has a 32 bit counter in the high register */
6385 switch (hw
->mac
.type
) {
6386 case ixgbe_mac_82598EB
:
6387 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
6388 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
6389 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
6390 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
6392 case ixgbe_mac_X540
:
6393 case ixgbe_mac_X550
:
6394 case ixgbe_mac_X550EM_x
:
6395 /* OS2BMC stats are X540 and later */
6396 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
6397 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
6398 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
6399 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
6400 case ixgbe_mac_82599EB
:
6401 for (i
= 0; i
< 16; i
++)
6402 adapter
->hw_rx_no_dma_resources
+=
6403 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
6404 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
6405 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
6406 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
6407 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
6408 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
6409 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
6410 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
6411 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
6412 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
6414 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
6415 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
6416 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
6417 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
6418 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
6419 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
6420 /* Add up per cpu counters for total ddp aloc fail */
6421 if (adapter
->fcoe
.ddp_pool
) {
6422 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
6423 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
6425 u64 noddp
= 0, noddp_ext_buff
= 0;
6426 for_each_possible_cpu(cpu
) {
6427 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
6428 noddp
+= ddp_pool
->noddp
;
6429 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
6431 hwstats
->fcoe_noddp
= noddp
;
6432 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
6434 #endif /* IXGBE_FCOE */
6439 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
6440 hwstats
->bprc
+= bprc
;
6441 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
6442 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6443 hwstats
->mprc
-= bprc
;
6444 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
6445 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
6446 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
6447 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
6448 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
6449 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
6450 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
6451 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
6452 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
6453 hwstats
->lxontxc
+= lxon
;
6454 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
6455 hwstats
->lxofftxc
+= lxoff
;
6456 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
6457 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
6459 * 82598 errata - tx of flow control packets is included in tx counters
6461 xon_off_tot
= lxon
+ lxoff
;
6462 hwstats
->gptc
-= xon_off_tot
;
6463 hwstats
->mptc
-= xon_off_tot
;
6464 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
6465 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
6466 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
6467 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
6468 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
6469 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
6470 hwstats
->ptc64
-= xon_off_tot
;
6471 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
6472 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
6473 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
6474 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
6475 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
6476 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
6478 /* Fill out the OS statistics structure */
6479 netdev
->stats
.multicast
= hwstats
->mprc
;
6482 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
6483 netdev
->stats
.rx_dropped
= 0;
6484 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
6485 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
6486 netdev
->stats
.rx_missed_errors
= total_mpc
;
6490 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6491 * @adapter: pointer to the device adapter structure
6493 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
6495 struct ixgbe_hw
*hw
= &adapter
->hw
;
6498 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
6501 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
6503 /* if interface is down do nothing */
6504 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6507 /* do nothing if we are not using signature filters */
6508 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
6511 adapter
->fdir_overflow
++;
6513 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
6514 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6515 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
6516 &(adapter
->tx_ring
[i
]->state
));
6517 /* re-enable flow director interrupts */
6518 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
6520 e_err(probe
, "failed to finish FDIR re-initialization, "
6521 "ignored adding FDIR ATR filters\n");
6526 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6527 * @adapter: pointer to the device adapter structure
6529 * This function serves two purposes. First it strobes the interrupt lines
6530 * in order to make certain interrupts are occurring. Secondly it sets the
6531 * bits needed to check for TX hangs. As a result we should immediately
6532 * determine if a hang has occurred.
6534 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
6536 struct ixgbe_hw
*hw
= &adapter
->hw
;
6540 /* If we're down, removing or resetting, just bail */
6541 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6542 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6543 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6546 /* Force detection of hung controller */
6547 if (netif_carrier_ok(adapter
->netdev
)) {
6548 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6549 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
6552 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6554 * for legacy and MSI interrupts don't set any bits
6555 * that are enabled for EIAM, because this operation
6556 * would set *both* EIMS and EICS for any bit in EIAM
6558 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
6559 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
6561 /* get one bit for every active tx/rx interrupt vector */
6562 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
6563 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
6564 if (qv
->rx
.ring
|| qv
->tx
.ring
)
6565 eics
|= ((u64
)1 << i
);
6569 /* Cause software interrupt to ensure rings are cleaned */
6570 ixgbe_irq_rearm_queues(adapter
, eics
);
6574 * ixgbe_watchdog_update_link - update the link status
6575 * @adapter: pointer to the device adapter structure
6576 * @link_speed: pointer to a u32 to store the link_speed
6578 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
6580 struct ixgbe_hw
*hw
= &adapter
->hw
;
6581 u32 link_speed
= adapter
->link_speed
;
6582 bool link_up
= adapter
->link_up
;
6583 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
6585 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6588 if (hw
->mac
.ops
.check_link
) {
6589 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
6591 /* always assume link is up, if no check link function */
6592 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6596 if (adapter
->ixgbe_ieee_pfc
)
6597 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
6599 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
6600 hw
->mac
.ops
.fc_enable(hw
);
6601 ixgbe_set_rx_drop_en(adapter
);
6605 time_after(jiffies
, (adapter
->link_check_timeout
+
6606 IXGBE_TRY_LINK_TIMEOUT
))) {
6607 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6608 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
6609 IXGBE_WRITE_FLUSH(hw
);
6612 adapter
->link_up
= link_up
;
6613 adapter
->link_speed
= link_speed
;
6616 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
6618 #ifdef CONFIG_IXGBE_DCB
6619 struct net_device
*netdev
= adapter
->netdev
;
6620 struct dcb_app app
= {
6621 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6626 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6627 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6629 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6634 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6635 * print link up message
6636 * @adapter: pointer to the device adapter structure
6638 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6640 struct net_device
*netdev
= adapter
->netdev
;
6641 struct ixgbe_hw
*hw
= &adapter
->hw
;
6642 struct net_device
*upper
;
6643 struct list_head
*iter
;
6644 u32 link_speed
= adapter
->link_speed
;
6645 const char *speed_str
;
6646 bool flow_rx
, flow_tx
;
6648 /* only continue if link was previously down */
6649 if (netif_carrier_ok(netdev
))
6652 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6654 switch (hw
->mac
.type
) {
6655 case ixgbe_mac_82598EB
: {
6656 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6657 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6658 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6659 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6662 case ixgbe_mac_X540
:
6663 case ixgbe_mac_X550
:
6664 case ixgbe_mac_X550EM_x
:
6665 case ixgbe_mac_82599EB
: {
6666 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6667 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6668 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6669 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6678 adapter
->last_rx_ptp_check
= jiffies
;
6680 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6681 ixgbe_ptp_start_cyclecounter(adapter
);
6683 switch (link_speed
) {
6684 case IXGBE_LINK_SPEED_10GB_FULL
:
6685 speed_str
= "10 Gbps";
6687 case IXGBE_LINK_SPEED_2_5GB_FULL
:
6688 speed_str
= "2.5 Gbps";
6690 case IXGBE_LINK_SPEED_1GB_FULL
:
6691 speed_str
= "1 Gbps";
6693 case IXGBE_LINK_SPEED_100_FULL
:
6694 speed_str
= "100 Mbps";
6697 speed_str
= "unknown speed";
6700 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n", speed_str
,
6701 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6703 (flow_tx
? "TX" : "None"))));
6705 netif_carrier_on(netdev
);
6706 ixgbe_check_vf_rate_limit(adapter
);
6708 /* enable transmits */
6709 netif_tx_wake_all_queues(adapter
->netdev
);
6711 /* enable any upper devices */
6713 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
6714 if (netif_is_macvlan(upper
)) {
6715 struct macvlan_dev
*vlan
= netdev_priv(upper
);
6718 netif_tx_wake_all_queues(upper
);
6723 /* update the default user priority for VFs */
6724 ixgbe_update_default_up(adapter
);
6726 /* ping all the active vfs to let them know link has changed */
6727 ixgbe_ping_all_vfs(adapter
);
6731 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6732 * print link down message
6733 * @adapter: pointer to the adapter structure
6735 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6737 struct net_device
*netdev
= adapter
->netdev
;
6738 struct ixgbe_hw
*hw
= &adapter
->hw
;
6740 adapter
->link_up
= false;
6741 adapter
->link_speed
= 0;
6743 /* only continue if link was up previously */
6744 if (!netif_carrier_ok(netdev
))
6747 /* poll for SFP+ cable when link is down */
6748 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6749 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6751 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6752 ixgbe_ptp_start_cyclecounter(adapter
);
6754 e_info(drv
, "NIC Link is Down\n");
6755 netif_carrier_off(netdev
);
6757 /* ping all the active vfs to let them know link has changed */
6758 ixgbe_ping_all_vfs(adapter
);
6761 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter
*adapter
)
6765 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6766 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6768 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
)
6775 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter
*adapter
)
6777 struct ixgbe_hw
*hw
= &adapter
->hw
;
6778 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
6779 u32 q_per_pool
= __ALIGN_MASK(1, ~vmdq
->mask
);
6783 if (!adapter
->num_vfs
)
6786 /* resetting the PF is only needed for MAC before X550 */
6787 if (hw
->mac
.type
>= ixgbe_mac_X550
)
6790 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
6791 for (j
= 0; j
< q_per_pool
; j
++) {
6794 h
= IXGBE_READ_REG(hw
, IXGBE_PVFTDHN(q_per_pool
, i
, j
));
6795 t
= IXGBE_READ_REG(hw
, IXGBE_PVFTDTN(q_per_pool
, i
, j
));
6806 * ixgbe_watchdog_flush_tx - flush queues on link down
6807 * @adapter: pointer to the device adapter structure
6809 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6811 if (!netif_carrier_ok(adapter
->netdev
)) {
6812 if (ixgbe_ring_tx_pending(adapter
) ||
6813 ixgbe_vf_tx_pending(adapter
)) {
6814 /* We've lost link, so the controller stops DMA,
6815 * but we've got queued Tx work that's never going
6816 * to get done, so reset controller to flush Tx.
6817 * (Do the reset outside of interrupt context).
6819 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6820 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6825 #ifdef CONFIG_PCI_IOV
6826 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter
*adapter
,
6827 struct pci_dev
*vfdev
)
6829 if (!pci_wait_for_pending_transaction(vfdev
))
6830 e_dev_warn("Issuing VFLR with pending transactions\n");
6832 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev
));
6833 pcie_capability_set_word(vfdev
, PCI_EXP_DEVCTL
, PCI_EXP_DEVCTL_BCR_FLR
);
6838 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6840 struct ixgbe_hw
*hw
= &adapter
->hw
;
6841 struct pci_dev
*pdev
= adapter
->pdev
;
6845 if (!(netif_carrier_ok(adapter
->netdev
)))
6848 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6849 if (gpc
) /* If incrementing then no need for the check below */
6851 /* Check to see if a bad DMA write target from an errant or
6852 * malicious VF has caused a PCIe error. If so then we can
6853 * issue a VFLR to the offending VF(s) and then resume without
6854 * requesting a full slot reset.
6860 /* check status reg for all VFs owned by this PF */
6861 for (vf
= 0; vf
< adapter
->num_vfs
; ++vf
) {
6862 struct pci_dev
*vfdev
= adapter
->vfinfo
[vf
].vfdev
;
6867 pci_read_config_word(vfdev
, PCI_STATUS
, &status_reg
);
6868 if (status_reg
!= IXGBE_FAILED_READ_CFG_WORD
&&
6869 status_reg
& PCI_STATUS_REC_MASTER_ABORT
)
6870 ixgbe_issue_vf_flr(adapter
, vfdev
);
6874 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
6878 /* Do not perform spoof check for 82598 or if not in IOV mode */
6879 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
6880 adapter
->num_vfs
== 0)
6883 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
6886 * ssvpc register is cleared on read, if zero then no
6887 * spoofed packets in the last interval.
6892 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
6895 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused
*adapter
)
6900 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused
*adapter
)
6903 #endif /* CONFIG_PCI_IOV */
6907 * ixgbe_watchdog_subtask - check and bring link up
6908 * @adapter: pointer to the device adapter structure
6910 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
6912 /* if interface is down, removing or resetting, do nothing */
6913 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6914 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6915 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6918 ixgbe_watchdog_update_link(adapter
);
6920 if (adapter
->link_up
)
6921 ixgbe_watchdog_link_is_up(adapter
);
6923 ixgbe_watchdog_link_is_down(adapter
);
6925 ixgbe_check_for_bad_vf(adapter
);
6926 ixgbe_spoof_check(adapter
);
6927 ixgbe_update_stats(adapter
);
6929 ixgbe_watchdog_flush_tx(adapter
);
6933 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6934 * @adapter: the ixgbe adapter structure
6936 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
6938 struct ixgbe_hw
*hw
= &adapter
->hw
;
6941 /* not searching for SFP so there is nothing to do here */
6942 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
6943 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6946 if (adapter
->sfp_poll_time
&&
6947 time_after(adapter
->sfp_poll_time
, jiffies
))
6948 return; /* If not yet time to poll for SFP */
6950 /* someone else is in init, wait until next service event */
6951 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6954 adapter
->sfp_poll_time
= jiffies
+ IXGBE_SFP_POLL_JIFFIES
- 1;
6956 err
= hw
->phy
.ops
.identify_sfp(hw
);
6957 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6960 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
6961 /* If no cable is present, then we need to reset
6962 * the next time we find a good cable. */
6963 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
6970 /* exit if reset not needed */
6971 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6974 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
6977 * A module may be identified correctly, but the EEPROM may not have
6978 * support for that module. setup_sfp() will fail in that case, so
6979 * we should not allow that module to load.
6981 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6982 err
= hw
->phy
.ops
.reset(hw
);
6984 err
= hw
->mac
.ops
.setup_sfp(hw
);
6986 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6989 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
6990 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
6993 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6995 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
6996 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
6997 e_dev_err("failed to initialize because an unsupported "
6998 "SFP+ module type was detected.\n");
6999 e_dev_err("Reload the driver after installing a "
7000 "supported module.\n");
7001 unregister_netdev(adapter
->netdev
);
7006 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7007 * @adapter: the ixgbe adapter structure
7009 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
7011 struct ixgbe_hw
*hw
= &adapter
->hw
;
7013 bool autoneg
= false;
7015 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
7018 /* someone else is in init, wait until next service event */
7019 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7022 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
7024 speed
= hw
->phy
.autoneg_advertised
;
7025 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
7026 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
7028 /* setup the highest link when no autoneg */
7030 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
7031 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
7035 if (hw
->mac
.ops
.setup_link
)
7036 hw
->mac
.ops
.setup_link(hw
, speed
, true);
7038 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
7039 adapter
->link_check_timeout
= jiffies
;
7040 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7044 * ixgbe_service_timer - Timer Call-back
7045 * @data: pointer to adapter cast into an unsigned long
7047 static void ixgbe_service_timer(unsigned long data
)
7049 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
7050 unsigned long next_event_offset
;
7052 /* poll faster when waiting for link */
7053 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
7054 next_event_offset
= HZ
/ 10;
7056 next_event_offset
= HZ
* 2;
7058 /* Reset the timer */
7059 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
7061 ixgbe_service_event_schedule(adapter
);
7064 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter
*adapter
)
7066 struct ixgbe_hw
*hw
= &adapter
->hw
;
7069 if (!(adapter
->flags2
& IXGBE_FLAG2_PHY_INTERRUPT
))
7072 adapter
->flags2
&= ~IXGBE_FLAG2_PHY_INTERRUPT
;
7074 if (!hw
->phy
.ops
.handle_lasi
)
7077 status
= hw
->phy
.ops
.handle_lasi(&adapter
->hw
);
7078 if (status
!= IXGBE_ERR_OVERTEMP
)
7081 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
7084 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
7086 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
7089 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
7091 /* If we're already down, removing or resetting, just bail */
7092 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7093 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7094 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7097 ixgbe_dump(adapter
);
7098 netdev_err(adapter
->netdev
, "Reset adapter\n");
7099 adapter
->tx_timeout_count
++;
7102 ixgbe_reinit_locked(adapter
);
7107 * ixgbe_service_task - manages and runs subtasks
7108 * @work: pointer to work_struct containing our data
7110 static void ixgbe_service_task(struct work_struct
*work
)
7112 struct ixgbe_adapter
*adapter
= container_of(work
,
7113 struct ixgbe_adapter
,
7115 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
7116 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
7118 ixgbe_down(adapter
);
7121 ixgbe_service_event_complete(adapter
);
7124 #ifdef CONFIG_IXGBE_VXLAN
7125 if (adapter
->flags2
& IXGBE_FLAG2_VXLAN_REREG_NEEDED
) {
7126 adapter
->flags2
&= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
7127 vxlan_get_rx_port(adapter
->netdev
);
7129 #endif /* CONFIG_IXGBE_VXLAN */
7130 ixgbe_reset_subtask(adapter
);
7131 ixgbe_phy_interrupt_subtask(adapter
);
7132 ixgbe_sfp_detection_subtask(adapter
);
7133 ixgbe_sfp_link_config_subtask(adapter
);
7134 ixgbe_check_overtemp_subtask(adapter
);
7135 ixgbe_watchdog_subtask(adapter
);
7136 ixgbe_fdir_reinit_subtask(adapter
);
7137 ixgbe_check_hang_subtask(adapter
);
7139 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
7140 ixgbe_ptp_overflow_check(adapter
);
7141 ixgbe_ptp_rx_hang(adapter
);
7144 ixgbe_service_event_complete(adapter
);
7147 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
7148 struct ixgbe_tx_buffer
*first
,
7151 struct sk_buff
*skb
= first
->skb
;
7152 u32 vlan_macip_lens
, type_tucmd
;
7153 u32 mss_l4len_idx
, l4len
;
7156 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
7159 if (!skb_is_gso(skb
))
7162 err
= skb_cow_head(skb
, 0);
7166 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7167 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7169 if (first
->protocol
== htons(ETH_P_IP
)) {
7170 struct iphdr
*iph
= ip_hdr(skb
);
7173 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
7177 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
7178 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7179 IXGBE_TX_FLAGS_CSUM
|
7180 IXGBE_TX_FLAGS_IPV4
;
7181 } else if (skb_is_gso_v6(skb
)) {
7182 ipv6_hdr(skb
)->payload_len
= 0;
7183 tcp_hdr(skb
)->check
=
7184 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
7185 &ipv6_hdr(skb
)->daddr
,
7187 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7188 IXGBE_TX_FLAGS_CSUM
;
7191 /* compute header lengths */
7192 l4len
= tcp_hdrlen(skb
);
7193 *hdr_len
= skb_transport_offset(skb
) + l4len
;
7195 /* update gso size and bytecount with header size */
7196 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
7197 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
7199 /* mss_l4len_id: use 0 as index for TSO */
7200 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
7201 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
7203 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7204 vlan_macip_lens
= skb_network_header_len(skb
);
7205 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
7206 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7208 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
7214 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
7215 struct ixgbe_tx_buffer
*first
)
7217 struct sk_buff
*skb
= first
->skb
;
7218 u32 vlan_macip_lens
= 0;
7219 u32 mss_l4len_idx
= 0;
7222 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
7223 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
7224 !(first
->tx_flags
& IXGBE_TX_FLAGS_CC
))
7226 vlan_macip_lens
= skb_network_offset(skb
) <<
7227 IXGBE_ADVTXD_MACLEN_SHIFT
;
7232 struct ipv6hdr
*ipv6
;
7236 struct tcphdr
*tcphdr
;
7241 if (skb
->encapsulation
) {
7242 network_hdr
.raw
= skb_inner_network_header(skb
);
7243 transport_hdr
.raw
= skb_inner_transport_header(skb
);
7244 vlan_macip_lens
= skb_inner_network_offset(skb
) <<
7245 IXGBE_ADVTXD_MACLEN_SHIFT
;
7247 network_hdr
.raw
= skb_network_header(skb
);
7248 transport_hdr
.raw
= skb_transport_header(skb
);
7249 vlan_macip_lens
= skb_network_offset(skb
) <<
7250 IXGBE_ADVTXD_MACLEN_SHIFT
;
7253 /* use first 4 bits to determine IP version */
7254 switch (network_hdr
.ipv4
->version
) {
7256 vlan_macip_lens
|= transport_hdr
.raw
- network_hdr
.raw
;
7257 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
7258 l4_hdr
= network_hdr
.ipv4
->protocol
;
7261 vlan_macip_lens
|= transport_hdr
.raw
- network_hdr
.raw
;
7262 l4_hdr
= network_hdr
.ipv6
->nexthdr
;
7263 if (likely((transport_hdr
.raw
- network_hdr
.raw
) ==
7264 sizeof(struct ipv6hdr
)))
7266 ipv6_skip_exthdr(skb
, network_hdr
.raw
- skb
->data
+
7267 sizeof(struct ipv6hdr
),
7268 &l4_hdr
, &frag_off
);
7269 if (unlikely(frag_off
))
7270 l4_hdr
= NEXTHDR_FRAGMENT
;
7278 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7279 mss_l4len_idx
= (transport_hdr
.tcphdr
->doff
* 4) <<
7280 IXGBE_ADVTXD_L4LEN_SHIFT
;
7283 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
7284 mss_l4len_idx
= sizeof(struct sctphdr
) <<
7285 IXGBE_ADVTXD_L4LEN_SHIFT
;
7288 mss_l4len_idx
= sizeof(struct udphdr
) <<
7289 IXGBE_ADVTXD_L4LEN_SHIFT
;
7292 if (unlikely(net_ratelimit())) {
7293 dev_warn(tx_ring
->dev
,
7294 "partial checksum, version=%d, l4 proto=%x\n",
7295 network_hdr
.ipv4
->version
, l4_hdr
);
7297 skb_checksum_help(skb
);
7301 /* update TX checksum flag */
7302 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
7306 /* vlan_macip_lens: MACLEN, VLAN tag */
7307 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7309 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
7310 type_tucmd
, mss_l4len_idx
);
7313 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7314 ((_flag <= _result) ? \
7315 ((u32)(_input & _flag) * (_result / _flag)) : \
7316 ((u32)(_input & _flag) / (_flag / _result)))
7318 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
7320 /* set type for advanced descriptor with frame checksum insertion */
7321 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
7322 IXGBE_ADVTXD_DCMD_DEXT
|
7323 IXGBE_ADVTXD_DCMD_IFCS
;
7325 /* set HW vlan bit if vlan is present */
7326 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
7327 IXGBE_ADVTXD_DCMD_VLE
);
7329 /* set segmentation enable bits for TSO/FSO */
7330 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
7331 IXGBE_ADVTXD_DCMD_TSE
);
7333 /* set timestamp bit if present */
7334 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
7335 IXGBE_ADVTXD_MAC_TSTAMP
);
7337 /* insert frame checksum */
7338 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
7343 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
7344 u32 tx_flags
, unsigned int paylen
)
7346 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
7348 /* enable L4 checksum for TSO and TX checksum offload */
7349 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7350 IXGBE_TX_FLAGS_CSUM
,
7351 IXGBE_ADVTXD_POPTS_TXSM
);
7353 /* enble IPv4 checksum for TSO */
7354 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7355 IXGBE_TX_FLAGS_IPV4
,
7356 IXGBE_ADVTXD_POPTS_IXSM
);
7359 * Check Context must be set if Tx switch is enabled, which it
7360 * always is for case where virtual functions are running
7362 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7366 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
7369 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7371 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7373 /* Herbert's original patch had:
7374 * smp_mb__after_netif_stop_queue();
7375 * but since that doesn't exist yet, just open code it.
7379 /* We need to check again in a case another CPU has just
7380 * made room available.
7382 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
7385 /* A reprieve! - use start_queue because it doesn't call schedule */
7386 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7387 ++tx_ring
->tx_stats
.restart_queue
;
7391 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7393 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
7396 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
7399 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7402 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
7403 struct ixgbe_tx_buffer
*first
,
7406 struct sk_buff
*skb
= first
->skb
;
7407 struct ixgbe_tx_buffer
*tx_buffer
;
7408 union ixgbe_adv_tx_desc
*tx_desc
;
7409 struct skb_frag_struct
*frag
;
7411 unsigned int data_len
, size
;
7412 u32 tx_flags
= first
->tx_flags
;
7413 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
7414 u16 i
= tx_ring
->next_to_use
;
7416 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
7418 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
7420 size
= skb_headlen(skb
);
7421 data_len
= skb
->data_len
;
7424 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
7425 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
7426 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
7429 data_len
-= sizeof(struct fcoe_crc_eof
);
7434 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
7438 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
7439 if (dma_mapping_error(tx_ring
->dev
, dma
))
7442 /* record length, and DMA address */
7443 dma_unmap_len_set(tx_buffer
, len
, size
);
7444 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
7446 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7448 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
7449 tx_desc
->read
.cmd_type_len
=
7450 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
7454 if (i
== tx_ring
->count
) {
7455 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7458 tx_desc
->read
.olinfo_status
= 0;
7460 dma
+= IXGBE_MAX_DATA_PER_TXD
;
7461 size
-= IXGBE_MAX_DATA_PER_TXD
;
7463 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7466 if (likely(!data_len
))
7469 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
7473 if (i
== tx_ring
->count
) {
7474 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7477 tx_desc
->read
.olinfo_status
= 0;
7480 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
7482 size
= skb_frag_size(frag
);
7486 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
7489 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7492 /* write last descriptor with RS and EOP bits */
7493 cmd_type
|= size
| IXGBE_TXD_CMD
;
7494 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
7496 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
7498 /* set the timestamp */
7499 first
->time_stamp
= jiffies
;
7502 * Force memory writes to complete before letting h/w know there
7503 * are new descriptors to fetch. (Only applicable for weak-ordered
7504 * memory model archs, such as IA-64).
7506 * We also need this memory barrier to make certain all of the
7507 * status bits have been updated before next_to_watch is written.
7511 /* set next_to_watch value indicating a packet is present */
7512 first
->next_to_watch
= tx_desc
;
7515 if (i
== tx_ring
->count
)
7518 tx_ring
->next_to_use
= i
;
7520 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7522 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
7523 writel(i
, tx_ring
->tail
);
7525 /* we need this if more than one processor can write to our tail
7526 * at a time, it synchronizes IO on IA64/Altix systems
7533 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
7535 /* clear dma mappings for failed tx_buffer_info map */
7537 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7538 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
7539 if (tx_buffer
== first
)
7546 tx_ring
->next_to_use
= i
;
7549 static void ixgbe_atr(struct ixgbe_ring
*ring
,
7550 struct ixgbe_tx_buffer
*first
)
7552 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
7553 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
7554 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
7556 unsigned char *network
;
7558 struct ipv6hdr
*ipv6
;
7561 struct sk_buff
*skb
;
7564 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7568 /* do nothing if sampling is disabled */
7569 if (!ring
->atr_sample_rate
)
7574 /* snag network header to get L4 type and address */
7576 hdr
.network
= skb_network_header(skb
);
7578 #ifdef CONFIG_IXGBE_VXLAN
7579 if (skb
->encapsulation
&&
7580 first
->protocol
== htons(ETH_P_IP
) &&
7581 hdr
.ipv4
->protocol
!= IPPROTO_UDP
) {
7582 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
7584 /* verify the port is recognized as VXLAN */
7585 if (adapter
->vxlan_port
&&
7586 udp_hdr(skb
)->dest
== adapter
->vxlan_port
) {
7587 hdr
.network
= skb_inner_network_header(skb
);
7588 th
= inner_tcp_hdr(skb
);
7591 #endif /* CONFIG_IXGBE_VXLAN */
7593 /* Currently only IPv4/IPv6 with TCP is supported */
7594 switch (hdr
.ipv4
->version
) {
7596 if (hdr
.ipv4
->protocol
!= IPPROTO_TCP
)
7600 if (likely((unsigned char *)th
- hdr
.network
==
7601 sizeof(struct ipv6hdr
))) {
7602 if (hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
)
7608 ipv6_skip_exthdr(skb
, hdr
.network
- skb
->data
+
7609 sizeof(struct ipv6hdr
),
7610 &l4_hdr
, &frag_off
);
7611 if (unlikely(frag_off
))
7613 if (l4_hdr
!= IPPROTO_TCP
)
7621 /* skip this packet since it is invalid or the socket is closing */
7625 /* sample on all syn packets or once every atr sample count */
7626 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
7629 /* reset sample count */
7630 ring
->atr_count
= 0;
7632 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
7635 * src and dst are inverted, think how the receiver sees them
7637 * The input is broken into two sections, a non-compressed section
7638 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7639 * is XORed together and stored in the compressed dword.
7641 input
.formatted
.vlan_id
= vlan_id
;
7644 * since src port and flex bytes occupy the same word XOR them together
7645 * and write the value to source port portion of compressed dword
7647 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
7648 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
7650 common
.port
.src
^= th
->dest
^ first
->protocol
;
7651 common
.port
.dst
^= th
->source
;
7653 switch (hdr
.ipv4
->version
) {
7655 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
7656 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
7659 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
7660 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
7661 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
7662 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
7663 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
7664 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
7665 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
7666 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
7667 hdr
.ipv6
->daddr
.s6_addr32
[3];
7673 if (hdr
.network
!= skb_network_header(skb
))
7674 input
.formatted
.flow_type
|= IXGBE_ATR_L4TYPE_TUNNEL_MASK
;
7676 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7677 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
7678 input
, common
, ring
->queue_index
);
7681 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
7682 void *accel_priv
, select_queue_fallback_t fallback
)
7684 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
7686 struct ixgbe_adapter
*adapter
;
7687 struct ixgbe_ring_feature
*f
;
7692 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
7697 * only execute the code below if protocol is FCoE
7698 * or FIP and we have FCoE enabled on the adapter
7700 switch (vlan_get_protocol(skb
)) {
7701 case htons(ETH_P_FCOE
):
7702 case htons(ETH_P_FIP
):
7703 adapter
= netdev_priv(dev
);
7705 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7708 return fallback(dev
, skb
);
7711 f
= &adapter
->ring_feature
[RING_F_FCOE
];
7713 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
7716 while (txq
>= f
->indices
)
7719 return txq
+ f
->offset
;
7721 return fallback(dev
, skb
);
7725 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
7726 struct ixgbe_adapter
*adapter
,
7727 struct ixgbe_ring
*tx_ring
)
7729 struct ixgbe_tx_buffer
*first
;
7733 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
7734 __be16 protocol
= skb
->protocol
;
7738 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7739 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7740 * + 2 desc gap to keep tail from touching head,
7741 * + 1 desc for context descriptor,
7742 * otherwise try next time
7744 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
7745 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
7747 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
7748 tx_ring
->tx_stats
.tx_busy
++;
7749 return NETDEV_TX_BUSY
;
7752 /* record the location of the first descriptor for this packet */
7753 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
7755 first
->bytecount
= skb
->len
;
7756 first
->gso_segs
= 1;
7758 /* if we have a HW VLAN tag being added default to the HW one */
7759 if (skb_vlan_tag_present(skb
)) {
7760 tx_flags
|= skb_vlan_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
7761 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7762 /* else if it is a SW VLAN check the next protocol and store the tag */
7763 } else if (protocol
== htons(ETH_P_8021Q
)) {
7764 struct vlan_hdr
*vhdr
, _vhdr
;
7765 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
7769 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
7770 IXGBE_TX_FLAGS_VLAN_SHIFT
;
7771 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
7773 protocol
= vlan_get_protocol(skb
);
7775 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
7776 adapter
->ptp_clock
&&
7777 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
7779 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
7780 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
7782 /* schedule check for Tx timestamp */
7783 adapter
->ptp_tx_skb
= skb_get(skb
);
7784 adapter
->ptp_tx_start
= jiffies
;
7785 schedule_work(&adapter
->ptp_tx_work
);
7788 skb_tx_timestamp(skb
);
7790 #ifdef CONFIG_PCI_IOV
7792 * Use the l2switch_enable flag - would be false if the DMA
7793 * Tx switch had been disabled.
7795 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7796 tx_flags
|= IXGBE_TX_FLAGS_CC
;
7799 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7800 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7801 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7802 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7803 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7804 tx_flags
|= (skb
->priority
& 0x7) <<
7805 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7806 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7807 struct vlan_ethhdr
*vhdr
;
7809 if (skb_cow_head(skb
, 0))
7811 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7812 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7813 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7815 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7819 /* record initial flags and protocol */
7820 first
->tx_flags
= tx_flags
;
7821 first
->protocol
= protocol
;
7824 /* setup tx offload for FCoE */
7825 if ((protocol
== htons(ETH_P_FCOE
)) &&
7826 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7827 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7834 #endif /* IXGBE_FCOE */
7835 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7839 ixgbe_tx_csum(tx_ring
, first
);
7841 /* add the ATR filter if ATR is on */
7842 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7843 ixgbe_atr(tx_ring
, first
);
7847 #endif /* IXGBE_FCOE */
7848 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7850 return NETDEV_TX_OK
;
7853 dev_kfree_skb_any(first
->skb
);
7856 return NETDEV_TX_OK
;
7859 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7860 struct net_device
*netdev
,
7861 struct ixgbe_ring
*ring
)
7863 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7864 struct ixgbe_ring
*tx_ring
;
7867 * The minimum packet size for olinfo paylen is 17 so pad the skb
7868 * in order to meet this minimum size requirement.
7870 if (skb_put_padto(skb
, 17))
7871 return NETDEV_TX_OK
;
7873 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7875 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7878 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7879 struct net_device
*netdev
)
7881 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7885 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7886 * @netdev: network interface device structure
7887 * @p: pointer to an address structure
7889 * Returns 0 on success, negative on failure
7891 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
7893 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7894 struct ixgbe_hw
*hw
= &adapter
->hw
;
7895 struct sockaddr
*addr
= p
;
7897 if (!is_valid_ether_addr(addr
->sa_data
))
7898 return -EADDRNOTAVAIL
;
7900 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
7901 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
7903 ixgbe_mac_set_default_filter(adapter
);
7909 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
7911 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7912 struct ixgbe_hw
*hw
= &adapter
->hw
;
7916 if (prtad
!= hw
->phy
.mdio
.prtad
)
7918 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
7924 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
7925 u16 addr
, u16 value
)
7927 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7928 struct ixgbe_hw
*hw
= &adapter
->hw
;
7930 if (prtad
!= hw
->phy
.mdio
.prtad
)
7932 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
7935 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
7937 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7941 return ixgbe_ptp_set_ts_config(adapter
, req
);
7943 return ixgbe_ptp_get_ts_config(adapter
, req
);
7945 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
7950 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7952 * @netdev: network interface device structure
7954 * Returns non-zero on failure
7956 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
7959 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7960 struct ixgbe_hw
*hw
= &adapter
->hw
;
7962 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
7964 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
7967 /* update SAN MAC vmdq pool selection */
7968 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
7974 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7976 * @netdev: network interface device structure
7978 * Returns non-zero on failure
7980 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
7983 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7984 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
7986 if (is_valid_ether_addr(mac
->san_addr
)) {
7988 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
7994 #ifdef CONFIG_NET_POLL_CONTROLLER
7996 * Polling 'interrupt' - used by things like netconsole to send skbs
7997 * without having to re-enable interrupts. It's not called while
7998 * the interrupt routine is executing.
8000 static void ixgbe_netpoll(struct net_device
*netdev
)
8002 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8005 /* if interface is down do nothing */
8006 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
8009 /* loop through and schedule all active queues */
8010 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
8011 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
8015 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
8016 struct rtnl_link_stats64
*stats
)
8018 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8022 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
8023 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
8029 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8030 packets
= ring
->stats
.packets
;
8031 bytes
= ring
->stats
.bytes
;
8032 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8033 stats
->rx_packets
+= packets
;
8034 stats
->rx_bytes
+= bytes
;
8038 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
8039 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
8045 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8046 packets
= ring
->stats
.packets
;
8047 bytes
= ring
->stats
.bytes
;
8048 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8049 stats
->tx_packets
+= packets
;
8050 stats
->tx_bytes
+= bytes
;
8054 /* following stats updated by ixgbe_watchdog_task() */
8055 stats
->multicast
= netdev
->stats
.multicast
;
8056 stats
->rx_errors
= netdev
->stats
.rx_errors
;
8057 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
8058 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
8059 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
8063 #ifdef CONFIG_IXGBE_DCB
8065 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8066 * @adapter: pointer to ixgbe_adapter
8067 * @tc: number of traffic classes currently enabled
8069 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8070 * 802.1Q priority maps to a packet buffer that exists.
8072 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
8074 struct ixgbe_hw
*hw
= &adapter
->hw
;
8078 /* 82598 have a static priority to TC mapping that can not
8079 * be changed so no validation is needed.
8081 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
8084 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
8087 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
8088 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
8090 /* If up2tc is out of bounds default to zero */
8092 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
8096 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
8102 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8103 * @adapter: Pointer to adapter struct
8105 * Populate the netdev user priority to tc map
8107 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
8109 struct net_device
*dev
= adapter
->netdev
;
8110 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
8111 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
8114 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
8117 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
8118 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
8120 tc
= ets
->prio_tc
[prio
];
8122 netdev_set_prio_tc_map(dev
, prio
, tc
);
8126 #endif /* CONFIG_IXGBE_DCB */
8128 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8130 * @netdev: net device to configure
8131 * @tc: number of traffic classes to enable
8133 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
8135 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8136 struct ixgbe_hw
*hw
= &adapter
->hw
;
8139 /* Hardware supports up to 8 traffic classes */
8140 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
)
8143 if (hw
->mac
.type
== ixgbe_mac_82598EB
&& tc
&& tc
< MAX_TRAFFIC_CLASS
)
8146 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
8147 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
8150 /* Hardware has to reinitialize queues and interrupts to
8151 * match packet buffer alignment. Unfortunately, the
8152 * hardware is not flexible enough to do this dynamically.
8154 if (netif_running(dev
))
8157 ixgbe_reset(adapter
);
8159 ixgbe_clear_interrupt_scheme(adapter
);
8161 #ifdef CONFIG_IXGBE_DCB
8163 netdev_set_num_tc(dev
, tc
);
8164 ixgbe_set_prio_tc_map(adapter
);
8166 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
8168 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
8169 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
8170 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
8173 netdev_reset_tc(dev
);
8175 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8176 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
8178 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
8180 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
8181 adapter
->dcb_cfg
.pfc_mode_enable
= false;
8184 ixgbe_validate_rtr(adapter
, tc
);
8186 #endif /* CONFIG_IXGBE_DCB */
8187 ixgbe_init_interrupt_scheme(adapter
);
8189 if (netif_running(dev
))
8190 return ixgbe_open(dev
);
8195 static int ixgbe_delete_clsu32(struct ixgbe_adapter
*adapter
,
8196 struct tc_cls_u32_offload
*cls
)
8200 spin_lock(&adapter
->fdir_perfect_lock
);
8201 err
= ixgbe_update_ethtool_fdir_entry(adapter
, NULL
, cls
->knode
.handle
);
8202 spin_unlock(&adapter
->fdir_perfect_lock
);
8206 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter
*adapter
,
8208 struct tc_cls_u32_offload
*cls
)
8210 /* This ixgbe devices do not support hash tables at the moment
8211 * so abort when given hash tables.
8213 if (cls
->hnode
.divisor
> 0)
8216 set_bit(TC_U32_USERHTID(cls
->hnode
.handle
), &adapter
->tables
);
8220 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter
*adapter
,
8221 struct tc_cls_u32_offload
*cls
)
8223 clear_bit(TC_U32_USERHTID(cls
->hnode
.handle
), &adapter
->tables
);
8227 static int ixgbe_configure_clsu32(struct ixgbe_adapter
*adapter
,
8229 struct tc_cls_u32_offload
*cls
)
8231 u32 loc
= cls
->knode
.handle
& 0xfffff;
8232 struct ixgbe_hw
*hw
= &adapter
->hw
;
8233 struct ixgbe_mat_field
*field_ptr
;
8234 struct ixgbe_fdir_filter
*input
;
8235 union ixgbe_atr_input mask
;
8236 #ifdef CONFIG_NET_CLS_ACT
8237 const struct tc_action
*a
;
8243 memset(&mask
, 0, sizeof(union ixgbe_atr_input
));
8244 handle
= cls
->knode
.handle
;
8246 /* At the moment cls_u32 jumps to transport layer and skips past
8247 * L2 headers. The canonical method to match L2 frames is to use
8248 * negative values. However this is error prone at best but really
8249 * just broken because there is no way to "know" what sort of hdr
8250 * is in front of the transport layer. Fix cls_u32 to support L2
8251 * headers when needed.
8253 if (protocol
!= htons(ETH_P_IP
))
8256 if (cls
->knode
.link_handle
||
8257 cls
->knode
.link_handle
>= IXGBE_MAX_LINK_HANDLE
) {
8258 struct ixgbe_nexthdr
*nexthdr
= ixgbe_ipv4_jumps
;
8259 u32 uhtid
= TC_U32_USERHTID(cls
->knode
.link_handle
);
8261 if (!test_bit(uhtid
, &adapter
->tables
))
8264 for (i
= 0; nexthdr
[i
].jump
; i
++) {
8265 if (nexthdr
->o
!= cls
->knode
.sel
->offoff
||
8266 nexthdr
->s
!= cls
->knode
.sel
->offshift
||
8267 nexthdr
->m
!= cls
->knode
.sel
->offmask
||
8268 /* do not support multiple key jumps its just mad */
8269 cls
->knode
.sel
->nkeys
> 1)
8272 if (nexthdr
->off
!= cls
->knode
.sel
->keys
[0].off
||
8273 nexthdr
->val
!= cls
->knode
.sel
->keys
[0].val
||
8274 nexthdr
->mask
!= cls
->knode
.sel
->keys
[0].mask
)
8277 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8280 adapter
->jump_tables
[uhtid
] = nexthdr
->jump
;
8285 if (loc
>= ((1024 << adapter
->fdir_pballoc
) - 2)) {
8286 e_err(drv
, "Location out of range\n");
8290 /* cls u32 is a graph starting at root node 0x800. The driver tracks
8291 * links and also the fields used to advance the parser across each
8292 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8293 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8294 * To add support for new nodes update ixgbe_model.h parse structures
8295 * this function _should_ be generic try not to hardcode values here.
8297 if (TC_U32_USERHTID(handle
) == 0x800) {
8298 field_ptr
= adapter
->jump_tables
[0];
8300 if (TC_U32_USERHTID(handle
) >= ARRAY_SIZE(adapter
->jump_tables
))
8303 field_ptr
= adapter
->jump_tables
[TC_U32_USERHTID(handle
)];
8309 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
8313 for (i
= 0; i
< cls
->knode
.sel
->nkeys
; i
++) {
8314 int off
= cls
->knode
.sel
->keys
[i
].off
;
8315 __be32 val
= cls
->knode
.sel
->keys
[i
].val
;
8316 __be32 m
= cls
->knode
.sel
->keys
[i
].mask
;
8317 bool found_entry
= false;
8320 for (j
= 0; field_ptr
[j
].val
; j
++) {
8321 if (field_ptr
[j
].off
== off
&&
8322 field_ptr
[j
].mask
== m
) {
8323 field_ptr
[j
].val(input
, &mask
, val
, m
);
8324 input
->filter
.formatted
.flow_type
|=
8335 mask
.formatted
.flow_type
= IXGBE_ATR_L4TYPE_IPV6_MASK
|
8336 IXGBE_ATR_L4TYPE_MASK
;
8338 if (input
->filter
.formatted
.flow_type
== IXGBE_ATR_FLOW_TYPE_IPV4
)
8339 mask
.formatted
.flow_type
&= IXGBE_ATR_L4TYPE_IPV6_MASK
;
8341 #ifdef CONFIG_NET_CLS_ACT
8342 if (list_empty(&cls
->knode
.exts
->actions
))
8345 list_for_each_entry(a
, &cls
->knode
.exts
->actions
, list
) {
8346 if (!is_tcf_gact_shot(a
))
8351 input
->action
= IXGBE_FDIR_DROP_QUEUE
;
8352 queue
= IXGBE_FDIR_DROP_QUEUE
;
8353 input
->sw_idx
= loc
;
8355 spin_lock(&adapter
->fdir_perfect_lock
);
8357 if (hlist_empty(&adapter
->fdir_filter_list
)) {
8358 memcpy(&adapter
->fdir_mask
, &mask
, sizeof(mask
));
8359 err
= ixgbe_fdir_set_input_mask_82599(hw
, &mask
);
8361 goto err_out_w_lock
;
8362 } else if (memcmp(&adapter
->fdir_mask
, &mask
, sizeof(mask
))) {
8364 goto err_out_w_lock
;
8367 ixgbe_atr_compute_perfect_hash_82599(&input
->filter
, &mask
);
8368 err
= ixgbe_fdir_write_perfect_filter_82599(hw
, &input
->filter
,
8369 input
->sw_idx
, queue
);
8371 ixgbe_update_ethtool_fdir_entry(adapter
, input
, input
->sw_idx
);
8372 spin_unlock(&adapter
->fdir_perfect_lock
);
8376 spin_unlock(&adapter
->fdir_perfect_lock
);
8382 int __ixgbe_setup_tc(struct net_device
*dev
, u32 handle
, __be16 proto
,
8383 struct tc_to_netdev
*tc
)
8385 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8387 if (TC_H_MAJ(handle
) == TC_H_MAJ(TC_H_INGRESS
) &&
8388 tc
->type
== TC_SETUP_CLSU32
) {
8389 switch (tc
->cls_u32
->command
) {
8390 case TC_CLSU32_NEW_KNODE
:
8391 case TC_CLSU32_REPLACE_KNODE
:
8392 return ixgbe_configure_clsu32(adapter
,
8393 proto
, tc
->cls_u32
);
8394 case TC_CLSU32_DELETE_KNODE
:
8395 return ixgbe_delete_clsu32(adapter
, tc
->cls_u32
);
8396 case TC_CLSU32_NEW_HNODE
:
8397 case TC_CLSU32_REPLACE_HNODE
:
8398 return ixgbe_configure_clsu32_add_hnode(adapter
, proto
,
8400 case TC_CLSU32_DELETE_HNODE
:
8401 return ixgbe_configure_clsu32_del_hnode(adapter
,
8408 if (tc
->type
!= TC_SETUP_MQPRIO
)
8411 return ixgbe_setup_tc(dev
, tc
->tc
);
8414 #ifdef CONFIG_PCI_IOV
8415 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
8417 struct net_device
*netdev
= adapter
->netdev
;
8420 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
8425 void ixgbe_do_reset(struct net_device
*netdev
)
8427 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8429 if (netif_running(netdev
))
8430 ixgbe_reinit_locked(adapter
);
8432 ixgbe_reset(adapter
);
8435 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
8436 netdev_features_t features
)
8438 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8440 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8441 if (!(features
& NETIF_F_RXCSUM
))
8442 features
&= ~NETIF_F_LRO
;
8444 /* Turn off LRO if not RSC capable */
8445 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
8446 features
&= ~NETIF_F_LRO
;
8451 static int ixgbe_set_features(struct net_device
*netdev
,
8452 netdev_features_t features
)
8454 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8455 netdev_features_t changed
= netdev
->features
^ features
;
8456 bool need_reset
= false;
8458 /* Make sure RSC matches LRO, reset if change */
8459 if (!(features
& NETIF_F_LRO
)) {
8460 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8462 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
8463 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
8464 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
8465 if (adapter
->rx_itr_setting
== 1 ||
8466 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
8467 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
8469 } else if ((changed
^ features
) & NETIF_F_LRO
) {
8470 e_info(probe
, "rx-usecs set too low, "
8476 * Check if Flow Director n-tuple support or hw_tc support was
8477 * enabled or disabled. If the state changed, we need to reset.
8479 if ((features
& NETIF_F_NTUPLE
) || (features
& NETIF_F_HW_TC
)) {
8480 /* turn off ATR, enable perfect filters and reset */
8481 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
8484 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8485 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8487 /* turn off perfect filters, enable ATR and reset */
8488 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
8491 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8493 /* We cannot enable ATR if SR-IOV is enabled */
8494 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
||
8495 /* We cannot enable ATR if we have 2 or more tcs */
8496 (netdev_get_num_tc(netdev
) > 1) ||
8497 /* We cannot enable ATR if RSS is disabled */
8498 (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1) ||
8499 /* A sample rate of 0 indicates ATR disabled */
8500 (!adapter
->atr_sample_rate
))
8501 ; /* do nothing not supported */
8502 else /* otherwise supported and set the flag */
8503 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8506 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
8507 ixgbe_vlan_strip_enable(adapter
);
8509 ixgbe_vlan_strip_disable(adapter
);
8511 if (changed
& NETIF_F_RXALL
)
8514 netdev
->features
= features
;
8516 #ifdef CONFIG_IXGBE_VXLAN
8517 if ((adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
)) {
8518 if (features
& NETIF_F_RXCSUM
)
8519 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8521 ixgbe_clear_vxlan_port(adapter
);
8523 #endif /* CONFIG_IXGBE_VXLAN */
8526 ixgbe_do_reset(netdev
);
8531 #ifdef CONFIG_IXGBE_VXLAN
8533 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8534 * @dev: The port's netdev
8535 * @sa_family: Socket Family that VXLAN is notifiying us about
8536 * @port: New UDP port number that VXLAN started listening to
8538 static void ixgbe_add_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8541 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8542 struct ixgbe_hw
*hw
= &adapter
->hw
;
8544 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8547 if (sa_family
== AF_INET6
)
8550 if (adapter
->vxlan_port
== port
)
8553 if (adapter
->vxlan_port
) {
8555 "Hit Max num of VXLAN ports, not adding port %d\n",
8560 adapter
->vxlan_port
= port
;
8561 IXGBE_WRITE_REG(hw
, IXGBE_VXLANCTRL
, ntohs(port
));
8565 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8566 * @dev: The port's netdev
8567 * @sa_family: Socket Family that VXLAN is notifying us about
8568 * @port: UDP port number that VXLAN stopped listening to
8570 static void ixgbe_del_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8573 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8575 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8578 if (sa_family
== AF_INET6
)
8581 if (adapter
->vxlan_port
!= port
) {
8582 netdev_info(dev
, "Port %d was not found, not deleting\n",
8587 ixgbe_clear_vxlan_port(adapter
);
8588 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8590 #endif /* CONFIG_IXGBE_VXLAN */
8592 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
8593 struct net_device
*dev
,
8594 const unsigned char *addr
, u16 vid
,
8597 /* guarantee we can provide a unique filter for the unicast address */
8598 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
8599 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8600 u16 pool
= VMDQ_P(0);
8602 if (netdev_uc_count(dev
) >= ixgbe_available_rars(adapter
, pool
))
8606 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
8610 * ixgbe_configure_bridge_mode - set various bridge modes
8611 * @adapter - the private structure
8612 * @mode - requested bridge mode
8614 * Configure some settings require for various bridge modes.
8616 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter
*adapter
,
8619 struct ixgbe_hw
*hw
= &adapter
->hw
;
8620 unsigned int p
, num_pools
;
8624 case BRIDGE_MODE_VEPA
:
8625 /* disable Tx loopback, rely on switch hairpin mode */
8626 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, 0);
8628 /* must enable Rx switching replication to allow multicast
8629 * packet reception on all VFs, and to enable source address
8632 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8633 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
8634 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8636 /* enable Rx source address pruning. Note, this requires
8637 * replication to be enabled or else it does nothing.
8639 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8640 for (p
= 0; p
< num_pools
; p
++) {
8641 if (hw
->mac
.ops
.set_source_address_pruning
)
8642 hw
->mac
.ops
.set_source_address_pruning(hw
,
8647 case BRIDGE_MODE_VEB
:
8648 /* enable Tx loopback for internal VF/PF communication */
8649 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
,
8650 IXGBE_PFDTXGSWC_VT_LBEN
);
8652 /* disable Rx switching replication unless we have SR-IOV
8655 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8656 if (!adapter
->num_vfs
)
8657 vmdctl
&= ~IXGBE_VT_CTL_REPLEN
;
8658 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8660 /* disable Rx source address pruning, since we don't expect to
8661 * be receiving external loopback of our transmitted frames.
8663 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8664 for (p
= 0; p
< num_pools
; p
++) {
8665 if (hw
->mac
.ops
.set_source_address_pruning
)
8666 hw
->mac
.ops
.set_source_address_pruning(hw
,
8675 adapter
->bridge_mode
= mode
;
8677 e_info(drv
, "enabling bridge mode: %s\n",
8678 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
8683 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
8684 struct nlmsghdr
*nlh
, u16 flags
)
8686 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8687 struct nlattr
*attr
, *br_spec
;
8690 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8693 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
8697 nla_for_each_nested(attr
, br_spec
, rem
) {
8701 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
8704 if (nla_len(attr
) < sizeof(mode
))
8707 mode
= nla_get_u16(attr
);
8708 status
= ixgbe_configure_bridge_mode(adapter
, mode
);
8718 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
8719 struct net_device
*dev
,
8720 u32 filter_mask
, int nlflags
)
8722 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8724 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8727 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
,
8728 adapter
->bridge_mode
, 0, 0, nlflags
,
8732 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
8734 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
8735 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
8736 int used_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8740 /* Hardware has a limited number of available pools. Each VF, and the
8741 * PF require a pool. Check to ensure we don't attempt to use more
8742 * then the available number of pools.
8744 if (used_pools
>= IXGBE_MAX_VF_FUNCTIONS
)
8745 return ERR_PTR(-EINVAL
);
8748 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
8749 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
8751 return ERR_PTR(-EINVAL
);
8754 /* Check for hardware restriction on number of rx/tx queues */
8755 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
8756 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
8758 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8760 return ERR_PTR(-EINVAL
);
8763 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
8764 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
8765 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
8766 return ERR_PTR(-EBUSY
);
8768 fwd_adapter
= kzalloc(sizeof(*fwd_adapter
), GFP_KERNEL
);
8770 return ERR_PTR(-ENOMEM
);
8772 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
8773 adapter
->num_rx_pools
++;
8774 set_bit(pool
, &adapter
->fwd_bitmask
);
8775 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
8777 /* Enable VMDq flag so device will be set in VM mode */
8778 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
8779 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
8780 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
8782 /* Force reinit of ring allocation with VMDQ enabled */
8783 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
8786 fwd_adapter
->pool
= pool
;
8787 fwd_adapter
->real_adapter
= adapter
;
8788 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
8791 netif_tx_start_all_queues(vdev
);
8794 /* unwind counter and free adapter struct */
8796 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
8797 clear_bit(pool
, &adapter
->fwd_bitmask
);
8798 adapter
->num_rx_pools
--;
8800 return ERR_PTR(err
);
8803 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
8805 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
8806 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
8809 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
8810 adapter
->num_rx_pools
--;
8812 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
8813 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
8814 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
8815 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
8816 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8817 fwd_adapter
->pool
, adapter
->num_rx_pools
,
8818 fwd_adapter
->rx_base_queue
,
8819 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
8820 adapter
->fwd_bitmask
);
8824 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8825 static netdev_features_t
8826 ixgbe_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
8827 netdev_features_t features
)
8829 if (!skb
->encapsulation
)
8832 if (unlikely(skb_inner_mac_header(skb
) - skb_transport_header(skb
) >
8833 IXGBE_MAX_TUNNEL_HDR_LEN
))
8834 return features
& ~NETIF_F_CSUM_MASK
;
8839 static const struct net_device_ops ixgbe_netdev_ops
= {
8840 .ndo_open
= ixgbe_open
,
8841 .ndo_stop
= ixgbe_close
,
8842 .ndo_start_xmit
= ixgbe_xmit_frame
,
8843 .ndo_select_queue
= ixgbe_select_queue
,
8844 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
8845 .ndo_validate_addr
= eth_validate_addr
,
8846 .ndo_set_mac_address
= ixgbe_set_mac
,
8847 .ndo_change_mtu
= ixgbe_change_mtu
,
8848 .ndo_tx_timeout
= ixgbe_tx_timeout
,
8849 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
8850 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
8851 .ndo_do_ioctl
= ixgbe_ioctl
,
8852 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
8853 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
8854 .ndo_set_vf_rate
= ixgbe_ndo_set_vf_bw
,
8855 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
8856 .ndo_set_vf_rss_query_en
= ixgbe_ndo_set_vf_rss_query_en
,
8857 .ndo_set_vf_trust
= ixgbe_ndo_set_vf_trust
,
8858 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
8859 .ndo_get_stats64
= ixgbe_get_stats64
,
8860 .ndo_setup_tc
= __ixgbe_setup_tc
,
8861 #ifdef CONFIG_NET_POLL_CONTROLLER
8862 .ndo_poll_controller
= ixgbe_netpoll
,
8864 #ifdef CONFIG_NET_RX_BUSY_POLL
8865 .ndo_busy_poll
= ixgbe_low_latency_recv
,
8868 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
8869 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
8870 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
8871 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
8872 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
8873 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
8874 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
8875 #endif /* IXGBE_FCOE */
8876 .ndo_set_features
= ixgbe_set_features
,
8877 .ndo_fix_features
= ixgbe_fix_features
,
8878 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
8879 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
8880 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
8881 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
8882 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
8883 #ifdef CONFIG_IXGBE_VXLAN
8884 .ndo_add_vxlan_port
= ixgbe_add_vxlan_port
,
8885 .ndo_del_vxlan_port
= ixgbe_del_vxlan_port
,
8886 #endif /* CONFIG_IXGBE_VXLAN */
8887 .ndo_features_check
= ixgbe_features_check
,
8891 * ixgbe_enumerate_functions - Get the number of ports this device has
8892 * @adapter: adapter structure
8894 * This function enumerates the phsyical functions co-located on a single slot,
8895 * in order to determine how many ports a device has. This is most useful in
8896 * determining the required GT/s of PCIe bandwidth necessary for optimal
8899 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
8901 struct pci_dev
*entry
, *pdev
= adapter
->pdev
;
8904 /* Some cards can not use the generic count PCIe functions method,
8905 * because they are behind a parent switch, so we hardcode these with
8906 * the correct number of functions.
8908 if (ixgbe_pcie_from_parent(&adapter
->hw
))
8911 list_for_each_entry(entry
, &adapter
->pdev
->bus
->devices
, bus_list
) {
8912 /* don't count virtual functions */
8913 if (entry
->is_virtfn
)
8916 /* When the devices on the bus don't all match our device ID,
8917 * we can't reliably determine the correct number of
8918 * functions. This can occur if a function has been direct
8919 * attached to a virtual machine using VT-d, for example. In
8920 * this case, simply return -1 to indicate this.
8922 if ((entry
->vendor
!= pdev
->vendor
) ||
8923 (entry
->device
!= pdev
->device
))
8933 * ixgbe_wol_supported - Check whether device supports WoL
8934 * @hw: hw specific details
8935 * @device_id: the device ID
8936 * @subdev_id: the subsystem device ID
8938 * This function is used by probe and ethtool to determine
8939 * which devices have WoL support
8942 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
8945 struct ixgbe_hw
*hw
= &adapter
->hw
;
8946 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
8947 int is_wol_supported
= 0;
8949 switch (device_id
) {
8950 case IXGBE_DEV_ID_82599_SFP
:
8951 /* Only these subdevices could supports WOL */
8952 switch (subdevice_id
) {
8953 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
8954 case IXGBE_SUBDEV_ID_82599_560FLR
:
8955 /* only support first port */
8956 if (hw
->bus
.func
!= 0)
8958 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
8959 case IXGBE_SUBDEV_ID_82599_SFP
:
8960 case IXGBE_SUBDEV_ID_82599_RNDC
:
8961 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
8962 case IXGBE_SUBDEV_ID_82599_LOM_SFP
:
8963 is_wol_supported
= 1;
8967 case IXGBE_DEV_ID_82599EN_SFP
:
8968 /* Only this subdevice supports WOL */
8969 switch (subdevice_id
) {
8970 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
8971 is_wol_supported
= 1;
8975 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
8976 /* All except this subdevice support WOL */
8977 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
8978 is_wol_supported
= 1;
8980 case IXGBE_DEV_ID_82599_KX4
:
8981 is_wol_supported
= 1;
8983 case IXGBE_DEV_ID_X540T
:
8984 case IXGBE_DEV_ID_X540T1
:
8985 case IXGBE_DEV_ID_X550T
:
8986 case IXGBE_DEV_ID_X550EM_X_KX4
:
8987 case IXGBE_DEV_ID_X550EM_X_KR
:
8988 case IXGBE_DEV_ID_X550EM_X_10G_T
:
8989 /* check eeprom to see if enabled wol */
8990 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
8991 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
8992 (hw
->bus
.func
== 0))) {
8993 is_wol_supported
= 1;
8998 return is_wol_supported
;
9002 * ixgbe_get_platform_mac_addr - Look up MAC address in Open Firmware / IDPROM
9003 * @adapter: Pointer to adapter struct
9005 static void ixgbe_get_platform_mac_addr(struct ixgbe_adapter
*adapter
)
9008 struct device_node
*dp
= pci_device_to_OF_node(adapter
->pdev
);
9009 struct ixgbe_hw
*hw
= &adapter
->hw
;
9010 const unsigned char *addr
;
9012 addr
= of_get_mac_address(dp
);
9014 ether_addr_copy(hw
->mac
.perm_addr
, addr
);
9017 #endif /* CONFIG_OF */
9020 ether_addr_copy(hw
->mac
.perm_addr
, idprom
->id_ethaddr
);
9021 #endif /* CONFIG_SPARC */
9025 * ixgbe_probe - Device Initialization Routine
9026 * @pdev: PCI device information struct
9027 * @ent: entry in ixgbe_pci_tbl
9029 * Returns 0 on success, negative on failure
9031 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9032 * The OS initialization, configuring of the adapter private structure,
9033 * and a hardware reset occur.
9035 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
9037 struct net_device
*netdev
;
9038 struct ixgbe_adapter
*adapter
= NULL
;
9039 struct ixgbe_hw
*hw
;
9040 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
9041 int i
, err
, pci_using_dac
, expected_gts
;
9042 unsigned int indices
= MAX_TX_QUEUES
;
9043 u8 part_str
[IXGBE_PBANUM_LENGTH
];
9044 bool disable_dev
= false;
9050 /* Catch broken hardware that put the wrong VF device ID in
9051 * the PCIe SR-IOV capability.
9053 if (pdev
->is_virtfn
) {
9054 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
9055 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
9059 err
= pci_enable_device_mem(pdev
);
9063 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
9066 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
9069 "No usable DMA configuration, aborting\n");
9075 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
9076 IORESOURCE_MEM
), ixgbe_driver_name
);
9079 "pci_request_selected_regions failed 0x%x\n", err
);
9083 pci_enable_pcie_error_reporting(pdev
);
9085 pci_set_master(pdev
);
9086 pci_save_state(pdev
);
9088 if (ii
->mac
== ixgbe_mac_82598EB
) {
9089 #ifdef CONFIG_IXGBE_DCB
9090 /* 8 TC w/ 4 queues per TC */
9091 indices
= 4 * MAX_TRAFFIC_CLASS
;
9093 indices
= IXGBE_MAX_RSS_INDICES
;
9097 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
9100 goto err_alloc_etherdev
;
9103 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
9105 adapter
= netdev_priv(netdev
);
9107 adapter
->netdev
= netdev
;
9108 adapter
->pdev
= pdev
;
9111 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
9113 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
9114 pci_resource_len(pdev
, 0));
9115 adapter
->io_addr
= hw
->hw_addr
;
9121 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
9122 ixgbe_set_ethtool_ops(netdev
);
9123 netdev
->watchdog_timeo
= 5 * HZ
;
9124 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
9127 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
9128 hw
->mac
.type
= ii
->mac
;
9129 hw
->mvals
= ii
->mvals
;
9132 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
9133 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC(hw
));
9134 if (ixgbe_removed(hw
->hw_addr
)) {
9138 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9139 if (!(eec
& (1 << 8)))
9140 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
9143 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
9144 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
9145 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9146 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
9147 hw
->phy
.mdio
.mmds
= 0;
9148 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
9149 hw
->phy
.mdio
.dev
= netdev
;
9150 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
9151 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
9153 ii
->get_invariants(hw
);
9155 /* setup the private structure */
9156 err
= ixgbe_sw_init(adapter
);
9160 /* Make it possible the adapter to be woken up via WOL */
9161 switch (adapter
->hw
.mac
.type
) {
9162 case ixgbe_mac_82599EB
:
9163 case ixgbe_mac_X540
:
9164 case ixgbe_mac_X550
:
9165 case ixgbe_mac_X550EM_x
:
9166 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9173 * If there is a fan on this device and it has failed log the
9176 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
9177 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
9178 if (esdp
& IXGBE_ESDP_SDP1
)
9179 e_crit(probe
, "Fan has stopped, replace the adapter\n");
9182 if (allow_unsupported_sfp
)
9183 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
9185 /* reset_hw fills in the perm_addr as well */
9186 hw
->phy
.reset_if_overtemp
= true;
9187 err
= hw
->mac
.ops
.reset_hw(hw
);
9188 hw
->phy
.reset_if_overtemp
= false;
9189 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
9191 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
9192 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9193 e_dev_err("Reload the driver after installing a supported module.\n");
9196 e_dev_err("HW Init failed: %d\n", err
);
9200 #ifdef CONFIG_PCI_IOV
9201 /* SR-IOV not supported on the 82598 */
9202 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
9205 ixgbe_init_mbx_params_pf(hw
);
9206 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
, sizeof(hw
->mbx
.ops
));
9207 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
9208 ixgbe_enable_sriov(adapter
);
9212 netdev
->features
= NETIF_F_SG
|
9215 NETIF_F_HW_VLAN_CTAG_TX
|
9216 NETIF_F_HW_VLAN_CTAG_RX
|
9222 netdev
->hw_features
= netdev
->features
| NETIF_F_HW_L2FW_DOFFLOAD
;
9224 switch (adapter
->hw
.mac
.type
) {
9225 case ixgbe_mac_82599EB
:
9226 case ixgbe_mac_X540
:
9227 case ixgbe_mac_X550
:
9228 case ixgbe_mac_X550EM_x
:
9229 netdev
->features
|= NETIF_F_SCTP_CRC
;
9230 netdev
->hw_features
|= NETIF_F_SCTP_CRC
|
9238 netdev
->hw_features
|= NETIF_F_RXALL
;
9239 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
9241 netdev
->vlan_features
|= NETIF_F_TSO
;
9242 netdev
->vlan_features
|= NETIF_F_TSO6
;
9243 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
9244 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
9245 netdev
->vlan_features
|= NETIF_F_SG
;
9247 netdev
->hw_enc_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
;
9249 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
9250 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
9252 #ifdef CONFIG_IXGBE_DCB
9253 netdev
->dcbnl_ops
= &dcbnl_ops
;
9257 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
9258 unsigned int fcoe_l
;
9260 if (hw
->mac
.ops
.get_device_caps
) {
9261 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
9262 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
9263 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
9267 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
9268 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
9270 netdev
->features
|= NETIF_F_FSO
|
9273 netdev
->vlan_features
|= NETIF_F_FSO
|
9277 #endif /* IXGBE_FCOE */
9278 if (pci_using_dac
) {
9279 netdev
->features
|= NETIF_F_HIGHDMA
;
9280 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
9283 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
9284 netdev
->hw_features
|= NETIF_F_LRO
;
9285 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
9286 netdev
->features
|= NETIF_F_LRO
;
9288 /* make sure the EEPROM is good */
9289 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
9290 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9295 ixgbe_get_platform_mac_addr(adapter
);
9297 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
9299 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
9300 e_dev_err("invalid MAC address\n");
9305 /* Set hw->mac.addr to permanent MAC address */
9306 ether_addr_copy(hw
->mac
.addr
, hw
->mac
.perm_addr
);
9307 ixgbe_mac_set_default_filter(adapter
);
9309 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
9310 (unsigned long) adapter
);
9312 if (ixgbe_removed(hw
->hw_addr
)) {
9316 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
9317 set_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
);
9318 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
9320 err
= ixgbe_init_interrupt_scheme(adapter
);
9324 /* WOL not supported for all devices */
9326 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
9327 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
9328 pdev
->subsystem_device
);
9329 if (hw
->wol_enabled
)
9330 adapter
->wol
= IXGBE_WUFC_MAG
;
9332 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
9334 /* save off EEPROM version number */
9335 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
9336 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
9338 /* pick up the PCI bus settings for reporting later */
9339 if (ixgbe_pcie_from_parent(hw
))
9340 ixgbe_get_parent_bus_info(adapter
);
9342 hw
->mac
.ops
.get_bus_info(hw
);
9344 /* calculate the expected PCIe bandwidth required for optimal
9345 * performance. Note that some older parts will never have enough
9346 * bandwidth due to being older generation PCIe parts. We clamp these
9347 * parts to ensure no warning is displayed if it can't be fixed.
9349 switch (hw
->mac
.type
) {
9350 case ixgbe_mac_82598EB
:
9351 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
9354 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
9358 /* don't check link if we failed to enumerate functions */
9359 if (expected_gts
> 0)
9360 ixgbe_check_minimum_link(adapter
, expected_gts
);
9362 err
= ixgbe_read_pba_string_generic(hw
, part_str
, sizeof(part_str
));
9364 strlcpy(part_str
, "Unknown", sizeof(part_str
));
9365 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
9366 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9367 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
9370 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9371 hw
->mac
.type
, hw
->phy
.type
, part_str
);
9373 e_dev_info("%pM\n", netdev
->dev_addr
);
9375 /* reset the hardware with the new settings */
9376 err
= hw
->mac
.ops
.start_hw(hw
);
9377 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
9378 /* We are running on a pre-production device, log a warning */
9379 e_dev_warn("This device is a pre-production adapter/LOM. "
9380 "Please be aware there may be issues associated "
9381 "with your hardware. If you are experiencing "
9382 "problems please contact your Intel or hardware "
9383 "representative who provided you with this "
9386 strcpy(netdev
->name
, "eth%d");
9387 err
= register_netdev(netdev
);
9391 pci_set_drvdata(pdev
, adapter
);
9393 /* power down the optics for 82599 SFP+ fiber */
9394 if (hw
->mac
.ops
.disable_tx_laser
)
9395 hw
->mac
.ops
.disable_tx_laser(hw
);
9397 /* carrier off reporting is important to ethtool even BEFORE open */
9398 netif_carrier_off(netdev
);
9400 #ifdef CONFIG_IXGBE_DCA
9401 if (dca_add_requester(&pdev
->dev
) == 0) {
9402 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
9403 ixgbe_setup_dca(adapter
);
9406 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
9407 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
9408 for (i
= 0; i
< adapter
->num_vfs
; i
++)
9409 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
9412 /* firmware requires driver version to be 0xFFFFFFFF
9413 * since os does not support feature
9415 if (hw
->mac
.ops
.set_fw_drv_ver
)
9416 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
9419 /* add san mac addr to netdev */
9420 ixgbe_add_sanmac_netdev(netdev
);
9422 e_dev_info("%s\n", ixgbe_default_device_descr
);
9424 #ifdef CONFIG_IXGBE_HWMON
9425 if (ixgbe_sysfs_init(adapter
))
9426 e_err(probe
, "failed to allocate sysfs resources\n");
9427 #endif /* CONFIG_IXGBE_HWMON */
9429 ixgbe_dbg_adapter_init(adapter
);
9431 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9432 if (ixgbe_mng_enabled(hw
) && ixgbe_is_sfp(hw
) && hw
->mac
.ops
.setup_link
)
9433 hw
->mac
.ops
.setup_link(hw
,
9434 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
9440 ixgbe_release_hw_control(adapter
);
9441 ixgbe_clear_interrupt_scheme(adapter
);
9443 ixgbe_disable_sriov(adapter
);
9444 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
9445 iounmap(adapter
->io_addr
);
9446 kfree(adapter
->mac_table
);
9448 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9449 free_netdev(netdev
);
9451 pci_release_selected_regions(pdev
,
9452 pci_select_bars(pdev
, IORESOURCE_MEM
));
9455 if (!adapter
|| disable_dev
)
9456 pci_disable_device(pdev
);
9461 * ixgbe_remove - Device Removal Routine
9462 * @pdev: PCI device information struct
9464 * ixgbe_remove is called by the PCI subsystem to alert the driver
9465 * that it should release a PCI device. The could be caused by a
9466 * Hot-Plug event, or because the driver is going to be removed from
9469 static void ixgbe_remove(struct pci_dev
*pdev
)
9471 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9472 struct net_device
*netdev
;
9475 /* if !adapter then we already cleaned up in probe */
9479 netdev
= adapter
->netdev
;
9480 ixgbe_dbg_adapter_exit(adapter
);
9482 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
9483 cancel_work_sync(&adapter
->service_task
);
9486 #ifdef CONFIG_IXGBE_DCA
9487 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
9488 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
9489 dca_remove_requester(&pdev
->dev
);
9490 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
9491 IXGBE_DCA_CTRL_DCA_DISABLE
);
9495 #ifdef CONFIG_IXGBE_HWMON
9496 ixgbe_sysfs_exit(adapter
);
9497 #endif /* CONFIG_IXGBE_HWMON */
9499 /* remove the added san mac */
9500 ixgbe_del_sanmac_netdev(netdev
);
9502 #ifdef CONFIG_PCI_IOV
9503 ixgbe_disable_sriov(adapter
);
9505 if (netdev
->reg_state
== NETREG_REGISTERED
)
9506 unregister_netdev(netdev
);
9508 ixgbe_clear_interrupt_scheme(adapter
);
9510 ixgbe_release_hw_control(adapter
);
9513 kfree(adapter
->ixgbe_ieee_pfc
);
9514 kfree(adapter
->ixgbe_ieee_ets
);
9517 iounmap(adapter
->io_addr
);
9518 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
9521 e_dev_info("complete\n");
9523 kfree(adapter
->mac_table
);
9524 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9525 free_netdev(netdev
);
9527 pci_disable_pcie_error_reporting(pdev
);
9530 pci_disable_device(pdev
);
9534 * ixgbe_io_error_detected - called when PCI error is detected
9535 * @pdev: Pointer to PCI device
9536 * @state: The current pci connection state
9538 * This function is called after a PCI bus error affecting
9539 * this device has been detected.
9541 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
9542 pci_channel_state_t state
)
9544 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9545 struct net_device
*netdev
= adapter
->netdev
;
9547 #ifdef CONFIG_PCI_IOV
9548 struct ixgbe_hw
*hw
= &adapter
->hw
;
9549 struct pci_dev
*bdev
, *vfdev
;
9550 u32 dw0
, dw1
, dw2
, dw3
;
9552 u16 req_id
, pf_func
;
9554 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
9555 adapter
->num_vfs
== 0)
9556 goto skip_bad_vf_detection
;
9558 bdev
= pdev
->bus
->self
;
9559 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
9560 bdev
= bdev
->bus
->self
;
9563 goto skip_bad_vf_detection
;
9565 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
9567 goto skip_bad_vf_detection
;
9569 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
9570 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
9571 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
9572 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
9573 if (ixgbe_removed(hw
->hw_addr
))
9574 goto skip_bad_vf_detection
;
9577 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9578 if (!(req_id
& 0x0080))
9579 goto skip_bad_vf_detection
;
9581 pf_func
= req_id
& 0x01;
9582 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
9583 unsigned int device_id
;
9585 vf
= (req_id
& 0x7F) >> 1;
9586 e_dev_err("VF %d has caused a PCIe error\n", vf
);
9587 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9588 "%8.8x\tdw3: %8.8x\n",
9589 dw0
, dw1
, dw2
, dw3
);
9590 switch (adapter
->hw
.mac
.type
) {
9591 case ixgbe_mac_82599EB
:
9592 device_id
= IXGBE_82599_VF_DEVICE_ID
;
9594 case ixgbe_mac_X540
:
9595 device_id
= IXGBE_X540_VF_DEVICE_ID
;
9597 case ixgbe_mac_X550
:
9598 device_id
= IXGBE_DEV_ID_X550_VF
;
9600 case ixgbe_mac_X550EM_x
:
9601 device_id
= IXGBE_DEV_ID_X550EM_X_VF
;
9608 /* Find the pci device of the offending VF */
9609 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
9611 if (vfdev
->devfn
== (req_id
& 0xFF))
9613 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
9617 * There's a slim chance the VF could have been hot plugged,
9618 * so if it is no longer present we don't need to issue the
9619 * VFLR. Just clean up the AER in that case.
9622 ixgbe_issue_vf_flr(adapter
, vfdev
);
9623 /* Free device reference count */
9627 pci_cleanup_aer_uncorrect_error_status(pdev
);
9631 * Even though the error may have occurred on the other port
9632 * we still need to increment the vf error reference count for
9633 * both ports because the I/O resume function will be called
9636 adapter
->vferr_refcount
++;
9638 return PCI_ERS_RESULT_RECOVERED
;
9640 skip_bad_vf_detection
:
9641 #endif /* CONFIG_PCI_IOV */
9642 if (!test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
9643 return PCI_ERS_RESULT_DISCONNECT
;
9646 netif_device_detach(netdev
);
9648 if (state
== pci_channel_io_perm_failure
) {
9650 return PCI_ERS_RESULT_DISCONNECT
;
9653 if (netif_running(netdev
))
9654 ixgbe_down(adapter
);
9656 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
9657 pci_disable_device(pdev
);
9660 /* Request a slot reset. */
9661 return PCI_ERS_RESULT_NEED_RESET
;
9665 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9666 * @pdev: Pointer to PCI device
9668 * Restart the card from scratch, as if from a cold-boot.
9670 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
9672 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9673 pci_ers_result_t result
;
9676 if (pci_enable_device_mem(pdev
)) {
9677 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
9678 result
= PCI_ERS_RESULT_DISCONNECT
;
9680 smp_mb__before_atomic();
9681 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
9682 adapter
->hw
.hw_addr
= adapter
->io_addr
;
9683 pci_set_master(pdev
);
9684 pci_restore_state(pdev
);
9685 pci_save_state(pdev
);
9687 pci_wake_from_d3(pdev
, false);
9689 ixgbe_reset(adapter
);
9690 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9691 result
= PCI_ERS_RESULT_RECOVERED
;
9694 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
9696 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9697 "failed 0x%0x\n", err
);
9698 /* non-fatal, continue */
9705 * ixgbe_io_resume - called when traffic can start flowing again.
9706 * @pdev: Pointer to PCI device
9708 * This callback is called when the error recovery driver tells us that
9709 * its OK to resume normal operation.
9711 static void ixgbe_io_resume(struct pci_dev
*pdev
)
9713 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9714 struct net_device
*netdev
= adapter
->netdev
;
9716 #ifdef CONFIG_PCI_IOV
9717 if (adapter
->vferr_refcount
) {
9718 e_info(drv
, "Resuming after VF err\n");
9719 adapter
->vferr_refcount
--;
9724 if (netif_running(netdev
))
9727 netif_device_attach(netdev
);
9730 static const struct pci_error_handlers ixgbe_err_handler
= {
9731 .error_detected
= ixgbe_io_error_detected
,
9732 .slot_reset
= ixgbe_io_slot_reset
,
9733 .resume
= ixgbe_io_resume
,
9736 static struct pci_driver ixgbe_driver
= {
9737 .name
= ixgbe_driver_name
,
9738 .id_table
= ixgbe_pci_tbl
,
9739 .probe
= ixgbe_probe
,
9740 .remove
= ixgbe_remove
,
9742 .suspend
= ixgbe_suspend
,
9743 .resume
= ixgbe_resume
,
9745 .shutdown
= ixgbe_shutdown
,
9746 .sriov_configure
= ixgbe_pci_sriov_configure
,
9747 .err_handler
= &ixgbe_err_handler
9751 * ixgbe_init_module - Driver Registration Routine
9753 * ixgbe_init_module is the first routine called when the driver is
9754 * loaded. All it does is register with the PCI subsystem.
9756 static int __init
ixgbe_init_module(void)
9759 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
9760 pr_info("%s\n", ixgbe_copyright
);
9762 ixgbe_wq
= create_singlethread_workqueue(ixgbe_driver_name
);
9764 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name
);
9770 ret
= pci_register_driver(&ixgbe_driver
);
9776 #ifdef CONFIG_IXGBE_DCA
9777 dca_register_notify(&dca_notifier
);
9783 module_init(ixgbe_init_module
);
9786 * ixgbe_exit_module - Driver Exit Cleanup Routine
9788 * ixgbe_exit_module is called just before the driver is removed
9791 static void __exit
ixgbe_exit_module(void)
9793 #ifdef CONFIG_IXGBE_DCA
9794 dca_unregister_notify(&dca_notifier
);
9796 pci_unregister_driver(&ixgbe_driver
);
9800 destroy_workqueue(ixgbe_wq
);
9805 #ifdef CONFIG_IXGBE_DCA
9806 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
9811 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
9812 __ixgbe_notify_dca
);
9814 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
9817 #endif /* CONFIG_IXGBE_DCA */
9819 module_exit(ixgbe_exit_module
);