1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name
[] = "ixgbe";
56 static const char ixgbe_driver_string
[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr
[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr
[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version
[] = DRV_VERSION
;
71 static const char ixgbe_copyright
[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
75 [board_82598
] = &ixgbe_82598_info
,
76 [board_82599
] = &ixgbe_82599_info
,
77 [board_X540
] = &ixgbe_X540_info
,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
125 static struct notifier_block dca_notifier
= {
126 .notifier_call
= ixgbe_notify_dca
,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs
;
134 module_param(max_vfs
, uint
, 0);
135 MODULE_PARM_DESC(max_vfs
,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp
;
140 module_param(allow_unsupported_sfp
, uint
, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp
,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug
= -1;
146 module_param(debug
, int, 0);
147 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION
);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
156 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
158 schedule_work(&adapter
->service_task
);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
170 struct ixgbe_reg_info
{
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
177 /* General Registers */
178 {IXGBE_CTRL
, "CTRL"},
179 {IXGBE_STATUS
, "STATUS"},
180 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR
, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
217 switch (reginfo
->ofs
) {
218 case IXGBE_SRRCTL(0):
219 for (i
= 0; i
< 64; i
++)
220 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i
= 0; i
< 64; i
++)
224 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
227 for (i
= 0; i
< 64; i
++)
228 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
231 for (i
= 0; i
< 64; i
++)
232 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
235 for (i
= 0; i
< 64; i
++)
236 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
238 case IXGBE_RXDCTL(0):
239 for (i
= 0; i
< 64; i
++)
240 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
243 for (i
= 0; i
< 64; i
++)
244 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
247 for (i
= 0; i
< 64; i
++)
248 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
251 for (i
= 0; i
< 64; i
++)
252 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
255 for (i
= 0; i
< 64; i
++)
256 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
259 for (i
= 0; i
< 64; i
++)
260 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
263 for (i
= 0; i
< 64; i
++)
264 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
267 for (i
= 0; i
< 64; i
++)
268 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
270 case IXGBE_TXDCTL(0):
271 for (i
= 0; i
< 64; i
++)
272 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
275 pr_info("%-15s %08x\n", reginfo
->name
,
276 IXGBE_READ_REG(hw
, reginfo
->ofs
));
280 for (i
= 0; i
< 8; i
++) {
281 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
282 pr_err("%-15s", rname
);
283 for (j
= 0; j
< 8; j
++)
284 pr_cont(" %08x", regs
[i
*8+j
]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
295 struct net_device
*netdev
= adapter
->netdev
;
296 struct ixgbe_hw
*hw
= &adapter
->hw
;
297 struct ixgbe_reg_info
*reginfo
;
299 struct ixgbe_ring
*tx_ring
;
300 struct ixgbe_tx_buffer
*tx_buffer
;
301 union ixgbe_adv_tx_desc
*tx_desc
;
302 struct my_u0
{ u64 a
; u64 b
; } *u0
;
303 struct ixgbe_ring
*rx_ring
;
304 union ixgbe_adv_rx_desc
*rx_desc
;
305 struct ixgbe_rx_buffer
*rx_buffer_info
;
309 if (!netif_msg_hw(adapter
))
312 /* Print netdevice Info */
314 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
328 reginfo
->name
; reginfo
++) {
329 ixgbe_regdump(hw
, reginfo
);
332 /* Print TX Ring Summary */
333 if (!netdev
|| !netif_running(netdev
))
336 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
339 tx_ring
= adapter
->tx_ring
[n
];
340 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
343 (u64
)dma_unmap_addr(tx_buffer
, dma
),
344 dma_unmap_len(tx_buffer
, len
),
345 tx_buffer
->next_to_watch
,
346 (u64
)tx_buffer
->time_stamp
);
350 if (!netif_msg_tx_done(adapter
))
351 goto rx_ring_summary
;
353 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
367 tx_ring
= adapter
->tx_ring
[n
];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
376 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
377 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
378 u0
= (struct my_u0
*)tx_desc
;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i
,
383 (u64
)dma_unmap_addr(tx_buffer
, dma
),
384 dma_unmap_len(tx_buffer
, len
),
385 tx_buffer
->next_to_watch
,
386 (u64
)tx_buffer
->time_stamp
,
388 if (i
== tx_ring
->next_to_use
&&
389 i
== tx_ring
->next_to_clean
)
391 else if (i
== tx_ring
->next_to_use
)
393 else if (i
== tx_ring
->next_to_clean
)
398 if (netif_msg_pktdata(adapter
) &&
399 dma_unmap_len(tx_buffer
, len
) != 0)
400 print_hex_dump(KERN_INFO
, "",
401 DUMP_PREFIX_ADDRESS
, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer
,
404 dma_unmap_len(tx_buffer
, len
),
409 /* Print RX Rings Summary */
411 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
414 rx_ring
= adapter
->rx_ring
[n
];
415 pr_info("%5d %5X %5X\n",
416 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
420 if (!netif_msg_rx_status(adapter
))
423 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
446 rx_ring
= adapter
->rx_ring
[n
];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i
= 0; i
< rx_ring
->count
; i
++) {
458 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
459 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
460 u0
= (struct my_u0
*)rx_desc
;
461 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
462 if (staterr
& IXGBE_RXD_STAT_DD
) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i
,
468 rx_buffer_info
->skb
);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i
,
474 (u64
)rx_buffer_info
->dma
,
475 rx_buffer_info
->skb
);
477 if (netif_msg_pktdata(adapter
)) {
478 print_hex_dump(KERN_INFO
, "",
479 DUMP_PREFIX_ADDRESS
, 16, 1,
480 phys_to_virt(rx_buffer_info
->dma
),
481 ixgbe_rx_bufsz(rx_ring
), true);
485 if (i
== rx_ring
->next_to_use
)
487 else if (i
== rx_ring
->next_to_clean
)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
503 /* Let firmware take over control of h/w */
504 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
505 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
506 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
515 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
516 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
528 u8 queue
, u8 msix_vector
)
531 struct ixgbe_hw
*hw
= &adapter
->hw
;
532 switch (hw
->mac
.type
) {
533 case ixgbe_mac_82598EB
:
534 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
537 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
538 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
539 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
540 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
541 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
543 case ixgbe_mac_82599EB
:
545 if (direction
== -1) {
547 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
548 index
= ((queue
& 1) * 8);
549 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
550 ivar
&= ~(0xFF << index
);
551 ivar
|= (msix_vector
<< index
);
552 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
555 /* tx or rx causes */
556 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
557 index
= ((16 * (queue
& 1)) + (8 * direction
));
558 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
559 ivar
&= ~(0xFF << index
);
560 ivar
|= (msix_vector
<< index
);
561 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
574 switch (adapter
->hw
.mac
.type
) {
575 case ixgbe_mac_82598EB
:
576 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
577 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
579 case ixgbe_mac_82599EB
:
581 mask
= (qmask
& 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
583 mask
= (qmask
>> 32);
584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
592 struct ixgbe_tx_buffer
*tx_buffer
)
594 if (tx_buffer
->skb
) {
595 dev_kfree_skb_any(tx_buffer
->skb
);
596 if (dma_unmap_len(tx_buffer
, len
))
597 dma_unmap_single(ring
->dev
,
598 dma_unmap_addr(tx_buffer
, dma
),
599 dma_unmap_len(tx_buffer
, len
),
601 } else if (dma_unmap_len(tx_buffer
, len
)) {
602 dma_unmap_page(ring
->dev
,
603 dma_unmap_addr(tx_buffer
, dma
),
604 dma_unmap_len(tx_buffer
, len
),
607 tx_buffer
->next_to_watch
= NULL
;
608 tx_buffer
->skb
= NULL
;
609 dma_unmap_len_set(tx_buffer
, len
, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
615 struct ixgbe_hw
*hw
= &adapter
->hw
;
616 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
620 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
621 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
624 switch (hw
->mac
.type
) {
625 case ixgbe_mac_82598EB
:
626 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
629 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
631 hwstats
->lxoffrxc
+= data
;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
639 &adapter
->tx_ring
[i
]->state
);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
644 struct ixgbe_hw
*hw
= &adapter
->hw
;
645 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
648 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
650 if (adapter
->ixgbe_ieee_pfc
)
651 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
653 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
654 ixgbe_update_xoff_rx_lfc(adapter
);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
660 switch (hw
->mac
.type
) {
661 case ixgbe_mac_82598EB
:
662 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
665 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
667 hwstats
->pxoffrxc
[i
] += xoff
[i
];
670 /* disarm tx queues that have received xoff frames */
671 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
672 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
673 u8 tc
= tx_ring
->dcb_tc
;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
680 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
682 return ring
->stats
.packets
;
685 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
687 struct ixgbe_adapter
*adapter
= netdev_priv(ring
->netdev
);
688 struct ixgbe_hw
*hw
= &adapter
->hw
;
690 u32 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
691 u32 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
694 return (head
< tail
) ?
695 tail
- head
: (tail
+ ring
->count
- head
);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
702 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
703 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
704 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
707 clear_check_for_tx_hang(tx_ring
);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old
== tx_done
) && tx_pending
) {
722 /* make sure it is true for two checks in a row */
723 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
726 /* update completed stats and continue */
727 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
744 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
745 ixgbe_service_event_schedule(adapter
);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
755 struct ixgbe_ring
*tx_ring
)
757 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
758 struct ixgbe_tx_buffer
*tx_buffer
;
759 union ixgbe_adv_tx_desc
*tx_desc
;
760 unsigned int total_bytes
= 0, total_packets
= 0;
761 unsigned int budget
= q_vector
->tx
.work_limit
;
762 unsigned int i
= tx_ring
->next_to_clean
;
764 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
767 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
768 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
772 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer
->next_to_watch
= NULL
;
788 /* update the statistics for this packet */
789 total_bytes
+= tx_buffer
->bytecount
;
790 total_packets
+= tx_buffer
->gso_segs
;
792 #ifdef CONFIG_IXGBE_PTP
793 if (unlikely(tx_buffer
->tx_flags
&
794 IXGBE_TX_FLAGS_TSTAMP
))
795 ixgbe_ptp_tx_hwtstamp(q_vector
,
800 dev_kfree_skb_any(tx_buffer
->skb
);
802 /* unmap skb header data */
803 dma_unmap_single(tx_ring
->dev
,
804 dma_unmap_addr(tx_buffer
, dma
),
805 dma_unmap_len(tx_buffer
, len
),
808 /* clear tx_buffer data */
809 tx_buffer
->skb
= NULL
;
810 dma_unmap_len_set(tx_buffer
, len
, 0);
812 /* unmap remaining buffers */
813 while (tx_desc
!= eop_desc
) {
819 tx_buffer
= tx_ring
->tx_buffer_info
;
820 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
823 /* unmap any remaining paged data */
824 if (dma_unmap_len(tx_buffer
, len
)) {
825 dma_unmap_page(tx_ring
->dev
,
826 dma_unmap_addr(tx_buffer
, dma
),
827 dma_unmap_len(tx_buffer
, len
),
829 dma_unmap_len_set(tx_buffer
, len
, 0);
833 /* move us one more past the eop_desc for start of next pkt */
839 tx_buffer
= tx_ring
->tx_buffer_info
;
840 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
843 /* issue prefetch for next Tx descriptor */
846 /* update budget accounting */
848 } while (likely(budget
));
851 tx_ring
->next_to_clean
= i
;
852 u64_stats_update_begin(&tx_ring
->syncp
);
853 tx_ring
->stats
.bytes
+= total_bytes
;
854 tx_ring
->stats
.packets
+= total_packets
;
855 u64_stats_update_end(&tx_ring
->syncp
);
856 q_vector
->tx
.total_bytes
+= total_bytes
;
857 q_vector
->tx
.total_packets
+= total_packets
;
859 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
860 /* schedule immediate reset if we believe we hung */
861 struct ixgbe_hw
*hw
= &adapter
->hw
;
862 e_err(drv
, "Detected Tx Unit Hang\n"
864 " TDH, TDT <%x>, <%x>\n"
865 " next_to_use <%x>\n"
866 " next_to_clean <%x>\n"
867 "tx_buffer_info[next_to_clean]\n"
868 " time_stamp <%lx>\n"
870 tx_ring
->queue_index
,
871 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
872 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
873 tx_ring
->next_to_use
, i
,
874 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
876 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
879 "tx hang %d detected on queue %d, resetting adapter\n",
880 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
882 /* schedule immediate reset if we believe we hung */
883 ixgbe_tx_timeout_reset(adapter
);
885 /* the adapter is about to reset, no point in enabling stuff */
889 netdev_tx_completed_queue(txring_txq(tx_ring
),
890 total_packets
, total_bytes
);
892 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
893 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
894 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
895 /* Make sure that anybody stopping the queue after this
896 * sees the new next_to_clean.
899 if (__netif_subqueue_stopped(tx_ring
->netdev
,
900 tx_ring
->queue_index
)
901 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
902 netif_wake_subqueue(tx_ring
->netdev
,
903 tx_ring
->queue_index
);
904 ++tx_ring
->tx_stats
.restart_queue
;
911 #ifdef CONFIG_IXGBE_DCA
912 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
913 struct ixgbe_ring
*tx_ring
,
916 struct ixgbe_hw
*hw
= &adapter
->hw
;
917 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
920 switch (hw
->mac
.type
) {
921 case ixgbe_mac_82598EB
:
922 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
924 case ixgbe_mac_82599EB
:
926 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
927 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
930 /* for unknown hardware do not write register */
935 * We can enable relaxed ordering for reads, but not writes when
936 * DCA is enabled. This is due to a known issue in some chipsets
937 * which will cause the DCA tag to be cleared.
939 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
940 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
941 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
943 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
946 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
947 struct ixgbe_ring
*rx_ring
,
950 struct ixgbe_hw
*hw
= &adapter
->hw
;
951 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
952 u8 reg_idx
= rx_ring
->reg_idx
;
955 switch (hw
->mac
.type
) {
956 case ixgbe_mac_82599EB
:
958 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
965 * We can enable relaxed ordering for reads, but not writes when
966 * DCA is enabled. This is due to a known issue in some chipsets
967 * which will cause the DCA tag to be cleared.
969 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
970 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
971 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
973 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
976 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
978 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
979 struct ixgbe_ring
*ring
;
982 if (q_vector
->cpu
== cpu
)
985 ixgbe_for_each_ring(ring
, q_vector
->tx
)
986 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
988 ixgbe_for_each_ring(ring
, q_vector
->rx
)
989 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
996 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1001 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1004 /* always use CB2 mode, difference is masked in the CB driver */
1005 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1007 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
1008 num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1012 for (i
= 0; i
< num_q_vectors
; i
++) {
1013 adapter
->q_vector
[i
]->cpu
= -1;
1014 ixgbe_update_dca(adapter
->q_vector
[i
]);
1018 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1020 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1021 unsigned long event
= *(unsigned long *)data
;
1023 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1027 case DCA_PROVIDER_ADD
:
1028 /* if we're already enabled, don't do it again */
1029 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1031 if (dca_add_requester(dev
) == 0) {
1032 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1033 ixgbe_setup_dca(adapter
);
1036 /* Fall Through since DCA is disabled. */
1037 case DCA_PROVIDER_REMOVE
:
1038 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1039 dca_remove_requester(dev
);
1040 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1041 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1049 #endif /* CONFIG_IXGBE_DCA */
1050 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1051 union ixgbe_adv_rx_desc
*rx_desc
,
1052 struct sk_buff
*skb
)
1054 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1055 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
1060 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1061 * @adapter: address of board private structure
1062 * @rx_desc: advanced rx descriptor
1064 * Returns : true if it is FCoE pkt
1066 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_adapter
*adapter
,
1067 union ixgbe_adv_rx_desc
*rx_desc
)
1069 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1071 return (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
1072 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1073 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1074 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1077 #endif /* IXGBE_FCOE */
1079 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1080 * @ring: structure containing ring specific data
1081 * @rx_desc: current Rx descriptor being processed
1082 * @skb: skb currently being received and modified
1084 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1085 union ixgbe_adv_rx_desc
*rx_desc
,
1086 struct sk_buff
*skb
)
1088 skb_checksum_none_assert(skb
);
1090 /* Rx csum disabled */
1091 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1094 /* if IP and error */
1095 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1096 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1097 ring
->rx_stats
.csum_err
++;
1101 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1104 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1105 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1108 * 82599 errata, UDP frames with a 0 checksum can be marked as
1111 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1112 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1115 ring
->rx_stats
.csum_err
++;
1119 /* It must be a TCP or UDP packet with a valid checksum */
1120 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1123 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1125 rx_ring
->next_to_use
= val
;
1127 /* update next to alloc since we have filled the ring */
1128 rx_ring
->next_to_alloc
= val
;
1130 * Force memory writes to complete before letting h/w
1131 * know there are new descriptors to fetch. (Only
1132 * applicable for weak-ordered memory model archs,
1136 writel(val
, rx_ring
->tail
);
1139 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1140 struct ixgbe_rx_buffer
*bi
)
1142 struct page
*page
= bi
->page
;
1143 dma_addr_t dma
= bi
->dma
;
1145 /* since we are recycling buffers we should seldom need to alloc */
1149 /* alloc new page for storage */
1150 if (likely(!page
)) {
1151 page
= alloc_pages(GFP_ATOMIC
| __GFP_COLD
,
1152 ixgbe_rx_pg_order(rx_ring
));
1153 if (unlikely(!page
)) {
1154 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1160 /* map page for use */
1161 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1162 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1165 * if mapping failed free memory back to system since
1166 * there isn't much point in holding memory we can't use
1168 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1169 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1172 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1177 bi
->page_offset
^= ixgbe_rx_bufsz(rx_ring
);
1183 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1184 * @rx_ring: ring to place buffers on
1185 * @cleaned_count: number of buffers to replace
1187 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1189 union ixgbe_adv_rx_desc
*rx_desc
;
1190 struct ixgbe_rx_buffer
*bi
;
1191 u16 i
= rx_ring
->next_to_use
;
1197 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1198 bi
= &rx_ring
->rx_buffer_info
[i
];
1199 i
-= rx_ring
->count
;
1202 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1206 * Refresh the desc even if buffer_addrs didn't change
1207 * because each write-back erases this info.
1209 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1215 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1216 bi
= rx_ring
->rx_buffer_info
;
1217 i
-= rx_ring
->count
;
1220 /* clear the hdr_addr for the next_to_use descriptor */
1221 rx_desc
->read
.hdr_addr
= 0;
1224 } while (cleaned_count
);
1226 i
+= rx_ring
->count
;
1228 if (rx_ring
->next_to_use
!= i
)
1229 ixgbe_release_rx_desc(rx_ring
, i
);
1233 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1234 * @data: pointer to the start of the headers
1235 * @max_len: total length of section to find headers in
1237 * This function is meant to determine the length of headers that will
1238 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1239 * motivation of doing this is to only perform one pull for IPv4 TCP
1240 * packets so that we can do basic things like calculating the gso_size
1241 * based on the average data per packet.
1243 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1244 unsigned int max_len
)
1247 unsigned char *network
;
1250 struct vlan_hdr
*vlan
;
1255 u8 nexthdr
= 0; /* default to not TCP */
1258 /* this should never happen, but better safe than sorry */
1259 if (max_len
< ETH_HLEN
)
1262 /* initialize network frame pointer */
1265 /* set first protocol and move network header forward */
1266 protocol
= hdr
.eth
->h_proto
;
1267 hdr
.network
+= ETH_HLEN
;
1269 /* handle any vlan tag if present */
1270 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
1271 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1274 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1275 hdr
.network
+= VLAN_HLEN
;
1278 /* handle L3 protocols */
1279 if (protocol
== __constant_htons(ETH_P_IP
)) {
1280 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1283 /* access ihl as a u8 to avoid unaligned access on ia64 */
1284 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1286 /* verify hlen meets minimum size requirements */
1287 if (hlen
< sizeof(struct iphdr
))
1288 return hdr
.network
- data
;
1290 /* record next protocol */
1291 nexthdr
= hdr
.ipv4
->protocol
;
1292 hdr
.network
+= hlen
;
1294 } else if (protocol
== __constant_htons(ETH_P_FCOE
)) {
1295 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1297 hdr
.network
+= FCOE_HEADER_LEN
;
1300 return hdr
.network
- data
;
1303 /* finally sort out TCP */
1304 if (nexthdr
== IPPROTO_TCP
) {
1305 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1308 /* access doff as a u8 to avoid unaligned access on ia64 */
1309 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1311 /* verify hlen meets minimum size requirements */
1312 if (hlen
< sizeof(struct tcphdr
))
1313 return hdr
.network
- data
;
1315 hdr
.network
+= hlen
;
1319 * If everything has gone correctly hdr.network should be the
1320 * data section of the packet and will be the end of the header.
1321 * If not then it probably represents the end of the last recognized
1324 if ((hdr
.network
- data
) < max_len
)
1325 return hdr
.network
- data
;
1330 static void ixgbe_get_rsc_cnt(struct ixgbe_ring
*rx_ring
,
1331 union ixgbe_adv_rx_desc
*rx_desc
,
1332 struct sk_buff
*skb
)
1337 if (!ring_is_rsc_enabled(rx_ring
))
1340 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1341 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1343 /* If this is an RSC frame rsc_cnt should be non-zero */
1347 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1348 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1350 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1353 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1354 struct sk_buff
*skb
)
1356 u16 hdr_len
= skb_headlen(skb
);
1358 /* set gso_size to avoid messing up TCP MSS */
1359 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1360 IXGBE_CB(skb
)->append_cnt
);
1363 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1364 struct sk_buff
*skb
)
1366 /* if append_cnt is 0 then frame is not RSC */
1367 if (!IXGBE_CB(skb
)->append_cnt
)
1370 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1371 rx_ring
->rx_stats
.rsc_flush
++;
1373 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1375 /* gso_size is computed using append_cnt so always clear it last */
1376 IXGBE_CB(skb
)->append_cnt
= 0;
1380 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1381 * @rx_ring: rx descriptor ring packet is being transacted on
1382 * @rx_desc: pointer to the EOP Rx descriptor
1383 * @skb: pointer to current skb being populated
1385 * This function checks the ring, descriptor, and packet information in
1386 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1387 * other fields within the skb.
1389 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1390 union ixgbe_adv_rx_desc
*rx_desc
,
1391 struct sk_buff
*skb
)
1393 struct net_device
*dev
= rx_ring
->netdev
;
1395 ixgbe_update_rsc_stats(rx_ring
, skb
);
1397 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1399 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1401 #ifdef CONFIG_IXGBE_PTP
1402 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_STAT_TS
))
1403 ixgbe_ptp_rx_hwtstamp(rx_ring
->q_vector
, skb
);
1406 if ((dev
->features
& NETIF_F_HW_VLAN_RX
) &&
1407 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1408 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1409 __vlan_hwaccel_put_tag(skb
, vid
);
1412 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1414 skb
->protocol
= eth_type_trans(skb
, dev
);
1417 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1418 struct sk_buff
*skb
)
1420 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1422 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1423 napi_gro_receive(&q_vector
->napi
, skb
);
1429 * ixgbe_is_non_eop - process handling of non-EOP buffers
1430 * @rx_ring: Rx ring being processed
1431 * @rx_desc: Rx descriptor for current buffer
1432 * @skb: Current socket buffer containing buffer in progress
1434 * This function updates next to clean. If the buffer is an EOP buffer
1435 * this function exits returning false, otherwise it will place the
1436 * sk_buff in the next buffer to be chained and return true indicating
1437 * that this is in fact a non-EOP buffer.
1439 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1440 union ixgbe_adv_rx_desc
*rx_desc
,
1441 struct sk_buff
*skb
)
1443 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1445 /* fetch, update, and store next to clean */
1446 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1447 rx_ring
->next_to_clean
= ntc
;
1449 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1451 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1454 /* append_cnt indicates packet is RSC, if so fetch nextp */
1455 if (IXGBE_CB(skb
)->append_cnt
) {
1456 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1457 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1458 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1461 /* place skb in next buffer to be received */
1462 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1463 rx_ring
->rx_stats
.non_eop_descs
++;
1469 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1470 * @rx_ring: rx descriptor ring packet is being transacted on
1471 * @rx_desc: pointer to the EOP Rx descriptor
1472 * @skb: pointer to current skb being fixed
1474 * Check for corrupted packet headers caused by senders on the local L2
1475 * embedded NIC switch not setting up their Tx Descriptors right. These
1476 * should be very rare.
1478 * Also address the case where we are pulling data in on pages only
1479 * and as such no data is present in the skb header.
1481 * In addition if skb is not at least 60 bytes we need to pad it so that
1482 * it is large enough to qualify as a valid Ethernet frame.
1484 * Returns true if an error was encountered and skb was freed.
1486 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1487 union ixgbe_adv_rx_desc
*rx_desc
,
1488 struct sk_buff
*skb
)
1490 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1491 struct net_device
*netdev
= rx_ring
->netdev
;
1493 unsigned int pull_len
;
1495 /* if the page was released unmap it, else just sync our portion */
1496 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1497 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1498 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1499 IXGBE_CB(skb
)->page_released
= false;
1501 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1504 ixgbe_rx_bufsz(rx_ring
),
1507 IXGBE_CB(skb
)->dma
= 0;
1509 /* verify that the packet does not have any known errors */
1510 if (unlikely(ixgbe_test_staterr(rx_desc
,
1511 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1512 !(netdev
->features
& NETIF_F_RXALL
))) {
1513 dev_kfree_skb_any(skb
);
1518 * it is valid to use page_address instead of kmap since we are
1519 * working with pages allocated out of the lomem pool per
1520 * alloc_page(GFP_ATOMIC)
1522 va
= skb_frag_address(frag
);
1525 * we need the header to contain the greater of either ETH_HLEN or
1526 * 60 bytes if the skb->len is less than 60 for skb_pad.
1528 pull_len
= skb_frag_size(frag
);
1530 pull_len
= ixgbe_get_headlen(va
, pull_len
);
1532 /* align pull length to size of long to optimize memcpy performance */
1533 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1535 /* update all of the pointers */
1536 skb_frag_size_sub(frag
, pull_len
);
1537 frag
->page_offset
+= pull_len
;
1538 skb
->data_len
-= pull_len
;
1539 skb
->tail
+= pull_len
;
1542 * if we sucked the frag empty then we should free it,
1543 * if there are other frags here something is screwed up in hardware
1545 if (skb_frag_size(frag
) == 0) {
1546 BUG_ON(skb_shinfo(skb
)->nr_frags
!= 1);
1547 skb_shinfo(skb
)->nr_frags
= 0;
1548 __skb_frag_unref(frag
);
1549 skb
->truesize
-= ixgbe_rx_bufsz(rx_ring
);
1552 /* if skb_pad returns an error the skb was freed */
1553 if (unlikely(skb
->len
< 60)) {
1554 int pad_len
= 60 - skb
->len
;
1556 if (skb_pad(skb
, pad_len
))
1558 __skb_put(skb
, pad_len
);
1565 * ixgbe_can_reuse_page - determine if we can reuse a page
1566 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1568 * Returns true if page can be reused in another Rx buffer
1570 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer
*rx_buffer
)
1572 struct page
*page
= rx_buffer
->page
;
1574 /* if we are only owner of page and it is local we can reuse it */
1575 return likely(page_count(page
) == 1) &&
1576 likely(page_to_nid(page
) == numa_node_id());
1580 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1581 * @rx_ring: rx descriptor ring to store buffers on
1582 * @old_buff: donor buffer to have page reused
1584 * Syncronizes page for reuse by the adapter
1586 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1587 struct ixgbe_rx_buffer
*old_buff
)
1589 struct ixgbe_rx_buffer
*new_buff
;
1590 u16 nta
= rx_ring
->next_to_alloc
;
1591 u16 bufsz
= ixgbe_rx_bufsz(rx_ring
);
1593 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1595 /* update, and store next to alloc */
1597 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1599 /* transfer page from old buffer to new buffer */
1600 new_buff
->page
= old_buff
->page
;
1601 new_buff
->dma
= old_buff
->dma
;
1603 /* flip page offset to other buffer and store to new_buff */
1604 new_buff
->page_offset
= old_buff
->page_offset
^ bufsz
;
1606 /* sync the buffer for use by the device */
1607 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1608 new_buff
->page_offset
, bufsz
,
1611 /* bump ref count on page before it is given to the stack */
1612 get_page(new_buff
->page
);
1616 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1617 * @rx_ring: rx descriptor ring to transact packets on
1618 * @rx_buffer: buffer containing page to add
1619 * @rx_desc: descriptor containing length of buffer written by hardware
1620 * @skb: sk_buff to place the data into
1622 * This function is based on skb_add_rx_frag. I would have used that
1623 * function however it doesn't handle the truesize case correctly since we
1624 * are allocating more memory than might be used for a single receive.
1626 static void ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1627 struct ixgbe_rx_buffer
*rx_buffer
,
1628 struct sk_buff
*skb
, int size
)
1630 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1631 rx_buffer
->page
, rx_buffer
->page_offset
,
1634 skb
->data_len
+= size
;
1635 skb
->truesize
+= ixgbe_rx_bufsz(rx_ring
);
1639 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1640 * @q_vector: structure containing interrupt and ring information
1641 * @rx_ring: rx descriptor ring to transact packets on
1642 * @budget: Total limit on number of packets to process
1644 * This function provides a "bounce buffer" approach to Rx interrupt
1645 * processing. The advantage to this is that on systems that have
1646 * expensive overhead for IOMMU access this provides a means of avoiding
1647 * it by maintaining the mapping of the page to the syste.
1649 * Returns true if all work is completed without reaching budget
1651 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1652 struct ixgbe_ring
*rx_ring
,
1655 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1657 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1659 #endif /* IXGBE_FCOE */
1660 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
1663 struct ixgbe_rx_buffer
*rx_buffer
;
1664 union ixgbe_adv_rx_desc
*rx_desc
;
1665 struct sk_buff
*skb
;
1669 /* return some buffers to hardware, one at a time is too slow */
1670 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1671 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1675 ntc
= rx_ring
->next_to_clean
;
1676 rx_desc
= IXGBE_RX_DESC(rx_ring
, ntc
);
1677 rx_buffer
= &rx_ring
->rx_buffer_info
[ntc
];
1679 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
1683 * This memory barrier is needed to keep us from reading
1684 * any other fields out of the rx_desc until we know the
1685 * RXD_STAT_DD bit is set
1689 page
= rx_buffer
->page
;
1692 skb
= rx_buffer
->skb
;
1695 void *page_addr
= page_address(page
) +
1696 rx_buffer
->page_offset
;
1698 /* prefetch first cache line of first page */
1699 prefetch(page_addr
);
1700 #if L1_CACHE_BYTES < 128
1701 prefetch(page_addr
+ L1_CACHE_BYTES
);
1704 /* allocate a skb to store the frags */
1705 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
1707 if (unlikely(!skb
)) {
1708 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1713 * we will be copying header into skb->data in
1714 * pskb_may_pull so it is in our interest to prefetch
1715 * it now to avoid a possible cache miss
1717 prefetchw(skb
->data
);
1720 * Delay unmapping of the first packet. It carries the
1721 * header information, HW may still access the header
1722 * after the writeback. Only unmap it when EOP is
1725 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1727 /* we are reusing so sync this buffer for CPU use */
1728 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1730 rx_buffer
->page_offset
,
1731 ixgbe_rx_bufsz(rx_ring
),
1735 /* pull page into skb */
1736 ixgbe_add_rx_frag(rx_ring
, rx_buffer
, skb
,
1737 le16_to_cpu(rx_desc
->wb
.upper
.length
));
1739 if (ixgbe_can_reuse_page(rx_buffer
)) {
1740 /* hand second half of page back to the ring */
1741 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1742 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1743 /* the page has been released from the ring */
1744 IXGBE_CB(skb
)->page_released
= true;
1746 /* we are not reusing the buffer so unmap it */
1747 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1748 ixgbe_rx_pg_size(rx_ring
),
1752 /* clear contents of buffer_info */
1753 rx_buffer
->skb
= NULL
;
1755 rx_buffer
->page
= NULL
;
1757 ixgbe_get_rsc_cnt(rx_ring
, rx_desc
, skb
);
1761 /* place incomplete frames back on ring for completion */
1762 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
1765 /* verify the packet layout is correct */
1766 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
1769 /* probably a little skewed due to removing CRC */
1770 total_rx_bytes
+= skb
->len
;
1773 /* populate checksum, timestamp, VLAN, and protocol */
1774 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
1777 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1778 if (ixgbe_rx_is_fcoe(adapter
, rx_desc
)) {
1779 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1781 dev_kfree_skb_any(skb
);
1786 #endif /* IXGBE_FCOE */
1787 ixgbe_rx_skb(q_vector
, skb
);
1789 /* update budget accounting */
1791 } while (likely(budget
));
1794 /* include DDPed FCoE data */
1795 if (ddp_bytes
> 0) {
1798 mss
= rx_ring
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1799 sizeof(struct fc_frame_header
) -
1800 sizeof(struct fcoe_crc_eof
);
1803 total_rx_bytes
+= ddp_bytes
;
1804 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1807 #endif /* IXGBE_FCOE */
1808 u64_stats_update_begin(&rx_ring
->syncp
);
1809 rx_ring
->stats
.packets
+= total_rx_packets
;
1810 rx_ring
->stats
.bytes
+= total_rx_bytes
;
1811 u64_stats_update_end(&rx_ring
->syncp
);
1812 q_vector
->rx
.total_packets
+= total_rx_packets
;
1813 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
1816 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1822 * ixgbe_configure_msix - Configure MSI-X hardware
1823 * @adapter: board private structure
1825 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1828 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1830 struct ixgbe_q_vector
*q_vector
;
1831 int q_vectors
, v_idx
;
1834 q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
1836 /* Populate MSIX to EITR Select */
1837 if (adapter
->num_vfs
> 32) {
1838 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
1839 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
1843 * Populate the IVAR table and set the ITR values to the
1844 * corresponding register.
1846 for (v_idx
= 0; v_idx
< q_vectors
; v_idx
++) {
1847 struct ixgbe_ring
*ring
;
1848 q_vector
= adapter
->q_vector
[v_idx
];
1850 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1851 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
1853 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1854 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
1856 if (q_vector
->tx
.ring
&& !q_vector
->rx
.ring
) {
1857 /* tx only vector */
1858 if (adapter
->tx_itr_setting
== 1)
1859 q_vector
->itr
= IXGBE_10K_ITR
;
1861 q_vector
->itr
= adapter
->tx_itr_setting
;
1863 /* rx or rx/tx vector */
1864 if (adapter
->rx_itr_setting
== 1)
1865 q_vector
->itr
= IXGBE_20K_ITR
;
1867 q_vector
->itr
= adapter
->rx_itr_setting
;
1870 ixgbe_write_eitr(q_vector
);
1873 switch (adapter
->hw
.mac
.type
) {
1874 case ixgbe_mac_82598EB
:
1875 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1878 case ixgbe_mac_82599EB
:
1879 case ixgbe_mac_X540
:
1880 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1885 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1887 /* set up to autoclear timer, and the vectors */
1888 mask
= IXGBE_EIMS_ENABLE_MASK
;
1889 mask
&= ~(IXGBE_EIMS_OTHER
|
1890 IXGBE_EIMS_MAILBOX
|
1893 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1896 enum latency_range
{
1900 latency_invalid
= 255
1904 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1905 * @q_vector: structure containing interrupt and ring information
1906 * @ring_container: structure containing ring performance data
1908 * Stores a new ITR value based on packets and byte
1909 * counts during the last interrupt. The advantage of per interrupt
1910 * computation is faster updates and more accurate ITR for the current
1911 * traffic pattern. Constants in this function were computed
1912 * based on theoretical maximum wire speed and thresholds were set based
1913 * on testing data as well as attempting to minimize response time
1914 * while increasing bulk throughput.
1915 * this functionality is controlled by the InterruptThrottleRate module
1916 * parameter (see ixgbe_param.c)
1918 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
1919 struct ixgbe_ring_container
*ring_container
)
1921 int bytes
= ring_container
->total_bytes
;
1922 int packets
= ring_container
->total_packets
;
1925 u8 itr_setting
= ring_container
->itr
;
1930 /* simple throttlerate management
1931 * 0-10MB/s lowest (100000 ints/s)
1932 * 10-20MB/s low (20000 ints/s)
1933 * 20-1249MB/s bulk (8000 ints/s)
1935 /* what was last interrupt timeslice? */
1936 timepassed_us
= q_vector
->itr
>> 2;
1937 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1939 switch (itr_setting
) {
1940 case lowest_latency
:
1941 if (bytes_perint
> 10)
1942 itr_setting
= low_latency
;
1945 if (bytes_perint
> 20)
1946 itr_setting
= bulk_latency
;
1947 else if (bytes_perint
<= 10)
1948 itr_setting
= lowest_latency
;
1951 if (bytes_perint
<= 20)
1952 itr_setting
= low_latency
;
1956 /* clear work counters since we have the values we need */
1957 ring_container
->total_bytes
= 0;
1958 ring_container
->total_packets
= 0;
1960 /* write updated itr to ring container */
1961 ring_container
->itr
= itr_setting
;
1965 * ixgbe_write_eitr - write EITR register in hardware specific way
1966 * @q_vector: structure containing interrupt and ring information
1968 * This function is made to be called by ethtool and by the driver
1969 * when it needs to update EITR registers at runtime. Hardware
1970 * specific quirks/differences are taken care of here.
1972 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1974 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1975 struct ixgbe_hw
*hw
= &adapter
->hw
;
1976 int v_idx
= q_vector
->v_idx
;
1977 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
1979 switch (adapter
->hw
.mac
.type
) {
1980 case ixgbe_mac_82598EB
:
1981 /* must write high and low 16 bits to reset counter */
1982 itr_reg
|= (itr_reg
<< 16);
1984 case ixgbe_mac_82599EB
:
1985 case ixgbe_mac_X540
:
1987 * set the WDIS bit to not clear the timer bits and cause an
1988 * immediate assertion of the interrupt
1990 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1995 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1998 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2000 u32 new_itr
= q_vector
->itr
;
2003 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2004 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2006 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2008 switch (current_itr
) {
2009 /* counts and packets in update_itr are dependent on these numbers */
2010 case lowest_latency
:
2011 new_itr
= IXGBE_100K_ITR
;
2014 new_itr
= IXGBE_20K_ITR
;
2017 new_itr
= IXGBE_8K_ITR
;
2023 if (new_itr
!= q_vector
->itr
) {
2024 /* do an exponential smoothing */
2025 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2026 ((9 * new_itr
) + q_vector
->itr
);
2028 /* save the algorithm value here */
2029 q_vector
->itr
= new_itr
;
2031 ixgbe_write_eitr(q_vector
);
2036 * ixgbe_check_overtemp_subtask - check for over temperature
2037 * @adapter: pointer to adapter
2039 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2041 struct ixgbe_hw
*hw
= &adapter
->hw
;
2042 u32 eicr
= adapter
->interrupt_event
;
2044 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2047 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2048 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2051 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2053 switch (hw
->device_id
) {
2054 case IXGBE_DEV_ID_82599_T3_LOM
:
2056 * Since the warning interrupt is for both ports
2057 * we don't have to check if:
2058 * - This interrupt wasn't for our port.
2059 * - We may have missed the interrupt so always have to
2060 * check if we got a LSC
2062 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2063 !(eicr
& IXGBE_EICR_LSC
))
2066 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2068 bool link_up
= false;
2070 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2076 /* Check if this is not due to overtemp */
2077 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2082 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2087 "Network adapter has been stopped because it has over heated. "
2088 "Restart the computer. If the problem persists, "
2089 "power off the system and replace the adapter\n");
2091 adapter
->interrupt_event
= 0;
2094 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2096 struct ixgbe_hw
*hw
= &adapter
->hw
;
2098 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2099 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2100 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2101 /* write to clear the interrupt */
2102 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2106 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2108 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2111 switch (adapter
->hw
.mac
.type
) {
2112 case ixgbe_mac_82599EB
:
2114 * Need to check link state so complete overtemp check
2117 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2118 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2119 adapter
->interrupt_event
= eicr
;
2120 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2121 ixgbe_service_event_schedule(adapter
);
2125 case ixgbe_mac_X540
:
2126 if (!(eicr
& IXGBE_EICR_TS
))
2134 "Network adapter has been stopped because it has over heated. "
2135 "Restart the computer. If the problem persists, "
2136 "power off the system and replace the adapter\n");
2139 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2141 struct ixgbe_hw
*hw
= &adapter
->hw
;
2143 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2144 /* Clear the interrupt */
2145 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2146 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2147 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2148 ixgbe_service_event_schedule(adapter
);
2152 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2153 /* Clear the interrupt */
2154 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2155 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2156 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2157 ixgbe_service_event_schedule(adapter
);
2162 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2164 struct ixgbe_hw
*hw
= &adapter
->hw
;
2167 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2168 adapter
->link_check_timeout
= jiffies
;
2169 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2170 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2171 IXGBE_WRITE_FLUSH(hw
);
2172 ixgbe_service_event_schedule(adapter
);
2176 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2180 struct ixgbe_hw
*hw
= &adapter
->hw
;
2182 switch (hw
->mac
.type
) {
2183 case ixgbe_mac_82598EB
:
2184 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2185 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2187 case ixgbe_mac_82599EB
:
2188 case ixgbe_mac_X540
:
2189 mask
= (qmask
& 0xFFFFFFFF);
2191 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2192 mask
= (qmask
>> 32);
2194 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2199 /* skip the flush */
2202 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2206 struct ixgbe_hw
*hw
= &adapter
->hw
;
2208 switch (hw
->mac
.type
) {
2209 case ixgbe_mac_82598EB
:
2210 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2211 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2213 case ixgbe_mac_82599EB
:
2214 case ixgbe_mac_X540
:
2215 mask
= (qmask
& 0xFFFFFFFF);
2217 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2218 mask
= (qmask
>> 32);
2220 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2225 /* skip the flush */
2229 * ixgbe_irq_enable - Enable default interrupt generation settings
2230 * @adapter: board private structure
2232 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2235 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2237 /* don't reenable LSC while waiting for link */
2238 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2239 mask
&= ~IXGBE_EIMS_LSC
;
2241 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2242 switch (adapter
->hw
.mac
.type
) {
2243 case ixgbe_mac_82599EB
:
2244 mask
|= IXGBE_EIMS_GPI_SDP0
;
2246 case ixgbe_mac_X540
:
2247 mask
|= IXGBE_EIMS_TS
;
2252 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2253 mask
|= IXGBE_EIMS_GPI_SDP1
;
2254 switch (adapter
->hw
.mac
.type
) {
2255 case ixgbe_mac_82599EB
:
2256 mask
|= IXGBE_EIMS_GPI_SDP1
;
2257 mask
|= IXGBE_EIMS_GPI_SDP2
;
2258 case ixgbe_mac_X540
:
2259 mask
|= IXGBE_EIMS_ECC
;
2260 mask
|= IXGBE_EIMS_MAILBOX
;
2265 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2266 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2267 mask
|= IXGBE_EIMS_FLOW_DIR
;
2269 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2271 ixgbe_irq_enable_queues(adapter
, ~0);
2273 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2276 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2278 struct ixgbe_adapter
*adapter
= data
;
2279 struct ixgbe_hw
*hw
= &adapter
->hw
;
2283 * Workaround for Silicon errata. Use clear-by-write instead
2284 * of clear-by-read. Reading with EICS will return the
2285 * interrupt causes without clearing, which later be done
2286 * with the write to EICR.
2288 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2289 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2291 if (eicr
& IXGBE_EICR_LSC
)
2292 ixgbe_check_lsc(adapter
);
2294 if (eicr
& IXGBE_EICR_MAILBOX
)
2295 ixgbe_msg_task(adapter
);
2297 switch (hw
->mac
.type
) {
2298 case ixgbe_mac_82599EB
:
2299 case ixgbe_mac_X540
:
2300 if (eicr
& IXGBE_EICR_ECC
)
2301 e_info(link
, "Received unrecoverable ECC Err, please "
2303 /* Handle Flow Director Full threshold interrupt */
2304 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2305 int reinit_count
= 0;
2307 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2308 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2309 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2314 /* no more flow director interrupts until after init */
2315 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2316 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2317 ixgbe_service_event_schedule(adapter
);
2320 ixgbe_check_sfp_event(adapter
, eicr
);
2321 ixgbe_check_overtemp_event(adapter
, eicr
);
2327 ixgbe_check_fan_failure(adapter
, eicr
);
2328 #ifdef CONFIG_IXGBE_PTP
2329 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2332 /* re-enable the original interrupt state, no lsc, no queues */
2333 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2334 ixgbe_irq_enable(adapter
, false, false);
2339 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2341 struct ixgbe_q_vector
*q_vector
= data
;
2343 /* EIAM disabled interrupts (on this vector) for us */
2345 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2346 napi_schedule(&q_vector
->napi
);
2352 * ixgbe_poll - NAPI Rx polling callback
2353 * @napi: structure for representing this polling device
2354 * @budget: how many packets driver is allowed to clean
2356 * This function is used for legacy and MSI, NAPI mode
2358 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2360 struct ixgbe_q_vector
*q_vector
=
2361 container_of(napi
, struct ixgbe_q_vector
, napi
);
2362 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2363 struct ixgbe_ring
*ring
;
2364 int per_ring_budget
;
2365 bool clean_complete
= true;
2367 #ifdef CONFIG_IXGBE_DCA
2368 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2369 ixgbe_update_dca(q_vector
);
2372 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2373 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2375 /* attempt to distribute budget to each queue fairly, but don't allow
2376 * the budget to go below 1 because we'll exit polling */
2377 if (q_vector
->rx
.count
> 1)
2378 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2380 per_ring_budget
= budget
;
2382 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2383 clean_complete
&= ixgbe_clean_rx_irq(q_vector
, ring
,
2386 /* If all work not completed, return budget and keep polling */
2387 if (!clean_complete
)
2390 /* all work done, exit the polling mode */
2391 napi_complete(napi
);
2392 if (adapter
->rx_itr_setting
& 1)
2393 ixgbe_set_itr(q_vector
);
2394 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2395 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2401 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2402 * @adapter: board private structure
2404 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2405 * interrupts from the kernel.
2407 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2409 struct net_device
*netdev
= adapter
->netdev
;
2410 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
2414 for (vector
= 0; vector
< q_vectors
; vector
++) {
2415 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2416 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2418 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2419 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2420 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2422 } else if (q_vector
->rx
.ring
) {
2423 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2424 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2425 } else if (q_vector
->tx
.ring
) {
2426 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2427 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2429 /* skip this unused q_vector */
2432 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2433 q_vector
->name
, q_vector
);
2435 e_err(probe
, "request_irq failed for MSIX interrupt "
2436 "Error: %d\n", err
);
2437 goto free_queue_irqs
;
2439 /* If Flow Director is enabled, set interrupt affinity */
2440 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2441 /* assign the mask for this irq */
2442 irq_set_affinity_hint(entry
->vector
,
2443 &q_vector
->affinity_mask
);
2447 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2448 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2450 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2451 goto free_queue_irqs
;
2459 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2461 free_irq(adapter
->msix_entries
[vector
].vector
,
2462 adapter
->q_vector
[vector
]);
2464 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2465 pci_disable_msix(adapter
->pdev
);
2466 kfree(adapter
->msix_entries
);
2467 adapter
->msix_entries
= NULL
;
2472 * ixgbe_intr - legacy mode Interrupt Handler
2473 * @irq: interrupt number
2474 * @data: pointer to a network interface device structure
2476 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2478 struct ixgbe_adapter
*adapter
= data
;
2479 struct ixgbe_hw
*hw
= &adapter
->hw
;
2480 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2484 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2485 * before the read of EICR.
2487 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2489 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2490 * therefore no explicit interrupt disable is necessary */
2491 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2494 * shared interrupt alert!
2495 * make sure interrupts are enabled because the read will
2496 * have disabled interrupts due to EIAM
2497 * finish the workaround of silicon errata on 82598. Unmask
2498 * the interrupt that we masked before the EICR read.
2500 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2501 ixgbe_irq_enable(adapter
, true, true);
2502 return IRQ_NONE
; /* Not our interrupt */
2505 if (eicr
& IXGBE_EICR_LSC
)
2506 ixgbe_check_lsc(adapter
);
2508 switch (hw
->mac
.type
) {
2509 case ixgbe_mac_82599EB
:
2510 ixgbe_check_sfp_event(adapter
, eicr
);
2512 case ixgbe_mac_X540
:
2513 if (eicr
& IXGBE_EICR_ECC
)
2514 e_info(link
, "Received unrecoverable ECC err, please "
2516 ixgbe_check_overtemp_event(adapter
, eicr
);
2522 ixgbe_check_fan_failure(adapter
, eicr
);
2523 #ifdef CONFIG_IXGBE_PTP
2524 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2527 /* would disable interrupts here but EIAM disabled it */
2528 napi_schedule(&q_vector
->napi
);
2531 * re-enable link(maybe) and non-queue interrupts, no flush.
2532 * ixgbe_poll will re-enable the queue interrupts
2534 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2535 ixgbe_irq_enable(adapter
, false, false);
2541 * ixgbe_request_irq - initialize interrupts
2542 * @adapter: board private structure
2544 * Attempts to configure interrupts using the best available
2545 * capabilities of the hardware and kernel.
2547 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2549 struct net_device
*netdev
= adapter
->netdev
;
2552 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2553 err
= ixgbe_request_msix_irqs(adapter
);
2554 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2555 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2556 netdev
->name
, adapter
);
2558 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2559 netdev
->name
, adapter
);
2562 e_err(probe
, "request_irq failed, Error %d\n", err
);
2567 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2569 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2572 q_vectors
= adapter
->num_msix_vectors
;
2574 free_irq(adapter
->msix_entries
[i
].vector
, adapter
);
2577 for (; i
>= 0; i
--) {
2578 /* free only the irqs that were actually requested */
2579 if (!adapter
->q_vector
[i
]->rx
.ring
&&
2580 !adapter
->q_vector
[i
]->tx
.ring
)
2583 /* clear the affinity_mask in the IRQ descriptor */
2584 irq_set_affinity_hint(adapter
->msix_entries
[i
].vector
,
2587 free_irq(adapter
->msix_entries
[i
].vector
,
2588 adapter
->q_vector
[i
]);
2591 free_irq(adapter
->pdev
->irq
, adapter
);
2596 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2597 * @adapter: board private structure
2599 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2601 switch (adapter
->hw
.mac
.type
) {
2602 case ixgbe_mac_82598EB
:
2603 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2605 case ixgbe_mac_82599EB
:
2606 case ixgbe_mac_X540
:
2607 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2608 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2609 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2614 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2615 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2617 for (i
= 0; i
< adapter
->num_msix_vectors
; i
++)
2618 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2620 synchronize_irq(adapter
->pdev
->irq
);
2625 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2628 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2630 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2633 if (adapter
->rx_itr_setting
== 1)
2634 q_vector
->itr
= IXGBE_20K_ITR
;
2636 q_vector
->itr
= adapter
->rx_itr_setting
;
2638 ixgbe_write_eitr(q_vector
);
2640 ixgbe_set_ivar(adapter
, 0, 0, 0);
2641 ixgbe_set_ivar(adapter
, 1, 0, 0);
2643 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2647 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2648 * @adapter: board private structure
2649 * @ring: structure containing ring specific data
2651 * Configure the Tx descriptor ring after a reset.
2653 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2654 struct ixgbe_ring
*ring
)
2656 struct ixgbe_hw
*hw
= &adapter
->hw
;
2657 u64 tdba
= ring
->dma
;
2659 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2660 u8 reg_idx
= ring
->reg_idx
;
2662 /* disable queue to avoid issues while updating state */
2663 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2664 IXGBE_WRITE_FLUSH(hw
);
2666 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2667 (tdba
& DMA_BIT_MASK(32)));
2668 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2669 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2670 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2671 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2672 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2673 ring
->tail
= hw
->hw_addr
+ IXGBE_TDT(reg_idx
);
2676 * set WTHRESH to encourage burst writeback, it should not be set
2677 * higher than 1 when ITR is 0 as it could cause false TX hangs
2679 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2680 * to or less than the number of on chip descriptors, which is
2683 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
2684 txdctl
|= (1 << 16); /* WTHRESH = 1 */
2686 txdctl
|= (8 << 16); /* WTHRESH = 8 */
2689 * Setting PTHRESH to 32 both improves performance
2690 * and avoids a TX hang with DFP enabled
2692 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
2693 32; /* PTHRESH = 32 */
2695 /* reinitialize flowdirector state */
2696 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2697 adapter
->atr_sample_rate
) {
2698 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
2699 ring
->atr_count
= 0;
2700 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
2702 ring
->atr_sample_rate
= 0;
2705 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
2708 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2710 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2711 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2712 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2715 /* poll to verify queue is enabled */
2717 usleep_range(1000, 2000);
2718 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2719 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2721 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2724 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2726 struct ixgbe_hw
*hw
= &adapter
->hw
;
2729 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2731 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2734 /* disable the arbiter while setting MTQC */
2735 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2736 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2737 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2739 /* set transmit pool layout */
2740 switch (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2741 case (IXGBE_FLAG_SRIOV_ENABLED
):
2742 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2743 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2747 reg
= IXGBE_MTQC_64Q_1PB
;
2749 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
2751 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
2753 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, reg
);
2755 /* Enable Security TX Buffer IFG for multiple pb */
2757 reg
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
2758 reg
|= IXGBE_SECTX_DCB
;
2759 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, reg
);
2764 /* re-enable the arbiter */
2765 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2766 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2770 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2771 * @adapter: board private structure
2773 * Configure the Tx unit of the MAC after a reset.
2775 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2777 struct ixgbe_hw
*hw
= &adapter
->hw
;
2781 ixgbe_setup_mtqc(adapter
);
2783 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2784 /* DMATXCTL.EN must be before Tx queues are enabled */
2785 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2786 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2787 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2790 /* Setup the HW Tx Head and Tail descriptor pointers */
2791 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2792 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2795 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
2796 struct ixgbe_ring
*ring
)
2798 struct ixgbe_hw
*hw
= &adapter
->hw
;
2799 u8 reg_idx
= ring
->reg_idx
;
2800 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2802 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2804 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2807 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
2808 struct ixgbe_ring
*ring
)
2810 struct ixgbe_hw
*hw
= &adapter
->hw
;
2811 u8 reg_idx
= ring
->reg_idx
;
2812 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2814 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
2816 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2819 #ifdef CONFIG_IXGBE_DCB
2820 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2822 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2826 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
2828 if (adapter
->ixgbe_ieee_pfc
)
2829 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
2832 * We should set the drop enable bit if:
2835 * Number of Rx queues > 1 and flow control is disabled
2837 * This allows us to avoid head of line blocking for security
2838 * and performance reasons.
2840 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
2841 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
2842 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2843 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2845 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2846 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2850 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2852 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2853 struct ixgbe_ring
*rx_ring
)
2856 u8 reg_idx
= rx_ring
->reg_idx
;
2858 switch (adapter
->hw
.mac
.type
) {
2859 case ixgbe_mac_82598EB
: {
2860 struct ixgbe_ring_feature
*feature
= adapter
->ring_feature
;
2861 const int mask
= feature
[RING_F_RSS
].mask
;
2862 reg_idx
= reg_idx
& mask
;
2865 case ixgbe_mac_82599EB
:
2866 case ixgbe_mac_X540
:
2871 srrctl
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SRRCTL(reg_idx
));
2873 srrctl
&= ~IXGBE_SRRCTL_BSIZEHDR_MASK
;
2874 srrctl
&= ~IXGBE_SRRCTL_BSIZEPKT_MASK
;
2875 if (adapter
->num_vfs
)
2876 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2878 srrctl
|= (IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
) &
2879 IXGBE_SRRCTL_BSIZEHDR_MASK
;
2881 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2882 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2884 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2886 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2888 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2891 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2893 struct ixgbe_hw
*hw
= &adapter
->hw
;
2894 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2895 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2896 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2897 u32 mrqc
= 0, reta
= 0;
2900 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2901 int maxq
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2904 maxq
= min(maxq
, adapter
->num_tx_queues
/ tcs
);
2906 /* Fill out hash function seeds */
2907 for (i
= 0; i
< 10; i
++)
2908 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2910 /* Fill out redirection table */
2911 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2914 /* reta = 4-byte sliding window of
2915 * 0x00..(indices-1)(indices-1)00..etc. */
2916 reta
= (reta
<< 8) | (j
* 0x11);
2918 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2921 /* Disable indicating checksum in descriptor, enables RSS hash */
2922 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2923 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2924 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2926 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
&&
2927 (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
2928 mrqc
= IXGBE_MRQC_RSSEN
;
2930 int mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2931 | IXGBE_FLAG_SRIOV_ENABLED
);
2934 case (IXGBE_FLAG_RSS_ENABLED
):
2936 mrqc
= IXGBE_MRQC_RSSEN
;
2938 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
2940 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
2942 case (IXGBE_FLAG_SRIOV_ENABLED
):
2943 mrqc
= IXGBE_MRQC_VMDQEN
;
2950 /* Perform hash on these packet types */
2951 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2952 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2953 | IXGBE_MRQC_RSS_FIELD_IPV6
2954 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2956 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
2957 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
2958 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
2959 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2961 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2965 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2966 * @adapter: address of board private structure
2967 * @index: index of ring to set
2969 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
2970 struct ixgbe_ring
*ring
)
2972 struct ixgbe_hw
*hw
= &adapter
->hw
;
2974 u8 reg_idx
= ring
->reg_idx
;
2976 if (!ring_is_rsc_enabled(ring
))
2979 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
2980 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2982 * we must limit the number of descriptors so that the
2983 * total size of max desc * buf_len is not greater
2986 #if (PAGE_SIZE <= 8192)
2987 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2988 #elif (PAGE_SIZE <= 16384)
2989 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2991 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2993 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
2996 #define IXGBE_MAX_RX_DESC_POLL 10
2997 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2998 struct ixgbe_ring
*ring
)
3000 struct ixgbe_hw
*hw
= &adapter
->hw
;
3001 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3003 u8 reg_idx
= ring
->reg_idx
;
3005 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3006 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3007 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3011 usleep_range(1000, 2000);
3012 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3013 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3016 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3017 "the polling period\n", reg_idx
);
3021 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3022 struct ixgbe_ring
*ring
)
3024 struct ixgbe_hw
*hw
= &adapter
->hw
;
3025 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3027 u8 reg_idx
= ring
->reg_idx
;
3029 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3030 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3032 /* write value back with RXDCTL.ENABLE bit cleared */
3033 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3035 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3036 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3039 /* the hardware may take up to 100us to really disable the rx queue */
3042 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3043 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3046 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3047 "the polling period\n", reg_idx
);
3051 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3052 struct ixgbe_ring
*ring
)
3054 struct ixgbe_hw
*hw
= &adapter
->hw
;
3055 u64 rdba
= ring
->dma
;
3057 u8 reg_idx
= ring
->reg_idx
;
3059 /* disable queue to avoid issues while updating state */
3060 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3061 ixgbe_disable_rx_queue(adapter
, ring
);
3063 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3064 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3065 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3066 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3067 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3068 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3069 ring
->tail
= hw
->hw_addr
+ IXGBE_RDT(reg_idx
);
3071 ixgbe_configure_srrctl(adapter
, ring
);
3072 ixgbe_configure_rscctl(adapter
, ring
);
3074 /* If operating in IOV mode set RLPML for X540 */
3075 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
3076 hw
->mac
.type
== ixgbe_mac_X540
) {
3077 rxdctl
&= ~IXGBE_RXDCTL_RLPMLMASK
;
3078 rxdctl
|= ((ring
->netdev
->mtu
+ ETH_HLEN
+
3079 ETH_FCS_LEN
+ VLAN_HLEN
) | IXGBE_RXDCTL_RLPML_EN
);
3082 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3084 * enable cache line friendly hardware writes:
3085 * PTHRESH=32 descriptors (half the internal cache),
3086 * this also removes ugly rx_no_buffer_count increment
3087 * HTHRESH=4 descriptors (to minimize latency on fetch)
3088 * WTHRESH=8 burst writeback up to two cache lines
3090 rxdctl
&= ~0x3FFFFF;
3094 /* enable receive descriptor ring */
3095 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3096 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3098 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3099 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3102 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3104 struct ixgbe_hw
*hw
= &adapter
->hw
;
3107 /* PSRTYPE must be initialized in non 82598 adapters */
3108 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3109 IXGBE_PSRTYPE_UDPHDR
|
3110 IXGBE_PSRTYPE_IPV4HDR
|
3111 IXGBE_PSRTYPE_L2HDR
|
3112 IXGBE_PSRTYPE_IPV6HDR
;
3114 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3117 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)
3118 psrtype
|= (adapter
->num_rx_queues_per_pool
<< 29);
3120 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
3121 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(adapter
->num_vfs
+ p
),
3125 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3127 struct ixgbe_hw
*hw
= &adapter
->hw
;
3130 u32 reg_offset
, vf_shift
;
3134 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3137 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3138 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
| IXGBE_VT_CTL_REPLEN
;
3139 vt_reg_bits
|= (adapter
->num_vfs
<< IXGBE_VT_CTL_POOL_SHIFT
);
3140 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
3142 vf_shift
= adapter
->num_vfs
% 32;
3143 reg_offset
= (adapter
->num_vfs
>= 32) ? 1 : 0;
3145 /* Enable only the PF's pool for Tx/Rx */
3146 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
3147 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), 0);
3148 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
3149 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), 0);
3150 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3152 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3153 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
3156 * Set up VF register offsets for selected VT Mode,
3157 * i.e. 32 or 64 VFs for SR-IOV
3159 gcr_ext
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
3160 gcr_ext
|= IXGBE_GCR_EXT_MSIX_EN
;
3161 gcr_ext
|= IXGBE_GCR_EXT_VT_MODE_64
;
3162 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3164 /* enable Tx loopback for VF/PF communication */
3165 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3166 /* Enable MAC Anti-Spoofing */
3167 hw
->mac
.ops
.set_mac_anti_spoofing(hw
,
3168 (adapter
->num_vfs
!= 0),
3170 /* For VFs that have spoof checking turned off */
3171 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3172 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3173 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3177 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3179 struct ixgbe_hw
*hw
= &adapter
->hw
;
3180 struct net_device
*netdev
= adapter
->netdev
;
3181 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3182 struct ixgbe_ring
*rx_ring
;
3187 /* adjust max frame to be able to do baby jumbo for FCoE */
3188 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3189 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3190 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3192 #endif /* IXGBE_FCOE */
3193 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3194 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3195 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3196 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3198 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3201 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3202 max_frame
+= VLAN_HLEN
;
3204 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3205 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3206 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3207 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3210 * Setup the HW Rx Head and Tail Descriptor Pointers and
3211 * the Base and Length of the Rx Descriptor Ring
3213 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3214 rx_ring
= adapter
->rx_ring
[i
];
3215 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3216 set_ring_rsc_enabled(rx_ring
);
3218 clear_ring_rsc_enabled(rx_ring
);
3222 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3224 struct ixgbe_hw
*hw
= &adapter
->hw
;
3225 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3227 switch (hw
->mac
.type
) {
3228 case ixgbe_mac_82598EB
:
3230 * For VMDq support of different descriptor types or
3231 * buffer sizes through the use of multiple SRRCTL
3232 * registers, RDRXCTL.MVMEN must be set to 1
3234 * also, the manual doesn't mention it clearly but DCA hints
3235 * will only use queue 0's tags unless this bit is set. Side
3236 * effects of setting this bit are only that SRRCTL must be
3237 * fully programmed [0..15]
3239 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3241 case ixgbe_mac_82599EB
:
3242 case ixgbe_mac_X540
:
3243 /* Disable RSC for ACK packets */
3244 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3245 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3246 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3247 /* hardware requires some bits to be set by default */
3248 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3249 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3252 /* We should do nothing since we don't know this hardware */
3256 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3260 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3261 * @adapter: board private structure
3263 * Configure the Rx unit of the MAC after a reset.
3265 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3267 struct ixgbe_hw
*hw
= &adapter
->hw
;
3271 /* disable receives while setting up the descriptors */
3272 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3273 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3275 ixgbe_setup_psrtype(adapter
);
3276 ixgbe_setup_rdrxctl(adapter
);
3278 /* Program registers for the distribution of queues */
3279 ixgbe_setup_mrqc(adapter
);
3281 /* set_rx_buffer_len must be called before ring initialization */
3282 ixgbe_set_rx_buffer_len(adapter
);
3285 * Setup the HW Rx Head and Tail Descriptor Pointers and
3286 * the Base and Length of the Rx Descriptor Ring
3288 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3289 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3291 /* disable drop enable for 82598 parts */
3292 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3293 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3295 /* enable all receives */
3296 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3297 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3300 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3302 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3303 struct ixgbe_hw
*hw
= &adapter
->hw
;
3304 int pool_ndx
= adapter
->num_vfs
;
3306 /* add VID to filter table */
3307 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
3308 set_bit(vid
, adapter
->active_vlans
);
3313 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3315 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3316 struct ixgbe_hw
*hw
= &adapter
->hw
;
3317 int pool_ndx
= adapter
->num_vfs
;
3319 /* remove VID from filter table */
3320 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
3321 clear_bit(vid
, adapter
->active_vlans
);
3327 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3328 * @adapter: driver data
3330 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3332 struct ixgbe_hw
*hw
= &adapter
->hw
;
3335 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3336 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3337 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3341 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3342 * @adapter: driver data
3344 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3346 struct ixgbe_hw
*hw
= &adapter
->hw
;
3349 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3350 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3351 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3352 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3356 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3357 * @adapter: driver data
3359 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3361 struct ixgbe_hw
*hw
= &adapter
->hw
;
3365 switch (hw
->mac
.type
) {
3366 case ixgbe_mac_82598EB
:
3367 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3368 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3369 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3371 case ixgbe_mac_82599EB
:
3372 case ixgbe_mac_X540
:
3373 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3374 j
= adapter
->rx_ring
[i
]->reg_idx
;
3375 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3376 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3377 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3386 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3387 * @adapter: driver data
3389 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3391 struct ixgbe_hw
*hw
= &adapter
->hw
;
3395 switch (hw
->mac
.type
) {
3396 case ixgbe_mac_82598EB
:
3397 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3398 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3399 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3401 case ixgbe_mac_82599EB
:
3402 case ixgbe_mac_X540
:
3403 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3404 j
= adapter
->rx_ring
[i
]->reg_idx
;
3405 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3406 vlnctrl
|= IXGBE_RXDCTL_VME
;
3407 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3415 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3419 ixgbe_vlan_rx_add_vid(adapter
->netdev
, 0);
3421 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3422 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3426 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3427 * @netdev: network interface device structure
3429 * Writes unicast address list to the RAR table.
3430 * Returns: -ENOMEM on failure/insufficient address space
3431 * 0 on no addresses written
3432 * X on writing X addresses to the RAR table
3434 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3436 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3437 struct ixgbe_hw
*hw
= &adapter
->hw
;
3438 unsigned int vfn
= adapter
->num_vfs
;
3439 unsigned int rar_entries
= IXGBE_MAX_PF_MACVLANS
;
3442 /* return ENOMEM indicating insufficient memory for addresses */
3443 if (netdev_uc_count(netdev
) > rar_entries
)
3446 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3447 struct netdev_hw_addr
*ha
;
3448 /* return error if we do not support writing to RAR table */
3449 if (!hw
->mac
.ops
.set_rar
)
3452 netdev_for_each_uc_addr(ha
, netdev
) {
3455 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3460 /* write the addresses in reverse order to avoid write combining */
3461 for (; rar_entries
> 0 ; rar_entries
--)
3462 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3468 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3469 * @netdev: network interface device structure
3471 * The set_rx_method entry point is called whenever the unicast/multicast
3472 * address list or the network interface flags are updated. This routine is
3473 * responsible for configuring the hardware for proper unicast, multicast and
3476 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3478 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3479 struct ixgbe_hw
*hw
= &adapter
->hw
;
3480 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3483 /* Check for Promiscuous and All Multicast modes */
3485 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3487 /* set all bits that we expect to always be set */
3488 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3489 fctrl
|= IXGBE_FCTRL_BAM
;
3490 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3491 fctrl
|= IXGBE_FCTRL_PMCF
;
3493 /* clear the bits we are changing the status of */
3494 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3496 if (netdev
->flags
& IFF_PROMISC
) {
3497 hw
->addr_ctrl
.user_set_promisc
= true;
3498 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3499 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3500 /* don't hardware filter vlans in promisc mode */
3501 ixgbe_vlan_filter_disable(adapter
);
3503 if (netdev
->flags
& IFF_ALLMULTI
) {
3504 fctrl
|= IXGBE_FCTRL_MPE
;
3505 vmolr
|= IXGBE_VMOLR_MPE
;
3508 * Write addresses to the MTA, if the attempt fails
3509 * then we should just turn on promiscuous mode so
3510 * that we can at least receive multicast traffic
3512 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3513 vmolr
|= IXGBE_VMOLR_ROMPE
;
3515 ixgbe_vlan_filter_enable(adapter
);
3516 hw
->addr_ctrl
.user_set_promisc
= false;
3520 * Write addresses to available RAR registers, if there is not
3521 * sufficient space to store all the addresses then enable
3522 * unicast promiscuous mode
3524 count
= ixgbe_write_uc_addr_list(netdev
);
3526 fctrl
|= IXGBE_FCTRL_UPE
;
3527 vmolr
|= IXGBE_VMOLR_ROPE
;
3530 if (adapter
->num_vfs
) {
3531 ixgbe_restore_vf_multicasts(adapter
);
3532 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
)) &
3533 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3535 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
), vmolr
);
3538 /* This is useful for sniffing bad packets. */
3539 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3540 /* UPE and MPE will be handled by normal PROMISC logic
3541 * in e1000e_set_rx_mode */
3542 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3543 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3544 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3546 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3547 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3550 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3552 if (netdev
->features
& NETIF_F_HW_VLAN_RX
)
3553 ixgbe_vlan_strip_enable(adapter
);
3555 ixgbe_vlan_strip_disable(adapter
);
3558 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3561 struct ixgbe_q_vector
*q_vector
;
3562 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3564 /* legacy and MSI only use one vector */
3565 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3568 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3569 q_vector
= adapter
->q_vector
[q_idx
];
3570 napi_enable(&q_vector
->napi
);
3574 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3577 struct ixgbe_q_vector
*q_vector
;
3578 int q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
3580 /* legacy and MSI only use one vector */
3581 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
))
3584 for (q_idx
= 0; q_idx
< q_vectors
; q_idx
++) {
3585 q_vector
= adapter
->q_vector
[q_idx
];
3586 napi_disable(&q_vector
->napi
);
3590 #ifdef CONFIG_IXGBE_DCB
3592 * ixgbe_configure_dcb - Configure DCB hardware
3593 * @adapter: ixgbe adapter struct
3595 * This is called by the driver on open to configure the DCB hardware.
3596 * This is also called by the gennetlink interface when reconfiguring
3599 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3601 struct ixgbe_hw
*hw
= &adapter
->hw
;
3602 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3604 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3605 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3606 netif_set_gso_max_size(adapter
->netdev
, 65536);
3610 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3611 netif_set_gso_max_size(adapter
->netdev
, 32768);
3613 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3616 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3617 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3620 /* reconfigure the hardware */
3621 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
3622 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3624 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3626 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
3627 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
3628 ixgbe_dcb_hw_ets(&adapter
->hw
,
3629 adapter
->ixgbe_ieee_ets
,
3631 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
3632 adapter
->ixgbe_ieee_pfc
->pfc_en
,
3633 adapter
->ixgbe_ieee_ets
->prio_tc
);
3636 /* Enable RSS Hash per TC */
3637 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3641 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
3643 u8 cnt
= adapter
->netdev
->tc_to_txq
[i
].count
;
3648 reg
|= msb
<< IXGBE_RQTC_SHIFT_TC(i
);
3650 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, reg
);
3655 /* Additional bittime to account for IXGBE framing */
3656 #define IXGBE_ETH_FRAMING 20
3659 * ixgbe_hpbthresh - calculate high water mark for flow control
3661 * @adapter: board private structure to calculate for
3662 * @pb - packet buffer to calculate
3664 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
3666 struct ixgbe_hw
*hw
= &adapter
->hw
;
3667 struct net_device
*dev
= adapter
->netdev
;
3668 int link
, tc
, kb
, marker
;
3671 /* Calculate max LAN frame size */
3672 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
3675 /* FCoE traffic class uses FCOE jumbo frames */
3676 if (dev
->features
& NETIF_F_FCOE_MTU
) {
3679 #ifdef CONFIG_IXGBE_DCB
3680 fcoe_pb
= netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
);
3683 if (fcoe_pb
== pb
&& tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
3684 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3688 /* Calculate delay value for device */
3689 switch (hw
->mac
.type
) {
3690 case ixgbe_mac_X540
:
3691 dv_id
= IXGBE_DV_X540(link
, tc
);
3694 dv_id
= IXGBE_DV(link
, tc
);
3698 /* Loopback switch introduces additional latency */
3699 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3700 dv_id
+= IXGBE_B2BT(tc
);
3702 /* Delay value is calculated in bit times convert to KB */
3703 kb
= IXGBE_BT2KB(dv_id
);
3704 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
3706 marker
= rx_pba
- kb
;
3708 /* It is possible that the packet buffer is not large enough
3709 * to provide required headroom. In this case throw an error
3710 * to user and a do the best we can.
3713 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
3714 "headroom to support flow control."
3715 "Decrease MTU or number of traffic classes\n", pb
);
3723 * ixgbe_lpbthresh - calculate low water mark for for flow control
3725 * @adapter: board private structure to calculate for
3726 * @pb - packet buffer to calculate
3728 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
3730 struct ixgbe_hw
*hw
= &adapter
->hw
;
3731 struct net_device
*dev
= adapter
->netdev
;
3735 /* Calculate max LAN frame size */
3736 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3738 /* Calculate delay value for device */
3739 switch (hw
->mac
.type
) {
3740 case ixgbe_mac_X540
:
3741 dv_id
= IXGBE_LOW_DV_X540(tc
);
3744 dv_id
= IXGBE_LOW_DV(tc
);
3748 /* Delay value is calculated in bit times convert to KB */
3749 return IXGBE_BT2KB(dv_id
);
3753 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3755 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
3757 struct ixgbe_hw
*hw
= &adapter
->hw
;
3758 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
3764 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
3766 for (i
= 0; i
< num_tc
; i
++) {
3767 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
3769 /* Low water marks must not be larger than high water marks */
3770 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
3771 hw
->fc
.low_water
= 0;
3775 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
3777 struct ixgbe_hw
*hw
= &adapter
->hw
;
3779 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
3781 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3782 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3783 hdrm
= 32 << adapter
->fdir_pballoc
;
3787 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
3788 ixgbe_pbthresh_setup(adapter
);
3791 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
3793 struct ixgbe_hw
*hw
= &adapter
->hw
;
3794 struct hlist_node
*node
, *node2
;
3795 struct ixgbe_fdir_filter
*filter
;
3797 spin_lock(&adapter
->fdir_perfect_lock
);
3799 if (!hlist_empty(&adapter
->fdir_filter_list
))
3800 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
3802 hlist_for_each_entry_safe(filter
, node
, node2
,
3803 &adapter
->fdir_filter_list
, fdir_node
) {
3804 ixgbe_fdir_write_perfect_filter_82599(hw
,
3807 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
3808 IXGBE_FDIR_DROP_QUEUE
:
3809 adapter
->rx_ring
[filter
->action
]->reg_idx
);
3812 spin_unlock(&adapter
->fdir_perfect_lock
);
3815 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3817 struct ixgbe_hw
*hw
= &adapter
->hw
;
3819 ixgbe_configure_pb(adapter
);
3820 #ifdef CONFIG_IXGBE_DCB
3821 ixgbe_configure_dcb(adapter
);
3824 ixgbe_set_rx_mode(adapter
->netdev
);
3825 ixgbe_restore_vlan(adapter
);
3828 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3829 ixgbe_configure_fcoe(adapter
);
3831 #endif /* IXGBE_FCOE */
3833 switch (hw
->mac
.type
) {
3834 case ixgbe_mac_82599EB
:
3835 case ixgbe_mac_X540
:
3836 hw
->mac
.ops
.disable_rx_buff(hw
);
3842 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3843 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
3844 adapter
->fdir_pballoc
);
3845 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3846 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
3847 adapter
->fdir_pballoc
);
3848 ixgbe_fdir_filter_restore(adapter
);
3851 switch (hw
->mac
.type
) {
3852 case ixgbe_mac_82599EB
:
3853 case ixgbe_mac_X540
:
3854 hw
->mac
.ops
.enable_rx_buff(hw
);
3860 ixgbe_configure_virtualization(adapter
);
3862 ixgbe_configure_tx(adapter
);
3863 ixgbe_configure_rx(adapter
);
3866 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3868 switch (hw
->phy
.type
) {
3869 case ixgbe_phy_sfp_avago
:
3870 case ixgbe_phy_sfp_ftl
:
3871 case ixgbe_phy_sfp_intel
:
3872 case ixgbe_phy_sfp_unknown
:
3873 case ixgbe_phy_sfp_passive_tyco
:
3874 case ixgbe_phy_sfp_passive_unknown
:
3875 case ixgbe_phy_sfp_active_unknown
:
3876 case ixgbe_phy_sfp_ftl_active
:
3879 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3887 * ixgbe_sfp_link_config - set up SFP+ link
3888 * @adapter: pointer to private adapter struct
3890 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3893 * We are assuming the worst case scenario here, and that
3894 * is that an SFP was inserted/removed after the reset
3895 * but before SFP detection was enabled. As such the best
3896 * solution is to just start searching as soon as we start
3898 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3899 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
3901 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
3905 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3906 * @hw: pointer to private hardware struct
3908 * Returns 0 on success, negative on failure
3910 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3913 bool negotiation
, link_up
= false;
3914 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3916 if (hw
->mac
.ops
.check_link
)
3917 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3922 autoneg
= hw
->phy
.autoneg_advertised
;
3923 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
3924 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3929 if (hw
->mac
.ops
.setup_link
)
3930 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3935 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
3937 struct ixgbe_hw
*hw
= &adapter
->hw
;
3940 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3941 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
3943 gpie
|= IXGBE_GPIE_EIAME
;
3945 * use EIAM to auto-mask when MSI-X interrupt is asserted
3946 * this saves a register write for every interrupt
3948 switch (hw
->mac
.type
) {
3949 case ixgbe_mac_82598EB
:
3950 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3952 case ixgbe_mac_82599EB
:
3953 case ixgbe_mac_X540
:
3955 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3956 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3960 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3961 * specifically only auto mask tx and rx interrupts */
3962 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3965 /* XXX: to interrupt immediately for EICS writes, enable this */
3966 /* gpie |= IXGBE_GPIE_EIMEN; */
3968 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3969 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3970 gpie
|= IXGBE_GPIE_VTMODE_64
;
3973 /* Enable Thermal over heat sensor interrupt */
3974 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
3975 switch (adapter
->hw
.mac
.type
) {
3976 case ixgbe_mac_82599EB
:
3977 gpie
|= IXGBE_SDP0_GPIEN
;
3979 case ixgbe_mac_X540
:
3980 gpie
|= IXGBE_EIMS_TS
;
3987 /* Enable fan failure interrupt */
3988 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3989 gpie
|= IXGBE_SDP1_GPIEN
;
3991 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3992 gpie
|= IXGBE_SDP1_GPIEN
;
3993 gpie
|= IXGBE_SDP2_GPIEN
;
3996 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3999 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
4001 struct ixgbe_hw
*hw
= &adapter
->hw
;
4005 ixgbe_get_hw_control(adapter
);
4006 ixgbe_setup_gpie(adapter
);
4008 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4009 ixgbe_configure_msix(adapter
);
4011 ixgbe_configure_msi_and_legacy(adapter
);
4013 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
4014 if (hw
->mac
.ops
.enable_tx_laser
&&
4015 ((hw
->phy
.multispeed_fiber
) ||
4016 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4017 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4018 hw
->mac
.ops
.enable_tx_laser(hw
);
4020 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
4021 ixgbe_napi_enable_all(adapter
);
4023 if (ixgbe_is_sfp(hw
)) {
4024 ixgbe_sfp_link_config(adapter
);
4026 err
= ixgbe_non_sfp_link_config(hw
);
4028 e_err(probe
, "link_config FAILED %d\n", err
);
4031 /* clear any pending interrupts, may auto mask */
4032 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4033 ixgbe_irq_enable(adapter
, true, true);
4036 * If this adapter has a fan, check to see if we had a failure
4037 * before we enabled the interrupt.
4039 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4040 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4041 if (esdp
& IXGBE_ESDP_SDP1
)
4042 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4045 /* enable transmits */
4046 netif_tx_start_all_queues(adapter
->netdev
);
4048 /* bring the link up in the watchdog, this could race with our first
4049 * link up interrupt but shouldn't be a problem */
4050 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4051 adapter
->link_check_timeout
= jiffies
;
4052 mod_timer(&adapter
->service_timer
, jiffies
);
4054 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4055 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4056 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4057 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4060 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4062 WARN_ON(in_interrupt());
4063 /* put off any impending NetWatchDogTimeout */
4064 adapter
->netdev
->trans_start
= jiffies
;
4066 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4067 usleep_range(1000, 2000);
4068 ixgbe_down(adapter
);
4070 * If SR-IOV enabled then wait a bit before bringing the adapter
4071 * back up to give the VFs time to respond to the reset. The
4072 * two second wait is based upon the watchdog timer cycle in
4075 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4078 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4081 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4083 /* hardware has been reset, we need to reload some things */
4084 ixgbe_configure(adapter
);
4086 ixgbe_up_complete(adapter
);
4089 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4091 struct ixgbe_hw
*hw
= &adapter
->hw
;
4094 /* lock SFP init bit to prevent race conditions with the watchdog */
4095 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4096 usleep_range(1000, 2000);
4098 /* clear all SFP and link config related flags while holding SFP_INIT */
4099 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4100 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4101 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4103 err
= hw
->mac
.ops
.init_hw(hw
);
4106 case IXGBE_ERR_SFP_NOT_PRESENT
:
4107 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4109 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4110 e_dev_err("master disable timed out\n");
4112 case IXGBE_ERR_EEPROM_VERSION
:
4113 /* We are running on a pre-production device, log a warning */
4114 e_dev_warn("This device is a pre-production adapter/LOM. "
4115 "Please be aware there may be issues associated with "
4116 "your hardware. If you are experiencing problems "
4117 "please contact your Intel or hardware "
4118 "representative who provided you with this "
4122 e_dev_err("Hardware Error: %d\n", err
);
4125 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4127 /* reprogram the RAR[0] in case user changed it. */
4128 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
4133 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4134 * @rx_ring: ring to setup
4136 * On many IA platforms the L1 cache has a critical stride of 4K, this
4137 * results in each receive buffer starting in the same cache set. To help
4138 * reduce the pressure on this cache set we can interleave the offsets so
4139 * that only every other buffer will be in the same cache set.
4141 static void ixgbe_init_rx_page_offset(struct ixgbe_ring
*rx_ring
)
4143 struct ixgbe_rx_buffer
*rx_buffer
= rx_ring
->rx_buffer_info
;
4146 for (i
= 0; i
< rx_ring
->count
; i
+= 2) {
4147 rx_buffer
[0].page_offset
= 0;
4148 rx_buffer
[1].page_offset
= ixgbe_rx_bufsz(rx_ring
);
4149 rx_buffer
= &rx_buffer
[2];
4154 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4155 * @rx_ring: ring to free buffers from
4157 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4159 struct device
*dev
= rx_ring
->dev
;
4163 /* ring already cleared, nothing to do */
4164 if (!rx_ring
->rx_buffer_info
)
4167 /* Free all the Rx ring sk_buffs */
4168 for (i
= 0; i
< rx_ring
->count
; i
++) {
4169 struct ixgbe_rx_buffer
*rx_buffer
;
4171 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4172 if (rx_buffer
->skb
) {
4173 struct sk_buff
*skb
= rx_buffer
->skb
;
4174 if (IXGBE_CB(skb
)->page_released
) {
4177 ixgbe_rx_bufsz(rx_ring
),
4179 IXGBE_CB(skb
)->page_released
= false;
4183 rx_buffer
->skb
= NULL
;
4185 dma_unmap_page(dev
, rx_buffer
->dma
,
4186 ixgbe_rx_pg_size(rx_ring
),
4189 if (rx_buffer
->page
)
4190 __free_pages(rx_buffer
->page
,
4191 ixgbe_rx_pg_order(rx_ring
));
4192 rx_buffer
->page
= NULL
;
4195 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4196 memset(rx_ring
->rx_buffer_info
, 0, size
);
4198 ixgbe_init_rx_page_offset(rx_ring
);
4200 /* Zero out the descriptor ring */
4201 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4203 rx_ring
->next_to_alloc
= 0;
4204 rx_ring
->next_to_clean
= 0;
4205 rx_ring
->next_to_use
= 0;
4209 * ixgbe_clean_tx_ring - Free Tx Buffers
4210 * @tx_ring: ring to be cleaned
4212 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4214 struct ixgbe_tx_buffer
*tx_buffer_info
;
4218 /* ring already cleared, nothing to do */
4219 if (!tx_ring
->tx_buffer_info
)
4222 /* Free all the Tx ring sk_buffs */
4223 for (i
= 0; i
< tx_ring
->count
; i
++) {
4224 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4225 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4228 netdev_tx_reset_queue(txring_txq(tx_ring
));
4230 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4231 memset(tx_ring
->tx_buffer_info
, 0, size
);
4233 /* Zero out the descriptor ring */
4234 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4236 tx_ring
->next_to_use
= 0;
4237 tx_ring
->next_to_clean
= 0;
4241 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4242 * @adapter: board private structure
4244 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4248 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4249 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4253 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4254 * @adapter: board private structure
4256 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4260 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4261 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4264 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4266 struct hlist_node
*node
, *node2
;
4267 struct ixgbe_fdir_filter
*filter
;
4269 spin_lock(&adapter
->fdir_perfect_lock
);
4271 hlist_for_each_entry_safe(filter
, node
, node2
,
4272 &adapter
->fdir_filter_list
, fdir_node
) {
4273 hlist_del(&filter
->fdir_node
);
4276 adapter
->fdir_filter_count
= 0;
4278 spin_unlock(&adapter
->fdir_perfect_lock
);
4281 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4283 struct net_device
*netdev
= adapter
->netdev
;
4284 struct ixgbe_hw
*hw
= &adapter
->hw
;
4288 /* signal that we are down to the interrupt handler */
4289 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4291 /* disable receives */
4292 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4293 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4295 /* disable all enabled rx queues */
4296 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4297 /* this call also flushes the previous write */
4298 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4300 usleep_range(10000, 20000);
4302 netif_tx_stop_all_queues(netdev
);
4304 /* call carrier off first to avoid false dev_watchdog timeouts */
4305 netif_carrier_off(netdev
);
4306 netif_tx_disable(netdev
);
4308 ixgbe_irq_disable(adapter
);
4310 ixgbe_napi_disable_all(adapter
);
4312 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4313 IXGBE_FLAG2_RESET_REQUESTED
);
4314 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4316 del_timer_sync(&adapter
->service_timer
);
4318 if (adapter
->num_vfs
) {
4319 /* Clear EITR Select mapping */
4320 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4322 /* Mark all the VFs as inactive */
4323 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4324 adapter
->vfinfo
[i
].clear_to_send
= false;
4326 /* ping all the active vfs to let them know we are going down */
4327 ixgbe_ping_all_vfs(adapter
);
4329 /* Disable all VFTE/VFRE TX/RX */
4330 ixgbe_disable_tx_rx(adapter
);
4333 /* disable transmits in the hardware now that interrupts are off */
4334 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4335 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4336 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4339 /* Disable the Tx DMA engine on 82599 and X540 */
4340 switch (hw
->mac
.type
) {
4341 case ixgbe_mac_82599EB
:
4342 case ixgbe_mac_X540
:
4343 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4344 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4345 ~IXGBE_DMATXCTL_TE
));
4351 if (!pci_channel_offline(adapter
->pdev
))
4352 ixgbe_reset(adapter
);
4354 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4355 if (hw
->mac
.ops
.disable_tx_laser
&&
4356 ((hw
->phy
.multispeed_fiber
) ||
4357 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4358 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4359 hw
->mac
.ops
.disable_tx_laser(hw
);
4361 ixgbe_clean_all_tx_rings(adapter
);
4362 ixgbe_clean_all_rx_rings(adapter
);
4364 #ifdef CONFIG_IXGBE_DCA
4365 /* since we reset the hardware DCA settings were cleared */
4366 ixgbe_setup_dca(adapter
);
4371 * ixgbe_tx_timeout - Respond to a Tx Hang
4372 * @netdev: network interface device structure
4374 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4376 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4378 /* Do the reset outside of interrupt context */
4379 ixgbe_tx_timeout_reset(adapter
);
4383 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4384 * @adapter: board private structure to initialize
4386 * ixgbe_sw_init initializes the Adapter private data structure.
4387 * Fields are initialized based on PCI device information and
4388 * OS network device settings (MTU size).
4390 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4392 struct ixgbe_hw
*hw
= &adapter
->hw
;
4393 struct pci_dev
*pdev
= adapter
->pdev
;
4395 #ifdef CONFIG_IXGBE_DCB
4397 struct tc_configuration
*tc
;
4400 /* PCI config space info */
4402 hw
->vendor_id
= pdev
->vendor
;
4403 hw
->device_id
= pdev
->device
;
4404 hw
->revision_id
= pdev
->revision
;
4405 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4406 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4408 /* Set capability flags */
4409 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
4410 adapter
->ring_feature
[RING_F_RSS
].indices
= rss
;
4411 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4412 switch (hw
->mac
.type
) {
4413 case ixgbe_mac_82598EB
:
4414 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4415 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4416 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82598
;
4418 case ixgbe_mac_X540
:
4419 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4420 case ixgbe_mac_82599EB
:
4421 adapter
->max_msix_q_vectors
= MAX_MSIX_Q_VECTORS_82599
;
4422 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4423 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4424 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4425 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4426 /* Flow Director hash filters enabled */
4427 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4428 adapter
->atr_sample_rate
= 20;
4429 adapter
->ring_feature
[RING_F_FDIR
].indices
=
4430 IXGBE_MAX_FDIR_INDICES
;
4431 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
4433 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4434 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4435 adapter
->ring_feature
[RING_F_FCOE
].indices
= 0;
4436 #ifdef CONFIG_IXGBE_DCB
4437 /* Default traffic class to use for FCoE */
4438 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4440 #endif /* IXGBE_FCOE */
4446 /* n-tuple support exists, always init our spinlock */
4447 spin_lock_init(&adapter
->fdir_perfect_lock
);
4449 #ifdef CONFIG_IXGBE_DCB
4450 switch (hw
->mac
.type
) {
4451 case ixgbe_mac_X540
:
4452 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
4453 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
4456 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
4457 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
4461 /* Configure DCB traffic classes */
4462 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4463 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4464 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4465 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4466 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4467 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4468 tc
->dcb_pfc
= pfc_disabled
;
4471 /* Initialize default user to priority mapping, UPx->TC0 */
4472 tc
= &adapter
->dcb_cfg
.tc_config
[0];
4473 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4474 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4476 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4477 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4478 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4479 adapter
->dcb_set_bitmap
= 0x00;
4480 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
4481 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
4482 sizeof(adapter
->temp_dcb_cfg
));
4486 /* default flow control settings */
4487 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4488 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4489 ixgbe_pbthresh_setup(adapter
);
4490 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4491 hw
->fc
.send_xon
= true;
4492 hw
->fc
.disable_fc_autoneg
= false;
4494 /* enable itr by default in dynamic mode */
4495 adapter
->rx_itr_setting
= 1;
4496 adapter
->tx_itr_setting
= 1;
4498 /* set default ring sizes */
4499 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4500 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4502 /* set default work limits */
4503 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
4505 /* initialize eeprom parameters */
4506 if (ixgbe_init_eeprom_params_generic(hw
)) {
4507 e_dev_err("EEPROM initialization failed\n");
4511 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4517 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4518 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4520 * Return 0 on success, negative on failure
4522 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
4524 struct device
*dev
= tx_ring
->dev
;
4525 int orig_node
= dev_to_node(dev
);
4529 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4531 if (tx_ring
->q_vector
)
4532 numa_node
= tx_ring
->q_vector
->numa_node
;
4534 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
4535 if (!tx_ring
->tx_buffer_info
)
4536 tx_ring
->tx_buffer_info
= vzalloc(size
);
4537 if (!tx_ring
->tx_buffer_info
)
4540 /* round up to nearest 4K */
4541 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4542 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4544 set_dev_node(dev
, numa_node
);
4545 tx_ring
->desc
= dma_alloc_coherent(dev
,
4549 set_dev_node(dev
, orig_node
);
4551 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
4552 &tx_ring
->dma
, GFP_KERNEL
);
4556 tx_ring
->next_to_use
= 0;
4557 tx_ring
->next_to_clean
= 0;
4561 vfree(tx_ring
->tx_buffer_info
);
4562 tx_ring
->tx_buffer_info
= NULL
;
4563 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
4568 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4569 * @adapter: board private structure
4571 * If this function returns with an error, then it's possible one or
4572 * more of the rings is populated (while the rest are not). It is the
4573 * callers duty to clean those orphaned rings.
4575 * Return 0 on success, negative on failure
4577 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4581 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4582 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
4585 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
4593 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4594 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4596 * Returns 0 on success, negative on failure
4598 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
4600 struct device
*dev
= rx_ring
->dev
;
4601 int orig_node
= dev_to_node(dev
);
4605 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4607 if (rx_ring
->q_vector
)
4608 numa_node
= rx_ring
->q_vector
->numa_node
;
4610 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
4611 if (!rx_ring
->rx_buffer_info
)
4612 rx_ring
->rx_buffer_info
= vzalloc(size
);
4613 if (!rx_ring
->rx_buffer_info
)
4616 /* Round up to nearest 4K */
4617 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4618 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4620 set_dev_node(dev
, numa_node
);
4621 rx_ring
->desc
= dma_alloc_coherent(dev
,
4625 set_dev_node(dev
, orig_node
);
4627 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
4628 &rx_ring
->dma
, GFP_KERNEL
);
4632 rx_ring
->next_to_clean
= 0;
4633 rx_ring
->next_to_use
= 0;
4635 ixgbe_init_rx_page_offset(rx_ring
);
4639 vfree(rx_ring
->rx_buffer_info
);
4640 rx_ring
->rx_buffer_info
= NULL
;
4641 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
4646 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4647 * @adapter: board private structure
4649 * If this function returns with an error, then it's possible one or
4650 * more of the rings is populated (while the rest are not). It is the
4651 * callers duty to clean those orphaned rings.
4653 * Return 0 on success, negative on failure
4655 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4659 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4660 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
4663 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
4671 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4672 * @tx_ring: Tx descriptor ring for a specific queue
4674 * Free all transmit software resources
4676 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
4678 ixgbe_clean_tx_ring(tx_ring
);
4680 vfree(tx_ring
->tx_buffer_info
);
4681 tx_ring
->tx_buffer_info
= NULL
;
4683 /* if not set, then don't free */
4687 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
4688 tx_ring
->desc
, tx_ring
->dma
);
4690 tx_ring
->desc
= NULL
;
4694 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4695 * @adapter: board private structure
4697 * Free all transmit software resources
4699 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4703 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4704 if (adapter
->tx_ring
[i
]->desc
)
4705 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
4709 * ixgbe_free_rx_resources - Free Rx Resources
4710 * @rx_ring: ring to clean the resources from
4712 * Free all receive software resources
4714 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
4716 ixgbe_clean_rx_ring(rx_ring
);
4718 vfree(rx_ring
->rx_buffer_info
);
4719 rx_ring
->rx_buffer_info
= NULL
;
4721 /* if not set, then don't free */
4725 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
4726 rx_ring
->desc
, rx_ring
->dma
);
4728 rx_ring
->desc
= NULL
;
4732 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4733 * @adapter: board private structure
4735 * Free all receive software resources
4737 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4741 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4742 if (adapter
->rx_ring
[i
]->desc
)
4743 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
4747 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4748 * @netdev: network interface device structure
4749 * @new_mtu: new value for maximum frame size
4751 * Returns 0 on success, negative on failure
4753 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4755 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4756 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4758 /* MTU < 68 is an error and causes problems on some kernels */
4759 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4763 * For 82599EB we cannot allow PF to change MTU greater than 1500
4764 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4765 * don't allocate and chain buffers correctly.
4767 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
4768 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
4769 (max_frame
> MAXIMUM_ETHERNET_VLAN_SIZE
))
4772 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
4774 /* must set new MTU before calling down or up */
4775 netdev
->mtu
= new_mtu
;
4777 if (netif_running(netdev
))
4778 ixgbe_reinit_locked(adapter
);
4784 * ixgbe_open - Called when a network interface is made active
4785 * @netdev: network interface device structure
4787 * Returns 0 on success, negative value on failure
4789 * The open entry point is called when a network interface is made
4790 * active by the system (IFF_UP). At this point all resources needed
4791 * for transmit and receive operations are allocated, the interrupt
4792 * handler is registered with the OS, the watchdog timer is started,
4793 * and the stack is notified that the interface is ready.
4795 static int ixgbe_open(struct net_device
*netdev
)
4797 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4800 /* disallow open during test */
4801 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4804 netif_carrier_off(netdev
);
4806 /* allocate transmit descriptors */
4807 err
= ixgbe_setup_all_tx_resources(adapter
);
4811 /* allocate receive descriptors */
4812 err
= ixgbe_setup_all_rx_resources(adapter
);
4816 ixgbe_configure(adapter
);
4818 err
= ixgbe_request_irq(adapter
);
4822 ixgbe_up_complete(adapter
);
4828 ixgbe_free_all_rx_resources(adapter
);
4830 ixgbe_free_all_tx_resources(adapter
);
4831 ixgbe_reset(adapter
);
4837 * ixgbe_close - Disables a network interface
4838 * @netdev: network interface device structure
4840 * Returns 0, this is not allowed to fail
4842 * The close entry point is called when an interface is de-activated
4843 * by the OS. The hardware is still under the drivers control, but
4844 * needs to be disabled. A global MAC reset is issued to stop the
4845 * hardware, and all transmit and receive resources are freed.
4847 static int ixgbe_close(struct net_device
*netdev
)
4849 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4851 ixgbe_down(adapter
);
4852 ixgbe_free_irq(adapter
);
4854 ixgbe_fdir_filter_exit(adapter
);
4856 ixgbe_free_all_tx_resources(adapter
);
4857 ixgbe_free_all_rx_resources(adapter
);
4859 ixgbe_release_hw_control(adapter
);
4865 static int ixgbe_resume(struct pci_dev
*pdev
)
4867 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4868 struct net_device
*netdev
= adapter
->netdev
;
4871 pci_set_power_state(pdev
, PCI_D0
);
4872 pci_restore_state(pdev
);
4874 * pci_restore_state clears dev->state_saved so call
4875 * pci_save_state to restore it.
4877 pci_save_state(pdev
);
4879 err
= pci_enable_device_mem(pdev
);
4881 e_dev_err("Cannot enable PCI device from suspend\n");
4884 pci_set_master(pdev
);
4886 pci_wake_from_d3(pdev
, false);
4889 err
= ixgbe_init_interrupt_scheme(adapter
);
4892 e_dev_err("Cannot initialize interrupts for device\n");
4896 ixgbe_reset(adapter
);
4898 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4900 if (netif_running(netdev
)) {
4901 err
= ixgbe_open(netdev
);
4906 netif_device_attach(netdev
);
4910 #endif /* CONFIG_PM */
4912 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
4914 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4915 struct net_device
*netdev
= adapter
->netdev
;
4916 struct ixgbe_hw
*hw
= &adapter
->hw
;
4918 u32 wufc
= adapter
->wol
;
4923 netif_device_detach(netdev
);
4925 if (netif_running(netdev
)) {
4927 ixgbe_down(adapter
);
4928 ixgbe_free_irq(adapter
);
4929 ixgbe_free_all_tx_resources(adapter
);
4930 ixgbe_free_all_rx_resources(adapter
);
4934 ixgbe_clear_interrupt_scheme(adapter
);
4937 retval
= pci_save_state(pdev
);
4943 ixgbe_set_rx_mode(netdev
);
4946 * enable the optics for both mult-speed fiber and
4947 * 82599 SFP+ fiber as we can WoL.
4949 if (hw
->mac
.ops
.enable_tx_laser
&&
4950 (hw
->phy
.multispeed_fiber
||
4951 (hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
&&
4952 hw
->mac
.type
== ixgbe_mac_82599EB
)))
4953 hw
->mac
.ops
.enable_tx_laser(hw
);
4955 /* turn on all-multi mode if wake on multicast is enabled */
4956 if (wufc
& IXGBE_WUFC_MC
) {
4957 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4958 fctrl
|= IXGBE_FCTRL_MPE
;
4959 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4962 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
4963 ctrl
|= IXGBE_CTRL_GIO_DIS
;
4964 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
4966 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
4968 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
4969 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
4972 switch (hw
->mac
.type
) {
4973 case ixgbe_mac_82598EB
:
4974 pci_wake_from_d3(pdev
, false);
4976 case ixgbe_mac_82599EB
:
4977 case ixgbe_mac_X540
:
4978 pci_wake_from_d3(pdev
, !!wufc
);
4984 *enable_wake
= !!wufc
;
4986 ixgbe_release_hw_control(adapter
);
4988 pci_disable_device(pdev
);
4994 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4999 retval
= __ixgbe_shutdown(pdev
, &wake
);
5004 pci_prepare_to_sleep(pdev
);
5006 pci_wake_from_d3(pdev
, false);
5007 pci_set_power_state(pdev
, PCI_D3hot
);
5012 #endif /* CONFIG_PM */
5014 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5018 __ixgbe_shutdown(pdev
, &wake
);
5020 if (system_state
== SYSTEM_POWER_OFF
) {
5021 pci_wake_from_d3(pdev
, wake
);
5022 pci_set_power_state(pdev
, PCI_D3hot
);
5027 * ixgbe_update_stats - Update the board statistics counters.
5028 * @adapter: board private structure
5030 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5032 struct net_device
*netdev
= adapter
->netdev
;
5033 struct ixgbe_hw
*hw
= &adapter
->hw
;
5034 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5036 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5037 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5038 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5039 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5041 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5043 u64 fcoe_noddp_counts_sum
= 0, fcoe_noddp_ext_buff_counts_sum
= 0;
5044 #endif /* IXGBE_FCOE */
5046 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5047 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5050 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5053 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5054 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5055 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5057 adapter
->rsc_total_count
= rsc_count
;
5058 adapter
->rsc_total_flush
= rsc_flush
;
5061 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5062 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5063 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5064 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5065 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5066 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5067 bytes
+= rx_ring
->stats
.bytes
;
5068 packets
+= rx_ring
->stats
.packets
;
5070 adapter
->non_eop_descs
= non_eop_descs
;
5071 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5072 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5073 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5074 netdev
->stats
.rx_bytes
= bytes
;
5075 netdev
->stats
.rx_packets
= packets
;
5079 /* gather some stats to the adapter struct that are per queue */
5080 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5081 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5082 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5083 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5084 bytes
+= tx_ring
->stats
.bytes
;
5085 packets
+= tx_ring
->stats
.packets
;
5087 adapter
->restart_queue
= restart_queue
;
5088 adapter
->tx_busy
= tx_busy
;
5089 netdev
->stats
.tx_bytes
= bytes
;
5090 netdev
->stats
.tx_packets
= packets
;
5092 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5094 /* 8 register reads */
5095 for (i
= 0; i
< 8; i
++) {
5096 /* for packet buffers not used, the register should read 0 */
5097 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5099 hwstats
->mpc
[i
] += mpc
;
5100 total_mpc
+= hwstats
->mpc
[i
];
5101 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5102 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5103 switch (hw
->mac
.type
) {
5104 case ixgbe_mac_82598EB
:
5105 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5106 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5107 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5108 hwstats
->pxonrxc
[i
] +=
5109 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5111 case ixgbe_mac_82599EB
:
5112 case ixgbe_mac_X540
:
5113 hwstats
->pxonrxc
[i
] +=
5114 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5121 /*16 register reads */
5122 for (i
= 0; i
< 16; i
++) {
5123 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5124 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5125 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5126 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5127 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5128 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5129 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5130 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5134 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5135 /* work around hardware counting issue */
5136 hwstats
->gprc
-= missed_rx
;
5138 ixgbe_update_xoff_received(adapter
);
5140 /* 82598 hardware only has a 32 bit counter in the high register */
5141 switch (hw
->mac
.type
) {
5142 case ixgbe_mac_82598EB
:
5143 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5144 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5145 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5146 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5148 case ixgbe_mac_X540
:
5149 /* OS2BMC stats are X540 only*/
5150 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5151 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5152 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5153 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5154 case ixgbe_mac_82599EB
:
5155 for (i
= 0; i
< 16; i
++)
5156 adapter
->hw_rx_no_dma_resources
+=
5157 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5158 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5159 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5160 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5161 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5162 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5163 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5164 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5165 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5166 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5168 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5169 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5170 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5171 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5172 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5173 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5174 /* Add up per cpu counters for total ddp aloc fail */
5175 if (fcoe
->pcpu_noddp
&& fcoe
->pcpu_noddp_ext_buff
) {
5176 for_each_possible_cpu(cpu
) {
5177 fcoe_noddp_counts_sum
+=
5178 *per_cpu_ptr(fcoe
->pcpu_noddp
, cpu
);
5179 fcoe_noddp_ext_buff_counts_sum
+=
5181 pcpu_noddp_ext_buff
, cpu
);
5184 hwstats
->fcoe_noddp
= fcoe_noddp_counts_sum
;
5185 hwstats
->fcoe_noddp_ext_buff
= fcoe_noddp_ext_buff_counts_sum
;
5186 #endif /* IXGBE_FCOE */
5191 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5192 hwstats
->bprc
+= bprc
;
5193 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5194 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5195 hwstats
->mprc
-= bprc
;
5196 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5197 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5198 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5199 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5200 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5201 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5202 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5203 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5204 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5205 hwstats
->lxontxc
+= lxon
;
5206 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5207 hwstats
->lxofftxc
+= lxoff
;
5208 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5209 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5211 * 82598 errata - tx of flow control packets is included in tx counters
5213 xon_off_tot
= lxon
+ lxoff
;
5214 hwstats
->gptc
-= xon_off_tot
;
5215 hwstats
->mptc
-= xon_off_tot
;
5216 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5217 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5218 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5219 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5220 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5221 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5222 hwstats
->ptc64
-= xon_off_tot
;
5223 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5224 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5225 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5226 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5227 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5228 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5230 /* Fill out the OS statistics structure */
5231 netdev
->stats
.multicast
= hwstats
->mprc
;
5234 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5235 netdev
->stats
.rx_dropped
= 0;
5236 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5237 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5238 netdev
->stats
.rx_missed_errors
= total_mpc
;
5242 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5243 * @adapter - pointer to the device adapter structure
5245 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5247 struct ixgbe_hw
*hw
= &adapter
->hw
;
5250 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5253 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5255 /* if interface is down do nothing */
5256 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5259 /* do nothing if we are not using signature filters */
5260 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5263 adapter
->fdir_overflow
++;
5265 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5266 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5267 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5268 &(adapter
->tx_ring
[i
]->state
));
5269 /* re-enable flow director interrupts */
5270 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5272 e_err(probe
, "failed to finish FDIR re-initialization, "
5273 "ignored adding FDIR ATR filters\n");
5278 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5279 * @adapter - pointer to the device adapter structure
5281 * This function serves two purposes. First it strobes the interrupt lines
5282 * in order to make certain interrupts are occurring. Secondly it sets the
5283 * bits needed to check for TX hangs. As a result we should immediately
5284 * determine if a hang has occurred.
5286 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5288 struct ixgbe_hw
*hw
= &adapter
->hw
;
5292 /* If we're down or resetting, just bail */
5293 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5294 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5297 /* Force detection of hung controller */
5298 if (netif_carrier_ok(adapter
->netdev
)) {
5299 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5300 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5303 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5305 * for legacy and MSI interrupts don't set any bits
5306 * that are enabled for EIAM, because this operation
5307 * would set *both* EIMS and EICS for any bit in EIAM
5309 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5310 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5312 /* get one bit for every active tx/rx interrupt vector */
5313 for (i
= 0; i
< adapter
->num_msix_vectors
- NON_Q_VECTORS
; i
++) {
5314 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5315 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5316 eics
|= ((u64
)1 << i
);
5320 /* Cause software interrupt to ensure rings are cleaned */
5321 ixgbe_irq_rearm_queues(adapter
, eics
);
5326 * ixgbe_watchdog_update_link - update the link status
5327 * @adapter - pointer to the device adapter structure
5328 * @link_speed - pointer to a u32 to store the link_speed
5330 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
5332 struct ixgbe_hw
*hw
= &adapter
->hw
;
5333 u32 link_speed
= adapter
->link_speed
;
5334 bool link_up
= adapter
->link_up
;
5335 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
5337 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5340 if (hw
->mac
.ops
.check_link
) {
5341 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5343 /* always assume link is up, if no check link function */
5344 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
5348 if (adapter
->ixgbe_ieee_pfc
)
5349 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
5351 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
5352 hw
->mac
.ops
.fc_enable(hw
);
5353 ixgbe_set_rx_drop_en(adapter
);
5357 time_after(jiffies
, (adapter
->link_check_timeout
+
5358 IXGBE_TRY_LINK_TIMEOUT
))) {
5359 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5360 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5361 IXGBE_WRITE_FLUSH(hw
);
5364 adapter
->link_up
= link_up
;
5365 adapter
->link_speed
= link_speed
;
5369 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5370 * print link up message
5371 * @adapter - pointer to the device adapter structure
5373 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
5375 struct net_device
*netdev
= adapter
->netdev
;
5376 struct ixgbe_hw
*hw
= &adapter
->hw
;
5377 u32 link_speed
= adapter
->link_speed
;
5378 bool flow_rx
, flow_tx
;
5380 /* only continue if link was previously down */
5381 if (netif_carrier_ok(netdev
))
5384 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
5386 switch (hw
->mac
.type
) {
5387 case ixgbe_mac_82598EB
: {
5388 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5389 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5390 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5391 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5394 case ixgbe_mac_X540
:
5395 case ixgbe_mac_82599EB
: {
5396 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5397 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5398 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5399 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5408 #ifdef CONFIG_IXGBE_PTP
5409 ixgbe_ptp_start_cyclecounter(adapter
);
5412 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5413 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5415 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5417 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
5420 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5422 (flow_tx
? "TX" : "None"))));
5424 netif_carrier_on(netdev
);
5425 ixgbe_check_vf_rate_limit(adapter
);
5429 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5430 * print link down message
5431 * @adapter - pointer to the adapter structure
5433 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
5435 struct net_device
*netdev
= adapter
->netdev
;
5436 struct ixgbe_hw
*hw
= &adapter
->hw
;
5438 adapter
->link_up
= false;
5439 adapter
->link_speed
= 0;
5441 /* only continue if link was up previously */
5442 if (!netif_carrier_ok(netdev
))
5445 /* poll for SFP+ cable when link is down */
5446 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
5447 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5449 #ifdef CONFIG_IXGBE_PTP
5450 ixgbe_ptp_start_cyclecounter(adapter
);
5453 e_info(drv
, "NIC Link is Down\n");
5454 netif_carrier_off(netdev
);
5458 * ixgbe_watchdog_flush_tx - flush queues on link down
5459 * @adapter - pointer to the device adapter structure
5461 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
5464 int some_tx_pending
= 0;
5466 if (!netif_carrier_ok(adapter
->netdev
)) {
5467 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5468 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5469 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5470 some_tx_pending
= 1;
5475 if (some_tx_pending
) {
5476 /* We've lost link, so the controller stops DMA,
5477 * but we've got queued Tx work that's never going
5478 * to get done, so reset controller to flush Tx.
5479 * (Do the reset outside of interrupt context).
5481 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
5486 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
5490 /* Do not perform spoof check for 82598 */
5491 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5494 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
5497 * ssvpc register is cleared on read, if zero then no
5498 * spoofed packets in the last interval.
5503 e_warn(drv
, "%d Spoofed packets detected\n", ssvpc
);
5507 * ixgbe_watchdog_subtask - check and bring link up
5508 * @adapter - pointer to the device adapter structure
5510 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
5512 /* if interface is down do nothing */
5513 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5514 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5517 ixgbe_watchdog_update_link(adapter
);
5519 if (adapter
->link_up
)
5520 ixgbe_watchdog_link_is_up(adapter
);
5522 ixgbe_watchdog_link_is_down(adapter
);
5524 ixgbe_spoof_check(adapter
);
5525 ixgbe_update_stats(adapter
);
5527 ixgbe_watchdog_flush_tx(adapter
);
5531 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5532 * @adapter - the ixgbe adapter structure
5534 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
5536 struct ixgbe_hw
*hw
= &adapter
->hw
;
5539 /* not searching for SFP so there is nothing to do here */
5540 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
5541 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5544 /* someone else is in init, wait until next service event */
5545 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5548 err
= hw
->phy
.ops
.identify_sfp(hw
);
5549 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5552 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
5553 /* If no cable is present, then we need to reset
5554 * the next time we find a good cable. */
5555 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5562 /* exit if reset not needed */
5563 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5566 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
5569 * A module may be identified correctly, but the EEPROM may not have
5570 * support for that module. setup_sfp() will fail in that case, so
5571 * we should not allow that module to load.
5573 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5574 err
= hw
->phy
.ops
.reset(hw
);
5576 err
= hw
->mac
.ops
.setup_sfp(hw
);
5578 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5581 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
5582 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
5585 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5587 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
5588 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
5589 e_dev_err("failed to initialize because an unsupported "
5590 "SFP+ module type was detected.\n");
5591 e_dev_err("Reload the driver after installing a "
5592 "supported module.\n");
5593 unregister_netdev(adapter
->netdev
);
5598 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5599 * @adapter - the ixgbe adapter structure
5601 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
5603 struct ixgbe_hw
*hw
= &adapter
->hw
;
5607 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
5610 /* someone else is in init, wait until next service event */
5611 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5614 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5616 autoneg
= hw
->phy
.autoneg_advertised
;
5617 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5618 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5619 if (hw
->mac
.ops
.setup_link
)
5620 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5622 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5623 adapter
->link_check_timeout
= jiffies
;
5624 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5627 #ifdef CONFIG_PCI_IOV
5628 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
5631 struct ixgbe_hw
*hw
= &adapter
->hw
;
5632 struct net_device
*netdev
= adapter
->netdev
;
5636 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
5637 if (gpc
) /* If incrementing then no need for the check below */
5640 * Check to see if a bad DMA write target from an errant or
5641 * malicious VF has caused a PCIe error. If so then we can
5642 * issue a VFLR to the offending VF(s) and then resume without
5643 * requesting a full slot reset.
5646 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
5647 ciaa
= (vf
<< 16) | 0x80000000;
5648 /* 32 bit read so align, we really want status at offset 6 */
5649 ciaa
|= PCI_COMMAND
;
5650 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5651 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
5653 /* disable debug mode asap after reading data */
5654 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5655 /* Get the upper 16 bits which will be the PCI status reg */
5657 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
5658 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
5660 ciaa
= (vf
<< 16) | 0x80000000;
5662 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5663 ciad
= 0x00008000; /* VFLR */
5664 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
5666 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5673 * ixgbe_service_timer - Timer Call-back
5674 * @data: pointer to adapter cast into an unsigned long
5676 static void ixgbe_service_timer(unsigned long data
)
5678 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5679 unsigned long next_event_offset
;
5682 /* poll faster when waiting for link */
5683 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
5684 next_event_offset
= HZ
/ 10;
5686 next_event_offset
= HZ
* 2;
5688 #ifdef CONFIG_PCI_IOV
5690 * don't bother with SR-IOV VF DMA hang check if there are
5691 * no VFs or the link is down
5693 if (!adapter
->num_vfs
||
5694 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5695 goto normal_timer_service
;
5697 /* If we have VFs allocated then we must check for DMA hangs */
5698 ixgbe_check_for_bad_vf(adapter
);
5699 next_event_offset
= HZ
/ 50;
5700 adapter
->timer_event_accumulator
++;
5702 if (adapter
->timer_event_accumulator
>= 100)
5703 adapter
->timer_event_accumulator
= 0;
5707 normal_timer_service
:
5709 /* Reset the timer */
5710 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
5713 ixgbe_service_event_schedule(adapter
);
5716 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
5718 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
5721 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
5723 /* If we're already down or resetting, just bail */
5724 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5725 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5728 ixgbe_dump(adapter
);
5729 netdev_err(adapter
->netdev
, "Reset adapter\n");
5730 adapter
->tx_timeout_count
++;
5732 ixgbe_reinit_locked(adapter
);
5736 * ixgbe_service_task - manages and runs subtasks
5737 * @work: pointer to work_struct containing our data
5739 static void ixgbe_service_task(struct work_struct
*work
)
5741 struct ixgbe_adapter
*adapter
= container_of(work
,
5742 struct ixgbe_adapter
,
5745 ixgbe_reset_subtask(adapter
);
5746 ixgbe_sfp_detection_subtask(adapter
);
5747 ixgbe_sfp_link_config_subtask(adapter
);
5748 ixgbe_check_overtemp_subtask(adapter
);
5749 ixgbe_watchdog_subtask(adapter
);
5750 ixgbe_fdir_reinit_subtask(adapter
);
5751 ixgbe_check_hang_subtask(adapter
);
5752 #ifdef CONFIG_IXGBE_PTP
5753 ixgbe_ptp_overflow_check(adapter
);
5756 ixgbe_service_event_complete(adapter
);
5759 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
5760 struct ixgbe_tx_buffer
*first
,
5763 struct sk_buff
*skb
= first
->skb
;
5764 u32 vlan_macip_lens
, type_tucmd
;
5765 u32 mss_l4len_idx
, l4len
;
5767 if (!skb_is_gso(skb
))
5770 if (skb_header_cloned(skb
)) {
5771 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5776 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5777 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5779 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
5780 struct iphdr
*iph
= ip_hdr(skb
);
5783 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5787 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5788 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5789 IXGBE_TX_FLAGS_CSUM
|
5790 IXGBE_TX_FLAGS_IPV4
;
5791 } else if (skb_is_gso_v6(skb
)) {
5792 ipv6_hdr(skb
)->payload_len
= 0;
5793 tcp_hdr(skb
)->check
=
5794 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5795 &ipv6_hdr(skb
)->daddr
,
5797 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5798 IXGBE_TX_FLAGS_CSUM
;
5801 /* compute header lengths */
5802 l4len
= tcp_hdrlen(skb
);
5803 *hdr_len
= skb_transport_offset(skb
) + l4len
;
5805 /* update gso size and bytecount with header size */
5806 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
5807 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
5809 /* mss_l4len_id: use 1 as index for TSO */
5810 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
5811 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
5812 mss_l4len_idx
|= 1 << IXGBE_ADVTXD_IDX_SHIFT
;
5814 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5815 vlan_macip_lens
= skb_network_header_len(skb
);
5816 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5817 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5819 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
5825 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
5826 struct ixgbe_tx_buffer
*first
)
5828 struct sk_buff
*skb
= first
->skb
;
5829 u32 vlan_macip_lens
= 0;
5830 u32 mss_l4len_idx
= 0;
5833 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5834 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
5835 !(first
->tx_flags
& IXGBE_TX_FLAGS_TXSW
))
5839 switch (first
->protocol
) {
5840 case __constant_htons(ETH_P_IP
):
5841 vlan_macip_lens
|= skb_network_header_len(skb
);
5842 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5843 l4_hdr
= ip_hdr(skb
)->protocol
;
5845 case __constant_htons(ETH_P_IPV6
):
5846 vlan_macip_lens
|= skb_network_header_len(skb
);
5847 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
5850 if (unlikely(net_ratelimit())) {
5851 dev_warn(tx_ring
->dev
,
5852 "partial checksum but proto=%x!\n",
5860 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5861 mss_l4len_idx
= tcp_hdrlen(skb
) <<
5862 IXGBE_ADVTXD_L4LEN_SHIFT
;
5865 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5866 mss_l4len_idx
= sizeof(struct sctphdr
) <<
5867 IXGBE_ADVTXD_L4LEN_SHIFT
;
5870 mss_l4len_idx
= sizeof(struct udphdr
) <<
5871 IXGBE_ADVTXD_L4LEN_SHIFT
;
5874 if (unlikely(net_ratelimit())) {
5875 dev_warn(tx_ring
->dev
,
5876 "partial checksum but l4 proto=%x!\n",
5882 /* update TX checksum flag */
5883 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5886 /* vlan_macip_lens: MACLEN, VLAN tag */
5887 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5888 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5890 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
5891 type_tucmd
, mss_l4len_idx
);
5894 static __le32
ixgbe_tx_cmd_type(u32 tx_flags
)
5896 /* set type for advanced descriptor with frame checksum insertion */
5897 __le32 cmd_type
= cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA
|
5898 IXGBE_ADVTXD_DCMD_IFCS
|
5899 IXGBE_ADVTXD_DCMD_DEXT
);
5901 /* set HW vlan bit if vlan is present */
5902 if (tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
)
5903 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE
);
5905 #ifdef CONFIG_IXGBE_PTP
5906 if (tx_flags
& IXGBE_TX_FLAGS_TSTAMP
)
5907 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP
);
5910 /* set segmentation enable bits for TSO/FSO */
5912 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FSO
))
5914 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5916 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE
);
5921 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
5922 u32 tx_flags
, unsigned int paylen
)
5924 __le32 olinfo_status
= cpu_to_le32(paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
);
5926 /* enable L4 checksum for TSO and TX checksum offload */
5927 if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
5928 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM
);
5930 /* enble IPv4 checksum for TSO */
5931 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
5932 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM
);
5934 /* use index 1 context for TSO/FSO/FCOE */
5936 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FCOE
))
5938 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5940 olinfo_status
|= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT
);
5943 * Check Context must be set if Tx switch is enabled, which it
5944 * always is for case where virtual functions are running
5947 if (tx_flags
& (IXGBE_TX_FLAGS_TXSW
| IXGBE_TX_FLAGS_FCOE
))
5949 if (tx_flags
& IXGBE_TX_FLAGS_TXSW
)
5951 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_CC
);
5953 tx_desc
->read
.olinfo_status
= olinfo_status
;
5956 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5959 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
5960 struct ixgbe_tx_buffer
*first
,
5964 struct sk_buff
*skb
= first
->skb
;
5965 struct ixgbe_tx_buffer
*tx_buffer
;
5966 union ixgbe_adv_tx_desc
*tx_desc
;
5967 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
5968 unsigned int data_len
= skb
->data_len
;
5969 unsigned int size
= skb_headlen(skb
);
5970 unsigned int paylen
= skb
->len
- hdr_len
;
5971 u32 tx_flags
= first
->tx_flags
;
5973 u16 i
= tx_ring
->next_to_use
;
5975 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
5977 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, paylen
);
5978 cmd_type
= ixgbe_tx_cmd_type(tx_flags
);
5981 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5982 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
5983 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
5986 data_len
-= sizeof(struct fcoe_crc_eof
);
5991 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
5992 if (dma_mapping_error(tx_ring
->dev
, dma
))
5995 /* record length, and DMA address */
5996 dma_unmap_len_set(first
, len
, size
);
5997 dma_unmap_addr_set(first
, dma
, dma
);
5999 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6002 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
6003 tx_desc
->read
.cmd_type_len
=
6004 cmd_type
| cpu_to_le32(IXGBE_MAX_DATA_PER_TXD
);
6008 if (i
== tx_ring
->count
) {
6009 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6013 dma
+= IXGBE_MAX_DATA_PER_TXD
;
6014 size
-= IXGBE_MAX_DATA_PER_TXD
;
6016 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6017 tx_desc
->read
.olinfo_status
= 0;
6020 if (likely(!data_len
))
6023 if (unlikely(skb
->no_fcs
))
6024 cmd_type
&= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS
));
6025 tx_desc
->read
.cmd_type_len
= cmd_type
| cpu_to_le32(size
);
6029 if (i
== tx_ring
->count
) {
6030 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6035 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6037 size
= skb_frag_size(frag
);
6041 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6043 if (dma_mapping_error(tx_ring
->dev
, dma
))
6046 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6047 dma_unmap_len_set(tx_buffer
, len
, size
);
6048 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6050 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6051 tx_desc
->read
.olinfo_status
= 0;
6056 /* write last descriptor with RS and EOP bits */
6057 cmd_type
|= cpu_to_le32(size
) | cpu_to_le32(IXGBE_TXD_CMD
);
6058 tx_desc
->read
.cmd_type_len
= cmd_type
;
6060 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
6062 /* set the timestamp */
6063 first
->time_stamp
= jiffies
;
6066 * Force memory writes to complete before letting h/w know there
6067 * are new descriptors to fetch. (Only applicable for weak-ordered
6068 * memory model archs, such as IA-64).
6070 * We also need this memory barrier to make certain all of the
6071 * status bits have been updated before next_to_watch is written.
6075 /* set next_to_watch value indicating a packet is present */
6076 first
->next_to_watch
= tx_desc
;
6079 if (i
== tx_ring
->count
)
6082 tx_ring
->next_to_use
= i
;
6084 /* notify HW of packet */
6085 writel(i
, tx_ring
->tail
);
6089 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6091 /* clear dma mappings for failed tx_buffer_info map */
6093 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6094 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6095 if (tx_buffer
== first
)
6102 tx_ring
->next_to_use
= i
;
6105 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6106 struct ixgbe_tx_buffer
*first
)
6108 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6109 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6110 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6112 unsigned char *network
;
6114 struct ipv6hdr
*ipv6
;
6119 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6123 /* do nothing if sampling is disabled */
6124 if (!ring
->atr_sample_rate
)
6129 /* snag network header to get L4 type and address */
6130 hdr
.network
= skb_network_header(first
->skb
);
6132 /* Currently only IPv4/IPv6 with TCP is supported */
6133 if ((first
->protocol
!= __constant_htons(ETH_P_IPV6
) ||
6134 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6135 (first
->protocol
!= __constant_htons(ETH_P_IP
) ||
6136 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6139 th
= tcp_hdr(first
->skb
);
6141 /* skip this packet since it is invalid or the socket is closing */
6145 /* sample on all syn packets or once every atr sample count */
6146 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6149 /* reset sample count */
6150 ring
->atr_count
= 0;
6152 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6155 * src and dst are inverted, think how the receiver sees them
6157 * The input is broken into two sections, a non-compressed section
6158 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6159 * is XORed together and stored in the compressed dword.
6161 input
.formatted
.vlan_id
= vlan_id
;
6164 * since src port and flex bytes occupy the same word XOR them together
6165 * and write the value to source port portion of compressed dword
6167 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6168 common
.port
.src
^= th
->dest
^ __constant_htons(ETH_P_8021Q
);
6170 common
.port
.src
^= th
->dest
^ first
->protocol
;
6171 common
.port
.dst
^= th
->source
;
6173 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6174 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6175 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6177 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6178 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6179 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6180 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6181 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6182 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6183 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6184 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6185 hdr
.ipv6
->daddr
.s6_addr32
[3];
6188 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6189 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6190 input
, common
, ring
->queue_index
);
6193 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6195 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6196 /* Herbert's original patch had:
6197 * smp_mb__after_netif_stop_queue();
6198 * but since that doesn't exist yet, just open code it. */
6201 /* We need to check again in a case another CPU has just
6202 * made room available. */
6203 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6206 /* A reprieve! - use start_queue because it doesn't call schedule */
6207 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6208 ++tx_ring
->tx_stats
.restart_queue
;
6212 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6214 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6216 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6219 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6221 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6222 int txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6225 __be16 protocol
= vlan_get_protocol(skb
);
6227 if (((protocol
== htons(ETH_P_FCOE
)) ||
6228 (protocol
== htons(ETH_P_FIP
))) &&
6229 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6230 txq
&= (adapter
->ring_feature
[RING_F_FCOE
].indices
- 1);
6231 txq
+= adapter
->ring_feature
[RING_F_FCOE
].mask
;
6236 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6237 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6238 txq
-= dev
->real_num_tx_queues
;
6242 return skb_tx_hash(dev
, skb
);
6245 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6246 struct ixgbe_adapter
*adapter
,
6247 struct ixgbe_ring
*tx_ring
)
6249 struct ixgbe_tx_buffer
*first
;
6252 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6255 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
6256 __be16 protocol
= skb
->protocol
;
6260 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6261 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6262 * + 2 desc gap to keep tail from touching head,
6263 * + 1 desc for context descriptor,
6264 * otherwise try next time
6266 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6267 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6268 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6270 count
+= skb_shinfo(skb
)->nr_frags
;
6272 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
6273 tx_ring
->tx_stats
.tx_busy
++;
6274 return NETDEV_TX_BUSY
;
6277 /* record the location of the first descriptor for this packet */
6278 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
6280 first
->bytecount
= skb
->len
;
6281 first
->gso_segs
= 1;
6283 /* if we have a HW VLAN tag being added default to the HW one */
6284 if (vlan_tx_tag_present(skb
)) {
6285 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
6286 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6287 /* else if it is a SW VLAN check the next protocol and store the tag */
6288 } else if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6289 struct vlan_hdr
*vhdr
, _vhdr
;
6290 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
6294 protocol
= vhdr
->h_vlan_encapsulated_proto
;
6295 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
6296 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6297 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
6300 skb_tx_timestamp(skb
);
6302 #ifdef CONFIG_IXGBE_PTP
6303 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
6304 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
6305 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
6309 #ifdef CONFIG_PCI_IOV
6311 * Use the l2switch_enable flag - would be false if the DMA
6312 * Tx switch had been disabled.
6314 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6315 tx_flags
|= IXGBE_TX_FLAGS_TXSW
;
6318 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6319 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
6320 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
6321 (skb
->priority
!= TC_PRIO_CONTROL
))) {
6322 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6323 tx_flags
|= (skb
->priority
& 0x7) <<
6324 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
6325 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
6326 struct vlan_ethhdr
*vhdr
;
6327 if (skb_header_cloned(skb
) &&
6328 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
6330 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
6331 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
6332 IXGBE_TX_FLAGS_VLAN_SHIFT
);
6334 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6338 /* record initial flags and protocol */
6339 first
->tx_flags
= tx_flags
;
6340 first
->protocol
= protocol
;
6343 /* setup tx offload for FCoE */
6344 if ((protocol
== __constant_htons(ETH_P_FCOE
)) &&
6345 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6346 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
6353 #endif /* IXGBE_FCOE */
6354 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
6358 ixgbe_tx_csum(tx_ring
, first
);
6360 /* add the ATR filter if ATR is on */
6361 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
6362 ixgbe_atr(tx_ring
, first
);
6366 #endif /* IXGBE_FCOE */
6367 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
6369 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
6371 return NETDEV_TX_OK
;
6374 dev_kfree_skb_any(first
->skb
);
6377 return NETDEV_TX_OK
;
6380 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
6381 struct net_device
*netdev
)
6383 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6384 struct ixgbe_ring
*tx_ring
;
6386 if (skb
->len
<= 0) {
6387 dev_kfree_skb_any(skb
);
6388 return NETDEV_TX_OK
;
6392 * The minimum packet size for olinfo paylen is 17 so pad the skb
6393 * in order to meet this minimum size requirement.
6395 if (skb
->len
< 17) {
6396 if (skb_padto(skb
, 17))
6397 return NETDEV_TX_OK
;
6401 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6402 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
6406 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6407 * @netdev: network interface device structure
6408 * @p: pointer to an address structure
6410 * Returns 0 on success, negative on failure
6412 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6414 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6415 struct ixgbe_hw
*hw
= &adapter
->hw
;
6416 struct sockaddr
*addr
= p
;
6418 if (!is_valid_ether_addr(addr
->sa_data
))
6419 return -EADDRNOTAVAIL
;
6421 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6422 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6424 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6431 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6433 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6434 struct ixgbe_hw
*hw
= &adapter
->hw
;
6438 if (prtad
!= hw
->phy
.mdio
.prtad
)
6440 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6446 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6447 u16 addr
, u16 value
)
6449 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6450 struct ixgbe_hw
*hw
= &adapter
->hw
;
6452 if (prtad
!= hw
->phy
.mdio
.prtad
)
6454 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6457 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6459 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6462 #ifdef CONFIG_IXGBE_PTP
6464 return ixgbe_ptp_hwtstamp_ioctl(adapter
, req
, cmd
);
6467 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6472 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6474 * @netdev: network interface device structure
6476 * Returns non-zero on failure
6478 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6481 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6482 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6484 if (is_valid_ether_addr(mac
->san_addr
)) {
6486 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6493 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6495 * @netdev: network interface device structure
6497 * Returns non-zero on failure
6499 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6502 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6503 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6505 if (is_valid_ether_addr(mac
->san_addr
)) {
6507 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6513 #ifdef CONFIG_NET_POLL_CONTROLLER
6515 * Polling 'interrupt' - used by things like netconsole to send skbs
6516 * without having to re-enable interrupts. It's not called while
6517 * the interrupt routine is executing.
6519 static void ixgbe_netpoll(struct net_device
*netdev
)
6521 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6524 /* if interface is down do nothing */
6525 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6528 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6529 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6530 int num_q_vectors
= adapter
->num_msix_vectors
- NON_Q_VECTORS
;
6531 for (i
= 0; i
< num_q_vectors
; i
++) {
6532 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[i
];
6533 ixgbe_msix_clean_rings(0, q_vector
);
6536 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6538 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6542 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
6543 struct rtnl_link_stats64
*stats
)
6545 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6549 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6550 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
6556 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6557 packets
= ring
->stats
.packets
;
6558 bytes
= ring
->stats
.bytes
;
6559 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6560 stats
->rx_packets
+= packets
;
6561 stats
->rx_bytes
+= bytes
;
6565 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6566 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
6572 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6573 packets
= ring
->stats
.packets
;
6574 bytes
= ring
->stats
.bytes
;
6575 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6576 stats
->tx_packets
+= packets
;
6577 stats
->tx_bytes
+= bytes
;
6581 /* following stats updated by ixgbe_watchdog_task() */
6582 stats
->multicast
= netdev
->stats
.multicast
;
6583 stats
->rx_errors
= netdev
->stats
.rx_errors
;
6584 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
6585 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
6586 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
6590 #ifdef CONFIG_IXGBE_DCB
6591 /* ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6592 * #adapter: pointer to ixgbe_adapter
6593 * @tc: number of traffic classes currently enabled
6595 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6596 * 802.1Q priority maps to a packet buffer that exists.
6598 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
6600 struct ixgbe_hw
*hw
= &adapter
->hw
;
6604 /* 82598 have a static priority to TC mapping that can not
6605 * be changed so no validation is needed.
6607 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6610 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
6613 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
6614 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
6616 /* If up2tc is out of bounds default to zero */
6618 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
6622 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
6627 /* ixgbe_setup_tc - routine to configure net_device for multiple traffic
6630 * @netdev: net device to configure
6631 * @tc: number of traffic classes to enable
6633 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
6635 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6636 struct ixgbe_hw
*hw
= &adapter
->hw
;
6638 /* Multiple traffic classes requires multiple queues */
6639 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6640 e_err(drv
, "Enable failed, needs MSI-X\n");
6644 /* Hardware supports up to 8 traffic classes */
6645 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
6646 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
6647 tc
< MAX_TRAFFIC_CLASS
))
6650 /* Hardware has to reinitialize queues and interrupts to
6651 * match packet buffer alignment. Unfortunately, the
6652 * hardware is not flexible enough to do this dynamically.
6654 if (netif_running(dev
))
6656 ixgbe_clear_interrupt_scheme(adapter
);
6659 netdev_set_num_tc(dev
, tc
);
6660 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
6661 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6663 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
6664 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
6665 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
6668 netdev_reset_tc(dev
);
6669 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
6670 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
6672 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
6673 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6675 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
6676 adapter
->dcb_cfg
.pfc_mode_enable
= false;
6679 ixgbe_init_interrupt_scheme(adapter
);
6680 ixgbe_validate_rtr(adapter
, tc
);
6681 if (netif_running(dev
))
6687 #endif /* CONFIG_IXGBE_DCB */
6688 void ixgbe_do_reset(struct net_device
*netdev
)
6690 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6692 if (netif_running(netdev
))
6693 ixgbe_reinit_locked(adapter
);
6695 ixgbe_reset(adapter
);
6698 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
6699 netdev_features_t features
)
6701 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6703 /* return error if RXHASH is being enabled when RSS is not supported */
6704 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
))
6705 features
&= ~NETIF_F_RXHASH
;
6707 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6708 if (!(features
& NETIF_F_RXCSUM
))
6709 features
&= ~NETIF_F_LRO
;
6711 /* Turn off LRO if not RSC capable */
6712 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
6713 features
&= ~NETIF_F_LRO
;
6718 static int ixgbe_set_features(struct net_device
*netdev
,
6719 netdev_features_t features
)
6721 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6722 netdev_features_t changed
= netdev
->features
^ features
;
6723 bool need_reset
= false;
6725 /* Make sure RSC matches LRO, reset if change */
6726 if (!(features
& NETIF_F_LRO
)) {
6727 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6729 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
6730 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
6731 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
6732 if (adapter
->rx_itr_setting
== 1 ||
6733 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
6734 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
6736 } else if ((changed
^ features
) & NETIF_F_LRO
) {
6737 e_info(probe
, "rx-usecs set too low, "
6743 * Check if Flow Director n-tuple support was enabled or disabled. If
6744 * the state changed, we need to reset.
6746 if (!(features
& NETIF_F_NTUPLE
)) {
6747 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
6748 /* turn off Flow Director, set ATR and reset */
6749 if ((adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) &&
6750 !(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
6751 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6754 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6755 } else if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)) {
6756 /* turn off ATR, enable perfect filters and reset */
6757 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6758 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6762 if (features
& NETIF_F_HW_VLAN_RX
)
6763 ixgbe_vlan_strip_enable(adapter
);
6765 ixgbe_vlan_strip_disable(adapter
);
6767 if (changed
& NETIF_F_RXALL
)
6770 netdev
->features
= features
;
6772 ixgbe_do_reset(netdev
);
6777 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
,
6778 struct net_device
*dev
,
6779 unsigned char *addr
,
6782 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6783 int err
= -EOPNOTSUPP
;
6785 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6786 pr_info("%s: FDB only supports static addresses\n",
6791 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6792 if (is_unicast_ether_addr(addr
))
6793 err
= dev_uc_add_excl(dev
, addr
);
6794 else if (is_multicast_ether_addr(addr
))
6795 err
= dev_mc_add_excl(dev
, addr
);
6800 /* Only return duplicate errors if NLM_F_EXCL is set */
6801 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
6807 static int ixgbe_ndo_fdb_del(struct ndmsg
*ndm
,
6808 struct net_device
*dev
,
6809 unsigned char *addr
)
6811 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6812 int err
= -EOPNOTSUPP
;
6814 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6815 pr_info("%s: FDB only supports static addresses\n",
6820 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6821 if (is_unicast_ether_addr(addr
))
6822 err
= dev_uc_del(dev
, addr
);
6823 else if (is_multicast_ether_addr(addr
))
6824 err
= dev_mc_del(dev
, addr
);
6832 static int ixgbe_ndo_fdb_dump(struct sk_buff
*skb
,
6833 struct netlink_callback
*cb
,
6834 struct net_device
*dev
,
6837 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6839 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6840 idx
= ndo_dflt_fdb_dump(skb
, cb
, dev
, idx
);
6845 static const struct net_device_ops ixgbe_netdev_ops
= {
6846 .ndo_open
= ixgbe_open
,
6847 .ndo_stop
= ixgbe_close
,
6848 .ndo_start_xmit
= ixgbe_xmit_frame
,
6849 .ndo_select_queue
= ixgbe_select_queue
,
6850 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6851 .ndo_validate_addr
= eth_validate_addr
,
6852 .ndo_set_mac_address
= ixgbe_set_mac
,
6853 .ndo_change_mtu
= ixgbe_change_mtu
,
6854 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6855 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6856 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6857 .ndo_do_ioctl
= ixgbe_ioctl
,
6858 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
6859 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
6860 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
6861 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
6862 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
6863 .ndo_get_stats64
= ixgbe_get_stats64
,
6864 #ifdef CONFIG_IXGBE_DCB
6865 .ndo_setup_tc
= ixgbe_setup_tc
,
6867 #ifdef CONFIG_NET_POLL_CONTROLLER
6868 .ndo_poll_controller
= ixgbe_netpoll
,
6871 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6872 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
6873 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6874 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6875 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6876 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6877 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
6878 #endif /* IXGBE_FCOE */
6879 .ndo_set_features
= ixgbe_set_features
,
6880 .ndo_fix_features
= ixgbe_fix_features
,
6881 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
6882 .ndo_fdb_del
= ixgbe_ndo_fdb_del
,
6883 .ndo_fdb_dump
= ixgbe_ndo_fdb_dump
,
6886 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6887 const struct ixgbe_info
*ii
)
6889 #ifdef CONFIG_PCI_IOV
6890 struct ixgbe_hw
*hw
= &adapter
->hw
;
6892 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6895 /* The 82599 supports up to 64 VFs per physical function
6896 * but this implementation limits allocation to 63 so that
6897 * basic networking resources are still available to the
6898 * physical function. If the user requests greater thn
6899 * 63 VFs then it is an error - reset to default of zero.
6901 adapter
->num_vfs
= (max_vfs
> 63) ? 0 : max_vfs
;
6902 ixgbe_enable_sriov(adapter
, ii
);
6903 #endif /* CONFIG_PCI_IOV */
6907 * ixgbe_wol_supported - Check whether device supports WoL
6908 * @hw: hw specific details
6909 * @device_id: the device ID
6910 * @subdev_id: the subsystem device ID
6912 * This function is used by probe and ethtool to determine
6913 * which devices have WoL support
6916 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
6919 struct ixgbe_hw
*hw
= &adapter
->hw
;
6920 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
6921 int is_wol_supported
= 0;
6923 switch (device_id
) {
6924 case IXGBE_DEV_ID_82599_SFP
:
6925 /* Only these subdevices could supports WOL */
6926 switch (subdevice_id
) {
6927 case IXGBE_SUBDEV_ID_82599_560FLR
:
6928 /* only support first port */
6929 if (hw
->bus
.func
!= 0)
6931 case IXGBE_SUBDEV_ID_82599_SFP
:
6932 is_wol_supported
= 1;
6936 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
6937 /* All except this subdevice support WOL */
6938 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
6939 is_wol_supported
= 1;
6941 case IXGBE_DEV_ID_82599_KX4
:
6942 is_wol_supported
= 1;
6944 case IXGBE_DEV_ID_X540T
:
6945 /* check eeprom to see if enabled wol */
6946 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
6947 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
6948 (hw
->bus
.func
== 0))) {
6949 is_wol_supported
= 1;
6954 return is_wol_supported
;
6958 * ixgbe_probe - Device Initialization Routine
6959 * @pdev: PCI device information struct
6960 * @ent: entry in ixgbe_pci_tbl
6962 * Returns 0 on success, negative on failure
6964 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6965 * The OS initialization, configuring of the adapter private structure,
6966 * and a hardware reset occur.
6968 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6969 const struct pci_device_id
*ent
)
6971 struct net_device
*netdev
;
6972 struct ixgbe_adapter
*adapter
= NULL
;
6973 struct ixgbe_hw
*hw
;
6974 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6975 static int cards_found
;
6976 int i
, err
, pci_using_dac
;
6977 u8 part_str
[IXGBE_PBANUM_LENGTH
];
6978 unsigned int indices
= num_possible_cpus();
6984 /* Catch broken hardware that put the wrong VF device ID in
6985 * the PCIe SR-IOV capability.
6987 if (pdev
->is_virtfn
) {
6988 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
6989 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
6993 err
= pci_enable_device_mem(pdev
);
6997 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6998 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
7001 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
7003 err
= dma_set_coherent_mask(&pdev
->dev
,
7007 "No usable DMA configuration, aborting\n");
7014 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
7015 IORESOURCE_MEM
), ixgbe_driver_name
);
7018 "pci_request_selected_regions failed 0x%x\n", err
);
7022 pci_enable_pcie_error_reporting(pdev
);
7024 pci_set_master(pdev
);
7025 pci_save_state(pdev
);
7027 #ifdef CONFIG_IXGBE_DCB
7028 indices
*= MAX_TRAFFIC_CLASS
;
7031 if (ii
->mac
== ixgbe_mac_82598EB
)
7032 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
7034 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
7037 indices
+= min_t(unsigned int, num_possible_cpus(),
7038 IXGBE_MAX_FCOE_INDICES
);
7040 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
7043 goto err_alloc_etherdev
;
7046 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7048 adapter
= netdev_priv(netdev
);
7049 pci_set_drvdata(pdev
, adapter
);
7051 adapter
->netdev
= netdev
;
7052 adapter
->pdev
= pdev
;
7055 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
7057 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
7058 pci_resource_len(pdev
, 0));
7064 for (i
= 1; i
<= 5; i
++) {
7065 if (pci_resource_len(pdev
, i
) == 0)
7069 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
7070 ixgbe_set_ethtool_ops(netdev
);
7071 netdev
->watchdog_timeo
= 5 * HZ
;
7072 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
7074 adapter
->bd_number
= cards_found
;
7077 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
7078 hw
->mac
.type
= ii
->mac
;
7081 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
7082 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
7083 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7084 if (!(eec
& (1 << 8)))
7085 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
7088 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
7089 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
7090 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7091 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
7092 hw
->phy
.mdio
.mmds
= 0;
7093 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
7094 hw
->phy
.mdio
.dev
= netdev
;
7095 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
7096 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
7098 ii
->get_invariants(hw
);
7100 /* setup the private structure */
7101 err
= ixgbe_sw_init(adapter
);
7105 /* Make it possible the adapter to be woken up via WOL */
7106 switch (adapter
->hw
.mac
.type
) {
7107 case ixgbe_mac_82599EB
:
7108 case ixgbe_mac_X540
:
7109 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7116 * If there is a fan on this device and it has failed log the
7119 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
7120 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
7121 if (esdp
& IXGBE_ESDP_SDP1
)
7122 e_crit(probe
, "Fan has stopped, replace the adapter\n");
7125 if (allow_unsupported_sfp
)
7126 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
7128 /* reset_hw fills in the perm_addr as well */
7129 hw
->phy
.reset_if_overtemp
= true;
7130 err
= hw
->mac
.ops
.reset_hw(hw
);
7131 hw
->phy
.reset_if_overtemp
= false;
7132 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
7133 hw
->mac
.type
== ixgbe_mac_82598EB
) {
7135 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
7136 e_dev_err("failed to load because an unsupported SFP+ "
7137 "module type was detected.\n");
7138 e_dev_err("Reload the driver after installing a supported "
7142 e_dev_err("HW Init failed: %d\n", err
);
7146 ixgbe_probe_vf(adapter
, ii
);
7148 netdev
->features
= NETIF_F_SG
|
7151 NETIF_F_HW_VLAN_TX
|
7152 NETIF_F_HW_VLAN_RX
|
7153 NETIF_F_HW_VLAN_FILTER
|
7159 netdev
->hw_features
= netdev
->features
;
7161 switch (adapter
->hw
.mac
.type
) {
7162 case ixgbe_mac_82599EB
:
7163 case ixgbe_mac_X540
:
7164 netdev
->features
|= NETIF_F_SCTP_CSUM
;
7165 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
7172 netdev
->hw_features
|= NETIF_F_RXALL
;
7174 netdev
->vlan_features
|= NETIF_F_TSO
;
7175 netdev
->vlan_features
|= NETIF_F_TSO6
;
7176 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
7177 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
7178 netdev
->vlan_features
|= NETIF_F_SG
;
7180 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
7181 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
7183 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7184 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
7185 IXGBE_FLAG_DCB_ENABLED
);
7187 #ifdef CONFIG_IXGBE_DCB
7188 netdev
->dcbnl_ops
= &dcbnl_ops
;
7192 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
7193 if (hw
->mac
.ops
.get_device_caps
) {
7194 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
7195 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
7196 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
7199 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
7200 netdev
->vlan_features
|= NETIF_F_FCOE_CRC
;
7201 netdev
->vlan_features
|= NETIF_F_FSO
;
7202 netdev
->vlan_features
|= NETIF_F_FCOE_MTU
;
7204 #endif /* IXGBE_FCOE */
7205 if (pci_using_dac
) {
7206 netdev
->features
|= NETIF_F_HIGHDMA
;
7207 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
7210 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
7211 netdev
->hw_features
|= NETIF_F_LRO
;
7212 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7213 netdev
->features
|= NETIF_F_LRO
;
7215 /* make sure the EEPROM is good */
7216 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
7217 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7222 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7223 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7225 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
7226 e_dev_err("invalid MAC address\n");
7231 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
7232 (unsigned long) adapter
);
7234 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
7235 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
7237 err
= ixgbe_init_interrupt_scheme(adapter
);
7241 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
7242 netdev
->hw_features
&= ~NETIF_F_RXHASH
;
7243 netdev
->features
&= ~NETIF_F_RXHASH
;
7246 /* WOL not supported for all devices */
7248 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
7249 if (ixgbe_wol_supported(adapter
, pdev
->device
, pdev
->subsystem_device
))
7250 adapter
->wol
= IXGBE_WUFC_MAG
;
7252 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
7254 #ifdef CONFIG_IXGBE_PTP
7255 ixgbe_ptp_init(adapter
);
7256 #endif /* CONFIG_IXGBE_PTP*/
7258 /* save off EEPROM version number */
7259 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
7260 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
7262 /* pick up the PCI bus settings for reporting later */
7263 hw
->mac
.ops
.get_bus_info(hw
);
7265 /* print bus type/speed/width info */
7266 e_dev_info("(PCI Express:%s:%s) %pM\n",
7267 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0GT/s" :
7268 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5GT/s" :
7270 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
7271 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
7272 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
7276 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
7278 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
7279 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
7280 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7281 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
7284 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7285 hw
->mac
.type
, hw
->phy
.type
, part_str
);
7287 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
7288 e_dev_warn("PCI-Express bandwidth available for this card is "
7289 "not sufficient for optimal performance.\n");
7290 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7294 /* reset the hardware with the new settings */
7295 err
= hw
->mac
.ops
.start_hw(hw
);
7296 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
7297 /* We are running on a pre-production device, log a warning */
7298 e_dev_warn("This device is a pre-production adapter/LOM. "
7299 "Please be aware there may be issues associated "
7300 "with your hardware. If you are experiencing "
7301 "problems please contact your Intel or hardware "
7302 "representative who provided you with this "
7305 strcpy(netdev
->name
, "eth%d");
7306 err
= register_netdev(netdev
);
7310 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7311 if (hw
->mac
.ops
.disable_tx_laser
&&
7312 ((hw
->phy
.multispeed_fiber
) ||
7313 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
7314 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
7315 hw
->mac
.ops
.disable_tx_laser(hw
);
7317 /* carrier off reporting is important to ethtool even BEFORE open */
7318 netif_carrier_off(netdev
);
7320 #ifdef CONFIG_IXGBE_DCA
7321 if (dca_add_requester(&pdev
->dev
) == 0) {
7322 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
7323 ixgbe_setup_dca(adapter
);
7326 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7327 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
7328 for (i
= 0; i
< adapter
->num_vfs
; i
++)
7329 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
7332 /* firmware requires driver version to be 0xFFFFFFFF
7333 * since os does not support feature
7335 if (hw
->mac
.ops
.set_fw_drv_ver
)
7336 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
7339 /* add san mac addr to netdev */
7340 ixgbe_add_sanmac_netdev(netdev
);
7342 e_dev_info("%s\n", ixgbe_default_device_descr
);
7345 #ifdef CONFIG_IXGBE_HWMON
7346 if (ixgbe_sysfs_init(adapter
))
7347 e_err(probe
, "failed to allocate sysfs resources\n");
7348 #endif /* CONFIG_IXGBE_HWMON */
7353 ixgbe_release_hw_control(adapter
);
7354 ixgbe_clear_interrupt_scheme(adapter
);
7356 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7357 ixgbe_disable_sriov(adapter
);
7358 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
7359 iounmap(hw
->hw_addr
);
7361 free_netdev(netdev
);
7363 pci_release_selected_regions(pdev
,
7364 pci_select_bars(pdev
, IORESOURCE_MEM
));
7367 pci_disable_device(pdev
);
7372 * ixgbe_remove - Device Removal Routine
7373 * @pdev: PCI device information struct
7375 * ixgbe_remove is called by the PCI subsystem to alert the driver
7376 * that it should release a PCI device. The could be caused by a
7377 * Hot-Plug event, or because the driver is going to be removed from
7380 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7382 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7383 struct net_device
*netdev
= adapter
->netdev
;
7385 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7386 cancel_work_sync(&adapter
->service_task
);
7388 #ifdef CONFIG_IXGBE_PTP
7389 ixgbe_ptp_stop(adapter
);
7392 #ifdef CONFIG_IXGBE_DCA
7393 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7394 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7395 dca_remove_requester(&pdev
->dev
);
7396 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7400 #ifdef CONFIG_IXGBE_HWMON
7401 ixgbe_sysfs_exit(adapter
);
7402 #endif /* CONFIG_IXGBE_HWMON */
7405 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7406 ixgbe_cleanup_fcoe(adapter
);
7408 #endif /* IXGBE_FCOE */
7410 /* remove the added san mac */
7411 ixgbe_del_sanmac_netdev(netdev
);
7413 if (netdev
->reg_state
== NETREG_REGISTERED
)
7414 unregister_netdev(netdev
);
7416 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7417 if (!(ixgbe_check_vf_assignment(adapter
)))
7418 ixgbe_disable_sriov(adapter
);
7420 e_dev_warn("Unloading driver while VFs are assigned "
7421 "- VFs will not be deallocated\n");
7424 ixgbe_clear_interrupt_scheme(adapter
);
7426 ixgbe_release_hw_control(adapter
);
7429 kfree(adapter
->ixgbe_ieee_pfc
);
7430 kfree(adapter
->ixgbe_ieee_ets
);
7433 iounmap(adapter
->hw
.hw_addr
);
7434 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7437 e_dev_info("complete\n");
7439 free_netdev(netdev
);
7441 pci_disable_pcie_error_reporting(pdev
);
7443 pci_disable_device(pdev
);
7447 * ixgbe_io_error_detected - called when PCI error is detected
7448 * @pdev: Pointer to PCI device
7449 * @state: The current pci connection state
7451 * This function is called after a PCI bus error affecting
7452 * this device has been detected.
7454 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7455 pci_channel_state_t state
)
7457 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7458 struct net_device
*netdev
= adapter
->netdev
;
7460 #ifdef CONFIG_PCI_IOV
7461 struct pci_dev
*bdev
, *vfdev
;
7462 u32 dw0
, dw1
, dw2
, dw3
;
7464 u16 req_id
, pf_func
;
7466 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7467 adapter
->num_vfs
== 0)
7468 goto skip_bad_vf_detection
;
7470 bdev
= pdev
->bus
->self
;
7471 while (bdev
&& (bdev
->pcie_type
!= PCI_EXP_TYPE_ROOT_PORT
))
7472 bdev
= bdev
->bus
->self
;
7475 goto skip_bad_vf_detection
;
7477 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
7479 goto skip_bad_vf_detection
;
7481 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
, &dw0
);
7482 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 4, &dw1
);
7483 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 8, &dw2
);
7484 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 12, &dw3
);
7487 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7488 if (!(req_id
& 0x0080))
7489 goto skip_bad_vf_detection
;
7491 pf_func
= req_id
& 0x01;
7492 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
7493 unsigned int device_id
;
7495 vf
= (req_id
& 0x7F) >> 1;
7496 e_dev_err("VF %d has caused a PCIe error\n", vf
);
7497 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7498 "%8.8x\tdw3: %8.8x\n",
7499 dw0
, dw1
, dw2
, dw3
);
7500 switch (adapter
->hw
.mac
.type
) {
7501 case ixgbe_mac_82599EB
:
7502 device_id
= IXGBE_82599_VF_DEVICE_ID
;
7504 case ixgbe_mac_X540
:
7505 device_id
= IXGBE_X540_VF_DEVICE_ID
;
7512 /* Find the pci device of the offending VF */
7513 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
, device_id
, NULL
);
7515 if (vfdev
->devfn
== (req_id
& 0xFF))
7517 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
,
7521 * There's a slim chance the VF could have been hot plugged,
7522 * so if it is no longer present we don't need to issue the
7523 * VFLR. Just clean up the AER in that case.
7526 e_dev_err("Issuing VFLR to VF %d\n", vf
);
7527 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
7530 pci_cleanup_aer_uncorrect_error_status(pdev
);
7534 * Even though the error may have occurred on the other port
7535 * we still need to increment the vf error reference count for
7536 * both ports because the I/O resume function will be called
7539 adapter
->vferr_refcount
++;
7541 return PCI_ERS_RESULT_RECOVERED
;
7543 skip_bad_vf_detection
:
7544 #endif /* CONFIG_PCI_IOV */
7545 netif_device_detach(netdev
);
7547 if (state
== pci_channel_io_perm_failure
)
7548 return PCI_ERS_RESULT_DISCONNECT
;
7550 if (netif_running(netdev
))
7551 ixgbe_down(adapter
);
7552 pci_disable_device(pdev
);
7554 /* Request a slot reset. */
7555 return PCI_ERS_RESULT_NEED_RESET
;
7559 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7560 * @pdev: Pointer to PCI device
7562 * Restart the card from scratch, as if from a cold-boot.
7564 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7566 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7567 pci_ers_result_t result
;
7570 if (pci_enable_device_mem(pdev
)) {
7571 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7572 result
= PCI_ERS_RESULT_DISCONNECT
;
7574 pci_set_master(pdev
);
7575 pci_restore_state(pdev
);
7576 pci_save_state(pdev
);
7578 pci_wake_from_d3(pdev
, false);
7580 ixgbe_reset(adapter
);
7581 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7582 result
= PCI_ERS_RESULT_RECOVERED
;
7585 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7587 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7588 "failed 0x%0x\n", err
);
7589 /* non-fatal, continue */
7596 * ixgbe_io_resume - called when traffic can start flowing again.
7597 * @pdev: Pointer to PCI device
7599 * This callback is called when the error recovery driver tells us that
7600 * its OK to resume normal operation.
7602 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7604 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7605 struct net_device
*netdev
= adapter
->netdev
;
7607 #ifdef CONFIG_PCI_IOV
7608 if (adapter
->vferr_refcount
) {
7609 e_info(drv
, "Resuming after VF err\n");
7610 adapter
->vferr_refcount
--;
7615 if (netif_running(netdev
))
7618 netif_device_attach(netdev
);
7621 static struct pci_error_handlers ixgbe_err_handler
= {
7622 .error_detected
= ixgbe_io_error_detected
,
7623 .slot_reset
= ixgbe_io_slot_reset
,
7624 .resume
= ixgbe_io_resume
,
7627 static struct pci_driver ixgbe_driver
= {
7628 .name
= ixgbe_driver_name
,
7629 .id_table
= ixgbe_pci_tbl
,
7630 .probe
= ixgbe_probe
,
7631 .remove
= __devexit_p(ixgbe_remove
),
7633 .suspend
= ixgbe_suspend
,
7634 .resume
= ixgbe_resume
,
7636 .shutdown
= ixgbe_shutdown
,
7637 .err_handler
= &ixgbe_err_handler
7641 * ixgbe_init_module - Driver Registration Routine
7643 * ixgbe_init_module is the first routine called when the driver is
7644 * loaded. All it does is register with the PCI subsystem.
7646 static int __init
ixgbe_init_module(void)
7649 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7650 pr_info("%s\n", ixgbe_copyright
);
7652 #ifdef CONFIG_IXGBE_DCA
7653 dca_register_notify(&dca_notifier
);
7656 ret
= pci_register_driver(&ixgbe_driver
);
7660 module_init(ixgbe_init_module
);
7663 * ixgbe_exit_module - Driver Exit Cleanup Routine
7665 * ixgbe_exit_module is called just before the driver is removed
7668 static void __exit
ixgbe_exit_module(void)
7670 #ifdef CONFIG_IXGBE_DCA
7671 dca_unregister_notify(&dca_notifier
);
7673 pci_unregister_driver(&ixgbe_driver
);
7674 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7677 #ifdef CONFIG_IXGBE_DCA
7678 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7683 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7684 __ixgbe_notify_dca
);
7686 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7689 #endif /* CONFIG_IXGBE_DCA */
7691 module_exit(ixgbe_exit_module
);