1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/if_macvlan.h>
49 #include <linux/if_bridge.h>
50 #include <linux/prefetch.h>
51 #include <scsi/fc/fc_fcoe.h>
54 #include "ixgbe_common.h"
55 #include "ixgbe_dcb_82599.h"
56 #include "ixgbe_sriov.h"
58 char ixgbe_driver_name
[] = "ixgbe";
59 static const char ixgbe_driver_string
[] =
60 "Intel(R) 10 Gigabit PCI Express Network Driver";
62 char ixgbe_default_device_descr
[] =
63 "Intel(R) 10 Gigabit Network Connection";
65 static char ixgbe_default_device_descr
[] =
66 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION "3.19.1-k"
69 const char ixgbe_driver_version
[] = DRV_VERSION
;
70 static const char ixgbe_copyright
[] =
71 "Copyright (c) 1999-2014 Intel Corporation.";
73 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
74 [board_82598
] = &ixgbe_82598_info
,
75 [board_82599
] = &ixgbe_82599_info
,
76 [board_X540
] = &ixgbe_X540_info
,
79 /* ixgbe_pci_tbl - PCI Device ID Table
81 * Wildcard entries (PCI_ANY_ID) should come last
82 * Last entry must be all 0s
84 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
85 * Class, Class Mask, private data (not used) }
87 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
88 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
118 /* required last entry */
121 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
123 #ifdef CONFIG_IXGBE_DCA
124 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
126 static struct notifier_block dca_notifier
= {
127 .notifier_call
= ixgbe_notify_dca
,
133 #ifdef CONFIG_PCI_IOV
134 static unsigned int max_vfs
;
135 module_param(max_vfs
, uint
, 0);
136 MODULE_PARM_DESC(max_vfs
,
137 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
138 #endif /* CONFIG_PCI_IOV */
140 static unsigned int allow_unsupported_sfp
;
141 module_param(allow_unsupported_sfp
, uint
, 0);
142 MODULE_PARM_DESC(allow_unsupported_sfp
,
143 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
145 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
146 static int debug
= -1;
147 module_param(debug
, int, 0);
148 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
150 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
151 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
152 MODULE_LICENSE("GPL");
153 MODULE_VERSION(DRV_VERSION
);
155 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
157 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
160 struct pci_dev
*parent_dev
;
161 struct pci_bus
*parent_bus
;
163 parent_bus
= adapter
->pdev
->bus
->parent
;
167 parent_dev
= parent_bus
->self
;
171 if (!pci_is_pcie(parent_dev
))
174 pcie_capability_read_word(parent_dev
, reg
, value
);
175 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
176 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
181 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
183 struct ixgbe_hw
*hw
= &adapter
->hw
;
187 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
189 /* Get the negotiated link width and speed from PCI config space of the
190 * parent, as this device is behind a switch
192 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
194 /* assume caller will handle error case */
198 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
199 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
205 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
206 * @hw: hw specific details
208 * This function is used by probe to determine whether a device's PCI-Express
209 * bandwidth details should be gathered from the parent bus instead of from the
210 * device. Used to ensure that various locations all have the correct device ID
213 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
215 switch (hw
->device_id
) {
216 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
217 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
224 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
228 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
229 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
230 struct pci_dev
*pdev
;
232 /* determine whether to use the the parent device
234 if (ixgbe_pcie_from_parent(&adapter
->hw
))
235 pdev
= adapter
->pdev
->bus
->parent
->self
;
237 pdev
= adapter
->pdev
;
239 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
240 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
241 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
246 case PCIE_SPEED_2_5GT
:
247 /* 8b/10b encoding reduces max throughput by 20% */
250 case PCIE_SPEED_5_0GT
:
251 /* 8b/10b encoding reduces max throughput by 20% */
254 case PCIE_SPEED_8_0GT
:
255 /* 128b/130b encoding reduces throughput by less than 2% */
259 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
263 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
265 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
266 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
267 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
268 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
271 (speed
== PCIE_SPEED_2_5GT
? "20%" :
272 speed
== PCIE_SPEED_5_0GT
? "20%" :
273 speed
== PCIE_SPEED_8_0GT
? "<2%" :
276 if (max_gts
< expected_gts
) {
277 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
278 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
280 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
284 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
286 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
287 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
288 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
289 schedule_work(&adapter
->service_task
);
292 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
294 struct ixgbe_adapter
*adapter
= hw
->back
;
299 e_dev_err("Adapter removed\n");
300 ixgbe_service_event_schedule(adapter
);
303 void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
307 /* The following check not only optimizes a bit by not
308 * performing a read on the status register when the
309 * register just read was a status register read that
310 * returned IXGBE_FAILED_READ_REG. It also blocks any
311 * potential recursion.
313 if (reg
== IXGBE_STATUS
) {
314 ixgbe_remove_adapter(hw
);
317 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
318 if (value
== IXGBE_FAILED_READ_REG
)
319 ixgbe_remove_adapter(hw
);
322 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
326 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
327 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
328 ixgbe_remove_adapter(hw
);
334 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
336 struct ixgbe_adapter
*adapter
= hw
->back
;
339 if (ixgbe_removed(hw
->hw_addr
))
340 return IXGBE_FAILED_READ_CFG_WORD
;
341 pci_read_config_word(adapter
->pdev
, reg
, &value
);
342 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
343 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
344 return IXGBE_FAILED_READ_CFG_WORD
;
348 #ifdef CONFIG_PCI_IOV
349 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
351 struct ixgbe_adapter
*adapter
= hw
->back
;
354 if (ixgbe_removed(hw
->hw_addr
))
355 return IXGBE_FAILED_READ_CFG_DWORD
;
356 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
357 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
358 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
359 return IXGBE_FAILED_READ_CFG_DWORD
;
362 #endif /* CONFIG_PCI_IOV */
364 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
366 struct ixgbe_adapter
*adapter
= hw
->back
;
368 if (ixgbe_removed(hw
->hw_addr
))
370 pci_write_config_word(adapter
->pdev
, reg
, value
);
373 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
375 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
377 /* flush memory to make sure state is correct before next watchdog */
378 smp_mb__before_clear_bit();
379 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
382 struct ixgbe_reg_info
{
387 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
389 /* General Registers */
390 {IXGBE_CTRL
, "CTRL"},
391 {IXGBE_STATUS
, "STATUS"},
392 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
394 /* Interrupt Registers */
395 {IXGBE_EICR
, "EICR"},
398 {IXGBE_SRRCTL(0), "SRRCTL"},
399 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
400 {IXGBE_RDLEN(0), "RDLEN"},
401 {IXGBE_RDH(0), "RDH"},
402 {IXGBE_RDT(0), "RDT"},
403 {IXGBE_RXDCTL(0), "RXDCTL"},
404 {IXGBE_RDBAL(0), "RDBAL"},
405 {IXGBE_RDBAH(0), "RDBAH"},
408 {IXGBE_TDBAL(0), "TDBAL"},
409 {IXGBE_TDBAH(0), "TDBAH"},
410 {IXGBE_TDLEN(0), "TDLEN"},
411 {IXGBE_TDH(0), "TDH"},
412 {IXGBE_TDT(0), "TDT"},
413 {IXGBE_TXDCTL(0), "TXDCTL"},
415 /* List Terminator */
421 * ixgbe_regdump - register printout routine
423 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
429 switch (reginfo
->ofs
) {
430 case IXGBE_SRRCTL(0):
431 for (i
= 0; i
< 64; i
++)
432 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
434 case IXGBE_DCA_RXCTRL(0):
435 for (i
= 0; i
< 64; i
++)
436 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
439 for (i
= 0; i
< 64; i
++)
440 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
443 for (i
= 0; i
< 64; i
++)
444 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
447 for (i
= 0; i
< 64; i
++)
448 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
450 case IXGBE_RXDCTL(0):
451 for (i
= 0; i
< 64; i
++)
452 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
455 for (i
= 0; i
< 64; i
++)
456 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
459 for (i
= 0; i
< 64; i
++)
460 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
463 for (i
= 0; i
< 64; i
++)
464 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
467 for (i
= 0; i
< 64; i
++)
468 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
471 for (i
= 0; i
< 64; i
++)
472 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
475 for (i
= 0; i
< 64; i
++)
476 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
479 for (i
= 0; i
< 64; i
++)
480 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
482 case IXGBE_TXDCTL(0):
483 for (i
= 0; i
< 64; i
++)
484 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
487 pr_info("%-15s %08x\n", reginfo
->name
,
488 IXGBE_READ_REG(hw
, reginfo
->ofs
));
492 for (i
= 0; i
< 8; i
++) {
493 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
494 pr_err("%-15s", rname
);
495 for (j
= 0; j
< 8; j
++)
496 pr_cont(" %08x", regs
[i
*8+j
]);
503 * ixgbe_dump - Print registers, tx-rings and rx-rings
505 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
507 struct net_device
*netdev
= adapter
->netdev
;
508 struct ixgbe_hw
*hw
= &adapter
->hw
;
509 struct ixgbe_reg_info
*reginfo
;
511 struct ixgbe_ring
*tx_ring
;
512 struct ixgbe_tx_buffer
*tx_buffer
;
513 union ixgbe_adv_tx_desc
*tx_desc
;
514 struct my_u0
{ u64 a
; u64 b
; } *u0
;
515 struct ixgbe_ring
*rx_ring
;
516 union ixgbe_adv_rx_desc
*rx_desc
;
517 struct ixgbe_rx_buffer
*rx_buffer_info
;
521 if (!netif_msg_hw(adapter
))
524 /* Print netdevice Info */
526 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
527 pr_info("Device Name state "
528 "trans_start last_rx\n");
529 pr_info("%-15s %016lX %016lX %016lX\n",
536 /* Print Registers */
537 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
538 pr_info(" Register Name Value\n");
539 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
540 reginfo
->name
; reginfo
++) {
541 ixgbe_regdump(hw
, reginfo
);
544 /* Print TX Ring Summary */
545 if (!netdev
|| !netif_running(netdev
))
548 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
549 pr_info(" %s %s %s %s\n",
550 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
551 "leng", "ntw", "timestamp");
552 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
553 tx_ring
= adapter
->tx_ring
[n
];
554 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
555 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
556 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
557 (u64
)dma_unmap_addr(tx_buffer
, dma
),
558 dma_unmap_len(tx_buffer
, len
),
559 tx_buffer
->next_to_watch
,
560 (u64
)tx_buffer
->time_stamp
);
564 if (!netif_msg_tx_done(adapter
))
565 goto rx_ring_summary
;
567 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
569 /* Transmit Descriptor Formats
571 * 82598 Advanced Transmit Descriptor
572 * +--------------------------------------------------------------+
573 * 0 | Buffer Address [63:0] |
574 * +--------------------------------------------------------------+
575 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
576 * +--------------------------------------------------------------+
577 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
579 * 82598 Advanced Transmit Descriptor (Write-Back Format)
580 * +--------------------------------------------------------------+
582 * +--------------------------------------------------------------+
583 * 8 | RSV | STA | NXTSEQ |
584 * +--------------------------------------------------------------+
587 * 82599+ Advanced Transmit Descriptor
588 * +--------------------------------------------------------------+
589 * 0 | Buffer Address [63:0] |
590 * +--------------------------------------------------------------+
591 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
592 * +--------------------------------------------------------------+
593 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
595 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
596 * +--------------------------------------------------------------+
598 * +--------------------------------------------------------------+
599 * 8 | RSV | STA | RSV |
600 * +--------------------------------------------------------------+
604 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
605 tx_ring
= adapter
->tx_ring
[n
];
606 pr_info("------------------------------------\n");
607 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
608 pr_info("------------------------------------\n");
609 pr_info("%s%s %s %s %s %s\n",
610 "T [desc] [address 63:0 ] ",
611 "[PlPOIdStDDt Ln] [bi->dma ] ",
612 "leng", "ntw", "timestamp", "bi->skb");
614 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
615 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
616 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
617 u0
= (struct my_u0
*)tx_desc
;
618 if (dma_unmap_len(tx_buffer
, len
) > 0) {
619 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
623 (u64
)dma_unmap_addr(tx_buffer
, dma
),
624 dma_unmap_len(tx_buffer
, len
),
625 tx_buffer
->next_to_watch
,
626 (u64
)tx_buffer
->time_stamp
,
628 if (i
== tx_ring
->next_to_use
&&
629 i
== tx_ring
->next_to_clean
)
631 else if (i
== tx_ring
->next_to_use
)
633 else if (i
== tx_ring
->next_to_clean
)
638 if (netif_msg_pktdata(adapter
) &&
640 print_hex_dump(KERN_INFO
, "",
641 DUMP_PREFIX_ADDRESS
, 16, 1,
642 tx_buffer
->skb
->data
,
643 dma_unmap_len(tx_buffer
, len
),
649 /* Print RX Rings Summary */
651 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
652 pr_info("Queue [NTU] [NTC]\n");
653 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
654 rx_ring
= adapter
->rx_ring
[n
];
655 pr_info("%5d %5X %5X\n",
656 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
660 if (!netif_msg_rx_status(adapter
))
663 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
665 /* Receive Descriptor Formats
667 * 82598 Advanced Receive Descriptor (Read) Format
669 * +-----------------------------------------------------+
670 * 0 | Packet Buffer Address [63:1] |A0/NSE|
671 * +----------------------------------------------+------+
672 * 8 | Header Buffer Address [63:1] | DD |
673 * +-----------------------------------------------------+
676 * 82598 Advanced Receive Descriptor (Write-Back) Format
678 * 63 48 47 32 31 30 21 20 16 15 4 3 0
679 * +------------------------------------------------------+
680 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
681 * | Packet | IP | | | | Type | Type |
682 * | Checksum | Ident | | | | | |
683 * +------------------------------------------------------+
684 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
685 * +------------------------------------------------------+
686 * 63 48 47 32 31 20 19 0
688 * 82599+ Advanced Receive Descriptor (Read) Format
690 * +-----------------------------------------------------+
691 * 0 | Packet Buffer Address [63:1] |A0/NSE|
692 * +----------------------------------------------+------+
693 * 8 | Header Buffer Address [63:1] | DD |
694 * +-----------------------------------------------------+
697 * 82599+ Advanced Receive Descriptor (Write-Back) Format
699 * 63 48 47 32 31 30 21 20 17 16 4 3 0
700 * +------------------------------------------------------+
701 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
702 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
703 * |/ Flow Dir Flt ID | | | | | |
704 * +------------------------------------------------------+
705 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
706 * +------------------------------------------------------+
707 * 63 48 47 32 31 20 19 0
710 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
711 rx_ring
= adapter
->rx_ring
[n
];
712 pr_info("------------------------------------\n");
713 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
714 pr_info("------------------------------------\n");
716 "R [desc] [ PktBuf A0] ",
717 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
718 "<-- Adv Rx Read format\n");
720 "RWB[desc] [PcsmIpSHl PtRs] ",
721 "[vl er S cks ln] ---------------- [bi->skb ] ",
722 "<-- Adv Rx Write-Back format\n");
724 for (i
= 0; i
< rx_ring
->count
; i
++) {
725 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
726 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
727 u0
= (struct my_u0
*)rx_desc
;
728 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
729 if (staterr
& IXGBE_RXD_STAT_DD
) {
730 /* Descriptor Done */
731 pr_info("RWB[0x%03X] %016llX "
732 "%016llX ---------------- %p", i
,
735 rx_buffer_info
->skb
);
737 pr_info("R [0x%03X] %016llX "
738 "%016llX %016llX %p", i
,
741 (u64
)rx_buffer_info
->dma
,
742 rx_buffer_info
->skb
);
744 if (netif_msg_pktdata(adapter
) &&
745 rx_buffer_info
->dma
) {
746 print_hex_dump(KERN_INFO
, "",
747 DUMP_PREFIX_ADDRESS
, 16, 1,
748 page_address(rx_buffer_info
->page
) +
749 rx_buffer_info
->page_offset
,
750 ixgbe_rx_bufsz(rx_ring
), true);
754 if (i
== rx_ring
->next_to_use
)
756 else if (i
== rx_ring
->next_to_clean
)
768 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
772 /* Let firmware take over control of h/w */
773 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
774 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
775 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
778 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
782 /* Let firmware know the driver has taken over */
783 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
784 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
785 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
789 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
790 * @adapter: pointer to adapter struct
791 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
792 * @queue: queue to map the corresponding interrupt to
793 * @msix_vector: the vector to map to the corresponding queue
796 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
797 u8 queue
, u8 msix_vector
)
800 struct ixgbe_hw
*hw
= &adapter
->hw
;
801 switch (hw
->mac
.type
) {
802 case ixgbe_mac_82598EB
:
803 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
806 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
807 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
808 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
809 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
810 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
812 case ixgbe_mac_82599EB
:
814 if (direction
== -1) {
816 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
817 index
= ((queue
& 1) * 8);
818 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
819 ivar
&= ~(0xFF << index
);
820 ivar
|= (msix_vector
<< index
);
821 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
824 /* tx or rx causes */
825 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
826 index
= ((16 * (queue
& 1)) + (8 * direction
));
827 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
828 ivar
&= ~(0xFF << index
);
829 ivar
|= (msix_vector
<< index
);
830 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
838 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
843 switch (adapter
->hw
.mac
.type
) {
844 case ixgbe_mac_82598EB
:
845 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
846 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
848 case ixgbe_mac_82599EB
:
850 mask
= (qmask
& 0xFFFFFFFF);
851 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
852 mask
= (qmask
>> 32);
853 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
860 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
861 struct ixgbe_tx_buffer
*tx_buffer
)
863 if (tx_buffer
->skb
) {
864 dev_kfree_skb_any(tx_buffer
->skb
);
865 if (dma_unmap_len(tx_buffer
, len
))
866 dma_unmap_single(ring
->dev
,
867 dma_unmap_addr(tx_buffer
, dma
),
868 dma_unmap_len(tx_buffer
, len
),
870 } else if (dma_unmap_len(tx_buffer
, len
)) {
871 dma_unmap_page(ring
->dev
,
872 dma_unmap_addr(tx_buffer
, dma
),
873 dma_unmap_len(tx_buffer
, len
),
876 tx_buffer
->next_to_watch
= NULL
;
877 tx_buffer
->skb
= NULL
;
878 dma_unmap_len_set(tx_buffer
, len
, 0);
879 /* tx_buffer must be completely set up in the transmit path */
882 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
884 struct ixgbe_hw
*hw
= &adapter
->hw
;
885 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
889 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
890 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
893 switch (hw
->mac
.type
) {
894 case ixgbe_mac_82598EB
:
895 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
898 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
900 hwstats
->lxoffrxc
+= data
;
902 /* refill credits (no tx hang) if we received xoff */
906 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
907 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
908 &adapter
->tx_ring
[i
]->state
);
911 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
913 struct ixgbe_hw
*hw
= &adapter
->hw
;
914 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
918 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
920 if (adapter
->ixgbe_ieee_pfc
)
921 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
923 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
924 ixgbe_update_xoff_rx_lfc(adapter
);
928 /* update stats for each tc, only valid with PFC enabled */
929 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
932 switch (hw
->mac
.type
) {
933 case ixgbe_mac_82598EB
:
934 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
937 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
939 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
940 /* Get the TC for given UP */
941 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
942 xoff
[tc
] += pxoffrxc
;
945 /* disarm tx queues that have received xoff frames */
946 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
947 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
949 tc
= tx_ring
->dcb_tc
;
951 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
955 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
957 return ring
->stats
.packets
;
960 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
962 struct ixgbe_adapter
*adapter
;
966 if (ring
->l2_accel_priv
)
967 adapter
= ring
->l2_accel_priv
->real_adapter
;
969 adapter
= netdev_priv(ring
->netdev
);
972 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
973 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
976 return (head
< tail
) ?
977 tail
- head
: (tail
+ ring
->count
- head
);
982 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
984 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
985 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
986 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
989 clear_check_for_tx_hang(tx_ring
);
992 * Check for a hung queue, but be thorough. This verifies
993 * that a transmit has been completed since the previous
994 * check AND there is at least one packet pending. The
995 * ARMED bit is set to indicate a potential hang. The
996 * bit is cleared if a pause frame is received to remove
997 * false hang detection due to PFC or 802.3x frames. By
998 * requiring this to fail twice we avoid races with
999 * pfc clearing the ARMED bit and conditions where we
1000 * run the check_tx_hang logic with a transmit completion
1001 * pending but without time to complete it yet.
1003 if ((tx_done_old
== tx_done
) && tx_pending
) {
1004 /* make sure it is true for two checks in a row */
1005 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1008 /* update completed stats and continue */
1009 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1010 /* reset the countdown */
1011 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1018 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1019 * @adapter: driver private struct
1021 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1024 /* Do the reset outside of interrupt context */
1025 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1026 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
1027 e_warn(drv
, "initiating reset due to tx timeout\n");
1028 ixgbe_service_event_schedule(adapter
);
1033 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1034 * @q_vector: structure containing interrupt and ring information
1035 * @tx_ring: tx ring to clean
1037 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1038 struct ixgbe_ring
*tx_ring
)
1040 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1041 struct ixgbe_tx_buffer
*tx_buffer
;
1042 union ixgbe_adv_tx_desc
*tx_desc
;
1043 unsigned int total_bytes
= 0, total_packets
= 0;
1044 unsigned int budget
= q_vector
->tx
.work_limit
;
1045 unsigned int i
= tx_ring
->next_to_clean
;
1047 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1050 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1051 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1052 i
-= tx_ring
->count
;
1055 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1057 /* if next_to_watch is not set then there is no work pending */
1061 /* prevent any other reads prior to eop_desc */
1062 read_barrier_depends();
1064 /* if DD is not set pending work has not been completed */
1065 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1068 /* clear next_to_watch to prevent false hangs */
1069 tx_buffer
->next_to_watch
= NULL
;
1071 /* update the statistics for this packet */
1072 total_bytes
+= tx_buffer
->bytecount
;
1073 total_packets
+= tx_buffer
->gso_segs
;
1076 dev_kfree_skb_any(tx_buffer
->skb
);
1078 /* unmap skb header data */
1079 dma_unmap_single(tx_ring
->dev
,
1080 dma_unmap_addr(tx_buffer
, dma
),
1081 dma_unmap_len(tx_buffer
, len
),
1084 /* clear tx_buffer data */
1085 tx_buffer
->skb
= NULL
;
1086 dma_unmap_len_set(tx_buffer
, len
, 0);
1088 /* unmap remaining buffers */
1089 while (tx_desc
!= eop_desc
) {
1094 i
-= tx_ring
->count
;
1095 tx_buffer
= tx_ring
->tx_buffer_info
;
1096 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1099 /* unmap any remaining paged data */
1100 if (dma_unmap_len(tx_buffer
, len
)) {
1101 dma_unmap_page(tx_ring
->dev
,
1102 dma_unmap_addr(tx_buffer
, dma
),
1103 dma_unmap_len(tx_buffer
, len
),
1105 dma_unmap_len_set(tx_buffer
, len
, 0);
1109 /* move us one more past the eop_desc for start of next pkt */
1114 i
-= tx_ring
->count
;
1115 tx_buffer
= tx_ring
->tx_buffer_info
;
1116 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1119 /* issue prefetch for next Tx descriptor */
1122 /* update budget accounting */
1124 } while (likely(budget
));
1126 i
+= tx_ring
->count
;
1127 tx_ring
->next_to_clean
= i
;
1128 u64_stats_update_begin(&tx_ring
->syncp
);
1129 tx_ring
->stats
.bytes
+= total_bytes
;
1130 tx_ring
->stats
.packets
+= total_packets
;
1131 u64_stats_update_end(&tx_ring
->syncp
);
1132 q_vector
->tx
.total_bytes
+= total_bytes
;
1133 q_vector
->tx
.total_packets
+= total_packets
;
1135 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1136 /* schedule immediate reset if we believe we hung */
1137 struct ixgbe_hw
*hw
= &adapter
->hw
;
1138 e_err(drv
, "Detected Tx Unit Hang\n"
1140 " TDH, TDT <%x>, <%x>\n"
1141 " next_to_use <%x>\n"
1142 " next_to_clean <%x>\n"
1143 "tx_buffer_info[next_to_clean]\n"
1144 " time_stamp <%lx>\n"
1146 tx_ring
->queue_index
,
1147 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1148 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1149 tx_ring
->next_to_use
, i
,
1150 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1152 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1155 "tx hang %d detected on queue %d, resetting adapter\n",
1156 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1158 /* schedule immediate reset if we believe we hung */
1159 ixgbe_tx_timeout_reset(adapter
);
1161 /* the adapter is about to reset, no point in enabling stuff */
1165 netdev_tx_completed_queue(txring_txq(tx_ring
),
1166 total_packets
, total_bytes
);
1168 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1169 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1170 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1171 /* Make sure that anybody stopping the queue after this
1172 * sees the new next_to_clean.
1175 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1176 tx_ring
->queue_index
)
1177 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1178 netif_wake_subqueue(tx_ring
->netdev
,
1179 tx_ring
->queue_index
);
1180 ++tx_ring
->tx_stats
.restart_queue
;
1187 #ifdef CONFIG_IXGBE_DCA
1188 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1189 struct ixgbe_ring
*tx_ring
,
1192 struct ixgbe_hw
*hw
= &adapter
->hw
;
1193 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1196 switch (hw
->mac
.type
) {
1197 case ixgbe_mac_82598EB
:
1198 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1200 case ixgbe_mac_82599EB
:
1201 case ixgbe_mac_X540
:
1202 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1203 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1206 /* for unknown hardware do not write register */
1211 * We can enable relaxed ordering for reads, but not writes when
1212 * DCA is enabled. This is due to a known issue in some chipsets
1213 * which will cause the DCA tag to be cleared.
1215 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1216 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1217 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1219 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1222 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1223 struct ixgbe_ring
*rx_ring
,
1226 struct ixgbe_hw
*hw
= &adapter
->hw
;
1227 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1228 u8 reg_idx
= rx_ring
->reg_idx
;
1231 switch (hw
->mac
.type
) {
1232 case ixgbe_mac_82599EB
:
1233 case ixgbe_mac_X540
:
1234 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1241 * We can enable relaxed ordering for reads, but not writes when
1242 * DCA is enabled. This is due to a known issue in some chipsets
1243 * which will cause the DCA tag to be cleared.
1245 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1246 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1248 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1251 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1253 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1254 struct ixgbe_ring
*ring
;
1255 int cpu
= get_cpu();
1257 if (q_vector
->cpu
== cpu
)
1260 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1261 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1263 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1264 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1266 q_vector
->cpu
= cpu
;
1271 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1275 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1278 /* always use CB2 mode, difference is masked in the CB driver */
1279 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1281 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1282 adapter
->q_vector
[i
]->cpu
= -1;
1283 ixgbe_update_dca(adapter
->q_vector
[i
]);
1287 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1289 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1290 unsigned long event
= *(unsigned long *)data
;
1292 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1296 case DCA_PROVIDER_ADD
:
1297 /* if we're already enabled, don't do it again */
1298 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1300 if (dca_add_requester(dev
) == 0) {
1301 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1302 ixgbe_setup_dca(adapter
);
1305 /* Fall Through since DCA is disabled. */
1306 case DCA_PROVIDER_REMOVE
:
1307 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1308 dca_remove_requester(dev
);
1309 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1310 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1318 #endif /* CONFIG_IXGBE_DCA */
1319 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1320 union ixgbe_adv_rx_desc
*rx_desc
,
1321 struct sk_buff
*skb
)
1323 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1325 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1331 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1332 * @ring: structure containing ring specific data
1333 * @rx_desc: advanced rx descriptor
1335 * Returns : true if it is FCoE pkt
1337 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1338 union ixgbe_adv_rx_desc
*rx_desc
)
1340 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1342 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1343 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1344 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1345 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1348 #endif /* IXGBE_FCOE */
1350 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1351 * @ring: structure containing ring specific data
1352 * @rx_desc: current Rx descriptor being processed
1353 * @skb: skb currently being received and modified
1355 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1356 union ixgbe_adv_rx_desc
*rx_desc
,
1357 struct sk_buff
*skb
)
1359 skb_checksum_none_assert(skb
);
1361 /* Rx csum disabled */
1362 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1365 /* if IP and error */
1366 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1367 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1368 ring
->rx_stats
.csum_err
++;
1372 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1375 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1376 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1379 * 82599 errata, UDP frames with a 0 checksum can be marked as
1382 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1383 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1386 ring
->rx_stats
.csum_err
++;
1390 /* It must be a TCP or UDP packet with a valid checksum */
1391 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1394 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1396 rx_ring
->next_to_use
= val
;
1398 /* update next to alloc since we have filled the ring */
1399 rx_ring
->next_to_alloc
= val
;
1401 * Force memory writes to complete before letting h/w
1402 * know there are new descriptors to fetch. (Only
1403 * applicable for weak-ordered memory model archs,
1407 ixgbe_write_tail(rx_ring
, val
);
1410 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1411 struct ixgbe_rx_buffer
*bi
)
1413 struct page
*page
= bi
->page
;
1414 dma_addr_t dma
= bi
->dma
;
1416 /* since we are recycling buffers we should seldom need to alloc */
1420 /* alloc new page for storage */
1421 if (likely(!page
)) {
1422 page
= __skb_alloc_pages(GFP_ATOMIC
| __GFP_COLD
| __GFP_COMP
,
1423 bi
->skb
, ixgbe_rx_pg_order(rx_ring
));
1424 if (unlikely(!page
)) {
1425 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1431 /* map page for use */
1432 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1433 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1436 * if mapping failed free memory back to system since
1437 * there isn't much point in holding memory we can't use
1439 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1440 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1443 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1448 bi
->page_offset
= 0;
1454 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1455 * @rx_ring: ring to place buffers on
1456 * @cleaned_count: number of buffers to replace
1458 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1460 union ixgbe_adv_rx_desc
*rx_desc
;
1461 struct ixgbe_rx_buffer
*bi
;
1462 u16 i
= rx_ring
->next_to_use
;
1468 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1469 bi
= &rx_ring
->rx_buffer_info
[i
];
1470 i
-= rx_ring
->count
;
1473 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1477 * Refresh the desc even if buffer_addrs didn't change
1478 * because each write-back erases this info.
1480 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1486 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1487 bi
= rx_ring
->rx_buffer_info
;
1488 i
-= rx_ring
->count
;
1491 /* clear the hdr_addr for the next_to_use descriptor */
1492 rx_desc
->read
.hdr_addr
= 0;
1495 } while (cleaned_count
);
1497 i
+= rx_ring
->count
;
1499 if (rx_ring
->next_to_use
!= i
)
1500 ixgbe_release_rx_desc(rx_ring
, i
);
1504 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1505 * @data: pointer to the start of the headers
1506 * @max_len: total length of section to find headers in
1508 * This function is meant to determine the length of headers that will
1509 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1510 * motivation of doing this is to only perform one pull for IPv4 TCP
1511 * packets so that we can do basic things like calculating the gso_size
1512 * based on the average data per packet.
1514 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1515 unsigned int max_len
)
1518 unsigned char *network
;
1521 struct vlan_hdr
*vlan
;
1524 struct ipv6hdr
*ipv6
;
1527 u8 nexthdr
= 0; /* default to not TCP */
1530 /* this should never happen, but better safe than sorry */
1531 if (max_len
< ETH_HLEN
)
1534 /* initialize network frame pointer */
1537 /* set first protocol and move network header forward */
1538 protocol
= hdr
.eth
->h_proto
;
1539 hdr
.network
+= ETH_HLEN
;
1541 /* handle any vlan tag if present */
1542 if (protocol
== htons(ETH_P_8021Q
)) {
1543 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1546 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1547 hdr
.network
+= VLAN_HLEN
;
1550 /* handle L3 protocols */
1551 if (protocol
== htons(ETH_P_IP
)) {
1552 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1555 /* access ihl as a u8 to avoid unaligned access on ia64 */
1556 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1558 /* verify hlen meets minimum size requirements */
1559 if (hlen
< sizeof(struct iphdr
))
1560 return hdr
.network
- data
;
1562 /* record next protocol if header is present */
1563 if (!(hdr
.ipv4
->frag_off
& htons(IP_OFFSET
)))
1564 nexthdr
= hdr
.ipv4
->protocol
;
1565 } else if (protocol
== htons(ETH_P_IPV6
)) {
1566 if ((hdr
.network
- data
) > (max_len
- sizeof(struct ipv6hdr
)))
1569 /* record next protocol */
1570 nexthdr
= hdr
.ipv6
->nexthdr
;
1571 hlen
= sizeof(struct ipv6hdr
);
1573 } else if (protocol
== htons(ETH_P_FCOE
)) {
1574 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1576 hlen
= FCOE_HEADER_LEN
;
1579 return hdr
.network
- data
;
1582 /* relocate pointer to start of L4 header */
1583 hdr
.network
+= hlen
;
1585 /* finally sort out TCP/UDP */
1586 if (nexthdr
== IPPROTO_TCP
) {
1587 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1590 /* access doff as a u8 to avoid unaligned access on ia64 */
1591 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1593 /* verify hlen meets minimum size requirements */
1594 if (hlen
< sizeof(struct tcphdr
))
1595 return hdr
.network
- data
;
1597 hdr
.network
+= hlen
;
1598 } else if (nexthdr
== IPPROTO_UDP
) {
1599 if ((hdr
.network
- data
) > (max_len
- sizeof(struct udphdr
)))
1602 hdr
.network
+= sizeof(struct udphdr
);
1606 * If everything has gone correctly hdr.network should be the
1607 * data section of the packet and will be the end of the header.
1608 * If not then it probably represents the end of the last recognized
1611 if ((hdr
.network
- data
) < max_len
)
1612 return hdr
.network
- data
;
1617 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1618 struct sk_buff
*skb
)
1620 u16 hdr_len
= skb_headlen(skb
);
1622 /* set gso_size to avoid messing up TCP MSS */
1623 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1624 IXGBE_CB(skb
)->append_cnt
);
1625 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1628 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1629 struct sk_buff
*skb
)
1631 /* if append_cnt is 0 then frame is not RSC */
1632 if (!IXGBE_CB(skb
)->append_cnt
)
1635 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1636 rx_ring
->rx_stats
.rsc_flush
++;
1638 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1640 /* gso_size is computed using append_cnt so always clear it last */
1641 IXGBE_CB(skb
)->append_cnt
= 0;
1645 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1646 * @rx_ring: rx descriptor ring packet is being transacted on
1647 * @rx_desc: pointer to the EOP Rx descriptor
1648 * @skb: pointer to current skb being populated
1650 * This function checks the ring, descriptor, and packet information in
1651 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1652 * other fields within the skb.
1654 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1655 union ixgbe_adv_rx_desc
*rx_desc
,
1656 struct sk_buff
*skb
)
1658 struct net_device
*dev
= rx_ring
->netdev
;
1660 ixgbe_update_rsc_stats(rx_ring
, skb
);
1662 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1664 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1666 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1668 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1669 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1670 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1671 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1674 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1676 skb
->protocol
= eth_type_trans(skb
, dev
);
1679 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1680 struct sk_buff
*skb
)
1682 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1684 if (ixgbe_qv_busy_polling(q_vector
))
1685 netif_receive_skb(skb
);
1686 else if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1687 napi_gro_receive(&q_vector
->napi
, skb
);
1693 * ixgbe_is_non_eop - process handling of non-EOP buffers
1694 * @rx_ring: Rx ring being processed
1695 * @rx_desc: Rx descriptor for current buffer
1696 * @skb: Current socket buffer containing buffer in progress
1698 * This function updates next to clean. If the buffer is an EOP buffer
1699 * this function exits returning false, otherwise it will place the
1700 * sk_buff in the next buffer to be chained and return true indicating
1701 * that this is in fact a non-EOP buffer.
1703 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1704 union ixgbe_adv_rx_desc
*rx_desc
,
1705 struct sk_buff
*skb
)
1707 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1709 /* fetch, update, and store next to clean */
1710 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1711 rx_ring
->next_to_clean
= ntc
;
1713 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1715 /* update RSC append count if present */
1716 if (ring_is_rsc_enabled(rx_ring
)) {
1717 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1718 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1720 if (unlikely(rsc_enabled
)) {
1721 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1723 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1724 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1726 /* update ntc based on RSC value */
1727 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1728 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1729 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1733 /* if we are the last buffer then there is nothing else to do */
1734 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1737 /* place skb in next buffer to be received */
1738 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1739 rx_ring
->rx_stats
.non_eop_descs
++;
1745 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1746 * @rx_ring: rx descriptor ring packet is being transacted on
1747 * @skb: pointer to current skb being adjusted
1749 * This function is an ixgbe specific version of __pskb_pull_tail. The
1750 * main difference between this version and the original function is that
1751 * this function can make several assumptions about the state of things
1752 * that allow for significant optimizations versus the standard function.
1753 * As a result we can do things like drop a frag and maintain an accurate
1754 * truesize for the skb.
1756 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1757 struct sk_buff
*skb
)
1759 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1761 unsigned int pull_len
;
1764 * it is valid to use page_address instead of kmap since we are
1765 * working with pages allocated out of the lomem pool per
1766 * alloc_page(GFP_ATOMIC)
1768 va
= skb_frag_address(frag
);
1771 * we need the header to contain the greater of either ETH_HLEN or
1772 * 60 bytes if the skb->len is less than 60 for skb_pad.
1774 pull_len
= ixgbe_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1776 /* align pull length to size of long to optimize memcpy performance */
1777 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1779 /* update all of the pointers */
1780 skb_frag_size_sub(frag
, pull_len
);
1781 frag
->page_offset
+= pull_len
;
1782 skb
->data_len
-= pull_len
;
1783 skb
->tail
+= pull_len
;
1787 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1788 * @rx_ring: rx descriptor ring packet is being transacted on
1789 * @skb: pointer to current skb being updated
1791 * This function provides a basic DMA sync up for the first fragment of an
1792 * skb. The reason for doing this is that the first fragment cannot be
1793 * unmapped until we have reached the end of packet descriptor for a buffer
1796 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1797 struct sk_buff
*skb
)
1799 /* if the page was released unmap it, else just sync our portion */
1800 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1801 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1802 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1803 IXGBE_CB(skb
)->page_released
= false;
1805 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1807 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1810 ixgbe_rx_bufsz(rx_ring
),
1813 IXGBE_CB(skb
)->dma
= 0;
1817 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1818 * @rx_ring: rx descriptor ring packet is being transacted on
1819 * @rx_desc: pointer to the EOP Rx descriptor
1820 * @skb: pointer to current skb being fixed
1822 * Check for corrupted packet headers caused by senders on the local L2
1823 * embedded NIC switch not setting up their Tx Descriptors right. These
1824 * should be very rare.
1826 * Also address the case where we are pulling data in on pages only
1827 * and as such no data is present in the skb header.
1829 * In addition if skb is not at least 60 bytes we need to pad it so that
1830 * it is large enough to qualify as a valid Ethernet frame.
1832 * Returns true if an error was encountered and skb was freed.
1834 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1835 union ixgbe_adv_rx_desc
*rx_desc
,
1836 struct sk_buff
*skb
)
1838 struct net_device
*netdev
= rx_ring
->netdev
;
1840 /* verify that the packet does not have any known errors */
1841 if (unlikely(ixgbe_test_staterr(rx_desc
,
1842 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1843 !(netdev
->features
& NETIF_F_RXALL
))) {
1844 dev_kfree_skb_any(skb
);
1848 /* place header in linear portion of buffer */
1849 if (skb_is_nonlinear(skb
))
1850 ixgbe_pull_tail(rx_ring
, skb
);
1853 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1854 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1858 /* if skb_pad returns an error the skb was freed */
1859 if (unlikely(skb
->len
< 60)) {
1860 int pad_len
= 60 - skb
->len
;
1862 if (skb_pad(skb
, pad_len
))
1864 __skb_put(skb
, pad_len
);
1871 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1872 * @rx_ring: rx descriptor ring to store buffers on
1873 * @old_buff: donor buffer to have page reused
1875 * Synchronizes page for reuse by the adapter
1877 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1878 struct ixgbe_rx_buffer
*old_buff
)
1880 struct ixgbe_rx_buffer
*new_buff
;
1881 u16 nta
= rx_ring
->next_to_alloc
;
1883 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1885 /* update, and store next to alloc */
1887 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1889 /* transfer page from old buffer to new buffer */
1890 new_buff
->page
= old_buff
->page
;
1891 new_buff
->dma
= old_buff
->dma
;
1892 new_buff
->page_offset
= old_buff
->page_offset
;
1894 /* sync the buffer for use by the device */
1895 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1896 new_buff
->page_offset
,
1897 ixgbe_rx_bufsz(rx_ring
),
1902 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1903 * @rx_ring: rx descriptor ring to transact packets on
1904 * @rx_buffer: buffer containing page to add
1905 * @rx_desc: descriptor containing length of buffer written by hardware
1906 * @skb: sk_buff to place the data into
1908 * This function will add the data contained in rx_buffer->page to the skb.
1909 * This is done either through a direct copy if the data in the buffer is
1910 * less than the skb header size, otherwise it will just attach the page as
1911 * a frag to the skb.
1913 * The function will then update the page offset if necessary and return
1914 * true if the buffer can be reused by the adapter.
1916 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1917 struct ixgbe_rx_buffer
*rx_buffer
,
1918 union ixgbe_adv_rx_desc
*rx_desc
,
1919 struct sk_buff
*skb
)
1921 struct page
*page
= rx_buffer
->page
;
1922 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1923 #if (PAGE_SIZE < 8192)
1924 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1926 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1927 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1928 ixgbe_rx_bufsz(rx_ring
);
1931 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1932 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1934 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1936 /* we can reuse buffer as-is, just make sure it is local */
1937 if (likely(page_to_nid(page
) == numa_node_id()))
1940 /* this page cannot be reused so discard it */
1945 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1946 rx_buffer
->page_offset
, size
, truesize
);
1948 /* avoid re-using remote pages */
1949 if (unlikely(page_to_nid(page
) != numa_node_id()))
1952 #if (PAGE_SIZE < 8192)
1953 /* if we are only owner of page we can reuse it */
1954 if (unlikely(page_count(page
) != 1))
1957 /* flip page offset to other buffer */
1958 rx_buffer
->page_offset
^= truesize
;
1961 * since we are the only owner of the page and we need to
1962 * increment it, just set the value to 2 in order to avoid
1963 * an unecessary locked operation
1965 atomic_set(&page
->_count
, 2);
1967 /* move offset up to the next cache line */
1968 rx_buffer
->page_offset
+= truesize
;
1970 if (rx_buffer
->page_offset
> last_offset
)
1973 /* bump ref count on page before it is given to the stack */
1980 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
1981 union ixgbe_adv_rx_desc
*rx_desc
)
1983 struct ixgbe_rx_buffer
*rx_buffer
;
1984 struct sk_buff
*skb
;
1987 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
1988 page
= rx_buffer
->page
;
1991 skb
= rx_buffer
->skb
;
1994 void *page_addr
= page_address(page
) +
1995 rx_buffer
->page_offset
;
1997 /* prefetch first cache line of first page */
1998 prefetch(page_addr
);
1999 #if L1_CACHE_BYTES < 128
2000 prefetch(page_addr
+ L1_CACHE_BYTES
);
2003 /* allocate a skb to store the frags */
2004 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
2006 if (unlikely(!skb
)) {
2007 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
2012 * we will be copying header into skb->data in
2013 * pskb_may_pull so it is in our interest to prefetch
2014 * it now to avoid a possible cache miss
2016 prefetchw(skb
->data
);
2019 * Delay unmapping of the first packet. It carries the
2020 * header information, HW may still access the header
2021 * after the writeback. Only unmap it when EOP is
2024 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
2027 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2029 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2030 ixgbe_dma_sync_frag(rx_ring
, skb
);
2033 /* we are reusing so sync this buffer for CPU use */
2034 dma_sync_single_range_for_cpu(rx_ring
->dev
,
2036 rx_buffer
->page_offset
,
2037 ixgbe_rx_bufsz(rx_ring
),
2041 /* pull page into skb */
2042 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
2043 /* hand second half of page back to the ring */
2044 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
2045 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
2046 /* the page has been released from the ring */
2047 IXGBE_CB(skb
)->page_released
= true;
2049 /* we are not reusing the buffer so unmap it */
2050 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
2051 ixgbe_rx_pg_size(rx_ring
),
2055 /* clear contents of buffer_info */
2056 rx_buffer
->skb
= NULL
;
2058 rx_buffer
->page
= NULL
;
2064 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2065 * @q_vector: structure containing interrupt and ring information
2066 * @rx_ring: rx descriptor ring to transact packets on
2067 * @budget: Total limit on number of packets to process
2069 * This function provides a "bounce buffer" approach to Rx interrupt
2070 * processing. The advantage to this is that on systems that have
2071 * expensive overhead for IOMMU access this provides a means of avoiding
2072 * it by maintaining the mapping of the page to the syste.
2074 * Returns amount of work completed
2076 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2077 struct ixgbe_ring
*rx_ring
,
2080 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
2082 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2084 unsigned int mss
= 0;
2085 #endif /* IXGBE_FCOE */
2086 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2088 while (likely(total_rx_packets
< budget
)) {
2089 union ixgbe_adv_rx_desc
*rx_desc
;
2090 struct sk_buff
*skb
;
2092 /* return some buffers to hardware, one at a time is too slow */
2093 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2094 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2098 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2100 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
2104 * This memory barrier is needed to keep us from reading
2105 * any other fields out of the rx_desc until we know the
2106 * RXD_STAT_DD bit is set
2110 /* retrieve a buffer from the ring */
2111 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2113 /* exit if we failed to retrieve a buffer */
2119 /* place incomplete frames back on ring for completion */
2120 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2123 /* verify the packet layout is correct */
2124 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2127 /* probably a little skewed due to removing CRC */
2128 total_rx_bytes
+= skb
->len
;
2130 /* populate checksum, timestamp, VLAN, and protocol */
2131 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2134 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2135 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2136 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2137 /* include DDPed FCoE data */
2138 if (ddp_bytes
> 0) {
2140 mss
= rx_ring
->netdev
->mtu
-
2141 sizeof(struct fcoe_hdr
) -
2142 sizeof(struct fc_frame_header
) -
2143 sizeof(struct fcoe_crc_eof
);
2147 total_rx_bytes
+= ddp_bytes
;
2148 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2152 dev_kfree_skb_any(skb
);
2157 #endif /* IXGBE_FCOE */
2158 skb_mark_napi_id(skb
, &q_vector
->napi
);
2159 ixgbe_rx_skb(q_vector
, skb
);
2161 /* update budget accounting */
2165 u64_stats_update_begin(&rx_ring
->syncp
);
2166 rx_ring
->stats
.packets
+= total_rx_packets
;
2167 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2168 u64_stats_update_end(&rx_ring
->syncp
);
2169 q_vector
->rx
.total_packets
+= total_rx_packets
;
2170 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2173 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2175 return total_rx_packets
;
2178 #ifdef CONFIG_NET_RX_BUSY_POLL
2179 /* must be called with local_bh_disable()d */
2180 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2182 struct ixgbe_q_vector
*q_vector
=
2183 container_of(napi
, struct ixgbe_q_vector
, napi
);
2184 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2185 struct ixgbe_ring
*ring
;
2188 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2189 return LL_FLUSH_FAILED
;
2191 if (!ixgbe_qv_lock_poll(q_vector
))
2192 return LL_FLUSH_BUSY
;
2194 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2195 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2196 #ifdef BP_EXTENDED_STATS
2198 ring
->stats
.cleaned
+= found
;
2200 ring
->stats
.misses
++;
2206 ixgbe_qv_unlock_poll(q_vector
);
2210 #endif /* CONFIG_NET_RX_BUSY_POLL */
2213 * ixgbe_configure_msix - Configure MSI-X hardware
2214 * @adapter: board private structure
2216 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2219 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2221 struct ixgbe_q_vector
*q_vector
;
2225 /* Populate MSIX to EITR Select */
2226 if (adapter
->num_vfs
> 32) {
2227 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2228 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2232 * Populate the IVAR table and set the ITR values to the
2233 * corresponding register.
2235 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2236 struct ixgbe_ring
*ring
;
2237 q_vector
= adapter
->q_vector
[v_idx
];
2239 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2240 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2242 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2243 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2245 ixgbe_write_eitr(q_vector
);
2248 switch (adapter
->hw
.mac
.type
) {
2249 case ixgbe_mac_82598EB
:
2250 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2253 case ixgbe_mac_82599EB
:
2254 case ixgbe_mac_X540
:
2255 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2260 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2262 /* set up to autoclear timer, and the vectors */
2263 mask
= IXGBE_EIMS_ENABLE_MASK
;
2264 mask
&= ~(IXGBE_EIMS_OTHER
|
2265 IXGBE_EIMS_MAILBOX
|
2268 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2271 enum latency_range
{
2275 latency_invalid
= 255
2279 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2280 * @q_vector: structure containing interrupt and ring information
2281 * @ring_container: structure containing ring performance data
2283 * Stores a new ITR value based on packets and byte
2284 * counts during the last interrupt. The advantage of per interrupt
2285 * computation is faster updates and more accurate ITR for the current
2286 * traffic pattern. Constants in this function were computed
2287 * based on theoretical maximum wire speed and thresholds were set based
2288 * on testing data as well as attempting to minimize response time
2289 * while increasing bulk throughput.
2290 * this functionality is controlled by the InterruptThrottleRate module
2291 * parameter (see ixgbe_param.c)
2293 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2294 struct ixgbe_ring_container
*ring_container
)
2296 int bytes
= ring_container
->total_bytes
;
2297 int packets
= ring_container
->total_packets
;
2300 u8 itr_setting
= ring_container
->itr
;
2305 /* simple throttlerate management
2306 * 0-10MB/s lowest (100000 ints/s)
2307 * 10-20MB/s low (20000 ints/s)
2308 * 20-1249MB/s bulk (8000 ints/s)
2310 /* what was last interrupt timeslice? */
2311 timepassed_us
= q_vector
->itr
>> 2;
2312 if (timepassed_us
== 0)
2315 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2317 switch (itr_setting
) {
2318 case lowest_latency
:
2319 if (bytes_perint
> 10)
2320 itr_setting
= low_latency
;
2323 if (bytes_perint
> 20)
2324 itr_setting
= bulk_latency
;
2325 else if (bytes_perint
<= 10)
2326 itr_setting
= lowest_latency
;
2329 if (bytes_perint
<= 20)
2330 itr_setting
= low_latency
;
2334 /* clear work counters since we have the values we need */
2335 ring_container
->total_bytes
= 0;
2336 ring_container
->total_packets
= 0;
2338 /* write updated itr to ring container */
2339 ring_container
->itr
= itr_setting
;
2343 * ixgbe_write_eitr - write EITR register in hardware specific way
2344 * @q_vector: structure containing interrupt and ring information
2346 * This function is made to be called by ethtool and by the driver
2347 * when it needs to update EITR registers at runtime. Hardware
2348 * specific quirks/differences are taken care of here.
2350 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2352 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2353 struct ixgbe_hw
*hw
= &adapter
->hw
;
2354 int v_idx
= q_vector
->v_idx
;
2355 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2357 switch (adapter
->hw
.mac
.type
) {
2358 case ixgbe_mac_82598EB
:
2359 /* must write high and low 16 bits to reset counter */
2360 itr_reg
|= (itr_reg
<< 16);
2362 case ixgbe_mac_82599EB
:
2363 case ixgbe_mac_X540
:
2365 * set the WDIS bit to not clear the timer bits and cause an
2366 * immediate assertion of the interrupt
2368 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2373 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2376 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2378 u32 new_itr
= q_vector
->itr
;
2381 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2382 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2384 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2386 switch (current_itr
) {
2387 /* counts and packets in update_itr are dependent on these numbers */
2388 case lowest_latency
:
2389 new_itr
= IXGBE_100K_ITR
;
2392 new_itr
= IXGBE_20K_ITR
;
2395 new_itr
= IXGBE_8K_ITR
;
2401 if (new_itr
!= q_vector
->itr
) {
2402 /* do an exponential smoothing */
2403 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2404 ((9 * new_itr
) + q_vector
->itr
);
2406 /* save the algorithm value here */
2407 q_vector
->itr
= new_itr
;
2409 ixgbe_write_eitr(q_vector
);
2414 * ixgbe_check_overtemp_subtask - check for over temperature
2415 * @adapter: pointer to adapter
2417 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2419 struct ixgbe_hw
*hw
= &adapter
->hw
;
2420 u32 eicr
= adapter
->interrupt_event
;
2422 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2425 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2426 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2429 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2431 switch (hw
->device_id
) {
2432 case IXGBE_DEV_ID_82599_T3_LOM
:
2434 * Since the warning interrupt is for both ports
2435 * we don't have to check if:
2436 * - This interrupt wasn't for our port.
2437 * - We may have missed the interrupt so always have to
2438 * check if we got a LSC
2440 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2441 !(eicr
& IXGBE_EICR_LSC
))
2444 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2446 bool link_up
= false;
2448 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2454 /* Check if this is not due to overtemp */
2455 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2460 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2465 "Network adapter has been stopped because it has over heated. "
2466 "Restart the computer. If the problem persists, "
2467 "power off the system and replace the adapter\n");
2469 adapter
->interrupt_event
= 0;
2472 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2474 struct ixgbe_hw
*hw
= &adapter
->hw
;
2476 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2477 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2478 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2479 /* write to clear the interrupt */
2480 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2484 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2486 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2489 switch (adapter
->hw
.mac
.type
) {
2490 case ixgbe_mac_82599EB
:
2492 * Need to check link state so complete overtemp check
2495 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2496 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2497 adapter
->interrupt_event
= eicr
;
2498 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2499 ixgbe_service_event_schedule(adapter
);
2503 case ixgbe_mac_X540
:
2504 if (!(eicr
& IXGBE_EICR_TS
))
2512 "Network adapter has been stopped because it has over heated. "
2513 "Restart the computer. If the problem persists, "
2514 "power off the system and replace the adapter\n");
2517 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2519 struct ixgbe_hw
*hw
= &adapter
->hw
;
2521 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2522 /* Clear the interrupt */
2523 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2524 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2525 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2526 ixgbe_service_event_schedule(adapter
);
2530 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2531 /* Clear the interrupt */
2532 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2533 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2534 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2535 ixgbe_service_event_schedule(adapter
);
2540 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2542 struct ixgbe_hw
*hw
= &adapter
->hw
;
2545 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2546 adapter
->link_check_timeout
= jiffies
;
2547 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2548 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2549 IXGBE_WRITE_FLUSH(hw
);
2550 ixgbe_service_event_schedule(adapter
);
2554 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2558 struct ixgbe_hw
*hw
= &adapter
->hw
;
2560 switch (hw
->mac
.type
) {
2561 case ixgbe_mac_82598EB
:
2562 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2563 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2565 case ixgbe_mac_82599EB
:
2566 case ixgbe_mac_X540
:
2567 mask
= (qmask
& 0xFFFFFFFF);
2569 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2570 mask
= (qmask
>> 32);
2572 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2577 /* skip the flush */
2580 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2584 struct ixgbe_hw
*hw
= &adapter
->hw
;
2586 switch (hw
->mac
.type
) {
2587 case ixgbe_mac_82598EB
:
2588 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2589 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2591 case ixgbe_mac_82599EB
:
2592 case ixgbe_mac_X540
:
2593 mask
= (qmask
& 0xFFFFFFFF);
2595 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2596 mask
= (qmask
>> 32);
2598 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2603 /* skip the flush */
2607 * ixgbe_irq_enable - Enable default interrupt generation settings
2608 * @adapter: board private structure
2610 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2613 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2615 /* don't reenable LSC while waiting for link */
2616 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2617 mask
&= ~IXGBE_EIMS_LSC
;
2619 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2620 switch (adapter
->hw
.mac
.type
) {
2621 case ixgbe_mac_82599EB
:
2622 mask
|= IXGBE_EIMS_GPI_SDP0
;
2624 case ixgbe_mac_X540
:
2625 mask
|= IXGBE_EIMS_TS
;
2630 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2631 mask
|= IXGBE_EIMS_GPI_SDP1
;
2632 switch (adapter
->hw
.mac
.type
) {
2633 case ixgbe_mac_82599EB
:
2634 mask
|= IXGBE_EIMS_GPI_SDP1
;
2635 mask
|= IXGBE_EIMS_GPI_SDP2
;
2636 case ixgbe_mac_X540
:
2637 mask
|= IXGBE_EIMS_ECC
;
2638 mask
|= IXGBE_EIMS_MAILBOX
;
2644 if (adapter
->hw
.mac
.type
== ixgbe_mac_X540
)
2645 mask
|= IXGBE_EIMS_TIMESYNC
;
2647 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2648 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2649 mask
|= IXGBE_EIMS_FLOW_DIR
;
2651 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2653 ixgbe_irq_enable_queues(adapter
, ~0);
2655 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2658 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2660 struct ixgbe_adapter
*adapter
= data
;
2661 struct ixgbe_hw
*hw
= &adapter
->hw
;
2665 * Workaround for Silicon errata. Use clear-by-write instead
2666 * of clear-by-read. Reading with EICS will return the
2667 * interrupt causes without clearing, which later be done
2668 * with the write to EICR.
2670 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2672 /* The lower 16bits of the EICR register are for the queue interrupts
2673 * which should be masked here in order to not accidently clear them if
2674 * the bits are high when ixgbe_msix_other is called. There is a race
2675 * condition otherwise which results in possible performance loss
2676 * especially if the ixgbe_msix_other interrupt is triggering
2677 * consistently (as it would when PPS is turned on for the X540 device)
2681 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2683 if (eicr
& IXGBE_EICR_LSC
)
2684 ixgbe_check_lsc(adapter
);
2686 if (eicr
& IXGBE_EICR_MAILBOX
)
2687 ixgbe_msg_task(adapter
);
2689 switch (hw
->mac
.type
) {
2690 case ixgbe_mac_82599EB
:
2691 case ixgbe_mac_X540
:
2692 if (eicr
& IXGBE_EICR_ECC
) {
2693 e_info(link
, "Received ECC Err, initiating reset\n");
2694 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2695 ixgbe_service_event_schedule(adapter
);
2696 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2698 /* Handle Flow Director Full threshold interrupt */
2699 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2700 int reinit_count
= 0;
2702 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2703 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2704 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2709 /* no more flow director interrupts until after init */
2710 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2711 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2712 ixgbe_service_event_schedule(adapter
);
2715 ixgbe_check_sfp_event(adapter
, eicr
);
2716 ixgbe_check_overtemp_event(adapter
, eicr
);
2722 ixgbe_check_fan_failure(adapter
, eicr
);
2724 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2725 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2727 /* re-enable the original interrupt state, no lsc, no queues */
2728 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2729 ixgbe_irq_enable(adapter
, false, false);
2734 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2736 struct ixgbe_q_vector
*q_vector
= data
;
2738 /* EIAM disabled interrupts (on this vector) for us */
2740 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2741 napi_schedule(&q_vector
->napi
);
2747 * ixgbe_poll - NAPI Rx polling callback
2748 * @napi: structure for representing this polling device
2749 * @budget: how many packets driver is allowed to clean
2751 * This function is used for legacy and MSI, NAPI mode
2753 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2755 struct ixgbe_q_vector
*q_vector
=
2756 container_of(napi
, struct ixgbe_q_vector
, napi
);
2757 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2758 struct ixgbe_ring
*ring
;
2759 int per_ring_budget
;
2760 bool clean_complete
= true;
2762 #ifdef CONFIG_IXGBE_DCA
2763 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2764 ixgbe_update_dca(q_vector
);
2767 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2768 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2770 if (!ixgbe_qv_lock_napi(q_vector
))
2773 /* attempt to distribute budget to each queue fairly, but don't allow
2774 * the budget to go below 1 because we'll exit polling */
2775 if (q_vector
->rx
.count
> 1)
2776 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2778 per_ring_budget
= budget
;
2780 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2781 clean_complete
&= (ixgbe_clean_rx_irq(q_vector
, ring
,
2782 per_ring_budget
) < per_ring_budget
);
2784 ixgbe_qv_unlock_napi(q_vector
);
2785 /* If all work not completed, return budget and keep polling */
2786 if (!clean_complete
)
2789 /* all work done, exit the polling mode */
2790 napi_complete(napi
);
2791 if (adapter
->rx_itr_setting
& 1)
2792 ixgbe_set_itr(q_vector
);
2793 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2794 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2800 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2801 * @adapter: board private structure
2803 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2804 * interrupts from the kernel.
2806 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2808 struct net_device
*netdev
= adapter
->netdev
;
2812 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2813 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2814 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2816 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2817 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2818 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2820 } else if (q_vector
->rx
.ring
) {
2821 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2822 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2823 } else if (q_vector
->tx
.ring
) {
2824 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2825 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2827 /* skip this unused q_vector */
2830 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2831 q_vector
->name
, q_vector
);
2833 e_err(probe
, "request_irq failed for MSIX interrupt "
2834 "Error: %d\n", err
);
2835 goto free_queue_irqs
;
2837 /* If Flow Director is enabled, set interrupt affinity */
2838 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2839 /* assign the mask for this irq */
2840 irq_set_affinity_hint(entry
->vector
,
2841 &q_vector
->affinity_mask
);
2845 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2846 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2848 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2849 goto free_queue_irqs
;
2857 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2859 free_irq(adapter
->msix_entries
[vector
].vector
,
2860 adapter
->q_vector
[vector
]);
2862 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2863 pci_disable_msix(adapter
->pdev
);
2864 kfree(adapter
->msix_entries
);
2865 adapter
->msix_entries
= NULL
;
2870 * ixgbe_intr - legacy mode Interrupt Handler
2871 * @irq: interrupt number
2872 * @data: pointer to a network interface device structure
2874 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2876 struct ixgbe_adapter
*adapter
= data
;
2877 struct ixgbe_hw
*hw
= &adapter
->hw
;
2878 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2882 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2883 * before the read of EICR.
2885 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2887 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2888 * therefore no explicit interrupt disable is necessary */
2889 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2892 * shared interrupt alert!
2893 * make sure interrupts are enabled because the read will
2894 * have disabled interrupts due to EIAM
2895 * finish the workaround of silicon errata on 82598. Unmask
2896 * the interrupt that we masked before the EICR read.
2898 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2899 ixgbe_irq_enable(adapter
, true, true);
2900 return IRQ_NONE
; /* Not our interrupt */
2903 if (eicr
& IXGBE_EICR_LSC
)
2904 ixgbe_check_lsc(adapter
);
2906 switch (hw
->mac
.type
) {
2907 case ixgbe_mac_82599EB
:
2908 ixgbe_check_sfp_event(adapter
, eicr
);
2910 case ixgbe_mac_X540
:
2911 if (eicr
& IXGBE_EICR_ECC
) {
2912 e_info(link
, "Received ECC Err, initiating reset\n");
2913 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2914 ixgbe_service_event_schedule(adapter
);
2915 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2917 ixgbe_check_overtemp_event(adapter
, eicr
);
2923 ixgbe_check_fan_failure(adapter
, eicr
);
2924 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2925 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2927 /* would disable interrupts here but EIAM disabled it */
2928 napi_schedule(&q_vector
->napi
);
2931 * re-enable link(maybe) and non-queue interrupts, no flush.
2932 * ixgbe_poll will re-enable the queue interrupts
2934 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2935 ixgbe_irq_enable(adapter
, false, false);
2941 * ixgbe_request_irq - initialize interrupts
2942 * @adapter: board private structure
2944 * Attempts to configure interrupts using the best available
2945 * capabilities of the hardware and kernel.
2947 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2949 struct net_device
*netdev
= adapter
->netdev
;
2952 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2953 err
= ixgbe_request_msix_irqs(adapter
);
2954 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2955 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2956 netdev
->name
, adapter
);
2958 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2959 netdev
->name
, adapter
);
2962 e_err(probe
, "request_irq failed, Error %d\n", err
);
2967 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2971 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2972 free_irq(adapter
->pdev
->irq
, adapter
);
2976 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2977 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2978 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2980 /* free only the irqs that were actually requested */
2981 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
2984 /* clear the affinity_mask in the IRQ descriptor */
2985 irq_set_affinity_hint(entry
->vector
, NULL
);
2987 free_irq(entry
->vector
, q_vector
);
2990 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
2994 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2995 * @adapter: board private structure
2997 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2999 switch (adapter
->hw
.mac
.type
) {
3000 case ixgbe_mac_82598EB
:
3001 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
3003 case ixgbe_mac_82599EB
:
3004 case ixgbe_mac_X540
:
3005 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
3006 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
3007 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
3012 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3013 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3016 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
3017 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
3019 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
3021 synchronize_irq(adapter
->pdev
->irq
);
3026 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3029 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
3031 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3033 ixgbe_write_eitr(q_vector
);
3035 ixgbe_set_ivar(adapter
, 0, 0, 0);
3036 ixgbe_set_ivar(adapter
, 1, 0, 0);
3038 e_info(hw
, "Legacy interrupt IVAR setup done\n");
3042 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3043 * @adapter: board private structure
3044 * @ring: structure containing ring specific data
3046 * Configure the Tx descriptor ring after a reset.
3048 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
3049 struct ixgbe_ring
*ring
)
3051 struct ixgbe_hw
*hw
= &adapter
->hw
;
3052 u64 tdba
= ring
->dma
;
3054 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
3055 u8 reg_idx
= ring
->reg_idx
;
3057 /* disable queue to avoid issues while updating state */
3058 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
3059 IXGBE_WRITE_FLUSH(hw
);
3061 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
3062 (tdba
& DMA_BIT_MASK(32)));
3063 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
3064 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3065 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3066 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3067 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3068 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3071 * set WTHRESH to encourage burst writeback, it should not be set
3072 * higher than 1 when:
3073 * - ITR is 0 as it could cause false TX hangs
3074 * - ITR is set to > 100k int/sec and BQL is enabled
3076 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3077 * to or less than the number of on chip descriptors, which is
3080 #if IS_ENABLED(CONFIG_BQL)
3081 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3083 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
3085 txdctl
|= (1 << 16); /* WTHRESH = 1 */
3087 txdctl
|= (8 << 16); /* WTHRESH = 8 */
3090 * Setting PTHRESH to 32 both improves performance
3091 * and avoids a TX hang with DFP enabled
3093 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
3094 32; /* PTHRESH = 32 */
3096 /* reinitialize flowdirector state */
3097 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3098 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3099 ring
->atr_count
= 0;
3100 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3102 ring
->atr_sample_rate
= 0;
3105 /* initialize XPS */
3106 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3107 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3110 netif_set_xps_queue(ring
->netdev
,
3111 &q_vector
->affinity_mask
,
3115 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3118 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3120 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3121 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3122 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3125 /* poll to verify queue is enabled */
3127 usleep_range(1000, 2000);
3128 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3129 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3131 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3134 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3136 struct ixgbe_hw
*hw
= &adapter
->hw
;
3138 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3140 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3143 /* disable the arbiter while setting MTQC */
3144 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3145 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3146 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3148 /* set transmit pool layout */
3149 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3150 mtqc
= IXGBE_MTQC_VT_ENA
;
3152 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3154 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3155 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3156 mtqc
|= IXGBE_MTQC_32VF
;
3158 mtqc
|= IXGBE_MTQC_64VF
;
3161 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3163 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3165 mtqc
= IXGBE_MTQC_64Q_1PB
;
3168 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3170 /* Enable Security TX Buffer IFG for multiple pb */
3172 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3173 sectx
|= IXGBE_SECTX_DCB
;
3174 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3177 /* re-enable the arbiter */
3178 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3179 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3183 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3184 * @adapter: board private structure
3186 * Configure the Tx unit of the MAC after a reset.
3188 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3190 struct ixgbe_hw
*hw
= &adapter
->hw
;
3194 ixgbe_setup_mtqc(adapter
);
3196 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3197 /* DMATXCTL.EN must be before Tx queues are enabled */
3198 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3199 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3200 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3203 /* Setup the HW Tx Head and Tail descriptor pointers */
3204 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3205 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3208 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3209 struct ixgbe_ring
*ring
)
3211 struct ixgbe_hw
*hw
= &adapter
->hw
;
3212 u8 reg_idx
= ring
->reg_idx
;
3213 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3215 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3217 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3220 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3221 struct ixgbe_ring
*ring
)
3223 struct ixgbe_hw
*hw
= &adapter
->hw
;
3224 u8 reg_idx
= ring
->reg_idx
;
3225 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3227 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3229 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3232 #ifdef CONFIG_IXGBE_DCB
3233 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3235 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3239 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3241 if (adapter
->ixgbe_ieee_pfc
)
3242 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3245 * We should set the drop enable bit if:
3248 * Number of Rx queues > 1 and flow control is disabled
3250 * This allows us to avoid head of line blocking for security
3251 * and performance reasons.
3253 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3254 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3255 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3256 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3258 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3259 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3263 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3265 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3266 struct ixgbe_ring
*rx_ring
)
3268 struct ixgbe_hw
*hw
= &adapter
->hw
;
3270 u8 reg_idx
= rx_ring
->reg_idx
;
3272 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3273 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3276 * if VMDq is not active we must program one srrctl register
3277 * per RSS queue since we have enabled RDRXCTL.MVMEN
3282 /* configure header buffer length, needed for RSC */
3283 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3285 /* configure the packet buffer length */
3286 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3288 /* configure descriptor type */
3289 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3291 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3294 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3296 struct ixgbe_hw
*hw
= &adapter
->hw
;
3297 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3298 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3299 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3300 u32 mrqc
= 0, reta
= 0;
3303 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3306 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3307 * make full use of any rings they may have. We will use the
3308 * PSRTYPE register to control how many rings we use within the PF.
3310 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3313 /* Fill out hash function seeds */
3314 for (i
= 0; i
< 10; i
++)
3315 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
3317 /* Fill out redirection table */
3318 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
3321 /* reta = 4-byte sliding window of
3322 * 0x00..(indices-1)(indices-1)00..etc. */
3323 reta
= (reta
<< 8) | (j
* 0x11);
3325 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3328 /* Disable indicating checksum in descriptor, enables RSS hash */
3329 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3330 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3331 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3333 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3334 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3335 mrqc
= IXGBE_MRQC_RSSEN
;
3337 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3339 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3341 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3343 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3344 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3345 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3347 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3350 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3352 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3354 mrqc
= IXGBE_MRQC_RSSEN
;
3358 /* Perform hash on these packet types */
3359 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3360 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3361 IXGBE_MRQC_RSS_FIELD_IPV6
|
3362 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3364 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3365 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3366 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3367 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3369 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3373 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3374 * @adapter: address of board private structure
3375 * @index: index of ring to set
3377 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3378 struct ixgbe_ring
*ring
)
3380 struct ixgbe_hw
*hw
= &adapter
->hw
;
3382 u8 reg_idx
= ring
->reg_idx
;
3384 if (!ring_is_rsc_enabled(ring
))
3387 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3388 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3390 * we must limit the number of descriptors so that the
3391 * total size of max desc * buf_len is not greater
3394 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3395 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3398 #define IXGBE_MAX_RX_DESC_POLL 10
3399 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3400 struct ixgbe_ring
*ring
)
3402 struct ixgbe_hw
*hw
= &adapter
->hw
;
3403 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3405 u8 reg_idx
= ring
->reg_idx
;
3407 if (ixgbe_removed(hw
->hw_addr
))
3409 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3410 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3411 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3415 usleep_range(1000, 2000);
3416 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3417 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3420 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3421 "the polling period\n", reg_idx
);
3425 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3426 struct ixgbe_ring
*ring
)
3428 struct ixgbe_hw
*hw
= &adapter
->hw
;
3429 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3431 u8 reg_idx
= ring
->reg_idx
;
3433 if (ixgbe_removed(hw
->hw_addr
))
3435 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3436 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3438 /* write value back with RXDCTL.ENABLE bit cleared */
3439 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3441 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3442 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3445 /* the hardware may take up to 100us to really disable the rx queue */
3448 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3449 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3452 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3453 "the polling period\n", reg_idx
);
3457 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3458 struct ixgbe_ring
*ring
)
3460 struct ixgbe_hw
*hw
= &adapter
->hw
;
3461 u64 rdba
= ring
->dma
;
3463 u8 reg_idx
= ring
->reg_idx
;
3465 /* disable queue to avoid issues while updating state */
3466 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3467 ixgbe_disable_rx_queue(adapter
, ring
);
3469 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3470 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3471 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3472 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3473 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3474 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3475 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3477 ixgbe_configure_srrctl(adapter
, ring
);
3478 ixgbe_configure_rscctl(adapter
, ring
);
3480 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3482 * enable cache line friendly hardware writes:
3483 * PTHRESH=32 descriptors (half the internal cache),
3484 * this also removes ugly rx_no_buffer_count increment
3485 * HTHRESH=4 descriptors (to minimize latency on fetch)
3486 * WTHRESH=8 burst writeback up to two cache lines
3488 rxdctl
&= ~0x3FFFFF;
3492 /* enable receive descriptor ring */
3493 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3494 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3496 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3497 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3500 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3502 struct ixgbe_hw
*hw
= &adapter
->hw
;
3503 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3506 /* PSRTYPE must be initialized in non 82598 adapters */
3507 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3508 IXGBE_PSRTYPE_UDPHDR
|
3509 IXGBE_PSRTYPE_IPV4HDR
|
3510 IXGBE_PSRTYPE_L2HDR
|
3511 IXGBE_PSRTYPE_IPV6HDR
;
3513 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3521 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3522 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3525 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3527 struct ixgbe_hw
*hw
= &adapter
->hw
;
3528 u32 reg_offset
, vf_shift
;
3529 u32 gcr_ext
, vmdctl
;
3532 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3535 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3536 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3537 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3538 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3539 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3540 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3542 vf_shift
= VMDQ_P(0) % 32;
3543 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3545 /* Enable only the PF's pool for Tx/Rx */
3546 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3547 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3548 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3549 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3550 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
3551 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3553 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3554 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3557 * Set up VF register offsets for selected VT Mode,
3558 * i.e. 32 or 64 VFs for SR-IOV
3560 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3561 case IXGBE_82599_VMDQ_8Q_MASK
:
3562 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3564 case IXGBE_82599_VMDQ_4Q_MASK
:
3565 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3568 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3572 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3575 /* Enable MAC Anti-Spoofing */
3576 hw
->mac
.ops
.set_mac_anti_spoofing(hw
, (adapter
->num_vfs
!= 0),
3578 /* For VFs that have spoof checking turned off */
3579 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3580 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3581 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3585 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3587 struct ixgbe_hw
*hw
= &adapter
->hw
;
3588 struct net_device
*netdev
= adapter
->netdev
;
3589 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3590 struct ixgbe_ring
*rx_ring
;
3595 /* adjust max frame to be able to do baby jumbo for FCoE */
3596 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3597 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3598 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3600 #endif /* IXGBE_FCOE */
3602 /* adjust max frame to be at least the size of a standard frame */
3603 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3604 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3606 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3607 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3608 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3609 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3611 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3614 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3615 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3616 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3617 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3620 * Setup the HW Rx Head and Tail Descriptor Pointers and
3621 * the Base and Length of the Rx Descriptor Ring
3623 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3624 rx_ring
= adapter
->rx_ring
[i
];
3625 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3626 set_ring_rsc_enabled(rx_ring
);
3628 clear_ring_rsc_enabled(rx_ring
);
3632 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3634 struct ixgbe_hw
*hw
= &adapter
->hw
;
3635 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3637 switch (hw
->mac
.type
) {
3638 case ixgbe_mac_82598EB
:
3640 * For VMDq support of different descriptor types or
3641 * buffer sizes through the use of multiple SRRCTL
3642 * registers, RDRXCTL.MVMEN must be set to 1
3644 * also, the manual doesn't mention it clearly but DCA hints
3645 * will only use queue 0's tags unless this bit is set. Side
3646 * effects of setting this bit are only that SRRCTL must be
3647 * fully programmed [0..15]
3649 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3651 case ixgbe_mac_82599EB
:
3652 case ixgbe_mac_X540
:
3653 /* Disable RSC for ACK packets */
3654 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3655 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3656 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3657 /* hardware requires some bits to be set by default */
3658 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3659 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3662 /* We should do nothing since we don't know this hardware */
3666 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3670 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3671 * @adapter: board private structure
3673 * Configure the Rx unit of the MAC after a reset.
3675 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3677 struct ixgbe_hw
*hw
= &adapter
->hw
;
3681 /* disable receives while setting up the descriptors */
3682 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3683 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3685 ixgbe_setup_psrtype(adapter
);
3686 ixgbe_setup_rdrxctl(adapter
);
3689 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3690 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3691 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3692 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3693 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3695 /* Program registers for the distribution of queues */
3696 ixgbe_setup_mrqc(adapter
);
3698 /* set_rx_buffer_len must be called before ring initialization */
3699 ixgbe_set_rx_buffer_len(adapter
);
3702 * Setup the HW Rx Head and Tail Descriptor Pointers and
3703 * the Base and Length of the Rx Descriptor Ring
3705 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3706 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3708 /* disable drop enable for 82598 parts */
3709 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3710 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3712 /* enable all receives */
3713 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3714 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3717 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3718 __be16 proto
, u16 vid
)
3720 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3721 struct ixgbe_hw
*hw
= &adapter
->hw
;
3723 /* add VID to filter table */
3724 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true);
3725 set_bit(vid
, adapter
->active_vlans
);
3730 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
3731 __be16 proto
, u16 vid
)
3733 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3734 struct ixgbe_hw
*hw
= &adapter
->hw
;
3736 /* remove VID from filter table */
3737 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), false);
3738 clear_bit(vid
, adapter
->active_vlans
);
3744 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3745 * @adapter: driver data
3747 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3749 struct ixgbe_hw
*hw
= &adapter
->hw
;
3752 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3753 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3754 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3758 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3759 * @adapter: driver data
3761 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3763 struct ixgbe_hw
*hw
= &adapter
->hw
;
3766 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3767 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3768 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3769 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3773 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3774 * @adapter: driver data
3776 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3778 struct ixgbe_hw
*hw
= &adapter
->hw
;
3782 switch (hw
->mac
.type
) {
3783 case ixgbe_mac_82598EB
:
3784 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3785 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3786 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3788 case ixgbe_mac_82599EB
:
3789 case ixgbe_mac_X540
:
3790 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3791 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3793 if (ring
->l2_accel_priv
)
3796 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3797 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3798 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3807 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3808 * @adapter: driver data
3810 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3812 struct ixgbe_hw
*hw
= &adapter
->hw
;
3816 switch (hw
->mac
.type
) {
3817 case ixgbe_mac_82598EB
:
3818 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3819 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3820 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3822 case ixgbe_mac_82599EB
:
3823 case ixgbe_mac_X540
:
3824 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3825 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
3827 if (ring
->l2_accel_priv
)
3830 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3831 vlnctrl
|= IXGBE_RXDCTL_VME
;
3832 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3840 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3844 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
3846 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3847 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
3851 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3852 * @netdev: network interface device structure
3854 * Writes unicast address list to the RAR table.
3855 * Returns: -ENOMEM on failure/insufficient address space
3856 * 0 on no addresses written
3857 * X on writing X addresses to the RAR table
3859 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3861 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3862 struct ixgbe_hw
*hw
= &adapter
->hw
;
3863 unsigned int rar_entries
= hw
->mac
.num_rar_entries
- 1;
3866 /* In SR-IOV/VMDQ modes significantly less RAR entries are available */
3867 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3868 rar_entries
= IXGBE_MAX_PF_MACVLANS
- 1;
3870 /* return ENOMEM indicating insufficient memory for addresses */
3871 if (netdev_uc_count(netdev
) > rar_entries
)
3874 if (!netdev_uc_empty(netdev
)) {
3875 struct netdev_hw_addr
*ha
;
3876 /* return error if we do not support writing to RAR table */
3877 if (!hw
->mac
.ops
.set_rar
)
3880 netdev_for_each_uc_addr(ha
, netdev
) {
3883 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3884 VMDQ_P(0), IXGBE_RAH_AV
);
3888 /* write the addresses in reverse order to avoid write combining */
3889 for (; rar_entries
> 0 ; rar_entries
--)
3890 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3896 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3897 * @netdev: network interface device structure
3899 * The set_rx_method entry point is called whenever the unicast/multicast
3900 * address list or the network interface flags are updated. This routine is
3901 * responsible for configuring the hardware for proper unicast, multicast and
3904 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3906 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3907 struct ixgbe_hw
*hw
= &adapter
->hw
;
3908 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3911 /* Check for Promiscuous and All Multicast modes */
3913 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3915 /* set all bits that we expect to always be set */
3916 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3917 fctrl
|= IXGBE_FCTRL_BAM
;
3918 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3919 fctrl
|= IXGBE_FCTRL_PMCF
;
3921 /* clear the bits we are changing the status of */
3922 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3924 if (netdev
->flags
& IFF_PROMISC
) {
3925 hw
->addr_ctrl
.user_set_promisc
= true;
3926 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3927 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3928 /* Only disable hardware filter vlans in promiscuous mode
3929 * if SR-IOV and VMDQ are disabled - otherwise ensure
3930 * that hardware VLAN filters remain enabled.
3932 if (!(adapter
->flags
& (IXGBE_FLAG_VMDQ_ENABLED
|
3933 IXGBE_FLAG_SRIOV_ENABLED
)))
3934 ixgbe_vlan_filter_disable(adapter
);
3936 ixgbe_vlan_filter_enable(adapter
);
3938 if (netdev
->flags
& IFF_ALLMULTI
) {
3939 fctrl
|= IXGBE_FCTRL_MPE
;
3940 vmolr
|= IXGBE_VMOLR_MPE
;
3942 ixgbe_vlan_filter_enable(adapter
);
3943 hw
->addr_ctrl
.user_set_promisc
= false;
3947 * Write addresses to available RAR registers, if there is not
3948 * sufficient space to store all the addresses then enable
3949 * unicast promiscuous mode
3951 count
= ixgbe_write_uc_addr_list(netdev
);
3953 fctrl
|= IXGBE_FCTRL_UPE
;
3954 vmolr
|= IXGBE_VMOLR_ROPE
;
3957 /* Write addresses to the MTA, if the attempt fails
3958 * then we should just turn on promiscuous mode so
3959 * that we can at least receive multicast traffic
3961 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3962 vmolr
|= IXGBE_VMOLR_ROMPE
;
3964 if (adapter
->num_vfs
)
3965 ixgbe_restore_vf_multicasts(adapter
);
3967 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3968 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
3969 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3971 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
3974 /* This is useful for sniffing bad packets. */
3975 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3976 /* UPE and MPE will be handled by normal PROMISC logic
3977 * in e1000e_set_rx_mode */
3978 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3979 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3980 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3982 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3983 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3986 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3988 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
3989 ixgbe_vlan_strip_enable(adapter
);
3991 ixgbe_vlan_strip_disable(adapter
);
3994 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3998 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
3999 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
4000 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4004 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4008 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4009 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4010 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
4011 pr_info("QV %d locked\n", q_idx
);
4012 usleep_range(1000, 20000);
4017 #ifdef CONFIG_IXGBE_DCB
4019 * ixgbe_configure_dcb - Configure DCB hardware
4020 * @adapter: ixgbe adapter struct
4022 * This is called by the driver on open to configure the DCB hardware.
4023 * This is also called by the gennetlink interface when reconfiguring
4026 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
4028 struct ixgbe_hw
*hw
= &adapter
->hw
;
4029 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4031 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
4032 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4033 netif_set_gso_max_size(adapter
->netdev
, 65536);
4037 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4038 netif_set_gso_max_size(adapter
->netdev
, 32768);
4041 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
4042 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
4045 /* reconfigure the hardware */
4046 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
4047 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4049 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4051 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
4052 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
4053 ixgbe_dcb_hw_ets(&adapter
->hw
,
4054 adapter
->ixgbe_ieee_ets
,
4056 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
4057 adapter
->ixgbe_ieee_pfc
->pfc_en
,
4058 adapter
->ixgbe_ieee_ets
->prio_tc
);
4061 /* Enable RSS Hash per TC */
4062 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4064 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4071 /* write msb to all 8 TCs in one write */
4072 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4077 /* Additional bittime to account for IXGBE framing */
4078 #define IXGBE_ETH_FRAMING 20
4081 * ixgbe_hpbthresh - calculate high water mark for flow control
4083 * @adapter: board private structure to calculate for
4084 * @pb: packet buffer to calculate
4086 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4088 struct ixgbe_hw
*hw
= &adapter
->hw
;
4089 struct net_device
*dev
= adapter
->netdev
;
4090 int link
, tc
, kb
, marker
;
4093 /* Calculate max LAN frame size */
4094 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4097 /* FCoE traffic class uses FCOE jumbo frames */
4098 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4099 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4100 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4101 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4104 /* Calculate delay value for device */
4105 switch (hw
->mac
.type
) {
4106 case ixgbe_mac_X540
:
4107 dv_id
= IXGBE_DV_X540(link
, tc
);
4110 dv_id
= IXGBE_DV(link
, tc
);
4114 /* Loopback switch introduces additional latency */
4115 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4116 dv_id
+= IXGBE_B2BT(tc
);
4118 /* Delay value is calculated in bit times convert to KB */
4119 kb
= IXGBE_BT2KB(dv_id
);
4120 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4122 marker
= rx_pba
- kb
;
4124 /* It is possible that the packet buffer is not large enough
4125 * to provide required headroom. In this case throw an error
4126 * to user and a do the best we can.
4129 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4130 "headroom to support flow control."
4131 "Decrease MTU or number of traffic classes\n", pb
);
4139 * ixgbe_lpbthresh - calculate low water mark for for flow control
4141 * @adapter: board private structure to calculate for
4142 * @pb: packet buffer to calculate
4144 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
4146 struct ixgbe_hw
*hw
= &adapter
->hw
;
4147 struct net_device
*dev
= adapter
->netdev
;
4151 /* Calculate max LAN frame size */
4152 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4154 /* Calculate delay value for device */
4155 switch (hw
->mac
.type
) {
4156 case ixgbe_mac_X540
:
4157 dv_id
= IXGBE_LOW_DV_X540(tc
);
4160 dv_id
= IXGBE_LOW_DV(tc
);
4164 /* Delay value is calculated in bit times convert to KB */
4165 return IXGBE_BT2KB(dv_id
);
4169 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4171 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4173 struct ixgbe_hw
*hw
= &adapter
->hw
;
4174 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4180 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
4182 for (i
= 0; i
< num_tc
; i
++) {
4183 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4185 /* Low water marks must not be larger than high water marks */
4186 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
4187 hw
->fc
.low_water
= 0;
4191 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4193 struct ixgbe_hw
*hw
= &adapter
->hw
;
4195 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4197 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4198 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4199 hdrm
= 32 << adapter
->fdir_pballoc
;
4203 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4204 ixgbe_pbthresh_setup(adapter
);
4207 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4209 struct ixgbe_hw
*hw
= &adapter
->hw
;
4210 struct hlist_node
*node2
;
4211 struct ixgbe_fdir_filter
*filter
;
4213 spin_lock(&adapter
->fdir_perfect_lock
);
4215 if (!hlist_empty(&adapter
->fdir_filter_list
))
4216 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4218 hlist_for_each_entry_safe(filter
, node2
,
4219 &adapter
->fdir_filter_list
, fdir_node
) {
4220 ixgbe_fdir_write_perfect_filter_82599(hw
,
4223 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4224 IXGBE_FDIR_DROP_QUEUE
:
4225 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4228 spin_unlock(&adapter
->fdir_perfect_lock
);
4231 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4232 struct ixgbe_adapter
*adapter
)
4234 struct ixgbe_hw
*hw
= &adapter
->hw
;
4237 /* No unicast promiscuous support for VMDQ devices. */
4238 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4239 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4241 /* clear the affected bit */
4242 vmolr
&= ~IXGBE_VMOLR_MPE
;
4244 if (dev
->flags
& IFF_ALLMULTI
) {
4245 vmolr
|= IXGBE_VMOLR_MPE
;
4247 vmolr
|= IXGBE_VMOLR_ROMPE
;
4248 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4250 ixgbe_write_uc_addr_list(adapter
->netdev
);
4251 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4254 static void ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4257 struct ixgbe_hw
*hw
= &adapter
->hw
;
4260 entry
= hw
->mac
.num_rar_entries
- pool
;
4261 hw
->mac
.ops
.set_rar(hw
, entry
, addr
, VMDQ_P(pool
), IXGBE_RAH_AV
);
4264 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4266 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4267 int rss_i
= adapter
->num_rx_queues_per_pool
;
4268 struct ixgbe_hw
*hw
= &adapter
->hw
;
4269 u16 pool
= vadapter
->pool
;
4270 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4271 IXGBE_PSRTYPE_UDPHDR
|
4272 IXGBE_PSRTYPE_IPV4HDR
|
4273 IXGBE_PSRTYPE_L2HDR
|
4274 IXGBE_PSRTYPE_IPV6HDR
;
4276 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4284 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4288 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4289 * @rx_ring: ring to free buffers from
4291 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4293 struct device
*dev
= rx_ring
->dev
;
4297 /* ring already cleared, nothing to do */
4298 if (!rx_ring
->rx_buffer_info
)
4301 /* Free all the Rx ring sk_buffs */
4302 for (i
= 0; i
< rx_ring
->count
; i
++) {
4303 struct ixgbe_rx_buffer
*rx_buffer
;
4305 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4306 if (rx_buffer
->skb
) {
4307 struct sk_buff
*skb
= rx_buffer
->skb
;
4308 if (IXGBE_CB(skb
)->page_released
) {
4311 ixgbe_rx_bufsz(rx_ring
),
4313 IXGBE_CB(skb
)->page_released
= false;
4317 rx_buffer
->skb
= NULL
;
4319 dma_unmap_page(dev
, rx_buffer
->dma
,
4320 ixgbe_rx_pg_size(rx_ring
),
4323 if (rx_buffer
->page
)
4324 __free_pages(rx_buffer
->page
,
4325 ixgbe_rx_pg_order(rx_ring
));
4326 rx_buffer
->page
= NULL
;
4329 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4330 memset(rx_ring
->rx_buffer_info
, 0, size
);
4332 /* Zero out the descriptor ring */
4333 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4335 rx_ring
->next_to_alloc
= 0;
4336 rx_ring
->next_to_clean
= 0;
4337 rx_ring
->next_to_use
= 0;
4340 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4341 struct ixgbe_ring
*rx_ring
)
4343 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4344 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4346 /* shutdown specific queue receive and wait for dma to settle */
4347 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4348 usleep_range(10000, 20000);
4349 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << index
));
4350 ixgbe_clean_rx_ring(rx_ring
);
4351 rx_ring
->l2_accel_priv
= NULL
;
4354 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4355 struct ixgbe_fwd_adapter
*accel
)
4357 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4358 unsigned int rxbase
= accel
->rx_base_queue
;
4359 unsigned int txbase
= accel
->tx_base_queue
;
4362 netif_tx_stop_all_queues(vdev
);
4364 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4365 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4366 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4369 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4370 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4371 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4378 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4379 struct ixgbe_fwd_adapter
*accel
)
4381 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4382 unsigned int rxbase
, txbase
, queues
;
4383 int i
, baseq
, err
= 0;
4385 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4388 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4389 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4390 accel
->pool
, adapter
->num_rx_pools
,
4391 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4392 adapter
->fwd_bitmask
);
4394 accel
->netdev
= vdev
;
4395 accel
->rx_base_queue
= rxbase
= baseq
;
4396 accel
->tx_base_queue
= txbase
= baseq
;
4398 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4399 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4401 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4402 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4403 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4404 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4407 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4408 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4409 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4412 queues
= min_t(unsigned int,
4413 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4414 err
= netif_set_real_num_tx_queues(vdev
, queues
);
4418 err
= netif_set_real_num_rx_queues(vdev
, queues
);
4422 if (is_valid_ether_addr(vdev
->dev_addr
))
4423 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
4425 ixgbe_fwd_psrtype(accel
);
4426 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
4429 ixgbe_fwd_ring_down(vdev
, accel
);
4433 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
4435 struct net_device
*upper
;
4436 struct list_head
*iter
;
4439 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4440 if (netif_is_macvlan(upper
)) {
4441 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
4442 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
4444 if (dfwd
->fwd_priv
) {
4445 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
4453 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
4455 struct ixgbe_hw
*hw
= &adapter
->hw
;
4457 ixgbe_configure_pb(adapter
);
4458 #ifdef CONFIG_IXGBE_DCB
4459 ixgbe_configure_dcb(adapter
);
4462 * We must restore virtualization before VLANs or else
4463 * the VLVF registers will not be populated
4465 ixgbe_configure_virtualization(adapter
);
4467 ixgbe_set_rx_mode(adapter
->netdev
);
4468 ixgbe_restore_vlan(adapter
);
4470 switch (hw
->mac
.type
) {
4471 case ixgbe_mac_82599EB
:
4472 case ixgbe_mac_X540
:
4473 hw
->mac
.ops
.disable_rx_buff(hw
);
4479 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
4480 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
4481 adapter
->fdir_pballoc
);
4482 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
4483 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
4484 adapter
->fdir_pballoc
);
4485 ixgbe_fdir_filter_restore(adapter
);
4488 switch (hw
->mac
.type
) {
4489 case ixgbe_mac_82599EB
:
4490 case ixgbe_mac_X540
:
4491 hw
->mac
.ops
.enable_rx_buff(hw
);
4498 /* configure FCoE L2 filters, redirection table, and Rx control */
4499 ixgbe_configure_fcoe(adapter
);
4501 #endif /* IXGBE_FCOE */
4502 ixgbe_configure_tx(adapter
);
4503 ixgbe_configure_rx(adapter
);
4504 ixgbe_configure_dfwd(adapter
);
4507 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
4509 switch (hw
->phy
.type
) {
4510 case ixgbe_phy_sfp_avago
:
4511 case ixgbe_phy_sfp_ftl
:
4512 case ixgbe_phy_sfp_intel
:
4513 case ixgbe_phy_sfp_unknown
:
4514 case ixgbe_phy_sfp_passive_tyco
:
4515 case ixgbe_phy_sfp_passive_unknown
:
4516 case ixgbe_phy_sfp_active_unknown
:
4517 case ixgbe_phy_sfp_ftl_active
:
4518 case ixgbe_phy_qsfp_passive_unknown
:
4519 case ixgbe_phy_qsfp_active_unknown
:
4520 case ixgbe_phy_qsfp_intel
:
4521 case ixgbe_phy_qsfp_unknown
:
4524 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4532 * ixgbe_sfp_link_config - set up SFP+ link
4533 * @adapter: pointer to private adapter struct
4535 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
4538 * We are assuming the worst case scenario here, and that
4539 * is that an SFP was inserted/removed after the reset
4540 * but before SFP detection was enabled. As such the best
4541 * solution is to just start searching as soon as we start
4543 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
4544 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
4546 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
4550 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4551 * @hw: pointer to private hardware struct
4553 * Returns 0 on success, negative on failure
4555 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
4558 bool autoneg
, link_up
= false;
4559 u32 ret
= IXGBE_ERR_LINK_SETUP
;
4561 if (hw
->mac
.ops
.check_link
)
4562 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
4567 speed
= hw
->phy
.autoneg_advertised
;
4568 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
4569 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
4574 if (hw
->mac
.ops
.setup_link
)
4575 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
4580 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
4582 struct ixgbe_hw
*hw
= &adapter
->hw
;
4585 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
4586 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
4588 gpie
|= IXGBE_GPIE_EIAME
;
4590 * use EIAM to auto-mask when MSI-X interrupt is asserted
4591 * this saves a register write for every interrupt
4593 switch (hw
->mac
.type
) {
4594 case ixgbe_mac_82598EB
:
4595 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4597 case ixgbe_mac_82599EB
:
4598 case ixgbe_mac_X540
:
4600 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4601 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4605 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4606 * specifically only auto mask tx and rx interrupts */
4607 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
4610 /* XXX: to interrupt immediately for EICS writes, enable this */
4611 /* gpie |= IXGBE_GPIE_EIMEN; */
4613 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
4614 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
4616 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
4617 case IXGBE_82599_VMDQ_8Q_MASK
:
4618 gpie
|= IXGBE_GPIE_VTMODE_16
;
4620 case IXGBE_82599_VMDQ_4Q_MASK
:
4621 gpie
|= IXGBE_GPIE_VTMODE_32
;
4624 gpie
|= IXGBE_GPIE_VTMODE_64
;
4629 /* Enable Thermal over heat sensor interrupt */
4630 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
4631 switch (adapter
->hw
.mac
.type
) {
4632 case ixgbe_mac_82599EB
:
4633 gpie
|= IXGBE_SDP0_GPIEN
;
4635 case ixgbe_mac_X540
:
4636 gpie
|= IXGBE_EIMS_TS
;
4643 /* Enable fan failure interrupt */
4644 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
4645 gpie
|= IXGBE_SDP1_GPIEN
;
4647 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
4648 gpie
|= IXGBE_SDP1_GPIEN
;
4649 gpie
|= IXGBE_SDP2_GPIEN
;
4652 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
4655 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
4657 struct ixgbe_hw
*hw
= &adapter
->hw
;
4661 ixgbe_get_hw_control(adapter
);
4662 ixgbe_setup_gpie(adapter
);
4664 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
4665 ixgbe_configure_msix(adapter
);
4667 ixgbe_configure_msi_and_legacy(adapter
);
4669 /* enable the optics for 82599 SFP+ fiber */
4670 if (hw
->mac
.ops
.enable_tx_laser
)
4671 hw
->mac
.ops
.enable_tx_laser(hw
);
4673 smp_mb__before_clear_bit();
4674 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
4675 ixgbe_napi_enable_all(adapter
);
4677 if (ixgbe_is_sfp(hw
)) {
4678 ixgbe_sfp_link_config(adapter
);
4680 err
= ixgbe_non_sfp_link_config(hw
);
4682 e_err(probe
, "link_config FAILED %d\n", err
);
4685 /* clear any pending interrupts, may auto mask */
4686 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4687 ixgbe_irq_enable(adapter
, true, true);
4690 * If this adapter has a fan, check to see if we had a failure
4691 * before we enabled the interrupt.
4693 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4694 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4695 if (esdp
& IXGBE_ESDP_SDP1
)
4696 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4699 /* bring the link up in the watchdog, this could race with our first
4700 * link up interrupt but shouldn't be a problem */
4701 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4702 adapter
->link_check_timeout
= jiffies
;
4703 mod_timer(&adapter
->service_timer
, jiffies
);
4705 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4706 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4707 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4708 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4711 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4713 WARN_ON(in_interrupt());
4714 /* put off any impending NetWatchDogTimeout */
4715 adapter
->netdev
->trans_start
= jiffies
;
4717 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4718 usleep_range(1000, 2000);
4719 ixgbe_down(adapter
);
4721 * If SR-IOV enabled then wait a bit before bringing the adapter
4722 * back up to give the VFs time to respond to the reset. The
4723 * two second wait is based upon the watchdog timer cycle in
4726 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4729 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4732 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4734 /* hardware has been reset, we need to reload some things */
4735 ixgbe_configure(adapter
);
4737 ixgbe_up_complete(adapter
);
4740 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4742 struct ixgbe_hw
*hw
= &adapter
->hw
;
4745 if (ixgbe_removed(hw
->hw_addr
))
4747 /* lock SFP init bit to prevent race conditions with the watchdog */
4748 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4749 usleep_range(1000, 2000);
4751 /* clear all SFP and link config related flags while holding SFP_INIT */
4752 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4753 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4754 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4756 err
= hw
->mac
.ops
.init_hw(hw
);
4759 case IXGBE_ERR_SFP_NOT_PRESENT
:
4760 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4762 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4763 e_dev_err("master disable timed out\n");
4765 case IXGBE_ERR_EEPROM_VERSION
:
4766 /* We are running on a pre-production device, log a warning */
4767 e_dev_warn("This device is a pre-production adapter/LOM. "
4768 "Please be aware there may be issues associated with "
4769 "your hardware. If you are experiencing problems "
4770 "please contact your Intel or hardware "
4771 "representative who provided you with this "
4775 e_dev_err("Hardware Error: %d\n", err
);
4778 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4780 /* reprogram the RAR[0] in case user changed it. */
4781 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
4783 /* update SAN MAC vmdq pool selection */
4784 if (hw
->mac
.san_mac_rar_index
)
4785 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
4787 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
4788 ixgbe_ptp_reset(adapter
);
4792 * ixgbe_clean_tx_ring - Free Tx Buffers
4793 * @tx_ring: ring to be cleaned
4795 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4797 struct ixgbe_tx_buffer
*tx_buffer_info
;
4801 /* ring already cleared, nothing to do */
4802 if (!tx_ring
->tx_buffer_info
)
4805 /* Free all the Tx ring sk_buffs */
4806 for (i
= 0; i
< tx_ring
->count
; i
++) {
4807 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4808 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4811 netdev_tx_reset_queue(txring_txq(tx_ring
));
4813 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4814 memset(tx_ring
->tx_buffer_info
, 0, size
);
4816 /* Zero out the descriptor ring */
4817 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4819 tx_ring
->next_to_use
= 0;
4820 tx_ring
->next_to_clean
= 0;
4824 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4825 * @adapter: board private structure
4827 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4831 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4832 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4836 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4837 * @adapter: board private structure
4839 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4843 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4844 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4847 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4849 struct hlist_node
*node2
;
4850 struct ixgbe_fdir_filter
*filter
;
4852 spin_lock(&adapter
->fdir_perfect_lock
);
4854 hlist_for_each_entry_safe(filter
, node2
,
4855 &adapter
->fdir_filter_list
, fdir_node
) {
4856 hlist_del(&filter
->fdir_node
);
4859 adapter
->fdir_filter_count
= 0;
4861 spin_unlock(&adapter
->fdir_perfect_lock
);
4864 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4866 struct net_device
*netdev
= adapter
->netdev
;
4867 struct ixgbe_hw
*hw
= &adapter
->hw
;
4868 struct net_device
*upper
;
4869 struct list_head
*iter
;
4873 /* signal that we are down to the interrupt handler */
4874 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
4875 return; /* do nothing if already down */
4877 /* disable receives */
4878 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4879 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4881 /* disable all enabled rx queues */
4882 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4883 /* this call also flushes the previous write */
4884 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4886 usleep_range(10000, 20000);
4888 netif_tx_stop_all_queues(netdev
);
4890 /* call carrier off first to avoid false dev_watchdog timeouts */
4891 netif_carrier_off(netdev
);
4892 netif_tx_disable(netdev
);
4894 /* disable any upper devices */
4895 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
4896 if (netif_is_macvlan(upper
)) {
4897 struct macvlan_dev
*vlan
= netdev_priv(upper
);
4899 if (vlan
->fwd_priv
) {
4900 netif_tx_stop_all_queues(upper
);
4901 netif_carrier_off(upper
);
4902 netif_tx_disable(upper
);
4907 ixgbe_irq_disable(adapter
);
4909 ixgbe_napi_disable_all(adapter
);
4911 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4912 IXGBE_FLAG2_RESET_REQUESTED
);
4913 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4915 del_timer_sync(&adapter
->service_timer
);
4917 if (adapter
->num_vfs
) {
4918 /* Clear EITR Select mapping */
4919 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4921 /* Mark all the VFs as inactive */
4922 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4923 adapter
->vfinfo
[i
].clear_to_send
= false;
4925 /* ping all the active vfs to let them know we are going down */
4926 ixgbe_ping_all_vfs(adapter
);
4928 /* Disable all VFTE/VFRE TX/RX */
4929 ixgbe_disable_tx_rx(adapter
);
4932 /* disable transmits in the hardware now that interrupts are off */
4933 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4934 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4935 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4938 /* Disable the Tx DMA engine on 82599 and X540 */
4939 switch (hw
->mac
.type
) {
4940 case ixgbe_mac_82599EB
:
4941 case ixgbe_mac_X540
:
4942 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4943 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4944 ~IXGBE_DMATXCTL_TE
));
4950 if (!pci_channel_offline(adapter
->pdev
))
4951 ixgbe_reset(adapter
);
4953 /* power down the optics for 82599 SFP+ fiber */
4954 if (hw
->mac
.ops
.disable_tx_laser
)
4955 hw
->mac
.ops
.disable_tx_laser(hw
);
4957 ixgbe_clean_all_tx_rings(adapter
);
4958 ixgbe_clean_all_rx_rings(adapter
);
4960 #ifdef CONFIG_IXGBE_DCA
4961 /* since we reset the hardware DCA settings were cleared */
4962 ixgbe_setup_dca(adapter
);
4967 * ixgbe_tx_timeout - Respond to a Tx Hang
4968 * @netdev: network interface device structure
4970 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4972 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4974 /* Do the reset outside of interrupt context */
4975 ixgbe_tx_timeout_reset(adapter
);
4979 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4980 * @adapter: board private structure to initialize
4982 * ixgbe_sw_init initializes the Adapter private data structure.
4983 * Fields are initialized based on PCI device information and
4984 * OS network device settings (MTU size).
4986 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4988 struct ixgbe_hw
*hw
= &adapter
->hw
;
4989 struct pci_dev
*pdev
= adapter
->pdev
;
4990 unsigned int rss
, fdir
;
4992 #ifdef CONFIG_IXGBE_DCB
4994 struct tc_configuration
*tc
;
4997 /* PCI config space info */
4999 hw
->vendor_id
= pdev
->vendor
;
5000 hw
->device_id
= pdev
->device
;
5001 hw
->revision_id
= pdev
->revision
;
5002 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
5003 hw
->subsystem_device_id
= pdev
->subsystem_device
;
5005 /* Set common capability flags and settings */
5006 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
5007 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
5008 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
5009 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
5010 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
5011 adapter
->atr_sample_rate
= 20;
5012 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
5013 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
5014 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
5015 #ifdef CONFIG_IXGBE_DCA
5016 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
5019 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
5020 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5021 #ifdef CONFIG_IXGBE_DCB
5022 /* Default traffic class to use for FCoE */
5023 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
5024 #endif /* CONFIG_IXGBE_DCB */
5025 #endif /* IXGBE_FCOE */
5027 /* Set MAC specific capability flags and exceptions */
5028 switch (hw
->mac
.type
) {
5029 case ixgbe_mac_82598EB
:
5030 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
5031 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
5033 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
5034 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
5036 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
5037 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
5038 adapter
->atr_sample_rate
= 0;
5039 adapter
->fdir_pballoc
= 0;
5041 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5042 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5043 #ifdef CONFIG_IXGBE_DCB
5044 adapter
->fcoe
.up
= 0;
5045 #endif /* IXGBE_DCB */
5046 #endif /* IXGBE_FCOE */
5048 case ixgbe_mac_82599EB
:
5049 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5050 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5052 case ixgbe_mac_X540
:
5053 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM
);
5054 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5055 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5062 /* FCoE support exists, always init the FCoE lock */
5063 spin_lock_init(&adapter
->fcoe
.lock
);
5066 /* n-tuple support exists, always init our spinlock */
5067 spin_lock_init(&adapter
->fdir_perfect_lock
);
5069 #ifdef CONFIG_IXGBE_DCB
5070 switch (hw
->mac
.type
) {
5071 case ixgbe_mac_X540
:
5072 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5073 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5076 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5077 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5081 /* Configure DCB traffic classes */
5082 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5083 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5084 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5085 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5086 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5087 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5088 tc
->dcb_pfc
= pfc_disabled
;
5091 /* Initialize default user to priority mapping, UPx->TC0 */
5092 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5093 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5094 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5096 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5097 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5098 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5099 adapter
->dcb_set_bitmap
= 0x00;
5100 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5101 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5102 sizeof(adapter
->temp_dcb_cfg
));
5106 /* default flow control settings */
5107 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5108 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5109 ixgbe_pbthresh_setup(adapter
);
5110 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5111 hw
->fc
.send_xon
= true;
5112 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5114 #ifdef CONFIG_PCI_IOV
5116 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5118 /* assign number of SR-IOV VFs */
5119 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5120 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5121 adapter
->num_vfs
= 0;
5122 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5124 adapter
->num_vfs
= max_vfs
;
5127 #endif /* CONFIG_PCI_IOV */
5129 /* enable itr by default in dynamic mode */
5130 adapter
->rx_itr_setting
= 1;
5131 adapter
->tx_itr_setting
= 1;
5133 /* set default ring sizes */
5134 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5135 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5137 /* set default work limits */
5138 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5140 /* initialize eeprom parameters */
5141 if (ixgbe_init_eeprom_params_generic(hw
)) {
5142 e_dev_err("EEPROM initialization failed\n");
5146 /* PF holds first pool slot */
5147 set_bit(0, &adapter
->fwd_bitmask
);
5148 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5154 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5155 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5157 * Return 0 on success, negative on failure
5159 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5161 struct device
*dev
= tx_ring
->dev
;
5162 int orig_node
= dev_to_node(dev
);
5166 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5168 if (tx_ring
->q_vector
)
5169 numa_node
= tx_ring
->q_vector
->numa_node
;
5171 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
5172 if (!tx_ring
->tx_buffer_info
)
5173 tx_ring
->tx_buffer_info
= vzalloc(size
);
5174 if (!tx_ring
->tx_buffer_info
)
5177 u64_stats_init(&tx_ring
->syncp
);
5179 /* round up to nearest 4K */
5180 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5181 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5183 set_dev_node(dev
, numa_node
);
5184 tx_ring
->desc
= dma_alloc_coherent(dev
,
5188 set_dev_node(dev
, orig_node
);
5190 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5191 &tx_ring
->dma
, GFP_KERNEL
);
5195 tx_ring
->next_to_use
= 0;
5196 tx_ring
->next_to_clean
= 0;
5200 vfree(tx_ring
->tx_buffer_info
);
5201 tx_ring
->tx_buffer_info
= NULL
;
5202 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5207 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5208 * @adapter: board private structure
5210 * If this function returns with an error, then it's possible one or
5211 * more of the rings is populated (while the rest are not). It is the
5212 * callers duty to clean those orphaned rings.
5214 * Return 0 on success, negative on failure
5216 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5220 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5221 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5225 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5231 /* rewind the index freeing the rings as we go */
5233 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5238 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5239 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5241 * Returns 0 on success, negative on failure
5243 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5245 struct device
*dev
= rx_ring
->dev
;
5246 int orig_node
= dev_to_node(dev
);
5250 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5252 if (rx_ring
->q_vector
)
5253 numa_node
= rx_ring
->q_vector
->numa_node
;
5255 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
5256 if (!rx_ring
->rx_buffer_info
)
5257 rx_ring
->rx_buffer_info
= vzalloc(size
);
5258 if (!rx_ring
->rx_buffer_info
)
5261 u64_stats_init(&rx_ring
->syncp
);
5263 /* Round up to nearest 4K */
5264 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5265 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5267 set_dev_node(dev
, numa_node
);
5268 rx_ring
->desc
= dma_alloc_coherent(dev
,
5272 set_dev_node(dev
, orig_node
);
5274 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5275 &rx_ring
->dma
, GFP_KERNEL
);
5279 rx_ring
->next_to_clean
= 0;
5280 rx_ring
->next_to_use
= 0;
5284 vfree(rx_ring
->rx_buffer_info
);
5285 rx_ring
->rx_buffer_info
= NULL
;
5286 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5291 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5292 * @adapter: board private structure
5294 * If this function returns with an error, then it's possible one or
5295 * more of the rings is populated (while the rest are not). It is the
5296 * callers duty to clean those orphaned rings.
5298 * Return 0 on success, negative on failure
5300 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5304 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5305 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5309 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5314 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5319 /* rewind the index freeing the rings as we go */
5321 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5326 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5327 * @tx_ring: Tx descriptor ring for a specific queue
5329 * Free all transmit software resources
5331 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5333 ixgbe_clean_tx_ring(tx_ring
);
5335 vfree(tx_ring
->tx_buffer_info
);
5336 tx_ring
->tx_buffer_info
= NULL
;
5338 /* if not set, then don't free */
5342 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5343 tx_ring
->desc
, tx_ring
->dma
);
5345 tx_ring
->desc
= NULL
;
5349 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5350 * @adapter: board private structure
5352 * Free all transmit software resources
5354 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5358 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5359 if (adapter
->tx_ring
[i
]->desc
)
5360 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5364 * ixgbe_free_rx_resources - Free Rx Resources
5365 * @rx_ring: ring to clean the resources from
5367 * Free all receive software resources
5369 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
5371 ixgbe_clean_rx_ring(rx_ring
);
5373 vfree(rx_ring
->rx_buffer_info
);
5374 rx_ring
->rx_buffer_info
= NULL
;
5376 /* if not set, then don't free */
5380 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
5381 rx_ring
->desc
, rx_ring
->dma
);
5383 rx_ring
->desc
= NULL
;
5387 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5388 * @adapter: board private structure
5390 * Free all receive software resources
5392 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
5397 ixgbe_free_fcoe_ddp_resources(adapter
);
5400 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5401 if (adapter
->rx_ring
[i
]->desc
)
5402 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5406 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5407 * @netdev: network interface device structure
5408 * @new_mtu: new value for maximum frame size
5410 * Returns 0 on success, negative on failure
5412 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
5414 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5415 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
5417 /* MTU < 68 is an error and causes problems on some kernels */
5418 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
5422 * For 82599EB we cannot allow legacy VFs to enable their receive
5423 * paths when MTU greater than 1500 is configured. So display a
5424 * warning that legacy VFs will be disabled.
5426 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
5427 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
5428 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
5429 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
5431 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
5433 /* must set new MTU before calling down or up */
5434 netdev
->mtu
= new_mtu
;
5436 if (netif_running(netdev
))
5437 ixgbe_reinit_locked(adapter
);
5443 * ixgbe_open - Called when a network interface is made active
5444 * @netdev: network interface device structure
5446 * Returns 0 on success, negative value on failure
5448 * The open entry point is called when a network interface is made
5449 * active by the system (IFF_UP). At this point all resources needed
5450 * for transmit and receive operations are allocated, the interrupt
5451 * handler is registered with the OS, the watchdog timer is started,
5452 * and the stack is notified that the interface is ready.
5454 static int ixgbe_open(struct net_device
*netdev
)
5456 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5459 /* disallow open during test */
5460 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
5463 netif_carrier_off(netdev
);
5465 /* allocate transmit descriptors */
5466 err
= ixgbe_setup_all_tx_resources(adapter
);
5470 /* allocate receive descriptors */
5471 err
= ixgbe_setup_all_rx_resources(adapter
);
5475 ixgbe_configure(adapter
);
5477 err
= ixgbe_request_irq(adapter
);
5481 /* Notify the stack of the actual queue counts. */
5482 if (adapter
->num_rx_pools
> 1)
5483 queues
= adapter
->num_rx_queues_per_pool
;
5485 queues
= adapter
->num_tx_queues
;
5487 err
= netif_set_real_num_tx_queues(netdev
, queues
);
5489 goto err_set_queues
;
5491 if (adapter
->num_rx_pools
> 1 &&
5492 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
5493 queues
= IXGBE_MAX_L2A_QUEUES
;
5495 queues
= adapter
->num_rx_queues
;
5496 err
= netif_set_real_num_rx_queues(netdev
, queues
);
5498 goto err_set_queues
;
5500 ixgbe_ptp_init(adapter
);
5502 ixgbe_up_complete(adapter
);
5507 ixgbe_free_irq(adapter
);
5509 ixgbe_free_all_rx_resources(adapter
);
5511 ixgbe_free_all_tx_resources(adapter
);
5513 ixgbe_reset(adapter
);
5519 * ixgbe_close - Disables a network interface
5520 * @netdev: network interface device structure
5522 * Returns 0, this is not allowed to fail
5524 * The close entry point is called when an interface is de-activated
5525 * by the OS. The hardware is still under the drivers control, but
5526 * needs to be disabled. A global MAC reset is issued to stop the
5527 * hardware, and all transmit and receive resources are freed.
5529 static int ixgbe_close(struct net_device
*netdev
)
5531 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5533 ixgbe_ptp_stop(adapter
);
5535 ixgbe_down(adapter
);
5536 ixgbe_free_irq(adapter
);
5538 ixgbe_fdir_filter_exit(adapter
);
5540 ixgbe_free_all_tx_resources(adapter
);
5541 ixgbe_free_all_rx_resources(adapter
);
5543 ixgbe_release_hw_control(adapter
);
5549 static int ixgbe_resume(struct pci_dev
*pdev
)
5551 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5552 struct net_device
*netdev
= adapter
->netdev
;
5555 adapter
->hw
.hw_addr
= adapter
->io_addr
;
5556 pci_set_power_state(pdev
, PCI_D0
);
5557 pci_restore_state(pdev
);
5559 * pci_restore_state clears dev->state_saved so call
5560 * pci_save_state to restore it.
5562 pci_save_state(pdev
);
5564 err
= pci_enable_device_mem(pdev
);
5566 e_dev_err("Cannot enable PCI device from suspend\n");
5569 smp_mb__before_clear_bit();
5570 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
5571 pci_set_master(pdev
);
5573 pci_wake_from_d3(pdev
, false);
5575 ixgbe_reset(adapter
);
5577 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
5580 err
= ixgbe_init_interrupt_scheme(adapter
);
5581 if (!err
&& netif_running(netdev
))
5582 err
= ixgbe_open(netdev
);
5589 netif_device_attach(netdev
);
5593 #endif /* CONFIG_PM */
5595 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
5597 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
5598 struct net_device
*netdev
= adapter
->netdev
;
5599 struct ixgbe_hw
*hw
= &adapter
->hw
;
5601 u32 wufc
= adapter
->wol
;
5606 netif_device_detach(netdev
);
5609 if (netif_running(netdev
)) {
5610 ixgbe_down(adapter
);
5611 ixgbe_free_irq(adapter
);
5612 ixgbe_free_all_tx_resources(adapter
);
5613 ixgbe_free_all_rx_resources(adapter
);
5617 ixgbe_clear_interrupt_scheme(adapter
);
5620 retval
= pci_save_state(pdev
);
5625 if (hw
->mac
.ops
.stop_link_on_d3
)
5626 hw
->mac
.ops
.stop_link_on_d3(hw
);
5629 ixgbe_set_rx_mode(netdev
);
5631 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5632 if (hw
->mac
.ops
.enable_tx_laser
)
5633 hw
->mac
.ops
.enable_tx_laser(hw
);
5635 /* turn on all-multi mode if wake on multicast is enabled */
5636 if (wufc
& IXGBE_WUFC_MC
) {
5637 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5638 fctrl
|= IXGBE_FCTRL_MPE
;
5639 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
5642 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
5643 ctrl
|= IXGBE_CTRL_GIO_DIS
;
5644 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
5646 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
5648 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
5649 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
5652 switch (hw
->mac
.type
) {
5653 case ixgbe_mac_82598EB
:
5654 pci_wake_from_d3(pdev
, false);
5656 case ixgbe_mac_82599EB
:
5657 case ixgbe_mac_X540
:
5658 pci_wake_from_d3(pdev
, !!wufc
);
5664 *enable_wake
= !!wufc
;
5666 ixgbe_release_hw_control(adapter
);
5668 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
5669 pci_disable_device(pdev
);
5675 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
5680 retval
= __ixgbe_shutdown(pdev
, &wake
);
5685 pci_prepare_to_sleep(pdev
);
5687 pci_wake_from_d3(pdev
, false);
5688 pci_set_power_state(pdev
, PCI_D3hot
);
5693 #endif /* CONFIG_PM */
5695 static void ixgbe_shutdown(struct pci_dev
*pdev
)
5699 __ixgbe_shutdown(pdev
, &wake
);
5701 if (system_state
== SYSTEM_POWER_OFF
) {
5702 pci_wake_from_d3(pdev
, wake
);
5703 pci_set_power_state(pdev
, PCI_D3hot
);
5708 * ixgbe_update_stats - Update the board statistics counters.
5709 * @adapter: board private structure
5711 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5713 struct net_device
*netdev
= adapter
->netdev
;
5714 struct ixgbe_hw
*hw
= &adapter
->hw
;
5715 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5717 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5718 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5719 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5720 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5722 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5723 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5726 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5729 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5730 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5731 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5733 adapter
->rsc_total_count
= rsc_count
;
5734 adapter
->rsc_total_flush
= rsc_flush
;
5737 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5738 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5739 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5740 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5741 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5742 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5743 bytes
+= rx_ring
->stats
.bytes
;
5744 packets
+= rx_ring
->stats
.packets
;
5746 adapter
->non_eop_descs
= non_eop_descs
;
5747 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5748 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5749 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5750 netdev
->stats
.rx_bytes
= bytes
;
5751 netdev
->stats
.rx_packets
= packets
;
5755 /* gather some stats to the adapter struct that are per queue */
5756 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5757 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5758 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5759 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5760 bytes
+= tx_ring
->stats
.bytes
;
5761 packets
+= tx_ring
->stats
.packets
;
5763 adapter
->restart_queue
= restart_queue
;
5764 adapter
->tx_busy
= tx_busy
;
5765 netdev
->stats
.tx_bytes
= bytes
;
5766 netdev
->stats
.tx_packets
= packets
;
5768 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5770 /* 8 register reads */
5771 for (i
= 0; i
< 8; i
++) {
5772 /* for packet buffers not used, the register should read 0 */
5773 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5775 hwstats
->mpc
[i
] += mpc
;
5776 total_mpc
+= hwstats
->mpc
[i
];
5777 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5778 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5779 switch (hw
->mac
.type
) {
5780 case ixgbe_mac_82598EB
:
5781 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5782 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5783 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5784 hwstats
->pxonrxc
[i
] +=
5785 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5787 case ixgbe_mac_82599EB
:
5788 case ixgbe_mac_X540
:
5789 hwstats
->pxonrxc
[i
] +=
5790 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5797 /*16 register reads */
5798 for (i
= 0; i
< 16; i
++) {
5799 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5800 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5801 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5802 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5803 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5804 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5805 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5806 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5810 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5811 /* work around hardware counting issue */
5812 hwstats
->gprc
-= missed_rx
;
5814 ixgbe_update_xoff_received(adapter
);
5816 /* 82598 hardware only has a 32 bit counter in the high register */
5817 switch (hw
->mac
.type
) {
5818 case ixgbe_mac_82598EB
:
5819 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5820 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5821 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5822 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5824 case ixgbe_mac_X540
:
5825 /* OS2BMC stats are X540 only*/
5826 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5827 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5828 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5829 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5830 case ixgbe_mac_82599EB
:
5831 for (i
= 0; i
< 16; i
++)
5832 adapter
->hw_rx_no_dma_resources
+=
5833 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5834 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5835 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5836 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5837 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5838 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5839 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5840 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5841 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5842 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5844 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5845 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5846 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5847 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5848 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5849 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5850 /* Add up per cpu counters for total ddp aloc fail */
5851 if (adapter
->fcoe
.ddp_pool
) {
5852 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5853 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
5855 u64 noddp
= 0, noddp_ext_buff
= 0;
5856 for_each_possible_cpu(cpu
) {
5857 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
5858 noddp
+= ddp_pool
->noddp
;
5859 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
5861 hwstats
->fcoe_noddp
= noddp
;
5862 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
5864 #endif /* IXGBE_FCOE */
5869 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5870 hwstats
->bprc
+= bprc
;
5871 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5872 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5873 hwstats
->mprc
-= bprc
;
5874 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5875 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5876 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5877 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5878 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5879 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5880 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5881 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5882 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5883 hwstats
->lxontxc
+= lxon
;
5884 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5885 hwstats
->lxofftxc
+= lxoff
;
5886 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5887 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5889 * 82598 errata - tx of flow control packets is included in tx counters
5891 xon_off_tot
= lxon
+ lxoff
;
5892 hwstats
->gptc
-= xon_off_tot
;
5893 hwstats
->mptc
-= xon_off_tot
;
5894 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5895 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5896 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5897 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5898 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5899 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5900 hwstats
->ptc64
-= xon_off_tot
;
5901 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5902 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5903 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5904 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5905 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5906 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5908 /* Fill out the OS statistics structure */
5909 netdev
->stats
.multicast
= hwstats
->mprc
;
5912 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5913 netdev
->stats
.rx_dropped
= 0;
5914 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5915 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5916 netdev
->stats
.rx_missed_errors
= total_mpc
;
5920 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5921 * @adapter: pointer to the device adapter structure
5923 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5925 struct ixgbe_hw
*hw
= &adapter
->hw
;
5928 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5931 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5933 /* if interface is down do nothing */
5934 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5937 /* do nothing if we are not using signature filters */
5938 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5941 adapter
->fdir_overflow
++;
5943 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5944 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5945 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5946 &(adapter
->tx_ring
[i
]->state
));
5947 /* re-enable flow director interrupts */
5948 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5950 e_err(probe
, "failed to finish FDIR re-initialization, "
5951 "ignored adding FDIR ATR filters\n");
5956 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5957 * @adapter: pointer to the device adapter structure
5959 * This function serves two purposes. First it strobes the interrupt lines
5960 * in order to make certain interrupts are occurring. Secondly it sets the
5961 * bits needed to check for TX hangs. As a result we should immediately
5962 * determine if a hang has occurred.
5964 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5966 struct ixgbe_hw
*hw
= &adapter
->hw
;
5970 /* If we're down, removing or resetting, just bail */
5971 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5972 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
5973 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5976 /* Force detection of hung controller */
5977 if (netif_carrier_ok(adapter
->netdev
)) {
5978 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5979 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5982 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5984 * for legacy and MSI interrupts don't set any bits
5985 * that are enabled for EIAM, because this operation
5986 * would set *both* EIMS and EICS for any bit in EIAM
5988 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5989 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5991 /* get one bit for every active tx/rx interrupt vector */
5992 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5993 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5994 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5995 eics
|= ((u64
)1 << i
);
5999 /* Cause software interrupt to ensure rings are cleaned */
6000 ixgbe_irq_rearm_queues(adapter
, eics
);
6005 * ixgbe_watchdog_update_link - update the link status
6006 * @adapter: pointer to the device adapter structure
6007 * @link_speed: pointer to a u32 to store the link_speed
6009 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
6011 struct ixgbe_hw
*hw
= &adapter
->hw
;
6012 u32 link_speed
= adapter
->link_speed
;
6013 bool link_up
= adapter
->link_up
;
6014 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
6016 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6019 if (hw
->mac
.ops
.check_link
) {
6020 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
6022 /* always assume link is up, if no check link function */
6023 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6027 if (adapter
->ixgbe_ieee_pfc
)
6028 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
6030 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
6031 hw
->mac
.ops
.fc_enable(hw
);
6032 ixgbe_set_rx_drop_en(adapter
);
6036 time_after(jiffies
, (adapter
->link_check_timeout
+
6037 IXGBE_TRY_LINK_TIMEOUT
))) {
6038 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6039 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
6040 IXGBE_WRITE_FLUSH(hw
);
6043 adapter
->link_up
= link_up
;
6044 adapter
->link_speed
= link_speed
;
6047 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
6049 #ifdef CONFIG_IXGBE_DCB
6050 struct net_device
*netdev
= adapter
->netdev
;
6051 struct dcb_app app
= {
6052 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6057 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6058 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6060 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6065 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6066 * print link up message
6067 * @adapter: pointer to the device adapter structure
6069 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6071 struct net_device
*netdev
= adapter
->netdev
;
6072 struct ixgbe_hw
*hw
= &adapter
->hw
;
6073 struct net_device
*upper
;
6074 struct list_head
*iter
;
6075 u32 link_speed
= adapter
->link_speed
;
6076 bool flow_rx
, flow_tx
;
6078 /* only continue if link was previously down */
6079 if (netif_carrier_ok(netdev
))
6082 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6084 switch (hw
->mac
.type
) {
6085 case ixgbe_mac_82598EB
: {
6086 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6087 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6088 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6089 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6092 case ixgbe_mac_X540
:
6093 case ixgbe_mac_82599EB
: {
6094 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6095 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6096 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6097 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6106 adapter
->last_rx_ptp_check
= jiffies
;
6108 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6109 ixgbe_ptp_start_cyclecounter(adapter
);
6111 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
6112 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
6114 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
6116 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
6119 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6121 (flow_tx
? "TX" : "None"))));
6123 netif_carrier_on(netdev
);
6124 ixgbe_check_vf_rate_limit(adapter
);
6126 /* enable transmits */
6127 netif_tx_wake_all_queues(adapter
->netdev
);
6129 /* enable any upper devices */
6131 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
6132 if (netif_is_macvlan(upper
)) {
6133 struct macvlan_dev
*vlan
= netdev_priv(upper
);
6136 netif_tx_wake_all_queues(upper
);
6141 /* update the default user priority for VFs */
6142 ixgbe_update_default_up(adapter
);
6144 /* ping all the active vfs to let them know link has changed */
6145 ixgbe_ping_all_vfs(adapter
);
6149 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6150 * print link down message
6151 * @adapter: pointer to the adapter structure
6153 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6155 struct net_device
*netdev
= adapter
->netdev
;
6156 struct ixgbe_hw
*hw
= &adapter
->hw
;
6158 adapter
->link_up
= false;
6159 adapter
->link_speed
= 0;
6161 /* only continue if link was up previously */
6162 if (!netif_carrier_ok(netdev
))
6165 /* poll for SFP+ cable when link is down */
6166 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6167 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6169 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6170 ixgbe_ptp_start_cyclecounter(adapter
);
6172 e_info(drv
, "NIC Link is Down\n");
6173 netif_carrier_off(netdev
);
6175 /* ping all the active vfs to let them know link has changed */
6176 ixgbe_ping_all_vfs(adapter
);
6180 * ixgbe_watchdog_flush_tx - flush queues on link down
6181 * @adapter: pointer to the device adapter structure
6183 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6186 int some_tx_pending
= 0;
6188 if (!netif_carrier_ok(adapter
->netdev
)) {
6189 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6190 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6191 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
6192 some_tx_pending
= 1;
6197 if (some_tx_pending
) {
6198 /* We've lost link, so the controller stops DMA,
6199 * but we've got queued Tx work that's never going
6200 * to get done, so reset controller to flush Tx.
6201 * (Do the reset outside of interrupt context).
6203 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6204 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6209 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
6213 /* Do not perform spoof check for 82598 or if not in IOV mode */
6214 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
6215 adapter
->num_vfs
== 0)
6218 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
6221 * ssvpc register is cleared on read, if zero then no
6222 * spoofed packets in the last interval.
6227 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
6231 * ixgbe_watchdog_subtask - check and bring link up
6232 * @adapter: pointer to the device adapter structure
6234 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
6236 /* if interface is down, removing or resetting, do nothing */
6237 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6238 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6239 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6242 ixgbe_watchdog_update_link(adapter
);
6244 if (adapter
->link_up
)
6245 ixgbe_watchdog_link_is_up(adapter
);
6247 ixgbe_watchdog_link_is_down(adapter
);
6249 ixgbe_spoof_check(adapter
);
6250 ixgbe_update_stats(adapter
);
6252 ixgbe_watchdog_flush_tx(adapter
);
6256 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6257 * @adapter: the ixgbe adapter structure
6259 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
6261 struct ixgbe_hw
*hw
= &adapter
->hw
;
6264 /* not searching for SFP so there is nothing to do here */
6265 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
6266 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6269 /* someone else is in init, wait until next service event */
6270 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6273 err
= hw
->phy
.ops
.identify_sfp(hw
);
6274 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6277 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
6278 /* If no cable is present, then we need to reset
6279 * the next time we find a good cable. */
6280 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
6287 /* exit if reset not needed */
6288 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
6291 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
6294 * A module may be identified correctly, but the EEPROM may not have
6295 * support for that module. setup_sfp() will fail in that case, so
6296 * we should not allow that module to load.
6298 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6299 err
= hw
->phy
.ops
.reset(hw
);
6301 err
= hw
->mac
.ops
.setup_sfp(hw
);
6303 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
6306 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
6307 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
6310 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6312 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
6313 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
6314 e_dev_err("failed to initialize because an unsupported "
6315 "SFP+ module type was detected.\n");
6316 e_dev_err("Reload the driver after installing a "
6317 "supported module.\n");
6318 unregister_netdev(adapter
->netdev
);
6323 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6324 * @adapter: the ixgbe adapter structure
6326 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
6328 struct ixgbe_hw
*hw
= &adapter
->hw
;
6330 bool autoneg
= false;
6332 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
6335 /* someone else is in init, wait until next service event */
6336 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
6339 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
6341 speed
= hw
->phy
.autoneg_advertised
;
6342 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
6343 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
6345 /* setup the highest link when no autoneg */
6347 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
6348 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6352 if (hw
->mac
.ops
.setup_link
)
6353 hw
->mac
.ops
.setup_link(hw
, speed
, true);
6355 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
6356 adapter
->link_check_timeout
= jiffies
;
6357 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
6360 #ifdef CONFIG_PCI_IOV
6361 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6364 struct ixgbe_hw
*hw
= &adapter
->hw
;
6365 struct net_device
*netdev
= adapter
->netdev
;
6369 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6370 if (gpc
) /* If incrementing then no need for the check below */
6373 * Check to see if a bad DMA write target from an errant or
6374 * malicious VF has caused a PCIe error. If so then we can
6375 * issue a VFLR to the offending VF(s) and then resume without
6376 * requesting a full slot reset.
6379 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
6380 ciaa
= (vf
<< 16) | 0x80000000;
6381 /* 32 bit read so align, we really want status at offset 6 */
6382 ciaa
|= PCI_COMMAND
;
6383 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6384 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
6386 /* disable debug mode asap after reading data */
6387 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6388 /* Get the upper 16 bits which will be the PCI status reg */
6390 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
6391 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
6393 ciaa
= (vf
<< 16) | 0x80000000;
6395 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6396 ciad
= 0x00008000; /* VFLR */
6397 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
6399 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
6406 * ixgbe_service_timer - Timer Call-back
6407 * @data: pointer to adapter cast into an unsigned long
6409 static void ixgbe_service_timer(unsigned long data
)
6411 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
6412 unsigned long next_event_offset
;
6415 /* poll faster when waiting for link */
6416 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
6417 next_event_offset
= HZ
/ 10;
6419 next_event_offset
= HZ
* 2;
6421 #ifdef CONFIG_PCI_IOV
6423 * don't bother with SR-IOV VF DMA hang check if there are
6424 * no VFs or the link is down
6426 if (!adapter
->num_vfs
||
6427 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6428 goto normal_timer_service
;
6430 /* If we have VFs allocated then we must check for DMA hangs */
6431 ixgbe_check_for_bad_vf(adapter
);
6432 next_event_offset
= HZ
/ 50;
6433 adapter
->timer_event_accumulator
++;
6435 if (adapter
->timer_event_accumulator
>= 100)
6436 adapter
->timer_event_accumulator
= 0;
6440 normal_timer_service
:
6442 /* Reset the timer */
6443 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
6446 ixgbe_service_event_schedule(adapter
);
6449 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
6451 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
6454 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
6456 /* If we're already down, removing or resetting, just bail */
6457 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6458 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6459 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6462 ixgbe_dump(adapter
);
6463 netdev_err(adapter
->netdev
, "Reset adapter\n");
6464 adapter
->tx_timeout_count
++;
6467 ixgbe_reinit_locked(adapter
);
6472 * ixgbe_service_task - manages and runs subtasks
6473 * @work: pointer to work_struct containing our data
6475 static void ixgbe_service_task(struct work_struct
*work
)
6477 struct ixgbe_adapter
*adapter
= container_of(work
,
6478 struct ixgbe_adapter
,
6480 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
6481 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
6483 ixgbe_down(adapter
);
6486 ixgbe_service_event_complete(adapter
);
6489 ixgbe_reset_subtask(adapter
);
6490 ixgbe_sfp_detection_subtask(adapter
);
6491 ixgbe_sfp_link_config_subtask(adapter
);
6492 ixgbe_check_overtemp_subtask(adapter
);
6493 ixgbe_watchdog_subtask(adapter
);
6494 ixgbe_fdir_reinit_subtask(adapter
);
6495 ixgbe_check_hang_subtask(adapter
);
6497 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
6498 ixgbe_ptp_overflow_check(adapter
);
6499 ixgbe_ptp_rx_hang(adapter
);
6502 ixgbe_service_event_complete(adapter
);
6505 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
6506 struct ixgbe_tx_buffer
*first
,
6509 struct sk_buff
*skb
= first
->skb
;
6510 u32 vlan_macip_lens
, type_tucmd
;
6511 u32 mss_l4len_idx
, l4len
;
6513 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
6516 if (!skb_is_gso(skb
))
6519 if (skb_header_cloned(skb
)) {
6520 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
6525 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6526 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6528 if (first
->protocol
== htons(ETH_P_IP
)) {
6529 struct iphdr
*iph
= ip_hdr(skb
);
6532 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
6536 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6537 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6538 IXGBE_TX_FLAGS_CSUM
|
6539 IXGBE_TX_FLAGS_IPV4
;
6540 } else if (skb_is_gso_v6(skb
)) {
6541 ipv6_hdr(skb
)->payload_len
= 0;
6542 tcp_hdr(skb
)->check
=
6543 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
6544 &ipv6_hdr(skb
)->daddr
,
6546 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
6547 IXGBE_TX_FLAGS_CSUM
;
6550 /* compute header lengths */
6551 l4len
= tcp_hdrlen(skb
);
6552 *hdr_len
= skb_transport_offset(skb
) + l4len
;
6554 /* update gso size and bytecount with header size */
6555 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
6556 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
6558 /* mss_l4len_id: use 0 as index for TSO */
6559 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
6560 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
6562 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6563 vlan_macip_lens
= skb_network_header_len(skb
);
6564 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6565 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6567 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
6573 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
6574 struct ixgbe_tx_buffer
*first
)
6576 struct sk_buff
*skb
= first
->skb
;
6577 u32 vlan_macip_lens
= 0;
6578 u32 mss_l4len_idx
= 0;
6581 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
6582 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
6583 !(first
->tx_flags
& IXGBE_TX_FLAGS_CC
))
6587 switch (first
->protocol
) {
6588 case htons(ETH_P_IP
):
6589 vlan_macip_lens
|= skb_network_header_len(skb
);
6590 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
6591 l4_hdr
= ip_hdr(skb
)->protocol
;
6593 case htons(ETH_P_IPV6
):
6594 vlan_macip_lens
|= skb_network_header_len(skb
);
6595 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
6598 if (unlikely(net_ratelimit())) {
6599 dev_warn(tx_ring
->dev
,
6600 "partial checksum but proto=%x!\n",
6608 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
6609 mss_l4len_idx
= tcp_hdrlen(skb
) <<
6610 IXGBE_ADVTXD_L4LEN_SHIFT
;
6613 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
6614 mss_l4len_idx
= sizeof(struct sctphdr
) <<
6615 IXGBE_ADVTXD_L4LEN_SHIFT
;
6618 mss_l4len_idx
= sizeof(struct udphdr
) <<
6619 IXGBE_ADVTXD_L4LEN_SHIFT
;
6622 if (unlikely(net_ratelimit())) {
6623 dev_warn(tx_ring
->dev
,
6624 "partial checksum but l4 proto=%x!\n",
6630 /* update TX checksum flag */
6631 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
6634 /* vlan_macip_lens: MACLEN, VLAN tag */
6635 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
6636 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
6638 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
6639 type_tucmd
, mss_l4len_idx
);
6642 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6643 ((_flag <= _result) ? \
6644 ((u32)(_input & _flag) * (_result / _flag)) : \
6645 ((u32)(_input & _flag) / (_flag / _result)))
6647 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
6649 /* set type for advanced descriptor with frame checksum insertion */
6650 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
6651 IXGBE_ADVTXD_DCMD_DEXT
|
6652 IXGBE_ADVTXD_DCMD_IFCS
;
6654 /* set HW vlan bit if vlan is present */
6655 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
6656 IXGBE_ADVTXD_DCMD_VLE
);
6658 /* set segmentation enable bits for TSO/FSO */
6659 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
6660 IXGBE_ADVTXD_DCMD_TSE
);
6662 /* set timestamp bit if present */
6663 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
6664 IXGBE_ADVTXD_MAC_TSTAMP
);
6666 /* insert frame checksum */
6667 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
6672 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
6673 u32 tx_flags
, unsigned int paylen
)
6675 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
6677 /* enable L4 checksum for TSO and TX checksum offload */
6678 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6679 IXGBE_TX_FLAGS_CSUM
,
6680 IXGBE_ADVTXD_POPTS_TXSM
);
6682 /* enble IPv4 checksum for TSO */
6683 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6684 IXGBE_TX_FLAGS_IPV4
,
6685 IXGBE_ADVTXD_POPTS_IXSM
);
6688 * Check Context must be set if Tx switch is enabled, which it
6689 * always is for case where virtual functions are running
6691 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
6695 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
6698 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6701 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
6702 struct ixgbe_tx_buffer
*first
,
6705 struct sk_buff
*skb
= first
->skb
;
6706 struct ixgbe_tx_buffer
*tx_buffer
;
6707 union ixgbe_adv_tx_desc
*tx_desc
;
6708 struct skb_frag_struct
*frag
;
6710 unsigned int data_len
, size
;
6711 u32 tx_flags
= first
->tx_flags
;
6712 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
6713 u16 i
= tx_ring
->next_to_use
;
6715 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
6717 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
6719 size
= skb_headlen(skb
);
6720 data_len
= skb
->data_len
;
6723 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
6724 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
6725 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
6728 data_len
-= sizeof(struct fcoe_crc_eof
);
6733 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
6737 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
6738 if (dma_mapping_error(tx_ring
->dev
, dma
))
6741 /* record length, and DMA address */
6742 dma_unmap_len_set(tx_buffer
, len
, size
);
6743 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6745 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6747 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
6748 tx_desc
->read
.cmd_type_len
=
6749 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
6753 if (i
== tx_ring
->count
) {
6754 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6757 tx_desc
->read
.olinfo_status
= 0;
6759 dma
+= IXGBE_MAX_DATA_PER_TXD
;
6760 size
-= IXGBE_MAX_DATA_PER_TXD
;
6762 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6765 if (likely(!data_len
))
6768 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
6772 if (i
== tx_ring
->count
) {
6773 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6776 tx_desc
->read
.olinfo_status
= 0;
6779 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6781 size
= skb_frag_size(frag
);
6785 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6788 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6791 /* write last descriptor with RS and EOP bits */
6792 cmd_type
|= size
| IXGBE_TXD_CMD
;
6793 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
6795 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
6797 /* set the timestamp */
6798 first
->time_stamp
= jiffies
;
6801 * Force memory writes to complete before letting h/w know there
6802 * are new descriptors to fetch. (Only applicable for weak-ordered
6803 * memory model archs, such as IA-64).
6805 * We also need this memory barrier to make certain all of the
6806 * status bits have been updated before next_to_watch is written.
6810 /* set next_to_watch value indicating a packet is present */
6811 first
->next_to_watch
= tx_desc
;
6814 if (i
== tx_ring
->count
)
6817 tx_ring
->next_to_use
= i
;
6819 /* notify HW of packet */
6820 ixgbe_write_tail(tx_ring
, i
);
6824 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6826 /* clear dma mappings for failed tx_buffer_info map */
6828 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6829 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6830 if (tx_buffer
== first
)
6837 tx_ring
->next_to_use
= i
;
6840 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6841 struct ixgbe_tx_buffer
*first
)
6843 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6844 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6845 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6847 unsigned char *network
;
6849 struct ipv6hdr
*ipv6
;
6854 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6858 /* do nothing if sampling is disabled */
6859 if (!ring
->atr_sample_rate
)
6864 /* snag network header to get L4 type and address */
6865 hdr
.network
= skb_network_header(first
->skb
);
6867 /* Currently only IPv4/IPv6 with TCP is supported */
6868 if ((first
->protocol
!= htons(ETH_P_IPV6
) ||
6869 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6870 (first
->protocol
!= htons(ETH_P_IP
) ||
6871 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6874 th
= tcp_hdr(first
->skb
);
6876 /* skip this packet since it is invalid or the socket is closing */
6880 /* sample on all syn packets or once every atr sample count */
6881 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6884 /* reset sample count */
6885 ring
->atr_count
= 0;
6887 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6890 * src and dst are inverted, think how the receiver sees them
6892 * The input is broken into two sections, a non-compressed section
6893 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6894 * is XORed together and stored in the compressed dword.
6896 input
.formatted
.vlan_id
= vlan_id
;
6899 * since src port and flex bytes occupy the same word XOR them together
6900 * and write the value to source port portion of compressed dword
6902 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6903 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
6905 common
.port
.src
^= th
->dest
^ first
->protocol
;
6906 common
.port
.dst
^= th
->source
;
6908 if (first
->protocol
== htons(ETH_P_IP
)) {
6909 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6910 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6912 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6913 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6914 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6915 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6916 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6917 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6918 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6919 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6920 hdr
.ipv6
->daddr
.s6_addr32
[3];
6923 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6924 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6925 input
, common
, ring
->queue_index
);
6928 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6930 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6931 /* Herbert's original patch had:
6932 * smp_mb__after_netif_stop_queue();
6933 * but since that doesn't exist yet, just open code it. */
6936 /* We need to check again in a case another CPU has just
6937 * made room available. */
6938 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6941 /* A reprieve! - use start_queue because it doesn't call schedule */
6942 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6943 ++tx_ring
->tx_stats
.restart_queue
;
6947 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6949 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6951 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6954 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
6955 void *accel_priv
, select_queue_fallback_t fallback
)
6957 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
6959 struct ixgbe_adapter
*adapter
;
6960 struct ixgbe_ring_feature
*f
;
6965 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
6970 * only execute the code below if protocol is FCoE
6971 * or FIP and we have FCoE enabled on the adapter
6973 switch (vlan_get_protocol(skb
)) {
6974 case htons(ETH_P_FCOE
):
6975 case htons(ETH_P_FIP
):
6976 adapter
= netdev_priv(dev
);
6978 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
6981 return fallback(dev
, skb
);
6984 f
= &adapter
->ring_feature
[RING_F_FCOE
];
6986 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6989 while (txq
>= f
->indices
)
6992 return txq
+ f
->offset
;
6994 return fallback(dev
, skb
);
6998 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6999 struct ixgbe_adapter
*adapter
,
7000 struct ixgbe_ring
*tx_ring
)
7002 struct ixgbe_tx_buffer
*first
;
7006 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
7007 __be16 protocol
= skb
->protocol
;
7011 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7012 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7013 * + 2 desc gap to keep tail from touching head,
7014 * + 1 desc for context descriptor,
7015 * otherwise try next time
7017 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
7018 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
7020 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
7021 tx_ring
->tx_stats
.tx_busy
++;
7022 return NETDEV_TX_BUSY
;
7025 /* record the location of the first descriptor for this packet */
7026 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
7028 first
->bytecount
= skb
->len
;
7029 first
->gso_segs
= 1;
7031 /* if we have a HW VLAN tag being added default to the HW one */
7032 if (vlan_tx_tag_present(skb
)) {
7033 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
7034 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7035 /* else if it is a SW VLAN check the next protocol and store the tag */
7036 } else if (protocol
== htons(ETH_P_8021Q
)) {
7037 struct vlan_hdr
*vhdr
, _vhdr
;
7038 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
7042 protocol
= vhdr
->h_vlan_encapsulated_proto
;
7043 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
7044 IXGBE_TX_FLAGS_VLAN_SHIFT
;
7045 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
7048 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
&&
7049 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
7050 &adapter
->state
))) {
7051 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
7052 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
7054 /* schedule check for Tx timestamp */
7055 adapter
->ptp_tx_skb
= skb_get(skb
);
7056 adapter
->ptp_tx_start
= jiffies
;
7057 schedule_work(&adapter
->ptp_tx_work
);
7060 skb_tx_timestamp(skb
);
7062 #ifdef CONFIG_PCI_IOV
7064 * Use the l2switch_enable flag - would be false if the DMA
7065 * Tx switch had been disabled.
7067 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7068 tx_flags
|= IXGBE_TX_FLAGS_CC
;
7071 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7072 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7073 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7074 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7075 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7076 tx_flags
|= (skb
->priority
& 0x7) <<
7077 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7078 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7079 struct vlan_ethhdr
*vhdr
;
7080 if (skb_header_cloned(skb
) &&
7081 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
7083 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7084 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7085 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7087 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7091 /* record initial flags and protocol */
7092 first
->tx_flags
= tx_flags
;
7093 first
->protocol
= protocol
;
7096 /* setup tx offload for FCoE */
7097 if ((protocol
== htons(ETH_P_FCOE
)) &&
7098 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7099 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7106 #endif /* IXGBE_FCOE */
7107 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7111 ixgbe_tx_csum(tx_ring
, first
);
7113 /* add the ATR filter if ATR is on */
7114 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7115 ixgbe_atr(tx_ring
, first
);
7119 #endif /* IXGBE_FCOE */
7120 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7122 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7124 return NETDEV_TX_OK
;
7127 dev_kfree_skb_any(first
->skb
);
7130 return NETDEV_TX_OK
;
7133 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7134 struct net_device
*netdev
,
7135 struct ixgbe_ring
*ring
)
7137 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7138 struct ixgbe_ring
*tx_ring
;
7141 * The minimum packet size for olinfo paylen is 17 so pad the skb
7142 * in order to meet this minimum size requirement.
7144 if (unlikely(skb
->len
< 17)) {
7145 if (skb_pad(skb
, 17 - skb
->len
))
7146 return NETDEV_TX_OK
;
7148 skb_set_tail_pointer(skb
, 17);
7151 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7153 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7156 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7157 struct net_device
*netdev
)
7159 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7163 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7164 * @netdev: network interface device structure
7165 * @p: pointer to an address structure
7167 * Returns 0 on success, negative on failure
7169 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
7171 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7172 struct ixgbe_hw
*hw
= &adapter
->hw
;
7173 struct sockaddr
*addr
= p
;
7175 if (!is_valid_ether_addr(addr
->sa_data
))
7176 return -EADDRNOTAVAIL
;
7178 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
7179 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
7181 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, VMDQ_P(0), IXGBE_RAH_AV
);
7187 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
7189 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7190 struct ixgbe_hw
*hw
= &adapter
->hw
;
7194 if (prtad
!= hw
->phy
.mdio
.prtad
)
7196 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
7202 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
7203 u16 addr
, u16 value
)
7205 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7206 struct ixgbe_hw
*hw
= &adapter
->hw
;
7208 if (prtad
!= hw
->phy
.mdio
.prtad
)
7210 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
7213 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
7215 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7219 return ixgbe_ptp_set_ts_config(adapter
, req
);
7221 return ixgbe_ptp_get_ts_config(adapter
, req
);
7223 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
7228 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7230 * @netdev: network interface device structure
7232 * Returns non-zero on failure
7234 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
7237 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7238 struct ixgbe_hw
*hw
= &adapter
->hw
;
7240 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
7242 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
7245 /* update SAN MAC vmdq pool selection */
7246 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
7252 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7254 * @netdev: network interface device structure
7256 * Returns non-zero on failure
7258 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
7261 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7262 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
7264 if (is_valid_ether_addr(mac
->san_addr
)) {
7266 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
7272 #ifdef CONFIG_NET_POLL_CONTROLLER
7274 * Polling 'interrupt' - used by things like netconsole to send skbs
7275 * without having to re-enable interrupts. It's not called while
7276 * the interrupt routine is executing.
7278 static void ixgbe_netpoll(struct net_device
*netdev
)
7280 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7283 /* if interface is down do nothing */
7284 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
7287 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
7288 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
7289 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
7290 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
7292 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
7294 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
7298 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
7299 struct rtnl_link_stats64
*stats
)
7301 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7305 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
7306 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
7312 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
7313 packets
= ring
->stats
.packets
;
7314 bytes
= ring
->stats
.bytes
;
7315 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
7316 stats
->rx_packets
+= packets
;
7317 stats
->rx_bytes
+= bytes
;
7321 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
7322 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
7328 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
7329 packets
= ring
->stats
.packets
;
7330 bytes
= ring
->stats
.bytes
;
7331 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
7332 stats
->tx_packets
+= packets
;
7333 stats
->tx_bytes
+= bytes
;
7337 /* following stats updated by ixgbe_watchdog_task() */
7338 stats
->multicast
= netdev
->stats
.multicast
;
7339 stats
->rx_errors
= netdev
->stats
.rx_errors
;
7340 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
7341 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
7342 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
7346 #ifdef CONFIG_IXGBE_DCB
7348 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7349 * @adapter: pointer to ixgbe_adapter
7350 * @tc: number of traffic classes currently enabled
7352 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7353 * 802.1Q priority maps to a packet buffer that exists.
7355 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
7357 struct ixgbe_hw
*hw
= &adapter
->hw
;
7361 /* 82598 have a static priority to TC mapping that can not
7362 * be changed so no validation is needed.
7364 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7367 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
7370 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
7371 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
7373 /* If up2tc is out of bounds default to zero */
7375 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
7379 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
7385 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7386 * @adapter: Pointer to adapter struct
7388 * Populate the netdev user priority to tc map
7390 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
7392 struct net_device
*dev
= adapter
->netdev
;
7393 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
7394 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
7397 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
7400 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
7401 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
7403 tc
= ets
->prio_tc
[prio
];
7405 netdev_set_prio_tc_map(dev
, prio
, tc
);
7409 #endif /* CONFIG_IXGBE_DCB */
7411 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7413 * @netdev: net device to configure
7414 * @tc: number of traffic classes to enable
7416 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
7418 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7419 struct ixgbe_hw
*hw
= &adapter
->hw
;
7422 /* Hardware supports up to 8 traffic classes */
7423 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
7424 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
7425 tc
< MAX_TRAFFIC_CLASS
))
7428 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
7429 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
7432 /* Hardware has to reinitialize queues and interrupts to
7433 * match packet buffer alignment. Unfortunately, the
7434 * hardware is not flexible enough to do this dynamically.
7436 if (netif_running(dev
))
7438 ixgbe_clear_interrupt_scheme(adapter
);
7440 #ifdef CONFIG_IXGBE_DCB
7442 netdev_set_num_tc(dev
, tc
);
7443 ixgbe_set_prio_tc_map(adapter
);
7445 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
7447 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
7448 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
7449 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
7452 netdev_reset_tc(dev
);
7454 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
7455 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
7457 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
7459 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
7460 adapter
->dcb_cfg
.pfc_mode_enable
= false;
7463 ixgbe_validate_rtr(adapter
, tc
);
7465 #endif /* CONFIG_IXGBE_DCB */
7466 ixgbe_init_interrupt_scheme(adapter
);
7468 if (netif_running(dev
))
7469 return ixgbe_open(dev
);
7474 #ifdef CONFIG_PCI_IOV
7475 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
7477 struct net_device
*netdev
= adapter
->netdev
;
7480 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
7485 void ixgbe_do_reset(struct net_device
*netdev
)
7487 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7489 if (netif_running(netdev
))
7490 ixgbe_reinit_locked(adapter
);
7492 ixgbe_reset(adapter
);
7495 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
7496 netdev_features_t features
)
7498 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7500 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7501 if (!(features
& NETIF_F_RXCSUM
))
7502 features
&= ~NETIF_F_LRO
;
7504 /* Turn off LRO if not RSC capable */
7505 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
7506 features
&= ~NETIF_F_LRO
;
7511 static int ixgbe_set_features(struct net_device
*netdev
,
7512 netdev_features_t features
)
7514 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7515 netdev_features_t changed
= netdev
->features
^ features
;
7516 bool need_reset
= false;
7518 /* Make sure RSC matches LRO, reset if change */
7519 if (!(features
& NETIF_F_LRO
)) {
7520 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7522 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
7523 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
7524 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
7525 if (adapter
->rx_itr_setting
== 1 ||
7526 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
7527 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
7529 } else if ((changed
^ features
) & NETIF_F_LRO
) {
7530 e_info(probe
, "rx-usecs set too low, "
7536 * Check if Flow Director n-tuple support was enabled or disabled. If
7537 * the state changed, we need to reset.
7539 switch (features
& NETIF_F_NTUPLE
) {
7540 case NETIF_F_NTUPLE
:
7541 /* turn off ATR, enable perfect filters and reset */
7542 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
7545 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7546 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7549 /* turn off perfect filters, enable ATR and reset */
7550 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
7553 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
7555 /* We cannot enable ATR if SR-IOV is enabled */
7556 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7559 /* We cannot enable ATR if we have 2 or more traffic classes */
7560 if (netdev_get_num_tc(netdev
) > 1)
7563 /* We cannot enable ATR if RSS is disabled */
7564 if (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1)
7567 /* A sample rate of 0 indicates ATR disabled */
7568 if (!adapter
->atr_sample_rate
)
7571 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
7575 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
7576 ixgbe_vlan_strip_enable(adapter
);
7578 ixgbe_vlan_strip_disable(adapter
);
7580 if (changed
& NETIF_F_RXALL
)
7583 netdev
->features
= features
;
7585 ixgbe_do_reset(netdev
);
7590 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
7591 struct net_device
*dev
,
7592 const unsigned char *addr
,
7595 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7598 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7599 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, flags
);
7601 /* Hardware does not support aging addresses so if a
7602 * ndm_state is given only allow permanent addresses
7604 if (ndm
->ndm_state
&& !(ndm
->ndm_state
& NUD_PERMANENT
)) {
7605 pr_info("%s: FDB only supports static addresses\n",
7610 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
7611 u32 rar_uc_entries
= IXGBE_MAX_PF_MACVLANS
;
7613 if (netdev_uc_count(dev
) < rar_uc_entries
)
7614 err
= dev_uc_add_excl(dev
, addr
);
7617 } else if (is_multicast_ether_addr(addr
)) {
7618 err
= dev_mc_add_excl(dev
, addr
);
7623 /* Only return duplicate errors if NLM_F_EXCL is set */
7624 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
7630 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
7631 struct nlmsghdr
*nlh
)
7633 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7634 struct nlattr
*attr
, *br_spec
;
7637 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7640 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
7642 nla_for_each_nested(attr
, br_spec
, rem
) {
7646 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
7649 mode
= nla_get_u16(attr
);
7650 if (mode
== BRIDGE_MODE_VEPA
) {
7652 adapter
->flags2
&= ~IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7653 } else if (mode
== BRIDGE_MODE_VEB
) {
7654 reg
= IXGBE_PFDTXGSWC_VT_LBEN
;
7655 adapter
->flags2
|= IXGBE_FLAG2_BRIDGE_MODE_VEB
;
7659 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, reg
);
7661 e_info(drv
, "enabling bridge mode: %s\n",
7662 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
7668 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
7669 struct net_device
*dev
,
7672 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
7675 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
7678 if (adapter
->flags2
& IXGBE_FLAG2_BRIDGE_MODE_VEB
)
7679 mode
= BRIDGE_MODE_VEB
;
7681 mode
= BRIDGE_MODE_VEPA
;
7683 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
, mode
);
7686 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
7688 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
7689 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
7694 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
7695 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
7697 return ERR_PTR(-EINVAL
);
7700 /* Check for hardware restriction on number of rx/tx queues */
7701 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
7702 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
7704 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7706 return ERR_PTR(-EINVAL
);
7709 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7710 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
7711 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
7712 return ERR_PTR(-EBUSY
);
7714 fwd_adapter
= kcalloc(1, sizeof(struct ixgbe_fwd_adapter
), GFP_KERNEL
);
7716 return ERR_PTR(-ENOMEM
);
7718 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
7719 adapter
->num_rx_pools
++;
7720 set_bit(pool
, &adapter
->fwd_bitmask
);
7721 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7723 /* Enable VMDq flag so device will be set in VM mode */
7724 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
7725 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7726 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
7728 /* Force reinit of ring allocation with VMDQ enabled */
7729 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7732 fwd_adapter
->pool
= pool
;
7733 fwd_adapter
->real_adapter
= adapter
;
7734 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
7737 netif_tx_start_all_queues(vdev
);
7740 /* unwind counter and free adapter struct */
7742 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
7743 clear_bit(pool
, &adapter
->fwd_bitmask
);
7744 adapter
->num_rx_pools
--;
7746 return ERR_PTR(err
);
7749 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
7751 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
7752 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
7755 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
7756 adapter
->num_rx_pools
--;
7758 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
7759 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
7760 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
7761 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
7762 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7763 fwd_adapter
->pool
, adapter
->num_rx_pools
,
7764 fwd_adapter
->rx_base_queue
,
7765 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
7766 adapter
->fwd_bitmask
);
7770 static const struct net_device_ops ixgbe_netdev_ops
= {
7771 .ndo_open
= ixgbe_open
,
7772 .ndo_stop
= ixgbe_close
,
7773 .ndo_start_xmit
= ixgbe_xmit_frame
,
7774 .ndo_select_queue
= ixgbe_select_queue
,
7775 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
7776 .ndo_validate_addr
= eth_validate_addr
,
7777 .ndo_set_mac_address
= ixgbe_set_mac
,
7778 .ndo_change_mtu
= ixgbe_change_mtu
,
7779 .ndo_tx_timeout
= ixgbe_tx_timeout
,
7780 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
7781 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
7782 .ndo_do_ioctl
= ixgbe_ioctl
,
7783 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
7784 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
7785 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
7786 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
7787 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
7788 .ndo_get_stats64
= ixgbe_get_stats64
,
7789 #ifdef CONFIG_IXGBE_DCB
7790 .ndo_setup_tc
= ixgbe_setup_tc
,
7792 #ifdef CONFIG_NET_POLL_CONTROLLER
7793 .ndo_poll_controller
= ixgbe_netpoll
,
7795 #ifdef CONFIG_NET_RX_BUSY_POLL
7796 .ndo_busy_poll
= ixgbe_low_latency_recv
,
7799 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
7800 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
7801 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
7802 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
7803 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
7804 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
7805 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
7806 #endif /* IXGBE_FCOE */
7807 .ndo_set_features
= ixgbe_set_features
,
7808 .ndo_fix_features
= ixgbe_fix_features
,
7809 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
7810 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
7811 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
7812 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
7813 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
7817 * ixgbe_enumerate_functions - Get the number of ports this device has
7818 * @adapter: adapter structure
7820 * This function enumerates the phsyical functions co-located on a single slot,
7821 * in order to determine how many ports a device has. This is most useful in
7822 * determining the required GT/s of PCIe bandwidth necessary for optimal
7825 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
7827 struct list_head
*entry
;
7830 /* Some cards can not use the generic count PCIe functions method,
7831 * because they are behind a parent switch, so we hardcode these with
7832 * the correct number of functions.
7834 if (ixgbe_pcie_from_parent(&adapter
->hw
)) {
7837 list_for_each(entry
, &adapter
->pdev
->bus_list
) {
7838 struct pci_dev
*pdev
=
7839 list_entry(entry
, struct pci_dev
, bus_list
);
7840 /* don't count virtual functions */
7841 if (!pdev
->is_virtfn
)
7850 * ixgbe_wol_supported - Check whether device supports WoL
7851 * @hw: hw specific details
7852 * @device_id: the device ID
7853 * @subdev_id: the subsystem device ID
7855 * This function is used by probe and ethtool to determine
7856 * which devices have WoL support
7859 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
7862 struct ixgbe_hw
*hw
= &adapter
->hw
;
7863 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
7864 int is_wol_supported
= 0;
7866 switch (device_id
) {
7867 case IXGBE_DEV_ID_82599_SFP
:
7868 /* Only these subdevices could supports WOL */
7869 switch (subdevice_id
) {
7870 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
7871 case IXGBE_SUBDEV_ID_82599_560FLR
:
7872 /* only support first port */
7873 if (hw
->bus
.func
!= 0)
7875 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
7876 case IXGBE_SUBDEV_ID_82599_SFP
:
7877 case IXGBE_SUBDEV_ID_82599_RNDC
:
7878 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
7879 case IXGBE_SUBDEV_ID_82599_LOM_SFP
:
7880 is_wol_supported
= 1;
7884 case IXGBE_DEV_ID_82599EN_SFP
:
7885 /* Only this subdevice supports WOL */
7886 switch (subdevice_id
) {
7887 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
7888 is_wol_supported
= 1;
7892 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
7893 /* All except this subdevice support WOL */
7894 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
7895 is_wol_supported
= 1;
7897 case IXGBE_DEV_ID_82599_KX4
:
7898 is_wol_supported
= 1;
7900 case IXGBE_DEV_ID_X540T
:
7901 case IXGBE_DEV_ID_X540T1
:
7902 /* check eeprom to see if enabled wol */
7903 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
7904 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
7905 (hw
->bus
.func
== 0))) {
7906 is_wol_supported
= 1;
7911 return is_wol_supported
;
7915 * ixgbe_probe - Device Initialization Routine
7916 * @pdev: PCI device information struct
7917 * @ent: entry in ixgbe_pci_tbl
7919 * Returns 0 on success, negative on failure
7921 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7922 * The OS initialization, configuring of the adapter private structure,
7923 * and a hardware reset occur.
7925 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
7927 struct net_device
*netdev
;
7928 struct ixgbe_adapter
*adapter
= NULL
;
7929 struct ixgbe_hw
*hw
;
7930 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
7931 static int cards_found
;
7932 int i
, err
, pci_using_dac
, expected_gts
;
7933 unsigned int indices
= MAX_TX_QUEUES
;
7934 u8 part_str
[IXGBE_PBANUM_LENGTH
];
7940 /* Catch broken hardware that put the wrong VF device ID in
7941 * the PCIe SR-IOV capability.
7943 if (pdev
->is_virtfn
) {
7944 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
7945 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
7949 err
= pci_enable_device_mem(pdev
);
7953 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
7956 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
7959 "No usable DMA configuration, aborting\n");
7965 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
7966 IORESOURCE_MEM
), ixgbe_driver_name
);
7969 "pci_request_selected_regions failed 0x%x\n", err
);
7973 pci_enable_pcie_error_reporting(pdev
);
7975 pci_set_master(pdev
);
7976 pci_save_state(pdev
);
7978 if (ii
->mac
== ixgbe_mac_82598EB
) {
7979 #ifdef CONFIG_IXGBE_DCB
7980 /* 8 TC w/ 4 queues per TC */
7981 indices
= 4 * MAX_TRAFFIC_CLASS
;
7983 indices
= IXGBE_MAX_RSS_INDICES
;
7987 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
7990 goto err_alloc_etherdev
;
7993 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7995 adapter
= netdev_priv(netdev
);
7996 pci_set_drvdata(pdev
, adapter
);
7998 adapter
->netdev
= netdev
;
7999 adapter
->pdev
= pdev
;
8002 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
8004 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
8005 pci_resource_len(pdev
, 0));
8006 adapter
->io_addr
= hw
->hw_addr
;
8012 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
8013 ixgbe_set_ethtool_ops(netdev
);
8014 netdev
->watchdog_timeo
= 5 * HZ
;
8015 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
8017 adapter
->bd_number
= cards_found
;
8020 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
8021 hw
->mac
.type
= ii
->mac
;
8024 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
8025 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
8026 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8027 if (!(eec
& (1 << 8)))
8028 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
8031 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
8032 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
8033 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8034 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
8035 hw
->phy
.mdio
.mmds
= 0;
8036 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
8037 hw
->phy
.mdio
.dev
= netdev
;
8038 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
8039 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
8041 ii
->get_invariants(hw
);
8043 /* setup the private structure */
8044 err
= ixgbe_sw_init(adapter
);
8048 /* Make it possible the adapter to be woken up via WOL */
8049 switch (adapter
->hw
.mac
.type
) {
8050 case ixgbe_mac_82599EB
:
8051 case ixgbe_mac_X540
:
8052 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
8059 * If there is a fan on this device and it has failed log the
8062 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
8063 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
8064 if (esdp
& IXGBE_ESDP_SDP1
)
8065 e_crit(probe
, "Fan has stopped, replace the adapter\n");
8068 if (allow_unsupported_sfp
)
8069 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
8071 /* reset_hw fills in the perm_addr as well */
8072 hw
->phy
.reset_if_overtemp
= true;
8073 err
= hw
->mac
.ops
.reset_hw(hw
);
8074 hw
->phy
.reset_if_overtemp
= false;
8075 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
8076 hw
->mac
.type
== ixgbe_mac_82598EB
) {
8078 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
8079 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8080 e_dev_err("Reload the driver after installing a supported module.\n");
8083 e_dev_err("HW Init failed: %d\n", err
);
8087 #ifdef CONFIG_PCI_IOV
8088 /* SR-IOV not supported on the 82598 */
8089 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8092 ixgbe_init_mbx_params_pf(hw
);
8093 memcpy(&hw
->mbx
.ops
, ii
->mbx_ops
, sizeof(hw
->mbx
.ops
));
8094 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
8095 ixgbe_enable_sriov(adapter
);
8099 netdev
->features
= NETIF_F_SG
|
8102 NETIF_F_HW_VLAN_CTAG_TX
|
8103 NETIF_F_HW_VLAN_CTAG_RX
|
8104 NETIF_F_HW_VLAN_CTAG_FILTER
|
8110 netdev
->hw_features
= netdev
->features
| NETIF_F_HW_L2FW_DOFFLOAD
;
8112 switch (adapter
->hw
.mac
.type
) {
8113 case ixgbe_mac_82599EB
:
8114 case ixgbe_mac_X540
:
8115 netdev
->features
|= NETIF_F_SCTP_CSUM
;
8116 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
8123 netdev
->hw_features
|= NETIF_F_RXALL
;
8125 netdev
->vlan_features
|= NETIF_F_TSO
;
8126 netdev
->vlan_features
|= NETIF_F_TSO6
;
8127 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
8128 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
8129 netdev
->vlan_features
|= NETIF_F_SG
;
8131 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
8132 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
8134 #ifdef CONFIG_IXGBE_DCB
8135 netdev
->dcbnl_ops
= &dcbnl_ops
;
8139 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
8140 unsigned int fcoe_l
;
8142 if (hw
->mac
.ops
.get_device_caps
) {
8143 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
8144 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
8145 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
8149 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
8150 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
8152 netdev
->features
|= NETIF_F_FSO
|
8155 netdev
->vlan_features
|= NETIF_F_FSO
|
8159 #endif /* IXGBE_FCOE */
8160 if (pci_using_dac
) {
8161 netdev
->features
|= NETIF_F_HIGHDMA
;
8162 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
8165 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
8166 netdev
->hw_features
|= NETIF_F_LRO
;
8167 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8168 netdev
->features
|= NETIF_F_LRO
;
8170 /* make sure the EEPROM is good */
8171 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
8172 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8177 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
8179 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
8180 e_dev_err("invalid MAC address\n");
8185 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
8186 (unsigned long) adapter
);
8188 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
8189 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
8191 err
= ixgbe_init_interrupt_scheme(adapter
);
8195 /* WOL not supported for all devices */
8197 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
8198 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
8199 pdev
->subsystem_device
);
8200 if (hw
->wol_enabled
)
8201 adapter
->wol
= IXGBE_WUFC_MAG
;
8203 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
8205 /* save off EEPROM version number */
8206 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
8207 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
8209 /* pick up the PCI bus settings for reporting later */
8210 hw
->mac
.ops
.get_bus_info(hw
);
8211 if (ixgbe_pcie_from_parent(hw
))
8212 ixgbe_get_parent_bus_info(adapter
);
8214 /* calculate the expected PCIe bandwidth required for optimal
8215 * performance. Note that some older parts will never have enough
8216 * bandwidth due to being older generation PCIe parts. We clamp these
8217 * parts to ensure no warning is displayed if it can't be fixed.
8219 switch (hw
->mac
.type
) {
8220 case ixgbe_mac_82598EB
:
8221 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
8224 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
8227 ixgbe_check_minimum_link(adapter
, expected_gts
);
8229 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
8231 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
8232 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
8233 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8234 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
8237 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8238 hw
->mac
.type
, hw
->phy
.type
, part_str
);
8240 e_dev_info("%pM\n", netdev
->dev_addr
);
8242 /* reset the hardware with the new settings */
8243 err
= hw
->mac
.ops
.start_hw(hw
);
8244 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
8245 /* We are running on a pre-production device, log a warning */
8246 e_dev_warn("This device is a pre-production adapter/LOM. "
8247 "Please be aware there may be issues associated "
8248 "with your hardware. If you are experiencing "
8249 "problems please contact your Intel or hardware "
8250 "representative who provided you with this "
8253 strcpy(netdev
->name
, "eth%d");
8254 err
= register_netdev(netdev
);
8258 /* power down the optics for 82599 SFP+ fiber */
8259 if (hw
->mac
.ops
.disable_tx_laser
)
8260 hw
->mac
.ops
.disable_tx_laser(hw
);
8262 /* carrier off reporting is important to ethtool even BEFORE open */
8263 netif_carrier_off(netdev
);
8265 #ifdef CONFIG_IXGBE_DCA
8266 if (dca_add_requester(&pdev
->dev
) == 0) {
8267 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
8268 ixgbe_setup_dca(adapter
);
8271 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
8272 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
8273 for (i
= 0; i
< adapter
->num_vfs
; i
++)
8274 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
8277 /* firmware requires driver version to be 0xFFFFFFFF
8278 * since os does not support feature
8280 if (hw
->mac
.ops
.set_fw_drv_ver
)
8281 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
8284 /* add san mac addr to netdev */
8285 ixgbe_add_sanmac_netdev(netdev
);
8287 e_dev_info("%s\n", ixgbe_default_device_descr
);
8290 #ifdef CONFIG_IXGBE_HWMON
8291 if (ixgbe_sysfs_init(adapter
))
8292 e_err(probe
, "failed to allocate sysfs resources\n");
8293 #endif /* CONFIG_IXGBE_HWMON */
8295 ixgbe_dbg_adapter_init(adapter
);
8297 /* Need link setup for MNG FW, else wait for IXGBE_UP */
8298 if (ixgbe_mng_enabled(hw
) && hw
->mac
.ops
.setup_link
)
8299 hw
->mac
.ops
.setup_link(hw
,
8300 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
8306 ixgbe_release_hw_control(adapter
);
8307 ixgbe_clear_interrupt_scheme(adapter
);
8309 ixgbe_disable_sriov(adapter
);
8310 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
8311 iounmap(adapter
->io_addr
);
8313 free_netdev(netdev
);
8315 pci_release_selected_regions(pdev
,
8316 pci_select_bars(pdev
, IORESOURCE_MEM
));
8319 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
8320 pci_disable_device(pdev
);
8325 * ixgbe_remove - Device Removal Routine
8326 * @pdev: PCI device information struct
8328 * ixgbe_remove is called by the PCI subsystem to alert the driver
8329 * that it should release a PCI device. The could be caused by a
8330 * Hot-Plug event, or because the driver is going to be removed from
8333 static void ixgbe_remove(struct pci_dev
*pdev
)
8335 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8336 struct net_device
*netdev
= adapter
->netdev
;
8338 ixgbe_dbg_adapter_exit(adapter
);
8340 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
8341 cancel_work_sync(&adapter
->service_task
);
8344 #ifdef CONFIG_IXGBE_DCA
8345 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
8346 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
8347 dca_remove_requester(&pdev
->dev
);
8348 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
8352 #ifdef CONFIG_IXGBE_HWMON
8353 ixgbe_sysfs_exit(adapter
);
8354 #endif /* CONFIG_IXGBE_HWMON */
8356 /* remove the added san mac */
8357 ixgbe_del_sanmac_netdev(netdev
);
8359 if (netdev
->reg_state
== NETREG_REGISTERED
)
8360 unregister_netdev(netdev
);
8362 #ifdef CONFIG_PCI_IOV
8364 * Only disable SR-IOV on unload if the user specified the now
8365 * deprecated max_vfs module parameter.
8368 ixgbe_disable_sriov(adapter
);
8370 ixgbe_clear_interrupt_scheme(adapter
);
8372 ixgbe_release_hw_control(adapter
);
8375 kfree(adapter
->ixgbe_ieee_pfc
);
8376 kfree(adapter
->ixgbe_ieee_ets
);
8379 iounmap(adapter
->io_addr
);
8380 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
8383 e_dev_info("complete\n");
8385 free_netdev(netdev
);
8387 pci_disable_pcie_error_reporting(pdev
);
8389 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
8390 pci_disable_device(pdev
);
8394 * ixgbe_io_error_detected - called when PCI error is detected
8395 * @pdev: Pointer to PCI device
8396 * @state: The current pci connection state
8398 * This function is called after a PCI bus error affecting
8399 * this device has been detected.
8401 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
8402 pci_channel_state_t state
)
8404 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8405 struct net_device
*netdev
= adapter
->netdev
;
8407 #ifdef CONFIG_PCI_IOV
8408 struct ixgbe_hw
*hw
= &adapter
->hw
;
8409 struct pci_dev
*bdev
, *vfdev
;
8410 u32 dw0
, dw1
, dw2
, dw3
;
8412 u16 req_id
, pf_func
;
8414 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
8415 adapter
->num_vfs
== 0)
8416 goto skip_bad_vf_detection
;
8418 bdev
= pdev
->bus
->self
;
8419 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
8420 bdev
= bdev
->bus
->self
;
8423 goto skip_bad_vf_detection
;
8425 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
8427 goto skip_bad_vf_detection
;
8429 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
8430 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
8431 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
8432 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
8433 if (ixgbe_removed(hw
->hw_addr
))
8434 goto skip_bad_vf_detection
;
8437 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8438 if (!(req_id
& 0x0080))
8439 goto skip_bad_vf_detection
;
8441 pf_func
= req_id
& 0x01;
8442 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
8443 unsigned int device_id
;
8445 vf
= (req_id
& 0x7F) >> 1;
8446 e_dev_err("VF %d has caused a PCIe error\n", vf
);
8447 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8448 "%8.8x\tdw3: %8.8x\n",
8449 dw0
, dw1
, dw2
, dw3
);
8450 switch (adapter
->hw
.mac
.type
) {
8451 case ixgbe_mac_82599EB
:
8452 device_id
= IXGBE_82599_VF_DEVICE_ID
;
8454 case ixgbe_mac_X540
:
8455 device_id
= IXGBE_X540_VF_DEVICE_ID
;
8462 /* Find the pci device of the offending VF */
8463 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
8465 if (vfdev
->devfn
== (req_id
& 0xFF))
8467 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
8471 * There's a slim chance the VF could have been hot plugged,
8472 * so if it is no longer present we don't need to issue the
8473 * VFLR. Just clean up the AER in that case.
8476 e_dev_err("Issuing VFLR to VF %d\n", vf
);
8477 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
8478 /* Free device reference count */
8482 pci_cleanup_aer_uncorrect_error_status(pdev
);
8486 * Even though the error may have occurred on the other port
8487 * we still need to increment the vf error reference count for
8488 * both ports because the I/O resume function will be called
8491 adapter
->vferr_refcount
++;
8493 return PCI_ERS_RESULT_RECOVERED
;
8495 skip_bad_vf_detection
:
8496 #endif /* CONFIG_PCI_IOV */
8498 netif_device_detach(netdev
);
8500 if (state
== pci_channel_io_perm_failure
) {
8502 return PCI_ERS_RESULT_DISCONNECT
;
8505 if (netif_running(netdev
))
8506 ixgbe_down(adapter
);
8508 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
8509 pci_disable_device(pdev
);
8512 /* Request a slot reset. */
8513 return PCI_ERS_RESULT_NEED_RESET
;
8517 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8518 * @pdev: Pointer to PCI device
8520 * Restart the card from scratch, as if from a cold-boot.
8522 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
8524 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8525 pci_ers_result_t result
;
8528 if (pci_enable_device_mem(pdev
)) {
8529 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
8530 result
= PCI_ERS_RESULT_DISCONNECT
;
8532 smp_mb__before_clear_bit();
8533 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
8534 adapter
->hw
.hw_addr
= adapter
->io_addr
;
8535 pci_set_master(pdev
);
8536 pci_restore_state(pdev
);
8537 pci_save_state(pdev
);
8539 pci_wake_from_d3(pdev
, false);
8541 ixgbe_reset(adapter
);
8542 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
8543 result
= PCI_ERS_RESULT_RECOVERED
;
8546 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
8548 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8549 "failed 0x%0x\n", err
);
8550 /* non-fatal, continue */
8557 * ixgbe_io_resume - called when traffic can start flowing again.
8558 * @pdev: Pointer to PCI device
8560 * This callback is called when the error recovery driver tells us that
8561 * its OK to resume normal operation.
8563 static void ixgbe_io_resume(struct pci_dev
*pdev
)
8565 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
8566 struct net_device
*netdev
= adapter
->netdev
;
8568 #ifdef CONFIG_PCI_IOV
8569 if (adapter
->vferr_refcount
) {
8570 e_info(drv
, "Resuming after VF err\n");
8571 adapter
->vferr_refcount
--;
8576 if (netif_running(netdev
))
8579 netif_device_attach(netdev
);
8582 static const struct pci_error_handlers ixgbe_err_handler
= {
8583 .error_detected
= ixgbe_io_error_detected
,
8584 .slot_reset
= ixgbe_io_slot_reset
,
8585 .resume
= ixgbe_io_resume
,
8588 static struct pci_driver ixgbe_driver
= {
8589 .name
= ixgbe_driver_name
,
8590 .id_table
= ixgbe_pci_tbl
,
8591 .probe
= ixgbe_probe
,
8592 .remove
= ixgbe_remove
,
8594 .suspend
= ixgbe_suspend
,
8595 .resume
= ixgbe_resume
,
8597 .shutdown
= ixgbe_shutdown
,
8598 .sriov_configure
= ixgbe_pci_sriov_configure
,
8599 .err_handler
= &ixgbe_err_handler
8603 * ixgbe_init_module - Driver Registration Routine
8605 * ixgbe_init_module is the first routine called when the driver is
8606 * loaded. All it does is register with the PCI subsystem.
8608 static int __init
ixgbe_init_module(void)
8611 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
8612 pr_info("%s\n", ixgbe_copyright
);
8616 ret
= pci_register_driver(&ixgbe_driver
);
8622 #ifdef CONFIG_IXGBE_DCA
8623 dca_register_notify(&dca_notifier
);
8629 module_init(ixgbe_init_module
);
8632 * ixgbe_exit_module - Driver Exit Cleanup Routine
8634 * ixgbe_exit_module is called just before the driver is removed
8637 static void __exit
ixgbe_exit_module(void)
8639 #ifdef CONFIG_IXGBE_DCA
8640 dca_unregister_notify(&dca_notifier
);
8642 pci_unregister_driver(&ixgbe_driver
);
8646 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8649 #ifdef CONFIG_IXGBE_DCA
8650 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
8655 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
8656 __ixgbe_notify_dca
);
8658 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
8661 #endif /* CONFIG_IXGBE_DCA */
8663 module_exit(ixgbe_exit_module
);