1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/prefetch.h>
48 #include <scsi/fc/fc_fcoe.h>
51 #include "ixgbe_common.h"
52 #include "ixgbe_dcb_82599.h"
53 #include "ixgbe_sriov.h"
55 char ixgbe_driver_name
[] = "ixgbe";
56 static const char ixgbe_driver_string
[] =
57 "Intel(R) 10 Gigabit PCI Express Network Driver";
59 char ixgbe_default_device_descr
[] =
60 "Intel(R) 10 Gigabit Network Connection";
62 static char ixgbe_default_device_descr
[] =
63 "Intel(R) 10 Gigabit Network Connection";
68 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
69 __stringify(BUILD) "-k"
70 const char ixgbe_driver_version
[] = DRV_VERSION
;
71 static const char ixgbe_copyright
[] =
72 "Copyright (c) 1999-2012 Intel Corporation.";
74 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
75 [board_82598
] = &ixgbe_82598_info
,
76 [board_82599
] = &ixgbe_82599_info
,
77 [board_X540
] = &ixgbe_X540_info
,
80 /* ixgbe_pci_tbl - PCI Device ID Table
82 * Wildcard entries (PCI_ANY_ID) should come last
83 * Last entry must be all 0s
85 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
86 * Class, Class Mask, private data (not used) }
88 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl
) = {
89 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
90 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
91 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
92 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
93 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
94 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
95 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
96 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
97 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
125 static struct notifier_block dca_notifier
= {
126 .notifier_call
= ixgbe_notify_dca
,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs
;
134 module_param(max_vfs
, uint
, 0);
135 MODULE_PARM_DESC(max_vfs
,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp
;
140 module_param(allow_unsupported_sfp
, uint
, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp
,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug
= -1;
146 module_param(debug
, int, 0);
147 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION
);
154 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
156 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
157 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
158 schedule_work(&adapter
->service_task
);
161 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
163 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
165 /* flush memory to make sure state is correct before next watchdog */
166 smp_mb__before_clear_bit();
167 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
170 struct ixgbe_reg_info
{
175 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
177 /* General Registers */
178 {IXGBE_CTRL
, "CTRL"},
179 {IXGBE_STATUS
, "STATUS"},
180 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
182 /* Interrupt Registers */
183 {IXGBE_EICR
, "EICR"},
186 {IXGBE_SRRCTL(0), "SRRCTL"},
187 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
188 {IXGBE_RDLEN(0), "RDLEN"},
189 {IXGBE_RDH(0), "RDH"},
190 {IXGBE_RDT(0), "RDT"},
191 {IXGBE_RXDCTL(0), "RXDCTL"},
192 {IXGBE_RDBAL(0), "RDBAL"},
193 {IXGBE_RDBAH(0), "RDBAH"},
196 {IXGBE_TDBAL(0), "TDBAL"},
197 {IXGBE_TDBAH(0), "TDBAH"},
198 {IXGBE_TDLEN(0), "TDLEN"},
199 {IXGBE_TDH(0), "TDH"},
200 {IXGBE_TDT(0), "TDT"},
201 {IXGBE_TXDCTL(0), "TXDCTL"},
203 /* List Terminator */
209 * ixgbe_regdump - register printout routine
211 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
217 switch (reginfo
->ofs
) {
218 case IXGBE_SRRCTL(0):
219 for (i
= 0; i
< 64; i
++)
220 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
222 case IXGBE_DCA_RXCTRL(0):
223 for (i
= 0; i
< 64; i
++)
224 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
227 for (i
= 0; i
< 64; i
++)
228 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
231 for (i
= 0; i
< 64; i
++)
232 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
235 for (i
= 0; i
< 64; i
++)
236 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
238 case IXGBE_RXDCTL(0):
239 for (i
= 0; i
< 64; i
++)
240 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
243 for (i
= 0; i
< 64; i
++)
244 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
247 for (i
= 0; i
< 64; i
++)
248 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
251 for (i
= 0; i
< 64; i
++)
252 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
255 for (i
= 0; i
< 64; i
++)
256 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
259 for (i
= 0; i
< 64; i
++)
260 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
263 for (i
= 0; i
< 64; i
++)
264 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
267 for (i
= 0; i
< 64; i
++)
268 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
270 case IXGBE_TXDCTL(0):
271 for (i
= 0; i
< 64; i
++)
272 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
275 pr_info("%-15s %08x\n", reginfo
->name
,
276 IXGBE_READ_REG(hw
, reginfo
->ofs
));
280 for (i
= 0; i
< 8; i
++) {
281 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
282 pr_err("%-15s", rname
);
283 for (j
= 0; j
< 8; j
++)
284 pr_cont(" %08x", regs
[i
*8+j
]);
291 * ixgbe_dump - Print registers, tx-rings and rx-rings
293 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
295 struct net_device
*netdev
= adapter
->netdev
;
296 struct ixgbe_hw
*hw
= &adapter
->hw
;
297 struct ixgbe_reg_info
*reginfo
;
299 struct ixgbe_ring
*tx_ring
;
300 struct ixgbe_tx_buffer
*tx_buffer
;
301 union ixgbe_adv_tx_desc
*tx_desc
;
302 struct my_u0
{ u64 a
; u64 b
; } *u0
;
303 struct ixgbe_ring
*rx_ring
;
304 union ixgbe_adv_rx_desc
*rx_desc
;
305 struct ixgbe_rx_buffer
*rx_buffer_info
;
309 if (!netif_msg_hw(adapter
))
312 /* Print netdevice Info */
314 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
315 pr_info("Device Name state "
316 "trans_start last_rx\n");
317 pr_info("%-15s %016lX %016lX %016lX\n",
324 /* Print Registers */
325 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
326 pr_info(" Register Name Value\n");
327 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
328 reginfo
->name
; reginfo
++) {
329 ixgbe_regdump(hw
, reginfo
);
332 /* Print TX Ring Summary */
333 if (!netdev
|| !netif_running(netdev
))
336 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
337 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
338 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
339 tx_ring
= adapter
->tx_ring
[n
];
340 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
341 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
342 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
343 (u64
)dma_unmap_addr(tx_buffer
, dma
),
344 dma_unmap_len(tx_buffer
, len
),
345 tx_buffer
->next_to_watch
,
346 (u64
)tx_buffer
->time_stamp
);
350 if (!netif_msg_tx_done(adapter
))
351 goto rx_ring_summary
;
353 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
355 /* Transmit Descriptor Formats
357 * Advanced Transmit Descriptor
358 * +--------------------------------------------------------------+
359 * 0 | Buffer Address [63:0] |
360 * +--------------------------------------------------------------+
361 * 8 | PAYLEN | PORTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
362 * +--------------------------------------------------------------+
363 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
366 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
367 tx_ring
= adapter
->tx_ring
[n
];
368 pr_info("------------------------------------\n");
369 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
370 pr_info("------------------------------------\n");
371 pr_info("T [desc] [address 63:0 ] "
372 "[PlPOIdStDDt Ln] [bi->dma ] "
373 "leng ntw timestamp bi->skb\n");
375 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
376 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
377 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
378 u0
= (struct my_u0
*)tx_desc
;
379 pr_info("T [0x%03X] %016llX %016llX %016llX"
380 " %04X %p %016llX %p", i
,
383 (u64
)dma_unmap_addr(tx_buffer
, dma
),
384 dma_unmap_len(tx_buffer
, len
),
385 tx_buffer
->next_to_watch
,
386 (u64
)tx_buffer
->time_stamp
,
388 if (i
== tx_ring
->next_to_use
&&
389 i
== tx_ring
->next_to_clean
)
391 else if (i
== tx_ring
->next_to_use
)
393 else if (i
== tx_ring
->next_to_clean
)
398 if (netif_msg_pktdata(adapter
) &&
399 dma_unmap_len(tx_buffer
, len
) != 0)
400 print_hex_dump(KERN_INFO
, "",
401 DUMP_PREFIX_ADDRESS
, 16, 1,
402 phys_to_virt(dma_unmap_addr(tx_buffer
,
404 dma_unmap_len(tx_buffer
, len
),
409 /* Print RX Rings Summary */
411 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
412 pr_info("Queue [NTU] [NTC]\n");
413 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
414 rx_ring
= adapter
->rx_ring
[n
];
415 pr_info("%5d %5X %5X\n",
416 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
420 if (!netif_msg_rx_status(adapter
))
423 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
425 /* Advanced Receive Descriptor (Read) Format
427 * +-----------------------------------------------------+
428 * 0 | Packet Buffer Address [63:1] |A0/NSE|
429 * +----------------------------------------------+------+
430 * 8 | Header Buffer Address [63:1] | DD |
431 * +-----------------------------------------------------+
434 * Advanced Receive Descriptor (Write-Back) Format
436 * 63 48 47 32 31 30 21 20 16 15 4 3 0
437 * +------------------------------------------------------+
438 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
439 * | Checksum Ident | | | | Type | Type |
440 * +------------------------------------------------------+
441 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
442 * +------------------------------------------------------+
443 * 63 48 47 32 31 20 19 0
445 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
446 rx_ring
= adapter
->rx_ring
[n
];
447 pr_info("------------------------------------\n");
448 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
449 pr_info("------------------------------------\n");
450 pr_info("R [desc] [ PktBuf A0] "
451 "[ HeadBuf DD] [bi->dma ] [bi->skb] "
452 "<-- Adv Rx Read format\n");
453 pr_info("RWB[desc] [PcsmIpSHl PtRs] "
454 "[vl er S cks ln] ---------------- [bi->skb] "
455 "<-- Adv Rx Write-Back format\n");
457 for (i
= 0; i
< rx_ring
->count
; i
++) {
458 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
459 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
460 u0
= (struct my_u0
*)rx_desc
;
461 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
462 if (staterr
& IXGBE_RXD_STAT_DD
) {
463 /* Descriptor Done */
464 pr_info("RWB[0x%03X] %016llX "
465 "%016llX ---------------- %p", i
,
468 rx_buffer_info
->skb
);
470 pr_info("R [0x%03X] %016llX "
471 "%016llX %016llX %p", i
,
474 (u64
)rx_buffer_info
->dma
,
475 rx_buffer_info
->skb
);
477 if (netif_msg_pktdata(adapter
)) {
478 print_hex_dump(KERN_INFO
, "",
479 DUMP_PREFIX_ADDRESS
, 16, 1,
480 phys_to_virt(rx_buffer_info
->dma
),
481 ixgbe_rx_bufsz(rx_ring
), true);
485 if (i
== rx_ring
->next_to_use
)
487 else if (i
== rx_ring
->next_to_clean
)
499 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
503 /* Let firmware take over control of h/w */
504 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
505 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
506 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
509 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
513 /* Let firmware know the driver has taken over */
514 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
515 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
516 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
520 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
521 * @adapter: pointer to adapter struct
522 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
523 * @queue: queue to map the corresponding interrupt to
524 * @msix_vector: the vector to map to the corresponding queue
527 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
528 u8 queue
, u8 msix_vector
)
531 struct ixgbe_hw
*hw
= &adapter
->hw
;
532 switch (hw
->mac
.type
) {
533 case ixgbe_mac_82598EB
:
534 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
537 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
538 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
539 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
540 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
541 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
543 case ixgbe_mac_82599EB
:
545 if (direction
== -1) {
547 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
548 index
= ((queue
& 1) * 8);
549 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
550 ivar
&= ~(0xFF << index
);
551 ivar
|= (msix_vector
<< index
);
552 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
555 /* tx or rx causes */
556 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
557 index
= ((16 * (queue
& 1)) + (8 * direction
));
558 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
559 ivar
&= ~(0xFF << index
);
560 ivar
|= (msix_vector
<< index
);
561 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
569 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
574 switch (adapter
->hw
.mac
.type
) {
575 case ixgbe_mac_82598EB
:
576 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
577 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
579 case ixgbe_mac_82599EB
:
581 mask
= (qmask
& 0xFFFFFFFF);
582 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
583 mask
= (qmask
>> 32);
584 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
591 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
592 struct ixgbe_tx_buffer
*tx_buffer
)
594 if (tx_buffer
->skb
) {
595 dev_kfree_skb_any(tx_buffer
->skb
);
596 if (dma_unmap_len(tx_buffer
, len
))
597 dma_unmap_single(ring
->dev
,
598 dma_unmap_addr(tx_buffer
, dma
),
599 dma_unmap_len(tx_buffer
, len
),
601 } else if (dma_unmap_len(tx_buffer
, len
)) {
602 dma_unmap_page(ring
->dev
,
603 dma_unmap_addr(tx_buffer
, dma
),
604 dma_unmap_len(tx_buffer
, len
),
607 tx_buffer
->next_to_watch
= NULL
;
608 tx_buffer
->skb
= NULL
;
609 dma_unmap_len_set(tx_buffer
, len
, 0);
610 /* tx_buffer must be completely set up in the transmit path */
613 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
615 struct ixgbe_hw
*hw
= &adapter
->hw
;
616 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
620 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
621 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
624 switch (hw
->mac
.type
) {
625 case ixgbe_mac_82598EB
:
626 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
629 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
631 hwstats
->lxoffrxc
+= data
;
633 /* refill credits (no tx hang) if we received xoff */
637 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
638 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
639 &adapter
->tx_ring
[i
]->state
);
642 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
644 struct ixgbe_hw
*hw
= &adapter
->hw
;
645 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
648 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
650 if (adapter
->ixgbe_ieee_pfc
)
651 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
653 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
654 ixgbe_update_xoff_rx_lfc(adapter
);
658 /* update stats for each tc, only valid with PFC enabled */
659 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
660 switch (hw
->mac
.type
) {
661 case ixgbe_mac_82598EB
:
662 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
665 xoff
[i
] = IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
667 hwstats
->pxoffrxc
[i
] += xoff
[i
];
670 /* disarm tx queues that have received xoff frames */
671 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
672 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
673 u8 tc
= tx_ring
->dcb_tc
;
676 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
680 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
682 return ring
->stats
.packets
;
685 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
687 struct ixgbe_adapter
*adapter
= netdev_priv(ring
->netdev
);
688 struct ixgbe_hw
*hw
= &adapter
->hw
;
690 u32 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
691 u32 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
694 return (head
< tail
) ?
695 tail
- head
: (tail
+ ring
->count
- head
);
700 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
702 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
703 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
704 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
707 clear_check_for_tx_hang(tx_ring
);
710 * Check for a hung queue, but be thorough. This verifies
711 * that a transmit has been completed since the previous
712 * check AND there is at least one packet pending. The
713 * ARMED bit is set to indicate a potential hang. The
714 * bit is cleared if a pause frame is received to remove
715 * false hang detection due to PFC or 802.3x frames. By
716 * requiring this to fail twice we avoid races with
717 * pfc clearing the ARMED bit and conditions where we
718 * run the check_tx_hang logic with a transmit completion
719 * pending but without time to complete it yet.
721 if ((tx_done_old
== tx_done
) && tx_pending
) {
722 /* make sure it is true for two checks in a row */
723 ret
= test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
726 /* update completed stats and continue */
727 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
728 /* reset the countdown */
729 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
736 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
737 * @adapter: driver private struct
739 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
742 /* Do the reset outside of interrupt context */
743 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
744 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
745 ixgbe_service_event_schedule(adapter
);
750 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
751 * @q_vector: structure containing interrupt and ring information
752 * @tx_ring: tx ring to clean
754 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
755 struct ixgbe_ring
*tx_ring
)
757 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
758 struct ixgbe_tx_buffer
*tx_buffer
;
759 union ixgbe_adv_tx_desc
*tx_desc
;
760 unsigned int total_bytes
= 0, total_packets
= 0;
761 unsigned int budget
= q_vector
->tx
.work_limit
;
762 unsigned int i
= tx_ring
->next_to_clean
;
764 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
767 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
768 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
772 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
774 /* if next_to_watch is not set then there is no work pending */
778 /* prevent any other reads prior to eop_desc */
781 /* if DD is not set pending work has not been completed */
782 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
785 /* clear next_to_watch to prevent false hangs */
786 tx_buffer
->next_to_watch
= NULL
;
788 /* update the statistics for this packet */
789 total_bytes
+= tx_buffer
->bytecount
;
790 total_packets
+= tx_buffer
->gso_segs
;
792 #ifdef CONFIG_IXGBE_PTP
793 if (unlikely(tx_buffer
->tx_flags
& IXGBE_TX_FLAGS_TSTAMP
))
794 ixgbe_ptp_tx_hwtstamp(q_vector
, tx_buffer
->skb
);
798 dev_kfree_skb_any(tx_buffer
->skb
);
800 /* unmap skb header data */
801 dma_unmap_single(tx_ring
->dev
,
802 dma_unmap_addr(tx_buffer
, dma
),
803 dma_unmap_len(tx_buffer
, len
),
806 /* clear tx_buffer data */
807 tx_buffer
->skb
= NULL
;
808 dma_unmap_len_set(tx_buffer
, len
, 0);
810 /* unmap remaining buffers */
811 while (tx_desc
!= eop_desc
) {
817 tx_buffer
= tx_ring
->tx_buffer_info
;
818 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
821 /* unmap any remaining paged data */
822 if (dma_unmap_len(tx_buffer
, len
)) {
823 dma_unmap_page(tx_ring
->dev
,
824 dma_unmap_addr(tx_buffer
, dma
),
825 dma_unmap_len(tx_buffer
, len
),
827 dma_unmap_len_set(tx_buffer
, len
, 0);
831 /* move us one more past the eop_desc for start of next pkt */
837 tx_buffer
= tx_ring
->tx_buffer_info
;
838 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
841 /* issue prefetch for next Tx descriptor */
844 /* update budget accounting */
846 } while (likely(budget
));
849 tx_ring
->next_to_clean
= i
;
850 u64_stats_update_begin(&tx_ring
->syncp
);
851 tx_ring
->stats
.bytes
+= total_bytes
;
852 tx_ring
->stats
.packets
+= total_packets
;
853 u64_stats_update_end(&tx_ring
->syncp
);
854 q_vector
->tx
.total_bytes
+= total_bytes
;
855 q_vector
->tx
.total_packets
+= total_packets
;
857 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
858 /* schedule immediate reset if we believe we hung */
859 struct ixgbe_hw
*hw
= &adapter
->hw
;
860 e_err(drv
, "Detected Tx Unit Hang\n"
862 " TDH, TDT <%x>, <%x>\n"
863 " next_to_use <%x>\n"
864 " next_to_clean <%x>\n"
865 "tx_buffer_info[next_to_clean]\n"
866 " time_stamp <%lx>\n"
868 tx_ring
->queue_index
,
869 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
870 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
871 tx_ring
->next_to_use
, i
,
872 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
874 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
877 "tx hang %d detected on queue %d, resetting adapter\n",
878 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
880 /* schedule immediate reset if we believe we hung */
881 ixgbe_tx_timeout_reset(adapter
);
883 /* the adapter is about to reset, no point in enabling stuff */
887 netdev_tx_completed_queue(txring_txq(tx_ring
),
888 total_packets
, total_bytes
);
890 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
891 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
892 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
893 /* Make sure that anybody stopping the queue after this
894 * sees the new next_to_clean.
897 if (__netif_subqueue_stopped(tx_ring
->netdev
,
898 tx_ring
->queue_index
)
899 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
900 netif_wake_subqueue(tx_ring
->netdev
,
901 tx_ring
->queue_index
);
902 ++tx_ring
->tx_stats
.restart_queue
;
909 #ifdef CONFIG_IXGBE_DCA
910 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
911 struct ixgbe_ring
*tx_ring
,
914 struct ixgbe_hw
*hw
= &adapter
->hw
;
915 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
918 switch (hw
->mac
.type
) {
919 case ixgbe_mac_82598EB
:
920 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
922 case ixgbe_mac_82599EB
:
924 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
925 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
928 /* for unknown hardware do not write register */
933 * We can enable relaxed ordering for reads, but not writes when
934 * DCA is enabled. This is due to a known issue in some chipsets
935 * which will cause the DCA tag to be cleared.
937 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
938 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
939 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
941 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
944 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
945 struct ixgbe_ring
*rx_ring
,
948 struct ixgbe_hw
*hw
= &adapter
->hw
;
949 u32 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
950 u8 reg_idx
= rx_ring
->reg_idx
;
953 switch (hw
->mac
.type
) {
954 case ixgbe_mac_82599EB
:
956 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
963 * We can enable relaxed ordering for reads, but not writes when
964 * DCA is enabled. This is due to a known issue in some chipsets
965 * which will cause the DCA tag to be cleared.
967 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
968 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
969 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
971 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
974 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
976 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
977 struct ixgbe_ring
*ring
;
980 if (q_vector
->cpu
== cpu
)
983 ixgbe_for_each_ring(ring
, q_vector
->tx
)
984 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
986 ixgbe_for_each_ring(ring
, q_vector
->rx
)
987 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
994 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
998 if (!(adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
))
1001 /* always use CB2 mode, difference is masked in the CB driver */
1002 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 2);
1004 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1005 adapter
->q_vector
[i
]->cpu
= -1;
1006 ixgbe_update_dca(adapter
->q_vector
[i
]);
1010 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1012 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1013 unsigned long event
= *(unsigned long *)data
;
1015 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1019 case DCA_PROVIDER_ADD
:
1020 /* if we're already enabled, don't do it again */
1021 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1023 if (dca_add_requester(dev
) == 0) {
1024 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1025 ixgbe_setup_dca(adapter
);
1028 /* Fall Through since DCA is disabled. */
1029 case DCA_PROVIDER_REMOVE
:
1030 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1031 dca_remove_requester(dev
);
1032 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1033 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
1041 #endif /* CONFIG_IXGBE_DCA */
1042 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1043 union ixgbe_adv_rx_desc
*rx_desc
,
1044 struct sk_buff
*skb
)
1046 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
1047 skb
->rxhash
= le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
);
1052 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1053 * @ring: structure containing ring specific data
1054 * @rx_desc: advanced rx descriptor
1056 * Returns : true if it is FCoE pkt
1058 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1059 union ixgbe_adv_rx_desc
*rx_desc
)
1061 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1063 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1064 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1065 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1066 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1069 #endif /* IXGBE_FCOE */
1071 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1072 * @ring: structure containing ring specific data
1073 * @rx_desc: current Rx descriptor being processed
1074 * @skb: skb currently being received and modified
1076 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1077 union ixgbe_adv_rx_desc
*rx_desc
,
1078 struct sk_buff
*skb
)
1080 skb_checksum_none_assert(skb
);
1082 /* Rx csum disabled */
1083 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1086 /* if IP and error */
1087 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1088 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1089 ring
->rx_stats
.csum_err
++;
1093 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1096 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1097 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1100 * 82599 errata, UDP frames with a 0 checksum can be marked as
1103 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1104 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1107 ring
->rx_stats
.csum_err
++;
1111 /* It must be a TCP or UDP packet with a valid checksum */
1112 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1115 static inline void ixgbe_release_rx_desc(struct ixgbe_ring
*rx_ring
, u32 val
)
1117 rx_ring
->next_to_use
= val
;
1119 /* update next to alloc since we have filled the ring */
1120 rx_ring
->next_to_alloc
= val
;
1122 * Force memory writes to complete before letting h/w
1123 * know there are new descriptors to fetch. (Only
1124 * applicable for weak-ordered memory model archs,
1128 writel(val
, rx_ring
->tail
);
1131 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1132 struct ixgbe_rx_buffer
*bi
)
1134 struct page
*page
= bi
->page
;
1135 dma_addr_t dma
= bi
->dma
;
1137 /* since we are recycling buffers we should seldom need to alloc */
1141 /* alloc new page for storage */
1142 if (likely(!page
)) {
1143 page
= alloc_pages(GFP_ATOMIC
| __GFP_COLD
| __GFP_COMP
,
1144 ixgbe_rx_pg_order(rx_ring
));
1145 if (unlikely(!page
)) {
1146 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1152 /* map page for use */
1153 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1154 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1157 * if mapping failed free memory back to system since
1158 * there isn't much point in holding memory we can't use
1160 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1161 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1164 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1169 bi
->page_offset
^= ixgbe_rx_bufsz(rx_ring
);
1175 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1176 * @rx_ring: ring to place buffers on
1177 * @cleaned_count: number of buffers to replace
1179 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1181 union ixgbe_adv_rx_desc
*rx_desc
;
1182 struct ixgbe_rx_buffer
*bi
;
1183 u16 i
= rx_ring
->next_to_use
;
1189 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1190 bi
= &rx_ring
->rx_buffer_info
[i
];
1191 i
-= rx_ring
->count
;
1194 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1198 * Refresh the desc even if buffer_addrs didn't change
1199 * because each write-back erases this info.
1201 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1207 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1208 bi
= rx_ring
->rx_buffer_info
;
1209 i
-= rx_ring
->count
;
1212 /* clear the hdr_addr for the next_to_use descriptor */
1213 rx_desc
->read
.hdr_addr
= 0;
1216 } while (cleaned_count
);
1218 i
+= rx_ring
->count
;
1220 if (rx_ring
->next_to_use
!= i
)
1221 ixgbe_release_rx_desc(rx_ring
, i
);
1225 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1226 * @data: pointer to the start of the headers
1227 * @max_len: total length of section to find headers in
1229 * This function is meant to determine the length of headers that will
1230 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1231 * motivation of doing this is to only perform one pull for IPv4 TCP
1232 * packets so that we can do basic things like calculating the gso_size
1233 * based on the average data per packet.
1235 static unsigned int ixgbe_get_headlen(unsigned char *data
,
1236 unsigned int max_len
)
1239 unsigned char *network
;
1242 struct vlan_hdr
*vlan
;
1247 u8 nexthdr
= 0; /* default to not TCP */
1250 /* this should never happen, but better safe than sorry */
1251 if (max_len
< ETH_HLEN
)
1254 /* initialize network frame pointer */
1257 /* set first protocol and move network header forward */
1258 protocol
= hdr
.eth
->h_proto
;
1259 hdr
.network
+= ETH_HLEN
;
1261 /* handle any vlan tag if present */
1262 if (protocol
== __constant_htons(ETH_P_8021Q
)) {
1263 if ((hdr
.network
- data
) > (max_len
- VLAN_HLEN
))
1266 protocol
= hdr
.vlan
->h_vlan_encapsulated_proto
;
1267 hdr
.network
+= VLAN_HLEN
;
1270 /* handle L3 protocols */
1271 if (protocol
== __constant_htons(ETH_P_IP
)) {
1272 if ((hdr
.network
- data
) > (max_len
- sizeof(struct iphdr
)))
1275 /* access ihl as a u8 to avoid unaligned access on ia64 */
1276 hlen
= (hdr
.network
[0] & 0x0F) << 2;
1278 /* verify hlen meets minimum size requirements */
1279 if (hlen
< sizeof(struct iphdr
))
1280 return hdr
.network
- data
;
1282 /* record next protocol */
1283 nexthdr
= hdr
.ipv4
->protocol
;
1284 hdr
.network
+= hlen
;
1286 } else if (protocol
== __constant_htons(ETH_P_FCOE
)) {
1287 if ((hdr
.network
- data
) > (max_len
- FCOE_HEADER_LEN
))
1289 hdr
.network
+= FCOE_HEADER_LEN
;
1292 return hdr
.network
- data
;
1295 /* finally sort out TCP */
1296 if (nexthdr
== IPPROTO_TCP
) {
1297 if ((hdr
.network
- data
) > (max_len
- sizeof(struct tcphdr
)))
1300 /* access doff as a u8 to avoid unaligned access on ia64 */
1301 hlen
= (hdr
.network
[12] & 0xF0) >> 2;
1303 /* verify hlen meets minimum size requirements */
1304 if (hlen
< sizeof(struct tcphdr
))
1305 return hdr
.network
- data
;
1307 hdr
.network
+= hlen
;
1311 * If everything has gone correctly hdr.network should be the
1312 * data section of the packet and will be the end of the header.
1313 * If not then it probably represents the end of the last recognized
1316 if ((hdr
.network
- data
) < max_len
)
1317 return hdr
.network
- data
;
1322 static void ixgbe_get_rsc_cnt(struct ixgbe_ring
*rx_ring
,
1323 union ixgbe_adv_rx_desc
*rx_desc
,
1324 struct sk_buff
*skb
)
1329 if (!ring_is_rsc_enabled(rx_ring
))
1332 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1333 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1335 /* If this is an RSC frame rsc_cnt should be non-zero */
1339 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1340 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1342 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1345 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1346 struct sk_buff
*skb
)
1348 u16 hdr_len
= skb_headlen(skb
);
1350 /* set gso_size to avoid messing up TCP MSS */
1351 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1352 IXGBE_CB(skb
)->append_cnt
);
1355 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1356 struct sk_buff
*skb
)
1358 /* if append_cnt is 0 then frame is not RSC */
1359 if (!IXGBE_CB(skb
)->append_cnt
)
1362 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1363 rx_ring
->rx_stats
.rsc_flush
++;
1365 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1367 /* gso_size is computed using append_cnt so always clear it last */
1368 IXGBE_CB(skb
)->append_cnt
= 0;
1372 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1373 * @rx_ring: rx descriptor ring packet is being transacted on
1374 * @rx_desc: pointer to the EOP Rx descriptor
1375 * @skb: pointer to current skb being populated
1377 * This function checks the ring, descriptor, and packet information in
1378 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1379 * other fields within the skb.
1381 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1382 union ixgbe_adv_rx_desc
*rx_desc
,
1383 struct sk_buff
*skb
)
1385 struct net_device
*dev
= rx_ring
->netdev
;
1387 ixgbe_update_rsc_stats(rx_ring
, skb
);
1389 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1391 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1393 #ifdef CONFIG_IXGBE_PTP
1394 ixgbe_ptp_rx_hwtstamp(rx_ring
->q_vector
, rx_desc
, skb
);
1397 if ((dev
->features
& NETIF_F_HW_VLAN_RX
) &&
1398 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1399 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1400 __vlan_hwaccel_put_tag(skb
, vid
);
1403 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1405 skb
->protocol
= eth_type_trans(skb
, dev
);
1408 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1409 struct sk_buff
*skb
)
1411 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1413 if (!(adapter
->flags
& IXGBE_FLAG_IN_NETPOLL
))
1414 napi_gro_receive(&q_vector
->napi
, skb
);
1420 * ixgbe_is_non_eop - process handling of non-EOP buffers
1421 * @rx_ring: Rx ring being processed
1422 * @rx_desc: Rx descriptor for current buffer
1423 * @skb: Current socket buffer containing buffer in progress
1425 * This function updates next to clean. If the buffer is an EOP buffer
1426 * this function exits returning false, otherwise it will place the
1427 * sk_buff in the next buffer to be chained and return true indicating
1428 * that this is in fact a non-EOP buffer.
1430 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1431 union ixgbe_adv_rx_desc
*rx_desc
,
1432 struct sk_buff
*skb
)
1434 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1436 /* fetch, update, and store next to clean */
1437 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1438 rx_ring
->next_to_clean
= ntc
;
1440 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1442 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1445 /* append_cnt indicates packet is RSC, if so fetch nextp */
1446 if (IXGBE_CB(skb
)->append_cnt
) {
1447 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1448 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1449 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1452 /* place skb in next buffer to be received */
1453 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1454 rx_ring
->rx_stats
.non_eop_descs
++;
1460 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1461 * @rx_ring: rx descriptor ring packet is being transacted on
1462 * @rx_desc: pointer to the EOP Rx descriptor
1463 * @skb: pointer to current skb being fixed
1465 * Check for corrupted packet headers caused by senders on the local L2
1466 * embedded NIC switch not setting up their Tx Descriptors right. These
1467 * should be very rare.
1469 * Also address the case where we are pulling data in on pages only
1470 * and as such no data is present in the skb header.
1472 * In addition if skb is not at least 60 bytes we need to pad it so that
1473 * it is large enough to qualify as a valid Ethernet frame.
1475 * Returns true if an error was encountered and skb was freed.
1477 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1478 union ixgbe_adv_rx_desc
*rx_desc
,
1479 struct sk_buff
*skb
)
1481 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1482 struct net_device
*netdev
= rx_ring
->netdev
;
1484 unsigned int pull_len
;
1486 /* if the page was released unmap it, else just sync our portion */
1487 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1488 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1489 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1490 IXGBE_CB(skb
)->page_released
= false;
1492 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1495 ixgbe_rx_bufsz(rx_ring
),
1498 IXGBE_CB(skb
)->dma
= 0;
1500 /* verify that the packet does not have any known errors */
1501 if (unlikely(ixgbe_test_staterr(rx_desc
,
1502 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1503 !(netdev
->features
& NETIF_F_RXALL
))) {
1504 dev_kfree_skb_any(skb
);
1509 * it is valid to use page_address instead of kmap since we are
1510 * working with pages allocated out of the lomem pool per
1511 * alloc_page(GFP_ATOMIC)
1513 va
= skb_frag_address(frag
);
1516 * we need the header to contain the greater of either ETH_HLEN or
1517 * 60 bytes if the skb->len is less than 60 for skb_pad.
1519 pull_len
= skb_frag_size(frag
);
1521 pull_len
= ixgbe_get_headlen(va
, pull_len
);
1523 /* align pull length to size of long to optimize memcpy performance */
1524 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1526 /* update all of the pointers */
1527 skb_frag_size_sub(frag
, pull_len
);
1528 frag
->page_offset
+= pull_len
;
1529 skb
->data_len
-= pull_len
;
1530 skb
->tail
+= pull_len
;
1533 * if we sucked the frag empty then we should free it,
1534 * if there are other frags here something is screwed up in hardware
1536 if (skb_frag_size(frag
) == 0) {
1537 BUG_ON(skb_shinfo(skb
)->nr_frags
!= 1);
1538 skb_shinfo(skb
)->nr_frags
= 0;
1539 __skb_frag_unref(frag
);
1540 skb
->truesize
-= ixgbe_rx_bufsz(rx_ring
);
1544 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1545 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1549 /* if skb_pad returns an error the skb was freed */
1550 if (unlikely(skb
->len
< 60)) {
1551 int pad_len
= 60 - skb
->len
;
1553 if (skb_pad(skb
, pad_len
))
1555 __skb_put(skb
, pad_len
);
1562 * ixgbe_can_reuse_page - determine if we can reuse a page
1563 * @rx_buffer: pointer to rx_buffer containing the page we want to reuse
1565 * Returns true if page can be reused in another Rx buffer
1567 static inline bool ixgbe_can_reuse_page(struct ixgbe_rx_buffer
*rx_buffer
)
1569 struct page
*page
= rx_buffer
->page
;
1571 /* if we are only owner of page and it is local we can reuse it */
1572 return likely(page_count(page
) == 1) &&
1573 likely(page_to_nid(page
) == numa_node_id());
1577 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1578 * @rx_ring: rx descriptor ring to store buffers on
1579 * @old_buff: donor buffer to have page reused
1581 * Syncronizes page for reuse by the adapter
1583 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1584 struct ixgbe_rx_buffer
*old_buff
)
1586 struct ixgbe_rx_buffer
*new_buff
;
1587 u16 nta
= rx_ring
->next_to_alloc
;
1588 u16 bufsz
= ixgbe_rx_bufsz(rx_ring
);
1590 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1592 /* update, and store next to alloc */
1594 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1596 /* transfer page from old buffer to new buffer */
1597 new_buff
->page
= old_buff
->page
;
1598 new_buff
->dma
= old_buff
->dma
;
1600 /* flip page offset to other buffer and store to new_buff */
1601 new_buff
->page_offset
= old_buff
->page_offset
^ bufsz
;
1603 /* sync the buffer for use by the device */
1604 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1605 new_buff
->page_offset
, bufsz
,
1608 /* bump ref count on page before it is given to the stack */
1609 get_page(new_buff
->page
);
1613 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1614 * @rx_ring: rx descriptor ring to transact packets on
1615 * @rx_buffer: buffer containing page to add
1616 * @rx_desc: descriptor containing length of buffer written by hardware
1617 * @skb: sk_buff to place the data into
1619 * This function is based on skb_add_rx_frag. I would have used that
1620 * function however it doesn't handle the truesize case correctly since we
1621 * are allocating more memory than might be used for a single receive.
1623 static void ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1624 struct ixgbe_rx_buffer
*rx_buffer
,
1625 struct sk_buff
*skb
, int size
)
1627 skb_fill_page_desc(skb
, skb_shinfo(skb
)->nr_frags
,
1628 rx_buffer
->page
, rx_buffer
->page_offset
,
1631 skb
->data_len
+= size
;
1632 skb
->truesize
+= ixgbe_rx_bufsz(rx_ring
);
1636 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1637 * @q_vector: structure containing interrupt and ring information
1638 * @rx_ring: rx descriptor ring to transact packets on
1639 * @budget: Total limit on number of packets to process
1641 * This function provides a "bounce buffer" approach to Rx interrupt
1642 * processing. The advantage to this is that on systems that have
1643 * expensive overhead for IOMMU access this provides a means of avoiding
1644 * it by maintaining the mapping of the page to the syste.
1646 * Returns true if all work is completed without reaching budget
1648 static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
1649 struct ixgbe_ring
*rx_ring
,
1652 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1654 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1656 #endif /* IXGBE_FCOE */
1657 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
1660 struct ixgbe_rx_buffer
*rx_buffer
;
1661 union ixgbe_adv_rx_desc
*rx_desc
;
1662 struct sk_buff
*skb
;
1666 /* return some buffers to hardware, one at a time is too slow */
1667 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
1668 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1672 ntc
= rx_ring
->next_to_clean
;
1673 rx_desc
= IXGBE_RX_DESC(rx_ring
, ntc
);
1674 rx_buffer
= &rx_ring
->rx_buffer_info
[ntc
];
1676 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_DD
))
1680 * This memory barrier is needed to keep us from reading
1681 * any other fields out of the rx_desc until we know the
1682 * RXD_STAT_DD bit is set
1686 page
= rx_buffer
->page
;
1689 skb
= rx_buffer
->skb
;
1692 void *page_addr
= page_address(page
) +
1693 rx_buffer
->page_offset
;
1695 /* prefetch first cache line of first page */
1696 prefetch(page_addr
);
1697 #if L1_CACHE_BYTES < 128
1698 prefetch(page_addr
+ L1_CACHE_BYTES
);
1701 /* allocate a skb to store the frags */
1702 skb
= netdev_alloc_skb_ip_align(rx_ring
->netdev
,
1704 if (unlikely(!skb
)) {
1705 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
1710 * we will be copying header into skb->data in
1711 * pskb_may_pull so it is in our interest to prefetch
1712 * it now to avoid a possible cache miss
1714 prefetchw(skb
->data
);
1717 * Delay unmapping of the first packet. It carries the
1718 * header information, HW may still access the header
1719 * after the writeback. Only unmap it when EOP is
1722 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
1724 /* we are reusing so sync this buffer for CPU use */
1725 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1727 rx_buffer
->page_offset
,
1728 ixgbe_rx_bufsz(rx_ring
),
1732 /* pull page into skb */
1733 ixgbe_add_rx_frag(rx_ring
, rx_buffer
, skb
,
1734 le16_to_cpu(rx_desc
->wb
.upper
.length
));
1736 if (ixgbe_can_reuse_page(rx_buffer
)) {
1737 /* hand second half of page back to the ring */
1738 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
1739 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
1740 /* the page has been released from the ring */
1741 IXGBE_CB(skb
)->page_released
= true;
1743 /* we are not reusing the buffer so unmap it */
1744 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
1745 ixgbe_rx_pg_size(rx_ring
),
1749 /* clear contents of buffer_info */
1750 rx_buffer
->skb
= NULL
;
1752 rx_buffer
->page
= NULL
;
1754 ixgbe_get_rsc_cnt(rx_ring
, rx_desc
, skb
);
1758 /* place incomplete frames back on ring for completion */
1759 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
1762 /* verify the packet layout is correct */
1763 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
1766 /* probably a little skewed due to removing CRC */
1767 total_rx_bytes
+= skb
->len
;
1770 /* populate checksum, timestamp, VLAN, and protocol */
1771 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
1774 /* if ddp, not passing to ULD unless for FCP_RSP or error */
1775 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
1776 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
1778 dev_kfree_skb_any(skb
);
1783 #endif /* IXGBE_FCOE */
1784 ixgbe_rx_skb(q_vector
, skb
);
1786 /* update budget accounting */
1788 } while (likely(budget
));
1791 /* include DDPed FCoE data */
1792 if (ddp_bytes
> 0) {
1795 mss
= rx_ring
->netdev
->mtu
- sizeof(struct fcoe_hdr
) -
1796 sizeof(struct fc_frame_header
) -
1797 sizeof(struct fcoe_crc_eof
);
1800 total_rx_bytes
+= ddp_bytes
;
1801 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
, mss
);
1804 #endif /* IXGBE_FCOE */
1805 u64_stats_update_begin(&rx_ring
->syncp
);
1806 rx_ring
->stats
.packets
+= total_rx_packets
;
1807 rx_ring
->stats
.bytes
+= total_rx_bytes
;
1808 u64_stats_update_end(&rx_ring
->syncp
);
1809 q_vector
->rx
.total_packets
+= total_rx_packets
;
1810 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
1813 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
1819 * ixgbe_configure_msix - Configure MSI-X hardware
1820 * @adapter: board private structure
1822 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
1825 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
1827 struct ixgbe_q_vector
*q_vector
;
1831 /* Populate MSIX to EITR Select */
1832 if (adapter
->num_vfs
> 32) {
1833 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
1834 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
1838 * Populate the IVAR table and set the ITR values to the
1839 * corresponding register.
1841 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
1842 struct ixgbe_ring
*ring
;
1843 q_vector
= adapter
->q_vector
[v_idx
];
1845 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1846 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
1848 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1849 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
1851 if (q_vector
->tx
.ring
&& !q_vector
->rx
.ring
) {
1852 /* tx only vector */
1853 if (adapter
->tx_itr_setting
== 1)
1854 q_vector
->itr
= IXGBE_10K_ITR
;
1856 q_vector
->itr
= adapter
->tx_itr_setting
;
1858 /* rx or rx/tx vector */
1859 if (adapter
->rx_itr_setting
== 1)
1860 q_vector
->itr
= IXGBE_20K_ITR
;
1862 q_vector
->itr
= adapter
->rx_itr_setting
;
1865 ixgbe_write_eitr(q_vector
);
1868 switch (adapter
->hw
.mac
.type
) {
1869 case ixgbe_mac_82598EB
:
1870 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
1873 case ixgbe_mac_82599EB
:
1874 case ixgbe_mac_X540
:
1875 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
1880 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
1882 /* set up to autoclear timer, and the vectors */
1883 mask
= IXGBE_EIMS_ENABLE_MASK
;
1884 mask
&= ~(IXGBE_EIMS_OTHER
|
1885 IXGBE_EIMS_MAILBOX
|
1888 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
1891 enum latency_range
{
1895 latency_invalid
= 255
1899 * ixgbe_update_itr - update the dynamic ITR value based on statistics
1900 * @q_vector: structure containing interrupt and ring information
1901 * @ring_container: structure containing ring performance data
1903 * Stores a new ITR value based on packets and byte
1904 * counts during the last interrupt. The advantage of per interrupt
1905 * computation is faster updates and more accurate ITR for the current
1906 * traffic pattern. Constants in this function were computed
1907 * based on theoretical maximum wire speed and thresholds were set based
1908 * on testing data as well as attempting to minimize response time
1909 * while increasing bulk throughput.
1910 * this functionality is controlled by the InterruptThrottleRate module
1911 * parameter (see ixgbe_param.c)
1913 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
1914 struct ixgbe_ring_container
*ring_container
)
1916 int bytes
= ring_container
->total_bytes
;
1917 int packets
= ring_container
->total_packets
;
1920 u8 itr_setting
= ring_container
->itr
;
1925 /* simple throttlerate management
1926 * 0-10MB/s lowest (100000 ints/s)
1927 * 10-20MB/s low (20000 ints/s)
1928 * 20-1249MB/s bulk (8000 ints/s)
1930 /* what was last interrupt timeslice? */
1931 timepassed_us
= q_vector
->itr
>> 2;
1932 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
1934 switch (itr_setting
) {
1935 case lowest_latency
:
1936 if (bytes_perint
> 10)
1937 itr_setting
= low_latency
;
1940 if (bytes_perint
> 20)
1941 itr_setting
= bulk_latency
;
1942 else if (bytes_perint
<= 10)
1943 itr_setting
= lowest_latency
;
1946 if (bytes_perint
<= 20)
1947 itr_setting
= low_latency
;
1951 /* clear work counters since we have the values we need */
1952 ring_container
->total_bytes
= 0;
1953 ring_container
->total_packets
= 0;
1955 /* write updated itr to ring container */
1956 ring_container
->itr
= itr_setting
;
1960 * ixgbe_write_eitr - write EITR register in hardware specific way
1961 * @q_vector: structure containing interrupt and ring information
1963 * This function is made to be called by ethtool and by the driver
1964 * when it needs to update EITR registers at runtime. Hardware
1965 * specific quirks/differences are taken care of here.
1967 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
1969 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1970 struct ixgbe_hw
*hw
= &adapter
->hw
;
1971 int v_idx
= q_vector
->v_idx
;
1972 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
1974 switch (adapter
->hw
.mac
.type
) {
1975 case ixgbe_mac_82598EB
:
1976 /* must write high and low 16 bits to reset counter */
1977 itr_reg
|= (itr_reg
<< 16);
1979 case ixgbe_mac_82599EB
:
1980 case ixgbe_mac_X540
:
1982 * set the WDIS bit to not clear the timer bits and cause an
1983 * immediate assertion of the interrupt
1985 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
1990 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
1993 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
1995 u32 new_itr
= q_vector
->itr
;
1998 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
1999 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2001 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2003 switch (current_itr
) {
2004 /* counts and packets in update_itr are dependent on these numbers */
2005 case lowest_latency
:
2006 new_itr
= IXGBE_100K_ITR
;
2009 new_itr
= IXGBE_20K_ITR
;
2012 new_itr
= IXGBE_8K_ITR
;
2018 if (new_itr
!= q_vector
->itr
) {
2019 /* do an exponential smoothing */
2020 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2021 ((9 * new_itr
) + q_vector
->itr
);
2023 /* save the algorithm value here */
2024 q_vector
->itr
= new_itr
;
2026 ixgbe_write_eitr(q_vector
);
2031 * ixgbe_check_overtemp_subtask - check for over temperature
2032 * @adapter: pointer to adapter
2034 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2036 struct ixgbe_hw
*hw
= &adapter
->hw
;
2037 u32 eicr
= adapter
->interrupt_event
;
2039 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2042 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2043 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2046 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2048 switch (hw
->device_id
) {
2049 case IXGBE_DEV_ID_82599_T3_LOM
:
2051 * Since the warning interrupt is for both ports
2052 * we don't have to check if:
2053 * - This interrupt wasn't for our port.
2054 * - We may have missed the interrupt so always have to
2055 * check if we got a LSC
2057 if (!(eicr
& IXGBE_EICR_GPI_SDP0
) &&
2058 !(eicr
& IXGBE_EICR_LSC
))
2061 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2063 bool link_up
= false;
2065 hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
2071 /* Check if this is not due to overtemp */
2072 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2077 if (!(eicr
& IXGBE_EICR_GPI_SDP0
))
2082 "Network adapter has been stopped because it has over heated. "
2083 "Restart the computer. If the problem persists, "
2084 "power off the system and replace the adapter\n");
2086 adapter
->interrupt_event
= 0;
2089 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2091 struct ixgbe_hw
*hw
= &adapter
->hw
;
2093 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2094 (eicr
& IXGBE_EICR_GPI_SDP1
)) {
2095 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2096 /* write to clear the interrupt */
2097 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2101 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2103 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2106 switch (adapter
->hw
.mac
.type
) {
2107 case ixgbe_mac_82599EB
:
2109 * Need to check link state so complete overtemp check
2112 if (((eicr
& IXGBE_EICR_GPI_SDP0
) || (eicr
& IXGBE_EICR_LSC
)) &&
2113 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2114 adapter
->interrupt_event
= eicr
;
2115 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2116 ixgbe_service_event_schedule(adapter
);
2120 case ixgbe_mac_X540
:
2121 if (!(eicr
& IXGBE_EICR_TS
))
2129 "Network adapter has been stopped because it has over heated. "
2130 "Restart the computer. If the problem persists, "
2131 "power off the system and replace the adapter\n");
2134 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2136 struct ixgbe_hw
*hw
= &adapter
->hw
;
2138 if (eicr
& IXGBE_EICR_GPI_SDP2
) {
2139 /* Clear the interrupt */
2140 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP2
);
2141 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2142 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2143 ixgbe_service_event_schedule(adapter
);
2147 if (eicr
& IXGBE_EICR_GPI_SDP1
) {
2148 /* Clear the interrupt */
2149 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1
);
2150 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2151 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2152 ixgbe_service_event_schedule(adapter
);
2157 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2159 struct ixgbe_hw
*hw
= &adapter
->hw
;
2162 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2163 adapter
->link_check_timeout
= jiffies
;
2164 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2165 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2166 IXGBE_WRITE_FLUSH(hw
);
2167 ixgbe_service_event_schedule(adapter
);
2171 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2175 struct ixgbe_hw
*hw
= &adapter
->hw
;
2177 switch (hw
->mac
.type
) {
2178 case ixgbe_mac_82598EB
:
2179 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2180 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2182 case ixgbe_mac_82599EB
:
2183 case ixgbe_mac_X540
:
2184 mask
= (qmask
& 0xFFFFFFFF);
2186 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2187 mask
= (qmask
>> 32);
2189 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2194 /* skip the flush */
2197 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2201 struct ixgbe_hw
*hw
= &adapter
->hw
;
2203 switch (hw
->mac
.type
) {
2204 case ixgbe_mac_82598EB
:
2205 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2206 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2208 case ixgbe_mac_82599EB
:
2209 case ixgbe_mac_X540
:
2210 mask
= (qmask
& 0xFFFFFFFF);
2212 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2213 mask
= (qmask
>> 32);
2215 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2220 /* skip the flush */
2224 * ixgbe_irq_enable - Enable default interrupt generation settings
2225 * @adapter: board private structure
2227 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2230 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2232 /* don't reenable LSC while waiting for link */
2233 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2234 mask
&= ~IXGBE_EIMS_LSC
;
2236 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2237 switch (adapter
->hw
.mac
.type
) {
2238 case ixgbe_mac_82599EB
:
2239 mask
|= IXGBE_EIMS_GPI_SDP0
;
2241 case ixgbe_mac_X540
:
2242 mask
|= IXGBE_EIMS_TS
;
2247 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2248 mask
|= IXGBE_EIMS_GPI_SDP1
;
2249 switch (adapter
->hw
.mac
.type
) {
2250 case ixgbe_mac_82599EB
:
2251 mask
|= IXGBE_EIMS_GPI_SDP1
;
2252 mask
|= IXGBE_EIMS_GPI_SDP2
;
2253 case ixgbe_mac_X540
:
2254 mask
|= IXGBE_EIMS_ECC
;
2255 mask
|= IXGBE_EIMS_MAILBOX
;
2260 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2261 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2262 mask
|= IXGBE_EIMS_FLOW_DIR
;
2264 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2266 ixgbe_irq_enable_queues(adapter
, ~0);
2268 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2271 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2273 struct ixgbe_adapter
*adapter
= data
;
2274 struct ixgbe_hw
*hw
= &adapter
->hw
;
2278 * Workaround for Silicon errata. Use clear-by-write instead
2279 * of clear-by-read. Reading with EICS will return the
2280 * interrupt causes without clearing, which later be done
2281 * with the write to EICR.
2283 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2284 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2286 if (eicr
& IXGBE_EICR_LSC
)
2287 ixgbe_check_lsc(adapter
);
2289 if (eicr
& IXGBE_EICR_MAILBOX
)
2290 ixgbe_msg_task(adapter
);
2292 switch (hw
->mac
.type
) {
2293 case ixgbe_mac_82599EB
:
2294 case ixgbe_mac_X540
:
2295 if (eicr
& IXGBE_EICR_ECC
)
2296 e_info(link
, "Received unrecoverable ECC Err, please "
2298 /* Handle Flow Director Full threshold interrupt */
2299 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2300 int reinit_count
= 0;
2302 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2303 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2304 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2309 /* no more flow director interrupts until after init */
2310 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2311 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2312 ixgbe_service_event_schedule(adapter
);
2315 ixgbe_check_sfp_event(adapter
, eicr
);
2316 ixgbe_check_overtemp_event(adapter
, eicr
);
2322 ixgbe_check_fan_failure(adapter
, eicr
);
2323 #ifdef CONFIG_IXGBE_PTP
2324 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2327 /* re-enable the original interrupt state, no lsc, no queues */
2328 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2329 ixgbe_irq_enable(adapter
, false, false);
2334 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2336 struct ixgbe_q_vector
*q_vector
= data
;
2338 /* EIAM disabled interrupts (on this vector) for us */
2340 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2341 napi_schedule(&q_vector
->napi
);
2347 * ixgbe_poll - NAPI Rx polling callback
2348 * @napi: structure for representing this polling device
2349 * @budget: how many packets driver is allowed to clean
2351 * This function is used for legacy and MSI, NAPI mode
2353 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2355 struct ixgbe_q_vector
*q_vector
=
2356 container_of(napi
, struct ixgbe_q_vector
, napi
);
2357 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2358 struct ixgbe_ring
*ring
;
2359 int per_ring_budget
;
2360 bool clean_complete
= true;
2362 #ifdef CONFIG_IXGBE_DCA
2363 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2364 ixgbe_update_dca(q_vector
);
2367 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2368 clean_complete
&= !!ixgbe_clean_tx_irq(q_vector
, ring
);
2370 /* attempt to distribute budget to each queue fairly, but don't allow
2371 * the budget to go below 1 because we'll exit polling */
2372 if (q_vector
->rx
.count
> 1)
2373 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2375 per_ring_budget
= budget
;
2377 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2378 clean_complete
&= ixgbe_clean_rx_irq(q_vector
, ring
,
2381 /* If all work not completed, return budget and keep polling */
2382 if (!clean_complete
)
2385 /* all work done, exit the polling mode */
2386 napi_complete(napi
);
2387 if (adapter
->rx_itr_setting
& 1)
2388 ixgbe_set_itr(q_vector
);
2389 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2390 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2396 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2397 * @adapter: board private structure
2399 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2400 * interrupts from the kernel.
2402 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2404 struct net_device
*netdev
= adapter
->netdev
;
2408 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2409 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2410 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2412 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2413 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2414 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2416 } else if (q_vector
->rx
.ring
) {
2417 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2418 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2419 } else if (q_vector
->tx
.ring
) {
2420 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2421 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2423 /* skip this unused q_vector */
2426 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2427 q_vector
->name
, q_vector
);
2429 e_err(probe
, "request_irq failed for MSIX interrupt "
2430 "Error: %d\n", err
);
2431 goto free_queue_irqs
;
2433 /* If Flow Director is enabled, set interrupt affinity */
2434 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2435 /* assign the mask for this irq */
2436 irq_set_affinity_hint(entry
->vector
,
2437 &q_vector
->affinity_mask
);
2441 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2442 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2444 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2445 goto free_queue_irqs
;
2453 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2455 free_irq(adapter
->msix_entries
[vector
].vector
,
2456 adapter
->q_vector
[vector
]);
2458 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2459 pci_disable_msix(adapter
->pdev
);
2460 kfree(adapter
->msix_entries
);
2461 adapter
->msix_entries
= NULL
;
2466 * ixgbe_intr - legacy mode Interrupt Handler
2467 * @irq: interrupt number
2468 * @data: pointer to a network interface device structure
2470 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2472 struct ixgbe_adapter
*adapter
= data
;
2473 struct ixgbe_hw
*hw
= &adapter
->hw
;
2474 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2478 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2479 * before the read of EICR.
2481 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2483 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2484 * therefore no explicit interrupt disable is necessary */
2485 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2488 * shared interrupt alert!
2489 * make sure interrupts are enabled because the read will
2490 * have disabled interrupts due to EIAM
2491 * finish the workaround of silicon errata on 82598. Unmask
2492 * the interrupt that we masked before the EICR read.
2494 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2495 ixgbe_irq_enable(adapter
, true, true);
2496 return IRQ_NONE
; /* Not our interrupt */
2499 if (eicr
& IXGBE_EICR_LSC
)
2500 ixgbe_check_lsc(adapter
);
2502 switch (hw
->mac
.type
) {
2503 case ixgbe_mac_82599EB
:
2504 ixgbe_check_sfp_event(adapter
, eicr
);
2506 case ixgbe_mac_X540
:
2507 if (eicr
& IXGBE_EICR_ECC
)
2508 e_info(link
, "Received unrecoverable ECC err, please "
2510 ixgbe_check_overtemp_event(adapter
, eicr
);
2516 ixgbe_check_fan_failure(adapter
, eicr
);
2517 #ifdef CONFIG_IXGBE_PTP
2518 ixgbe_ptp_check_pps_event(adapter
, eicr
);
2521 /* would disable interrupts here but EIAM disabled it */
2522 napi_schedule(&q_vector
->napi
);
2525 * re-enable link(maybe) and non-queue interrupts, no flush.
2526 * ixgbe_poll will re-enable the queue interrupts
2528 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2529 ixgbe_irq_enable(adapter
, false, false);
2535 * ixgbe_request_irq - initialize interrupts
2536 * @adapter: board private structure
2538 * Attempts to configure interrupts using the best available
2539 * capabilities of the hardware and kernel.
2541 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
2543 struct net_device
*netdev
= adapter
->netdev
;
2546 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
2547 err
= ixgbe_request_msix_irqs(adapter
);
2548 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
2549 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
2550 netdev
->name
, adapter
);
2552 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
2553 netdev
->name
, adapter
);
2556 e_err(probe
, "request_irq failed, Error %d\n", err
);
2561 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
2565 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
2566 free_irq(adapter
->pdev
->irq
, adapter
);
2570 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2571 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2572 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2574 /* free only the irqs that were actually requested */
2575 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
2578 /* clear the affinity_mask in the IRQ descriptor */
2579 irq_set_affinity_hint(entry
->vector
, NULL
);
2581 free_irq(entry
->vector
, q_vector
);
2584 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
2588 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2589 * @adapter: board private structure
2591 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
2593 switch (adapter
->hw
.mac
.type
) {
2594 case ixgbe_mac_82598EB
:
2595 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
2597 case ixgbe_mac_82599EB
:
2598 case ixgbe_mac_X540
:
2599 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
2600 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
2601 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
2606 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2607 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
2610 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
2611 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
2613 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
2615 synchronize_irq(adapter
->pdev
->irq
);
2620 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
2623 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
2625 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2628 if (adapter
->rx_itr_setting
== 1)
2629 q_vector
->itr
= IXGBE_20K_ITR
;
2631 q_vector
->itr
= adapter
->rx_itr_setting
;
2633 ixgbe_write_eitr(q_vector
);
2635 ixgbe_set_ivar(adapter
, 0, 0, 0);
2636 ixgbe_set_ivar(adapter
, 1, 0, 0);
2638 e_info(hw
, "Legacy interrupt IVAR setup done\n");
2642 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
2643 * @adapter: board private structure
2644 * @ring: structure containing ring specific data
2646 * Configure the Tx descriptor ring after a reset.
2648 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
2649 struct ixgbe_ring
*ring
)
2651 struct ixgbe_hw
*hw
= &adapter
->hw
;
2652 u64 tdba
= ring
->dma
;
2654 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
2655 u8 reg_idx
= ring
->reg_idx
;
2657 /* disable queue to avoid issues while updating state */
2658 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
2659 IXGBE_WRITE_FLUSH(hw
);
2661 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
2662 (tdba
& DMA_BIT_MASK(32)));
2663 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
2664 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
2665 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
2666 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
2667 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
2668 ring
->tail
= hw
->hw_addr
+ IXGBE_TDT(reg_idx
);
2671 * set WTHRESH to encourage burst writeback, it should not be set
2672 * higher than 1 when ITR is 0 as it could cause false TX hangs
2674 * In order to avoid issues WTHRESH + PTHRESH should always be equal
2675 * to or less than the number of on chip descriptors, which is
2678 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< 8))
2679 txdctl
|= (1 << 16); /* WTHRESH = 1 */
2681 txdctl
|= (8 << 16); /* WTHRESH = 8 */
2684 * Setting PTHRESH to 32 both improves performance
2685 * and avoids a TX hang with DFP enabled
2687 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
2688 32; /* PTHRESH = 32 */
2690 /* reinitialize flowdirector state */
2691 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2692 adapter
->atr_sample_rate
) {
2693 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
2694 ring
->atr_count
= 0;
2695 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
2697 ring
->atr_sample_rate
= 0;
2700 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
2703 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
2705 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2706 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2707 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
2710 /* poll to verify queue is enabled */
2712 usleep_range(1000, 2000);
2713 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
2714 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
2716 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
2719 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
2721 struct ixgbe_hw
*hw
= &adapter
->hw
;
2724 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2726 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
2729 /* disable the arbiter while setting MTQC */
2730 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
2731 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
2732 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2734 /* set transmit pool layout */
2735 switch (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
2736 case (IXGBE_FLAG_SRIOV_ENABLED
):
2737 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
,
2738 (IXGBE_MTQC_VT_ENA
| IXGBE_MTQC_64VF
));
2742 reg
= IXGBE_MTQC_64Q_1PB
;
2744 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
2746 reg
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
2748 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, reg
);
2750 /* Enable Security TX Buffer IFG for multiple pb */
2752 reg
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
2753 reg
|= IXGBE_SECTX_DCB
;
2754 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, reg
);
2759 /* re-enable the arbiter */
2760 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
2761 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
2765 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
2766 * @adapter: board private structure
2768 * Configure the Tx unit of the MAC after a reset.
2770 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
2772 struct ixgbe_hw
*hw
= &adapter
->hw
;
2776 ixgbe_setup_mtqc(adapter
);
2778 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
2779 /* DMATXCTL.EN must be before Tx queues are enabled */
2780 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
2781 dmatxctl
|= IXGBE_DMATXCTL_TE
;
2782 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
2785 /* Setup the HW Tx Head and Tail descriptor pointers */
2786 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
2787 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
2790 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
2791 struct ixgbe_ring
*ring
)
2793 struct ixgbe_hw
*hw
= &adapter
->hw
;
2794 u8 reg_idx
= ring
->reg_idx
;
2795 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2797 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
2799 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2802 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
2803 struct ixgbe_ring
*ring
)
2805 struct ixgbe_hw
*hw
= &adapter
->hw
;
2806 u8 reg_idx
= ring
->reg_idx
;
2807 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
2809 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
2811 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2814 #ifdef CONFIG_IXGBE_DCB
2815 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2817 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
2821 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
2823 if (adapter
->ixgbe_ieee_pfc
)
2824 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
2827 * We should set the drop enable bit if:
2830 * Number of Rx queues > 1 and flow control is disabled
2832 * This allows us to avoid head of line blocking for security
2833 * and performance reasons.
2835 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
2836 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
2837 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2838 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2840 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
2841 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
2845 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
2847 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
2848 struct ixgbe_ring
*rx_ring
)
2850 struct ixgbe_hw
*hw
= &adapter
->hw
;
2852 u8 reg_idx
= rx_ring
->reg_idx
;
2854 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
2855 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
2858 * if VMDq is not active we must program one srrctl register
2859 * per RSS queue since we have enabled RDRXCTL.MVMEN
2864 /* configure header buffer length, needed for RSC */
2865 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
2867 /* configure the packet buffer length */
2868 #if PAGE_SIZE > IXGBE_MAX_RXBUFFER
2869 srrctl
|= IXGBE_MAX_RXBUFFER
>> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2871 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
2874 /* configure descriptor type */
2875 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
2877 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
2880 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
2882 struct ixgbe_hw
*hw
= &adapter
->hw
;
2883 static const u32 seed
[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
2884 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
2885 0x6A3E67EA, 0x14364D17, 0x3BED200D};
2886 u32 mrqc
= 0, reta
= 0;
2889 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
2890 int maxq
= adapter
->ring_feature
[RING_F_RSS
].indices
;
2893 maxq
= min(maxq
, adapter
->num_tx_queues
/ tcs
);
2895 /* Fill out hash function seeds */
2896 for (i
= 0; i
< 10; i
++)
2897 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), seed
[i
]);
2899 /* Fill out redirection table */
2900 for (i
= 0, j
= 0; i
< 128; i
++, j
++) {
2903 /* reta = 4-byte sliding window of
2904 * 0x00..(indices-1)(indices-1)00..etc. */
2905 reta
= (reta
<< 8) | (j
* 0x11);
2907 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
2910 /* Disable indicating checksum in descriptor, enables RSS hash */
2911 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
2912 rxcsum
|= IXGBE_RXCSUM_PCSD
;
2913 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
2915 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
&&
2916 (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
2917 mrqc
= IXGBE_MRQC_RSSEN
;
2919 int mask
= adapter
->flags
& (IXGBE_FLAG_RSS_ENABLED
2920 | IXGBE_FLAG_SRIOV_ENABLED
);
2923 case (IXGBE_FLAG_RSS_ENABLED
):
2925 mrqc
= IXGBE_MRQC_RSSEN
;
2927 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
2929 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
2931 case (IXGBE_FLAG_SRIOV_ENABLED
):
2932 mrqc
= IXGBE_MRQC_VMDQEN
;
2939 /* Perform hash on these packet types */
2940 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4
2941 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2942 | IXGBE_MRQC_RSS_FIELD_IPV6
2943 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
2945 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
2946 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
2947 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
2948 mrqc
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
2950 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
2954 * ixgbe_configure_rscctl - enable RSC for the indicated ring
2955 * @adapter: address of board private structure
2956 * @index: index of ring to set
2958 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
2959 struct ixgbe_ring
*ring
)
2961 struct ixgbe_hw
*hw
= &adapter
->hw
;
2963 u8 reg_idx
= ring
->reg_idx
;
2965 if (!ring_is_rsc_enabled(ring
))
2968 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
2969 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
2971 * we must limit the number of descriptors so that the
2972 * total size of max desc * buf_len is not greater
2975 #if (PAGE_SIZE <= 8192)
2976 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
2977 #elif (PAGE_SIZE <= 16384)
2978 rscctrl
|= IXGBE_RSCCTL_MAXDESC_8
;
2980 rscctrl
|= IXGBE_RSCCTL_MAXDESC_4
;
2982 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
2985 #define IXGBE_MAX_RX_DESC_POLL 10
2986 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
2987 struct ixgbe_ring
*ring
)
2989 struct ixgbe_hw
*hw
= &adapter
->hw
;
2990 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
2992 u8 reg_idx
= ring
->reg_idx
;
2994 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
2995 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
2996 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3000 usleep_range(1000, 2000);
3001 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3002 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3005 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3006 "the polling period\n", reg_idx
);
3010 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3011 struct ixgbe_ring
*ring
)
3013 struct ixgbe_hw
*hw
= &adapter
->hw
;
3014 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3016 u8 reg_idx
= ring
->reg_idx
;
3018 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3019 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3021 /* write value back with RXDCTL.ENABLE bit cleared */
3022 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3024 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3025 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3028 /* the hardware may take up to 100us to really disable the rx queue */
3031 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3032 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3035 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3036 "the polling period\n", reg_idx
);
3040 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3041 struct ixgbe_ring
*ring
)
3043 struct ixgbe_hw
*hw
= &adapter
->hw
;
3044 u64 rdba
= ring
->dma
;
3046 u8 reg_idx
= ring
->reg_idx
;
3048 /* disable queue to avoid issues while updating state */
3049 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3050 ixgbe_disable_rx_queue(adapter
, ring
);
3052 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3053 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3054 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3055 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3056 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3057 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3058 ring
->tail
= hw
->hw_addr
+ IXGBE_RDT(reg_idx
);
3060 ixgbe_configure_srrctl(adapter
, ring
);
3061 ixgbe_configure_rscctl(adapter
, ring
);
3063 /* If operating in IOV mode set RLPML for X540 */
3064 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
3065 hw
->mac
.type
== ixgbe_mac_X540
) {
3066 rxdctl
&= ~IXGBE_RXDCTL_RLPMLMASK
;
3067 rxdctl
|= ((ring
->netdev
->mtu
+ ETH_HLEN
+
3068 ETH_FCS_LEN
+ VLAN_HLEN
) | IXGBE_RXDCTL_RLPML_EN
);
3071 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3073 * enable cache line friendly hardware writes:
3074 * PTHRESH=32 descriptors (half the internal cache),
3075 * this also removes ugly rx_no_buffer_count increment
3076 * HTHRESH=4 descriptors (to minimize latency on fetch)
3077 * WTHRESH=8 burst writeback up to two cache lines
3079 rxdctl
&= ~0x3FFFFF;
3083 /* enable receive descriptor ring */
3084 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3085 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3087 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3088 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3091 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3093 struct ixgbe_hw
*hw
= &adapter
->hw
;
3096 /* PSRTYPE must be initialized in non 82598 adapters */
3097 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3098 IXGBE_PSRTYPE_UDPHDR
|
3099 IXGBE_PSRTYPE_IPV4HDR
|
3100 IXGBE_PSRTYPE_L2HDR
|
3101 IXGBE_PSRTYPE_IPV6HDR
;
3103 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3106 if (adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)
3107 psrtype
|= (adapter
->num_rx_queues_per_pool
<< 29);
3109 for (p
= 0; p
< adapter
->num_rx_pools
; p
++)
3110 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(adapter
->num_vfs
+ p
),
3114 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3116 struct ixgbe_hw
*hw
= &adapter
->hw
;
3119 u32 reg_offset
, vf_shift
;
3123 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3126 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3127 vt_reg_bits
= IXGBE_VMD_CTL_VMDQ_EN
| IXGBE_VT_CTL_REPLEN
;
3128 vt_reg_bits
|= (adapter
->num_vfs
<< IXGBE_VT_CTL_POOL_SHIFT
);
3129 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
| vt_reg_bits
);
3131 vf_shift
= adapter
->num_vfs
% 32;
3132 reg_offset
= (adapter
->num_vfs
>= 32) ? 1 : 0;
3134 /* Enable only the PF's pool for Tx/Rx */
3135 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (1 << vf_shift
));
3136 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), 0);
3137 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (1 << vf_shift
));
3138 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), 0);
3139 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3141 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3142 hw
->mac
.ops
.set_vmdq(hw
, 0, adapter
->num_vfs
);
3145 * Set up VF register offsets for selected VT Mode,
3146 * i.e. 32 or 64 VFs for SR-IOV
3148 gcr_ext
= IXGBE_READ_REG(hw
, IXGBE_GCR_EXT
);
3149 gcr_ext
|= IXGBE_GCR_EXT_MSIX_EN
;
3150 gcr_ext
|= IXGBE_GCR_EXT_VT_MODE_64
;
3151 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3153 /* enable Tx loopback for VF/PF communication */
3154 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3155 /* Enable MAC Anti-Spoofing */
3156 hw
->mac
.ops
.set_mac_anti_spoofing(hw
,
3157 (adapter
->num_vfs
!= 0),
3159 /* For VFs that have spoof checking turned off */
3160 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3161 if (!adapter
->vfinfo
[i
].spoofchk_enabled
)
3162 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
, false);
3166 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3168 struct ixgbe_hw
*hw
= &adapter
->hw
;
3169 struct net_device
*netdev
= adapter
->netdev
;
3170 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3171 struct ixgbe_ring
*rx_ring
;
3176 /* adjust max frame to be able to do baby jumbo for FCoE */
3177 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3178 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3179 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3181 #endif /* IXGBE_FCOE */
3182 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3183 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3184 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3185 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3187 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3190 /* MHADD will allow an extra 4 bytes past for vlan tagged frames */
3191 max_frame
+= VLAN_HLEN
;
3193 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3194 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3195 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3196 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3199 * Setup the HW Rx Head and Tail Descriptor Pointers and
3200 * the Base and Length of the Rx Descriptor Ring
3202 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3203 rx_ring
= adapter
->rx_ring
[i
];
3204 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3205 set_ring_rsc_enabled(rx_ring
);
3207 clear_ring_rsc_enabled(rx_ring
);
3211 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3213 struct ixgbe_hw
*hw
= &adapter
->hw
;
3214 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3216 switch (hw
->mac
.type
) {
3217 case ixgbe_mac_82598EB
:
3219 * For VMDq support of different descriptor types or
3220 * buffer sizes through the use of multiple SRRCTL
3221 * registers, RDRXCTL.MVMEN must be set to 1
3223 * also, the manual doesn't mention it clearly but DCA hints
3224 * will only use queue 0's tags unless this bit is set. Side
3225 * effects of setting this bit are only that SRRCTL must be
3226 * fully programmed [0..15]
3228 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3230 case ixgbe_mac_82599EB
:
3231 case ixgbe_mac_X540
:
3232 /* Disable RSC for ACK packets */
3233 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3234 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3235 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3236 /* hardware requires some bits to be set by default */
3237 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3238 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3241 /* We should do nothing since we don't know this hardware */
3245 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3249 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3250 * @adapter: board private structure
3252 * Configure the Rx unit of the MAC after a reset.
3254 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3256 struct ixgbe_hw
*hw
= &adapter
->hw
;
3260 /* disable receives while setting up the descriptors */
3261 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3262 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
3264 ixgbe_setup_psrtype(adapter
);
3265 ixgbe_setup_rdrxctl(adapter
);
3267 /* Program registers for the distribution of queues */
3268 ixgbe_setup_mrqc(adapter
);
3270 /* set_rx_buffer_len must be called before ring initialization */
3271 ixgbe_set_rx_buffer_len(adapter
);
3274 * Setup the HW Rx Head and Tail Descriptor Pointers and
3275 * the Base and Length of the Rx Descriptor Ring
3277 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3278 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3280 /* disable drop enable for 82598 parts */
3281 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3282 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3284 /* enable all receives */
3285 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3286 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3289 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
, u16 vid
)
3291 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3292 struct ixgbe_hw
*hw
= &adapter
->hw
;
3293 int pool_ndx
= adapter
->num_vfs
;
3295 /* add VID to filter table */
3296 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, true);
3297 set_bit(vid
, adapter
->active_vlans
);
3302 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
, u16 vid
)
3304 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3305 struct ixgbe_hw
*hw
= &adapter
->hw
;
3306 int pool_ndx
= adapter
->num_vfs
;
3308 /* remove VID from filter table */
3309 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, pool_ndx
, false);
3310 clear_bit(vid
, adapter
->active_vlans
);
3316 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3317 * @adapter: driver data
3319 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter
*adapter
)
3321 struct ixgbe_hw
*hw
= &adapter
->hw
;
3324 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3325 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
3326 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3330 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3331 * @adapter: driver data
3333 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter
*adapter
)
3335 struct ixgbe_hw
*hw
= &adapter
->hw
;
3338 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3339 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
3340 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
3341 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3345 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3346 * @adapter: driver data
3348 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
3350 struct ixgbe_hw
*hw
= &adapter
->hw
;
3354 switch (hw
->mac
.type
) {
3355 case ixgbe_mac_82598EB
:
3356 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3357 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
3358 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3360 case ixgbe_mac_82599EB
:
3361 case ixgbe_mac_X540
:
3362 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3363 j
= adapter
->rx_ring
[i
]->reg_idx
;
3364 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3365 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
3366 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3375 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3376 * @adapter: driver data
3378 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
3380 struct ixgbe_hw
*hw
= &adapter
->hw
;
3384 switch (hw
->mac
.type
) {
3385 case ixgbe_mac_82598EB
:
3386 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
3387 vlnctrl
|= IXGBE_VLNCTRL_VME
;
3388 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
3390 case ixgbe_mac_82599EB
:
3391 case ixgbe_mac_X540
:
3392 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3393 j
= adapter
->rx_ring
[i
]->reg_idx
;
3394 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
3395 vlnctrl
|= IXGBE_RXDCTL_VME
;
3396 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
3404 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
3408 ixgbe_vlan_rx_add_vid(adapter
->netdev
, 0);
3410 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
3411 ixgbe_vlan_rx_add_vid(adapter
->netdev
, vid
);
3415 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3416 * @netdev: network interface device structure
3418 * Writes unicast address list to the RAR table.
3419 * Returns: -ENOMEM on failure/insufficient address space
3420 * 0 on no addresses written
3421 * X on writing X addresses to the RAR table
3423 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
)
3425 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3426 struct ixgbe_hw
*hw
= &adapter
->hw
;
3427 unsigned int vfn
= adapter
->num_vfs
;
3428 unsigned int rar_entries
= IXGBE_MAX_PF_MACVLANS
;
3431 /* return ENOMEM indicating insufficient memory for addresses */
3432 if (netdev_uc_count(netdev
) > rar_entries
)
3435 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3436 struct netdev_hw_addr
*ha
;
3437 /* return error if we do not support writing to RAR table */
3438 if (!hw
->mac
.ops
.set_rar
)
3441 netdev_for_each_uc_addr(ha
, netdev
) {
3444 hw
->mac
.ops
.set_rar(hw
, rar_entries
--, ha
->addr
,
3449 /* write the addresses in reverse order to avoid write combining */
3450 for (; rar_entries
> 0 ; rar_entries
--)
3451 hw
->mac
.ops
.clear_rar(hw
, rar_entries
);
3457 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3458 * @netdev: network interface device structure
3460 * The set_rx_method entry point is called whenever the unicast/multicast
3461 * address list or the network interface flags are updated. This routine is
3462 * responsible for configuring the hardware for proper unicast, multicast and
3465 void ixgbe_set_rx_mode(struct net_device
*netdev
)
3467 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3468 struct ixgbe_hw
*hw
= &adapter
->hw
;
3469 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
3472 /* Check for Promiscuous and All Multicast modes */
3474 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
3476 /* set all bits that we expect to always be set */
3477 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
3478 fctrl
|= IXGBE_FCTRL_BAM
;
3479 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
3480 fctrl
|= IXGBE_FCTRL_PMCF
;
3482 /* clear the bits we are changing the status of */
3483 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3485 if (netdev
->flags
& IFF_PROMISC
) {
3486 hw
->addr_ctrl
.user_set_promisc
= true;
3487 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
3488 vmolr
|= (IXGBE_VMOLR_ROPE
| IXGBE_VMOLR_MPE
);
3489 /* don't hardware filter vlans in promisc mode */
3490 ixgbe_vlan_filter_disable(adapter
);
3492 if (netdev
->flags
& IFF_ALLMULTI
) {
3493 fctrl
|= IXGBE_FCTRL_MPE
;
3494 vmolr
|= IXGBE_VMOLR_MPE
;
3497 * Write addresses to the MTA, if the attempt fails
3498 * then we should just turn on promiscuous mode so
3499 * that we can at least receive multicast traffic
3501 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
3502 vmolr
|= IXGBE_VMOLR_ROMPE
;
3504 ixgbe_vlan_filter_enable(adapter
);
3505 hw
->addr_ctrl
.user_set_promisc
= false;
3509 * Write addresses to available RAR registers, if there is not
3510 * sufficient space to store all the addresses then enable
3511 * unicast promiscuous mode
3513 count
= ixgbe_write_uc_addr_list(netdev
);
3515 fctrl
|= IXGBE_FCTRL_UPE
;
3516 vmolr
|= IXGBE_VMOLR_ROPE
;
3519 if (adapter
->num_vfs
) {
3520 ixgbe_restore_vf_multicasts(adapter
);
3521 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
)) &
3522 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
3524 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(adapter
->num_vfs
), vmolr
);
3527 /* This is useful for sniffing bad packets. */
3528 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3529 /* UPE and MPE will be handled by normal PROMISC logic
3530 * in e1000e_set_rx_mode */
3531 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
3532 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
3533 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
3535 fctrl
&= ~(IXGBE_FCTRL_DPF
);
3536 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3539 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
3541 if (netdev
->features
& NETIF_F_HW_VLAN_RX
)
3542 ixgbe_vlan_strip_enable(adapter
);
3544 ixgbe_vlan_strip_disable(adapter
);
3547 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
3551 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
3552 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
3555 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
3559 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++)
3560 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
3563 #ifdef CONFIG_IXGBE_DCB
3565 * ixgbe_configure_dcb - Configure DCB hardware
3566 * @adapter: ixgbe adapter struct
3568 * This is called by the driver on open to configure the DCB hardware.
3569 * This is also called by the gennetlink interface when reconfiguring
3572 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
3574 struct ixgbe_hw
*hw
= &adapter
->hw
;
3575 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3577 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
3578 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3579 netif_set_gso_max_size(adapter
->netdev
, 65536);
3583 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3584 netif_set_gso_max_size(adapter
->netdev
, 32768);
3586 hw
->mac
.ops
.set_vfta(&adapter
->hw
, 0, 0, true);
3589 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
3590 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
3593 /* reconfigure the hardware */
3594 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
3595 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3597 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
3599 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
3600 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
3601 ixgbe_dcb_hw_ets(&adapter
->hw
,
3602 adapter
->ixgbe_ieee_ets
,
3604 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
3605 adapter
->ixgbe_ieee_pfc
->pfc_en
,
3606 adapter
->ixgbe_ieee_ets
->prio_tc
);
3609 /* Enable RSS Hash per TC */
3610 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3614 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
3616 u8 cnt
= adapter
->netdev
->tc_to_txq
[i
].count
;
3621 reg
|= msb
<< IXGBE_RQTC_SHIFT_TC(i
);
3623 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, reg
);
3628 /* Additional bittime to account for IXGBE framing */
3629 #define IXGBE_ETH_FRAMING 20
3632 * ixgbe_hpbthresh - calculate high water mark for flow control
3634 * @adapter: board private structure to calculate for
3635 * @pb: packet buffer to calculate
3637 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
3639 struct ixgbe_hw
*hw
= &adapter
->hw
;
3640 struct net_device
*dev
= adapter
->netdev
;
3641 int link
, tc
, kb
, marker
;
3644 /* Calculate max LAN frame size */
3645 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
3648 /* FCoE traffic class uses FCOE jumbo frames */
3649 if (dev
->features
& NETIF_F_FCOE_MTU
) {
3652 #ifdef CONFIG_IXGBE_DCB
3653 fcoe_pb
= netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
);
3656 if (fcoe_pb
== pb
&& tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
)
3657 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3661 /* Calculate delay value for device */
3662 switch (hw
->mac
.type
) {
3663 case ixgbe_mac_X540
:
3664 dv_id
= IXGBE_DV_X540(link
, tc
);
3667 dv_id
= IXGBE_DV(link
, tc
);
3671 /* Loopback switch introduces additional latency */
3672 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3673 dv_id
+= IXGBE_B2BT(tc
);
3675 /* Delay value is calculated in bit times convert to KB */
3676 kb
= IXGBE_BT2KB(dv_id
);
3677 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
3679 marker
= rx_pba
- kb
;
3681 /* It is possible that the packet buffer is not large enough
3682 * to provide required headroom. In this case throw an error
3683 * to user and a do the best we can.
3686 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
3687 "headroom to support flow control."
3688 "Decrease MTU or number of traffic classes\n", pb
);
3696 * ixgbe_lpbthresh - calculate low water mark for for flow control
3698 * @adapter: board private structure to calculate for
3699 * @pb: packet buffer to calculate
3701 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
)
3703 struct ixgbe_hw
*hw
= &adapter
->hw
;
3704 struct net_device
*dev
= adapter
->netdev
;
3708 /* Calculate max LAN frame size */
3709 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3711 /* Calculate delay value for device */
3712 switch (hw
->mac
.type
) {
3713 case ixgbe_mac_X540
:
3714 dv_id
= IXGBE_LOW_DV_X540(tc
);
3717 dv_id
= IXGBE_LOW_DV(tc
);
3721 /* Delay value is calculated in bit times convert to KB */
3722 return IXGBE_BT2KB(dv_id
);
3726 * ixgbe_pbthresh_setup - calculate and setup high low water marks
3728 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
3730 struct ixgbe_hw
*hw
= &adapter
->hw
;
3731 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
3737 hw
->fc
.low_water
= ixgbe_lpbthresh(adapter
);
3739 for (i
= 0; i
< num_tc
; i
++) {
3740 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
3742 /* Low water marks must not be larger than high water marks */
3743 if (hw
->fc
.low_water
> hw
->fc
.high_water
[i
])
3744 hw
->fc
.low_water
= 0;
3748 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
3750 struct ixgbe_hw
*hw
= &adapter
->hw
;
3752 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
3754 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
3755 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
3756 hdrm
= 32 << adapter
->fdir_pballoc
;
3760 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
3761 ixgbe_pbthresh_setup(adapter
);
3764 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
3766 struct ixgbe_hw
*hw
= &adapter
->hw
;
3767 struct hlist_node
*node
, *node2
;
3768 struct ixgbe_fdir_filter
*filter
;
3770 spin_lock(&adapter
->fdir_perfect_lock
);
3772 if (!hlist_empty(&adapter
->fdir_filter_list
))
3773 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
3775 hlist_for_each_entry_safe(filter
, node
, node2
,
3776 &adapter
->fdir_filter_list
, fdir_node
) {
3777 ixgbe_fdir_write_perfect_filter_82599(hw
,
3780 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
3781 IXGBE_FDIR_DROP_QUEUE
:
3782 adapter
->rx_ring
[filter
->action
]->reg_idx
);
3785 spin_unlock(&adapter
->fdir_perfect_lock
);
3788 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
3790 struct ixgbe_hw
*hw
= &adapter
->hw
;
3792 ixgbe_configure_pb(adapter
);
3793 #ifdef CONFIG_IXGBE_DCB
3794 ixgbe_configure_dcb(adapter
);
3797 ixgbe_set_rx_mode(adapter
->netdev
);
3798 ixgbe_restore_vlan(adapter
);
3801 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
3802 ixgbe_configure_fcoe(adapter
);
3804 #endif /* IXGBE_FCOE */
3806 switch (hw
->mac
.type
) {
3807 case ixgbe_mac_82599EB
:
3808 case ixgbe_mac_X540
:
3809 hw
->mac
.ops
.disable_rx_buff(hw
);
3815 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3816 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
3817 adapter
->fdir_pballoc
);
3818 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
3819 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
3820 adapter
->fdir_pballoc
);
3821 ixgbe_fdir_filter_restore(adapter
);
3824 switch (hw
->mac
.type
) {
3825 case ixgbe_mac_82599EB
:
3826 case ixgbe_mac_X540
:
3827 hw
->mac
.ops
.enable_rx_buff(hw
);
3833 ixgbe_configure_virtualization(adapter
);
3835 ixgbe_configure_tx(adapter
);
3836 ixgbe_configure_rx(adapter
);
3839 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
3841 switch (hw
->phy
.type
) {
3842 case ixgbe_phy_sfp_avago
:
3843 case ixgbe_phy_sfp_ftl
:
3844 case ixgbe_phy_sfp_intel
:
3845 case ixgbe_phy_sfp_unknown
:
3846 case ixgbe_phy_sfp_passive_tyco
:
3847 case ixgbe_phy_sfp_passive_unknown
:
3848 case ixgbe_phy_sfp_active_unknown
:
3849 case ixgbe_phy_sfp_ftl_active
:
3852 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3860 * ixgbe_sfp_link_config - set up SFP+ link
3861 * @adapter: pointer to private adapter struct
3863 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
3866 * We are assuming the worst case scenario here, and that
3867 * is that an SFP was inserted/removed after the reset
3868 * but before SFP detection was enabled. As such the best
3869 * solution is to just start searching as soon as we start
3871 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3872 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
3874 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
3878 * ixgbe_non_sfp_link_config - set up non-SFP+ link
3879 * @hw: pointer to private hardware struct
3881 * Returns 0 on success, negative on failure
3883 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
3886 bool negotiation
, link_up
= false;
3887 u32 ret
= IXGBE_ERR_LINK_SETUP
;
3889 if (hw
->mac
.ops
.check_link
)
3890 ret
= hw
->mac
.ops
.check_link(hw
, &autoneg
, &link_up
, false);
3895 autoneg
= hw
->phy
.autoneg_advertised
;
3896 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
3897 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
,
3902 if (hw
->mac
.ops
.setup_link
)
3903 ret
= hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, link_up
);
3908 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
3910 struct ixgbe_hw
*hw
= &adapter
->hw
;
3913 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3914 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
3916 gpie
|= IXGBE_GPIE_EIAME
;
3918 * use EIAM to auto-mask when MSI-X interrupt is asserted
3919 * this saves a register write for every interrupt
3921 switch (hw
->mac
.type
) {
3922 case ixgbe_mac_82598EB
:
3923 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3925 case ixgbe_mac_82599EB
:
3926 case ixgbe_mac_X540
:
3928 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
3929 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
3933 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
3934 * specifically only auto mask tx and rx interrupts */
3935 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
3938 /* XXX: to interrupt immediately for EICS writes, enable this */
3939 /* gpie |= IXGBE_GPIE_EIMEN; */
3941 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3942 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
3943 gpie
|= IXGBE_GPIE_VTMODE_64
;
3946 /* Enable Thermal over heat sensor interrupt */
3947 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
3948 switch (adapter
->hw
.mac
.type
) {
3949 case ixgbe_mac_82599EB
:
3950 gpie
|= IXGBE_SDP0_GPIEN
;
3952 case ixgbe_mac_X540
:
3953 gpie
|= IXGBE_EIMS_TS
;
3960 /* Enable fan failure interrupt */
3961 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
3962 gpie
|= IXGBE_SDP1_GPIEN
;
3964 if (hw
->mac
.type
== ixgbe_mac_82599EB
) {
3965 gpie
|= IXGBE_SDP1_GPIEN
;
3966 gpie
|= IXGBE_SDP2_GPIEN
;
3969 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
3972 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
3974 struct ixgbe_hw
*hw
= &adapter
->hw
;
3978 ixgbe_get_hw_control(adapter
);
3979 ixgbe_setup_gpie(adapter
);
3981 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3982 ixgbe_configure_msix(adapter
);
3984 ixgbe_configure_msi_and_legacy(adapter
);
3986 /* enable the optics for both mult-speed fiber and 82599 SFP+ fiber */
3987 if (hw
->mac
.ops
.enable_tx_laser
&&
3988 ((hw
->phy
.multispeed_fiber
) ||
3989 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
3990 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
3991 hw
->mac
.ops
.enable_tx_laser(hw
);
3993 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
3994 ixgbe_napi_enable_all(adapter
);
3996 if (ixgbe_is_sfp(hw
)) {
3997 ixgbe_sfp_link_config(adapter
);
3999 err
= ixgbe_non_sfp_link_config(hw
);
4001 e_err(probe
, "link_config FAILED %d\n", err
);
4004 /* clear any pending interrupts, may auto mask */
4005 IXGBE_READ_REG(hw
, IXGBE_EICR
);
4006 ixgbe_irq_enable(adapter
, true, true);
4009 * If this adapter has a fan, check to see if we had a failure
4010 * before we enabled the interrupt.
4012 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
4013 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
4014 if (esdp
& IXGBE_ESDP_SDP1
)
4015 e_crit(drv
, "Fan has stopped, replace the adapter\n");
4018 /* enable transmits */
4019 netif_tx_start_all_queues(adapter
->netdev
);
4021 /* bring the link up in the watchdog, this could race with our first
4022 * link up interrupt but shouldn't be a problem */
4023 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
4024 adapter
->link_check_timeout
= jiffies
;
4025 mod_timer(&adapter
->service_timer
, jiffies
);
4027 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4028 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
4029 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
4030 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
4033 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
4035 WARN_ON(in_interrupt());
4036 /* put off any impending NetWatchDogTimeout */
4037 adapter
->netdev
->trans_start
= jiffies
;
4039 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
4040 usleep_range(1000, 2000);
4041 ixgbe_down(adapter
);
4043 * If SR-IOV enabled then wait a bit before bringing the adapter
4044 * back up to give the VFs time to respond to the reset. The
4045 * two second wait is based upon the watchdog timer cycle in
4048 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4051 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
4054 void ixgbe_up(struct ixgbe_adapter
*adapter
)
4056 /* hardware has been reset, we need to reload some things */
4057 ixgbe_configure(adapter
);
4059 ixgbe_up_complete(adapter
);
4062 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
4064 struct ixgbe_hw
*hw
= &adapter
->hw
;
4067 /* lock SFP init bit to prevent race conditions with the watchdog */
4068 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
4069 usleep_range(1000, 2000);
4071 /* clear all SFP and link config related flags while holding SFP_INIT */
4072 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
4073 IXGBE_FLAG2_SFP_NEEDS_RESET
);
4074 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
4076 err
= hw
->mac
.ops
.init_hw(hw
);
4079 case IXGBE_ERR_SFP_NOT_PRESENT
:
4080 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
4082 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
4083 e_dev_err("master disable timed out\n");
4085 case IXGBE_ERR_EEPROM_VERSION
:
4086 /* We are running on a pre-production device, log a warning */
4087 e_dev_warn("This device is a pre-production adapter/LOM. "
4088 "Please be aware there may be issues associated with "
4089 "your hardware. If you are experiencing problems "
4090 "please contact your Intel or hardware "
4091 "representative who provided you with this "
4095 e_dev_err("Hardware Error: %d\n", err
);
4098 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
4100 /* reprogram the RAR[0] in case user changed it. */
4101 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
4106 * ixgbe_init_rx_page_offset - initialize page offset values for Rx buffers
4107 * @rx_ring: ring to setup
4109 * On many IA platforms the L1 cache has a critical stride of 4K, this
4110 * results in each receive buffer starting in the same cache set. To help
4111 * reduce the pressure on this cache set we can interleave the offsets so
4112 * that only every other buffer will be in the same cache set.
4114 static void ixgbe_init_rx_page_offset(struct ixgbe_ring
*rx_ring
)
4116 struct ixgbe_rx_buffer
*rx_buffer
= rx_ring
->rx_buffer_info
;
4119 for (i
= 0; i
< rx_ring
->count
; i
+= 2) {
4120 rx_buffer
[0].page_offset
= 0;
4121 rx_buffer
[1].page_offset
= ixgbe_rx_bufsz(rx_ring
);
4122 rx_buffer
= &rx_buffer
[2];
4127 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4128 * @rx_ring: ring to free buffers from
4130 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4132 struct device
*dev
= rx_ring
->dev
;
4136 /* ring already cleared, nothing to do */
4137 if (!rx_ring
->rx_buffer_info
)
4140 /* Free all the Rx ring sk_buffs */
4141 for (i
= 0; i
< rx_ring
->count
; i
++) {
4142 struct ixgbe_rx_buffer
*rx_buffer
;
4144 rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4145 if (rx_buffer
->skb
) {
4146 struct sk_buff
*skb
= rx_buffer
->skb
;
4147 if (IXGBE_CB(skb
)->page_released
) {
4150 ixgbe_rx_bufsz(rx_ring
),
4152 IXGBE_CB(skb
)->page_released
= false;
4156 rx_buffer
->skb
= NULL
;
4158 dma_unmap_page(dev
, rx_buffer
->dma
,
4159 ixgbe_rx_pg_size(rx_ring
),
4162 if (rx_buffer
->page
)
4163 __free_pages(rx_buffer
->page
,
4164 ixgbe_rx_pg_order(rx_ring
));
4165 rx_buffer
->page
= NULL
;
4168 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4169 memset(rx_ring
->rx_buffer_info
, 0, size
);
4171 ixgbe_init_rx_page_offset(rx_ring
);
4173 /* Zero out the descriptor ring */
4174 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4176 rx_ring
->next_to_alloc
= 0;
4177 rx_ring
->next_to_clean
= 0;
4178 rx_ring
->next_to_use
= 0;
4182 * ixgbe_clean_tx_ring - Free Tx Buffers
4183 * @tx_ring: ring to be cleaned
4185 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
4187 struct ixgbe_tx_buffer
*tx_buffer_info
;
4191 /* ring already cleared, nothing to do */
4192 if (!tx_ring
->tx_buffer_info
)
4195 /* Free all the Tx ring sk_buffs */
4196 for (i
= 0; i
< tx_ring
->count
; i
++) {
4197 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
4198 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
4201 netdev_tx_reset_queue(txring_txq(tx_ring
));
4203 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4204 memset(tx_ring
->tx_buffer_info
, 0, size
);
4206 /* Zero out the descriptor ring */
4207 memset(tx_ring
->desc
, 0, tx_ring
->size
);
4209 tx_ring
->next_to_use
= 0;
4210 tx_ring
->next_to_clean
= 0;
4214 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4215 * @adapter: board private structure
4217 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
4221 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4222 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
4226 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4227 * @adapter: board private structure
4229 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
4233 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4234 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
4237 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
4239 struct hlist_node
*node
, *node2
;
4240 struct ixgbe_fdir_filter
*filter
;
4242 spin_lock(&adapter
->fdir_perfect_lock
);
4244 hlist_for_each_entry_safe(filter
, node
, node2
,
4245 &adapter
->fdir_filter_list
, fdir_node
) {
4246 hlist_del(&filter
->fdir_node
);
4249 adapter
->fdir_filter_count
= 0;
4251 spin_unlock(&adapter
->fdir_perfect_lock
);
4254 void ixgbe_down(struct ixgbe_adapter
*adapter
)
4256 struct net_device
*netdev
= adapter
->netdev
;
4257 struct ixgbe_hw
*hw
= &adapter
->hw
;
4261 /* signal that we are down to the interrupt handler */
4262 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4264 /* disable receives */
4265 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
4266 IXGBE_WRITE_REG(hw
, IXGBE_RXCTRL
, rxctrl
& ~IXGBE_RXCTRL_RXEN
);
4268 /* disable all enabled rx queues */
4269 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4270 /* this call also flushes the previous write */
4271 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
4273 usleep_range(10000, 20000);
4275 netif_tx_stop_all_queues(netdev
);
4277 /* call carrier off first to avoid false dev_watchdog timeouts */
4278 netif_carrier_off(netdev
);
4279 netif_tx_disable(netdev
);
4281 ixgbe_irq_disable(adapter
);
4283 ixgbe_napi_disable_all(adapter
);
4285 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
4286 IXGBE_FLAG2_RESET_REQUESTED
);
4287 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
4289 del_timer_sync(&adapter
->service_timer
);
4291 if (adapter
->num_vfs
) {
4292 /* Clear EITR Select mapping */
4293 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
4295 /* Mark all the VFs as inactive */
4296 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
4297 adapter
->vfinfo
[i
].clear_to_send
= false;
4299 /* ping all the active vfs to let them know we are going down */
4300 ixgbe_ping_all_vfs(adapter
);
4302 /* Disable all VFTE/VFRE TX/RX */
4303 ixgbe_disable_tx_rx(adapter
);
4306 /* disable transmits in the hardware now that interrupts are off */
4307 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4308 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
4309 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
4312 /* Disable the Tx DMA engine on 82599 and X540 */
4313 switch (hw
->mac
.type
) {
4314 case ixgbe_mac_82599EB
:
4315 case ixgbe_mac_X540
:
4316 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
4317 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
4318 ~IXGBE_DMATXCTL_TE
));
4324 if (!pci_channel_offline(adapter
->pdev
))
4325 ixgbe_reset(adapter
);
4327 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
4328 if (hw
->mac
.ops
.disable_tx_laser
&&
4329 ((hw
->phy
.multispeed_fiber
) ||
4330 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
4331 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
4332 hw
->mac
.ops
.disable_tx_laser(hw
);
4334 ixgbe_clean_all_tx_rings(adapter
);
4335 ixgbe_clean_all_rx_rings(adapter
);
4337 #ifdef CONFIG_IXGBE_DCA
4338 /* since we reset the hardware DCA settings were cleared */
4339 ixgbe_setup_dca(adapter
);
4344 * ixgbe_tx_timeout - Respond to a Tx Hang
4345 * @netdev: network interface device structure
4347 static void ixgbe_tx_timeout(struct net_device
*netdev
)
4349 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4351 /* Do the reset outside of interrupt context */
4352 ixgbe_tx_timeout_reset(adapter
);
4356 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4357 * @adapter: board private structure to initialize
4359 * ixgbe_sw_init initializes the Adapter private data structure.
4360 * Fields are initialized based on PCI device information and
4361 * OS network device settings (MTU size).
4363 static int __devinit
ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
4365 struct ixgbe_hw
*hw
= &adapter
->hw
;
4366 struct pci_dev
*pdev
= adapter
->pdev
;
4368 #ifdef CONFIG_IXGBE_DCB
4370 struct tc_configuration
*tc
;
4373 /* PCI config space info */
4375 hw
->vendor_id
= pdev
->vendor
;
4376 hw
->device_id
= pdev
->device
;
4377 hw
->revision_id
= pdev
->revision
;
4378 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
4379 hw
->subsystem_device_id
= pdev
->subsystem_device
;
4381 /* Set capability flags */
4382 rss
= min_t(int, IXGBE_MAX_RSS_INDICES
, num_online_cpus());
4383 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
4384 adapter
->flags
|= IXGBE_FLAG_RSS_ENABLED
;
4385 switch (hw
->mac
.type
) {
4386 case ixgbe_mac_82598EB
:
4387 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
4388 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
4389 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
4391 case ixgbe_mac_X540
:
4392 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4393 case ixgbe_mac_82599EB
:
4394 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
4395 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
4396 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
4397 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
4398 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
4399 /* Flow Director hash filters enabled */
4400 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
4401 adapter
->atr_sample_rate
= 20;
4402 adapter
->ring_feature
[RING_F_FDIR
].limit
=
4403 IXGBE_MAX_FDIR_INDICES
;
4404 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
4406 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
4407 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
4408 #ifdef CONFIG_IXGBE_DCB
4409 /* Default traffic class to use for FCoE */
4410 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
4412 #endif /* IXGBE_FCOE */
4418 /* n-tuple support exists, always init our spinlock */
4419 spin_lock_init(&adapter
->fdir_perfect_lock
);
4421 #ifdef CONFIG_IXGBE_DCB
4422 switch (hw
->mac
.type
) {
4423 case ixgbe_mac_X540
:
4424 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
4425 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
4428 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
4429 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
4433 /* Configure DCB traffic classes */
4434 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
4435 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
4436 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
4437 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4438 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
4439 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
4440 tc
->dcb_pfc
= pfc_disabled
;
4443 /* Initialize default user to priority mapping, UPx->TC0 */
4444 tc
= &adapter
->dcb_cfg
.tc_config
[0];
4445 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4446 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
4448 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
4449 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
4450 adapter
->dcb_cfg
.pfc_mode_enable
= false;
4451 adapter
->dcb_set_bitmap
= 0x00;
4452 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
4453 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
4454 sizeof(adapter
->temp_dcb_cfg
));
4458 /* default flow control settings */
4459 hw
->fc
.requested_mode
= ixgbe_fc_full
;
4460 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
4461 ixgbe_pbthresh_setup(adapter
);
4462 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
4463 hw
->fc
.send_xon
= true;
4464 hw
->fc
.disable_fc_autoneg
= false;
4466 /* enable itr by default in dynamic mode */
4467 adapter
->rx_itr_setting
= 1;
4468 adapter
->tx_itr_setting
= 1;
4470 /* set default ring sizes */
4471 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
4472 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
4474 /* set default work limits */
4475 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
4477 /* initialize eeprom parameters */
4478 if (ixgbe_init_eeprom_params_generic(hw
)) {
4479 e_dev_err("EEPROM initialization failed\n");
4483 set_bit(__IXGBE_DOWN
, &adapter
->state
);
4489 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
4490 * @tx_ring: tx descriptor ring (for a specific queue) to setup
4492 * Return 0 on success, negative on failure
4494 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
4496 struct device
*dev
= tx_ring
->dev
;
4497 int orig_node
= dev_to_node(dev
);
4501 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
4503 if (tx_ring
->q_vector
)
4504 numa_node
= tx_ring
->q_vector
->numa_node
;
4506 tx_ring
->tx_buffer_info
= vzalloc_node(size
, numa_node
);
4507 if (!tx_ring
->tx_buffer_info
)
4508 tx_ring
->tx_buffer_info
= vzalloc(size
);
4509 if (!tx_ring
->tx_buffer_info
)
4512 /* round up to nearest 4K */
4513 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
4514 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
4516 set_dev_node(dev
, numa_node
);
4517 tx_ring
->desc
= dma_alloc_coherent(dev
,
4521 set_dev_node(dev
, orig_node
);
4523 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
4524 &tx_ring
->dma
, GFP_KERNEL
);
4528 tx_ring
->next_to_use
= 0;
4529 tx_ring
->next_to_clean
= 0;
4533 vfree(tx_ring
->tx_buffer_info
);
4534 tx_ring
->tx_buffer_info
= NULL
;
4535 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
4540 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
4541 * @adapter: board private structure
4543 * If this function returns with an error, then it's possible one or
4544 * more of the rings is populated (while the rest are not). It is the
4545 * callers duty to clean those orphaned rings.
4547 * Return 0 on success, negative on failure
4549 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
4553 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4554 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
4557 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
4565 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
4566 * @rx_ring: rx descriptor ring (for a specific queue) to setup
4568 * Returns 0 on success, negative on failure
4570 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
4572 struct device
*dev
= rx_ring
->dev
;
4573 int orig_node
= dev_to_node(dev
);
4577 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4579 if (rx_ring
->q_vector
)
4580 numa_node
= rx_ring
->q_vector
->numa_node
;
4582 rx_ring
->rx_buffer_info
= vzalloc_node(size
, numa_node
);
4583 if (!rx_ring
->rx_buffer_info
)
4584 rx_ring
->rx_buffer_info
= vzalloc(size
);
4585 if (!rx_ring
->rx_buffer_info
)
4588 /* Round up to nearest 4K */
4589 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
4590 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
4592 set_dev_node(dev
, numa_node
);
4593 rx_ring
->desc
= dma_alloc_coherent(dev
,
4597 set_dev_node(dev
, orig_node
);
4599 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
4600 &rx_ring
->dma
, GFP_KERNEL
);
4604 rx_ring
->next_to_clean
= 0;
4605 rx_ring
->next_to_use
= 0;
4607 ixgbe_init_rx_page_offset(rx_ring
);
4611 vfree(rx_ring
->rx_buffer_info
);
4612 rx_ring
->rx_buffer_info
= NULL
;
4613 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
4618 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
4619 * @adapter: board private structure
4621 * If this function returns with an error, then it's possible one or
4622 * more of the rings is populated (while the rest are not). It is the
4623 * callers duty to clean those orphaned rings.
4625 * Return 0 on success, negative on failure
4627 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
4631 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4632 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
4635 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
4643 * ixgbe_free_tx_resources - Free Tx Resources per Queue
4644 * @tx_ring: Tx descriptor ring for a specific queue
4646 * Free all transmit software resources
4648 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
4650 ixgbe_clean_tx_ring(tx_ring
);
4652 vfree(tx_ring
->tx_buffer_info
);
4653 tx_ring
->tx_buffer_info
= NULL
;
4655 /* if not set, then don't free */
4659 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
4660 tx_ring
->desc
, tx_ring
->dma
);
4662 tx_ring
->desc
= NULL
;
4666 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
4667 * @adapter: board private structure
4669 * Free all transmit software resources
4671 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
4675 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
4676 if (adapter
->tx_ring
[i
]->desc
)
4677 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
4681 * ixgbe_free_rx_resources - Free Rx Resources
4682 * @rx_ring: ring to clean the resources from
4684 * Free all receive software resources
4686 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
4688 ixgbe_clean_rx_ring(rx_ring
);
4690 vfree(rx_ring
->rx_buffer_info
);
4691 rx_ring
->rx_buffer_info
= NULL
;
4693 /* if not set, then don't free */
4697 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
4698 rx_ring
->desc
, rx_ring
->dma
);
4700 rx_ring
->desc
= NULL
;
4704 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
4705 * @adapter: board private structure
4707 * Free all receive software resources
4709 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
4713 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4714 if (adapter
->rx_ring
[i
]->desc
)
4715 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
4719 * ixgbe_change_mtu - Change the Maximum Transfer Unit
4720 * @netdev: network interface device structure
4721 * @new_mtu: new value for maximum frame size
4723 * Returns 0 on success, negative on failure
4725 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
4727 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4728 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4730 /* MTU < 68 is an error and causes problems on some kernels */
4731 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
4735 * For 82599EB we cannot allow PF to change MTU greater than 1500
4736 * in SR-IOV mode as it may cause buffer overruns in guest VFs that
4737 * don't allocate and chain buffers correctly.
4739 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
4740 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
4741 (max_frame
> MAXIMUM_ETHERNET_VLAN_SIZE
))
4744 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
4746 /* must set new MTU before calling down or up */
4747 netdev
->mtu
= new_mtu
;
4749 if (netif_running(netdev
))
4750 ixgbe_reinit_locked(adapter
);
4756 * ixgbe_open - Called when a network interface is made active
4757 * @netdev: network interface device structure
4759 * Returns 0 on success, negative value on failure
4761 * The open entry point is called when a network interface is made
4762 * active by the system (IFF_UP). At this point all resources needed
4763 * for transmit and receive operations are allocated, the interrupt
4764 * handler is registered with the OS, the watchdog timer is started,
4765 * and the stack is notified that the interface is ready.
4767 static int ixgbe_open(struct net_device
*netdev
)
4769 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4772 /* disallow open during test */
4773 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
4776 netif_carrier_off(netdev
);
4778 /* allocate transmit descriptors */
4779 err
= ixgbe_setup_all_tx_resources(adapter
);
4783 /* allocate receive descriptors */
4784 err
= ixgbe_setup_all_rx_resources(adapter
);
4788 ixgbe_configure(adapter
);
4790 err
= ixgbe_request_irq(adapter
);
4794 ixgbe_up_complete(adapter
);
4800 ixgbe_free_all_rx_resources(adapter
);
4802 ixgbe_free_all_tx_resources(adapter
);
4803 ixgbe_reset(adapter
);
4809 * ixgbe_close - Disables a network interface
4810 * @netdev: network interface device structure
4812 * Returns 0, this is not allowed to fail
4814 * The close entry point is called when an interface is de-activated
4815 * by the OS. The hardware is still under the drivers control, but
4816 * needs to be disabled. A global MAC reset is issued to stop the
4817 * hardware, and all transmit and receive resources are freed.
4819 static int ixgbe_close(struct net_device
*netdev
)
4821 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4823 ixgbe_down(adapter
);
4824 ixgbe_free_irq(adapter
);
4826 ixgbe_fdir_filter_exit(adapter
);
4828 ixgbe_free_all_tx_resources(adapter
);
4829 ixgbe_free_all_rx_resources(adapter
);
4831 ixgbe_release_hw_control(adapter
);
4837 static int ixgbe_resume(struct pci_dev
*pdev
)
4839 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4840 struct net_device
*netdev
= adapter
->netdev
;
4843 pci_set_power_state(pdev
, PCI_D0
);
4844 pci_restore_state(pdev
);
4846 * pci_restore_state clears dev->state_saved so call
4847 * pci_save_state to restore it.
4849 pci_save_state(pdev
);
4851 err
= pci_enable_device_mem(pdev
);
4853 e_dev_err("Cannot enable PCI device from suspend\n");
4856 pci_set_master(pdev
);
4858 pci_wake_from_d3(pdev
, false);
4861 err
= ixgbe_init_interrupt_scheme(adapter
);
4864 e_dev_err("Cannot initialize interrupts for device\n");
4868 ixgbe_reset(adapter
);
4870 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
4872 if (netif_running(netdev
)) {
4873 err
= ixgbe_open(netdev
);
4878 netif_device_attach(netdev
);
4882 #endif /* CONFIG_PM */
4884 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
4886 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
4887 struct net_device
*netdev
= adapter
->netdev
;
4888 struct ixgbe_hw
*hw
= &adapter
->hw
;
4890 u32 wufc
= adapter
->wol
;
4895 netif_device_detach(netdev
);
4897 if (netif_running(netdev
)) {
4899 ixgbe_down(adapter
);
4900 ixgbe_free_irq(adapter
);
4901 ixgbe_free_all_tx_resources(adapter
);
4902 ixgbe_free_all_rx_resources(adapter
);
4906 ixgbe_clear_interrupt_scheme(adapter
);
4909 retval
= pci_save_state(pdev
);
4915 ixgbe_set_rx_mode(netdev
);
4918 * enable the optics for both mult-speed fiber and
4919 * 82599 SFP+ fiber as we can WoL.
4921 if (hw
->mac
.ops
.enable_tx_laser
&&
4922 (hw
->phy
.multispeed_fiber
||
4923 (hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
&&
4924 hw
->mac
.type
== ixgbe_mac_82599EB
)))
4925 hw
->mac
.ops
.enable_tx_laser(hw
);
4927 /* turn on all-multi mode if wake on multicast is enabled */
4928 if (wufc
& IXGBE_WUFC_MC
) {
4929 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4930 fctrl
|= IXGBE_FCTRL_MPE
;
4931 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4934 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
4935 ctrl
|= IXGBE_CTRL_GIO_DIS
;
4936 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
4938 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
4940 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
4941 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
4944 switch (hw
->mac
.type
) {
4945 case ixgbe_mac_82598EB
:
4946 pci_wake_from_d3(pdev
, false);
4948 case ixgbe_mac_82599EB
:
4949 case ixgbe_mac_X540
:
4950 pci_wake_from_d3(pdev
, !!wufc
);
4956 *enable_wake
= !!wufc
;
4958 ixgbe_release_hw_control(adapter
);
4960 pci_disable_device(pdev
);
4966 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
4971 retval
= __ixgbe_shutdown(pdev
, &wake
);
4976 pci_prepare_to_sleep(pdev
);
4978 pci_wake_from_d3(pdev
, false);
4979 pci_set_power_state(pdev
, PCI_D3hot
);
4984 #endif /* CONFIG_PM */
4986 static void ixgbe_shutdown(struct pci_dev
*pdev
)
4990 __ixgbe_shutdown(pdev
, &wake
);
4992 if (system_state
== SYSTEM_POWER_OFF
) {
4993 pci_wake_from_d3(pdev
, wake
);
4994 pci_set_power_state(pdev
, PCI_D3hot
);
4999 * ixgbe_update_stats - Update the board statistics counters.
5000 * @adapter: board private structure
5002 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
5004 struct net_device
*netdev
= adapter
->netdev
;
5005 struct ixgbe_hw
*hw
= &adapter
->hw
;
5006 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
5008 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
5009 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
5010 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
5011 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
5013 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
5015 u64 fcoe_noddp_counts_sum
= 0, fcoe_noddp_ext_buff_counts_sum
= 0;
5016 #endif /* IXGBE_FCOE */
5018 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5019 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5022 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
5025 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5026 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
5027 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
5029 adapter
->rsc_total_count
= rsc_count
;
5030 adapter
->rsc_total_flush
= rsc_flush
;
5033 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5034 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
5035 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
5036 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
5037 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
5038 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
5039 bytes
+= rx_ring
->stats
.bytes
;
5040 packets
+= rx_ring
->stats
.packets
;
5042 adapter
->non_eop_descs
= non_eop_descs
;
5043 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
5044 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
5045 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
5046 netdev
->stats
.rx_bytes
= bytes
;
5047 netdev
->stats
.rx_packets
= packets
;
5051 /* gather some stats to the adapter struct that are per queue */
5052 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5053 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5054 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
5055 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
5056 bytes
+= tx_ring
->stats
.bytes
;
5057 packets
+= tx_ring
->stats
.packets
;
5059 adapter
->restart_queue
= restart_queue
;
5060 adapter
->tx_busy
= tx_busy
;
5061 netdev
->stats
.tx_bytes
= bytes
;
5062 netdev
->stats
.tx_packets
= packets
;
5064 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
5066 /* 8 register reads */
5067 for (i
= 0; i
< 8; i
++) {
5068 /* for packet buffers not used, the register should read 0 */
5069 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
5071 hwstats
->mpc
[i
] += mpc
;
5072 total_mpc
+= hwstats
->mpc
[i
];
5073 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
5074 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
5075 switch (hw
->mac
.type
) {
5076 case ixgbe_mac_82598EB
:
5077 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
5078 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
5079 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
5080 hwstats
->pxonrxc
[i
] +=
5081 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
5083 case ixgbe_mac_82599EB
:
5084 case ixgbe_mac_X540
:
5085 hwstats
->pxonrxc
[i
] +=
5086 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
5093 /*16 register reads */
5094 for (i
= 0; i
< 16; i
++) {
5095 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
5096 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
5097 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
5098 (hw
->mac
.type
== ixgbe_mac_X540
)) {
5099 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
5100 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
5101 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
5102 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
5106 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
5107 /* work around hardware counting issue */
5108 hwstats
->gprc
-= missed_rx
;
5110 ixgbe_update_xoff_received(adapter
);
5112 /* 82598 hardware only has a 32 bit counter in the high register */
5113 switch (hw
->mac
.type
) {
5114 case ixgbe_mac_82598EB
:
5115 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
5116 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
5117 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
5118 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
5120 case ixgbe_mac_X540
:
5121 /* OS2BMC stats are X540 only*/
5122 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
5123 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
5124 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
5125 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
5126 case ixgbe_mac_82599EB
:
5127 for (i
= 0; i
< 16; i
++)
5128 adapter
->hw_rx_no_dma_resources
+=
5129 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
5130 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
5131 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
5132 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
5133 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
5134 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
5135 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
5136 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
5137 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
5138 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
5140 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
5141 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
5142 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
5143 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
5144 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
5145 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
5146 /* Add up per cpu counters for total ddp aloc fail */
5147 if (fcoe
->pcpu_noddp
&& fcoe
->pcpu_noddp_ext_buff
) {
5148 for_each_possible_cpu(cpu
) {
5149 fcoe_noddp_counts_sum
+=
5150 *per_cpu_ptr(fcoe
->pcpu_noddp
, cpu
);
5151 fcoe_noddp_ext_buff_counts_sum
+=
5153 pcpu_noddp_ext_buff
, cpu
);
5156 hwstats
->fcoe_noddp
= fcoe_noddp_counts_sum
;
5157 hwstats
->fcoe_noddp_ext_buff
= fcoe_noddp_ext_buff_counts_sum
;
5158 #endif /* IXGBE_FCOE */
5163 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
5164 hwstats
->bprc
+= bprc
;
5165 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
5166 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5167 hwstats
->mprc
-= bprc
;
5168 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
5169 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
5170 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
5171 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
5172 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
5173 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
5174 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
5175 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
5176 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
5177 hwstats
->lxontxc
+= lxon
;
5178 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
5179 hwstats
->lxofftxc
+= lxoff
;
5180 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
5181 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
5183 * 82598 errata - tx of flow control packets is included in tx counters
5185 xon_off_tot
= lxon
+ lxoff
;
5186 hwstats
->gptc
-= xon_off_tot
;
5187 hwstats
->mptc
-= xon_off_tot
;
5188 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
5189 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
5190 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
5191 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
5192 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
5193 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
5194 hwstats
->ptc64
-= xon_off_tot
;
5195 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
5196 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
5197 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
5198 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
5199 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
5200 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
5202 /* Fill out the OS statistics structure */
5203 netdev
->stats
.multicast
= hwstats
->mprc
;
5206 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
5207 netdev
->stats
.rx_dropped
= 0;
5208 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
5209 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
5210 netdev
->stats
.rx_missed_errors
= total_mpc
;
5214 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5215 * @adapter: pointer to the device adapter structure
5217 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
5219 struct ixgbe_hw
*hw
= &adapter
->hw
;
5222 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
5225 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
5227 /* if interface is down do nothing */
5228 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
5231 /* do nothing if we are not using signature filters */
5232 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
5235 adapter
->fdir_overflow
++;
5237 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
5238 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5239 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
5240 &(adapter
->tx_ring
[i
]->state
));
5241 /* re-enable flow director interrupts */
5242 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
5244 e_err(probe
, "failed to finish FDIR re-initialization, "
5245 "ignored adding FDIR ATR filters\n");
5250 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5251 * @adapter: pointer to the device adapter structure
5253 * This function serves two purposes. First it strobes the interrupt lines
5254 * in order to make certain interrupts are occurring. Secondly it sets the
5255 * bits needed to check for TX hangs. As a result we should immediately
5256 * determine if a hang has occurred.
5258 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
5260 struct ixgbe_hw
*hw
= &adapter
->hw
;
5264 /* If we're down or resetting, just bail */
5265 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5266 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5269 /* Force detection of hung controller */
5270 if (netif_carrier_ok(adapter
->netdev
)) {
5271 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5272 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
5275 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
5277 * for legacy and MSI interrupts don't set any bits
5278 * that are enabled for EIAM, because this operation
5279 * would set *both* EIMS and EICS for any bit in EIAM
5281 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
5282 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
5284 /* get one bit for every active tx/rx interrupt vector */
5285 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5286 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
5287 if (qv
->rx
.ring
|| qv
->tx
.ring
)
5288 eics
|= ((u64
)1 << i
);
5292 /* Cause software interrupt to ensure rings are cleaned */
5293 ixgbe_irq_rearm_queues(adapter
, eics
);
5298 * ixgbe_watchdog_update_link - update the link status
5299 * @adapter: pointer to the device adapter structure
5300 * @link_speed: pointer to a u32 to store the link_speed
5302 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
5304 struct ixgbe_hw
*hw
= &adapter
->hw
;
5305 u32 link_speed
= adapter
->link_speed
;
5306 bool link_up
= adapter
->link_up
;
5307 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
5309 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5312 if (hw
->mac
.ops
.check_link
) {
5313 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
5315 /* always assume link is up, if no check link function */
5316 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
5320 if (adapter
->ixgbe_ieee_pfc
)
5321 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
5323 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
5324 hw
->mac
.ops
.fc_enable(hw
);
5325 ixgbe_set_rx_drop_en(adapter
);
5329 time_after(jiffies
, (adapter
->link_check_timeout
+
5330 IXGBE_TRY_LINK_TIMEOUT
))) {
5331 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5332 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
5333 IXGBE_WRITE_FLUSH(hw
);
5336 adapter
->link_up
= link_up
;
5337 adapter
->link_speed
= link_speed
;
5341 * ixgbe_watchdog_link_is_up - update netif_carrier status and
5342 * print link up message
5343 * @adapter: pointer to the device adapter structure
5345 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
5347 struct net_device
*netdev
= adapter
->netdev
;
5348 struct ixgbe_hw
*hw
= &adapter
->hw
;
5349 u32 link_speed
= adapter
->link_speed
;
5350 bool flow_rx
, flow_tx
;
5352 /* only continue if link was previously down */
5353 if (netif_carrier_ok(netdev
))
5356 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
5358 switch (hw
->mac
.type
) {
5359 case ixgbe_mac_82598EB
: {
5360 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
5361 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
5362 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
5363 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
5366 case ixgbe_mac_X540
:
5367 case ixgbe_mac_82599EB
: {
5368 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
5369 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
5370 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
5371 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
5380 #ifdef CONFIG_IXGBE_PTP
5381 ixgbe_ptp_start_cyclecounter(adapter
);
5384 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n",
5385 (link_speed
== IXGBE_LINK_SPEED_10GB_FULL
?
5387 (link_speed
== IXGBE_LINK_SPEED_1GB_FULL
?
5389 (link_speed
== IXGBE_LINK_SPEED_100_FULL
?
5392 ((flow_rx
&& flow_tx
) ? "RX/TX" :
5394 (flow_tx
? "TX" : "None"))));
5396 netif_carrier_on(netdev
);
5397 ixgbe_check_vf_rate_limit(adapter
);
5401 * ixgbe_watchdog_link_is_down - update netif_carrier status and
5402 * print link down message
5403 * @adapter: pointer to the adapter structure
5405 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
5407 struct net_device
*netdev
= adapter
->netdev
;
5408 struct ixgbe_hw
*hw
= &adapter
->hw
;
5410 adapter
->link_up
= false;
5411 adapter
->link_speed
= 0;
5413 /* only continue if link was up previously */
5414 if (!netif_carrier_ok(netdev
))
5417 /* poll for SFP+ cable when link is down */
5418 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
5419 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5421 #ifdef CONFIG_IXGBE_PTP
5422 ixgbe_ptp_start_cyclecounter(adapter
);
5425 e_info(drv
, "NIC Link is Down\n");
5426 netif_carrier_off(netdev
);
5430 * ixgbe_watchdog_flush_tx - flush queues on link down
5431 * @adapter: pointer to the device adapter structure
5433 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
5436 int some_tx_pending
= 0;
5438 if (!netif_carrier_ok(adapter
->netdev
)) {
5439 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5440 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
5441 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
) {
5442 some_tx_pending
= 1;
5447 if (some_tx_pending
) {
5448 /* We've lost link, so the controller stops DMA,
5449 * but we've got queued Tx work that's never going
5450 * to get done, so reset controller to flush Tx.
5451 * (Do the reset outside of interrupt context).
5453 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
5458 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
5462 /* Do not perform spoof check for 82598 */
5463 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5466 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
5469 * ssvpc register is cleared on read, if zero then no
5470 * spoofed packets in the last interval.
5475 e_warn(drv
, "%d Spoofed packets detected\n", ssvpc
);
5479 * ixgbe_watchdog_subtask - check and bring link up
5480 * @adapter: pointer to the device adapter structure
5482 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
5484 /* if interface is down do nothing */
5485 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5486 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5489 ixgbe_watchdog_update_link(adapter
);
5491 if (adapter
->link_up
)
5492 ixgbe_watchdog_link_is_up(adapter
);
5494 ixgbe_watchdog_link_is_down(adapter
);
5496 ixgbe_spoof_check(adapter
);
5497 ixgbe_update_stats(adapter
);
5499 ixgbe_watchdog_flush_tx(adapter
);
5503 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
5504 * @adapter: the ixgbe adapter structure
5506 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
5508 struct ixgbe_hw
*hw
= &adapter
->hw
;
5511 /* not searching for SFP so there is nothing to do here */
5512 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
5513 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5516 /* someone else is in init, wait until next service event */
5517 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5520 err
= hw
->phy
.ops
.identify_sfp(hw
);
5521 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5524 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
5525 /* If no cable is present, then we need to reset
5526 * the next time we find a good cable. */
5527 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5534 /* exit if reset not needed */
5535 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
5538 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
5541 * A module may be identified correctly, but the EEPROM may not have
5542 * support for that module. setup_sfp() will fail in that case, so
5543 * we should not allow that module to load.
5545 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
5546 err
= hw
->phy
.ops
.reset(hw
);
5548 err
= hw
->mac
.ops
.setup_sfp(hw
);
5550 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
5553 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
5554 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
5557 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5559 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
5560 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
5561 e_dev_err("failed to initialize because an unsupported "
5562 "SFP+ module type was detected.\n");
5563 e_dev_err("Reload the driver after installing a "
5564 "supported module.\n");
5565 unregister_netdev(adapter
->netdev
);
5570 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
5571 * @adapter: the ixgbe adapter structure
5573 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
5575 struct ixgbe_hw
*hw
= &adapter
->hw
;
5579 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
5582 /* someone else is in init, wait until next service event */
5583 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5586 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5588 autoneg
= hw
->phy
.autoneg_advertised
;
5589 if ((!autoneg
) && (hw
->mac
.ops
.get_link_capabilities
))
5590 hw
->mac
.ops
.get_link_capabilities(hw
, &autoneg
, &negotiation
);
5591 if (hw
->mac
.ops
.setup_link
)
5592 hw
->mac
.ops
.setup_link(hw
, autoneg
, negotiation
, true);
5594 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5595 adapter
->link_check_timeout
= jiffies
;
5596 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5599 #ifdef CONFIG_PCI_IOV
5600 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
5603 struct ixgbe_hw
*hw
= &adapter
->hw
;
5604 struct net_device
*netdev
= adapter
->netdev
;
5608 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
5609 if (gpc
) /* If incrementing then no need for the check below */
5612 * Check to see if a bad DMA write target from an errant or
5613 * malicious VF has caused a PCIe error. If so then we can
5614 * issue a VFLR to the offending VF(s) and then resume without
5615 * requesting a full slot reset.
5618 for (vf
= 0; vf
< adapter
->num_vfs
; vf
++) {
5619 ciaa
= (vf
<< 16) | 0x80000000;
5620 /* 32 bit read so align, we really want status at offset 6 */
5621 ciaa
|= PCI_COMMAND
;
5622 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5623 ciad
= IXGBE_READ_REG(hw
, IXGBE_CIAD_82599
);
5625 /* disable debug mode asap after reading data */
5626 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5627 /* Get the upper 16 bits which will be the PCI status reg */
5629 if (ciad
& PCI_STATUS_REC_MASTER_ABORT
) {
5630 netdev_err(netdev
, "VF %d Hung DMA\n", vf
);
5632 ciaa
= (vf
<< 16) | 0x80000000;
5634 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5635 ciad
= 0x00008000; /* VFLR */
5636 IXGBE_WRITE_REG(hw
, IXGBE_CIAD_82599
, ciad
);
5638 IXGBE_WRITE_REG(hw
, IXGBE_CIAA_82599
, ciaa
);
5645 * ixgbe_service_timer - Timer Call-back
5646 * @data: pointer to adapter cast into an unsigned long
5648 static void ixgbe_service_timer(unsigned long data
)
5650 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
5651 unsigned long next_event_offset
;
5654 /* poll faster when waiting for link */
5655 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
5656 next_event_offset
= HZ
/ 10;
5658 next_event_offset
= HZ
* 2;
5660 #ifdef CONFIG_PCI_IOV
5662 * don't bother with SR-IOV VF DMA hang check if there are
5663 * no VFs or the link is down
5665 if (!adapter
->num_vfs
||
5666 (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
5667 goto normal_timer_service
;
5669 /* If we have VFs allocated then we must check for DMA hangs */
5670 ixgbe_check_for_bad_vf(adapter
);
5671 next_event_offset
= HZ
/ 50;
5672 adapter
->timer_event_accumulator
++;
5674 if (adapter
->timer_event_accumulator
>= 100)
5675 adapter
->timer_event_accumulator
= 0;
5679 normal_timer_service
:
5681 /* Reset the timer */
5682 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
5685 ixgbe_service_event_schedule(adapter
);
5688 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
5690 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
5693 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
5695 /* If we're already down or resetting, just bail */
5696 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
5697 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
5700 ixgbe_dump(adapter
);
5701 netdev_err(adapter
->netdev
, "Reset adapter\n");
5702 adapter
->tx_timeout_count
++;
5704 ixgbe_reinit_locked(adapter
);
5708 * ixgbe_service_task - manages and runs subtasks
5709 * @work: pointer to work_struct containing our data
5711 static void ixgbe_service_task(struct work_struct
*work
)
5713 struct ixgbe_adapter
*adapter
= container_of(work
,
5714 struct ixgbe_adapter
,
5717 ixgbe_reset_subtask(adapter
);
5718 ixgbe_sfp_detection_subtask(adapter
);
5719 ixgbe_sfp_link_config_subtask(adapter
);
5720 ixgbe_check_overtemp_subtask(adapter
);
5721 ixgbe_watchdog_subtask(adapter
);
5722 ixgbe_fdir_reinit_subtask(adapter
);
5723 ixgbe_check_hang_subtask(adapter
);
5724 #ifdef CONFIG_IXGBE_PTP
5725 ixgbe_ptp_overflow_check(adapter
);
5728 ixgbe_service_event_complete(adapter
);
5731 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
5732 struct ixgbe_tx_buffer
*first
,
5735 struct sk_buff
*skb
= first
->skb
;
5736 u32 vlan_macip_lens
, type_tucmd
;
5737 u32 mss_l4len_idx
, l4len
;
5739 if (!skb_is_gso(skb
))
5742 if (skb_header_cloned(skb
)) {
5743 int err
= pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
);
5748 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5749 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5751 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
5752 struct iphdr
*iph
= ip_hdr(skb
);
5755 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
5759 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5760 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5761 IXGBE_TX_FLAGS_CSUM
|
5762 IXGBE_TX_FLAGS_IPV4
;
5763 } else if (skb_is_gso_v6(skb
)) {
5764 ipv6_hdr(skb
)->payload_len
= 0;
5765 tcp_hdr(skb
)->check
=
5766 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5767 &ipv6_hdr(skb
)->daddr
,
5769 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
5770 IXGBE_TX_FLAGS_CSUM
;
5773 /* compute header lengths */
5774 l4len
= tcp_hdrlen(skb
);
5775 *hdr_len
= skb_transport_offset(skb
) + l4len
;
5777 /* update gso size and bytecount with header size */
5778 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
5779 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
5781 /* mss_l4len_id: use 1 as index for TSO */
5782 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
5783 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
5784 mss_l4len_idx
|= 1 << IXGBE_ADVTXD_IDX_SHIFT
;
5786 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
5787 vlan_macip_lens
= skb_network_header_len(skb
);
5788 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5789 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5791 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
5797 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
5798 struct ixgbe_tx_buffer
*first
)
5800 struct sk_buff
*skb
= first
->skb
;
5801 u32 vlan_macip_lens
= 0;
5802 u32 mss_l4len_idx
= 0;
5805 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5806 if (!(first
->tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
) &&
5807 !(first
->tx_flags
& IXGBE_TX_FLAGS_TXSW
))
5811 switch (first
->protocol
) {
5812 case __constant_htons(ETH_P_IP
):
5813 vlan_macip_lens
|= skb_network_header_len(skb
);
5814 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
5815 l4_hdr
= ip_hdr(skb
)->protocol
;
5817 case __constant_htons(ETH_P_IPV6
):
5818 vlan_macip_lens
|= skb_network_header_len(skb
);
5819 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
5822 if (unlikely(net_ratelimit())) {
5823 dev_warn(tx_ring
->dev
,
5824 "partial checksum but proto=%x!\n",
5832 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
5833 mss_l4len_idx
= tcp_hdrlen(skb
) <<
5834 IXGBE_ADVTXD_L4LEN_SHIFT
;
5837 type_tucmd
|= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
5838 mss_l4len_idx
= sizeof(struct sctphdr
) <<
5839 IXGBE_ADVTXD_L4LEN_SHIFT
;
5842 mss_l4len_idx
= sizeof(struct udphdr
) <<
5843 IXGBE_ADVTXD_L4LEN_SHIFT
;
5846 if (unlikely(net_ratelimit())) {
5847 dev_warn(tx_ring
->dev
,
5848 "partial checksum but l4 proto=%x!\n",
5854 /* update TX checksum flag */
5855 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
5858 /* vlan_macip_lens: MACLEN, VLAN tag */
5859 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
5860 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
5862 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0,
5863 type_tucmd
, mss_l4len_idx
);
5866 static __le32
ixgbe_tx_cmd_type(u32 tx_flags
)
5868 /* set type for advanced descriptor with frame checksum insertion */
5869 __le32 cmd_type
= cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA
|
5870 IXGBE_ADVTXD_DCMD_IFCS
|
5871 IXGBE_ADVTXD_DCMD_DEXT
);
5873 /* set HW vlan bit if vlan is present */
5874 if (tx_flags
& IXGBE_TX_FLAGS_HW_VLAN
)
5875 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE
);
5877 #ifdef CONFIG_IXGBE_PTP
5878 if (tx_flags
& IXGBE_TX_FLAGS_TSTAMP
)
5879 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_MAC_TSTAMP
);
5882 /* set segmentation enable bits for TSO/FSO */
5884 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FSO
))
5886 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5888 cmd_type
|= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE
);
5893 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
5894 u32 tx_flags
, unsigned int paylen
)
5896 __le32 olinfo_status
= cpu_to_le32(paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
);
5898 /* enable L4 checksum for TSO and TX checksum offload */
5899 if (tx_flags
& IXGBE_TX_FLAGS_CSUM
)
5900 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM
);
5902 /* enble IPv4 checksum for TSO */
5903 if (tx_flags
& IXGBE_TX_FLAGS_IPV4
)
5904 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM
);
5906 /* use index 1 context for TSO/FSO/FCOE */
5908 if (tx_flags
& (IXGBE_TX_FLAGS_TSO
| IXGBE_TX_FLAGS_FCOE
))
5910 if (tx_flags
& IXGBE_TX_FLAGS_TSO
)
5912 olinfo_status
|= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT
);
5915 * Check Context must be set if Tx switch is enabled, which it
5916 * always is for case where virtual functions are running
5919 if (tx_flags
& (IXGBE_TX_FLAGS_TXSW
| IXGBE_TX_FLAGS_FCOE
))
5921 if (tx_flags
& IXGBE_TX_FLAGS_TXSW
)
5923 olinfo_status
|= cpu_to_le32(IXGBE_ADVTXD_CC
);
5925 tx_desc
->read
.olinfo_status
= olinfo_status
;
5928 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
5931 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
5932 struct ixgbe_tx_buffer
*first
,
5936 struct sk_buff
*skb
= first
->skb
;
5937 struct ixgbe_tx_buffer
*tx_buffer
;
5938 union ixgbe_adv_tx_desc
*tx_desc
;
5939 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
5940 unsigned int data_len
= skb
->data_len
;
5941 unsigned int size
= skb_headlen(skb
);
5942 unsigned int paylen
= skb
->len
- hdr_len
;
5943 u32 tx_flags
= first
->tx_flags
;
5945 u16 i
= tx_ring
->next_to_use
;
5947 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
5949 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, paylen
);
5950 cmd_type
= ixgbe_tx_cmd_type(tx_flags
);
5953 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
5954 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
5955 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
5958 data_len
-= sizeof(struct fcoe_crc_eof
);
5963 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
5964 if (dma_mapping_error(tx_ring
->dev
, dma
))
5967 /* record length, and DMA address */
5968 dma_unmap_len_set(first
, len
, size
);
5969 dma_unmap_addr_set(first
, dma
, dma
);
5971 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5974 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
5975 tx_desc
->read
.cmd_type_len
=
5976 cmd_type
| cpu_to_le32(IXGBE_MAX_DATA_PER_TXD
);
5980 if (i
== tx_ring
->count
) {
5981 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
5985 dma
+= IXGBE_MAX_DATA_PER_TXD
;
5986 size
-= IXGBE_MAX_DATA_PER_TXD
;
5988 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5989 tx_desc
->read
.olinfo_status
= 0;
5992 if (likely(!data_len
))
5995 if (unlikely(skb
->no_fcs
))
5996 cmd_type
&= ~(cpu_to_le32(IXGBE_ADVTXD_DCMD_IFCS
));
5997 tx_desc
->read
.cmd_type_len
= cmd_type
| cpu_to_le32(size
);
6001 if (i
== tx_ring
->count
) {
6002 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
6007 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
6009 size
= skb_frag_size(frag
);
6013 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
6015 if (dma_mapping_error(tx_ring
->dev
, dma
))
6018 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6019 dma_unmap_len_set(tx_buffer
, len
, size
);
6020 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
6022 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
6023 tx_desc
->read
.olinfo_status
= 0;
6028 /* write last descriptor with RS and EOP bits */
6029 cmd_type
|= cpu_to_le32(size
) | cpu_to_le32(IXGBE_TXD_CMD
);
6030 tx_desc
->read
.cmd_type_len
= cmd_type
;
6032 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
6034 /* set the timestamp */
6035 first
->time_stamp
= jiffies
;
6038 * Force memory writes to complete before letting h/w know there
6039 * are new descriptors to fetch. (Only applicable for weak-ordered
6040 * memory model archs, such as IA-64).
6042 * We also need this memory barrier to make certain all of the
6043 * status bits have been updated before next_to_watch is written.
6047 /* set next_to_watch value indicating a packet is present */
6048 first
->next_to_watch
= tx_desc
;
6051 if (i
== tx_ring
->count
)
6054 tx_ring
->next_to_use
= i
;
6056 /* notify HW of packet */
6057 writel(i
, tx_ring
->tail
);
6061 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
6063 /* clear dma mappings for failed tx_buffer_info map */
6065 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6066 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
6067 if (tx_buffer
== first
)
6074 tx_ring
->next_to_use
= i
;
6077 static void ixgbe_atr(struct ixgbe_ring
*ring
,
6078 struct ixgbe_tx_buffer
*first
)
6080 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
6081 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
6082 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
6084 unsigned char *network
;
6086 struct ipv6hdr
*ipv6
;
6091 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6095 /* do nothing if sampling is disabled */
6096 if (!ring
->atr_sample_rate
)
6101 /* snag network header to get L4 type and address */
6102 hdr
.network
= skb_network_header(first
->skb
);
6104 /* Currently only IPv4/IPv6 with TCP is supported */
6105 if ((first
->protocol
!= __constant_htons(ETH_P_IPV6
) ||
6106 hdr
.ipv6
->nexthdr
!= IPPROTO_TCP
) &&
6107 (first
->protocol
!= __constant_htons(ETH_P_IP
) ||
6108 hdr
.ipv4
->protocol
!= IPPROTO_TCP
))
6111 th
= tcp_hdr(first
->skb
);
6113 /* skip this packet since it is invalid or the socket is closing */
6117 /* sample on all syn packets or once every atr sample count */
6118 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
6121 /* reset sample count */
6122 ring
->atr_count
= 0;
6124 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
6127 * src and dst are inverted, think how the receiver sees them
6129 * The input is broken into two sections, a non-compressed section
6130 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6131 * is XORed together and stored in the compressed dword.
6133 input
.formatted
.vlan_id
= vlan_id
;
6136 * since src port and flex bytes occupy the same word XOR them together
6137 * and write the value to source port portion of compressed dword
6139 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
6140 common
.port
.src
^= th
->dest
^ __constant_htons(ETH_P_8021Q
);
6142 common
.port
.src
^= th
->dest
^ first
->protocol
;
6143 common
.port
.dst
^= th
->source
;
6145 if (first
->protocol
== __constant_htons(ETH_P_IP
)) {
6146 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
6147 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
6149 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
6150 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
6151 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
6152 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
6153 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
6154 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
6155 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
6156 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
6157 hdr
.ipv6
->daddr
.s6_addr32
[3];
6160 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6161 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
6162 input
, common
, ring
->queue_index
);
6165 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6167 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6168 /* Herbert's original patch had:
6169 * smp_mb__after_netif_stop_queue();
6170 * but since that doesn't exist yet, just open code it. */
6173 /* We need to check again in a case another CPU has just
6174 * made room available. */
6175 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
6178 /* A reprieve! - use start_queue because it doesn't call schedule */
6179 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
6180 ++tx_ring
->tx_stats
.restart_queue
;
6184 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
6186 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
6188 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
6191 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
)
6193 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6194 int txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
6197 __be16 protocol
= vlan_get_protocol(skb
);
6199 if (((protocol
== htons(ETH_P_FCOE
)) ||
6200 (protocol
== htons(ETH_P_FIP
))) &&
6201 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6202 struct ixgbe_ring_feature
*f
;
6204 f
= &adapter
->ring_feature
[RING_F_FCOE
];
6206 while (txq
>= f
->indices
)
6208 txq
+= adapter
->ring_feature
[RING_F_FCOE
].offset
;
6214 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
6215 while (unlikely(txq
>= dev
->real_num_tx_queues
))
6216 txq
-= dev
->real_num_tx_queues
;
6220 return skb_tx_hash(dev
, skb
);
6223 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
6224 struct ixgbe_adapter
*adapter
,
6225 struct ixgbe_ring
*tx_ring
)
6227 struct ixgbe_tx_buffer
*first
;
6230 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6233 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
6234 __be16 protocol
= skb
->protocol
;
6238 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6239 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6240 * + 2 desc gap to keep tail from touching head,
6241 * + 1 desc for context descriptor,
6242 * otherwise try next time
6244 #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
6245 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
6246 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
6248 count
+= skb_shinfo(skb
)->nr_frags
;
6250 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
6251 tx_ring
->tx_stats
.tx_busy
++;
6252 return NETDEV_TX_BUSY
;
6255 /* record the location of the first descriptor for this packet */
6256 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
6258 first
->bytecount
= skb
->len
;
6259 first
->gso_segs
= 1;
6261 /* if we have a HW VLAN tag being added default to the HW one */
6262 if (vlan_tx_tag_present(skb
)) {
6263 tx_flags
|= vlan_tx_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
6264 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6265 /* else if it is a SW VLAN check the next protocol and store the tag */
6266 } else if (protocol
== __constant_htons(ETH_P_8021Q
)) {
6267 struct vlan_hdr
*vhdr
, _vhdr
;
6268 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
6272 protocol
= vhdr
->h_vlan_encapsulated_proto
;
6273 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
6274 IXGBE_TX_FLAGS_VLAN_SHIFT
;
6275 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
6278 skb_tx_timestamp(skb
);
6280 #ifdef CONFIG_IXGBE_PTP
6281 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
6282 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
6283 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
6287 #ifdef CONFIG_PCI_IOV
6289 * Use the l2switch_enable flag - would be false if the DMA
6290 * Tx switch had been disabled.
6292 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6293 tx_flags
|= IXGBE_TX_FLAGS_TXSW
;
6296 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
6297 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
6298 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
6299 (skb
->priority
!= TC_PRIO_CONTROL
))) {
6300 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
6301 tx_flags
|= (skb
->priority
& 0x7) <<
6302 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
6303 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
6304 struct vlan_ethhdr
*vhdr
;
6305 if (skb_header_cloned(skb
) &&
6306 pskb_expand_head(skb
, 0, 0, GFP_ATOMIC
))
6308 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
6309 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
6310 IXGBE_TX_FLAGS_VLAN_SHIFT
);
6312 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
6316 /* record initial flags and protocol */
6317 first
->tx_flags
= tx_flags
;
6318 first
->protocol
= protocol
;
6321 /* setup tx offload for FCoE */
6322 if ((protocol
== __constant_htons(ETH_P_FCOE
)) &&
6323 (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)) {
6324 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
6331 #endif /* IXGBE_FCOE */
6332 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
6336 ixgbe_tx_csum(tx_ring
, first
);
6338 /* add the ATR filter if ATR is on */
6339 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
6340 ixgbe_atr(tx_ring
, first
);
6344 #endif /* IXGBE_FCOE */
6345 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
6347 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
6349 return NETDEV_TX_OK
;
6352 dev_kfree_skb_any(first
->skb
);
6355 return NETDEV_TX_OK
;
6358 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
6359 struct net_device
*netdev
)
6361 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6362 struct ixgbe_ring
*tx_ring
;
6365 * The minimum packet size for olinfo paylen is 17 so pad the skb
6366 * in order to meet this minimum size requirement.
6368 if (unlikely(skb
->len
< 17)) {
6369 if (skb_pad(skb
, 17 - skb
->len
))
6370 return NETDEV_TX_OK
;
6374 tx_ring
= adapter
->tx_ring
[skb
->queue_mapping
];
6375 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
6379 * ixgbe_set_mac - Change the Ethernet Address of the NIC
6380 * @netdev: network interface device structure
6381 * @p: pointer to an address structure
6383 * Returns 0 on success, negative on failure
6385 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
6387 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6388 struct ixgbe_hw
*hw
= &adapter
->hw
;
6389 struct sockaddr
*addr
= p
;
6391 if (!is_valid_ether_addr(addr
->sa_data
))
6392 return -EADDRNOTAVAIL
;
6394 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
6395 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
6397 hw
->mac
.ops
.set_rar(hw
, 0, hw
->mac
.addr
, adapter
->num_vfs
,
6404 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
6406 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6407 struct ixgbe_hw
*hw
= &adapter
->hw
;
6411 if (prtad
!= hw
->phy
.mdio
.prtad
)
6413 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
6419 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
6420 u16 addr
, u16 value
)
6422 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6423 struct ixgbe_hw
*hw
= &adapter
->hw
;
6425 if (prtad
!= hw
->phy
.mdio
.prtad
)
6427 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
6430 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
6432 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6435 #ifdef CONFIG_IXGBE_PTP
6437 return ixgbe_ptp_hwtstamp_ioctl(adapter
, req
, cmd
);
6440 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
6445 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
6447 * @netdev: network interface device structure
6449 * Returns non-zero on failure
6451 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
6454 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6455 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6457 if (is_valid_ether_addr(mac
->san_addr
)) {
6459 err
= dev_addr_add(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6466 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
6468 * @netdev: network interface device structure
6470 * Returns non-zero on failure
6472 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
6475 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6476 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
6478 if (is_valid_ether_addr(mac
->san_addr
)) {
6480 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
6486 #ifdef CONFIG_NET_POLL_CONTROLLER
6488 * Polling 'interrupt' - used by things like netconsole to send skbs
6489 * without having to re-enable interrupts. It's not called while
6490 * the interrupt routine is executing.
6492 static void ixgbe_netpoll(struct net_device
*netdev
)
6494 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6497 /* if interface is down do nothing */
6498 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6501 adapter
->flags
|= IXGBE_FLAG_IN_NETPOLL
;
6502 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
6503 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
6504 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
6506 ixgbe_intr(adapter
->pdev
->irq
, netdev
);
6508 adapter
->flags
&= ~IXGBE_FLAG_IN_NETPOLL
;
6512 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
6513 struct rtnl_link_stats64
*stats
)
6515 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6519 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6520 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
6526 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6527 packets
= ring
->stats
.packets
;
6528 bytes
= ring
->stats
.bytes
;
6529 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6530 stats
->rx_packets
+= packets
;
6531 stats
->rx_bytes
+= bytes
;
6535 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6536 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
6542 start
= u64_stats_fetch_begin_bh(&ring
->syncp
);
6543 packets
= ring
->stats
.packets
;
6544 bytes
= ring
->stats
.bytes
;
6545 } while (u64_stats_fetch_retry_bh(&ring
->syncp
, start
));
6546 stats
->tx_packets
+= packets
;
6547 stats
->tx_bytes
+= bytes
;
6551 /* following stats updated by ixgbe_watchdog_task() */
6552 stats
->multicast
= netdev
->stats
.multicast
;
6553 stats
->rx_errors
= netdev
->stats
.rx_errors
;
6554 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
6555 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
6556 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
6560 #ifdef CONFIG_IXGBE_DCB
6562 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
6563 * @adapter: pointer to ixgbe_adapter
6564 * @tc: number of traffic classes currently enabled
6566 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
6567 * 802.1Q priority maps to a packet buffer that exists.
6569 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
6571 struct ixgbe_hw
*hw
= &adapter
->hw
;
6575 /* 82598 have a static priority to TC mapping that can not
6576 * be changed so no validation is needed.
6578 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6581 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
6584 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
6585 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
6587 /* If up2tc is out of bounds default to zero */
6589 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
6593 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
6599 * ixgbe_setup_tc - configure net_device for multiple traffic classes
6601 * @netdev: net device to configure
6602 * @tc: number of traffic classes to enable
6604 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
6606 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6607 struct ixgbe_hw
*hw
= &adapter
->hw
;
6609 /* Multiple traffic classes requires multiple queues */
6610 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6611 e_err(drv
, "Enable failed, needs MSI-X\n");
6615 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6616 e_err(drv
, "Enable failed, SR-IOV enabled\n");
6620 /* Hardware supports up to 8 traffic classes */
6621 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
||
6622 (hw
->mac
.type
== ixgbe_mac_82598EB
&&
6623 tc
< MAX_TRAFFIC_CLASS
))
6626 /* Hardware has to reinitialize queues and interrupts to
6627 * match packet buffer alignment. Unfortunately, the
6628 * hardware is not flexible enough to do this dynamically.
6630 if (netif_running(dev
))
6632 ixgbe_clear_interrupt_scheme(adapter
);
6635 netdev_set_num_tc(dev
, tc
);
6636 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
6637 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6639 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
6640 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
6641 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
6644 netdev_reset_tc(dev
);
6645 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
6646 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
6648 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
6649 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6651 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
6652 adapter
->dcb_cfg
.pfc_mode_enable
= false;
6655 ixgbe_init_interrupt_scheme(adapter
);
6656 ixgbe_validate_rtr(adapter
, tc
);
6657 if (netif_running(dev
))
6663 #endif /* CONFIG_IXGBE_DCB */
6664 void ixgbe_do_reset(struct net_device
*netdev
)
6666 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6668 if (netif_running(netdev
))
6669 ixgbe_reinit_locked(adapter
);
6671 ixgbe_reset(adapter
);
6674 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
6675 netdev_features_t features
)
6677 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6679 /* return error if RXHASH is being enabled when RSS is not supported */
6680 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
))
6681 features
&= ~NETIF_F_RXHASH
;
6683 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
6684 if (!(features
& NETIF_F_RXCSUM
))
6685 features
&= ~NETIF_F_LRO
;
6687 /* Turn off LRO if not RSC capable */
6688 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
6689 features
&= ~NETIF_F_LRO
;
6694 static int ixgbe_set_features(struct net_device
*netdev
,
6695 netdev_features_t features
)
6697 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6698 netdev_features_t changed
= netdev
->features
^ features
;
6699 bool need_reset
= false;
6701 /* Make sure RSC matches LRO, reset if change */
6702 if (!(features
& NETIF_F_LRO
)) {
6703 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
6705 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
6706 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
6707 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
6708 if (adapter
->rx_itr_setting
== 1 ||
6709 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
6710 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
6712 } else if ((changed
^ features
) & NETIF_F_LRO
) {
6713 e_info(probe
, "rx-usecs set too low, "
6719 * Check if Flow Director n-tuple support was enabled or disabled. If
6720 * the state changed, we need to reset.
6722 if (!(features
& NETIF_F_NTUPLE
)) {
6723 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
6724 /* turn off Flow Director, set ATR and reset */
6725 if ((adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
) &&
6726 !(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
))
6727 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6730 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6731 } else if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)) {
6732 /* turn off ATR, enable perfect filters and reset */
6733 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
6734 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
6738 if (features
& NETIF_F_HW_VLAN_RX
)
6739 ixgbe_vlan_strip_enable(adapter
);
6741 ixgbe_vlan_strip_disable(adapter
);
6743 if (changed
& NETIF_F_RXALL
)
6746 netdev
->features
= features
;
6748 ixgbe_do_reset(netdev
);
6753 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
,
6754 struct net_device
*dev
,
6755 unsigned char *addr
,
6758 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6759 int err
= -EOPNOTSUPP
;
6761 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6762 pr_info("%s: FDB only supports static addresses\n",
6767 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6768 if (is_unicast_ether_addr(addr
))
6769 err
= dev_uc_add_excl(dev
, addr
);
6770 else if (is_multicast_ether_addr(addr
))
6771 err
= dev_mc_add_excl(dev
, addr
);
6776 /* Only return duplicate errors if NLM_F_EXCL is set */
6777 if (err
== -EEXIST
&& !(flags
& NLM_F_EXCL
))
6783 static int ixgbe_ndo_fdb_del(struct ndmsg
*ndm
,
6784 struct net_device
*dev
,
6785 unsigned char *addr
)
6787 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6788 int err
= -EOPNOTSUPP
;
6790 if (ndm
->ndm_state
& NUD_PERMANENT
) {
6791 pr_info("%s: FDB only supports static addresses\n",
6796 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
6797 if (is_unicast_ether_addr(addr
))
6798 err
= dev_uc_del(dev
, addr
);
6799 else if (is_multicast_ether_addr(addr
))
6800 err
= dev_mc_del(dev
, addr
);
6808 static int ixgbe_ndo_fdb_dump(struct sk_buff
*skb
,
6809 struct netlink_callback
*cb
,
6810 struct net_device
*dev
,
6813 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
6815 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
6816 idx
= ndo_dflt_fdb_dump(skb
, cb
, dev
, idx
);
6821 static const struct net_device_ops ixgbe_netdev_ops
= {
6822 .ndo_open
= ixgbe_open
,
6823 .ndo_stop
= ixgbe_close
,
6824 .ndo_start_xmit
= ixgbe_xmit_frame
,
6825 .ndo_select_queue
= ixgbe_select_queue
,
6826 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
6827 .ndo_validate_addr
= eth_validate_addr
,
6828 .ndo_set_mac_address
= ixgbe_set_mac
,
6829 .ndo_change_mtu
= ixgbe_change_mtu
,
6830 .ndo_tx_timeout
= ixgbe_tx_timeout
,
6831 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
6832 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
6833 .ndo_do_ioctl
= ixgbe_ioctl
,
6834 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
6835 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
6836 .ndo_set_vf_tx_rate
= ixgbe_ndo_set_vf_bw
,
6837 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
6838 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
6839 .ndo_get_stats64
= ixgbe_get_stats64
,
6840 #ifdef CONFIG_IXGBE_DCB
6841 .ndo_setup_tc
= ixgbe_setup_tc
,
6843 #ifdef CONFIG_NET_POLL_CONTROLLER
6844 .ndo_poll_controller
= ixgbe_netpoll
,
6847 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
6848 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
6849 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
6850 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
6851 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
6852 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
6853 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
6854 #endif /* IXGBE_FCOE */
6855 .ndo_set_features
= ixgbe_set_features
,
6856 .ndo_fix_features
= ixgbe_fix_features
,
6857 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
6858 .ndo_fdb_del
= ixgbe_ndo_fdb_del
,
6859 .ndo_fdb_dump
= ixgbe_ndo_fdb_dump
,
6862 static void __devinit
ixgbe_probe_vf(struct ixgbe_adapter
*adapter
,
6863 const struct ixgbe_info
*ii
)
6865 #ifdef CONFIG_PCI_IOV
6866 struct ixgbe_hw
*hw
= &adapter
->hw
;
6868 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6871 /* The 82599 supports up to 64 VFs per physical function
6872 * but this implementation limits allocation to 63 so that
6873 * basic networking resources are still available to the
6874 * physical function. If the user requests greater thn
6875 * 63 VFs then it is an error - reset to default of zero.
6877 adapter
->num_vfs
= (max_vfs
> 63) ? 0 : max_vfs
;
6878 ixgbe_enable_sriov(adapter
, ii
);
6879 #endif /* CONFIG_PCI_IOV */
6883 * ixgbe_wol_supported - Check whether device supports WoL
6884 * @hw: hw specific details
6885 * @device_id: the device ID
6886 * @subdev_id: the subsystem device ID
6888 * This function is used by probe and ethtool to determine
6889 * which devices have WoL support
6892 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
6895 struct ixgbe_hw
*hw
= &adapter
->hw
;
6896 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
6897 int is_wol_supported
= 0;
6899 switch (device_id
) {
6900 case IXGBE_DEV_ID_82599_SFP
:
6901 /* Only these subdevices could supports WOL */
6902 switch (subdevice_id
) {
6903 case IXGBE_SUBDEV_ID_82599_560FLR
:
6904 /* only support first port */
6905 if (hw
->bus
.func
!= 0)
6907 case IXGBE_SUBDEV_ID_82599_SFP
:
6908 is_wol_supported
= 1;
6912 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
6913 /* All except this subdevice support WOL */
6914 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
6915 is_wol_supported
= 1;
6917 case IXGBE_DEV_ID_82599_KX4
:
6918 is_wol_supported
= 1;
6920 case IXGBE_DEV_ID_X540T
:
6921 /* check eeprom to see if enabled wol */
6922 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
6923 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
6924 (hw
->bus
.func
== 0))) {
6925 is_wol_supported
= 1;
6930 return is_wol_supported
;
6934 * ixgbe_probe - Device Initialization Routine
6935 * @pdev: PCI device information struct
6936 * @ent: entry in ixgbe_pci_tbl
6938 * Returns 0 on success, negative on failure
6940 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
6941 * The OS initialization, configuring of the adapter private structure,
6942 * and a hardware reset occur.
6944 static int __devinit
ixgbe_probe(struct pci_dev
*pdev
,
6945 const struct pci_device_id
*ent
)
6947 struct net_device
*netdev
;
6948 struct ixgbe_adapter
*adapter
= NULL
;
6949 struct ixgbe_hw
*hw
;
6950 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
6951 static int cards_found
;
6952 int i
, err
, pci_using_dac
;
6953 u8 part_str
[IXGBE_PBANUM_LENGTH
];
6954 unsigned int indices
= num_possible_cpus();
6960 /* Catch broken hardware that put the wrong VF device ID in
6961 * the PCIe SR-IOV capability.
6963 if (pdev
->is_virtfn
) {
6964 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
6965 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
6969 err
= pci_enable_device_mem(pdev
);
6973 if (!dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(64)) &&
6974 !dma_set_coherent_mask(&pdev
->dev
, DMA_BIT_MASK(64))) {
6977 err
= dma_set_mask(&pdev
->dev
, DMA_BIT_MASK(32));
6979 err
= dma_set_coherent_mask(&pdev
->dev
,
6983 "No usable DMA configuration, aborting\n");
6990 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
6991 IORESOURCE_MEM
), ixgbe_driver_name
);
6994 "pci_request_selected_regions failed 0x%x\n", err
);
6998 pci_enable_pcie_error_reporting(pdev
);
7000 pci_set_master(pdev
);
7001 pci_save_state(pdev
);
7003 #ifdef CONFIG_IXGBE_DCB
7004 indices
*= MAX_TRAFFIC_CLASS
;
7007 if (ii
->mac
== ixgbe_mac_82598EB
)
7008 indices
= min_t(unsigned int, indices
, IXGBE_MAX_RSS_INDICES
);
7010 indices
= min_t(unsigned int, indices
, IXGBE_MAX_FDIR_INDICES
);
7013 indices
+= min_t(unsigned int, num_possible_cpus(),
7014 IXGBE_MAX_FCOE_INDICES
);
7016 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
7019 goto err_alloc_etherdev
;
7022 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7024 adapter
= netdev_priv(netdev
);
7025 pci_set_drvdata(pdev
, adapter
);
7027 adapter
->netdev
= netdev
;
7028 adapter
->pdev
= pdev
;
7031 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
7033 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
7034 pci_resource_len(pdev
, 0));
7040 for (i
= 1; i
<= 5; i
++) {
7041 if (pci_resource_len(pdev
, i
) == 0)
7045 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
7046 ixgbe_set_ethtool_ops(netdev
);
7047 netdev
->watchdog_timeo
= 5 * HZ
;
7048 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
7050 adapter
->bd_number
= cards_found
;
7053 memcpy(&hw
->mac
.ops
, ii
->mac_ops
, sizeof(hw
->mac
.ops
));
7054 hw
->mac
.type
= ii
->mac
;
7057 memcpy(&hw
->eeprom
.ops
, ii
->eeprom_ops
, sizeof(hw
->eeprom
.ops
));
7058 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC
);
7059 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
7060 if (!(eec
& (1 << 8)))
7061 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
7064 memcpy(&hw
->phy
.ops
, ii
->phy_ops
, sizeof(hw
->phy
.ops
));
7065 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
7066 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
7067 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
7068 hw
->phy
.mdio
.mmds
= 0;
7069 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
7070 hw
->phy
.mdio
.dev
= netdev
;
7071 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
7072 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
7074 ii
->get_invariants(hw
);
7076 /* setup the private structure */
7077 err
= ixgbe_sw_init(adapter
);
7081 /* Make it possible the adapter to be woken up via WOL */
7082 switch (adapter
->hw
.mac
.type
) {
7083 case ixgbe_mac_82599EB
:
7084 case ixgbe_mac_X540
:
7085 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7092 * If there is a fan on this device and it has failed log the
7095 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
7096 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
7097 if (esdp
& IXGBE_ESDP_SDP1
)
7098 e_crit(probe
, "Fan has stopped, replace the adapter\n");
7101 if (allow_unsupported_sfp
)
7102 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
7104 /* reset_hw fills in the perm_addr as well */
7105 hw
->phy
.reset_if_overtemp
= true;
7106 err
= hw
->mac
.ops
.reset_hw(hw
);
7107 hw
->phy
.reset_if_overtemp
= false;
7108 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
&&
7109 hw
->mac
.type
== ixgbe_mac_82598EB
) {
7111 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
7112 e_dev_err("failed to load because an unsupported SFP+ "
7113 "module type was detected.\n");
7114 e_dev_err("Reload the driver after installing a supported "
7118 e_dev_err("HW Init failed: %d\n", err
);
7122 ixgbe_probe_vf(adapter
, ii
);
7124 netdev
->features
= NETIF_F_SG
|
7127 NETIF_F_HW_VLAN_TX
|
7128 NETIF_F_HW_VLAN_RX
|
7129 NETIF_F_HW_VLAN_FILTER
|
7135 netdev
->hw_features
= netdev
->features
;
7137 switch (adapter
->hw
.mac
.type
) {
7138 case ixgbe_mac_82599EB
:
7139 case ixgbe_mac_X540
:
7140 netdev
->features
|= NETIF_F_SCTP_CSUM
;
7141 netdev
->hw_features
|= NETIF_F_SCTP_CSUM
|
7148 netdev
->hw_features
|= NETIF_F_RXALL
;
7150 netdev
->vlan_features
|= NETIF_F_TSO
;
7151 netdev
->vlan_features
|= NETIF_F_TSO6
;
7152 netdev
->vlan_features
|= NETIF_F_IP_CSUM
;
7153 netdev
->vlan_features
|= NETIF_F_IPV6_CSUM
;
7154 netdev
->vlan_features
|= NETIF_F_SG
;
7156 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
7157 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
7159 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7160 adapter
->flags
&= ~(IXGBE_FLAG_RSS_ENABLED
|
7161 IXGBE_FLAG_DCB_ENABLED
);
7163 #ifdef CONFIG_IXGBE_DCB
7164 netdev
->dcbnl_ops
= &dcbnl_ops
;
7168 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
7169 if (hw
->mac
.ops
.get_device_caps
) {
7170 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
7171 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
7172 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
7175 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
7176 netdev
->vlan_features
|= NETIF_F_FCOE_CRC
;
7177 netdev
->vlan_features
|= NETIF_F_FSO
;
7178 netdev
->vlan_features
|= NETIF_F_FCOE_MTU
;
7180 #endif /* IXGBE_FCOE */
7181 if (pci_using_dac
) {
7182 netdev
->features
|= NETIF_F_HIGHDMA
;
7183 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
7186 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
7187 netdev
->hw_features
|= NETIF_F_LRO
;
7188 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
7189 netdev
->features
|= NETIF_F_LRO
;
7191 /* make sure the EEPROM is good */
7192 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
7193 e_dev_err("The EEPROM Checksum Is Not Valid\n");
7198 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7199 memcpy(netdev
->perm_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
7201 if (ixgbe_validate_mac_addr(netdev
->perm_addr
)) {
7202 e_dev_err("invalid MAC address\n");
7207 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
7208 (unsigned long) adapter
);
7210 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
7211 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
7213 err
= ixgbe_init_interrupt_scheme(adapter
);
7217 if (!(adapter
->flags
& IXGBE_FLAG_RSS_ENABLED
)) {
7218 netdev
->hw_features
&= ~NETIF_F_RXHASH
;
7219 netdev
->features
&= ~NETIF_F_RXHASH
;
7222 /* WOL not supported for all devices */
7224 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
7225 if (ixgbe_wol_supported(adapter
, pdev
->device
, pdev
->subsystem_device
))
7226 adapter
->wol
= IXGBE_WUFC_MAG
;
7228 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
7230 #ifdef CONFIG_IXGBE_PTP
7231 ixgbe_ptp_init(adapter
);
7232 #endif /* CONFIG_IXGBE_PTP*/
7234 /* save off EEPROM version number */
7235 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
7236 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
7238 /* pick up the PCI bus settings for reporting later */
7239 hw
->mac
.ops
.get_bus_info(hw
);
7241 /* print bus type/speed/width info */
7242 e_dev_info("(PCI Express:%s:%s) %pM\n",
7243 (hw
->bus
.speed
== ixgbe_bus_speed_5000
? "5.0GT/s" :
7244 hw
->bus
.speed
== ixgbe_bus_speed_2500
? "2.5GT/s" :
7246 (hw
->bus
.width
== ixgbe_bus_width_pcie_x8
? "Width x8" :
7247 hw
->bus
.width
== ixgbe_bus_width_pcie_x4
? "Width x4" :
7248 hw
->bus
.width
== ixgbe_bus_width_pcie_x1
? "Width x1" :
7252 err
= ixgbe_read_pba_string_generic(hw
, part_str
, IXGBE_PBANUM_LENGTH
);
7254 strncpy(part_str
, "Unknown", IXGBE_PBANUM_LENGTH
);
7255 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
7256 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
7257 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
7260 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
7261 hw
->mac
.type
, hw
->phy
.type
, part_str
);
7263 if (hw
->bus
.width
<= ixgbe_bus_width_pcie_x4
) {
7264 e_dev_warn("PCI-Express bandwidth available for this card is "
7265 "not sufficient for optimal performance.\n");
7266 e_dev_warn("For optimal performance a x8 PCI-Express slot "
7270 /* reset the hardware with the new settings */
7271 err
= hw
->mac
.ops
.start_hw(hw
);
7272 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
7273 /* We are running on a pre-production device, log a warning */
7274 e_dev_warn("This device is a pre-production adapter/LOM. "
7275 "Please be aware there may be issues associated "
7276 "with your hardware. If you are experiencing "
7277 "problems please contact your Intel or hardware "
7278 "representative who provided you with this "
7281 strcpy(netdev
->name
, "eth%d");
7282 err
= register_netdev(netdev
);
7286 /* power down the optics for multispeed fiber and 82599 SFP+ fiber */
7287 if (hw
->mac
.ops
.disable_tx_laser
&&
7288 ((hw
->phy
.multispeed_fiber
) ||
7289 ((hw
->mac
.ops
.get_media_type(hw
) == ixgbe_media_type_fiber
) &&
7290 (hw
->mac
.type
== ixgbe_mac_82599EB
))))
7291 hw
->mac
.ops
.disable_tx_laser(hw
);
7293 /* carrier off reporting is important to ethtool even BEFORE open */
7294 netif_carrier_off(netdev
);
7296 #ifdef CONFIG_IXGBE_DCA
7297 if (dca_add_requester(&pdev
->dev
) == 0) {
7298 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
7299 ixgbe_setup_dca(adapter
);
7302 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7303 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
7304 for (i
= 0; i
< adapter
->num_vfs
; i
++)
7305 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
7308 /* firmware requires driver version to be 0xFFFFFFFF
7309 * since os does not support feature
7311 if (hw
->mac
.ops
.set_fw_drv_ver
)
7312 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
7315 /* add san mac addr to netdev */
7316 ixgbe_add_sanmac_netdev(netdev
);
7318 e_dev_info("%s\n", ixgbe_default_device_descr
);
7321 #ifdef CONFIG_IXGBE_HWMON
7322 if (ixgbe_sysfs_init(adapter
))
7323 e_err(probe
, "failed to allocate sysfs resources\n");
7324 #endif /* CONFIG_IXGBE_HWMON */
7329 ixgbe_release_hw_control(adapter
);
7330 ixgbe_clear_interrupt_scheme(adapter
);
7332 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7333 ixgbe_disable_sriov(adapter
);
7334 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
7335 iounmap(hw
->hw_addr
);
7337 free_netdev(netdev
);
7339 pci_release_selected_regions(pdev
,
7340 pci_select_bars(pdev
, IORESOURCE_MEM
));
7343 pci_disable_device(pdev
);
7348 * ixgbe_remove - Device Removal Routine
7349 * @pdev: PCI device information struct
7351 * ixgbe_remove is called by the PCI subsystem to alert the driver
7352 * that it should release a PCI device. The could be caused by a
7353 * Hot-Plug event, or because the driver is going to be removed from
7356 static void __devexit
ixgbe_remove(struct pci_dev
*pdev
)
7358 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7359 struct net_device
*netdev
= adapter
->netdev
;
7361 set_bit(__IXGBE_DOWN
, &adapter
->state
);
7362 cancel_work_sync(&adapter
->service_task
);
7364 #ifdef CONFIG_IXGBE_PTP
7365 ixgbe_ptp_stop(adapter
);
7368 #ifdef CONFIG_IXGBE_DCA
7369 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
7370 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
7371 dca_remove_requester(&pdev
->dev
);
7372 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
, 1);
7376 #ifdef CONFIG_IXGBE_HWMON
7377 ixgbe_sysfs_exit(adapter
);
7378 #endif /* CONFIG_IXGBE_HWMON */
7381 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7382 ixgbe_cleanup_fcoe(adapter
);
7384 #endif /* IXGBE_FCOE */
7386 /* remove the added san mac */
7387 ixgbe_del_sanmac_netdev(netdev
);
7389 if (netdev
->reg_state
== NETREG_REGISTERED
)
7390 unregister_netdev(netdev
);
7392 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
7393 if (!(ixgbe_check_vf_assignment(adapter
)))
7394 ixgbe_disable_sriov(adapter
);
7396 e_dev_warn("Unloading driver while VFs are assigned "
7397 "- VFs will not be deallocated\n");
7400 ixgbe_clear_interrupt_scheme(adapter
);
7402 ixgbe_release_hw_control(adapter
);
7405 kfree(adapter
->ixgbe_ieee_pfc
);
7406 kfree(adapter
->ixgbe_ieee_ets
);
7409 iounmap(adapter
->hw
.hw_addr
);
7410 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
7413 e_dev_info("complete\n");
7415 free_netdev(netdev
);
7417 pci_disable_pcie_error_reporting(pdev
);
7419 pci_disable_device(pdev
);
7423 * ixgbe_io_error_detected - called when PCI error is detected
7424 * @pdev: Pointer to PCI device
7425 * @state: The current pci connection state
7427 * This function is called after a PCI bus error affecting
7428 * this device has been detected.
7430 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
7431 pci_channel_state_t state
)
7433 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7434 struct net_device
*netdev
= adapter
->netdev
;
7436 #ifdef CONFIG_PCI_IOV
7437 struct pci_dev
*bdev
, *vfdev
;
7438 u32 dw0
, dw1
, dw2
, dw3
;
7440 u16 req_id
, pf_func
;
7442 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
7443 adapter
->num_vfs
== 0)
7444 goto skip_bad_vf_detection
;
7446 bdev
= pdev
->bus
->self
;
7447 while (bdev
&& (bdev
->pcie_type
!= PCI_EXP_TYPE_ROOT_PORT
))
7448 bdev
= bdev
->bus
->self
;
7451 goto skip_bad_vf_detection
;
7453 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
7455 goto skip_bad_vf_detection
;
7457 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
, &dw0
);
7458 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 4, &dw1
);
7459 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 8, &dw2
);
7460 pci_read_config_dword(bdev
, pos
+ PCI_ERR_HEADER_LOG
+ 12, &dw3
);
7463 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
7464 if (!(req_id
& 0x0080))
7465 goto skip_bad_vf_detection
;
7467 pf_func
= req_id
& 0x01;
7468 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
7469 unsigned int device_id
;
7471 vf
= (req_id
& 0x7F) >> 1;
7472 e_dev_err("VF %d has caused a PCIe error\n", vf
);
7473 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
7474 "%8.8x\tdw3: %8.8x\n",
7475 dw0
, dw1
, dw2
, dw3
);
7476 switch (adapter
->hw
.mac
.type
) {
7477 case ixgbe_mac_82599EB
:
7478 device_id
= IXGBE_82599_VF_DEVICE_ID
;
7480 case ixgbe_mac_X540
:
7481 device_id
= IXGBE_X540_VF_DEVICE_ID
;
7488 /* Find the pci device of the offending VF */
7489 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
, device_id
, NULL
);
7491 if (vfdev
->devfn
== (req_id
& 0xFF))
7493 vfdev
= pci_get_device(IXGBE_INTEL_VENDOR_ID
,
7497 * There's a slim chance the VF could have been hot plugged,
7498 * so if it is no longer present we don't need to issue the
7499 * VFLR. Just clean up the AER in that case.
7502 e_dev_err("Issuing VFLR to VF %d\n", vf
);
7503 pci_write_config_dword(vfdev
, 0xA8, 0x00008000);
7506 pci_cleanup_aer_uncorrect_error_status(pdev
);
7510 * Even though the error may have occurred on the other port
7511 * we still need to increment the vf error reference count for
7512 * both ports because the I/O resume function will be called
7515 adapter
->vferr_refcount
++;
7517 return PCI_ERS_RESULT_RECOVERED
;
7519 skip_bad_vf_detection
:
7520 #endif /* CONFIG_PCI_IOV */
7521 netif_device_detach(netdev
);
7523 if (state
== pci_channel_io_perm_failure
)
7524 return PCI_ERS_RESULT_DISCONNECT
;
7526 if (netif_running(netdev
))
7527 ixgbe_down(adapter
);
7528 pci_disable_device(pdev
);
7530 /* Request a slot reset. */
7531 return PCI_ERS_RESULT_NEED_RESET
;
7535 * ixgbe_io_slot_reset - called after the pci bus has been reset.
7536 * @pdev: Pointer to PCI device
7538 * Restart the card from scratch, as if from a cold-boot.
7540 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
7542 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7543 pci_ers_result_t result
;
7546 if (pci_enable_device_mem(pdev
)) {
7547 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
7548 result
= PCI_ERS_RESULT_DISCONNECT
;
7550 pci_set_master(pdev
);
7551 pci_restore_state(pdev
);
7552 pci_save_state(pdev
);
7554 pci_wake_from_d3(pdev
, false);
7556 ixgbe_reset(adapter
);
7557 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
7558 result
= PCI_ERS_RESULT_RECOVERED
;
7561 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
7563 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
7564 "failed 0x%0x\n", err
);
7565 /* non-fatal, continue */
7572 * ixgbe_io_resume - called when traffic can start flowing again.
7573 * @pdev: Pointer to PCI device
7575 * This callback is called when the error recovery driver tells us that
7576 * its OK to resume normal operation.
7578 static void ixgbe_io_resume(struct pci_dev
*pdev
)
7580 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
7581 struct net_device
*netdev
= adapter
->netdev
;
7583 #ifdef CONFIG_PCI_IOV
7584 if (adapter
->vferr_refcount
) {
7585 e_info(drv
, "Resuming after VF err\n");
7586 adapter
->vferr_refcount
--;
7591 if (netif_running(netdev
))
7594 netif_device_attach(netdev
);
7597 static struct pci_error_handlers ixgbe_err_handler
= {
7598 .error_detected
= ixgbe_io_error_detected
,
7599 .slot_reset
= ixgbe_io_slot_reset
,
7600 .resume
= ixgbe_io_resume
,
7603 static struct pci_driver ixgbe_driver
= {
7604 .name
= ixgbe_driver_name
,
7605 .id_table
= ixgbe_pci_tbl
,
7606 .probe
= ixgbe_probe
,
7607 .remove
= __devexit_p(ixgbe_remove
),
7609 .suspend
= ixgbe_suspend
,
7610 .resume
= ixgbe_resume
,
7612 .shutdown
= ixgbe_shutdown
,
7613 .err_handler
= &ixgbe_err_handler
7617 * ixgbe_init_module - Driver Registration Routine
7619 * ixgbe_init_module is the first routine called when the driver is
7620 * loaded. All it does is register with the PCI subsystem.
7622 static int __init
ixgbe_init_module(void)
7625 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
7626 pr_info("%s\n", ixgbe_copyright
);
7628 #ifdef CONFIG_IXGBE_DCA
7629 dca_register_notify(&dca_notifier
);
7632 ret
= pci_register_driver(&ixgbe_driver
);
7636 module_init(ixgbe_init_module
);
7639 * ixgbe_exit_module - Driver Exit Cleanup Routine
7641 * ixgbe_exit_module is called just before the driver is removed
7644 static void __exit
ixgbe_exit_module(void)
7646 #ifdef CONFIG_IXGBE_DCA
7647 dca_unregister_notify(&dca_notifier
);
7649 pci_unregister_driver(&ixgbe_driver
);
7650 rcu_barrier(); /* Wait for completion of call_rcu()'s */
7653 #ifdef CONFIG_IXGBE_DCA
7654 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
7659 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
7660 __ixgbe_notify_dca
);
7662 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
7665 #endif /* CONFIG_IXGBE_DCA */
7667 module_exit(ixgbe_exit_module
);