1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2016 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #include <linux/types.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/netdevice.h>
33 #include <linux/vmalloc.h>
34 #include <linux/string.h>
36 #include <linux/interrupt.h>
38 #include <linux/tcp.h>
39 #include <linux/sctp.h>
40 #include <linux/pkt_sched.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/etherdevice.h>
46 #include <linux/ethtool.h>
48 #include <linux/if_vlan.h>
49 #include <linux/if_macvlan.h>
50 #include <linux/if_bridge.h>
51 #include <linux/prefetch.h>
52 #include <scsi/fc/fc_fcoe.h>
53 #include <net/vxlan.h>
54 #include <net/pkt_cls.h>
55 #include <net/tc_act/tc_gact.h>
58 #include "ixgbe_common.h"
59 #include "ixgbe_dcb_82599.h"
60 #include "ixgbe_sriov.h"
61 #include "ixgbe_model.h"
63 char ixgbe_driver_name
[] = "ixgbe";
64 static const char ixgbe_driver_string
[] =
65 "Intel(R) 10 Gigabit PCI Express Network Driver";
67 char ixgbe_default_device_descr
[] =
68 "Intel(R) 10 Gigabit Network Connection";
70 static char ixgbe_default_device_descr
[] =
71 "Intel(R) 10 Gigabit Network Connection";
73 #define DRV_VERSION "4.4.0-k"
74 const char ixgbe_driver_version
[] = DRV_VERSION
;
75 static const char ixgbe_copyright
[] =
76 "Copyright (c) 1999-2016 Intel Corporation.";
78 static const char ixgbe_overheat_msg
[] = "Network adapter has been stopped because it has over heated. Restart the computer. If the problem persists, power off the system and replace the adapter";
80 static const struct ixgbe_info
*ixgbe_info_tbl
[] = {
81 [board_82598
] = &ixgbe_82598_info
,
82 [board_82599
] = &ixgbe_82599_info
,
83 [board_X540
] = &ixgbe_X540_info
,
84 [board_X550
] = &ixgbe_X550_info
,
85 [board_X550EM_x
] = &ixgbe_X550EM_x_info
,
86 [board_x550em_a
] = &ixgbe_x550em_a_info
,
89 /* ixgbe_pci_tbl - PCI Device ID Table
91 * Wildcard entries (PCI_ANY_ID) should come last
92 * Last entry must be all 0s
94 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
95 * Class, Class Mask, private data (not used) }
97 static const struct pci_device_id ixgbe_pci_tbl
[] = {
98 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598
), board_82598
},
99 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_DUAL_PORT
), board_82598
},
100 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AF_SINGLE_PORT
), board_82598
},
101 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT
), board_82598
},
102 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598AT2
), board_82598
},
103 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_CX4
), board_82598
},
104 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_CX4_DUAL_PORT
), board_82598
},
105 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_DA_DUAL_PORT
), board_82598
},
106 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM
), board_82598
},
107 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_XF_LR
), board_82598
},
108 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598EB_SFP_LOM
), board_82598
},
109 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82598_BX
), board_82598
},
110 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4
), board_82599
},
111 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_XAUI_LOM
), board_82599
},
112 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KR
), board_82599
},
113 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP
), board_82599
},
114 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_EM
), board_82599
},
115 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_KX4_MEZZ
), board_82599
},
116 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_CX4
), board_82599
},
117 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_BACKPLANE_FCOE
), board_82599
},
118 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_FCOE
), board_82599
},
119 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_T3_LOM
), board_82599
},
120 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_COMBO_BACKPLANE
), board_82599
},
121 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T
), board_X540
},
122 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF2
), board_82599
},
123 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_LS
), board_82599
},
124 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_QSFP_SF_QP
), board_82599
},
125 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599EN_SFP
), board_82599
},
126 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_82599_SFP_SF_QP
), board_82599
},
127 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X540T1
), board_X540
},
128 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T
), board_X550
},
129 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550T1
), board_X550
},
130 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KX4
), board_X550EM_x
},
131 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_KR
), board_X550EM_x
},
132 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_10G_T
), board_X550EM_x
},
133 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_X_SFP
), board_X550EM_x
},
134 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR
), board_x550em_a
},
135 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_KR_L
), board_x550em_a
},
136 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP_N
), board_x550em_a
},
137 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII
), board_x550em_a
},
138 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SGMII_L
), board_x550em_a
},
139 {PCI_VDEVICE(INTEL
, IXGBE_DEV_ID_X550EM_A_SFP
), board_x550em_a
},
140 /* required last entry */
143 MODULE_DEVICE_TABLE(pci
, ixgbe_pci_tbl
);
145 #ifdef CONFIG_IXGBE_DCA
146 static int ixgbe_notify_dca(struct notifier_block
*, unsigned long event
,
148 static struct notifier_block dca_notifier
= {
149 .notifier_call
= ixgbe_notify_dca
,
155 #ifdef CONFIG_PCI_IOV
156 static unsigned int max_vfs
;
157 module_param(max_vfs
, uint
, 0);
158 MODULE_PARM_DESC(max_vfs
,
159 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
160 #endif /* CONFIG_PCI_IOV */
162 static unsigned int allow_unsupported_sfp
;
163 module_param(allow_unsupported_sfp
, uint
, 0);
164 MODULE_PARM_DESC(allow_unsupported_sfp
,
165 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
167 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
168 static int debug
= -1;
169 module_param(debug
, int, 0);
170 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
172 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
173 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
174 MODULE_LICENSE("GPL");
175 MODULE_VERSION(DRV_VERSION
);
177 static struct workqueue_struct
*ixgbe_wq
;
179 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
);
181 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter
*adapter
,
184 struct pci_dev
*parent_dev
;
185 struct pci_bus
*parent_bus
;
187 parent_bus
= adapter
->pdev
->bus
->parent
;
191 parent_dev
= parent_bus
->self
;
195 if (!pci_is_pcie(parent_dev
))
198 pcie_capability_read_word(parent_dev
, reg
, value
);
199 if (*value
== IXGBE_FAILED_READ_CFG_WORD
&&
200 ixgbe_check_cfg_remove(&adapter
->hw
, parent_dev
))
205 static s32
ixgbe_get_parent_bus_info(struct ixgbe_adapter
*adapter
)
207 struct ixgbe_hw
*hw
= &adapter
->hw
;
211 hw
->bus
.type
= ixgbe_bus_type_pci_express
;
213 /* Get the negotiated link width and speed from PCI config space of the
214 * parent, as this device is behind a switch
216 err
= ixgbe_read_pci_cfg_word_parent(adapter
, 18, &link_status
);
218 /* assume caller will handle error case */
222 hw
->bus
.width
= ixgbe_convert_bus_width(link_status
);
223 hw
->bus
.speed
= ixgbe_convert_bus_speed(link_status
);
229 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
230 * @hw: hw specific details
232 * This function is used by probe to determine whether a device's PCI-Express
233 * bandwidth details should be gathered from the parent bus instead of from the
234 * device. Used to ensure that various locations all have the correct device ID
237 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw
*hw
)
239 switch (hw
->device_id
) {
240 case IXGBE_DEV_ID_82599_SFP_SF_QP
:
241 case IXGBE_DEV_ID_82599_QSFP_SF_QP
:
248 static void ixgbe_check_minimum_link(struct ixgbe_adapter
*adapter
,
251 struct ixgbe_hw
*hw
= &adapter
->hw
;
253 enum pci_bus_speed speed
= PCI_SPEED_UNKNOWN
;
254 enum pcie_link_width width
= PCIE_LNK_WIDTH_UNKNOWN
;
255 struct pci_dev
*pdev
;
257 /* Some devices are not connected over PCIe and thus do not negotiate
258 * speed. These devices do not have valid bus info, and thus any report
259 * we generate may not be correct.
261 if (hw
->bus
.type
== ixgbe_bus_type_internal
)
264 /* determine whether to use the parent device */
265 if (ixgbe_pcie_from_parent(&adapter
->hw
))
266 pdev
= adapter
->pdev
->bus
->parent
->self
;
268 pdev
= adapter
->pdev
;
270 if (pcie_get_minimum_link(pdev
, &speed
, &width
) ||
271 speed
== PCI_SPEED_UNKNOWN
|| width
== PCIE_LNK_WIDTH_UNKNOWN
) {
272 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
277 case PCIE_SPEED_2_5GT
:
278 /* 8b/10b encoding reduces max throughput by 20% */
281 case PCIE_SPEED_5_0GT
:
282 /* 8b/10b encoding reduces max throughput by 20% */
285 case PCIE_SPEED_8_0GT
:
286 /* 128b/130b encoding reduces throughput by less than 2% */
290 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
294 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
296 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
297 (speed
== PCIE_SPEED_8_0GT
? "8.0GT/s" :
298 speed
== PCIE_SPEED_5_0GT
? "5.0GT/s" :
299 speed
== PCIE_SPEED_2_5GT
? "2.5GT/s" :
302 (speed
== PCIE_SPEED_2_5GT
? "20%" :
303 speed
== PCIE_SPEED_5_0GT
? "20%" :
304 speed
== PCIE_SPEED_8_0GT
? "<2%" :
307 if (max_gts
< expected_gts
) {
308 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
309 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
311 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
315 static void ixgbe_service_event_schedule(struct ixgbe_adapter
*adapter
)
317 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
) &&
318 !test_bit(__IXGBE_REMOVING
, &adapter
->state
) &&
319 !test_and_set_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
))
320 queue_work(ixgbe_wq
, &adapter
->service_task
);
323 static void ixgbe_remove_adapter(struct ixgbe_hw
*hw
)
325 struct ixgbe_adapter
*adapter
= hw
->back
;
330 e_dev_err("Adapter removed\n");
331 if (test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
332 ixgbe_service_event_schedule(adapter
);
335 static void ixgbe_check_remove(struct ixgbe_hw
*hw
, u32 reg
)
339 /* The following check not only optimizes a bit by not
340 * performing a read on the status register when the
341 * register just read was a status register read that
342 * returned IXGBE_FAILED_READ_REG. It also blocks any
343 * potential recursion.
345 if (reg
== IXGBE_STATUS
) {
346 ixgbe_remove_adapter(hw
);
349 value
= ixgbe_read_reg(hw
, IXGBE_STATUS
);
350 if (value
== IXGBE_FAILED_READ_REG
)
351 ixgbe_remove_adapter(hw
);
355 * ixgbe_read_reg - Read from device register
356 * @hw: hw specific details
357 * @reg: offset of register to read
359 * Returns : value read or IXGBE_FAILED_READ_REG if removed
361 * This function is used to read device registers. It checks for device
362 * removal by confirming any read that returns all ones by checking the
363 * status register value for all ones. This function avoids reading from
364 * the hardware if a removal was previously detected in which case it
365 * returns IXGBE_FAILED_READ_REG (all ones).
367 u32
ixgbe_read_reg(struct ixgbe_hw
*hw
, u32 reg
)
369 u8 __iomem
*reg_addr
= ACCESS_ONCE(hw
->hw_addr
);
372 if (ixgbe_removed(reg_addr
))
373 return IXGBE_FAILED_READ_REG
;
374 if (unlikely(hw
->phy
.nw_mng_if_sel
&
375 IXGBE_NW_MNG_IF_SEL_ENABLE_10_100M
)) {
376 struct ixgbe_adapter
*adapter
;
379 for (i
= 0; i
< 200; ++i
) {
380 value
= readl(reg_addr
+ IXGBE_MAC_SGMII_BUSY
);
382 goto writes_completed
;
383 if (value
== IXGBE_FAILED_READ_REG
) {
384 ixgbe_remove_adapter(hw
);
385 return IXGBE_FAILED_READ_REG
;
391 e_warn(hw
, "register writes incomplete %08x\n", value
);
395 value
= readl(reg_addr
+ reg
);
396 if (unlikely(value
== IXGBE_FAILED_READ_REG
))
397 ixgbe_check_remove(hw
, reg
);
401 static bool ixgbe_check_cfg_remove(struct ixgbe_hw
*hw
, struct pci_dev
*pdev
)
405 pci_read_config_word(pdev
, PCI_VENDOR_ID
, &value
);
406 if (value
== IXGBE_FAILED_READ_CFG_WORD
) {
407 ixgbe_remove_adapter(hw
);
413 u16
ixgbe_read_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
)
415 struct ixgbe_adapter
*adapter
= hw
->back
;
418 if (ixgbe_removed(hw
->hw_addr
))
419 return IXGBE_FAILED_READ_CFG_WORD
;
420 pci_read_config_word(adapter
->pdev
, reg
, &value
);
421 if (value
== IXGBE_FAILED_READ_CFG_WORD
&&
422 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
423 return IXGBE_FAILED_READ_CFG_WORD
;
427 #ifdef CONFIG_PCI_IOV
428 static u32
ixgbe_read_pci_cfg_dword(struct ixgbe_hw
*hw
, u32 reg
)
430 struct ixgbe_adapter
*adapter
= hw
->back
;
433 if (ixgbe_removed(hw
->hw_addr
))
434 return IXGBE_FAILED_READ_CFG_DWORD
;
435 pci_read_config_dword(adapter
->pdev
, reg
, &value
);
436 if (value
== IXGBE_FAILED_READ_CFG_DWORD
&&
437 ixgbe_check_cfg_remove(hw
, adapter
->pdev
))
438 return IXGBE_FAILED_READ_CFG_DWORD
;
441 #endif /* CONFIG_PCI_IOV */
443 void ixgbe_write_pci_cfg_word(struct ixgbe_hw
*hw
, u32 reg
, u16 value
)
445 struct ixgbe_adapter
*adapter
= hw
->back
;
447 if (ixgbe_removed(hw
->hw_addr
))
449 pci_write_config_word(adapter
->pdev
, reg
, value
);
452 static void ixgbe_service_event_complete(struct ixgbe_adapter
*adapter
)
454 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
));
456 /* flush memory to make sure state is correct before next watchdog */
457 smp_mb__before_atomic();
458 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
461 struct ixgbe_reg_info
{
466 static const struct ixgbe_reg_info ixgbe_reg_info_tbl
[] = {
468 /* General Registers */
469 {IXGBE_CTRL
, "CTRL"},
470 {IXGBE_STATUS
, "STATUS"},
471 {IXGBE_CTRL_EXT
, "CTRL_EXT"},
473 /* Interrupt Registers */
474 {IXGBE_EICR
, "EICR"},
477 {IXGBE_SRRCTL(0), "SRRCTL"},
478 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
479 {IXGBE_RDLEN(0), "RDLEN"},
480 {IXGBE_RDH(0), "RDH"},
481 {IXGBE_RDT(0), "RDT"},
482 {IXGBE_RXDCTL(0), "RXDCTL"},
483 {IXGBE_RDBAL(0), "RDBAL"},
484 {IXGBE_RDBAH(0), "RDBAH"},
487 {IXGBE_TDBAL(0), "TDBAL"},
488 {IXGBE_TDBAH(0), "TDBAH"},
489 {IXGBE_TDLEN(0), "TDLEN"},
490 {IXGBE_TDH(0), "TDH"},
491 {IXGBE_TDT(0), "TDT"},
492 {IXGBE_TXDCTL(0), "TXDCTL"},
494 /* List Terminator */
500 * ixgbe_regdump - register printout routine
502 static void ixgbe_regdump(struct ixgbe_hw
*hw
, struct ixgbe_reg_info
*reginfo
)
508 switch (reginfo
->ofs
) {
509 case IXGBE_SRRCTL(0):
510 for (i
= 0; i
< 64; i
++)
511 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_SRRCTL(i
));
513 case IXGBE_DCA_RXCTRL(0):
514 for (i
= 0; i
< 64; i
++)
515 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_DCA_RXCTRL(i
));
518 for (i
= 0; i
< 64; i
++)
519 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDLEN(i
));
522 for (i
= 0; i
< 64; i
++)
523 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDH(i
));
526 for (i
= 0; i
< 64; i
++)
527 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDT(i
));
529 case IXGBE_RXDCTL(0):
530 for (i
= 0; i
< 64; i
++)
531 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RXDCTL(i
));
534 for (i
= 0; i
< 64; i
++)
535 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAL(i
));
538 for (i
= 0; i
< 64; i
++)
539 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_RDBAH(i
));
542 for (i
= 0; i
< 64; i
++)
543 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAL(i
));
546 for (i
= 0; i
< 64; i
++)
547 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDBAH(i
));
550 for (i
= 0; i
< 64; i
++)
551 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDLEN(i
));
554 for (i
= 0; i
< 64; i
++)
555 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDH(i
));
558 for (i
= 0; i
< 64; i
++)
559 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TDT(i
));
561 case IXGBE_TXDCTL(0):
562 for (i
= 0; i
< 64; i
++)
563 regs
[i
] = IXGBE_READ_REG(hw
, IXGBE_TXDCTL(i
));
566 pr_info("%-15s %08x\n", reginfo
->name
,
567 IXGBE_READ_REG(hw
, reginfo
->ofs
));
571 for (i
= 0; i
< 8; i
++) {
572 snprintf(rname
, 16, "%s[%d-%d]", reginfo
->name
, i
*8, i
*8+7);
573 pr_err("%-15s", rname
);
574 for (j
= 0; j
< 8; j
++)
575 pr_cont(" %08x", regs
[i
*8+j
]);
582 * ixgbe_dump - Print registers, tx-rings and rx-rings
584 static void ixgbe_dump(struct ixgbe_adapter
*adapter
)
586 struct net_device
*netdev
= adapter
->netdev
;
587 struct ixgbe_hw
*hw
= &adapter
->hw
;
588 struct ixgbe_reg_info
*reginfo
;
590 struct ixgbe_ring
*tx_ring
;
591 struct ixgbe_tx_buffer
*tx_buffer
;
592 union ixgbe_adv_tx_desc
*tx_desc
;
593 struct my_u0
{ u64 a
; u64 b
; } *u0
;
594 struct ixgbe_ring
*rx_ring
;
595 union ixgbe_adv_rx_desc
*rx_desc
;
596 struct ixgbe_rx_buffer
*rx_buffer_info
;
600 if (!netif_msg_hw(adapter
))
603 /* Print netdevice Info */
605 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
606 pr_info("Device Name state "
607 "trans_start last_rx\n");
608 pr_info("%-15s %016lX %016lX %016lX\n",
615 /* Print Registers */
616 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
617 pr_info(" Register Name Value\n");
618 for (reginfo
= (struct ixgbe_reg_info
*)ixgbe_reg_info_tbl
;
619 reginfo
->name
; reginfo
++) {
620 ixgbe_regdump(hw
, reginfo
);
623 /* Print TX Ring Summary */
624 if (!netdev
|| !netif_running(netdev
))
627 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
628 pr_info(" %s %s %s %s\n",
629 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
630 "leng", "ntw", "timestamp");
631 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
632 tx_ring
= adapter
->tx_ring
[n
];
633 tx_buffer
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
634 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
635 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
636 (u64
)dma_unmap_addr(tx_buffer
, dma
),
637 dma_unmap_len(tx_buffer
, len
),
638 tx_buffer
->next_to_watch
,
639 (u64
)tx_buffer
->time_stamp
);
643 if (!netif_msg_tx_done(adapter
))
644 goto rx_ring_summary
;
646 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
648 /* Transmit Descriptor Formats
650 * 82598 Advanced Transmit Descriptor
651 * +--------------------------------------------------------------+
652 * 0 | Buffer Address [63:0] |
653 * +--------------------------------------------------------------+
654 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
655 * +--------------------------------------------------------------+
656 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
658 * 82598 Advanced Transmit Descriptor (Write-Back Format)
659 * +--------------------------------------------------------------+
661 * +--------------------------------------------------------------+
662 * 8 | RSV | STA | NXTSEQ |
663 * +--------------------------------------------------------------+
666 * 82599+ Advanced Transmit Descriptor
667 * +--------------------------------------------------------------+
668 * 0 | Buffer Address [63:0] |
669 * +--------------------------------------------------------------+
670 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
671 * +--------------------------------------------------------------+
672 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
674 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
675 * +--------------------------------------------------------------+
677 * +--------------------------------------------------------------+
678 * 8 | RSV | STA | RSV |
679 * +--------------------------------------------------------------+
683 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
684 tx_ring
= adapter
->tx_ring
[n
];
685 pr_info("------------------------------------\n");
686 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
687 pr_info("------------------------------------\n");
688 pr_info("%s%s %s %s %s %s\n",
689 "T [desc] [address 63:0 ] ",
690 "[PlPOIdStDDt Ln] [bi->dma ] ",
691 "leng", "ntw", "timestamp", "bi->skb");
693 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
694 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
695 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
696 u0
= (struct my_u0
*)tx_desc
;
697 if (dma_unmap_len(tx_buffer
, len
) > 0) {
698 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
702 (u64
)dma_unmap_addr(tx_buffer
, dma
),
703 dma_unmap_len(tx_buffer
, len
),
704 tx_buffer
->next_to_watch
,
705 (u64
)tx_buffer
->time_stamp
,
707 if (i
== tx_ring
->next_to_use
&&
708 i
== tx_ring
->next_to_clean
)
710 else if (i
== tx_ring
->next_to_use
)
712 else if (i
== tx_ring
->next_to_clean
)
717 if (netif_msg_pktdata(adapter
) &&
719 print_hex_dump(KERN_INFO
, "",
720 DUMP_PREFIX_ADDRESS
, 16, 1,
721 tx_buffer
->skb
->data
,
722 dma_unmap_len(tx_buffer
, len
),
728 /* Print RX Rings Summary */
730 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
731 pr_info("Queue [NTU] [NTC]\n");
732 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
733 rx_ring
= adapter
->rx_ring
[n
];
734 pr_info("%5d %5X %5X\n",
735 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
739 if (!netif_msg_rx_status(adapter
))
742 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
744 /* Receive Descriptor Formats
746 * 82598 Advanced Receive Descriptor (Read) Format
748 * +-----------------------------------------------------+
749 * 0 | Packet Buffer Address [63:1] |A0/NSE|
750 * +----------------------------------------------+------+
751 * 8 | Header Buffer Address [63:1] | DD |
752 * +-----------------------------------------------------+
755 * 82598 Advanced Receive Descriptor (Write-Back) Format
757 * 63 48 47 32 31 30 21 20 16 15 4 3 0
758 * +------------------------------------------------------+
759 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
760 * | Packet | IP | | | | Type | Type |
761 * | Checksum | Ident | | | | | |
762 * +------------------------------------------------------+
763 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
764 * +------------------------------------------------------+
765 * 63 48 47 32 31 20 19 0
767 * 82599+ Advanced Receive Descriptor (Read) Format
769 * +-----------------------------------------------------+
770 * 0 | Packet Buffer Address [63:1] |A0/NSE|
771 * +----------------------------------------------+------+
772 * 8 | Header Buffer Address [63:1] | DD |
773 * +-----------------------------------------------------+
776 * 82599+ Advanced Receive Descriptor (Write-Back) Format
778 * 63 48 47 32 31 30 21 20 17 16 4 3 0
779 * +------------------------------------------------------+
780 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
781 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
782 * |/ Flow Dir Flt ID | | | | | |
783 * +------------------------------------------------------+
784 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
785 * +------------------------------------------------------+
786 * 63 48 47 32 31 20 19 0
789 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
790 rx_ring
= adapter
->rx_ring
[n
];
791 pr_info("------------------------------------\n");
792 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
793 pr_info("------------------------------------\n");
795 "R [desc] [ PktBuf A0] ",
796 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
797 "<-- Adv Rx Read format\n");
799 "RWB[desc] [PcsmIpSHl PtRs] ",
800 "[vl er S cks ln] ---------------- [bi->skb ] ",
801 "<-- Adv Rx Write-Back format\n");
803 for (i
= 0; i
< rx_ring
->count
; i
++) {
804 rx_buffer_info
= &rx_ring
->rx_buffer_info
[i
];
805 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
806 u0
= (struct my_u0
*)rx_desc
;
807 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
808 if (staterr
& IXGBE_RXD_STAT_DD
) {
809 /* Descriptor Done */
810 pr_info("RWB[0x%03X] %016llX "
811 "%016llX ---------------- %p", i
,
814 rx_buffer_info
->skb
);
816 pr_info("R [0x%03X] %016llX "
817 "%016llX %016llX %p", i
,
820 (u64
)rx_buffer_info
->dma
,
821 rx_buffer_info
->skb
);
823 if (netif_msg_pktdata(adapter
) &&
824 rx_buffer_info
->dma
) {
825 print_hex_dump(KERN_INFO
, "",
826 DUMP_PREFIX_ADDRESS
, 16, 1,
827 page_address(rx_buffer_info
->page
) +
828 rx_buffer_info
->page_offset
,
829 ixgbe_rx_bufsz(rx_ring
), true);
833 if (i
== rx_ring
->next_to_use
)
835 else if (i
== rx_ring
->next_to_clean
)
844 static void ixgbe_release_hw_control(struct ixgbe_adapter
*adapter
)
848 /* Let firmware take over control of h/w */
849 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
850 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
851 ctrl_ext
& ~IXGBE_CTRL_EXT_DRV_LOAD
);
854 static void ixgbe_get_hw_control(struct ixgbe_adapter
*adapter
)
858 /* Let firmware know the driver has taken over */
859 ctrl_ext
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_CTRL_EXT
);
860 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_CTRL_EXT
,
861 ctrl_ext
| IXGBE_CTRL_EXT_DRV_LOAD
);
865 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
866 * @adapter: pointer to adapter struct
867 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
868 * @queue: queue to map the corresponding interrupt to
869 * @msix_vector: the vector to map to the corresponding queue
872 static void ixgbe_set_ivar(struct ixgbe_adapter
*adapter
, s8 direction
,
873 u8 queue
, u8 msix_vector
)
876 struct ixgbe_hw
*hw
= &adapter
->hw
;
877 switch (hw
->mac
.type
) {
878 case ixgbe_mac_82598EB
:
879 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
882 index
= (((direction
* 64) + queue
) >> 2) & 0x1F;
883 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(index
));
884 ivar
&= ~(0xFF << (8 * (queue
& 0x3)));
885 ivar
|= (msix_vector
<< (8 * (queue
& 0x3)));
886 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(index
), ivar
);
888 case ixgbe_mac_82599EB
:
891 case ixgbe_mac_X550EM_x
:
892 case ixgbe_mac_x550em_a
:
893 if (direction
== -1) {
895 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
896 index
= ((queue
& 1) * 8);
897 ivar
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_IVAR_MISC
);
898 ivar
&= ~(0xFF << index
);
899 ivar
|= (msix_vector
<< index
);
900 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_IVAR_MISC
, ivar
);
903 /* tx or rx causes */
904 msix_vector
|= IXGBE_IVAR_ALLOC_VAL
;
905 index
= ((16 * (queue
& 1)) + (8 * direction
));
906 ivar
= IXGBE_READ_REG(hw
, IXGBE_IVAR(queue
>> 1));
907 ivar
&= ~(0xFF << index
);
908 ivar
|= (msix_vector
<< index
);
909 IXGBE_WRITE_REG(hw
, IXGBE_IVAR(queue
>> 1), ivar
);
917 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter
*adapter
,
922 switch (adapter
->hw
.mac
.type
) {
923 case ixgbe_mac_82598EB
:
924 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
925 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS
, mask
);
927 case ixgbe_mac_82599EB
:
930 case ixgbe_mac_X550EM_x
:
931 case ixgbe_mac_x550em_a
:
932 mask
= (qmask
& 0xFFFFFFFF);
933 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(0), mask
);
934 mask
= (qmask
>> 32);
935 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EICS_EX(1), mask
);
942 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring
*ring
,
943 struct ixgbe_tx_buffer
*tx_buffer
)
945 if (tx_buffer
->skb
) {
946 dev_kfree_skb_any(tx_buffer
->skb
);
947 if (dma_unmap_len(tx_buffer
, len
))
948 dma_unmap_single(ring
->dev
,
949 dma_unmap_addr(tx_buffer
, dma
),
950 dma_unmap_len(tx_buffer
, len
),
952 } else if (dma_unmap_len(tx_buffer
, len
)) {
953 dma_unmap_page(ring
->dev
,
954 dma_unmap_addr(tx_buffer
, dma
),
955 dma_unmap_len(tx_buffer
, len
),
958 tx_buffer
->next_to_watch
= NULL
;
959 tx_buffer
->skb
= NULL
;
960 dma_unmap_len_set(tx_buffer
, len
, 0);
961 /* tx_buffer must be completely set up in the transmit path */
964 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter
*adapter
)
966 struct ixgbe_hw
*hw
= &adapter
->hw
;
967 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
971 if ((hw
->fc
.current_mode
!= ixgbe_fc_full
) &&
972 (hw
->fc
.current_mode
!= ixgbe_fc_rx_pause
))
975 switch (hw
->mac
.type
) {
976 case ixgbe_mac_82598EB
:
977 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXC
);
980 data
= IXGBE_READ_REG(hw
, IXGBE_LXOFFRXCNT
);
982 hwstats
->lxoffrxc
+= data
;
984 /* refill credits (no tx hang) if we received xoff */
988 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
989 clear_bit(__IXGBE_HANG_CHECK_ARMED
,
990 &adapter
->tx_ring
[i
]->state
);
993 static void ixgbe_update_xoff_received(struct ixgbe_adapter
*adapter
)
995 struct ixgbe_hw
*hw
= &adapter
->hw
;
996 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
1000 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
1002 if (adapter
->ixgbe_ieee_pfc
)
1003 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
1005 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) || !pfc_en
) {
1006 ixgbe_update_xoff_rx_lfc(adapter
);
1010 /* update stats for each tc, only valid with PFC enabled */
1011 for (i
= 0; i
< MAX_TX_PACKET_BUFFERS
; i
++) {
1014 switch (hw
->mac
.type
) {
1015 case ixgbe_mac_82598EB
:
1016 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXC(i
));
1019 pxoffrxc
= IXGBE_READ_REG(hw
, IXGBE_PXOFFRXCNT(i
));
1021 hwstats
->pxoffrxc
[i
] += pxoffrxc
;
1022 /* Get the TC for given UP */
1023 tc
= netdev_get_prio_tc_map(adapter
->netdev
, i
);
1024 xoff
[tc
] += pxoffrxc
;
1027 /* disarm tx queues that have received xoff frames */
1028 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
1029 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
1031 tc
= tx_ring
->dcb_tc
;
1033 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1037 static u64
ixgbe_get_tx_completed(struct ixgbe_ring
*ring
)
1039 return ring
->stats
.packets
;
1042 static u64
ixgbe_get_tx_pending(struct ixgbe_ring
*ring
)
1044 struct ixgbe_adapter
*adapter
;
1045 struct ixgbe_hw
*hw
;
1048 if (ring
->l2_accel_priv
)
1049 adapter
= ring
->l2_accel_priv
->real_adapter
;
1051 adapter
= netdev_priv(ring
->netdev
);
1054 head
= IXGBE_READ_REG(hw
, IXGBE_TDH(ring
->reg_idx
));
1055 tail
= IXGBE_READ_REG(hw
, IXGBE_TDT(ring
->reg_idx
));
1058 return (head
< tail
) ?
1059 tail
- head
: (tail
+ ring
->count
- head
);
1064 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring
*tx_ring
)
1066 u32 tx_done
= ixgbe_get_tx_completed(tx_ring
);
1067 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1068 u32 tx_pending
= ixgbe_get_tx_pending(tx_ring
);
1070 clear_check_for_tx_hang(tx_ring
);
1073 * Check for a hung queue, but be thorough. This verifies
1074 * that a transmit has been completed since the previous
1075 * check AND there is at least one packet pending. The
1076 * ARMED bit is set to indicate a potential hang. The
1077 * bit is cleared if a pause frame is received to remove
1078 * false hang detection due to PFC or 802.3x frames. By
1079 * requiring this to fail twice we avoid races with
1080 * pfc clearing the ARMED bit and conditions where we
1081 * run the check_tx_hang logic with a transmit completion
1082 * pending but without time to complete it yet.
1084 if (tx_done_old
== tx_done
&& tx_pending
)
1085 /* make sure it is true for two checks in a row */
1086 return test_and_set_bit(__IXGBE_HANG_CHECK_ARMED
,
1088 /* update completed stats and continue */
1089 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1090 /* reset the countdown */
1091 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &tx_ring
->state
);
1097 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1098 * @adapter: driver private struct
1100 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter
*adapter
)
1103 /* Do the reset outside of interrupt context */
1104 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1105 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
1106 e_warn(drv
, "initiating reset due to tx timeout\n");
1107 ixgbe_service_event_schedule(adapter
);
1112 * ixgbe_tx_maxrate - callback to set the maximum per-queue bitrate
1114 static int ixgbe_tx_maxrate(struct net_device
*netdev
,
1115 int queue_index
, u32 maxrate
)
1117 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
1118 struct ixgbe_hw
*hw
= &adapter
->hw
;
1119 u32 bcnrc_val
= ixgbe_link_mbps(adapter
);
1124 /* Calculate the rate factor values to set */
1125 bcnrc_val
<<= IXGBE_RTTBCNRC_RF_INT_SHIFT
;
1126 bcnrc_val
/= maxrate
;
1128 /* clear everything but the rate factor */
1129 bcnrc_val
&= IXGBE_RTTBCNRC_RF_INT_MASK
|
1130 IXGBE_RTTBCNRC_RF_DEC_MASK
;
1132 /* enable the rate scheduler */
1133 bcnrc_val
|= IXGBE_RTTBCNRC_RS_ENA
;
1135 IXGBE_WRITE_REG(hw
, IXGBE_RTTDQSEL
, queue_index
);
1136 IXGBE_WRITE_REG(hw
, IXGBE_RTTBCNRC
, bcnrc_val
);
1142 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1143 * @q_vector: structure containing interrupt and ring information
1144 * @tx_ring: tx ring to clean
1145 * @napi_budget: Used to determine if we are in netpoll
1147 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector
*q_vector
,
1148 struct ixgbe_ring
*tx_ring
, int napi_budget
)
1150 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1151 struct ixgbe_tx_buffer
*tx_buffer
;
1152 union ixgbe_adv_tx_desc
*tx_desc
;
1153 unsigned int total_bytes
= 0, total_packets
= 0;
1154 unsigned int budget
= q_vector
->tx
.work_limit
;
1155 unsigned int i
= tx_ring
->next_to_clean
;
1157 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
1160 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
1161 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
1162 i
-= tx_ring
->count
;
1165 union ixgbe_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1167 /* if next_to_watch is not set then there is no work pending */
1171 /* prevent any other reads prior to eop_desc */
1172 read_barrier_depends();
1174 /* if DD is not set pending work has not been completed */
1175 if (!(eop_desc
->wb
.status
& cpu_to_le32(IXGBE_TXD_STAT_DD
)))
1178 /* clear next_to_watch to prevent false hangs */
1179 tx_buffer
->next_to_watch
= NULL
;
1181 /* update the statistics for this packet */
1182 total_bytes
+= tx_buffer
->bytecount
;
1183 total_packets
+= tx_buffer
->gso_segs
;
1186 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
1188 /* unmap skb header data */
1189 dma_unmap_single(tx_ring
->dev
,
1190 dma_unmap_addr(tx_buffer
, dma
),
1191 dma_unmap_len(tx_buffer
, len
),
1194 /* clear tx_buffer data */
1195 tx_buffer
->skb
= NULL
;
1196 dma_unmap_len_set(tx_buffer
, len
, 0);
1198 /* unmap remaining buffers */
1199 while (tx_desc
!= eop_desc
) {
1204 i
-= tx_ring
->count
;
1205 tx_buffer
= tx_ring
->tx_buffer_info
;
1206 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1209 /* unmap any remaining paged data */
1210 if (dma_unmap_len(tx_buffer
, len
)) {
1211 dma_unmap_page(tx_ring
->dev
,
1212 dma_unmap_addr(tx_buffer
, dma
),
1213 dma_unmap_len(tx_buffer
, len
),
1215 dma_unmap_len_set(tx_buffer
, len
, 0);
1219 /* move us one more past the eop_desc for start of next pkt */
1224 i
-= tx_ring
->count
;
1225 tx_buffer
= tx_ring
->tx_buffer_info
;
1226 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
1229 /* issue prefetch for next Tx descriptor */
1232 /* update budget accounting */
1234 } while (likely(budget
));
1236 i
+= tx_ring
->count
;
1237 tx_ring
->next_to_clean
= i
;
1238 u64_stats_update_begin(&tx_ring
->syncp
);
1239 tx_ring
->stats
.bytes
+= total_bytes
;
1240 tx_ring
->stats
.packets
+= total_packets
;
1241 u64_stats_update_end(&tx_ring
->syncp
);
1242 q_vector
->tx
.total_bytes
+= total_bytes
;
1243 q_vector
->tx
.total_packets
+= total_packets
;
1245 if (check_for_tx_hang(tx_ring
) && ixgbe_check_tx_hang(tx_ring
)) {
1246 /* schedule immediate reset if we believe we hung */
1247 struct ixgbe_hw
*hw
= &adapter
->hw
;
1248 e_err(drv
, "Detected Tx Unit Hang\n"
1250 " TDH, TDT <%x>, <%x>\n"
1251 " next_to_use <%x>\n"
1252 " next_to_clean <%x>\n"
1253 "tx_buffer_info[next_to_clean]\n"
1254 " time_stamp <%lx>\n"
1256 tx_ring
->queue_index
,
1257 IXGBE_READ_REG(hw
, IXGBE_TDH(tx_ring
->reg_idx
)),
1258 IXGBE_READ_REG(hw
, IXGBE_TDT(tx_ring
->reg_idx
)),
1259 tx_ring
->next_to_use
, i
,
1260 tx_ring
->tx_buffer_info
[i
].time_stamp
, jiffies
);
1262 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
1265 "tx hang %d detected on queue %d, resetting adapter\n",
1266 adapter
->tx_timeout_count
+ 1, tx_ring
->queue_index
);
1268 /* schedule immediate reset if we believe we hung */
1269 ixgbe_tx_timeout_reset(adapter
);
1271 /* the adapter is about to reset, no point in enabling stuff */
1275 netdev_tx_completed_queue(txring_txq(tx_ring
),
1276 total_packets
, total_bytes
);
1278 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1279 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1280 (ixgbe_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1281 /* Make sure that anybody stopping the queue after this
1282 * sees the new next_to_clean.
1285 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1286 tx_ring
->queue_index
)
1287 && !test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
1288 netif_wake_subqueue(tx_ring
->netdev
,
1289 tx_ring
->queue_index
);
1290 ++tx_ring
->tx_stats
.restart_queue
;
1297 #ifdef CONFIG_IXGBE_DCA
1298 static void ixgbe_update_tx_dca(struct ixgbe_adapter
*adapter
,
1299 struct ixgbe_ring
*tx_ring
,
1302 struct ixgbe_hw
*hw
= &adapter
->hw
;
1306 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1307 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
1309 switch (hw
->mac
.type
) {
1310 case ixgbe_mac_82598EB
:
1311 reg_offset
= IXGBE_DCA_TXCTRL(tx_ring
->reg_idx
);
1313 case ixgbe_mac_82599EB
:
1314 case ixgbe_mac_X540
:
1315 reg_offset
= IXGBE_DCA_TXCTRL_82599(tx_ring
->reg_idx
);
1316 txctrl
<<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599
;
1319 /* for unknown hardware do not write register */
1324 * We can enable relaxed ordering for reads, but not writes when
1325 * DCA is enabled. This is due to a known issue in some chipsets
1326 * which will cause the DCA tag to be cleared.
1328 txctrl
|= IXGBE_DCA_TXCTRL_DESC_RRO_EN
|
1329 IXGBE_DCA_TXCTRL_DATA_RRO_EN
|
1330 IXGBE_DCA_TXCTRL_DESC_DCA_EN
;
1332 IXGBE_WRITE_REG(hw
, reg_offset
, txctrl
);
1335 static void ixgbe_update_rx_dca(struct ixgbe_adapter
*adapter
,
1336 struct ixgbe_ring
*rx_ring
,
1339 struct ixgbe_hw
*hw
= &adapter
->hw
;
1341 u8 reg_idx
= rx_ring
->reg_idx
;
1343 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1344 rxctrl
= dca3_get_tag(rx_ring
->dev
, cpu
);
1346 switch (hw
->mac
.type
) {
1347 case ixgbe_mac_82599EB
:
1348 case ixgbe_mac_X540
:
1349 rxctrl
<<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599
;
1356 * We can enable relaxed ordering for reads, but not writes when
1357 * DCA is enabled. This is due to a known issue in some chipsets
1358 * which will cause the DCA tag to be cleared.
1360 rxctrl
|= IXGBE_DCA_RXCTRL_DESC_RRO_EN
|
1361 IXGBE_DCA_RXCTRL_DATA_DCA_EN
|
1362 IXGBE_DCA_RXCTRL_DESC_DCA_EN
;
1364 IXGBE_WRITE_REG(hw
, IXGBE_DCA_RXCTRL(reg_idx
), rxctrl
);
1367 static void ixgbe_update_dca(struct ixgbe_q_vector
*q_vector
)
1369 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
1370 struct ixgbe_ring
*ring
;
1371 int cpu
= get_cpu();
1373 if (q_vector
->cpu
== cpu
)
1376 ixgbe_for_each_ring(ring
, q_vector
->tx
)
1377 ixgbe_update_tx_dca(adapter
, ring
, cpu
);
1379 ixgbe_for_each_ring(ring
, q_vector
->rx
)
1380 ixgbe_update_rx_dca(adapter
, ring
, cpu
);
1382 q_vector
->cpu
= cpu
;
1387 static void ixgbe_setup_dca(struct ixgbe_adapter
*adapter
)
1391 /* always use CB2 mode, difference is masked in the CB driver */
1392 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1393 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1394 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1396 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1397 IXGBE_DCA_CTRL_DCA_DISABLE
);
1399 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1400 adapter
->q_vector
[i
]->cpu
= -1;
1401 ixgbe_update_dca(adapter
->q_vector
[i
]);
1405 static int __ixgbe_notify_dca(struct device
*dev
, void *data
)
1407 struct ixgbe_adapter
*adapter
= dev_get_drvdata(dev
);
1408 unsigned long event
= *(unsigned long *)data
;
1410 if (!(adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
))
1414 case DCA_PROVIDER_ADD
:
1415 /* if we're already enabled, don't do it again */
1416 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
1418 if (dca_add_requester(dev
) == 0) {
1419 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
1420 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1421 IXGBE_DCA_CTRL_DCA_MODE_CB2
);
1424 /* Fall Through since DCA is disabled. */
1425 case DCA_PROVIDER_REMOVE
:
1426 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
1427 dca_remove_requester(dev
);
1428 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
1429 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
1430 IXGBE_DCA_CTRL_DCA_DISABLE
);
1438 #endif /* CONFIG_IXGBE_DCA */
1440 #define IXGBE_RSS_L4_TYPES_MASK \
1441 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
1442 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
1443 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
1444 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
1446 static inline void ixgbe_rx_hash(struct ixgbe_ring
*ring
,
1447 union ixgbe_adv_rx_desc
*rx_desc
,
1448 struct sk_buff
*skb
)
1452 if (!(ring
->netdev
->features
& NETIF_F_RXHASH
))
1455 rss_type
= le16_to_cpu(rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
) &
1456 IXGBE_RXDADV_RSSTYPE_MASK
;
1461 skb_set_hash(skb
, le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
1462 (IXGBE_RSS_L4_TYPES_MASK
& (1ul << rss_type
)) ?
1463 PKT_HASH_TYPE_L4
: PKT_HASH_TYPE_L3
);
1468 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1469 * @ring: structure containing ring specific data
1470 * @rx_desc: advanced rx descriptor
1472 * Returns : true if it is FCoE pkt
1474 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring
*ring
,
1475 union ixgbe_adv_rx_desc
*rx_desc
)
1477 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1479 return test_bit(__IXGBE_RX_FCOE
, &ring
->state
) &&
1480 ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK
)) ==
1481 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE
<<
1482 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT
)));
1485 #endif /* IXGBE_FCOE */
1487 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1488 * @ring: structure containing ring specific data
1489 * @rx_desc: current Rx descriptor being processed
1490 * @skb: skb currently being received and modified
1492 static inline void ixgbe_rx_checksum(struct ixgbe_ring
*ring
,
1493 union ixgbe_adv_rx_desc
*rx_desc
,
1494 struct sk_buff
*skb
)
1496 __le16 pkt_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.pkt_info
;
1497 __le16 hdr_info
= rx_desc
->wb
.lower
.lo_dword
.hs_rss
.hdr_info
;
1498 bool encap_pkt
= false;
1500 skb_checksum_none_assert(skb
);
1502 /* Rx csum disabled */
1503 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
1506 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_VXLAN
)) &&
1507 (hdr_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_TUNNEL
>> 16))) {
1509 skb
->encapsulation
= 1;
1512 /* if IP and error */
1513 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_IPCS
) &&
1514 ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_IPE
)) {
1515 ring
->rx_stats
.csum_err
++;
1519 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_L4CS
))
1522 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_TCPE
)) {
1524 * 82599 errata, UDP frames with a 0 checksum can be marked as
1527 if ((pkt_info
& cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP
)) &&
1528 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR
, &ring
->state
))
1531 ring
->rx_stats
.csum_err
++;
1535 /* It must be a TCP or UDP packet with a valid checksum */
1536 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
1538 if (!ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_OUTERIPCS
))
1541 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXDADV_ERR_OUTERIPER
)) {
1542 skb
->ip_summed
= CHECKSUM_NONE
;
1545 /* If we checked the outer header let the stack know */
1546 skb
->csum_level
= 1;
1550 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring
*rx_ring
,
1551 struct ixgbe_rx_buffer
*bi
)
1553 struct page
*page
= bi
->page
;
1556 /* since we are recycling buffers we should seldom need to alloc */
1560 /* alloc new page for storage */
1561 page
= dev_alloc_pages(ixgbe_rx_pg_order(rx_ring
));
1562 if (unlikely(!page
)) {
1563 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1567 /* map page for use */
1568 dma
= dma_map_page(rx_ring
->dev
, page
, 0,
1569 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1572 * if mapping failed free memory back to system since
1573 * there isn't much point in holding memory we can't use
1575 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
1576 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1578 rx_ring
->rx_stats
.alloc_rx_page_failed
++;
1584 bi
->page_offset
= 0;
1590 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1591 * @rx_ring: ring to place buffers on
1592 * @cleaned_count: number of buffers to replace
1594 void ixgbe_alloc_rx_buffers(struct ixgbe_ring
*rx_ring
, u16 cleaned_count
)
1596 union ixgbe_adv_rx_desc
*rx_desc
;
1597 struct ixgbe_rx_buffer
*bi
;
1598 u16 i
= rx_ring
->next_to_use
;
1604 rx_desc
= IXGBE_RX_DESC(rx_ring
, i
);
1605 bi
= &rx_ring
->rx_buffer_info
[i
];
1606 i
-= rx_ring
->count
;
1609 if (!ixgbe_alloc_mapped_page(rx_ring
, bi
))
1613 * Refresh the desc even if buffer_addrs didn't change
1614 * because each write-back erases this info.
1616 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
1622 rx_desc
= IXGBE_RX_DESC(rx_ring
, 0);
1623 bi
= rx_ring
->rx_buffer_info
;
1624 i
-= rx_ring
->count
;
1627 /* clear the status bits for the next_to_use descriptor */
1628 rx_desc
->wb
.upper
.status_error
= 0;
1631 } while (cleaned_count
);
1633 i
+= rx_ring
->count
;
1635 if (rx_ring
->next_to_use
!= i
) {
1636 rx_ring
->next_to_use
= i
;
1638 /* update next to alloc since we have filled the ring */
1639 rx_ring
->next_to_alloc
= i
;
1641 /* Force memory writes to complete before letting h/w
1642 * know there are new descriptors to fetch. (Only
1643 * applicable for weak-ordered memory model archs,
1647 writel(i
, rx_ring
->tail
);
1651 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring
*ring
,
1652 struct sk_buff
*skb
)
1654 u16 hdr_len
= skb_headlen(skb
);
1656 /* set gso_size to avoid messing up TCP MSS */
1657 skb_shinfo(skb
)->gso_size
= DIV_ROUND_UP((skb
->len
- hdr_len
),
1658 IXGBE_CB(skb
)->append_cnt
);
1659 skb_shinfo(skb
)->gso_type
= SKB_GSO_TCPV4
;
1662 static void ixgbe_update_rsc_stats(struct ixgbe_ring
*rx_ring
,
1663 struct sk_buff
*skb
)
1665 /* if append_cnt is 0 then frame is not RSC */
1666 if (!IXGBE_CB(skb
)->append_cnt
)
1669 rx_ring
->rx_stats
.rsc_count
+= IXGBE_CB(skb
)->append_cnt
;
1670 rx_ring
->rx_stats
.rsc_flush
++;
1672 ixgbe_set_rsc_gso_size(rx_ring
, skb
);
1674 /* gso_size is computed using append_cnt so always clear it last */
1675 IXGBE_CB(skb
)->append_cnt
= 0;
1679 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1680 * @rx_ring: rx descriptor ring packet is being transacted on
1681 * @rx_desc: pointer to the EOP Rx descriptor
1682 * @skb: pointer to current skb being populated
1684 * This function checks the ring, descriptor, and packet information in
1685 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1686 * other fields within the skb.
1688 static void ixgbe_process_skb_fields(struct ixgbe_ring
*rx_ring
,
1689 union ixgbe_adv_rx_desc
*rx_desc
,
1690 struct sk_buff
*skb
)
1692 struct net_device
*dev
= rx_ring
->netdev
;
1693 u32 flags
= rx_ring
->q_vector
->adapter
->flags
;
1695 ixgbe_update_rsc_stats(rx_ring
, skb
);
1697 ixgbe_rx_hash(rx_ring
, rx_desc
, skb
);
1699 ixgbe_rx_checksum(rx_ring
, rx_desc
, skb
);
1701 if (unlikely(flags
& IXGBE_FLAG_RX_HWTSTAMP_ENABLED
))
1702 ixgbe_ptp_rx_hwtstamp(rx_ring
, rx_desc
, skb
);
1704 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1705 ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_VP
)) {
1706 u16 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
1707 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
1710 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
1712 skb
->protocol
= eth_type_trans(skb
, dev
);
1715 static void ixgbe_rx_skb(struct ixgbe_q_vector
*q_vector
,
1716 struct sk_buff
*skb
)
1718 skb_mark_napi_id(skb
, &q_vector
->napi
);
1719 if (ixgbe_qv_busy_polling(q_vector
))
1720 netif_receive_skb(skb
);
1722 napi_gro_receive(&q_vector
->napi
, skb
);
1726 * ixgbe_is_non_eop - process handling of non-EOP buffers
1727 * @rx_ring: Rx ring being processed
1728 * @rx_desc: Rx descriptor for current buffer
1729 * @skb: Current socket buffer containing buffer in progress
1731 * This function updates next to clean. If the buffer is an EOP buffer
1732 * this function exits returning false, otherwise it will place the
1733 * sk_buff in the next buffer to be chained and return true indicating
1734 * that this is in fact a non-EOP buffer.
1736 static bool ixgbe_is_non_eop(struct ixgbe_ring
*rx_ring
,
1737 union ixgbe_adv_rx_desc
*rx_desc
,
1738 struct sk_buff
*skb
)
1740 u32 ntc
= rx_ring
->next_to_clean
+ 1;
1742 /* fetch, update, and store next to clean */
1743 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
1744 rx_ring
->next_to_clean
= ntc
;
1746 prefetch(IXGBE_RX_DESC(rx_ring
, ntc
));
1748 /* update RSC append count if present */
1749 if (ring_is_rsc_enabled(rx_ring
)) {
1750 __le32 rsc_enabled
= rx_desc
->wb
.lower
.lo_dword
.data
&
1751 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK
);
1753 if (unlikely(rsc_enabled
)) {
1754 u32 rsc_cnt
= le32_to_cpu(rsc_enabled
);
1756 rsc_cnt
>>= IXGBE_RXDADV_RSCCNT_SHIFT
;
1757 IXGBE_CB(skb
)->append_cnt
+= rsc_cnt
- 1;
1759 /* update ntc based on RSC value */
1760 ntc
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1761 ntc
&= IXGBE_RXDADV_NEXTP_MASK
;
1762 ntc
>>= IXGBE_RXDADV_NEXTP_SHIFT
;
1766 /* if we are the last buffer then there is nothing else to do */
1767 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
1770 /* place skb in next buffer to be received */
1771 rx_ring
->rx_buffer_info
[ntc
].skb
= skb
;
1772 rx_ring
->rx_stats
.non_eop_descs
++;
1778 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1779 * @rx_ring: rx descriptor ring packet is being transacted on
1780 * @skb: pointer to current skb being adjusted
1782 * This function is an ixgbe specific version of __pskb_pull_tail. The
1783 * main difference between this version and the original function is that
1784 * this function can make several assumptions about the state of things
1785 * that allow for significant optimizations versus the standard function.
1786 * As a result we can do things like drop a frag and maintain an accurate
1787 * truesize for the skb.
1789 static void ixgbe_pull_tail(struct ixgbe_ring
*rx_ring
,
1790 struct sk_buff
*skb
)
1792 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1794 unsigned int pull_len
;
1797 * it is valid to use page_address instead of kmap since we are
1798 * working with pages allocated out of the lomem pool per
1799 * alloc_page(GFP_ATOMIC)
1801 va
= skb_frag_address(frag
);
1804 * we need the header to contain the greater of either ETH_HLEN or
1805 * 60 bytes if the skb->len is less than 60 for skb_pad.
1807 pull_len
= eth_get_headlen(va
, IXGBE_RX_HDR_SIZE
);
1809 /* align pull length to size of long to optimize memcpy performance */
1810 skb_copy_to_linear_data(skb
, va
, ALIGN(pull_len
, sizeof(long)));
1812 /* update all of the pointers */
1813 skb_frag_size_sub(frag
, pull_len
);
1814 frag
->page_offset
+= pull_len
;
1815 skb
->data_len
-= pull_len
;
1816 skb
->tail
+= pull_len
;
1820 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1821 * @rx_ring: rx descriptor ring packet is being transacted on
1822 * @skb: pointer to current skb being updated
1824 * This function provides a basic DMA sync up for the first fragment of an
1825 * skb. The reason for doing this is that the first fragment cannot be
1826 * unmapped until we have reached the end of packet descriptor for a buffer
1829 static void ixgbe_dma_sync_frag(struct ixgbe_ring
*rx_ring
,
1830 struct sk_buff
*skb
)
1832 /* if the page was released unmap it, else just sync our portion */
1833 if (unlikely(IXGBE_CB(skb
)->page_released
)) {
1834 dma_unmap_page(rx_ring
->dev
, IXGBE_CB(skb
)->dma
,
1835 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
1836 IXGBE_CB(skb
)->page_released
= false;
1838 struct skb_frag_struct
*frag
= &skb_shinfo(skb
)->frags
[0];
1840 dma_sync_single_range_for_cpu(rx_ring
->dev
,
1843 ixgbe_rx_bufsz(rx_ring
),
1846 IXGBE_CB(skb
)->dma
= 0;
1850 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1851 * @rx_ring: rx descriptor ring packet is being transacted on
1852 * @rx_desc: pointer to the EOP Rx descriptor
1853 * @skb: pointer to current skb being fixed
1855 * Check for corrupted packet headers caused by senders on the local L2
1856 * embedded NIC switch not setting up their Tx Descriptors right. These
1857 * should be very rare.
1859 * Also address the case where we are pulling data in on pages only
1860 * and as such no data is present in the skb header.
1862 * In addition if skb is not at least 60 bytes we need to pad it so that
1863 * it is large enough to qualify as a valid Ethernet frame.
1865 * Returns true if an error was encountered and skb was freed.
1867 static bool ixgbe_cleanup_headers(struct ixgbe_ring
*rx_ring
,
1868 union ixgbe_adv_rx_desc
*rx_desc
,
1869 struct sk_buff
*skb
)
1871 struct net_device
*netdev
= rx_ring
->netdev
;
1873 /* verify that the packet does not have any known errors */
1874 if (unlikely(ixgbe_test_staterr(rx_desc
,
1875 IXGBE_RXDADV_ERR_FRAME_ERR_MASK
) &&
1876 !(netdev
->features
& NETIF_F_RXALL
))) {
1877 dev_kfree_skb_any(skb
);
1881 /* place header in linear portion of buffer */
1882 if (skb_is_nonlinear(skb
))
1883 ixgbe_pull_tail(rx_ring
, skb
);
1886 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1887 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
))
1891 /* if eth_skb_pad returns an error the skb was freed */
1892 if (eth_skb_pad(skb
))
1899 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1900 * @rx_ring: rx descriptor ring to store buffers on
1901 * @old_buff: donor buffer to have page reused
1903 * Synchronizes page for reuse by the adapter
1905 static void ixgbe_reuse_rx_page(struct ixgbe_ring
*rx_ring
,
1906 struct ixgbe_rx_buffer
*old_buff
)
1908 struct ixgbe_rx_buffer
*new_buff
;
1909 u16 nta
= rx_ring
->next_to_alloc
;
1911 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
1913 /* update, and store next to alloc */
1915 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
1917 /* transfer page from old buffer to new buffer */
1918 *new_buff
= *old_buff
;
1920 /* sync the buffer for use by the device */
1921 dma_sync_single_range_for_device(rx_ring
->dev
, new_buff
->dma
,
1922 new_buff
->page_offset
,
1923 ixgbe_rx_bufsz(rx_ring
),
1927 static inline bool ixgbe_page_is_reserved(struct page
*page
)
1929 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
1933 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1934 * @rx_ring: rx descriptor ring to transact packets on
1935 * @rx_buffer: buffer containing page to add
1936 * @rx_desc: descriptor containing length of buffer written by hardware
1937 * @skb: sk_buff to place the data into
1939 * This function will add the data contained in rx_buffer->page to the skb.
1940 * This is done either through a direct copy if the data in the buffer is
1941 * less than the skb header size, otherwise it will just attach the page as
1942 * a frag to the skb.
1944 * The function will then update the page offset if necessary and return
1945 * true if the buffer can be reused by the adapter.
1947 static bool ixgbe_add_rx_frag(struct ixgbe_ring
*rx_ring
,
1948 struct ixgbe_rx_buffer
*rx_buffer
,
1949 union ixgbe_adv_rx_desc
*rx_desc
,
1950 struct sk_buff
*skb
)
1952 struct page
*page
= rx_buffer
->page
;
1953 unsigned int size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1954 #if (PAGE_SIZE < 8192)
1955 unsigned int truesize
= ixgbe_rx_bufsz(rx_ring
);
1957 unsigned int truesize
= ALIGN(size
, L1_CACHE_BYTES
);
1958 unsigned int last_offset
= ixgbe_rx_pg_size(rx_ring
) -
1959 ixgbe_rx_bufsz(rx_ring
);
1962 if ((size
<= IXGBE_RX_HDR_SIZE
) && !skb_is_nonlinear(skb
)) {
1963 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
1965 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
1967 /* page is not reserved, we can reuse buffer as-is */
1968 if (likely(!ixgbe_page_is_reserved(page
)))
1971 /* this page cannot be reused so discard it */
1972 __free_pages(page
, ixgbe_rx_pg_order(rx_ring
));
1976 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
1977 rx_buffer
->page_offset
, size
, truesize
);
1979 /* avoid re-using remote pages */
1980 if (unlikely(ixgbe_page_is_reserved(page
)))
1983 #if (PAGE_SIZE < 8192)
1984 /* if we are only owner of page we can reuse it */
1985 if (unlikely(page_count(page
) != 1))
1988 /* flip page offset to other buffer */
1989 rx_buffer
->page_offset
^= truesize
;
1991 /* move offset up to the next cache line */
1992 rx_buffer
->page_offset
+= truesize
;
1994 if (rx_buffer
->page_offset
> last_offset
)
1998 /* Even if we own the page, we are not allowed to use atomic_set()
1999 * This would break get_page_unless_zero() users.
2006 static struct sk_buff
*ixgbe_fetch_rx_buffer(struct ixgbe_ring
*rx_ring
,
2007 union ixgbe_adv_rx_desc
*rx_desc
)
2009 struct ixgbe_rx_buffer
*rx_buffer
;
2010 struct sk_buff
*skb
;
2013 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
2014 page
= rx_buffer
->page
;
2017 skb
= rx_buffer
->skb
;
2020 void *page_addr
= page_address(page
) +
2021 rx_buffer
->page_offset
;
2023 /* prefetch first cache line of first page */
2024 prefetch(page_addr
);
2025 #if L1_CACHE_BYTES < 128
2026 prefetch(page_addr
+ L1_CACHE_BYTES
);
2029 /* allocate a skb to store the frags */
2030 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
,
2032 if (unlikely(!skb
)) {
2033 rx_ring
->rx_stats
.alloc_rx_buff_failed
++;
2038 * we will be copying header into skb->data in
2039 * pskb_may_pull so it is in our interest to prefetch
2040 * it now to avoid a possible cache miss
2042 prefetchw(skb
->data
);
2045 * Delay unmapping of the first packet. It carries the
2046 * header information, HW may still access the header
2047 * after the writeback. Only unmap it when EOP is
2050 if (likely(ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
)))
2053 IXGBE_CB(skb
)->dma
= rx_buffer
->dma
;
2055 if (ixgbe_test_staterr(rx_desc
, IXGBE_RXD_STAT_EOP
))
2056 ixgbe_dma_sync_frag(rx_ring
, skb
);
2059 /* we are reusing so sync this buffer for CPU use */
2060 dma_sync_single_range_for_cpu(rx_ring
->dev
,
2062 rx_buffer
->page_offset
,
2063 ixgbe_rx_bufsz(rx_ring
),
2066 rx_buffer
->skb
= NULL
;
2069 /* pull page into skb */
2070 if (ixgbe_add_rx_frag(rx_ring
, rx_buffer
, rx_desc
, skb
)) {
2071 /* hand second half of page back to the ring */
2072 ixgbe_reuse_rx_page(rx_ring
, rx_buffer
);
2073 } else if (IXGBE_CB(skb
)->dma
== rx_buffer
->dma
) {
2074 /* the page has been released from the ring */
2075 IXGBE_CB(skb
)->page_released
= true;
2077 /* we are not reusing the buffer so unmap it */
2078 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
2079 ixgbe_rx_pg_size(rx_ring
),
2083 /* clear contents of buffer_info */
2084 rx_buffer
->page
= NULL
;
2090 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2091 * @q_vector: structure containing interrupt and ring information
2092 * @rx_ring: rx descriptor ring to transact packets on
2093 * @budget: Total limit on number of packets to process
2095 * This function provides a "bounce buffer" approach to Rx interrupt
2096 * processing. The advantage to this is that on systems that have
2097 * expensive overhead for IOMMU access this provides a means of avoiding
2098 * it by maintaining the mapping of the page to the syste.
2100 * Returns amount of work completed
2102 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector
*q_vector
,
2103 struct ixgbe_ring
*rx_ring
,
2106 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
2108 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2110 unsigned int mss
= 0;
2111 #endif /* IXGBE_FCOE */
2112 u16 cleaned_count
= ixgbe_desc_unused(rx_ring
);
2114 while (likely(total_rx_packets
< budget
)) {
2115 union ixgbe_adv_rx_desc
*rx_desc
;
2116 struct sk_buff
*skb
;
2118 /* return some buffers to hardware, one at a time is too slow */
2119 if (cleaned_count
>= IXGBE_RX_BUFFER_WRITE
) {
2120 ixgbe_alloc_rx_buffers(rx_ring
, cleaned_count
);
2124 rx_desc
= IXGBE_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
2126 if (!rx_desc
->wb
.upper
.status_error
)
2129 /* This memory barrier is needed to keep us from reading
2130 * any other fields out of the rx_desc until we know the
2131 * descriptor has been written back
2135 /* retrieve a buffer from the ring */
2136 skb
= ixgbe_fetch_rx_buffer(rx_ring
, rx_desc
);
2138 /* exit if we failed to retrieve a buffer */
2144 /* place incomplete frames back on ring for completion */
2145 if (ixgbe_is_non_eop(rx_ring
, rx_desc
, skb
))
2148 /* verify the packet layout is correct */
2149 if (ixgbe_cleanup_headers(rx_ring
, rx_desc
, skb
))
2152 /* probably a little skewed due to removing CRC */
2153 total_rx_bytes
+= skb
->len
;
2155 /* populate checksum, timestamp, VLAN, and protocol */
2156 ixgbe_process_skb_fields(rx_ring
, rx_desc
, skb
);
2159 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2160 if (ixgbe_rx_is_fcoe(rx_ring
, rx_desc
)) {
2161 ddp_bytes
= ixgbe_fcoe_ddp(adapter
, rx_desc
, skb
);
2162 /* include DDPed FCoE data */
2163 if (ddp_bytes
> 0) {
2165 mss
= rx_ring
->netdev
->mtu
-
2166 sizeof(struct fcoe_hdr
) -
2167 sizeof(struct fc_frame_header
) -
2168 sizeof(struct fcoe_crc_eof
);
2172 total_rx_bytes
+= ddp_bytes
;
2173 total_rx_packets
+= DIV_ROUND_UP(ddp_bytes
,
2177 dev_kfree_skb_any(skb
);
2182 #endif /* IXGBE_FCOE */
2183 ixgbe_rx_skb(q_vector
, skb
);
2185 /* update budget accounting */
2189 u64_stats_update_begin(&rx_ring
->syncp
);
2190 rx_ring
->stats
.packets
+= total_rx_packets
;
2191 rx_ring
->stats
.bytes
+= total_rx_bytes
;
2192 u64_stats_update_end(&rx_ring
->syncp
);
2193 q_vector
->rx
.total_packets
+= total_rx_packets
;
2194 q_vector
->rx
.total_bytes
+= total_rx_bytes
;
2196 return total_rx_packets
;
2199 #ifdef CONFIG_NET_RX_BUSY_POLL
2200 /* must be called with local_bh_disable()d */
2201 static int ixgbe_low_latency_recv(struct napi_struct
*napi
)
2203 struct ixgbe_q_vector
*q_vector
=
2204 container_of(napi
, struct ixgbe_q_vector
, napi
);
2205 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2206 struct ixgbe_ring
*ring
;
2209 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2210 return LL_FLUSH_FAILED
;
2212 if (!ixgbe_qv_lock_poll(q_vector
))
2213 return LL_FLUSH_BUSY
;
2215 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2216 found
= ixgbe_clean_rx_irq(q_vector
, ring
, 4);
2217 #ifdef BP_EXTENDED_STATS
2219 ring
->stats
.cleaned
+= found
;
2221 ring
->stats
.misses
++;
2227 ixgbe_qv_unlock_poll(q_vector
);
2231 #endif /* CONFIG_NET_RX_BUSY_POLL */
2234 * ixgbe_configure_msix - Configure MSI-X hardware
2235 * @adapter: board private structure
2237 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2240 static void ixgbe_configure_msix(struct ixgbe_adapter
*adapter
)
2242 struct ixgbe_q_vector
*q_vector
;
2246 /* Populate MSIX to EITR Select */
2247 if (adapter
->num_vfs
> 32) {
2248 u32 eitrsel
= (1 << (adapter
->num_vfs
- 32)) - 1;
2249 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, eitrsel
);
2253 * Populate the IVAR table and set the ITR values to the
2254 * corresponding register.
2256 for (v_idx
= 0; v_idx
< adapter
->num_q_vectors
; v_idx
++) {
2257 struct ixgbe_ring
*ring
;
2258 q_vector
= adapter
->q_vector
[v_idx
];
2260 ixgbe_for_each_ring(ring
, q_vector
->rx
)
2261 ixgbe_set_ivar(adapter
, 0, ring
->reg_idx
, v_idx
);
2263 ixgbe_for_each_ring(ring
, q_vector
->tx
)
2264 ixgbe_set_ivar(adapter
, 1, ring
->reg_idx
, v_idx
);
2266 ixgbe_write_eitr(q_vector
);
2269 switch (adapter
->hw
.mac
.type
) {
2270 case ixgbe_mac_82598EB
:
2271 ixgbe_set_ivar(adapter
, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX
,
2274 case ixgbe_mac_82599EB
:
2275 case ixgbe_mac_X540
:
2276 case ixgbe_mac_X550
:
2277 case ixgbe_mac_X550EM_x
:
2278 case ixgbe_mac_x550em_a
:
2279 ixgbe_set_ivar(adapter
, -1, 1, v_idx
);
2284 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITR(v_idx
), 1950);
2286 /* set up to autoclear timer, and the vectors */
2287 mask
= IXGBE_EIMS_ENABLE_MASK
;
2288 mask
&= ~(IXGBE_EIMS_OTHER
|
2289 IXGBE_EIMS_MAILBOX
|
2292 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIAC
, mask
);
2295 enum latency_range
{
2299 latency_invalid
= 255
2303 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2304 * @q_vector: structure containing interrupt and ring information
2305 * @ring_container: structure containing ring performance data
2307 * Stores a new ITR value based on packets and byte
2308 * counts during the last interrupt. The advantage of per interrupt
2309 * computation is faster updates and more accurate ITR for the current
2310 * traffic pattern. Constants in this function were computed
2311 * based on theoretical maximum wire speed and thresholds were set based
2312 * on testing data as well as attempting to minimize response time
2313 * while increasing bulk throughput.
2314 * this functionality is controlled by the InterruptThrottleRate module
2315 * parameter (see ixgbe_param.c)
2317 static void ixgbe_update_itr(struct ixgbe_q_vector
*q_vector
,
2318 struct ixgbe_ring_container
*ring_container
)
2320 int bytes
= ring_container
->total_bytes
;
2321 int packets
= ring_container
->total_packets
;
2324 u8 itr_setting
= ring_container
->itr
;
2329 /* simple throttlerate management
2330 * 0-10MB/s lowest (100000 ints/s)
2331 * 10-20MB/s low (20000 ints/s)
2332 * 20-1249MB/s bulk (12000 ints/s)
2334 /* what was last interrupt timeslice? */
2335 timepassed_us
= q_vector
->itr
>> 2;
2336 if (timepassed_us
== 0)
2339 bytes_perint
= bytes
/ timepassed_us
; /* bytes/usec */
2341 switch (itr_setting
) {
2342 case lowest_latency
:
2343 if (bytes_perint
> 10)
2344 itr_setting
= low_latency
;
2347 if (bytes_perint
> 20)
2348 itr_setting
= bulk_latency
;
2349 else if (bytes_perint
<= 10)
2350 itr_setting
= lowest_latency
;
2353 if (bytes_perint
<= 20)
2354 itr_setting
= low_latency
;
2358 /* clear work counters since we have the values we need */
2359 ring_container
->total_bytes
= 0;
2360 ring_container
->total_packets
= 0;
2362 /* write updated itr to ring container */
2363 ring_container
->itr
= itr_setting
;
2367 * ixgbe_write_eitr - write EITR register in hardware specific way
2368 * @q_vector: structure containing interrupt and ring information
2370 * This function is made to be called by ethtool and by the driver
2371 * when it needs to update EITR registers at runtime. Hardware
2372 * specific quirks/differences are taken care of here.
2374 void ixgbe_write_eitr(struct ixgbe_q_vector
*q_vector
)
2376 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2377 struct ixgbe_hw
*hw
= &adapter
->hw
;
2378 int v_idx
= q_vector
->v_idx
;
2379 u32 itr_reg
= q_vector
->itr
& IXGBE_MAX_EITR
;
2381 switch (adapter
->hw
.mac
.type
) {
2382 case ixgbe_mac_82598EB
:
2383 /* must write high and low 16 bits to reset counter */
2384 itr_reg
|= (itr_reg
<< 16);
2386 case ixgbe_mac_82599EB
:
2387 case ixgbe_mac_X540
:
2388 case ixgbe_mac_X550
:
2389 case ixgbe_mac_X550EM_x
:
2390 case ixgbe_mac_x550em_a
:
2392 * set the WDIS bit to not clear the timer bits and cause an
2393 * immediate assertion of the interrupt
2395 itr_reg
|= IXGBE_EITR_CNT_WDIS
;
2400 IXGBE_WRITE_REG(hw
, IXGBE_EITR(v_idx
), itr_reg
);
2403 static void ixgbe_set_itr(struct ixgbe_q_vector
*q_vector
)
2405 u32 new_itr
= q_vector
->itr
;
2408 ixgbe_update_itr(q_vector
, &q_vector
->tx
);
2409 ixgbe_update_itr(q_vector
, &q_vector
->rx
);
2411 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
2413 switch (current_itr
) {
2414 /* counts and packets in update_itr are dependent on these numbers */
2415 case lowest_latency
:
2416 new_itr
= IXGBE_100K_ITR
;
2419 new_itr
= IXGBE_20K_ITR
;
2422 new_itr
= IXGBE_12K_ITR
;
2428 if (new_itr
!= q_vector
->itr
) {
2429 /* do an exponential smoothing */
2430 new_itr
= (10 * new_itr
* q_vector
->itr
) /
2431 ((9 * new_itr
) + q_vector
->itr
);
2433 /* save the algorithm value here */
2434 q_vector
->itr
= new_itr
;
2436 ixgbe_write_eitr(q_vector
);
2441 * ixgbe_check_overtemp_subtask - check for over temperature
2442 * @adapter: pointer to adapter
2444 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter
*adapter
)
2446 struct ixgbe_hw
*hw
= &adapter
->hw
;
2447 u32 eicr
= adapter
->interrupt_event
;
2449 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
2452 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) &&
2453 !(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_EVENT
))
2456 adapter
->flags2
&= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2458 switch (hw
->device_id
) {
2459 case IXGBE_DEV_ID_82599_T3_LOM
:
2461 * Since the warning interrupt is for both ports
2462 * we don't have to check if:
2463 * - This interrupt wasn't for our port.
2464 * - We may have missed the interrupt so always have to
2465 * check if we got a LSC
2467 if (!(eicr
& IXGBE_EICR_GPI_SDP0_8259X
) &&
2468 !(eicr
& IXGBE_EICR_LSC
))
2471 if (!(eicr
& IXGBE_EICR_LSC
) && hw
->mac
.ops
.check_link
) {
2473 bool link_up
= false;
2475 hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
2481 /* Check if this is not due to overtemp */
2482 if (hw
->phy
.ops
.check_overtemp(hw
) != IXGBE_ERR_OVERTEMP
)
2487 if (adapter
->hw
.mac
.type
>= ixgbe_mac_X540
)
2489 if (!(eicr
& IXGBE_EICR_GPI_SDP0(hw
)))
2493 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2495 adapter
->interrupt_event
= 0;
2498 static void ixgbe_check_fan_failure(struct ixgbe_adapter
*adapter
, u32 eicr
)
2500 struct ixgbe_hw
*hw
= &adapter
->hw
;
2502 if ((adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) &&
2503 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2504 e_crit(probe
, "Fan has stopped, replace the adapter\n");
2505 /* write to clear the interrupt */
2506 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2510 static void ixgbe_check_overtemp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2512 struct ixgbe_hw
*hw
= &adapter
->hw
;
2514 if (!(adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
))
2517 switch (adapter
->hw
.mac
.type
) {
2518 case ixgbe_mac_82599EB
:
2520 * Need to check link state so complete overtemp check
2523 if (((eicr
& IXGBE_EICR_GPI_SDP0(hw
)) ||
2524 (eicr
& IXGBE_EICR_LSC
)) &&
2525 (!test_bit(__IXGBE_DOWN
, &adapter
->state
))) {
2526 adapter
->interrupt_event
= eicr
;
2527 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_EVENT
;
2528 ixgbe_service_event_schedule(adapter
);
2532 case ixgbe_mac_X540
:
2533 if (!(eicr
& IXGBE_EICR_TS
))
2540 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
2543 static inline bool ixgbe_is_sfp(struct ixgbe_hw
*hw
)
2545 switch (hw
->mac
.type
) {
2546 case ixgbe_mac_82598EB
:
2547 if (hw
->phy
.type
== ixgbe_phy_nl
)
2550 case ixgbe_mac_82599EB
:
2551 case ixgbe_mac_X550EM_x
:
2552 case ixgbe_mac_x550em_a
:
2553 switch (hw
->mac
.ops
.get_media_type(hw
)) {
2554 case ixgbe_media_type_fiber
:
2555 case ixgbe_media_type_fiber_qsfp
:
2565 static void ixgbe_check_sfp_event(struct ixgbe_adapter
*adapter
, u32 eicr
)
2567 struct ixgbe_hw
*hw
= &adapter
->hw
;
2568 u32 eicr_mask
= IXGBE_EICR_GPI_SDP2(hw
);
2570 if (!ixgbe_is_sfp(hw
))
2573 /* Later MAC's use different SDP */
2574 if (hw
->mac
.type
>= ixgbe_mac_X540
)
2575 eicr_mask
= IXGBE_EICR_GPI_SDP0_X540
;
2577 if (eicr
& eicr_mask
) {
2578 /* Clear the interrupt */
2579 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr_mask
);
2580 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2581 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
2582 adapter
->sfp_poll_time
= 0;
2583 ixgbe_service_event_schedule(adapter
);
2587 if (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
&&
2588 (eicr
& IXGBE_EICR_GPI_SDP1(hw
))) {
2589 /* Clear the interrupt */
2590 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_GPI_SDP1(hw
));
2591 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2592 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
2593 ixgbe_service_event_schedule(adapter
);
2598 static void ixgbe_check_lsc(struct ixgbe_adapter
*adapter
)
2600 struct ixgbe_hw
*hw
= &adapter
->hw
;
2603 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
2604 adapter
->link_check_timeout
= jiffies
;
2605 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
2606 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_LSC
);
2607 IXGBE_WRITE_FLUSH(hw
);
2608 ixgbe_service_event_schedule(adapter
);
2612 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter
*adapter
,
2616 struct ixgbe_hw
*hw
= &adapter
->hw
;
2618 switch (hw
->mac
.type
) {
2619 case ixgbe_mac_82598EB
:
2620 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2621 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, mask
);
2623 case ixgbe_mac_82599EB
:
2624 case ixgbe_mac_X540
:
2625 case ixgbe_mac_X550
:
2626 case ixgbe_mac_X550EM_x
:
2627 case ixgbe_mac_x550em_a
:
2628 mask
= (qmask
& 0xFFFFFFFF);
2630 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(0), mask
);
2631 mask
= (qmask
>> 32);
2633 IXGBE_WRITE_REG(hw
, IXGBE_EIMS_EX(1), mask
);
2638 /* skip the flush */
2641 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter
*adapter
,
2645 struct ixgbe_hw
*hw
= &adapter
->hw
;
2647 switch (hw
->mac
.type
) {
2648 case ixgbe_mac_82598EB
:
2649 mask
= (IXGBE_EIMS_RTX_QUEUE
& qmask
);
2650 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, mask
);
2652 case ixgbe_mac_82599EB
:
2653 case ixgbe_mac_X540
:
2654 case ixgbe_mac_X550
:
2655 case ixgbe_mac_X550EM_x
:
2656 case ixgbe_mac_x550em_a
:
2657 mask
= (qmask
& 0xFFFFFFFF);
2659 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(0), mask
);
2660 mask
= (qmask
>> 32);
2662 IXGBE_WRITE_REG(hw
, IXGBE_EIMC_EX(1), mask
);
2667 /* skip the flush */
2671 * ixgbe_irq_enable - Enable default interrupt generation settings
2672 * @adapter: board private structure
2674 static inline void ixgbe_irq_enable(struct ixgbe_adapter
*adapter
, bool queues
,
2677 struct ixgbe_hw
*hw
= &adapter
->hw
;
2678 u32 mask
= (IXGBE_EIMS_ENABLE_MASK
& ~IXGBE_EIMS_RTX_QUEUE
);
2680 /* don't reenable LSC while waiting for link */
2681 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
2682 mask
&= ~IXGBE_EIMS_LSC
;
2684 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
)
2685 switch (adapter
->hw
.mac
.type
) {
2686 case ixgbe_mac_82599EB
:
2687 mask
|= IXGBE_EIMS_GPI_SDP0(hw
);
2689 case ixgbe_mac_X540
:
2690 case ixgbe_mac_X550
:
2691 case ixgbe_mac_X550EM_x
:
2692 case ixgbe_mac_x550em_a
:
2693 mask
|= IXGBE_EIMS_TS
;
2698 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
2699 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2700 switch (adapter
->hw
.mac
.type
) {
2701 case ixgbe_mac_82599EB
:
2702 mask
|= IXGBE_EIMS_GPI_SDP1(hw
);
2703 mask
|= IXGBE_EIMS_GPI_SDP2(hw
);
2705 case ixgbe_mac_X540
:
2706 case ixgbe_mac_X550
:
2707 case ixgbe_mac_X550EM_x
:
2708 case ixgbe_mac_x550em_a
:
2709 if (adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_X_SFP
||
2710 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP
||
2711 adapter
->hw
.device_id
== IXGBE_DEV_ID_X550EM_A_SFP_N
)
2712 mask
|= IXGBE_EIMS_GPI_SDP0(&adapter
->hw
);
2713 if (adapter
->hw
.phy
.type
== ixgbe_phy_x550em_ext_t
)
2714 mask
|= IXGBE_EICR_GPI_SDP0_X540
;
2715 mask
|= IXGBE_EIMS_ECC
;
2716 mask
|= IXGBE_EIMS_MAILBOX
;
2722 if ((adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) &&
2723 !(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
2724 mask
|= IXGBE_EIMS_FLOW_DIR
;
2726 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMS
, mask
);
2728 ixgbe_irq_enable_queues(adapter
, ~0);
2730 IXGBE_WRITE_FLUSH(&adapter
->hw
);
2733 static irqreturn_t
ixgbe_msix_other(int irq
, void *data
)
2735 struct ixgbe_adapter
*adapter
= data
;
2736 struct ixgbe_hw
*hw
= &adapter
->hw
;
2740 * Workaround for Silicon errata. Use clear-by-write instead
2741 * of clear-by-read. Reading with EICS will return the
2742 * interrupt causes without clearing, which later be done
2743 * with the write to EICR.
2745 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICS
);
2747 /* The lower 16bits of the EICR register are for the queue interrupts
2748 * which should be masked here in order to not accidentally clear them if
2749 * the bits are high when ixgbe_msix_other is called. There is a race
2750 * condition otherwise which results in possible performance loss
2751 * especially if the ixgbe_msix_other interrupt is triggering
2752 * consistently (as it would when PPS is turned on for the X540 device)
2756 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, eicr
);
2758 if (eicr
& IXGBE_EICR_LSC
)
2759 ixgbe_check_lsc(adapter
);
2761 if (eicr
& IXGBE_EICR_MAILBOX
)
2762 ixgbe_msg_task(adapter
);
2764 switch (hw
->mac
.type
) {
2765 case ixgbe_mac_82599EB
:
2766 case ixgbe_mac_X540
:
2767 case ixgbe_mac_X550
:
2768 case ixgbe_mac_X550EM_x
:
2769 case ixgbe_mac_x550em_a
:
2770 if (hw
->phy
.type
== ixgbe_phy_x550em_ext_t
&&
2771 (eicr
& IXGBE_EICR_GPI_SDP0_X540
)) {
2772 adapter
->flags2
|= IXGBE_FLAG2_PHY_INTERRUPT
;
2773 ixgbe_service_event_schedule(adapter
);
2774 IXGBE_WRITE_REG(hw
, IXGBE_EICR
,
2775 IXGBE_EICR_GPI_SDP0_X540
);
2777 if (eicr
& IXGBE_EICR_ECC
) {
2778 e_info(link
, "Received ECC Err, initiating reset\n");
2779 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
2780 ixgbe_service_event_schedule(adapter
);
2781 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
2783 /* Handle Flow Director Full threshold interrupt */
2784 if (eicr
& IXGBE_EICR_FLOW_DIR
) {
2785 int reinit_count
= 0;
2787 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
2788 struct ixgbe_ring
*ring
= adapter
->tx_ring
[i
];
2789 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE
,
2794 /* no more flow director interrupts until after init */
2795 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_EIMC_FLOW_DIR
);
2796 adapter
->flags2
|= IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
2797 ixgbe_service_event_schedule(adapter
);
2800 ixgbe_check_sfp_event(adapter
, eicr
);
2801 ixgbe_check_overtemp_event(adapter
, eicr
);
2807 ixgbe_check_fan_failure(adapter
, eicr
);
2809 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
2810 ixgbe_ptp_check_pps_event(adapter
);
2812 /* re-enable the original interrupt state, no lsc, no queues */
2813 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2814 ixgbe_irq_enable(adapter
, false, false);
2819 static irqreturn_t
ixgbe_msix_clean_rings(int irq
, void *data
)
2821 struct ixgbe_q_vector
*q_vector
= data
;
2823 /* EIAM disabled interrupts (on this vector) for us */
2825 if (q_vector
->rx
.ring
|| q_vector
->tx
.ring
)
2826 napi_schedule_irqoff(&q_vector
->napi
);
2832 * ixgbe_poll - NAPI Rx polling callback
2833 * @napi: structure for representing this polling device
2834 * @budget: how many packets driver is allowed to clean
2836 * This function is used for legacy and MSI, NAPI mode
2838 int ixgbe_poll(struct napi_struct
*napi
, int budget
)
2840 struct ixgbe_q_vector
*q_vector
=
2841 container_of(napi
, struct ixgbe_q_vector
, napi
);
2842 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
2843 struct ixgbe_ring
*ring
;
2844 int per_ring_budget
, work_done
= 0;
2845 bool clean_complete
= true;
2847 #ifdef CONFIG_IXGBE_DCA
2848 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
)
2849 ixgbe_update_dca(q_vector
);
2852 ixgbe_for_each_ring(ring
, q_vector
->tx
) {
2853 if (!ixgbe_clean_tx_irq(q_vector
, ring
, budget
))
2854 clean_complete
= false;
2857 /* Exit if we are called by netpoll or busy polling is active */
2858 if ((budget
<= 0) || !ixgbe_qv_lock_napi(q_vector
))
2861 /* attempt to distribute budget to each queue fairly, but don't allow
2862 * the budget to go below 1 because we'll exit polling */
2863 if (q_vector
->rx
.count
> 1)
2864 per_ring_budget
= max(budget
/q_vector
->rx
.count
, 1);
2866 per_ring_budget
= budget
;
2868 ixgbe_for_each_ring(ring
, q_vector
->rx
) {
2869 int cleaned
= ixgbe_clean_rx_irq(q_vector
, ring
,
2872 work_done
+= cleaned
;
2873 if (cleaned
>= per_ring_budget
)
2874 clean_complete
= false;
2877 ixgbe_qv_unlock_napi(q_vector
);
2878 /* If all work not completed, return budget and keep polling */
2879 if (!clean_complete
)
2882 /* all work done, exit the polling mode */
2883 napi_complete_done(napi
, work_done
);
2884 if (adapter
->rx_itr_setting
& 1)
2885 ixgbe_set_itr(q_vector
);
2886 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2887 ixgbe_irq_enable_queues(adapter
, ((u64
)1 << q_vector
->v_idx
));
2893 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2894 * @adapter: board private structure
2896 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2897 * interrupts from the kernel.
2899 static int ixgbe_request_msix_irqs(struct ixgbe_adapter
*adapter
)
2901 struct net_device
*netdev
= adapter
->netdev
;
2905 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
2906 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
2907 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
2909 if (q_vector
->tx
.ring
&& q_vector
->rx
.ring
) {
2910 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2911 "%s-%s-%d", netdev
->name
, "TxRx", ri
++);
2913 } else if (q_vector
->rx
.ring
) {
2914 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2915 "%s-%s-%d", netdev
->name
, "rx", ri
++);
2916 } else if (q_vector
->tx
.ring
) {
2917 snprintf(q_vector
->name
, sizeof(q_vector
->name
) - 1,
2918 "%s-%s-%d", netdev
->name
, "tx", ti
++);
2920 /* skip this unused q_vector */
2923 err
= request_irq(entry
->vector
, &ixgbe_msix_clean_rings
, 0,
2924 q_vector
->name
, q_vector
);
2926 e_err(probe
, "request_irq failed for MSIX interrupt "
2927 "Error: %d\n", err
);
2928 goto free_queue_irqs
;
2930 /* If Flow Director is enabled, set interrupt affinity */
2931 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
2932 /* assign the mask for this irq */
2933 irq_set_affinity_hint(entry
->vector
,
2934 &q_vector
->affinity_mask
);
2938 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2939 ixgbe_msix_other
, 0, netdev
->name
, adapter
);
2941 e_err(probe
, "request_irq for msix_other failed: %d\n", err
);
2942 goto free_queue_irqs
;
2950 irq_set_affinity_hint(adapter
->msix_entries
[vector
].vector
,
2952 free_irq(adapter
->msix_entries
[vector
].vector
,
2953 adapter
->q_vector
[vector
]);
2955 adapter
->flags
&= ~IXGBE_FLAG_MSIX_ENABLED
;
2956 pci_disable_msix(adapter
->pdev
);
2957 kfree(adapter
->msix_entries
);
2958 adapter
->msix_entries
= NULL
;
2963 * ixgbe_intr - legacy mode Interrupt Handler
2964 * @irq: interrupt number
2965 * @data: pointer to a network interface device structure
2967 static irqreturn_t
ixgbe_intr(int irq
, void *data
)
2969 struct ixgbe_adapter
*adapter
= data
;
2970 struct ixgbe_hw
*hw
= &adapter
->hw
;
2971 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
2975 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2976 * before the read of EICR.
2978 IXGBE_WRITE_REG(hw
, IXGBE_EIMC
, IXGBE_IRQ_CLEAR_MASK
);
2980 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2981 * therefore no explicit interrupt disable is necessary */
2982 eicr
= IXGBE_READ_REG(hw
, IXGBE_EICR
);
2985 * shared interrupt alert!
2986 * make sure interrupts are enabled because the read will
2987 * have disabled interrupts due to EIAM
2988 * finish the workaround of silicon errata on 82598. Unmask
2989 * the interrupt that we masked before the EICR read.
2991 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
2992 ixgbe_irq_enable(adapter
, true, true);
2993 return IRQ_NONE
; /* Not our interrupt */
2996 if (eicr
& IXGBE_EICR_LSC
)
2997 ixgbe_check_lsc(adapter
);
2999 switch (hw
->mac
.type
) {
3000 case ixgbe_mac_82599EB
:
3001 ixgbe_check_sfp_event(adapter
, eicr
);
3003 case ixgbe_mac_X540
:
3004 case ixgbe_mac_X550
:
3005 case ixgbe_mac_X550EM_x
:
3006 case ixgbe_mac_x550em_a
:
3007 if (eicr
& IXGBE_EICR_ECC
) {
3008 e_info(link
, "Received ECC Err, initiating reset\n");
3009 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
3010 ixgbe_service_event_schedule(adapter
);
3011 IXGBE_WRITE_REG(hw
, IXGBE_EICR
, IXGBE_EICR_ECC
);
3013 ixgbe_check_overtemp_event(adapter
, eicr
);
3019 ixgbe_check_fan_failure(adapter
, eicr
);
3020 if (unlikely(eicr
& IXGBE_EICR_TIMESYNC
))
3021 ixgbe_ptp_check_pps_event(adapter
);
3023 /* would disable interrupts here but EIAM disabled it */
3024 napi_schedule_irqoff(&q_vector
->napi
);
3027 * re-enable link(maybe) and non-queue interrupts, no flush.
3028 * ixgbe_poll will re-enable the queue interrupts
3030 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
))
3031 ixgbe_irq_enable(adapter
, false, false);
3037 * ixgbe_request_irq - initialize interrupts
3038 * @adapter: board private structure
3040 * Attempts to configure interrupts using the best available
3041 * capabilities of the hardware and kernel.
3043 static int ixgbe_request_irq(struct ixgbe_adapter
*adapter
)
3045 struct net_device
*netdev
= adapter
->netdev
;
3048 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
3049 err
= ixgbe_request_msix_irqs(adapter
);
3050 else if (adapter
->flags
& IXGBE_FLAG_MSI_ENABLED
)
3051 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, 0,
3052 netdev
->name
, adapter
);
3054 err
= request_irq(adapter
->pdev
->irq
, ixgbe_intr
, IRQF_SHARED
,
3055 netdev
->name
, adapter
);
3058 e_err(probe
, "request_irq failed, Error %d\n", err
);
3063 static void ixgbe_free_irq(struct ixgbe_adapter
*adapter
)
3067 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
3068 free_irq(adapter
->pdev
->irq
, adapter
);
3072 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++) {
3073 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[vector
];
3074 struct msix_entry
*entry
= &adapter
->msix_entries
[vector
];
3076 /* free only the irqs that were actually requested */
3077 if (!q_vector
->rx
.ring
&& !q_vector
->tx
.ring
)
3080 /* clear the affinity_mask in the IRQ descriptor */
3081 irq_set_affinity_hint(entry
->vector
, NULL
);
3083 free_irq(entry
->vector
, q_vector
);
3086 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
3090 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
3091 * @adapter: board private structure
3093 static inline void ixgbe_irq_disable(struct ixgbe_adapter
*adapter
)
3095 switch (adapter
->hw
.mac
.type
) {
3096 case ixgbe_mac_82598EB
:
3097 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, ~0);
3099 case ixgbe_mac_82599EB
:
3100 case ixgbe_mac_X540
:
3101 case ixgbe_mac_X550
:
3102 case ixgbe_mac_X550EM_x
:
3103 case ixgbe_mac_x550em_a
:
3104 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC
, 0xFFFF0000);
3105 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(0), ~0);
3106 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EIMC_EX(1), ~0);
3111 IXGBE_WRITE_FLUSH(&adapter
->hw
);
3112 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
3115 for (vector
= 0; vector
< adapter
->num_q_vectors
; vector
++)
3116 synchronize_irq(adapter
->msix_entries
[vector
].vector
);
3118 synchronize_irq(adapter
->msix_entries
[vector
++].vector
);
3120 synchronize_irq(adapter
->pdev
->irq
);
3125 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3128 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter
*adapter
)
3130 struct ixgbe_q_vector
*q_vector
= adapter
->q_vector
[0];
3132 ixgbe_write_eitr(q_vector
);
3134 ixgbe_set_ivar(adapter
, 0, 0, 0);
3135 ixgbe_set_ivar(adapter
, 1, 0, 0);
3137 e_info(hw
, "Legacy interrupt IVAR setup done\n");
3141 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3142 * @adapter: board private structure
3143 * @ring: structure containing ring specific data
3145 * Configure the Tx descriptor ring after a reset.
3147 void ixgbe_configure_tx_ring(struct ixgbe_adapter
*adapter
,
3148 struct ixgbe_ring
*ring
)
3150 struct ixgbe_hw
*hw
= &adapter
->hw
;
3151 u64 tdba
= ring
->dma
;
3153 u32 txdctl
= IXGBE_TXDCTL_ENABLE
;
3154 u8 reg_idx
= ring
->reg_idx
;
3156 /* disable queue to avoid issues while updating state */
3157 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), 0);
3158 IXGBE_WRITE_FLUSH(hw
);
3160 IXGBE_WRITE_REG(hw
, IXGBE_TDBAL(reg_idx
),
3161 (tdba
& DMA_BIT_MASK(32)));
3162 IXGBE_WRITE_REG(hw
, IXGBE_TDBAH(reg_idx
), (tdba
>> 32));
3163 IXGBE_WRITE_REG(hw
, IXGBE_TDLEN(reg_idx
),
3164 ring
->count
* sizeof(union ixgbe_adv_tx_desc
));
3165 IXGBE_WRITE_REG(hw
, IXGBE_TDH(reg_idx
), 0);
3166 IXGBE_WRITE_REG(hw
, IXGBE_TDT(reg_idx
), 0);
3167 ring
->tail
= adapter
->io_addr
+ IXGBE_TDT(reg_idx
);
3170 * set WTHRESH to encourage burst writeback, it should not be set
3171 * higher than 1 when:
3172 * - ITR is 0 as it could cause false TX hangs
3173 * - ITR is set to > 100k int/sec and BQL is enabled
3175 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3176 * to or less than the number of on chip descriptors, which is
3179 if (!ring
->q_vector
|| (ring
->q_vector
->itr
< IXGBE_100K_ITR
))
3180 txdctl
|= (1 << 16); /* WTHRESH = 1 */
3182 txdctl
|= (8 << 16); /* WTHRESH = 8 */
3185 * Setting PTHRESH to 32 both improves performance
3186 * and avoids a TX hang with DFP enabled
3188 txdctl
|= (1 << 8) | /* HTHRESH = 1 */
3189 32; /* PTHRESH = 32 */
3191 /* reinitialize flowdirector state */
3192 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
3193 ring
->atr_sample_rate
= adapter
->atr_sample_rate
;
3194 ring
->atr_count
= 0;
3195 set_bit(__IXGBE_TX_FDIR_INIT_DONE
, &ring
->state
);
3197 ring
->atr_sample_rate
= 0;
3200 /* initialize XPS */
3201 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE
, &ring
->state
)) {
3202 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
3205 netif_set_xps_queue(ring
->netdev
,
3206 &q_vector
->affinity_mask
,
3210 clear_bit(__IXGBE_HANG_CHECK_ARMED
, &ring
->state
);
3213 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), txdctl
);
3215 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3216 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3217 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3220 /* poll to verify queue is enabled */
3222 usleep_range(1000, 2000);
3223 txdctl
= IXGBE_READ_REG(hw
, IXGBE_TXDCTL(reg_idx
));
3224 } while (--wait_loop
&& !(txdctl
& IXGBE_TXDCTL_ENABLE
));
3226 e_err(drv
, "Could not enable Tx Queue %d\n", reg_idx
);
3229 static void ixgbe_setup_mtqc(struct ixgbe_adapter
*adapter
)
3231 struct ixgbe_hw
*hw
= &adapter
->hw
;
3233 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3235 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3238 /* disable the arbiter while setting MTQC */
3239 rttdcs
= IXGBE_READ_REG(hw
, IXGBE_RTTDCS
);
3240 rttdcs
|= IXGBE_RTTDCS_ARBDIS
;
3241 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3243 /* set transmit pool layout */
3244 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3245 mtqc
= IXGBE_MTQC_VT_ENA
;
3247 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3249 mtqc
|= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3250 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3251 mtqc
|= IXGBE_MTQC_32VF
;
3253 mtqc
|= IXGBE_MTQC_64VF
;
3256 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_8TC_8TQ
;
3258 mtqc
= IXGBE_MTQC_RT_ENA
| IXGBE_MTQC_4TC_4TQ
;
3260 mtqc
= IXGBE_MTQC_64Q_1PB
;
3263 IXGBE_WRITE_REG(hw
, IXGBE_MTQC
, mtqc
);
3265 /* Enable Security TX Buffer IFG for multiple pb */
3267 u32 sectx
= IXGBE_READ_REG(hw
, IXGBE_SECTXMINIFG
);
3268 sectx
|= IXGBE_SECTX_DCB
;
3269 IXGBE_WRITE_REG(hw
, IXGBE_SECTXMINIFG
, sectx
);
3272 /* re-enable the arbiter */
3273 rttdcs
&= ~IXGBE_RTTDCS_ARBDIS
;
3274 IXGBE_WRITE_REG(hw
, IXGBE_RTTDCS
, rttdcs
);
3278 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3279 * @adapter: board private structure
3281 * Configure the Tx unit of the MAC after a reset.
3283 static void ixgbe_configure_tx(struct ixgbe_adapter
*adapter
)
3285 struct ixgbe_hw
*hw
= &adapter
->hw
;
3289 ixgbe_setup_mtqc(adapter
);
3291 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
3292 /* DMATXCTL.EN must be before Tx queues are enabled */
3293 dmatxctl
= IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
);
3294 dmatxctl
|= IXGBE_DMATXCTL_TE
;
3295 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
, dmatxctl
);
3298 /* Setup the HW Tx Head and Tail descriptor pointers */
3299 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3300 ixgbe_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3303 static void ixgbe_enable_rx_drop(struct ixgbe_adapter
*adapter
,
3304 struct ixgbe_ring
*ring
)
3306 struct ixgbe_hw
*hw
= &adapter
->hw
;
3307 u8 reg_idx
= ring
->reg_idx
;
3308 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3310 srrctl
|= IXGBE_SRRCTL_DROP_EN
;
3312 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3315 static void ixgbe_disable_rx_drop(struct ixgbe_adapter
*adapter
,
3316 struct ixgbe_ring
*ring
)
3318 struct ixgbe_hw
*hw
= &adapter
->hw
;
3319 u8 reg_idx
= ring
->reg_idx
;
3320 u32 srrctl
= IXGBE_READ_REG(hw
, IXGBE_SRRCTL(reg_idx
));
3322 srrctl
&= ~IXGBE_SRRCTL_DROP_EN
;
3324 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3327 #ifdef CONFIG_IXGBE_DCB
3328 void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3330 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter
*adapter
)
3334 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
3336 if (adapter
->ixgbe_ieee_pfc
)
3337 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
3340 * We should set the drop enable bit if:
3343 * Number of Rx queues > 1 and flow control is disabled
3345 * This allows us to avoid head of line blocking for security
3346 * and performance reasons.
3348 if (adapter
->num_vfs
|| (adapter
->num_rx_queues
> 1 &&
3349 !(adapter
->hw
.fc
.current_mode
& ixgbe_fc_tx_pause
) && !pfc_en
)) {
3350 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3351 ixgbe_enable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3353 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3354 ixgbe_disable_rx_drop(adapter
, adapter
->rx_ring
[i
]);
3358 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3360 static void ixgbe_configure_srrctl(struct ixgbe_adapter
*adapter
,
3361 struct ixgbe_ring
*rx_ring
)
3363 struct ixgbe_hw
*hw
= &adapter
->hw
;
3365 u8 reg_idx
= rx_ring
->reg_idx
;
3367 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3368 u16 mask
= adapter
->ring_feature
[RING_F_RSS
].mask
;
3371 * if VMDq is not active we must program one srrctl register
3372 * per RSS queue since we have enabled RDRXCTL.MVMEN
3377 /* configure header buffer length, needed for RSC */
3378 srrctl
= IXGBE_RX_HDR_SIZE
<< IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3380 /* configure the packet buffer length */
3381 srrctl
|= ixgbe_rx_bufsz(rx_ring
) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT
;
3383 /* configure descriptor type */
3384 srrctl
|= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3386 IXGBE_WRITE_REG(hw
, IXGBE_SRRCTL(reg_idx
), srrctl
);
3390 * ixgbe_rss_indir_tbl_entries - Return RSS indirection table entries
3391 * @adapter: device handle
3393 * - 82598/82599/X540: 128
3394 * - X550(non-SRIOV mode): 512
3395 * - X550(SRIOV mode): 64
3397 u32
ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter
*adapter
)
3399 if (adapter
->hw
.mac
.type
< ixgbe_mac_X550
)
3401 else if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
3408 * ixgbe_store_reta - Write the RETA table to HW
3409 * @adapter: device handle
3411 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3413 void ixgbe_store_reta(struct ixgbe_adapter
*adapter
)
3415 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3416 struct ixgbe_hw
*hw
= &adapter
->hw
;
3419 u8
*indir_tbl
= adapter
->rss_indir_tbl
;
3421 /* Fill out the redirection table as follows:
3422 * - 82598: 8 bit wide entries containing pair of 4 bit RSS
3424 * - 82599/X540: 8 bit wide entries containing 4 bit RSS index
3425 * - X550: 8 bit wide entries containing 6 bit RSS index
3427 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
3428 indices_multi
= 0x11;
3430 indices_multi
= 0x1;
3432 /* Write redirection table to HW */
3433 for (i
= 0; i
< reta_entries
; i
++) {
3434 reta
|= indices_multi
* indir_tbl
[i
] << (i
& 0x3) * 8;
3437 IXGBE_WRITE_REG(hw
, IXGBE_RETA(i
>> 2), reta
);
3439 IXGBE_WRITE_REG(hw
, IXGBE_ERETA((i
>> 2) - 32),
3447 * ixgbe_store_vfreta - Write the RETA table to HW (x550 devices in SRIOV mode)
3448 * @adapter: device handle
3450 * Write the RSS redirection table stored in adapter.rss_indir_tbl[] to HW.
3452 static void ixgbe_store_vfreta(struct ixgbe_adapter
*adapter
)
3454 u32 i
, reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3455 struct ixgbe_hw
*hw
= &adapter
->hw
;
3457 unsigned int pf_pool
= adapter
->num_vfs
;
3459 /* Write redirection table to HW */
3460 for (i
= 0; i
< reta_entries
; i
++) {
3461 vfreta
|= (u32
)adapter
->rss_indir_tbl
[i
] << (i
& 0x3) * 8;
3463 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRETA(i
>> 2, pf_pool
),
3470 static void ixgbe_setup_reta(struct ixgbe_adapter
*adapter
)
3472 struct ixgbe_hw
*hw
= &adapter
->hw
;
3474 u32 reta_entries
= ixgbe_rss_indir_tbl_entries(adapter
);
3475 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3477 /* Program table for at least 2 queues w/ SR-IOV so that VFs can
3478 * make full use of any rings they may have. We will use the
3479 * PSRTYPE register to control how many rings we use within the PF.
3481 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) && (rss_i
< 2))
3484 /* Fill out hash function seeds */
3485 for (i
= 0; i
< 10; i
++)
3486 IXGBE_WRITE_REG(hw
, IXGBE_RSSRK(i
), adapter
->rss_key
[i
]);
3488 /* Fill out redirection table */
3489 memset(adapter
->rss_indir_tbl
, 0, sizeof(adapter
->rss_indir_tbl
));
3491 for (i
= 0, j
= 0; i
< reta_entries
; i
++, j
++) {
3495 adapter
->rss_indir_tbl
[i
] = j
;
3498 ixgbe_store_reta(adapter
);
3501 static void ixgbe_setup_vfreta(struct ixgbe_adapter
*adapter
)
3503 struct ixgbe_hw
*hw
= &adapter
->hw
;
3504 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3505 unsigned int pf_pool
= adapter
->num_vfs
;
3508 /* Fill out hash function seeds */
3509 for (i
= 0; i
< 10; i
++)
3510 IXGBE_WRITE_REG(hw
, IXGBE_PFVFRSSRK(i
, pf_pool
),
3511 adapter
->rss_key
[i
]);
3513 /* Fill out the redirection table */
3514 for (i
= 0, j
= 0; i
< 64; i
++, j
++) {
3518 adapter
->rss_indir_tbl
[i
] = j
;
3521 ixgbe_store_vfreta(adapter
);
3524 static void ixgbe_setup_mrqc(struct ixgbe_adapter
*adapter
)
3526 struct ixgbe_hw
*hw
= &adapter
->hw
;
3527 u32 mrqc
= 0, rss_field
= 0, vfmrqc
= 0;
3530 /* Disable indicating checksum in descriptor, enables RSS hash */
3531 rxcsum
= IXGBE_READ_REG(hw
, IXGBE_RXCSUM
);
3532 rxcsum
|= IXGBE_RXCSUM_PCSD
;
3533 IXGBE_WRITE_REG(hw
, IXGBE_RXCSUM
, rxcsum
);
3535 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
3536 if (adapter
->ring_feature
[RING_F_RSS
].mask
)
3537 mrqc
= IXGBE_MRQC_RSSEN
;
3539 u8 tcs
= netdev_get_num_tc(adapter
->netdev
);
3541 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
3543 mrqc
= IXGBE_MRQC_VMDQRT8TCEN
; /* 8 TCs */
3545 mrqc
= IXGBE_MRQC_VMDQRT4TCEN
; /* 4 TCs */
3546 else if (adapter
->ring_feature
[RING_F_RSS
].indices
== 4)
3547 mrqc
= IXGBE_MRQC_VMDQRSS32EN
;
3549 mrqc
= IXGBE_MRQC_VMDQRSS64EN
;
3552 mrqc
= IXGBE_MRQC_RTRSS8TCEN
;
3554 mrqc
= IXGBE_MRQC_RTRSS4TCEN
;
3556 mrqc
= IXGBE_MRQC_RSSEN
;
3560 /* Perform hash on these packet types */
3561 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4
|
3562 IXGBE_MRQC_RSS_FIELD_IPV4_TCP
|
3563 IXGBE_MRQC_RSS_FIELD_IPV6
|
3564 IXGBE_MRQC_RSS_FIELD_IPV6_TCP
;
3566 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV4_UDP
)
3567 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV4_UDP
;
3568 if (adapter
->flags2
& IXGBE_FLAG2_RSS_FIELD_IPV6_UDP
)
3569 rss_field
|= IXGBE_MRQC_RSS_FIELD_IPV6_UDP
;
3571 netdev_rss_key_fill(adapter
->rss_key
, sizeof(adapter
->rss_key
));
3572 if ((hw
->mac
.type
>= ixgbe_mac_X550
) &&
3573 (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)) {
3574 unsigned int pf_pool
= adapter
->num_vfs
;
3576 /* Enable VF RSS mode */
3577 mrqc
|= IXGBE_MRQC_MULTIPLE_RSS
;
3578 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3580 /* Setup RSS through the VF registers */
3581 ixgbe_setup_vfreta(adapter
);
3582 vfmrqc
= IXGBE_MRQC_RSSEN
;
3583 vfmrqc
|= rss_field
;
3584 IXGBE_WRITE_REG(hw
, IXGBE_PFVFMRQC(pf_pool
), vfmrqc
);
3586 ixgbe_setup_reta(adapter
);
3588 IXGBE_WRITE_REG(hw
, IXGBE_MRQC
, mrqc
);
3593 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3594 * @adapter: address of board private structure
3595 * @index: index of ring to set
3597 static void ixgbe_configure_rscctl(struct ixgbe_adapter
*adapter
,
3598 struct ixgbe_ring
*ring
)
3600 struct ixgbe_hw
*hw
= &adapter
->hw
;
3602 u8 reg_idx
= ring
->reg_idx
;
3604 if (!ring_is_rsc_enabled(ring
))
3607 rscctrl
= IXGBE_READ_REG(hw
, IXGBE_RSCCTL(reg_idx
));
3608 rscctrl
|= IXGBE_RSCCTL_RSCEN
;
3610 * we must limit the number of descriptors so that the
3611 * total size of max desc * buf_len is not greater
3614 rscctrl
|= IXGBE_RSCCTL_MAXDESC_16
;
3615 IXGBE_WRITE_REG(hw
, IXGBE_RSCCTL(reg_idx
), rscctrl
);
3618 #define IXGBE_MAX_RX_DESC_POLL 10
3619 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter
*adapter
,
3620 struct ixgbe_ring
*ring
)
3622 struct ixgbe_hw
*hw
= &adapter
->hw
;
3623 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3625 u8 reg_idx
= ring
->reg_idx
;
3627 if (ixgbe_removed(hw
->hw_addr
))
3629 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3630 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3631 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3635 usleep_range(1000, 2000);
3636 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3637 } while (--wait_loop
&& !(rxdctl
& IXGBE_RXDCTL_ENABLE
));
3640 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not set within "
3641 "the polling period\n", reg_idx
);
3645 void ixgbe_disable_rx_queue(struct ixgbe_adapter
*adapter
,
3646 struct ixgbe_ring
*ring
)
3648 struct ixgbe_hw
*hw
= &adapter
->hw
;
3649 int wait_loop
= IXGBE_MAX_RX_DESC_POLL
;
3651 u8 reg_idx
= ring
->reg_idx
;
3653 if (ixgbe_removed(hw
->hw_addr
))
3655 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3656 rxdctl
&= ~IXGBE_RXDCTL_ENABLE
;
3658 /* write value back with RXDCTL.ENABLE bit cleared */
3659 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3661 if (hw
->mac
.type
== ixgbe_mac_82598EB
&&
3662 !(IXGBE_READ_REG(hw
, IXGBE_LINKS
) & IXGBE_LINKS_UP
))
3665 /* the hardware may take up to 100us to really disable the rx queue */
3668 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3669 } while (--wait_loop
&& (rxdctl
& IXGBE_RXDCTL_ENABLE
));
3672 e_err(drv
, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3673 "the polling period\n", reg_idx
);
3677 void ixgbe_configure_rx_ring(struct ixgbe_adapter
*adapter
,
3678 struct ixgbe_ring
*ring
)
3680 struct ixgbe_hw
*hw
= &adapter
->hw
;
3681 u64 rdba
= ring
->dma
;
3683 u8 reg_idx
= ring
->reg_idx
;
3685 /* disable queue to avoid issues while updating state */
3686 rxdctl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(reg_idx
));
3687 ixgbe_disable_rx_queue(adapter
, ring
);
3689 IXGBE_WRITE_REG(hw
, IXGBE_RDBAL(reg_idx
), (rdba
& DMA_BIT_MASK(32)));
3690 IXGBE_WRITE_REG(hw
, IXGBE_RDBAH(reg_idx
), (rdba
>> 32));
3691 IXGBE_WRITE_REG(hw
, IXGBE_RDLEN(reg_idx
),
3692 ring
->count
* sizeof(union ixgbe_adv_rx_desc
));
3693 /* Force flushing of IXGBE_RDLEN to prevent MDD */
3694 IXGBE_WRITE_FLUSH(hw
);
3696 IXGBE_WRITE_REG(hw
, IXGBE_RDH(reg_idx
), 0);
3697 IXGBE_WRITE_REG(hw
, IXGBE_RDT(reg_idx
), 0);
3698 ring
->tail
= adapter
->io_addr
+ IXGBE_RDT(reg_idx
);
3700 ixgbe_configure_srrctl(adapter
, ring
);
3701 ixgbe_configure_rscctl(adapter
, ring
);
3703 if (hw
->mac
.type
== ixgbe_mac_82598EB
) {
3705 * enable cache line friendly hardware writes:
3706 * PTHRESH=32 descriptors (half the internal cache),
3707 * this also removes ugly rx_no_buffer_count increment
3708 * HTHRESH=4 descriptors (to minimize latency on fetch)
3709 * WTHRESH=8 burst writeback up to two cache lines
3711 rxdctl
&= ~0x3FFFFF;
3715 /* enable receive descriptor ring */
3716 rxdctl
|= IXGBE_RXDCTL_ENABLE
;
3717 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(reg_idx
), rxdctl
);
3719 ixgbe_rx_desc_queue_enable(adapter
, ring
);
3720 ixgbe_alloc_rx_buffers(ring
, ixgbe_desc_unused(ring
));
3723 static void ixgbe_setup_psrtype(struct ixgbe_adapter
*adapter
)
3725 struct ixgbe_hw
*hw
= &adapter
->hw
;
3726 int rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
;
3729 /* PSRTYPE must be initialized in non 82598 adapters */
3730 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
3731 IXGBE_PSRTYPE_UDPHDR
|
3732 IXGBE_PSRTYPE_IPV4HDR
|
3733 IXGBE_PSRTYPE_L2HDR
|
3734 IXGBE_PSRTYPE_IPV6HDR
;
3736 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3744 for_each_set_bit(pool
, &adapter
->fwd_bitmask
, 32)
3745 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
3748 static void ixgbe_configure_virtualization(struct ixgbe_adapter
*adapter
)
3750 struct ixgbe_hw
*hw
= &adapter
->hw
;
3751 u32 reg_offset
, vf_shift
;
3752 u32 gcr_ext
, vmdctl
;
3755 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
3758 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VT_CTL
);
3759 vmdctl
|= IXGBE_VMD_CTL_VMDQ_EN
;
3760 vmdctl
&= ~IXGBE_VT_CTL_POOL_MASK
;
3761 vmdctl
|= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT
;
3762 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
3763 IXGBE_WRITE_REG(hw
, IXGBE_VT_CTL
, vmdctl
);
3765 vf_shift
= VMDQ_P(0) % 32;
3766 reg_offset
= (VMDQ_P(0) >= 32) ? 1 : 0;
3768 /* Enable only the PF's pool for Tx/Rx */
3769 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
), (~0) << vf_shift
);
3770 IXGBE_WRITE_REG(hw
, IXGBE_VFRE(reg_offset
^ 1), reg_offset
- 1);
3771 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
), (~0) << vf_shift
);
3772 IXGBE_WRITE_REG(hw
, IXGBE_VFTE(reg_offset
^ 1), reg_offset
- 1);
3773 if (adapter
->bridge_mode
== BRIDGE_MODE_VEB
)
3774 IXGBE_WRITE_REG(hw
, IXGBE_PFDTXGSWC
, IXGBE_PFDTXGSWC_VT_LBEN
);
3776 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3777 hw
->mac
.ops
.set_vmdq(hw
, 0, VMDQ_P(0));
3779 /* clear VLAN promisc flag so VFTA will be updated if necessary */
3780 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
3783 * Set up VF register offsets for selected VT Mode,
3784 * i.e. 32 or 64 VFs for SR-IOV
3786 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
3787 case IXGBE_82599_VMDQ_8Q_MASK
:
3788 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_16
;
3790 case IXGBE_82599_VMDQ_4Q_MASK
:
3791 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_32
;
3794 gcr_ext
= IXGBE_GCR_EXT_VT_MODE_64
;
3798 IXGBE_WRITE_REG(hw
, IXGBE_GCR_EXT
, gcr_ext
);
3800 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
3801 /* configure spoof checking */
3802 ixgbe_ndo_set_vf_spoofchk(adapter
->netdev
, i
,
3803 adapter
->vfinfo
[i
].spoofchk_enabled
);
3805 /* Enable/Disable RSS query feature */
3806 ixgbe_ndo_set_vf_rss_query_en(adapter
->netdev
, i
,
3807 adapter
->vfinfo
[i
].rss_query_enabled
);
3811 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter
*adapter
)
3813 struct ixgbe_hw
*hw
= &adapter
->hw
;
3814 struct net_device
*netdev
= adapter
->netdev
;
3815 int max_frame
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
3816 struct ixgbe_ring
*rx_ring
;
3821 /* adjust max frame to be able to do baby jumbo for FCoE */
3822 if ((adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
) &&
3823 (max_frame
< IXGBE_FCOE_JUMBO_FRAME_SIZE
))
3824 max_frame
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
3826 #endif /* IXGBE_FCOE */
3828 /* adjust max frame to be at least the size of a standard frame */
3829 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
3830 max_frame
= (ETH_FRAME_LEN
+ ETH_FCS_LEN
);
3832 mhadd
= IXGBE_READ_REG(hw
, IXGBE_MHADD
);
3833 if (max_frame
!= (mhadd
>> IXGBE_MHADD_MFS_SHIFT
)) {
3834 mhadd
&= ~IXGBE_MHADD_MFS_MASK
;
3835 mhadd
|= max_frame
<< IXGBE_MHADD_MFS_SHIFT
;
3837 IXGBE_WRITE_REG(hw
, IXGBE_MHADD
, mhadd
);
3840 hlreg0
= IXGBE_READ_REG(hw
, IXGBE_HLREG0
);
3841 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3842 hlreg0
|= IXGBE_HLREG0_JUMBOEN
;
3843 IXGBE_WRITE_REG(hw
, IXGBE_HLREG0
, hlreg0
);
3846 * Setup the HW Rx Head and Tail Descriptor Pointers and
3847 * the Base and Length of the Rx Descriptor Ring
3849 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3850 rx_ring
= adapter
->rx_ring
[i
];
3851 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
3852 set_ring_rsc_enabled(rx_ring
);
3854 clear_ring_rsc_enabled(rx_ring
);
3858 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter
*adapter
)
3860 struct ixgbe_hw
*hw
= &adapter
->hw
;
3861 u32 rdrxctl
= IXGBE_READ_REG(hw
, IXGBE_RDRXCTL
);
3863 switch (hw
->mac
.type
) {
3864 case ixgbe_mac_82598EB
:
3866 * For VMDq support of different descriptor types or
3867 * buffer sizes through the use of multiple SRRCTL
3868 * registers, RDRXCTL.MVMEN must be set to 1
3870 * also, the manual doesn't mention it clearly but DCA hints
3871 * will only use queue 0's tags unless this bit is set. Side
3872 * effects of setting this bit are only that SRRCTL must be
3873 * fully programmed [0..15]
3875 rdrxctl
|= IXGBE_RDRXCTL_MVMEN
;
3877 case ixgbe_mac_X550
:
3878 case ixgbe_mac_X550EM_x
:
3879 case ixgbe_mac_x550em_a
:
3880 if (adapter
->num_vfs
)
3881 rdrxctl
|= IXGBE_RDRXCTL_PSP
;
3882 /* fall through for older HW */
3883 case ixgbe_mac_82599EB
:
3884 case ixgbe_mac_X540
:
3885 /* Disable RSC for ACK packets */
3886 IXGBE_WRITE_REG(hw
, IXGBE_RSCDBU
,
3887 (IXGBE_RSCDBU_RSCACKDIS
| IXGBE_READ_REG(hw
, IXGBE_RSCDBU
)));
3888 rdrxctl
&= ~IXGBE_RDRXCTL_RSCFRSTSIZE
;
3889 /* hardware requires some bits to be set by default */
3890 rdrxctl
|= (IXGBE_RDRXCTL_RSCACKC
| IXGBE_RDRXCTL_FCOE_WRFIX
);
3891 rdrxctl
|= IXGBE_RDRXCTL_CRCSTRIP
;
3894 /* We should do nothing since we don't know this hardware */
3898 IXGBE_WRITE_REG(hw
, IXGBE_RDRXCTL
, rdrxctl
);
3902 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3903 * @adapter: board private structure
3905 * Configure the Rx unit of the MAC after a reset.
3907 static void ixgbe_configure_rx(struct ixgbe_adapter
*adapter
)
3909 struct ixgbe_hw
*hw
= &adapter
->hw
;
3913 /* disable receives while setting up the descriptors */
3914 hw
->mac
.ops
.disable_rx(hw
);
3916 ixgbe_setup_psrtype(adapter
);
3917 ixgbe_setup_rdrxctl(adapter
);
3920 rfctl
= IXGBE_READ_REG(hw
, IXGBE_RFCTL
);
3921 rfctl
&= ~IXGBE_RFCTL_RSC_DIS
;
3922 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
))
3923 rfctl
|= IXGBE_RFCTL_RSC_DIS
;
3924 IXGBE_WRITE_REG(hw
, IXGBE_RFCTL
, rfctl
);
3926 /* Program registers for the distribution of queues */
3927 ixgbe_setup_mrqc(adapter
);
3929 /* set_rx_buffer_len must be called before ring initialization */
3930 ixgbe_set_rx_buffer_len(adapter
);
3933 * Setup the HW Rx Head and Tail Descriptor Pointers and
3934 * the Base and Length of the Rx Descriptor Ring
3936 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
3937 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[i
]);
3939 rxctrl
= IXGBE_READ_REG(hw
, IXGBE_RXCTRL
);
3940 /* disable drop enable for 82598 parts */
3941 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
3942 rxctrl
|= IXGBE_RXCTRL_DMBYPS
;
3944 /* enable all receives */
3945 rxctrl
|= IXGBE_RXCTRL_RXEN
;
3946 hw
->mac
.ops
.enable_rx_dma(hw
, rxctrl
);
3949 static int ixgbe_vlan_rx_add_vid(struct net_device
*netdev
,
3950 __be16 proto
, u16 vid
)
3952 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
3953 struct ixgbe_hw
*hw
= &adapter
->hw
;
3955 /* add VID to filter table */
3956 if (!vid
|| !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
3957 hw
->mac
.ops
.set_vfta(&adapter
->hw
, vid
, VMDQ_P(0), true, !!vid
);
3959 set_bit(vid
, adapter
->active_vlans
);
3964 static int ixgbe_find_vlvf_entry(struct ixgbe_hw
*hw
, u32 vlan
)
3969 /* short cut the special case */
3973 /* Search for the vlan id in the VLVF entries */
3974 for (idx
= IXGBE_VLVF_ENTRIES
; --idx
;) {
3975 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(idx
));
3976 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
3983 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter
*adapter
, u32 vid
)
3985 struct ixgbe_hw
*hw
= &adapter
->hw
;
3989 idx
= ixgbe_find_vlvf_entry(hw
, vid
);
3993 /* See if any other pools are set for this VLAN filter
3994 * entry other than the PF.
3996 word
= idx
* 2 + (VMDQ_P(0) / 32);
3997 bits
= ~(1 << (VMDQ_P(0)) % 32);
3998 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4000 /* Disable the filter so this falls into the default pool. */
4001 if (!bits
&& !IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
^ 1))) {
4002 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4003 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), 0);
4004 IXGBE_WRITE_REG(hw
, IXGBE_VLVF(idx
), 0);
4008 static int ixgbe_vlan_rx_kill_vid(struct net_device
*netdev
,
4009 __be16 proto
, u16 vid
)
4011 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4012 struct ixgbe_hw
*hw
= &adapter
->hw
;
4014 /* remove VID from filter table */
4015 if (vid
&& !(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4016 hw
->mac
.ops
.set_vfta(hw
, vid
, VMDQ_P(0), false, true);
4018 clear_bit(vid
, adapter
->active_vlans
);
4024 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
4025 * @adapter: driver data
4027 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter
*adapter
)
4029 struct ixgbe_hw
*hw
= &adapter
->hw
;
4033 switch (hw
->mac
.type
) {
4034 case ixgbe_mac_82598EB
:
4035 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4036 vlnctrl
&= ~IXGBE_VLNCTRL_VME
;
4037 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4039 case ixgbe_mac_82599EB
:
4040 case ixgbe_mac_X540
:
4041 case ixgbe_mac_X550
:
4042 case ixgbe_mac_X550EM_x
:
4043 case ixgbe_mac_x550em_a
:
4044 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4045 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4047 if (ring
->l2_accel_priv
)
4050 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4051 vlnctrl
&= ~IXGBE_RXDCTL_VME
;
4052 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4061 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
4062 * @adapter: driver data
4064 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter
*adapter
)
4066 struct ixgbe_hw
*hw
= &adapter
->hw
;
4070 switch (hw
->mac
.type
) {
4071 case ixgbe_mac_82598EB
:
4072 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4073 vlnctrl
|= IXGBE_VLNCTRL_VME
;
4074 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4076 case ixgbe_mac_82599EB
:
4077 case ixgbe_mac_X540
:
4078 case ixgbe_mac_X550
:
4079 case ixgbe_mac_X550EM_x
:
4080 case ixgbe_mac_x550em_a
:
4081 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
4082 struct ixgbe_ring
*ring
= adapter
->rx_ring
[i
];
4084 if (ring
->l2_accel_priv
)
4087 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_RXDCTL(j
));
4088 vlnctrl
|= IXGBE_RXDCTL_VME
;
4089 IXGBE_WRITE_REG(hw
, IXGBE_RXDCTL(j
), vlnctrl
);
4097 static void ixgbe_vlan_promisc_enable(struct ixgbe_adapter
*adapter
)
4099 struct ixgbe_hw
*hw
= &adapter
->hw
;
4102 switch (hw
->mac
.type
) {
4103 case ixgbe_mac_82599EB
:
4104 case ixgbe_mac_X540
:
4105 case ixgbe_mac_X550
:
4106 case ixgbe_mac_X550EM_x
:
4107 case ixgbe_mac_x550em_a
:
4109 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4112 case ixgbe_mac_82598EB
:
4113 /* legacy case, we can just disable VLAN filtering */
4114 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4115 vlnctrl
&= ~(IXGBE_VLNCTRL_VFE
| IXGBE_VLNCTRL_CFIEN
);
4116 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4120 /* We are already in VLAN promisc, nothing to do */
4121 if (adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
)
4124 /* Set flag so we don't redo unnecessary work */
4125 adapter
->flags2
|= IXGBE_FLAG2_VLAN_PROMISC
;
4127 /* Add PF to all active pools */
4128 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4129 u32 reg_offset
= IXGBE_VLVFB(i
* 2 + VMDQ_P(0) / 32);
4130 u32 vlvfb
= IXGBE_READ_REG(hw
, reg_offset
);
4132 vlvfb
|= 1 << (VMDQ_P(0) % 32);
4133 IXGBE_WRITE_REG(hw
, reg_offset
, vlvfb
);
4136 /* Set all bits in the VLAN filter table array */
4137 for (i
= hw
->mac
.vft_size
; i
--;)
4138 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(i
), ~0U);
4141 #define VFTA_BLOCK_SIZE 8
4142 static void ixgbe_scrub_vfta(struct ixgbe_adapter
*adapter
, u32 vfta_offset
)
4144 struct ixgbe_hw
*hw
= &adapter
->hw
;
4145 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4146 u32 vid_start
= vfta_offset
* 32;
4147 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4148 u32 i
, vid
, word
, bits
;
4150 for (i
= IXGBE_VLVF_ENTRIES
; --i
;) {
4151 u32 vlvf
= IXGBE_READ_REG(hw
, IXGBE_VLVF(i
));
4153 /* pull VLAN ID from VLVF */
4154 vid
= vlvf
& VLAN_VID_MASK
;
4156 /* only concern outselves with a certain range */
4157 if (vid
< vid_start
|| vid
>= vid_end
)
4161 /* record VLAN ID in VFTA */
4162 vfta
[(vid
- vid_start
) / 32] |= 1 << (vid
% 32);
4164 /* if PF is part of this then continue */
4165 if (test_bit(vid
, adapter
->active_vlans
))
4169 /* remove PF from the pool */
4170 word
= i
* 2 + VMDQ_P(0) / 32;
4171 bits
= ~(1 << (VMDQ_P(0) % 32));
4172 bits
&= IXGBE_READ_REG(hw
, IXGBE_VLVFB(word
));
4173 IXGBE_WRITE_REG(hw
, IXGBE_VLVFB(word
), bits
);
4176 /* extract values from active_vlans and write back to VFTA */
4177 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4178 vid
= (vfta_offset
+ i
) * 32;
4179 word
= vid
/ BITS_PER_LONG
;
4180 bits
= vid
% BITS_PER_LONG
;
4182 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4184 IXGBE_WRITE_REG(hw
, IXGBE_VFTA(vfta_offset
+ i
), vfta
[i
]);
4188 static void ixgbe_vlan_promisc_disable(struct ixgbe_adapter
*adapter
)
4190 struct ixgbe_hw
*hw
= &adapter
->hw
;
4193 switch (hw
->mac
.type
) {
4194 case ixgbe_mac_82599EB
:
4195 case ixgbe_mac_X540
:
4196 case ixgbe_mac_X550
:
4197 case ixgbe_mac_X550EM_x
:
4198 case ixgbe_mac_x550em_a
:
4200 if (adapter
->flags
& IXGBE_FLAG_VMDQ_ENABLED
)
4203 case ixgbe_mac_82598EB
:
4204 vlnctrl
= IXGBE_READ_REG(hw
, IXGBE_VLNCTRL
);
4205 vlnctrl
&= ~IXGBE_VLNCTRL_CFIEN
;
4206 vlnctrl
|= IXGBE_VLNCTRL_VFE
;
4207 IXGBE_WRITE_REG(hw
, IXGBE_VLNCTRL
, vlnctrl
);
4211 /* We are not in VLAN promisc, nothing to do */
4212 if (!(adapter
->flags2
& IXGBE_FLAG2_VLAN_PROMISC
))
4215 /* Set flag so we don't redo unnecessary work */
4216 adapter
->flags2
&= ~IXGBE_FLAG2_VLAN_PROMISC
;
4218 for (i
= 0; i
< hw
->mac
.vft_size
; i
+= VFTA_BLOCK_SIZE
)
4219 ixgbe_scrub_vfta(adapter
, i
);
4222 static void ixgbe_restore_vlan(struct ixgbe_adapter
*adapter
)
4226 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
4228 for_each_set_bit_from(vid
, adapter
->active_vlans
, VLAN_N_VID
)
4229 ixgbe_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
4233 * ixgbe_write_mc_addr_list - write multicast addresses to MTA
4234 * @netdev: network interface device structure
4236 * Writes multicast address list to the MTA hash table.
4237 * Returns: -ENOMEM on failure
4238 * 0 on no addresses written
4239 * X on writing X addresses to MTA
4241 static int ixgbe_write_mc_addr_list(struct net_device
*netdev
)
4243 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4244 struct ixgbe_hw
*hw
= &adapter
->hw
;
4246 if (!netif_running(netdev
))
4249 if (hw
->mac
.ops
.update_mc_addr_list
)
4250 hw
->mac
.ops
.update_mc_addr_list(hw
, netdev
);
4254 #ifdef CONFIG_PCI_IOV
4255 ixgbe_restore_vf_multicasts(adapter
);
4258 return netdev_mc_count(netdev
);
4261 #ifdef CONFIG_PCI_IOV
4262 void ixgbe_full_sync_mac_table(struct ixgbe_adapter
*adapter
)
4264 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4265 struct ixgbe_hw
*hw
= &adapter
->hw
;
4268 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4269 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4271 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4272 hw
->mac
.ops
.set_rar(hw
, i
,
4277 hw
->mac
.ops
.clear_rar(hw
, i
);
4282 static void ixgbe_sync_mac_table(struct ixgbe_adapter
*adapter
)
4284 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4285 struct ixgbe_hw
*hw
= &adapter
->hw
;
4288 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4289 if (!(mac_table
->state
& IXGBE_MAC_STATE_MODIFIED
))
4292 mac_table
->state
&= ~IXGBE_MAC_STATE_MODIFIED
;
4294 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4295 hw
->mac
.ops
.set_rar(hw
, i
,
4300 hw
->mac
.ops
.clear_rar(hw
, i
);
4304 static void ixgbe_flush_sw_mac_table(struct ixgbe_adapter
*adapter
)
4306 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4307 struct ixgbe_hw
*hw
= &adapter
->hw
;
4310 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4311 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4312 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4315 ixgbe_sync_mac_table(adapter
);
4318 static int ixgbe_available_rars(struct ixgbe_adapter
*adapter
, u16 pool
)
4320 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4321 struct ixgbe_hw
*hw
= &adapter
->hw
;
4324 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4325 /* do not count default RAR as available */
4326 if (mac_table
->state
& IXGBE_MAC_STATE_DEFAULT
)
4329 /* only count unused and addresses that belong to us */
4330 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
) {
4331 if (mac_table
->pool
!= pool
)
4341 /* this function destroys the first RAR entry */
4342 static void ixgbe_mac_set_default_filter(struct ixgbe_adapter
*adapter
)
4344 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4345 struct ixgbe_hw
*hw
= &adapter
->hw
;
4347 memcpy(&mac_table
->addr
, hw
->mac
.addr
, ETH_ALEN
);
4348 mac_table
->pool
= VMDQ_P(0);
4350 mac_table
->state
= IXGBE_MAC_STATE_DEFAULT
| IXGBE_MAC_STATE_IN_USE
;
4352 hw
->mac
.ops
.set_rar(hw
, 0, mac_table
->addr
, mac_table
->pool
,
4356 int ixgbe_add_mac_filter(struct ixgbe_adapter
*adapter
,
4357 const u8
*addr
, u16 pool
)
4359 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4360 struct ixgbe_hw
*hw
= &adapter
->hw
;
4363 if (is_zero_ether_addr(addr
))
4366 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4367 if (mac_table
->state
& IXGBE_MAC_STATE_IN_USE
)
4370 ether_addr_copy(mac_table
->addr
, addr
);
4371 mac_table
->pool
= pool
;
4373 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
|
4374 IXGBE_MAC_STATE_IN_USE
;
4376 ixgbe_sync_mac_table(adapter
);
4384 int ixgbe_del_mac_filter(struct ixgbe_adapter
*adapter
,
4385 const u8
*addr
, u16 pool
)
4387 struct ixgbe_mac_addr
*mac_table
= &adapter
->mac_table
[0];
4388 struct ixgbe_hw
*hw
= &adapter
->hw
;
4391 if (is_zero_ether_addr(addr
))
4394 /* search table for addr, if found clear IN_USE flag and sync */
4395 for (i
= 0; i
< hw
->mac
.num_rar_entries
; i
++, mac_table
++) {
4396 /* we can only delete an entry if it is in use */
4397 if (!(mac_table
->state
& IXGBE_MAC_STATE_IN_USE
))
4399 /* we only care about entries that belong to the given pool */
4400 if (mac_table
->pool
!= pool
)
4402 /* we only care about a specific MAC address */
4403 if (!ether_addr_equal(addr
, mac_table
->addr
))
4406 mac_table
->state
|= IXGBE_MAC_STATE_MODIFIED
;
4407 mac_table
->state
&= ~IXGBE_MAC_STATE_IN_USE
;
4409 ixgbe_sync_mac_table(adapter
);
4417 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
4418 * @netdev: network interface device structure
4420 * Writes unicast address list to the RAR table.
4421 * Returns: -ENOMEM on failure/insufficient address space
4422 * 0 on no addresses written
4423 * X on writing X addresses to the RAR table
4425 static int ixgbe_write_uc_addr_list(struct net_device
*netdev
, int vfn
)
4427 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4430 /* return ENOMEM indicating insufficient memory for addresses */
4431 if (netdev_uc_count(netdev
) > ixgbe_available_rars(adapter
, vfn
))
4434 if (!netdev_uc_empty(netdev
)) {
4435 struct netdev_hw_addr
*ha
;
4436 netdev_for_each_uc_addr(ha
, netdev
) {
4437 ixgbe_del_mac_filter(adapter
, ha
->addr
, vfn
);
4438 ixgbe_add_mac_filter(adapter
, ha
->addr
, vfn
);
4445 static int ixgbe_uc_sync(struct net_device
*netdev
, const unsigned char *addr
)
4447 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4450 ret
= ixgbe_add_mac_filter(adapter
, addr
, VMDQ_P(0));
4452 return min_t(int, ret
, 0);
4455 static int ixgbe_uc_unsync(struct net_device
*netdev
, const unsigned char *addr
)
4457 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4459 ixgbe_del_mac_filter(adapter
, addr
, VMDQ_P(0));
4465 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
4466 * @netdev: network interface device structure
4468 * The set_rx_method entry point is called whenever the unicast/multicast
4469 * address list or the network interface flags are updated. This routine is
4470 * responsible for configuring the hardware for proper unicast, multicast and
4473 void ixgbe_set_rx_mode(struct net_device
*netdev
)
4475 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
4476 struct ixgbe_hw
*hw
= &adapter
->hw
;
4477 u32 fctrl
, vmolr
= IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
;
4478 netdev_features_t features
= netdev
->features
;
4481 /* Check for Promiscuous and All Multicast modes */
4482 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
4484 /* set all bits that we expect to always be set */
4485 fctrl
&= ~IXGBE_FCTRL_SBP
; /* disable store-bad-packets */
4486 fctrl
|= IXGBE_FCTRL_BAM
;
4487 fctrl
|= IXGBE_FCTRL_DPF
; /* discard pause frames when FC enabled */
4488 fctrl
|= IXGBE_FCTRL_PMCF
;
4490 /* clear the bits we are changing the status of */
4491 fctrl
&= ~(IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4492 if (netdev
->flags
& IFF_PROMISC
) {
4493 hw
->addr_ctrl
.user_set_promisc
= true;
4494 fctrl
|= (IXGBE_FCTRL_UPE
| IXGBE_FCTRL_MPE
);
4495 vmolr
|= IXGBE_VMOLR_MPE
;
4496 features
&= ~NETIF_F_HW_VLAN_CTAG_FILTER
;
4498 if (netdev
->flags
& IFF_ALLMULTI
) {
4499 fctrl
|= IXGBE_FCTRL_MPE
;
4500 vmolr
|= IXGBE_VMOLR_MPE
;
4502 hw
->addr_ctrl
.user_set_promisc
= false;
4506 * Write addresses to available RAR registers, if there is not
4507 * sufficient space to store all the addresses then enable
4508 * unicast promiscuous mode
4510 if (__dev_uc_sync(netdev
, ixgbe_uc_sync
, ixgbe_uc_unsync
)) {
4511 fctrl
|= IXGBE_FCTRL_UPE
;
4512 vmolr
|= IXGBE_VMOLR_ROPE
;
4515 /* Write addresses to the MTA, if the attempt fails
4516 * then we should just turn on promiscuous mode so
4517 * that we can at least receive multicast traffic
4519 count
= ixgbe_write_mc_addr_list(netdev
);
4521 fctrl
|= IXGBE_FCTRL_MPE
;
4522 vmolr
|= IXGBE_VMOLR_MPE
;
4524 vmolr
|= IXGBE_VMOLR_ROMPE
;
4527 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4528 vmolr
|= IXGBE_READ_REG(hw
, IXGBE_VMOLR(VMDQ_P(0))) &
4529 ~(IXGBE_VMOLR_MPE
| IXGBE_VMOLR_ROMPE
|
4531 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(VMDQ_P(0)), vmolr
);
4534 /* This is useful for sniffing bad packets. */
4535 if (features
& NETIF_F_RXALL
) {
4536 /* UPE and MPE will be handled by normal PROMISC logic
4537 * in e1000e_set_rx_mode */
4538 fctrl
|= (IXGBE_FCTRL_SBP
| /* Receive bad packets */
4539 IXGBE_FCTRL_BAM
| /* RX All Bcast Pkts */
4540 IXGBE_FCTRL_PMCF
); /* RX All MAC Ctrl Pkts */
4542 fctrl
&= ~(IXGBE_FCTRL_DPF
);
4543 /* NOTE: VLAN filtering is disabled by setting PROMISC */
4546 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
4548 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
4549 ixgbe_vlan_strip_enable(adapter
);
4551 ixgbe_vlan_strip_disable(adapter
);
4553 if (features
& NETIF_F_HW_VLAN_CTAG_FILTER
)
4554 ixgbe_vlan_promisc_disable(adapter
);
4556 ixgbe_vlan_promisc_enable(adapter
);
4559 static void ixgbe_napi_enable_all(struct ixgbe_adapter
*adapter
)
4563 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4564 ixgbe_qv_init_lock(adapter
->q_vector
[q_idx
]);
4565 napi_enable(&adapter
->q_vector
[q_idx
]->napi
);
4569 static void ixgbe_napi_disable_all(struct ixgbe_adapter
*adapter
)
4573 for (q_idx
= 0; q_idx
< adapter
->num_q_vectors
; q_idx
++) {
4574 napi_disable(&adapter
->q_vector
[q_idx
]->napi
);
4575 while (!ixgbe_qv_disable(adapter
->q_vector
[q_idx
])) {
4576 pr_info("QV %d locked\n", q_idx
);
4577 usleep_range(1000, 20000);
4582 static void ixgbe_clear_vxlan_port(struct ixgbe_adapter
*adapter
)
4584 switch (adapter
->hw
.mac
.type
) {
4585 case ixgbe_mac_X550
:
4586 case ixgbe_mac_X550EM_x
:
4587 case ixgbe_mac_x550em_a
:
4588 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_VXLANCTRL
, 0);
4589 adapter
->vxlan_port
= 0;
4596 #ifdef CONFIG_IXGBE_DCB
4598 * ixgbe_configure_dcb - Configure DCB hardware
4599 * @adapter: ixgbe adapter struct
4601 * This is called by the driver on open to configure the DCB hardware.
4602 * This is also called by the gennetlink interface when reconfiguring
4605 static void ixgbe_configure_dcb(struct ixgbe_adapter
*adapter
)
4607 struct ixgbe_hw
*hw
= &adapter
->hw
;
4608 int max_frame
= adapter
->netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4610 if (!(adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
)) {
4611 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4612 netif_set_gso_max_size(adapter
->netdev
, 65536);
4616 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4617 netif_set_gso_max_size(adapter
->netdev
, 32768);
4620 if (adapter
->netdev
->features
& NETIF_F_FCOE_MTU
)
4621 max_frame
= max(max_frame
, IXGBE_FCOE_JUMBO_FRAME_SIZE
);
4624 /* reconfigure the hardware */
4625 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
) {
4626 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4628 ixgbe_dcb_calculate_tc_credits(hw
, &adapter
->dcb_cfg
, max_frame
,
4630 ixgbe_dcb_hw_config(hw
, &adapter
->dcb_cfg
);
4631 } else if (adapter
->ixgbe_ieee_ets
&& adapter
->ixgbe_ieee_pfc
) {
4632 ixgbe_dcb_hw_ets(&adapter
->hw
,
4633 adapter
->ixgbe_ieee_ets
,
4635 ixgbe_dcb_hw_pfc_config(&adapter
->hw
,
4636 adapter
->ixgbe_ieee_pfc
->pfc_en
,
4637 adapter
->ixgbe_ieee_ets
->prio_tc
);
4640 /* Enable RSS Hash per TC */
4641 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
4643 u16 rss_i
= adapter
->ring_feature
[RING_F_RSS
].indices
- 1;
4650 /* write msb to all 8 TCs in one write */
4651 IXGBE_WRITE_REG(hw
, IXGBE_RQTC
, msb
* 0x11111111);
4656 /* Additional bittime to account for IXGBE framing */
4657 #define IXGBE_ETH_FRAMING 20
4660 * ixgbe_hpbthresh - calculate high water mark for flow control
4662 * @adapter: board private structure to calculate for
4663 * @pb: packet buffer to calculate
4665 static int ixgbe_hpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4667 struct ixgbe_hw
*hw
= &adapter
->hw
;
4668 struct net_device
*dev
= adapter
->netdev
;
4669 int link
, tc
, kb
, marker
;
4672 /* Calculate max LAN frame size */
4673 tc
= link
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ IXGBE_ETH_FRAMING
;
4676 /* FCoE traffic class uses FCOE jumbo frames */
4677 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4678 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4679 (pb
== ixgbe_fcoe_get_tc(adapter
)))
4680 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4683 /* Calculate delay value for device */
4684 switch (hw
->mac
.type
) {
4685 case ixgbe_mac_X540
:
4686 case ixgbe_mac_X550
:
4687 case ixgbe_mac_X550EM_x
:
4688 case ixgbe_mac_x550em_a
:
4689 dv_id
= IXGBE_DV_X540(link
, tc
);
4692 dv_id
= IXGBE_DV(link
, tc
);
4696 /* Loopback switch introduces additional latency */
4697 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
4698 dv_id
+= IXGBE_B2BT(tc
);
4700 /* Delay value is calculated in bit times convert to KB */
4701 kb
= IXGBE_BT2KB(dv_id
);
4702 rx_pba
= IXGBE_READ_REG(hw
, IXGBE_RXPBSIZE(pb
)) >> 10;
4704 marker
= rx_pba
- kb
;
4706 /* It is possible that the packet buffer is not large enough
4707 * to provide required headroom. In this case throw an error
4708 * to user and a do the best we can.
4711 e_warn(drv
, "Packet Buffer(%i) can not provide enough"
4712 "headroom to support flow control."
4713 "Decrease MTU or number of traffic classes\n", pb
);
4721 * ixgbe_lpbthresh - calculate low water mark for for flow control
4723 * @adapter: board private structure to calculate for
4724 * @pb: packet buffer to calculate
4726 static int ixgbe_lpbthresh(struct ixgbe_adapter
*adapter
, int pb
)
4728 struct ixgbe_hw
*hw
= &adapter
->hw
;
4729 struct net_device
*dev
= adapter
->netdev
;
4733 /* Calculate max LAN frame size */
4734 tc
= dev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
4737 /* FCoE traffic class uses FCOE jumbo frames */
4738 if ((dev
->features
& NETIF_F_FCOE_MTU
) &&
4739 (tc
< IXGBE_FCOE_JUMBO_FRAME_SIZE
) &&
4740 (pb
== netdev_get_prio_tc_map(dev
, adapter
->fcoe
.up
)))
4741 tc
= IXGBE_FCOE_JUMBO_FRAME_SIZE
;
4744 /* Calculate delay value for device */
4745 switch (hw
->mac
.type
) {
4746 case ixgbe_mac_X540
:
4747 case ixgbe_mac_X550
:
4748 case ixgbe_mac_X550EM_x
:
4749 case ixgbe_mac_x550em_a
:
4750 dv_id
= IXGBE_LOW_DV_X540(tc
);
4753 dv_id
= IXGBE_LOW_DV(tc
);
4757 /* Delay value is calculated in bit times convert to KB */
4758 return IXGBE_BT2KB(dv_id
);
4762 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4764 static void ixgbe_pbthresh_setup(struct ixgbe_adapter
*adapter
)
4766 struct ixgbe_hw
*hw
= &adapter
->hw
;
4767 int num_tc
= netdev_get_num_tc(adapter
->netdev
);
4773 for (i
= 0; i
< num_tc
; i
++) {
4774 hw
->fc
.high_water
[i
] = ixgbe_hpbthresh(adapter
, i
);
4775 hw
->fc
.low_water
[i
] = ixgbe_lpbthresh(adapter
, i
);
4777 /* Low water marks must not be larger than high water marks */
4778 if (hw
->fc
.low_water
[i
] > hw
->fc
.high_water
[i
])
4779 hw
->fc
.low_water
[i
] = 0;
4782 for (; i
< MAX_TRAFFIC_CLASS
; i
++)
4783 hw
->fc
.high_water
[i
] = 0;
4786 static void ixgbe_configure_pb(struct ixgbe_adapter
*adapter
)
4788 struct ixgbe_hw
*hw
= &adapter
->hw
;
4790 u8 tc
= netdev_get_num_tc(adapter
->netdev
);
4792 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
||
4793 adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
4794 hdrm
= 32 << adapter
->fdir_pballoc
;
4798 hw
->mac
.ops
.set_rxpba(hw
, tc
, hdrm
, PBA_STRATEGY_EQUAL
);
4799 ixgbe_pbthresh_setup(adapter
);
4802 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter
*adapter
)
4804 struct ixgbe_hw
*hw
= &adapter
->hw
;
4805 struct hlist_node
*node2
;
4806 struct ixgbe_fdir_filter
*filter
;
4808 spin_lock(&adapter
->fdir_perfect_lock
);
4810 if (!hlist_empty(&adapter
->fdir_filter_list
))
4811 ixgbe_fdir_set_input_mask_82599(hw
, &adapter
->fdir_mask
);
4813 hlist_for_each_entry_safe(filter
, node2
,
4814 &adapter
->fdir_filter_list
, fdir_node
) {
4815 ixgbe_fdir_write_perfect_filter_82599(hw
,
4818 (filter
->action
== IXGBE_FDIR_DROP_QUEUE
) ?
4819 IXGBE_FDIR_DROP_QUEUE
:
4820 adapter
->rx_ring
[filter
->action
]->reg_idx
);
4823 spin_unlock(&adapter
->fdir_perfect_lock
);
4826 static void ixgbe_macvlan_set_rx_mode(struct net_device
*dev
, unsigned int pool
,
4827 struct ixgbe_adapter
*adapter
)
4829 struct ixgbe_hw
*hw
= &adapter
->hw
;
4832 /* No unicast promiscuous support for VMDQ devices. */
4833 vmolr
= IXGBE_READ_REG(hw
, IXGBE_VMOLR(pool
));
4834 vmolr
|= (IXGBE_VMOLR_ROMPE
| IXGBE_VMOLR_BAM
| IXGBE_VMOLR_AUPE
);
4836 /* clear the affected bit */
4837 vmolr
&= ~IXGBE_VMOLR_MPE
;
4839 if (dev
->flags
& IFF_ALLMULTI
) {
4840 vmolr
|= IXGBE_VMOLR_MPE
;
4842 vmolr
|= IXGBE_VMOLR_ROMPE
;
4843 hw
->mac
.ops
.update_mc_addr_list(hw
, dev
);
4845 ixgbe_write_uc_addr_list(adapter
->netdev
, pool
);
4846 IXGBE_WRITE_REG(hw
, IXGBE_VMOLR(pool
), vmolr
);
4849 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter
*vadapter
)
4851 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4852 int rss_i
= adapter
->num_rx_queues_per_pool
;
4853 struct ixgbe_hw
*hw
= &adapter
->hw
;
4854 u16 pool
= vadapter
->pool
;
4855 u32 psrtype
= IXGBE_PSRTYPE_TCPHDR
|
4856 IXGBE_PSRTYPE_UDPHDR
|
4857 IXGBE_PSRTYPE_IPV4HDR
|
4858 IXGBE_PSRTYPE_L2HDR
|
4859 IXGBE_PSRTYPE_IPV6HDR
;
4861 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
4869 IXGBE_WRITE_REG(hw
, IXGBE_PSRTYPE(VMDQ_P(pool
)), psrtype
);
4873 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4874 * @rx_ring: ring to free buffers from
4876 static void ixgbe_clean_rx_ring(struct ixgbe_ring
*rx_ring
)
4878 struct device
*dev
= rx_ring
->dev
;
4882 /* ring already cleared, nothing to do */
4883 if (!rx_ring
->rx_buffer_info
)
4886 /* Free all the Rx ring sk_buffs */
4887 for (i
= 0; i
< rx_ring
->count
; i
++) {
4888 struct ixgbe_rx_buffer
*rx_buffer
= &rx_ring
->rx_buffer_info
[i
];
4890 if (rx_buffer
->skb
) {
4891 struct sk_buff
*skb
= rx_buffer
->skb
;
4892 if (IXGBE_CB(skb
)->page_released
)
4895 ixgbe_rx_bufsz(rx_ring
),
4898 rx_buffer
->skb
= NULL
;
4901 if (!rx_buffer
->page
)
4904 dma_unmap_page(dev
, rx_buffer
->dma
,
4905 ixgbe_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
);
4906 __free_pages(rx_buffer
->page
, ixgbe_rx_pg_order(rx_ring
));
4908 rx_buffer
->page
= NULL
;
4911 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
4912 memset(rx_ring
->rx_buffer_info
, 0, size
);
4914 /* Zero out the descriptor ring */
4915 memset(rx_ring
->desc
, 0, rx_ring
->size
);
4917 rx_ring
->next_to_alloc
= 0;
4918 rx_ring
->next_to_clean
= 0;
4919 rx_ring
->next_to_use
= 0;
4922 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter
*vadapter
,
4923 struct ixgbe_ring
*rx_ring
)
4925 struct ixgbe_adapter
*adapter
= vadapter
->real_adapter
;
4926 int index
= rx_ring
->queue_index
+ vadapter
->rx_base_queue
;
4928 /* shutdown specific queue receive and wait for dma to settle */
4929 ixgbe_disable_rx_queue(adapter
, rx_ring
);
4930 usleep_range(10000, 20000);
4931 ixgbe_irq_disable_queues(adapter
, ((u64
)1 << index
));
4932 ixgbe_clean_rx_ring(rx_ring
);
4933 rx_ring
->l2_accel_priv
= NULL
;
4936 static int ixgbe_fwd_ring_down(struct net_device
*vdev
,
4937 struct ixgbe_fwd_adapter
*accel
)
4939 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4940 unsigned int rxbase
= accel
->rx_base_queue
;
4941 unsigned int txbase
= accel
->tx_base_queue
;
4944 netif_tx_stop_all_queues(vdev
);
4946 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4947 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4948 adapter
->rx_ring
[rxbase
+ i
]->netdev
= adapter
->netdev
;
4951 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4952 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= NULL
;
4953 adapter
->tx_ring
[txbase
+ i
]->netdev
= adapter
->netdev
;
4960 static int ixgbe_fwd_ring_up(struct net_device
*vdev
,
4961 struct ixgbe_fwd_adapter
*accel
)
4963 struct ixgbe_adapter
*adapter
= accel
->real_adapter
;
4964 unsigned int rxbase
, txbase
, queues
;
4965 int i
, baseq
, err
= 0;
4967 if (!test_bit(accel
->pool
, &adapter
->fwd_bitmask
))
4970 baseq
= accel
->pool
* adapter
->num_rx_queues_per_pool
;
4971 netdev_dbg(vdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4972 accel
->pool
, adapter
->num_rx_pools
,
4973 baseq
, baseq
+ adapter
->num_rx_queues_per_pool
,
4974 adapter
->fwd_bitmask
);
4976 accel
->netdev
= vdev
;
4977 accel
->rx_base_queue
= rxbase
= baseq
;
4978 accel
->tx_base_queue
= txbase
= baseq
;
4980 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++)
4981 ixgbe_disable_fwd_ring(accel
, adapter
->rx_ring
[rxbase
+ i
]);
4983 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4984 adapter
->rx_ring
[rxbase
+ i
]->netdev
= vdev
;
4985 adapter
->rx_ring
[rxbase
+ i
]->l2_accel_priv
= accel
;
4986 ixgbe_configure_rx_ring(adapter
, adapter
->rx_ring
[rxbase
+ i
]);
4989 for (i
= 0; i
< adapter
->num_rx_queues_per_pool
; i
++) {
4990 adapter
->tx_ring
[txbase
+ i
]->netdev
= vdev
;
4991 adapter
->tx_ring
[txbase
+ i
]->l2_accel_priv
= accel
;
4994 queues
= min_t(unsigned int,
4995 adapter
->num_rx_queues_per_pool
, vdev
->num_tx_queues
);
4996 err
= netif_set_real_num_tx_queues(vdev
, queues
);
5000 err
= netif_set_real_num_rx_queues(vdev
, queues
);
5004 if (is_valid_ether_addr(vdev
->dev_addr
))
5005 ixgbe_add_mac_filter(adapter
, vdev
->dev_addr
, accel
->pool
);
5007 ixgbe_fwd_psrtype(accel
);
5008 ixgbe_macvlan_set_rx_mode(vdev
, accel
->pool
, adapter
);
5011 ixgbe_fwd_ring_down(vdev
, accel
);
5015 static void ixgbe_configure_dfwd(struct ixgbe_adapter
*adapter
)
5017 struct net_device
*upper
;
5018 struct list_head
*iter
;
5021 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5022 if (netif_is_macvlan(upper
)) {
5023 struct macvlan_dev
*dfwd
= netdev_priv(upper
);
5024 struct ixgbe_fwd_adapter
*vadapter
= dfwd
->fwd_priv
;
5026 if (dfwd
->fwd_priv
) {
5027 err
= ixgbe_fwd_ring_up(upper
, vadapter
);
5035 static void ixgbe_configure(struct ixgbe_adapter
*adapter
)
5037 struct ixgbe_hw
*hw
= &adapter
->hw
;
5039 ixgbe_configure_pb(adapter
);
5040 #ifdef CONFIG_IXGBE_DCB
5041 ixgbe_configure_dcb(adapter
);
5044 * We must restore virtualization before VLANs or else
5045 * the VLVF registers will not be populated
5047 ixgbe_configure_virtualization(adapter
);
5049 ixgbe_set_rx_mode(adapter
->netdev
);
5050 ixgbe_restore_vlan(adapter
);
5052 switch (hw
->mac
.type
) {
5053 case ixgbe_mac_82599EB
:
5054 case ixgbe_mac_X540
:
5055 hw
->mac
.ops
.disable_rx_buff(hw
);
5061 if (adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
) {
5062 ixgbe_init_fdir_signature_82599(&adapter
->hw
,
5063 adapter
->fdir_pballoc
);
5064 } else if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
) {
5065 ixgbe_init_fdir_perfect_82599(&adapter
->hw
,
5066 adapter
->fdir_pballoc
);
5067 ixgbe_fdir_filter_restore(adapter
);
5070 switch (hw
->mac
.type
) {
5071 case ixgbe_mac_82599EB
:
5072 case ixgbe_mac_X540
:
5073 hw
->mac
.ops
.enable_rx_buff(hw
);
5079 #ifdef CONFIG_IXGBE_DCA
5081 if (adapter
->flags
& IXGBE_FLAG_DCA_CAPABLE
)
5082 ixgbe_setup_dca(adapter
);
5083 #endif /* CONFIG_IXGBE_DCA */
5086 /* configure FCoE L2 filters, redirection table, and Rx control */
5087 ixgbe_configure_fcoe(adapter
);
5089 #endif /* IXGBE_FCOE */
5090 ixgbe_configure_tx(adapter
);
5091 ixgbe_configure_rx(adapter
);
5092 ixgbe_configure_dfwd(adapter
);
5096 * ixgbe_sfp_link_config - set up SFP+ link
5097 * @adapter: pointer to private adapter struct
5099 static void ixgbe_sfp_link_config(struct ixgbe_adapter
*adapter
)
5102 * We are assuming the worst case scenario here, and that
5103 * is that an SFP was inserted/removed after the reset
5104 * but before SFP detection was enabled. As such the best
5105 * solution is to just start searching as soon as we start
5107 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
5108 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
5110 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
5111 adapter
->sfp_poll_time
= 0;
5115 * ixgbe_non_sfp_link_config - set up non-SFP+ link
5116 * @hw: pointer to private hardware struct
5118 * Returns 0 on success, negative on failure
5120 static int ixgbe_non_sfp_link_config(struct ixgbe_hw
*hw
)
5123 bool autoneg
, link_up
= false;
5124 int ret
= IXGBE_ERR_LINK_SETUP
;
5126 if (hw
->mac
.ops
.check_link
)
5127 ret
= hw
->mac
.ops
.check_link(hw
, &speed
, &link_up
, false);
5132 speed
= hw
->phy
.autoneg_advertised
;
5133 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
))
5134 ret
= hw
->mac
.ops
.get_link_capabilities(hw
, &speed
,
5139 if (hw
->mac
.ops
.setup_link
)
5140 ret
= hw
->mac
.ops
.setup_link(hw
, speed
, link_up
);
5145 static void ixgbe_setup_gpie(struct ixgbe_adapter
*adapter
)
5147 struct ixgbe_hw
*hw
= &adapter
->hw
;
5150 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
) {
5151 gpie
= IXGBE_GPIE_MSIX_MODE
| IXGBE_GPIE_PBA_SUPPORT
|
5153 gpie
|= IXGBE_GPIE_EIAME
;
5155 * use EIAM to auto-mask when MSI-X interrupt is asserted
5156 * this saves a register write for every interrupt
5158 switch (hw
->mac
.type
) {
5159 case ixgbe_mac_82598EB
:
5160 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5162 case ixgbe_mac_82599EB
:
5163 case ixgbe_mac_X540
:
5164 case ixgbe_mac_X550
:
5165 case ixgbe_mac_X550EM_x
:
5166 case ixgbe_mac_x550em_a
:
5168 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
5169 IXGBE_WRITE_REG(hw
, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
5173 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
5174 * specifically only auto mask tx and rx interrupts */
5175 IXGBE_WRITE_REG(hw
, IXGBE_EIAM
, IXGBE_EICS_RTX_QUEUE
);
5178 /* XXX: to interrupt immediately for EICS writes, enable this */
5179 /* gpie |= IXGBE_GPIE_EIMEN; */
5181 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
5182 gpie
&= ~IXGBE_GPIE_VTMODE_MASK
;
5184 switch (adapter
->ring_feature
[RING_F_VMDQ
].mask
) {
5185 case IXGBE_82599_VMDQ_8Q_MASK
:
5186 gpie
|= IXGBE_GPIE_VTMODE_16
;
5188 case IXGBE_82599_VMDQ_4Q_MASK
:
5189 gpie
|= IXGBE_GPIE_VTMODE_32
;
5192 gpie
|= IXGBE_GPIE_VTMODE_64
;
5197 /* Enable Thermal over heat sensor interrupt */
5198 if (adapter
->flags2
& IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
) {
5199 switch (adapter
->hw
.mac
.type
) {
5200 case ixgbe_mac_82599EB
:
5201 gpie
|= IXGBE_SDP0_GPIEN_8259X
;
5208 /* Enable fan failure interrupt */
5209 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
)
5210 gpie
|= IXGBE_SDP1_GPIEN(hw
);
5212 switch (hw
->mac
.type
) {
5213 case ixgbe_mac_82599EB
:
5214 gpie
|= IXGBE_SDP1_GPIEN_8259X
| IXGBE_SDP2_GPIEN_8259X
;
5216 case ixgbe_mac_X550EM_x
:
5217 case ixgbe_mac_x550em_a
:
5218 gpie
|= IXGBE_SDP0_GPIEN_X540
;
5224 IXGBE_WRITE_REG(hw
, IXGBE_GPIE
, gpie
);
5227 static void ixgbe_up_complete(struct ixgbe_adapter
*adapter
)
5229 struct ixgbe_hw
*hw
= &adapter
->hw
;
5233 ixgbe_get_hw_control(adapter
);
5234 ixgbe_setup_gpie(adapter
);
5236 if (adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)
5237 ixgbe_configure_msix(adapter
);
5239 ixgbe_configure_msi_and_legacy(adapter
);
5241 /* enable the optics for 82599 SFP+ fiber */
5242 if (hw
->mac
.ops
.enable_tx_laser
)
5243 hw
->mac
.ops
.enable_tx_laser(hw
);
5245 if (hw
->phy
.ops
.set_phy_power
)
5246 hw
->phy
.ops
.set_phy_power(hw
, true);
5248 smp_mb__before_atomic();
5249 clear_bit(__IXGBE_DOWN
, &adapter
->state
);
5250 ixgbe_napi_enable_all(adapter
);
5252 if (ixgbe_is_sfp(hw
)) {
5253 ixgbe_sfp_link_config(adapter
);
5255 err
= ixgbe_non_sfp_link_config(hw
);
5257 e_err(probe
, "link_config FAILED %d\n", err
);
5260 /* clear any pending interrupts, may auto mask */
5261 IXGBE_READ_REG(hw
, IXGBE_EICR
);
5262 ixgbe_irq_enable(adapter
, true, true);
5265 * If this adapter has a fan, check to see if we had a failure
5266 * before we enabled the interrupt.
5268 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
5269 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
5270 if (esdp
& IXGBE_ESDP_SDP1
)
5271 e_crit(drv
, "Fan has stopped, replace the adapter\n");
5274 /* bring the link up in the watchdog, this could race with our first
5275 * link up interrupt but shouldn't be a problem */
5276 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
5277 adapter
->link_check_timeout
= jiffies
;
5278 mod_timer(&adapter
->service_timer
, jiffies
);
5280 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
5281 ctrl_ext
= IXGBE_READ_REG(hw
, IXGBE_CTRL_EXT
);
5282 ctrl_ext
|= IXGBE_CTRL_EXT_PFRSTD
;
5283 IXGBE_WRITE_REG(hw
, IXGBE_CTRL_EXT
, ctrl_ext
);
5286 void ixgbe_reinit_locked(struct ixgbe_adapter
*adapter
)
5288 WARN_ON(in_interrupt());
5289 /* put off any impending NetWatchDogTimeout */
5290 adapter
->netdev
->trans_start
= jiffies
;
5292 while (test_and_set_bit(__IXGBE_RESETTING
, &adapter
->state
))
5293 usleep_range(1000, 2000);
5294 ixgbe_down(adapter
);
5296 * If SR-IOV enabled then wait a bit before bringing the adapter
5297 * back up to give the VFs time to respond to the reset. The
5298 * two second wait is based upon the watchdog timer cycle in
5301 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
5304 clear_bit(__IXGBE_RESETTING
, &adapter
->state
);
5307 void ixgbe_up(struct ixgbe_adapter
*adapter
)
5309 /* hardware has been reset, we need to reload some things */
5310 ixgbe_configure(adapter
);
5312 ixgbe_up_complete(adapter
);
5315 void ixgbe_reset(struct ixgbe_adapter
*adapter
)
5317 struct ixgbe_hw
*hw
= &adapter
->hw
;
5318 struct net_device
*netdev
= adapter
->netdev
;
5321 if (ixgbe_removed(hw
->hw_addr
))
5323 /* lock SFP init bit to prevent race conditions with the watchdog */
5324 while (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
5325 usleep_range(1000, 2000);
5327 /* clear all SFP and link config related flags while holding SFP_INIT */
5328 adapter
->flags2
&= ~(IXGBE_FLAG2_SEARCH_FOR_SFP
|
5329 IXGBE_FLAG2_SFP_NEEDS_RESET
);
5330 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
5332 err
= hw
->mac
.ops
.init_hw(hw
);
5335 case IXGBE_ERR_SFP_NOT_PRESENT
:
5336 case IXGBE_ERR_SFP_NOT_SUPPORTED
:
5338 case IXGBE_ERR_MASTER_REQUESTS_PENDING
:
5339 e_dev_err("master disable timed out\n");
5341 case IXGBE_ERR_EEPROM_VERSION
:
5342 /* We are running on a pre-production device, log a warning */
5343 e_dev_warn("This device is a pre-production adapter/LOM. "
5344 "Please be aware there may be issues associated with "
5345 "your hardware. If you are experiencing problems "
5346 "please contact your Intel or hardware "
5347 "representative who provided you with this "
5351 e_dev_err("Hardware Error: %d\n", err
);
5354 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
5356 /* flush entries out of MAC table */
5357 ixgbe_flush_sw_mac_table(adapter
);
5358 __dev_uc_unsync(netdev
, NULL
);
5360 /* do not flush user set addresses */
5361 ixgbe_mac_set_default_filter(adapter
);
5363 /* update SAN MAC vmdq pool selection */
5364 if (hw
->mac
.san_mac_rar_index
)
5365 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
5367 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
5368 ixgbe_ptp_reset(adapter
);
5370 if (hw
->phy
.ops
.set_phy_power
) {
5371 if (!netif_running(adapter
->netdev
) && !adapter
->wol
)
5372 hw
->phy
.ops
.set_phy_power(hw
, false);
5374 hw
->phy
.ops
.set_phy_power(hw
, true);
5379 * ixgbe_clean_tx_ring - Free Tx Buffers
5380 * @tx_ring: ring to be cleaned
5382 static void ixgbe_clean_tx_ring(struct ixgbe_ring
*tx_ring
)
5384 struct ixgbe_tx_buffer
*tx_buffer_info
;
5388 /* ring already cleared, nothing to do */
5389 if (!tx_ring
->tx_buffer_info
)
5392 /* Free all the Tx ring sk_buffs */
5393 for (i
= 0; i
< tx_ring
->count
; i
++) {
5394 tx_buffer_info
= &tx_ring
->tx_buffer_info
[i
];
5395 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer_info
);
5398 netdev_tx_reset_queue(txring_txq(tx_ring
));
5400 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5401 memset(tx_ring
->tx_buffer_info
, 0, size
);
5403 /* Zero out the descriptor ring */
5404 memset(tx_ring
->desc
, 0, tx_ring
->size
);
5406 tx_ring
->next_to_use
= 0;
5407 tx_ring
->next_to_clean
= 0;
5411 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
5412 * @adapter: board private structure
5414 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter
*adapter
)
5418 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5419 ixgbe_clean_rx_ring(adapter
->rx_ring
[i
]);
5423 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
5424 * @adapter: board private structure
5426 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter
*adapter
)
5430 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5431 ixgbe_clean_tx_ring(adapter
->tx_ring
[i
]);
5434 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter
*adapter
)
5436 struct hlist_node
*node2
;
5437 struct ixgbe_fdir_filter
*filter
;
5439 spin_lock(&adapter
->fdir_perfect_lock
);
5441 hlist_for_each_entry_safe(filter
, node2
,
5442 &adapter
->fdir_filter_list
, fdir_node
) {
5443 hlist_del(&filter
->fdir_node
);
5446 adapter
->fdir_filter_count
= 0;
5448 spin_unlock(&adapter
->fdir_perfect_lock
);
5451 void ixgbe_down(struct ixgbe_adapter
*adapter
)
5453 struct net_device
*netdev
= adapter
->netdev
;
5454 struct ixgbe_hw
*hw
= &adapter
->hw
;
5455 struct net_device
*upper
;
5456 struct list_head
*iter
;
5459 /* signal that we are down to the interrupt handler */
5460 if (test_and_set_bit(__IXGBE_DOWN
, &adapter
->state
))
5461 return; /* do nothing if already down */
5463 /* disable receives */
5464 hw
->mac
.ops
.disable_rx(hw
);
5466 /* disable all enabled rx queues */
5467 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
5468 /* this call also flushes the previous write */
5469 ixgbe_disable_rx_queue(adapter
, adapter
->rx_ring
[i
]);
5471 usleep_range(10000, 20000);
5473 netif_tx_stop_all_queues(netdev
);
5475 /* call carrier off first to avoid false dev_watchdog timeouts */
5476 netif_carrier_off(netdev
);
5477 netif_tx_disable(netdev
);
5479 /* disable any upper devices */
5480 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
5481 if (netif_is_macvlan(upper
)) {
5482 struct macvlan_dev
*vlan
= netdev_priv(upper
);
5484 if (vlan
->fwd_priv
) {
5485 netif_tx_stop_all_queues(upper
);
5486 netif_carrier_off(upper
);
5487 netif_tx_disable(upper
);
5492 ixgbe_irq_disable(adapter
);
5494 ixgbe_napi_disable_all(adapter
);
5496 adapter
->flags2
&= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT
|
5497 IXGBE_FLAG2_RESET_REQUESTED
);
5498 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
5500 del_timer_sync(&adapter
->service_timer
);
5502 if (adapter
->num_vfs
) {
5503 /* Clear EITR Select mapping */
5504 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_EITRSEL
, 0);
5506 /* Mark all the VFs as inactive */
5507 for (i
= 0 ; i
< adapter
->num_vfs
; i
++)
5508 adapter
->vfinfo
[i
].clear_to_send
= false;
5510 /* ping all the active vfs to let them know we are going down */
5511 ixgbe_ping_all_vfs(adapter
);
5513 /* Disable all VFTE/VFRE TX/RX */
5514 ixgbe_disable_tx_rx(adapter
);
5517 /* disable transmits in the hardware now that interrupts are off */
5518 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5519 u8 reg_idx
= adapter
->tx_ring
[i
]->reg_idx
;
5520 IXGBE_WRITE_REG(hw
, IXGBE_TXDCTL(reg_idx
), IXGBE_TXDCTL_SWFLSH
);
5523 /* Disable the Tx DMA engine on 82599 and later MAC */
5524 switch (hw
->mac
.type
) {
5525 case ixgbe_mac_82599EB
:
5526 case ixgbe_mac_X540
:
5527 case ixgbe_mac_X550
:
5528 case ixgbe_mac_X550EM_x
:
5529 case ixgbe_mac_x550em_a
:
5530 IXGBE_WRITE_REG(hw
, IXGBE_DMATXCTL
,
5531 (IXGBE_READ_REG(hw
, IXGBE_DMATXCTL
) &
5532 ~IXGBE_DMATXCTL_TE
));
5538 if (!pci_channel_offline(adapter
->pdev
))
5539 ixgbe_reset(adapter
);
5541 /* power down the optics for 82599 SFP+ fiber */
5542 if (hw
->mac
.ops
.disable_tx_laser
)
5543 hw
->mac
.ops
.disable_tx_laser(hw
);
5545 ixgbe_clean_all_tx_rings(adapter
);
5546 ixgbe_clean_all_rx_rings(adapter
);
5550 * ixgbe_tx_timeout - Respond to a Tx Hang
5551 * @netdev: network interface device structure
5553 static void ixgbe_tx_timeout(struct net_device
*netdev
)
5555 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
5557 /* Do the reset outside of interrupt context */
5558 ixgbe_tx_timeout_reset(adapter
);
5562 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
5563 * @adapter: board private structure to initialize
5565 * ixgbe_sw_init initializes the Adapter private data structure.
5566 * Fields are initialized based on PCI device information and
5567 * OS network device settings (MTU size).
5569 static int ixgbe_sw_init(struct ixgbe_adapter
*adapter
)
5571 struct ixgbe_hw
*hw
= &adapter
->hw
;
5572 struct pci_dev
*pdev
= adapter
->pdev
;
5573 unsigned int rss
, fdir
;
5576 #ifdef CONFIG_IXGBE_DCB
5578 struct tc_configuration
*tc
;
5581 /* PCI config space info */
5583 hw
->vendor_id
= pdev
->vendor
;
5584 hw
->device_id
= pdev
->device
;
5585 hw
->revision_id
= pdev
->revision
;
5586 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
5587 hw
->subsystem_device_id
= pdev
->subsystem_device
;
5589 /* Set common capability flags and settings */
5590 rss
= min_t(int, ixgbe_max_rss_indices(adapter
), num_online_cpus());
5591 adapter
->ring_feature
[RING_F_RSS
].limit
= rss
;
5592 adapter
->flags2
|= IXGBE_FLAG2_RSC_CAPABLE
;
5593 adapter
->max_q_vectors
= MAX_Q_VECTORS_82599
;
5594 adapter
->atr_sample_rate
= 20;
5595 fdir
= min_t(int, IXGBE_MAX_FDIR_INDICES
, num_online_cpus());
5596 adapter
->ring_feature
[RING_F_FDIR
].limit
= fdir
;
5597 adapter
->fdir_pballoc
= IXGBE_FDIR_PBALLOC_64K
;
5598 #ifdef CONFIG_IXGBE_DCA
5599 adapter
->flags
|= IXGBE_FLAG_DCA_CAPABLE
;
5602 adapter
->flags
|= IXGBE_FLAG_FCOE_CAPABLE
;
5603 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5604 #ifdef CONFIG_IXGBE_DCB
5605 /* Default traffic class to use for FCoE */
5606 adapter
->fcoe
.up
= IXGBE_FCOE_DEFTC
;
5607 #endif /* CONFIG_IXGBE_DCB */
5608 #endif /* IXGBE_FCOE */
5610 /* initialize static ixgbe jump table entries */
5611 adapter
->jump_tables
[0] = ixgbe_ipv4_fields
;
5613 adapter
->mac_table
= kzalloc(sizeof(struct ixgbe_mac_addr
) *
5614 hw
->mac
.num_rar_entries
,
5616 if (!adapter
->mac_table
)
5619 /* Set MAC specific capability flags and exceptions */
5620 switch (hw
->mac
.type
) {
5621 case ixgbe_mac_82598EB
:
5622 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_CAPABLE
;
5624 if (hw
->device_id
== IXGBE_DEV_ID_82598AT
)
5625 adapter
->flags
|= IXGBE_FLAG_FAN_FAIL_CAPABLE
;
5627 adapter
->max_q_vectors
= MAX_Q_VECTORS_82598
;
5628 adapter
->ring_feature
[RING_F_FDIR
].limit
= 0;
5629 adapter
->atr_sample_rate
= 0;
5630 adapter
->fdir_pballoc
= 0;
5632 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
5633 adapter
->flags
&= ~IXGBE_FLAG_FCOE_ENABLED
;
5634 #ifdef CONFIG_IXGBE_DCB
5635 adapter
->fcoe
.up
= 0;
5636 #endif /* IXGBE_DCB */
5637 #endif /* IXGBE_FCOE */
5639 case ixgbe_mac_82599EB
:
5640 if (hw
->device_id
== IXGBE_DEV_ID_82599_T3_LOM
)
5641 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5643 case ixgbe_mac_X540
:
5644 fwsm
= IXGBE_READ_REG(hw
, IXGBE_FWSM(hw
));
5645 if (fwsm
& IXGBE_FWSM_TS_ENABLED
)
5646 adapter
->flags2
|= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE
;
5648 case ixgbe_mac_X550EM_x
:
5649 case ixgbe_mac_x550em_a
:
5650 case ixgbe_mac_X550
:
5651 #ifdef CONFIG_IXGBE_DCA
5652 adapter
->flags
&= ~IXGBE_FLAG_DCA_CAPABLE
;
5654 #ifdef CONFIG_IXGBE_VXLAN
5655 adapter
->flags
|= IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
;
5663 /* FCoE support exists, always init the FCoE lock */
5664 spin_lock_init(&adapter
->fcoe
.lock
);
5667 /* n-tuple support exists, always init our spinlock */
5668 spin_lock_init(&adapter
->fdir_perfect_lock
);
5670 #ifdef CONFIG_IXGBE_DCB
5671 switch (hw
->mac
.type
) {
5672 case ixgbe_mac_X540
:
5673 case ixgbe_mac_X550
:
5674 case ixgbe_mac_X550EM_x
:
5675 case ixgbe_mac_x550em_a
:
5676 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= X540_TRAFFIC_CLASS
;
5677 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= X540_TRAFFIC_CLASS
;
5680 adapter
->dcb_cfg
.num_tcs
.pg_tcs
= MAX_TRAFFIC_CLASS
;
5681 adapter
->dcb_cfg
.num_tcs
.pfc_tcs
= MAX_TRAFFIC_CLASS
;
5685 /* Configure DCB traffic classes */
5686 for (j
= 0; j
< MAX_TRAFFIC_CLASS
; j
++) {
5687 tc
= &adapter
->dcb_cfg
.tc_config
[j
];
5688 tc
->path
[DCB_TX_CONFIG
].bwg_id
= 0;
5689 tc
->path
[DCB_TX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5690 tc
->path
[DCB_RX_CONFIG
].bwg_id
= 0;
5691 tc
->path
[DCB_RX_CONFIG
].bwg_percent
= 12 + (j
& 1);
5692 tc
->dcb_pfc
= pfc_disabled
;
5695 /* Initialize default user to priority mapping, UPx->TC0 */
5696 tc
= &adapter
->dcb_cfg
.tc_config
[0];
5697 tc
->path
[DCB_TX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5698 tc
->path
[DCB_RX_CONFIG
].up_to_tc_bitmap
= 0xFF;
5700 adapter
->dcb_cfg
.bw_percentage
[DCB_TX_CONFIG
][0] = 100;
5701 adapter
->dcb_cfg
.bw_percentage
[DCB_RX_CONFIG
][0] = 100;
5702 adapter
->dcb_cfg
.pfc_mode_enable
= false;
5703 adapter
->dcb_set_bitmap
= 0x00;
5704 adapter
->dcbx_cap
= DCB_CAP_DCBX_HOST
| DCB_CAP_DCBX_VER_CEE
;
5705 memcpy(&adapter
->temp_dcb_cfg
, &adapter
->dcb_cfg
,
5706 sizeof(adapter
->temp_dcb_cfg
));
5710 /* default flow control settings */
5711 hw
->fc
.requested_mode
= ixgbe_fc_full
;
5712 hw
->fc
.current_mode
= ixgbe_fc_full
; /* init for ethtool output */
5713 ixgbe_pbthresh_setup(adapter
);
5714 hw
->fc
.pause_time
= IXGBE_DEFAULT_FCPAUSE
;
5715 hw
->fc
.send_xon
= true;
5716 hw
->fc
.disable_fc_autoneg
= ixgbe_device_supports_autoneg_fc(hw
);
5718 #ifdef CONFIG_PCI_IOV
5720 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5722 /* assign number of SR-IOV VFs */
5723 if (hw
->mac
.type
!= ixgbe_mac_82598EB
) {
5724 if (max_vfs
> IXGBE_MAX_VFS_DRV_LIMIT
) {
5725 adapter
->num_vfs
= 0;
5726 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5728 adapter
->num_vfs
= max_vfs
;
5731 #endif /* CONFIG_PCI_IOV */
5733 /* enable itr by default in dynamic mode */
5734 adapter
->rx_itr_setting
= 1;
5735 adapter
->tx_itr_setting
= 1;
5737 /* set default ring sizes */
5738 adapter
->tx_ring_count
= IXGBE_DEFAULT_TXD
;
5739 adapter
->rx_ring_count
= IXGBE_DEFAULT_RXD
;
5741 /* Cache bit indicating need for crosstalk fix */
5742 switch (hw
->mac
.type
) {
5743 case ixgbe_mac_82599EB
:
5744 case ixgbe_mac_X550EM_x
:
5745 case ixgbe_mac_x550em_a
:
5746 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
5747 if (device_caps
& IXGBE_DEVICE_CAPS_NO_CROSSTALK_WR
)
5748 adapter
->need_crosstalk_fix
= false;
5750 adapter
->need_crosstalk_fix
= true;
5753 adapter
->need_crosstalk_fix
= false;
5757 /* set default work limits */
5758 adapter
->tx_work_limit
= IXGBE_DEFAULT_TX_WORK
;
5760 /* initialize eeprom parameters */
5761 if (ixgbe_init_eeprom_params_generic(hw
)) {
5762 e_dev_err("EEPROM initialization failed\n");
5766 /* PF holds first pool slot */
5767 set_bit(0, &adapter
->fwd_bitmask
);
5768 set_bit(__IXGBE_DOWN
, &adapter
->state
);
5774 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5775 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5777 * Return 0 on success, negative on failure
5779 int ixgbe_setup_tx_resources(struct ixgbe_ring
*tx_ring
)
5781 struct device
*dev
= tx_ring
->dev
;
5782 int orig_node
= dev_to_node(dev
);
5786 size
= sizeof(struct ixgbe_tx_buffer
) * tx_ring
->count
;
5788 if (tx_ring
->q_vector
)
5789 ring_node
= tx_ring
->q_vector
->numa_node
;
5791 tx_ring
->tx_buffer_info
= vzalloc_node(size
, ring_node
);
5792 if (!tx_ring
->tx_buffer_info
)
5793 tx_ring
->tx_buffer_info
= vzalloc(size
);
5794 if (!tx_ring
->tx_buffer_info
)
5797 u64_stats_init(&tx_ring
->syncp
);
5799 /* round up to nearest 4K */
5800 tx_ring
->size
= tx_ring
->count
* sizeof(union ixgbe_adv_tx_desc
);
5801 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
5803 set_dev_node(dev
, ring_node
);
5804 tx_ring
->desc
= dma_alloc_coherent(dev
,
5808 set_dev_node(dev
, orig_node
);
5810 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
5811 &tx_ring
->dma
, GFP_KERNEL
);
5815 tx_ring
->next_to_use
= 0;
5816 tx_ring
->next_to_clean
= 0;
5820 vfree(tx_ring
->tx_buffer_info
);
5821 tx_ring
->tx_buffer_info
= NULL
;
5822 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
5827 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5828 * @adapter: board private structure
5830 * If this function returns with an error, then it's possible one or
5831 * more of the rings is populated (while the rest are not). It is the
5832 * callers duty to clean those orphaned rings.
5834 * Return 0 on success, negative on failure
5836 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter
*adapter
)
5840 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5841 err
= ixgbe_setup_tx_resources(adapter
->tx_ring
[i
]);
5845 e_err(probe
, "Allocation for Tx Queue %u failed\n", i
);
5851 /* rewind the index freeing the rings as we go */
5853 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5858 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5859 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5861 * Returns 0 on success, negative on failure
5863 int ixgbe_setup_rx_resources(struct ixgbe_ring
*rx_ring
)
5865 struct device
*dev
= rx_ring
->dev
;
5866 int orig_node
= dev_to_node(dev
);
5870 size
= sizeof(struct ixgbe_rx_buffer
) * rx_ring
->count
;
5872 if (rx_ring
->q_vector
)
5873 ring_node
= rx_ring
->q_vector
->numa_node
;
5875 rx_ring
->rx_buffer_info
= vzalloc_node(size
, ring_node
);
5876 if (!rx_ring
->rx_buffer_info
)
5877 rx_ring
->rx_buffer_info
= vzalloc(size
);
5878 if (!rx_ring
->rx_buffer_info
)
5881 u64_stats_init(&rx_ring
->syncp
);
5883 /* Round up to nearest 4K */
5884 rx_ring
->size
= rx_ring
->count
* sizeof(union ixgbe_adv_rx_desc
);
5885 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
5887 set_dev_node(dev
, ring_node
);
5888 rx_ring
->desc
= dma_alloc_coherent(dev
,
5892 set_dev_node(dev
, orig_node
);
5894 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
5895 &rx_ring
->dma
, GFP_KERNEL
);
5899 rx_ring
->next_to_clean
= 0;
5900 rx_ring
->next_to_use
= 0;
5904 vfree(rx_ring
->rx_buffer_info
);
5905 rx_ring
->rx_buffer_info
= NULL
;
5906 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
5911 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5912 * @adapter: board private structure
5914 * If this function returns with an error, then it's possible one or
5915 * more of the rings is populated (while the rest are not). It is the
5916 * callers duty to clean those orphaned rings.
5918 * Return 0 on success, negative on failure
5920 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter
*adapter
)
5924 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5925 err
= ixgbe_setup_rx_resources(adapter
->rx_ring
[i
]);
5929 e_err(probe
, "Allocation for Rx Queue %u failed\n", i
);
5934 err
= ixgbe_setup_fcoe_ddp_resources(adapter
);
5939 /* rewind the index freeing the rings as we go */
5941 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
5946 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5947 * @tx_ring: Tx descriptor ring for a specific queue
5949 * Free all transmit software resources
5951 void ixgbe_free_tx_resources(struct ixgbe_ring
*tx_ring
)
5953 ixgbe_clean_tx_ring(tx_ring
);
5955 vfree(tx_ring
->tx_buffer_info
);
5956 tx_ring
->tx_buffer_info
= NULL
;
5958 /* if not set, then don't free */
5962 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
5963 tx_ring
->desc
, tx_ring
->dma
);
5965 tx_ring
->desc
= NULL
;
5969 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5970 * @adapter: board private structure
5972 * Free all transmit software resources
5974 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter
*adapter
)
5978 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
5979 if (adapter
->tx_ring
[i
]->desc
)
5980 ixgbe_free_tx_resources(adapter
->tx_ring
[i
]);
5984 * ixgbe_free_rx_resources - Free Rx Resources
5985 * @rx_ring: ring to clean the resources from
5987 * Free all receive software resources
5989 void ixgbe_free_rx_resources(struct ixgbe_ring
*rx_ring
)
5991 ixgbe_clean_rx_ring(rx_ring
);
5993 vfree(rx_ring
->rx_buffer_info
);
5994 rx_ring
->rx_buffer_info
= NULL
;
5996 /* if not set, then don't free */
6000 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
6001 rx_ring
->desc
, rx_ring
->dma
);
6003 rx_ring
->desc
= NULL
;
6007 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
6008 * @adapter: board private structure
6010 * Free all receive software resources
6012 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter
*adapter
)
6017 ixgbe_free_fcoe_ddp_resources(adapter
);
6020 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
6021 if (adapter
->rx_ring
[i
]->desc
)
6022 ixgbe_free_rx_resources(adapter
->rx_ring
[i
]);
6026 * ixgbe_change_mtu - Change the Maximum Transfer Unit
6027 * @netdev: network interface device structure
6028 * @new_mtu: new value for maximum frame size
6030 * Returns 0 on success, negative on failure
6032 static int ixgbe_change_mtu(struct net_device
*netdev
, int new_mtu
)
6034 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6035 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
;
6037 /* MTU < 68 is an error and causes problems on some kernels */
6038 if ((new_mtu
< 68) || (max_frame
> IXGBE_MAX_JUMBO_FRAME_SIZE
))
6042 * For 82599EB we cannot allow legacy VFs to enable their receive
6043 * paths when MTU greater than 1500 is configured. So display a
6044 * warning that legacy VFs will be disabled.
6046 if ((adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) &&
6047 (adapter
->hw
.mac
.type
== ixgbe_mac_82599EB
) &&
6048 (max_frame
> (ETH_FRAME_LEN
+ ETH_FCS_LEN
)))
6049 e_warn(probe
, "Setting MTU > 1500 will disable legacy VFs\n");
6051 e_info(probe
, "changing MTU from %d to %d\n", netdev
->mtu
, new_mtu
);
6053 /* must set new MTU before calling down or up */
6054 netdev
->mtu
= new_mtu
;
6056 if (netif_running(netdev
))
6057 ixgbe_reinit_locked(adapter
);
6063 * ixgbe_open - Called when a network interface is made active
6064 * @netdev: network interface device structure
6066 * Returns 0 on success, negative value on failure
6068 * The open entry point is called when a network interface is made
6069 * active by the system (IFF_UP). At this point all resources needed
6070 * for transmit and receive operations are allocated, the interrupt
6071 * handler is registered with the OS, the watchdog timer is started,
6072 * and the stack is notified that the interface is ready.
6074 int ixgbe_open(struct net_device
*netdev
)
6076 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6077 struct ixgbe_hw
*hw
= &adapter
->hw
;
6080 /* disallow open during test */
6081 if (test_bit(__IXGBE_TESTING
, &adapter
->state
))
6084 netif_carrier_off(netdev
);
6086 /* allocate transmit descriptors */
6087 err
= ixgbe_setup_all_tx_resources(adapter
);
6091 /* allocate receive descriptors */
6092 err
= ixgbe_setup_all_rx_resources(adapter
);
6096 ixgbe_configure(adapter
);
6098 err
= ixgbe_request_irq(adapter
);
6102 /* Notify the stack of the actual queue counts. */
6103 if (adapter
->num_rx_pools
> 1)
6104 queues
= adapter
->num_rx_queues_per_pool
;
6106 queues
= adapter
->num_tx_queues
;
6108 err
= netif_set_real_num_tx_queues(netdev
, queues
);
6110 goto err_set_queues
;
6112 if (adapter
->num_rx_pools
> 1 &&
6113 adapter
->num_rx_queues
> IXGBE_MAX_L2A_QUEUES
)
6114 queues
= IXGBE_MAX_L2A_QUEUES
;
6116 queues
= adapter
->num_rx_queues
;
6117 err
= netif_set_real_num_rx_queues(netdev
, queues
);
6119 goto err_set_queues
;
6121 ixgbe_ptp_init(adapter
);
6123 ixgbe_up_complete(adapter
);
6125 ixgbe_clear_vxlan_port(adapter
);
6126 #ifdef CONFIG_IXGBE_VXLAN
6127 vxlan_get_rx_port(netdev
);
6133 ixgbe_free_irq(adapter
);
6135 ixgbe_free_all_rx_resources(adapter
);
6136 if (hw
->phy
.ops
.set_phy_power
&& !adapter
->wol
)
6137 hw
->phy
.ops
.set_phy_power(&adapter
->hw
, false);
6139 ixgbe_free_all_tx_resources(adapter
);
6141 ixgbe_reset(adapter
);
6146 static void ixgbe_close_suspend(struct ixgbe_adapter
*adapter
)
6148 ixgbe_ptp_suspend(adapter
);
6150 if (adapter
->hw
.phy
.ops
.enter_lplu
) {
6151 adapter
->hw
.phy
.reset_disable
= true;
6152 ixgbe_down(adapter
);
6153 adapter
->hw
.phy
.ops
.enter_lplu(&adapter
->hw
);
6154 adapter
->hw
.phy
.reset_disable
= false;
6156 ixgbe_down(adapter
);
6159 ixgbe_free_irq(adapter
);
6161 ixgbe_free_all_tx_resources(adapter
);
6162 ixgbe_free_all_rx_resources(adapter
);
6166 * ixgbe_close - Disables a network interface
6167 * @netdev: network interface device structure
6169 * Returns 0, this is not allowed to fail
6171 * The close entry point is called when an interface is de-activated
6172 * by the OS. The hardware is still under the drivers control, but
6173 * needs to be disabled. A global MAC reset is issued to stop the
6174 * hardware, and all transmit and receive resources are freed.
6176 int ixgbe_close(struct net_device
*netdev
)
6178 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
6180 ixgbe_ptp_stop(adapter
);
6182 ixgbe_close_suspend(adapter
);
6184 ixgbe_fdir_filter_exit(adapter
);
6186 ixgbe_release_hw_control(adapter
);
6192 static int ixgbe_resume(struct pci_dev
*pdev
)
6194 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6195 struct net_device
*netdev
= adapter
->netdev
;
6198 adapter
->hw
.hw_addr
= adapter
->io_addr
;
6199 pci_set_power_state(pdev
, PCI_D0
);
6200 pci_restore_state(pdev
);
6202 * pci_restore_state clears dev->state_saved so call
6203 * pci_save_state to restore it.
6205 pci_save_state(pdev
);
6207 err
= pci_enable_device_mem(pdev
);
6209 e_dev_err("Cannot enable PCI device from suspend\n");
6212 smp_mb__before_atomic();
6213 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
6214 pci_set_master(pdev
);
6216 pci_wake_from_d3(pdev
, false);
6218 ixgbe_reset(adapter
);
6220 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
6223 err
= ixgbe_init_interrupt_scheme(adapter
);
6224 if (!err
&& netif_running(netdev
))
6225 err
= ixgbe_open(netdev
);
6232 netif_device_attach(netdev
);
6236 #endif /* CONFIG_PM */
6238 static int __ixgbe_shutdown(struct pci_dev
*pdev
, bool *enable_wake
)
6240 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
6241 struct net_device
*netdev
= adapter
->netdev
;
6242 struct ixgbe_hw
*hw
= &adapter
->hw
;
6244 u32 wufc
= adapter
->wol
;
6249 netif_device_detach(netdev
);
6252 if (netif_running(netdev
))
6253 ixgbe_close_suspend(adapter
);
6256 ixgbe_clear_interrupt_scheme(adapter
);
6259 retval
= pci_save_state(pdev
);
6264 if (hw
->mac
.ops
.stop_link_on_d3
)
6265 hw
->mac
.ops
.stop_link_on_d3(hw
);
6268 ixgbe_set_rx_mode(netdev
);
6270 /* enable the optics for 82599 SFP+ fiber as we can WoL */
6271 if (hw
->mac
.ops
.enable_tx_laser
)
6272 hw
->mac
.ops
.enable_tx_laser(hw
);
6274 /* turn on all-multi mode if wake on multicast is enabled */
6275 if (wufc
& IXGBE_WUFC_MC
) {
6276 fctrl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6277 fctrl
|= IXGBE_FCTRL_MPE
;
6278 IXGBE_WRITE_REG(hw
, IXGBE_FCTRL
, fctrl
);
6281 ctrl
= IXGBE_READ_REG(hw
, IXGBE_CTRL
);
6282 ctrl
|= IXGBE_CTRL_GIO_DIS
;
6283 IXGBE_WRITE_REG(hw
, IXGBE_CTRL
, ctrl
);
6285 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, wufc
);
6287 IXGBE_WRITE_REG(hw
, IXGBE_WUC
, 0);
6288 IXGBE_WRITE_REG(hw
, IXGBE_WUFC
, 0);
6291 switch (hw
->mac
.type
) {
6292 case ixgbe_mac_82598EB
:
6293 pci_wake_from_d3(pdev
, false);
6295 case ixgbe_mac_82599EB
:
6296 case ixgbe_mac_X540
:
6297 case ixgbe_mac_X550
:
6298 case ixgbe_mac_X550EM_x
:
6299 case ixgbe_mac_x550em_a
:
6300 pci_wake_from_d3(pdev
, !!wufc
);
6306 *enable_wake
= !!wufc
;
6307 if (hw
->phy
.ops
.set_phy_power
&& !*enable_wake
)
6308 hw
->phy
.ops
.set_phy_power(hw
, false);
6310 ixgbe_release_hw_control(adapter
);
6312 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
6313 pci_disable_device(pdev
);
6319 static int ixgbe_suspend(struct pci_dev
*pdev
, pm_message_t state
)
6324 retval
= __ixgbe_shutdown(pdev
, &wake
);
6329 pci_prepare_to_sleep(pdev
);
6331 pci_wake_from_d3(pdev
, false);
6332 pci_set_power_state(pdev
, PCI_D3hot
);
6337 #endif /* CONFIG_PM */
6339 static void ixgbe_shutdown(struct pci_dev
*pdev
)
6343 __ixgbe_shutdown(pdev
, &wake
);
6345 if (system_state
== SYSTEM_POWER_OFF
) {
6346 pci_wake_from_d3(pdev
, wake
);
6347 pci_set_power_state(pdev
, PCI_D3hot
);
6352 * ixgbe_update_stats - Update the board statistics counters.
6353 * @adapter: board private structure
6355 void ixgbe_update_stats(struct ixgbe_adapter
*adapter
)
6357 struct net_device
*netdev
= adapter
->netdev
;
6358 struct ixgbe_hw
*hw
= &adapter
->hw
;
6359 struct ixgbe_hw_stats
*hwstats
= &adapter
->stats
;
6361 u32 i
, missed_rx
= 0, mpc
, bprc
, lxon
, lxoff
, xon_off_tot
;
6362 u64 non_eop_descs
= 0, restart_queue
= 0, tx_busy
= 0;
6363 u64 alloc_rx_page_failed
= 0, alloc_rx_buff_failed
= 0;
6364 u64 bytes
= 0, packets
= 0, hw_csum_rx_error
= 0;
6366 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6367 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6370 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
) {
6373 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6374 rsc_count
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_count
;
6375 rsc_flush
+= adapter
->rx_ring
[i
]->rx_stats
.rsc_flush
;
6377 adapter
->rsc_total_count
= rsc_count
;
6378 adapter
->rsc_total_flush
= rsc_flush
;
6381 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
6382 struct ixgbe_ring
*rx_ring
= adapter
->rx_ring
[i
];
6383 non_eop_descs
+= rx_ring
->rx_stats
.non_eop_descs
;
6384 alloc_rx_page_failed
+= rx_ring
->rx_stats
.alloc_rx_page_failed
;
6385 alloc_rx_buff_failed
+= rx_ring
->rx_stats
.alloc_rx_buff_failed
;
6386 hw_csum_rx_error
+= rx_ring
->rx_stats
.csum_err
;
6387 bytes
+= rx_ring
->stats
.bytes
;
6388 packets
+= rx_ring
->stats
.packets
;
6390 adapter
->non_eop_descs
= non_eop_descs
;
6391 adapter
->alloc_rx_page_failed
= alloc_rx_page_failed
;
6392 adapter
->alloc_rx_buff_failed
= alloc_rx_buff_failed
;
6393 adapter
->hw_csum_rx_error
= hw_csum_rx_error
;
6394 netdev
->stats
.rx_bytes
= bytes
;
6395 netdev
->stats
.rx_packets
= packets
;
6399 /* gather some stats to the adapter struct that are per queue */
6400 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6401 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6402 restart_queue
+= tx_ring
->tx_stats
.restart_queue
;
6403 tx_busy
+= tx_ring
->tx_stats
.tx_busy
;
6404 bytes
+= tx_ring
->stats
.bytes
;
6405 packets
+= tx_ring
->stats
.packets
;
6407 adapter
->restart_queue
= restart_queue
;
6408 adapter
->tx_busy
= tx_busy
;
6409 netdev
->stats
.tx_bytes
= bytes
;
6410 netdev
->stats
.tx_packets
= packets
;
6412 hwstats
->crcerrs
+= IXGBE_READ_REG(hw
, IXGBE_CRCERRS
);
6414 /* 8 register reads */
6415 for (i
= 0; i
< 8; i
++) {
6416 /* for packet buffers not used, the register should read 0 */
6417 mpc
= IXGBE_READ_REG(hw
, IXGBE_MPC(i
));
6419 hwstats
->mpc
[i
] += mpc
;
6420 total_mpc
+= hwstats
->mpc
[i
];
6421 hwstats
->pxontxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXONTXC(i
));
6422 hwstats
->pxofftxc
[i
] += IXGBE_READ_REG(hw
, IXGBE_PXOFFTXC(i
));
6423 switch (hw
->mac
.type
) {
6424 case ixgbe_mac_82598EB
:
6425 hwstats
->rnbc
[i
] += IXGBE_READ_REG(hw
, IXGBE_RNBC(i
));
6426 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC(i
));
6427 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC(i
));
6428 hwstats
->pxonrxc
[i
] +=
6429 IXGBE_READ_REG(hw
, IXGBE_PXONRXC(i
));
6431 case ixgbe_mac_82599EB
:
6432 case ixgbe_mac_X540
:
6433 case ixgbe_mac_X550
:
6434 case ixgbe_mac_X550EM_x
:
6435 case ixgbe_mac_x550em_a
:
6436 hwstats
->pxonrxc
[i
] +=
6437 IXGBE_READ_REG(hw
, IXGBE_PXONRXCNT(i
));
6444 /*16 register reads */
6445 for (i
= 0; i
< 16; i
++) {
6446 hwstats
->qptc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPTC(i
));
6447 hwstats
->qprc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QPRC(i
));
6448 if ((hw
->mac
.type
== ixgbe_mac_82599EB
) ||
6449 (hw
->mac
.type
== ixgbe_mac_X540
) ||
6450 (hw
->mac
.type
== ixgbe_mac_X550
) ||
6451 (hw
->mac
.type
== ixgbe_mac_X550EM_x
) ||
6452 (hw
->mac
.type
== ixgbe_mac_x550em_a
)) {
6453 hwstats
->qbtc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBTC_L(i
));
6454 IXGBE_READ_REG(hw
, IXGBE_QBTC_H(i
)); /* to clear */
6455 hwstats
->qbrc
[i
] += IXGBE_READ_REG(hw
, IXGBE_QBRC_L(i
));
6456 IXGBE_READ_REG(hw
, IXGBE_QBRC_H(i
)); /* to clear */
6460 hwstats
->gprc
+= IXGBE_READ_REG(hw
, IXGBE_GPRC
);
6461 /* work around hardware counting issue */
6462 hwstats
->gprc
-= missed_rx
;
6464 ixgbe_update_xoff_received(adapter
);
6466 /* 82598 hardware only has a 32 bit counter in the high register */
6467 switch (hw
->mac
.type
) {
6468 case ixgbe_mac_82598EB
:
6469 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXC
);
6470 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCH
);
6471 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCH
);
6472 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORH
);
6474 case ixgbe_mac_X540
:
6475 case ixgbe_mac_X550
:
6476 case ixgbe_mac_X550EM_x
:
6477 case ixgbe_mac_x550em_a
:
6478 /* OS2BMC stats are X540 and later */
6479 hwstats
->o2bgptc
+= IXGBE_READ_REG(hw
, IXGBE_O2BGPTC
);
6480 hwstats
->o2bspc
+= IXGBE_READ_REG(hw
, IXGBE_O2BSPC
);
6481 hwstats
->b2ospc
+= IXGBE_READ_REG(hw
, IXGBE_B2OSPC
);
6482 hwstats
->b2ogprc
+= IXGBE_READ_REG(hw
, IXGBE_B2OGPRC
);
6483 case ixgbe_mac_82599EB
:
6484 for (i
= 0; i
< 16; i
++)
6485 adapter
->hw_rx_no_dma_resources
+=
6486 IXGBE_READ_REG(hw
, IXGBE_QPRDC(i
));
6487 hwstats
->gorc
+= IXGBE_READ_REG(hw
, IXGBE_GORCL
);
6488 IXGBE_READ_REG(hw
, IXGBE_GORCH
); /* to clear */
6489 hwstats
->gotc
+= IXGBE_READ_REG(hw
, IXGBE_GOTCL
);
6490 IXGBE_READ_REG(hw
, IXGBE_GOTCH
); /* to clear */
6491 hwstats
->tor
+= IXGBE_READ_REG(hw
, IXGBE_TORL
);
6492 IXGBE_READ_REG(hw
, IXGBE_TORH
); /* to clear */
6493 hwstats
->lxonrxc
+= IXGBE_READ_REG(hw
, IXGBE_LXONRXCNT
);
6494 hwstats
->fdirmatch
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMATCH
);
6495 hwstats
->fdirmiss
+= IXGBE_READ_REG(hw
, IXGBE_FDIRMISS
);
6497 hwstats
->fccrc
+= IXGBE_READ_REG(hw
, IXGBE_FCCRC
);
6498 hwstats
->fcoerpdc
+= IXGBE_READ_REG(hw
, IXGBE_FCOERPDC
);
6499 hwstats
->fcoeprc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPRC
);
6500 hwstats
->fcoeptc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEPTC
);
6501 hwstats
->fcoedwrc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWRC
);
6502 hwstats
->fcoedwtc
+= IXGBE_READ_REG(hw
, IXGBE_FCOEDWTC
);
6503 /* Add up per cpu counters for total ddp aloc fail */
6504 if (adapter
->fcoe
.ddp_pool
) {
6505 struct ixgbe_fcoe
*fcoe
= &adapter
->fcoe
;
6506 struct ixgbe_fcoe_ddp_pool
*ddp_pool
;
6508 u64 noddp
= 0, noddp_ext_buff
= 0;
6509 for_each_possible_cpu(cpu
) {
6510 ddp_pool
= per_cpu_ptr(fcoe
->ddp_pool
, cpu
);
6511 noddp
+= ddp_pool
->noddp
;
6512 noddp_ext_buff
+= ddp_pool
->noddp_ext_buff
;
6514 hwstats
->fcoe_noddp
= noddp
;
6515 hwstats
->fcoe_noddp_ext_buff
= noddp_ext_buff
;
6517 #endif /* IXGBE_FCOE */
6522 bprc
= IXGBE_READ_REG(hw
, IXGBE_BPRC
);
6523 hwstats
->bprc
+= bprc
;
6524 hwstats
->mprc
+= IXGBE_READ_REG(hw
, IXGBE_MPRC
);
6525 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
6526 hwstats
->mprc
-= bprc
;
6527 hwstats
->roc
+= IXGBE_READ_REG(hw
, IXGBE_ROC
);
6528 hwstats
->prc64
+= IXGBE_READ_REG(hw
, IXGBE_PRC64
);
6529 hwstats
->prc127
+= IXGBE_READ_REG(hw
, IXGBE_PRC127
);
6530 hwstats
->prc255
+= IXGBE_READ_REG(hw
, IXGBE_PRC255
);
6531 hwstats
->prc511
+= IXGBE_READ_REG(hw
, IXGBE_PRC511
);
6532 hwstats
->prc1023
+= IXGBE_READ_REG(hw
, IXGBE_PRC1023
);
6533 hwstats
->prc1522
+= IXGBE_READ_REG(hw
, IXGBE_PRC1522
);
6534 hwstats
->rlec
+= IXGBE_READ_REG(hw
, IXGBE_RLEC
);
6535 lxon
= IXGBE_READ_REG(hw
, IXGBE_LXONTXC
);
6536 hwstats
->lxontxc
+= lxon
;
6537 lxoff
= IXGBE_READ_REG(hw
, IXGBE_LXOFFTXC
);
6538 hwstats
->lxofftxc
+= lxoff
;
6539 hwstats
->gptc
+= IXGBE_READ_REG(hw
, IXGBE_GPTC
);
6540 hwstats
->mptc
+= IXGBE_READ_REG(hw
, IXGBE_MPTC
);
6542 * 82598 errata - tx of flow control packets is included in tx counters
6544 xon_off_tot
= lxon
+ lxoff
;
6545 hwstats
->gptc
-= xon_off_tot
;
6546 hwstats
->mptc
-= xon_off_tot
;
6547 hwstats
->gotc
-= (xon_off_tot
* (ETH_ZLEN
+ ETH_FCS_LEN
));
6548 hwstats
->ruc
+= IXGBE_READ_REG(hw
, IXGBE_RUC
);
6549 hwstats
->rfc
+= IXGBE_READ_REG(hw
, IXGBE_RFC
);
6550 hwstats
->rjc
+= IXGBE_READ_REG(hw
, IXGBE_RJC
);
6551 hwstats
->tpr
+= IXGBE_READ_REG(hw
, IXGBE_TPR
);
6552 hwstats
->ptc64
+= IXGBE_READ_REG(hw
, IXGBE_PTC64
);
6553 hwstats
->ptc64
-= xon_off_tot
;
6554 hwstats
->ptc127
+= IXGBE_READ_REG(hw
, IXGBE_PTC127
);
6555 hwstats
->ptc255
+= IXGBE_READ_REG(hw
, IXGBE_PTC255
);
6556 hwstats
->ptc511
+= IXGBE_READ_REG(hw
, IXGBE_PTC511
);
6557 hwstats
->ptc1023
+= IXGBE_READ_REG(hw
, IXGBE_PTC1023
);
6558 hwstats
->ptc1522
+= IXGBE_READ_REG(hw
, IXGBE_PTC1522
);
6559 hwstats
->bptc
+= IXGBE_READ_REG(hw
, IXGBE_BPTC
);
6561 /* Fill out the OS statistics structure */
6562 netdev
->stats
.multicast
= hwstats
->mprc
;
6565 netdev
->stats
.rx_errors
= hwstats
->crcerrs
+ hwstats
->rlec
;
6566 netdev
->stats
.rx_dropped
= 0;
6567 netdev
->stats
.rx_length_errors
= hwstats
->rlec
;
6568 netdev
->stats
.rx_crc_errors
= hwstats
->crcerrs
;
6569 netdev
->stats
.rx_missed_errors
= total_mpc
;
6573 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
6574 * @adapter: pointer to the device adapter structure
6576 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter
*adapter
)
6578 struct ixgbe_hw
*hw
= &adapter
->hw
;
6581 if (!(adapter
->flags2
& IXGBE_FLAG2_FDIR_REQUIRES_REINIT
))
6584 adapter
->flags2
&= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT
;
6586 /* if interface is down do nothing */
6587 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
6590 /* do nothing if we are not using signature filters */
6591 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_HASH_CAPABLE
))
6594 adapter
->fdir_overflow
++;
6596 if (ixgbe_reinit_fdir_tables_82599(hw
) == 0) {
6597 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6598 set_bit(__IXGBE_TX_FDIR_INIT_DONE
,
6599 &(adapter
->tx_ring
[i
]->state
));
6600 /* re-enable flow director interrupts */
6601 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMS_FLOW_DIR
);
6603 e_err(probe
, "failed to finish FDIR re-initialization, "
6604 "ignored adding FDIR ATR filters\n");
6609 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
6610 * @adapter: pointer to the device adapter structure
6612 * This function serves two purposes. First it strobes the interrupt lines
6613 * in order to make certain interrupts are occurring. Secondly it sets the
6614 * bits needed to check for TX hangs. As a result we should immediately
6615 * determine if a hang has occurred.
6617 static void ixgbe_check_hang_subtask(struct ixgbe_adapter
*adapter
)
6619 struct ixgbe_hw
*hw
= &adapter
->hw
;
6623 /* If we're down, removing or resetting, just bail */
6624 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
6625 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
6626 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
6629 /* Force detection of hung controller */
6630 if (netif_carrier_ok(adapter
->netdev
)) {
6631 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
6632 set_check_for_tx_hang(adapter
->tx_ring
[i
]);
6635 if (!(adapter
->flags
& IXGBE_FLAG_MSIX_ENABLED
)) {
6637 * for legacy and MSI interrupts don't set any bits
6638 * that are enabled for EIAM, because this operation
6639 * would set *both* EIMS and EICS for any bit in EIAM
6641 IXGBE_WRITE_REG(hw
, IXGBE_EICS
,
6642 (IXGBE_EICS_TCP_TIMER
| IXGBE_EICS_OTHER
));
6644 /* get one bit for every active tx/rx interrupt vector */
6645 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
6646 struct ixgbe_q_vector
*qv
= adapter
->q_vector
[i
];
6647 if (qv
->rx
.ring
|| qv
->tx
.ring
)
6648 eics
|= ((u64
)1 << i
);
6652 /* Cause software interrupt to ensure rings are cleaned */
6653 ixgbe_irq_rearm_queues(adapter
, eics
);
6657 * ixgbe_watchdog_update_link - update the link status
6658 * @adapter: pointer to the device adapter structure
6659 * @link_speed: pointer to a u32 to store the link_speed
6661 static void ixgbe_watchdog_update_link(struct ixgbe_adapter
*adapter
)
6663 struct ixgbe_hw
*hw
= &adapter
->hw
;
6664 u32 link_speed
= adapter
->link_speed
;
6665 bool link_up
= adapter
->link_up
;
6666 bool pfc_en
= adapter
->dcb_cfg
.pfc_mode_enable
;
6668 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
))
6671 if (hw
->mac
.ops
.check_link
) {
6672 hw
->mac
.ops
.check_link(hw
, &link_speed
, &link_up
, false);
6674 /* always assume link is up, if no check link function */
6675 link_speed
= IXGBE_LINK_SPEED_10GB_FULL
;
6679 /* If Crosstalk fix enabled do the sanity check of making sure
6680 * the SFP+ cage is empty.
6682 if (adapter
->need_crosstalk_fix
) {
6685 sfp_cage_full
= IXGBE_READ_REG(hw
, IXGBE_ESDP
) &
6687 if (ixgbe_is_sfp(hw
) && link_up
&& !sfp_cage_full
)
6691 if (adapter
->ixgbe_ieee_pfc
)
6692 pfc_en
|= !!(adapter
->ixgbe_ieee_pfc
->pfc_en
);
6694 if (link_up
&& !((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) && pfc_en
)) {
6695 hw
->mac
.ops
.fc_enable(hw
);
6696 ixgbe_set_rx_drop_en(adapter
);
6700 time_after(jiffies
, (adapter
->link_check_timeout
+
6701 IXGBE_TRY_LINK_TIMEOUT
))) {
6702 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_UPDATE
;
6703 IXGBE_WRITE_REG(hw
, IXGBE_EIMS
, IXGBE_EIMC_LSC
);
6704 IXGBE_WRITE_FLUSH(hw
);
6707 adapter
->link_up
= link_up
;
6708 adapter
->link_speed
= link_speed
;
6711 static void ixgbe_update_default_up(struct ixgbe_adapter
*adapter
)
6713 #ifdef CONFIG_IXGBE_DCB
6714 struct net_device
*netdev
= adapter
->netdev
;
6715 struct dcb_app app
= {
6716 .selector
= IEEE_8021QAZ_APP_SEL_ETHERTYPE
,
6721 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_IEEE
)
6722 up
= dcb_ieee_getapp_mask(netdev
, &app
);
6724 adapter
->default_up
= (up
> 1) ? (ffs(up
) - 1) : 0;
6729 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6730 * print link up message
6731 * @adapter: pointer to the device adapter structure
6733 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter
*adapter
)
6735 struct net_device
*netdev
= adapter
->netdev
;
6736 struct ixgbe_hw
*hw
= &adapter
->hw
;
6737 struct net_device
*upper
;
6738 struct list_head
*iter
;
6739 u32 link_speed
= adapter
->link_speed
;
6740 const char *speed_str
;
6741 bool flow_rx
, flow_tx
;
6743 /* only continue if link was previously down */
6744 if (netif_carrier_ok(netdev
))
6747 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
6749 switch (hw
->mac
.type
) {
6750 case ixgbe_mac_82598EB
: {
6751 u32 frctl
= IXGBE_READ_REG(hw
, IXGBE_FCTRL
);
6752 u32 rmcs
= IXGBE_READ_REG(hw
, IXGBE_RMCS
);
6753 flow_rx
= !!(frctl
& IXGBE_FCTRL_RFCE
);
6754 flow_tx
= !!(rmcs
& IXGBE_RMCS_TFCE_802_3X
);
6757 case ixgbe_mac_X540
:
6758 case ixgbe_mac_X550
:
6759 case ixgbe_mac_X550EM_x
:
6760 case ixgbe_mac_x550em_a
:
6761 case ixgbe_mac_82599EB
: {
6762 u32 mflcn
= IXGBE_READ_REG(hw
, IXGBE_MFLCN
);
6763 u32 fccfg
= IXGBE_READ_REG(hw
, IXGBE_FCCFG
);
6764 flow_rx
= !!(mflcn
& IXGBE_MFLCN_RFCE
);
6765 flow_tx
= !!(fccfg
& IXGBE_FCCFG_TFCE_802_3X
);
6774 adapter
->last_rx_ptp_check
= jiffies
;
6776 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6777 ixgbe_ptp_start_cyclecounter(adapter
);
6779 switch (link_speed
) {
6780 case IXGBE_LINK_SPEED_10GB_FULL
:
6781 speed_str
= "10 Gbps";
6783 case IXGBE_LINK_SPEED_2_5GB_FULL
:
6784 speed_str
= "2.5 Gbps";
6786 case IXGBE_LINK_SPEED_1GB_FULL
:
6787 speed_str
= "1 Gbps";
6789 case IXGBE_LINK_SPEED_100_FULL
:
6790 speed_str
= "100 Mbps";
6793 speed_str
= "unknown speed";
6796 e_info(drv
, "NIC Link is Up %s, Flow Control: %s\n", speed_str
,
6797 ((flow_rx
&& flow_tx
) ? "RX/TX" :
6799 (flow_tx
? "TX" : "None"))));
6801 netif_carrier_on(netdev
);
6802 ixgbe_check_vf_rate_limit(adapter
);
6804 /* enable transmits */
6805 netif_tx_wake_all_queues(adapter
->netdev
);
6807 /* enable any upper devices */
6809 netdev_for_each_all_upper_dev_rcu(adapter
->netdev
, upper
, iter
) {
6810 if (netif_is_macvlan(upper
)) {
6811 struct macvlan_dev
*vlan
= netdev_priv(upper
);
6814 netif_tx_wake_all_queues(upper
);
6819 /* update the default user priority for VFs */
6820 ixgbe_update_default_up(adapter
);
6822 /* ping all the active vfs to let them know link has changed */
6823 ixgbe_ping_all_vfs(adapter
);
6827 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6828 * print link down message
6829 * @adapter: pointer to the adapter structure
6831 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter
*adapter
)
6833 struct net_device
*netdev
= adapter
->netdev
;
6834 struct ixgbe_hw
*hw
= &adapter
->hw
;
6836 adapter
->link_up
= false;
6837 adapter
->link_speed
= 0;
6839 /* only continue if link was up previously */
6840 if (!netif_carrier_ok(netdev
))
6843 /* poll for SFP+ cable when link is down */
6844 if (ixgbe_is_sfp(hw
) && hw
->mac
.type
== ixgbe_mac_82598EB
)
6845 adapter
->flags2
|= IXGBE_FLAG2_SEARCH_FOR_SFP
;
6847 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
))
6848 ixgbe_ptp_start_cyclecounter(adapter
);
6850 e_info(drv
, "NIC Link is Down\n");
6851 netif_carrier_off(netdev
);
6853 /* ping all the active vfs to let them know link has changed */
6854 ixgbe_ping_all_vfs(adapter
);
6857 static bool ixgbe_ring_tx_pending(struct ixgbe_adapter
*adapter
)
6861 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
6862 struct ixgbe_ring
*tx_ring
= adapter
->tx_ring
[i
];
6864 if (tx_ring
->next_to_use
!= tx_ring
->next_to_clean
)
6871 static bool ixgbe_vf_tx_pending(struct ixgbe_adapter
*adapter
)
6873 struct ixgbe_hw
*hw
= &adapter
->hw
;
6874 struct ixgbe_ring_feature
*vmdq
= &adapter
->ring_feature
[RING_F_VMDQ
];
6875 u32 q_per_pool
= __ALIGN_MASK(1, ~vmdq
->mask
);
6879 if (!adapter
->num_vfs
)
6882 /* resetting the PF is only needed for MAC before X550 */
6883 if (hw
->mac
.type
>= ixgbe_mac_X550
)
6886 for (i
= 0; i
< adapter
->num_vfs
; i
++) {
6887 for (j
= 0; j
< q_per_pool
; j
++) {
6890 h
= IXGBE_READ_REG(hw
, IXGBE_PVFTDHN(q_per_pool
, i
, j
));
6891 t
= IXGBE_READ_REG(hw
, IXGBE_PVFTDTN(q_per_pool
, i
, j
));
6902 * ixgbe_watchdog_flush_tx - flush queues on link down
6903 * @adapter: pointer to the device adapter structure
6905 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter
*adapter
)
6907 if (!netif_carrier_ok(adapter
->netdev
)) {
6908 if (ixgbe_ring_tx_pending(adapter
) ||
6909 ixgbe_vf_tx_pending(adapter
)) {
6910 /* We've lost link, so the controller stops DMA,
6911 * but we've got queued Tx work that's never going
6912 * to get done, so reset controller to flush Tx.
6913 * (Do the reset outside of interrupt context).
6915 e_warn(drv
, "initiating reset to clear Tx work after link loss\n");
6916 adapter
->flags2
|= IXGBE_FLAG2_RESET_REQUESTED
;
6921 #ifdef CONFIG_PCI_IOV
6922 static inline void ixgbe_issue_vf_flr(struct ixgbe_adapter
*adapter
,
6923 struct pci_dev
*vfdev
)
6925 if (!pci_wait_for_pending_transaction(vfdev
))
6926 e_dev_warn("Issuing VFLR with pending transactions\n");
6928 e_dev_err("Issuing VFLR for VF %s\n", pci_name(vfdev
));
6929 pcie_capability_set_word(vfdev
, PCI_EXP_DEVCTL
, PCI_EXP_DEVCTL_BCR_FLR
);
6934 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter
*adapter
)
6936 struct ixgbe_hw
*hw
= &adapter
->hw
;
6937 struct pci_dev
*pdev
= adapter
->pdev
;
6941 if (!(netif_carrier_ok(adapter
->netdev
)))
6944 gpc
= IXGBE_READ_REG(hw
, IXGBE_TXDGPC
);
6945 if (gpc
) /* If incrementing then no need for the check below */
6947 /* Check to see if a bad DMA write target from an errant or
6948 * malicious VF has caused a PCIe error. If so then we can
6949 * issue a VFLR to the offending VF(s) and then resume without
6950 * requesting a full slot reset.
6956 /* check status reg for all VFs owned by this PF */
6957 for (vf
= 0; vf
< adapter
->num_vfs
; ++vf
) {
6958 struct pci_dev
*vfdev
= adapter
->vfinfo
[vf
].vfdev
;
6963 pci_read_config_word(vfdev
, PCI_STATUS
, &status_reg
);
6964 if (status_reg
!= IXGBE_FAILED_READ_CFG_WORD
&&
6965 status_reg
& PCI_STATUS_REC_MASTER_ABORT
)
6966 ixgbe_issue_vf_flr(adapter
, vfdev
);
6970 static void ixgbe_spoof_check(struct ixgbe_adapter
*adapter
)
6974 /* Do not perform spoof check for 82598 or if not in IOV mode */
6975 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
6976 adapter
->num_vfs
== 0)
6979 ssvpc
= IXGBE_READ_REG(&adapter
->hw
, IXGBE_SSVPC
);
6982 * ssvpc register is cleared on read, if zero then no
6983 * spoofed packets in the last interval.
6988 e_warn(drv
, "%u Spoofed packets detected\n", ssvpc
);
6991 static void ixgbe_spoof_check(struct ixgbe_adapter __always_unused
*adapter
)
6996 ixgbe_check_for_bad_vf(struct ixgbe_adapter __always_unused
*adapter
)
6999 #endif /* CONFIG_PCI_IOV */
7003 * ixgbe_watchdog_subtask - check and bring link up
7004 * @adapter: pointer to the device adapter structure
7006 static void ixgbe_watchdog_subtask(struct ixgbe_adapter
*adapter
)
7008 /* if interface is down, removing or resetting, do nothing */
7009 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7010 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7011 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7014 ixgbe_watchdog_update_link(adapter
);
7016 if (adapter
->link_up
)
7017 ixgbe_watchdog_link_is_up(adapter
);
7019 ixgbe_watchdog_link_is_down(adapter
);
7021 ixgbe_check_for_bad_vf(adapter
);
7022 ixgbe_spoof_check(adapter
);
7023 ixgbe_update_stats(adapter
);
7025 ixgbe_watchdog_flush_tx(adapter
);
7029 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
7030 * @adapter: the ixgbe adapter structure
7032 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter
*adapter
)
7034 struct ixgbe_hw
*hw
= &adapter
->hw
;
7037 /* If crosstalk fix enabled verify the SFP+ cage is full */
7038 if (adapter
->need_crosstalk_fix
) {
7041 sfp_cage_full
= IXGBE_READ_REG(hw
, IXGBE_ESDP
) &
7047 /* not searching for SFP so there is nothing to do here */
7048 if (!(adapter
->flags2
& IXGBE_FLAG2_SEARCH_FOR_SFP
) &&
7049 !(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7052 if (adapter
->sfp_poll_time
&&
7053 time_after(adapter
->sfp_poll_time
, jiffies
))
7054 return; /* If not yet time to poll for SFP */
7056 /* someone else is in init, wait until next service event */
7057 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7060 adapter
->sfp_poll_time
= jiffies
+ IXGBE_SFP_POLL_JIFFIES
- 1;
7062 err
= hw
->phy
.ops
.identify_sfp(hw
);
7063 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7066 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
7067 /* If no cable is present, then we need to reset
7068 * the next time we find a good cable. */
7069 adapter
->flags2
|= IXGBE_FLAG2_SFP_NEEDS_RESET
;
7076 /* exit if reset not needed */
7077 if (!(adapter
->flags2
& IXGBE_FLAG2_SFP_NEEDS_RESET
))
7080 adapter
->flags2
&= ~IXGBE_FLAG2_SFP_NEEDS_RESET
;
7083 * A module may be identified correctly, but the EEPROM may not have
7084 * support for that module. setup_sfp() will fail in that case, so
7085 * we should not allow that module to load.
7087 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
7088 err
= hw
->phy
.ops
.reset(hw
);
7090 err
= hw
->mac
.ops
.setup_sfp(hw
);
7092 if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
)
7095 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_CONFIG
;
7096 e_info(probe
, "detected SFP+: %d\n", hw
->phy
.sfp_type
);
7099 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7101 if ((err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) &&
7102 (adapter
->netdev
->reg_state
== NETREG_REGISTERED
)) {
7103 e_dev_err("failed to initialize because an unsupported "
7104 "SFP+ module type was detected.\n");
7105 e_dev_err("Reload the driver after installing a "
7106 "supported module.\n");
7107 unregister_netdev(adapter
->netdev
);
7112 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
7113 * @adapter: the ixgbe adapter structure
7115 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter
*adapter
)
7117 struct ixgbe_hw
*hw
= &adapter
->hw
;
7119 bool autoneg
= false;
7121 if (!(adapter
->flags
& IXGBE_FLAG_NEED_LINK_CONFIG
))
7124 /* someone else is in init, wait until next service event */
7125 if (test_and_set_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
))
7128 adapter
->flags
&= ~IXGBE_FLAG_NEED_LINK_CONFIG
;
7130 speed
= hw
->phy
.autoneg_advertised
;
7131 if ((!speed
) && (hw
->mac
.ops
.get_link_capabilities
)) {
7132 hw
->mac
.ops
.get_link_capabilities(hw
, &speed
, &autoneg
);
7134 /* setup the highest link when no autoneg */
7136 if (speed
& IXGBE_LINK_SPEED_10GB_FULL
)
7137 speed
= IXGBE_LINK_SPEED_10GB_FULL
;
7141 if (hw
->mac
.ops
.setup_link
)
7142 hw
->mac
.ops
.setup_link(hw
, speed
, true);
7144 adapter
->flags
|= IXGBE_FLAG_NEED_LINK_UPDATE
;
7145 adapter
->link_check_timeout
= jiffies
;
7146 clear_bit(__IXGBE_IN_SFP_INIT
, &adapter
->state
);
7150 * ixgbe_service_timer - Timer Call-back
7151 * @data: pointer to adapter cast into an unsigned long
7153 static void ixgbe_service_timer(unsigned long data
)
7155 struct ixgbe_adapter
*adapter
= (struct ixgbe_adapter
*)data
;
7156 unsigned long next_event_offset
;
7158 /* poll faster when waiting for link */
7159 if (adapter
->flags
& IXGBE_FLAG_NEED_LINK_UPDATE
)
7160 next_event_offset
= HZ
/ 10;
7162 next_event_offset
= HZ
* 2;
7164 /* Reset the timer */
7165 mod_timer(&adapter
->service_timer
, next_event_offset
+ jiffies
);
7167 ixgbe_service_event_schedule(adapter
);
7170 static void ixgbe_phy_interrupt_subtask(struct ixgbe_adapter
*adapter
)
7172 struct ixgbe_hw
*hw
= &adapter
->hw
;
7175 if (!(adapter
->flags2
& IXGBE_FLAG2_PHY_INTERRUPT
))
7178 adapter
->flags2
&= ~IXGBE_FLAG2_PHY_INTERRUPT
;
7180 if (!hw
->phy
.ops
.handle_lasi
)
7183 status
= hw
->phy
.ops
.handle_lasi(&adapter
->hw
);
7184 if (status
!= IXGBE_ERR_OVERTEMP
)
7187 e_crit(drv
, "%s\n", ixgbe_overheat_msg
);
7190 static void ixgbe_reset_subtask(struct ixgbe_adapter
*adapter
)
7192 if (!(adapter
->flags2
& IXGBE_FLAG2_RESET_REQUESTED
))
7195 adapter
->flags2
&= ~IXGBE_FLAG2_RESET_REQUESTED
;
7197 /* If we're already down, removing or resetting, just bail */
7198 if (test_bit(__IXGBE_DOWN
, &adapter
->state
) ||
7199 test_bit(__IXGBE_REMOVING
, &adapter
->state
) ||
7200 test_bit(__IXGBE_RESETTING
, &adapter
->state
))
7203 ixgbe_dump(adapter
);
7204 netdev_err(adapter
->netdev
, "Reset adapter\n");
7205 adapter
->tx_timeout_count
++;
7208 ixgbe_reinit_locked(adapter
);
7213 * ixgbe_service_task - manages and runs subtasks
7214 * @work: pointer to work_struct containing our data
7216 static void ixgbe_service_task(struct work_struct
*work
)
7218 struct ixgbe_adapter
*adapter
= container_of(work
,
7219 struct ixgbe_adapter
,
7221 if (ixgbe_removed(adapter
->hw
.hw_addr
)) {
7222 if (!test_bit(__IXGBE_DOWN
, &adapter
->state
)) {
7224 ixgbe_down(adapter
);
7227 ixgbe_service_event_complete(adapter
);
7230 #ifdef CONFIG_IXGBE_VXLAN
7232 if (adapter
->flags2
& IXGBE_FLAG2_VXLAN_REREG_NEEDED
) {
7233 adapter
->flags2
&= ~IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
7234 vxlan_get_rx_port(adapter
->netdev
);
7237 #endif /* CONFIG_IXGBE_VXLAN */
7238 ixgbe_reset_subtask(adapter
);
7239 ixgbe_phy_interrupt_subtask(adapter
);
7240 ixgbe_sfp_detection_subtask(adapter
);
7241 ixgbe_sfp_link_config_subtask(adapter
);
7242 ixgbe_check_overtemp_subtask(adapter
);
7243 ixgbe_watchdog_subtask(adapter
);
7244 ixgbe_fdir_reinit_subtask(adapter
);
7245 ixgbe_check_hang_subtask(adapter
);
7247 if (test_bit(__IXGBE_PTP_RUNNING
, &adapter
->state
)) {
7248 ixgbe_ptp_overflow_check(adapter
);
7249 ixgbe_ptp_rx_hang(adapter
);
7252 ixgbe_service_event_complete(adapter
);
7255 static int ixgbe_tso(struct ixgbe_ring
*tx_ring
,
7256 struct ixgbe_tx_buffer
*first
,
7259 struct sk_buff
*skb
= first
->skb
;
7260 u32 vlan_macip_lens
, type_tucmd
;
7261 u32 mss_l4len_idx
, l4len
;
7264 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
7267 if (!skb_is_gso(skb
))
7270 err
= skb_cow_head(skb
, 0);
7274 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
7275 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7277 if (first
->protocol
== htons(ETH_P_IP
)) {
7278 struct iphdr
*iph
= ip_hdr(skb
);
7281 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
,
7285 type_tucmd
|= IXGBE_ADVTXD_TUCMD_IPV4
;
7286 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7287 IXGBE_TX_FLAGS_CSUM
|
7288 IXGBE_TX_FLAGS_IPV4
;
7289 } else if (skb_is_gso_v6(skb
)) {
7290 ipv6_hdr(skb
)->payload_len
= 0;
7291 tcp_hdr(skb
)->check
=
7292 ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
7293 &ipv6_hdr(skb
)->daddr
,
7295 first
->tx_flags
|= IXGBE_TX_FLAGS_TSO
|
7296 IXGBE_TX_FLAGS_CSUM
;
7299 /* compute header lengths */
7300 l4len
= tcp_hdrlen(skb
);
7301 *hdr_len
= skb_transport_offset(skb
) + l4len
;
7303 /* update gso size and bytecount with header size */
7304 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
7305 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
7307 /* mss_l4len_id: use 0 as index for TSO */
7308 mss_l4len_idx
= l4len
<< IXGBE_ADVTXD_L4LEN_SHIFT
;
7309 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< IXGBE_ADVTXD_MSS_SHIFT
;
7311 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
7312 vlan_macip_lens
= skb_network_header_len(skb
);
7313 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
7314 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7316 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
,
7322 static inline bool ixgbe_ipv6_csum_is_sctp(struct sk_buff
*skb
)
7324 unsigned int offset
= 0;
7326 ipv6_find_hdr(skb
, &offset
, IPPROTO_SCTP
, NULL
, NULL
);
7328 return offset
== skb_checksum_start_offset(skb
);
7331 static void ixgbe_tx_csum(struct ixgbe_ring
*tx_ring
,
7332 struct ixgbe_tx_buffer
*first
)
7334 struct sk_buff
*skb
= first
->skb
;
7335 u32 vlan_macip_lens
= 0;
7338 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
7340 if (!(first
->tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
|
7341 IXGBE_TX_FLAGS_CC
)))
7346 switch (skb
->csum_offset
) {
7347 case offsetof(struct tcphdr
, check
):
7348 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_TCP
;
7350 case offsetof(struct udphdr
, check
):
7352 case offsetof(struct sctphdr
, checksum
):
7353 /* validate that this is actually an SCTP request */
7354 if (((first
->protocol
== htons(ETH_P_IP
)) &&
7355 (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)) ||
7356 ((first
->protocol
== htons(ETH_P_IPV6
)) &&
7357 ixgbe_ipv6_csum_is_sctp(skb
))) {
7358 type_tucmd
= IXGBE_ADVTXD_TUCMD_L4T_SCTP
;
7363 skb_checksum_help(skb
);
7367 /* update TX checksum flag */
7368 first
->tx_flags
|= IXGBE_TX_FLAGS_CSUM
;
7369 vlan_macip_lens
= skb_checksum_start_offset(skb
) -
7370 skb_network_offset(skb
);
7372 /* vlan_macip_lens: MACLEN, VLAN tag */
7373 vlan_macip_lens
|= skb_network_offset(skb
) << IXGBE_ADVTXD_MACLEN_SHIFT
;
7374 vlan_macip_lens
|= first
->tx_flags
& IXGBE_TX_FLAGS_VLAN_MASK
;
7376 ixgbe_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, 0, type_tucmd
, 0);
7379 #define IXGBE_SET_FLAG(_input, _flag, _result) \
7380 ((_flag <= _result) ? \
7381 ((u32)(_input & _flag) * (_result / _flag)) : \
7382 ((u32)(_input & _flag) / (_flag / _result)))
7384 static u32
ixgbe_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
7386 /* set type for advanced descriptor with frame checksum insertion */
7387 u32 cmd_type
= IXGBE_ADVTXD_DTYP_DATA
|
7388 IXGBE_ADVTXD_DCMD_DEXT
|
7389 IXGBE_ADVTXD_DCMD_IFCS
;
7391 /* set HW vlan bit if vlan is present */
7392 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_HW_VLAN
,
7393 IXGBE_ADVTXD_DCMD_VLE
);
7395 /* set segmentation enable bits for TSO/FSO */
7396 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSO
,
7397 IXGBE_ADVTXD_DCMD_TSE
);
7399 /* set timestamp bit if present */
7400 cmd_type
|= IXGBE_SET_FLAG(tx_flags
, IXGBE_TX_FLAGS_TSTAMP
,
7401 IXGBE_ADVTXD_MAC_TSTAMP
);
7403 /* insert frame checksum */
7404 cmd_type
^= IXGBE_SET_FLAG(skb
->no_fcs
, 1, IXGBE_ADVTXD_DCMD_IFCS
);
7409 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc
*tx_desc
,
7410 u32 tx_flags
, unsigned int paylen
)
7412 u32 olinfo_status
= paylen
<< IXGBE_ADVTXD_PAYLEN_SHIFT
;
7414 /* enable L4 checksum for TSO and TX checksum offload */
7415 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7416 IXGBE_TX_FLAGS_CSUM
,
7417 IXGBE_ADVTXD_POPTS_TXSM
);
7419 /* enble IPv4 checksum for TSO */
7420 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7421 IXGBE_TX_FLAGS_IPV4
,
7422 IXGBE_ADVTXD_POPTS_IXSM
);
7425 * Check Context must be set if Tx switch is enabled, which it
7426 * always is for case where virtual functions are running
7428 olinfo_status
|= IXGBE_SET_FLAG(tx_flags
,
7432 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
7435 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7437 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7439 /* Herbert's original patch had:
7440 * smp_mb__after_netif_stop_queue();
7441 * but since that doesn't exist yet, just open code it.
7445 /* We need to check again in a case another CPU has just
7446 * made room available.
7448 if (likely(ixgbe_desc_unused(tx_ring
) < size
))
7451 /* A reprieve! - use start_queue because it doesn't call schedule */
7452 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
7453 ++tx_ring
->tx_stats
.restart_queue
;
7457 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring
*tx_ring
, u16 size
)
7459 if (likely(ixgbe_desc_unused(tx_ring
) >= size
))
7462 return __ixgbe_maybe_stop_tx(tx_ring
, size
);
7465 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
7468 static void ixgbe_tx_map(struct ixgbe_ring
*tx_ring
,
7469 struct ixgbe_tx_buffer
*first
,
7472 struct sk_buff
*skb
= first
->skb
;
7473 struct ixgbe_tx_buffer
*tx_buffer
;
7474 union ixgbe_adv_tx_desc
*tx_desc
;
7475 struct skb_frag_struct
*frag
;
7477 unsigned int data_len
, size
;
7478 u32 tx_flags
= first
->tx_flags
;
7479 u32 cmd_type
= ixgbe_tx_cmd_type(skb
, tx_flags
);
7480 u16 i
= tx_ring
->next_to_use
;
7482 tx_desc
= IXGBE_TX_DESC(tx_ring
, i
);
7484 ixgbe_tx_olinfo_status(tx_desc
, tx_flags
, skb
->len
- hdr_len
);
7486 size
= skb_headlen(skb
);
7487 data_len
= skb
->data_len
;
7490 if (tx_flags
& IXGBE_TX_FLAGS_FCOE
) {
7491 if (data_len
< sizeof(struct fcoe_crc_eof
)) {
7492 size
-= sizeof(struct fcoe_crc_eof
) - data_len
;
7495 data_len
-= sizeof(struct fcoe_crc_eof
);
7500 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
7504 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
7505 if (dma_mapping_error(tx_ring
->dev
, dma
))
7508 /* record length, and DMA address */
7509 dma_unmap_len_set(tx_buffer
, len
, size
);
7510 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
7512 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7514 while (unlikely(size
> IXGBE_MAX_DATA_PER_TXD
)) {
7515 tx_desc
->read
.cmd_type_len
=
7516 cpu_to_le32(cmd_type
^ IXGBE_MAX_DATA_PER_TXD
);
7520 if (i
== tx_ring
->count
) {
7521 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7524 tx_desc
->read
.olinfo_status
= 0;
7526 dma
+= IXGBE_MAX_DATA_PER_TXD
;
7527 size
-= IXGBE_MAX_DATA_PER_TXD
;
7529 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
7532 if (likely(!data_len
))
7535 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
7539 if (i
== tx_ring
->count
) {
7540 tx_desc
= IXGBE_TX_DESC(tx_ring
, 0);
7543 tx_desc
->read
.olinfo_status
= 0;
7546 size
= min_t(unsigned int, data_len
, skb_frag_size(frag
));
7548 size
= skb_frag_size(frag
);
7552 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
7555 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7558 /* write last descriptor with RS and EOP bits */
7559 cmd_type
|= size
| IXGBE_TXD_CMD
;
7560 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
7562 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
7564 /* set the timestamp */
7565 first
->time_stamp
= jiffies
;
7568 * Force memory writes to complete before letting h/w know there
7569 * are new descriptors to fetch. (Only applicable for weak-ordered
7570 * memory model archs, such as IA-64).
7572 * We also need this memory barrier to make certain all of the
7573 * status bits have been updated before next_to_watch is written.
7577 /* set next_to_watch value indicating a packet is present */
7578 first
->next_to_watch
= tx_desc
;
7581 if (i
== tx_ring
->count
)
7584 tx_ring
->next_to_use
= i
;
7586 ixgbe_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
7588 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
7589 writel(i
, tx_ring
->tail
);
7591 /* we need this if more than one processor can write to our tail
7592 * at a time, it synchronizes IO on IA64/Altix systems
7599 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
7601 /* clear dma mappings for failed tx_buffer_info map */
7603 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
7604 ixgbe_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
7605 if (tx_buffer
== first
)
7612 tx_ring
->next_to_use
= i
;
7615 static void ixgbe_atr(struct ixgbe_ring
*ring
,
7616 struct ixgbe_tx_buffer
*first
)
7618 struct ixgbe_q_vector
*q_vector
= ring
->q_vector
;
7619 union ixgbe_atr_hash_dword input
= { .dword
= 0 };
7620 union ixgbe_atr_hash_dword common
= { .dword
= 0 };
7622 unsigned char *network
;
7624 struct ipv6hdr
*ipv6
;
7628 struct sk_buff
*skb
;
7632 /* if ring doesn't have a interrupt vector, cannot perform ATR */
7636 /* do nothing if sampling is disabled */
7637 if (!ring
->atr_sample_rate
)
7642 /* currently only IPv4/IPv6 with TCP is supported */
7643 if ((first
->protocol
!= htons(ETH_P_IP
)) &&
7644 (first
->protocol
!= htons(ETH_P_IPV6
)))
7647 /* snag network header to get L4 type and address */
7649 hdr
.network
= skb_network_header(skb
);
7650 #ifdef CONFIG_IXGBE_VXLAN
7651 if (skb
->encapsulation
&&
7652 first
->protocol
== htons(ETH_P_IP
) &&
7653 hdr
.ipv4
->protocol
!= IPPROTO_UDP
) {
7654 struct ixgbe_adapter
*adapter
= q_vector
->adapter
;
7656 /* verify the port is recognized as VXLAN */
7657 if (adapter
->vxlan_port
&&
7658 udp_hdr(skb
)->dest
== adapter
->vxlan_port
)
7659 hdr
.network
= skb_inner_network_header(skb
);
7661 #endif /* CONFIG_IXGBE_VXLAN */
7663 /* Currently only IPv4/IPv6 with TCP is supported */
7664 switch (hdr
.ipv4
->version
) {
7666 /* access ihl as u8 to avoid unaligned access on ia64 */
7667 hlen
= (hdr
.network
[0] & 0x0F) << 2;
7668 l4_proto
= hdr
.ipv4
->protocol
;
7671 hlen
= hdr
.network
- skb
->data
;
7672 l4_proto
= ipv6_find_hdr(skb
, &hlen
, IPPROTO_TCP
, NULL
, NULL
);
7673 hlen
-= hdr
.network
- skb
->data
;
7679 if (l4_proto
!= IPPROTO_TCP
)
7682 th
= (struct tcphdr
*)(hdr
.network
+ hlen
);
7684 /* skip this packet since the socket is closing */
7688 /* sample on all syn packets or once every atr sample count */
7689 if (!th
->syn
&& (ring
->atr_count
< ring
->atr_sample_rate
))
7692 /* reset sample count */
7693 ring
->atr_count
= 0;
7695 vlan_id
= htons(first
->tx_flags
>> IXGBE_TX_FLAGS_VLAN_SHIFT
);
7698 * src and dst are inverted, think how the receiver sees them
7700 * The input is broken into two sections, a non-compressed section
7701 * containing vm_pool, vlan_id, and flow_type. The rest of the data
7702 * is XORed together and stored in the compressed dword.
7704 input
.formatted
.vlan_id
= vlan_id
;
7707 * since src port and flex bytes occupy the same word XOR them together
7708 * and write the value to source port portion of compressed dword
7710 if (first
->tx_flags
& (IXGBE_TX_FLAGS_SW_VLAN
| IXGBE_TX_FLAGS_HW_VLAN
))
7711 common
.port
.src
^= th
->dest
^ htons(ETH_P_8021Q
);
7713 common
.port
.src
^= th
->dest
^ first
->protocol
;
7714 common
.port
.dst
^= th
->source
;
7716 switch (hdr
.ipv4
->version
) {
7718 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV4
;
7719 common
.ip
^= hdr
.ipv4
->saddr
^ hdr
.ipv4
->daddr
;
7722 input
.formatted
.flow_type
= IXGBE_ATR_FLOW_TYPE_TCPV6
;
7723 common
.ip
^= hdr
.ipv6
->saddr
.s6_addr32
[0] ^
7724 hdr
.ipv6
->saddr
.s6_addr32
[1] ^
7725 hdr
.ipv6
->saddr
.s6_addr32
[2] ^
7726 hdr
.ipv6
->saddr
.s6_addr32
[3] ^
7727 hdr
.ipv6
->daddr
.s6_addr32
[0] ^
7728 hdr
.ipv6
->daddr
.s6_addr32
[1] ^
7729 hdr
.ipv6
->daddr
.s6_addr32
[2] ^
7730 hdr
.ipv6
->daddr
.s6_addr32
[3];
7736 if (hdr
.network
!= skb_network_header(skb
))
7737 input
.formatted
.flow_type
|= IXGBE_ATR_L4TYPE_TUNNEL_MASK
;
7739 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
7740 ixgbe_fdir_add_signature_filter_82599(&q_vector
->adapter
->hw
,
7741 input
, common
, ring
->queue_index
);
7744 static u16
ixgbe_select_queue(struct net_device
*dev
, struct sk_buff
*skb
,
7745 void *accel_priv
, select_queue_fallback_t fallback
)
7747 struct ixgbe_fwd_adapter
*fwd_adapter
= accel_priv
;
7749 struct ixgbe_adapter
*adapter
;
7750 struct ixgbe_ring_feature
*f
;
7755 return skb
->queue_mapping
+ fwd_adapter
->tx_base_queue
;
7760 * only execute the code below if protocol is FCoE
7761 * or FIP and we have FCoE enabled on the adapter
7763 switch (vlan_get_protocol(skb
)) {
7764 case htons(ETH_P_FCOE
):
7765 case htons(ETH_P_FIP
):
7766 adapter
= netdev_priv(dev
);
7768 if (adapter
->flags
& IXGBE_FLAG_FCOE_ENABLED
)
7771 return fallback(dev
, skb
);
7774 f
= &adapter
->ring_feature
[RING_F_FCOE
];
7776 txq
= skb_rx_queue_recorded(skb
) ? skb_get_rx_queue(skb
) :
7779 while (txq
>= f
->indices
)
7782 return txq
+ f
->offset
;
7784 return fallback(dev
, skb
);
7788 netdev_tx_t
ixgbe_xmit_frame_ring(struct sk_buff
*skb
,
7789 struct ixgbe_adapter
*adapter
,
7790 struct ixgbe_ring
*tx_ring
)
7792 struct ixgbe_tx_buffer
*first
;
7796 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
7797 __be16 protocol
= skb
->protocol
;
7801 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
7802 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
7803 * + 2 desc gap to keep tail from touching head,
7804 * + 1 desc for context descriptor,
7805 * otherwise try next time
7807 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
7808 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
7810 if (ixgbe_maybe_stop_tx(tx_ring
, count
+ 3)) {
7811 tx_ring
->tx_stats
.tx_busy
++;
7812 return NETDEV_TX_BUSY
;
7815 /* record the location of the first descriptor for this packet */
7816 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
7818 first
->bytecount
= skb
->len
;
7819 first
->gso_segs
= 1;
7821 /* if we have a HW VLAN tag being added default to the HW one */
7822 if (skb_vlan_tag_present(skb
)) {
7823 tx_flags
|= skb_vlan_tag_get(skb
) << IXGBE_TX_FLAGS_VLAN_SHIFT
;
7824 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7825 /* else if it is a SW VLAN check the next protocol and store the tag */
7826 } else if (protocol
== htons(ETH_P_8021Q
)) {
7827 struct vlan_hdr
*vhdr
, _vhdr
;
7828 vhdr
= skb_header_pointer(skb
, ETH_HLEN
, sizeof(_vhdr
), &_vhdr
);
7832 tx_flags
|= ntohs(vhdr
->h_vlan_TCI
) <<
7833 IXGBE_TX_FLAGS_VLAN_SHIFT
;
7834 tx_flags
|= IXGBE_TX_FLAGS_SW_VLAN
;
7836 protocol
= vlan_get_protocol(skb
);
7838 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
7839 adapter
->ptp_clock
&&
7840 !test_and_set_bit_lock(__IXGBE_PTP_TX_IN_PROGRESS
,
7842 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
7843 tx_flags
|= IXGBE_TX_FLAGS_TSTAMP
;
7845 /* schedule check for Tx timestamp */
7846 adapter
->ptp_tx_skb
= skb_get(skb
);
7847 adapter
->ptp_tx_start
= jiffies
;
7848 schedule_work(&adapter
->ptp_tx_work
);
7851 skb_tx_timestamp(skb
);
7853 #ifdef CONFIG_PCI_IOV
7855 * Use the l2switch_enable flag - would be false if the DMA
7856 * Tx switch had been disabled.
7858 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
)
7859 tx_flags
|= IXGBE_TX_FLAGS_CC
;
7862 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7863 if ((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
7864 ((tx_flags
& (IXGBE_TX_FLAGS_HW_VLAN
| IXGBE_TX_FLAGS_SW_VLAN
)) ||
7865 (skb
->priority
!= TC_PRIO_CONTROL
))) {
7866 tx_flags
&= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK
;
7867 tx_flags
|= (skb
->priority
& 0x7) <<
7868 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT
;
7869 if (tx_flags
& IXGBE_TX_FLAGS_SW_VLAN
) {
7870 struct vlan_ethhdr
*vhdr
;
7872 if (skb_cow_head(skb
, 0))
7874 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
7875 vhdr
->h_vlan_TCI
= htons(tx_flags
>>
7876 IXGBE_TX_FLAGS_VLAN_SHIFT
);
7878 tx_flags
|= IXGBE_TX_FLAGS_HW_VLAN
;
7882 /* record initial flags and protocol */
7883 first
->tx_flags
= tx_flags
;
7884 first
->protocol
= protocol
;
7887 /* setup tx offload for FCoE */
7888 if ((protocol
== htons(ETH_P_FCOE
)) &&
7889 (tx_ring
->netdev
->features
& (NETIF_F_FSO
| NETIF_F_FCOE_CRC
))) {
7890 tso
= ixgbe_fso(tx_ring
, first
, &hdr_len
);
7897 #endif /* IXGBE_FCOE */
7898 tso
= ixgbe_tso(tx_ring
, first
, &hdr_len
);
7902 ixgbe_tx_csum(tx_ring
, first
);
7904 /* add the ATR filter if ATR is on */
7905 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE
, &tx_ring
->state
))
7906 ixgbe_atr(tx_ring
, first
);
7910 #endif /* IXGBE_FCOE */
7911 ixgbe_tx_map(tx_ring
, first
, hdr_len
);
7913 return NETDEV_TX_OK
;
7916 dev_kfree_skb_any(first
->skb
);
7919 return NETDEV_TX_OK
;
7922 static netdev_tx_t
__ixgbe_xmit_frame(struct sk_buff
*skb
,
7923 struct net_device
*netdev
,
7924 struct ixgbe_ring
*ring
)
7926 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7927 struct ixgbe_ring
*tx_ring
;
7930 * The minimum packet size for olinfo paylen is 17 so pad the skb
7931 * in order to meet this minimum size requirement.
7933 if (skb_put_padto(skb
, 17))
7934 return NETDEV_TX_OK
;
7936 tx_ring
= ring
? ring
: adapter
->tx_ring
[skb
->queue_mapping
];
7938 return ixgbe_xmit_frame_ring(skb
, adapter
, tx_ring
);
7941 static netdev_tx_t
ixgbe_xmit_frame(struct sk_buff
*skb
,
7942 struct net_device
*netdev
)
7944 return __ixgbe_xmit_frame(skb
, netdev
, NULL
);
7948 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7949 * @netdev: network interface device structure
7950 * @p: pointer to an address structure
7952 * Returns 0 on success, negative on failure
7954 static int ixgbe_set_mac(struct net_device
*netdev
, void *p
)
7956 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7957 struct ixgbe_hw
*hw
= &adapter
->hw
;
7958 struct sockaddr
*addr
= p
;
7960 if (!is_valid_ether_addr(addr
->sa_data
))
7961 return -EADDRNOTAVAIL
;
7963 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
7964 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
7966 ixgbe_mac_set_default_filter(adapter
);
7972 ixgbe_mdio_read(struct net_device
*netdev
, int prtad
, int devad
, u16 addr
)
7974 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7975 struct ixgbe_hw
*hw
= &adapter
->hw
;
7979 if (prtad
!= hw
->phy
.mdio
.prtad
)
7981 rc
= hw
->phy
.ops
.read_reg(hw
, addr
, devad
, &value
);
7987 static int ixgbe_mdio_write(struct net_device
*netdev
, int prtad
, int devad
,
7988 u16 addr
, u16 value
)
7990 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
7991 struct ixgbe_hw
*hw
= &adapter
->hw
;
7993 if (prtad
!= hw
->phy
.mdio
.prtad
)
7995 return hw
->phy
.ops
.write_reg(hw
, addr
, devad
, value
);
7998 static int ixgbe_ioctl(struct net_device
*netdev
, struct ifreq
*req
, int cmd
)
8000 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8004 return ixgbe_ptp_set_ts_config(adapter
, req
);
8006 return ixgbe_ptp_get_ts_config(adapter
, req
);
8008 return mdio_mii_ioctl(&adapter
->hw
.phy
.mdio
, if_mii(req
), cmd
);
8013 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
8015 * @netdev: network interface device structure
8017 * Returns non-zero on failure
8019 static int ixgbe_add_sanmac_netdev(struct net_device
*dev
)
8022 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8023 struct ixgbe_hw
*hw
= &adapter
->hw
;
8025 if (is_valid_ether_addr(hw
->mac
.san_addr
)) {
8027 err
= dev_addr_add(dev
, hw
->mac
.san_addr
, NETDEV_HW_ADDR_T_SAN
);
8030 /* update SAN MAC vmdq pool selection */
8031 hw
->mac
.ops
.set_vmdq_san_mac(hw
, VMDQ_P(0));
8037 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
8039 * @netdev: network interface device structure
8041 * Returns non-zero on failure
8043 static int ixgbe_del_sanmac_netdev(struct net_device
*dev
)
8046 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8047 struct ixgbe_mac_info
*mac
= &adapter
->hw
.mac
;
8049 if (is_valid_ether_addr(mac
->san_addr
)) {
8051 err
= dev_addr_del(dev
, mac
->san_addr
, NETDEV_HW_ADDR_T_SAN
);
8057 #ifdef CONFIG_NET_POLL_CONTROLLER
8059 * Polling 'interrupt' - used by things like netconsole to send skbs
8060 * without having to re-enable interrupts. It's not called while
8061 * the interrupt routine is executing.
8063 static void ixgbe_netpoll(struct net_device
*netdev
)
8065 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8068 /* if interface is down do nothing */
8069 if (test_bit(__IXGBE_DOWN
, &adapter
->state
))
8072 /* loop through and schedule all active queues */
8073 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
8074 ixgbe_msix_clean_rings(0, adapter
->q_vector
[i
]);
8078 static struct rtnl_link_stats64
*ixgbe_get_stats64(struct net_device
*netdev
,
8079 struct rtnl_link_stats64
*stats
)
8081 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8085 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
8086 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->rx_ring
[i
]);
8092 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8093 packets
= ring
->stats
.packets
;
8094 bytes
= ring
->stats
.bytes
;
8095 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8096 stats
->rx_packets
+= packets
;
8097 stats
->rx_bytes
+= bytes
;
8101 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
8102 struct ixgbe_ring
*ring
= ACCESS_ONCE(adapter
->tx_ring
[i
]);
8108 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
8109 packets
= ring
->stats
.packets
;
8110 bytes
= ring
->stats
.bytes
;
8111 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
8112 stats
->tx_packets
+= packets
;
8113 stats
->tx_bytes
+= bytes
;
8117 /* following stats updated by ixgbe_watchdog_task() */
8118 stats
->multicast
= netdev
->stats
.multicast
;
8119 stats
->rx_errors
= netdev
->stats
.rx_errors
;
8120 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
8121 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
8122 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
8126 #ifdef CONFIG_IXGBE_DCB
8128 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
8129 * @adapter: pointer to ixgbe_adapter
8130 * @tc: number of traffic classes currently enabled
8132 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
8133 * 802.1Q priority maps to a packet buffer that exists.
8135 static void ixgbe_validate_rtr(struct ixgbe_adapter
*adapter
, u8 tc
)
8137 struct ixgbe_hw
*hw
= &adapter
->hw
;
8141 /* 82598 have a static priority to TC mapping that can not
8142 * be changed so no validation is needed.
8144 if (hw
->mac
.type
== ixgbe_mac_82598EB
)
8147 reg
= IXGBE_READ_REG(hw
, IXGBE_RTRUP2TC
);
8150 for (i
= 0; i
< MAX_TRAFFIC_CLASS
; i
++) {
8151 u8 up2tc
= reg
>> (i
* IXGBE_RTRUP2TC_UP_SHIFT
);
8153 /* If up2tc is out of bounds default to zero */
8155 reg
&= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT
);
8159 IXGBE_WRITE_REG(hw
, IXGBE_RTRUP2TC
, reg
);
8165 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
8166 * @adapter: Pointer to adapter struct
8168 * Populate the netdev user priority to tc map
8170 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter
*adapter
)
8172 struct net_device
*dev
= adapter
->netdev
;
8173 struct ixgbe_dcb_config
*dcb_cfg
= &adapter
->dcb_cfg
;
8174 struct ieee_ets
*ets
= adapter
->ixgbe_ieee_ets
;
8177 for (prio
= 0; prio
< MAX_USER_PRIORITY
; prio
++) {
8180 if (adapter
->dcbx_cap
& DCB_CAP_DCBX_VER_CEE
)
8181 tc
= ixgbe_dcb_get_tc_from_up(dcb_cfg
, 0, prio
);
8183 tc
= ets
->prio_tc
[prio
];
8185 netdev_set_prio_tc_map(dev
, prio
, tc
);
8189 #endif /* CONFIG_IXGBE_DCB */
8191 * ixgbe_setup_tc - configure net_device for multiple traffic classes
8193 * @netdev: net device to configure
8194 * @tc: number of traffic classes to enable
8196 int ixgbe_setup_tc(struct net_device
*dev
, u8 tc
)
8198 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8199 struct ixgbe_hw
*hw
= &adapter
->hw
;
8202 /* Hardware supports up to 8 traffic classes */
8203 if (tc
> adapter
->dcb_cfg
.num_tcs
.pg_tcs
)
8206 if (hw
->mac
.type
== ixgbe_mac_82598EB
&& tc
&& tc
< MAX_TRAFFIC_CLASS
)
8209 pools
= (find_first_zero_bit(&adapter
->fwd_bitmask
, 32) > 1);
8210 if (tc
&& pools
&& adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
)
8213 /* Hardware has to reinitialize queues and interrupts to
8214 * match packet buffer alignment. Unfortunately, the
8215 * hardware is not flexible enough to do this dynamically.
8217 if (netif_running(dev
))
8220 ixgbe_reset(adapter
);
8222 ixgbe_clear_interrupt_scheme(adapter
);
8224 #ifdef CONFIG_IXGBE_DCB
8226 netdev_set_num_tc(dev
, tc
);
8227 ixgbe_set_prio_tc_map(adapter
);
8229 adapter
->flags
|= IXGBE_FLAG_DCB_ENABLED
;
8231 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
) {
8232 adapter
->last_lfc_mode
= adapter
->hw
.fc
.requested_mode
;
8233 adapter
->hw
.fc
.requested_mode
= ixgbe_fc_none
;
8236 netdev_reset_tc(dev
);
8238 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
8239 adapter
->hw
.fc
.requested_mode
= adapter
->last_lfc_mode
;
8241 adapter
->flags
&= ~IXGBE_FLAG_DCB_ENABLED
;
8243 adapter
->temp_dcb_cfg
.pfc_mode_enable
= false;
8244 adapter
->dcb_cfg
.pfc_mode_enable
= false;
8247 ixgbe_validate_rtr(adapter
, tc
);
8249 #endif /* CONFIG_IXGBE_DCB */
8250 ixgbe_init_interrupt_scheme(adapter
);
8252 if (netif_running(dev
))
8253 return ixgbe_open(dev
);
8258 static int ixgbe_delete_clsu32(struct ixgbe_adapter
*adapter
,
8259 struct tc_cls_u32_offload
*cls
)
8261 u32 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
8265 if ((uhtid
!= 0x800) && (uhtid
>= IXGBE_MAX_LINK_HANDLE
))
8268 loc
= cls
->knode
.handle
& 0xfffff;
8270 spin_lock(&adapter
->fdir_perfect_lock
);
8271 err
= ixgbe_update_ethtool_fdir_entry(adapter
, NULL
, loc
);
8272 spin_unlock(&adapter
->fdir_perfect_lock
);
8276 static int ixgbe_configure_clsu32_add_hnode(struct ixgbe_adapter
*adapter
,
8278 struct tc_cls_u32_offload
*cls
)
8280 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
8282 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8285 /* This ixgbe devices do not support hash tables at the moment
8286 * so abort when given hash tables.
8288 if (cls
->hnode
.divisor
> 0)
8291 set_bit(uhtid
- 1, &adapter
->tables
);
8295 static int ixgbe_configure_clsu32_del_hnode(struct ixgbe_adapter
*adapter
,
8296 struct tc_cls_u32_offload
*cls
)
8298 u32 uhtid
= TC_U32_USERHTID(cls
->hnode
.handle
);
8300 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8303 clear_bit(uhtid
- 1, &adapter
->tables
);
8307 static int ixgbe_configure_clsu32(struct ixgbe_adapter
*adapter
,
8309 struct tc_cls_u32_offload
*cls
)
8311 u32 loc
= cls
->knode
.handle
& 0xfffff;
8312 struct ixgbe_hw
*hw
= &adapter
->hw
;
8313 struct ixgbe_mat_field
*field_ptr
;
8314 struct ixgbe_fdir_filter
*input
;
8315 union ixgbe_atr_input mask
;
8316 #ifdef CONFIG_NET_CLS_ACT
8317 const struct tc_action
*a
;
8321 u32 uhtid
, link_uhtid
;
8323 memset(&mask
, 0, sizeof(union ixgbe_atr_input
));
8324 uhtid
= TC_U32_USERHTID(cls
->knode
.handle
);
8325 link_uhtid
= TC_U32_USERHTID(cls
->knode
.link_handle
);
8327 /* At the moment cls_u32 jumps to network layer and skips past
8328 * L2 headers. The canonical method to match L2 frames is to use
8329 * negative values. However this is error prone at best but really
8330 * just broken because there is no way to "know" what sort of hdr
8331 * is in front of the network layer. Fix cls_u32 to support L2
8332 * headers when needed.
8334 if (protocol
!= htons(ETH_P_IP
))
8338 struct ixgbe_nexthdr
*nexthdr
= ixgbe_ipv4_jumps
;
8340 if (link_uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8343 if (!test_bit(link_uhtid
- 1, &adapter
->tables
))
8346 for (i
= 0; nexthdr
[i
].jump
; i
++) {
8347 if (nexthdr
[i
].o
!= cls
->knode
.sel
->offoff
||
8348 nexthdr
[i
].s
!= cls
->knode
.sel
->offshift
||
8349 nexthdr
[i
].m
!= cls
->knode
.sel
->offmask
||
8350 /* do not support multiple key jumps its just mad */
8351 cls
->knode
.sel
->nkeys
> 1)
8354 if (nexthdr
[i
].off
== cls
->knode
.sel
->keys
[0].off
&&
8355 nexthdr
[i
].val
== cls
->knode
.sel
->keys
[0].val
&&
8356 nexthdr
[i
].mask
== cls
->knode
.sel
->keys
[0].mask
) {
8357 adapter
->jump_tables
[link_uhtid
] =
8365 if (loc
>= ((1024 << adapter
->fdir_pballoc
) - 2)) {
8366 e_err(drv
, "Location out of range\n");
8370 /* cls u32 is a graph starting at root node 0x800. The driver tracks
8371 * links and also the fields used to advance the parser across each
8372 * link (e.g. nexthdr/eat parameters from 'tc'). This way we can map
8373 * the u32 graph onto the hardware parse graph denoted in ixgbe_model.h
8374 * To add support for new nodes update ixgbe_model.h parse structures
8375 * this function _should_ be generic try not to hardcode values here.
8377 if (uhtid
== 0x800) {
8378 field_ptr
= adapter
->jump_tables
[0];
8380 if (uhtid
>= IXGBE_MAX_LINK_HANDLE
)
8383 field_ptr
= adapter
->jump_tables
[uhtid
];
8389 input
= kzalloc(sizeof(*input
), GFP_KERNEL
);
8393 for (i
= 0; i
< cls
->knode
.sel
->nkeys
; i
++) {
8394 int off
= cls
->knode
.sel
->keys
[i
].off
;
8395 __be32 val
= cls
->knode
.sel
->keys
[i
].val
;
8396 __be32 m
= cls
->knode
.sel
->keys
[i
].mask
;
8397 bool found_entry
= false;
8400 for (j
= 0; field_ptr
[j
].val
; j
++) {
8401 if (field_ptr
[j
].off
== off
) {
8402 field_ptr
[j
].val(input
, &mask
, val
, m
);
8403 input
->filter
.formatted
.flow_type
|=
8414 mask
.formatted
.flow_type
= IXGBE_ATR_L4TYPE_IPV6_MASK
|
8415 IXGBE_ATR_L4TYPE_MASK
;
8417 if (input
->filter
.formatted
.flow_type
== IXGBE_ATR_FLOW_TYPE_IPV4
)
8418 mask
.formatted
.flow_type
&= IXGBE_ATR_L4TYPE_IPV6_MASK
;
8420 #ifdef CONFIG_NET_CLS_ACT
8421 if (list_empty(&cls
->knode
.exts
->actions
))
8424 list_for_each_entry(a
, &cls
->knode
.exts
->actions
, list
) {
8425 if (!is_tcf_gact_shot(a
))
8430 input
->action
= IXGBE_FDIR_DROP_QUEUE
;
8431 queue
= IXGBE_FDIR_DROP_QUEUE
;
8432 input
->sw_idx
= loc
;
8434 spin_lock(&adapter
->fdir_perfect_lock
);
8436 if (hlist_empty(&adapter
->fdir_filter_list
)) {
8437 memcpy(&adapter
->fdir_mask
, &mask
, sizeof(mask
));
8438 err
= ixgbe_fdir_set_input_mask_82599(hw
, &mask
);
8440 goto err_out_w_lock
;
8441 } else if (memcmp(&adapter
->fdir_mask
, &mask
, sizeof(mask
))) {
8443 goto err_out_w_lock
;
8446 ixgbe_atr_compute_perfect_hash_82599(&input
->filter
, &mask
);
8447 err
= ixgbe_fdir_write_perfect_filter_82599(hw
, &input
->filter
,
8448 input
->sw_idx
, queue
);
8450 ixgbe_update_ethtool_fdir_entry(adapter
, input
, input
->sw_idx
);
8451 spin_unlock(&adapter
->fdir_perfect_lock
);
8455 spin_unlock(&adapter
->fdir_perfect_lock
);
8461 static int __ixgbe_setup_tc(struct net_device
*dev
, u32 handle
, __be16 proto
,
8462 struct tc_to_netdev
*tc
)
8464 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8466 if (TC_H_MAJ(handle
) == TC_H_MAJ(TC_H_INGRESS
) &&
8467 tc
->type
== TC_SETUP_CLSU32
) {
8468 switch (tc
->cls_u32
->command
) {
8469 case TC_CLSU32_NEW_KNODE
:
8470 case TC_CLSU32_REPLACE_KNODE
:
8471 return ixgbe_configure_clsu32(adapter
,
8472 proto
, tc
->cls_u32
);
8473 case TC_CLSU32_DELETE_KNODE
:
8474 return ixgbe_delete_clsu32(adapter
, tc
->cls_u32
);
8475 case TC_CLSU32_NEW_HNODE
:
8476 case TC_CLSU32_REPLACE_HNODE
:
8477 return ixgbe_configure_clsu32_add_hnode(adapter
, proto
,
8479 case TC_CLSU32_DELETE_HNODE
:
8480 return ixgbe_configure_clsu32_del_hnode(adapter
,
8487 if (tc
->type
!= TC_SETUP_MQPRIO
)
8490 return ixgbe_setup_tc(dev
, tc
->tc
);
8493 #ifdef CONFIG_PCI_IOV
8494 void ixgbe_sriov_reinit(struct ixgbe_adapter
*adapter
)
8496 struct net_device
*netdev
= adapter
->netdev
;
8499 ixgbe_setup_tc(netdev
, netdev_get_num_tc(netdev
));
8504 void ixgbe_do_reset(struct net_device
*netdev
)
8506 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8508 if (netif_running(netdev
))
8509 ixgbe_reinit_locked(adapter
);
8511 ixgbe_reset(adapter
);
8514 static netdev_features_t
ixgbe_fix_features(struct net_device
*netdev
,
8515 netdev_features_t features
)
8517 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8519 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
8520 if (!(features
& NETIF_F_RXCSUM
))
8521 features
&= ~NETIF_F_LRO
;
8523 /* Turn off LRO if not RSC capable */
8524 if (!(adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
))
8525 features
&= ~NETIF_F_LRO
;
8530 static int ixgbe_set_features(struct net_device
*netdev
,
8531 netdev_features_t features
)
8533 struct ixgbe_adapter
*adapter
= netdev_priv(netdev
);
8534 netdev_features_t changed
= netdev
->features
^ features
;
8535 bool need_reset
= false;
8537 /* Make sure RSC matches LRO, reset if change */
8538 if (!(features
& NETIF_F_LRO
)) {
8539 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
8541 adapter
->flags2
&= ~IXGBE_FLAG2_RSC_ENABLED
;
8542 } else if ((adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
) &&
8543 !(adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)) {
8544 if (adapter
->rx_itr_setting
== 1 ||
8545 adapter
->rx_itr_setting
> IXGBE_MIN_RSC_ITR
) {
8546 adapter
->flags2
|= IXGBE_FLAG2_RSC_ENABLED
;
8548 } else if ((changed
^ features
) & NETIF_F_LRO
) {
8549 e_info(probe
, "rx-usecs set too low, "
8555 * Check if Flow Director n-tuple support or hw_tc support was
8556 * enabled or disabled. If the state changed, we need to reset.
8558 if ((features
& NETIF_F_NTUPLE
) || (features
& NETIF_F_HW_TC
)) {
8559 /* turn off ATR, enable perfect filters and reset */
8560 if (!(adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
))
8563 adapter
->flags
&= ~IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8564 adapter
->flags
|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8566 /* turn off perfect filters, enable ATR and reset */
8567 if (adapter
->flags
& IXGBE_FLAG_FDIR_PERFECT_CAPABLE
)
8570 adapter
->flags
&= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE
;
8572 /* We cannot enable ATR if SR-IOV is enabled */
8573 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
||
8574 /* We cannot enable ATR if we have 2 or more tcs */
8575 (netdev_get_num_tc(netdev
) > 1) ||
8576 /* We cannot enable ATR if RSS is disabled */
8577 (adapter
->ring_feature
[RING_F_RSS
].limit
<= 1) ||
8578 /* A sample rate of 0 indicates ATR disabled */
8579 (!adapter
->atr_sample_rate
))
8580 ; /* do nothing not supported */
8581 else /* otherwise supported and set the flag */
8582 adapter
->flags
|= IXGBE_FLAG_FDIR_HASH_CAPABLE
;
8585 if (changed
& NETIF_F_RXALL
)
8588 netdev
->features
= features
;
8590 #ifdef CONFIG_IXGBE_VXLAN
8591 if ((adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
)) {
8592 if (features
& NETIF_F_RXCSUM
)
8593 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8595 ixgbe_clear_vxlan_port(adapter
);
8597 #endif /* CONFIG_IXGBE_VXLAN */
8600 ixgbe_do_reset(netdev
);
8601 else if (changed
& (NETIF_F_HW_VLAN_CTAG_RX
|
8602 NETIF_F_HW_VLAN_CTAG_FILTER
))
8603 ixgbe_set_rx_mode(netdev
);
8608 #ifdef CONFIG_IXGBE_VXLAN
8610 * ixgbe_add_vxlan_port - Get notifications about VXLAN ports that come up
8611 * @dev: The port's netdev
8612 * @sa_family: Socket Family that VXLAN is notifiying us about
8613 * @port: New UDP port number that VXLAN started listening to
8615 static void ixgbe_add_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8618 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8619 struct ixgbe_hw
*hw
= &adapter
->hw
;
8621 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8624 if (sa_family
== AF_INET6
)
8627 if (adapter
->vxlan_port
== port
)
8630 if (adapter
->vxlan_port
) {
8632 "Hit Max num of VXLAN ports, not adding port %d\n",
8637 adapter
->vxlan_port
= port
;
8638 IXGBE_WRITE_REG(hw
, IXGBE_VXLANCTRL
, ntohs(port
));
8642 * ixgbe_del_vxlan_port - Get notifications about VXLAN ports that go away
8643 * @dev: The port's netdev
8644 * @sa_family: Socket Family that VXLAN is notifying us about
8645 * @port: UDP port number that VXLAN stopped listening to
8647 static void ixgbe_del_vxlan_port(struct net_device
*dev
, sa_family_t sa_family
,
8650 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8652 if (!(adapter
->flags
& IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE
))
8655 if (sa_family
== AF_INET6
)
8658 if (adapter
->vxlan_port
!= port
) {
8659 netdev_info(dev
, "Port %d was not found, not deleting\n",
8664 ixgbe_clear_vxlan_port(adapter
);
8665 adapter
->flags2
|= IXGBE_FLAG2_VXLAN_REREG_NEEDED
;
8667 #endif /* CONFIG_IXGBE_VXLAN */
8669 static int ixgbe_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
8670 struct net_device
*dev
,
8671 const unsigned char *addr
, u16 vid
,
8674 /* guarantee we can provide a unique filter for the unicast address */
8675 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
8676 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8677 u16 pool
= VMDQ_P(0);
8679 if (netdev_uc_count(dev
) >= ixgbe_available_rars(adapter
, pool
))
8683 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
8687 * ixgbe_configure_bridge_mode - set various bridge modes
8688 * @adapter - the private structure
8689 * @mode - requested bridge mode
8691 * Configure some settings require for various bridge modes.
8693 static int ixgbe_configure_bridge_mode(struct ixgbe_adapter
*adapter
,
8696 struct ixgbe_hw
*hw
= &adapter
->hw
;
8697 unsigned int p
, num_pools
;
8701 case BRIDGE_MODE_VEPA
:
8702 /* disable Tx loopback, rely on switch hairpin mode */
8703 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
, 0);
8705 /* must enable Rx switching replication to allow multicast
8706 * packet reception on all VFs, and to enable source address
8709 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8710 vmdctl
|= IXGBE_VT_CTL_REPLEN
;
8711 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8713 /* enable Rx source address pruning. Note, this requires
8714 * replication to be enabled or else it does nothing.
8716 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8717 for (p
= 0; p
< num_pools
; p
++) {
8718 if (hw
->mac
.ops
.set_source_address_pruning
)
8719 hw
->mac
.ops
.set_source_address_pruning(hw
,
8724 case BRIDGE_MODE_VEB
:
8725 /* enable Tx loopback for internal VF/PF communication */
8726 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_PFDTXGSWC
,
8727 IXGBE_PFDTXGSWC_VT_LBEN
);
8729 /* disable Rx switching replication unless we have SR-IOV
8732 vmdctl
= IXGBE_READ_REG(hw
, IXGBE_VMD_CTL
);
8733 if (!adapter
->num_vfs
)
8734 vmdctl
&= ~IXGBE_VT_CTL_REPLEN
;
8735 IXGBE_WRITE_REG(hw
, IXGBE_VMD_CTL
, vmdctl
);
8737 /* disable Rx source address pruning, since we don't expect to
8738 * be receiving external loopback of our transmitted frames.
8740 num_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8741 for (p
= 0; p
< num_pools
; p
++) {
8742 if (hw
->mac
.ops
.set_source_address_pruning
)
8743 hw
->mac
.ops
.set_source_address_pruning(hw
,
8752 adapter
->bridge_mode
= mode
;
8754 e_info(drv
, "enabling bridge mode: %s\n",
8755 mode
== BRIDGE_MODE_VEPA
? "VEPA" : "VEB");
8760 static int ixgbe_ndo_bridge_setlink(struct net_device
*dev
,
8761 struct nlmsghdr
*nlh
, u16 flags
)
8763 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8764 struct nlattr
*attr
, *br_spec
;
8767 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8770 br_spec
= nlmsg_find_attr(nlh
, sizeof(struct ifinfomsg
), IFLA_AF_SPEC
);
8774 nla_for_each_nested(attr
, br_spec
, rem
) {
8778 if (nla_type(attr
) != IFLA_BRIDGE_MODE
)
8781 if (nla_len(attr
) < sizeof(mode
))
8784 mode
= nla_get_u16(attr
);
8785 status
= ixgbe_configure_bridge_mode(adapter
, mode
);
8795 static int ixgbe_ndo_bridge_getlink(struct sk_buff
*skb
, u32 pid
, u32 seq
,
8796 struct net_device
*dev
,
8797 u32 filter_mask
, int nlflags
)
8799 struct ixgbe_adapter
*adapter
= netdev_priv(dev
);
8801 if (!(adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
))
8804 return ndo_dflt_bridge_getlink(skb
, pid
, seq
, dev
,
8805 adapter
->bridge_mode
, 0, 0, nlflags
,
8809 static void *ixgbe_fwd_add(struct net_device
*pdev
, struct net_device
*vdev
)
8811 struct ixgbe_fwd_adapter
*fwd_adapter
= NULL
;
8812 struct ixgbe_adapter
*adapter
= netdev_priv(pdev
);
8813 int used_pools
= adapter
->num_vfs
+ adapter
->num_rx_pools
;
8817 /* Hardware has a limited number of available pools. Each VF, and the
8818 * PF require a pool. Check to ensure we don't attempt to use more
8819 * then the available number of pools.
8821 if (used_pools
>= IXGBE_MAX_VF_FUNCTIONS
)
8822 return ERR_PTR(-EINVAL
);
8825 if (vdev
->num_rx_queues
!= vdev
->num_tx_queues
) {
8826 netdev_info(pdev
, "%s: Only supports a single queue count for TX and RX\n",
8828 return ERR_PTR(-EINVAL
);
8831 /* Check for hardware restriction on number of rx/tx queues */
8832 if (vdev
->num_tx_queues
> IXGBE_MAX_L2A_QUEUES
||
8833 vdev
->num_tx_queues
== IXGBE_BAD_L2A_QUEUE
) {
8835 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
8837 return ERR_PTR(-EINVAL
);
8840 if (((adapter
->flags
& IXGBE_FLAG_DCB_ENABLED
) &&
8841 adapter
->num_rx_pools
> IXGBE_MAX_DCBMACVLANS
- 1) ||
8842 (adapter
->num_rx_pools
> IXGBE_MAX_MACVLANS
))
8843 return ERR_PTR(-EBUSY
);
8845 fwd_adapter
= kzalloc(sizeof(*fwd_adapter
), GFP_KERNEL
);
8847 return ERR_PTR(-ENOMEM
);
8849 pool
= find_first_zero_bit(&adapter
->fwd_bitmask
, 32);
8850 adapter
->num_rx_pools
++;
8851 set_bit(pool
, &adapter
->fwd_bitmask
);
8852 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
8854 /* Enable VMDq flag so device will be set in VM mode */
8855 adapter
->flags
|= IXGBE_FLAG_VMDQ_ENABLED
| IXGBE_FLAG_SRIOV_ENABLED
;
8856 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
8857 adapter
->ring_feature
[RING_F_RSS
].limit
= vdev
->num_tx_queues
;
8859 /* Force reinit of ring allocation with VMDQ enabled */
8860 err
= ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
8863 fwd_adapter
->pool
= pool
;
8864 fwd_adapter
->real_adapter
= adapter
;
8865 err
= ixgbe_fwd_ring_up(vdev
, fwd_adapter
);
8868 netif_tx_start_all_queues(vdev
);
8871 /* unwind counter and free adapter struct */
8873 "%s: dfwd hardware acceleration failed\n", vdev
->name
);
8874 clear_bit(pool
, &adapter
->fwd_bitmask
);
8875 adapter
->num_rx_pools
--;
8877 return ERR_PTR(err
);
8880 static void ixgbe_fwd_del(struct net_device
*pdev
, void *priv
)
8882 struct ixgbe_fwd_adapter
*fwd_adapter
= priv
;
8883 struct ixgbe_adapter
*adapter
= fwd_adapter
->real_adapter
;
8886 clear_bit(fwd_adapter
->pool
, &adapter
->fwd_bitmask
);
8887 adapter
->num_rx_pools
--;
8889 limit
= find_last_bit(&adapter
->fwd_bitmask
, 32);
8890 adapter
->ring_feature
[RING_F_VMDQ
].limit
= limit
+ 1;
8891 ixgbe_fwd_ring_down(fwd_adapter
->netdev
, fwd_adapter
);
8892 ixgbe_setup_tc(pdev
, netdev_get_num_tc(pdev
));
8893 netdev_dbg(pdev
, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
8894 fwd_adapter
->pool
, adapter
->num_rx_pools
,
8895 fwd_adapter
->rx_base_queue
,
8896 fwd_adapter
->rx_base_queue
+ adapter
->num_rx_queues_per_pool
,
8897 adapter
->fwd_bitmask
);
8901 #define IXGBE_MAX_TUNNEL_HDR_LEN 80
8902 static netdev_features_t
8903 ixgbe_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
8904 netdev_features_t features
)
8906 if (!skb
->encapsulation
)
8909 if (unlikely(skb_inner_mac_header(skb
) - skb_transport_header(skb
) >
8910 IXGBE_MAX_TUNNEL_HDR_LEN
))
8911 return features
& ~NETIF_F_CSUM_MASK
;
8916 static const struct net_device_ops ixgbe_netdev_ops
= {
8917 .ndo_open
= ixgbe_open
,
8918 .ndo_stop
= ixgbe_close
,
8919 .ndo_start_xmit
= ixgbe_xmit_frame
,
8920 .ndo_select_queue
= ixgbe_select_queue
,
8921 .ndo_set_rx_mode
= ixgbe_set_rx_mode
,
8922 .ndo_validate_addr
= eth_validate_addr
,
8923 .ndo_set_mac_address
= ixgbe_set_mac
,
8924 .ndo_change_mtu
= ixgbe_change_mtu
,
8925 .ndo_tx_timeout
= ixgbe_tx_timeout
,
8926 .ndo_set_tx_maxrate
= ixgbe_tx_maxrate
,
8927 .ndo_vlan_rx_add_vid
= ixgbe_vlan_rx_add_vid
,
8928 .ndo_vlan_rx_kill_vid
= ixgbe_vlan_rx_kill_vid
,
8929 .ndo_do_ioctl
= ixgbe_ioctl
,
8930 .ndo_set_vf_mac
= ixgbe_ndo_set_vf_mac
,
8931 .ndo_set_vf_vlan
= ixgbe_ndo_set_vf_vlan
,
8932 .ndo_set_vf_rate
= ixgbe_ndo_set_vf_bw
,
8933 .ndo_set_vf_spoofchk
= ixgbe_ndo_set_vf_spoofchk
,
8934 .ndo_set_vf_rss_query_en
= ixgbe_ndo_set_vf_rss_query_en
,
8935 .ndo_set_vf_trust
= ixgbe_ndo_set_vf_trust
,
8936 .ndo_get_vf_config
= ixgbe_ndo_get_vf_config
,
8937 .ndo_get_stats64
= ixgbe_get_stats64
,
8938 .ndo_setup_tc
= __ixgbe_setup_tc
,
8939 #ifdef CONFIG_NET_POLL_CONTROLLER
8940 .ndo_poll_controller
= ixgbe_netpoll
,
8942 #ifdef CONFIG_NET_RX_BUSY_POLL
8943 .ndo_busy_poll
= ixgbe_low_latency_recv
,
8946 .ndo_fcoe_ddp_setup
= ixgbe_fcoe_ddp_get
,
8947 .ndo_fcoe_ddp_target
= ixgbe_fcoe_ddp_target
,
8948 .ndo_fcoe_ddp_done
= ixgbe_fcoe_ddp_put
,
8949 .ndo_fcoe_enable
= ixgbe_fcoe_enable
,
8950 .ndo_fcoe_disable
= ixgbe_fcoe_disable
,
8951 .ndo_fcoe_get_wwn
= ixgbe_fcoe_get_wwn
,
8952 .ndo_fcoe_get_hbainfo
= ixgbe_fcoe_get_hbainfo
,
8953 #endif /* IXGBE_FCOE */
8954 .ndo_set_features
= ixgbe_set_features
,
8955 .ndo_fix_features
= ixgbe_fix_features
,
8956 .ndo_fdb_add
= ixgbe_ndo_fdb_add
,
8957 .ndo_bridge_setlink
= ixgbe_ndo_bridge_setlink
,
8958 .ndo_bridge_getlink
= ixgbe_ndo_bridge_getlink
,
8959 .ndo_dfwd_add_station
= ixgbe_fwd_add
,
8960 .ndo_dfwd_del_station
= ixgbe_fwd_del
,
8961 #ifdef CONFIG_IXGBE_VXLAN
8962 .ndo_add_vxlan_port
= ixgbe_add_vxlan_port
,
8963 .ndo_del_vxlan_port
= ixgbe_del_vxlan_port
,
8964 #endif /* CONFIG_IXGBE_VXLAN */
8965 .ndo_features_check
= ixgbe_features_check
,
8969 * ixgbe_enumerate_functions - Get the number of ports this device has
8970 * @adapter: adapter structure
8972 * This function enumerates the phsyical functions co-located on a single slot,
8973 * in order to determine how many ports a device has. This is most useful in
8974 * determining the required GT/s of PCIe bandwidth necessary for optimal
8977 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter
*adapter
)
8979 struct pci_dev
*entry
, *pdev
= adapter
->pdev
;
8982 /* Some cards can not use the generic count PCIe functions method,
8983 * because they are behind a parent switch, so we hardcode these with
8984 * the correct number of functions.
8986 if (ixgbe_pcie_from_parent(&adapter
->hw
))
8989 list_for_each_entry(entry
, &adapter
->pdev
->bus
->devices
, bus_list
) {
8990 /* don't count virtual functions */
8991 if (entry
->is_virtfn
)
8994 /* When the devices on the bus don't all match our device ID,
8995 * we can't reliably determine the correct number of
8996 * functions. This can occur if a function has been direct
8997 * attached to a virtual machine using VT-d, for example. In
8998 * this case, simply return -1 to indicate this.
9000 if ((entry
->vendor
!= pdev
->vendor
) ||
9001 (entry
->device
!= pdev
->device
))
9011 * ixgbe_wol_supported - Check whether device supports WoL
9012 * @hw: hw specific details
9013 * @device_id: the device ID
9014 * @subdev_id: the subsystem device ID
9016 * This function is used by probe and ethtool to determine
9017 * which devices have WoL support
9020 int ixgbe_wol_supported(struct ixgbe_adapter
*adapter
, u16 device_id
,
9023 struct ixgbe_hw
*hw
= &adapter
->hw
;
9024 u16 wol_cap
= adapter
->eeprom_cap
& IXGBE_DEVICE_CAPS_WOL_MASK
;
9025 int is_wol_supported
= 0;
9027 switch (device_id
) {
9028 case IXGBE_DEV_ID_82599_SFP
:
9029 /* Only these subdevices could supports WOL */
9030 switch (subdevice_id
) {
9031 case IXGBE_SUBDEV_ID_82599_SFP_WOL0
:
9032 case IXGBE_SUBDEV_ID_82599_560FLR
:
9033 /* only support first port */
9034 if (hw
->bus
.func
!= 0)
9036 case IXGBE_SUBDEV_ID_82599_SP_560FLR
:
9037 case IXGBE_SUBDEV_ID_82599_SFP
:
9038 case IXGBE_SUBDEV_ID_82599_RNDC
:
9039 case IXGBE_SUBDEV_ID_82599_ECNA_DP
:
9040 case IXGBE_SUBDEV_ID_82599_LOM_SFP
:
9041 is_wol_supported
= 1;
9045 case IXGBE_DEV_ID_82599EN_SFP
:
9046 /* Only this subdevice supports WOL */
9047 switch (subdevice_id
) {
9048 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1
:
9049 is_wol_supported
= 1;
9053 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE
:
9054 /* All except this subdevice support WOL */
9055 if (subdevice_id
!= IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ
)
9056 is_wol_supported
= 1;
9058 case IXGBE_DEV_ID_82599_KX4
:
9059 is_wol_supported
= 1;
9061 case IXGBE_DEV_ID_X540T
:
9062 case IXGBE_DEV_ID_X540T1
:
9063 case IXGBE_DEV_ID_X550T
:
9064 case IXGBE_DEV_ID_X550T1
:
9065 case IXGBE_DEV_ID_X550EM_X_KX4
:
9066 case IXGBE_DEV_ID_X550EM_X_KR
:
9067 case IXGBE_DEV_ID_X550EM_X_10G_T
:
9068 /* check eeprom to see if enabled wol */
9069 if ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0_1
) ||
9070 ((wol_cap
== IXGBE_DEVICE_CAPS_WOL_PORT0
) &&
9071 (hw
->bus
.func
== 0))) {
9072 is_wol_supported
= 1;
9077 return is_wol_supported
;
9081 * ixgbe_probe - Device Initialization Routine
9082 * @pdev: PCI device information struct
9083 * @ent: entry in ixgbe_pci_tbl
9085 * Returns 0 on success, negative on failure
9087 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
9088 * The OS initialization, configuring of the adapter private structure,
9089 * and a hardware reset occur.
9091 static int ixgbe_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
9093 struct net_device
*netdev
;
9094 struct ixgbe_adapter
*adapter
= NULL
;
9095 struct ixgbe_hw
*hw
;
9096 const struct ixgbe_info
*ii
= ixgbe_info_tbl
[ent
->driver_data
];
9097 int i
, err
, pci_using_dac
, expected_gts
;
9098 unsigned int indices
= MAX_TX_QUEUES
;
9099 u8 part_str
[IXGBE_PBANUM_LENGTH
];
9100 bool disable_dev
= false;
9106 /* Catch broken hardware that put the wrong VF device ID in
9107 * the PCIe SR-IOV capability.
9109 if (pdev
->is_virtfn
) {
9110 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
9111 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
9115 err
= pci_enable_device_mem(pdev
);
9119 if (!dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64))) {
9122 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
9125 "No usable DMA configuration, aborting\n");
9131 err
= pci_request_selected_regions(pdev
, pci_select_bars(pdev
,
9132 IORESOURCE_MEM
), ixgbe_driver_name
);
9135 "pci_request_selected_regions failed 0x%x\n", err
);
9139 pci_enable_pcie_error_reporting(pdev
);
9141 pci_set_master(pdev
);
9142 pci_save_state(pdev
);
9144 if (ii
->mac
== ixgbe_mac_82598EB
) {
9145 #ifdef CONFIG_IXGBE_DCB
9146 /* 8 TC w/ 4 queues per TC */
9147 indices
= 4 * MAX_TRAFFIC_CLASS
;
9149 indices
= IXGBE_MAX_RSS_INDICES
;
9153 netdev
= alloc_etherdev_mq(sizeof(struct ixgbe_adapter
), indices
);
9156 goto err_alloc_etherdev
;
9159 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
9161 adapter
= netdev_priv(netdev
);
9163 adapter
->netdev
= netdev
;
9164 adapter
->pdev
= pdev
;
9167 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
9169 hw
->hw_addr
= ioremap(pci_resource_start(pdev
, 0),
9170 pci_resource_len(pdev
, 0));
9171 adapter
->io_addr
= hw
->hw_addr
;
9177 netdev
->netdev_ops
= &ixgbe_netdev_ops
;
9178 ixgbe_set_ethtool_ops(netdev
);
9179 netdev
->watchdog_timeo
= 5 * HZ
;
9180 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
9183 hw
->mac
.ops
= *ii
->mac_ops
;
9184 hw
->mac
.type
= ii
->mac
;
9185 hw
->mvals
= ii
->mvals
;
9188 hw
->eeprom
.ops
= *ii
->eeprom_ops
;
9189 eec
= IXGBE_READ_REG(hw
, IXGBE_EEC(hw
));
9190 if (ixgbe_removed(hw
->hw_addr
)) {
9194 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
9195 if (!(eec
& (1 << 8)))
9196 hw
->eeprom
.ops
.read
= &ixgbe_read_eeprom_bit_bang_generic
;
9199 hw
->phy
.ops
= *ii
->phy_ops
;
9200 hw
->phy
.sfp_type
= ixgbe_sfp_type_unknown
;
9201 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
9202 hw
->phy
.mdio
.prtad
= MDIO_PRTAD_NONE
;
9203 hw
->phy
.mdio
.mmds
= 0;
9204 hw
->phy
.mdio
.mode_support
= MDIO_SUPPORTS_C45
| MDIO_EMULATE_C22
;
9205 hw
->phy
.mdio
.dev
= netdev
;
9206 hw
->phy
.mdio
.mdio_read
= ixgbe_mdio_read
;
9207 hw
->phy
.mdio
.mdio_write
= ixgbe_mdio_write
;
9209 ii
->get_invariants(hw
);
9211 /* setup the private structure */
9212 err
= ixgbe_sw_init(adapter
);
9216 /* Make sure the SWFW semaphore is in a valid state */
9217 if (hw
->mac
.ops
.init_swfw_sync
)
9218 hw
->mac
.ops
.init_swfw_sync(hw
);
9220 /* Make it possible the adapter to be woken up via WOL */
9221 switch (adapter
->hw
.mac
.type
) {
9222 case ixgbe_mac_82599EB
:
9223 case ixgbe_mac_X540
:
9224 case ixgbe_mac_X550
:
9225 case ixgbe_mac_X550EM_x
:
9226 case ixgbe_mac_x550em_a
:
9227 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9234 * If there is a fan on this device and it has failed log the
9237 if (adapter
->flags
& IXGBE_FLAG_FAN_FAIL_CAPABLE
) {
9238 u32 esdp
= IXGBE_READ_REG(hw
, IXGBE_ESDP
);
9239 if (esdp
& IXGBE_ESDP_SDP1
)
9240 e_crit(probe
, "Fan has stopped, replace the adapter\n");
9243 if (allow_unsupported_sfp
)
9244 hw
->allow_unsupported_sfp
= allow_unsupported_sfp
;
9246 /* reset_hw fills in the perm_addr as well */
9247 hw
->phy
.reset_if_overtemp
= true;
9248 err
= hw
->mac
.ops
.reset_hw(hw
);
9249 hw
->phy
.reset_if_overtemp
= false;
9250 if (err
== IXGBE_ERR_SFP_NOT_PRESENT
) {
9252 } else if (err
== IXGBE_ERR_SFP_NOT_SUPPORTED
) {
9253 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
9254 e_dev_err("Reload the driver after installing a supported module.\n");
9257 e_dev_err("HW Init failed: %d\n", err
);
9261 #ifdef CONFIG_PCI_IOV
9262 /* SR-IOV not supported on the 82598 */
9263 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
)
9266 ixgbe_init_mbx_params_pf(hw
);
9267 hw
->mbx
.ops
= ii
->mbx_ops
;
9268 pci_sriov_set_totalvfs(pdev
, IXGBE_MAX_VFS_DRV_LIMIT
);
9269 ixgbe_enable_sriov(adapter
);
9273 netdev
->features
= NETIF_F_SG
|
9279 NETIF_F_HW_VLAN_CTAG_TX
|
9280 NETIF_F_HW_VLAN_CTAG_RX
|
9281 NETIF_F_HW_VLAN_CTAG_FILTER
;
9283 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
9284 netdev
->features
|= NETIF_F_SCTP_CRC
;
9286 /* copy netdev features into list of user selectable features */
9287 netdev
->hw_features
|= netdev
->features
;
9288 netdev
->hw_features
|= NETIF_F_RXALL
|
9289 NETIF_F_HW_L2FW_DOFFLOAD
;
9291 if (hw
->mac
.type
>= ixgbe_mac_82599EB
)
9292 netdev
->hw_features
|= NETIF_F_NTUPLE
|
9295 netdev
->vlan_features
|= NETIF_F_SG
|
9301 netdev
->mpls_features
|= NETIF_F_HW_CSUM
;
9302 netdev
->hw_enc_features
|= NETIF_F_HW_CSUM
;
9304 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
9305 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
9307 #ifdef CONFIG_IXGBE_DCB
9308 netdev
->dcbnl_ops
= &dcbnl_ops
;
9312 if (adapter
->flags
& IXGBE_FLAG_FCOE_CAPABLE
) {
9313 unsigned int fcoe_l
;
9315 if (hw
->mac
.ops
.get_device_caps
) {
9316 hw
->mac
.ops
.get_device_caps(hw
, &device_caps
);
9317 if (device_caps
& IXGBE_DEVICE_CAPS_FCOE_OFFLOADS
)
9318 adapter
->flags
&= ~IXGBE_FLAG_FCOE_CAPABLE
;
9322 fcoe_l
= min_t(int, IXGBE_FCRETA_SIZE
, num_online_cpus());
9323 adapter
->ring_feature
[RING_F_FCOE
].limit
= fcoe_l
;
9325 netdev
->features
|= NETIF_F_FSO
|
9328 netdev
->vlan_features
|= NETIF_F_FSO
|
9332 #endif /* IXGBE_FCOE */
9333 if (pci_using_dac
) {
9334 netdev
->features
|= NETIF_F_HIGHDMA
;
9335 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
9338 if (adapter
->flags2
& IXGBE_FLAG2_RSC_CAPABLE
)
9339 netdev
->hw_features
|= NETIF_F_LRO
;
9340 if (adapter
->flags2
& IXGBE_FLAG2_RSC_ENABLED
)
9341 netdev
->features
|= NETIF_F_LRO
;
9343 /* make sure the EEPROM is good */
9344 if (hw
->eeprom
.ops
.validate_checksum(hw
, NULL
) < 0) {
9345 e_dev_err("The EEPROM Checksum Is Not Valid\n");
9350 eth_platform_get_mac_address(&adapter
->pdev
->dev
,
9351 adapter
->hw
.mac
.perm_addr
);
9353 memcpy(netdev
->dev_addr
, hw
->mac
.perm_addr
, netdev
->addr_len
);
9355 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
9356 e_dev_err("invalid MAC address\n");
9361 /* Set hw->mac.addr to permanent MAC address */
9362 ether_addr_copy(hw
->mac
.addr
, hw
->mac
.perm_addr
);
9363 ixgbe_mac_set_default_filter(adapter
);
9365 setup_timer(&adapter
->service_timer
, &ixgbe_service_timer
,
9366 (unsigned long) adapter
);
9368 if (ixgbe_removed(hw
->hw_addr
)) {
9372 INIT_WORK(&adapter
->service_task
, ixgbe_service_task
);
9373 set_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
);
9374 clear_bit(__IXGBE_SERVICE_SCHED
, &adapter
->state
);
9376 err
= ixgbe_init_interrupt_scheme(adapter
);
9380 /* WOL not supported for all devices */
9382 hw
->eeprom
.ops
.read(hw
, 0x2c, &adapter
->eeprom_cap
);
9383 hw
->wol_enabled
= ixgbe_wol_supported(adapter
, pdev
->device
,
9384 pdev
->subsystem_device
);
9385 if (hw
->wol_enabled
)
9386 adapter
->wol
= IXGBE_WUFC_MAG
;
9388 device_set_wakeup_enable(&adapter
->pdev
->dev
, adapter
->wol
);
9390 /* save off EEPROM version number */
9391 hw
->eeprom
.ops
.read(hw
, 0x2e, &adapter
->eeprom_verh
);
9392 hw
->eeprom
.ops
.read(hw
, 0x2d, &adapter
->eeprom_verl
);
9394 /* pick up the PCI bus settings for reporting later */
9395 if (ixgbe_pcie_from_parent(hw
))
9396 ixgbe_get_parent_bus_info(adapter
);
9398 hw
->mac
.ops
.get_bus_info(hw
);
9400 /* calculate the expected PCIe bandwidth required for optimal
9401 * performance. Note that some older parts will never have enough
9402 * bandwidth due to being older generation PCIe parts. We clamp these
9403 * parts to ensure no warning is displayed if it can't be fixed.
9405 switch (hw
->mac
.type
) {
9406 case ixgbe_mac_82598EB
:
9407 expected_gts
= min(ixgbe_enumerate_functions(adapter
) * 10, 16);
9410 expected_gts
= ixgbe_enumerate_functions(adapter
) * 10;
9414 /* don't check link if we failed to enumerate functions */
9415 if (expected_gts
> 0)
9416 ixgbe_check_minimum_link(adapter
, expected_gts
);
9418 err
= ixgbe_read_pba_string_generic(hw
, part_str
, sizeof(part_str
));
9420 strlcpy(part_str
, "Unknown", sizeof(part_str
));
9421 if (ixgbe_is_sfp(hw
) && hw
->phy
.sfp_type
!= ixgbe_sfp_type_not_present
)
9422 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
9423 hw
->mac
.type
, hw
->phy
.type
, hw
->phy
.sfp_type
,
9426 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
9427 hw
->mac
.type
, hw
->phy
.type
, part_str
);
9429 e_dev_info("%pM\n", netdev
->dev_addr
);
9431 /* reset the hardware with the new settings */
9432 err
= hw
->mac
.ops
.start_hw(hw
);
9433 if (err
== IXGBE_ERR_EEPROM_VERSION
) {
9434 /* We are running on a pre-production device, log a warning */
9435 e_dev_warn("This device is a pre-production adapter/LOM. "
9436 "Please be aware there may be issues associated "
9437 "with your hardware. If you are experiencing "
9438 "problems please contact your Intel or hardware "
9439 "representative who provided you with this "
9442 strcpy(netdev
->name
, "eth%d");
9443 err
= register_netdev(netdev
);
9447 pci_set_drvdata(pdev
, adapter
);
9449 /* power down the optics for 82599 SFP+ fiber */
9450 if (hw
->mac
.ops
.disable_tx_laser
)
9451 hw
->mac
.ops
.disable_tx_laser(hw
);
9453 /* carrier off reporting is important to ethtool even BEFORE open */
9454 netif_carrier_off(netdev
);
9456 #ifdef CONFIG_IXGBE_DCA
9457 if (dca_add_requester(&pdev
->dev
) == 0) {
9458 adapter
->flags
|= IXGBE_FLAG_DCA_ENABLED
;
9459 ixgbe_setup_dca(adapter
);
9462 if (adapter
->flags
& IXGBE_FLAG_SRIOV_ENABLED
) {
9463 e_info(probe
, "IOV is enabled with %d VFs\n", adapter
->num_vfs
);
9464 for (i
= 0; i
< adapter
->num_vfs
; i
++)
9465 ixgbe_vf_configuration(pdev
, (i
| 0x10000000));
9468 /* firmware requires driver version to be 0xFFFFFFFF
9469 * since os does not support feature
9471 if (hw
->mac
.ops
.set_fw_drv_ver
)
9472 hw
->mac
.ops
.set_fw_drv_ver(hw
, 0xFF, 0xFF, 0xFF,
9475 /* add san mac addr to netdev */
9476 ixgbe_add_sanmac_netdev(netdev
);
9478 e_dev_info("%s\n", ixgbe_default_device_descr
);
9480 #ifdef CONFIG_IXGBE_HWMON
9481 if (ixgbe_sysfs_init(adapter
))
9482 e_err(probe
, "failed to allocate sysfs resources\n");
9483 #endif /* CONFIG_IXGBE_HWMON */
9485 ixgbe_dbg_adapter_init(adapter
);
9487 /* setup link for SFP devices with MNG FW, else wait for IXGBE_UP */
9488 if (ixgbe_mng_enabled(hw
) && ixgbe_is_sfp(hw
) && hw
->mac
.ops
.setup_link
)
9489 hw
->mac
.ops
.setup_link(hw
,
9490 IXGBE_LINK_SPEED_10GB_FULL
| IXGBE_LINK_SPEED_1GB_FULL
,
9496 ixgbe_release_hw_control(adapter
);
9497 ixgbe_clear_interrupt_scheme(adapter
);
9499 ixgbe_disable_sriov(adapter
);
9500 adapter
->flags2
&= ~IXGBE_FLAG2_SEARCH_FOR_SFP
;
9501 iounmap(adapter
->io_addr
);
9502 kfree(adapter
->mac_table
);
9504 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9505 free_netdev(netdev
);
9507 pci_release_selected_regions(pdev
,
9508 pci_select_bars(pdev
, IORESOURCE_MEM
));
9511 if (!adapter
|| disable_dev
)
9512 pci_disable_device(pdev
);
9517 * ixgbe_remove - Device Removal Routine
9518 * @pdev: PCI device information struct
9520 * ixgbe_remove is called by the PCI subsystem to alert the driver
9521 * that it should release a PCI device. The could be caused by a
9522 * Hot-Plug event, or because the driver is going to be removed from
9525 static void ixgbe_remove(struct pci_dev
*pdev
)
9527 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9528 struct net_device
*netdev
;
9531 /* if !adapter then we already cleaned up in probe */
9535 netdev
= adapter
->netdev
;
9536 ixgbe_dbg_adapter_exit(adapter
);
9538 set_bit(__IXGBE_REMOVING
, &adapter
->state
);
9539 cancel_work_sync(&adapter
->service_task
);
9542 #ifdef CONFIG_IXGBE_DCA
9543 if (adapter
->flags
& IXGBE_FLAG_DCA_ENABLED
) {
9544 adapter
->flags
&= ~IXGBE_FLAG_DCA_ENABLED
;
9545 dca_remove_requester(&pdev
->dev
);
9546 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_DCA_CTRL
,
9547 IXGBE_DCA_CTRL_DCA_DISABLE
);
9551 #ifdef CONFIG_IXGBE_HWMON
9552 ixgbe_sysfs_exit(adapter
);
9553 #endif /* CONFIG_IXGBE_HWMON */
9555 /* remove the added san mac */
9556 ixgbe_del_sanmac_netdev(netdev
);
9558 #ifdef CONFIG_PCI_IOV
9559 ixgbe_disable_sriov(adapter
);
9561 if (netdev
->reg_state
== NETREG_REGISTERED
)
9562 unregister_netdev(netdev
);
9564 ixgbe_clear_interrupt_scheme(adapter
);
9566 ixgbe_release_hw_control(adapter
);
9569 kfree(adapter
->ixgbe_ieee_pfc
);
9570 kfree(adapter
->ixgbe_ieee_ets
);
9573 iounmap(adapter
->io_addr
);
9574 pci_release_selected_regions(pdev
, pci_select_bars(pdev
,
9577 e_dev_info("complete\n");
9579 kfree(adapter
->mac_table
);
9580 disable_dev
= !test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
);
9581 free_netdev(netdev
);
9583 pci_disable_pcie_error_reporting(pdev
);
9586 pci_disable_device(pdev
);
9590 * ixgbe_io_error_detected - called when PCI error is detected
9591 * @pdev: Pointer to PCI device
9592 * @state: The current pci connection state
9594 * This function is called after a PCI bus error affecting
9595 * this device has been detected.
9597 static pci_ers_result_t
ixgbe_io_error_detected(struct pci_dev
*pdev
,
9598 pci_channel_state_t state
)
9600 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9601 struct net_device
*netdev
= adapter
->netdev
;
9603 #ifdef CONFIG_PCI_IOV
9604 struct ixgbe_hw
*hw
= &adapter
->hw
;
9605 struct pci_dev
*bdev
, *vfdev
;
9606 u32 dw0
, dw1
, dw2
, dw3
;
9608 u16 req_id
, pf_func
;
9610 if (adapter
->hw
.mac
.type
== ixgbe_mac_82598EB
||
9611 adapter
->num_vfs
== 0)
9612 goto skip_bad_vf_detection
;
9614 bdev
= pdev
->bus
->self
;
9615 while (bdev
&& (pci_pcie_type(bdev
) != PCI_EXP_TYPE_ROOT_PORT
))
9616 bdev
= bdev
->bus
->self
;
9619 goto skip_bad_vf_detection
;
9621 pos
= pci_find_ext_capability(bdev
, PCI_EXT_CAP_ID_ERR
);
9623 goto skip_bad_vf_detection
;
9625 dw0
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
);
9626 dw1
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 4);
9627 dw2
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 8);
9628 dw3
= ixgbe_read_pci_cfg_dword(hw
, pos
+ PCI_ERR_HEADER_LOG
+ 12);
9629 if (ixgbe_removed(hw
->hw_addr
))
9630 goto skip_bad_vf_detection
;
9633 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
9634 if (!(req_id
& 0x0080))
9635 goto skip_bad_vf_detection
;
9637 pf_func
= req_id
& 0x01;
9638 if ((pf_func
& 1) == (pdev
->devfn
& 1)) {
9639 unsigned int device_id
;
9641 vf
= (req_id
& 0x7F) >> 1;
9642 e_dev_err("VF %d has caused a PCIe error\n", vf
);
9643 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9644 "%8.8x\tdw3: %8.8x\n",
9645 dw0
, dw1
, dw2
, dw3
);
9646 switch (adapter
->hw
.mac
.type
) {
9647 case ixgbe_mac_82599EB
:
9648 device_id
= IXGBE_82599_VF_DEVICE_ID
;
9650 case ixgbe_mac_X540
:
9651 device_id
= IXGBE_X540_VF_DEVICE_ID
;
9653 case ixgbe_mac_X550
:
9654 device_id
= IXGBE_DEV_ID_X550_VF
;
9656 case ixgbe_mac_X550EM_x
:
9657 device_id
= IXGBE_DEV_ID_X550EM_X_VF
;
9659 case ixgbe_mac_x550em_a
:
9660 device_id
= IXGBE_DEV_ID_X550EM_A_VF
;
9667 /* Find the pci device of the offending VF */
9668 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
, device_id
, NULL
);
9670 if (vfdev
->devfn
== (req_id
& 0xFF))
9672 vfdev
= pci_get_device(PCI_VENDOR_ID_INTEL
,
9676 * There's a slim chance the VF could have been hot plugged,
9677 * so if it is no longer present we don't need to issue the
9678 * VFLR. Just clean up the AER in that case.
9681 ixgbe_issue_vf_flr(adapter
, vfdev
);
9682 /* Free device reference count */
9686 pci_cleanup_aer_uncorrect_error_status(pdev
);
9690 * Even though the error may have occurred on the other port
9691 * we still need to increment the vf error reference count for
9692 * both ports because the I/O resume function will be called
9695 adapter
->vferr_refcount
++;
9697 return PCI_ERS_RESULT_RECOVERED
;
9699 skip_bad_vf_detection
:
9700 #endif /* CONFIG_PCI_IOV */
9701 if (!test_bit(__IXGBE_SERVICE_INITED
, &adapter
->state
))
9702 return PCI_ERS_RESULT_DISCONNECT
;
9705 netif_device_detach(netdev
);
9707 if (state
== pci_channel_io_perm_failure
) {
9709 return PCI_ERS_RESULT_DISCONNECT
;
9712 if (netif_running(netdev
))
9713 ixgbe_down(adapter
);
9715 if (!test_and_set_bit(__IXGBE_DISABLED
, &adapter
->state
))
9716 pci_disable_device(pdev
);
9719 /* Request a slot reset. */
9720 return PCI_ERS_RESULT_NEED_RESET
;
9724 * ixgbe_io_slot_reset - called after the pci bus has been reset.
9725 * @pdev: Pointer to PCI device
9727 * Restart the card from scratch, as if from a cold-boot.
9729 static pci_ers_result_t
ixgbe_io_slot_reset(struct pci_dev
*pdev
)
9731 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9732 pci_ers_result_t result
;
9735 if (pci_enable_device_mem(pdev
)) {
9736 e_err(probe
, "Cannot re-enable PCI device after reset.\n");
9737 result
= PCI_ERS_RESULT_DISCONNECT
;
9739 smp_mb__before_atomic();
9740 clear_bit(__IXGBE_DISABLED
, &adapter
->state
);
9741 adapter
->hw
.hw_addr
= adapter
->io_addr
;
9742 pci_set_master(pdev
);
9743 pci_restore_state(pdev
);
9744 pci_save_state(pdev
);
9746 pci_wake_from_d3(pdev
, false);
9748 ixgbe_reset(adapter
);
9749 IXGBE_WRITE_REG(&adapter
->hw
, IXGBE_WUS
, ~0);
9750 result
= PCI_ERS_RESULT_RECOVERED
;
9753 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
9755 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
9756 "failed 0x%0x\n", err
);
9757 /* non-fatal, continue */
9764 * ixgbe_io_resume - called when traffic can start flowing again.
9765 * @pdev: Pointer to PCI device
9767 * This callback is called when the error recovery driver tells us that
9768 * its OK to resume normal operation.
9770 static void ixgbe_io_resume(struct pci_dev
*pdev
)
9772 struct ixgbe_adapter
*adapter
= pci_get_drvdata(pdev
);
9773 struct net_device
*netdev
= adapter
->netdev
;
9775 #ifdef CONFIG_PCI_IOV
9776 if (adapter
->vferr_refcount
) {
9777 e_info(drv
, "Resuming after VF err\n");
9778 adapter
->vferr_refcount
--;
9783 if (netif_running(netdev
))
9786 netif_device_attach(netdev
);
9789 static const struct pci_error_handlers ixgbe_err_handler
= {
9790 .error_detected
= ixgbe_io_error_detected
,
9791 .slot_reset
= ixgbe_io_slot_reset
,
9792 .resume
= ixgbe_io_resume
,
9795 static struct pci_driver ixgbe_driver
= {
9796 .name
= ixgbe_driver_name
,
9797 .id_table
= ixgbe_pci_tbl
,
9798 .probe
= ixgbe_probe
,
9799 .remove
= ixgbe_remove
,
9801 .suspend
= ixgbe_suspend
,
9802 .resume
= ixgbe_resume
,
9804 .shutdown
= ixgbe_shutdown
,
9805 .sriov_configure
= ixgbe_pci_sriov_configure
,
9806 .err_handler
= &ixgbe_err_handler
9810 * ixgbe_init_module - Driver Registration Routine
9812 * ixgbe_init_module is the first routine called when the driver is
9813 * loaded. All it does is register with the PCI subsystem.
9815 static int __init
ixgbe_init_module(void)
9818 pr_info("%s - version %s\n", ixgbe_driver_string
, ixgbe_driver_version
);
9819 pr_info("%s\n", ixgbe_copyright
);
9821 ixgbe_wq
= create_singlethread_workqueue(ixgbe_driver_name
);
9823 pr_err("%s: Failed to create workqueue\n", ixgbe_driver_name
);
9829 ret
= pci_register_driver(&ixgbe_driver
);
9835 #ifdef CONFIG_IXGBE_DCA
9836 dca_register_notify(&dca_notifier
);
9842 module_init(ixgbe_init_module
);
9845 * ixgbe_exit_module - Driver Exit Cleanup Routine
9847 * ixgbe_exit_module is called just before the driver is removed
9850 static void __exit
ixgbe_exit_module(void)
9852 #ifdef CONFIG_IXGBE_DCA
9853 dca_unregister_notify(&dca_notifier
);
9855 pci_unregister_driver(&ixgbe_driver
);
9859 destroy_workqueue(ixgbe_wq
);
9864 #ifdef CONFIG_IXGBE_DCA
9865 static int ixgbe_notify_dca(struct notifier_block
*nb
, unsigned long event
,
9870 ret_val
= driver_for_each_device(&ixgbe_driver
.driver
, NULL
, &event
,
9871 __ixgbe_notify_dca
);
9873 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
9876 #endif /* CONFIG_IXGBE_DCA */
9878 module_exit(ixgbe_exit_module
);