drivers/net/ethernet/marvell/mvneta_bm.c

   1 /*
   2  * Driver for Marvell NETA network controller Buffer Manager.
   3  *
   4  * Copyright (C) 2015 Marvell
   5  *
   6  * Marcin Wojtas <mw@semihalf.com>
   7  *
   8  * This file is licensed under the terms of the GNU General Public
   9  * License version 2. This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/kernel.h>
  14 #include <linux/genalloc.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/netdevice.h>
  17 #include <linux/skbuff.h>
  18 #include <linux/mbus.h>
  19 #include <linux/module.h>
  20 #include <linux/io.h>
  21 #include <linux/of.h>
  22 #include <linux/clk.h>
  23 #include "mvneta_bm.h"
  24
  25 #define MVNETA_BM_DRIVER_NAME "mvneta_bm"
  26 #define MVNETA_BM_DRIVER_VERSION "1.0"
  27
  28 static void mvneta_bm_write(struct mvneta_bm *priv, u32 offset, u32 data)
  29 {
  30         writel(data, priv->reg_base + offset);
  31 }
  32
  33 static u32 mvneta_bm_read(struct mvneta_bm *priv, u32 offset)
  34 {
  35         return readl(priv->reg_base + offset);
  36 }
  37
  38 static void mvneta_bm_pool_enable(struct mvneta_bm *priv, int pool_id)
  39 {
  40         u32 val;
  41
  42         val = mvneta_bm_read(priv, MVNETA_BM_POOL_BASE_REG(pool_id));
  43         val |= MVNETA_BM_POOL_ENABLE_MASK;
  44         mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(pool_id), val);
  45
  46         /* Clear BM cause register */
  47         mvneta_bm_write(priv, MVNETA_BM_INTR_CAUSE_REG, 0);
  48 }
  49
  50 static void mvneta_bm_pool_disable(struct mvneta_bm *priv, int pool_id)
  51 {
  52         u32 val;
  53
  54         val = mvneta_bm_read(priv, MVNETA_BM_POOL_BASE_REG(pool_id));
  55         val &= ~MVNETA_BM_POOL_ENABLE_MASK;
  56         mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(pool_id), val);
  57 }
  58
  59 static inline void mvneta_bm_config_set(struct mvneta_bm *priv, u32 mask)
  60 {
  61         u32 val;
  62
  63         val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG);
  64         val |= mask;
  65         mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val);
  66 }
  67
  68 static inline void mvneta_bm_config_clear(struct mvneta_bm *priv, u32 mask)
  69 {
  70         u32 val;
  71
  72         val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG);
  73         val &= ~mask;
  74         mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val);
  75 }
  76
  77 static void mvneta_bm_pool_target_set(struct mvneta_bm *priv, int pool_id,
  78                                       u8 target_id, u8 attr)
  79 {
  80         u32 val;
  81
  82         val = mvneta_bm_read(priv, MVNETA_BM_XBAR_POOL_REG(pool_id));
  83         val &= ~MVNETA_BM_TARGET_ID_MASK(pool_id);
  84         val &= ~MVNETA_BM_XBAR_ATTR_MASK(pool_id);
  85         val |= MVNETA_BM_TARGET_ID_VAL(pool_id, target_id);
  86         val |= MVNETA_BM_XBAR_ATTR_VAL(pool_id, attr);
  87
  88         mvneta_bm_write(priv, MVNETA_BM_XBAR_POOL_REG(pool_id), val);
  89 }
  90
  91 /* Allocate skb for BM pool */
  92 void *mvneta_buf_alloc(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool,
  93                        dma_addr_t *buf_phys_addr)
  94 {
  95         void *buf;
  96         dma_addr_t phys_addr;
  97
  98         buf = mvneta_frag_alloc(bm_pool->frag_size);
  99         if (!buf)
 100                 return NULL;
 101
 102         /* In order to update buf_cookie field of RX descriptor properly,
 103          * BM hardware expects buf virtual address to be placed in the
 104          * first four bytes of mapped buffer.
 105          */
 106         *(u32 *)buf = (u32)buf;
 107         phys_addr = dma_map_single(&priv->pdev->dev, buf, bm_pool->buf_size,
 108                                    DMA_FROM_DEVICE);
 109         if (unlikely(dma_mapping_error(&priv->pdev->dev, phys_addr))) {
 110                 mvneta_frag_free(bm_pool->frag_size, buf);
 111                 return NULL;
 112         }
 113         *buf_phys_addr = phys_addr;
 114
 115         return buf;
 116 }
 117
 118 /* Refill processing for HW buffer management */
 119 int mvneta_bm_pool_refill(struct mvneta_bm *priv,
 120                           struct mvneta_bm_pool *bm_pool)
 121 {
 122         dma_addr_t buf_phys_addr;
 123         void *buf;
 124
 125         buf = mvneta_buf_alloc(priv, bm_pool, &buf_phys_addr);
 126         if (!buf)
 127                 return -ENOMEM;
 128
 129         mvneta_bm_pool_put_bp(priv, bm_pool, buf_phys_addr);
 130
 131         return 0;
 132 }
 133 EXPORT_SYMBOL_GPL(mvneta_bm_pool_refill);
 134
 135 /* Allocate buffers for the pool */
 136 int mvneta_bm_bufs_add(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool,
 137                        int buf_num)
 138 {
 139         int err, i;
 140
 141         if (bm_pool->buf_num == bm_pool->size) {
 142                 dev_dbg(&priv->pdev->dev, "pool %d already filled\n",
 143                         bm_pool->id);
 144                 return bm_pool->buf_num;
 145         }
 146
 147         if (buf_num < 0 ||
 148             (buf_num + bm_pool->buf_num > bm_pool->size)) {
 149                 dev_err(&priv->pdev->dev,
 150                         "cannot allocate %d buffers for pool %d\n",
 151                         buf_num, bm_pool->id);
 152                 return 0;
 153         }
 154
 155         for (i = 0; i < buf_num; i++) {
 156                 err = mvneta_bm_pool_refill(priv, bm_pool);
 157                 if (err < 0)
 158                         break;
 159         }
 160
 161         /* Update BM driver with number of buffers added to pool */
 162         bm_pool->buf_num += i;
 163
 164         dev_dbg(&priv->pdev->dev,
 165                 "%s pool %d: pkt_size=%4d, buf_size=%4d, frag_size=%4d\n",
 166                 bm_pool->type == MVNETA_BM_SHORT ? "short" : "long",
 167                 bm_pool->id, bm_pool->pkt_size, bm_pool->buf_size,
 168                 bm_pool->frag_size);
 169
 170         dev_dbg(&priv->pdev->dev,
 171                 "%s pool %d: %d of %d buffers added\n",
 172                 bm_pool->type == MVNETA_BM_SHORT ? "short" : "long",
 173                 bm_pool->id, i, buf_num);
 174
 175         return i;
 176 }
 177 EXPORT_SYMBOL_GPL(mvneta_bm_bufs_add);
 178
 179 /* Create pool */
 180 static int mvneta_bm_pool_create(struct mvneta_bm *priv,
 181                                  struct mvneta_bm_pool *bm_pool)
 182 {
 183         struct platform_device *pdev = priv->pdev;
 184         u8 target_id, attr;
 185         int size_bytes, err;
 186
 187         size_bytes = sizeof(u32) * bm_pool->size;
 188         bm_pool->virt_addr = dma_alloc_coherent(&pdev->dev, size_bytes,
 189                                                 &bm_pool->phys_addr,
 190                                                 GFP_KERNEL);
 191         if (!bm_pool->virt_addr)
 192                 return -ENOMEM;
 193
 194         if (!IS_ALIGNED((u32)bm_pool->virt_addr, MVNETA_BM_POOL_PTR_ALIGN)) {
 195                 dma_free_coherent(&pdev->dev, size_bytes, bm_pool->virt_addr,
 196                                   bm_pool->phys_addr);
 197                 dev_err(&pdev->dev, "BM pool %d is not %d bytes aligned\n",
 198                         bm_pool->id, MVNETA_BM_POOL_PTR_ALIGN);
 199                 return -ENOMEM;
 200         }
 201
 202         err = mvebu_mbus_get_dram_win_info(bm_pool->phys_addr, &target_id,
 203                                            &attr);
 204         if (err < 0) {
 205                 dma_free_coherent(&pdev->dev, size_bytes, bm_pool->virt_addr,
 206                                   bm_pool->phys_addr);
 207                 return err;
 208         }
 209
 210         /* Set pool address */
 211         mvneta_bm_write(priv, MVNETA_BM_POOL_BASE_REG(bm_pool->id),
 212                         bm_pool->phys_addr);
 213
 214         mvneta_bm_pool_target_set(priv, bm_pool->id, target_id,  attr);
 215         mvneta_bm_pool_enable(priv, bm_pool->id);
 216
 217         return 0;
 218 }
 219
 220 /* Notify the driver that BM pool is being used as specific type and return the
 221  * pool pointer on success
 222  */
 223 struct mvneta_bm_pool *mvneta_bm_pool_use(struct mvneta_bm *priv, u8 pool_id,
 224                                           enum mvneta_bm_type type, u8 port_id,
 225                                           int pkt_size)
 226 {
 227         struct mvneta_bm_pool *new_pool = &priv->bm_pools[pool_id];
 228         int num, err;
 229
 230         if (new_pool->type == MVNETA_BM_LONG &&
 231             new_pool->port_map != 1 << port_id) {
 232                 dev_err(&priv->pdev->dev,
 233                         "long pool cannot be shared by the ports\n");
 234                 return NULL;
 235         }
 236
 237         if (new_pool->type == MVNETA_BM_SHORT && new_pool->type != type) {
 238                 dev_err(&priv->pdev->dev,
 239                         "mixing pools' types between the ports is forbidden\n");
 240                 return NULL;
 241         }
 242
 243         if (new_pool->pkt_size == 0 || type != MVNETA_BM_SHORT)
 244                 new_pool->pkt_size = pkt_size;
 245
 246         /* Allocate buffers in case BM pool hasn't been used yet */
 247         if (new_pool->type == MVNETA_BM_FREE) {
 248                 new_pool->type = type;
 249                 new_pool->buf_size = MVNETA_RX_BUF_SIZE(new_pool->pkt_size);
 250                 new_pool->frag_size =
 251                         SKB_DATA_ALIGN(MVNETA_RX_BUF_SIZE(new_pool->pkt_size)) +
 252                         SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
 253
 254                 /* Create new pool */
 255                 err = mvneta_bm_pool_create(priv, new_pool);
 256                 if (err) {
 257                         dev_err(&priv->pdev->dev, "fail to create pool %d\n",
 258                                 new_pool->id);
 259                         return NULL;
 260                 }
 261
 262                 /* Allocate buffers for this pool */
 263                 num = mvneta_bm_bufs_add(priv, new_pool, new_pool->size);
 264                 if (num != new_pool->size) {
 265                         WARN(1, "pool %d: %d of %d allocated\n",
 266                              new_pool->id, num, new_pool->size);
 267                         return NULL;
 268                 }
 269         }
 270
 271         return new_pool;
 272 }
 273 EXPORT_SYMBOL_GPL(mvneta_bm_pool_use);
 274
 275 /* Free all buffers from the pool */
 276 void mvneta_bm_bufs_free(struct mvneta_bm *priv, struct mvneta_bm_pool *bm_pool,
 277                          u8 port_map)
 278 {
 279         int i;
 280
 281         bm_pool->port_map &= ~port_map;
 282         if (bm_pool->port_map)
 283                 return;
 284
 285         mvneta_bm_config_set(priv, MVNETA_BM_EMPTY_LIMIT_MASK);
 286
 287         for (i = 0; i < bm_pool->buf_num; i++) {
 288                 dma_addr_t buf_phys_addr;
 289                 u32 *vaddr;
 290
 291                 /* Get buffer physical address (indirect access) */
 292                 buf_phys_addr = mvneta_bm_pool_get_bp(priv, bm_pool);
 293
 294                 /* Work-around to the problems when destroying the pool,
 295                  * when it occurs that a read access to BPPI returns 0.
 296                  */
 297                 if (buf_phys_addr == 0)
 298                         continue;
 299
 300                 vaddr = phys_to_virt(buf_phys_addr);
 301                 if (!vaddr)
 302                         break;
 303
 304                 dma_unmap_single(&priv->pdev->dev, buf_phys_addr,
 305                                  bm_pool->buf_size, DMA_FROM_DEVICE);
 306                 mvneta_frag_free(bm_pool->frag_size, vaddr);
 307         }
 308
 309         mvneta_bm_config_clear(priv, MVNETA_BM_EMPTY_LIMIT_MASK);
 310
 311         /* Update BM driver with number of buffers removed from pool */
 312         bm_pool->buf_num -= i;
 313 }
 314 EXPORT_SYMBOL_GPL(mvneta_bm_bufs_free);
 315
 316 /* Cleanup pool */
 317 void mvneta_bm_pool_destroy(struct mvneta_bm *priv,
 318                             struct mvneta_bm_pool *bm_pool, u8 port_map)
 319 {
 320         bm_pool->port_map &= ~port_map;
 321         if (bm_pool->port_map)
 322                 return;
 323
 324         bm_pool->type = MVNETA_BM_FREE;
 325
 326         mvneta_bm_bufs_free(priv, bm_pool, port_map);
 327         if (bm_pool->buf_num)
 328                 WARN(1, "cannot free all buffers in pool %d\n", bm_pool->id);
 329
 330         if (bm_pool->virt_addr) {
 331                 dma_free_coherent(&priv->pdev->dev, sizeof(u32) * bm_pool->size,
 332                                   bm_pool->virt_addr, bm_pool->phys_addr);
 333                 bm_pool->virt_addr = NULL;
 334         }
 335
 336         mvneta_bm_pool_disable(priv, bm_pool->id);
 337 }
 338 EXPORT_SYMBOL_GPL(mvneta_bm_pool_destroy);
 339
 340 static void mvneta_bm_pools_init(struct mvneta_bm *priv)
 341 {
 342         struct device_node *dn = priv->pdev->dev.of_node;
 343         struct mvneta_bm_pool *bm_pool;
 344         char prop[15];
 345         u32 size;
 346         int i;
 347
 348         /* Activate BM unit */
 349         mvneta_bm_write(priv, MVNETA_BM_COMMAND_REG, MVNETA_BM_START_MASK);
 350
 351         /* Create all pools with maximum size */
 352         for (i = 0; i < MVNETA_BM_POOLS_NUM; i++) {
 353                 bm_pool = &priv->bm_pools[i];
 354                 bm_pool->id = i;
 355                 bm_pool->type = MVNETA_BM_FREE;
 356
 357                 /* Reset read pointer */
 358                 mvneta_bm_write(priv, MVNETA_BM_POOL_READ_PTR_REG(i), 0);
 359
 360                 /* Reset write pointer */
 361                 mvneta_bm_write(priv, MVNETA_BM_POOL_WRITE_PTR_REG(i), 0);
 362
 363                 /* Configure pool size according to DT or use default value */
 364                 sprintf(prop, "pool%d,capacity", i);
 365                 if (of_property_read_u32(dn, prop, &size)) {
 366                         size = MVNETA_BM_POOL_CAP_DEF;
 367                 } else if (size > MVNETA_BM_POOL_CAP_MAX) {
 368                         dev_warn(&priv->pdev->dev,
 369                                  "Illegal pool %d capacity %d, set to %d\n",
 370                                  i, size, MVNETA_BM_POOL_CAP_MAX);
 371                         size = MVNETA_BM_POOL_CAP_MAX;
 372                 } else if (size < MVNETA_BM_POOL_CAP_MIN) {
 373                         dev_warn(&priv->pdev->dev,
 374                                  "Illegal pool %d capacity %d, set to %d\n",
 375                                  i, size, MVNETA_BM_POOL_CAP_MIN);
 376                         size = MVNETA_BM_POOL_CAP_MIN;
 377                 } else if (!IS_ALIGNED(size, MVNETA_BM_POOL_CAP_ALIGN)) {
 378                         dev_warn(&priv->pdev->dev,
 379                                  "Illegal pool %d capacity %d, round to %d\n",
 380                                  i, size, ALIGN(size,
 381                                  MVNETA_BM_POOL_CAP_ALIGN));
 382                         size = ALIGN(size, MVNETA_BM_POOL_CAP_ALIGN);
 383                 }
 384                 bm_pool->size = size;
 385
 386                 mvneta_bm_write(priv, MVNETA_BM_POOL_SIZE_REG(i),
 387                                 bm_pool->size);
 388
 389                 /* Obtain custom pkt_size from DT */
 390                 sprintf(prop, "pool%d,pkt-size", i);
 391                 if (of_property_read_u32(dn, prop, &bm_pool->pkt_size))
 392                         bm_pool->pkt_size = 0;
 393         }
 394 }
 395
 396 static void mvneta_bm_default_set(struct mvneta_bm *priv)
 397 {
 398         u32 val;
 399
 400         /* Mask BM all interrupts */
 401         mvneta_bm_write(priv, MVNETA_BM_INTR_MASK_REG, 0);
 402
 403         /* Clear BM cause register */
 404         mvneta_bm_write(priv, MVNETA_BM_INTR_CAUSE_REG, 0);
 405
 406         /* Set BM configuration register */
 407         val = mvneta_bm_read(priv, MVNETA_BM_CONFIG_REG);
 408
 409         /* Reduce MaxInBurstSize from 32 BPs to 16 BPs */
 410         val &= ~MVNETA_BM_MAX_IN_BURST_SIZE_MASK;
 411         val |= MVNETA_BM_MAX_IN_BURST_SIZE_16BP;
 412         mvneta_bm_write(priv, MVNETA_BM_CONFIG_REG, val);
 413 }
 414
 415 static int mvneta_bm_init(struct mvneta_bm *priv)
 416 {
 417         mvneta_bm_default_set(priv);
 418
 419         /* Allocate and initialize BM pools structures */
 420         priv->bm_pools = devm_kcalloc(&priv->pdev->dev, MVNETA_BM_POOLS_NUM,
 421                                       sizeof(struct mvneta_bm_pool),
 422                                       GFP_KERNEL);
 423         if (!priv->bm_pools)
 424                 return -ENOMEM;
 425
 426         mvneta_bm_pools_init(priv);
 427
 428         return 0;
 429 }
 430
 431 static int mvneta_bm_get_sram(struct device_node *dn,
 432                               struct mvneta_bm *priv)
 433 {
 434         priv->bppi_pool = of_gen_pool_get(dn, "internal-mem", 0);
 435         if (!priv->bppi_pool)
 436                 return -ENOMEM;
 437
 438         priv->bppi_virt_addr = gen_pool_dma_alloc(priv->bppi_pool,
 439                                                   MVNETA_BM_BPPI_SIZE,
 440                                                   &priv->bppi_phys_addr);
 441         if (!priv->bppi_virt_addr)
 442                 return -ENOMEM;
 443
 444         return 0;
 445 }
 446
 447 static void mvneta_bm_put_sram(struct mvneta_bm *priv)
 448 {
 449         gen_pool_free(priv->bppi_pool, priv->bppi_phys_addr,
 450                       MVNETA_BM_BPPI_SIZE);
 451 }
 452
 453 static int mvneta_bm_probe(struct platform_device *pdev)
 454 {
 455         struct device_node *dn = pdev->dev.of_node;
 456         struct mvneta_bm *priv;
 457         struct resource *res;
 458         int err;
 459
 460         priv = devm_kzalloc(&pdev->dev, sizeof(struct mvneta_bm), GFP_KERNEL);
 461         if (!priv)
 462                 return -ENOMEM;
 463
 464         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 465         priv->reg_base = devm_ioremap_resource(&pdev->dev, res);
 466         if (IS_ERR(priv->reg_base))
 467                 return PTR_ERR(priv->reg_base);
 468
 469         priv->clk = devm_clk_get(&pdev->dev, NULL);
 470         if (IS_ERR(priv->clk))
 471                 return PTR_ERR(priv->clk);
 472         err = clk_prepare_enable(priv->clk);
 473         if (err < 0)
 474                 return err;
 475
 476         err = mvneta_bm_get_sram(dn, priv);
 477         if (err < 0) {
 478                 dev_err(&pdev->dev, "failed to allocate internal memory\n");
 479                 goto err_clk;
 480         }
 481
 482         priv->pdev = pdev;
 483
 484         /* Initialize buffer manager internals */
 485         err = mvneta_bm_init(priv);
 486         if (err < 0) {
 487                 dev_err(&pdev->dev, "failed to initialize controller\n");
 488                 goto err_sram;
 489         }
 490
 491         dn->data = priv;
 492         platform_set_drvdata(pdev, priv);
 493
 494         dev_info(&pdev->dev, "Buffer Manager for network controller enabled\n");
 495
 496         return 0;
 497
 498 err_sram:
 499         mvneta_bm_put_sram(priv);
 500 err_clk:
 501         clk_disable_unprepare(priv->clk);
 502         return err;
 503 }
 504
 505 static int mvneta_bm_remove(struct platform_device *pdev)
 506 {
 507         struct mvneta_bm *priv = platform_get_drvdata(pdev);
 508         u8 all_ports_map = 0xff;
 509         int i = 0;
 510
 511         for (i = 0; i < MVNETA_BM_POOLS_NUM; i++) {
 512                 struct mvneta_bm_pool *bm_pool = &priv->bm_pools[i];
 513
 514                 mvneta_bm_pool_destroy(priv, bm_pool, all_ports_map);
 515         }
 516
 517         mvneta_bm_put_sram(priv);
 518
 519         /* Dectivate BM unit */
 520         mvneta_bm_write(priv, MVNETA_BM_COMMAND_REG, MVNETA_BM_STOP_MASK);
 521
 522         clk_disable_unprepare(priv->clk);
 523
 524         return 0;
 525 }
 526
 527 static const struct of_device_id mvneta_bm_match[] = {
 528         { .compatible = "marvell,armada-380-neta-bm" },
 529         { }
 530 };
 531 MODULE_DEVICE_TABLE(of, mvneta_bm_match);
 532
 533 static struct platform_driver mvneta_bm_driver = {
 534         .probe = mvneta_bm_probe,
 535         .remove = mvneta_bm_remove,
 536         .driver = {
 537                 .name = MVNETA_BM_DRIVER_NAME,
 538                 .of_match_table = mvneta_bm_match,
 539         },
 540 };
 541
 542 module_platform_driver(mvneta_bm_driver);
 543
 544 MODULE_DESCRIPTION("Marvell NETA Buffer Manager Driver - www.marvell.com");
 545 MODULE_AUTHOR("Marcin Wojtas <mw@semihalf.com>");
 546 MODULE_LICENSE("GPL v2");