net/mlx4_en: DCB QoS support
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx4 / en_dcb_nl.c
1 /*
2 * Copyright (c) 2011 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/dcbnl.h>
35
36 #include "mlx4_en.h"
37
38 static int mlx4_en_dcbnl_ieee_getets(struct net_device *dev,
39 struct ieee_ets *ets)
40 {
41 struct mlx4_en_priv *priv = netdev_priv(dev);
42 struct ieee_ets *my_ets = &priv->ets;
43
44 /* No IEEE PFC settings available */
45 if (!my_ets)
46 return -EINVAL;
47
48 ets->ets_cap = IEEE_8021QAZ_MAX_TCS;
49 ets->cbs = my_ets->cbs;
50 memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
51 memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
52 memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
53
54 return 0;
55 }
56
57 static int mlx4_en_ets_validate(struct mlx4_en_priv *priv, struct ieee_ets *ets)
58 {
59 int i;
60 int total_ets_bw = 0;
61 int has_ets_tc = 0;
62
63 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
64 if (ets->prio_tc[i] > MLX4_EN_NUM_UP) {
65 en_err(priv, "Bad priority in UP <=> TC mapping. TC: %d, UP: %d\n",
66 i, ets->prio_tc[i]);
67 return -EINVAL;
68 }
69
70 switch (ets->tc_tsa[i]) {
71 case IEEE_8021QAZ_TSA_STRICT:
72 break;
73 case IEEE_8021QAZ_TSA_ETS:
74 has_ets_tc = 1;
75 total_ets_bw += ets->tc_tx_bw[i];
76 break;
77 default:
78 en_err(priv, "TC[%d]: Not supported TSA: %d\n",
79 i, ets->tc_tsa[i]);
80 return -ENOTSUPP;
81 }
82 }
83
84 if (has_ets_tc && total_ets_bw != MLX4_EN_BW_MAX) {
85 en_err(priv, "Bad ETS BW sum: %d. Should be exactly 100%%\n",
86 total_ets_bw);
87 return -EINVAL;
88 }
89
90 return 0;
91 }
92
93 static int mlx4_en_config_port_scheduler(struct mlx4_en_priv *priv,
94 struct ieee_ets *ets, u16 *ratelimit)
95 {
96 struct mlx4_en_dev *mdev = priv->mdev;
97 int num_strict = 0;
98 int i;
99 __u8 tc_tx_bw[IEEE_8021QAZ_MAX_TCS] = { 0 };
100 __u8 pg[IEEE_8021QAZ_MAX_TCS] = { 0 };
101
102 ets = ets ?: &priv->ets;
103
104 /* higher TC means higher priority => lower pg */
105 for (i = IEEE_8021QAZ_MAX_TCS - 1; i >= 0; i--) {
106 switch (ets->tc_tsa[i]) {
107 case IEEE_8021QAZ_TSA_STRICT:
108 pg[i] = num_strict++;
109 tc_tx_bw[i] = MLX4_EN_BW_MAX;
110 break;
111 case IEEE_8021QAZ_TSA_ETS:
112 pg[i] = MLX4_EN_TC_ETS;
113 tc_tx_bw[i] = ets->tc_tx_bw[i] ?: MLX4_EN_BW_MIN;
114 break;
115 }
116 }
117
118 return mlx4_SET_PORT_SCHEDULER(mdev->dev, priv->port, tc_tx_bw, pg,
119 ratelimit);
120 }
121
122 static int
123 mlx4_en_dcbnl_ieee_setets(struct net_device *dev, struct ieee_ets *ets)
124 {
125 struct mlx4_en_priv *priv = netdev_priv(dev);
126 struct mlx4_en_dev *mdev = priv->mdev;
127 int err;
128
129 err = mlx4_en_ets_validate(priv, ets);
130 if (err)
131 return err;
132
133 err = mlx4_SET_PORT_PRIO2TC(mdev->dev, priv->port, ets->prio_tc);
134 if (err)
135 return err;
136
137 err = mlx4_en_config_port_scheduler(priv, ets, NULL);
138 if (err)
139 return err;
140
141 memcpy(&priv->ets, ets, sizeof(priv->ets));
142
143 return 0;
144 }
145
146 static int mlx4_en_dcbnl_ieee_getpfc(struct net_device *dev,
147 struct ieee_pfc *pfc)
148 {
149 struct mlx4_en_priv *priv = netdev_priv(dev);
150
151 pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS;
152 pfc->pfc_en = priv->prof->tx_ppp;
153
154 return 0;
155 }
156
157 static int mlx4_en_dcbnl_ieee_setpfc(struct net_device *dev,
158 struct ieee_pfc *pfc)
159 {
160 struct mlx4_en_priv *priv = netdev_priv(dev);
161 struct mlx4_en_dev *mdev = priv->mdev;
162 int err;
163
164 en_dbg(DRV, priv, "cap: 0x%x en: 0x%x mbc: 0x%x delay: %d\n",
165 pfc->pfc_cap,
166 pfc->pfc_en,
167 pfc->mbc,
168 pfc->delay);
169
170 priv->prof->rx_pause = priv->prof->tx_pause = !!pfc->pfc_en;
171 priv->prof->rx_ppp = priv->prof->tx_ppp = pfc->pfc_en;
172
173 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
174 priv->rx_skb_size + ETH_FCS_LEN,
175 priv->prof->tx_pause,
176 priv->prof->tx_ppp,
177 priv->prof->rx_pause,
178 priv->prof->rx_ppp);
179 if (err)
180 en_err(priv, "Failed setting pause params\n");
181
182 return err;
183 }
184
185 static u8 mlx4_en_dcbnl_getdcbx(struct net_device *dev)
186 {
187 return DCB_CAP_DCBX_VER_IEEE;
188 }
189
190 static u8 mlx4_en_dcbnl_setdcbx(struct net_device *dev, u8 mode)
191 {
192 if ((mode & DCB_CAP_DCBX_LLD_MANAGED) ||
193 (mode & DCB_CAP_DCBX_VER_CEE) ||
194 !(mode & DCB_CAP_DCBX_VER_IEEE) ||
195 !(mode & DCB_CAP_DCBX_HOST))
196 return 1;
197
198 return 0;
199 }
200
201 const struct dcbnl_rtnl_ops mlx4_en_dcbnl_ops = {
202 .ieee_getets = mlx4_en_dcbnl_ieee_getets,
203 .ieee_setets = mlx4_en_dcbnl_ieee_setets,
204 .ieee_getpfc = mlx4_en_dcbnl_ieee_getpfc,
205 .ieee_setpfc = mlx4_en_dcbnl_ieee_setpfc,
206
207 .getdcbx = mlx4_en_dcbnl_getdcbx,
208 .setdcbx = mlx4_en_dcbnl_setdcbx,
209 };
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