2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies. All rights reserved.
5 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/errno.h>
39 #include <linux/pci.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/slab.h>
42 #include <linux/io-mapping.h>
43 #include <linux/delay.h>
45 #include <linux/mlx4/device.h>
46 #include <linux/mlx4/doorbell.h>
52 MODULE_AUTHOR("Roland Dreier");
53 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
54 MODULE_LICENSE("Dual BSD/GPL");
55 MODULE_VERSION(DRV_VERSION
);
57 struct workqueue_struct
*mlx4_wq
;
59 #ifdef CONFIG_MLX4_DEBUG
61 int mlx4_debug_level
= 0;
62 module_param_named(debug_level
, mlx4_debug_level
, int, 0644);
63 MODULE_PARM_DESC(debug_level
, "Enable debug tracing if > 0");
65 #endif /* CONFIG_MLX4_DEBUG */
70 module_param(msi_x
, int, 0444);
71 MODULE_PARM_DESC(msi_x
, "attempt to use MSI-X if nonzero");
73 #else /* CONFIG_PCI_MSI */
77 #endif /* CONFIG_PCI_MSI */
80 module_param(num_vfs
, int, 0444);
81 MODULE_PARM_DESC(num_vfs
, "enable #num_vfs functions if num_vfs > 0");
84 module_param(probe_vf
, int, 0644);
85 MODULE_PARM_DESC(probe_vf
, "number of vfs to probe by pf driver (num_vfs > 0)");
87 int mlx4_log_num_mgm_entry_size
= 10;
88 module_param_named(log_num_mgm_entry_size
,
89 mlx4_log_num_mgm_entry_size
, int, 0444);
90 MODULE_PARM_DESC(log_num_mgm_entry_size
, "log mgm size, that defines the num"
91 " of qp per mcg, for example:"
92 " 10 gives 248.range: 9<="
93 " log_num_mgm_entry_size <= 12");
95 #define MLX4_VF (1 << 0)
97 #define HCA_GLOBAL_CAP_MASK 0
98 #define PF_CONTEXT_BEHAVIOUR_MASK 0
100 static char mlx4_version
[] __devinitdata
=
101 DRV_NAME
": Mellanox ConnectX core driver v"
102 DRV_VERSION
" (" DRV_RELDATE
")\n";
104 static struct mlx4_profile default_profile
= {
107 .rdmarc_per_qp
= 1 << 4,
111 .num_mtt
= 1 << 20, /* It is really num mtt segements */
114 static int log_num_mac
= 7;
115 module_param_named(log_num_mac
, log_num_mac
, int, 0444);
116 MODULE_PARM_DESC(log_num_mac
, "Log2 max number of MACs per ETH port (1-7)");
118 static int log_num_vlan
;
119 module_param_named(log_num_vlan
, log_num_vlan
, int, 0444);
120 MODULE_PARM_DESC(log_num_vlan
, "Log2 max number of VLANs per ETH port (0-7)");
121 /* Log2 max number of VLANs per ETH port (0-7) */
122 #define MLX4_LOG_NUM_VLANS 7
124 static bool use_prio
;
125 module_param_named(use_prio
, use_prio
, bool, 0444);
126 MODULE_PARM_DESC(use_prio
, "Enable steering by VLAN priority on ETH ports "
129 int log_mtts_per_seg
= ilog2(MLX4_MTT_ENTRY_PER_SEG
);
130 module_param_named(log_mtts_per_seg
, log_mtts_per_seg
, int, 0444);
131 MODULE_PARM_DESC(log_mtts_per_seg
, "Log2 number of MTT entries per segment (1-7)");
133 static int port_type_array
[2] = {MLX4_PORT_TYPE_NONE
, MLX4_PORT_TYPE_NONE
};
134 static int arr_argc
= 2;
135 module_param_array(port_type_array
, int, &arr_argc
, 0444);
136 MODULE_PARM_DESC(port_type_array
, "Array of port types: HW_DEFAULT (0) is default "
137 "1 for IB, 2 for Ethernet");
139 struct mlx4_port_config
{
140 struct list_head list
;
141 enum mlx4_port_type port_type
[MLX4_MAX_PORTS
+ 1];
142 struct pci_dev
*pdev
;
145 static inline int mlx4_master_get_num_eqs(struct mlx4_dev
*dev
)
147 return dev
->caps
.reserved_eqs
+
148 MLX4_MFUNC_EQ_NUM
* (dev
->num_slaves
+ 1);
151 int mlx4_check_port_params(struct mlx4_dev
*dev
,
152 enum mlx4_port_type
*port_type
)
156 for (i
= 0; i
< dev
->caps
.num_ports
- 1; i
++) {
157 if (port_type
[i
] != port_type
[i
+ 1]) {
158 if (!(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
)) {
159 mlx4_err(dev
, "Only same port types supported "
160 "on this HCA, aborting.\n");
163 if (port_type
[i
] == MLX4_PORT_TYPE_ETH
&&
164 port_type
[i
+ 1] == MLX4_PORT_TYPE_IB
)
169 for (i
= 0; i
< dev
->caps
.num_ports
; i
++) {
170 if (!(port_type
[i
] & dev
->caps
.supported_type
[i
+1])) {
171 mlx4_err(dev
, "Requested port type for port %d is not "
172 "supported on this HCA\n", i
+ 1);
179 static void mlx4_set_port_mask(struct mlx4_dev
*dev
)
183 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
)
184 dev
->caps
.port_mask
[i
] = dev
->caps
.port_type
[i
];
187 static int mlx4_dev_cap(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
)
192 err
= mlx4_QUERY_DEV_CAP(dev
, dev_cap
);
194 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
198 if (dev_cap
->min_page_sz
> PAGE_SIZE
) {
199 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
200 "kernel PAGE_SIZE of %ld, aborting.\n",
201 dev_cap
->min_page_sz
, PAGE_SIZE
);
204 if (dev_cap
->num_ports
> MLX4_MAX_PORTS
) {
205 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
207 dev_cap
->num_ports
, MLX4_MAX_PORTS
);
211 if (dev_cap
->uar_size
> pci_resource_len(dev
->pdev
, 2)) {
212 mlx4_err(dev
, "HCA reported UAR size of 0x%x bigger than "
213 "PCI resource 2 size of 0x%llx, aborting.\n",
215 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
219 dev
->caps
.num_ports
= dev_cap
->num_ports
;
220 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
221 dev
->caps
.vl_cap
[i
] = dev_cap
->max_vl
[i
];
222 dev
->caps
.ib_mtu_cap
[i
] = dev_cap
->ib_mtu
[i
];
223 dev
->caps
.gid_table_len
[i
] = dev_cap
->max_gids
[i
];
224 dev
->caps
.pkey_table_len
[i
] = dev_cap
->max_pkeys
[i
];
225 dev
->caps
.port_width_cap
[i
] = dev_cap
->max_port_width
[i
];
226 dev
->caps
.eth_mtu_cap
[i
] = dev_cap
->eth_mtu
[i
];
227 dev
->caps
.def_mac
[i
] = dev_cap
->def_mac
[i
];
228 dev
->caps
.supported_type
[i
] = dev_cap
->supported_port_types
[i
];
229 dev
->caps
.suggested_type
[i
] = dev_cap
->suggested_type
[i
];
230 dev
->caps
.default_sense
[i
] = dev_cap
->default_sense
[i
];
231 dev
->caps
.trans_type
[i
] = dev_cap
->trans_type
[i
];
232 dev
->caps
.vendor_oui
[i
] = dev_cap
->vendor_oui
[i
];
233 dev
->caps
.wavelength
[i
] = dev_cap
->wavelength
[i
];
234 dev
->caps
.trans_code
[i
] = dev_cap
->trans_code
[i
];
237 dev
->caps
.uar_page_size
= PAGE_SIZE
;
238 dev
->caps
.num_uars
= dev_cap
->uar_size
/ PAGE_SIZE
;
239 dev
->caps
.local_ca_ack_delay
= dev_cap
->local_ca_ack_delay
;
240 dev
->caps
.bf_reg_size
= dev_cap
->bf_reg_size
;
241 dev
->caps
.bf_regs_per_page
= dev_cap
->bf_regs_per_page
;
242 dev
->caps
.max_sq_sg
= dev_cap
->max_sq_sg
;
243 dev
->caps
.max_rq_sg
= dev_cap
->max_rq_sg
;
244 dev
->caps
.max_wqes
= dev_cap
->max_qp_sz
;
245 dev
->caps
.max_qp_init_rdma
= dev_cap
->max_requester_per_qp
;
246 dev
->caps
.max_srq_wqes
= dev_cap
->max_srq_sz
;
247 dev
->caps
.max_srq_sge
= dev_cap
->max_rq_sg
- 1;
248 dev
->caps
.reserved_srqs
= dev_cap
->reserved_srqs
;
249 dev
->caps
.max_sq_desc_sz
= dev_cap
->max_sq_desc_sz
;
250 dev
->caps
.max_rq_desc_sz
= dev_cap
->max_rq_desc_sz
;
251 dev
->caps
.num_qp_per_mgm
= mlx4_get_qp_per_mgm(dev
);
253 * Subtract 1 from the limit because we need to allocate a
254 * spare CQE so the HCA HW can tell the difference between an
255 * empty CQ and a full CQ.
257 dev
->caps
.max_cqes
= dev_cap
->max_cq_sz
- 1;
258 dev
->caps
.reserved_cqs
= dev_cap
->reserved_cqs
;
259 dev
->caps
.reserved_eqs
= dev_cap
->reserved_eqs
;
260 dev
->caps
.reserved_mtts
= dev_cap
->reserved_mtts
;
261 dev
->caps
.reserved_mrws
= dev_cap
->reserved_mrws
;
263 /* The first 128 UARs are used for EQ doorbells */
264 dev
->caps
.reserved_uars
= max_t(int, 128, dev_cap
->reserved_uars
);
265 dev
->caps
.reserved_pds
= dev_cap
->reserved_pds
;
266 dev
->caps
.reserved_xrcds
= (dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_XRC
) ?
267 dev_cap
->reserved_xrcds
: 0;
268 dev
->caps
.max_xrcds
= (dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_XRC
) ?
269 dev_cap
->max_xrcds
: 0;
270 dev
->caps
.mtt_entry_sz
= dev_cap
->mtt_entry_sz
;
272 dev
->caps
.max_msg_sz
= dev_cap
->max_msg_sz
;
273 dev
->caps
.page_size_cap
= ~(u32
) (dev_cap
->min_page_sz
- 1);
274 dev
->caps
.flags
= dev_cap
->flags
;
275 dev
->caps
.bmme_flags
= dev_cap
->bmme_flags
;
276 dev
->caps
.reserved_lkey
= dev_cap
->reserved_lkey
;
277 dev
->caps
.stat_rate_support
= dev_cap
->stat_rate_support
;
278 dev
->caps
.max_gso_sz
= dev_cap
->max_gso_sz
;
280 /* Sense port always allowed on supported devices for ConnectX1 and 2 */
281 if (dev
->pdev
->device
!= 0x1003)
282 dev
->caps
.flags
|= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT
;
284 dev
->caps
.log_num_macs
= log_num_mac
;
285 dev
->caps
.log_num_vlans
= MLX4_LOG_NUM_VLANS
;
286 dev
->caps
.log_num_prios
= use_prio
? 3 : 0;
288 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
) {
289 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_NONE
;
290 if (dev
->caps
.supported_type
[i
]) {
291 /* if only ETH is supported - assign ETH */
292 if (dev
->caps
.supported_type
[i
] == MLX4_PORT_TYPE_ETH
)
293 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_ETH
;
294 /* if only IB is supported,
295 * assign IB only if SRIOV is off*/
296 else if (dev
->caps
.supported_type
[i
] ==
298 if (dev
->flags
& MLX4_FLAG_SRIOV
)
299 dev
->caps
.port_type
[i
] =
302 dev
->caps
.port_type
[i
] =
304 /* if IB and ETH are supported,
305 * first of all check if SRIOV is on */
306 } else if (dev
->flags
& MLX4_FLAG_SRIOV
)
307 dev
->caps
.port_type
[i
] = MLX4_PORT_TYPE_ETH
;
309 /* In non-SRIOV mode, we set the port type
310 * according to user selection of port type,
311 * if usere selected none, take the FW hint */
312 if (port_type_array
[i
-1] == MLX4_PORT_TYPE_NONE
)
313 dev
->caps
.port_type
[i
] = dev
->caps
.suggested_type
[i
] ?
314 MLX4_PORT_TYPE_ETH
: MLX4_PORT_TYPE_IB
;
316 dev
->caps
.port_type
[i
] = port_type_array
[i
-1];
320 * Link sensing is allowed on the port if 3 conditions are true:
321 * 1. Both protocols are supported on the port.
322 * 2. Different types are supported on the port
323 * 3. FW declared that it supports link sensing
325 mlx4_priv(dev
)->sense
.sense_allowed
[i
] =
326 ((dev
->caps
.supported_type
[i
] == MLX4_PORT_TYPE_AUTO
) &&
327 (dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
) &&
328 (dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_SENSE_SUPPORT
));
331 * If "default_sense" bit is set, we move the port to "AUTO" mode
332 * and perform sense_port FW command to try and set the correct
333 * port type from beginning
335 if (mlx4_priv(dev
)->sense
.sense_allowed
[i
] && dev
->caps
.default_sense
[i
]) {
336 enum mlx4_port_type sensed_port
= MLX4_PORT_TYPE_NONE
;
337 dev
->caps
.possible_type
[i
] = MLX4_PORT_TYPE_AUTO
;
338 mlx4_SENSE_PORT(dev
, i
, &sensed_port
);
339 if (sensed_port
!= MLX4_PORT_TYPE_NONE
)
340 dev
->caps
.port_type
[i
] = sensed_port
;
342 dev
->caps
.possible_type
[i
] = dev
->caps
.port_type
[i
];
345 if (dev
->caps
.log_num_macs
> dev_cap
->log_max_macs
[i
]) {
346 dev
->caps
.log_num_macs
= dev_cap
->log_max_macs
[i
];
347 mlx4_warn(dev
, "Requested number of MACs is too much "
348 "for port %d, reducing to %d.\n",
349 i
, 1 << dev
->caps
.log_num_macs
);
351 if (dev
->caps
.log_num_vlans
> dev_cap
->log_max_vlans
[i
]) {
352 dev
->caps
.log_num_vlans
= dev_cap
->log_max_vlans
[i
];
353 mlx4_warn(dev
, "Requested number of VLANs is too much "
354 "for port %d, reducing to %d.\n",
355 i
, 1 << dev
->caps
.log_num_vlans
);
359 dev
->caps
.max_counters
= 1 << ilog2(dev_cap
->max_counters
);
361 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] = dev_cap
->reserved_qps
;
362 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] =
363 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] =
364 (1 << dev
->caps
.log_num_macs
) *
365 (1 << dev
->caps
.log_num_vlans
) *
366 (1 << dev
->caps
.log_num_prios
) *
368 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
] = MLX4_NUM_FEXCH
;
370 dev
->caps
.reserved_qps
= dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
] +
371 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_ETH_ADDR
] +
372 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_ADDR
] +
373 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FC_EXCH
];
377 /*The function checks if there are live vf, return the num of them*/
378 static int mlx4_how_many_lives_vf(struct mlx4_dev
*dev
)
380 struct mlx4_priv
*priv
= mlx4_priv(dev
);
381 struct mlx4_slave_state
*s_state
;
385 for (i
= 1/*the ppf is 0*/; i
< dev
->num_slaves
; ++i
) {
386 s_state
= &priv
->mfunc
.master
.slave_state
[i
];
387 if (s_state
->active
&& s_state
->last_cmd
!=
388 MLX4_COMM_CMD_RESET
) {
389 mlx4_warn(dev
, "%s: slave: %d is still active\n",
397 int mlx4_is_slave_active(struct mlx4_dev
*dev
, int slave
)
399 struct mlx4_priv
*priv
= mlx4_priv(dev
);
400 struct mlx4_slave_state
*s_slave
;
402 if (!mlx4_is_master(dev
))
405 s_slave
= &priv
->mfunc
.master
.slave_state
[slave
];
406 return !!s_slave
->active
;
408 EXPORT_SYMBOL(mlx4_is_slave_active
);
410 static int mlx4_slave_cap(struct mlx4_dev
*dev
)
414 struct mlx4_dev_cap dev_cap
;
415 struct mlx4_func_cap func_cap
;
416 struct mlx4_init_hca_param hca_param
;
419 memset(&hca_param
, 0, sizeof(hca_param
));
420 err
= mlx4_QUERY_HCA(dev
, &hca_param
);
422 mlx4_err(dev
, "QUERY_HCA command failed, aborting.\n");
426 /*fail if the hca has an unknown capability */
427 if ((hca_param
.global_caps
| HCA_GLOBAL_CAP_MASK
) !=
428 HCA_GLOBAL_CAP_MASK
) {
429 mlx4_err(dev
, "Unknown hca global capabilities\n");
433 mlx4_log_num_mgm_entry_size
= hca_param
.log_mc_entry_sz
;
435 memset(&dev_cap
, 0, sizeof(dev_cap
));
436 err
= mlx4_dev_cap(dev
, &dev_cap
);
438 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
442 page_size
= ~dev
->caps
.page_size_cap
+ 1;
443 mlx4_warn(dev
, "HCA minimum page size:%d\n", page_size
);
444 if (page_size
> PAGE_SIZE
) {
445 mlx4_err(dev
, "HCA minimum page size of %d bigger than "
446 "kernel PAGE_SIZE of %ld, aborting.\n",
447 page_size
, PAGE_SIZE
);
451 /* slave gets uar page size from QUERY_HCA fw command */
452 dev
->caps
.uar_page_size
= 1 << (hca_param
.uar_page_sz
+ 12);
454 /* TODO: relax this assumption */
455 if (dev
->caps
.uar_page_size
!= PAGE_SIZE
) {
456 mlx4_err(dev
, "UAR size:%d != kernel PAGE_SIZE of %ld\n",
457 dev
->caps
.uar_page_size
, PAGE_SIZE
);
461 memset(&func_cap
, 0, sizeof(func_cap
));
462 err
= mlx4_QUERY_FUNC_CAP(dev
, &func_cap
);
464 mlx4_err(dev
, "QUERY_FUNC_CAP command failed, aborting.\n");
468 if ((func_cap
.pf_context_behaviour
| PF_CONTEXT_BEHAVIOUR_MASK
) !=
469 PF_CONTEXT_BEHAVIOUR_MASK
) {
470 mlx4_err(dev
, "Unknown pf context behaviour\n");
474 dev
->caps
.num_ports
= func_cap
.num_ports
;
475 dev
->caps
.num_qps
= func_cap
.qp_quota
;
476 dev
->caps
.num_srqs
= func_cap
.srq_quota
;
477 dev
->caps
.num_cqs
= func_cap
.cq_quota
;
478 dev
->caps
.num_eqs
= func_cap
.max_eq
;
479 dev
->caps
.reserved_eqs
= func_cap
.reserved_eq
;
480 dev
->caps
.num_mpts
= func_cap
.mpt_quota
;
481 dev
->caps
.num_mtts
= func_cap
.mtt_quota
;
482 dev
->caps
.num_pds
= MLX4_NUM_PDS
;
483 dev
->caps
.num_mgms
= 0;
484 dev
->caps
.num_amgms
= 0;
486 for (i
= 1; i
<= dev
->caps
.num_ports
; ++i
)
487 dev
->caps
.port_mask
[i
] = dev
->caps
.port_type
[i
];
489 if (dev
->caps
.num_ports
> MLX4_MAX_PORTS
) {
490 mlx4_err(dev
, "HCA has %d ports, but we only support %d, "
491 "aborting.\n", dev
->caps
.num_ports
, MLX4_MAX_PORTS
);
495 if (dev
->caps
.uar_page_size
* (dev
->caps
.num_uars
-
496 dev
->caps
.reserved_uars
) >
497 pci_resource_len(dev
->pdev
, 2)) {
498 mlx4_err(dev
, "HCA reported UAR region size of 0x%x bigger than "
499 "PCI resource 2 size of 0x%llx, aborting.\n",
500 dev
->caps
.uar_page_size
* dev
->caps
.num_uars
,
501 (unsigned long long) pci_resource_len(dev
->pdev
, 2));
506 mlx4_warn(dev
, "sqp_demux:%d\n", dev
->caps
.sqp_demux
);
507 mlx4_warn(dev
, "num_uars:%d reserved_uars:%d uar region:0x%x bar2:0x%llx\n",
508 dev
->caps
.num_uars
, dev
->caps
.reserved_uars
,
509 dev
->caps
.uar_page_size
* dev
->caps
.num_uars
,
510 pci_resource_len(dev
->pdev
, 2));
511 mlx4_warn(dev
, "num_eqs:%d reserved_eqs:%d\n", dev
->caps
.num_eqs
,
512 dev
->caps
.reserved_eqs
);
513 mlx4_warn(dev
, "num_pds:%d reserved_pds:%d slave_pd_shift:%d pd_base:%d\n",
514 dev
->caps
.num_pds
, dev
->caps
.reserved_pds
,
515 dev
->caps
.slave_pd_shift
, dev
->caps
.pd_base
);
521 * Change the port configuration of the device.
522 * Every user of this function must hold the port mutex.
524 int mlx4_change_port_types(struct mlx4_dev
*dev
,
525 enum mlx4_port_type
*port_types
)
531 for (port
= 0; port
< dev
->caps
.num_ports
; port
++) {
532 /* Change the port type only if the new type is different
533 * from the current, and not set to Auto */
534 if (port_types
[port
] != dev
->caps
.port_type
[port
+ 1])
538 mlx4_unregister_device(dev
);
539 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
540 mlx4_CLOSE_PORT(dev
, port
);
541 dev
->caps
.port_type
[port
] = port_types
[port
- 1];
542 err
= mlx4_SET_PORT(dev
, port
);
544 mlx4_err(dev
, "Failed to set port %d, "
549 mlx4_set_port_mask(dev
);
550 err
= mlx4_register_device(dev
);
557 static ssize_t
show_port_type(struct device
*dev
,
558 struct device_attribute
*attr
,
561 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
563 struct mlx4_dev
*mdev
= info
->dev
;
567 (mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_IB
) ?
569 if (mdev
->caps
.possible_type
[info
->port
] == MLX4_PORT_TYPE_AUTO
)
570 sprintf(buf
, "auto (%s)\n", type
);
572 sprintf(buf
, "%s\n", type
);
577 static ssize_t
set_port_type(struct device
*dev
,
578 struct device_attribute
*attr
,
579 const char *buf
, size_t count
)
581 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
583 struct mlx4_dev
*mdev
= info
->dev
;
584 struct mlx4_priv
*priv
= mlx4_priv(mdev
);
585 enum mlx4_port_type types
[MLX4_MAX_PORTS
];
586 enum mlx4_port_type new_types
[MLX4_MAX_PORTS
];
590 if (!strcmp(buf
, "ib\n"))
591 info
->tmp_type
= MLX4_PORT_TYPE_IB
;
592 else if (!strcmp(buf
, "eth\n"))
593 info
->tmp_type
= MLX4_PORT_TYPE_ETH
;
594 else if (!strcmp(buf
, "auto\n"))
595 info
->tmp_type
= MLX4_PORT_TYPE_AUTO
;
597 mlx4_err(mdev
, "%s is not supported port type\n", buf
);
601 mlx4_stop_sense(mdev
);
602 mutex_lock(&priv
->port_mutex
);
603 /* Possible type is always the one that was delivered */
604 mdev
->caps
.possible_type
[info
->port
] = info
->tmp_type
;
606 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++) {
607 types
[i
] = priv
->port
[i
+1].tmp_type
? priv
->port
[i
+1].tmp_type
:
608 mdev
->caps
.possible_type
[i
+1];
609 if (types
[i
] == MLX4_PORT_TYPE_AUTO
)
610 types
[i
] = mdev
->caps
.port_type
[i
+1];
613 if (!(mdev
->caps
.flags
& MLX4_DEV_CAP_FLAG_DPDP
) &&
614 !(mdev
->caps
.flags
& MLX4_DEV_CAP_FLAG_SENSE_SUPPORT
)) {
615 for (i
= 1; i
<= mdev
->caps
.num_ports
; i
++) {
616 if (mdev
->caps
.possible_type
[i
] == MLX4_PORT_TYPE_AUTO
) {
617 mdev
->caps
.possible_type
[i
] = mdev
->caps
.port_type
[i
];
623 mlx4_err(mdev
, "Auto sensing is not supported on this HCA. "
624 "Set only 'eth' or 'ib' for both ports "
625 "(should be the same)\n");
629 mlx4_do_sense_ports(mdev
, new_types
, types
);
631 err
= mlx4_check_port_params(mdev
, new_types
);
635 /* We are about to apply the changes after the configuration
636 * was verified, no need to remember the temporary types
638 for (i
= 0; i
< mdev
->caps
.num_ports
; i
++)
639 priv
->port
[i
+ 1].tmp_type
= 0;
641 err
= mlx4_change_port_types(mdev
, new_types
);
644 mlx4_start_sense(mdev
);
645 mutex_unlock(&priv
->port_mutex
);
646 return err
? err
: count
;
657 static inline int int_to_ibta_mtu(int mtu
)
660 case 256: return IB_MTU_256
;
661 case 512: return IB_MTU_512
;
662 case 1024: return IB_MTU_1024
;
663 case 2048: return IB_MTU_2048
;
664 case 4096: return IB_MTU_4096
;
669 static inline int ibta_mtu_to_int(enum ibta_mtu mtu
)
672 case IB_MTU_256
: return 256;
673 case IB_MTU_512
: return 512;
674 case IB_MTU_1024
: return 1024;
675 case IB_MTU_2048
: return 2048;
676 case IB_MTU_4096
: return 4096;
681 static ssize_t
show_port_ib_mtu(struct device
*dev
,
682 struct device_attribute
*attr
,
685 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
687 struct mlx4_dev
*mdev
= info
->dev
;
689 if (mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_ETH
)
690 mlx4_warn(mdev
, "port level mtu is only used for IB ports\n");
693 ibta_mtu_to_int(mdev
->caps
.port_ib_mtu
[info
->port
]));
697 static ssize_t
set_port_ib_mtu(struct device
*dev
,
698 struct device_attribute
*attr
,
699 const char *buf
, size_t count
)
701 struct mlx4_port_info
*info
= container_of(attr
, struct mlx4_port_info
,
703 struct mlx4_dev
*mdev
= info
->dev
;
704 struct mlx4_priv
*priv
= mlx4_priv(mdev
);
705 int err
, port
, mtu
, ibta_mtu
= -1;
707 if (mdev
->caps
.port_type
[info
->port
] == MLX4_PORT_TYPE_ETH
) {
708 mlx4_warn(mdev
, "port level mtu is only used for IB ports\n");
712 err
= sscanf(buf
, "%d", &mtu
);
714 ibta_mtu
= int_to_ibta_mtu(mtu
);
716 if (err
<= 0 || ibta_mtu
< 0) {
717 mlx4_err(mdev
, "%s is invalid IBTA mtu\n", buf
);
721 mdev
->caps
.port_ib_mtu
[info
->port
] = ibta_mtu
;
723 mlx4_stop_sense(mdev
);
724 mutex_lock(&priv
->port_mutex
);
725 mlx4_unregister_device(mdev
);
726 for (port
= 1; port
<= mdev
->caps
.num_ports
; port
++) {
727 mlx4_CLOSE_PORT(mdev
, port
);
728 err
= mlx4_SET_PORT(mdev
, port
);
730 mlx4_err(mdev
, "Failed to set port %d, "
735 err
= mlx4_register_device(mdev
);
737 mutex_unlock(&priv
->port_mutex
);
738 mlx4_start_sense(mdev
);
739 return err
? err
: count
;
742 static int mlx4_load_fw(struct mlx4_dev
*dev
)
744 struct mlx4_priv
*priv
= mlx4_priv(dev
);
747 priv
->fw
.fw_icm
= mlx4_alloc_icm(dev
, priv
->fw
.fw_pages
,
748 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
749 if (!priv
->fw
.fw_icm
) {
750 mlx4_err(dev
, "Couldn't allocate FW area, aborting.\n");
754 err
= mlx4_MAP_FA(dev
, priv
->fw
.fw_icm
);
756 mlx4_err(dev
, "MAP_FA command failed, aborting.\n");
760 err
= mlx4_RUN_FW(dev
);
762 mlx4_err(dev
, "RUN_FW command failed, aborting.\n");
772 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
776 static int mlx4_init_cmpt_table(struct mlx4_dev
*dev
, u64 cmpt_base
,
779 struct mlx4_priv
*priv
= mlx4_priv(dev
);
783 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.cmpt_table
,
785 ((u64
) (MLX4_CMPT_TYPE_QP
*
786 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
787 cmpt_entry_sz
, dev
->caps
.num_qps
,
788 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
793 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.cmpt_table
,
795 ((u64
) (MLX4_CMPT_TYPE_SRQ
*
796 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
797 cmpt_entry_sz
, dev
->caps
.num_srqs
,
798 dev
->caps
.reserved_srqs
, 0, 0);
802 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.cmpt_table
,
804 ((u64
) (MLX4_CMPT_TYPE_CQ
*
805 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
806 cmpt_entry_sz
, dev
->caps
.num_cqs
,
807 dev
->caps
.reserved_cqs
, 0, 0);
811 num_eqs
= (mlx4_is_master(dev
)) ?
812 roundup_pow_of_two(mlx4_master_get_num_eqs(dev
)) :
814 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.cmpt_table
,
816 ((u64
) (MLX4_CMPT_TYPE_EQ
*
817 cmpt_entry_sz
) << MLX4_CMPT_SHIFT
),
818 cmpt_entry_sz
, num_eqs
, num_eqs
, 0, 0);
825 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
828 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
831 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
837 static int mlx4_init_icm(struct mlx4_dev
*dev
, struct mlx4_dev_cap
*dev_cap
,
838 struct mlx4_init_hca_param
*init_hca
, u64 icm_size
)
840 struct mlx4_priv
*priv
= mlx4_priv(dev
);
845 err
= mlx4_SET_ICM_SIZE(dev
, icm_size
, &aux_pages
);
847 mlx4_err(dev
, "SET_ICM_SIZE command failed, aborting.\n");
851 mlx4_dbg(dev
, "%lld KB of HCA context requires %lld KB aux memory.\n",
852 (unsigned long long) icm_size
>> 10,
853 (unsigned long long) aux_pages
<< 2);
855 priv
->fw
.aux_icm
= mlx4_alloc_icm(dev
, aux_pages
,
856 GFP_HIGHUSER
| __GFP_NOWARN
, 0);
857 if (!priv
->fw
.aux_icm
) {
858 mlx4_err(dev
, "Couldn't allocate aux memory, aborting.\n");
862 err
= mlx4_MAP_ICM_AUX(dev
, priv
->fw
.aux_icm
);
864 mlx4_err(dev
, "MAP_ICM_AUX command failed, aborting.\n");
868 err
= mlx4_init_cmpt_table(dev
, init_hca
->cmpt_base
, dev_cap
->cmpt_entry_sz
);
870 mlx4_err(dev
, "Failed to map cMPT context memory, aborting.\n");
875 num_eqs
= (mlx4_is_master(dev
)) ?
876 roundup_pow_of_two(mlx4_master_get_num_eqs(dev
)) :
878 err
= mlx4_init_icm_table(dev
, &priv
->eq_table
.table
,
879 init_hca
->eqc_base
, dev_cap
->eqc_entry_sz
,
880 num_eqs
, num_eqs
, 0, 0);
882 mlx4_err(dev
, "Failed to map EQ context memory, aborting.\n");
887 * Reserved MTT entries must be aligned up to a cacheline
888 * boundary, since the FW will write to them, while the driver
889 * writes to all other MTT entries. (The variable
890 * dev->caps.mtt_entry_sz below is really the MTT segment
891 * size, not the raw entry size)
893 dev
->caps
.reserved_mtts
=
894 ALIGN(dev
->caps
.reserved_mtts
* dev
->caps
.mtt_entry_sz
,
895 dma_get_cache_alignment()) / dev
->caps
.mtt_entry_sz
;
897 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.mtt_table
,
899 dev
->caps
.mtt_entry_sz
,
901 dev
->caps
.reserved_mtts
, 1, 0);
903 mlx4_err(dev
, "Failed to map MTT context memory, aborting.\n");
907 err
= mlx4_init_icm_table(dev
, &priv
->mr_table
.dmpt_table
,
909 dev_cap
->dmpt_entry_sz
,
911 dev
->caps
.reserved_mrws
, 1, 1);
913 mlx4_err(dev
, "Failed to map dMPT context memory, aborting.\n");
917 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.qp_table
,
919 dev_cap
->qpc_entry_sz
,
921 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
924 mlx4_err(dev
, "Failed to map QP context memory, aborting.\n");
928 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.auxc_table
,
930 dev_cap
->aux_entry_sz
,
932 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
935 mlx4_err(dev
, "Failed to map AUXC context memory, aborting.\n");
939 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.altc_table
,
941 dev_cap
->altc_entry_sz
,
943 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
946 mlx4_err(dev
, "Failed to map ALTC context memory, aborting.\n");
950 err
= mlx4_init_icm_table(dev
, &priv
->qp_table
.rdmarc_table
,
951 init_hca
->rdmarc_base
,
952 dev_cap
->rdmarc_entry_sz
<< priv
->qp_table
.rdmarc_shift
,
954 dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
],
957 mlx4_err(dev
, "Failed to map RDMARC context memory, aborting\n");
961 err
= mlx4_init_icm_table(dev
, &priv
->cq_table
.table
,
963 dev_cap
->cqc_entry_sz
,
965 dev
->caps
.reserved_cqs
, 0, 0);
967 mlx4_err(dev
, "Failed to map CQ context memory, aborting.\n");
968 goto err_unmap_rdmarc
;
971 err
= mlx4_init_icm_table(dev
, &priv
->srq_table
.table
,
973 dev_cap
->srq_entry_sz
,
975 dev
->caps
.reserved_srqs
, 0, 0);
977 mlx4_err(dev
, "Failed to map SRQ context memory, aborting.\n");
982 * It's not strictly required, but for simplicity just map the
983 * whole multicast group table now. The table isn't very big
984 * and it's a lot easier than trying to track ref counts.
986 err
= mlx4_init_icm_table(dev
, &priv
->mcg_table
.table
,
988 mlx4_get_mgm_entry_size(dev
),
989 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
990 dev
->caps
.num_mgms
+ dev
->caps
.num_amgms
,
993 mlx4_err(dev
, "Failed to map MCG context memory, aborting.\n");
1000 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
1003 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
1006 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
1009 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
1012 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
1015 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
1018 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
1021 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
1024 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.table
);
1027 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
1028 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
1029 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
1030 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
1033 mlx4_UNMAP_ICM_AUX(dev
);
1036 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
1041 static void mlx4_free_icms(struct mlx4_dev
*dev
)
1043 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1045 mlx4_cleanup_icm_table(dev
, &priv
->mcg_table
.table
);
1046 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.table
);
1047 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.table
);
1048 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.rdmarc_table
);
1049 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.altc_table
);
1050 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.auxc_table
);
1051 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.qp_table
);
1052 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.dmpt_table
);
1053 mlx4_cleanup_icm_table(dev
, &priv
->mr_table
.mtt_table
);
1054 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.table
);
1055 mlx4_cleanup_icm_table(dev
, &priv
->eq_table
.cmpt_table
);
1056 mlx4_cleanup_icm_table(dev
, &priv
->cq_table
.cmpt_table
);
1057 mlx4_cleanup_icm_table(dev
, &priv
->srq_table
.cmpt_table
);
1058 mlx4_cleanup_icm_table(dev
, &priv
->qp_table
.cmpt_table
);
1060 mlx4_UNMAP_ICM_AUX(dev
);
1061 mlx4_free_icm(dev
, priv
->fw
.aux_icm
, 0);
1064 static void mlx4_slave_exit(struct mlx4_dev
*dev
)
1066 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1068 down(&priv
->cmd
.slave_sem
);
1069 if (mlx4_comm_cmd(dev
, MLX4_COMM_CMD_RESET
, 0, MLX4_COMM_TIME
))
1070 mlx4_warn(dev
, "Failed to close slave function.\n");
1071 up(&priv
->cmd
.slave_sem
);
1074 static int map_bf_area(struct mlx4_dev
*dev
)
1076 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1077 resource_size_t bf_start
;
1078 resource_size_t bf_len
;
1081 if (!dev
->caps
.bf_reg_size
)
1084 bf_start
= pci_resource_start(dev
->pdev
, 2) +
1085 (dev
->caps
.num_uars
<< PAGE_SHIFT
);
1086 bf_len
= pci_resource_len(dev
->pdev
, 2) -
1087 (dev
->caps
.num_uars
<< PAGE_SHIFT
);
1088 priv
->bf_mapping
= io_mapping_create_wc(bf_start
, bf_len
);
1089 if (!priv
->bf_mapping
)
1095 static void unmap_bf_area(struct mlx4_dev
*dev
)
1097 if (mlx4_priv(dev
)->bf_mapping
)
1098 io_mapping_free(mlx4_priv(dev
)->bf_mapping
);
1101 static void mlx4_close_hca(struct mlx4_dev
*dev
)
1104 if (mlx4_is_slave(dev
))
1105 mlx4_slave_exit(dev
);
1107 mlx4_CLOSE_HCA(dev
, 0);
1108 mlx4_free_icms(dev
);
1110 mlx4_free_icm(dev
, mlx4_priv(dev
)->fw
.fw_icm
, 0);
1114 static int mlx4_init_slave(struct mlx4_dev
*dev
)
1116 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1117 u64 dma
= (u64
) priv
->mfunc
.vhcr_dma
;
1118 int num_of_reset_retries
= NUM_OF_RESET_RETRIES
;
1119 int ret_from_reset
= 0;
1121 u32 cmd_channel_ver
;
1123 down(&priv
->cmd
.slave_sem
);
1124 priv
->cmd
.max_cmds
= 1;
1125 mlx4_warn(dev
, "Sending reset\n");
1126 ret_from_reset
= mlx4_comm_cmd(dev
, MLX4_COMM_CMD_RESET
, 0,
1128 /* if we are in the middle of flr the slave will try
1129 * NUM_OF_RESET_RETRIES times before leaving.*/
1130 if (ret_from_reset
) {
1131 if (MLX4_DELAY_RESET_SLAVE
== ret_from_reset
) {
1132 msleep(SLEEP_TIME_IN_RESET
);
1133 while (ret_from_reset
&& num_of_reset_retries
) {
1134 mlx4_warn(dev
, "slave is currently in the"
1135 "middle of FLR. retrying..."
1137 (NUM_OF_RESET_RETRIES
-
1138 num_of_reset_retries
+ 1));
1140 mlx4_comm_cmd(dev
, MLX4_COMM_CMD_RESET
,
1142 num_of_reset_retries
= num_of_reset_retries
- 1;
1148 /* check the driver version - the slave I/F revision
1149 * must match the master's */
1150 slave_read
= swab32(readl(&priv
->mfunc
.comm
->slave_read
));
1151 cmd_channel_ver
= mlx4_comm_get_version();
1153 if (MLX4_COMM_GET_IF_REV(cmd_channel_ver
) !=
1154 MLX4_COMM_GET_IF_REV(slave_read
)) {
1155 mlx4_err(dev
, "slave driver version is not supported"
1156 " by the master\n");
1160 mlx4_warn(dev
, "Sending vhcr0\n");
1161 if (mlx4_comm_cmd(dev
, MLX4_COMM_CMD_VHCR0
, dma
>> 48,
1164 if (mlx4_comm_cmd(dev
, MLX4_COMM_CMD_VHCR1
, dma
>> 32,
1167 if (mlx4_comm_cmd(dev
, MLX4_COMM_CMD_VHCR2
, dma
>> 16,
1170 if (mlx4_comm_cmd(dev
, MLX4_COMM_CMD_VHCR_EN
, dma
, MLX4_COMM_TIME
))
1172 up(&priv
->cmd
.slave_sem
);
1176 mlx4_comm_cmd(dev
, MLX4_COMM_CMD_RESET
, 0, 0);
1177 up(&priv
->cmd
.slave_sem
);
1181 static int mlx4_init_hca(struct mlx4_dev
*dev
)
1183 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1184 struct mlx4_adapter adapter
;
1185 struct mlx4_dev_cap dev_cap
;
1186 struct mlx4_mod_stat_cfg mlx4_cfg
;
1187 struct mlx4_profile profile
;
1188 struct mlx4_init_hca_param init_hca
;
1192 if (!mlx4_is_slave(dev
)) {
1193 err
= mlx4_QUERY_FW(dev
);
1196 mlx4_info(dev
, "non-primary physical function, skipping.\n");
1198 mlx4_err(dev
, "QUERY_FW command failed, aborting.\n");
1202 err
= mlx4_load_fw(dev
);
1204 mlx4_err(dev
, "Failed to start FW, aborting.\n");
1208 mlx4_cfg
.log_pg_sz_m
= 1;
1209 mlx4_cfg
.log_pg_sz
= 0;
1210 err
= mlx4_MOD_STAT_CFG(dev
, &mlx4_cfg
);
1212 mlx4_warn(dev
, "Failed to override log_pg_sz parameter\n");
1214 err
= mlx4_dev_cap(dev
, &dev_cap
);
1216 mlx4_err(dev
, "QUERY_DEV_CAP command failed, aborting.\n");
1220 profile
= default_profile
;
1222 icm_size
= mlx4_make_profile(dev
, &profile
, &dev_cap
,
1224 if ((long long) icm_size
< 0) {
1229 dev
->caps
.max_fmr_maps
= (1 << (32 - ilog2(dev
->caps
.num_mpts
))) - 1;
1231 init_hca
.log_uar_sz
= ilog2(dev
->caps
.num_uars
);
1232 init_hca
.uar_page_sz
= PAGE_SHIFT
- 12;
1234 err
= mlx4_init_icm(dev
, &dev_cap
, &init_hca
, icm_size
);
1238 err
= mlx4_INIT_HCA(dev
, &init_hca
);
1240 mlx4_err(dev
, "INIT_HCA command failed, aborting.\n");
1244 err
= mlx4_init_slave(dev
);
1246 mlx4_err(dev
, "Failed to initialize slave\n");
1250 err
= mlx4_slave_cap(dev
);
1252 mlx4_err(dev
, "Failed to obtain slave caps\n");
1257 if (map_bf_area(dev
))
1258 mlx4_dbg(dev
, "Failed to map blue flame area\n");
1260 /*Only the master set the ports, all the rest got it from it.*/
1261 if (!mlx4_is_slave(dev
))
1262 mlx4_set_port_mask(dev
);
1264 err
= mlx4_QUERY_ADAPTER(dev
, &adapter
);
1266 mlx4_err(dev
, "QUERY_ADAPTER command failed, aborting.\n");
1270 priv
->eq_table
.inta_pin
= adapter
.inta_pin
;
1271 memcpy(dev
->board_id
, adapter
.board_id
, sizeof dev
->board_id
);
1276 mlx4_close_hca(dev
);
1279 if (!mlx4_is_slave(dev
))
1280 mlx4_free_icms(dev
);
1283 if (!mlx4_is_slave(dev
)) {
1285 mlx4_free_icm(dev
, priv
->fw
.fw_icm
, 0);
1292 static int mlx4_init_counters_table(struct mlx4_dev
*dev
)
1294 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1297 if (!(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_COUNTERS
))
1300 nent
= dev
->caps
.max_counters
;
1301 return mlx4_bitmap_init(&priv
->counters_bitmap
, nent
, nent
- 1, 0, 0);
1304 static void mlx4_cleanup_counters_table(struct mlx4_dev
*dev
)
1306 mlx4_bitmap_cleanup(&mlx4_priv(dev
)->counters_bitmap
);
1309 int __mlx4_counter_alloc(struct mlx4_dev
*dev
, u32
*idx
)
1311 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1313 if (!(dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_COUNTERS
))
1316 *idx
= mlx4_bitmap_alloc(&priv
->counters_bitmap
);
1323 int mlx4_counter_alloc(struct mlx4_dev
*dev
, u32
*idx
)
1328 if (mlx4_is_mfunc(dev
)) {
1329 err
= mlx4_cmd_imm(dev
, 0, &out_param
, RES_COUNTER
,
1330 RES_OP_RESERVE
, MLX4_CMD_ALLOC_RES
,
1331 MLX4_CMD_TIME_CLASS_A
, MLX4_CMD_WRAPPED
);
1333 *idx
= get_param_l(&out_param
);
1337 return __mlx4_counter_alloc(dev
, idx
);
1339 EXPORT_SYMBOL_GPL(mlx4_counter_alloc
);
1341 void __mlx4_counter_free(struct mlx4_dev
*dev
, u32 idx
)
1343 mlx4_bitmap_free(&mlx4_priv(dev
)->counters_bitmap
, idx
);
1347 void mlx4_counter_free(struct mlx4_dev
*dev
, u32 idx
)
1351 if (mlx4_is_mfunc(dev
)) {
1352 set_param_l(&in_param
, idx
);
1353 mlx4_cmd(dev
, in_param
, RES_COUNTER
, RES_OP_RESERVE
,
1354 MLX4_CMD_FREE_RES
, MLX4_CMD_TIME_CLASS_A
,
1358 __mlx4_counter_free(dev
, idx
);
1360 EXPORT_SYMBOL_GPL(mlx4_counter_free
);
1362 static int mlx4_setup_hca(struct mlx4_dev
*dev
)
1364 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1367 __be32 ib_port_default_caps
;
1369 err
= mlx4_init_uar_table(dev
);
1371 mlx4_err(dev
, "Failed to initialize "
1372 "user access region table, aborting.\n");
1376 err
= mlx4_uar_alloc(dev
, &priv
->driver_uar
);
1378 mlx4_err(dev
, "Failed to allocate driver access region, "
1380 goto err_uar_table_free
;
1383 priv
->kar
= ioremap((phys_addr_t
) priv
->driver_uar
.pfn
<< PAGE_SHIFT
, PAGE_SIZE
);
1385 mlx4_err(dev
, "Couldn't map kernel access region, "
1391 err
= mlx4_init_pd_table(dev
);
1393 mlx4_err(dev
, "Failed to initialize "
1394 "protection domain table, aborting.\n");
1398 err
= mlx4_init_xrcd_table(dev
);
1400 mlx4_err(dev
, "Failed to initialize "
1401 "reliable connection domain table, aborting.\n");
1402 goto err_pd_table_free
;
1405 err
= mlx4_init_mr_table(dev
);
1407 mlx4_err(dev
, "Failed to initialize "
1408 "memory region table, aborting.\n");
1409 goto err_xrcd_table_free
;
1412 err
= mlx4_init_eq_table(dev
);
1414 mlx4_err(dev
, "Failed to initialize "
1415 "event queue table, aborting.\n");
1416 goto err_mr_table_free
;
1419 err
= mlx4_cmd_use_events(dev
);
1421 mlx4_err(dev
, "Failed to switch to event-driven "
1422 "firmware commands, aborting.\n");
1423 goto err_eq_table_free
;
1426 err
= mlx4_NOP(dev
);
1428 if (dev
->flags
& MLX4_FLAG_MSI_X
) {
1429 mlx4_warn(dev
, "NOP command failed to generate MSI-X "
1430 "interrupt IRQ %d).\n",
1431 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
1432 mlx4_warn(dev
, "Trying again without MSI-X.\n");
1434 mlx4_err(dev
, "NOP command failed to generate interrupt "
1435 "(IRQ %d), aborting.\n",
1436 priv
->eq_table
.eq
[dev
->caps
.num_comp_vectors
].irq
);
1437 mlx4_err(dev
, "BIOS or ACPI interrupt routing problem?\n");
1443 mlx4_dbg(dev
, "NOP command IRQ test passed\n");
1445 err
= mlx4_init_cq_table(dev
);
1447 mlx4_err(dev
, "Failed to initialize "
1448 "completion queue table, aborting.\n");
1452 err
= mlx4_init_srq_table(dev
);
1454 mlx4_err(dev
, "Failed to initialize "
1455 "shared receive queue table, aborting.\n");
1456 goto err_cq_table_free
;
1459 err
= mlx4_init_qp_table(dev
);
1461 mlx4_err(dev
, "Failed to initialize "
1462 "queue pair table, aborting.\n");
1463 goto err_srq_table_free
;
1466 if (!mlx4_is_slave(dev
)) {
1467 err
= mlx4_init_mcg_table(dev
);
1469 mlx4_err(dev
, "Failed to initialize "
1470 "multicast group table, aborting.\n");
1471 goto err_qp_table_free
;
1475 err
= mlx4_init_counters_table(dev
);
1476 if (err
&& err
!= -ENOENT
) {
1477 mlx4_err(dev
, "Failed to initialize counters table, aborting.\n");
1478 goto err_mcg_table_free
;
1481 if (!mlx4_is_slave(dev
)) {
1482 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
1483 ib_port_default_caps
= 0;
1484 err
= mlx4_get_port_ib_caps(dev
, port
,
1485 &ib_port_default_caps
);
1487 mlx4_warn(dev
, "failed to get port %d default "
1488 "ib capabilities (%d). Continuing "
1489 "with caps = 0\n", port
, err
);
1490 dev
->caps
.ib_port_def_cap
[port
] = ib_port_default_caps
;
1492 if (mlx4_is_mfunc(dev
))
1493 dev
->caps
.port_ib_mtu
[port
] = IB_MTU_2048
;
1495 dev
->caps
.port_ib_mtu
[port
] = IB_MTU_4096
;
1497 err
= mlx4_SET_PORT(dev
, port
);
1499 mlx4_err(dev
, "Failed to set port %d, aborting\n",
1501 goto err_counters_table_free
;
1508 err_counters_table_free
:
1509 mlx4_cleanup_counters_table(dev
);
1512 mlx4_cleanup_mcg_table(dev
);
1515 mlx4_cleanup_qp_table(dev
);
1518 mlx4_cleanup_srq_table(dev
);
1521 mlx4_cleanup_cq_table(dev
);
1524 mlx4_cmd_use_polling(dev
);
1527 mlx4_cleanup_eq_table(dev
);
1530 mlx4_cleanup_mr_table(dev
);
1532 err_xrcd_table_free
:
1533 mlx4_cleanup_xrcd_table(dev
);
1536 mlx4_cleanup_pd_table(dev
);
1542 mlx4_uar_free(dev
, &priv
->driver_uar
);
1545 mlx4_cleanup_uar_table(dev
);
1549 static void mlx4_enable_msi_x(struct mlx4_dev
*dev
)
1551 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1552 struct msix_entry
*entries
;
1553 int nreq
= min_t(int, dev
->caps
.num_ports
*
1554 min_t(int, num_online_cpus() + 1, MAX_MSIX_P_PORT
)
1555 + MSIX_LEGACY_SZ
, MAX_MSIX
);
1560 /* In multifunction mode each function gets 2 msi-X vectors
1561 * one for data path completions anf the other for asynch events
1562 * or command completions */
1563 if (mlx4_is_mfunc(dev
)) {
1566 nreq
= min_t(int, dev
->caps
.num_eqs
-
1567 dev
->caps
.reserved_eqs
, nreq
);
1570 entries
= kcalloc(nreq
, sizeof *entries
, GFP_KERNEL
);
1574 for (i
= 0; i
< nreq
; ++i
)
1575 entries
[i
].entry
= i
;
1578 err
= pci_enable_msix(dev
->pdev
, entries
, nreq
);
1580 /* Try again if at least 2 vectors are available */
1582 mlx4_info(dev
, "Requested %d vectors, "
1583 "but only %d MSI-X vectors available, "
1584 "trying again\n", nreq
, err
);
1593 MSIX_LEGACY_SZ
+ dev
->caps
.num_ports
* MIN_MSIX_P_PORT
) {
1594 /*Working in legacy mode , all EQ's shared*/
1595 dev
->caps
.comp_pool
= 0;
1596 dev
->caps
.num_comp_vectors
= nreq
- 1;
1598 dev
->caps
.comp_pool
= nreq
- MSIX_LEGACY_SZ
;
1599 dev
->caps
.num_comp_vectors
= MSIX_LEGACY_SZ
- 1;
1601 for (i
= 0; i
< nreq
; ++i
)
1602 priv
->eq_table
.eq
[i
].irq
= entries
[i
].vector
;
1604 dev
->flags
|= MLX4_FLAG_MSI_X
;
1611 dev
->caps
.num_comp_vectors
= 1;
1612 dev
->caps
.comp_pool
= 0;
1614 for (i
= 0; i
< 2; ++i
)
1615 priv
->eq_table
.eq
[i
].irq
= dev
->pdev
->irq
;
1618 static int mlx4_init_port_info(struct mlx4_dev
*dev
, int port
)
1620 struct mlx4_port_info
*info
= &mlx4_priv(dev
)->port
[port
];
1625 if (!mlx4_is_slave(dev
)) {
1626 INIT_RADIX_TREE(&info
->mac_tree
, GFP_KERNEL
);
1627 mlx4_init_mac_table(dev
, &info
->mac_table
);
1628 mlx4_init_vlan_table(dev
, &info
->vlan_table
);
1630 dev
->caps
.reserved_qps_base
[MLX4_QP_REGION_ETH_ADDR
] +
1631 (port
- 1) * (1 << log_num_mac
);
1634 sprintf(info
->dev_name
, "mlx4_port%d", port
);
1635 info
->port_attr
.attr
.name
= info
->dev_name
;
1636 if (mlx4_is_mfunc(dev
))
1637 info
->port_attr
.attr
.mode
= S_IRUGO
;
1639 info
->port_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
1640 info
->port_attr
.store
= set_port_type
;
1642 info
->port_attr
.show
= show_port_type
;
1643 sysfs_attr_init(&info
->port_attr
.attr
);
1645 err
= device_create_file(&dev
->pdev
->dev
, &info
->port_attr
);
1647 mlx4_err(dev
, "Failed to create file for port %d\n", port
);
1651 sprintf(info
->dev_mtu_name
, "mlx4_port%d_mtu", port
);
1652 info
->port_mtu_attr
.attr
.name
= info
->dev_mtu_name
;
1653 if (mlx4_is_mfunc(dev
))
1654 info
->port_mtu_attr
.attr
.mode
= S_IRUGO
;
1656 info
->port_mtu_attr
.attr
.mode
= S_IRUGO
| S_IWUSR
;
1657 info
->port_mtu_attr
.store
= set_port_ib_mtu
;
1659 info
->port_mtu_attr
.show
= show_port_ib_mtu
;
1660 sysfs_attr_init(&info
->port_mtu_attr
.attr
);
1662 err
= device_create_file(&dev
->pdev
->dev
, &info
->port_mtu_attr
);
1664 mlx4_err(dev
, "Failed to create mtu file for port %d\n", port
);
1665 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_attr
);
1672 static void mlx4_cleanup_port_info(struct mlx4_port_info
*info
)
1677 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_attr
);
1678 device_remove_file(&info
->dev
->pdev
->dev
, &info
->port_mtu_attr
);
1681 static int mlx4_init_steering(struct mlx4_dev
*dev
)
1683 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1684 int num_entries
= dev
->caps
.num_ports
;
1687 priv
->steer
= kzalloc(sizeof(struct mlx4_steer
) * num_entries
, GFP_KERNEL
);
1691 for (i
= 0; i
< num_entries
; i
++)
1692 for (j
= 0; j
< MLX4_NUM_STEERS
; j
++) {
1693 INIT_LIST_HEAD(&priv
->steer
[i
].promisc_qps
[j
]);
1694 INIT_LIST_HEAD(&priv
->steer
[i
].steer_entries
[j
]);
1699 static void mlx4_clear_steering(struct mlx4_dev
*dev
)
1701 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1702 struct mlx4_steer_index
*entry
, *tmp_entry
;
1703 struct mlx4_promisc_qp
*pqp
, *tmp_pqp
;
1704 int num_entries
= dev
->caps
.num_ports
;
1707 for (i
= 0; i
< num_entries
; i
++) {
1708 for (j
= 0; j
< MLX4_NUM_STEERS
; j
++) {
1709 list_for_each_entry_safe(pqp
, tmp_pqp
,
1710 &priv
->steer
[i
].promisc_qps
[j
],
1712 list_del(&pqp
->list
);
1715 list_for_each_entry_safe(entry
, tmp_entry
,
1716 &priv
->steer
[i
].steer_entries
[j
],
1718 list_del(&entry
->list
);
1719 list_for_each_entry_safe(pqp
, tmp_pqp
,
1722 list_del(&pqp
->list
);
1732 static int extended_func_num(struct pci_dev
*pdev
)
1734 return PCI_SLOT(pdev
->devfn
) * 8 + PCI_FUNC(pdev
->devfn
);
1737 #define MLX4_OWNER_BASE 0x8069c
1738 #define MLX4_OWNER_SIZE 4
1740 static int mlx4_get_ownership(struct mlx4_dev
*dev
)
1742 void __iomem
*owner
;
1745 owner
= ioremap(pci_resource_start(dev
->pdev
, 0) + MLX4_OWNER_BASE
,
1748 mlx4_err(dev
, "Failed to obtain ownership bit\n");
1757 static void mlx4_free_ownership(struct mlx4_dev
*dev
)
1759 void __iomem
*owner
;
1761 owner
= ioremap(pci_resource_start(dev
->pdev
, 0) + MLX4_OWNER_BASE
,
1764 mlx4_err(dev
, "Failed to obtain ownership bit\n");
1772 static int __mlx4_init_one(struct pci_dev
*pdev
, const struct pci_device_id
*id
)
1774 struct mlx4_priv
*priv
;
1775 struct mlx4_dev
*dev
;
1779 pr_info(DRV_NAME
": Initializing %s\n", pci_name(pdev
));
1781 err
= pci_enable_device(pdev
);
1783 dev_err(&pdev
->dev
, "Cannot enable PCI device, "
1787 if (num_vfs
> MLX4_MAX_NUM_VF
) {
1788 printk(KERN_ERR
"There are more VF's (%d) than allowed(%d)\n",
1789 num_vfs
, MLX4_MAX_NUM_VF
);
1795 if (((id
== NULL
) || !(id
->driver_data
& MLX4_VF
)) &&
1796 !(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
)) {
1797 dev_err(&pdev
->dev
, "Missing DCS, aborting."
1798 "(id == 0X%p, id->driver_data: 0x%lx,"
1799 " pci_resource_flags(pdev, 0):0x%lx)\n", id
,
1800 id
? id
->driver_data
: 0, pci_resource_flags(pdev
, 0));
1802 goto err_disable_pdev
;
1804 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
1805 dev_err(&pdev
->dev
, "Missing UAR, aborting.\n");
1807 goto err_disable_pdev
;
1810 err
= pci_request_regions(pdev
, DRV_NAME
);
1812 dev_err(&pdev
->dev
, "Couldn't get PCI resources, aborting\n");
1813 goto err_disable_pdev
;
1816 pci_set_master(pdev
);
1818 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(64));
1820 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit PCI DMA mask.\n");
1821 err
= pci_set_dma_mask(pdev
, DMA_BIT_MASK(32));
1823 dev_err(&pdev
->dev
, "Can't set PCI DMA mask, aborting.\n");
1824 goto err_release_regions
;
1827 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(64));
1829 dev_warn(&pdev
->dev
, "Warning: couldn't set 64-bit "
1830 "consistent PCI DMA mask.\n");
1831 err
= pci_set_consistent_dma_mask(pdev
, DMA_BIT_MASK(32));
1833 dev_err(&pdev
->dev
, "Can't set consistent PCI DMA mask, "
1835 goto err_release_regions
;
1839 /* Allow large DMA segments, up to the firmware limit of 1 GB */
1840 dma_set_max_seg_size(&pdev
->dev
, 1024 * 1024 * 1024);
1842 priv
= kzalloc(sizeof *priv
, GFP_KERNEL
);
1844 dev_err(&pdev
->dev
, "Device struct alloc failed, "
1847 goto err_release_regions
;
1852 INIT_LIST_HEAD(&priv
->ctx_list
);
1853 spin_lock_init(&priv
->ctx_lock
);
1855 mutex_init(&priv
->port_mutex
);
1857 INIT_LIST_HEAD(&priv
->pgdir_list
);
1858 mutex_init(&priv
->pgdir_mutex
);
1860 INIT_LIST_HEAD(&priv
->bf_list
);
1861 mutex_init(&priv
->bf_mutex
);
1863 dev
->rev_id
= pdev
->revision
;
1864 /* Detect if this device is a virtual function */
1865 if (id
&& id
->driver_data
& MLX4_VF
) {
1866 /* When acting as pf, we normally skip vfs unless explicitly
1867 * requested to probe them. */
1868 if (num_vfs
&& extended_func_num(pdev
) > probe_vf
) {
1869 mlx4_warn(dev
, "Skipping virtual function:%d\n",
1870 extended_func_num(pdev
));
1874 mlx4_warn(dev
, "Detected virtual function - running in slave mode\n");
1875 dev
->flags
|= MLX4_FLAG_SLAVE
;
1877 /* We reset the device and enable SRIOV only for physical
1878 * devices. Try to claim ownership on the device;
1879 * if already taken, skip -- do not allow multiple PFs */
1880 err
= mlx4_get_ownership(dev
);
1885 mlx4_warn(dev
, "Multiple PFs not yet supported."
1893 mlx4_warn(dev
, "Enabling sriov with:%d vfs\n", num_vfs
);
1894 err
= pci_enable_sriov(pdev
, num_vfs
);
1896 mlx4_err(dev
, "Failed to enable sriov,"
1897 "continuing without sriov enabled"
1898 " (err = %d).\n", err
);
1901 mlx4_warn(dev
, "Running in master mode\n");
1902 dev
->flags
|= MLX4_FLAG_SRIOV
|
1904 dev
->num_vfs
= num_vfs
;
1909 * Now reset the HCA before we touch the PCI capabilities or
1910 * attempt a firmware command, since a boot ROM may have left
1911 * the HCA in an undefined state.
1913 err
= mlx4_reset(dev
);
1915 mlx4_err(dev
, "Failed to reset HCA, aborting.\n");
1921 if (mlx4_cmd_init(dev
)) {
1922 mlx4_err(dev
, "Failed to init command interface, aborting.\n");
1926 /* In slave functions, the communication channel must be initialized
1927 * before posting commands. Also, init num_slaves before calling
1929 if (mlx4_is_mfunc(dev
)) {
1930 if (mlx4_is_master(dev
))
1931 dev
->num_slaves
= MLX4_MAX_NUM_SLAVES
;
1933 dev
->num_slaves
= 0;
1934 if (mlx4_multi_func_init(dev
)) {
1935 mlx4_err(dev
, "Failed to init slave mfunc"
1936 " interface, aborting.\n");
1942 err
= mlx4_init_hca(dev
);
1944 if (err
== -EACCES
) {
1945 /* Not primary Physical function
1946 * Running in slave mode */
1947 mlx4_cmd_cleanup(dev
);
1948 dev
->flags
|= MLX4_FLAG_SLAVE
;
1949 dev
->flags
&= ~MLX4_FLAG_MASTER
;
1955 /* In master functions, the communication channel must be initialized
1956 * after obtaining its address from fw */
1957 if (mlx4_is_master(dev
)) {
1958 if (mlx4_multi_func_init(dev
)) {
1959 mlx4_err(dev
, "Failed to init master mfunc"
1960 "interface, aborting.\n");
1965 err
= mlx4_alloc_eq_table(dev
);
1967 goto err_master_mfunc
;
1969 priv
->msix_ctl
.pool_bm
= 0;
1970 mutex_init(&priv
->msix_ctl
.pool_lock
);
1972 mlx4_enable_msi_x(dev
);
1973 if ((mlx4_is_mfunc(dev
)) &&
1974 !(dev
->flags
& MLX4_FLAG_MSI_X
)) {
1975 mlx4_err(dev
, "INTx is not supported in multi-function mode."
1980 if (!mlx4_is_slave(dev
)) {
1981 err
= mlx4_init_steering(dev
);
1986 err
= mlx4_setup_hca(dev
);
1987 if (err
== -EBUSY
&& (dev
->flags
& MLX4_FLAG_MSI_X
) &&
1988 !mlx4_is_mfunc(dev
)) {
1989 dev
->flags
&= ~MLX4_FLAG_MSI_X
;
1990 pci_disable_msix(pdev
);
1991 err
= mlx4_setup_hca(dev
);
1997 for (port
= 1; port
<= dev
->caps
.num_ports
; port
++) {
1998 err
= mlx4_init_port_info(dev
, port
);
2003 err
= mlx4_register_device(dev
);
2007 mlx4_sense_init(dev
);
2008 mlx4_start_sense(dev
);
2010 pci_set_drvdata(pdev
, dev
);
2015 for (--port
; port
>= 1; --port
)
2016 mlx4_cleanup_port_info(&priv
->port
[port
]);
2018 mlx4_cleanup_counters_table(dev
);
2019 mlx4_cleanup_mcg_table(dev
);
2020 mlx4_cleanup_qp_table(dev
);
2021 mlx4_cleanup_srq_table(dev
);
2022 mlx4_cleanup_cq_table(dev
);
2023 mlx4_cmd_use_polling(dev
);
2024 mlx4_cleanup_eq_table(dev
);
2025 mlx4_cleanup_mr_table(dev
);
2026 mlx4_cleanup_xrcd_table(dev
);
2027 mlx4_cleanup_pd_table(dev
);
2028 mlx4_cleanup_uar_table(dev
);
2031 if (!mlx4_is_slave(dev
))
2032 mlx4_clear_steering(dev
);
2035 mlx4_free_eq_table(dev
);
2038 if (mlx4_is_master(dev
))
2039 mlx4_multi_func_cleanup(dev
);
2042 if (dev
->flags
& MLX4_FLAG_MSI_X
)
2043 pci_disable_msix(pdev
);
2045 mlx4_close_hca(dev
);
2048 if (mlx4_is_slave(dev
))
2049 mlx4_multi_func_cleanup(dev
);
2052 mlx4_cmd_cleanup(dev
);
2055 if (dev
->flags
& MLX4_FLAG_SRIOV
)
2056 pci_disable_sriov(pdev
);
2059 if (!mlx4_is_slave(dev
))
2060 mlx4_free_ownership(dev
);
2065 err_release_regions
:
2066 pci_release_regions(pdev
);
2069 pci_disable_device(pdev
);
2070 pci_set_drvdata(pdev
, NULL
);
2074 static int __devinit
mlx4_init_one(struct pci_dev
*pdev
,
2075 const struct pci_device_id
*id
)
2077 printk_once(KERN_INFO
"%s", mlx4_version
);
2079 return __mlx4_init_one(pdev
, id
);
2082 static void mlx4_remove_one(struct pci_dev
*pdev
)
2084 struct mlx4_dev
*dev
= pci_get_drvdata(pdev
);
2085 struct mlx4_priv
*priv
= mlx4_priv(dev
);
2089 /* in SRIOV it is not allowed to unload the pf's
2090 * driver while there are alive vf's */
2091 if (mlx4_is_master(dev
)) {
2092 if (mlx4_how_many_lives_vf(dev
))
2093 printk(KERN_ERR
"Removing PF when there are assigned VF's !!!\n");
2095 mlx4_stop_sense(dev
);
2096 mlx4_unregister_device(dev
);
2098 for (p
= 1; p
<= dev
->caps
.num_ports
; p
++) {
2099 mlx4_cleanup_port_info(&priv
->port
[p
]);
2100 mlx4_CLOSE_PORT(dev
, p
);
2103 if (mlx4_is_master(dev
))
2104 mlx4_free_resource_tracker(dev
,
2105 RES_TR_FREE_SLAVES_ONLY
);
2107 mlx4_cleanup_counters_table(dev
);
2108 mlx4_cleanup_mcg_table(dev
);
2109 mlx4_cleanup_qp_table(dev
);
2110 mlx4_cleanup_srq_table(dev
);
2111 mlx4_cleanup_cq_table(dev
);
2112 mlx4_cmd_use_polling(dev
);
2113 mlx4_cleanup_eq_table(dev
);
2114 mlx4_cleanup_mr_table(dev
);
2115 mlx4_cleanup_xrcd_table(dev
);
2116 mlx4_cleanup_pd_table(dev
);
2118 if (mlx4_is_master(dev
))
2119 mlx4_free_resource_tracker(dev
,
2120 RES_TR_FREE_STRUCTS_ONLY
);
2123 mlx4_uar_free(dev
, &priv
->driver_uar
);
2124 mlx4_cleanup_uar_table(dev
);
2125 if (!mlx4_is_slave(dev
))
2126 mlx4_clear_steering(dev
);
2127 mlx4_free_eq_table(dev
);
2128 if (mlx4_is_master(dev
))
2129 mlx4_multi_func_cleanup(dev
);
2130 mlx4_close_hca(dev
);
2131 if (mlx4_is_slave(dev
))
2132 mlx4_multi_func_cleanup(dev
);
2133 mlx4_cmd_cleanup(dev
);
2135 if (dev
->flags
& MLX4_FLAG_MSI_X
)
2136 pci_disable_msix(pdev
);
2137 if (dev
->flags
& MLX4_FLAG_SRIOV
) {
2138 mlx4_warn(dev
, "Disabling sriov\n");
2139 pci_disable_sriov(pdev
);
2142 if (!mlx4_is_slave(dev
))
2143 mlx4_free_ownership(dev
);
2145 pci_release_regions(pdev
);
2146 pci_disable_device(pdev
);
2147 pci_set_drvdata(pdev
, NULL
);
2151 int mlx4_restart_one(struct pci_dev
*pdev
)
2153 mlx4_remove_one(pdev
);
2154 return __mlx4_init_one(pdev
, NULL
);
2157 static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table
) = {
2158 /* MT25408 "Hermon" SDR */
2159 { PCI_VDEVICE(MELLANOX
, 0x6340), 0 },
2160 /* MT25408 "Hermon" DDR */
2161 { PCI_VDEVICE(MELLANOX
, 0x634a), 0 },
2162 /* MT25408 "Hermon" QDR */
2163 { PCI_VDEVICE(MELLANOX
, 0x6354), 0 },
2164 /* MT25408 "Hermon" DDR PCIe gen2 */
2165 { PCI_VDEVICE(MELLANOX
, 0x6732), 0 },
2166 /* MT25408 "Hermon" QDR PCIe gen2 */
2167 { PCI_VDEVICE(MELLANOX
, 0x673c), 0 },
2168 /* MT25408 "Hermon" EN 10GigE */
2169 { PCI_VDEVICE(MELLANOX
, 0x6368), 0 },
2170 /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2171 { PCI_VDEVICE(MELLANOX
, 0x6750), 0 },
2172 /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2173 { PCI_VDEVICE(MELLANOX
, 0x6372), 0 },
2174 /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2175 { PCI_VDEVICE(MELLANOX
, 0x675a), 0 },
2176 /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2177 { PCI_VDEVICE(MELLANOX
, 0x6764), 0 },
2178 /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2179 { PCI_VDEVICE(MELLANOX
, 0x6746), 0 },
2180 /* MT26478 ConnectX2 40GigE PCIe gen2 */
2181 { PCI_VDEVICE(MELLANOX
, 0x676e), 0 },
2182 /* MT25400 Family [ConnectX-2 Virtual Function] */
2183 { PCI_VDEVICE(MELLANOX
, 0x1002), MLX4_VF
},
2184 /* MT27500 Family [ConnectX-3] */
2185 { PCI_VDEVICE(MELLANOX
, 0x1003), 0 },
2186 /* MT27500 Family [ConnectX-3 Virtual Function] */
2187 { PCI_VDEVICE(MELLANOX
, 0x1004), MLX4_VF
},
2188 { PCI_VDEVICE(MELLANOX
, 0x1005), 0 }, /* MT27510 Family */
2189 { PCI_VDEVICE(MELLANOX
, 0x1006), 0 }, /* MT27511 Family */
2190 { PCI_VDEVICE(MELLANOX
, 0x1007), 0 }, /* MT27520 Family */
2191 { PCI_VDEVICE(MELLANOX
, 0x1008), 0 }, /* MT27521 Family */
2192 { PCI_VDEVICE(MELLANOX
, 0x1009), 0 }, /* MT27530 Family */
2193 { PCI_VDEVICE(MELLANOX
, 0x100a), 0 }, /* MT27531 Family */
2194 { PCI_VDEVICE(MELLANOX
, 0x100b), 0 }, /* MT27540 Family */
2195 { PCI_VDEVICE(MELLANOX
, 0x100c), 0 }, /* MT27541 Family */
2196 { PCI_VDEVICE(MELLANOX
, 0x100d), 0 }, /* MT27550 Family */
2197 { PCI_VDEVICE(MELLANOX
, 0x100e), 0 }, /* MT27551 Family */
2198 { PCI_VDEVICE(MELLANOX
, 0x100f), 0 }, /* MT27560 Family */
2199 { PCI_VDEVICE(MELLANOX
, 0x1010), 0 }, /* MT27561 Family */
2203 MODULE_DEVICE_TABLE(pci
, mlx4_pci_table
);
2205 static struct pci_driver mlx4_driver
= {
2207 .id_table
= mlx4_pci_table
,
2208 .probe
= mlx4_init_one
,
2209 .remove
= __devexit_p(mlx4_remove_one
)
2212 static int __init
mlx4_verify_params(void)
2214 if ((log_num_mac
< 0) || (log_num_mac
> 7)) {
2215 pr_warning("mlx4_core: bad num_mac: %d\n", log_num_mac
);
2219 if (log_num_vlan
!= 0)
2220 pr_warning("mlx4_core: log_num_vlan - obsolete module param, using %d\n",
2221 MLX4_LOG_NUM_VLANS
);
2223 if ((log_mtts_per_seg
< 1) || (log_mtts_per_seg
> 7)) {
2224 pr_warning("mlx4_core: bad log_mtts_per_seg: %d\n", log_mtts_per_seg
);
2228 /* Check if module param for ports type has legal combination */
2229 if (port_type_array
[0] == false && port_type_array
[1] == true) {
2230 printk(KERN_WARNING
"Module parameter configuration ETH/IB is not supported. Switching to default configuration IB/IB\n");
2231 port_type_array
[0] = true;
2237 static int __init
mlx4_init(void)
2241 if (mlx4_verify_params())
2246 mlx4_wq
= create_singlethread_workqueue("mlx4");
2250 ret
= pci_register_driver(&mlx4_driver
);
2251 return ret
< 0 ? ret
: 0;
2254 static void __exit
mlx4_cleanup(void)
2256 pci_unregister_driver(&mlx4_driver
);
2257 destroy_workqueue(mlx4_wq
);
2260 module_init(mlx4_init
);
2261 module_exit(mlx4_cleanup
);