2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005, 2006, 2007, 2008 Mellanox Technologies.
5 * Copyright (c) 2005, 2006, 2007 Cisco Systems, Inc. All rights reserved.
7 * This software is available to you under a choice of one of two
8 * licenses. You may choose to be licensed under the terms of the GNU
9 * General Public License (GPL) Version 2, available from the file
10 * COPYING in the main directory of this source tree, or the
11 * OpenIB.org BSD license below:
13 * Redistribution and use in source and binary forms, with or
14 * without modification, are permitted provided that the following
17 * - Redistributions of source code must retain the above
18 * copyright notice, this list of conditions and the following
21 * - Redistributions in binary form must reproduce the above
22 * copyright notice, this list of conditions and the following
23 * disclaimer in the documentation and/or other materials
24 * provided with the distribution.
26 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
27 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
28 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
29 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
30 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
31 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
32 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 #include <linux/sched.h>
37 #include <linux/pci.h>
38 #include <linux/errno.h>
39 #include <linux/kernel.h>
41 #include <linux/slab.h>
42 #include <linux/mlx4/cmd.h>
43 #include <linux/mlx4/qp.h>
44 #include <linux/if_ether.h>
45 #include <linux/etherdevice.h>
50 #define MLX4_MAC_VALID (1ull << 63)
53 struct list_head list
;
59 struct list_head list
;
74 struct list_head list
;
76 enum mlx4_protocol prot
;
77 enum mlx4_steer_type steer
;
81 RES_QP_BUSY
= RES_ANY_BUSY
,
83 /* QP number was allocated */
86 /* ICM memory for QP context was mapped */
89 /* QP is in hw ownership */
94 struct res_common com
;
99 struct list_head mcg_list
;
104 enum res_mtt_states
{
105 RES_MTT_BUSY
= RES_ANY_BUSY
,
109 static inline const char *mtt_states_str(enum res_mtt_states state
)
112 case RES_MTT_BUSY
: return "RES_MTT_BUSY";
113 case RES_MTT_ALLOCATED
: return "RES_MTT_ALLOCATED";
114 default: return "Unknown";
119 struct res_common com
;
124 enum res_mpt_states
{
125 RES_MPT_BUSY
= RES_ANY_BUSY
,
132 struct res_common com
;
138 RES_EQ_BUSY
= RES_ANY_BUSY
,
144 struct res_common com
;
149 RES_CQ_BUSY
= RES_ANY_BUSY
,
155 struct res_common com
;
160 enum res_srq_states
{
161 RES_SRQ_BUSY
= RES_ANY_BUSY
,
167 struct res_common com
;
173 enum res_counter_states
{
174 RES_COUNTER_BUSY
= RES_ANY_BUSY
,
175 RES_COUNTER_ALLOCATED
,
179 struct res_common com
;
183 enum res_xrcdn_states
{
184 RES_XRCD_BUSY
= RES_ANY_BUSY
,
189 struct res_common com
;
193 enum res_fs_rule_states
{
194 RES_FS_RULE_BUSY
= RES_ANY_BUSY
,
195 RES_FS_RULE_ALLOCATED
,
199 struct res_common com
;
202 static void *res_tracker_lookup(struct rb_root
*root
, u64 res_id
)
204 struct rb_node
*node
= root
->rb_node
;
207 struct res_common
*res
= container_of(node
, struct res_common
,
210 if (res_id
< res
->res_id
)
211 node
= node
->rb_left
;
212 else if (res_id
> res
->res_id
)
213 node
= node
->rb_right
;
220 static int res_tracker_insert(struct rb_root
*root
, struct res_common
*res
)
222 struct rb_node
**new = &(root
->rb_node
), *parent
= NULL
;
224 /* Figure out where to put new node */
226 struct res_common
*this = container_of(*new, struct res_common
,
230 if (res
->res_id
< this->res_id
)
231 new = &((*new)->rb_left
);
232 else if (res
->res_id
> this->res_id
)
233 new = &((*new)->rb_right
);
238 /* Add new node and rebalance tree. */
239 rb_link_node(&res
->node
, parent
, new);
240 rb_insert_color(&res
->node
, root
);
255 static const char *ResourceType(enum mlx4_resource rt
)
258 case RES_QP
: return "RES_QP";
259 case RES_CQ
: return "RES_CQ";
260 case RES_SRQ
: return "RES_SRQ";
261 case RES_MPT
: return "RES_MPT";
262 case RES_MTT
: return "RES_MTT";
263 case RES_MAC
: return "RES_MAC";
264 case RES_EQ
: return "RES_EQ";
265 case RES_COUNTER
: return "RES_COUNTER";
266 case RES_FS_RULE
: return "RES_FS_RULE";
267 case RES_XRCD
: return "RES_XRCD";
268 default: return "Unknown resource type !!!";
272 int mlx4_init_resource_tracker(struct mlx4_dev
*dev
)
274 struct mlx4_priv
*priv
= mlx4_priv(dev
);
278 priv
->mfunc
.master
.res_tracker
.slave_list
=
279 kzalloc(dev
->num_slaves
* sizeof(struct slave_list
),
281 if (!priv
->mfunc
.master
.res_tracker
.slave_list
)
284 for (i
= 0 ; i
< dev
->num_slaves
; i
++) {
285 for (t
= 0; t
< MLX4_NUM_OF_RESOURCE_TYPE
; ++t
)
286 INIT_LIST_HEAD(&priv
->mfunc
.master
.res_tracker
.
287 slave_list
[i
].res_list
[t
]);
288 mutex_init(&priv
->mfunc
.master
.res_tracker
.slave_list
[i
].mutex
);
291 mlx4_dbg(dev
, "Started init_resource_tracker: %ld slaves\n",
293 for (i
= 0 ; i
< MLX4_NUM_OF_RESOURCE_TYPE
; i
++)
294 priv
->mfunc
.master
.res_tracker
.res_tree
[i
] = RB_ROOT
;
296 spin_lock_init(&priv
->mfunc
.master
.res_tracker
.lock
);
300 void mlx4_free_resource_tracker(struct mlx4_dev
*dev
,
301 enum mlx4_res_tracker_free_type type
)
303 struct mlx4_priv
*priv
= mlx4_priv(dev
);
306 if (priv
->mfunc
.master
.res_tracker
.slave_list
) {
307 if (type
!= RES_TR_FREE_STRUCTS_ONLY
)
308 for (i
= 0 ; i
< dev
->num_slaves
; i
++)
309 if (type
== RES_TR_FREE_ALL
||
310 dev
->caps
.function
!= i
)
311 mlx4_delete_all_resources_for_slave(dev
, i
);
313 if (type
!= RES_TR_FREE_SLAVES_ONLY
) {
314 kfree(priv
->mfunc
.master
.res_tracker
.slave_list
);
315 priv
->mfunc
.master
.res_tracker
.slave_list
= NULL
;
320 static void update_pkey_index(struct mlx4_dev
*dev
, int slave
,
321 struct mlx4_cmd_mailbox
*inbox
)
323 u8 sched
= *(u8
*)(inbox
->buf
+ 64);
324 u8 orig_index
= *(u8
*)(inbox
->buf
+ 35);
326 struct mlx4_priv
*priv
= mlx4_priv(dev
);
329 port
= (sched
>> 6 & 1) + 1;
331 new_index
= priv
->virt2phys_pkey
[slave
][port
- 1][orig_index
];
332 *(u8
*)(inbox
->buf
+ 35) = new_index
;
335 static void update_gid(struct mlx4_dev
*dev
, struct mlx4_cmd_mailbox
*inbox
,
338 struct mlx4_qp_context
*qp_ctx
= inbox
->buf
+ 8;
339 enum mlx4_qp_optpar optpar
= be32_to_cpu(*(__be32
*) inbox
->buf
);
340 u32 ts
= (be32_to_cpu(qp_ctx
->flags
) >> 16) & 0xff;
342 if (MLX4_QP_ST_UD
== ts
)
343 qp_ctx
->pri_path
.mgid_index
= 0x80 | slave
;
345 if (MLX4_QP_ST_RC
== ts
|| MLX4_QP_ST_UC
== ts
) {
346 if (optpar
& MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
)
347 qp_ctx
->pri_path
.mgid_index
= slave
& 0x7F;
348 if (optpar
& MLX4_QP_OPTPAR_ALT_ADDR_PATH
)
349 qp_ctx
->alt_path
.mgid_index
= slave
& 0x7F;
353 static int mpt_mask(struct mlx4_dev
*dev
)
355 return dev
->caps
.num_mpts
- 1;
358 static void *find_res(struct mlx4_dev
*dev
, int res_id
,
359 enum mlx4_resource type
)
361 struct mlx4_priv
*priv
= mlx4_priv(dev
);
363 return res_tracker_lookup(&priv
->mfunc
.master
.res_tracker
.res_tree
[type
],
367 static int get_res(struct mlx4_dev
*dev
, int slave
, u64 res_id
,
368 enum mlx4_resource type
,
371 struct res_common
*r
;
374 spin_lock_irq(mlx4_tlock(dev
));
375 r
= find_res(dev
, res_id
, type
);
381 if (r
->state
== RES_ANY_BUSY
) {
386 if (r
->owner
!= slave
) {
391 r
->from_state
= r
->state
;
392 r
->state
= RES_ANY_BUSY
;
395 *((struct res_common
**)res
) = r
;
398 spin_unlock_irq(mlx4_tlock(dev
));
402 int mlx4_get_slave_from_resource_id(struct mlx4_dev
*dev
,
403 enum mlx4_resource type
,
404 u64 res_id
, int *slave
)
407 struct res_common
*r
;
413 spin_lock(mlx4_tlock(dev
));
415 r
= find_res(dev
, id
, type
);
420 spin_unlock(mlx4_tlock(dev
));
425 static void put_res(struct mlx4_dev
*dev
, int slave
, u64 res_id
,
426 enum mlx4_resource type
)
428 struct res_common
*r
;
430 spin_lock_irq(mlx4_tlock(dev
));
431 r
= find_res(dev
, res_id
, type
);
433 r
->state
= r
->from_state
;
434 spin_unlock_irq(mlx4_tlock(dev
));
437 static struct res_common
*alloc_qp_tr(int id
)
441 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
445 ret
->com
.res_id
= id
;
446 ret
->com
.state
= RES_QP_RESERVED
;
448 INIT_LIST_HEAD(&ret
->mcg_list
);
449 spin_lock_init(&ret
->mcg_spl
);
454 static struct res_common
*alloc_mtt_tr(int id
, int order
)
458 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
462 ret
->com
.res_id
= id
;
464 ret
->com
.state
= RES_MTT_ALLOCATED
;
465 atomic_set(&ret
->ref_count
, 0);
470 static struct res_common
*alloc_mpt_tr(int id
, int key
)
474 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
478 ret
->com
.res_id
= id
;
479 ret
->com
.state
= RES_MPT_RESERVED
;
485 static struct res_common
*alloc_eq_tr(int id
)
489 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
493 ret
->com
.res_id
= id
;
494 ret
->com
.state
= RES_EQ_RESERVED
;
499 static struct res_common
*alloc_cq_tr(int id
)
503 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
507 ret
->com
.res_id
= id
;
508 ret
->com
.state
= RES_CQ_ALLOCATED
;
509 atomic_set(&ret
->ref_count
, 0);
514 static struct res_common
*alloc_srq_tr(int id
)
518 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
522 ret
->com
.res_id
= id
;
523 ret
->com
.state
= RES_SRQ_ALLOCATED
;
524 atomic_set(&ret
->ref_count
, 0);
529 static struct res_common
*alloc_counter_tr(int id
)
531 struct res_counter
*ret
;
533 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
537 ret
->com
.res_id
= id
;
538 ret
->com
.state
= RES_COUNTER_ALLOCATED
;
543 static struct res_common
*alloc_xrcdn_tr(int id
)
545 struct res_xrcdn
*ret
;
547 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
551 ret
->com
.res_id
= id
;
552 ret
->com
.state
= RES_XRCD_ALLOCATED
;
557 static struct res_common
*alloc_fs_rule_tr(u64 id
)
559 struct res_fs_rule
*ret
;
561 ret
= kzalloc(sizeof *ret
, GFP_KERNEL
);
565 ret
->com
.res_id
= id
;
566 ret
->com
.state
= RES_FS_RULE_ALLOCATED
;
571 static struct res_common
*alloc_tr(u64 id
, enum mlx4_resource type
, int slave
,
574 struct res_common
*ret
;
578 ret
= alloc_qp_tr(id
);
581 ret
= alloc_mpt_tr(id
, extra
);
584 ret
= alloc_mtt_tr(id
, extra
);
587 ret
= alloc_eq_tr(id
);
590 ret
= alloc_cq_tr(id
);
593 ret
= alloc_srq_tr(id
);
596 printk(KERN_ERR
"implementation missing\n");
599 ret
= alloc_counter_tr(id
);
602 ret
= alloc_xrcdn_tr(id
);
605 ret
= alloc_fs_rule_tr(id
);
616 static int add_res_range(struct mlx4_dev
*dev
, int slave
, u64 base
, int count
,
617 enum mlx4_resource type
, int extra
)
621 struct mlx4_priv
*priv
= mlx4_priv(dev
);
622 struct res_common
**res_arr
;
623 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
624 struct rb_root
*root
= &tracker
->res_tree
[type
];
626 res_arr
= kzalloc(count
* sizeof *res_arr
, GFP_KERNEL
);
630 for (i
= 0; i
< count
; ++i
) {
631 res_arr
[i
] = alloc_tr(base
+ i
, type
, slave
, extra
);
633 for (--i
; i
>= 0; --i
)
641 spin_lock_irq(mlx4_tlock(dev
));
642 for (i
= 0; i
< count
; ++i
) {
643 if (find_res(dev
, base
+ i
, type
)) {
647 err
= res_tracker_insert(root
, res_arr
[i
]);
650 list_add_tail(&res_arr
[i
]->list
,
651 &tracker
->slave_list
[slave
].res_list
[type
]);
653 spin_unlock_irq(mlx4_tlock(dev
));
659 for (--i
; i
>= base
; --i
)
660 rb_erase(&res_arr
[i
]->node
, root
);
662 spin_unlock_irq(mlx4_tlock(dev
));
664 for (i
= 0; i
< count
; ++i
)
672 static int remove_qp_ok(struct res_qp
*res
)
674 if (res
->com
.state
== RES_QP_BUSY
)
676 else if (res
->com
.state
!= RES_QP_RESERVED
)
682 static int remove_mtt_ok(struct res_mtt
*res
, int order
)
684 if (res
->com
.state
== RES_MTT_BUSY
||
685 atomic_read(&res
->ref_count
)) {
686 printk(KERN_DEBUG
"%s-%d: state %s, ref_count %d\n",
688 mtt_states_str(res
->com
.state
),
689 atomic_read(&res
->ref_count
));
691 } else if (res
->com
.state
!= RES_MTT_ALLOCATED
)
693 else if (res
->order
!= order
)
699 static int remove_mpt_ok(struct res_mpt
*res
)
701 if (res
->com
.state
== RES_MPT_BUSY
)
703 else if (res
->com
.state
!= RES_MPT_RESERVED
)
709 static int remove_eq_ok(struct res_eq
*res
)
711 if (res
->com
.state
== RES_MPT_BUSY
)
713 else if (res
->com
.state
!= RES_MPT_RESERVED
)
719 static int remove_counter_ok(struct res_counter
*res
)
721 if (res
->com
.state
== RES_COUNTER_BUSY
)
723 else if (res
->com
.state
!= RES_COUNTER_ALLOCATED
)
729 static int remove_xrcdn_ok(struct res_xrcdn
*res
)
731 if (res
->com
.state
== RES_XRCD_BUSY
)
733 else if (res
->com
.state
!= RES_XRCD_ALLOCATED
)
739 static int remove_fs_rule_ok(struct res_fs_rule
*res
)
741 if (res
->com
.state
== RES_FS_RULE_BUSY
)
743 else if (res
->com
.state
!= RES_FS_RULE_ALLOCATED
)
749 static int remove_cq_ok(struct res_cq
*res
)
751 if (res
->com
.state
== RES_CQ_BUSY
)
753 else if (res
->com
.state
!= RES_CQ_ALLOCATED
)
759 static int remove_srq_ok(struct res_srq
*res
)
761 if (res
->com
.state
== RES_SRQ_BUSY
)
763 else if (res
->com
.state
!= RES_SRQ_ALLOCATED
)
769 static int remove_ok(struct res_common
*res
, enum mlx4_resource type
, int extra
)
773 return remove_qp_ok((struct res_qp
*)res
);
775 return remove_cq_ok((struct res_cq
*)res
);
777 return remove_srq_ok((struct res_srq
*)res
);
779 return remove_mpt_ok((struct res_mpt
*)res
);
781 return remove_mtt_ok((struct res_mtt
*)res
, extra
);
785 return remove_eq_ok((struct res_eq
*)res
);
787 return remove_counter_ok((struct res_counter
*)res
);
789 return remove_xrcdn_ok((struct res_xrcdn
*)res
);
791 return remove_fs_rule_ok((struct res_fs_rule
*)res
);
797 static int rem_res_range(struct mlx4_dev
*dev
, int slave
, u64 base
, int count
,
798 enum mlx4_resource type
, int extra
)
802 struct mlx4_priv
*priv
= mlx4_priv(dev
);
803 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
804 struct res_common
*r
;
806 spin_lock_irq(mlx4_tlock(dev
));
807 for (i
= base
; i
< base
+ count
; ++i
) {
808 r
= res_tracker_lookup(&tracker
->res_tree
[type
], i
);
813 if (r
->owner
!= slave
) {
817 err
= remove_ok(r
, type
, extra
);
822 for (i
= base
; i
< base
+ count
; ++i
) {
823 r
= res_tracker_lookup(&tracker
->res_tree
[type
], i
);
824 rb_erase(&r
->node
, &tracker
->res_tree
[type
]);
831 spin_unlock_irq(mlx4_tlock(dev
));
836 static int qp_res_start_move_to(struct mlx4_dev
*dev
, int slave
, int qpn
,
837 enum res_qp_states state
, struct res_qp
**qp
,
840 struct mlx4_priv
*priv
= mlx4_priv(dev
);
841 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
845 spin_lock_irq(mlx4_tlock(dev
));
846 r
= res_tracker_lookup(&tracker
->res_tree
[RES_QP
], qpn
);
849 else if (r
->com
.owner
!= slave
)
854 mlx4_dbg(dev
, "%s: failed RES_QP, 0x%llx\n",
855 __func__
, r
->com
.res_id
);
859 case RES_QP_RESERVED
:
860 if (r
->com
.state
== RES_QP_MAPPED
&& !alloc
)
863 mlx4_dbg(dev
, "failed RES_QP, 0x%llx\n", r
->com
.res_id
);
868 if ((r
->com
.state
== RES_QP_RESERVED
&& alloc
) ||
869 r
->com
.state
== RES_QP_HW
)
872 mlx4_dbg(dev
, "failed RES_QP, 0x%llx\n",
880 if (r
->com
.state
!= RES_QP_MAPPED
)
888 r
->com
.from_state
= r
->com
.state
;
889 r
->com
.to_state
= state
;
890 r
->com
.state
= RES_QP_BUSY
;
896 spin_unlock_irq(mlx4_tlock(dev
));
901 static int mr_res_start_move_to(struct mlx4_dev
*dev
, int slave
, int index
,
902 enum res_mpt_states state
, struct res_mpt
**mpt
)
904 struct mlx4_priv
*priv
= mlx4_priv(dev
);
905 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
909 spin_lock_irq(mlx4_tlock(dev
));
910 r
= res_tracker_lookup(&tracker
->res_tree
[RES_MPT
], index
);
913 else if (r
->com
.owner
!= slave
)
921 case RES_MPT_RESERVED
:
922 if (r
->com
.state
!= RES_MPT_MAPPED
)
927 if (r
->com
.state
!= RES_MPT_RESERVED
&&
928 r
->com
.state
!= RES_MPT_HW
)
933 if (r
->com
.state
!= RES_MPT_MAPPED
)
941 r
->com
.from_state
= r
->com
.state
;
942 r
->com
.to_state
= state
;
943 r
->com
.state
= RES_MPT_BUSY
;
949 spin_unlock_irq(mlx4_tlock(dev
));
954 static int eq_res_start_move_to(struct mlx4_dev
*dev
, int slave
, int index
,
955 enum res_eq_states state
, struct res_eq
**eq
)
957 struct mlx4_priv
*priv
= mlx4_priv(dev
);
958 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
962 spin_lock_irq(mlx4_tlock(dev
));
963 r
= res_tracker_lookup(&tracker
->res_tree
[RES_EQ
], index
);
966 else if (r
->com
.owner
!= slave
)
974 case RES_EQ_RESERVED
:
975 if (r
->com
.state
!= RES_EQ_HW
)
980 if (r
->com
.state
!= RES_EQ_RESERVED
)
989 r
->com
.from_state
= r
->com
.state
;
990 r
->com
.to_state
= state
;
991 r
->com
.state
= RES_EQ_BUSY
;
997 spin_unlock_irq(mlx4_tlock(dev
));
1002 static int cq_res_start_move_to(struct mlx4_dev
*dev
, int slave
, int cqn
,
1003 enum res_cq_states state
, struct res_cq
**cq
)
1005 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1006 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1010 spin_lock_irq(mlx4_tlock(dev
));
1011 r
= res_tracker_lookup(&tracker
->res_tree
[RES_CQ
], cqn
);
1014 else if (r
->com
.owner
!= slave
)
1022 case RES_CQ_ALLOCATED
:
1023 if (r
->com
.state
!= RES_CQ_HW
)
1025 else if (atomic_read(&r
->ref_count
))
1032 if (r
->com
.state
!= RES_CQ_ALLOCATED
)
1043 r
->com
.from_state
= r
->com
.state
;
1044 r
->com
.to_state
= state
;
1045 r
->com
.state
= RES_CQ_BUSY
;
1051 spin_unlock_irq(mlx4_tlock(dev
));
1056 static int srq_res_start_move_to(struct mlx4_dev
*dev
, int slave
, int index
,
1057 enum res_cq_states state
, struct res_srq
**srq
)
1059 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1060 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1064 spin_lock_irq(mlx4_tlock(dev
));
1065 r
= res_tracker_lookup(&tracker
->res_tree
[RES_SRQ
], index
);
1068 else if (r
->com
.owner
!= slave
)
1076 case RES_SRQ_ALLOCATED
:
1077 if (r
->com
.state
!= RES_SRQ_HW
)
1079 else if (atomic_read(&r
->ref_count
))
1084 if (r
->com
.state
!= RES_SRQ_ALLOCATED
)
1093 r
->com
.from_state
= r
->com
.state
;
1094 r
->com
.to_state
= state
;
1095 r
->com
.state
= RES_SRQ_BUSY
;
1101 spin_unlock_irq(mlx4_tlock(dev
));
1106 static void res_abort_move(struct mlx4_dev
*dev
, int slave
,
1107 enum mlx4_resource type
, int id
)
1109 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1110 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1111 struct res_common
*r
;
1113 spin_lock_irq(mlx4_tlock(dev
));
1114 r
= res_tracker_lookup(&tracker
->res_tree
[type
], id
);
1115 if (r
&& (r
->owner
== slave
))
1116 r
->state
= r
->from_state
;
1117 spin_unlock_irq(mlx4_tlock(dev
));
1120 static void res_end_move(struct mlx4_dev
*dev
, int slave
,
1121 enum mlx4_resource type
, int id
)
1123 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1124 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1125 struct res_common
*r
;
1127 spin_lock_irq(mlx4_tlock(dev
));
1128 r
= res_tracker_lookup(&tracker
->res_tree
[type
], id
);
1129 if (r
&& (r
->owner
== slave
))
1130 r
->state
= r
->to_state
;
1131 spin_unlock_irq(mlx4_tlock(dev
));
1134 static int valid_reserved(struct mlx4_dev
*dev
, int slave
, int qpn
)
1136 return mlx4_is_qp_reserved(dev
, qpn
) &&
1137 (mlx4_is_master(dev
) || mlx4_is_guest_proxy(dev
, slave
, qpn
));
1140 static int fw_reserved(struct mlx4_dev
*dev
, int qpn
)
1142 return qpn
< dev
->caps
.reserved_qps_cnt
[MLX4_QP_REGION_FW
];
1145 static int qp_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1146 u64 in_param
, u64
*out_param
)
1155 case RES_OP_RESERVE
:
1156 count
= get_param_l(&in_param
);
1157 align
= get_param_h(&in_param
);
1158 err
= __mlx4_qp_reserve_range(dev
, count
, align
, &base
);
1162 err
= add_res_range(dev
, slave
, base
, count
, RES_QP
, 0);
1164 __mlx4_qp_release_range(dev
, base
, count
);
1167 set_param_l(out_param
, base
);
1169 case RES_OP_MAP_ICM
:
1170 qpn
= get_param_l(&in_param
) & 0x7fffff;
1171 if (valid_reserved(dev
, slave
, qpn
)) {
1172 err
= add_res_range(dev
, slave
, qpn
, 1, RES_QP
, 0);
1177 err
= qp_res_start_move_to(dev
, slave
, qpn
, RES_QP_MAPPED
,
1182 if (!fw_reserved(dev
, qpn
)) {
1183 err
= __mlx4_qp_alloc_icm(dev
, qpn
);
1185 res_abort_move(dev
, slave
, RES_QP
, qpn
);
1190 res_end_move(dev
, slave
, RES_QP
, qpn
);
1200 static int mtt_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1201 u64 in_param
, u64
*out_param
)
1207 if (op
!= RES_OP_RESERVE_AND_MAP
)
1210 order
= get_param_l(&in_param
);
1211 base
= __mlx4_alloc_mtt_range(dev
, order
);
1215 err
= add_res_range(dev
, slave
, base
, 1, RES_MTT
, order
);
1217 __mlx4_free_mtt_range(dev
, base
, order
);
1219 set_param_l(out_param
, base
);
1224 static int mpt_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1225 u64 in_param
, u64
*out_param
)
1230 struct res_mpt
*mpt
;
1233 case RES_OP_RESERVE
:
1234 index
= __mlx4_mpt_reserve(dev
);
1237 id
= index
& mpt_mask(dev
);
1239 err
= add_res_range(dev
, slave
, id
, 1, RES_MPT
, index
);
1241 __mlx4_mpt_release(dev
, index
);
1244 set_param_l(out_param
, index
);
1246 case RES_OP_MAP_ICM
:
1247 index
= get_param_l(&in_param
);
1248 id
= index
& mpt_mask(dev
);
1249 err
= mr_res_start_move_to(dev
, slave
, id
,
1250 RES_MPT_MAPPED
, &mpt
);
1254 err
= __mlx4_mpt_alloc_icm(dev
, mpt
->key
);
1256 res_abort_move(dev
, slave
, RES_MPT
, id
);
1260 res_end_move(dev
, slave
, RES_MPT
, id
);
1266 static int cq_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1267 u64 in_param
, u64
*out_param
)
1273 case RES_OP_RESERVE_AND_MAP
:
1274 err
= __mlx4_cq_alloc_icm(dev
, &cqn
);
1278 err
= add_res_range(dev
, slave
, cqn
, 1, RES_CQ
, 0);
1280 __mlx4_cq_free_icm(dev
, cqn
);
1284 set_param_l(out_param
, cqn
);
1294 static int srq_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1295 u64 in_param
, u64
*out_param
)
1301 case RES_OP_RESERVE_AND_MAP
:
1302 err
= __mlx4_srq_alloc_icm(dev
, &srqn
);
1306 err
= add_res_range(dev
, slave
, srqn
, 1, RES_SRQ
, 0);
1308 __mlx4_srq_free_icm(dev
, srqn
);
1312 set_param_l(out_param
, srqn
);
1322 static int mac_add_to_slave(struct mlx4_dev
*dev
, int slave
, u64 mac
, int port
)
1324 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1325 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1326 struct mac_res
*res
;
1328 res
= kzalloc(sizeof *res
, GFP_KERNEL
);
1332 res
->port
= (u8
) port
;
1333 list_add_tail(&res
->list
,
1334 &tracker
->slave_list
[slave
].res_list
[RES_MAC
]);
1338 static void mac_del_from_slave(struct mlx4_dev
*dev
, int slave
, u64 mac
,
1341 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1342 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1343 struct list_head
*mac_list
=
1344 &tracker
->slave_list
[slave
].res_list
[RES_MAC
];
1345 struct mac_res
*res
, *tmp
;
1347 list_for_each_entry_safe(res
, tmp
, mac_list
, list
) {
1348 if (res
->mac
== mac
&& res
->port
== (u8
) port
) {
1349 list_del(&res
->list
);
1356 static void rem_slave_macs(struct mlx4_dev
*dev
, int slave
)
1358 struct mlx4_priv
*priv
= mlx4_priv(dev
);
1359 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
1360 struct list_head
*mac_list
=
1361 &tracker
->slave_list
[slave
].res_list
[RES_MAC
];
1362 struct mac_res
*res
, *tmp
;
1364 list_for_each_entry_safe(res
, tmp
, mac_list
, list
) {
1365 list_del(&res
->list
);
1366 __mlx4_unregister_mac(dev
, res
->port
, res
->mac
);
1371 static int mac_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1372 u64 in_param
, u64
*out_param
)
1378 if (op
!= RES_OP_RESERVE_AND_MAP
)
1381 port
= get_param_l(out_param
);
1384 err
= __mlx4_register_mac(dev
, port
, mac
);
1386 set_param_l(out_param
, err
);
1391 err
= mac_add_to_slave(dev
, slave
, mac
, port
);
1393 __mlx4_unregister_mac(dev
, port
, mac
);
1398 static int vlan_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1399 u64 in_param
, u64
*out_param
)
1404 static int counter_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1405 u64 in_param
, u64
*out_param
)
1410 if (op
!= RES_OP_RESERVE
)
1413 err
= __mlx4_counter_alloc(dev
, &index
);
1417 err
= add_res_range(dev
, slave
, index
, 1, RES_COUNTER
, 0);
1419 __mlx4_counter_free(dev
, index
);
1421 set_param_l(out_param
, index
);
1426 static int xrcdn_alloc_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1427 u64 in_param
, u64
*out_param
)
1432 if (op
!= RES_OP_RESERVE
)
1435 err
= __mlx4_xrcd_alloc(dev
, &xrcdn
);
1439 err
= add_res_range(dev
, slave
, xrcdn
, 1, RES_XRCD
, 0);
1441 __mlx4_xrcd_free(dev
, xrcdn
);
1443 set_param_l(out_param
, xrcdn
);
1448 int mlx4_ALLOC_RES_wrapper(struct mlx4_dev
*dev
, int slave
,
1449 struct mlx4_vhcr
*vhcr
,
1450 struct mlx4_cmd_mailbox
*inbox
,
1451 struct mlx4_cmd_mailbox
*outbox
,
1452 struct mlx4_cmd_info
*cmd
)
1455 int alop
= vhcr
->op_modifier
;
1457 switch (vhcr
->in_modifier
) {
1459 err
= qp_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1460 vhcr
->in_param
, &vhcr
->out_param
);
1464 err
= mtt_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1465 vhcr
->in_param
, &vhcr
->out_param
);
1469 err
= mpt_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1470 vhcr
->in_param
, &vhcr
->out_param
);
1474 err
= cq_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1475 vhcr
->in_param
, &vhcr
->out_param
);
1479 err
= srq_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1480 vhcr
->in_param
, &vhcr
->out_param
);
1484 err
= mac_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1485 vhcr
->in_param
, &vhcr
->out_param
);
1489 err
= vlan_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1490 vhcr
->in_param
, &vhcr
->out_param
);
1494 err
= counter_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1495 vhcr
->in_param
, &vhcr
->out_param
);
1499 err
= xrcdn_alloc_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1500 vhcr
->in_param
, &vhcr
->out_param
);
1511 static int qp_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1520 case RES_OP_RESERVE
:
1521 base
= get_param_l(&in_param
) & 0x7fffff;
1522 count
= get_param_h(&in_param
);
1523 err
= rem_res_range(dev
, slave
, base
, count
, RES_QP
, 0);
1526 __mlx4_qp_release_range(dev
, base
, count
);
1528 case RES_OP_MAP_ICM
:
1529 qpn
= get_param_l(&in_param
) & 0x7fffff;
1530 err
= qp_res_start_move_to(dev
, slave
, qpn
, RES_QP_RESERVED
,
1535 if (!fw_reserved(dev
, qpn
))
1536 __mlx4_qp_free_icm(dev
, qpn
);
1538 res_end_move(dev
, slave
, RES_QP
, qpn
);
1540 if (valid_reserved(dev
, slave
, qpn
))
1541 err
= rem_res_range(dev
, slave
, qpn
, 1, RES_QP
, 0);
1550 static int mtt_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1551 u64 in_param
, u64
*out_param
)
1557 if (op
!= RES_OP_RESERVE_AND_MAP
)
1560 base
= get_param_l(&in_param
);
1561 order
= get_param_h(&in_param
);
1562 err
= rem_res_range(dev
, slave
, base
, 1, RES_MTT
, order
);
1564 __mlx4_free_mtt_range(dev
, base
, order
);
1568 static int mpt_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1574 struct res_mpt
*mpt
;
1577 case RES_OP_RESERVE
:
1578 index
= get_param_l(&in_param
);
1579 id
= index
& mpt_mask(dev
);
1580 err
= get_res(dev
, slave
, id
, RES_MPT
, &mpt
);
1584 put_res(dev
, slave
, id
, RES_MPT
);
1586 err
= rem_res_range(dev
, slave
, id
, 1, RES_MPT
, 0);
1589 __mlx4_mpt_release(dev
, index
);
1591 case RES_OP_MAP_ICM
:
1592 index
= get_param_l(&in_param
);
1593 id
= index
& mpt_mask(dev
);
1594 err
= mr_res_start_move_to(dev
, slave
, id
,
1595 RES_MPT_RESERVED
, &mpt
);
1599 __mlx4_mpt_free_icm(dev
, mpt
->key
);
1600 res_end_move(dev
, slave
, RES_MPT
, id
);
1610 static int cq_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1611 u64 in_param
, u64
*out_param
)
1617 case RES_OP_RESERVE_AND_MAP
:
1618 cqn
= get_param_l(&in_param
);
1619 err
= rem_res_range(dev
, slave
, cqn
, 1, RES_CQ
, 0);
1623 __mlx4_cq_free_icm(dev
, cqn
);
1634 static int srq_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1635 u64 in_param
, u64
*out_param
)
1641 case RES_OP_RESERVE_AND_MAP
:
1642 srqn
= get_param_l(&in_param
);
1643 err
= rem_res_range(dev
, slave
, srqn
, 1, RES_SRQ
, 0);
1647 __mlx4_srq_free_icm(dev
, srqn
);
1658 static int mac_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1659 u64 in_param
, u64
*out_param
)
1665 case RES_OP_RESERVE_AND_MAP
:
1666 port
= get_param_l(out_param
);
1667 mac_del_from_slave(dev
, slave
, in_param
, port
);
1668 __mlx4_unregister_mac(dev
, port
, in_param
);
1679 static int vlan_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1680 u64 in_param
, u64
*out_param
)
1685 static int counter_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1686 u64 in_param
, u64
*out_param
)
1691 if (op
!= RES_OP_RESERVE
)
1694 index
= get_param_l(&in_param
);
1695 err
= rem_res_range(dev
, slave
, index
, 1, RES_COUNTER
, 0);
1699 __mlx4_counter_free(dev
, index
);
1704 static int xrcdn_free_res(struct mlx4_dev
*dev
, int slave
, int op
, int cmd
,
1705 u64 in_param
, u64
*out_param
)
1710 if (op
!= RES_OP_RESERVE
)
1713 xrcdn
= get_param_l(&in_param
);
1714 err
= rem_res_range(dev
, slave
, xrcdn
, 1, RES_XRCD
, 0);
1718 __mlx4_xrcd_free(dev
, xrcdn
);
1723 int mlx4_FREE_RES_wrapper(struct mlx4_dev
*dev
, int slave
,
1724 struct mlx4_vhcr
*vhcr
,
1725 struct mlx4_cmd_mailbox
*inbox
,
1726 struct mlx4_cmd_mailbox
*outbox
,
1727 struct mlx4_cmd_info
*cmd
)
1730 int alop
= vhcr
->op_modifier
;
1732 switch (vhcr
->in_modifier
) {
1734 err
= qp_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1739 err
= mtt_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1740 vhcr
->in_param
, &vhcr
->out_param
);
1744 err
= mpt_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1749 err
= cq_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1750 vhcr
->in_param
, &vhcr
->out_param
);
1754 err
= srq_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1755 vhcr
->in_param
, &vhcr
->out_param
);
1759 err
= mac_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1760 vhcr
->in_param
, &vhcr
->out_param
);
1764 err
= vlan_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1765 vhcr
->in_param
, &vhcr
->out_param
);
1769 err
= counter_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1770 vhcr
->in_param
, &vhcr
->out_param
);
1774 err
= xrcdn_free_res(dev
, slave
, vhcr
->op_modifier
, alop
,
1775 vhcr
->in_param
, &vhcr
->out_param
);
1783 /* ugly but other choices are uglier */
1784 static int mr_phys_mpt(struct mlx4_mpt_entry
*mpt
)
1786 return (be32_to_cpu(mpt
->flags
) >> 9) & 1;
1789 static int mr_get_mtt_addr(struct mlx4_mpt_entry
*mpt
)
1791 return (int)be64_to_cpu(mpt
->mtt_addr
) & 0xfffffff8;
1794 static int mr_get_mtt_size(struct mlx4_mpt_entry
*mpt
)
1796 return be32_to_cpu(mpt
->mtt_sz
);
1799 static u32
mr_get_pd(struct mlx4_mpt_entry
*mpt
)
1801 return be32_to_cpu(mpt
->pd_flags
) & 0x00ffffff;
1804 static int mr_is_fmr(struct mlx4_mpt_entry
*mpt
)
1806 return be32_to_cpu(mpt
->pd_flags
) & MLX4_MPT_PD_FLAG_FAST_REG
;
1809 static int mr_is_bind_enabled(struct mlx4_mpt_entry
*mpt
)
1811 return be32_to_cpu(mpt
->flags
) & MLX4_MPT_FLAG_BIND_ENABLE
;
1814 static int mr_is_region(struct mlx4_mpt_entry
*mpt
)
1816 return be32_to_cpu(mpt
->flags
) & MLX4_MPT_FLAG_REGION
;
1819 static int qp_get_mtt_addr(struct mlx4_qp_context
*qpc
)
1821 return be32_to_cpu(qpc
->mtt_base_addr_l
) & 0xfffffff8;
1824 static int srq_get_mtt_addr(struct mlx4_srq_context
*srqc
)
1826 return be32_to_cpu(srqc
->mtt_base_addr_l
) & 0xfffffff8;
1829 static int qp_get_mtt_size(struct mlx4_qp_context
*qpc
)
1831 int page_shift
= (qpc
->log_page_size
& 0x3f) + 12;
1832 int log_sq_size
= (qpc
->sq_size_stride
>> 3) & 0xf;
1833 int log_sq_sride
= qpc
->sq_size_stride
& 7;
1834 int log_rq_size
= (qpc
->rq_size_stride
>> 3) & 0xf;
1835 int log_rq_stride
= qpc
->rq_size_stride
& 7;
1836 int srq
= (be32_to_cpu(qpc
->srqn
) >> 24) & 1;
1837 int rss
= (be32_to_cpu(qpc
->flags
) >> 13) & 1;
1838 int xrc
= (be32_to_cpu(qpc
->local_qpn
) >> 23) & 1;
1843 int page_offset
= (be32_to_cpu(qpc
->params2
) >> 6) & 0x3f;
1845 sq_size
= 1 << (log_sq_size
+ log_sq_sride
+ 4);
1846 rq_size
= (srq
|rss
|xrc
) ? 0 : (1 << (log_rq_size
+ log_rq_stride
+ 4));
1847 total_mem
= sq_size
+ rq_size
;
1849 roundup_pow_of_two((total_mem
+ (page_offset
<< 6)) >>
1855 static int check_mtt_range(struct mlx4_dev
*dev
, int slave
, int start
,
1856 int size
, struct res_mtt
*mtt
)
1858 int res_start
= mtt
->com
.res_id
;
1859 int res_size
= (1 << mtt
->order
);
1861 if (start
< res_start
|| start
+ size
> res_start
+ res_size
)
1866 int mlx4_SW2HW_MPT_wrapper(struct mlx4_dev
*dev
, int slave
,
1867 struct mlx4_vhcr
*vhcr
,
1868 struct mlx4_cmd_mailbox
*inbox
,
1869 struct mlx4_cmd_mailbox
*outbox
,
1870 struct mlx4_cmd_info
*cmd
)
1873 int index
= vhcr
->in_modifier
;
1874 struct res_mtt
*mtt
;
1875 struct res_mpt
*mpt
;
1876 int mtt_base
= mr_get_mtt_addr(inbox
->buf
) / dev
->caps
.mtt_entry_sz
;
1882 id
= index
& mpt_mask(dev
);
1883 err
= mr_res_start_move_to(dev
, slave
, id
, RES_MPT_HW
, &mpt
);
1887 /* Disable memory windows for VFs. */
1888 if (!mr_is_region(inbox
->buf
)) {
1893 /* Make sure that the PD bits related to the slave id are zeros. */
1894 pd
= mr_get_pd(inbox
->buf
);
1895 pd_slave
= (pd
>> 17) & 0x7f;
1896 if (pd_slave
!= 0 && pd_slave
!= slave
) {
1901 if (mr_is_fmr(inbox
->buf
)) {
1902 /* FMR and Bind Enable are forbidden in slave devices. */
1903 if (mr_is_bind_enabled(inbox
->buf
)) {
1907 /* FMR and Memory Windows are also forbidden. */
1908 if (!mr_is_region(inbox
->buf
)) {
1914 phys
= mr_phys_mpt(inbox
->buf
);
1916 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
1920 err
= check_mtt_range(dev
, slave
, mtt_base
,
1921 mr_get_mtt_size(inbox
->buf
), mtt
);
1928 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
1933 atomic_inc(&mtt
->ref_count
);
1934 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
1937 res_end_move(dev
, slave
, RES_MPT
, id
);
1942 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
1944 res_abort_move(dev
, slave
, RES_MPT
, id
);
1949 int mlx4_HW2SW_MPT_wrapper(struct mlx4_dev
*dev
, int slave
,
1950 struct mlx4_vhcr
*vhcr
,
1951 struct mlx4_cmd_mailbox
*inbox
,
1952 struct mlx4_cmd_mailbox
*outbox
,
1953 struct mlx4_cmd_info
*cmd
)
1956 int index
= vhcr
->in_modifier
;
1957 struct res_mpt
*mpt
;
1960 id
= index
& mpt_mask(dev
);
1961 err
= mr_res_start_move_to(dev
, slave
, id
, RES_MPT_MAPPED
, &mpt
);
1965 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
1970 atomic_dec(&mpt
->mtt
->ref_count
);
1972 res_end_move(dev
, slave
, RES_MPT
, id
);
1976 res_abort_move(dev
, slave
, RES_MPT
, id
);
1981 int mlx4_QUERY_MPT_wrapper(struct mlx4_dev
*dev
, int slave
,
1982 struct mlx4_vhcr
*vhcr
,
1983 struct mlx4_cmd_mailbox
*inbox
,
1984 struct mlx4_cmd_mailbox
*outbox
,
1985 struct mlx4_cmd_info
*cmd
)
1988 int index
= vhcr
->in_modifier
;
1989 struct res_mpt
*mpt
;
1992 id
= index
& mpt_mask(dev
);
1993 err
= get_res(dev
, slave
, id
, RES_MPT
, &mpt
);
1997 if (mpt
->com
.from_state
!= RES_MPT_HW
) {
2002 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2005 put_res(dev
, slave
, id
, RES_MPT
);
2009 static int qp_get_rcqn(struct mlx4_qp_context
*qpc
)
2011 return be32_to_cpu(qpc
->cqn_recv
) & 0xffffff;
2014 static int qp_get_scqn(struct mlx4_qp_context
*qpc
)
2016 return be32_to_cpu(qpc
->cqn_send
) & 0xffffff;
2019 static u32
qp_get_srqn(struct mlx4_qp_context
*qpc
)
2021 return be32_to_cpu(qpc
->srqn
) & 0x1ffffff;
2024 static void adjust_proxy_tun_qkey(struct mlx4_dev
*dev
, struct mlx4_vhcr
*vhcr
,
2025 struct mlx4_qp_context
*context
)
2027 u32 qpn
= vhcr
->in_modifier
& 0xffffff;
2030 if (mlx4_get_parav_qkey(dev
, qpn
, &qkey
))
2033 /* adjust qkey in qp context */
2034 context
->qkey
= cpu_to_be32(qkey
);
2037 int mlx4_RST2INIT_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2038 struct mlx4_vhcr
*vhcr
,
2039 struct mlx4_cmd_mailbox
*inbox
,
2040 struct mlx4_cmd_mailbox
*outbox
,
2041 struct mlx4_cmd_info
*cmd
)
2044 int qpn
= vhcr
->in_modifier
& 0x7fffff;
2045 struct res_mtt
*mtt
;
2047 struct mlx4_qp_context
*qpc
= inbox
->buf
+ 8;
2048 int mtt_base
= qp_get_mtt_addr(qpc
) / dev
->caps
.mtt_entry_sz
;
2049 int mtt_size
= qp_get_mtt_size(qpc
);
2052 int rcqn
= qp_get_rcqn(qpc
);
2053 int scqn
= qp_get_scqn(qpc
);
2054 u32 srqn
= qp_get_srqn(qpc
) & 0xffffff;
2055 int use_srq
= (qp_get_srqn(qpc
) >> 24) & 1;
2056 struct res_srq
*srq
;
2057 int local_qpn
= be32_to_cpu(qpc
->local_qpn
) & 0xffffff;
2059 err
= qp_res_start_move_to(dev
, slave
, qpn
, RES_QP_HW
, &qp
, 0);
2062 qp
->local_qpn
= local_qpn
;
2064 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
2068 err
= check_mtt_range(dev
, slave
, mtt_base
, mtt_size
, mtt
);
2072 err
= get_res(dev
, slave
, rcqn
, RES_CQ
, &rcq
);
2077 err
= get_res(dev
, slave
, scqn
, RES_CQ
, &scq
);
2084 err
= get_res(dev
, slave
, srqn
, RES_SRQ
, &srq
);
2089 adjust_proxy_tun_qkey(dev
, vhcr
, qpc
);
2090 update_pkey_index(dev
, slave
, inbox
);
2091 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2094 atomic_inc(&mtt
->ref_count
);
2096 atomic_inc(&rcq
->ref_count
);
2098 atomic_inc(&scq
->ref_count
);
2102 put_res(dev
, slave
, scqn
, RES_CQ
);
2105 atomic_inc(&srq
->ref_count
);
2106 put_res(dev
, slave
, srqn
, RES_SRQ
);
2109 put_res(dev
, slave
, rcqn
, RES_CQ
);
2110 put_res(dev
, slave
, mtt_base
, RES_MTT
);
2111 res_end_move(dev
, slave
, RES_QP
, qpn
);
2117 put_res(dev
, slave
, srqn
, RES_SRQ
);
2120 put_res(dev
, slave
, scqn
, RES_CQ
);
2122 put_res(dev
, slave
, rcqn
, RES_CQ
);
2124 put_res(dev
, slave
, mtt_base
, RES_MTT
);
2126 res_abort_move(dev
, slave
, RES_QP
, qpn
);
2131 static int eq_get_mtt_addr(struct mlx4_eq_context
*eqc
)
2133 return be32_to_cpu(eqc
->mtt_base_addr_l
) & 0xfffffff8;
2136 static int eq_get_mtt_size(struct mlx4_eq_context
*eqc
)
2138 int log_eq_size
= eqc
->log_eq_size
& 0x1f;
2139 int page_shift
= (eqc
->log_page_size
& 0x3f) + 12;
2141 if (log_eq_size
+ 5 < page_shift
)
2144 return 1 << (log_eq_size
+ 5 - page_shift
);
2147 static int cq_get_mtt_addr(struct mlx4_cq_context
*cqc
)
2149 return be32_to_cpu(cqc
->mtt_base_addr_l
) & 0xfffffff8;
2152 static int cq_get_mtt_size(struct mlx4_cq_context
*cqc
)
2154 int log_cq_size
= (be32_to_cpu(cqc
->logsize_usrpage
) >> 24) & 0x1f;
2155 int page_shift
= (cqc
->log_page_size
& 0x3f) + 12;
2157 if (log_cq_size
+ 5 < page_shift
)
2160 return 1 << (log_cq_size
+ 5 - page_shift
);
2163 int mlx4_SW2HW_EQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2164 struct mlx4_vhcr
*vhcr
,
2165 struct mlx4_cmd_mailbox
*inbox
,
2166 struct mlx4_cmd_mailbox
*outbox
,
2167 struct mlx4_cmd_info
*cmd
)
2170 int eqn
= vhcr
->in_modifier
;
2171 int res_id
= (slave
<< 8) | eqn
;
2172 struct mlx4_eq_context
*eqc
= inbox
->buf
;
2173 int mtt_base
= eq_get_mtt_addr(eqc
) / dev
->caps
.mtt_entry_sz
;
2174 int mtt_size
= eq_get_mtt_size(eqc
);
2176 struct res_mtt
*mtt
;
2178 err
= add_res_range(dev
, slave
, res_id
, 1, RES_EQ
, 0);
2181 err
= eq_res_start_move_to(dev
, slave
, res_id
, RES_EQ_HW
, &eq
);
2185 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
2189 err
= check_mtt_range(dev
, slave
, mtt_base
, mtt_size
, mtt
);
2193 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2197 atomic_inc(&mtt
->ref_count
);
2199 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2200 res_end_move(dev
, slave
, RES_EQ
, res_id
);
2204 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2206 res_abort_move(dev
, slave
, RES_EQ
, res_id
);
2208 rem_res_range(dev
, slave
, res_id
, 1, RES_EQ
, 0);
2212 static int get_containing_mtt(struct mlx4_dev
*dev
, int slave
, int start
,
2213 int len
, struct res_mtt
**res
)
2215 struct mlx4_priv
*priv
= mlx4_priv(dev
);
2216 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
2217 struct res_mtt
*mtt
;
2220 spin_lock_irq(mlx4_tlock(dev
));
2221 list_for_each_entry(mtt
, &tracker
->slave_list
[slave
].res_list
[RES_MTT
],
2223 if (!check_mtt_range(dev
, slave
, start
, len
, mtt
)) {
2225 mtt
->com
.from_state
= mtt
->com
.state
;
2226 mtt
->com
.state
= RES_MTT_BUSY
;
2231 spin_unlock_irq(mlx4_tlock(dev
));
2236 static int verify_qp_parameters(struct mlx4_dev
*dev
,
2237 struct mlx4_cmd_mailbox
*inbox
,
2238 enum qp_transition transition
, u8 slave
)
2241 struct mlx4_qp_context
*qp_ctx
;
2242 enum mlx4_qp_optpar optpar
;
2244 qp_ctx
= inbox
->buf
+ 8;
2245 qp_type
= (be32_to_cpu(qp_ctx
->flags
) >> 16) & 0xff;
2246 optpar
= be32_to_cpu(*(__be32
*) inbox
->buf
);
2251 switch (transition
) {
2252 case QP_TRANS_INIT2RTR
:
2253 case QP_TRANS_RTR2RTS
:
2254 case QP_TRANS_RTS2RTS
:
2255 case QP_TRANS_SQD2SQD
:
2256 case QP_TRANS_SQD2RTS
:
2257 if (slave
!= mlx4_master_func_num(dev
))
2258 /* slaves have only gid index 0 */
2259 if (optpar
& MLX4_QP_OPTPAR_PRIMARY_ADDR_PATH
)
2260 if (qp_ctx
->pri_path
.mgid_index
)
2262 if (optpar
& MLX4_QP_OPTPAR_ALT_ADDR_PATH
)
2263 if (qp_ctx
->alt_path
.mgid_index
)
2278 int mlx4_WRITE_MTT_wrapper(struct mlx4_dev
*dev
, int slave
,
2279 struct mlx4_vhcr
*vhcr
,
2280 struct mlx4_cmd_mailbox
*inbox
,
2281 struct mlx4_cmd_mailbox
*outbox
,
2282 struct mlx4_cmd_info
*cmd
)
2284 struct mlx4_mtt mtt
;
2285 __be64
*page_list
= inbox
->buf
;
2286 u64
*pg_list
= (u64
*)page_list
;
2288 struct res_mtt
*rmtt
= NULL
;
2289 int start
= be64_to_cpu(page_list
[0]);
2290 int npages
= vhcr
->in_modifier
;
2293 err
= get_containing_mtt(dev
, slave
, start
, npages
, &rmtt
);
2297 /* Call the SW implementation of write_mtt:
2298 * - Prepare a dummy mtt struct
2299 * - Translate inbox contents to simple addresses in host endianess */
2300 mtt
.offset
= 0; /* TBD this is broken but I don't handle it since
2301 we don't really use it */
2304 for (i
= 0; i
< npages
; ++i
)
2305 pg_list
[i
+ 2] = (be64_to_cpu(page_list
[i
+ 2]) & ~1ULL);
2307 err
= __mlx4_write_mtt(dev
, &mtt
, be64_to_cpu(page_list
[0]), npages
,
2308 ((u64
*)page_list
+ 2));
2311 put_res(dev
, slave
, rmtt
->com
.res_id
, RES_MTT
);
2316 int mlx4_HW2SW_EQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2317 struct mlx4_vhcr
*vhcr
,
2318 struct mlx4_cmd_mailbox
*inbox
,
2319 struct mlx4_cmd_mailbox
*outbox
,
2320 struct mlx4_cmd_info
*cmd
)
2322 int eqn
= vhcr
->in_modifier
;
2323 int res_id
= eqn
| (slave
<< 8);
2327 err
= eq_res_start_move_to(dev
, slave
, res_id
, RES_EQ_RESERVED
, &eq
);
2331 err
= get_res(dev
, slave
, eq
->mtt
->com
.res_id
, RES_MTT
, NULL
);
2335 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2339 atomic_dec(&eq
->mtt
->ref_count
);
2340 put_res(dev
, slave
, eq
->mtt
->com
.res_id
, RES_MTT
);
2341 res_end_move(dev
, slave
, RES_EQ
, res_id
);
2342 rem_res_range(dev
, slave
, res_id
, 1, RES_EQ
, 0);
2347 put_res(dev
, slave
, eq
->mtt
->com
.res_id
, RES_MTT
);
2349 res_abort_move(dev
, slave
, RES_EQ
, res_id
);
2354 int mlx4_GEN_EQE(struct mlx4_dev
*dev
, int slave
, struct mlx4_eqe
*eqe
)
2356 struct mlx4_priv
*priv
= mlx4_priv(dev
);
2357 struct mlx4_slave_event_eq_info
*event_eq
;
2358 struct mlx4_cmd_mailbox
*mailbox
;
2359 u32 in_modifier
= 0;
2364 if (!priv
->mfunc
.master
.slave_state
)
2367 event_eq
= &priv
->mfunc
.master
.slave_state
[slave
].event_eq
[eqe
->type
];
2369 /* Create the event only if the slave is registered */
2370 if (event_eq
->eqn
< 0)
2373 mutex_lock(&priv
->mfunc
.master
.gen_eqe_mutex
[slave
]);
2374 res_id
= (slave
<< 8) | event_eq
->eqn
;
2375 err
= get_res(dev
, slave
, res_id
, RES_EQ
, &req
);
2379 if (req
->com
.from_state
!= RES_EQ_HW
) {
2384 mailbox
= mlx4_alloc_cmd_mailbox(dev
);
2385 if (IS_ERR(mailbox
)) {
2386 err
= PTR_ERR(mailbox
);
2390 if (eqe
->type
== MLX4_EVENT_TYPE_CMD
) {
2392 eqe
->event
.cmd
.token
= cpu_to_be16(event_eq
->token
);
2395 memcpy(mailbox
->buf
, (u8
*) eqe
, 28);
2397 in_modifier
= (slave
& 0xff) | ((event_eq
->eqn
& 0xff) << 16);
2399 err
= mlx4_cmd(dev
, mailbox
->dma
, in_modifier
, 0,
2400 MLX4_CMD_GEN_EQE
, MLX4_CMD_TIME_CLASS_B
,
2403 put_res(dev
, slave
, res_id
, RES_EQ
);
2404 mutex_unlock(&priv
->mfunc
.master
.gen_eqe_mutex
[slave
]);
2405 mlx4_free_cmd_mailbox(dev
, mailbox
);
2409 put_res(dev
, slave
, res_id
, RES_EQ
);
2412 mutex_unlock(&priv
->mfunc
.master
.gen_eqe_mutex
[slave
]);
2416 int mlx4_QUERY_EQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2417 struct mlx4_vhcr
*vhcr
,
2418 struct mlx4_cmd_mailbox
*inbox
,
2419 struct mlx4_cmd_mailbox
*outbox
,
2420 struct mlx4_cmd_info
*cmd
)
2422 int eqn
= vhcr
->in_modifier
;
2423 int res_id
= eqn
| (slave
<< 8);
2427 err
= get_res(dev
, slave
, res_id
, RES_EQ
, &eq
);
2431 if (eq
->com
.from_state
!= RES_EQ_HW
) {
2436 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2439 put_res(dev
, slave
, res_id
, RES_EQ
);
2443 int mlx4_SW2HW_CQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2444 struct mlx4_vhcr
*vhcr
,
2445 struct mlx4_cmd_mailbox
*inbox
,
2446 struct mlx4_cmd_mailbox
*outbox
,
2447 struct mlx4_cmd_info
*cmd
)
2450 int cqn
= vhcr
->in_modifier
;
2451 struct mlx4_cq_context
*cqc
= inbox
->buf
;
2452 int mtt_base
= cq_get_mtt_addr(cqc
) / dev
->caps
.mtt_entry_sz
;
2454 struct res_mtt
*mtt
;
2456 err
= cq_res_start_move_to(dev
, slave
, cqn
, RES_CQ_HW
, &cq
);
2459 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
2462 err
= check_mtt_range(dev
, slave
, mtt_base
, cq_get_mtt_size(cqc
), mtt
);
2465 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2468 atomic_inc(&mtt
->ref_count
);
2470 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2471 res_end_move(dev
, slave
, RES_CQ
, cqn
);
2475 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2477 res_abort_move(dev
, slave
, RES_CQ
, cqn
);
2481 int mlx4_HW2SW_CQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2482 struct mlx4_vhcr
*vhcr
,
2483 struct mlx4_cmd_mailbox
*inbox
,
2484 struct mlx4_cmd_mailbox
*outbox
,
2485 struct mlx4_cmd_info
*cmd
)
2488 int cqn
= vhcr
->in_modifier
;
2491 err
= cq_res_start_move_to(dev
, slave
, cqn
, RES_CQ_ALLOCATED
, &cq
);
2494 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2497 atomic_dec(&cq
->mtt
->ref_count
);
2498 res_end_move(dev
, slave
, RES_CQ
, cqn
);
2502 res_abort_move(dev
, slave
, RES_CQ
, cqn
);
2506 int mlx4_QUERY_CQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2507 struct mlx4_vhcr
*vhcr
,
2508 struct mlx4_cmd_mailbox
*inbox
,
2509 struct mlx4_cmd_mailbox
*outbox
,
2510 struct mlx4_cmd_info
*cmd
)
2512 int cqn
= vhcr
->in_modifier
;
2516 err
= get_res(dev
, slave
, cqn
, RES_CQ
, &cq
);
2520 if (cq
->com
.from_state
!= RES_CQ_HW
)
2523 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2525 put_res(dev
, slave
, cqn
, RES_CQ
);
2530 static int handle_resize(struct mlx4_dev
*dev
, int slave
,
2531 struct mlx4_vhcr
*vhcr
,
2532 struct mlx4_cmd_mailbox
*inbox
,
2533 struct mlx4_cmd_mailbox
*outbox
,
2534 struct mlx4_cmd_info
*cmd
,
2538 struct res_mtt
*orig_mtt
;
2539 struct res_mtt
*mtt
;
2540 struct mlx4_cq_context
*cqc
= inbox
->buf
;
2541 int mtt_base
= cq_get_mtt_addr(cqc
) / dev
->caps
.mtt_entry_sz
;
2543 err
= get_res(dev
, slave
, cq
->mtt
->com
.res_id
, RES_MTT
, &orig_mtt
);
2547 if (orig_mtt
!= cq
->mtt
) {
2552 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
2556 err
= check_mtt_range(dev
, slave
, mtt_base
, cq_get_mtt_size(cqc
), mtt
);
2559 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2562 atomic_dec(&orig_mtt
->ref_count
);
2563 put_res(dev
, slave
, orig_mtt
->com
.res_id
, RES_MTT
);
2564 atomic_inc(&mtt
->ref_count
);
2566 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2570 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2572 put_res(dev
, slave
, orig_mtt
->com
.res_id
, RES_MTT
);
2578 int mlx4_MODIFY_CQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2579 struct mlx4_vhcr
*vhcr
,
2580 struct mlx4_cmd_mailbox
*inbox
,
2581 struct mlx4_cmd_mailbox
*outbox
,
2582 struct mlx4_cmd_info
*cmd
)
2584 int cqn
= vhcr
->in_modifier
;
2588 err
= get_res(dev
, slave
, cqn
, RES_CQ
, &cq
);
2592 if (cq
->com
.from_state
!= RES_CQ_HW
)
2595 if (vhcr
->op_modifier
== 0) {
2596 err
= handle_resize(dev
, slave
, vhcr
, inbox
, outbox
, cmd
, cq
);
2600 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2602 put_res(dev
, slave
, cqn
, RES_CQ
);
2607 static int srq_get_mtt_size(struct mlx4_srq_context
*srqc
)
2609 int log_srq_size
= (be32_to_cpu(srqc
->state_logsize_srqn
) >> 24) & 0xf;
2610 int log_rq_stride
= srqc
->logstride
& 7;
2611 int page_shift
= (srqc
->log_page_size
& 0x3f) + 12;
2613 if (log_srq_size
+ log_rq_stride
+ 4 < page_shift
)
2616 return 1 << (log_srq_size
+ log_rq_stride
+ 4 - page_shift
);
2619 int mlx4_SW2HW_SRQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2620 struct mlx4_vhcr
*vhcr
,
2621 struct mlx4_cmd_mailbox
*inbox
,
2622 struct mlx4_cmd_mailbox
*outbox
,
2623 struct mlx4_cmd_info
*cmd
)
2626 int srqn
= vhcr
->in_modifier
;
2627 struct res_mtt
*mtt
;
2628 struct res_srq
*srq
;
2629 struct mlx4_srq_context
*srqc
= inbox
->buf
;
2630 int mtt_base
= srq_get_mtt_addr(srqc
) / dev
->caps
.mtt_entry_sz
;
2632 if (srqn
!= (be32_to_cpu(srqc
->state_logsize_srqn
) & 0xffffff))
2635 err
= srq_res_start_move_to(dev
, slave
, srqn
, RES_SRQ_HW
, &srq
);
2638 err
= get_res(dev
, slave
, mtt_base
, RES_MTT
, &mtt
);
2641 err
= check_mtt_range(dev
, slave
, mtt_base
, srq_get_mtt_size(srqc
),
2646 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2650 atomic_inc(&mtt
->ref_count
);
2652 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2653 res_end_move(dev
, slave
, RES_SRQ
, srqn
);
2657 put_res(dev
, slave
, mtt
->com
.res_id
, RES_MTT
);
2659 res_abort_move(dev
, slave
, RES_SRQ
, srqn
);
2664 int mlx4_HW2SW_SRQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2665 struct mlx4_vhcr
*vhcr
,
2666 struct mlx4_cmd_mailbox
*inbox
,
2667 struct mlx4_cmd_mailbox
*outbox
,
2668 struct mlx4_cmd_info
*cmd
)
2671 int srqn
= vhcr
->in_modifier
;
2672 struct res_srq
*srq
;
2674 err
= srq_res_start_move_to(dev
, slave
, srqn
, RES_SRQ_ALLOCATED
, &srq
);
2677 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2680 atomic_dec(&srq
->mtt
->ref_count
);
2682 atomic_dec(&srq
->cq
->ref_count
);
2683 res_end_move(dev
, slave
, RES_SRQ
, srqn
);
2688 res_abort_move(dev
, slave
, RES_SRQ
, srqn
);
2693 int mlx4_QUERY_SRQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2694 struct mlx4_vhcr
*vhcr
,
2695 struct mlx4_cmd_mailbox
*inbox
,
2696 struct mlx4_cmd_mailbox
*outbox
,
2697 struct mlx4_cmd_info
*cmd
)
2700 int srqn
= vhcr
->in_modifier
;
2701 struct res_srq
*srq
;
2703 err
= get_res(dev
, slave
, srqn
, RES_SRQ
, &srq
);
2706 if (srq
->com
.from_state
!= RES_SRQ_HW
) {
2710 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2712 put_res(dev
, slave
, srqn
, RES_SRQ
);
2716 int mlx4_ARM_SRQ_wrapper(struct mlx4_dev
*dev
, int slave
,
2717 struct mlx4_vhcr
*vhcr
,
2718 struct mlx4_cmd_mailbox
*inbox
,
2719 struct mlx4_cmd_mailbox
*outbox
,
2720 struct mlx4_cmd_info
*cmd
)
2723 int srqn
= vhcr
->in_modifier
;
2724 struct res_srq
*srq
;
2726 err
= get_res(dev
, slave
, srqn
, RES_SRQ
, &srq
);
2730 if (srq
->com
.from_state
!= RES_SRQ_HW
) {
2735 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2737 put_res(dev
, slave
, srqn
, RES_SRQ
);
2741 int mlx4_GEN_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2742 struct mlx4_vhcr
*vhcr
,
2743 struct mlx4_cmd_mailbox
*inbox
,
2744 struct mlx4_cmd_mailbox
*outbox
,
2745 struct mlx4_cmd_info
*cmd
)
2748 int qpn
= vhcr
->in_modifier
& 0x7fffff;
2751 err
= get_res(dev
, slave
, qpn
, RES_QP
, &qp
);
2754 if (qp
->com
.from_state
!= RES_QP_HW
) {
2759 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2761 put_res(dev
, slave
, qpn
, RES_QP
);
2765 int mlx4_INIT2INIT_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2766 struct mlx4_vhcr
*vhcr
,
2767 struct mlx4_cmd_mailbox
*inbox
,
2768 struct mlx4_cmd_mailbox
*outbox
,
2769 struct mlx4_cmd_info
*cmd
)
2771 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2772 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2773 update_pkey_index(dev
, slave
, inbox
);
2774 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2777 int mlx4_INIT2RTR_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2778 struct mlx4_vhcr
*vhcr
,
2779 struct mlx4_cmd_mailbox
*inbox
,
2780 struct mlx4_cmd_mailbox
*outbox
,
2781 struct mlx4_cmd_info
*cmd
)
2784 struct mlx4_qp_context
*qpc
= inbox
->buf
+ 8;
2786 err
= verify_qp_parameters(dev
, inbox
, QP_TRANS_INIT2RTR
, slave
);
2790 update_pkey_index(dev
, slave
, inbox
);
2791 update_gid(dev
, inbox
, (u8
)slave
);
2792 adjust_proxy_tun_qkey(dev
, vhcr
, qpc
);
2794 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2797 int mlx4_RTR2RTS_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2798 struct mlx4_vhcr
*vhcr
,
2799 struct mlx4_cmd_mailbox
*inbox
,
2800 struct mlx4_cmd_mailbox
*outbox
,
2801 struct mlx4_cmd_info
*cmd
)
2804 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2806 err
= verify_qp_parameters(dev
, inbox
, QP_TRANS_RTR2RTS
, slave
);
2810 update_pkey_index(dev
, slave
, inbox
);
2811 update_gid(dev
, inbox
, (u8
)slave
);
2812 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2813 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2816 int mlx4_RTS2RTS_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2817 struct mlx4_vhcr
*vhcr
,
2818 struct mlx4_cmd_mailbox
*inbox
,
2819 struct mlx4_cmd_mailbox
*outbox
,
2820 struct mlx4_cmd_info
*cmd
)
2823 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2825 err
= verify_qp_parameters(dev
, inbox
, QP_TRANS_RTS2RTS
, slave
);
2829 update_pkey_index(dev
, slave
, inbox
);
2830 update_gid(dev
, inbox
, (u8
)slave
);
2831 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2832 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2836 int mlx4_SQERR2RTS_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2837 struct mlx4_vhcr
*vhcr
,
2838 struct mlx4_cmd_mailbox
*inbox
,
2839 struct mlx4_cmd_mailbox
*outbox
,
2840 struct mlx4_cmd_info
*cmd
)
2842 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2843 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2844 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2847 int mlx4_SQD2SQD_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2848 struct mlx4_vhcr
*vhcr
,
2849 struct mlx4_cmd_mailbox
*inbox
,
2850 struct mlx4_cmd_mailbox
*outbox
,
2851 struct mlx4_cmd_info
*cmd
)
2854 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2856 err
= verify_qp_parameters(dev
, inbox
, QP_TRANS_SQD2SQD
, slave
);
2860 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2861 update_gid(dev
, inbox
, (u8
)slave
);
2862 update_pkey_index(dev
, slave
, inbox
);
2863 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2866 int mlx4_SQD2RTS_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2867 struct mlx4_vhcr
*vhcr
,
2868 struct mlx4_cmd_mailbox
*inbox
,
2869 struct mlx4_cmd_mailbox
*outbox
,
2870 struct mlx4_cmd_info
*cmd
)
2873 struct mlx4_qp_context
*context
= inbox
->buf
+ 8;
2875 err
= verify_qp_parameters(dev
, inbox
, QP_TRANS_SQD2RTS
, slave
);
2879 adjust_proxy_tun_qkey(dev
, vhcr
, context
);
2880 update_gid(dev
, inbox
, (u8
)slave
);
2881 update_pkey_index(dev
, slave
, inbox
);
2882 return mlx4_GEN_QP_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2885 int mlx4_2RST_QP_wrapper(struct mlx4_dev
*dev
, int slave
,
2886 struct mlx4_vhcr
*vhcr
,
2887 struct mlx4_cmd_mailbox
*inbox
,
2888 struct mlx4_cmd_mailbox
*outbox
,
2889 struct mlx4_cmd_info
*cmd
)
2892 int qpn
= vhcr
->in_modifier
& 0x7fffff;
2895 err
= qp_res_start_move_to(dev
, slave
, qpn
, RES_QP_MAPPED
, &qp
, 0);
2898 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
2902 atomic_dec(&qp
->mtt
->ref_count
);
2903 atomic_dec(&qp
->rcq
->ref_count
);
2904 atomic_dec(&qp
->scq
->ref_count
);
2906 atomic_dec(&qp
->srq
->ref_count
);
2907 res_end_move(dev
, slave
, RES_QP
, qpn
);
2911 res_abort_move(dev
, slave
, RES_QP
, qpn
);
2916 static struct res_gid
*find_gid(struct mlx4_dev
*dev
, int slave
,
2917 struct res_qp
*rqp
, u8
*gid
)
2919 struct res_gid
*res
;
2921 list_for_each_entry(res
, &rqp
->mcg_list
, list
) {
2922 if (!memcmp(res
->gid
, gid
, 16))
2928 static int add_mcg_res(struct mlx4_dev
*dev
, int slave
, struct res_qp
*rqp
,
2929 u8
*gid
, enum mlx4_protocol prot
,
2930 enum mlx4_steer_type steer
)
2932 struct res_gid
*res
;
2935 res
= kzalloc(sizeof *res
, GFP_KERNEL
);
2939 spin_lock_irq(&rqp
->mcg_spl
);
2940 if (find_gid(dev
, slave
, rqp
, gid
)) {
2944 memcpy(res
->gid
, gid
, 16);
2947 list_add_tail(&res
->list
, &rqp
->mcg_list
);
2950 spin_unlock_irq(&rqp
->mcg_spl
);
2955 static int rem_mcg_res(struct mlx4_dev
*dev
, int slave
, struct res_qp
*rqp
,
2956 u8
*gid
, enum mlx4_protocol prot
,
2957 enum mlx4_steer_type steer
)
2959 struct res_gid
*res
;
2962 spin_lock_irq(&rqp
->mcg_spl
);
2963 res
= find_gid(dev
, slave
, rqp
, gid
);
2964 if (!res
|| res
->prot
!= prot
|| res
->steer
!= steer
)
2967 list_del(&res
->list
);
2971 spin_unlock_irq(&rqp
->mcg_spl
);
2976 int mlx4_QP_ATTACH_wrapper(struct mlx4_dev
*dev
, int slave
,
2977 struct mlx4_vhcr
*vhcr
,
2978 struct mlx4_cmd_mailbox
*inbox
,
2979 struct mlx4_cmd_mailbox
*outbox
,
2980 struct mlx4_cmd_info
*cmd
)
2982 struct mlx4_qp qp
; /* dummy for calling attach/detach */
2983 u8
*gid
= inbox
->buf
;
2984 enum mlx4_protocol prot
= (vhcr
->in_modifier
>> 28) & 0x7;
2988 int attach
= vhcr
->op_modifier
;
2989 int block_loopback
= vhcr
->in_modifier
>> 31;
2990 u8 steer_type_mask
= 2;
2991 enum mlx4_steer_type type
= (gid
[7] & steer_type_mask
) >> 1;
2993 if (dev
->caps
.steering_mode
!= MLX4_STEERING_MODE_B0
)
2996 qpn
= vhcr
->in_modifier
& 0xffffff;
2997 err
= get_res(dev
, slave
, qpn
, RES_QP
, &rqp
);
3003 err
= add_mcg_res(dev
, slave
, rqp
, gid
, prot
, type
);
3007 err
= mlx4_qp_attach_common(dev
, &qp
, gid
,
3008 block_loopback
, prot
, type
);
3012 err
= rem_mcg_res(dev
, slave
, rqp
, gid
, prot
, type
);
3015 err
= mlx4_qp_detach_common(dev
, &qp
, gid
, prot
, type
);
3018 put_res(dev
, slave
, qpn
, RES_QP
);
3022 /* ignore error return below, already in error */
3023 (void) rem_mcg_res(dev
, slave
, rqp
, gid
, prot
, type
);
3025 put_res(dev
, slave
, qpn
, RES_QP
);
3031 * MAC validation for Flow Steering rules.
3032 * VF can attach rules only with a mac address which is assigned to it.
3034 static int validate_eth_header_mac(int slave
, struct _rule_hw
*eth_header
,
3035 struct list_head
*rlist
)
3037 struct mac_res
*res
, *tmp
;
3040 /* make sure it isn't multicast or broadcast mac*/
3041 if (!is_multicast_ether_addr(eth_header
->eth
.dst_mac
) &&
3042 !is_broadcast_ether_addr(eth_header
->eth
.dst_mac
)) {
3043 list_for_each_entry_safe(res
, tmp
, rlist
, list
) {
3044 be_mac
= cpu_to_be64(res
->mac
<< 16);
3045 if (!memcmp(&be_mac
, eth_header
->eth
.dst_mac
, ETH_ALEN
))
3048 pr_err("MAC %pM doesn't belong to VF %d, Steering rule rejected\n",
3049 eth_header
->eth
.dst_mac
, slave
);
3056 * In case of missing eth header, append eth header with a MAC address
3057 * assigned to the VF.
3059 static int add_eth_header(struct mlx4_dev
*dev
, int slave
,
3060 struct mlx4_cmd_mailbox
*inbox
,
3061 struct list_head
*rlist
, int header_id
)
3063 struct mac_res
*res
, *tmp
;
3065 struct mlx4_net_trans_rule_hw_ctrl
*ctrl
;
3066 struct mlx4_net_trans_rule_hw_eth
*eth_header
;
3067 struct mlx4_net_trans_rule_hw_ipv4
*ip_header
;
3068 struct mlx4_net_trans_rule_hw_tcp_udp
*l4_header
;
3070 __be64 mac_msk
= cpu_to_be64(MLX4_MAC_MASK
<< 16);
3072 ctrl
= (struct mlx4_net_trans_rule_hw_ctrl
*)inbox
->buf
;
3074 eth_header
= (struct mlx4_net_trans_rule_hw_eth
*)(ctrl
+ 1);
3076 /* Clear a space in the inbox for eth header */
3077 switch (header_id
) {
3078 case MLX4_NET_TRANS_RULE_ID_IPV4
:
3080 (struct mlx4_net_trans_rule_hw_ipv4
*)(eth_header
+ 1);
3081 memmove(ip_header
, eth_header
,
3082 sizeof(*ip_header
) + sizeof(*l4_header
));
3084 case MLX4_NET_TRANS_RULE_ID_TCP
:
3085 case MLX4_NET_TRANS_RULE_ID_UDP
:
3086 l4_header
= (struct mlx4_net_trans_rule_hw_tcp_udp
*)
3088 memmove(l4_header
, eth_header
, sizeof(*l4_header
));
3093 list_for_each_entry_safe(res
, tmp
, rlist
, list
) {
3094 if (port
== res
->port
) {
3095 be_mac
= cpu_to_be64(res
->mac
<< 16);
3100 pr_err("Failed adding eth header to FS rule, Can't find matching MAC for port %d .\n",
3105 memset(eth_header
, 0, sizeof(*eth_header
));
3106 eth_header
->size
= sizeof(*eth_header
) >> 2;
3107 eth_header
->id
= cpu_to_be16(__sw_id_hw
[MLX4_NET_TRANS_RULE_ID_ETH
]);
3108 memcpy(eth_header
->dst_mac
, &be_mac
, ETH_ALEN
);
3109 memcpy(eth_header
->dst_mac_msk
, &mac_msk
, ETH_ALEN
);
3115 int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev
*dev
, int slave
,
3116 struct mlx4_vhcr
*vhcr
,
3117 struct mlx4_cmd_mailbox
*inbox
,
3118 struct mlx4_cmd_mailbox
*outbox
,
3119 struct mlx4_cmd_info
*cmd
)
3122 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3123 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3124 struct list_head
*rlist
= &tracker
->slave_list
[slave
].res_list
[RES_MAC
];
3127 struct mlx4_net_trans_rule_hw_ctrl
*ctrl
;
3128 struct _rule_hw
*rule_header
;
3131 if (dev
->caps
.steering_mode
!=
3132 MLX4_STEERING_MODE_DEVICE_MANAGED
)
3135 ctrl
= (struct mlx4_net_trans_rule_hw_ctrl
*)inbox
->buf
;
3136 qpn
= be32_to_cpu(ctrl
->qpn
) & 0xffffff;
3137 err
= get_res(dev
, slave
, qpn
, RES_QP
, NULL
);
3139 pr_err("Steering rule with qpn 0x%x rejected.\n", qpn
);
3142 rule_header
= (struct _rule_hw
*)(ctrl
+ 1);
3143 header_id
= map_hw_to_sw_id(be16_to_cpu(rule_header
->id
));
3145 switch (header_id
) {
3146 case MLX4_NET_TRANS_RULE_ID_ETH
:
3147 if (validate_eth_header_mac(slave
, rule_header
, rlist
)) {
3152 case MLX4_NET_TRANS_RULE_ID_IB
:
3154 case MLX4_NET_TRANS_RULE_ID_IPV4
:
3155 case MLX4_NET_TRANS_RULE_ID_TCP
:
3156 case MLX4_NET_TRANS_RULE_ID_UDP
:
3157 pr_warn("Can't attach FS rule without L2 headers, adding L2 header.\n");
3158 if (add_eth_header(dev
, slave
, inbox
, rlist
, header_id
)) {
3162 vhcr
->in_modifier
+=
3163 sizeof(struct mlx4_net_trans_rule_hw_eth
) >> 2;
3166 pr_err("Corrupted mailbox.\n");
3171 err
= mlx4_cmd_imm(dev
, inbox
->dma
, &vhcr
->out_param
,
3172 vhcr
->in_modifier
, 0,
3173 MLX4_QP_FLOW_STEERING_ATTACH
, MLX4_CMD_TIME_CLASS_A
,
3178 err
= add_res_range(dev
, slave
, vhcr
->out_param
, 1, RES_FS_RULE
, 0);
3180 mlx4_err(dev
, "Fail to add flow steering resources.\n ");
3182 mlx4_cmd(dev
, vhcr
->out_param
, 0, 0,
3183 MLX4_QP_FLOW_STEERING_DETACH
, MLX4_CMD_TIME_CLASS_A
,
3187 put_res(dev
, slave
, qpn
, RES_QP
);
3191 int mlx4_QP_FLOW_STEERING_DETACH_wrapper(struct mlx4_dev
*dev
, int slave
,
3192 struct mlx4_vhcr
*vhcr
,
3193 struct mlx4_cmd_mailbox
*inbox
,
3194 struct mlx4_cmd_mailbox
*outbox
,
3195 struct mlx4_cmd_info
*cmd
)
3199 if (dev
->caps
.steering_mode
!=
3200 MLX4_STEERING_MODE_DEVICE_MANAGED
)
3203 err
= rem_res_range(dev
, slave
, vhcr
->in_param
, 1, RES_FS_RULE
, 0);
3205 mlx4_err(dev
, "Fail to remove flow steering resources.\n ");
3209 err
= mlx4_cmd(dev
, vhcr
->in_param
, 0, 0,
3210 MLX4_QP_FLOW_STEERING_DETACH
, MLX4_CMD_TIME_CLASS_A
,
3216 BUSY_MAX_RETRIES
= 10
3219 int mlx4_QUERY_IF_STAT_wrapper(struct mlx4_dev
*dev
, int slave
,
3220 struct mlx4_vhcr
*vhcr
,
3221 struct mlx4_cmd_mailbox
*inbox
,
3222 struct mlx4_cmd_mailbox
*outbox
,
3223 struct mlx4_cmd_info
*cmd
)
3226 int index
= vhcr
->in_modifier
& 0xffff;
3228 err
= get_res(dev
, slave
, index
, RES_COUNTER
, NULL
);
3232 err
= mlx4_DMA_wrapper(dev
, slave
, vhcr
, inbox
, outbox
, cmd
);
3233 put_res(dev
, slave
, index
, RES_COUNTER
);
3237 static void detach_qp(struct mlx4_dev
*dev
, int slave
, struct res_qp
*rqp
)
3239 struct res_gid
*rgid
;
3240 struct res_gid
*tmp
;
3241 struct mlx4_qp qp
; /* dummy for calling attach/detach */
3243 list_for_each_entry_safe(rgid
, tmp
, &rqp
->mcg_list
, list
) {
3244 qp
.qpn
= rqp
->local_qpn
;
3245 (void) mlx4_qp_detach_common(dev
, &qp
, rgid
->gid
, rgid
->prot
,
3247 list_del(&rgid
->list
);
3252 static int _move_all_busy(struct mlx4_dev
*dev
, int slave
,
3253 enum mlx4_resource type
, int print
)
3255 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3256 struct mlx4_resource_tracker
*tracker
=
3257 &priv
->mfunc
.master
.res_tracker
;
3258 struct list_head
*rlist
= &tracker
->slave_list
[slave
].res_list
[type
];
3259 struct res_common
*r
;
3260 struct res_common
*tmp
;
3264 spin_lock_irq(mlx4_tlock(dev
));
3265 list_for_each_entry_safe(r
, tmp
, rlist
, list
) {
3266 if (r
->owner
== slave
) {
3268 if (r
->state
== RES_ANY_BUSY
) {
3271 "%s id 0x%llx is busy\n",
3276 r
->from_state
= r
->state
;
3277 r
->state
= RES_ANY_BUSY
;
3283 spin_unlock_irq(mlx4_tlock(dev
));
3288 static int move_all_busy(struct mlx4_dev
*dev
, int slave
,
3289 enum mlx4_resource type
)
3291 unsigned long begin
;
3296 busy
= _move_all_busy(dev
, slave
, type
, 0);
3297 if (time_after(jiffies
, begin
+ 5 * HZ
))
3304 busy
= _move_all_busy(dev
, slave
, type
, 1);
3308 static void rem_slave_qps(struct mlx4_dev
*dev
, int slave
)
3310 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3311 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3312 struct list_head
*qp_list
=
3313 &tracker
->slave_list
[slave
].res_list
[RES_QP
];
3321 err
= move_all_busy(dev
, slave
, RES_QP
);
3323 mlx4_warn(dev
, "rem_slave_qps: Could not move all qps to busy"
3324 "for slave %d\n", slave
);
3326 spin_lock_irq(mlx4_tlock(dev
));
3327 list_for_each_entry_safe(qp
, tmp
, qp_list
, com
.list
) {
3328 spin_unlock_irq(mlx4_tlock(dev
));
3329 if (qp
->com
.owner
== slave
) {
3330 qpn
= qp
->com
.res_id
;
3331 detach_qp(dev
, slave
, qp
);
3332 state
= qp
->com
.from_state
;
3333 while (state
!= 0) {
3335 case RES_QP_RESERVED
:
3336 spin_lock_irq(mlx4_tlock(dev
));
3337 rb_erase(&qp
->com
.node
,
3338 &tracker
->res_tree
[RES_QP
]);
3339 list_del(&qp
->com
.list
);
3340 spin_unlock_irq(mlx4_tlock(dev
));
3345 if (!valid_reserved(dev
, slave
, qpn
))
3346 __mlx4_qp_free_icm(dev
, qpn
);
3347 state
= RES_QP_RESERVED
;
3351 err
= mlx4_cmd(dev
, in_param
,
3354 MLX4_CMD_TIME_CLASS_A
,
3357 mlx4_dbg(dev
, "rem_slave_qps: failed"
3358 " to move slave %d qpn %d to"
3361 atomic_dec(&qp
->rcq
->ref_count
);
3362 atomic_dec(&qp
->scq
->ref_count
);
3363 atomic_dec(&qp
->mtt
->ref_count
);
3365 atomic_dec(&qp
->srq
->ref_count
);
3366 state
= RES_QP_MAPPED
;
3373 spin_lock_irq(mlx4_tlock(dev
));
3375 spin_unlock_irq(mlx4_tlock(dev
));
3378 static void rem_slave_srqs(struct mlx4_dev
*dev
, int slave
)
3380 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3381 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3382 struct list_head
*srq_list
=
3383 &tracker
->slave_list
[slave
].res_list
[RES_SRQ
];
3384 struct res_srq
*srq
;
3385 struct res_srq
*tmp
;
3392 err
= move_all_busy(dev
, slave
, RES_SRQ
);
3394 mlx4_warn(dev
, "rem_slave_srqs: Could not move all srqs to "
3395 "busy for slave %d\n", slave
);
3397 spin_lock_irq(mlx4_tlock(dev
));
3398 list_for_each_entry_safe(srq
, tmp
, srq_list
, com
.list
) {
3399 spin_unlock_irq(mlx4_tlock(dev
));
3400 if (srq
->com
.owner
== slave
) {
3401 srqn
= srq
->com
.res_id
;
3402 state
= srq
->com
.from_state
;
3403 while (state
!= 0) {
3405 case RES_SRQ_ALLOCATED
:
3406 __mlx4_srq_free_icm(dev
, srqn
);
3407 spin_lock_irq(mlx4_tlock(dev
));
3408 rb_erase(&srq
->com
.node
,
3409 &tracker
->res_tree
[RES_SRQ
]);
3410 list_del(&srq
->com
.list
);
3411 spin_unlock_irq(mlx4_tlock(dev
));
3418 err
= mlx4_cmd(dev
, in_param
, srqn
, 1,
3420 MLX4_CMD_TIME_CLASS_A
,
3423 mlx4_dbg(dev
, "rem_slave_srqs: failed"
3424 " to move slave %d srq %d to"
3428 atomic_dec(&srq
->mtt
->ref_count
);
3430 atomic_dec(&srq
->cq
->ref_count
);
3431 state
= RES_SRQ_ALLOCATED
;
3439 spin_lock_irq(mlx4_tlock(dev
));
3441 spin_unlock_irq(mlx4_tlock(dev
));
3444 static void rem_slave_cqs(struct mlx4_dev
*dev
, int slave
)
3446 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3447 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3448 struct list_head
*cq_list
=
3449 &tracker
->slave_list
[slave
].res_list
[RES_CQ
];
3458 err
= move_all_busy(dev
, slave
, RES_CQ
);
3460 mlx4_warn(dev
, "rem_slave_cqs: Could not move all cqs to "
3461 "busy for slave %d\n", slave
);
3463 spin_lock_irq(mlx4_tlock(dev
));
3464 list_for_each_entry_safe(cq
, tmp
, cq_list
, com
.list
) {
3465 spin_unlock_irq(mlx4_tlock(dev
));
3466 if (cq
->com
.owner
== slave
&& !atomic_read(&cq
->ref_count
)) {
3467 cqn
= cq
->com
.res_id
;
3468 state
= cq
->com
.from_state
;
3469 while (state
!= 0) {
3471 case RES_CQ_ALLOCATED
:
3472 __mlx4_cq_free_icm(dev
, cqn
);
3473 spin_lock_irq(mlx4_tlock(dev
));
3474 rb_erase(&cq
->com
.node
,
3475 &tracker
->res_tree
[RES_CQ
]);
3476 list_del(&cq
->com
.list
);
3477 spin_unlock_irq(mlx4_tlock(dev
));
3484 err
= mlx4_cmd(dev
, in_param
, cqn
, 1,
3486 MLX4_CMD_TIME_CLASS_A
,
3489 mlx4_dbg(dev
, "rem_slave_cqs: failed"
3490 " to move slave %d cq %d to"
3493 atomic_dec(&cq
->mtt
->ref_count
);
3494 state
= RES_CQ_ALLOCATED
;
3502 spin_lock_irq(mlx4_tlock(dev
));
3504 spin_unlock_irq(mlx4_tlock(dev
));
3507 static void rem_slave_mrs(struct mlx4_dev
*dev
, int slave
)
3509 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3510 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3511 struct list_head
*mpt_list
=
3512 &tracker
->slave_list
[slave
].res_list
[RES_MPT
];
3513 struct res_mpt
*mpt
;
3514 struct res_mpt
*tmp
;
3521 err
= move_all_busy(dev
, slave
, RES_MPT
);
3523 mlx4_warn(dev
, "rem_slave_mrs: Could not move all mpts to "
3524 "busy for slave %d\n", slave
);
3526 spin_lock_irq(mlx4_tlock(dev
));
3527 list_for_each_entry_safe(mpt
, tmp
, mpt_list
, com
.list
) {
3528 spin_unlock_irq(mlx4_tlock(dev
));
3529 if (mpt
->com
.owner
== slave
) {
3530 mptn
= mpt
->com
.res_id
;
3531 state
= mpt
->com
.from_state
;
3532 while (state
!= 0) {
3534 case RES_MPT_RESERVED
:
3535 __mlx4_mpt_release(dev
, mpt
->key
);
3536 spin_lock_irq(mlx4_tlock(dev
));
3537 rb_erase(&mpt
->com
.node
,
3538 &tracker
->res_tree
[RES_MPT
]);
3539 list_del(&mpt
->com
.list
);
3540 spin_unlock_irq(mlx4_tlock(dev
));
3545 case RES_MPT_MAPPED
:
3546 __mlx4_mpt_free_icm(dev
, mpt
->key
);
3547 state
= RES_MPT_RESERVED
;
3552 err
= mlx4_cmd(dev
, in_param
, mptn
, 0,
3554 MLX4_CMD_TIME_CLASS_A
,
3557 mlx4_dbg(dev
, "rem_slave_mrs: failed"
3558 " to move slave %d mpt %d to"
3562 atomic_dec(&mpt
->mtt
->ref_count
);
3563 state
= RES_MPT_MAPPED
;
3570 spin_lock_irq(mlx4_tlock(dev
));
3572 spin_unlock_irq(mlx4_tlock(dev
));
3575 static void rem_slave_mtts(struct mlx4_dev
*dev
, int slave
)
3577 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3578 struct mlx4_resource_tracker
*tracker
=
3579 &priv
->mfunc
.master
.res_tracker
;
3580 struct list_head
*mtt_list
=
3581 &tracker
->slave_list
[slave
].res_list
[RES_MTT
];
3582 struct res_mtt
*mtt
;
3583 struct res_mtt
*tmp
;
3589 err
= move_all_busy(dev
, slave
, RES_MTT
);
3591 mlx4_warn(dev
, "rem_slave_mtts: Could not move all mtts to "
3592 "busy for slave %d\n", slave
);
3594 spin_lock_irq(mlx4_tlock(dev
));
3595 list_for_each_entry_safe(mtt
, tmp
, mtt_list
, com
.list
) {
3596 spin_unlock_irq(mlx4_tlock(dev
));
3597 if (mtt
->com
.owner
== slave
) {
3598 base
= mtt
->com
.res_id
;
3599 state
= mtt
->com
.from_state
;
3600 while (state
!= 0) {
3602 case RES_MTT_ALLOCATED
:
3603 __mlx4_free_mtt_range(dev
, base
,
3605 spin_lock_irq(mlx4_tlock(dev
));
3606 rb_erase(&mtt
->com
.node
,
3607 &tracker
->res_tree
[RES_MTT
]);
3608 list_del(&mtt
->com
.list
);
3609 spin_unlock_irq(mlx4_tlock(dev
));
3619 spin_lock_irq(mlx4_tlock(dev
));
3621 spin_unlock_irq(mlx4_tlock(dev
));
3624 static void rem_slave_fs_rule(struct mlx4_dev
*dev
, int slave
)
3626 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3627 struct mlx4_resource_tracker
*tracker
=
3628 &priv
->mfunc
.master
.res_tracker
;
3629 struct list_head
*fs_rule_list
=
3630 &tracker
->slave_list
[slave
].res_list
[RES_FS_RULE
];
3631 struct res_fs_rule
*fs_rule
;
3632 struct res_fs_rule
*tmp
;
3637 err
= move_all_busy(dev
, slave
, RES_FS_RULE
);
3639 mlx4_warn(dev
, "rem_slave_fs_rule: Could not move all mtts to busy for slave %d\n",
3642 spin_lock_irq(mlx4_tlock(dev
));
3643 list_for_each_entry_safe(fs_rule
, tmp
, fs_rule_list
, com
.list
) {
3644 spin_unlock_irq(mlx4_tlock(dev
));
3645 if (fs_rule
->com
.owner
== slave
) {
3646 base
= fs_rule
->com
.res_id
;
3647 state
= fs_rule
->com
.from_state
;
3648 while (state
!= 0) {
3650 case RES_FS_RULE_ALLOCATED
:
3652 err
= mlx4_cmd(dev
, base
, 0, 0,
3653 MLX4_QP_FLOW_STEERING_DETACH
,
3654 MLX4_CMD_TIME_CLASS_A
,
3657 spin_lock_irq(mlx4_tlock(dev
));
3658 rb_erase(&fs_rule
->com
.node
,
3659 &tracker
->res_tree
[RES_FS_RULE
]);
3660 list_del(&fs_rule
->com
.list
);
3661 spin_unlock_irq(mlx4_tlock(dev
));
3671 spin_lock_irq(mlx4_tlock(dev
));
3673 spin_unlock_irq(mlx4_tlock(dev
));
3676 static void rem_slave_eqs(struct mlx4_dev
*dev
, int slave
)
3678 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3679 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3680 struct list_head
*eq_list
=
3681 &tracker
->slave_list
[slave
].res_list
[RES_EQ
];
3688 struct mlx4_cmd_mailbox
*mailbox
;
3690 err
= move_all_busy(dev
, slave
, RES_EQ
);
3692 mlx4_warn(dev
, "rem_slave_eqs: Could not move all eqs to "
3693 "busy for slave %d\n", slave
);
3695 spin_lock_irq(mlx4_tlock(dev
));
3696 list_for_each_entry_safe(eq
, tmp
, eq_list
, com
.list
) {
3697 spin_unlock_irq(mlx4_tlock(dev
));
3698 if (eq
->com
.owner
== slave
) {
3699 eqn
= eq
->com
.res_id
;
3700 state
= eq
->com
.from_state
;
3701 while (state
!= 0) {
3703 case RES_EQ_RESERVED
:
3704 spin_lock_irq(mlx4_tlock(dev
));
3705 rb_erase(&eq
->com
.node
,
3706 &tracker
->res_tree
[RES_EQ
]);
3707 list_del(&eq
->com
.list
);
3708 spin_unlock_irq(mlx4_tlock(dev
));
3714 mailbox
= mlx4_alloc_cmd_mailbox(dev
);
3715 if (IS_ERR(mailbox
)) {
3719 err
= mlx4_cmd_box(dev
, slave
, 0,
3722 MLX4_CMD_TIME_CLASS_A
,
3725 mlx4_dbg(dev
, "rem_slave_eqs: failed"
3726 " to move slave %d eqs %d to"
3727 " SW ownership\n", slave
, eqn
);
3728 mlx4_free_cmd_mailbox(dev
, mailbox
);
3729 atomic_dec(&eq
->mtt
->ref_count
);
3730 state
= RES_EQ_RESERVED
;
3738 spin_lock_irq(mlx4_tlock(dev
));
3740 spin_unlock_irq(mlx4_tlock(dev
));
3743 static void rem_slave_counters(struct mlx4_dev
*dev
, int slave
)
3745 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3746 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3747 struct list_head
*counter_list
=
3748 &tracker
->slave_list
[slave
].res_list
[RES_COUNTER
];
3749 struct res_counter
*counter
;
3750 struct res_counter
*tmp
;
3754 err
= move_all_busy(dev
, slave
, RES_COUNTER
);
3756 mlx4_warn(dev
, "rem_slave_counters: Could not move all counters to "
3757 "busy for slave %d\n", slave
);
3759 spin_lock_irq(mlx4_tlock(dev
));
3760 list_for_each_entry_safe(counter
, tmp
, counter_list
, com
.list
) {
3761 if (counter
->com
.owner
== slave
) {
3762 index
= counter
->com
.res_id
;
3763 rb_erase(&counter
->com
.node
,
3764 &tracker
->res_tree
[RES_COUNTER
]);
3765 list_del(&counter
->com
.list
);
3767 __mlx4_counter_free(dev
, index
);
3770 spin_unlock_irq(mlx4_tlock(dev
));
3773 static void rem_slave_xrcdns(struct mlx4_dev
*dev
, int slave
)
3775 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3776 struct mlx4_resource_tracker
*tracker
= &priv
->mfunc
.master
.res_tracker
;
3777 struct list_head
*xrcdn_list
=
3778 &tracker
->slave_list
[slave
].res_list
[RES_XRCD
];
3779 struct res_xrcdn
*xrcd
;
3780 struct res_xrcdn
*tmp
;
3784 err
= move_all_busy(dev
, slave
, RES_XRCD
);
3786 mlx4_warn(dev
, "rem_slave_xrcdns: Could not move all xrcdns to "
3787 "busy for slave %d\n", slave
);
3789 spin_lock_irq(mlx4_tlock(dev
));
3790 list_for_each_entry_safe(xrcd
, tmp
, xrcdn_list
, com
.list
) {
3791 if (xrcd
->com
.owner
== slave
) {
3792 xrcdn
= xrcd
->com
.res_id
;
3793 rb_erase(&xrcd
->com
.node
, &tracker
->res_tree
[RES_XRCD
]);
3794 list_del(&xrcd
->com
.list
);
3796 __mlx4_xrcd_free(dev
, xrcdn
);
3799 spin_unlock_irq(mlx4_tlock(dev
));
3802 void mlx4_delete_all_resources_for_slave(struct mlx4_dev
*dev
, int slave
)
3804 struct mlx4_priv
*priv
= mlx4_priv(dev
);
3806 mutex_lock(&priv
->mfunc
.master
.res_tracker
.slave_list
[slave
].mutex
);
3808 rem_slave_macs(dev
, slave
);
3809 rem_slave_qps(dev
, slave
);
3810 rem_slave_srqs(dev
, slave
);
3811 rem_slave_cqs(dev
, slave
);
3812 rem_slave_mrs(dev
, slave
);
3813 rem_slave_eqs(dev
, slave
);
3814 rem_slave_mtts(dev
, slave
);
3815 rem_slave_counters(dev
, slave
);
3816 rem_slave_xrcdns(dev
, slave
);
3817 rem_slave_fs_rule(dev
, slave
);
3818 mutex_unlock(&priv
->mfunc
.master
.res_tracker
.slave_list
[slave
].mutex
);