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net/mlx5e: Allocate set of queue counters per netdev
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlx5 / core / en_ethtool.c
1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include "en.h"
34
35 static void mlx5e_get_drvinfo(struct net_device *dev,
36 struct ethtool_drvinfo *drvinfo)
37 {
38 struct mlx5e_priv *priv = netdev_priv(dev);
39 struct mlx5_core_dev *mdev = priv->mdev;
40
41 strlcpy(drvinfo->driver, DRIVER_NAME, sizeof(drvinfo->driver));
42 strlcpy(drvinfo->version, DRIVER_VERSION " (" DRIVER_RELDATE ")",
43 sizeof(drvinfo->version));
44 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
45 "%d.%d.%d",
46 fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev));
47 strlcpy(drvinfo->bus_info, pci_name(mdev->pdev),
48 sizeof(drvinfo->bus_info));
49 }
50
51 static const struct {
52 u32 supported;
53 u32 advertised;
54 u32 speed;
55 } ptys2ethtool_table[MLX5E_LINK_MODES_NUMBER] = {
56 [MLX5E_1000BASE_CX_SGMII] = {
57 .supported = SUPPORTED_1000baseKX_Full,
58 .advertised = ADVERTISED_1000baseKX_Full,
59 .speed = 1000,
60 },
61 [MLX5E_1000BASE_KX] = {
62 .supported = SUPPORTED_1000baseKX_Full,
63 .advertised = ADVERTISED_1000baseKX_Full,
64 .speed = 1000,
65 },
66 [MLX5E_10GBASE_CX4] = {
67 .supported = SUPPORTED_10000baseKX4_Full,
68 .advertised = ADVERTISED_10000baseKX4_Full,
69 .speed = 10000,
70 },
71 [MLX5E_10GBASE_KX4] = {
72 .supported = SUPPORTED_10000baseKX4_Full,
73 .advertised = ADVERTISED_10000baseKX4_Full,
74 .speed = 10000,
75 },
76 [MLX5E_10GBASE_KR] = {
77 .supported = SUPPORTED_10000baseKR_Full,
78 .advertised = ADVERTISED_10000baseKR_Full,
79 .speed = 10000,
80 },
81 [MLX5E_20GBASE_KR2] = {
82 .supported = SUPPORTED_20000baseKR2_Full,
83 .advertised = ADVERTISED_20000baseKR2_Full,
84 .speed = 20000,
85 },
86 [MLX5E_40GBASE_CR4] = {
87 .supported = SUPPORTED_40000baseCR4_Full,
88 .advertised = ADVERTISED_40000baseCR4_Full,
89 .speed = 40000,
90 },
91 [MLX5E_40GBASE_KR4] = {
92 .supported = SUPPORTED_40000baseKR4_Full,
93 .advertised = ADVERTISED_40000baseKR4_Full,
94 .speed = 40000,
95 },
96 [MLX5E_56GBASE_R4] = {
97 .supported = SUPPORTED_56000baseKR4_Full,
98 .advertised = ADVERTISED_56000baseKR4_Full,
99 .speed = 56000,
100 },
101 [MLX5E_10GBASE_CR] = {
102 .supported = SUPPORTED_10000baseKR_Full,
103 .advertised = ADVERTISED_10000baseKR_Full,
104 .speed = 10000,
105 },
106 [MLX5E_10GBASE_SR] = {
107 .supported = SUPPORTED_10000baseKR_Full,
108 .advertised = ADVERTISED_10000baseKR_Full,
109 .speed = 10000,
110 },
111 [MLX5E_10GBASE_ER] = {
112 .supported = SUPPORTED_10000baseKR_Full,
113 .advertised = ADVERTISED_10000baseKR_Full,
114 .speed = 10000,
115 },
116 [MLX5E_40GBASE_SR4] = {
117 .supported = SUPPORTED_40000baseSR4_Full,
118 .advertised = ADVERTISED_40000baseSR4_Full,
119 .speed = 40000,
120 },
121 [MLX5E_40GBASE_LR4] = {
122 .supported = SUPPORTED_40000baseLR4_Full,
123 .advertised = ADVERTISED_40000baseLR4_Full,
124 .speed = 40000,
125 },
126 [MLX5E_100GBASE_CR4] = {
127 .speed = 100000,
128 },
129 [MLX5E_100GBASE_SR4] = {
130 .speed = 100000,
131 },
132 [MLX5E_100GBASE_KR4] = {
133 .speed = 100000,
134 },
135 [MLX5E_100GBASE_LR4] = {
136 .speed = 100000,
137 },
138 [MLX5E_100BASE_TX] = {
139 .speed = 100,
140 },
141 [MLX5E_100BASE_T] = {
142 .supported = SUPPORTED_100baseT_Full,
143 .advertised = ADVERTISED_100baseT_Full,
144 .speed = 100,
145 },
146 [MLX5E_10GBASE_T] = {
147 .supported = SUPPORTED_10000baseT_Full,
148 .advertised = ADVERTISED_10000baseT_Full,
149 .speed = 1000,
150 },
151 [MLX5E_25GBASE_CR] = {
152 .speed = 25000,
153 },
154 [MLX5E_25GBASE_KR] = {
155 .speed = 25000,
156 },
157 [MLX5E_25GBASE_SR] = {
158 .speed = 25000,
159 },
160 [MLX5E_50GBASE_CR2] = {
161 .speed = 50000,
162 },
163 [MLX5E_50GBASE_KR2] = {
164 .speed = 50000,
165 },
166 };
167
168 #define MLX5E_NUM_Q_CNTRS(priv) (NUM_Q_COUNTERS * (!!priv->q_counter))
169
170 static int mlx5e_get_sset_count(struct net_device *dev, int sset)
171 {
172 struct mlx5e_priv *priv = netdev_priv(dev);
173
174 switch (sset) {
175 case ETH_SS_STATS:
176 return NUM_VPORT_COUNTERS + NUM_PPORT_COUNTERS +
177 MLX5E_NUM_Q_CNTRS(priv) +
178 priv->params.num_channels * NUM_RQ_STATS +
179 priv->params.num_channels * priv->params.num_tc *
180 NUM_SQ_STATS;
181 /* fallthrough */
182 default:
183 return -EOPNOTSUPP;
184 }
185 }
186
187 static void mlx5e_get_strings(struct net_device *dev,
188 uint32_t stringset, uint8_t *data)
189 {
190 int i, j, tc, idx = 0;
191 struct mlx5e_priv *priv = netdev_priv(dev);
192
193 switch (stringset) {
194 case ETH_SS_PRIV_FLAGS:
195 break;
196
197 case ETH_SS_TEST:
198 break;
199
200 case ETH_SS_STATS:
201 /* VPORT counters */
202 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
203 strcpy(data + (idx++) * ETH_GSTRING_LEN,
204 vport_strings[i]);
205
206 /* Q counters */
207 for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
208 strcpy(data + (idx++) * ETH_GSTRING_LEN,
209 qcounter_stats_strings[i]);
210
211 /* PPORT counters */
212 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
213 strcpy(data + (idx++) * ETH_GSTRING_LEN,
214 pport_strings[i]);
215
216 /* per channel counters */
217 for (i = 0; i < priv->params.num_channels; i++)
218 for (j = 0; j < NUM_RQ_STATS; j++)
219 sprintf(data + (idx++) * ETH_GSTRING_LEN,
220 "rx%d_%s", i, rq_stats_strings[j]);
221
222 for (tc = 0; tc < priv->params.num_tc; tc++)
223 for (i = 0; i < priv->params.num_channels; i++)
224 for (j = 0; j < NUM_SQ_STATS; j++)
225 sprintf(data +
226 (idx++) * ETH_GSTRING_LEN,
227 "tx%d_%s",
228 priv->channeltc_to_txq_map[i][tc],
229 sq_stats_strings[j]);
230 break;
231 }
232 }
233
234 static void mlx5e_get_ethtool_stats(struct net_device *dev,
235 struct ethtool_stats *stats, u64 *data)
236 {
237 struct mlx5e_priv *priv = netdev_priv(dev);
238 int i, j, tc, idx = 0;
239
240 if (!data)
241 return;
242
243 mutex_lock(&priv->state_lock);
244 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
245 mlx5e_update_stats(priv);
246 mutex_unlock(&priv->state_lock);
247
248 for (i = 0; i < NUM_VPORT_COUNTERS; i++)
249 data[idx++] = ((u64 *)&priv->stats.vport)[i];
250
251 for (i = 0; i < MLX5E_NUM_Q_CNTRS(priv); i++)
252 data[idx++] = ((u32 *)&priv->stats.qcnt)[i];
253
254 for (i = 0; i < NUM_PPORT_COUNTERS; i++)
255 data[idx++] = be64_to_cpu(((__be64 *)&priv->stats.pport)[i]);
256
257 /* per channel counters */
258 for (i = 0; i < priv->params.num_channels; i++)
259 for (j = 0; j < NUM_RQ_STATS; j++)
260 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
261 &priv->state) ? 0 :
262 ((u64 *)&priv->channel[i]->rq.stats)[j];
263
264 for (tc = 0; tc < priv->params.num_tc; tc++)
265 for (i = 0; i < priv->params.num_channels; i++)
266 for (j = 0; j < NUM_SQ_STATS; j++)
267 data[idx++] = !test_bit(MLX5E_STATE_OPENED,
268 &priv->state) ? 0 :
269 ((u64 *)&priv->channel[i]->sq[tc].stats)[j];
270 }
271
272 static void mlx5e_get_ringparam(struct net_device *dev,
273 struct ethtool_ringparam *param)
274 {
275 struct mlx5e_priv *priv = netdev_priv(dev);
276
277 param->rx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE;
278 param->tx_max_pending = 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE;
279 param->rx_pending = 1 << priv->params.log_rq_size;
280 param->tx_pending = 1 << priv->params.log_sq_size;
281 }
282
283 static int mlx5e_set_ringparam(struct net_device *dev,
284 struct ethtool_ringparam *param)
285 {
286 struct mlx5e_priv *priv = netdev_priv(dev);
287 bool was_opened;
288 u16 min_rx_wqes;
289 u8 log_rq_size;
290 u8 log_sq_size;
291 int err = 0;
292
293 if (param->rx_jumbo_pending) {
294 netdev_info(dev, "%s: rx_jumbo_pending not supported\n",
295 __func__);
296 return -EINVAL;
297 }
298 if (param->rx_mini_pending) {
299 netdev_info(dev, "%s: rx_mini_pending not supported\n",
300 __func__);
301 return -EINVAL;
302 }
303 if (param->rx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE)) {
304 netdev_info(dev, "%s: rx_pending (%d) < min (%d)\n",
305 __func__, param->rx_pending,
306 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE);
307 return -EINVAL;
308 }
309 if (param->rx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE)) {
310 netdev_info(dev, "%s: rx_pending (%d) > max (%d)\n",
311 __func__, param->rx_pending,
312 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE);
313 return -EINVAL;
314 }
315 if (param->tx_pending < (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)) {
316 netdev_info(dev, "%s: tx_pending (%d) < min (%d)\n",
317 __func__, param->tx_pending,
318 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE);
319 return -EINVAL;
320 }
321 if (param->tx_pending > (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE)) {
322 netdev_info(dev, "%s: tx_pending (%d) > max (%d)\n",
323 __func__, param->tx_pending,
324 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE);
325 return -EINVAL;
326 }
327
328 log_rq_size = order_base_2(param->rx_pending);
329 log_sq_size = order_base_2(param->tx_pending);
330 min_rx_wqes = min_t(u16, param->rx_pending - 1,
331 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES);
332
333 if (log_rq_size == priv->params.log_rq_size &&
334 log_sq_size == priv->params.log_sq_size &&
335 min_rx_wqes == priv->params.min_rx_wqes)
336 return 0;
337
338 mutex_lock(&priv->state_lock);
339
340 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
341 if (was_opened)
342 mlx5e_close_locked(dev);
343
344 priv->params.log_rq_size = log_rq_size;
345 priv->params.log_sq_size = log_sq_size;
346 priv->params.min_rx_wqes = min_rx_wqes;
347
348 if (was_opened)
349 err = mlx5e_open_locked(dev);
350
351 mutex_unlock(&priv->state_lock);
352
353 return err;
354 }
355
356 static void mlx5e_get_channels(struct net_device *dev,
357 struct ethtool_channels *ch)
358 {
359 struct mlx5e_priv *priv = netdev_priv(dev);
360
361 ch->max_combined = mlx5e_get_max_num_channels(priv->mdev);
362 ch->combined_count = priv->params.num_channels;
363 }
364
365 static int mlx5e_set_channels(struct net_device *dev,
366 struct ethtool_channels *ch)
367 {
368 struct mlx5e_priv *priv = netdev_priv(dev);
369 int ncv = mlx5e_get_max_num_channels(priv->mdev);
370 unsigned int count = ch->combined_count;
371 bool was_opened;
372 int err = 0;
373
374 if (!count) {
375 netdev_info(dev, "%s: combined_count=0 not supported\n",
376 __func__);
377 return -EINVAL;
378 }
379 if (ch->rx_count || ch->tx_count) {
380 netdev_info(dev, "%s: separate rx/tx count not supported\n",
381 __func__);
382 return -EINVAL;
383 }
384 if (count > ncv) {
385 netdev_info(dev, "%s: count (%d) > max (%d)\n",
386 __func__, count, ncv);
387 return -EINVAL;
388 }
389
390 if (priv->params.num_channels == count)
391 return 0;
392
393 mutex_lock(&priv->state_lock);
394
395 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
396 if (was_opened)
397 mlx5e_close_locked(dev);
398
399 priv->params.num_channels = count;
400 mlx5e_build_default_indir_rqt(priv->params.indirection_rqt,
401 MLX5E_INDIR_RQT_SIZE, count);
402
403 if (was_opened)
404 err = mlx5e_open_locked(dev);
405
406 mutex_unlock(&priv->state_lock);
407
408 return err;
409 }
410
411 static int mlx5e_get_coalesce(struct net_device *netdev,
412 struct ethtool_coalesce *coal)
413 {
414 struct mlx5e_priv *priv = netdev_priv(netdev);
415
416 if (!MLX5_CAP_GEN(priv->mdev, cq_moderation))
417 return -ENOTSUPP;
418
419 coal->rx_coalesce_usecs = priv->params.rx_cq_moderation_usec;
420 coal->rx_max_coalesced_frames = priv->params.rx_cq_moderation_pkts;
421 coal->tx_coalesce_usecs = priv->params.tx_cq_moderation_usec;
422 coal->tx_max_coalesced_frames = priv->params.tx_cq_moderation_pkts;
423
424 return 0;
425 }
426
427 static int mlx5e_set_coalesce(struct net_device *netdev,
428 struct ethtool_coalesce *coal)
429 {
430 struct mlx5e_priv *priv = netdev_priv(netdev);
431 struct mlx5_core_dev *mdev = priv->mdev;
432 struct mlx5e_channel *c;
433 int tc;
434 int i;
435
436 if (!MLX5_CAP_GEN(mdev, cq_moderation))
437 return -ENOTSUPP;
438
439 mutex_lock(&priv->state_lock);
440 priv->params.tx_cq_moderation_usec = coal->tx_coalesce_usecs;
441 priv->params.tx_cq_moderation_pkts = coal->tx_max_coalesced_frames;
442 priv->params.rx_cq_moderation_usec = coal->rx_coalesce_usecs;
443 priv->params.rx_cq_moderation_pkts = coal->rx_max_coalesced_frames;
444
445 if (!test_bit(MLX5E_STATE_OPENED, &priv->state))
446 goto out;
447
448 for (i = 0; i < priv->params.num_channels; ++i) {
449 c = priv->channel[i];
450
451 for (tc = 0; tc < c->num_tc; tc++) {
452 mlx5_core_modify_cq_moderation(mdev,
453 &c->sq[tc].cq.mcq,
454 coal->tx_coalesce_usecs,
455 coal->tx_max_coalesced_frames);
456 }
457
458 mlx5_core_modify_cq_moderation(mdev, &c->rq.cq.mcq,
459 coal->rx_coalesce_usecs,
460 coal->rx_max_coalesced_frames);
461 }
462
463 out:
464 mutex_unlock(&priv->state_lock);
465 return 0;
466 }
467
468 static u32 ptys2ethtool_supported_link(u32 eth_proto_cap)
469 {
470 int i;
471 u32 supported_modes = 0;
472
473 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
474 if (eth_proto_cap & MLX5E_PROT_MASK(i))
475 supported_modes |= ptys2ethtool_table[i].supported;
476 }
477 return supported_modes;
478 }
479
480 static u32 ptys2ethtool_adver_link(u32 eth_proto_cap)
481 {
482 int i;
483 u32 advertising_modes = 0;
484
485 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
486 if (eth_proto_cap & MLX5E_PROT_MASK(i))
487 advertising_modes |= ptys2ethtool_table[i].advertised;
488 }
489 return advertising_modes;
490 }
491
492 static u32 ptys2ethtool_supported_port(u32 eth_proto_cap)
493 {
494 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
495 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
496 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
497 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
498 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
499 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
500 return SUPPORTED_FIBRE;
501 }
502
503 if (eth_proto_cap & (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4)
504 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
505 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
506 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
507 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX))) {
508 return SUPPORTED_Backplane;
509 }
510 return 0;
511 }
512
513 static void get_speed_duplex(struct net_device *netdev,
514 u32 eth_proto_oper,
515 struct ethtool_cmd *cmd)
516 {
517 int i;
518 u32 speed = SPEED_UNKNOWN;
519 u8 duplex = DUPLEX_UNKNOWN;
520
521 if (!netif_carrier_ok(netdev))
522 goto out;
523
524 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
525 if (eth_proto_oper & MLX5E_PROT_MASK(i)) {
526 speed = ptys2ethtool_table[i].speed;
527 duplex = DUPLEX_FULL;
528 break;
529 }
530 }
531 out:
532 ethtool_cmd_speed_set(cmd, speed);
533 cmd->duplex = duplex;
534 }
535
536 static void get_supported(u32 eth_proto_cap, u32 *supported)
537 {
538 *supported |= ptys2ethtool_supported_port(eth_proto_cap);
539 *supported |= ptys2ethtool_supported_link(eth_proto_cap);
540 *supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
541 }
542
543 static void get_advertising(u32 eth_proto_cap, u8 tx_pause,
544 u8 rx_pause, u32 *advertising)
545 {
546 *advertising |= ptys2ethtool_adver_link(eth_proto_cap);
547 *advertising |= tx_pause ? ADVERTISED_Pause : 0;
548 *advertising |= (tx_pause ^ rx_pause) ? ADVERTISED_Asym_Pause : 0;
549 }
550
551 static u8 get_connector_port(u32 eth_proto)
552 {
553 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_SR)
554 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4)
555 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4)
556 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII))) {
557 return PORT_FIBRE;
558 }
559
560 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4)
561 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR)
562 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4))) {
563 return PORT_DA;
564 }
565
566 if (eth_proto & (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4)
567 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR)
568 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4)
569 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4))) {
570 return PORT_NONE;
571 }
572
573 return PORT_OTHER;
574 }
575
576 static void get_lp_advertising(u32 eth_proto_lp, u32 *lp_advertising)
577 {
578 *lp_advertising = ptys2ethtool_adver_link(eth_proto_lp);
579 }
580
581 static int mlx5e_get_settings(struct net_device *netdev,
582 struct ethtool_cmd *cmd)
583 {
584 struct mlx5e_priv *priv = netdev_priv(netdev);
585 struct mlx5_core_dev *mdev = priv->mdev;
586 u32 out[MLX5_ST_SZ_DW(ptys_reg)];
587 u32 eth_proto_cap;
588 u32 eth_proto_admin;
589 u32 eth_proto_lp;
590 u32 eth_proto_oper;
591 int err;
592
593 err = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1);
594
595 if (err) {
596 netdev_err(netdev, "%s: query port ptys failed: %d\n",
597 __func__, err);
598 goto err_query_ptys;
599 }
600
601 eth_proto_cap = MLX5_GET(ptys_reg, out, eth_proto_capability);
602 eth_proto_admin = MLX5_GET(ptys_reg, out, eth_proto_admin);
603 eth_proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper);
604 eth_proto_lp = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
605
606 cmd->supported = 0;
607 cmd->advertising = 0;
608
609 get_supported(eth_proto_cap, &cmd->supported);
610 get_advertising(eth_proto_admin, 0, 0, &cmd->advertising);
611 get_speed_duplex(netdev, eth_proto_oper, cmd);
612
613 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
614
615 cmd->port = get_connector_port(eth_proto_oper);
616 get_lp_advertising(eth_proto_lp, &cmd->lp_advertising);
617
618 cmd->transceiver = XCVR_INTERNAL;
619
620 err_query_ptys:
621 return err;
622 }
623
624 static u32 mlx5e_ethtool2ptys_adver_link(u32 link_modes)
625 {
626 u32 i, ptys_modes = 0;
627
628 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
629 if (ptys2ethtool_table[i].advertised & link_modes)
630 ptys_modes |= MLX5E_PROT_MASK(i);
631 }
632
633 return ptys_modes;
634 }
635
636 static u32 mlx5e_ethtool2ptys_speed_link(u32 speed)
637 {
638 u32 i, speed_links = 0;
639
640 for (i = 0; i < MLX5E_LINK_MODES_NUMBER; ++i) {
641 if (ptys2ethtool_table[i].speed == speed)
642 speed_links |= MLX5E_PROT_MASK(i);
643 }
644
645 return speed_links;
646 }
647
648 static int mlx5e_set_settings(struct net_device *netdev,
649 struct ethtool_cmd *cmd)
650 {
651 struct mlx5e_priv *priv = netdev_priv(netdev);
652 struct mlx5_core_dev *mdev = priv->mdev;
653 u32 link_modes;
654 u32 speed;
655 u32 eth_proto_cap, eth_proto_admin;
656 enum mlx5_port_status ps;
657 int err;
658
659 speed = ethtool_cmd_speed(cmd);
660
661 link_modes = cmd->autoneg == AUTONEG_ENABLE ?
662 mlx5e_ethtool2ptys_adver_link(cmd->advertising) :
663 mlx5e_ethtool2ptys_speed_link(speed);
664
665 err = mlx5_query_port_proto_cap(mdev, &eth_proto_cap, MLX5_PTYS_EN);
666 if (err) {
667 netdev_err(netdev, "%s: query port eth proto cap failed: %d\n",
668 __func__, err);
669 goto out;
670 }
671
672 link_modes = link_modes & eth_proto_cap;
673 if (!link_modes) {
674 netdev_err(netdev, "%s: Not supported link mode(s) requested",
675 __func__);
676 err = -EINVAL;
677 goto out;
678 }
679
680 err = mlx5_query_port_proto_admin(mdev, &eth_proto_admin, MLX5_PTYS_EN);
681 if (err) {
682 netdev_err(netdev, "%s: query port eth proto admin failed: %d\n",
683 __func__, err);
684 goto out;
685 }
686
687 if (link_modes == eth_proto_admin)
688 goto out;
689
690 mlx5_query_port_admin_status(mdev, &ps);
691 if (ps == MLX5_PORT_UP)
692 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);
693 mlx5_set_port_proto(mdev, link_modes, MLX5_PTYS_EN);
694 if (ps == MLX5_PORT_UP)
695 mlx5_set_port_admin_status(mdev, MLX5_PORT_UP);
696
697 out:
698 return err;
699 }
700
701 static u32 mlx5e_get_rxfh_key_size(struct net_device *netdev)
702 {
703 struct mlx5e_priv *priv = netdev_priv(netdev);
704
705 return sizeof(priv->params.toeplitz_hash_key);
706 }
707
708 static u32 mlx5e_get_rxfh_indir_size(struct net_device *netdev)
709 {
710 return MLX5E_INDIR_RQT_SIZE;
711 }
712
713 static int mlx5e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
714 u8 *hfunc)
715 {
716 struct mlx5e_priv *priv = netdev_priv(netdev);
717
718 if (indir)
719 memcpy(indir, priv->params.indirection_rqt,
720 sizeof(priv->params.indirection_rqt));
721
722 if (key)
723 memcpy(key, priv->params.toeplitz_hash_key,
724 sizeof(priv->params.toeplitz_hash_key));
725
726 if (hfunc)
727 *hfunc = priv->params.rss_hfunc;
728
729 return 0;
730 }
731
732 static void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
733 {
734 struct mlx5_core_dev *mdev = priv->mdev;
735 void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
736 int i;
737
738 MLX5_SET(modify_tir_in, in, bitmask.hash, 1);
739 mlx5e_build_tir_ctx_hash(tirc, priv);
740
741 for (i = 0; i < MLX5E_NUM_TT; i++)
742 if (IS_HASHING_TT(i))
743 mlx5_core_modify_tir(mdev, priv->tirn[i], in, inlen);
744 }
745
746 static int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
747 const u8 *key, const u8 hfunc)
748 {
749 struct mlx5e_priv *priv = netdev_priv(dev);
750 int inlen = MLX5_ST_SZ_BYTES(modify_tir_in);
751 void *in;
752
753 if ((hfunc != ETH_RSS_HASH_NO_CHANGE) &&
754 (hfunc != ETH_RSS_HASH_XOR) &&
755 (hfunc != ETH_RSS_HASH_TOP))
756 return -EINVAL;
757
758 in = mlx5_vzalloc(inlen);
759 if (!in)
760 return -ENOMEM;
761
762 mutex_lock(&priv->state_lock);
763
764 if (indir) {
765 memcpy(priv->params.indirection_rqt, indir,
766 sizeof(priv->params.indirection_rqt));
767 mlx5e_redirect_rqt(priv, MLX5E_INDIRECTION_RQT);
768 }
769
770 if (key)
771 memcpy(priv->params.toeplitz_hash_key, key,
772 sizeof(priv->params.toeplitz_hash_key));
773
774 if (hfunc != ETH_RSS_HASH_NO_CHANGE)
775 priv->params.rss_hfunc = hfunc;
776
777 mlx5e_modify_tirs_hash(priv, in, inlen);
778
779 mutex_unlock(&priv->state_lock);
780
781 kvfree(in);
782
783 return 0;
784 }
785
786 static int mlx5e_get_rxnfc(struct net_device *netdev,
787 struct ethtool_rxnfc *info, u32 *rule_locs)
788 {
789 struct mlx5e_priv *priv = netdev_priv(netdev);
790 int err = 0;
791
792 switch (info->cmd) {
793 case ETHTOOL_GRXRINGS:
794 info->data = priv->params.num_channels;
795 break;
796 default:
797 err = -EOPNOTSUPP;
798 break;
799 }
800
801 return err;
802 }
803
804 static int mlx5e_get_tunable(struct net_device *dev,
805 const struct ethtool_tunable *tuna,
806 void *data)
807 {
808 const struct mlx5e_priv *priv = netdev_priv(dev);
809 int err = 0;
810
811 switch (tuna->id) {
812 case ETHTOOL_TX_COPYBREAK:
813 *(u32 *)data = priv->params.tx_max_inline;
814 break;
815 default:
816 err = -EINVAL;
817 break;
818 }
819
820 return err;
821 }
822
823 static int mlx5e_set_tunable(struct net_device *dev,
824 const struct ethtool_tunable *tuna,
825 const void *data)
826 {
827 struct mlx5e_priv *priv = netdev_priv(dev);
828 struct mlx5_core_dev *mdev = priv->mdev;
829 bool was_opened;
830 u32 val;
831 int err = 0;
832
833 switch (tuna->id) {
834 case ETHTOOL_TX_COPYBREAK:
835 val = *(u32 *)data;
836 if (val > mlx5e_get_max_inline_cap(mdev)) {
837 err = -EINVAL;
838 break;
839 }
840
841 mutex_lock(&priv->state_lock);
842
843 was_opened = test_bit(MLX5E_STATE_OPENED, &priv->state);
844 if (was_opened)
845 mlx5e_close_locked(dev);
846
847 priv->params.tx_max_inline = val;
848
849 if (was_opened)
850 err = mlx5e_open_locked(dev);
851
852 mutex_unlock(&priv->state_lock);
853 break;
854 default:
855 err = -EINVAL;
856 break;
857 }
858
859 return err;
860 }
861
862 static void mlx5e_get_pauseparam(struct net_device *netdev,
863 struct ethtool_pauseparam *pauseparam)
864 {
865 struct mlx5e_priv *priv = netdev_priv(netdev);
866 struct mlx5_core_dev *mdev = priv->mdev;
867 int err;
868
869 err = mlx5_query_port_pause(mdev, &pauseparam->rx_pause,
870 &pauseparam->tx_pause);
871 if (err) {
872 netdev_err(netdev, "%s: mlx5_query_port_pause failed:0x%x\n",
873 __func__, err);
874 }
875 }
876
877 static int mlx5e_set_pauseparam(struct net_device *netdev,
878 struct ethtool_pauseparam *pauseparam)
879 {
880 struct mlx5e_priv *priv = netdev_priv(netdev);
881 struct mlx5_core_dev *mdev = priv->mdev;
882 int err;
883
884 if (pauseparam->autoneg)
885 return -EINVAL;
886
887 err = mlx5_set_port_pause(mdev,
888 pauseparam->rx_pause ? 1 : 0,
889 pauseparam->tx_pause ? 1 : 0);
890 if (err) {
891 netdev_err(netdev, "%s: mlx5_set_port_pause failed:0x%x\n",
892 __func__, err);
893 }
894
895 return err;
896 }
897
898 static int mlx5e_get_ts_info(struct net_device *dev,
899 struct ethtool_ts_info *info)
900 {
901 struct mlx5e_priv *priv = netdev_priv(dev);
902 int ret;
903
904 ret = ethtool_op_get_ts_info(dev, info);
905 if (ret)
906 return ret;
907
908 info->phc_index = priv->tstamp.ptp ?
909 ptp_clock_index(priv->tstamp.ptp) : -1;
910
911 if (!MLX5_CAP_GEN(priv->mdev, device_frequency_khz))
912 return 0;
913
914 info->so_timestamping |= SOF_TIMESTAMPING_TX_HARDWARE |
915 SOF_TIMESTAMPING_RX_HARDWARE |
916 SOF_TIMESTAMPING_RAW_HARDWARE;
917
918 info->tx_types = (BIT(1) << HWTSTAMP_TX_OFF) |
919 (BIT(1) << HWTSTAMP_TX_ON);
920
921 info->rx_filters = (BIT(1) << HWTSTAMP_FILTER_NONE) |
922 (BIT(1) << HWTSTAMP_FILTER_ALL);
923
924 return 0;
925 }
926
927 static __u32 mlx5e_get_wol_supported(struct mlx5_core_dev *mdev)
928 {
929 __u32 ret = 0;
930
931 if (MLX5_CAP_GEN(mdev, wol_g))
932 ret |= WAKE_MAGIC;
933
934 if (MLX5_CAP_GEN(mdev, wol_s))
935 ret |= WAKE_MAGICSECURE;
936
937 if (MLX5_CAP_GEN(mdev, wol_a))
938 ret |= WAKE_ARP;
939
940 if (MLX5_CAP_GEN(mdev, wol_b))
941 ret |= WAKE_BCAST;
942
943 if (MLX5_CAP_GEN(mdev, wol_m))
944 ret |= WAKE_MCAST;
945
946 if (MLX5_CAP_GEN(mdev, wol_u))
947 ret |= WAKE_UCAST;
948
949 if (MLX5_CAP_GEN(mdev, wol_p))
950 ret |= WAKE_PHY;
951
952 return ret;
953 }
954
955 static __u32 mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode)
956 {
957 __u32 ret = 0;
958
959 if (mode & MLX5_WOL_MAGIC)
960 ret |= WAKE_MAGIC;
961
962 if (mode & MLX5_WOL_SECURED_MAGIC)
963 ret |= WAKE_MAGICSECURE;
964
965 if (mode & MLX5_WOL_ARP)
966 ret |= WAKE_ARP;
967
968 if (mode & MLX5_WOL_BROADCAST)
969 ret |= WAKE_BCAST;
970
971 if (mode & MLX5_WOL_MULTICAST)
972 ret |= WAKE_MCAST;
973
974 if (mode & MLX5_WOL_UNICAST)
975 ret |= WAKE_UCAST;
976
977 if (mode & MLX5_WOL_PHY_ACTIVITY)
978 ret |= WAKE_PHY;
979
980 return ret;
981 }
982
983 static u8 mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode)
984 {
985 u8 ret = 0;
986
987 if (mode & WAKE_MAGIC)
988 ret |= MLX5_WOL_MAGIC;
989
990 if (mode & WAKE_MAGICSECURE)
991 ret |= MLX5_WOL_SECURED_MAGIC;
992
993 if (mode & WAKE_ARP)
994 ret |= MLX5_WOL_ARP;
995
996 if (mode & WAKE_BCAST)
997 ret |= MLX5_WOL_BROADCAST;
998
999 if (mode & WAKE_MCAST)
1000 ret |= MLX5_WOL_MULTICAST;
1001
1002 if (mode & WAKE_UCAST)
1003 ret |= MLX5_WOL_UNICAST;
1004
1005 if (mode & WAKE_PHY)
1006 ret |= MLX5_WOL_PHY_ACTIVITY;
1007
1008 return ret;
1009 }
1010
1011 static void mlx5e_get_wol(struct net_device *netdev,
1012 struct ethtool_wolinfo *wol)
1013 {
1014 struct mlx5e_priv *priv = netdev_priv(netdev);
1015 struct mlx5_core_dev *mdev = priv->mdev;
1016 u8 mlx5_wol_mode;
1017 int err;
1018
1019 memset(wol, 0, sizeof(*wol));
1020
1021 wol->supported = mlx5e_get_wol_supported(mdev);
1022 if (!wol->supported)
1023 return;
1024
1025 err = mlx5_query_port_wol(mdev, &mlx5_wol_mode);
1026 if (err)
1027 return;
1028
1029 wol->wolopts = mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode);
1030 }
1031
1032 static int mlx5e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1033 {
1034 struct mlx5e_priv *priv = netdev_priv(netdev);
1035 struct mlx5_core_dev *mdev = priv->mdev;
1036 __u32 wol_supported = mlx5e_get_wol_supported(mdev);
1037 u32 mlx5_wol_mode;
1038
1039 if (!wol_supported)
1040 return -ENOTSUPP;
1041
1042 if (wol->wolopts & ~wol_supported)
1043 return -EINVAL;
1044
1045 mlx5_wol_mode = mlx5e_refomrat_wol_mode_linux_to_mlx5(wol->wolopts);
1046
1047 return mlx5_set_port_wol(mdev, mlx5_wol_mode);
1048 }
1049
1050 const struct ethtool_ops mlx5e_ethtool_ops = {
1051 .get_drvinfo = mlx5e_get_drvinfo,
1052 .get_link = ethtool_op_get_link,
1053 .get_strings = mlx5e_get_strings,
1054 .get_sset_count = mlx5e_get_sset_count,
1055 .get_ethtool_stats = mlx5e_get_ethtool_stats,
1056 .get_ringparam = mlx5e_get_ringparam,
1057 .set_ringparam = mlx5e_set_ringparam,
1058 .get_channels = mlx5e_get_channels,
1059 .set_channels = mlx5e_set_channels,
1060 .get_coalesce = mlx5e_get_coalesce,
1061 .set_coalesce = mlx5e_set_coalesce,
1062 .get_settings = mlx5e_get_settings,
1063 .set_settings = mlx5e_set_settings,
1064 .get_rxfh_key_size = mlx5e_get_rxfh_key_size,
1065 .get_rxfh_indir_size = mlx5e_get_rxfh_indir_size,
1066 .get_rxfh = mlx5e_get_rxfh,
1067 .set_rxfh = mlx5e_set_rxfh,
1068 .get_rxnfc = mlx5e_get_rxnfc,
1069 .get_tunable = mlx5e_get_tunable,
1070 .set_tunable = mlx5e_set_tunable,
1071 .get_pauseparam = mlx5e_get_pauseparam,
1072 .set_pauseparam = mlx5e_set_pauseparam,
1073 .get_ts_info = mlx5e_get_ts_info,
1074 .get_wol = mlx5e_get_wol,
1075 .set_wol = mlx5e_set_wol,
1076 };
Linux kernel - Deliverables
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