2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 static void mlx5e_get_drvinfo(struct net_device
*dev
,
36 struct ethtool_drvinfo
*drvinfo
)
38 struct mlx5e_priv
*priv
= netdev_priv(dev
);
39 struct mlx5_core_dev
*mdev
= priv
->mdev
;
41 strlcpy(drvinfo
->driver
, DRIVER_NAME
, sizeof(drvinfo
->driver
));
42 strlcpy(drvinfo
->version
, DRIVER_VERSION
" (" DRIVER_RELDATE
")",
43 sizeof(drvinfo
->version
));
44 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
),
46 fw_rev_maj(mdev
), fw_rev_min(mdev
), fw_rev_sub(mdev
));
47 strlcpy(drvinfo
->bus_info
, pci_name(mdev
->pdev
),
48 sizeof(drvinfo
->bus_info
));
55 } ptys2ethtool_table
[MLX5E_LINK_MODES_NUMBER
] = {
56 [MLX5E_1000BASE_CX_SGMII
] = {
57 .supported
= SUPPORTED_1000baseKX_Full
,
58 .advertised
= ADVERTISED_1000baseKX_Full
,
61 [MLX5E_1000BASE_KX
] = {
62 .supported
= SUPPORTED_1000baseKX_Full
,
63 .advertised
= ADVERTISED_1000baseKX_Full
,
66 [MLX5E_10GBASE_CX4
] = {
67 .supported
= SUPPORTED_10000baseKX4_Full
,
68 .advertised
= ADVERTISED_10000baseKX4_Full
,
71 [MLX5E_10GBASE_KX4
] = {
72 .supported
= SUPPORTED_10000baseKX4_Full
,
73 .advertised
= ADVERTISED_10000baseKX4_Full
,
76 [MLX5E_10GBASE_KR
] = {
77 .supported
= SUPPORTED_10000baseKR_Full
,
78 .advertised
= ADVERTISED_10000baseKR_Full
,
81 [MLX5E_20GBASE_KR2
] = {
82 .supported
= SUPPORTED_20000baseKR2_Full
,
83 .advertised
= ADVERTISED_20000baseKR2_Full
,
86 [MLX5E_40GBASE_CR4
] = {
87 .supported
= SUPPORTED_40000baseCR4_Full
,
88 .advertised
= ADVERTISED_40000baseCR4_Full
,
91 [MLX5E_40GBASE_KR4
] = {
92 .supported
= SUPPORTED_40000baseKR4_Full
,
93 .advertised
= ADVERTISED_40000baseKR4_Full
,
96 [MLX5E_56GBASE_R4
] = {
97 .supported
= SUPPORTED_56000baseKR4_Full
,
98 .advertised
= ADVERTISED_56000baseKR4_Full
,
101 [MLX5E_10GBASE_CR
] = {
102 .supported
= SUPPORTED_10000baseKR_Full
,
103 .advertised
= ADVERTISED_10000baseKR_Full
,
106 [MLX5E_10GBASE_SR
] = {
107 .supported
= SUPPORTED_10000baseKR_Full
,
108 .advertised
= ADVERTISED_10000baseKR_Full
,
111 [MLX5E_10GBASE_ER
] = {
112 .supported
= SUPPORTED_10000baseKR_Full
,
113 .advertised
= ADVERTISED_10000baseKR_Full
,
116 [MLX5E_40GBASE_SR4
] = {
117 .supported
= SUPPORTED_40000baseSR4_Full
,
118 .advertised
= ADVERTISED_40000baseSR4_Full
,
121 [MLX5E_40GBASE_LR4
] = {
122 .supported
= SUPPORTED_40000baseLR4_Full
,
123 .advertised
= ADVERTISED_40000baseLR4_Full
,
126 [MLX5E_100GBASE_CR4
] = {
129 [MLX5E_100GBASE_SR4
] = {
132 [MLX5E_100GBASE_KR4
] = {
135 [MLX5E_100GBASE_LR4
] = {
138 [MLX5E_100BASE_TX
] = {
141 [MLX5E_100BASE_T
] = {
142 .supported
= SUPPORTED_100baseT_Full
,
143 .advertised
= ADVERTISED_100baseT_Full
,
146 [MLX5E_10GBASE_T
] = {
147 .supported
= SUPPORTED_10000baseT_Full
,
148 .advertised
= ADVERTISED_10000baseT_Full
,
151 [MLX5E_25GBASE_CR
] = {
154 [MLX5E_25GBASE_KR
] = {
157 [MLX5E_25GBASE_SR
] = {
160 [MLX5E_50GBASE_CR2
] = {
163 [MLX5E_50GBASE_KR2
] = {
168 static int mlx5e_get_sset_count(struct net_device
*dev
, int sset
)
170 struct mlx5e_priv
*priv
= netdev_priv(dev
);
174 return NUM_VPORT_COUNTERS
+ NUM_PPORT_COUNTERS
+
175 priv
->params
.num_channels
* NUM_RQ_STATS
+
176 priv
->params
.num_channels
* priv
->params
.num_tc
*
184 static void mlx5e_get_strings(struct net_device
*dev
,
185 uint32_t stringset
, uint8_t *data
)
187 int i
, j
, tc
, idx
= 0;
188 struct mlx5e_priv
*priv
= netdev_priv(dev
);
191 case ETH_SS_PRIV_FLAGS
:
199 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
200 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
204 for (i
= 0; i
< NUM_PPORT_COUNTERS
; i
++)
205 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
208 /* per channel counters */
209 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
210 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
211 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
212 "rx%d_%s", i
, rq_stats_strings
[j
]);
214 for (tc
= 0; tc
< priv
->params
.num_tc
; tc
++)
215 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
216 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
218 (idx
++) * ETH_GSTRING_LEN
,
220 priv
->channeltc_to_txq_map
[i
][tc
],
221 sq_stats_strings
[j
]);
226 static void mlx5e_get_ethtool_stats(struct net_device
*dev
,
227 struct ethtool_stats
*stats
, u64
*data
)
229 struct mlx5e_priv
*priv
= netdev_priv(dev
);
230 int i
, j
, tc
, idx
= 0;
235 mutex_lock(&priv
->state_lock
);
236 if (test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
237 mlx5e_update_stats(priv
);
238 mutex_unlock(&priv
->state_lock
);
240 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
241 data
[idx
++] = ((u64
*)&priv
->stats
.vport
)[i
];
243 for (i
= 0; i
< NUM_PPORT_COUNTERS
; i
++)
244 data
[idx
++] = be64_to_cpu(((__be64
*)&priv
->stats
.pport
)[i
]);
246 /* per channel counters */
247 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
248 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
249 data
[idx
++] = !test_bit(MLX5E_STATE_OPENED
,
251 ((u64
*)&priv
->channel
[i
]->rq
.stats
)[j
];
253 for (tc
= 0; tc
< priv
->params
.num_tc
; tc
++)
254 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
255 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
256 data
[idx
++] = !test_bit(MLX5E_STATE_OPENED
,
258 ((u64
*)&priv
->channel
[i
]->sq
[tc
].stats
)[j
];
261 static void mlx5e_get_ringparam(struct net_device
*dev
,
262 struct ethtool_ringparam
*param
)
264 struct mlx5e_priv
*priv
= netdev_priv(dev
);
266 param
->rx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
;
267 param
->tx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
;
268 param
->rx_pending
= 1 << priv
->params
.log_rq_size
;
269 param
->tx_pending
= 1 << priv
->params
.log_sq_size
;
272 static int mlx5e_set_ringparam(struct net_device
*dev
,
273 struct ethtool_ringparam
*param
)
275 struct mlx5e_priv
*priv
= netdev_priv(dev
);
282 if (param
->rx_jumbo_pending
) {
283 netdev_info(dev
, "%s: rx_jumbo_pending not supported\n",
287 if (param
->rx_mini_pending
) {
288 netdev_info(dev
, "%s: rx_mini_pending not supported\n",
292 if (param
->rx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
)) {
293 netdev_info(dev
, "%s: rx_pending (%d) < min (%d)\n",
294 __func__
, param
->rx_pending
,
295 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
);
298 if (param
->rx_pending
> (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
)) {
299 netdev_info(dev
, "%s: rx_pending (%d) > max (%d)\n",
300 __func__
, param
->rx_pending
,
301 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
);
304 if (param
->tx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
)) {
305 netdev_info(dev
, "%s: tx_pending (%d) < min (%d)\n",
306 __func__
, param
->tx_pending
,
307 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
);
310 if (param
->tx_pending
> (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
)) {
311 netdev_info(dev
, "%s: tx_pending (%d) > max (%d)\n",
312 __func__
, param
->tx_pending
,
313 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
);
317 log_rq_size
= order_base_2(param
->rx_pending
);
318 log_sq_size
= order_base_2(param
->tx_pending
);
319 min_rx_wqes
= min_t(u16
, param
->rx_pending
- 1,
320 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES
);
322 if (log_rq_size
== priv
->params
.log_rq_size
&&
323 log_sq_size
== priv
->params
.log_sq_size
&&
324 min_rx_wqes
== priv
->params
.min_rx_wqes
)
327 mutex_lock(&priv
->state_lock
);
329 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
331 mlx5e_close_locked(dev
);
333 priv
->params
.log_rq_size
= log_rq_size
;
334 priv
->params
.log_sq_size
= log_sq_size
;
335 priv
->params
.min_rx_wqes
= min_rx_wqes
;
338 err
= mlx5e_open_locked(dev
);
340 mutex_unlock(&priv
->state_lock
);
345 static void mlx5e_get_channels(struct net_device
*dev
,
346 struct ethtool_channels
*ch
)
348 struct mlx5e_priv
*priv
= netdev_priv(dev
);
350 ch
->max_combined
= mlx5e_get_max_num_channels(priv
->mdev
);
351 ch
->combined_count
= priv
->params
.num_channels
;
354 static int mlx5e_set_channels(struct net_device
*dev
,
355 struct ethtool_channels
*ch
)
357 struct mlx5e_priv
*priv
= netdev_priv(dev
);
358 int ncv
= mlx5e_get_max_num_channels(priv
->mdev
);
359 unsigned int count
= ch
->combined_count
;
364 netdev_info(dev
, "%s: combined_count=0 not supported\n",
368 if (ch
->rx_count
|| ch
->tx_count
) {
369 netdev_info(dev
, "%s: separate rx/tx count not supported\n",
374 netdev_info(dev
, "%s: count (%d) > max (%d)\n",
375 __func__
, count
, ncv
);
379 if (priv
->params
.num_channels
== count
)
382 mutex_lock(&priv
->state_lock
);
384 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
386 mlx5e_close_locked(dev
);
388 priv
->params
.num_channels
= count
;
389 mlx5e_build_default_indir_rqt(priv
->params
.indirection_rqt
,
390 MLX5E_INDIR_RQT_SIZE
, count
);
393 err
= mlx5e_open_locked(dev
);
395 mutex_unlock(&priv
->state_lock
);
400 static int mlx5e_get_coalesce(struct net_device
*netdev
,
401 struct ethtool_coalesce
*coal
)
403 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
405 if (!MLX5_CAP_GEN(priv
->mdev
, cq_moderation
))
408 coal
->rx_coalesce_usecs
= priv
->params
.rx_cq_moderation_usec
;
409 coal
->rx_max_coalesced_frames
= priv
->params
.rx_cq_moderation_pkts
;
410 coal
->tx_coalesce_usecs
= priv
->params
.tx_cq_moderation_usec
;
411 coal
->tx_max_coalesced_frames
= priv
->params
.tx_cq_moderation_pkts
;
416 static int mlx5e_set_coalesce(struct net_device
*netdev
,
417 struct ethtool_coalesce
*coal
)
419 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
420 struct mlx5_core_dev
*mdev
= priv
->mdev
;
421 struct mlx5e_channel
*c
;
425 if (!MLX5_CAP_GEN(mdev
, cq_moderation
))
428 mutex_lock(&priv
->state_lock
);
429 priv
->params
.tx_cq_moderation_usec
= coal
->tx_coalesce_usecs
;
430 priv
->params
.tx_cq_moderation_pkts
= coal
->tx_max_coalesced_frames
;
431 priv
->params
.rx_cq_moderation_usec
= coal
->rx_coalesce_usecs
;
432 priv
->params
.rx_cq_moderation_pkts
= coal
->rx_max_coalesced_frames
;
434 if (!test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
437 for (i
= 0; i
< priv
->params
.num_channels
; ++i
) {
438 c
= priv
->channel
[i
];
440 for (tc
= 0; tc
< c
->num_tc
; tc
++) {
441 mlx5_core_modify_cq_moderation(mdev
,
443 coal
->tx_coalesce_usecs
,
444 coal
->tx_max_coalesced_frames
);
447 mlx5_core_modify_cq_moderation(mdev
, &c
->rq
.cq
.mcq
,
448 coal
->rx_coalesce_usecs
,
449 coal
->rx_max_coalesced_frames
);
453 mutex_unlock(&priv
->state_lock
);
457 static u32
ptys2ethtool_supported_link(u32 eth_proto_cap
)
460 u32 supported_modes
= 0;
462 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
463 if (eth_proto_cap
& MLX5E_PROT_MASK(i
))
464 supported_modes
|= ptys2ethtool_table
[i
].supported
;
466 return supported_modes
;
469 static u32
ptys2ethtool_adver_link(u32 eth_proto_cap
)
472 u32 advertising_modes
= 0;
474 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
475 if (eth_proto_cap
& MLX5E_PROT_MASK(i
))
476 advertising_modes
|= ptys2ethtool_table
[i
].advertised
;
478 return advertising_modes
;
481 static u32
ptys2ethtool_supported_port(u32 eth_proto_cap
)
483 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
484 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
485 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
486 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
487 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
488 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
489 return SUPPORTED_FIBRE
;
492 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
)
493 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
494 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
495 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
496 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX
))) {
497 return SUPPORTED_Backplane
;
502 static void get_speed_duplex(struct net_device
*netdev
,
504 struct ethtool_cmd
*cmd
)
507 u32 speed
= SPEED_UNKNOWN
;
508 u8 duplex
= DUPLEX_UNKNOWN
;
510 if (!netif_carrier_ok(netdev
))
513 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
514 if (eth_proto_oper
& MLX5E_PROT_MASK(i
)) {
515 speed
= ptys2ethtool_table
[i
].speed
;
516 duplex
= DUPLEX_FULL
;
521 ethtool_cmd_speed_set(cmd
, speed
);
522 cmd
->duplex
= duplex
;
525 static void get_supported(u32 eth_proto_cap
, u32
*supported
)
527 *supported
|= ptys2ethtool_supported_port(eth_proto_cap
);
528 *supported
|= ptys2ethtool_supported_link(eth_proto_cap
);
529 *supported
|= SUPPORTED_Pause
| SUPPORTED_Asym_Pause
;
532 static void get_advertising(u32 eth_proto_cap
, u8 tx_pause
,
533 u8 rx_pause
, u32
*advertising
)
535 *advertising
|= ptys2ethtool_adver_link(eth_proto_cap
);
536 *advertising
|= tx_pause
? ADVERTISED_Pause
: 0;
537 *advertising
|= (tx_pause
^ rx_pause
) ? ADVERTISED_Asym_Pause
: 0;
540 static u8
get_connector_port(u32 eth_proto
)
542 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
543 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
544 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
545 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
549 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
550 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
551 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4
))) {
555 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
556 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
557 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
558 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
))) {
565 static void get_lp_advertising(u32 eth_proto_lp
, u32
*lp_advertising
)
567 *lp_advertising
= ptys2ethtool_adver_link(eth_proto_lp
);
570 static int mlx5e_get_settings(struct net_device
*netdev
,
571 struct ethtool_cmd
*cmd
)
573 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
574 struct mlx5_core_dev
*mdev
= priv
->mdev
;
575 u32 out
[MLX5_ST_SZ_DW(ptys_reg
)];
582 err
= mlx5_query_port_ptys(mdev
, out
, sizeof(out
), MLX5_PTYS_EN
, 1);
585 netdev_err(netdev
, "%s: query port ptys failed: %d\n",
590 eth_proto_cap
= MLX5_GET(ptys_reg
, out
, eth_proto_capability
);
591 eth_proto_admin
= MLX5_GET(ptys_reg
, out
, eth_proto_admin
);
592 eth_proto_oper
= MLX5_GET(ptys_reg
, out
, eth_proto_oper
);
593 eth_proto_lp
= MLX5_GET(ptys_reg
, out
, eth_proto_lp_advertise
);
596 cmd
->advertising
= 0;
598 get_supported(eth_proto_cap
, &cmd
->supported
);
599 get_advertising(eth_proto_admin
, 0, 0, &cmd
->advertising
);
600 get_speed_duplex(netdev
, eth_proto_oper
, cmd
);
602 eth_proto_oper
= eth_proto_oper
? eth_proto_oper
: eth_proto_cap
;
604 cmd
->port
= get_connector_port(eth_proto_oper
);
605 get_lp_advertising(eth_proto_lp
, &cmd
->lp_advertising
);
607 cmd
->transceiver
= XCVR_INTERNAL
;
613 static u32
mlx5e_ethtool2ptys_adver_link(u32 link_modes
)
615 u32 i
, ptys_modes
= 0;
617 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
618 if (ptys2ethtool_table
[i
].advertised
& link_modes
)
619 ptys_modes
|= MLX5E_PROT_MASK(i
);
625 static u32
mlx5e_ethtool2ptys_speed_link(u32 speed
)
627 u32 i
, speed_links
= 0;
629 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
630 if (ptys2ethtool_table
[i
].speed
== speed
)
631 speed_links
|= MLX5E_PROT_MASK(i
);
637 static int mlx5e_set_settings(struct net_device
*netdev
,
638 struct ethtool_cmd
*cmd
)
640 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
641 struct mlx5_core_dev
*mdev
= priv
->mdev
;
644 u32 eth_proto_cap
, eth_proto_admin
;
645 enum mlx5_port_status ps
;
648 speed
= ethtool_cmd_speed(cmd
);
650 link_modes
= cmd
->autoneg
== AUTONEG_ENABLE
?
651 mlx5e_ethtool2ptys_adver_link(cmd
->advertising
) :
652 mlx5e_ethtool2ptys_speed_link(speed
);
654 err
= mlx5_query_port_proto_cap(mdev
, ð_proto_cap
, MLX5_PTYS_EN
);
656 netdev_err(netdev
, "%s: query port eth proto cap failed: %d\n",
661 link_modes
= link_modes
& eth_proto_cap
;
663 netdev_err(netdev
, "%s: Not supported link mode(s) requested",
669 err
= mlx5_query_port_proto_admin(mdev
, ð_proto_admin
, MLX5_PTYS_EN
);
671 netdev_err(netdev
, "%s: query port eth proto admin failed: %d\n",
676 if (link_modes
== eth_proto_admin
)
679 mlx5_query_port_admin_status(mdev
, &ps
);
680 if (ps
== MLX5_PORT_UP
)
681 mlx5_set_port_admin_status(mdev
, MLX5_PORT_DOWN
);
682 mlx5_set_port_proto(mdev
, link_modes
, MLX5_PTYS_EN
);
683 if (ps
== MLX5_PORT_UP
)
684 mlx5_set_port_admin_status(mdev
, MLX5_PORT_UP
);
690 static u32
mlx5e_get_rxfh_key_size(struct net_device
*netdev
)
692 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
694 return sizeof(priv
->params
.toeplitz_hash_key
);
697 static u32
mlx5e_get_rxfh_indir_size(struct net_device
*netdev
)
699 return MLX5E_INDIR_RQT_SIZE
;
702 static int mlx5e_get_rxfh(struct net_device
*netdev
, u32
*indir
, u8
*key
,
705 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
708 memcpy(indir
, priv
->params
.indirection_rqt
,
709 sizeof(priv
->params
.indirection_rqt
));
712 memcpy(key
, priv
->params
.toeplitz_hash_key
,
713 sizeof(priv
->params
.toeplitz_hash_key
));
716 *hfunc
= priv
->params
.rss_hfunc
;
721 static void mlx5e_modify_tirs_hash(struct mlx5e_priv
*priv
, void *in
, int inlen
)
723 struct mlx5_core_dev
*mdev
= priv
->mdev
;
724 void *tirc
= MLX5_ADDR_OF(modify_tir_in
, in
, ctx
);
727 MLX5_SET(modify_tir_in
, in
, bitmask
.hash
, 1);
728 mlx5e_build_tir_ctx_hash(tirc
, priv
);
730 for (i
= 0; i
< MLX5E_NUM_TT
; i
++)
731 if (IS_HASHING_TT(i
))
732 mlx5_core_modify_tir(mdev
, priv
->tirn
[i
], in
, inlen
);
735 static int mlx5e_set_rxfh(struct net_device
*dev
, const u32
*indir
,
736 const u8
*key
, const u8 hfunc
)
738 struct mlx5e_priv
*priv
= netdev_priv(dev
);
739 int inlen
= MLX5_ST_SZ_BYTES(modify_tir_in
);
742 if ((hfunc
!= ETH_RSS_HASH_NO_CHANGE
) &&
743 (hfunc
!= ETH_RSS_HASH_XOR
) &&
744 (hfunc
!= ETH_RSS_HASH_TOP
))
747 in
= mlx5_vzalloc(inlen
);
751 mutex_lock(&priv
->state_lock
);
754 memcpy(priv
->params
.indirection_rqt
, indir
,
755 sizeof(priv
->params
.indirection_rqt
));
756 mlx5e_redirect_rqt(priv
, MLX5E_INDIRECTION_RQT
);
760 memcpy(priv
->params
.toeplitz_hash_key
, key
,
761 sizeof(priv
->params
.toeplitz_hash_key
));
763 if (hfunc
!= ETH_RSS_HASH_NO_CHANGE
)
764 priv
->params
.rss_hfunc
= hfunc
;
766 mlx5e_modify_tirs_hash(priv
, in
, inlen
);
768 mutex_unlock(&priv
->state_lock
);
775 static int mlx5e_get_rxnfc(struct net_device
*netdev
,
776 struct ethtool_rxnfc
*info
, u32
*rule_locs
)
778 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
782 case ETHTOOL_GRXRINGS
:
783 info
->data
= priv
->params
.num_channels
;
793 static int mlx5e_get_tunable(struct net_device
*dev
,
794 const struct ethtool_tunable
*tuna
,
797 const struct mlx5e_priv
*priv
= netdev_priv(dev
);
801 case ETHTOOL_TX_COPYBREAK
:
802 *(u32
*)data
= priv
->params
.tx_max_inline
;
812 static int mlx5e_set_tunable(struct net_device
*dev
,
813 const struct ethtool_tunable
*tuna
,
816 struct mlx5e_priv
*priv
= netdev_priv(dev
);
817 struct mlx5_core_dev
*mdev
= priv
->mdev
;
823 case ETHTOOL_TX_COPYBREAK
:
825 if (val
> mlx5e_get_max_inline_cap(mdev
)) {
830 mutex_lock(&priv
->state_lock
);
832 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
834 mlx5e_close_locked(dev
);
836 priv
->params
.tx_max_inline
= val
;
839 err
= mlx5e_open_locked(dev
);
841 mutex_unlock(&priv
->state_lock
);
851 static void mlx5e_get_pauseparam(struct net_device
*netdev
,
852 struct ethtool_pauseparam
*pauseparam
)
854 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
855 struct mlx5_core_dev
*mdev
= priv
->mdev
;
858 err
= mlx5_query_port_pause(mdev
, &pauseparam
->rx_pause
,
859 &pauseparam
->tx_pause
);
861 netdev_err(netdev
, "%s: mlx5_query_port_pause failed:0x%x\n",
866 static int mlx5e_set_pauseparam(struct net_device
*netdev
,
867 struct ethtool_pauseparam
*pauseparam
)
869 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
870 struct mlx5_core_dev
*mdev
= priv
->mdev
;
873 if (pauseparam
->autoneg
)
876 err
= mlx5_set_port_pause(mdev
,
877 pauseparam
->rx_pause
? 1 : 0,
878 pauseparam
->tx_pause
? 1 : 0);
880 netdev_err(netdev
, "%s: mlx5_set_port_pause failed:0x%x\n",
887 static int mlx5e_get_ts_info(struct net_device
*dev
,
888 struct ethtool_ts_info
*info
)
890 struct mlx5e_priv
*priv
= netdev_priv(dev
);
893 ret
= ethtool_op_get_ts_info(dev
, info
);
897 info
->phc_index
= priv
->tstamp
.ptp
?
898 ptp_clock_index(priv
->tstamp
.ptp
) : -1;
900 if (!MLX5_CAP_GEN(priv
->mdev
, device_frequency_khz
))
903 info
->so_timestamping
|= SOF_TIMESTAMPING_TX_HARDWARE
|
904 SOF_TIMESTAMPING_RX_HARDWARE
|
905 SOF_TIMESTAMPING_RAW_HARDWARE
;
907 info
->tx_types
= (BIT(1) << HWTSTAMP_TX_OFF
) |
908 (BIT(1) << HWTSTAMP_TX_ON
);
910 info
->rx_filters
= (BIT(1) << HWTSTAMP_FILTER_NONE
) |
911 (BIT(1) << HWTSTAMP_FILTER_ALL
);
916 static __u32
mlx5e_get_wol_supported(struct mlx5_core_dev
*mdev
)
920 if (MLX5_CAP_GEN(mdev
, wol_g
))
923 if (MLX5_CAP_GEN(mdev
, wol_s
))
924 ret
|= WAKE_MAGICSECURE
;
926 if (MLX5_CAP_GEN(mdev
, wol_a
))
929 if (MLX5_CAP_GEN(mdev
, wol_b
))
932 if (MLX5_CAP_GEN(mdev
, wol_m
))
935 if (MLX5_CAP_GEN(mdev
, wol_u
))
938 if (MLX5_CAP_GEN(mdev
, wol_p
))
944 static __u32
mlx5e_refomrat_wol_mode_mlx5_to_linux(u8 mode
)
948 if (mode
& MLX5_WOL_MAGIC
)
951 if (mode
& MLX5_WOL_SECURED_MAGIC
)
952 ret
|= WAKE_MAGICSECURE
;
954 if (mode
& MLX5_WOL_ARP
)
957 if (mode
& MLX5_WOL_BROADCAST
)
960 if (mode
& MLX5_WOL_MULTICAST
)
963 if (mode
& MLX5_WOL_UNICAST
)
966 if (mode
& MLX5_WOL_PHY_ACTIVITY
)
972 static u8
mlx5e_refomrat_wol_mode_linux_to_mlx5(__u32 mode
)
976 if (mode
& WAKE_MAGIC
)
977 ret
|= MLX5_WOL_MAGIC
;
979 if (mode
& WAKE_MAGICSECURE
)
980 ret
|= MLX5_WOL_SECURED_MAGIC
;
985 if (mode
& WAKE_BCAST
)
986 ret
|= MLX5_WOL_BROADCAST
;
988 if (mode
& WAKE_MCAST
)
989 ret
|= MLX5_WOL_MULTICAST
;
991 if (mode
& WAKE_UCAST
)
992 ret
|= MLX5_WOL_UNICAST
;
995 ret
|= MLX5_WOL_PHY_ACTIVITY
;
1000 static void mlx5e_get_wol(struct net_device
*netdev
,
1001 struct ethtool_wolinfo
*wol
)
1003 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1004 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1008 memset(wol
, 0, sizeof(*wol
));
1010 wol
->supported
= mlx5e_get_wol_supported(mdev
);
1011 if (!wol
->supported
)
1014 err
= mlx5_query_port_wol(mdev
, &mlx5_wol_mode
);
1018 wol
->wolopts
= mlx5e_refomrat_wol_mode_mlx5_to_linux(mlx5_wol_mode
);
1021 static int mlx5e_set_wol(struct net_device
*netdev
, struct ethtool_wolinfo
*wol
)
1023 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
1024 struct mlx5_core_dev
*mdev
= priv
->mdev
;
1025 __u32 wol_supported
= mlx5e_get_wol_supported(mdev
);
1031 if (wol
->wolopts
& ~wol_supported
)
1034 mlx5_wol_mode
= mlx5e_refomrat_wol_mode_linux_to_mlx5(wol
->wolopts
);
1036 return mlx5_set_port_wol(mdev
, mlx5_wol_mode
);
1039 const struct ethtool_ops mlx5e_ethtool_ops
= {
1040 .get_drvinfo
= mlx5e_get_drvinfo
,
1041 .get_link
= ethtool_op_get_link
,
1042 .get_strings
= mlx5e_get_strings
,
1043 .get_sset_count
= mlx5e_get_sset_count
,
1044 .get_ethtool_stats
= mlx5e_get_ethtool_stats
,
1045 .get_ringparam
= mlx5e_get_ringparam
,
1046 .set_ringparam
= mlx5e_set_ringparam
,
1047 .get_channels
= mlx5e_get_channels
,
1048 .set_channels
= mlx5e_set_channels
,
1049 .get_coalesce
= mlx5e_get_coalesce
,
1050 .set_coalesce
= mlx5e_set_coalesce
,
1051 .get_settings
= mlx5e_get_settings
,
1052 .set_settings
= mlx5e_set_settings
,
1053 .get_rxfh_key_size
= mlx5e_get_rxfh_key_size
,
1054 .get_rxfh_indir_size
= mlx5e_get_rxfh_indir_size
,
1055 .get_rxfh
= mlx5e_get_rxfh
,
1056 .set_rxfh
= mlx5e_set_rxfh
,
1057 .get_rxnfc
= mlx5e_get_rxnfc
,
1058 .get_tunable
= mlx5e_get_tunable
,
1059 .set_tunable
= mlx5e_set_tunable
,
1060 .get_pauseparam
= mlx5e_get_pauseparam
,
1061 .set_pauseparam
= mlx5e_set_pauseparam
,
1062 .get_ts_info
= mlx5e_get_ts_info
,
1063 .get_wol
= mlx5e_get_wol
,
1064 .set_wol
= mlx5e_set_wol
,