2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 static void mlx5e_get_drvinfo(struct net_device
*dev
,
36 struct ethtool_drvinfo
*drvinfo
)
38 struct mlx5e_priv
*priv
= netdev_priv(dev
);
39 struct mlx5_core_dev
*mdev
= priv
->mdev
;
41 strlcpy(drvinfo
->driver
, DRIVER_NAME
, sizeof(drvinfo
->driver
));
42 strlcpy(drvinfo
->version
, DRIVER_VERSION
" (" DRIVER_RELDATE
")",
43 sizeof(drvinfo
->version
));
44 snprintf(drvinfo
->fw_version
, sizeof(drvinfo
->fw_version
),
46 fw_rev_maj(mdev
), fw_rev_min(mdev
), fw_rev_sub(mdev
));
47 strlcpy(drvinfo
->bus_info
, pci_name(mdev
->pdev
),
48 sizeof(drvinfo
->bus_info
));
55 } ptys2ethtool_table
[MLX5E_LINK_MODES_NUMBER
] = {
56 [MLX5E_1000BASE_CX_SGMII
] = {
57 .supported
= SUPPORTED_1000baseKX_Full
,
58 .advertised
= ADVERTISED_1000baseKX_Full
,
61 [MLX5E_1000BASE_KX
] = {
62 .supported
= SUPPORTED_1000baseKX_Full
,
63 .advertised
= ADVERTISED_1000baseKX_Full
,
66 [MLX5E_10GBASE_CX4
] = {
67 .supported
= SUPPORTED_10000baseKX4_Full
,
68 .advertised
= ADVERTISED_10000baseKX4_Full
,
71 [MLX5E_10GBASE_KX4
] = {
72 .supported
= SUPPORTED_10000baseKX4_Full
,
73 .advertised
= ADVERTISED_10000baseKX4_Full
,
76 [MLX5E_10GBASE_KR
] = {
77 .supported
= SUPPORTED_10000baseKR_Full
,
78 .advertised
= ADVERTISED_10000baseKR_Full
,
81 [MLX5E_20GBASE_KR2
] = {
82 .supported
= SUPPORTED_20000baseKR2_Full
,
83 .advertised
= ADVERTISED_20000baseKR2_Full
,
86 [MLX5E_40GBASE_CR4
] = {
87 .supported
= SUPPORTED_40000baseCR4_Full
,
88 .advertised
= ADVERTISED_40000baseCR4_Full
,
91 [MLX5E_40GBASE_KR4
] = {
92 .supported
= SUPPORTED_40000baseKR4_Full
,
93 .advertised
= ADVERTISED_40000baseKR4_Full
,
96 [MLX5E_56GBASE_R4
] = {
97 .supported
= SUPPORTED_56000baseKR4_Full
,
98 .advertised
= ADVERTISED_56000baseKR4_Full
,
101 [MLX5E_10GBASE_CR
] = {
102 .supported
= SUPPORTED_10000baseKR_Full
,
103 .advertised
= ADVERTISED_10000baseKR_Full
,
106 [MLX5E_10GBASE_SR
] = {
107 .supported
= SUPPORTED_10000baseKR_Full
,
108 .advertised
= ADVERTISED_10000baseKR_Full
,
111 [MLX5E_10GBASE_ER
] = {
112 .supported
= SUPPORTED_10000baseKR_Full
,
113 .advertised
= ADVERTISED_10000baseKR_Full
,
116 [MLX5E_40GBASE_SR4
] = {
117 .supported
= SUPPORTED_40000baseSR4_Full
,
118 .advertised
= ADVERTISED_40000baseSR4_Full
,
121 [MLX5E_40GBASE_LR4
] = {
122 .supported
= SUPPORTED_40000baseLR4_Full
,
123 .advertised
= ADVERTISED_40000baseLR4_Full
,
126 [MLX5E_100GBASE_CR4
] = {
129 [MLX5E_100GBASE_SR4
] = {
132 [MLX5E_100GBASE_KR4
] = {
135 [MLX5E_100GBASE_LR4
] = {
138 [MLX5E_100BASE_TX
] = {
141 [MLX5E_100BASE_T
] = {
142 .supported
= SUPPORTED_100baseT_Full
,
143 .advertised
= ADVERTISED_100baseT_Full
,
146 [MLX5E_10GBASE_T
] = {
147 .supported
= SUPPORTED_10000baseT_Full
,
148 .advertised
= ADVERTISED_10000baseT_Full
,
151 [MLX5E_25GBASE_CR
] = {
154 [MLX5E_25GBASE_KR
] = {
157 [MLX5E_25GBASE_SR
] = {
160 [MLX5E_50GBASE_CR2
] = {
163 [MLX5E_50GBASE_KR2
] = {
168 static int mlx5e_get_sset_count(struct net_device
*dev
, int sset
)
170 struct mlx5e_priv
*priv
= netdev_priv(dev
);
174 return NUM_VPORT_COUNTERS
+ NUM_PPORT_COUNTERS
+
175 priv
->params
.num_channels
* NUM_RQ_STATS
+
176 priv
->params
.num_channels
* priv
->params
.num_tc
*
184 static void mlx5e_get_strings(struct net_device
*dev
,
185 uint32_t stringset
, uint8_t *data
)
187 int i
, j
, tc
, idx
= 0;
188 struct mlx5e_priv
*priv
= netdev_priv(dev
);
191 case ETH_SS_PRIV_FLAGS
:
199 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
200 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
204 for (i
= 0; i
< NUM_PPORT_COUNTERS
; i
++)
205 strcpy(data
+ (idx
++) * ETH_GSTRING_LEN
,
208 /* per channel counters */
209 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
210 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
211 sprintf(data
+ (idx
++) * ETH_GSTRING_LEN
,
212 "rx%d_%s", i
, rq_stats_strings
[j
]);
214 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
215 for (tc
= 0; tc
< priv
->params
.num_tc
; tc
++)
216 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
218 (idx
++) * ETH_GSTRING_LEN
,
220 sq_stats_strings
[j
]);
225 static void mlx5e_get_ethtool_stats(struct net_device
*dev
,
226 struct ethtool_stats
*stats
, u64
*data
)
228 struct mlx5e_priv
*priv
= netdev_priv(dev
);
229 int i
, j
, tc
, idx
= 0;
234 mutex_lock(&priv
->state_lock
);
235 if (test_bit(MLX5E_STATE_OPENED
, &priv
->state
))
236 mlx5e_update_stats(priv
);
237 mutex_unlock(&priv
->state_lock
);
239 for (i
= 0; i
< NUM_VPORT_COUNTERS
; i
++)
240 data
[idx
++] = ((u64
*)&priv
->stats
.vport
)[i
];
242 for (i
= 0; i
< NUM_PPORT_COUNTERS
; i
++)
243 data
[idx
++] = be64_to_cpu(((__be64
*)&priv
->stats
.pport
)[i
]);
245 /* per channel counters */
246 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
247 for (j
= 0; j
< NUM_RQ_STATS
; j
++)
248 data
[idx
++] = !test_bit(MLX5E_STATE_OPENED
,
250 ((u64
*)&priv
->channel
[i
]->rq
.stats
)[j
];
252 for (i
= 0; i
< priv
->params
.num_channels
; i
++)
253 for (tc
= 0; tc
< priv
->params
.num_tc
; tc
++)
254 for (j
= 0; j
< NUM_SQ_STATS
; j
++)
255 data
[idx
++] = !test_bit(MLX5E_STATE_OPENED
,
257 ((u64
*)&priv
->channel
[i
]->sq
[tc
].stats
)[j
];
260 static void mlx5e_get_ringparam(struct net_device
*dev
,
261 struct ethtool_ringparam
*param
)
263 struct mlx5e_priv
*priv
= netdev_priv(dev
);
265 param
->rx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
;
266 param
->tx_max_pending
= 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
;
267 param
->rx_pending
= 1 << priv
->params
.log_rq_size
;
268 param
->tx_pending
= 1 << priv
->params
.log_sq_size
;
271 static int mlx5e_set_ringparam(struct net_device
*dev
,
272 struct ethtool_ringparam
*param
)
274 struct mlx5e_priv
*priv
= netdev_priv(dev
);
281 if (param
->rx_jumbo_pending
) {
282 netdev_info(dev
, "%s: rx_jumbo_pending not supported\n",
286 if (param
->rx_mini_pending
) {
287 netdev_info(dev
, "%s: rx_mini_pending not supported\n",
291 if (param
->rx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
)) {
292 netdev_info(dev
, "%s: rx_pending (%d) < min (%d)\n",
293 __func__
, param
->rx_pending
,
294 1 << MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE
);
297 if (param
->rx_pending
> (1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
)) {
298 netdev_info(dev
, "%s: rx_pending (%d) > max (%d)\n",
299 __func__
, param
->rx_pending
,
300 1 << MLX5E_PARAMS_MAXIMUM_LOG_RQ_SIZE
);
303 if (param
->tx_pending
< (1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
)) {
304 netdev_info(dev
, "%s: tx_pending (%d) < min (%d)\n",
305 __func__
, param
->tx_pending
,
306 1 << MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE
);
309 if (param
->tx_pending
> (1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
)) {
310 netdev_info(dev
, "%s: tx_pending (%d) > max (%d)\n",
311 __func__
, param
->tx_pending
,
312 1 << MLX5E_PARAMS_MAXIMUM_LOG_SQ_SIZE
);
316 log_rq_size
= order_base_2(param
->rx_pending
);
317 log_sq_size
= order_base_2(param
->tx_pending
);
318 min_rx_wqes
= min_t(u16
, param
->rx_pending
- 1,
319 MLX5E_PARAMS_DEFAULT_MIN_RX_WQES
);
321 if (log_rq_size
== priv
->params
.log_rq_size
&&
322 log_sq_size
== priv
->params
.log_sq_size
&&
323 min_rx_wqes
== priv
->params
.min_rx_wqes
)
326 mutex_lock(&priv
->state_lock
);
328 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
330 mlx5e_close_locked(dev
);
332 priv
->params
.log_rq_size
= log_rq_size
;
333 priv
->params
.log_sq_size
= log_sq_size
;
334 priv
->params
.min_rx_wqes
= min_rx_wqes
;
337 err
= mlx5e_open_locked(dev
);
339 mutex_unlock(&priv
->state_lock
);
344 static void mlx5e_get_channels(struct net_device
*dev
,
345 struct ethtool_channels
*ch
)
347 struct mlx5e_priv
*priv
= netdev_priv(dev
);
349 ch
->max_combined
= mlx5e_get_max_num_channels(priv
->mdev
);
350 ch
->combined_count
= priv
->params
.num_channels
;
353 static int mlx5e_set_channels(struct net_device
*dev
,
354 struct ethtool_channels
*ch
)
356 struct mlx5e_priv
*priv
= netdev_priv(dev
);
357 int ncv
= mlx5e_get_max_num_channels(priv
->mdev
);
358 unsigned int count
= ch
->combined_count
;
363 netdev_info(dev
, "%s: combined_count=0 not supported\n",
367 if (ch
->rx_count
|| ch
->tx_count
) {
368 netdev_info(dev
, "%s: separate rx/tx count not supported\n",
373 netdev_info(dev
, "%s: count (%d) > max (%d)\n",
374 __func__
, count
, ncv
);
378 if (priv
->params
.num_channels
== count
)
381 mutex_lock(&priv
->state_lock
);
383 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
385 mlx5e_close_locked(dev
);
387 priv
->params
.num_channels
= count
;
388 mlx5e_build_default_indir_rqt(priv
->params
.indirection_rqt
,
389 MLX5E_INDIR_RQT_SIZE
, count
);
392 err
= mlx5e_open_locked(dev
);
394 mutex_unlock(&priv
->state_lock
);
399 static int mlx5e_get_coalesce(struct net_device
*netdev
,
400 struct ethtool_coalesce
*coal
)
402 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
404 coal
->rx_coalesce_usecs
= priv
->params
.rx_cq_moderation_usec
;
405 coal
->rx_max_coalesced_frames
= priv
->params
.rx_cq_moderation_pkts
;
406 coal
->tx_coalesce_usecs
= priv
->params
.tx_cq_moderation_usec
;
407 coal
->tx_max_coalesced_frames
= priv
->params
.tx_cq_moderation_pkts
;
412 static int mlx5e_set_coalesce(struct net_device
*netdev
,
413 struct ethtool_coalesce
*coal
)
415 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
416 struct mlx5_core_dev
*mdev
= priv
->mdev
;
417 struct mlx5e_channel
*c
;
421 priv
->params
.tx_cq_moderation_usec
= coal
->tx_coalesce_usecs
;
422 priv
->params
.tx_cq_moderation_pkts
= coal
->tx_max_coalesced_frames
;
423 priv
->params
.rx_cq_moderation_usec
= coal
->rx_coalesce_usecs
;
424 priv
->params
.rx_cq_moderation_pkts
= coal
->rx_max_coalesced_frames
;
426 for (i
= 0; i
< priv
->params
.num_channels
; ++i
) {
427 c
= priv
->channel
[i
];
429 for (tc
= 0; tc
< c
->num_tc
; tc
++) {
430 mlx5_core_modify_cq_moderation(mdev
,
432 coal
->tx_coalesce_usecs
,
433 coal
->tx_max_coalesced_frames
);
436 mlx5_core_modify_cq_moderation(mdev
, &c
->rq
.cq
.mcq
,
437 coal
->rx_coalesce_usecs
,
438 coal
->rx_max_coalesced_frames
);
444 static u32
ptys2ethtool_supported_link(u32 eth_proto_cap
)
447 u32 supported_modes
= 0;
449 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
450 if (eth_proto_cap
& MLX5E_PROT_MASK(i
))
451 supported_modes
|= ptys2ethtool_table
[i
].supported
;
453 return supported_modes
;
456 static u32
ptys2ethtool_adver_link(u32 eth_proto_cap
)
459 u32 advertising_modes
= 0;
461 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
462 if (eth_proto_cap
& MLX5E_PROT_MASK(i
))
463 advertising_modes
|= ptys2ethtool_table
[i
].advertised
;
465 return advertising_modes
;
468 static u32
ptys2ethtool_supported_port(u32 eth_proto_cap
)
470 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
471 | MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
472 | MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
473 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
474 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
475 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
476 return SUPPORTED_FIBRE
;
479 if (eth_proto_cap
& (MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
)
480 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
481 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
482 | MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
483 | MLX5E_PROT_MASK(MLX5E_1000BASE_KX
))) {
484 return SUPPORTED_Backplane
;
489 static void get_speed_duplex(struct net_device
*netdev
,
491 struct ethtool_cmd
*cmd
)
494 u32 speed
= SPEED_UNKNOWN
;
495 u8 duplex
= DUPLEX_UNKNOWN
;
497 if (!netif_carrier_ok(netdev
))
500 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
501 if (eth_proto_oper
& MLX5E_PROT_MASK(i
)) {
502 speed
= ptys2ethtool_table
[i
].speed
;
503 duplex
= DUPLEX_FULL
;
508 ethtool_cmd_speed_set(cmd
, speed
);
509 cmd
->duplex
= duplex
;
512 static void get_supported(u32 eth_proto_cap
, u32
*supported
)
514 *supported
|= ptys2ethtool_supported_port(eth_proto_cap
);
515 *supported
|= ptys2ethtool_supported_link(eth_proto_cap
);
516 *supported
|= SUPPORTED_Pause
| SUPPORTED_Asym_Pause
;
519 static void get_advertising(u32 eth_proto_cap
, u8 tx_pause
,
520 u8 rx_pause
, u32
*advertising
)
522 *advertising
|= ptys2ethtool_adver_link(eth_proto_cap
);
523 *advertising
|= tx_pause
? ADVERTISED_Pause
: 0;
524 *advertising
|= (tx_pause
^ rx_pause
) ? ADVERTISED_Asym_Pause
: 0;
527 static u8
get_connector_port(u32 eth_proto
)
529 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_10GBASE_SR
)
530 | MLX5E_PROT_MASK(MLX5E_40GBASE_SR4
)
531 | MLX5E_PROT_MASK(MLX5E_100GBASE_SR4
)
532 | MLX5E_PROT_MASK(MLX5E_1000BASE_CX_SGMII
))) {
536 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_40GBASE_CR4
)
537 | MLX5E_PROT_MASK(MLX5E_10GBASE_CR
)
538 | MLX5E_PROT_MASK(MLX5E_100GBASE_CR4
))) {
542 if (eth_proto
& (MLX5E_PROT_MASK(MLX5E_10GBASE_KX4
)
543 | MLX5E_PROT_MASK(MLX5E_10GBASE_KR
)
544 | MLX5E_PROT_MASK(MLX5E_40GBASE_KR4
)
545 | MLX5E_PROT_MASK(MLX5E_100GBASE_KR4
))) {
552 static void get_lp_advertising(u32 eth_proto_lp
, u32
*lp_advertising
)
554 *lp_advertising
= ptys2ethtool_adver_link(eth_proto_lp
);
557 static int mlx5e_get_settings(struct net_device
*netdev
,
558 struct ethtool_cmd
*cmd
)
560 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
561 struct mlx5_core_dev
*mdev
= priv
->mdev
;
562 u32 out
[MLX5_ST_SZ_DW(ptys_reg
)];
569 err
= mlx5_query_port_ptys(mdev
, out
, sizeof(out
), MLX5_PTYS_EN
, 1);
572 netdev_err(netdev
, "%s: query port ptys failed: %d\n",
577 eth_proto_cap
= MLX5_GET(ptys_reg
, out
, eth_proto_capability
);
578 eth_proto_admin
= MLX5_GET(ptys_reg
, out
, eth_proto_admin
);
579 eth_proto_oper
= MLX5_GET(ptys_reg
, out
, eth_proto_oper
);
580 eth_proto_lp
= MLX5_GET(ptys_reg
, out
, eth_proto_lp_advertise
);
583 cmd
->advertising
= 0;
585 get_supported(eth_proto_cap
, &cmd
->supported
);
586 get_advertising(eth_proto_admin
, 0, 0, &cmd
->advertising
);
587 get_speed_duplex(netdev
, eth_proto_oper
, cmd
);
589 eth_proto_oper
= eth_proto_oper
? eth_proto_oper
: eth_proto_cap
;
591 cmd
->port
= get_connector_port(eth_proto_oper
);
592 get_lp_advertising(eth_proto_lp
, &cmd
->lp_advertising
);
594 cmd
->transceiver
= XCVR_INTERNAL
;
600 static u32
mlx5e_ethtool2ptys_adver_link(u32 link_modes
)
602 u32 i
, ptys_modes
= 0;
604 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
605 if (ptys2ethtool_table
[i
].advertised
& link_modes
)
606 ptys_modes
|= MLX5E_PROT_MASK(i
);
612 static u32
mlx5e_ethtool2ptys_speed_link(u32 speed
)
614 u32 i
, speed_links
= 0;
616 for (i
= 0; i
< MLX5E_LINK_MODES_NUMBER
; ++i
) {
617 if (ptys2ethtool_table
[i
].speed
== speed
)
618 speed_links
|= MLX5E_PROT_MASK(i
);
624 static int mlx5e_set_settings(struct net_device
*netdev
,
625 struct ethtool_cmd
*cmd
)
627 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
628 struct mlx5_core_dev
*mdev
= priv
->mdev
;
631 u32 eth_proto_cap
, eth_proto_admin
;
632 enum mlx5_port_status ps
;
635 speed
= ethtool_cmd_speed(cmd
);
637 link_modes
= cmd
->autoneg
== AUTONEG_ENABLE
?
638 mlx5e_ethtool2ptys_adver_link(cmd
->advertising
) :
639 mlx5e_ethtool2ptys_speed_link(speed
);
641 err
= mlx5_query_port_proto_cap(mdev
, ð_proto_cap
, MLX5_PTYS_EN
);
643 netdev_err(netdev
, "%s: query port eth proto cap failed: %d\n",
648 link_modes
= link_modes
& eth_proto_cap
;
650 netdev_err(netdev
, "%s: Not supported link mode(s) requested",
656 err
= mlx5_query_port_proto_admin(mdev
, ð_proto_admin
, MLX5_PTYS_EN
);
658 netdev_err(netdev
, "%s: query port eth proto admin failed: %d\n",
663 if (link_modes
== eth_proto_admin
)
666 mlx5_query_port_admin_status(mdev
, &ps
);
667 if (ps
== MLX5_PORT_UP
)
668 mlx5_set_port_admin_status(mdev
, MLX5_PORT_DOWN
);
669 mlx5_set_port_proto(mdev
, link_modes
, MLX5_PTYS_EN
);
670 if (ps
== MLX5_PORT_UP
)
671 mlx5_set_port_admin_status(mdev
, MLX5_PORT_UP
);
677 static u32
mlx5e_get_rxfh_key_size(struct net_device
*netdev
)
679 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
681 return sizeof(priv
->params
.toeplitz_hash_key
);
684 static u32
mlx5e_get_rxfh_indir_size(struct net_device
*netdev
)
686 return MLX5E_INDIR_RQT_SIZE
;
689 static int mlx5e_get_rxfh(struct net_device
*netdev
, u32
*indir
, u8
*key
,
692 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
695 memcpy(indir
, priv
->params
.indirection_rqt
,
696 sizeof(priv
->params
.indirection_rqt
));
699 memcpy(key
, priv
->params
.toeplitz_hash_key
,
700 sizeof(priv
->params
.toeplitz_hash_key
));
703 *hfunc
= priv
->params
.rss_hfunc
;
708 static void mlx5e_modify_tirs_hash(struct mlx5e_priv
*priv
, void *in
, int inlen
)
710 struct mlx5_core_dev
*mdev
= priv
->mdev
;
711 void *tirc
= MLX5_ADDR_OF(modify_tir_in
, in
, ctx
);
714 MLX5_SET(modify_tir_in
, in
, bitmask
.hash
, 1);
715 mlx5e_build_tir_ctx_hash(tirc
, priv
);
717 for (i
= 0; i
< MLX5E_NUM_TT
; i
++)
718 if (IS_HASHING_TT(i
))
719 mlx5_core_modify_tir(mdev
, priv
->tirn
[i
], in
, inlen
);
722 static int mlx5e_set_rxfh(struct net_device
*dev
, const u32
*indir
,
723 const u8
*key
, const u8 hfunc
)
725 struct mlx5e_priv
*priv
= netdev_priv(dev
);
726 int inlen
= MLX5_ST_SZ_BYTES(modify_tir_in
);
729 if ((hfunc
!= ETH_RSS_HASH_NO_CHANGE
) &&
730 (hfunc
!= ETH_RSS_HASH_XOR
) &&
731 (hfunc
!= ETH_RSS_HASH_TOP
))
734 in
= mlx5_vzalloc(inlen
);
738 mutex_lock(&priv
->state_lock
);
741 memcpy(priv
->params
.indirection_rqt
, indir
,
742 sizeof(priv
->params
.indirection_rqt
));
743 mlx5e_redirect_rqt(priv
, MLX5E_INDIRECTION_RQT
);
747 memcpy(priv
->params
.toeplitz_hash_key
, key
,
748 sizeof(priv
->params
.toeplitz_hash_key
));
750 if (hfunc
!= ETH_RSS_HASH_NO_CHANGE
)
751 priv
->params
.rss_hfunc
= hfunc
;
753 mlx5e_modify_tirs_hash(priv
, in
, inlen
);
755 mutex_unlock(&priv
->state_lock
);
762 static int mlx5e_get_rxnfc(struct net_device
*netdev
,
763 struct ethtool_rxnfc
*info
, u32
*rule_locs
)
765 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
769 case ETHTOOL_GRXRINGS
:
770 info
->data
= priv
->params
.num_channels
;
780 static int mlx5e_get_tunable(struct net_device
*dev
,
781 const struct ethtool_tunable
*tuna
,
784 const struct mlx5e_priv
*priv
= netdev_priv(dev
);
788 case ETHTOOL_TX_COPYBREAK
:
789 *(u32
*)data
= priv
->params
.tx_max_inline
;
799 static int mlx5e_set_tunable(struct net_device
*dev
,
800 const struct ethtool_tunable
*tuna
,
803 struct mlx5e_priv
*priv
= netdev_priv(dev
);
804 struct mlx5_core_dev
*mdev
= priv
->mdev
;
810 case ETHTOOL_TX_COPYBREAK
:
812 if (val
> mlx5e_get_max_inline_cap(mdev
)) {
817 mutex_lock(&priv
->state_lock
);
819 was_opened
= test_bit(MLX5E_STATE_OPENED
, &priv
->state
);
821 mlx5e_close_locked(dev
);
823 priv
->params
.tx_max_inline
= val
;
826 err
= mlx5e_open_locked(dev
);
828 mutex_unlock(&priv
->state_lock
);
838 static void mlx5e_get_pauseparam(struct net_device
*netdev
,
839 struct ethtool_pauseparam
*pauseparam
)
841 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
842 struct mlx5_core_dev
*mdev
= priv
->mdev
;
845 err
= mlx5_query_port_pause(mdev
, &pauseparam
->rx_pause
,
846 &pauseparam
->tx_pause
);
848 netdev_err(netdev
, "%s: mlx5_query_port_pause failed:0x%x\n",
853 static int mlx5e_set_pauseparam(struct net_device
*netdev
,
854 struct ethtool_pauseparam
*pauseparam
)
856 struct mlx5e_priv
*priv
= netdev_priv(netdev
);
857 struct mlx5_core_dev
*mdev
= priv
->mdev
;
860 if (pauseparam
->autoneg
)
863 err
= mlx5_set_port_pause(mdev
,
864 pauseparam
->rx_pause
? 1 : 0,
865 pauseparam
->tx_pause
? 1 : 0);
867 netdev_err(netdev
, "%s: mlx5_set_port_pause failed:0x%x\n",
874 static int mlx5e_get_ts_info(struct net_device
*dev
,
875 struct ethtool_ts_info
*info
)
877 struct mlx5e_priv
*priv
= netdev_priv(dev
);
880 ret
= ethtool_op_get_ts_info(dev
, info
);
884 info
->phc_index
= priv
->tstamp
.ptp
?
885 ptp_clock_index(priv
->tstamp
.ptp
) : -1;
887 if (!MLX5_CAP_GEN(priv
->mdev
, device_frequency_khz
))
890 info
->so_timestamping
|= SOF_TIMESTAMPING_TX_HARDWARE
|
891 SOF_TIMESTAMPING_RX_HARDWARE
|
892 SOF_TIMESTAMPING_RAW_HARDWARE
;
894 info
->tx_types
= (BIT(1) << HWTSTAMP_TX_OFF
) |
895 (BIT(1) << HWTSTAMP_TX_ON
);
897 info
->rx_filters
= (BIT(1) << HWTSTAMP_FILTER_NONE
) |
898 (BIT(1) << HWTSTAMP_FILTER_ALL
);
903 const struct ethtool_ops mlx5e_ethtool_ops
= {
904 .get_drvinfo
= mlx5e_get_drvinfo
,
905 .get_link
= ethtool_op_get_link
,
906 .get_strings
= mlx5e_get_strings
,
907 .get_sset_count
= mlx5e_get_sset_count
,
908 .get_ethtool_stats
= mlx5e_get_ethtool_stats
,
909 .get_ringparam
= mlx5e_get_ringparam
,
910 .set_ringparam
= mlx5e_set_ringparam
,
911 .get_channels
= mlx5e_get_channels
,
912 .set_channels
= mlx5e_set_channels
,
913 .get_coalesce
= mlx5e_get_coalesce
,
914 .set_coalesce
= mlx5e_set_coalesce
,
915 .get_settings
= mlx5e_get_settings
,
916 .set_settings
= mlx5e_set_settings
,
917 .get_rxfh_key_size
= mlx5e_get_rxfh_key_size
,
918 .get_rxfh_indir_size
= mlx5e_get_rxfh_indir_size
,
919 .get_rxfh
= mlx5e_get_rxfh
,
920 .set_rxfh
= mlx5e_set_rxfh
,
921 .get_rxnfc
= mlx5e_get_rxnfc
,
922 .get_tunable
= mlx5e_get_tunable
,
923 .set_tunable
= mlx5e_set_tunable
,
924 .get_pauseparam
= mlx5e_get_pauseparam
,
925 .set_pauseparam
= mlx5e_set_pauseparam
,
926 .get_ts_info
= mlx5e_get_ts_info
,