drivers/net/ethernet/mellanox/mlxsw/spectrum.h

   1 /*
   2  * drivers/net/ethernet/mellanox/mlxsw/spectrum.h
   3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
   4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
   5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
   6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
   7  *
   8  * Redistribution and use in source and binary forms, with or without
   9  * modification, are permitted provided that the following conditions are met:
  10  *
  11  * 1. Redistributions of source code must retain the above copyright
  12  *    notice, this list of conditions and the following disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  * 3. Neither the names of the copyright holders nor the names of its
  17  *    contributors may be used to endorse or promote products derived from
  18  *    this software without specific prior written permission.
  19  *
  20  * Alternatively, this software may be distributed under the terms of the
  21  * GNU General Public License ("GPL") version 2 as published by the Free
  22  * Software Foundation.
  23  *
  24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  34  * POSSIBILITY OF SUCH DAMAGE.
  35  */
  36
  37 #ifndef _MLXSW_SPECTRUM_H
  38 #define _MLXSW_SPECTRUM_H
  39
  40 #include <linux/types.h>
  41 #include <linux/netdevice.h>
  42 #include <linux/rhashtable.h>
  43 #include <linux/bitops.h>
  44 #include <linux/if_vlan.h>
  45 #include <linux/list.h>
  46 #include <linux/dcbnl.h>
  47 #include <linux/in6.h>
  48 #include <net/switchdev.h>
  49
  50 #include "port.h"
  51 #include "core.h"
  52
  53 #define MLXSW_SP_VFID_BASE VLAN_N_VID
  54 #define MLXSW_SP_VFID_MAX 6656  /* Bridged VLAN interfaces */
  55
  56 #define MLXSW_SP_RFID_BASE 15360
  57 #define MLXSW_SP_RIF_MAX 800
  58
  59 #define MLXSW_SP_LAG_MAX 64
  60 #define MLXSW_SP_PORT_PER_LAG_MAX 16
  61
  62 #define MLXSW_SP_MID_MAX 7000
  63
  64 #define MLXSW_SP_PORTS_PER_CLUSTER_MAX 4
  65
  66 #define MLXSW_SP_LPM_TREE_MIN 2 /* trees 0 and 1 are reserved */
  67 #define MLXSW_SP_LPM_TREE_MAX 22
  68 #define MLXSW_SP_LPM_TREE_COUNT (MLXSW_SP_LPM_TREE_MAX - MLXSW_SP_LPM_TREE_MIN)
  69
  70 #define MLXSW_SP_VIRTUAL_ROUTER_MAX 256
  71
  72 #define MLXSW_SP_PORT_BASE_SPEED 25000  /* Mb/s */
  73
  74 #define MLXSW_SP_BYTES_PER_CELL 96
  75
  76 #define MLXSW_SP_BYTES_TO_CELLS(b) DIV_ROUND_UP(b, MLXSW_SP_BYTES_PER_CELL)
  77 #define MLXSW_SP_CELLS_TO_BYTES(c) (c * MLXSW_SP_BYTES_PER_CELL)
  78
  79 #define MLXSW_SP_KVD_LINEAR_SIZE 65536 /* entries */
  80 #define MLXSW_SP_KVD_HASH_SINGLE_SIZE 163840 /* entries */
  81 #define MLXSW_SP_KVD_HASH_DOUBLE_SIZE 32768 /* entries */
  82
  83 /* Maximum delay buffer needed in case of PAUSE frames, in cells.
  84  * Assumes 100m cable and maximum MTU.
  85  */
  86 #define MLXSW_SP_PAUSE_DELAY 612
  87
  88 #define MLXSW_SP_CELL_FACTOR 2  /* 2 * cell_size / (IPG + cell_size + 1) */
  89
  90 static inline u16 mlxsw_sp_pfc_delay_get(int mtu, u16 delay)
  91 {
  92         delay = MLXSW_SP_BYTES_TO_CELLS(DIV_ROUND_UP(delay, BITS_PER_BYTE));
  93         return MLXSW_SP_CELL_FACTOR * delay + MLXSW_SP_BYTES_TO_CELLS(mtu);
  94 }
  95
  96 struct mlxsw_sp_port;
  97
  98 struct mlxsw_sp_upper {
  99         struct net_device *dev;
 100         unsigned int ref_count;
 101 };
 102
 103 struct mlxsw_sp_fid {
 104         void (*leave)(struct mlxsw_sp_port *mlxsw_sp_vport);
 105         struct list_head list;
 106         unsigned int ref_count;
 107         struct net_device *dev;
 108         struct mlxsw_sp_rif *r;
 109         u16 fid;
 110 };
 111
 112 struct mlxsw_sp_rif {
 113         struct net_device *dev;
 114         unsigned int ref_count;
 115         struct mlxsw_sp_fid *f;
 116         unsigned char addr[ETH_ALEN];
 117         int mtu;
 118         u16 rif;
 119 };
 120
 121 struct mlxsw_sp_mid {
 122         struct list_head list;
 123         unsigned char addr[ETH_ALEN];
 124         u16 vid;
 125         u16 mid;
 126         unsigned int ref_count;
 127 };
 128
 129 static inline u16 mlxsw_sp_vfid_to_fid(u16 vfid)
 130 {
 131         return MLXSW_SP_VFID_BASE + vfid;
 132 }
 133
 134 static inline u16 mlxsw_sp_fid_to_vfid(u16 fid)
 135 {
 136         return fid - MLXSW_SP_VFID_BASE;
 137 }
 138
 139 static inline bool mlxsw_sp_fid_is_vfid(u16 fid)
 140 {
 141         return fid >= MLXSW_SP_VFID_BASE && fid < MLXSW_SP_RFID_BASE;
 142 }
 143
 144 static inline bool mlxsw_sp_fid_is_rfid(u16 fid)
 145 {
 146         return fid >= MLXSW_SP_RFID_BASE;
 147 }
 148
 149 static inline u16 mlxsw_sp_rif_sp_to_fid(u16 rif)
 150 {
 151         return MLXSW_SP_RFID_BASE + rif;
 152 }
 153
 154 struct mlxsw_sp_sb_pr {
 155         enum mlxsw_reg_sbpr_mode mode;
 156         u32 size;
 157 };
 158
 159 struct mlxsw_cp_sb_occ {
 160         u32 cur;
 161         u32 max;
 162 };
 163
 164 struct mlxsw_sp_sb_cm {
 165         u32 min_buff;
 166         u32 max_buff;
 167         u8 pool;
 168         struct mlxsw_cp_sb_occ occ;
 169 };
 170
 171 struct mlxsw_sp_sb_pm {
 172         u32 min_buff;
 173         u32 max_buff;
 174         struct mlxsw_cp_sb_occ occ;
 175 };
 176
 177 #define MLXSW_SP_SB_POOL_COUNT  4
 178 #define MLXSW_SP_SB_TC_COUNT    8
 179
 180 struct mlxsw_sp_sb {
 181         struct mlxsw_sp_sb_pr prs[2][MLXSW_SP_SB_POOL_COUNT];
 182         struct {
 183                 struct mlxsw_sp_sb_cm cms[2][MLXSW_SP_SB_TC_COUNT];
 184                 struct mlxsw_sp_sb_pm pms[2][MLXSW_SP_SB_POOL_COUNT];
 185         } ports[MLXSW_PORT_MAX_PORTS];
 186 };
 187
 188 #define MLXSW_SP_PREFIX_COUNT (sizeof(struct in6_addr) * BITS_PER_BYTE)
 189
 190 struct mlxsw_sp_prefix_usage {
 191         DECLARE_BITMAP(b, MLXSW_SP_PREFIX_COUNT);
 192 };
 193
 194 enum mlxsw_sp_l3proto {
 195         MLXSW_SP_L3_PROTO_IPV4,
 196         MLXSW_SP_L3_PROTO_IPV6,
 197 };
 198
 199 struct mlxsw_sp_lpm_tree {
 200         u8 id; /* tree ID */
 201         unsigned int ref_count;
 202         enum mlxsw_sp_l3proto proto;
 203         struct mlxsw_sp_prefix_usage prefix_usage;
 204 };
 205
 206 struct mlxsw_sp_fib;
 207
 208 struct mlxsw_sp_vr {
 209         u16 id; /* virtual router ID */
 210         bool used;
 211         enum mlxsw_sp_l3proto proto;
 212         u32 tb_id; /* kernel fib table id */
 213         struct mlxsw_sp_lpm_tree *lpm_tree;
 214         struct mlxsw_sp_fib *fib;
 215 };
 216
 217 struct mlxsw_sp_router {
 218         struct mlxsw_sp_lpm_tree lpm_trees[MLXSW_SP_LPM_TREE_COUNT];
 219         struct mlxsw_sp_vr vrs[MLXSW_SP_VIRTUAL_ROUTER_MAX];
 220         struct rhashtable neigh_ht;
 221         struct {
 222                 struct delayed_work dw;
 223                 unsigned long interval; /* ms */
 224         } neighs_update;
 225 };
 226
 227 struct mlxsw_sp {
 228         struct {
 229                 struct list_head list;
 230                 DECLARE_BITMAP(mapped, MLXSW_SP_VFID_MAX);
 231         } vfids;
 232         struct {
 233                 struct list_head list;
 234                 DECLARE_BITMAP(mapped, MLXSW_SP_MID_MAX);
 235         } br_mids;
 236         struct list_head fids;  /* VLAN-aware bridge FIDs */
 237         struct mlxsw_sp_rif *rifs[MLXSW_SP_RIF_MAX];
 238         struct mlxsw_sp_port **ports;
 239         struct mlxsw_core *core;
 240         const struct mlxsw_bus_info *bus_info;
 241         unsigned char base_mac[ETH_ALEN];
 242         struct {
 243                 struct delayed_work dw;
 244 #define MLXSW_SP_DEFAULT_LEARNING_INTERVAL 100
 245                 unsigned int interval; /* ms */
 246         } fdb_notify;
 247 #define MLXSW_SP_MIN_AGEING_TIME 10
 248 #define MLXSW_SP_MAX_AGEING_TIME 1000000
 249 #define MLXSW_SP_DEFAULT_AGEING_TIME 300
 250         u32 ageing_time;
 251         struct mlxsw_sp_upper master_bridge;
 252         struct mlxsw_sp_upper lags[MLXSW_SP_LAG_MAX];
 253         u8 port_to_module[MLXSW_PORT_MAX_PORTS];
 254         struct mlxsw_sp_sb sb;
 255         struct mlxsw_sp_router router;
 256         struct {
 257                 DECLARE_BITMAP(usage, MLXSW_SP_KVD_LINEAR_SIZE);
 258         } kvdl;
 259 };
 260
 261 static inline struct mlxsw_sp_upper *
 262 mlxsw_sp_lag_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
 263 {
 264         return &mlxsw_sp->lags[lag_id];
 265 }
 266
 267 struct mlxsw_sp_port_pcpu_stats {
 268         u64                     rx_packets;
 269         u64                     rx_bytes;
 270         u64                     tx_packets;
 271         u64                     tx_bytes;
 272         struct u64_stats_sync   syncp;
 273         u32                     tx_dropped;
 274 };
 275
 276 struct mlxsw_sp_port {
 277         struct mlxsw_core_port core_port; /* must be first */
 278         struct net_device *dev;
 279         struct mlxsw_sp_port_pcpu_stats __percpu *pcpu_stats;
 280         struct mlxsw_sp *mlxsw_sp;
 281         u8 local_port;
 282         u8 stp_state;
 283         u8 learning:1,
 284            learning_sync:1,
 285            uc_flood:1,
 286            bridged:1,
 287            lagged:1,
 288            split:1;
 289         u16 pvid;
 290         u16 lag_id;
 291         struct {
 292                 struct list_head list;
 293                 struct mlxsw_sp_fid *f;
 294                 u16 vid;
 295         } vport;
 296         struct {
 297                 u8 tx_pause:1,
 298                    rx_pause:1;
 299         } link;
 300         struct {
 301                 struct ieee_ets *ets;
 302                 struct ieee_maxrate *maxrate;
 303                 struct ieee_pfc *pfc;
 304         } dcb;
 305         struct {
 306                 u8 module;
 307                 u8 width;
 308                 u8 lane;
 309         } mapping;
 310         /* 802.1Q bridge VLANs */
 311         unsigned long *active_vlans;
 312         unsigned long *untagged_vlans;
 313         /* VLAN interfaces */
 314         struct list_head vports_list;
 315 };
 316
 317 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev);
 318 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port);
 319
 320 static inline bool
 321 mlxsw_sp_port_is_pause_en(const struct mlxsw_sp_port *mlxsw_sp_port)
 322 {
 323         return mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause;
 324 }
 325
 326 static inline struct mlxsw_sp_port *
 327 mlxsw_sp_port_lagged_get(struct mlxsw_sp *mlxsw_sp, u16 lag_id, u8 port_index)
 328 {
 329         struct mlxsw_sp_port *mlxsw_sp_port;
 330         u8 local_port;
 331
 332         local_port = mlxsw_core_lag_mapping_get(mlxsw_sp->core,
 333                                                 lag_id, port_index);
 334         mlxsw_sp_port = mlxsw_sp->ports[local_port];
 335         return mlxsw_sp_port && mlxsw_sp_port->lagged ? mlxsw_sp_port : NULL;
 336 }
 337
 338 static inline u16
 339 mlxsw_sp_vport_vid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
 340 {
 341         return mlxsw_sp_vport->vport.vid;
 342 }
 343
 344 static inline bool
 345 mlxsw_sp_port_is_vport(const struct mlxsw_sp_port *mlxsw_sp_port)
 346 {
 347         u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
 348
 349         return vid != 0;
 350 }
 351
 352 static inline void mlxsw_sp_vport_fid_set(struct mlxsw_sp_port *mlxsw_sp_vport,
 353                                           struct mlxsw_sp_fid *f)
 354 {
 355         mlxsw_sp_vport->vport.f = f;
 356 }
 357
 358 static inline struct mlxsw_sp_fid *
 359 mlxsw_sp_vport_fid_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
 360 {
 361         return mlxsw_sp_vport->vport.f;
 362 }
 363
 364 static inline struct net_device *
 365 mlxsw_sp_vport_dev_get(const struct mlxsw_sp_port *mlxsw_sp_vport)
 366 {
 367         struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
 368
 369         return f ? f->dev : NULL;
 370 }
 371
 372 static inline struct mlxsw_sp_port *
 373 mlxsw_sp_port_vport_find(const struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
 374 {
 375         struct mlxsw_sp_port *mlxsw_sp_vport;
 376
 377         list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
 378                             vport.list) {
 379                 if (mlxsw_sp_vport_vid_get(mlxsw_sp_vport) == vid)
 380                         return mlxsw_sp_vport;
 381         }
 382
 383         return NULL;
 384 }
 385
 386 static inline struct mlxsw_sp_port *
 387 mlxsw_sp_port_vport_find_by_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
 388                                 u16 fid)
 389 {
 390         struct mlxsw_sp_port *mlxsw_sp_vport;
 391
 392         list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
 393                             vport.list) {
 394                 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
 395
 396                 if (f && f->fid == fid)
 397                         return mlxsw_sp_vport;
 398         }
 399
 400         return NULL;
 401 }
 402
 403 static inline struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
 404                                                      u16 fid)
 405 {
 406         struct mlxsw_sp_fid *f;
 407
 408         list_for_each_entry(f, &mlxsw_sp->fids, list)
 409                 if (f->fid == fid)
 410                         return f;
 411
 412         return NULL;
 413 }
 414
 415 static inline struct mlxsw_sp_fid *
 416 mlxsw_sp_vfid_find(const struct mlxsw_sp *mlxsw_sp,
 417                    const struct net_device *br_dev)
 418 {
 419         struct mlxsw_sp_fid *f;
 420
 421         list_for_each_entry(f, &mlxsw_sp->vfids.list, list)
 422                 if (f->dev == br_dev)
 423                         return f;
 424
 425         return NULL;
 426 }
 427
 428 static inline struct mlxsw_sp_rif *
 429 mlxsw_sp_rif_find_by_dev(const struct mlxsw_sp *mlxsw_sp,
 430                          const struct net_device *dev)
 431 {
 432         int i;
 433
 434         for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
 435                 if (mlxsw_sp->rifs[i] && mlxsw_sp->rifs[i]->dev == dev)
 436                         return mlxsw_sp->rifs[i];
 437
 438         return NULL;
 439 }
 440
 441 enum mlxsw_sp_flood_table {
 442         MLXSW_SP_FLOOD_TABLE_UC,
 443         MLXSW_SP_FLOOD_TABLE_BM,
 444 };
 445
 446 int mlxsw_sp_buffers_init(struct mlxsw_sp *mlxsw_sp);
 447 void mlxsw_sp_buffers_fini(struct mlxsw_sp *mlxsw_sp);
 448 int mlxsw_sp_port_buffers_init(struct mlxsw_sp_port *mlxsw_sp_port);
 449 int mlxsw_sp_sb_pool_get(struct mlxsw_core *mlxsw_core,
 450                          unsigned int sb_index, u16 pool_index,
 451                          struct devlink_sb_pool_info *pool_info);
 452 int mlxsw_sp_sb_pool_set(struct mlxsw_core *mlxsw_core,
 453                          unsigned int sb_index, u16 pool_index, u32 size,
 454                          enum devlink_sb_threshold_type threshold_type);
 455 int mlxsw_sp_sb_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
 456                               unsigned int sb_index, u16 pool_index,
 457                               u32 *p_threshold);
 458 int mlxsw_sp_sb_port_pool_set(struct mlxsw_core_port *mlxsw_core_port,
 459                               unsigned int sb_index, u16 pool_index,
 460                               u32 threshold);
 461 int mlxsw_sp_sb_tc_pool_bind_get(struct mlxsw_core_port *mlxsw_core_port,
 462                                  unsigned int sb_index, u16 tc_index,
 463                                  enum devlink_sb_pool_type pool_type,
 464                                  u16 *p_pool_index, u32 *p_threshold);
 465 int mlxsw_sp_sb_tc_pool_bind_set(struct mlxsw_core_port *mlxsw_core_port,
 466                                  unsigned int sb_index, u16 tc_index,
 467                                  enum devlink_sb_pool_type pool_type,
 468                                  u16 pool_index, u32 threshold);
 469 int mlxsw_sp_sb_occ_snapshot(struct mlxsw_core *mlxsw_core,
 470                              unsigned int sb_index);
 471 int mlxsw_sp_sb_occ_max_clear(struct mlxsw_core *mlxsw_core,
 472                               unsigned int sb_index);
 473 int mlxsw_sp_sb_occ_port_pool_get(struct mlxsw_core_port *mlxsw_core_port,
 474                                   unsigned int sb_index, u16 pool_index,
 475                                   u32 *p_cur, u32 *p_max);
 476 int mlxsw_sp_sb_occ_tc_port_bind_get(struct mlxsw_core_port *mlxsw_core_port,
 477                                      unsigned int sb_index, u16 tc_index,
 478                                      enum devlink_sb_pool_type pool_type,
 479                                      u32 *p_cur, u32 *p_max);
 480
 481 int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp);
 482 void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp);
 483 int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port);
 484 void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port);
 485 void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port);
 486 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
 487                                  enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
 488                                  u16 vid);
 489 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
 490                            u16 vid_end, bool is_member, bool untagged);
 491 int mlxsw_sp_port_add_vid(struct net_device *dev, __be16 __always_unused proto,
 492                           u16 vid);
 493 int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
 494                              bool set);
 495 void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port);
 496 int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid);
 497 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid);
 498 int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
 499                         bool adding);
 500 struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid);
 501 void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, struct mlxsw_sp_fid *f);
 502 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
 503                                  struct mlxsw_sp_rif *r);
 504 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
 505                           enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
 506                           bool dwrr, u8 dwrr_weight);
 507 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
 508                               u8 switch_prio, u8 tclass);
 509 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
 510                                  u8 *prio_tc, bool pause_en,
 511                                  struct ieee_pfc *my_pfc);
 512 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
 513                                   enum mlxsw_reg_qeec_hr hr, u8 index,
 514                                   u8 next_index, u32 maxrate);
 515
 516 #ifdef CONFIG_MLXSW_SPECTRUM_DCB
 517
 518 int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port);
 519 void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port);
 520
 521 #else
 522
 523 static inline int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port)
 524 {
 525         return 0;
 526 }
 527
 528 static inline void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port)
 529 {}
 530
 531 #endif
 532
 533 int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp);
 534 void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp);
 535 int mlxsw_sp_router_fib4_add(struct mlxsw_sp_port *mlxsw_sp_port,
 536                              const struct switchdev_obj_ipv4_fib *fib4,
 537                              struct switchdev_trans *trans);
 538 int mlxsw_sp_router_fib4_del(struct mlxsw_sp_port *mlxsw_sp_port,
 539                              const struct switchdev_obj_ipv4_fib *fib4);
 540 int mlxsw_sp_router_neigh_construct(struct net_device *dev,
 541                                     struct neighbour *n);
 542 void mlxsw_sp_router_neigh_destroy(struct net_device *dev,
 543                                    struct neighbour *n);
 544
 545 int mlxsw_sp_kvdl_alloc(struct mlxsw_sp *mlxsw_sp, unsigned int entry_count);
 546 void mlxsw_sp_kvdl_free(struct mlxsw_sp *mlxsw_sp, int entry_index);
 547
 548 #endif