net: define gso types for IPx over IPv4 and IPv6
[deliverable/linux.git] / drivers / net / ethernet / natsemi / sonic.c
1 /*
2 * sonic.c
3 *
4 * (C) 2005 Finn Thain
5 *
6 * Converted to DMA API, added zero-copy buffer handling, and
7 * (from the mac68k project) introduced dhd's support for 16-bit cards.
8 *
9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de)
10 *
11 * This driver is based on work from Andreas Busse, but most of
12 * the code is rewritten.
13 *
14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
15 *
16 * Core code included by system sonic drivers
17 *
18 * And... partially rewritten again by David Huggins-Daines in order
19 * to cope with screwed up Macintosh NICs that may or may not use
20 * 16-bit DMA.
21 *
22 * (C) 1999 David Huggins-Daines <dhd@debian.org>
23 *
24 */
25
26 /*
27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook,
28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet
29 * controller, and the files "8390.c" and "skeleton.c" in this directory.
30 *
31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi
32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also
33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c".
34 */
35
36
37
38 /*
39 * Open/initialize the SONIC controller.
40 *
41 * This routine should set everything up anew at each open, even
42 * registers that "should" only need to be set once at boot, so that
43 * there is non-reboot way to recover if something goes wrong.
44 */
45 static int sonic_open(struct net_device *dev)
46 {
47 struct sonic_local *lp = netdev_priv(dev);
48 int i;
49
50 if (sonic_debug > 2)
51 printk("sonic_open: initializing sonic driver.\n");
52
53 for (i = 0; i < SONIC_NUM_RRS; i++) {
54 struct sk_buff *skb = netdev_alloc_skb(dev, SONIC_RBSIZE + 2);
55 if (skb == NULL) {
56 while(i > 0) { /* free any that were allocated successfully */
57 i--;
58 dev_kfree_skb(lp->rx_skb[i]);
59 lp->rx_skb[i] = NULL;
60 }
61 printk(KERN_ERR "%s: couldn't allocate receive buffers\n",
62 dev->name);
63 return -ENOMEM;
64 }
65 /* align IP header unless DMA requires otherwise */
66 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
67 skb_reserve(skb, 2);
68 lp->rx_skb[i] = skb;
69 }
70
71 for (i = 0; i < SONIC_NUM_RRS; i++) {
72 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE),
73 SONIC_RBSIZE, DMA_FROM_DEVICE);
74 if (!laddr) {
75 while(i > 0) { /* free any that were mapped successfully */
76 i--;
77 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
78 lp->rx_laddr[i] = (dma_addr_t)0;
79 }
80 for (i = 0; i < SONIC_NUM_RRS; i++) {
81 dev_kfree_skb(lp->rx_skb[i]);
82 lp->rx_skb[i] = NULL;
83 }
84 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n",
85 dev->name);
86 return -ENOMEM;
87 }
88 lp->rx_laddr[i] = laddr;
89 }
90
91 /*
92 * Initialize the SONIC
93 */
94 sonic_init(dev);
95
96 netif_start_queue(dev);
97
98 if (sonic_debug > 2)
99 printk("sonic_open: Initialization done.\n");
100
101 return 0;
102 }
103
104
105 /*
106 * Close the SONIC device
107 */
108 static int sonic_close(struct net_device *dev)
109 {
110 struct sonic_local *lp = netdev_priv(dev);
111 int i;
112
113 if (sonic_debug > 2)
114 printk("sonic_close\n");
115
116 netif_stop_queue(dev);
117
118 /*
119 * stop the SONIC, disable interrupts
120 */
121 SONIC_WRITE(SONIC_IMR, 0);
122 SONIC_WRITE(SONIC_ISR, 0x7fff);
123 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
124
125 /* unmap and free skbs that haven't been transmitted */
126 for (i = 0; i < SONIC_NUM_TDS; i++) {
127 if(lp->tx_laddr[i]) {
128 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
129 lp->tx_laddr[i] = (dma_addr_t)0;
130 }
131 if(lp->tx_skb[i]) {
132 dev_kfree_skb(lp->tx_skb[i]);
133 lp->tx_skb[i] = NULL;
134 }
135 }
136
137 /* unmap and free the receive buffers */
138 for (i = 0; i < SONIC_NUM_RRS; i++) {
139 if(lp->rx_laddr[i]) {
140 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE);
141 lp->rx_laddr[i] = (dma_addr_t)0;
142 }
143 if(lp->rx_skb[i]) {
144 dev_kfree_skb(lp->rx_skb[i]);
145 lp->rx_skb[i] = NULL;
146 }
147 }
148
149 return 0;
150 }
151
152 static void sonic_tx_timeout(struct net_device *dev)
153 {
154 struct sonic_local *lp = netdev_priv(dev);
155 int i;
156 /*
157 * put the Sonic into software-reset mode and
158 * disable all interrupts before releasing DMA buffers
159 */
160 SONIC_WRITE(SONIC_IMR, 0);
161 SONIC_WRITE(SONIC_ISR, 0x7fff);
162 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
163 /* We could resend the original skbs. Easier to re-initialise. */
164 for (i = 0; i < SONIC_NUM_TDS; i++) {
165 if(lp->tx_laddr[i]) {
166 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE);
167 lp->tx_laddr[i] = (dma_addr_t)0;
168 }
169 if(lp->tx_skb[i]) {
170 dev_kfree_skb(lp->tx_skb[i]);
171 lp->tx_skb[i] = NULL;
172 }
173 }
174 /* Try to restart the adaptor. */
175 sonic_init(dev);
176 lp->stats.tx_errors++;
177 netif_trans_update(dev); /* prevent tx timeout */
178 netif_wake_queue(dev);
179 }
180
181 /*
182 * transmit packet
183 *
184 * Appends new TD during transmission thus avoiding any TX interrupts
185 * until we run out of TDs.
186 * This routine interacts closely with the ISR in that it may,
187 * set tx_skb[i]
188 * reset the status flags of the new TD
189 * set and reset EOL flags
190 * stop the tx queue
191 * The ISR interacts with this routine in various ways. It may,
192 * reset tx_skb[i]
193 * test the EOL and status flags of the TDs
194 * wake the tx queue
195 * Concurrently with all of this, the SONIC is potentially writing to
196 * the status flags of the TDs.
197 * Until some mutual exclusion is added, this code will not work with SMP. However,
198 * MIPS Jazz machines and m68k Macs were all uni-processor machines.
199 */
200
201 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev)
202 {
203 struct sonic_local *lp = netdev_priv(dev);
204 dma_addr_t laddr;
205 int length;
206 int entry = lp->next_tx;
207
208 if (sonic_debug > 2)
209 printk("sonic_send_packet: skb=%p, dev=%p\n", skb, dev);
210
211 length = skb->len;
212 if (length < ETH_ZLEN) {
213 if (skb_padto(skb, ETH_ZLEN))
214 return NETDEV_TX_OK;
215 length = ETH_ZLEN;
216 }
217
218 /*
219 * Map the packet data into the logical DMA address space
220 */
221
222 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE);
223 if (!laddr) {
224 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name);
225 dev_kfree_skb(skb);
226 return NETDEV_TX_BUSY;
227 }
228
229 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */
230 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */
231 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */
232 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff);
233 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16);
234 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length);
235 sonic_tda_put(dev, entry, SONIC_TD_LINK,
236 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL);
237
238 /*
239 * Must set tx_skb[entry] only after clearing status, and
240 * before clearing EOL and before stopping queue
241 */
242 wmb();
243 lp->tx_len[entry] = length;
244 lp->tx_laddr[entry] = laddr;
245 lp->tx_skb[entry] = skb;
246
247 wmb();
248 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK,
249 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL);
250 lp->eol_tx = entry;
251
252 lp->next_tx = (entry + 1) & SONIC_TDS_MASK;
253 if (lp->tx_skb[lp->next_tx] != NULL) {
254 /* The ring is full, the ISR has yet to process the next TD. */
255 if (sonic_debug > 3)
256 printk("%s: stopping queue\n", dev->name);
257 netif_stop_queue(dev);
258 /* after this packet, wait for ISR to free up some TDAs */
259 } else netif_start_queue(dev);
260
261 if (sonic_debug > 2)
262 printk("sonic_send_packet: issuing Tx command\n");
263
264 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP);
265
266 return NETDEV_TX_OK;
267 }
268
269 /*
270 * The typical workload of the driver:
271 * Handle the network interface interrupts.
272 */
273 static irqreturn_t sonic_interrupt(int irq, void *dev_id)
274 {
275 struct net_device *dev = dev_id;
276 struct sonic_local *lp = netdev_priv(dev);
277 int status;
278
279 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT))
280 return IRQ_NONE;
281
282 do {
283 if (status & SONIC_INT_PKTRX) {
284 if (sonic_debug > 2)
285 printk("%s: packet rx\n", dev->name);
286 sonic_rx(dev); /* got packet(s) */
287 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */
288 }
289
290 if (status & SONIC_INT_TXDN) {
291 int entry = lp->cur_tx;
292 int td_status;
293 int freed_some = 0;
294
295 /* At this point, cur_tx is the index of a TD that is one of:
296 * unallocated/freed (status set & tx_skb[entry] clear)
297 * allocated and sent (status set & tx_skb[entry] set )
298 * allocated and not yet sent (status clear & tx_skb[entry] set )
299 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear)
300 */
301
302 if (sonic_debug > 2)
303 printk("%s: tx done\n", dev->name);
304
305 while (lp->tx_skb[entry] != NULL) {
306 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0)
307 break;
308
309 if (td_status & 0x0001) {
310 lp->stats.tx_packets++;
311 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE);
312 } else {
313 lp->stats.tx_errors++;
314 if (td_status & 0x0642)
315 lp->stats.tx_aborted_errors++;
316 if (td_status & 0x0180)
317 lp->stats.tx_carrier_errors++;
318 if (td_status & 0x0020)
319 lp->stats.tx_window_errors++;
320 if (td_status & 0x0004)
321 lp->stats.tx_fifo_errors++;
322 }
323
324 /* We must free the original skb */
325 dev_kfree_skb_irq(lp->tx_skb[entry]);
326 lp->tx_skb[entry] = NULL;
327 /* and unmap DMA buffer */
328 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE);
329 lp->tx_laddr[entry] = (dma_addr_t)0;
330 freed_some = 1;
331
332 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) {
333 entry = (entry + 1) & SONIC_TDS_MASK;
334 break;
335 }
336 entry = (entry + 1) & SONIC_TDS_MASK;
337 }
338
339 if (freed_some || lp->tx_skb[entry] == NULL)
340 netif_wake_queue(dev); /* The ring is no longer full */
341 lp->cur_tx = entry;
342 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */
343 }
344
345 /*
346 * check error conditions
347 */
348 if (status & SONIC_INT_RFO) {
349 if (sonic_debug > 1)
350 printk("%s: rx fifo overrun\n", dev->name);
351 lp->stats.rx_fifo_errors++;
352 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */
353 }
354 if (status & SONIC_INT_RDE) {
355 if (sonic_debug > 1)
356 printk("%s: rx descriptors exhausted\n", dev->name);
357 lp->stats.rx_dropped++;
358 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */
359 }
360 if (status & SONIC_INT_RBAE) {
361 if (sonic_debug > 1)
362 printk("%s: rx buffer area exceeded\n", dev->name);
363 lp->stats.rx_dropped++;
364 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */
365 }
366
367 /* counter overruns; all counters are 16bit wide */
368 if (status & SONIC_INT_FAE) {
369 lp->stats.rx_frame_errors += 65536;
370 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */
371 }
372 if (status & SONIC_INT_CRC) {
373 lp->stats.rx_crc_errors += 65536;
374 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */
375 }
376 if (status & SONIC_INT_MP) {
377 lp->stats.rx_missed_errors += 65536;
378 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */
379 }
380
381 /* transmit error */
382 if (status & SONIC_INT_TXER) {
383 if ((SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) && (sonic_debug > 2))
384 printk(KERN_ERR "%s: tx fifo underrun\n", dev->name);
385 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */
386 }
387
388 /* bus retry */
389 if (status & SONIC_INT_BR) {
390 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n",
391 dev->name);
392 /* ... to help debug DMA problems causing endless interrupts. */
393 /* Bounce the eth interface to turn on the interrupt again. */
394 SONIC_WRITE(SONIC_IMR, 0);
395 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */
396 }
397
398 /* load CAM done */
399 if (status & SONIC_INT_LCD)
400 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */
401 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT));
402 return IRQ_HANDLED;
403 }
404
405 /*
406 * We have a good packet(s), pass it/them up the network stack.
407 */
408 static void sonic_rx(struct net_device *dev)
409 {
410 struct sonic_local *lp = netdev_priv(dev);
411 int status;
412 int entry = lp->cur_rx;
413
414 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) {
415 struct sk_buff *used_skb;
416 struct sk_buff *new_skb;
417 dma_addr_t new_laddr;
418 u16 bufadr_l;
419 u16 bufadr_h;
420 int pkt_len;
421
422 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS);
423 if (status & SONIC_RCR_PRX) {
424 /* Malloc up new buffer. */
425 new_skb = netdev_alloc_skb(dev, SONIC_RBSIZE + 2);
426 if (new_skb == NULL) {
427 lp->stats.rx_dropped++;
428 break;
429 }
430 /* provide 16 byte IP header alignment unless DMA requires otherwise */
431 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2)
432 skb_reserve(new_skb, 2);
433
434 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE),
435 SONIC_RBSIZE, DMA_FROM_DEVICE);
436 if (!new_laddr) {
437 dev_kfree_skb(new_skb);
438 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name);
439 lp->stats.rx_dropped++;
440 break;
441 }
442
443 /* now we have a new skb to replace it, pass the used one up the stack */
444 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE);
445 used_skb = lp->rx_skb[entry];
446 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN);
447 skb_trim(used_skb, pkt_len);
448 used_skb->protocol = eth_type_trans(used_skb, dev);
449 netif_rx(used_skb);
450 lp->stats.rx_packets++;
451 lp->stats.rx_bytes += pkt_len;
452
453 /* and insert the new skb */
454 lp->rx_laddr[entry] = new_laddr;
455 lp->rx_skb[entry] = new_skb;
456
457 bufadr_l = (unsigned long)new_laddr & 0xffff;
458 bufadr_h = (unsigned long)new_laddr >> 16;
459 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l);
460 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h);
461 } else {
462 /* This should only happen, if we enable accepting broken packets. */
463 lp->stats.rx_errors++;
464 if (status & SONIC_RCR_FAER)
465 lp->stats.rx_frame_errors++;
466 if (status & SONIC_RCR_CRCR)
467 lp->stats.rx_crc_errors++;
468 }
469 if (status & SONIC_RCR_LPKT) {
470 /*
471 * this was the last packet out of the current receive buffer
472 * give the buffer back to the SONIC
473 */
474 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode);
475 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff;
476 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
477 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) {
478 if (sonic_debug > 2)
479 printk("%s: rx buffer exhausted\n", dev->name);
480 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */
481 }
482 } else
483 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n",
484 dev->name);
485 /*
486 * give back the descriptor
487 */
488 sonic_rda_put(dev, entry, SONIC_RD_LINK,
489 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL);
490 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1);
491 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK,
492 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL);
493 lp->eol_rx = entry;
494 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK;
495 }
496 /*
497 * If any worth-while packets have been received, netif_rx()
498 * has done a mark_bh(NET_BH) for us and will work on them
499 * when we get to the bottom-half routine.
500 */
501 }
502
503
504 /*
505 * Get the current statistics.
506 * This may be called with the device open or closed.
507 */
508 static struct net_device_stats *sonic_get_stats(struct net_device *dev)
509 {
510 struct sonic_local *lp = netdev_priv(dev);
511
512 /* read the tally counter from the SONIC and reset them */
513 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT);
514 SONIC_WRITE(SONIC_CRCT, 0xffff);
515 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET);
516 SONIC_WRITE(SONIC_FAET, 0xffff);
517 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT);
518 SONIC_WRITE(SONIC_MPT, 0xffff);
519
520 return &lp->stats;
521 }
522
523
524 /*
525 * Set or clear the multicast filter for this adaptor.
526 */
527 static void sonic_multicast_list(struct net_device *dev)
528 {
529 struct sonic_local *lp = netdev_priv(dev);
530 unsigned int rcr;
531 struct netdev_hw_addr *ha;
532 unsigned char *addr;
533 int i;
534
535 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC);
536 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */
537
538 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
539 rcr |= SONIC_RCR_PRO;
540 } else {
541 if ((dev->flags & IFF_ALLMULTI) ||
542 (netdev_mc_count(dev) > 15)) {
543 rcr |= SONIC_RCR_AMC;
544 } else {
545 if (sonic_debug > 2)
546 printk("sonic_multicast_list: mc_count %d\n",
547 netdev_mc_count(dev));
548 sonic_set_cam_enable(dev, 1); /* always enable our own address */
549 i = 1;
550 netdev_for_each_mc_addr(ha, dev) {
551 addr = ha->addr;
552 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]);
553 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]);
554 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]);
555 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i));
556 i++;
557 }
558 SONIC_WRITE(SONIC_CDC, 16);
559 /* issue Load CAM command */
560 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
561 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
562 }
563 }
564
565 if (sonic_debug > 2)
566 printk("sonic_multicast_list: setting RCR=%x\n", rcr);
567
568 SONIC_WRITE(SONIC_RCR, rcr);
569 }
570
571
572 /*
573 * Initialize the SONIC ethernet controller.
574 */
575 static int sonic_init(struct net_device *dev)
576 {
577 unsigned int cmd;
578 struct sonic_local *lp = netdev_priv(dev);
579 int i;
580
581 /*
582 * put the Sonic into software-reset mode and
583 * disable all interrupts
584 */
585 SONIC_WRITE(SONIC_IMR, 0);
586 SONIC_WRITE(SONIC_ISR, 0x7fff);
587 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
588
589 /*
590 * clear software reset flag, disable receiver, clear and
591 * enable interrupts, then completely initialize the SONIC
592 */
593 SONIC_WRITE(SONIC_CMD, 0);
594 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS);
595
596 /*
597 * initialize the receive resource area
598 */
599 if (sonic_debug > 2)
600 printk("sonic_init: initialize receive resource area\n");
601
602 for (i = 0; i < SONIC_NUM_RRS; i++) {
603 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff;
604 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16;
605 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l);
606 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h);
607 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1);
608 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0);
609 }
610
611 /* initialize all RRA registers */
612 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR *
613 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
614 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR *
615 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff;
616
617 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff);
618 SONIC_WRITE(SONIC_REA, lp->rra_end);
619 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff);
620 SONIC_WRITE(SONIC_RWP, lp->cur_rwp);
621 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16);
622 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1));
623
624 /* load the resource pointers */
625 if (sonic_debug > 3)
626 printk("sonic_init: issuing RRRA command\n");
627
628 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA);
629 i = 0;
630 while (i++ < 100) {
631 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA)
632 break;
633 }
634
635 if (sonic_debug > 2)
636 printk("sonic_init: status=%x i=%d\n", SONIC_READ(SONIC_CMD), i);
637
638 /*
639 * Initialize the receive descriptors so that they
640 * become a circular linked list, ie. let the last
641 * descriptor point to the first again.
642 */
643 if (sonic_debug > 2)
644 printk("sonic_init: initialize receive descriptors\n");
645 for (i=0; i<SONIC_NUM_RDS; i++) {
646 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0);
647 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0);
648 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0);
649 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0);
650 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0);
651 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1);
652 sonic_rda_put(dev, i, SONIC_RD_LINK,
653 lp->rda_laddr +
654 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode)));
655 }
656 /* fix last descriptor */
657 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK,
658 (lp->rda_laddr & 0xffff) | SONIC_EOL);
659 lp->eol_rx = SONIC_NUM_RDS - 1;
660 lp->cur_rx = 0;
661 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16);
662 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff);
663
664 /*
665 * initialize transmit descriptors
666 */
667 if (sonic_debug > 2)
668 printk("sonic_init: initialize transmit descriptors\n");
669 for (i = 0; i < SONIC_NUM_TDS; i++) {
670 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0);
671 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0);
672 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0);
673 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0);
674 sonic_tda_put(dev, i, SONIC_TD_LINK,
675 (lp->tda_laddr & 0xffff) +
676 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode));
677 lp->tx_skb[i] = NULL;
678 }
679 /* fix last descriptor */
680 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK,
681 (lp->tda_laddr & 0xffff));
682
683 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16);
684 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff);
685 lp->cur_tx = lp->next_tx = 0;
686 lp->eol_tx = SONIC_NUM_TDS - 1;
687
688 /*
689 * put our own address to CAM desc[0]
690 */
691 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]);
692 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]);
693 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]);
694 sonic_set_cam_enable(dev, 1);
695
696 for (i = 0; i < 16; i++)
697 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i);
698
699 /*
700 * initialize CAM registers
701 */
702 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff);
703 SONIC_WRITE(SONIC_CDC, 16);
704
705 /*
706 * load the CAM
707 */
708 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM);
709
710 i = 0;
711 while (i++ < 100) {
712 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD)
713 break;
714 }
715 if (sonic_debug > 2) {
716 printk("sonic_init: CMD=%x, ISR=%x\n, i=%d",
717 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i);
718 }
719
720 /*
721 * enable receiver, disable loopback
722 * and enable all interrupts
723 */
724 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP);
725 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT);
726 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT);
727 SONIC_WRITE(SONIC_ISR, 0x7fff);
728 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT);
729
730 cmd = SONIC_READ(SONIC_CMD);
731 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0)
732 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd);
733
734 if (sonic_debug > 2)
735 printk("sonic_init: new status=%x\n",
736 SONIC_READ(SONIC_CMD));
737
738 return 0;
739 }
740
741 MODULE_LICENSE("GPL");
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