igb: Add device support for flashless SKU of i210 device
[deliverable/linux.git] / drivers / net / ethernet / netx-eth.c
1 /*
2 * drivers/net/ethernet/netx-eth.c
3 *
4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/module.h>
23 #include <linux/kernel.h>
24 #include <linux/delay.h>
25
26 #include <linux/netdevice.h>
27 #include <linux/platform_device.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/mii.h>
31
32 #include <asm/io.h>
33 #include <mach/hardware.h>
34 #include <mach/netx-regs.h>
35 #include <mach/pfifo.h>
36 #include <mach/xc.h>
37 #include <linux/platform_data/eth-netx.h>
38
39 /* XC Fifo Offsets */
40 #define EMPTY_PTR_FIFO(xcno) (0 + ((xcno) << 3)) /* Index of the empty pointer FIFO */
41 #define IND_FIFO_PORT_HI(xcno) (1 + ((xcno) << 3)) /* Index of the FIFO where received */
42 /* Data packages are indicated by XC */
43 #define IND_FIFO_PORT_LO(xcno) (2 + ((xcno) << 3)) /* Index of the FIFO where received */
44 /* Data packages are indicated by XC */
45 #define REQ_FIFO_PORT_HI(xcno) (3 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
46 /* have to be indicated by ARM which */
47 /* shall be sent */
48 #define REQ_FIFO_PORT_LO(xcno) (4 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
49 /* have to be indicated by ARM which shall */
50 /* be sent */
51 #define CON_FIFO_PORT_HI(xcno) (5 + ((xcno) << 3)) /* Index of the FIFO where sent Data packages */
52 /* are confirmed */
53 #define CON_FIFO_PORT_LO(xcno) (6 + ((xcno) << 3)) /* Index of the FIFO where sent Data */
54 /* packages are confirmed */
55 #define PFIFO_MASK(xcno) (0x7f << (xcno*8))
56
57 #define FIFO_PTR_FRAMELEN_SHIFT 0
58 #define FIFO_PTR_FRAMELEN_MASK (0x7ff << 0)
59 #define FIFO_PTR_FRAMELEN(len) (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
60 #define FIFO_PTR_TIMETRIG (1<<11)
61 #define FIFO_PTR_MULTI_REQ
62 #define FIFO_PTR_ORIGIN (1<<14)
63 #define FIFO_PTR_VLAN (1<<15)
64 #define FIFO_PTR_FRAMENO_SHIFT 16
65 #define FIFO_PTR_FRAMENO_MASK (0x3f << 16)
66 #define FIFO_PTR_FRAMENO(no) (((no) << 16) & FIFO_PTR_FRAMENO_MASK)
67 #define FIFO_PTR_SEGMENT_SHIFT 22
68 #define FIFO_PTR_SEGMENT_MASK (0xf << 22)
69 #define FIFO_PTR_SEGMENT(seg) (((seg) & 0xf) << 22)
70 #define FIFO_PTR_ERROR_SHIFT 28
71 #define FIFO_PTR_ERROR_MASK (0xf << 28)
72
73 #define ISR_LINK_STATUS_CHANGE (1<<4)
74 #define ISR_IND_LO (1<<3)
75 #define ISR_CON_LO (1<<2)
76 #define ISR_IND_HI (1<<1)
77 #define ISR_CON_HI (1<<0)
78
79 #define ETH_MAC_LOCAL_CONFIG 0x1560
80 #define ETH_MAC_4321 0x1564
81 #define ETH_MAC_65 0x1568
82
83 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
84 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK (0xf<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT)
85 #define MAC_TRAFFIC_CLASS_ARRANGEMENT(x) (((x)<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT) & MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK)
86 #define LOCAL_CONFIG_LINK_STATUS_IRQ_EN (1<<24)
87 #define LOCAL_CONFIG_CON_LO_IRQ_EN (1<<23)
88 #define LOCAL_CONFIG_CON_HI_IRQ_EN (1<<22)
89 #define LOCAL_CONFIG_IND_LO_IRQ_EN (1<<21)
90 #define LOCAL_CONFIG_IND_HI_IRQ_EN (1<<20)
91
92 #define CARDNAME "netx-eth"
93
94 /* LSB must be zero */
95 #define INTERNAL_PHY_ADR 0x1c
96
97 struct netx_eth_priv {
98 void __iomem *sram_base, *xpec_base, *xmac_base;
99 int id;
100 struct mii_if_info mii;
101 u32 msg_enable;
102 struct xc *xc;
103 spinlock_t lock;
104 };
105
106 static void netx_eth_set_multicast_list(struct net_device *ndev)
107 {
108 /* implement me */
109 }
110
111 static int
112 netx_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev)
113 {
114 struct netx_eth_priv *priv = netdev_priv(ndev);
115 unsigned char *buf = skb->data;
116 unsigned int len = skb->len;
117
118 spin_lock_irq(&priv->lock);
119 memcpy_toio(priv->sram_base + 1560, (void *)buf, len);
120 if (len < 60) {
121 memset_io(priv->sram_base + 1560 + len, 0, 60 - len);
122 len = 60;
123 }
124
125 pfifo_push(REQ_FIFO_PORT_LO(priv->id),
126 FIFO_PTR_SEGMENT(priv->id) |
127 FIFO_PTR_FRAMENO(1) |
128 FIFO_PTR_FRAMELEN(len));
129
130 ndev->stats.tx_packets++;
131 ndev->stats.tx_bytes += skb->len;
132
133 netif_stop_queue(ndev);
134 spin_unlock_irq(&priv->lock);
135 dev_kfree_skb(skb);
136
137 return NETDEV_TX_OK;
138 }
139
140 static void netx_eth_receive(struct net_device *ndev)
141 {
142 struct netx_eth_priv *priv = netdev_priv(ndev);
143 unsigned int val, frameno, seg, len;
144 unsigned char *data;
145 struct sk_buff *skb;
146
147 val = pfifo_pop(IND_FIFO_PORT_LO(priv->id));
148
149 frameno = (val & FIFO_PTR_FRAMENO_MASK) >> FIFO_PTR_FRAMENO_SHIFT;
150 seg = (val & FIFO_PTR_SEGMENT_MASK) >> FIFO_PTR_SEGMENT_SHIFT;
151 len = (val & FIFO_PTR_FRAMELEN_MASK) >> FIFO_PTR_FRAMELEN_SHIFT;
152
153 skb = netdev_alloc_skb(ndev, len);
154 if (unlikely(skb == NULL)) {
155 ndev->stats.rx_dropped++;
156 return;
157 }
158
159 data = skb_put(skb, len);
160
161 memcpy_fromio(data, priv->sram_base + frameno * 1560, len);
162
163 pfifo_push(EMPTY_PTR_FIFO(priv->id),
164 FIFO_PTR_SEGMENT(seg) | FIFO_PTR_FRAMENO(frameno));
165
166 skb->protocol = eth_type_trans(skb, ndev);
167 netif_rx(skb);
168 ndev->stats.rx_packets++;
169 ndev->stats.rx_bytes += len;
170 }
171
172 static irqreturn_t
173 netx_eth_interrupt(int irq, void *dev_id)
174 {
175 struct net_device *ndev = dev_id;
176 struct netx_eth_priv *priv = netdev_priv(ndev);
177 int status;
178 unsigned long flags;
179
180 spin_lock_irqsave(&priv->lock, flags);
181
182 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
183 while (status) {
184 int fill_level;
185 writel(status, NETX_PFIFO_XPEC_ISR(priv->id));
186
187 if ((status & ISR_CON_HI) || (status & ISR_IND_HI))
188 printk("%s: unexpected status: 0x%08x\n",
189 __func__, status);
190
191 fill_level =
192 readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id)));
193 while (fill_level--)
194 netx_eth_receive(ndev);
195
196 if (status & ISR_CON_LO)
197 netif_wake_queue(ndev);
198
199 if (status & ISR_LINK_STATUS_CHANGE)
200 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
201
202 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
203 }
204 spin_unlock_irqrestore(&priv->lock, flags);
205 return IRQ_HANDLED;
206 }
207
208 static int netx_eth_open(struct net_device *ndev)
209 {
210 struct netx_eth_priv *priv = netdev_priv(ndev);
211
212 if (request_irq
213 (ndev->irq, netx_eth_interrupt, IRQF_SHARED, ndev->name, ndev))
214 return -EAGAIN;
215
216 writel(ndev->dev_addr[0] |
217 ndev->dev_addr[1]<<8 |
218 ndev->dev_addr[2]<<16 |
219 ndev->dev_addr[3]<<24,
220 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
221 writel(ndev->dev_addr[4] |
222 ndev->dev_addr[5]<<8,
223 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
224
225 writel(LOCAL_CONFIG_LINK_STATUS_IRQ_EN |
226 LOCAL_CONFIG_CON_LO_IRQ_EN |
227 LOCAL_CONFIG_CON_HI_IRQ_EN |
228 LOCAL_CONFIG_IND_LO_IRQ_EN |
229 LOCAL_CONFIG_IND_HI_IRQ_EN,
230 priv->xpec_base + NETX_XPEC_RAM_START_OFS +
231 ETH_MAC_LOCAL_CONFIG);
232
233 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
234 netif_start_queue(ndev);
235
236 return 0;
237 }
238
239 static int netx_eth_close(struct net_device *ndev)
240 {
241 struct netx_eth_priv *priv = netdev_priv(ndev);
242
243 netif_stop_queue(ndev);
244
245 writel(0,
246 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG);
247
248 free_irq(ndev->irq, ndev);
249
250 return 0;
251 }
252
253 static void netx_eth_timeout(struct net_device *ndev)
254 {
255 struct netx_eth_priv *priv = netdev_priv(ndev);
256 int i;
257
258 printk(KERN_ERR "%s: transmit timed out, resetting\n", ndev->name);
259
260 spin_lock_irq(&priv->lock);
261
262 xc_reset(priv->xc);
263 xc_start(priv->xc);
264
265 for (i=2; i<=18; i++)
266 pfifo_push(EMPTY_PTR_FIFO(priv->id),
267 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
268
269 spin_unlock_irq(&priv->lock);
270
271 netif_wake_queue(ndev);
272 }
273
274 static int
275 netx_eth_phy_read(struct net_device *ndev, int phy_id, int reg)
276 {
277 unsigned int val;
278
279 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
280 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES;
281
282 writel(val, NETX_MIIMU);
283 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
284
285 return readl(NETX_MIIMU) >> 16;
286
287 }
288
289 static void
290 netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value)
291 {
292 unsigned int val;
293
294 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
295 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES | MIIMU_OPMODE_WRITE |
296 MIIMU_DATA(value);
297
298 writel(val, NETX_MIIMU);
299 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
300 }
301
302 static const struct net_device_ops netx_eth_netdev_ops = {
303 .ndo_open = netx_eth_open,
304 .ndo_stop = netx_eth_close,
305 .ndo_start_xmit = netx_eth_hard_start_xmit,
306 .ndo_tx_timeout = netx_eth_timeout,
307 .ndo_set_rx_mode = netx_eth_set_multicast_list,
308 .ndo_change_mtu = eth_change_mtu,
309 .ndo_validate_addr = eth_validate_addr,
310 .ndo_set_mac_address = eth_mac_addr,
311 };
312
313 static int netx_eth_enable(struct net_device *ndev)
314 {
315 struct netx_eth_priv *priv = netdev_priv(ndev);
316 unsigned int mac4321, mac65;
317 int running, i;
318
319 ether_setup(ndev);
320
321 ndev->netdev_ops = &netx_eth_netdev_ops;
322 ndev->watchdog_timeo = msecs_to_jiffies(5000);
323
324 priv->msg_enable = NETIF_MSG_LINK;
325 priv->mii.phy_id_mask = 0x1f;
326 priv->mii.reg_num_mask = 0x1f;
327 priv->mii.force_media = 0;
328 priv->mii.full_duplex = 0;
329 priv->mii.dev = ndev;
330 priv->mii.mdio_read = netx_eth_phy_read;
331 priv->mii.mdio_write = netx_eth_phy_write;
332 priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
333
334 running = xc_running(priv->xc);
335 xc_stop(priv->xc);
336
337 /* if the xc engine is already running, assume the bootloader has
338 * loaded the firmware for us
339 */
340 if (running) {
341 /* get Node Address from hardware */
342 mac4321 = readl(priv->xpec_base +
343 NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
344 mac65 = readl(priv->xpec_base +
345 NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
346
347 ndev->dev_addr[0] = mac4321 & 0xff;
348 ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
349 ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
350 ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
351 ndev->dev_addr[4] = mac65 & 0xff;
352 ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
353 } else {
354 if (xc_request_firmware(priv->xc)) {
355 printk(CARDNAME ": requesting firmware failed\n");
356 return -ENODEV;
357 }
358 }
359
360 xc_reset(priv->xc);
361 xc_start(priv->xc);
362
363 if (!is_valid_ether_addr(ndev->dev_addr))
364 printk("%s: Invalid ethernet MAC address. Please "
365 "set using ifconfig\n", ndev->name);
366
367 for (i=2; i<=18; i++)
368 pfifo_push(EMPTY_PTR_FIFO(priv->id),
369 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
370
371 return register_netdev(ndev);
372
373 }
374
375 static int netx_eth_drv_probe(struct platform_device *pdev)
376 {
377 struct netx_eth_priv *priv;
378 struct net_device *ndev;
379 struct netxeth_platform_data *pdata;
380 int ret;
381
382 ndev = alloc_etherdev(sizeof (struct netx_eth_priv));
383 if (!ndev) {
384 ret = -ENOMEM;
385 goto exit;
386 }
387 SET_NETDEV_DEV(ndev, &pdev->dev);
388
389 platform_set_drvdata(pdev, ndev);
390
391 priv = netdev_priv(ndev);
392
393 pdata = (struct netxeth_platform_data *)pdev->dev.platform_data;
394 priv->xc = request_xc(pdata->xcno, &pdev->dev);
395 if (!priv->xc) {
396 dev_err(&pdev->dev, "unable to request xc engine\n");
397 ret = -ENODEV;
398 goto exit_free_netdev;
399 }
400
401 ndev->irq = priv->xc->irq;
402 priv->id = pdev->id;
403 priv->xpec_base = priv->xc->xpec_base;
404 priv->xmac_base = priv->xc->xmac_base;
405 priv->sram_base = priv->xc->sram_base;
406
407 spin_lock_init(&priv->lock);
408
409 ret = pfifo_request(PFIFO_MASK(priv->id));
410 if (ret) {
411 printk("unable to request PFIFO\n");
412 goto exit_free_xc;
413 }
414
415 ret = netx_eth_enable(ndev);
416 if (ret)
417 goto exit_free_pfifo;
418
419 return 0;
420 exit_free_pfifo:
421 pfifo_free(PFIFO_MASK(priv->id));
422 exit_free_xc:
423 free_xc(priv->xc);
424 exit_free_netdev:
425 free_netdev(ndev);
426 exit:
427 return ret;
428 }
429
430 static int netx_eth_drv_remove(struct platform_device *pdev)
431 {
432 struct net_device *ndev = platform_get_drvdata(pdev);
433 struct netx_eth_priv *priv = netdev_priv(ndev);
434
435 unregister_netdev(ndev);
436 xc_stop(priv->xc);
437 free_xc(priv->xc);
438 free_netdev(ndev);
439 pfifo_free(PFIFO_MASK(priv->id));
440
441 return 0;
442 }
443
444 static int netx_eth_drv_suspend(struct platform_device *pdev, pm_message_t state)
445 {
446 dev_err(&pdev->dev, "suspend not implemented\n");
447 return 0;
448 }
449
450 static int netx_eth_drv_resume(struct platform_device *pdev)
451 {
452 dev_err(&pdev->dev, "resume not implemented\n");
453 return 0;
454 }
455
456 static struct platform_driver netx_eth_driver = {
457 .probe = netx_eth_drv_probe,
458 .remove = netx_eth_drv_remove,
459 .suspend = netx_eth_drv_suspend,
460 .resume = netx_eth_drv_resume,
461 .driver = {
462 .name = CARDNAME,
463 .owner = THIS_MODULE,
464 },
465 };
466
467 static int __init netx_eth_init(void)
468 {
469 unsigned int phy_control, val;
470
471 printk("NetX Ethernet driver\n");
472
473 phy_control = PHY_CONTROL_PHY_ADDRESS(INTERNAL_PHY_ADR>>1) |
474 PHY_CONTROL_PHY1_MODE(PHY_MODE_ALL) |
475 PHY_CONTROL_PHY1_AUTOMDIX |
476 PHY_CONTROL_PHY1_EN |
477 PHY_CONTROL_PHY0_MODE(PHY_MODE_ALL) |
478 PHY_CONTROL_PHY0_AUTOMDIX |
479 PHY_CONTROL_PHY0_EN |
480 PHY_CONTROL_CLK_XLATIN;
481
482 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
483 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
484
485 writel(phy_control | PHY_CONTROL_RESET, NETX_SYSTEM_PHY_CONTROL);
486 udelay(100);
487
488 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
489 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
490
491 writel(phy_control, NETX_SYSTEM_PHY_CONTROL);
492
493 return platform_driver_register(&netx_eth_driver);
494 }
495
496 static void __exit netx_eth_cleanup(void)
497 {
498 platform_driver_unregister(&netx_eth_driver);
499 }
500
501 module_init(netx_eth_init);
502 module_exit(netx_eth_cleanup);
503
504 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
505 MODULE_LICENSE("GPL");
506 MODULE_ALIAS("platform:" CARDNAME);
507 MODULE_FIRMWARE("xc0.bin");
508 MODULE_FIRMWARE("xc1.bin");
509 MODULE_FIRMWARE("xc2.bin");
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