drivers/net/ethernet/qlogic/netxen/netxen_nic_hw.h

   1 /*
   2  * Copyright (C) 2003 - 2009 NetXen, Inc.
   3  * Copyright (C) 2009 - QLogic Corporation.
   4  * All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful, but
  12  * WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  18  *
  19  * The full GNU General Public License is included in this distribution
  20  * in the file called "COPYING".
  21  *
  22  */
  23
  24 #ifndef __NETXEN_NIC_HW_H_
  25 #define __NETXEN_NIC_HW_H_
  26
  27 /* Hardware memory size of 128 meg */
  28 #define NETXEN_MEMADDR_MAX (128 * 1024 * 1024)
  29
  30 struct netxen_adapter;
  31
  32 #define NETXEN_PCI_MAPSIZE_BYTES  (NETXEN_PCI_MAPSIZE << 20)
  33
  34 void netxen_nic_set_link_parameters(struct netxen_adapter *adapter);
  35
  36 /* Nibble or Byte mode for phy interface (GbE mode only) */
  37
  38 #define _netxen_crb_get_bit(var, bit)  ((var >> bit) & 0x1)
  39
  40 /*
  41  * NIU GB MAC Config Register 0 (applies to GB0, GB1, GB2, GB3)
  42  *
  43  *      Bit 0 : enable_tx => 1:enable frame xmit, 0:disable
  44  *      Bit 1 : tx_synced => R/O: xmit enable synched to xmit stream
  45  *      Bit 2 : enable_rx => 1:enable frame recv, 0:disable
  46  *      Bit 3 : rx_synced => R/O: recv enable synched to recv stream
  47  *      Bit 4 : tx_flowctl => 1:enable pause frame generation, 0:disable
  48  *      Bit 5 : rx_flowctl => 1:act on recv'd pause frames, 0:ignore
  49  *      Bit 8 : loopback => 1:loop MAC xmits to MAC recvs, 0:normal
  50  *      Bit 16: tx_reset_pb => 1:reset frame xmit protocol blk, 0:no-op
  51  *      Bit 17: rx_reset_pb => 1:reset frame recv protocol blk, 0:no-op
  52  *      Bit 18: tx_reset_mac => 1:reset data/ctl multiplexer blk, 0:no-op
  53  *      Bit 19: rx_reset_mac => 1:reset ctl frames & timers blk, 0:no-op
  54  *      Bit 31: soft_reset => 1:reset the MAC and the SERDES, 0:no-op
  55  */
  56
  57 #define netxen_gb_tx_flowctl(config_word)       \
  58         ((config_word) |= 1 << 4)
  59 #define netxen_gb_rx_flowctl(config_word)       \
  60         ((config_word) |= 1 << 5)
  61 #define netxen_gb_tx_reset_pb(config_word)      \
  62         ((config_word) |= 1 << 16)
  63 #define netxen_gb_rx_reset_pb(config_word)      \
  64         ((config_word) |= 1 << 17)
  65 #define netxen_gb_tx_reset_mac(config_word)     \
  66         ((config_word) |= 1 << 18)
  67 #define netxen_gb_rx_reset_mac(config_word)     \
  68         ((config_word) |= 1 << 19)
  69
  70 #define netxen_gb_unset_tx_flowctl(config_word) \
  71         ((config_word) &= ~(1 << 4))
  72 #define netxen_gb_unset_rx_flowctl(config_word) \
  73         ((config_word) &= ~(1 << 5))
  74
  75 #define netxen_gb_get_tx_synced(config_word)    \
  76                 _netxen_crb_get_bit((config_word), 1)
  77 #define netxen_gb_get_rx_synced(config_word)    \
  78                 _netxen_crb_get_bit((config_word), 3)
  79 #define netxen_gb_get_tx_flowctl(config_word)   \
  80                 _netxen_crb_get_bit((config_word), 4)
  81 #define netxen_gb_get_rx_flowctl(config_word)   \
  82                 _netxen_crb_get_bit((config_word), 5)
  83 #define netxen_gb_get_soft_reset(config_word)   \
  84                 _netxen_crb_get_bit((config_word), 31)
  85
  86 #define netxen_gb_get_stationaddress_low(config_word) ((config_word) >> 16)
  87
  88 #define netxen_gb_set_mii_mgmt_clockselect(config_word, val)    \
  89                 ((config_word) |= ((val) & 0x07))
  90 #define netxen_gb_mii_mgmt_reset(config_word)   \
  91                 ((config_word) |= 1 << 31)
  92 #define netxen_gb_mii_mgmt_unset(config_word)   \
  93                 ((config_word) &= ~(1 << 31))
  94
  95 /*
  96  * NIU GB MII Mgmt Command Register (applies to GB0, GB1, GB2, GB3)
  97  * Bit 0 : read_cycle => 1:perform single read cycle, 0:no-op
  98  * Bit 1 : scan_cycle => 1:perform continuous read cycles, 0:no-op
  99  */
 100
 101 #define netxen_gb_mii_mgmt_set_read_cycle(config_word)  \
 102                 ((config_word) |= 1 << 0)
 103 #define netxen_gb_mii_mgmt_reg_addr(config_word, val)   \
 104                 ((config_word) |= ((val) & 0x1F))
 105 #define netxen_gb_mii_mgmt_phy_addr(config_word, val)   \
 106                 ((config_word) |= (((val) & 0x1F) << 8))
 107
 108 /*
 109  * NIU GB MII Mgmt Indicators Register (applies to GB0, GB1, GB2, GB3)
 110  * Read-only register.
 111  * Bit 0 : busy => 1:performing an MII mgmt cycle, 0:idle
 112  * Bit 1 : scanning => 1:scan operation in progress, 0:idle
 113  * Bit 2 : notvalid => :mgmt result data not yet valid, 0:idle
 114  */
 115 #define netxen_get_gb_mii_mgmt_busy(config_word)        \
 116                 _netxen_crb_get_bit(config_word, 0)
 117 #define netxen_get_gb_mii_mgmt_scanning(config_word)    \
 118                 _netxen_crb_get_bit(config_word, 1)
 119 #define netxen_get_gb_mii_mgmt_notvalid(config_word)    \
 120                 _netxen_crb_get_bit(config_word, 2)
 121 /*
 122  * NIU XG Pause Ctl Register
 123  *
 124  *      Bit 0       : xg0_mask => 1:disable tx pause frames
 125  *      Bit 1       : xg0_request => 1:request single pause frame
 126  *      Bit 2       : xg0_on_off => 1:request is pause on, 0:off
 127  *      Bit 3       : xg1_mask => 1:disable tx pause frames
 128  *      Bit 4       : xg1_request => 1:request single pause frame
 129  *      Bit 5       : xg1_on_off => 1:request is pause on, 0:off
 130  */
 131
 132 #define netxen_xg_set_xg0_mask(config_word)    \
 133         ((config_word) |= 1 << 0)
 134 #define netxen_xg_set_xg1_mask(config_word)    \
 135         ((config_word) |= 1 << 3)
 136
 137 #define netxen_xg_get_xg0_mask(config_word)    \
 138         _netxen_crb_get_bit((config_word), 0)
 139 #define netxen_xg_get_xg1_mask(config_word)    \
 140         _netxen_crb_get_bit((config_word), 3)
 141
 142 #define netxen_xg_unset_xg0_mask(config_word)  \
 143         ((config_word) &= ~(1 << 0))
 144 #define netxen_xg_unset_xg1_mask(config_word)  \
 145         ((config_word) &= ~(1 << 3))
 146
 147 /*
 148  * NIU XG Pause Ctl Register
 149  *
 150  *      Bit 0       : xg0_mask => 1:disable tx pause frames
 151  *      Bit 1       : xg0_request => 1:request single pause frame
 152  *      Bit 2       : xg0_on_off => 1:request is pause on, 0:off
 153  *      Bit 3       : xg1_mask => 1:disable tx pause frames
 154  *      Bit 4       : xg1_request => 1:request single pause frame
 155  *      Bit 5       : xg1_on_off => 1:request is pause on, 0:off
 156  */
 157 #define netxen_gb_set_gb0_mask(config_word)    \
 158         ((config_word) |= 1 << 0)
 159 #define netxen_gb_set_gb1_mask(config_word)    \
 160         ((config_word) |= 1 << 2)
 161 #define netxen_gb_set_gb2_mask(config_word)    \
 162         ((config_word) |= 1 << 4)
 163 #define netxen_gb_set_gb3_mask(config_word)    \
 164         ((config_word) |= 1 << 6)
 165
 166 #define netxen_gb_get_gb0_mask(config_word)    \
 167         _netxen_crb_get_bit((config_word), 0)
 168 #define netxen_gb_get_gb1_mask(config_word)    \
 169         _netxen_crb_get_bit((config_word), 2)
 170 #define netxen_gb_get_gb2_mask(config_word)    \
 171         _netxen_crb_get_bit((config_word), 4)
 172 #define netxen_gb_get_gb3_mask(config_word)    \
 173         _netxen_crb_get_bit((config_word), 6)
 174
 175 #define netxen_gb_unset_gb0_mask(config_word)  \
 176         ((config_word) &= ~(1 << 0))
 177 #define netxen_gb_unset_gb1_mask(config_word)  \
 178         ((config_word) &= ~(1 << 2))
 179 #define netxen_gb_unset_gb2_mask(config_word)  \
 180         ((config_word) &= ~(1 << 4))
 181 #define netxen_gb_unset_gb3_mask(config_word)  \
 182         ((config_word) &= ~(1 << 6))
 183
 184
 185 /*
 186  * PHY-Specific MII control/status registers.
 187  */
 188 #define NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL             0
 189 #define NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS              1
 190 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0            2
 191 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1            3
 192 #define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG             4
 193 #define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART             5
 194 #define NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE        6
 195 #define NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT       7
 196 #define NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE    8
 197 #define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL      9
 198 #define NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS       10
 199 #define NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS     15
 200 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL         16
 201 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS          17
 202 #define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE          18
 203 #define NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS          19
 204 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE    20
 205 #define NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT    21
 206 #define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL         24
 207 #define NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE        25
 208 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET        26
 209 #define NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE     27
 210
 211 /*
 212  * PHY-Specific Status Register (reg 17).
 213  *
 214  * Bit 0      : jabber => 1:jabber detected, 0:not
 215  * Bit 1      : polarity => 1:polarity reversed, 0:normal
 216  * Bit 2      : recvpause => 1:receive pause enabled, 0:disabled
 217  * Bit 3      : xmitpause => 1:transmit pause enabled, 0:disabled
 218  * Bit 4      : energydetect => 1:sleep, 0:active
 219  * Bit 5      : downshift => 1:downshift, 0:no downshift
 220  * Bit 6      : crossover => 1:MDIX (crossover), 0:MDI (no crossover)
 221  * Bits 7-9   : cablelen => not valid in 10Mb/s mode
 222  *                      0:<50m, 1:50-80m, 2:80-110m, 3:110-140m, 4:>140m
 223  * Bit 10     : link => 1:link up, 0:link down
 224  * Bit 11     : resolved => 1:speed and duplex resolved, 0:not yet
 225  * Bit 12     : pagercvd => 1:page received, 0:page not received
 226  * Bit 13     : duplex => 1:full duplex, 0:half duplex
 227  * Bits 14-15 : speed => 0:10Mb/s, 1:100Mb/s, 2:1000Mb/s, 3:rsvd
 228  */
 229
 230 #define netxen_get_phy_speed(config_word) (((config_word) >> 14) & 0x03)
 231
 232 #define netxen_set_phy_speed(config_word, val)  \
 233                 ((config_word) |= ((val & 0x03) << 14))
 234 #define netxen_set_phy_duplex(config_word)      \
 235                 ((config_word) |= 1 << 13)
 236 #define netxen_clear_phy_duplex(config_word)    \
 237                 ((config_word) &= ~(1 << 13))
 238
 239 #define netxen_get_phy_link(config_word)        \
 240                 _netxen_crb_get_bit(config_word, 10)
 241 #define netxen_get_phy_duplex(config_word)      \
 242                 _netxen_crb_get_bit(config_word, 13)
 243
 244 /*
 245  * NIU Mode Register.
 246  * Bit 0 : enable FibreChannel
 247  * Bit 1 : enable 10/100/1000 Ethernet
 248  * Bit 2 : enable 10Gb Ethernet
 249  */
 250
 251 #define netxen_get_niu_enable_ge(config_word)   \
 252                 _netxen_crb_get_bit(config_word, 1)
 253
 254 #define NETXEN_NIU_NON_PROMISC_MODE     0
 255 #define NETXEN_NIU_PROMISC_MODE         1
 256 #define NETXEN_NIU_ALLMULTI_MODE        2
 257
 258 /*
 259  * NIU XG MAC Config Register
 260  *
 261  * Bit 0 : tx_enable => 1:enable frame xmit, 0:disable
 262  * Bit 2 : rx_enable => 1:enable frame recv, 0:disable
 263  * Bit 4 : soft_reset => 1:reset the MAC , 0:no-op
 264  * Bit 27: xaui_framer_reset
 265  * Bit 28: xaui_rx_reset
 266  * Bit 29: xaui_tx_reset
 267  * Bit 30: xg_ingress_afifo_reset
 268  * Bit 31: xg_egress_afifo_reset
 269  */
 270
 271 #define netxen_xg_soft_reset(config_word)       \
 272                 ((config_word) |= 1 << 4)
 273
 274 typedef struct {
 275         unsigned valid;
 276         unsigned start_128M;
 277         unsigned end_128M;
 278         unsigned start_2M;
 279 } crb_128M_2M_sub_block_map_t;
 280
 281 typedef struct {
 282         crb_128M_2M_sub_block_map_t sub_block[16];
 283 } crb_128M_2M_block_map_t;
 284
 285 #endif                          /* __NETXEN_NIC_HW_H_ */