1 /* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
9 #include <linux/stddef.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/version.h>
14 #include <linux/delay.h>
15 #include <asm/byteorder.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/string.h>
18 #include <linux/module.h>
19 #include <linux/interrupt.h>
20 #include <linux/workqueue.h>
21 #include <linux/ethtool.h>
22 #include <linux/etherdevice.h>
23 #include <linux/vmalloc.h>
24 #include <linux/qed/qed_if.h>
28 #include "qed_dev_api.h"
32 static const char version
[] =
33 "QLogic QL4xxx 40G/100G Ethernet Driver qed " DRV_MODULE_VERSION
"\n";
35 MODULE_DESCRIPTION("QLogic 25G/40G/50G/100G Core Module");
36 MODULE_LICENSE("GPL");
37 MODULE_VERSION(DRV_MODULE_VERSION
);
39 #define FW_FILE_VERSION \
40 __stringify(FW_MAJOR_VERSION) "." \
41 __stringify(FW_MINOR_VERSION) "." \
42 __stringify(FW_REVISION_VERSION) "." \
43 __stringify(FW_ENGINEERING_VERSION)
45 #define QED_FW_FILE_NAME \
46 "qed/qed_init_values_zipped-" FW_FILE_VERSION ".bin"
48 static int __init
qed_init(void)
50 pr_notice("qed_init called\n");
52 pr_info("%s", version
);
57 static void __exit
qed_cleanup(void)
59 pr_notice("qed_cleanup called\n");
62 module_init(qed_init
);
63 module_exit(qed_cleanup
);
65 /* Check if the DMA controller on the machine can properly handle the DMA
66 * addressing required by the device.
68 static int qed_set_coherency_mask(struct qed_dev
*cdev
)
70 struct device
*dev
= &cdev
->pdev
->dev
;
72 if (dma_set_mask(dev
, DMA_BIT_MASK(64)) == 0) {
73 if (dma_set_coherent_mask(dev
, DMA_BIT_MASK(64)) != 0) {
75 "Can't request 64-bit consistent allocations\n");
78 } else if (dma_set_mask(dev
, DMA_BIT_MASK(32)) != 0) {
79 DP_NOTICE(cdev
, "Can't request 64b/32b DMA addresses\n");
86 static void qed_free_pci(struct qed_dev
*cdev
)
88 struct pci_dev
*pdev
= cdev
->pdev
;
91 iounmap(cdev
->doorbells
);
93 iounmap(cdev
->regview
);
94 if (atomic_read(&pdev
->enable_cnt
) == 1)
95 pci_release_regions(pdev
);
97 pci_disable_device(pdev
);
100 /* Performs PCI initializations as well as initializing PCI-related parameters
101 * in the device structrue. Returns 0 in case of success.
103 static int qed_init_pci(struct qed_dev
*cdev
,
104 struct pci_dev
*pdev
)
110 rc
= pci_enable_device(pdev
);
112 DP_NOTICE(cdev
, "Cannot enable PCI device\n");
116 if (!(pci_resource_flags(pdev
, 0) & IORESOURCE_MEM
)) {
117 DP_NOTICE(cdev
, "No memory region found in bar #0\n");
122 if (!(pci_resource_flags(pdev
, 2) & IORESOURCE_MEM
)) {
123 DP_NOTICE(cdev
, "No memory region found in bar #2\n");
128 if (atomic_read(&pdev
->enable_cnt
) == 1) {
129 rc
= pci_request_regions(pdev
, "qed");
132 "Failed to request PCI memory resources\n");
135 pci_set_master(pdev
);
136 pci_save_state(pdev
);
139 if (!pci_is_pcie(pdev
)) {
140 DP_NOTICE(cdev
, "The bus is not PCI Express\n");
145 cdev
->pci_params
.pm_cap
= pci_find_capability(pdev
, PCI_CAP_ID_PM
);
146 if (cdev
->pci_params
.pm_cap
== 0)
147 DP_NOTICE(cdev
, "Cannot find power management capability\n");
149 rc
= qed_set_coherency_mask(cdev
);
153 cdev
->pci_params
.mem_start
= pci_resource_start(pdev
, 0);
154 cdev
->pci_params
.mem_end
= pci_resource_end(pdev
, 0);
155 cdev
->pci_params
.irq
= pdev
->irq
;
157 cdev
->regview
= pci_ioremap_bar(pdev
, 0);
158 if (!cdev
->regview
) {
159 DP_NOTICE(cdev
, "Cannot map register space, aborting\n");
164 cdev
->db_phys_addr
= pci_resource_start(cdev
->pdev
, 2);
165 cdev
->db_size
= pci_resource_len(cdev
->pdev
, 2);
166 cdev
->doorbells
= ioremap_wc(cdev
->db_phys_addr
, cdev
->db_size
);
167 if (!cdev
->doorbells
) {
168 DP_NOTICE(cdev
, "Cannot map doorbell space\n");
175 pci_release_regions(pdev
);
177 pci_disable_device(pdev
);
182 int qed_fill_dev_info(struct qed_dev
*cdev
,
183 struct qed_dev_info
*dev_info
)
187 memset(dev_info
, 0, sizeof(struct qed_dev_info
));
189 dev_info
->num_hwfns
= cdev
->num_hwfns
;
190 dev_info
->pci_mem_start
= cdev
->pci_params
.mem_start
;
191 dev_info
->pci_mem_end
= cdev
->pci_params
.mem_end
;
192 dev_info
->pci_irq
= cdev
->pci_params
.irq
;
193 dev_info
->is_mf
= IS_MF(&cdev
->hwfns
[0]);
194 ether_addr_copy(dev_info
->hw_mac
, cdev
->hwfns
[0].hw_info
.hw_mac_addr
);
196 dev_info
->fw_major
= FW_MAJOR_VERSION
;
197 dev_info
->fw_minor
= FW_MINOR_VERSION
;
198 dev_info
->fw_rev
= FW_REVISION_VERSION
;
199 dev_info
->fw_eng
= FW_ENGINEERING_VERSION
;
200 dev_info
->mf_mode
= cdev
->mf_mode
;
202 qed_mcp_get_mfw_ver(cdev
, &dev_info
->mfw_rev
);
204 ptt
= qed_ptt_acquire(QED_LEADING_HWFN(cdev
));
206 qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev
), ptt
,
207 &dev_info
->flash_size
);
209 qed_ptt_release(QED_LEADING_HWFN(cdev
), ptt
);
215 static void qed_free_cdev(struct qed_dev
*cdev
)
220 static struct qed_dev
*qed_alloc_cdev(struct pci_dev
*pdev
)
222 struct qed_dev
*cdev
;
224 cdev
= kzalloc(sizeof(*cdev
), GFP_KERNEL
);
228 qed_init_struct(cdev
);
233 /* Sets the requested power state */
234 static int qed_set_power_state(struct qed_dev
*cdev
,
240 DP_VERBOSE(cdev
, NETIF_MSG_DRV
, "Omitting Power state change\n");
245 static struct qed_dev
*qed_probe(struct pci_dev
*pdev
,
246 enum qed_protocol protocol
,
250 struct qed_dev
*cdev
;
253 cdev
= qed_alloc_cdev(pdev
);
257 cdev
->protocol
= protocol
;
259 qed_init_dp(cdev
, dp_module
, dp_level
);
261 rc
= qed_init_pci(cdev
, pdev
);
263 DP_ERR(cdev
, "init pci failed\n");
266 DP_INFO(cdev
, "PCI init completed successfully\n");
268 rc
= qed_hw_prepare(cdev
, QED_PCI_DEFAULT
);
270 DP_ERR(cdev
, "hw prepare failed\n");
274 DP_INFO(cdev
, "qed_probe completed successffuly\n");
286 static void qed_remove(struct qed_dev
*cdev
)
295 qed_set_power_state(cdev
, PCI_D3hot
);
300 static void qed_disable_msix(struct qed_dev
*cdev
)
302 if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_MSIX
) {
303 pci_disable_msix(cdev
->pdev
);
304 kfree(cdev
->int_params
.msix_table
);
305 } else if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_MSI
) {
306 pci_disable_msi(cdev
->pdev
);
309 memset(&cdev
->int_params
.out
, 0, sizeof(struct qed_int_param
));
312 static int qed_enable_msix(struct qed_dev
*cdev
,
313 struct qed_int_params
*int_params
)
317 cnt
= int_params
->in
.num_vectors
;
319 for (i
= 0; i
< cnt
; i
++)
320 int_params
->msix_table
[i
].entry
= i
;
322 rc
= pci_enable_msix_range(cdev
->pdev
, int_params
->msix_table
,
323 int_params
->in
.min_msix_cnt
, cnt
);
324 if (rc
< cnt
&& rc
>= int_params
->in
.min_msix_cnt
&&
325 (rc
% cdev
->num_hwfns
)) {
326 pci_disable_msix(cdev
->pdev
);
328 /* If fastpath is initialized, we need at least one interrupt
329 * per hwfn [and the slow path interrupts]. New requested number
330 * should be a multiple of the number of hwfns.
332 cnt
= (rc
/ cdev
->num_hwfns
) * cdev
->num_hwfns
;
334 "Trying to enable MSI-X with less vectors (%d out of %d)\n",
335 cnt
, int_params
->in
.num_vectors
);
336 rc
= pci_enable_msix_exact(cdev
->pdev
,
337 int_params
->msix_table
, cnt
);
343 /* MSI-x configuration was achieved */
344 int_params
->out
.int_mode
= QED_INT_MODE_MSIX
;
345 int_params
->out
.num_vectors
= rc
;
349 "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
356 /* This function outputs the int mode and the number of enabled msix vector */
357 static int qed_set_int_mode(struct qed_dev
*cdev
, bool force_mode
)
359 struct qed_int_params
*int_params
= &cdev
->int_params
;
360 struct msix_entry
*tbl
;
363 switch (int_params
->in
.int_mode
) {
364 case QED_INT_MODE_MSIX
:
365 /* Allocate MSIX table */
366 cnt
= int_params
->in
.num_vectors
;
367 int_params
->msix_table
= kcalloc(cnt
, sizeof(*tbl
), GFP_KERNEL
);
368 if (!int_params
->msix_table
) {
374 rc
= qed_enable_msix(cdev
, int_params
);
378 DP_NOTICE(cdev
, "Failed to enable MSI-X\n");
379 kfree(int_params
->msix_table
);
384 case QED_INT_MODE_MSI
:
385 rc
= pci_enable_msi(cdev
->pdev
);
387 int_params
->out
.int_mode
= QED_INT_MODE_MSI
;
391 DP_NOTICE(cdev
, "Failed to enable MSI\n");
396 case QED_INT_MODE_INTA
:
397 int_params
->out
.int_mode
= QED_INT_MODE_INTA
;
401 DP_NOTICE(cdev
, "Unknown int_mode value %d\n",
402 int_params
->in
.int_mode
);
407 cdev
->int_coalescing_mode
= QED_COAL_MODE_ENABLE
;
412 static void qed_simd_handler_config(struct qed_dev
*cdev
, void *token
,
413 int index
, void(*handler
)(void *))
415 struct qed_hwfn
*hwfn
= &cdev
->hwfns
[index
% cdev
->num_hwfns
];
416 int relative_idx
= index
/ cdev
->num_hwfns
;
418 hwfn
->simd_proto_handler
[relative_idx
].func
= handler
;
419 hwfn
->simd_proto_handler
[relative_idx
].token
= token
;
422 static void qed_simd_handler_clean(struct qed_dev
*cdev
, int index
)
424 struct qed_hwfn
*hwfn
= &cdev
->hwfns
[index
% cdev
->num_hwfns
];
425 int relative_idx
= index
/ cdev
->num_hwfns
;
427 memset(&hwfn
->simd_proto_handler
[relative_idx
], 0,
428 sizeof(struct qed_simd_fp_handler
));
431 static irqreturn_t
qed_msix_sp_int(int irq
, void *tasklet
)
433 tasklet_schedule((struct tasklet_struct
*)tasklet
);
437 static irqreturn_t
qed_single_int(int irq
, void *dev_instance
)
439 struct qed_dev
*cdev
= (struct qed_dev
*)dev_instance
;
440 struct qed_hwfn
*hwfn
;
441 irqreturn_t rc
= IRQ_NONE
;
445 for (i
= 0; i
< cdev
->num_hwfns
; i
++) {
446 status
= qed_int_igu_read_sisr_reg(&cdev
->hwfns
[i
]);
451 hwfn
= &cdev
->hwfns
[i
];
453 /* Slowpath interrupt */
454 if (unlikely(status
& 0x1)) {
455 tasklet_schedule(hwfn
->sp_dpc
);
460 /* Fastpath interrupts */
461 for (j
= 0; j
< 64; j
++) {
462 if ((0x2ULL
<< j
) & status
) {
463 hwfn
->simd_proto_handler
[j
].func(
464 hwfn
->simd_proto_handler
[j
].token
);
465 status
&= ~(0x2ULL
<< j
);
470 if (unlikely(status
))
471 DP_VERBOSE(hwfn
, NETIF_MSG_INTR
,
472 "got an unknown interrupt status 0x%llx\n",
479 int qed_slowpath_irq_req(struct qed_hwfn
*hwfn
)
481 struct qed_dev
*cdev
= hwfn
->cdev
;
485 if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_MSIX
) {
487 snprintf(hwfn
->name
, NAME_SIZE
, "sp-%d-%02x:%02x.%02x",
488 id
, cdev
->pdev
->bus
->number
,
489 PCI_SLOT(cdev
->pdev
->devfn
), hwfn
->abs_pf_id
);
490 rc
= request_irq(cdev
->int_params
.msix_table
[id
].vector
,
491 qed_msix_sp_int
, 0, hwfn
->name
, hwfn
->sp_dpc
);
493 DP_VERBOSE(hwfn
, (NETIF_MSG_INTR
| QED_MSG_SP
),
494 "Requested slowpath MSI-X\n");
496 unsigned long flags
= 0;
498 snprintf(cdev
->name
, NAME_SIZE
, "%02x:%02x.%02x",
499 cdev
->pdev
->bus
->number
, PCI_SLOT(cdev
->pdev
->devfn
),
500 PCI_FUNC(cdev
->pdev
->devfn
));
502 if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_INTA
)
503 flags
|= IRQF_SHARED
;
505 rc
= request_irq(cdev
->pdev
->irq
, qed_single_int
,
506 flags
, cdev
->name
, cdev
);
512 static void qed_slowpath_irq_free(struct qed_dev
*cdev
)
516 if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_MSIX
) {
517 for_each_hwfn(cdev
, i
) {
518 if (!cdev
->hwfns
[i
].b_int_requested
)
520 synchronize_irq(cdev
->int_params
.msix_table
[i
].vector
);
521 free_irq(cdev
->int_params
.msix_table
[i
].vector
,
522 cdev
->hwfns
[i
].sp_dpc
);
525 if (QED_LEADING_HWFN(cdev
)->b_int_requested
)
526 free_irq(cdev
->pdev
->irq
, cdev
);
528 qed_int_disable_post_isr_release(cdev
);
531 static int qed_nic_stop(struct qed_dev
*cdev
)
535 rc
= qed_hw_stop(cdev
);
537 for (i
= 0; i
< cdev
->num_hwfns
; i
++) {
538 struct qed_hwfn
*p_hwfn
= &cdev
->hwfns
[i
];
540 if (p_hwfn
->b_sp_dpc_enabled
) {
541 tasklet_disable(p_hwfn
->sp_dpc
);
542 p_hwfn
->b_sp_dpc_enabled
= false;
543 DP_VERBOSE(cdev
, NETIF_MSG_IFDOWN
,
544 "Disabled sp taskelt [hwfn %d] at %p\n",
552 static int qed_nic_reset(struct qed_dev
*cdev
)
556 rc
= qed_hw_reset(cdev
);
565 static int qed_nic_setup(struct qed_dev
*cdev
)
569 rc
= qed_resc_alloc(cdev
);
573 DP_INFO(cdev
, "Allocated qed resources\n");
575 qed_resc_setup(cdev
);
580 static int qed_set_int_fp(struct qed_dev
*cdev
, u16 cnt
)
584 /* Mark the fastpath as free/used */
585 cdev
->int_params
.fp_initialized
= cnt
? true : false;
587 if (cdev
->int_params
.out
.int_mode
!= QED_INT_MODE_MSIX
)
588 limit
= cdev
->num_hwfns
* 63;
589 else if (cdev
->int_params
.fp_msix_cnt
)
590 limit
= cdev
->int_params
.fp_msix_cnt
;
595 return min_t(int, cnt
, limit
);
598 static int qed_get_int_fp(struct qed_dev
*cdev
, struct qed_int_info
*info
)
600 memset(info
, 0, sizeof(struct qed_int_info
));
602 if (!cdev
->int_params
.fp_initialized
) {
604 "Protocol driver requested interrupt information, but its support is not yet configured\n");
608 /* Need to expose only MSI-X information; Single IRQ is handled solely
611 if (cdev
->int_params
.out
.int_mode
== QED_INT_MODE_MSIX
) {
612 int msix_base
= cdev
->int_params
.fp_msix_base
;
614 info
->msix_cnt
= cdev
->int_params
.fp_msix_cnt
;
615 info
->msix
= &cdev
->int_params
.msix_table
[msix_base
];
621 static int qed_slowpath_setup_int(struct qed_dev
*cdev
,
622 enum qed_int_mode int_mode
)
627 memset(&cdev
->int_params
, 0, sizeof(struct qed_int_params
));
629 cdev
->int_params
.in
.int_mode
= int_mode
;
630 for_each_hwfn(cdev
, i
)
631 num_vectors
+= qed_int_get_num_sbs(&cdev
->hwfns
[i
], NULL
) + 1;
632 cdev
->int_params
.in
.num_vectors
= num_vectors
;
634 /* We want a minimum of one slowpath and one fastpath vector per hwfn */
635 cdev
->int_params
.in
.min_msix_cnt
= cdev
->num_hwfns
* 2;
637 rc
= qed_set_int_mode(cdev
, false);
639 DP_ERR(cdev
, "qed_slowpath_setup_int ERR\n");
643 cdev
->int_params
.fp_msix_base
= cdev
->num_hwfns
;
644 cdev
->int_params
.fp_msix_cnt
= cdev
->int_params
.out
.num_vectors
-
650 u32
qed_unzip_data(struct qed_hwfn
*p_hwfn
, u32 input_len
,
651 u8
*input_buf
, u32 max_size
, u8
*unzip_buf
)
655 p_hwfn
->stream
->next_in
= input_buf
;
656 p_hwfn
->stream
->avail_in
= input_len
;
657 p_hwfn
->stream
->next_out
= unzip_buf
;
658 p_hwfn
->stream
->avail_out
= max_size
;
660 rc
= zlib_inflateInit2(p_hwfn
->stream
, MAX_WBITS
);
663 DP_VERBOSE(p_hwfn
, NETIF_MSG_DRV
, "zlib init failed, rc = %d\n",
668 rc
= zlib_inflate(p_hwfn
->stream
, Z_FINISH
);
669 zlib_inflateEnd(p_hwfn
->stream
);
671 if (rc
!= Z_OK
&& rc
!= Z_STREAM_END
) {
672 DP_VERBOSE(p_hwfn
, NETIF_MSG_DRV
, "FW unzip error: %s, rc=%d\n",
673 p_hwfn
->stream
->msg
, rc
);
677 return p_hwfn
->stream
->total_out
/ 4;
680 static int qed_alloc_stream_mem(struct qed_dev
*cdev
)
685 for_each_hwfn(cdev
, i
) {
686 struct qed_hwfn
*p_hwfn
= &cdev
->hwfns
[i
];
688 p_hwfn
->stream
= kzalloc(sizeof(*p_hwfn
->stream
), GFP_KERNEL
);
692 workspace
= vzalloc(zlib_inflate_workspacesize());
695 p_hwfn
->stream
->workspace
= workspace
;
701 static void qed_free_stream_mem(struct qed_dev
*cdev
)
705 for_each_hwfn(cdev
, i
) {
706 struct qed_hwfn
*p_hwfn
= &cdev
->hwfns
[i
];
711 vfree(p_hwfn
->stream
->workspace
);
712 kfree(p_hwfn
->stream
);
716 static void qed_update_pf_params(struct qed_dev
*cdev
,
717 struct qed_pf_params
*params
)
721 for (i
= 0; i
< cdev
->num_hwfns
; i
++) {
722 struct qed_hwfn
*p_hwfn
= &cdev
->hwfns
[i
];
724 p_hwfn
->pf_params
= *params
;
728 static int qed_slowpath_start(struct qed_dev
*cdev
,
729 struct qed_slowpath_params
*params
)
731 struct qed_mcp_drv_version drv_version
;
732 const u8
*data
= NULL
;
733 struct qed_hwfn
*hwfn
;
736 rc
= request_firmware(&cdev
->firmware
, QED_FW_FILE_NAME
,
740 "Failed to find fw file - /lib/firmware/%s\n",
745 rc
= qed_nic_setup(cdev
);
749 rc
= qed_slowpath_setup_int(cdev
, params
->int_mode
);
753 /* Allocate stream for unzipping */
754 rc
= qed_alloc_stream_mem(cdev
);
756 DP_NOTICE(cdev
, "Failed to allocate stream memory\n");
760 /* Start the slowpath */
761 data
= cdev
->firmware
->data
;
763 rc
= qed_hw_init(cdev
, true, cdev
->int_params
.out
.int_mode
,
769 "HW initialization and function start completed successfully\n");
771 hwfn
= QED_LEADING_HWFN(cdev
);
772 drv_version
.version
= (params
->drv_major
<< 24) |
773 (params
->drv_minor
<< 16) |
774 (params
->drv_rev
<< 8) |
776 strlcpy(drv_version
.name
, params
->name
,
777 MCP_DRV_VER_STR_SIZE
- 4);
778 rc
= qed_mcp_send_drv_version(hwfn
, hwfn
->p_main_ptt
,
781 DP_NOTICE(cdev
, "Failed sending drv version command\n");
788 qed_free_stream_mem(cdev
);
789 qed_slowpath_irq_free(cdev
);
791 qed_disable_msix(cdev
);
795 release_firmware(cdev
->firmware
);
800 static int qed_slowpath_stop(struct qed_dev
*cdev
)
805 qed_free_stream_mem(cdev
);
808 qed_slowpath_irq_free(cdev
);
810 qed_disable_msix(cdev
);
813 release_firmware(cdev
->firmware
);
818 static void qed_set_id(struct qed_dev
*cdev
, char name
[NAME_SIZE
],
819 char ver_str
[VER_SIZE
])
823 memcpy(cdev
->name
, name
, NAME_SIZE
);
824 for_each_hwfn(cdev
, i
)
825 snprintf(cdev
->hwfns
[i
].name
, NAME_SIZE
, "%s-%d", name
, i
);
827 memcpy(cdev
->ver_str
, ver_str
, VER_SIZE
);
828 cdev
->drv_type
= DRV_ID_DRV_TYPE_LINUX
;
831 static u32
qed_sb_init(struct qed_dev
*cdev
,
832 struct qed_sb_info
*sb_info
,
834 dma_addr_t sb_phy_addr
, u16 sb_id
,
835 enum qed_sb_type type
)
837 struct qed_hwfn
*p_hwfn
;
843 /* RoCE uses single engine and CMT uses two engines. When using both
844 * we force only a single engine. Storage uses only engine 0 too.
846 if (type
== QED_SB_TYPE_L2_QUEUE
)
847 n_hwfns
= cdev
->num_hwfns
;
851 hwfn_index
= sb_id
% n_hwfns
;
852 p_hwfn
= &cdev
->hwfns
[hwfn_index
];
853 rel_sb_id
= sb_id
/ n_hwfns
;
855 DP_VERBOSE(cdev
, NETIF_MSG_INTR
,
856 "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
857 hwfn_index
, rel_sb_id
, sb_id
);
859 rc
= qed_int_sb_init(p_hwfn
, p_hwfn
->p_main_ptt
, sb_info
,
860 sb_virt_addr
, sb_phy_addr
, rel_sb_id
);
865 static u32
qed_sb_release(struct qed_dev
*cdev
,
866 struct qed_sb_info
*sb_info
,
869 struct qed_hwfn
*p_hwfn
;
874 hwfn_index
= sb_id
% cdev
->num_hwfns
;
875 p_hwfn
= &cdev
->hwfns
[hwfn_index
];
876 rel_sb_id
= sb_id
/ cdev
->num_hwfns
;
878 DP_VERBOSE(cdev
, NETIF_MSG_INTR
,
879 "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
880 hwfn_index
, rel_sb_id
, sb_id
);
882 rc
= qed_int_sb_release(p_hwfn
, sb_info
, rel_sb_id
);
887 static int qed_set_link(struct qed_dev
*cdev
,
888 struct qed_link_params
*params
)
890 struct qed_hwfn
*hwfn
;
891 struct qed_mcp_link_params
*link_params
;
898 /* The link should be set only once per PF */
899 hwfn
= &cdev
->hwfns
[0];
901 ptt
= qed_ptt_acquire(hwfn
);
905 link_params
= qed_mcp_get_link_params(hwfn
);
906 if (params
->override_flags
& QED_LINK_OVERRIDE_SPEED_AUTONEG
)
907 link_params
->speed
.autoneg
= params
->autoneg
;
908 if (params
->override_flags
& QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS
) {
909 link_params
->speed
.advertised_speeds
= 0;
910 if ((params
->adv_speeds
& SUPPORTED_1000baseT_Half
) ||
911 (params
->adv_speeds
& SUPPORTED_1000baseT_Full
))
912 link_params
->speed
.advertised_speeds
|=
913 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G
;
914 if (params
->adv_speeds
& SUPPORTED_10000baseKR_Full
)
915 link_params
->speed
.advertised_speeds
|=
916 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G
;
917 if (params
->adv_speeds
& SUPPORTED_40000baseLR4_Full
)
918 link_params
->speed
.advertised_speeds
|=
919 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G
;
920 if (params
->adv_speeds
& 0)
921 link_params
->speed
.advertised_speeds
|=
922 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G
;
923 if (params
->adv_speeds
& 0)
924 link_params
->speed
.advertised_speeds
|=
925 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G
;
927 if (params
->override_flags
& QED_LINK_OVERRIDE_SPEED_FORCED_SPEED
)
928 link_params
->speed
.forced_speed
= params
->forced_speed
;
930 rc
= qed_mcp_set_link(hwfn
, ptt
, params
->link_up
);
932 qed_ptt_release(hwfn
, ptt
);
937 static int qed_get_port_type(u32 media_type
)
941 switch (media_type
) {
942 case MEDIA_SFPP_10G_FIBER
:
943 case MEDIA_SFP_1G_FIBER
:
944 case MEDIA_XFP_FIBER
:
946 port_type
= PORT_FIBRE
;
948 case MEDIA_DA_TWINAX
:
954 case MEDIA_NOT_PRESENT
:
955 port_type
= PORT_NONE
;
957 case MEDIA_UNSPECIFIED
:
959 port_type
= PORT_OTHER
;
965 static void qed_fill_link(struct qed_hwfn
*hwfn
,
966 struct qed_link_output
*if_link
)
968 struct qed_mcp_link_params params
;
969 struct qed_mcp_link_state link
;
970 struct qed_mcp_link_capabilities link_caps
;
973 memset(if_link
, 0, sizeof(*if_link
));
975 /* Prepare source inputs */
976 memcpy(¶ms
, qed_mcp_get_link_params(hwfn
), sizeof(params
));
977 memcpy(&link
, qed_mcp_get_link_state(hwfn
), sizeof(link
));
978 memcpy(&link_caps
, qed_mcp_get_link_capabilities(hwfn
),
981 /* Set the link parameters to pass to protocol driver */
983 if_link
->link_up
= true;
985 /* TODO - at the moment assume supported and advertised speed equal */
986 if_link
->supported_caps
= SUPPORTED_FIBRE
;
987 if (params
.speed
.autoneg
)
988 if_link
->supported_caps
|= SUPPORTED_Autoneg
;
989 if (params
.pause
.autoneg
||
990 (params
.pause
.forced_rx
&& params
.pause
.forced_tx
))
991 if_link
->supported_caps
|= SUPPORTED_Asym_Pause
;
992 if (params
.pause
.autoneg
|| params
.pause
.forced_rx
||
993 params
.pause
.forced_tx
)
994 if_link
->supported_caps
|= SUPPORTED_Pause
;
996 if_link
->advertised_caps
= if_link
->supported_caps
;
997 if (params
.speed
.advertised_speeds
&
998 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G
)
999 if_link
->advertised_caps
|= SUPPORTED_1000baseT_Half
|
1000 SUPPORTED_1000baseT_Full
;
1001 if (params
.speed
.advertised_speeds
&
1002 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G
)
1003 if_link
->advertised_caps
|= SUPPORTED_10000baseKR_Full
;
1004 if (params
.speed
.advertised_speeds
&
1005 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G
)
1006 if_link
->advertised_caps
|= SUPPORTED_40000baseLR4_Full
;
1007 if (params
.speed
.advertised_speeds
&
1008 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G
)
1009 if_link
->advertised_caps
|= 0;
1010 if (params
.speed
.advertised_speeds
&
1011 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G
)
1012 if_link
->advertised_caps
|= 0;
1014 if (link_caps
.speed_capabilities
&
1015 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G
)
1016 if_link
->supported_caps
|= SUPPORTED_1000baseT_Half
|
1017 SUPPORTED_1000baseT_Full
;
1018 if (link_caps
.speed_capabilities
&
1019 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G
)
1020 if_link
->supported_caps
|= SUPPORTED_10000baseKR_Full
;
1021 if (link_caps
.speed_capabilities
&
1022 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G
)
1023 if_link
->supported_caps
|= SUPPORTED_40000baseLR4_Full
;
1024 if (link_caps
.speed_capabilities
&
1025 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G
)
1026 if_link
->supported_caps
|= 0;
1027 if (link_caps
.speed_capabilities
&
1028 NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_100G
)
1029 if_link
->supported_caps
|= 0;
1032 if_link
->speed
= link
.speed
;
1034 /* TODO - fill duplex properly */
1035 if_link
->duplex
= DUPLEX_FULL
;
1036 qed_mcp_get_media_type(hwfn
->cdev
, &media_type
);
1037 if_link
->port
= qed_get_port_type(media_type
);
1039 if_link
->autoneg
= params
.speed
.autoneg
;
1041 if (params
.pause
.autoneg
)
1042 if_link
->pause_config
|= QED_LINK_PAUSE_AUTONEG_ENABLE
;
1043 if (params
.pause
.forced_rx
)
1044 if_link
->pause_config
|= QED_LINK_PAUSE_RX_ENABLE
;
1045 if (params
.pause
.forced_tx
)
1046 if_link
->pause_config
|= QED_LINK_PAUSE_TX_ENABLE
;
1048 /* Link partner capabilities */
1049 if (link
.partner_adv_speed
&
1050 QED_LINK_PARTNER_SPEED_1G_HD
)
1051 if_link
->lp_caps
|= SUPPORTED_1000baseT_Half
;
1052 if (link
.partner_adv_speed
&
1053 QED_LINK_PARTNER_SPEED_1G_FD
)
1054 if_link
->lp_caps
|= SUPPORTED_1000baseT_Full
;
1055 if (link
.partner_adv_speed
&
1056 QED_LINK_PARTNER_SPEED_10G
)
1057 if_link
->lp_caps
|= SUPPORTED_10000baseKR_Full
;
1058 if (link
.partner_adv_speed
&
1059 QED_LINK_PARTNER_SPEED_40G
)
1060 if_link
->lp_caps
|= SUPPORTED_40000baseLR4_Full
;
1061 if (link
.partner_adv_speed
&
1062 QED_LINK_PARTNER_SPEED_50G
)
1063 if_link
->lp_caps
|= 0;
1064 if (link
.partner_adv_speed
&
1065 QED_LINK_PARTNER_SPEED_100G
)
1066 if_link
->lp_caps
|= 0;
1068 if (link
.an_complete
)
1069 if_link
->lp_caps
|= SUPPORTED_Autoneg
;
1071 if (link
.partner_adv_pause
)
1072 if_link
->lp_caps
|= SUPPORTED_Pause
;
1073 if (link
.partner_adv_pause
== QED_LINK_PARTNER_ASYMMETRIC_PAUSE
||
1074 link
.partner_adv_pause
== QED_LINK_PARTNER_BOTH_PAUSE
)
1075 if_link
->lp_caps
|= SUPPORTED_Asym_Pause
;
1078 static void qed_get_current_link(struct qed_dev
*cdev
,
1079 struct qed_link_output
*if_link
)
1081 qed_fill_link(&cdev
->hwfns
[0], if_link
);
1084 void qed_link_update(struct qed_hwfn
*hwfn
)
1086 void *cookie
= hwfn
->cdev
->ops_cookie
;
1087 struct qed_common_cb_ops
*op
= hwfn
->cdev
->protocol_ops
.common
;
1088 struct qed_link_output if_link
;
1090 qed_fill_link(hwfn
, &if_link
);
1092 if (IS_LEAD_HWFN(hwfn
) && cookie
)
1093 op
->link_update(cookie
, &if_link
);
1096 static int qed_drain(struct qed_dev
*cdev
)
1098 struct qed_hwfn
*hwfn
;
1099 struct qed_ptt
*ptt
;
1102 for_each_hwfn(cdev
, i
) {
1103 hwfn
= &cdev
->hwfns
[i
];
1104 ptt
= qed_ptt_acquire(hwfn
);
1106 DP_NOTICE(hwfn
, "Failed to drain NIG; No PTT\n");
1109 rc
= qed_mcp_drain(hwfn
, ptt
);
1112 qed_ptt_release(hwfn
, ptt
);
1118 static int qed_set_led(struct qed_dev
*cdev
, enum qed_led_mode mode
)
1120 struct qed_hwfn
*hwfn
= QED_LEADING_HWFN(cdev
);
1121 struct qed_ptt
*ptt
;
1124 ptt
= qed_ptt_acquire(hwfn
);
1128 status
= qed_mcp_set_led(hwfn
, ptt
, mode
);
1130 qed_ptt_release(hwfn
, ptt
);
1135 const struct qed_common_ops qed_common_ops_pass
= {
1136 .probe
= &qed_probe
,
1137 .remove
= &qed_remove
,
1138 .set_power_state
= &qed_set_power_state
,
1139 .set_id
= &qed_set_id
,
1140 .update_pf_params
= &qed_update_pf_params
,
1141 .slowpath_start
= &qed_slowpath_start
,
1142 .slowpath_stop
= &qed_slowpath_stop
,
1143 .set_fp_int
= &qed_set_int_fp
,
1144 .get_fp_int
= &qed_get_int_fp
,
1145 .sb_init
= &qed_sb_init
,
1146 .sb_release
= &qed_sb_release
,
1147 .simd_handler_config
= &qed_simd_handler_config
,
1148 .simd_handler_clean
= &qed_simd_handler_clean
,
1149 .set_link
= &qed_set_link
,
1150 .get_link
= &qed_get_current_link
,
1151 .drain
= &qed_drain
,
1152 .update_msglvl
= &qed_init_dp
,
1153 .chain_alloc
= &qed_chain_alloc
,
1154 .chain_free
= &qed_chain_free
,
1155 .set_led
= &qed_set_led
,
1158 u32
qed_get_protocol_version(enum qed_protocol protocol
)
1161 case QED_PROTOCOL_ETH
:
1162 return QED_ETH_INTERFACE_VERSION
;
1167 EXPORT_SYMBOL(qed_get_protocol_version
);