drivers/net/ethernet/qlogic/qede/qede.h

   1 /* QLogic qede NIC Driver
   2 * Copyright (c) 2015 QLogic Corporation
   3 *
   4 * This software is available under the terms of the GNU General Public License
   5 * (GPL) Version 2, available from the file COPYING in the main directory of
   6 * this source tree.
   7 */
   8
   9 #ifndef _QEDE_H_
  10 #define _QEDE_H_
  11 #include <linux/compiler.h>
  12 #include <linux/version.h>
  13 #include <linux/workqueue.h>
  14 #include <linux/netdevice.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/bitmap.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mutex.h>
  19 #include <linux/io.h>
  20 #include <linux/qed/common_hsi.h>
  21 #include <linux/qed/eth_common.h>
  22 #include <linux/qed/qed_if.h>
  23 #include <linux/qed/qed_chain.h>
  24 #include <linux/qed/qed_eth_if.h>
  25
  26 #define QEDE_MAJOR_VERSION              8
  27 #define QEDE_MINOR_VERSION              7
  28 #define QEDE_REVISION_VERSION           0
  29 #define QEDE_ENGINEERING_VERSION        0
  30 #define DRV_MODULE_VERSION __stringify(QEDE_MAJOR_VERSION) "."  \
  31                 __stringify(QEDE_MINOR_VERSION) "."             \
  32                 __stringify(QEDE_REVISION_VERSION) "."          \
  33                 __stringify(QEDE_ENGINEERING_VERSION)
  34
  35 #define QEDE_ETH_INTERFACE_VERSION      300
  36
  37 #define DRV_MODULE_SYM          qede
  38
  39 struct qede_stats {
  40         u64 no_buff_discards;
  41         u64 rx_ucast_bytes;
  42         u64 rx_mcast_bytes;
  43         u64 rx_bcast_bytes;
  44         u64 rx_ucast_pkts;
  45         u64 rx_mcast_pkts;
  46         u64 rx_bcast_pkts;
  47         u64 mftag_filter_discards;
  48         u64 mac_filter_discards;
  49         u64 tx_ucast_bytes;
  50         u64 tx_mcast_bytes;
  51         u64 tx_bcast_bytes;
  52         u64 tx_ucast_pkts;
  53         u64 tx_mcast_pkts;
  54         u64 tx_bcast_pkts;
  55         u64 tx_err_drop_pkts;
  56         u64 coalesced_pkts;
  57         u64 coalesced_events;
  58         u64 coalesced_aborts_num;
  59         u64 non_coalesced_pkts;
  60         u64 coalesced_bytes;
  61
  62         /* port */
  63         u64 rx_64_byte_packets;
  64         u64 rx_127_byte_packets;
  65         u64 rx_255_byte_packets;
  66         u64 rx_511_byte_packets;
  67         u64 rx_1023_byte_packets;
  68         u64 rx_1518_byte_packets;
  69         u64 rx_1522_byte_packets;
  70         u64 rx_2047_byte_packets;
  71         u64 rx_4095_byte_packets;
  72         u64 rx_9216_byte_packets;
  73         u64 rx_16383_byte_packets;
  74         u64 rx_crc_errors;
  75         u64 rx_mac_crtl_frames;
  76         u64 rx_pause_frames;
  77         u64 rx_pfc_frames;
  78         u64 rx_align_errors;
  79         u64 rx_carrier_errors;
  80         u64 rx_oversize_packets;
  81         u64 rx_jabbers;
  82         u64 rx_undersize_packets;
  83         u64 rx_fragments;
  84         u64 tx_64_byte_packets;
  85         u64 tx_65_to_127_byte_packets;
  86         u64 tx_128_to_255_byte_packets;
  87         u64 tx_256_to_511_byte_packets;
  88         u64 tx_512_to_1023_byte_packets;
  89         u64 tx_1024_to_1518_byte_packets;
  90         u64 tx_1519_to_2047_byte_packets;
  91         u64 tx_2048_to_4095_byte_packets;
  92         u64 tx_4096_to_9216_byte_packets;
  93         u64 tx_9217_to_16383_byte_packets;
  94         u64 tx_pause_frames;
  95         u64 tx_pfc_frames;
  96         u64 tx_lpi_entry_count;
  97         u64 tx_total_collisions;
  98         u64 brb_truncates;
  99         u64 brb_discards;
 100         u64 tx_mac_ctrl_frames;
 101 };
 102
 103 struct qede_vlan {
 104         struct list_head list;
 105         u16 vid;
 106         bool configured;
 107 };
 108
 109 struct qede_dev {
 110         struct qed_dev                  *cdev;
 111         struct net_device               *ndev;
 112         struct pci_dev                  *pdev;
 113
 114         u32                             dp_module;
 115         u8                              dp_level;
 116
 117         const struct qed_eth_ops        *ops;
 118
 119         struct qed_dev_eth_info dev_info;
 120 #define QEDE_MAX_RSS_CNT(edev)  ((edev)->dev_info.num_queues)
 121 #define QEDE_MAX_TSS_CNT(edev)  ((edev)->dev_info.num_queues * \
 122                                  (edev)->dev_info.num_tc)
 123
 124         struct qede_fastpath            *fp_array;
 125         u16                             req_rss;
 126         u16                             num_rss;
 127         u8                              num_tc;
 128 #define QEDE_RSS_CNT(edev)              ((edev)->num_rss)
 129 #define QEDE_TSS_CNT(edev)              ((edev)->num_rss *      \
 130                                          (edev)->num_tc)
 131 #define QEDE_TSS_IDX(edev, txqidx)      ((txqidx) % (edev)->num_rss)
 132 #define QEDE_TC_IDX(edev, txqidx)       ((txqidx) / (edev)->num_rss)
 133 #define QEDE_TX_QUEUE(edev, txqidx)     \
 134         (&(edev)->fp_array[QEDE_TSS_IDX((edev), (txqidx))].txqs[QEDE_TC_IDX( \
 135                                                         (edev), (txqidx))])
 136
 137         struct qed_int_info             int_info;
 138         unsigned char                   primary_mac[ETH_ALEN];
 139
 140         /* Smaller private varaiant of the RTNL lock */
 141         struct mutex                    qede_lock;
 142         u32                             state; /* Protected by qede_lock */
 143         u16                             rx_buf_size;
 144         /* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
 145 #define ETH_OVERHEAD                    (ETH_HLEN + 8 + 8)
 146         /* Max supported alignment is 256 (8 shift)
 147          * minimal alignment shift 6 is optimal for 57xxx HW performance
 148          */
 149 #define QEDE_RX_ALIGN_SHIFT             max(6, min(8, L1_CACHE_SHIFT))
 150         /* We assume skb_build() uses sizeof(struct skb_shared_info) bytes
 151          * at the end of skb->data, to avoid wasting a full cache line.
 152          * This reduces memory use (skb->truesize).
 153          */
 154 #define QEDE_FW_RX_ALIGN_END                                    \
 155         max_t(u64, 1UL << QEDE_RX_ALIGN_SHIFT,                  \
 156               SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
 157
 158         struct qede_stats               stats;
 159         struct qed_update_vport_rss_params      rss_params;
 160         u16                     q_num_rx_buffers; /* Must be a power of two */
 161         u16                     q_num_tx_buffers; /* Must be a power of two */
 162
 163         struct list_head vlan_list;
 164         u16 configured_vlans;
 165         u16 non_configured_vlans;
 166         bool accept_any_vlan;
 167         struct delayed_work             sp_task;
 168         unsigned long                   sp_flags;
 169 };
 170
 171 enum QEDE_STATE {
 172         QEDE_STATE_CLOSED,
 173         QEDE_STATE_OPEN,
 174 };
 175
 176 #define HILO_U64(hi, lo)                ((((u64)(hi)) << 32) + (lo))
 177
 178 #define MAX_NUM_TC      8
 179 #define MAX_NUM_PRI     8
 180
 181 /* The driver supports the new build_skb() API:
 182  * RX ring buffer contains pointer to kmalloc() data only,
 183  * skb are built only after the frame was DMA-ed.
 184  */
 185 struct sw_rx_data {
 186         struct page *data;
 187         dma_addr_t mapping;
 188         unsigned int page_offset;
 189 };
 190
 191 struct qede_rx_queue {
 192         __le16                  *hw_cons_ptr;
 193         struct sw_rx_data       *sw_rx_ring;
 194         u16                     sw_rx_cons;
 195         u16                     sw_rx_prod;
 196         struct qed_chain        rx_bd_ring;
 197         struct qed_chain        rx_comp_ring;
 198         void __iomem            *hw_rxq_prod_addr;
 199
 200         int                     rx_buf_size;
 201         unsigned int            rx_buf_seg_size;
 202
 203         u16                     num_rx_buffers;
 204         u16                     rxq_id;
 205
 206         u64                     rx_hw_errors;
 207         u64                     rx_alloc_errors;
 208 };
 209
 210 union db_prod {
 211         struct eth_db_data data;
 212         u32             raw;
 213 };
 214
 215 struct sw_tx_bd {
 216         struct sk_buff *skb;
 217         u8 flags;
 218 /* Set on the first BD descriptor when there is a split BD */
 219 #define QEDE_TSO_SPLIT_BD               BIT(0)
 220 };
 221
 222 struct qede_tx_queue {
 223         int                     index; /* Queue index */
 224         __le16                  *hw_cons_ptr;
 225         struct sw_tx_bd         *sw_tx_ring;
 226         u16                     sw_tx_cons;
 227         u16                     sw_tx_prod;
 228         struct qed_chain        tx_pbl;
 229         void __iomem            *doorbell_addr;
 230         union db_prod           tx_db;
 231
 232         u16                     num_tx_buffers;
 233 };
 234
 235 #define BD_UNMAP_ADDR(bd)               HILO_U64(le32_to_cpu((bd)->addr.hi), \
 236                                                  le32_to_cpu((bd)->addr.lo))
 237 #define BD_SET_UNMAP_ADDR_LEN(bd, maddr, len)                           \
 238         do {                                                            \
 239                 (bd)->addr.hi = cpu_to_le32(upper_32_bits(maddr));      \
 240                 (bd)->addr.lo = cpu_to_le32(lower_32_bits(maddr));      \
 241                 (bd)->nbytes = cpu_to_le16(len);                        \
 242         } while (0)
 243 #define BD_UNMAP_LEN(bd)                (le16_to_cpu((bd)->nbytes))
 244
 245 struct qede_fastpath {
 246         struct qede_dev *edev;
 247         u8                      rss_id;
 248         struct napi_struct      napi;
 249         struct qed_sb_info      *sb_info;
 250         struct qede_rx_queue    *rxq;
 251         struct qede_tx_queue    *txqs;
 252
 253 #define VEC_NAME_SIZE   (sizeof(((struct net_device *)0)->name) + 8)
 254         char    name[VEC_NAME_SIZE];
 255 };
 256
 257 /* Debug print definitions */
 258 #define DP_NAME(edev) ((edev)->ndev->name)
 259
 260 #define XMIT_PLAIN              0
 261 #define XMIT_L4_CSUM            BIT(0)
 262 #define XMIT_LSO                BIT(1)
 263 #define XMIT_ENC                BIT(2)
 264
 265 #define QEDE_CSUM_ERROR                 BIT(0)
 266 #define QEDE_CSUM_UNNECESSARY           BIT(1)
 267
 268 #define QEDE_SP_RX_MODE         1
 269
 270 union qede_reload_args {
 271         u16 mtu;
 272 };
 273
 274 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level);
 275 void qede_set_ethtool_ops(struct net_device *netdev);
 276 void qede_reload(struct qede_dev *edev,
 277                  void (*func)(struct qede_dev *edev,
 278                               union qede_reload_args *args),
 279                  union qede_reload_args *args);
 280 int qede_change_mtu(struct net_device *dev, int new_mtu);
 281 void qede_fill_by_demand_stats(struct qede_dev *edev);
 282
 283 #define RX_RING_SIZE_POW        13
 284 #define RX_RING_SIZE            ((u16)BIT(RX_RING_SIZE_POW))
 285 #define NUM_RX_BDS_MAX          (RX_RING_SIZE - 1)
 286 #define NUM_RX_BDS_MIN          128
 287 #define NUM_RX_BDS_DEF          NUM_RX_BDS_MAX
 288
 289 #define TX_RING_SIZE_POW        13
 290 #define TX_RING_SIZE            ((u16)BIT(TX_RING_SIZE_POW))
 291 #define NUM_TX_BDS_MAX          (TX_RING_SIZE - 1)
 292 #define NUM_TX_BDS_MIN          128
 293 #define NUM_TX_BDS_DEF          NUM_TX_BDS_MAX
 294
 295 #define QEDE_RX_HDR_SIZE        256
 296 #define for_each_rss(i) for (i = 0; i < edev->num_rss; i++)
 297
 298 #endif /* _QEDE_H_ */