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[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
1 /* QLogic qede NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/version.h>
12 #include <linux/device.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/errno.h>
17 #include <linux/list.h>
18 #include <linux/string.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/interrupt.h>
21 #include <asm/byteorder.h>
22 #include <asm/param.h>
23 #include <linux/io.h>
24 #include <linux/netdev_features.h>
25 #include <linux/udp.h>
26 #include <linux/tcp.h>
27 #include <net/udp_tunnel.h>
28 #include <linux/ip.h>
29 #include <net/ipv6.h>
30 #include <net/tcp.h>
31 #include <linux/if_ether.h>
32 #include <linux/if_vlan.h>
33 #include <linux/pkt_sched.h>
34 #include <linux/ethtool.h>
35 #include <linux/in.h>
36 #include <linux/random.h>
37 #include <net/ip6_checksum.h>
38 #include <linux/bitops.h>
39
40 #include "qede.h"
41
42 static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
44
45 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
46 MODULE_LICENSE("GPL");
47 MODULE_VERSION(DRV_MODULE_VERSION);
48
49 static uint debug;
50 module_param(debug, uint, 0);
51 MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53 static const struct qed_eth_ops *qed_ops;
54
55 #define CHIP_NUM_57980S_40 0x1634
56 #define CHIP_NUM_57980S_10 0x1666
57 #define CHIP_NUM_57980S_MF 0x1636
58 #define CHIP_NUM_57980S_100 0x1644
59 #define CHIP_NUM_57980S_50 0x1654
60 #define CHIP_NUM_57980S_25 0x1656
61 #define CHIP_NUM_57980S_IOV 0x1664
62
63 #ifndef PCI_DEVICE_ID_NX2_57980E
64 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
70 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
71 #endif
72
73 enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76 };
77
78 static const struct pci_device_id qede_pci_tbl[] = {
79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
85 #ifdef CONFIG_QED_SRIOV
86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
87 #endif
88 { 0 }
89 };
90
91 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95 #define TX_TIMEOUT (5 * HZ)
96
97 static void qede_remove(struct pci_dev *pdev);
98 static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
100 static void qede_link_update(void *dev, struct qed_link_output *link);
101
102 #ifdef CONFIG_QED_SRIOV
103 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104 {
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116 }
117
118 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119 {
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132 }
133
134 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135 {
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144 /* Enable/Disable Tx switching for PF */
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(&params, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, &params);
154 }
155
156 return rc;
157 }
158 #endif
159
160 static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
165 #ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167 #endif
168 };
169
170 static void qede_force_mac(void *dev, u8 *mac)
171 {
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176 }
177
178 static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
182 .force_mac = qede_force_mac,
183 };
184
185 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187 {
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192 /* Currently only support name change */
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196 /* Check whether this is a qede device */
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206 /* Notify qed of the name change */
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212 done:
213 return NOTIFY_DONE;
214 }
215
216 static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218 };
219
220 static
221 int __init qede_init(void)
222 {
223 int ret;
224
225 pr_info("qede_init: %s\n", version);
226
227 qed_ops = qed_get_eth_ops();
228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
233 /* Must register notifier before pci ops, since we might miss
234 * interface rename after pci probe and netdev registeration.
235 */
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
246 unregister_netdevice_notifier(&qede_netdev_notifier);
247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252 }
253
254 static void __exit qede_cleanup(void)
255 {
256 if (debug & QED_LOG_INFO_MASK)
257 pr_info("qede_cleanup called\n");
258
259 unregister_netdevice_notifier(&qede_netdev_notifier);
260 pci_unregister_driver(&qede_pci_driver);
261 qed_put_eth_ops();
262 }
263
264 module_init(qede_init);
265 module_exit(qede_cleanup);
266
267 /* -------------------------------------------------------------------------
268 * START OF FAST-PATH
269 * -------------------------------------------------------------------------
270 */
271
272 /* Unmap the data and free skb */
273 static int qede_free_tx_pkt(struct qede_dev *edev,
274 struct qede_tx_queue *txq, int *len)
275 {
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309 /* Unmap the data of the skb frags */
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320 /* Free skb */
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326 }
327
328 /* Unmap the data and free skb when mapping failed during start_xmit */
329 static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
332 int nbd, bool data_split)
333 {
334 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
335 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
336 struct eth_tx_bd *tx_data_bd;
337 int i, split_bd_len = 0;
338
339 /* Return prod to its position before this skb was handled */
340 qed_chain_set_prod(&txq->tx_pbl,
341 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
342
343 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
344
345 if (data_split) {
346 struct eth_tx_bd *split = (struct eth_tx_bd *)
347 qed_chain_produce(&txq->tx_pbl);
348 split_bd_len = BD_UNMAP_LEN(split);
349 nbd--;
350 }
351
352 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
353 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
354
355 /* Unmap the data of the skb frags */
356 for (i = 0; i < nbd; i++) {
357 tx_data_bd = (struct eth_tx_bd *)
358 qed_chain_produce(&txq->tx_pbl);
359 if (tx_data_bd->nbytes)
360 dma_unmap_page(&edev->pdev->dev,
361 BD_UNMAP_ADDR(tx_data_bd),
362 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
363 }
364
365 /* Return again prod to its position before this skb was handled */
366 qed_chain_set_prod(&txq->tx_pbl,
367 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
368
369 /* Free skb */
370 dev_kfree_skb_any(skb);
371 txq->sw_tx_ring[idx].skb = NULL;
372 txq->sw_tx_ring[idx].flags = 0;
373 }
374
375 static u32 qede_xmit_type(struct qede_dev *edev,
376 struct sk_buff *skb, int *ipv6_ext)
377 {
378 u32 rc = XMIT_L4_CSUM;
379 __be16 l3_proto;
380
381 if (skb->ip_summed != CHECKSUM_PARTIAL)
382 return XMIT_PLAIN;
383
384 l3_proto = vlan_get_protocol(skb);
385 if (l3_proto == htons(ETH_P_IPV6) &&
386 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
387 *ipv6_ext = 1;
388
389 if (skb->encapsulation)
390 rc |= XMIT_ENC;
391
392 if (skb_is_gso(skb))
393 rc |= XMIT_LSO;
394
395 return rc;
396 }
397
398 static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
399 struct eth_tx_2nd_bd *second_bd,
400 struct eth_tx_3rd_bd *third_bd)
401 {
402 u8 l4_proto;
403 u16 bd2_bits1 = 0, bd2_bits2 = 0;
404
405 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
406
407 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
408 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
409 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
410
411 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
412 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
413
414 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
415 l4_proto = ipv6_hdr(skb)->nexthdr;
416 else
417 l4_proto = ip_hdr(skb)->protocol;
418
419 if (l4_proto == IPPROTO_UDP)
420 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
421
422 if (third_bd)
423 third_bd->data.bitfields |=
424 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
425 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
426 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
427
428 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
429 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
430 }
431
432 static int map_frag_to_bd(struct qede_dev *edev,
433 skb_frag_t *frag, struct eth_tx_bd *bd)
434 {
435 dma_addr_t mapping;
436
437 /* Map skb non-linear frag data for DMA */
438 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
439 skb_frag_size(frag), DMA_TO_DEVICE);
440 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
441 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
442 return -ENOMEM;
443 }
444
445 /* Setup the data pointer of the frag data */
446 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
447
448 return 0;
449 }
450
451 static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
452 {
453 if (is_encap_pkt)
454 return (skb_inner_transport_header(skb) +
455 inner_tcp_hdrlen(skb) - skb->data);
456 else
457 return (skb_transport_header(skb) +
458 tcp_hdrlen(skb) - skb->data);
459 }
460
461 /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
462 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
463 static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
464 u8 xmit_type)
465 {
466 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
467
468 if (xmit_type & XMIT_LSO) {
469 int hlen;
470
471 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
472
473 /* linear payload would require its own BD */
474 if (skb_headlen(skb) > hlen)
475 allowed_frags--;
476 }
477
478 return (skb_shinfo(skb)->nr_frags > allowed_frags);
479 }
480 #endif
481
482 static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
483 {
484 /* wmb makes sure that the BDs data is updated before updating the
485 * producer, otherwise FW may read old data from the BDs.
486 */
487 wmb();
488 barrier();
489 writel(txq->tx_db.raw, txq->doorbell_addr);
490
491 /* mmiowb is needed to synchronize doorbell writes from more than one
492 * processor. It guarantees that the write arrives to the device before
493 * the queue lock is released and another start_xmit is called (possibly
494 * on another CPU). Without this barrier, the next doorbell can bypass
495 * this doorbell. This is applicable to IA64/Altix systems.
496 */
497 mmiowb();
498 }
499
500 /* Main transmit function */
501 static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
502 struct net_device *ndev)
503 {
504 struct qede_dev *edev = netdev_priv(ndev);
505 struct netdev_queue *netdev_txq;
506 struct qede_tx_queue *txq;
507 struct eth_tx_1st_bd *first_bd;
508 struct eth_tx_2nd_bd *second_bd = NULL;
509 struct eth_tx_3rd_bd *third_bd = NULL;
510 struct eth_tx_bd *tx_data_bd = NULL;
511 u16 txq_index;
512 u8 nbd = 0;
513 dma_addr_t mapping;
514 int rc, frag_idx = 0, ipv6_ext = 0;
515 u8 xmit_type;
516 u16 idx;
517 u16 hlen;
518 bool data_split = false;
519
520 /* Get tx-queue context and netdev index */
521 txq_index = skb_get_queue_mapping(skb);
522 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
523 txq = QEDE_TX_QUEUE(edev, txq_index);
524 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
525
526 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
527
528 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
529
530 #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
531 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
532 if (skb_linearize(skb)) {
533 DP_NOTICE(edev,
534 "SKB linearization failed - silently dropping this SKB\n");
535 dev_kfree_skb_any(skb);
536 return NETDEV_TX_OK;
537 }
538 }
539 #endif
540
541 /* Fill the entry in the SW ring and the BDs in the FW ring */
542 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
543 txq->sw_tx_ring[idx].skb = skb;
544 first_bd = (struct eth_tx_1st_bd *)
545 qed_chain_produce(&txq->tx_pbl);
546 memset(first_bd, 0, sizeof(*first_bd));
547 first_bd->data.bd_flags.bitfields =
548 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
549
550 /* Map skb linear data for DMA and set in the first BD */
551 mapping = dma_map_single(&edev->pdev->dev, skb->data,
552 skb_headlen(skb), DMA_TO_DEVICE);
553 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
554 DP_NOTICE(edev, "SKB mapping failed\n");
555 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
556 qede_update_tx_producer(txq);
557 return NETDEV_TX_OK;
558 }
559 nbd++;
560 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
561
562 /* In case there is IPv6 with extension headers or LSO we need 2nd and
563 * 3rd BDs.
564 */
565 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
566 second_bd = (struct eth_tx_2nd_bd *)
567 qed_chain_produce(&txq->tx_pbl);
568 memset(second_bd, 0, sizeof(*second_bd));
569
570 nbd++;
571 third_bd = (struct eth_tx_3rd_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573 memset(third_bd, 0, sizeof(*third_bd));
574
575 nbd++;
576 /* We need to fill in additional data in second_bd... */
577 tx_data_bd = (struct eth_tx_bd *)second_bd;
578 }
579
580 if (skb_vlan_tag_present(skb)) {
581 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
582 first_bd->data.bd_flags.bitfields |=
583 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
584 }
585
586 /* Fill the parsing flags & params according to the requested offload */
587 if (xmit_type & XMIT_L4_CSUM) {
588 /* We don't re-calculate IP checksum as it is already done by
589 * the upper stack
590 */
591 first_bd->data.bd_flags.bitfields |=
592 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
593
594 if (xmit_type & XMIT_ENC) {
595 first_bd->data.bd_flags.bitfields |=
596 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
597 first_bd->data.bitfields |=
598 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
599 }
600
601 /* If the packet is IPv6 with extension header, indicate that
602 * to FW and pass few params, since the device cracker doesn't
603 * support parsing IPv6 with extension header/s.
604 */
605 if (unlikely(ipv6_ext))
606 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
607 }
608
609 if (xmit_type & XMIT_LSO) {
610 first_bd->data.bd_flags.bitfields |=
611 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
612 third_bd->data.lso_mss =
613 cpu_to_le16(skb_shinfo(skb)->gso_size);
614
615 if (unlikely(xmit_type & XMIT_ENC)) {
616 first_bd->data.bd_flags.bitfields |=
617 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
618 hlen = qede_get_skb_hlen(skb, true);
619 } else {
620 first_bd->data.bd_flags.bitfields |=
621 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
622 hlen = qede_get_skb_hlen(skb, false);
623 }
624
625 /* @@@TBD - if will not be removed need to check */
626 third_bd->data.bitfields |=
627 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
628
629 /* Make life easier for FW guys who can't deal with header and
630 * data on same BD. If we need to split, use the second bd...
631 */
632 if (unlikely(skb_headlen(skb) > hlen)) {
633 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
634 "TSO split header size is %d (%x:%x)\n",
635 first_bd->nbytes, first_bd->addr.hi,
636 first_bd->addr.lo);
637
638 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
639 le32_to_cpu(first_bd->addr.lo)) +
640 hlen;
641
642 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
643 le16_to_cpu(first_bd->nbytes) -
644 hlen);
645
646 /* this marks the BD as one that has no
647 * individual mapping
648 */
649 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
650
651 first_bd->nbytes = cpu_to_le16(hlen);
652
653 tx_data_bd = (struct eth_tx_bd *)third_bd;
654 data_split = true;
655 }
656 } else {
657 first_bd->data.bitfields |=
658 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
659 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
660 }
661
662 /* Handle fragmented skb */
663 /* special handle for frags inside 2nd and 3rd bds.. */
664 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
665 rc = map_frag_to_bd(edev,
666 &skb_shinfo(skb)->frags[frag_idx],
667 tx_data_bd);
668 if (rc) {
669 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
670 data_split);
671 qede_update_tx_producer(txq);
672 return NETDEV_TX_OK;
673 }
674
675 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
676 tx_data_bd = (struct eth_tx_bd *)third_bd;
677 else
678 tx_data_bd = NULL;
679
680 frag_idx++;
681 }
682
683 /* map last frags into 4th, 5th .... */
684 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
685 tx_data_bd = (struct eth_tx_bd *)
686 qed_chain_produce(&txq->tx_pbl);
687
688 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
689
690 rc = map_frag_to_bd(edev,
691 &skb_shinfo(skb)->frags[frag_idx],
692 tx_data_bd);
693 if (rc) {
694 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
695 data_split);
696 qede_update_tx_producer(txq);
697 return NETDEV_TX_OK;
698 }
699 }
700
701 /* update the first BD with the actual num BDs */
702 first_bd->data.nbds = nbd;
703
704 netdev_tx_sent_queue(netdev_txq, skb->len);
705
706 skb_tx_timestamp(skb);
707
708 /* Advance packet producer only before sending the packet since mapping
709 * of pages may fail.
710 */
711 txq->sw_tx_prod++;
712
713 /* 'next page' entries are counted in the producer value */
714 txq->tx_db.data.bd_prod =
715 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
716
717 if (!skb->xmit_more || netif_tx_queue_stopped(netdev_txq))
718 qede_update_tx_producer(txq);
719
720 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
721 < (MAX_SKB_FRAGS + 1))) {
722 netif_tx_stop_queue(netdev_txq);
723 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
724 "Stop queue was called\n");
725 /* paired memory barrier is in qede_tx_int(), we have to keep
726 * ordering of set_bit() in netif_tx_stop_queue() and read of
727 * fp->bd_tx_cons
728 */
729 smp_mb();
730
731 if (qed_chain_get_elem_left(&txq->tx_pbl)
732 >= (MAX_SKB_FRAGS + 1) &&
733 (edev->state == QEDE_STATE_OPEN)) {
734 netif_tx_wake_queue(netdev_txq);
735 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
736 "Wake queue was called\n");
737 }
738 }
739
740 return NETDEV_TX_OK;
741 }
742
743 int qede_txq_has_work(struct qede_tx_queue *txq)
744 {
745 u16 hw_bd_cons;
746
747 /* Tell compiler that consumer and producer can change */
748 barrier();
749 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
750 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
751 return 0;
752
753 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
754 }
755
756 static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
757 {
758 struct netdev_queue *netdev_txq;
759 u16 hw_bd_cons;
760 unsigned int pkts_compl = 0, bytes_compl = 0;
761 int rc;
762
763 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
764
765 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
766 barrier();
767
768 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
769 int len = 0;
770
771 rc = qede_free_tx_pkt(edev, txq, &len);
772 if (rc) {
773 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
774 hw_bd_cons,
775 qed_chain_get_cons_idx(&txq->tx_pbl));
776 break;
777 }
778
779 bytes_compl += len;
780 pkts_compl++;
781 txq->sw_tx_cons++;
782 }
783
784 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
785
786 /* Need to make the tx_bd_cons update visible to start_xmit()
787 * before checking for netif_tx_queue_stopped(). Without the
788 * memory barrier, there is a small possibility that
789 * start_xmit() will miss it and cause the queue to be stopped
790 * forever.
791 * On the other hand we need an rmb() here to ensure the proper
792 * ordering of bit testing in the following
793 * netif_tx_queue_stopped(txq) call.
794 */
795 smp_mb();
796
797 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
798 /* Taking tx_lock is needed to prevent reenabling the queue
799 * while it's empty. This could have happen if rx_action() gets
800 * suspended in qede_tx_int() after the condition before
801 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
802 *
803 * stops the queue->sees fresh tx_bd_cons->releases the queue->
804 * sends some packets consuming the whole queue again->
805 * stops the queue
806 */
807
808 __netif_tx_lock(netdev_txq, smp_processor_id());
809
810 if ((netif_tx_queue_stopped(netdev_txq)) &&
811 (edev->state == QEDE_STATE_OPEN) &&
812 (qed_chain_get_elem_left(&txq->tx_pbl)
813 >= (MAX_SKB_FRAGS + 1))) {
814 netif_tx_wake_queue(netdev_txq);
815 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
816 "Wake queue was called\n");
817 }
818
819 __netif_tx_unlock(netdev_txq);
820 }
821
822 return 0;
823 }
824
825 bool qede_has_rx_work(struct qede_rx_queue *rxq)
826 {
827 u16 hw_comp_cons, sw_comp_cons;
828
829 /* Tell compiler that status block fields can change */
830 barrier();
831
832 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
833 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
834
835 return hw_comp_cons != sw_comp_cons;
836 }
837
838 static bool qede_has_tx_work(struct qede_fastpath *fp)
839 {
840 u8 tc;
841
842 for (tc = 0; tc < fp->edev->num_tc; tc++)
843 if (qede_txq_has_work(&fp->txqs[tc]))
844 return true;
845 return false;
846 }
847
848 static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
849 {
850 qed_chain_consume(&rxq->rx_bd_ring);
851 rxq->sw_rx_cons++;
852 }
853
854 /* This function reuses the buffer(from an offset) from
855 * consumer index to producer index in the bd ring
856 */
857 static inline void qede_reuse_page(struct qede_dev *edev,
858 struct qede_rx_queue *rxq,
859 struct sw_rx_data *curr_cons)
860 {
861 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
862 struct sw_rx_data *curr_prod;
863 dma_addr_t new_mapping;
864
865 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
866 *curr_prod = *curr_cons;
867
868 new_mapping = curr_prod->mapping + curr_prod->page_offset;
869
870 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
871 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
872
873 rxq->sw_rx_prod++;
874 curr_cons->data = NULL;
875 }
876
877 /* In case of allocation failures reuse buffers
878 * from consumer index to produce buffers for firmware
879 */
880 void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
881 struct qede_dev *edev, u8 count)
882 {
883 struct sw_rx_data *curr_cons;
884
885 for (; count > 0; count--) {
886 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
887 qede_reuse_page(edev, rxq, curr_cons);
888 qede_rx_bd_ring_consume(rxq);
889 }
890 }
891
892 static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
893 struct qede_rx_queue *rxq,
894 struct sw_rx_data *curr_cons)
895 {
896 /* Move to the next segment in the page */
897 curr_cons->page_offset += rxq->rx_buf_seg_size;
898
899 if (curr_cons->page_offset == PAGE_SIZE) {
900 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
901 /* Since we failed to allocate new buffer
902 * current buffer can be used again.
903 */
904 curr_cons->page_offset -= rxq->rx_buf_seg_size;
905
906 return -ENOMEM;
907 }
908
909 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
910 PAGE_SIZE, DMA_FROM_DEVICE);
911 } else {
912 /* Increment refcount of the page as we don't want
913 * network stack to take the ownership of the page
914 * which can be recycled multiple times by the driver.
915 */
916 page_ref_inc(curr_cons->data);
917 qede_reuse_page(edev, rxq, curr_cons);
918 }
919
920 return 0;
921 }
922
923 static inline void qede_update_rx_prod(struct qede_dev *edev,
924 struct qede_rx_queue *rxq)
925 {
926 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
927 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
928 struct eth_rx_prod_data rx_prods = {0};
929
930 /* Update producers */
931 rx_prods.bd_prod = cpu_to_le16(bd_prod);
932 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
933
934 /* Make sure that the BD and SGE data is updated before updating the
935 * producers since FW might read the BD/SGE right after the producer
936 * is updated.
937 */
938 wmb();
939
940 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
941 (u32 *)&rx_prods);
942
943 /* mmiowb is needed to synchronize doorbell writes from more than one
944 * processor. It guarantees that the write arrives to the device before
945 * the napi lock is released and another qede_poll is called (possibly
946 * on another CPU). Without this barrier, the next doorbell can bypass
947 * this doorbell. This is applicable to IA64/Altix systems.
948 */
949 mmiowb();
950 }
951
952 static u32 qede_get_rxhash(struct qede_dev *edev,
953 u8 bitfields,
954 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
955 {
956 enum rss_hash_type htype;
957
958 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
959
960 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
961 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
962 (htype == RSS_HASH_TYPE_IPV6)) ?
963 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
964 return le32_to_cpu(rss_hash);
965 }
966 *rxhash_type = PKT_HASH_TYPE_NONE;
967 return 0;
968 }
969
970 static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
971 {
972 skb_checksum_none_assert(skb);
973
974 if (csum_flag & QEDE_CSUM_UNNECESSARY)
975 skb->ip_summed = CHECKSUM_UNNECESSARY;
976
977 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
978 skb->csum_level = 1;
979 }
980
981 static inline void qede_skb_receive(struct qede_dev *edev,
982 struct qede_fastpath *fp,
983 struct sk_buff *skb, u16 vlan_tag)
984 {
985 if (vlan_tag)
986 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
987
988 napi_gro_receive(&fp->napi, skb);
989 }
990
991 static void qede_set_gro_params(struct qede_dev *edev,
992 struct sk_buff *skb,
993 struct eth_fast_path_rx_tpa_start_cqe *cqe)
994 {
995 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
996
997 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
998 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
999 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1000 else
1001 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1002
1003 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1004 cqe->header_len;
1005 }
1006
1007 static int qede_fill_frag_skb(struct qede_dev *edev,
1008 struct qede_rx_queue *rxq,
1009 u8 tpa_agg_index, u16 len_on_bd)
1010 {
1011 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1012 NUM_RX_BDS_MAX];
1013 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1014 struct sk_buff *skb = tpa_info->skb;
1015
1016 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1017 goto out;
1018
1019 /* Add one frag and update the appropriate fields in the skb */
1020 skb_fill_page_desc(skb, tpa_info->frag_id++,
1021 current_bd->data, current_bd->page_offset,
1022 len_on_bd);
1023
1024 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
1025 /* Incr page ref count to reuse on allocation failure
1026 * so that it doesn't get freed while freeing SKB.
1027 */
1028 page_ref_inc(current_bd->data);
1029 goto out;
1030 }
1031
1032 qed_chain_consume(&rxq->rx_bd_ring);
1033 rxq->sw_rx_cons++;
1034
1035 skb->data_len += len_on_bd;
1036 skb->truesize += rxq->rx_buf_seg_size;
1037 skb->len += len_on_bd;
1038
1039 return 0;
1040
1041 out:
1042 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1043 qede_recycle_rx_bd_ring(rxq, edev, 1);
1044 return -ENOMEM;
1045 }
1046
1047 static void qede_tpa_start(struct qede_dev *edev,
1048 struct qede_rx_queue *rxq,
1049 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1050 {
1051 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1052 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1053 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1054 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1055 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1056 struct sw_rx_data *sw_rx_data_cons;
1057 struct sw_rx_data *sw_rx_data_prod;
1058 enum pkt_hash_types rxhash_type;
1059 u32 rxhash;
1060
1061 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1062 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1063
1064 /* Use pre-allocated replacement buffer - we can't release the agg.
1065 * start until its over and we don't want to risk allocation failing
1066 * here, so re-allocate when aggregation will be over.
1067 */
1068 sw_rx_data_prod->mapping = replace_buf->mapping;
1069
1070 sw_rx_data_prod->data = replace_buf->data;
1071 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1072 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1073 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1074
1075 rxq->sw_rx_prod++;
1076
1077 /* move partial skb from cons to pool (don't unmap yet)
1078 * save mapping, incase we drop the packet later on.
1079 */
1080 tpa_info->start_buf = *sw_rx_data_cons;
1081 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1082 le32_to_cpu(rx_bd_cons->addr.lo));
1083
1084 tpa_info->start_buf_mapping = mapping;
1085 rxq->sw_rx_cons++;
1086
1087 /* set tpa state to start only if we are able to allocate skb
1088 * for this aggregation, otherwise mark as error and aggregation will
1089 * be dropped
1090 */
1091 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1092 le16_to_cpu(cqe->len_on_first_bd));
1093 if (unlikely(!tpa_info->skb)) {
1094 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
1095 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1096 goto cons_buf;
1097 }
1098
1099 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1100 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1101
1102 /* Start filling in the aggregation info */
1103 tpa_info->frag_id = 0;
1104 tpa_info->agg_state = QEDE_AGG_STATE_START;
1105
1106 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1107 cqe->rss_hash, &rxhash_type);
1108 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1109 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1110 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1111 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1112 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1113 else
1114 tpa_info->vlan_tag = 0;
1115
1116 /* This is needed in order to enable forwarding support */
1117 qede_set_gro_params(edev, tpa_info->skb, cqe);
1118
1119 cons_buf: /* We still need to handle bd_len_list to consume buffers */
1120 if (likely(cqe->ext_bd_len_list[0]))
1121 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1122 le16_to_cpu(cqe->ext_bd_len_list[0]));
1123
1124 if (unlikely(cqe->ext_bd_len_list[1])) {
1125 DP_ERR(edev,
1126 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1127 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1128 }
1129 }
1130
1131 #ifdef CONFIG_INET
1132 static void qede_gro_ip_csum(struct sk_buff *skb)
1133 {
1134 const struct iphdr *iph = ip_hdr(skb);
1135 struct tcphdr *th;
1136
1137 skb_set_transport_header(skb, sizeof(struct iphdr));
1138 th = tcp_hdr(skb);
1139
1140 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1141 iph->saddr, iph->daddr, 0);
1142
1143 tcp_gro_complete(skb);
1144 }
1145
1146 static void qede_gro_ipv6_csum(struct sk_buff *skb)
1147 {
1148 struct ipv6hdr *iph = ipv6_hdr(skb);
1149 struct tcphdr *th;
1150
1151 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1152 th = tcp_hdr(skb);
1153
1154 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1155 &iph->saddr, &iph->daddr, 0);
1156 tcp_gro_complete(skb);
1157 }
1158 #endif
1159
1160 static void qede_gro_receive(struct qede_dev *edev,
1161 struct qede_fastpath *fp,
1162 struct sk_buff *skb,
1163 u16 vlan_tag)
1164 {
1165 /* FW can send a single MTU sized packet from gro flow
1166 * due to aggregation timeout/last segment etc. which
1167 * is not expected to be a gro packet. If a skb has zero
1168 * frags then simply push it in the stack as non gso skb.
1169 */
1170 if (unlikely(!skb->data_len)) {
1171 skb_shinfo(skb)->gso_type = 0;
1172 skb_shinfo(skb)->gso_size = 0;
1173 goto send_skb;
1174 }
1175
1176 #ifdef CONFIG_INET
1177 if (skb_shinfo(skb)->gso_size) {
1178 skb_set_network_header(skb, 0);
1179
1180 switch (skb->protocol) {
1181 case htons(ETH_P_IP):
1182 qede_gro_ip_csum(skb);
1183 break;
1184 case htons(ETH_P_IPV6):
1185 qede_gro_ipv6_csum(skb);
1186 break;
1187 default:
1188 DP_ERR(edev,
1189 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1190 ntohs(skb->protocol));
1191 }
1192 }
1193 #endif
1194
1195 send_skb:
1196 skb_record_rx_queue(skb, fp->rss_id);
1197 qede_skb_receive(edev, fp, skb, vlan_tag);
1198 }
1199
1200 static inline void qede_tpa_cont(struct qede_dev *edev,
1201 struct qede_rx_queue *rxq,
1202 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1203 {
1204 int i;
1205
1206 for (i = 0; cqe->len_list[i]; i++)
1207 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1208 le16_to_cpu(cqe->len_list[i]));
1209
1210 if (unlikely(i > 1))
1211 DP_ERR(edev,
1212 "Strange - TPA cont with more than a single len_list entry\n");
1213 }
1214
1215 static void qede_tpa_end(struct qede_dev *edev,
1216 struct qede_fastpath *fp,
1217 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1218 {
1219 struct qede_rx_queue *rxq = fp->rxq;
1220 struct qede_agg_info *tpa_info;
1221 struct sk_buff *skb;
1222 int i;
1223
1224 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1225 skb = tpa_info->skb;
1226
1227 for (i = 0; cqe->len_list[i]; i++)
1228 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1229 le16_to_cpu(cqe->len_list[i]));
1230 if (unlikely(i > 1))
1231 DP_ERR(edev,
1232 "Strange - TPA emd with more than a single len_list entry\n");
1233
1234 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1235 goto err;
1236
1237 /* Sanity */
1238 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1239 DP_ERR(edev,
1240 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1241 cqe->num_of_bds, tpa_info->frag_id);
1242 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1243 DP_ERR(edev,
1244 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1245 le16_to_cpu(cqe->total_packet_len), skb->len);
1246
1247 memcpy(skb->data,
1248 page_address(tpa_info->start_buf.data) +
1249 tpa_info->start_cqe.placement_offset +
1250 tpa_info->start_buf.page_offset,
1251 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1252
1253 /* Recycle [mapped] start buffer for the next replacement */
1254 tpa_info->replace_buf = tpa_info->start_buf;
1255 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1256
1257 /* Finalize the SKB */
1258 skb->protocol = eth_type_trans(skb, edev->ndev);
1259 skb->ip_summed = CHECKSUM_UNNECESSARY;
1260
1261 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1262 * to skb_shinfo(skb)->gso_segs
1263 */
1264 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1265
1266 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1267
1268 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1269
1270 return;
1271 err:
1272 /* The BD starting the aggregation is still mapped; Re-use it for
1273 * future aggregations [as replacement buffer]
1274 */
1275 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1276 sizeof(struct sw_rx_data));
1277 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1278 tpa_info->start_buf.data = NULL;
1279 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1280 dev_kfree_skb_any(tpa_info->skb);
1281 tpa_info->skb = NULL;
1282 }
1283
1284 static bool qede_tunn_exist(u16 flag)
1285 {
1286 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1287 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1288 }
1289
1290 static u8 qede_check_tunn_csum(u16 flag)
1291 {
1292 u16 csum_flag = 0;
1293 u8 tcsum = 0;
1294
1295 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1296 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1297 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1298 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1299
1300 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1301 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1302 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1303 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1304 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1305 }
1306
1307 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1308 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1309 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1310 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1311
1312 if (csum_flag & flag)
1313 return QEDE_CSUM_ERROR;
1314
1315 return QEDE_CSUM_UNNECESSARY | tcsum;
1316 }
1317
1318 static u8 qede_check_notunn_csum(u16 flag)
1319 {
1320 u16 csum_flag = 0;
1321 u8 csum = 0;
1322
1323 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1324 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1325 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1326 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1327 csum = QEDE_CSUM_UNNECESSARY;
1328 }
1329
1330 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1331 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1332
1333 if (csum_flag & flag)
1334 return QEDE_CSUM_ERROR;
1335
1336 return csum;
1337 }
1338
1339 static u8 qede_check_csum(u16 flag)
1340 {
1341 if (!qede_tunn_exist(flag))
1342 return qede_check_notunn_csum(flag);
1343 else
1344 return qede_check_tunn_csum(flag);
1345 }
1346
1347 static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1348 u16 flag)
1349 {
1350 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1351
1352 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1353 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1354 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1355 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1356 return true;
1357
1358 return false;
1359 }
1360
1361 static int qede_rx_int(struct qede_fastpath *fp, int budget)
1362 {
1363 struct qede_dev *edev = fp->edev;
1364 struct qede_rx_queue *rxq = fp->rxq;
1365
1366 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1367 int rx_pkt = 0;
1368 u8 csum_flag;
1369
1370 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1371 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1372
1373 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1374 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1375 * read before it is written by FW, then FW writes CQE and SB, and then
1376 * the CPU reads the hw_comp_cons, it will use an old CQE.
1377 */
1378 rmb();
1379
1380 /* Loop to complete all indicated BDs */
1381 while (sw_comp_cons != hw_comp_cons) {
1382 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1383 enum pkt_hash_types rxhash_type;
1384 enum eth_rx_cqe_type cqe_type;
1385 struct sw_rx_data *sw_rx_data;
1386 union eth_rx_cqe *cqe;
1387 struct sk_buff *skb;
1388 struct page *data;
1389 __le16 flags;
1390 u16 len, pad;
1391 u32 rx_hash;
1392
1393 /* Get the CQE from the completion ring */
1394 cqe = (union eth_rx_cqe *)
1395 qed_chain_consume(&rxq->rx_comp_ring);
1396 cqe_type = cqe->fast_path_regular.type;
1397
1398 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1399 edev->ops->eth_cqe_completion(
1400 edev->cdev, fp->rss_id,
1401 (struct eth_slow_path_rx_cqe *)cqe);
1402 goto next_cqe;
1403 }
1404
1405 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1406 switch (cqe_type) {
1407 case ETH_RX_CQE_TYPE_TPA_START:
1408 qede_tpa_start(edev, rxq,
1409 &cqe->fast_path_tpa_start);
1410 goto next_cqe;
1411 case ETH_RX_CQE_TYPE_TPA_CONT:
1412 qede_tpa_cont(edev, rxq,
1413 &cqe->fast_path_tpa_cont);
1414 goto next_cqe;
1415 case ETH_RX_CQE_TYPE_TPA_END:
1416 qede_tpa_end(edev, fp,
1417 &cqe->fast_path_tpa_end);
1418 goto next_rx_only;
1419 default:
1420 break;
1421 }
1422 }
1423
1424 /* Get the data from the SW ring */
1425 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1426 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1427 data = sw_rx_data->data;
1428
1429 fp_cqe = &cqe->fast_path_regular;
1430 len = le16_to_cpu(fp_cqe->len_on_first_bd);
1431 pad = fp_cqe->placement_offset;
1432 flags = cqe->fast_path_regular.pars_flags.flags;
1433
1434 /* If this is an error packet then drop it */
1435 parse_flag = le16_to_cpu(flags);
1436
1437 csum_flag = qede_check_csum(parse_flag);
1438 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
1439 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1440 parse_flag)) {
1441 rxq->rx_ip_frags++;
1442 goto alloc_skb;
1443 }
1444
1445 DP_NOTICE(edev,
1446 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1447 sw_comp_cons, parse_flag);
1448 rxq->rx_hw_errors++;
1449 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1450 goto next_cqe;
1451 }
1452
1453 alloc_skb:
1454 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1455 if (unlikely(!skb)) {
1456 DP_NOTICE(edev,
1457 "skb allocation failed, dropping incoming packet\n");
1458 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1459 rxq->rx_alloc_errors++;
1460 goto next_cqe;
1461 }
1462
1463 /* Copy data into SKB */
1464 if (len + pad <= edev->rx_copybreak) {
1465 memcpy(skb_put(skb, len),
1466 page_address(data) + pad +
1467 sw_rx_data->page_offset, len);
1468 qede_reuse_page(edev, rxq, sw_rx_data);
1469 } else {
1470 struct skb_frag_struct *frag;
1471 unsigned int pull_len;
1472 unsigned char *va;
1473
1474 frag = &skb_shinfo(skb)->frags[0];
1475
1476 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1477 pad + sw_rx_data->page_offset,
1478 len, rxq->rx_buf_seg_size);
1479
1480 va = skb_frag_address(frag);
1481 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1482
1483 /* Align the pull_len to optimize memcpy */
1484 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1485
1486 skb_frag_size_sub(frag, pull_len);
1487 frag->page_offset += pull_len;
1488 skb->data_len -= pull_len;
1489 skb->tail += pull_len;
1490
1491 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1492 sw_rx_data))) {
1493 DP_ERR(edev, "Failed to allocate rx buffer\n");
1494 /* Incr page ref count to reuse on allocation
1495 * failure so that it doesn't get freed while
1496 * freeing SKB.
1497 */
1498
1499 page_ref_inc(sw_rx_data->data);
1500 rxq->rx_alloc_errors++;
1501 qede_recycle_rx_bd_ring(rxq, edev,
1502 fp_cqe->bd_num);
1503 dev_kfree_skb_any(skb);
1504 goto next_cqe;
1505 }
1506 }
1507
1508 qede_rx_bd_ring_consume(rxq);
1509
1510 if (fp_cqe->bd_num != 1) {
1511 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1512 u8 num_frags;
1513
1514 pkt_len -= len;
1515
1516 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1517 num_frags--) {
1518 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1519 rxq->rx_buf_size : pkt_len;
1520 if (unlikely(!cur_size)) {
1521 DP_ERR(edev,
1522 "Still got %d BDs for mapping jumbo, but length became 0\n",
1523 num_frags);
1524 qede_recycle_rx_bd_ring(rxq, edev,
1525 num_frags);
1526 dev_kfree_skb_any(skb);
1527 goto next_cqe;
1528 }
1529
1530 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1531 qede_recycle_rx_bd_ring(rxq, edev,
1532 num_frags);
1533 dev_kfree_skb_any(skb);
1534 goto next_cqe;
1535 }
1536
1537 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1538 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1539 qede_rx_bd_ring_consume(rxq);
1540
1541 dma_unmap_page(&edev->pdev->dev,
1542 sw_rx_data->mapping,
1543 PAGE_SIZE, DMA_FROM_DEVICE);
1544
1545 skb_fill_page_desc(skb,
1546 skb_shinfo(skb)->nr_frags++,
1547 sw_rx_data->data, 0,
1548 cur_size);
1549
1550 skb->truesize += PAGE_SIZE;
1551 skb->data_len += cur_size;
1552 skb->len += cur_size;
1553 pkt_len -= cur_size;
1554 }
1555
1556 if (unlikely(pkt_len))
1557 DP_ERR(edev,
1558 "Mapped all BDs of jumbo, but still have %d bytes\n",
1559 pkt_len);
1560 }
1561
1562 skb->protocol = eth_type_trans(skb, edev->ndev);
1563
1564 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1565 fp_cqe->rss_hash, &rxhash_type);
1566
1567 skb_set_hash(skb, rx_hash, rxhash_type);
1568
1569 qede_set_skb_csum(skb, csum_flag);
1570
1571 skb_record_rx_queue(skb, fp->rss_id);
1572
1573 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1574 next_rx_only:
1575 rx_pkt++;
1576
1577 next_cqe: /* don't consume bd rx buffer */
1578 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1579 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1580 /* CR TPA - revisit how to handle budget in TPA perhaps
1581 * increase on "end"
1582 */
1583 if (rx_pkt == budget)
1584 break;
1585 } /* repeat while sw_comp_cons != hw_comp_cons... */
1586
1587 /* Update producers */
1588 qede_update_rx_prod(edev, rxq);
1589
1590 return rx_pkt;
1591 }
1592
1593 static int qede_poll(struct napi_struct *napi, int budget)
1594 {
1595 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1596 napi);
1597 struct qede_dev *edev = fp->edev;
1598 int rx_work_done = 0;
1599 u8 tc;
1600
1601 for (tc = 0; tc < edev->num_tc; tc++)
1602 if (qede_txq_has_work(&fp->txqs[tc]))
1603 qede_tx_int(edev, &fp->txqs[tc]);
1604
1605 rx_work_done = qede_has_rx_work(fp->rxq) ?
1606 qede_rx_int(fp, budget) : 0;
1607 if (rx_work_done < budget) {
1608 qed_sb_update_sb_idx(fp->sb_info);
1609 /* *_has_*_work() reads the status block,
1610 * thus we need to ensure that status block indices
1611 * have been actually read (qed_sb_update_sb_idx)
1612 * prior to this check (*_has_*_work) so that
1613 * we won't write the "newer" value of the status block
1614 * to HW (if there was a DMA right after
1615 * qede_has_rx_work and if there is no rmb, the memory
1616 * reading (qed_sb_update_sb_idx) may be postponed
1617 * to right before *_ack_sb). In this case there
1618 * will never be another interrupt until there is
1619 * another update of the status block, while there
1620 * is still unhandled work.
1621 */
1622 rmb();
1623
1624 /* Fall out from the NAPI loop if needed */
1625 if (!(qede_has_rx_work(fp->rxq) ||
1626 qede_has_tx_work(fp))) {
1627 napi_complete(napi);
1628
1629 /* Update and reenable interrupts */
1630 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1631 1 /*update*/);
1632 } else {
1633 rx_work_done = budget;
1634 }
1635 }
1636
1637 return rx_work_done;
1638 }
1639
1640 static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1641 {
1642 struct qede_fastpath *fp = fp_cookie;
1643
1644 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1645
1646 napi_schedule_irqoff(&fp->napi);
1647 return IRQ_HANDLED;
1648 }
1649
1650 /* -------------------------------------------------------------------------
1651 * END OF FAST-PATH
1652 * -------------------------------------------------------------------------
1653 */
1654
1655 static int qede_open(struct net_device *ndev);
1656 static int qede_close(struct net_device *ndev);
1657 static int qede_set_mac_addr(struct net_device *ndev, void *p);
1658 static void qede_set_rx_mode(struct net_device *ndev);
1659 static void qede_config_rx_mode(struct net_device *ndev);
1660
1661 static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1662 enum qed_filter_xcast_params_type opcode,
1663 unsigned char mac[ETH_ALEN])
1664 {
1665 struct qed_filter_params filter_cmd;
1666
1667 memset(&filter_cmd, 0, sizeof(filter_cmd));
1668 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1669 filter_cmd.filter.ucast.type = opcode;
1670 filter_cmd.filter.ucast.mac_valid = 1;
1671 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1672
1673 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1674 }
1675
1676 static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1677 enum qed_filter_xcast_params_type opcode,
1678 u16 vid)
1679 {
1680 struct qed_filter_params filter_cmd;
1681
1682 memset(&filter_cmd, 0, sizeof(filter_cmd));
1683 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1684 filter_cmd.filter.ucast.type = opcode;
1685 filter_cmd.filter.ucast.vlan_valid = 1;
1686 filter_cmd.filter.ucast.vlan = vid;
1687
1688 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1689 }
1690
1691 void qede_fill_by_demand_stats(struct qede_dev *edev)
1692 {
1693 struct qed_eth_stats stats;
1694
1695 edev->ops->get_vport_stats(edev->cdev, &stats);
1696 edev->stats.no_buff_discards = stats.no_buff_discards;
1697 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1698 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1699 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1700 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1701 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1702 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1703 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1704 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1705
1706 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1707 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1708 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1709 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1710 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1711 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1712 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1713 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1714 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1715 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1716 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1717 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1718
1719 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1720 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1721 edev->stats.rx_128_to_255_byte_packets =
1722 stats.rx_128_to_255_byte_packets;
1723 edev->stats.rx_256_to_511_byte_packets =
1724 stats.rx_256_to_511_byte_packets;
1725 edev->stats.rx_512_to_1023_byte_packets =
1726 stats.rx_512_to_1023_byte_packets;
1727 edev->stats.rx_1024_to_1518_byte_packets =
1728 stats.rx_1024_to_1518_byte_packets;
1729 edev->stats.rx_1519_to_1522_byte_packets =
1730 stats.rx_1519_to_1522_byte_packets;
1731 edev->stats.rx_1519_to_2047_byte_packets =
1732 stats.rx_1519_to_2047_byte_packets;
1733 edev->stats.rx_2048_to_4095_byte_packets =
1734 stats.rx_2048_to_4095_byte_packets;
1735 edev->stats.rx_4096_to_9216_byte_packets =
1736 stats.rx_4096_to_9216_byte_packets;
1737 edev->stats.rx_9217_to_16383_byte_packets =
1738 stats.rx_9217_to_16383_byte_packets;
1739 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1740 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1741 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1742 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1743 edev->stats.rx_align_errors = stats.rx_align_errors;
1744 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1745 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1746 edev->stats.rx_jabbers = stats.rx_jabbers;
1747 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1748 edev->stats.rx_fragments = stats.rx_fragments;
1749 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1750 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1751 edev->stats.tx_128_to_255_byte_packets =
1752 stats.tx_128_to_255_byte_packets;
1753 edev->stats.tx_256_to_511_byte_packets =
1754 stats.tx_256_to_511_byte_packets;
1755 edev->stats.tx_512_to_1023_byte_packets =
1756 stats.tx_512_to_1023_byte_packets;
1757 edev->stats.tx_1024_to_1518_byte_packets =
1758 stats.tx_1024_to_1518_byte_packets;
1759 edev->stats.tx_1519_to_2047_byte_packets =
1760 stats.tx_1519_to_2047_byte_packets;
1761 edev->stats.tx_2048_to_4095_byte_packets =
1762 stats.tx_2048_to_4095_byte_packets;
1763 edev->stats.tx_4096_to_9216_byte_packets =
1764 stats.tx_4096_to_9216_byte_packets;
1765 edev->stats.tx_9217_to_16383_byte_packets =
1766 stats.tx_9217_to_16383_byte_packets;
1767 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1768 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1769 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1770 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1771 edev->stats.brb_truncates = stats.brb_truncates;
1772 edev->stats.brb_discards = stats.brb_discards;
1773 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1774 }
1775
1776 static
1777 struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1778 struct rtnl_link_stats64 *stats)
1779 {
1780 struct qede_dev *edev = netdev_priv(dev);
1781
1782 qede_fill_by_demand_stats(edev);
1783
1784 stats->rx_packets = edev->stats.rx_ucast_pkts +
1785 edev->stats.rx_mcast_pkts +
1786 edev->stats.rx_bcast_pkts;
1787 stats->tx_packets = edev->stats.tx_ucast_pkts +
1788 edev->stats.tx_mcast_pkts +
1789 edev->stats.tx_bcast_pkts;
1790
1791 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1792 edev->stats.rx_mcast_bytes +
1793 edev->stats.rx_bcast_bytes;
1794
1795 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1796 edev->stats.tx_mcast_bytes +
1797 edev->stats.tx_bcast_bytes;
1798
1799 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1800 stats->multicast = edev->stats.rx_mcast_pkts +
1801 edev->stats.rx_bcast_pkts;
1802
1803 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1804
1805 stats->collisions = edev->stats.tx_total_collisions;
1806 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1807 stats->rx_frame_errors = edev->stats.rx_align_errors;
1808
1809 return stats;
1810 }
1811
1812 #ifdef CONFIG_QED_SRIOV
1813 static int qede_get_vf_config(struct net_device *dev, int vfidx,
1814 struct ifla_vf_info *ivi)
1815 {
1816 struct qede_dev *edev = netdev_priv(dev);
1817
1818 if (!edev->ops)
1819 return -EINVAL;
1820
1821 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1822 }
1823
1824 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1825 int min_tx_rate, int max_tx_rate)
1826 {
1827 struct qede_dev *edev = netdev_priv(dev);
1828
1829 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
1830 max_tx_rate);
1831 }
1832
1833 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1834 {
1835 struct qede_dev *edev = netdev_priv(dev);
1836
1837 if (!edev->ops)
1838 return -EINVAL;
1839
1840 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1841 }
1842
1843 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1844 int link_state)
1845 {
1846 struct qede_dev *edev = netdev_priv(dev);
1847
1848 if (!edev->ops)
1849 return -EINVAL;
1850
1851 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1852 }
1853 #endif
1854
1855 static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1856 {
1857 struct qed_update_vport_params params;
1858 int rc;
1859
1860 /* Proceed only if action actually needs to be performed */
1861 if (edev->accept_any_vlan == action)
1862 return;
1863
1864 memset(&params, 0, sizeof(params));
1865
1866 params.vport_id = 0;
1867 params.accept_any_vlan = action;
1868 params.update_accept_any_vlan_flg = 1;
1869
1870 rc = edev->ops->vport_update(edev->cdev, &params);
1871 if (rc) {
1872 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1873 action ? "enable" : "disable");
1874 } else {
1875 DP_INFO(edev, "%s accept-any-vlan\n",
1876 action ? "enabled" : "disabled");
1877 edev->accept_any_vlan = action;
1878 }
1879 }
1880
1881 static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1882 {
1883 struct qede_dev *edev = netdev_priv(dev);
1884 struct qede_vlan *vlan, *tmp;
1885 int rc;
1886
1887 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1888
1889 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1890 if (!vlan) {
1891 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1892 return -ENOMEM;
1893 }
1894 INIT_LIST_HEAD(&vlan->list);
1895 vlan->vid = vid;
1896 vlan->configured = false;
1897
1898 /* Verify vlan isn't already configured */
1899 list_for_each_entry(tmp, &edev->vlan_list, list) {
1900 if (tmp->vid == vlan->vid) {
1901 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1902 "vlan already configured\n");
1903 kfree(vlan);
1904 return -EEXIST;
1905 }
1906 }
1907
1908 /* If interface is down, cache this VLAN ID and return */
1909 if (edev->state != QEDE_STATE_OPEN) {
1910 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1911 "Interface is down, VLAN %d will be configured when interface is up\n",
1912 vid);
1913 if (vid != 0)
1914 edev->non_configured_vlans++;
1915 list_add(&vlan->list, &edev->vlan_list);
1916
1917 return 0;
1918 }
1919
1920 /* Check for the filter limit.
1921 * Note - vlan0 has a reserved filter and can be added without
1922 * worrying about quota
1923 */
1924 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1925 (vlan->vid == 0)) {
1926 rc = qede_set_ucast_rx_vlan(edev,
1927 QED_FILTER_XCAST_TYPE_ADD,
1928 vlan->vid);
1929 if (rc) {
1930 DP_ERR(edev, "Failed to configure VLAN %d\n",
1931 vlan->vid);
1932 kfree(vlan);
1933 return -EINVAL;
1934 }
1935 vlan->configured = true;
1936
1937 /* vlan0 filter isn't consuming out of our quota */
1938 if (vlan->vid != 0)
1939 edev->configured_vlans++;
1940 } else {
1941 /* Out of quota; Activate accept-any-VLAN mode */
1942 if (!edev->non_configured_vlans)
1943 qede_config_accept_any_vlan(edev, true);
1944
1945 edev->non_configured_vlans++;
1946 }
1947
1948 list_add(&vlan->list, &edev->vlan_list);
1949
1950 return 0;
1951 }
1952
1953 static void qede_del_vlan_from_list(struct qede_dev *edev,
1954 struct qede_vlan *vlan)
1955 {
1956 /* vlan0 filter isn't consuming out of our quota */
1957 if (vlan->vid != 0) {
1958 if (vlan->configured)
1959 edev->configured_vlans--;
1960 else
1961 edev->non_configured_vlans--;
1962 }
1963
1964 list_del(&vlan->list);
1965 kfree(vlan);
1966 }
1967
1968 static int qede_configure_vlan_filters(struct qede_dev *edev)
1969 {
1970 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1971 struct qed_dev_eth_info *dev_info;
1972 struct qede_vlan *vlan = NULL;
1973
1974 if (list_empty(&edev->vlan_list))
1975 return 0;
1976
1977 dev_info = &edev->dev_info;
1978
1979 /* Configure non-configured vlans */
1980 list_for_each_entry(vlan, &edev->vlan_list, list) {
1981 if (vlan->configured)
1982 continue;
1983
1984 /* We have used all our credits, now enable accept_any_vlan */
1985 if ((vlan->vid != 0) &&
1986 (edev->configured_vlans == dev_info->num_vlan_filters)) {
1987 accept_any_vlan = 1;
1988 continue;
1989 }
1990
1991 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
1992
1993 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
1994 vlan->vid);
1995 if (rc) {
1996 DP_ERR(edev, "Failed to configure VLAN %u\n",
1997 vlan->vid);
1998 real_rc = rc;
1999 continue;
2000 }
2001
2002 vlan->configured = true;
2003 /* vlan0 filter doesn't consume our VLAN filter's quota */
2004 if (vlan->vid != 0) {
2005 edev->non_configured_vlans--;
2006 edev->configured_vlans++;
2007 }
2008 }
2009
2010 /* enable accept_any_vlan mode if we have more VLANs than credits,
2011 * or remove accept_any_vlan mode if we've actually removed
2012 * a non-configured vlan, and all remaining vlans are truly configured.
2013 */
2014
2015 if (accept_any_vlan)
2016 qede_config_accept_any_vlan(edev, true);
2017 else if (!edev->non_configured_vlans)
2018 qede_config_accept_any_vlan(edev, false);
2019
2020 return real_rc;
2021 }
2022
2023 static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2024 {
2025 struct qede_dev *edev = netdev_priv(dev);
2026 struct qede_vlan *vlan = NULL;
2027 int rc;
2028
2029 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2030
2031 /* Find whether entry exists */
2032 list_for_each_entry(vlan, &edev->vlan_list, list)
2033 if (vlan->vid == vid)
2034 break;
2035
2036 if (!vlan || (vlan->vid != vid)) {
2037 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2038 "Vlan isn't configured\n");
2039 return 0;
2040 }
2041
2042 if (edev->state != QEDE_STATE_OPEN) {
2043 /* As interface is already down, we don't have a VPORT
2044 * instance to remove vlan filter. So just update vlan list
2045 */
2046 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2047 "Interface is down, removing VLAN from list only\n");
2048 qede_del_vlan_from_list(edev, vlan);
2049 return 0;
2050 }
2051
2052 /* Remove vlan */
2053 if (vlan->configured) {
2054 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2055 vid);
2056 if (rc) {
2057 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2058 return -EINVAL;
2059 }
2060 }
2061
2062 qede_del_vlan_from_list(edev, vlan);
2063
2064 /* We have removed a VLAN - try to see if we can
2065 * configure non-configured VLAN from the list.
2066 */
2067 rc = qede_configure_vlan_filters(edev);
2068
2069 return rc;
2070 }
2071
2072 static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2073 {
2074 struct qede_vlan *vlan = NULL;
2075
2076 if (list_empty(&edev->vlan_list))
2077 return;
2078
2079 list_for_each_entry(vlan, &edev->vlan_list, list) {
2080 if (!vlan->configured)
2081 continue;
2082
2083 vlan->configured = false;
2084
2085 /* vlan0 filter isn't consuming out of our quota */
2086 if (vlan->vid != 0) {
2087 edev->non_configured_vlans++;
2088 edev->configured_vlans--;
2089 }
2090
2091 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2092 "marked vlan %d as non-configured\n", vlan->vid);
2093 }
2094
2095 edev->accept_any_vlan = false;
2096 }
2097
2098 int qede_set_features(struct net_device *dev, netdev_features_t features)
2099 {
2100 struct qede_dev *edev = netdev_priv(dev);
2101 netdev_features_t changes = features ^ dev->features;
2102 bool need_reload = false;
2103
2104 /* No action needed if hardware GRO is disabled during driver load */
2105 if (changes & NETIF_F_GRO) {
2106 if (dev->features & NETIF_F_GRO)
2107 need_reload = !edev->gro_disable;
2108 else
2109 need_reload = edev->gro_disable;
2110 }
2111
2112 if (need_reload && netif_running(edev->ndev)) {
2113 dev->features = features;
2114 qede_reload(edev, NULL, NULL);
2115 return 1;
2116 }
2117
2118 return 0;
2119 }
2120
2121 static void qede_udp_tunnel_add(struct net_device *dev,
2122 struct udp_tunnel_info *ti)
2123 {
2124 struct qede_dev *edev = netdev_priv(dev);
2125 u16 t_port = ntohs(ti->port);
2126
2127 switch (ti->type) {
2128 case UDP_TUNNEL_TYPE_VXLAN:
2129 if (edev->vxlan_dst_port)
2130 return;
2131
2132 edev->vxlan_dst_port = t_port;
2133
2134 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
2135 t_port);
2136
2137 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2138 break;
2139 case UDP_TUNNEL_TYPE_GENEVE:
2140 if (edev->geneve_dst_port)
2141 return;
2142
2143 edev->geneve_dst_port = t_port;
2144
2145 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
2146 t_port);
2147 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2148 break;
2149 default:
2150 return;
2151 }
2152
2153 schedule_delayed_work(&edev->sp_task, 0);
2154 }
2155
2156 static void qede_udp_tunnel_del(struct net_device *dev,
2157 struct udp_tunnel_info *ti)
2158 {
2159 struct qede_dev *edev = netdev_priv(dev);
2160 u16 t_port = ntohs(ti->port);
2161
2162 switch (ti->type) {
2163 case UDP_TUNNEL_TYPE_VXLAN:
2164 if (t_port != edev->vxlan_dst_port)
2165 return;
2166
2167 edev->vxlan_dst_port = 0;
2168
2169 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
2170 t_port);
2171
2172 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2173 break;
2174 case UDP_TUNNEL_TYPE_GENEVE:
2175 if (t_port != edev->geneve_dst_port)
2176 return;
2177
2178 edev->geneve_dst_port = 0;
2179
2180 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
2181 t_port);
2182 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2183 break;
2184 default:
2185 return;
2186 }
2187
2188 schedule_delayed_work(&edev->sp_task, 0);
2189 }
2190
2191 static const struct net_device_ops qede_netdev_ops = {
2192 .ndo_open = qede_open,
2193 .ndo_stop = qede_close,
2194 .ndo_start_xmit = qede_start_xmit,
2195 .ndo_set_rx_mode = qede_set_rx_mode,
2196 .ndo_set_mac_address = qede_set_mac_addr,
2197 .ndo_validate_addr = eth_validate_addr,
2198 .ndo_change_mtu = qede_change_mtu,
2199 #ifdef CONFIG_QED_SRIOV
2200 .ndo_set_vf_mac = qede_set_vf_mac,
2201 .ndo_set_vf_vlan = qede_set_vf_vlan,
2202 #endif
2203 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2204 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
2205 .ndo_set_features = qede_set_features,
2206 .ndo_get_stats64 = qede_get_stats64,
2207 #ifdef CONFIG_QED_SRIOV
2208 .ndo_set_vf_link_state = qede_set_vf_link_state,
2209 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
2210 .ndo_get_vf_config = qede_get_vf_config,
2211 .ndo_set_vf_rate = qede_set_vf_rate,
2212 #endif
2213 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2214 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
2215 };
2216
2217 /* -------------------------------------------------------------------------
2218 * START OF PROBE / REMOVE
2219 * -------------------------------------------------------------------------
2220 */
2221
2222 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2223 struct pci_dev *pdev,
2224 struct qed_dev_eth_info *info,
2225 u32 dp_module, u8 dp_level)
2226 {
2227 struct net_device *ndev;
2228 struct qede_dev *edev;
2229
2230 ndev = alloc_etherdev_mqs(sizeof(*edev),
2231 info->num_queues, info->num_queues);
2232 if (!ndev) {
2233 pr_err("etherdev allocation failed\n");
2234 return NULL;
2235 }
2236
2237 edev = netdev_priv(ndev);
2238 edev->ndev = ndev;
2239 edev->cdev = cdev;
2240 edev->pdev = pdev;
2241 edev->dp_module = dp_module;
2242 edev->dp_level = dp_level;
2243 edev->ops = qed_ops;
2244 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2245 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
2246
2247 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2248 info->num_queues, info->num_queues);
2249
2250 SET_NETDEV_DEV(ndev, &pdev->dev);
2251
2252 memset(&edev->stats, 0, sizeof(edev->stats));
2253 memcpy(&edev->dev_info, info, sizeof(*info));
2254
2255 edev->num_tc = edev->dev_info.num_tc;
2256
2257 INIT_LIST_HEAD(&edev->vlan_list);
2258
2259 return edev;
2260 }
2261
2262 static void qede_init_ndev(struct qede_dev *edev)
2263 {
2264 struct net_device *ndev = edev->ndev;
2265 struct pci_dev *pdev = edev->pdev;
2266 u32 hw_features;
2267
2268 pci_set_drvdata(pdev, ndev);
2269
2270 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2271 ndev->base_addr = ndev->mem_start;
2272 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2273 ndev->irq = edev->dev_info.common.pci_irq;
2274
2275 ndev->watchdog_timeo = TX_TIMEOUT;
2276
2277 ndev->netdev_ops = &qede_netdev_ops;
2278
2279 qede_set_ethtool_ops(ndev);
2280
2281 /* user-changeble features */
2282 hw_features = NETIF_F_GRO | NETIF_F_SG |
2283 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2284 NETIF_F_TSO | NETIF_F_TSO6;
2285
2286 /* Encap features*/
2287 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2288 NETIF_F_TSO_ECN;
2289 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2290 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2291 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2292 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2293
2294 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2295 NETIF_F_HIGHDMA;
2296 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2297 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
2298 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
2299
2300 ndev->hw_features = hw_features;
2301
2302 /* Set network device HW mac */
2303 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2304 }
2305
2306 /* This function converts from 32b param to two params of level and module
2307 * Input 32b decoding:
2308 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2309 * 'happy' flow, e.g. memory allocation failed.
2310 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2311 * and provide important parameters.
2312 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2313 * module. VERBOSE prints are for tracking the specific flow in low level.
2314 *
2315 * Notice that the level should be that of the lowest required logs.
2316 */
2317 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
2318 {
2319 *p_dp_level = QED_LEVEL_NOTICE;
2320 *p_dp_module = 0;
2321
2322 if (debug & QED_LOG_VERBOSE_MASK) {
2323 *p_dp_level = QED_LEVEL_VERBOSE;
2324 *p_dp_module = (debug & 0x3FFFFFFF);
2325 } else if (debug & QED_LOG_INFO_MASK) {
2326 *p_dp_level = QED_LEVEL_INFO;
2327 } else if (debug & QED_LOG_NOTICE_MASK) {
2328 *p_dp_level = QED_LEVEL_NOTICE;
2329 }
2330 }
2331
2332 static void qede_free_fp_array(struct qede_dev *edev)
2333 {
2334 if (edev->fp_array) {
2335 struct qede_fastpath *fp;
2336 int i;
2337
2338 for_each_rss(i) {
2339 fp = &edev->fp_array[i];
2340
2341 kfree(fp->sb_info);
2342 kfree(fp->rxq);
2343 kfree(fp->txqs);
2344 }
2345 kfree(edev->fp_array);
2346 }
2347 edev->num_rss = 0;
2348 }
2349
2350 static int qede_alloc_fp_array(struct qede_dev *edev)
2351 {
2352 struct qede_fastpath *fp;
2353 int i;
2354
2355 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
2356 sizeof(*edev->fp_array), GFP_KERNEL);
2357 if (!edev->fp_array) {
2358 DP_NOTICE(edev, "fp array allocation failed\n");
2359 goto err;
2360 }
2361
2362 for_each_rss(i) {
2363 fp = &edev->fp_array[i];
2364
2365 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2366 if (!fp->sb_info) {
2367 DP_NOTICE(edev, "sb info struct allocation failed\n");
2368 goto err;
2369 }
2370
2371 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2372 if (!fp->rxq) {
2373 DP_NOTICE(edev, "RXQ struct allocation failed\n");
2374 goto err;
2375 }
2376
2377 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
2378 if (!fp->txqs) {
2379 DP_NOTICE(edev, "TXQ array allocation failed\n");
2380 goto err;
2381 }
2382 }
2383
2384 return 0;
2385 err:
2386 qede_free_fp_array(edev);
2387 return -ENOMEM;
2388 }
2389
2390 static void qede_sp_task(struct work_struct *work)
2391 {
2392 struct qede_dev *edev = container_of(work, struct qede_dev,
2393 sp_task.work);
2394 struct qed_dev *cdev = edev->cdev;
2395
2396 mutex_lock(&edev->qede_lock);
2397
2398 if (edev->state == QEDE_STATE_OPEN) {
2399 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2400 qede_config_rx_mode(edev->ndev);
2401 }
2402
2403 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2404 struct qed_tunn_params tunn_params;
2405
2406 memset(&tunn_params, 0, sizeof(tunn_params));
2407 tunn_params.update_vxlan_port = 1;
2408 tunn_params.vxlan_port = edev->vxlan_dst_port;
2409 qed_ops->tunn_config(cdev, &tunn_params);
2410 }
2411
2412 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2413 struct qed_tunn_params tunn_params;
2414
2415 memset(&tunn_params, 0, sizeof(tunn_params));
2416 tunn_params.update_geneve_port = 1;
2417 tunn_params.geneve_port = edev->geneve_dst_port;
2418 qed_ops->tunn_config(cdev, &tunn_params);
2419 }
2420
2421 mutex_unlock(&edev->qede_lock);
2422 }
2423
2424 static void qede_update_pf_params(struct qed_dev *cdev)
2425 {
2426 struct qed_pf_params pf_params;
2427
2428 /* 64 rx + 64 tx */
2429 memset(&pf_params, 0, sizeof(struct qed_pf_params));
2430 pf_params.eth_pf_params.num_cons = 128;
2431 qed_ops->common->update_pf_params(cdev, &pf_params);
2432 }
2433
2434 enum qede_probe_mode {
2435 QEDE_PROBE_NORMAL,
2436 };
2437
2438 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
2439 bool is_vf, enum qede_probe_mode mode)
2440 {
2441 struct qed_probe_params probe_params;
2442 struct qed_slowpath_params sp_params;
2443 struct qed_dev_eth_info dev_info;
2444 struct qede_dev *edev;
2445 struct qed_dev *cdev;
2446 int rc;
2447
2448 if (unlikely(dp_level & QED_LEVEL_INFO))
2449 pr_notice("Starting qede probe\n");
2450
2451 memset(&probe_params, 0, sizeof(probe_params));
2452 probe_params.protocol = QED_PROTOCOL_ETH;
2453 probe_params.dp_module = dp_module;
2454 probe_params.dp_level = dp_level;
2455 probe_params.is_vf = is_vf;
2456 cdev = qed_ops->common->probe(pdev, &probe_params);
2457 if (!cdev) {
2458 rc = -ENODEV;
2459 goto err0;
2460 }
2461
2462 qede_update_pf_params(cdev);
2463
2464 /* Start the Slowpath-process */
2465 memset(&sp_params, 0, sizeof(sp_params));
2466 sp_params.int_mode = QED_INT_MODE_MSIX;
2467 sp_params.drv_major = QEDE_MAJOR_VERSION;
2468 sp_params.drv_minor = QEDE_MINOR_VERSION;
2469 sp_params.drv_rev = QEDE_REVISION_VERSION;
2470 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2471 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2472 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
2473 if (rc) {
2474 pr_notice("Cannot start slowpath\n");
2475 goto err1;
2476 }
2477
2478 /* Learn information crucial for qede to progress */
2479 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2480 if (rc)
2481 goto err2;
2482
2483 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2484 dp_level);
2485 if (!edev) {
2486 rc = -ENOMEM;
2487 goto err2;
2488 }
2489
2490 if (is_vf)
2491 edev->flags |= QEDE_FLAG_IS_VF;
2492
2493 qede_init_ndev(edev);
2494
2495 rc = register_netdev(edev->ndev);
2496 if (rc) {
2497 DP_NOTICE(edev, "Cannot register net-device\n");
2498 goto err3;
2499 }
2500
2501 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2502
2503 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2504
2505 #ifdef CONFIG_DCB
2506 qede_set_dcbnl_ops(edev->ndev);
2507 #endif
2508
2509 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2510 mutex_init(&edev->qede_lock);
2511 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
2512
2513 DP_INFO(edev, "Ending successfully qede probe\n");
2514
2515 return 0;
2516
2517 err3:
2518 free_netdev(edev->ndev);
2519 err2:
2520 qed_ops->common->slowpath_stop(cdev);
2521 err1:
2522 qed_ops->common->remove(cdev);
2523 err0:
2524 return rc;
2525 }
2526
2527 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2528 {
2529 bool is_vf = false;
2530 u32 dp_module = 0;
2531 u8 dp_level = 0;
2532
2533 switch ((enum qede_pci_private)id->driver_data) {
2534 case QEDE_PRIVATE_VF:
2535 if (debug & QED_LOG_VERBOSE_MASK)
2536 dev_err(&pdev->dev, "Probing a VF\n");
2537 is_vf = true;
2538 break;
2539 default:
2540 if (debug & QED_LOG_VERBOSE_MASK)
2541 dev_err(&pdev->dev, "Probing a PF\n");
2542 }
2543
2544 qede_config_debug(debug, &dp_module, &dp_level);
2545
2546 return __qede_probe(pdev, dp_module, dp_level, is_vf,
2547 QEDE_PROBE_NORMAL);
2548 }
2549
2550 enum qede_remove_mode {
2551 QEDE_REMOVE_NORMAL,
2552 };
2553
2554 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2555 {
2556 struct net_device *ndev = pci_get_drvdata(pdev);
2557 struct qede_dev *edev = netdev_priv(ndev);
2558 struct qed_dev *cdev = edev->cdev;
2559
2560 DP_INFO(edev, "Starting qede_remove\n");
2561
2562 cancel_delayed_work_sync(&edev->sp_task);
2563 unregister_netdev(ndev);
2564
2565 edev->ops->common->set_power_state(cdev, PCI_D0);
2566
2567 pci_set_drvdata(pdev, NULL);
2568
2569 free_netdev(ndev);
2570
2571 /* Use global ops since we've freed edev */
2572 qed_ops->common->slowpath_stop(cdev);
2573 qed_ops->common->remove(cdev);
2574
2575 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
2576 }
2577
2578 static void qede_remove(struct pci_dev *pdev)
2579 {
2580 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2581 }
2582
2583 /* -------------------------------------------------------------------------
2584 * START OF LOAD / UNLOAD
2585 * -------------------------------------------------------------------------
2586 */
2587
2588 static int qede_set_num_queues(struct qede_dev *edev)
2589 {
2590 int rc;
2591 u16 rss_num;
2592
2593 /* Setup queues according to possible resources*/
2594 if (edev->req_rss)
2595 rss_num = edev->req_rss;
2596 else
2597 rss_num = netif_get_num_default_rss_queues() *
2598 edev->dev_info.common.num_hwfns;
2599
2600 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2601
2602 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2603 if (rc > 0) {
2604 /* Managed to request interrupts for our queues */
2605 edev->num_rss = rc;
2606 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
2607 QEDE_RSS_CNT(edev), rss_num);
2608 rc = 0;
2609 }
2610 return rc;
2611 }
2612
2613 static void qede_free_mem_sb(struct qede_dev *edev,
2614 struct qed_sb_info *sb_info)
2615 {
2616 if (sb_info->sb_virt)
2617 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2618 (void *)sb_info->sb_virt, sb_info->sb_phys);
2619 }
2620
2621 /* This function allocates fast-path status block memory */
2622 static int qede_alloc_mem_sb(struct qede_dev *edev,
2623 struct qed_sb_info *sb_info, u16 sb_id)
2624 {
2625 struct status_block *sb_virt;
2626 dma_addr_t sb_phys;
2627 int rc;
2628
2629 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
2630 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
2631 if (!sb_virt) {
2632 DP_ERR(edev, "Status block allocation failed\n");
2633 return -ENOMEM;
2634 }
2635
2636 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2637 sb_virt, sb_phys, sb_id,
2638 QED_SB_TYPE_L2_QUEUE);
2639 if (rc) {
2640 DP_ERR(edev, "Status block initialization failed\n");
2641 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2642 sb_virt, sb_phys);
2643 return rc;
2644 }
2645
2646 return 0;
2647 }
2648
2649 static void qede_free_rx_buffers(struct qede_dev *edev,
2650 struct qede_rx_queue *rxq)
2651 {
2652 u16 i;
2653
2654 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2655 struct sw_rx_data *rx_buf;
2656 struct page *data;
2657
2658 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2659 data = rx_buf->data;
2660
2661 dma_unmap_page(&edev->pdev->dev,
2662 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
2663
2664 rx_buf->data = NULL;
2665 __free_page(data);
2666 }
2667 }
2668
2669 static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2670 {
2671 int i;
2672
2673 if (edev->gro_disable)
2674 return;
2675
2676 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2677 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2678 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2679
2680 if (replace_buf->data) {
2681 dma_unmap_page(&edev->pdev->dev,
2682 replace_buf->mapping,
2683 PAGE_SIZE, DMA_FROM_DEVICE);
2684 __free_page(replace_buf->data);
2685 }
2686 }
2687 }
2688
2689 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2690 {
2691 qede_free_sge_mem(edev, rxq);
2692
2693 /* Free rx buffers */
2694 qede_free_rx_buffers(edev, rxq);
2695
2696 /* Free the parallel SW ring */
2697 kfree(rxq->sw_rx_ring);
2698
2699 /* Free the real RQ ring used by FW */
2700 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2701 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2702 }
2703
2704 static int qede_alloc_rx_buffer(struct qede_dev *edev,
2705 struct qede_rx_queue *rxq)
2706 {
2707 struct sw_rx_data *sw_rx_data;
2708 struct eth_rx_bd *rx_bd;
2709 dma_addr_t mapping;
2710 struct page *data;
2711
2712 data = alloc_pages(GFP_ATOMIC, 0);
2713 if (unlikely(!data)) {
2714 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2715 return -ENOMEM;
2716 }
2717
2718 /* Map the entire page as it would be used
2719 * for multiple RX buffer segment size mapping.
2720 */
2721 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2722 PAGE_SIZE, DMA_FROM_DEVICE);
2723 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2724 __free_page(data);
2725 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2726 return -ENOMEM;
2727 }
2728
2729 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
2730 sw_rx_data->page_offset = 0;
2731 sw_rx_data->data = data;
2732 sw_rx_data->mapping = mapping;
2733
2734 /* Advance PROD and get BD pointer */
2735 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2736 WARN_ON(!rx_bd);
2737 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2738 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2739
2740 rxq->sw_rx_prod++;
2741
2742 return 0;
2743 }
2744
2745 static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2746 {
2747 dma_addr_t mapping;
2748 int i;
2749
2750 if (edev->gro_disable)
2751 return 0;
2752
2753 if (edev->ndev->mtu > PAGE_SIZE) {
2754 edev->gro_disable = 1;
2755 return 0;
2756 }
2757
2758 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2759 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2760 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2761
2762 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2763 if (unlikely(!replace_buf->data)) {
2764 DP_NOTICE(edev,
2765 "Failed to allocate TPA skb pool [replacement buffer]\n");
2766 goto err;
2767 }
2768
2769 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2770 rxq->rx_buf_size, DMA_FROM_DEVICE);
2771 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2772 DP_NOTICE(edev,
2773 "Failed to map TPA replacement buffer\n");
2774 goto err;
2775 }
2776
2777 replace_buf->mapping = mapping;
2778 tpa_info->replace_buf.page_offset = 0;
2779
2780 tpa_info->replace_buf_mapping = mapping;
2781 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2782 }
2783
2784 return 0;
2785 err:
2786 qede_free_sge_mem(edev, rxq);
2787 edev->gro_disable = 1;
2788 return -ENOMEM;
2789 }
2790
2791 /* This function allocates all memory needed per Rx queue */
2792 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2793 {
2794 int i, rc, size;
2795
2796 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2797
2798 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2799
2800 if (rxq->rx_buf_size > PAGE_SIZE)
2801 rxq->rx_buf_size = PAGE_SIZE;
2802
2803 /* Segment size to spilt a page in multiple equal parts */
2804 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2805
2806 /* Allocate the parallel driver ring for Rx buffers */
2807 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2808 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2809 if (!rxq->sw_rx_ring) {
2810 DP_ERR(edev, "Rx buffers ring allocation failed\n");
2811 rc = -ENOMEM;
2812 goto err;
2813 }
2814
2815 /* Allocate FW Rx ring */
2816 rc = edev->ops->common->chain_alloc(edev->cdev,
2817 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2818 QED_CHAIN_MODE_NEXT_PTR,
2819 QED_CHAIN_CNT_TYPE_U16,
2820 RX_RING_SIZE,
2821 sizeof(struct eth_rx_bd),
2822 &rxq->rx_bd_ring);
2823
2824 if (rc)
2825 goto err;
2826
2827 /* Allocate FW completion ring */
2828 rc = edev->ops->common->chain_alloc(edev->cdev,
2829 QED_CHAIN_USE_TO_CONSUME,
2830 QED_CHAIN_MODE_PBL,
2831 QED_CHAIN_CNT_TYPE_U16,
2832 RX_RING_SIZE,
2833 sizeof(union eth_rx_cqe),
2834 &rxq->rx_comp_ring);
2835 if (rc)
2836 goto err;
2837
2838 /* Allocate buffers for the Rx ring */
2839 for (i = 0; i < rxq->num_rx_buffers; i++) {
2840 rc = qede_alloc_rx_buffer(edev, rxq);
2841 if (rc) {
2842 DP_ERR(edev,
2843 "Rx buffers allocation failed at index %d\n", i);
2844 goto err;
2845 }
2846 }
2847
2848 rc = qede_alloc_sge_mem(edev, rxq);
2849 err:
2850 return rc;
2851 }
2852
2853 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2854 {
2855 /* Free the parallel SW ring */
2856 kfree(txq->sw_tx_ring);
2857
2858 /* Free the real RQ ring used by FW */
2859 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2860 }
2861
2862 /* This function allocates all memory needed per Tx queue */
2863 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2864 {
2865 int size, rc;
2866 union eth_tx_bd_types *p_virt;
2867
2868 txq->num_tx_buffers = edev->q_num_tx_buffers;
2869
2870 /* Allocate the parallel driver ring for Tx buffers */
2871 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2872 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2873 if (!txq->sw_tx_ring) {
2874 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2875 goto err;
2876 }
2877
2878 rc = edev->ops->common->chain_alloc(edev->cdev,
2879 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2880 QED_CHAIN_MODE_PBL,
2881 QED_CHAIN_CNT_TYPE_U16,
2882 NUM_TX_BDS_MAX,
2883 sizeof(*p_virt), &txq->tx_pbl);
2884 if (rc)
2885 goto err;
2886
2887 return 0;
2888
2889 err:
2890 qede_free_mem_txq(edev, txq);
2891 return -ENOMEM;
2892 }
2893
2894 /* This function frees all memory of a single fp */
2895 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2896 {
2897 int tc;
2898
2899 qede_free_mem_sb(edev, fp->sb_info);
2900
2901 qede_free_mem_rxq(edev, fp->rxq);
2902
2903 for (tc = 0; tc < edev->num_tc; tc++)
2904 qede_free_mem_txq(edev, &fp->txqs[tc]);
2905 }
2906
2907 /* This function allocates all memory needed for a single fp (i.e. an entity
2908 * which contains status block, one rx queue and multiple per-TC tx queues.
2909 */
2910 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2911 {
2912 int rc, tc;
2913
2914 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
2915 if (rc)
2916 goto err;
2917
2918 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2919 if (rc)
2920 goto err;
2921
2922 for (tc = 0; tc < edev->num_tc; tc++) {
2923 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2924 if (rc)
2925 goto err;
2926 }
2927
2928 return 0;
2929 err:
2930 return rc;
2931 }
2932
2933 static void qede_free_mem_load(struct qede_dev *edev)
2934 {
2935 int i;
2936
2937 for_each_rss(i) {
2938 struct qede_fastpath *fp = &edev->fp_array[i];
2939
2940 qede_free_mem_fp(edev, fp);
2941 }
2942 }
2943
2944 /* This function allocates all qede memory at NIC load. */
2945 static int qede_alloc_mem_load(struct qede_dev *edev)
2946 {
2947 int rc = 0, rss_id;
2948
2949 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
2950 struct qede_fastpath *fp = &edev->fp_array[rss_id];
2951
2952 rc = qede_alloc_mem_fp(edev, fp);
2953 if (rc) {
2954 DP_ERR(edev,
2955 "Failed to allocate memory for fastpath - rss id = %d\n",
2956 rss_id);
2957 qede_free_mem_load(edev);
2958 return rc;
2959 }
2960 }
2961
2962 return 0;
2963 }
2964
2965 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
2966 static void qede_init_fp(struct qede_dev *edev)
2967 {
2968 int rss_id, txq_index, tc;
2969 struct qede_fastpath *fp;
2970
2971 for_each_rss(rss_id) {
2972 fp = &edev->fp_array[rss_id];
2973
2974 fp->edev = edev;
2975 fp->rss_id = rss_id;
2976
2977 memset((void *)&fp->napi, 0, sizeof(fp->napi));
2978
2979 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
2980
2981 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
2982 fp->rxq->rxq_id = rss_id;
2983
2984 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
2985 for (tc = 0; tc < edev->num_tc; tc++) {
2986 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
2987 fp->txqs[tc].index = txq_index;
2988 }
2989
2990 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
2991 edev->ndev->name, rss_id);
2992 }
2993
2994 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2995 }
2996
2997 static int qede_set_real_num_queues(struct qede_dev *edev)
2998 {
2999 int rc = 0;
3000
3001 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
3002 if (rc) {
3003 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3004 return rc;
3005 }
3006 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
3007 if (rc) {
3008 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3009 return rc;
3010 }
3011
3012 return 0;
3013 }
3014
3015 static void qede_napi_disable_remove(struct qede_dev *edev)
3016 {
3017 int i;
3018
3019 for_each_rss(i) {
3020 napi_disable(&edev->fp_array[i].napi);
3021
3022 netif_napi_del(&edev->fp_array[i].napi);
3023 }
3024 }
3025
3026 static void qede_napi_add_enable(struct qede_dev *edev)
3027 {
3028 int i;
3029
3030 /* Add NAPI objects */
3031 for_each_rss(i) {
3032 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3033 qede_poll, NAPI_POLL_WEIGHT);
3034 napi_enable(&edev->fp_array[i].napi);
3035 }
3036 }
3037
3038 static void qede_sync_free_irqs(struct qede_dev *edev)
3039 {
3040 int i;
3041
3042 for (i = 0; i < edev->int_info.used_cnt; i++) {
3043 if (edev->int_info.msix_cnt) {
3044 synchronize_irq(edev->int_info.msix[i].vector);
3045 free_irq(edev->int_info.msix[i].vector,
3046 &edev->fp_array[i]);
3047 } else {
3048 edev->ops->common->simd_handler_clean(edev->cdev, i);
3049 }
3050 }
3051
3052 edev->int_info.used_cnt = 0;
3053 }
3054
3055 static int qede_req_msix_irqs(struct qede_dev *edev)
3056 {
3057 int i, rc;
3058
3059 /* Sanitize number of interrupts == number of prepared RSS queues */
3060 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
3061 DP_ERR(edev,
3062 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
3063 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
3064 return -EINVAL;
3065 }
3066
3067 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
3068 rc = request_irq(edev->int_info.msix[i].vector,
3069 qede_msix_fp_int, 0, edev->fp_array[i].name,
3070 &edev->fp_array[i]);
3071 if (rc) {
3072 DP_ERR(edev, "Request fp %d irq failed\n", i);
3073 qede_sync_free_irqs(edev);
3074 return rc;
3075 }
3076 DP_VERBOSE(edev, NETIF_MSG_INTR,
3077 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3078 edev->fp_array[i].name, i,
3079 &edev->fp_array[i]);
3080 edev->int_info.used_cnt++;
3081 }
3082
3083 return 0;
3084 }
3085
3086 static void qede_simd_fp_handler(void *cookie)
3087 {
3088 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3089
3090 napi_schedule_irqoff(&fp->napi);
3091 }
3092
3093 static int qede_setup_irqs(struct qede_dev *edev)
3094 {
3095 int i, rc = 0;
3096
3097 /* Learn Interrupt configuration */
3098 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3099 if (rc)
3100 return rc;
3101
3102 if (edev->int_info.msix_cnt) {
3103 rc = qede_req_msix_irqs(edev);
3104 if (rc)
3105 return rc;
3106 edev->ndev->irq = edev->int_info.msix[0].vector;
3107 } else {
3108 const struct qed_common_ops *ops;
3109
3110 /* qed should learn receive the RSS ids and callbacks */
3111 ops = edev->ops->common;
3112 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
3113 ops->simd_handler_config(edev->cdev,
3114 &edev->fp_array[i], i,
3115 qede_simd_fp_handler);
3116 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
3117 }
3118 return 0;
3119 }
3120
3121 static int qede_drain_txq(struct qede_dev *edev,
3122 struct qede_tx_queue *txq, bool allow_drain)
3123 {
3124 int rc, cnt = 1000;
3125
3126 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3127 if (!cnt) {
3128 if (allow_drain) {
3129 DP_NOTICE(edev,
3130 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3131 txq->index);
3132 rc = edev->ops->common->drain(edev->cdev);
3133 if (rc)
3134 return rc;
3135 return qede_drain_txq(edev, txq, false);
3136 }
3137 DP_NOTICE(edev,
3138 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3139 txq->index, txq->sw_tx_prod,
3140 txq->sw_tx_cons);
3141 return -ENODEV;
3142 }
3143 cnt--;
3144 usleep_range(1000, 2000);
3145 barrier();
3146 }
3147
3148 /* FW finished processing, wait for HW to transmit all tx packets */
3149 usleep_range(1000, 2000);
3150
3151 return 0;
3152 }
3153
3154 static int qede_stop_queues(struct qede_dev *edev)
3155 {
3156 struct qed_update_vport_params vport_update_params;
3157 struct qed_dev *cdev = edev->cdev;
3158 int rc, tc, i;
3159
3160 /* Disable the vport */
3161 memset(&vport_update_params, 0, sizeof(vport_update_params));
3162 vport_update_params.vport_id = 0;
3163 vport_update_params.update_vport_active_flg = 1;
3164 vport_update_params.vport_active_flg = 0;
3165 vport_update_params.update_rss_flg = 0;
3166
3167 rc = edev->ops->vport_update(cdev, &vport_update_params);
3168 if (rc) {
3169 DP_ERR(edev, "Failed to update vport\n");
3170 return rc;
3171 }
3172
3173 /* Flush Tx queues. If needed, request drain from MCP */
3174 for_each_rss(i) {
3175 struct qede_fastpath *fp = &edev->fp_array[i];
3176
3177 for (tc = 0; tc < edev->num_tc; tc++) {
3178 struct qede_tx_queue *txq = &fp->txqs[tc];
3179
3180 rc = qede_drain_txq(edev, txq, true);
3181 if (rc)
3182 return rc;
3183 }
3184 }
3185
3186 /* Stop all Queues in reverse order*/
3187 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
3188 struct qed_stop_rxq_params rx_params;
3189
3190 /* Stop the Tx Queue(s)*/
3191 for (tc = 0; tc < edev->num_tc; tc++) {
3192 struct qed_stop_txq_params tx_params;
3193
3194 tx_params.rss_id = i;
3195 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
3196 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3197 if (rc) {
3198 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3199 tx_params.tx_queue_id);
3200 return rc;
3201 }
3202 }
3203
3204 /* Stop the Rx Queue*/
3205 memset(&rx_params, 0, sizeof(rx_params));
3206 rx_params.rss_id = i;
3207 rx_params.rx_queue_id = i;
3208
3209 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3210 if (rc) {
3211 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3212 return rc;
3213 }
3214 }
3215
3216 /* Stop the vport */
3217 rc = edev->ops->vport_stop(cdev, 0);
3218 if (rc)
3219 DP_ERR(edev, "Failed to stop VPORT\n");
3220
3221 return rc;
3222 }
3223
3224 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
3225 {
3226 int rc, tc, i;
3227 int vlan_removal_en = 1;
3228 struct qed_dev *cdev = edev->cdev;
3229 struct qed_update_vport_params vport_update_params;
3230 struct qed_queue_start_common_params q_params;
3231 struct qed_dev_info *qed_info = &edev->dev_info.common;
3232 struct qed_start_vport_params start = {0};
3233 bool reset_rss_indir = false;
3234
3235 if (!edev->num_rss) {
3236 DP_ERR(edev,
3237 "Cannot update V-VPORT as active as there are no Rx queues\n");
3238 return -EINVAL;
3239 }
3240
3241 start.gro_enable = !edev->gro_disable;
3242 start.mtu = edev->ndev->mtu;
3243 start.vport_id = 0;
3244 start.drop_ttl0 = true;
3245 start.remove_inner_vlan = vlan_removal_en;
3246 start.clear_stats = clear_stats;
3247
3248 rc = edev->ops->vport_start(cdev, &start);
3249
3250 if (rc) {
3251 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3252 return rc;
3253 }
3254
3255 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3256 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
3257 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
3258
3259 for_each_rss(i) {
3260 struct qede_fastpath *fp = &edev->fp_array[i];
3261 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
3262
3263 memset(&q_params, 0, sizeof(q_params));
3264 q_params.rss_id = i;
3265 q_params.queue_id = i;
3266 q_params.vport_id = 0;
3267 q_params.sb = fp->sb_info->igu_sb_id;
3268 q_params.sb_idx = RX_PI;
3269
3270 rc = edev->ops->q_rx_start(cdev, &q_params,
3271 fp->rxq->rx_buf_size,
3272 fp->rxq->rx_bd_ring.p_phys_addr,
3273 phys_table,
3274 fp->rxq->rx_comp_ring.page_cnt,
3275 &fp->rxq->hw_rxq_prod_addr);
3276 if (rc) {
3277 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
3278 return rc;
3279 }
3280
3281 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
3282
3283 qede_update_rx_prod(edev, fp->rxq);
3284
3285 for (tc = 0; tc < edev->num_tc; tc++) {
3286 struct qede_tx_queue *txq = &fp->txqs[tc];
3287 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
3288
3289 memset(&q_params, 0, sizeof(q_params));
3290 q_params.rss_id = i;
3291 q_params.queue_id = txq_index;
3292 q_params.vport_id = 0;
3293 q_params.sb = fp->sb_info->igu_sb_id;
3294 q_params.sb_idx = TX_PI(tc);
3295
3296 rc = edev->ops->q_tx_start(cdev, &q_params,
3297 txq->tx_pbl.pbl.p_phys_table,
3298 txq->tx_pbl.page_cnt,
3299 &txq->doorbell_addr);
3300 if (rc) {
3301 DP_ERR(edev, "Start TXQ #%d failed %d\n",
3302 txq_index, rc);
3303 return rc;
3304 }
3305
3306 txq->hw_cons_ptr =
3307 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3308 SET_FIELD(txq->tx_db.data.params,
3309 ETH_DB_DATA_DEST, DB_DEST_XCM);
3310 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3311 DB_AGG_CMD_SET);
3312 SET_FIELD(txq->tx_db.data.params,
3313 ETH_DB_DATA_AGG_VAL_SEL,
3314 DQ_XCM_ETH_TX_BD_PROD_CMD);
3315
3316 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3317 }
3318 }
3319
3320 /* Prepare and send the vport enable */
3321 memset(&vport_update_params, 0, sizeof(vport_update_params));
3322 vport_update_params.vport_id = start.vport_id;
3323 vport_update_params.update_vport_active_flg = 1;
3324 vport_update_params.vport_active_flg = 1;
3325
3326 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3327 qed_info->tx_switching) {
3328 vport_update_params.update_tx_switching_flg = 1;
3329 vport_update_params.tx_switching_flg = 1;
3330 }
3331
3332 /* Fill struct with RSS params */
3333 if (QEDE_RSS_CNT(edev) > 1) {
3334 vport_update_params.update_rss_flg = 1;
3335
3336 /* Need to validate current RSS config uses valid entries */
3337 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3338 if (edev->rss_params.rss_ind_table[i] >=
3339 edev->num_rss) {
3340 reset_rss_indir = true;
3341 break;
3342 }
3343 }
3344
3345 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3346 reset_rss_indir) {
3347 u16 val;
3348
3349 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3350 u16 indir_val;
3351
3352 val = QEDE_RSS_CNT(edev);
3353 indir_val = ethtool_rxfh_indir_default(i, val);
3354 edev->rss_params.rss_ind_table[i] = indir_val;
3355 }
3356 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3357 }
3358
3359 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3360 netdev_rss_key_fill(edev->rss_params.rss_key,
3361 sizeof(edev->rss_params.rss_key));
3362 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3363 }
3364
3365 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3366 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3367 QED_RSS_IPV6 |
3368 QED_RSS_IPV4_TCP |
3369 QED_RSS_IPV6_TCP;
3370 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3371 }
3372
3373 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3374 sizeof(vport_update_params.rss_params));
3375 } else {
3376 memset(&vport_update_params.rss_params, 0,
3377 sizeof(vport_update_params.rss_params));
3378 }
3379
3380 rc = edev->ops->vport_update(cdev, &vport_update_params);
3381 if (rc) {
3382 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3383 return rc;
3384 }
3385
3386 return 0;
3387 }
3388
3389 static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3390 enum qed_filter_xcast_params_type opcode,
3391 unsigned char *mac, int num_macs)
3392 {
3393 struct qed_filter_params filter_cmd;
3394 int i;
3395
3396 memset(&filter_cmd, 0, sizeof(filter_cmd));
3397 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3398 filter_cmd.filter.mcast.type = opcode;
3399 filter_cmd.filter.mcast.num = num_macs;
3400
3401 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3402 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3403
3404 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3405 }
3406
3407 enum qede_unload_mode {
3408 QEDE_UNLOAD_NORMAL,
3409 };
3410
3411 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3412 {
3413 struct qed_link_params link_params;
3414 int rc;
3415
3416 DP_INFO(edev, "Starting qede unload\n");
3417
3418 mutex_lock(&edev->qede_lock);
3419 edev->state = QEDE_STATE_CLOSED;
3420
3421 /* Close OS Tx */
3422 netif_tx_disable(edev->ndev);
3423 netif_carrier_off(edev->ndev);
3424
3425 /* Reset the link */
3426 memset(&link_params, 0, sizeof(link_params));
3427 link_params.link_up = false;
3428 edev->ops->common->set_link(edev->cdev, &link_params);
3429 rc = qede_stop_queues(edev);
3430 if (rc) {
3431 qede_sync_free_irqs(edev);
3432 goto out;
3433 }
3434
3435 DP_INFO(edev, "Stopped Queues\n");
3436
3437 qede_vlan_mark_nonconfigured(edev);
3438 edev->ops->fastpath_stop(edev->cdev);
3439
3440 /* Release the interrupts */
3441 qede_sync_free_irqs(edev);
3442 edev->ops->common->set_fp_int(edev->cdev, 0);
3443
3444 qede_napi_disable_remove(edev);
3445
3446 qede_free_mem_load(edev);
3447 qede_free_fp_array(edev);
3448
3449 out:
3450 mutex_unlock(&edev->qede_lock);
3451 DP_INFO(edev, "Ending qede unload\n");
3452 }
3453
3454 enum qede_load_mode {
3455 QEDE_LOAD_NORMAL,
3456 QEDE_LOAD_RELOAD,
3457 };
3458
3459 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3460 {
3461 struct qed_link_params link_params;
3462 struct qed_link_output link_output;
3463 int rc;
3464
3465 DP_INFO(edev, "Starting qede load\n");
3466
3467 rc = qede_set_num_queues(edev);
3468 if (rc)
3469 goto err0;
3470
3471 rc = qede_alloc_fp_array(edev);
3472 if (rc)
3473 goto err0;
3474
3475 qede_init_fp(edev);
3476
3477 rc = qede_alloc_mem_load(edev);
3478 if (rc)
3479 goto err1;
3480 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
3481 QEDE_RSS_CNT(edev), edev->num_tc);
3482
3483 rc = qede_set_real_num_queues(edev);
3484 if (rc)
3485 goto err2;
3486
3487 qede_napi_add_enable(edev);
3488 DP_INFO(edev, "Napi added and enabled\n");
3489
3490 rc = qede_setup_irqs(edev);
3491 if (rc)
3492 goto err3;
3493 DP_INFO(edev, "Setup IRQs succeeded\n");
3494
3495 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
3496 if (rc)
3497 goto err4;
3498 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3499
3500 /* Add primary mac and set Rx filters */
3501 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3502
3503 mutex_lock(&edev->qede_lock);
3504 edev->state = QEDE_STATE_OPEN;
3505 mutex_unlock(&edev->qede_lock);
3506
3507 /* Program un-configured VLANs */
3508 qede_configure_vlan_filters(edev);
3509
3510 /* Ask for link-up using current configuration */
3511 memset(&link_params, 0, sizeof(link_params));
3512 link_params.link_up = true;
3513 edev->ops->common->set_link(edev->cdev, &link_params);
3514
3515 /* Query whether link is already-up */
3516 memset(&link_output, 0, sizeof(link_output));
3517 edev->ops->common->get_link(edev->cdev, &link_output);
3518 qede_link_update(edev, &link_output);
3519
3520 DP_INFO(edev, "Ending successfully qede load\n");
3521
3522 return 0;
3523
3524 err4:
3525 qede_sync_free_irqs(edev);
3526 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3527 err3:
3528 qede_napi_disable_remove(edev);
3529 err2:
3530 qede_free_mem_load(edev);
3531 err1:
3532 edev->ops->common->set_fp_int(edev->cdev, 0);
3533 qede_free_fp_array(edev);
3534 edev->num_rss = 0;
3535 err0:
3536 return rc;
3537 }
3538
3539 void qede_reload(struct qede_dev *edev,
3540 void (*func)(struct qede_dev *, union qede_reload_args *),
3541 union qede_reload_args *args)
3542 {
3543 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3544 /* Call function handler to update parameters
3545 * needed for function load.
3546 */
3547 if (func)
3548 func(edev, args);
3549
3550 qede_load(edev, QEDE_LOAD_RELOAD);
3551
3552 mutex_lock(&edev->qede_lock);
3553 qede_config_rx_mode(edev->ndev);
3554 mutex_unlock(&edev->qede_lock);
3555 }
3556
3557 /* called with rtnl_lock */
3558 static int qede_open(struct net_device *ndev)
3559 {
3560 struct qede_dev *edev = netdev_priv(ndev);
3561 int rc;
3562
3563 netif_carrier_off(ndev);
3564
3565 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3566
3567 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3568
3569 if (rc)
3570 return rc;
3571
3572 udp_tunnel_get_rx_info(ndev);
3573
3574 return 0;
3575 }
3576
3577 static int qede_close(struct net_device *ndev)
3578 {
3579 struct qede_dev *edev = netdev_priv(ndev);
3580
3581 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3582
3583 return 0;
3584 }
3585
3586 static void qede_link_update(void *dev, struct qed_link_output *link)
3587 {
3588 struct qede_dev *edev = dev;
3589
3590 if (!netif_running(edev->ndev)) {
3591 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3592 return;
3593 }
3594
3595 if (link->link_up) {
3596 if (!netif_carrier_ok(edev->ndev)) {
3597 DP_NOTICE(edev, "Link is up\n");
3598 netif_tx_start_all_queues(edev->ndev);
3599 netif_carrier_on(edev->ndev);
3600 }
3601 } else {
3602 if (netif_carrier_ok(edev->ndev)) {
3603 DP_NOTICE(edev, "Link is down\n");
3604 netif_tx_disable(edev->ndev);
3605 netif_carrier_off(edev->ndev);
3606 }
3607 }
3608 }
3609
3610 static int qede_set_mac_addr(struct net_device *ndev, void *p)
3611 {
3612 struct qede_dev *edev = netdev_priv(ndev);
3613 struct sockaddr *addr = p;
3614 int rc;
3615
3616 ASSERT_RTNL(); /* @@@TBD To be removed */
3617
3618 DP_INFO(edev, "Set_mac_addr called\n");
3619
3620 if (!is_valid_ether_addr(addr->sa_data)) {
3621 DP_NOTICE(edev, "The MAC address is not valid\n");
3622 return -EFAULT;
3623 }
3624
3625 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3626 DP_NOTICE(edev, "qed prevents setting MAC\n");
3627 return -EINVAL;
3628 }
3629
3630 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3631
3632 if (!netif_running(ndev)) {
3633 DP_NOTICE(edev, "The device is currently down\n");
3634 return 0;
3635 }
3636
3637 /* Remove the previous primary mac */
3638 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3639 edev->primary_mac);
3640 if (rc)
3641 return rc;
3642
3643 /* Add MAC filter according to the new unicast HW MAC address */
3644 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3645 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3646 edev->primary_mac);
3647 }
3648
3649 static int
3650 qede_configure_mcast_filtering(struct net_device *ndev,
3651 enum qed_filter_rx_mode_type *accept_flags)
3652 {
3653 struct qede_dev *edev = netdev_priv(ndev);
3654 unsigned char *mc_macs, *temp;
3655 struct netdev_hw_addr *ha;
3656 int rc = 0, mc_count;
3657 size_t size;
3658
3659 size = 64 * ETH_ALEN;
3660
3661 mc_macs = kzalloc(size, GFP_KERNEL);
3662 if (!mc_macs) {
3663 DP_NOTICE(edev,
3664 "Failed to allocate memory for multicast MACs\n");
3665 rc = -ENOMEM;
3666 goto exit;
3667 }
3668
3669 temp = mc_macs;
3670
3671 /* Remove all previously configured MAC filters */
3672 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3673 mc_macs, 1);
3674 if (rc)
3675 goto exit;
3676
3677 netif_addr_lock_bh(ndev);
3678
3679 mc_count = netdev_mc_count(ndev);
3680 if (mc_count < 64) {
3681 netdev_for_each_mc_addr(ha, ndev) {
3682 ether_addr_copy(temp, ha->addr);
3683 temp += ETH_ALEN;
3684 }
3685 }
3686
3687 netif_addr_unlock_bh(ndev);
3688
3689 /* Check for all multicast @@@TBD resource allocation */
3690 if ((ndev->flags & IFF_ALLMULTI) ||
3691 (mc_count > 64)) {
3692 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3693 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3694 } else {
3695 /* Add all multicast MAC filters */
3696 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3697 mc_macs, mc_count);
3698 }
3699
3700 exit:
3701 kfree(mc_macs);
3702 return rc;
3703 }
3704
3705 static void qede_set_rx_mode(struct net_device *ndev)
3706 {
3707 struct qede_dev *edev = netdev_priv(ndev);
3708
3709 DP_INFO(edev, "qede_set_rx_mode called\n");
3710
3711 if (edev->state != QEDE_STATE_OPEN) {
3712 DP_INFO(edev,
3713 "qede_set_rx_mode called while interface is down\n");
3714 } else {
3715 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3716 schedule_delayed_work(&edev->sp_task, 0);
3717 }
3718 }
3719
3720 /* Must be called with qede_lock held */
3721 static void qede_config_rx_mode(struct net_device *ndev)
3722 {
3723 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3724 struct qede_dev *edev = netdev_priv(ndev);
3725 struct qed_filter_params rx_mode;
3726 unsigned char *uc_macs, *temp;
3727 struct netdev_hw_addr *ha;
3728 int rc, uc_count;
3729 size_t size;
3730
3731 netif_addr_lock_bh(ndev);
3732
3733 uc_count = netdev_uc_count(ndev);
3734 size = uc_count * ETH_ALEN;
3735
3736 uc_macs = kzalloc(size, GFP_ATOMIC);
3737 if (!uc_macs) {
3738 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3739 netif_addr_unlock_bh(ndev);
3740 return;
3741 }
3742
3743 temp = uc_macs;
3744 netdev_for_each_uc_addr(ha, ndev) {
3745 ether_addr_copy(temp, ha->addr);
3746 temp += ETH_ALEN;
3747 }
3748
3749 netif_addr_unlock_bh(ndev);
3750
3751 /* Configure the struct for the Rx mode */
3752 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3753 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3754
3755 /* Remove all previous unicast secondary macs and multicast macs
3756 * (configrue / leave the primary mac)
3757 */
3758 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3759 edev->primary_mac);
3760 if (rc)
3761 goto out;
3762
3763 /* Check for promiscuous */
3764 if ((ndev->flags & IFF_PROMISC) ||
3765 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3766 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3767 } else {
3768 /* Add MAC filters according to the unicast secondary macs */
3769 int i;
3770
3771 temp = uc_macs;
3772 for (i = 0; i < uc_count; i++) {
3773 rc = qede_set_ucast_rx_mac(edev,
3774 QED_FILTER_XCAST_TYPE_ADD,
3775 temp);
3776 if (rc)
3777 goto out;
3778
3779 temp += ETH_ALEN;
3780 }
3781
3782 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3783 if (rc)
3784 goto out;
3785 }
3786
3787 /* take care of VLAN mode */
3788 if (ndev->flags & IFF_PROMISC) {
3789 qede_config_accept_any_vlan(edev, true);
3790 } else if (!edev->non_configured_vlans) {
3791 /* It's possible that accept_any_vlan mode is set due to a
3792 * previous setting of IFF_PROMISC. If vlan credits are
3793 * sufficient, disable accept_any_vlan.
3794 */
3795 qede_config_accept_any_vlan(edev, false);
3796 }
3797
3798 rx_mode.filter.accept_flags = accept_flags;
3799 edev->ops->filter_config(edev->cdev, &rx_mode);
3800 out:
3801 kfree(uc_macs);
3802 }
Linux kernel - Deliverables
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