projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ASoC: fsl: Add S/PDIF CPU DAI driver
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_init.c
1 /*
2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2013 QLogic Corporation
4 *
5 * See LICENSE.qlcnic for copyright and licensing details.
6 */
7
8 #include "qlcnic.h"
9 #include "qlcnic_hw.h"
10
11 struct crb_addr_pair {
12 u32 addr;
13 u32 data;
14 };
15
16 #define QLCNIC_MAX_CRB_XFORM 60
17 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
18
19 #define crb_addr_transform(name) \
20 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
21 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
22
23 #define QLCNIC_ADDR_ERROR (0xffffffff)
24
25 static int
26 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
27
28 static void crb_addr_transform_setup(void)
29 {
30 crb_addr_transform(XDMA);
31 crb_addr_transform(TIMR);
32 crb_addr_transform(SRE);
33 crb_addr_transform(SQN3);
34 crb_addr_transform(SQN2);
35 crb_addr_transform(SQN1);
36 crb_addr_transform(SQN0);
37 crb_addr_transform(SQS3);
38 crb_addr_transform(SQS2);
39 crb_addr_transform(SQS1);
40 crb_addr_transform(SQS0);
41 crb_addr_transform(RPMX7);
42 crb_addr_transform(RPMX6);
43 crb_addr_transform(RPMX5);
44 crb_addr_transform(RPMX4);
45 crb_addr_transform(RPMX3);
46 crb_addr_transform(RPMX2);
47 crb_addr_transform(RPMX1);
48 crb_addr_transform(RPMX0);
49 crb_addr_transform(ROMUSB);
50 crb_addr_transform(SN);
51 crb_addr_transform(QMN);
52 crb_addr_transform(QMS);
53 crb_addr_transform(PGNI);
54 crb_addr_transform(PGND);
55 crb_addr_transform(PGN3);
56 crb_addr_transform(PGN2);
57 crb_addr_transform(PGN1);
58 crb_addr_transform(PGN0);
59 crb_addr_transform(PGSI);
60 crb_addr_transform(PGSD);
61 crb_addr_transform(PGS3);
62 crb_addr_transform(PGS2);
63 crb_addr_transform(PGS1);
64 crb_addr_transform(PGS0);
65 crb_addr_transform(PS);
66 crb_addr_transform(PH);
67 crb_addr_transform(NIU);
68 crb_addr_transform(I2Q);
69 crb_addr_transform(EG);
70 crb_addr_transform(MN);
71 crb_addr_transform(MS);
72 crb_addr_transform(CAS2);
73 crb_addr_transform(CAS1);
74 crb_addr_transform(CAS0);
75 crb_addr_transform(CAM);
76 crb_addr_transform(C2C1);
77 crb_addr_transform(C2C0);
78 crb_addr_transform(SMB);
79 crb_addr_transform(OCM0);
80 crb_addr_transform(I2C0);
81 }
82
83 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
84 {
85 struct qlcnic_recv_context *recv_ctx;
86 struct qlcnic_host_rds_ring *rds_ring;
87 struct qlcnic_rx_buffer *rx_buf;
88 int i, ring;
89
90 recv_ctx = adapter->recv_ctx;
91 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
92 rds_ring = &recv_ctx->rds_rings[ring];
93 for (i = 0; i < rds_ring->num_desc; ++i) {
94 rx_buf = &(rds_ring->rx_buf_arr[i]);
95 if (rx_buf->skb == NULL)
96 continue;
97
98 pci_unmap_single(adapter->pdev,
99 rx_buf->dma,
100 rds_ring->dma_size,
101 PCI_DMA_FROMDEVICE);
102
103 dev_kfree_skb_any(rx_buf->skb);
104 }
105 }
106 }
107
108 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
109 {
110 struct qlcnic_recv_context *recv_ctx;
111 struct qlcnic_host_rds_ring *rds_ring;
112 struct qlcnic_rx_buffer *rx_buf;
113 int i, ring;
114
115 recv_ctx = adapter->recv_ctx;
116 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
117 rds_ring = &recv_ctx->rds_rings[ring];
118
119 INIT_LIST_HEAD(&rds_ring->free_list);
120
121 rx_buf = rds_ring->rx_buf_arr;
122 for (i = 0; i < rds_ring->num_desc; i++) {
123 list_add_tail(&rx_buf->list,
124 &rds_ring->free_list);
125 rx_buf++;
126 }
127 }
128 }
129
130 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
131 {
132 struct qlcnic_cmd_buffer *cmd_buf;
133 struct qlcnic_skb_frag *buffrag;
134 int i, j;
135 struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
136
137 cmd_buf = tx_ring->cmd_buf_arr;
138 for (i = 0; i < tx_ring->num_desc; i++) {
139 buffrag = cmd_buf->frag_array;
140 if (buffrag->dma) {
141 pci_unmap_single(adapter->pdev, buffrag->dma,
142 buffrag->length, PCI_DMA_TODEVICE);
143 buffrag->dma = 0ULL;
144 }
145 for (j = 0; j < cmd_buf->frag_count; j++) {
146 buffrag++;
147 if (buffrag->dma) {
148 pci_unmap_page(adapter->pdev, buffrag->dma,
149 buffrag->length,
150 PCI_DMA_TODEVICE);
151 buffrag->dma = 0ULL;
152 }
153 }
154 if (cmd_buf->skb) {
155 dev_kfree_skb_any(cmd_buf->skb);
156 cmd_buf->skb = NULL;
157 }
158 cmd_buf++;
159 }
160 }
161
162 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
163 {
164 struct qlcnic_recv_context *recv_ctx;
165 struct qlcnic_host_rds_ring *rds_ring;
166 int ring;
167
168 recv_ctx = adapter->recv_ctx;
169
170 if (recv_ctx->rds_rings == NULL)
171 return;
172
173 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
174 rds_ring = &recv_ctx->rds_rings[ring];
175 vfree(rds_ring->rx_buf_arr);
176 rds_ring->rx_buf_arr = NULL;
177 }
178 kfree(recv_ctx->rds_rings);
179 }
180
181 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
182 {
183 struct qlcnic_recv_context *recv_ctx;
184 struct qlcnic_host_rds_ring *rds_ring;
185 struct qlcnic_host_sds_ring *sds_ring;
186 struct qlcnic_rx_buffer *rx_buf;
187 int ring, i;
188
189 recv_ctx = adapter->recv_ctx;
190
191 rds_ring = kcalloc(adapter->max_rds_rings,
192 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
193 if (rds_ring == NULL)
194 goto err_out;
195
196 recv_ctx->rds_rings = rds_ring;
197
198 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
199 rds_ring = &recv_ctx->rds_rings[ring];
200 switch (ring) {
201 case RCV_RING_NORMAL:
202 rds_ring->num_desc = adapter->num_rxd;
203 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
204 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
205 break;
206
207 case RCV_RING_JUMBO:
208 rds_ring->num_desc = adapter->num_jumbo_rxd;
209 rds_ring->dma_size =
210 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
211
212 if (adapter->ahw->capabilities &
213 QLCNIC_FW_CAPABILITY_HW_LRO)
214 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
215
216 rds_ring->skb_size =
217 rds_ring->dma_size + NET_IP_ALIGN;
218 break;
219 }
220 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
221 if (rds_ring->rx_buf_arr == NULL)
222 goto err_out;
223
224 INIT_LIST_HEAD(&rds_ring->free_list);
225 /*
226 * Now go through all of them, set reference handles
227 * and put them in the queues.
228 */
229 rx_buf = rds_ring->rx_buf_arr;
230 for (i = 0; i < rds_ring->num_desc; i++) {
231 list_add_tail(&rx_buf->list,
232 &rds_ring->free_list);
233 rx_buf->ref_handle = i;
234 rx_buf++;
235 }
236 spin_lock_init(&rds_ring->lock);
237 }
238
239 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
240 sds_ring = &recv_ctx->sds_rings[ring];
241 sds_ring->irq = adapter->msix_entries[ring].vector;
242 sds_ring->adapter = adapter;
243 sds_ring->num_desc = adapter->num_rxd;
244
245 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
246 INIT_LIST_HEAD(&sds_ring->free_list[i]);
247 }
248
249 return 0;
250
251 err_out:
252 qlcnic_free_sw_resources(adapter);
253 return -ENOMEM;
254 }
255
256 /*
257 * Utility to translate from internal Phantom CRB address
258 * to external PCI CRB address.
259 */
260 static u32 qlcnic_decode_crb_addr(u32 addr)
261 {
262 int i;
263 u32 base_addr, offset, pci_base;
264
265 crb_addr_transform_setup();
266
267 pci_base = QLCNIC_ADDR_ERROR;
268 base_addr = addr & 0xfff00000;
269 offset = addr & 0x000fffff;
270
271 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
272 if (crb_addr_xform[i] == base_addr) {
273 pci_base = i << 20;
274 break;
275 }
276 }
277 if (pci_base == QLCNIC_ADDR_ERROR)
278 return pci_base;
279 else
280 return pci_base + offset;
281 }
282
283 #define QLCNIC_MAX_ROM_WAIT_USEC 100
284
285 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
286 {
287 long timeout = 0;
288 long done = 0;
289
290 cond_resched();
291 while (done == 0) {
292 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
293 done &= 2;
294 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
295 dev_err(&adapter->pdev->dev,
296 "Timeout reached waiting for rom done");
297 return -EIO;
298 }
299 udelay(1);
300 }
301 return 0;
302 }
303
304 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
305 u32 addr, u32 *valp)
306 {
307 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
308 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
309 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
310 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
311 if (qlcnic_wait_rom_done(adapter)) {
312 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
313 return -EIO;
314 }
315 /* reset abyte_cnt and dummy_byte_cnt */
316 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
317 udelay(10);
318 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
319
320 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
321 return 0;
322 }
323
324 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
325 u8 *bytes, size_t size)
326 {
327 int addridx;
328 int ret = 0;
329
330 for (addridx = addr; addridx < (addr + size); addridx += 4) {
331 int v;
332 ret = do_rom_fast_read(adapter, addridx, &v);
333 if (ret != 0)
334 break;
335 *(__le32 *)bytes = cpu_to_le32(v);
336 bytes += 4;
337 }
338
339 return ret;
340 }
341
342 int
343 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
344 u8 *bytes, size_t size)
345 {
346 int ret;
347
348 ret = qlcnic_rom_lock(adapter);
349 if (ret < 0)
350 return ret;
351
352 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
353
354 qlcnic_rom_unlock(adapter);
355 return ret;
356 }
357
358 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
359 {
360 int ret;
361
362 if (qlcnic_rom_lock(adapter) != 0)
363 return -EIO;
364
365 ret = do_rom_fast_read(adapter, addr, valp);
366 qlcnic_rom_unlock(adapter);
367 return ret;
368 }
369
370 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
371 {
372 int addr, val;
373 int i, n, init_delay;
374 struct crb_addr_pair *buf;
375 unsigned offset;
376 u32 off;
377 struct pci_dev *pdev = adapter->pdev;
378
379 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
380 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
381
382 /* Halt all the indiviual PEGs and other blocks */
383 /* disable all I2Q */
384 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
385 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
386 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
387 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
388 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
389 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
390
391 /* disable all niu interrupts */
392 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
393 /* disable xge rx/tx */
394 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
395 /* disable xg1 rx/tx */
396 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
397 /* disable sideband mac */
398 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
399 /* disable ap0 mac */
400 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
401 /* disable ap1 mac */
402 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
403
404 /* halt sre */
405 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000);
406 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
407
408 /* halt epg */
409 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
410
411 /* halt timers */
412 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
413 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
414 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
415 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
416 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
417 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
418 /* halt pegs */
419 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
420 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
421 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
422 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
423 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
424 msleep(20);
425
426 qlcnic_rom_unlock(adapter);
427 /* big hammer don't reset CAM block on reset */
428 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
429
430 /* Init HW CRB block */
431 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
432 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
433 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
434 return -EIO;
435 }
436 offset = n & 0xffffU;
437 n = (n >> 16) & 0xffffU;
438
439 if (n >= 1024) {
440 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
441 return -EIO;
442 }
443
444 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
445 if (buf == NULL)
446 return -ENOMEM;
447
448 for (i = 0; i < n; i++) {
449 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
450 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
451 kfree(buf);
452 return -EIO;
453 }
454
455 buf[i].addr = addr;
456 buf[i].data = val;
457 }
458
459 for (i = 0; i < n; i++) {
460
461 off = qlcnic_decode_crb_addr(buf[i].addr);
462 if (off == QLCNIC_ADDR_ERROR) {
463 dev_err(&pdev->dev, "CRB init value out of range %x\n",
464 buf[i].addr);
465 continue;
466 }
467 off += QLCNIC_PCI_CRBSPACE;
468
469 if (off & 1)
470 continue;
471
472 /* skipping cold reboot MAGIC */
473 if (off == QLCNIC_CAM_RAM(0x1fc))
474 continue;
475 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
476 continue;
477 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
478 continue;
479 if (off == (ROMUSB_GLB + 0xa8))
480 continue;
481 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
482 continue;
483 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
484 continue;
485 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
486 continue;
487 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
488 continue;
489 /* skip the function enable register */
490 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
491 continue;
492 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
493 continue;
494 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
495 continue;
496
497 init_delay = 1;
498 /* After writing this register, HW needs time for CRB */
499 /* to quiet down (else crb_window returns 0xffffffff) */
500 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
501 init_delay = 1000;
502
503 QLCWR32(adapter, off, buf[i].data);
504
505 msleep(init_delay);
506 }
507 kfree(buf);
508
509 /* Initialize protocol process engine */
510 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
511 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
512 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
513 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
514 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
515 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
516 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
517 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
518 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
519 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
520 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
521 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
522 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
523 msleep(1);
524
525 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
526 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
527
528 return 0;
529 }
530
531 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
532 {
533 u32 val;
534 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
535
536 do {
537 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
538
539 switch (val) {
540 case PHAN_INITIALIZE_COMPLETE:
541 case PHAN_INITIALIZE_ACK:
542 return 0;
543 case PHAN_INITIALIZE_FAILED:
544 goto out_err;
545 default:
546 break;
547 }
548
549 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
550
551 } while (--retries);
552
553 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
554 PHAN_INITIALIZE_FAILED);
555
556 out_err:
557 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
558 "complete, state: 0x%x.\n", val);
559 return -EIO;
560 }
561
562 static int
563 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
564 {
565 u32 val;
566 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
567
568 do {
569 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
570
571 if (val == PHAN_PEG_RCV_INITIALIZED)
572 return 0;
573
574 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
575
576 } while (--retries);
577
578 if (!retries) {
579 dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
580 "complete, state: 0x%x.\n", val);
581 return -EIO;
582 }
583
584 return 0;
585 }
586
587 int
588 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
589 {
590 int err;
591
592 err = qlcnic_cmd_peg_ready(adapter);
593 if (err)
594 return err;
595
596 err = qlcnic_receive_peg_ready(adapter);
597 if (err)
598 return err;
599
600 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
601
602 return err;
603 }
604
605 int
606 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
607
608 int timeo;
609 u32 val;
610
611 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
612 val = QLC_DEV_GET_DRV(val, adapter->portnum);
613 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
614 dev_err(&adapter->pdev->dev,
615 "Not an Ethernet NIC func=%u\n", val);
616 return -EIO;
617 }
618 adapter->ahw->physical_port = (val >> 2);
619 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
620 timeo = QLCNIC_INIT_TIMEOUT_SECS;
621
622 adapter->dev_init_timeo = timeo;
623
624 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
625 timeo = QLCNIC_RESET_TIMEOUT_SECS;
626
627 adapter->reset_ack_timeo = timeo;
628
629 return 0;
630 }
631
632 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
633 struct qlcnic_flt_entry *region_entry)
634 {
635 struct qlcnic_flt_header flt_hdr;
636 struct qlcnic_flt_entry *flt_entry;
637 int i = 0, ret;
638 u32 entry_size;
639
640 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
641 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
642 (u8 *)&flt_hdr,
643 sizeof(struct qlcnic_flt_header));
644 if (ret) {
645 dev_warn(&adapter->pdev->dev,
646 "error reading flash layout header\n");
647 return -EIO;
648 }
649
650 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
651 flt_entry = vzalloc(entry_size);
652 if (flt_entry == NULL)
653 return -EIO;
654
655 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
656 sizeof(struct qlcnic_flt_header),
657 (u8 *)flt_entry, entry_size);
658 if (ret) {
659 dev_warn(&adapter->pdev->dev,
660 "error reading flash layout entries\n");
661 goto err_out;
662 }
663
664 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
665 if (flt_entry[i].region == region)
666 break;
667 i++;
668 }
669 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
670 dev_warn(&adapter->pdev->dev,
671 "region=%x not found in %d regions\n", region, i);
672 ret = -EIO;
673 goto err_out;
674 }
675 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
676
677 err_out:
678 vfree(flt_entry);
679 return ret;
680 }
681
682 int
683 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
684 {
685 struct qlcnic_flt_entry fw_entry;
686 u32 ver = -1, min_ver;
687 int ret;
688
689 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
690 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
691 &fw_entry);
692 else
693 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
694 &fw_entry);
695
696 if (!ret)
697 /* 0-4:-signature, 4-8:-fw version */
698 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
699 (int *)&ver);
700 else
701 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
702 (int *)&ver);
703
704 ver = QLCNIC_DECODE_VERSION(ver);
705 min_ver = QLCNIC_MIN_FW_VERSION;
706
707 if (ver < min_ver) {
708 dev_err(&adapter->pdev->dev,
709 "firmware version %d.%d.%d unsupported."
710 "Min supported version %d.%d.%d\n",
711 _major(ver), _minor(ver), _build(ver),
712 _major(min_ver), _minor(min_ver), _build(min_ver));
713 return -EINVAL;
714 }
715
716 return 0;
717 }
718
719 static int
720 qlcnic_has_mn(struct qlcnic_adapter *adapter)
721 {
722 u32 capability;
723 capability = 0;
724
725 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
726 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
727 return 1;
728
729 return 0;
730 }
731
732 static
733 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
734 {
735 u32 i, entries;
736 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
737 entries = le32_to_cpu(directory->num_entries);
738
739 for (i = 0; i < entries; i++) {
740
741 u32 offs = le32_to_cpu(directory->findex) +
742 i * le32_to_cpu(directory->entry_size);
743 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
744
745 if (tab_type == section)
746 return (struct uni_table_desc *) &unirom[offs];
747 }
748
749 return NULL;
750 }
751
752 #define FILEHEADER_SIZE (14 * 4)
753
754 static int
755 qlcnic_validate_header(struct qlcnic_adapter *adapter)
756 {
757 const u8 *unirom = adapter->fw->data;
758 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
759 u32 entries, entry_size, tab_size, fw_file_size;
760
761 fw_file_size = adapter->fw->size;
762
763 if (fw_file_size < FILEHEADER_SIZE)
764 return -EINVAL;
765
766 entries = le32_to_cpu(directory->num_entries);
767 entry_size = le32_to_cpu(directory->entry_size);
768 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
769
770 if (fw_file_size < tab_size)
771 return -EINVAL;
772
773 return 0;
774 }
775
776 static int
777 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
778 {
779 struct uni_table_desc *tab_desc;
780 struct uni_data_desc *descr;
781 u32 offs, tab_size, data_size, idx;
782 const u8 *unirom = adapter->fw->data;
783 __le32 temp;
784
785 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
786 QLCNIC_UNI_BOOTLD_IDX_OFF);
787 idx = le32_to_cpu(temp);
788 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
789
790 if (!tab_desc)
791 return -EINVAL;
792
793 tab_size = le32_to_cpu(tab_desc->findex) +
794 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
795
796 if (adapter->fw->size < tab_size)
797 return -EINVAL;
798
799 offs = le32_to_cpu(tab_desc->findex) +
800 le32_to_cpu(tab_desc->entry_size) * idx;
801 descr = (struct uni_data_desc *)&unirom[offs];
802
803 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
804
805 if (adapter->fw->size < data_size)
806 return -EINVAL;
807
808 return 0;
809 }
810
811 static int
812 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
813 {
814 struct uni_table_desc *tab_desc;
815 struct uni_data_desc *descr;
816 const u8 *unirom = adapter->fw->data;
817 u32 offs, tab_size, data_size, idx;
818 __le32 temp;
819
820 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
821 QLCNIC_UNI_FIRMWARE_IDX_OFF);
822 idx = le32_to_cpu(temp);
823 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
824
825 if (!tab_desc)
826 return -EINVAL;
827
828 tab_size = le32_to_cpu(tab_desc->findex) +
829 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
830
831 if (adapter->fw->size < tab_size)
832 return -EINVAL;
833
834 offs = le32_to_cpu(tab_desc->findex) +
835 le32_to_cpu(tab_desc->entry_size) * idx;
836 descr = (struct uni_data_desc *)&unirom[offs];
837 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
838
839 if (adapter->fw->size < data_size)
840 return -EINVAL;
841
842 return 0;
843 }
844
845 static int
846 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
847 {
848 struct uni_table_desc *ptab_descr;
849 const u8 *unirom = adapter->fw->data;
850 int mn_present = qlcnic_has_mn(adapter);
851 u32 entries, entry_size, tab_size, i;
852 __le32 temp;
853
854 ptab_descr = qlcnic_get_table_desc(unirom,
855 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
856 if (!ptab_descr)
857 return -EINVAL;
858
859 entries = le32_to_cpu(ptab_descr->num_entries);
860 entry_size = le32_to_cpu(ptab_descr->entry_size);
861 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
862
863 if (adapter->fw->size < tab_size)
864 return -EINVAL;
865
866 nomn:
867 for (i = 0; i < entries; i++) {
868
869 u32 flags, file_chiprev, offs;
870 u8 chiprev = adapter->ahw->revision_id;
871 u32 flagbit;
872
873 offs = le32_to_cpu(ptab_descr->findex) +
874 i * le32_to_cpu(ptab_descr->entry_size);
875 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
876 flags = le32_to_cpu(temp);
877 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
878 file_chiprev = le32_to_cpu(temp);
879
880 flagbit = mn_present ? 1 : 2;
881
882 if ((chiprev == file_chiprev) &&
883 ((1ULL << flagbit) & flags)) {
884 adapter->file_prd_off = offs;
885 return 0;
886 }
887 }
888 if (mn_present) {
889 mn_present = 0;
890 goto nomn;
891 }
892 return -EINVAL;
893 }
894
895 static int
896 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
897 {
898 if (qlcnic_validate_header(adapter)) {
899 dev_err(&adapter->pdev->dev,
900 "unified image: header validation failed\n");
901 return -EINVAL;
902 }
903
904 if (qlcnic_validate_product_offs(adapter)) {
905 dev_err(&adapter->pdev->dev,
906 "unified image: product validation failed\n");
907 return -EINVAL;
908 }
909
910 if (qlcnic_validate_bootld(adapter)) {
911 dev_err(&adapter->pdev->dev,
912 "unified image: bootld validation failed\n");
913 return -EINVAL;
914 }
915
916 if (qlcnic_validate_fw(adapter)) {
917 dev_err(&adapter->pdev->dev,
918 "unified image: firmware validation failed\n");
919 return -EINVAL;
920 }
921
922 return 0;
923 }
924
925 static
926 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
927 u32 section, u32 idx_offset)
928 {
929 const u8 *unirom = adapter->fw->data;
930 struct uni_table_desc *tab_desc;
931 u32 offs, idx;
932 __le32 temp;
933
934 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
935 idx = le32_to_cpu(temp);
936
937 tab_desc = qlcnic_get_table_desc(unirom, section);
938
939 if (tab_desc == NULL)
940 return NULL;
941
942 offs = le32_to_cpu(tab_desc->findex) +
943 le32_to_cpu(tab_desc->entry_size) * idx;
944
945 return (struct uni_data_desc *)&unirom[offs];
946 }
947
948 static u8 *
949 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
950 {
951 u32 offs = QLCNIC_BOOTLD_START;
952 struct uni_data_desc *data_desc;
953
954 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
955 QLCNIC_UNI_BOOTLD_IDX_OFF);
956
957 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
958 offs = le32_to_cpu(data_desc->findex);
959
960 return (u8 *)&adapter->fw->data[offs];
961 }
962
963 static u8 *
964 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
965 {
966 u32 offs = QLCNIC_IMAGE_START;
967 struct uni_data_desc *data_desc;
968
969 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
970 QLCNIC_UNI_FIRMWARE_IDX_OFF);
971 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
972 offs = le32_to_cpu(data_desc->findex);
973
974 return (u8 *)&adapter->fw->data[offs];
975 }
976
977 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
978 {
979 struct uni_data_desc *data_desc;
980 const u8 *unirom = adapter->fw->data;
981
982 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
983 QLCNIC_UNI_FIRMWARE_IDX_OFF);
984
985 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
986 return le32_to_cpu(data_desc->size);
987 else
988 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
989 }
990
991 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
992 {
993 struct uni_data_desc *fw_data_desc;
994 const struct firmware *fw = adapter->fw;
995 u32 major, minor, sub;
996 __le32 version_offset;
997 const u8 *ver_str;
998 int i, ret;
999
1000 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1001 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1002 return le32_to_cpu(version_offset);
1003 }
1004
1005 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1006 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1007 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1008 le32_to_cpu(fw_data_desc->size) - 17;
1009
1010 for (i = 0; i < 12; i++) {
1011 if (!strncmp(&ver_str[i], "REV=", 4)) {
1012 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1013 &major, &minor, &sub);
1014 if (ret != 3)
1015 return 0;
1016 else
1017 return major + (minor << 8) + (sub << 16);
1018 }
1019 }
1020
1021 return 0;
1022 }
1023
1024 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1025 {
1026 const struct firmware *fw = adapter->fw;
1027 u32 bios_ver, prd_off = adapter->file_prd_off;
1028 u8 *version_offset;
1029 __le32 temp;
1030
1031 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1032 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1033 return le32_to_cpu(*(__le32 *)version_offset);
1034 }
1035
1036 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1037 bios_ver = le32_to_cpu(temp);
1038
1039 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1040 }
1041
1042 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1043 {
1044 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1045 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1046
1047 qlcnic_pcie_sem_unlock(adapter, 2);
1048 }
1049
1050 static int
1051 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1052 {
1053 u32 heartbeat, ret = -EIO;
1054 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1055
1056 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1057 QLCNIC_PEG_ALIVE_COUNTER);
1058
1059 do {
1060 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1061 heartbeat = QLC_SHARED_REG_RD32(adapter,
1062 QLCNIC_PEG_ALIVE_COUNTER);
1063 if (heartbeat != adapter->heartbeat) {
1064 ret = QLCNIC_RCODE_SUCCESS;
1065 break;
1066 }
1067 } while (--retries);
1068
1069 return ret;
1070 }
1071
1072 int
1073 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1074 {
1075 if ((adapter->flags & QLCNIC_FW_HANG) ||
1076 qlcnic_check_fw_hearbeat(adapter)) {
1077 qlcnic_rom_lock_recovery(adapter);
1078 return 1;
1079 }
1080
1081 if (adapter->need_fw_reset)
1082 return 1;
1083
1084 if (adapter->fw)
1085 return 1;
1086
1087 return 0;
1088 }
1089
1090 static const char *fw_name[] = {
1091 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1092 QLCNIC_FLASH_ROMIMAGE_NAME,
1093 };
1094
1095 int
1096 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1097 {
1098 __le64 *ptr64;
1099 u32 i, flashaddr, size;
1100 const struct firmware *fw = adapter->fw;
1101 struct pci_dev *pdev = adapter->pdev;
1102
1103 dev_info(&pdev->dev, "loading firmware from %s\n",
1104 fw_name[adapter->ahw->fw_type]);
1105
1106 if (fw) {
1107 u64 data;
1108
1109 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1110
1111 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1112 flashaddr = QLCNIC_BOOTLD_START;
1113
1114 for (i = 0; i < size; i++) {
1115 data = le64_to_cpu(ptr64[i]);
1116
1117 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1118 return -EIO;
1119
1120 flashaddr += 8;
1121 }
1122
1123 size = qlcnic_get_fw_size(adapter) / 8;
1124
1125 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1126 flashaddr = QLCNIC_IMAGE_START;
1127
1128 for (i = 0; i < size; i++) {
1129 data = le64_to_cpu(ptr64[i]);
1130
1131 if (qlcnic_pci_mem_write_2M(adapter,
1132 flashaddr, data))
1133 return -EIO;
1134
1135 flashaddr += 8;
1136 }
1137
1138 size = qlcnic_get_fw_size(adapter) % 8;
1139 if (size) {
1140 data = le64_to_cpu(ptr64[i]);
1141
1142 if (qlcnic_pci_mem_write_2M(adapter,
1143 flashaddr, data))
1144 return -EIO;
1145 }
1146
1147 } else {
1148 u64 data;
1149 u32 hi, lo;
1150 int ret;
1151 struct qlcnic_flt_entry bootld_entry;
1152
1153 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1154 &bootld_entry);
1155 if (!ret) {
1156 size = bootld_entry.size / 8;
1157 flashaddr = bootld_entry.start_addr;
1158 } else {
1159 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1160 flashaddr = QLCNIC_BOOTLD_START;
1161 dev_info(&pdev->dev,
1162 "using legacy method to get flash fw region");
1163 }
1164
1165 for (i = 0; i < size; i++) {
1166 if (qlcnic_rom_fast_read(adapter,
1167 flashaddr, (int *)&lo) != 0)
1168 return -EIO;
1169 if (qlcnic_rom_fast_read(adapter,
1170 flashaddr + 4, (int *)&hi) != 0)
1171 return -EIO;
1172
1173 data = (((u64)hi << 32) | lo);
1174
1175 if (qlcnic_pci_mem_write_2M(adapter,
1176 flashaddr, data))
1177 return -EIO;
1178
1179 flashaddr += 8;
1180 }
1181 }
1182 msleep(1);
1183
1184 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1185 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1186 return 0;
1187 }
1188
1189 static int
1190 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1191 {
1192 u32 val;
1193 u32 ver, bios, min_size;
1194 struct pci_dev *pdev = adapter->pdev;
1195 const struct firmware *fw = adapter->fw;
1196 u8 fw_type = adapter->ahw->fw_type;
1197
1198 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1199 if (qlcnic_validate_unified_romimage(adapter))
1200 return -EINVAL;
1201
1202 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1203 } else {
1204 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1205 if (val != QLCNIC_BDINFO_MAGIC)
1206 return -EINVAL;
1207
1208 min_size = QLCNIC_FW_MIN_SIZE;
1209 }
1210
1211 if (fw->size < min_size)
1212 return -EINVAL;
1213
1214 val = qlcnic_get_fw_version(adapter);
1215 ver = QLCNIC_DECODE_VERSION(val);
1216
1217 if (ver < QLCNIC_MIN_FW_VERSION) {
1218 dev_err(&pdev->dev,
1219 "%s: firmware version %d.%d.%d unsupported\n",
1220 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1221 return -EINVAL;
1222 }
1223
1224 val = qlcnic_get_bios_version(adapter);
1225 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1226 if (val != bios) {
1227 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1228 fw_name[fw_type]);
1229 return -EINVAL;
1230 }
1231
1232 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1233 return 0;
1234 }
1235
1236 static void
1237 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1238 {
1239 u8 fw_type;
1240
1241 switch (adapter->ahw->fw_type) {
1242 case QLCNIC_UNKNOWN_ROMIMAGE:
1243 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1244 break;
1245
1246 case QLCNIC_UNIFIED_ROMIMAGE:
1247 default:
1248 fw_type = QLCNIC_FLASH_ROMIMAGE;
1249 break;
1250 }
1251
1252 adapter->ahw->fw_type = fw_type;
1253 }
1254
1255
1256
1257 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1258 {
1259 struct pci_dev *pdev = adapter->pdev;
1260 int rc;
1261
1262 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1263
1264 next:
1265 qlcnic_get_next_fwtype(adapter);
1266
1267 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1268 adapter->fw = NULL;
1269 } else {
1270 rc = request_firmware(&adapter->fw,
1271 fw_name[adapter->ahw->fw_type],
1272 &pdev->dev);
1273 if (rc != 0)
1274 goto next;
1275
1276 rc = qlcnic_validate_firmware(adapter);
1277 if (rc != 0) {
1278 release_firmware(adapter->fw);
1279 msleep(1);
1280 goto next;
1281 }
1282 }
1283 }
1284
1285
1286 void
1287 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1288 {
1289 release_firmware(adapter->fw);
1290 adapter->fw = NULL;
1291 }
Linux kernel - Deliverables
This page took 0.059323 seconds and 5 git commands to generate.