drivers/net/ethernet/rocker/rocker.h

   1 /*
   2  * drivers/net/ethernet/rocker/rocker.h - Rocker switch device driver
   3  * Copyright (c) 2014 Jiri Pirko <jiri@resnulli.us>
   4  * Copyright (c) 2014 Scott Feldman <sfeldma@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #ifndef _ROCKER_H
  13 #define _ROCKER_H
  14
  15 #include <linux/types.h>
  16
  17 #define PCI_VENDOR_ID_REDHAT            0x1b36
  18 #define PCI_DEVICE_ID_REDHAT_ROCKER     0x0006
  19
  20 #define ROCKER_PCI_BAR0_SIZE            0x2000
  21
  22 /* MSI-X vectors */
  23 enum {
  24         ROCKER_MSIX_VEC_CMD,
  25         ROCKER_MSIX_VEC_EVENT,
  26         ROCKER_MSIX_VEC_TEST,
  27         ROCKER_MSIX_VEC_RESERVED0,
  28         __ROCKER_MSIX_VEC_TX,
  29         __ROCKER_MSIX_VEC_RX,
  30 #define ROCKER_MSIX_VEC_TX(port) \
  31         (__ROCKER_MSIX_VEC_TX + ((port) * 2))
  32 #define ROCKER_MSIX_VEC_RX(port) \
  33         (__ROCKER_MSIX_VEC_RX + ((port) * 2))
  34 #define ROCKER_MSIX_VEC_COUNT(portcnt) \
  35         (ROCKER_MSIX_VEC_RX((portcnt - 1)) + 1)
  36 };
  37
  38 /* Rocker bogus registers */
  39 #define ROCKER_BOGUS_REG0               0x0000
  40 #define ROCKER_BOGUS_REG1               0x0004
  41 #define ROCKER_BOGUS_REG2               0x0008
  42 #define ROCKER_BOGUS_REG3               0x000c
  43
  44 /* Rocker test registers */
  45 #define ROCKER_TEST_REG                 0x0010
  46 #define ROCKER_TEST_REG64               0x0018  /* 8-byte */
  47 #define ROCKER_TEST_IRQ                 0x0020
  48 #define ROCKER_TEST_DMA_ADDR            0x0028  /* 8-byte */
  49 #define ROCKER_TEST_DMA_SIZE            0x0030
  50 #define ROCKER_TEST_DMA_CTRL            0x0034
  51
  52 /* Rocker test register ctrl */
  53 #define ROCKER_TEST_DMA_CTRL_CLEAR      (1 << 0)
  54 #define ROCKER_TEST_DMA_CTRL_FILL       (1 << 1)
  55 #define ROCKER_TEST_DMA_CTRL_INVERT     (1 << 2)
  56
  57 /* Rocker DMA ring register offsets */
  58 #define ROCKER_DMA_DESC_ADDR(x)         (0x1000 + (x) * 32)  /* 8-byte */
  59 #define ROCKER_DMA_DESC_SIZE(x)         (0x1008 + (x) * 32)
  60 #define ROCKER_DMA_DESC_HEAD(x)         (0x100c + (x) * 32)
  61 #define ROCKER_DMA_DESC_TAIL(x)         (0x1010 + (x) * 32)
  62 #define ROCKER_DMA_DESC_CTRL(x)         (0x1014 + (x) * 32)
  63 #define ROCKER_DMA_DESC_CREDITS(x)      (0x1018 + (x) * 32)
  64 #define ROCKER_DMA_DESC_RES1(x)         (0x101c + (x) * 32)
  65
  66 /* Rocker dma ctrl register bits */
  67 #define ROCKER_DMA_DESC_CTRL_RESET      (1 << 0)
  68
  69 /* Rocker DMA ring types */
  70 enum rocker_dma_type {
  71         ROCKER_DMA_CMD,
  72         ROCKER_DMA_EVENT,
  73         __ROCKER_DMA_TX,
  74         __ROCKER_DMA_RX,
  75 #define ROCKER_DMA_TX(port) (__ROCKER_DMA_TX + (port) * 2)
  76 #define ROCKER_DMA_RX(port) (__ROCKER_DMA_RX + (port) * 2)
  77 };
  78
  79 /* Rocker DMA ring size limits and default sizes */
  80 #define ROCKER_DMA_SIZE_MIN             2ul
  81 #define ROCKER_DMA_SIZE_MAX             65536ul
  82 #define ROCKER_DMA_CMD_DEFAULT_SIZE     32ul
  83 #define ROCKER_DMA_EVENT_DEFAULT_SIZE   32ul
  84 #define ROCKER_DMA_TX_DEFAULT_SIZE      64ul
  85 #define ROCKER_DMA_TX_DESC_SIZE         256
  86 #define ROCKER_DMA_RX_DEFAULT_SIZE      64ul
  87 #define ROCKER_DMA_RX_DESC_SIZE         256
  88
  89 /* Rocker DMA descriptor struct */
  90 struct rocker_desc {
  91         u64 buf_addr;
  92         u64 cookie;
  93         u16 buf_size;
  94         u16 tlv_size;
  95         u16 resv[5];
  96         u16 comp_err;
  97 };
  98
  99 #define ROCKER_DMA_DESC_COMP_ERR_GEN    (1 << 15)
 100
 101 /* Rocker DMA TLV struct */
 102 struct rocker_tlv {
 103         u32 type;
 104         u16 len;
 105 };
 106
 107 /* TLVs */
 108 enum {
 109         ROCKER_TLV_CMD_UNSPEC,
 110         ROCKER_TLV_CMD_TYPE,    /* u16 */
 111         ROCKER_TLV_CMD_INFO,    /* nest */
 112
 113         __ROCKER_TLV_CMD_MAX,
 114         ROCKER_TLV_CMD_MAX = __ROCKER_TLV_CMD_MAX - 1,
 115 };
 116
 117 enum {
 118         ROCKER_TLV_CMD_TYPE_UNSPEC,
 119         ROCKER_TLV_CMD_TYPE_GET_PORT_SETTINGS,
 120         ROCKER_TLV_CMD_TYPE_SET_PORT_SETTINGS,
 121         ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_ADD,
 122         ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_MOD,
 123         ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_DEL,
 124         ROCKER_TLV_CMD_TYPE_OF_DPA_FLOW_GET_STATS,
 125         ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_ADD,
 126         ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_MOD,
 127         ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_DEL,
 128         ROCKER_TLV_CMD_TYPE_OF_DPA_GROUP_GET_STATS,
 129
 130         ROCKER_TLV_CMD_TYPE_CLEAR_PORT_STATS,
 131         ROCKER_TLV_CMD_TYPE_GET_PORT_STATS,
 132
 133         __ROCKER_TLV_CMD_TYPE_MAX,
 134         ROCKER_TLV_CMD_TYPE_MAX = __ROCKER_TLV_CMD_TYPE_MAX - 1,
 135 };
 136
 137 enum {
 138         ROCKER_TLV_CMD_PORT_SETTINGS_UNSPEC,
 139         ROCKER_TLV_CMD_PORT_SETTINGS_LPORT,             /* u32 */
 140         ROCKER_TLV_CMD_PORT_SETTINGS_SPEED,             /* u32 */
 141         ROCKER_TLV_CMD_PORT_SETTINGS_DUPLEX,            /* u8 */
 142         ROCKER_TLV_CMD_PORT_SETTINGS_AUTONEG,           /* u8 */
 143         ROCKER_TLV_CMD_PORT_SETTINGS_MACADDR,           /* binary */
 144         ROCKER_TLV_CMD_PORT_SETTINGS_MODE,              /* u8 */
 145         ROCKER_TLV_CMD_PORT_SETTINGS_LEARNING,          /* u8 */
 146
 147         __ROCKER_TLV_CMD_PORT_SETTINGS_MAX,
 148         ROCKER_TLV_CMD_PORT_SETTINGS_MAX =
 149                         __ROCKER_TLV_CMD_PORT_SETTINGS_MAX - 1,
 150 };
 151
 152 enum {
 153         ROCKER_TLV_CMD_PORT_STATS_UNSPEC,
 154         ROCKER_TLV_CMD_PORT_STATS_LPORT,            /* u32 */
 155
 156         ROCKER_TLV_CMD_PORT_STATS_RX_PKTS,          /* u64 */
 157         ROCKER_TLV_CMD_PORT_STATS_RX_BYTES,         /* u64 */
 158         ROCKER_TLV_CMD_PORT_STATS_RX_DROPPED,       /* u64 */
 159         ROCKER_TLV_CMD_PORT_STATS_RX_ERRORS,        /* u64 */
 160
 161         ROCKER_TLV_CMD_PORT_STATS_TX_PKTS,          /* u64 */
 162         ROCKER_TLV_CMD_PORT_STATS_TX_BYTES,         /* u64 */
 163         ROCKER_TLV_CMD_PORT_STATS_TX_DROPPED,       /* u64 */
 164         ROCKER_TLV_CMD_PORT_STATS_TX_ERRORS,        /* u64 */
 165
 166         __ROCKER_TLV_CMD_PORT_STATS_MAX,
 167         ROCKER_TLV_CMD_PORT_STATS_MAX = __ROCKER_TLV_CMD_PORT_STATS_MAX - 1,
 168 };
 169
 170 enum rocker_port_mode {
 171         ROCKER_PORT_MODE_OF_DPA,
 172 };
 173
 174 enum {
 175         ROCKER_TLV_EVENT_UNSPEC,
 176         ROCKER_TLV_EVENT_TYPE,  /* u16 */
 177         ROCKER_TLV_EVENT_INFO,  /* nest */
 178
 179         __ROCKER_TLV_EVENT_MAX,
 180         ROCKER_TLV_EVENT_MAX = __ROCKER_TLV_EVENT_MAX - 1,
 181 };
 182
 183 enum {
 184         ROCKER_TLV_EVENT_TYPE_UNSPEC,
 185         ROCKER_TLV_EVENT_TYPE_LINK_CHANGED,
 186         ROCKER_TLV_EVENT_TYPE_MAC_VLAN_SEEN,
 187
 188         __ROCKER_TLV_EVENT_TYPE_MAX,
 189         ROCKER_TLV_EVENT_TYPE_MAX = __ROCKER_TLV_EVENT_TYPE_MAX - 1,
 190 };
 191
 192 enum {
 193         ROCKER_TLV_EVENT_LINK_CHANGED_UNSPEC,
 194         ROCKER_TLV_EVENT_LINK_CHANGED_LPORT,    /* u32 */
 195         ROCKER_TLV_EVENT_LINK_CHANGED_LINKUP,   /* u8 */
 196
 197         __ROCKER_TLV_EVENT_LINK_CHANGED_MAX,
 198         ROCKER_TLV_EVENT_LINK_CHANGED_MAX =
 199                         __ROCKER_TLV_EVENT_LINK_CHANGED_MAX - 1,
 200 };
 201
 202 enum {
 203         ROCKER_TLV_EVENT_MAC_VLAN_UNSPEC,
 204         ROCKER_TLV_EVENT_MAC_VLAN_LPORT,        /* u32 */
 205         ROCKER_TLV_EVENT_MAC_VLAN_MAC,          /* binary */
 206         ROCKER_TLV_EVENT_MAC_VLAN_VLAN_ID,      /* __be16 */
 207
 208         __ROCKER_TLV_EVENT_MAC_VLAN_MAX,
 209         ROCKER_TLV_EVENT_MAC_VLAN_MAX = __ROCKER_TLV_EVENT_MAC_VLAN_MAX - 1,
 210 };
 211
 212 enum {
 213         ROCKER_TLV_RX_UNSPEC,
 214         ROCKER_TLV_RX_FLAGS,            /* u16, see ROCKER_RX_FLAGS_ */
 215         ROCKER_TLV_RX_CSUM,             /* u16 */
 216         ROCKER_TLV_RX_FRAG_ADDR,        /* u64 */
 217         ROCKER_TLV_RX_FRAG_MAX_LEN,     /* u16 */
 218         ROCKER_TLV_RX_FRAG_LEN,         /* u16 */
 219
 220         __ROCKER_TLV_RX_MAX,
 221         ROCKER_TLV_RX_MAX = __ROCKER_TLV_RX_MAX - 1,
 222 };
 223
 224 #define ROCKER_RX_FLAGS_IPV4                    (1 << 0)
 225 #define ROCKER_RX_FLAGS_IPV6                    (1 << 1)
 226 #define ROCKER_RX_FLAGS_CSUM_CALC               (1 << 2)
 227 #define ROCKER_RX_FLAGS_IPV4_CSUM_GOOD          (1 << 3)
 228 #define ROCKER_RX_FLAGS_IP_FRAG                 (1 << 4)
 229 #define ROCKER_RX_FLAGS_TCP                     (1 << 5)
 230 #define ROCKER_RX_FLAGS_UDP                     (1 << 6)
 231 #define ROCKER_RX_FLAGS_TCP_UDP_CSUM_GOOD       (1 << 7)
 232
 233 enum {
 234         ROCKER_TLV_TX_UNSPEC,
 235         ROCKER_TLV_TX_OFFLOAD,          /* u8, see ROCKER_TX_OFFLOAD_ */
 236         ROCKER_TLV_TX_L3_CSUM_OFF,      /* u16 */
 237         ROCKER_TLV_TX_TSO_MSS,          /* u16 */
 238         ROCKER_TLV_TX_TSO_HDR_LEN,      /* u16 */
 239         ROCKER_TLV_TX_FRAGS,            /* array */
 240
 241         __ROCKER_TLV_TX_MAX,
 242         ROCKER_TLV_TX_MAX = __ROCKER_TLV_TX_MAX - 1,
 243 };
 244
 245 #define ROCKER_TX_OFFLOAD_NONE          0
 246 #define ROCKER_TX_OFFLOAD_IP_CSUM       1
 247 #define ROCKER_TX_OFFLOAD_TCP_UDP_CSUM  2
 248 #define ROCKER_TX_OFFLOAD_L3_CSUM       3
 249 #define ROCKER_TX_OFFLOAD_TSO           4
 250
 251 #define ROCKER_TX_FRAGS_MAX             16
 252
 253 enum {
 254         ROCKER_TLV_TX_FRAG_UNSPEC,
 255         ROCKER_TLV_TX_FRAG,             /* nest */
 256
 257         __ROCKER_TLV_TX_FRAG_MAX,
 258         ROCKER_TLV_TX_FRAG_MAX = __ROCKER_TLV_TX_FRAG_MAX - 1,
 259 };
 260
 261 enum {
 262         ROCKER_TLV_TX_FRAG_ATTR_UNSPEC,
 263         ROCKER_TLV_TX_FRAG_ATTR_ADDR,   /* u64 */
 264         ROCKER_TLV_TX_FRAG_ATTR_LEN,    /* u16 */
 265
 266         __ROCKER_TLV_TX_FRAG_ATTR_MAX,
 267         ROCKER_TLV_TX_FRAG_ATTR_MAX = __ROCKER_TLV_TX_FRAG_ATTR_MAX - 1,
 268 };
 269
 270 /* cmd info nested for OF-DPA msgs */
 271 enum {
 272         ROCKER_TLV_OF_DPA_UNSPEC,
 273         ROCKER_TLV_OF_DPA_TABLE_ID,             /* u16 */
 274         ROCKER_TLV_OF_DPA_PRIORITY,             /* u32 */
 275         ROCKER_TLV_OF_DPA_HARDTIME,             /* u32 */
 276         ROCKER_TLV_OF_DPA_IDLETIME,             /* u32 */
 277         ROCKER_TLV_OF_DPA_COOKIE,               /* u64 */
 278         ROCKER_TLV_OF_DPA_IN_LPORT,             /* u32 */
 279         ROCKER_TLV_OF_DPA_IN_LPORT_MASK,        /* u32 */
 280         ROCKER_TLV_OF_DPA_OUT_LPORT,            /* u32 */
 281         ROCKER_TLV_OF_DPA_GOTO_TABLE_ID,        /* u16 */
 282         ROCKER_TLV_OF_DPA_GROUP_ID,             /* u32 */
 283         ROCKER_TLV_OF_DPA_GROUP_ID_LOWER,       /* u32 */
 284         ROCKER_TLV_OF_DPA_GROUP_COUNT,          /* u16 */
 285         ROCKER_TLV_OF_DPA_GROUP_IDS,            /* u32 array */
 286         ROCKER_TLV_OF_DPA_VLAN_ID,              /* __be16 */
 287         ROCKER_TLV_OF_DPA_VLAN_ID_MASK,         /* __be16 */
 288         ROCKER_TLV_OF_DPA_VLAN_PCP,             /* __be16 */
 289         ROCKER_TLV_OF_DPA_VLAN_PCP_MASK,        /* __be16 */
 290         ROCKER_TLV_OF_DPA_VLAN_PCP_ACTION,      /* u8 */
 291         ROCKER_TLV_OF_DPA_NEW_VLAN_ID,          /* __be16 */
 292         ROCKER_TLV_OF_DPA_NEW_VLAN_PCP,         /* u8 */
 293         ROCKER_TLV_OF_DPA_TUNNEL_ID,            /* u32 */
 294         ROCKER_TLV_OF_DPA_TUN_LOG_LPORT,        /* u32 */
 295         ROCKER_TLV_OF_DPA_ETHERTYPE,            /* __be16 */
 296         ROCKER_TLV_OF_DPA_DST_MAC,              /* binary */
 297         ROCKER_TLV_OF_DPA_DST_MAC_MASK,         /* binary */
 298         ROCKER_TLV_OF_DPA_SRC_MAC,              /* binary */
 299         ROCKER_TLV_OF_DPA_SRC_MAC_MASK,         /* binary */
 300         ROCKER_TLV_OF_DPA_IP_PROTO,             /* u8 */
 301         ROCKER_TLV_OF_DPA_IP_PROTO_MASK,        /* u8 */
 302         ROCKER_TLV_OF_DPA_IP_DSCP,              /* u8 */
 303         ROCKER_TLV_OF_DPA_IP_DSCP_MASK,         /* u8 */
 304         ROCKER_TLV_OF_DPA_IP_DSCP_ACTION,       /* u8 */
 305         ROCKER_TLV_OF_DPA_NEW_IP_DSCP,          /* u8 */
 306         ROCKER_TLV_OF_DPA_IP_ECN,               /* u8 */
 307         ROCKER_TLV_OF_DPA_IP_ECN_MASK,          /* u8 */
 308         ROCKER_TLV_OF_DPA_DST_IP,               /* __be32 */
 309         ROCKER_TLV_OF_DPA_DST_IP_MASK,          /* __be32 */
 310         ROCKER_TLV_OF_DPA_SRC_IP,               /* __be32 */
 311         ROCKER_TLV_OF_DPA_SRC_IP_MASK,          /* __be32 */
 312         ROCKER_TLV_OF_DPA_DST_IPV6,             /* binary */
 313         ROCKER_TLV_OF_DPA_DST_IPV6_MASK,        /* binary */
 314         ROCKER_TLV_OF_DPA_SRC_IPV6,             /* binary */
 315         ROCKER_TLV_OF_DPA_SRC_IPV6_MASK,        /* binary */
 316         ROCKER_TLV_OF_DPA_SRC_ARP_IP,           /* __be32 */
 317         ROCKER_TLV_OF_DPA_SRC_ARP_IP_MASK,      /* __be32 */
 318         ROCKER_TLV_OF_DPA_L4_DST_PORT,          /* __be16 */
 319         ROCKER_TLV_OF_DPA_L4_DST_PORT_MASK,     /* __be16 */
 320         ROCKER_TLV_OF_DPA_L4_SRC_PORT,          /* __be16 */
 321         ROCKER_TLV_OF_DPA_L4_SRC_PORT_MASK,     /* __be16 */
 322         ROCKER_TLV_OF_DPA_ICMP_TYPE,            /* u8 */
 323         ROCKER_TLV_OF_DPA_ICMP_TYPE_MASK,       /* u8 */
 324         ROCKER_TLV_OF_DPA_ICMP_CODE,            /* u8 */
 325         ROCKER_TLV_OF_DPA_ICMP_CODE_MASK,       /* u8 */
 326         ROCKER_TLV_OF_DPA_IPV6_LABEL,           /* __be32 */
 327         ROCKER_TLV_OF_DPA_IPV6_LABEL_MASK,      /* __be32 */
 328         ROCKER_TLV_OF_DPA_QUEUE_ID_ACTION,      /* u8 */
 329         ROCKER_TLV_OF_DPA_NEW_QUEUE_ID,         /* u8 */
 330         ROCKER_TLV_OF_DPA_CLEAR_ACTIONS,        /* u32 */
 331         ROCKER_TLV_OF_DPA_POP_VLAN,             /* u8 */
 332         ROCKER_TLV_OF_DPA_TTL_CHECK,            /* u8 */
 333         ROCKER_TLV_OF_DPA_COPY_CPU_ACTION,      /* u8 */
 334
 335         __ROCKER_TLV_OF_DPA_MAX,
 336         ROCKER_TLV_OF_DPA_MAX = __ROCKER_TLV_OF_DPA_MAX - 1,
 337 };
 338
 339 /* OF-DPA table IDs */
 340
 341 enum rocker_of_dpa_table_id {
 342         ROCKER_OF_DPA_TABLE_ID_INGRESS_PORT = 0,
 343         ROCKER_OF_DPA_TABLE_ID_VLAN = 10,
 344         ROCKER_OF_DPA_TABLE_ID_TERMINATION_MAC = 20,
 345         ROCKER_OF_DPA_TABLE_ID_UNICAST_ROUTING = 30,
 346         ROCKER_OF_DPA_TABLE_ID_MULTICAST_ROUTING = 40,
 347         ROCKER_OF_DPA_TABLE_ID_BRIDGING = 50,
 348         ROCKER_OF_DPA_TABLE_ID_ACL_POLICY = 60,
 349 };
 350
 351 /* OF-DPA flow stats */
 352 enum {
 353         ROCKER_TLV_OF_DPA_FLOW_STAT_UNSPEC,
 354         ROCKER_TLV_OF_DPA_FLOW_STAT_DURATION,   /* u32 */
 355         ROCKER_TLV_OF_DPA_FLOW_STAT_RX_PKTS,    /* u64 */
 356         ROCKER_TLV_OF_DPA_FLOW_STAT_TX_PKTS,    /* u64 */
 357
 358         __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX,
 359         ROCKER_TLV_OF_DPA_FLOW_STAT_MAX = __ROCKER_TLV_OF_DPA_FLOW_STAT_MAX - 1,
 360 };
 361
 362 /* OF-DPA group types */
 363 enum rocker_of_dpa_group_type {
 364         ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE = 0,
 365         ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE,
 366         ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST,
 367         ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST,
 368         ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD,
 369         ROCKER_OF_DPA_GROUP_TYPE_L3_INTERFACE,
 370         ROCKER_OF_DPA_GROUP_TYPE_L3_MCAST,
 371         ROCKER_OF_DPA_GROUP_TYPE_L3_ECMP,
 372         ROCKER_OF_DPA_GROUP_TYPE_L2_OVERLAY,
 373 };
 374
 375 /* OF-DPA group L2 overlay types */
 376 enum rocker_of_dpa_overlay_type {
 377         ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_UCAST = 0,
 378         ROCKER_OF_DPA_OVERLAY_TYPE_FLOOD_MCAST,
 379         ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_UCAST,
 380         ROCKER_OF_DPA_OVERLAY_TYPE_MCAST_MCAST,
 381 };
 382
 383 /* OF-DPA group ID encoding */
 384 #define ROCKER_GROUP_TYPE_SHIFT 28
 385 #define ROCKER_GROUP_TYPE_MASK 0xf0000000
 386 #define ROCKER_GROUP_VLAN_SHIFT 16
 387 #define ROCKER_GROUP_VLAN_MASK 0x0fff0000
 388 #define ROCKER_GROUP_PORT_SHIFT 0
 389 #define ROCKER_GROUP_PORT_MASK 0x0000ffff
 390 #define ROCKER_GROUP_TUNNEL_ID_SHIFT 12
 391 #define ROCKER_GROUP_TUNNEL_ID_MASK 0x0ffff000
 392 #define ROCKER_GROUP_SUBTYPE_SHIFT 10
 393 #define ROCKER_GROUP_SUBTYPE_MASK 0x00000c00
 394 #define ROCKER_GROUP_INDEX_SHIFT 0
 395 #define ROCKER_GROUP_INDEX_MASK 0x0000ffff
 396 #define ROCKER_GROUP_INDEX_LONG_SHIFT 0
 397 #define ROCKER_GROUP_INDEX_LONG_MASK 0x0fffffff
 398
 399 #define ROCKER_GROUP_TYPE_GET(group_id) \
 400         (((group_id) & ROCKER_GROUP_TYPE_MASK) >> ROCKER_GROUP_TYPE_SHIFT)
 401 #define ROCKER_GROUP_TYPE_SET(type) \
 402         (((type) << ROCKER_GROUP_TYPE_SHIFT) & ROCKER_GROUP_TYPE_MASK)
 403 #define ROCKER_GROUP_VLAN_GET(group_id) \
 404         (((group_id) & ROCKER_GROUP_VLAN_ID_MASK) >> ROCKER_GROUP_VLAN_ID_SHIFT)
 405 #define ROCKER_GROUP_VLAN_SET(vlan_id) \
 406         (((vlan_id) << ROCKER_GROUP_VLAN_SHIFT) & ROCKER_GROUP_VLAN_MASK)
 407 #define ROCKER_GROUP_PORT_GET(group_id) \
 408         (((group_id) & ROCKER_GROUP_PORT_MASK) >> ROCKER_GROUP_PORT_SHIFT)
 409 #define ROCKER_GROUP_PORT_SET(port) \
 410         (((port) << ROCKER_GROUP_PORT_SHIFT) & ROCKER_GROUP_PORT_MASK)
 411 #define ROCKER_GROUP_INDEX_GET(group_id) \
 412         (((group_id) & ROCKER_GROUP_INDEX_MASK) >> ROCKER_GROUP_INDEX_SHIFT)
 413 #define ROCKER_GROUP_INDEX_SET(index) \
 414         (((index) << ROCKER_GROUP_INDEX_SHIFT) & ROCKER_GROUP_INDEX_MASK)
 415 #define ROCKER_GROUP_INDEX_LONG_GET(group_id) \
 416         (((group_id) & ROCKER_GROUP_INDEX_LONG_MASK) >> \
 417          ROCKER_GROUP_INDEX_LONG_SHIFT)
 418 #define ROCKER_GROUP_INDEX_LONG_SET(index) \
 419         (((index) << ROCKER_GROUP_INDEX_LONG_SHIFT) & \
 420          ROCKER_GROUP_INDEX_LONG_MASK)
 421
 422 #define ROCKER_GROUP_NONE 0
 423 #define ROCKER_GROUP_L2_INTERFACE(vlan_id, port) \
 424         (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_INTERFACE) |\
 425          ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_PORT_SET(port))
 426 #define ROCKER_GROUP_L2_REWRITE(index) \
 427         (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_REWRITE) |\
 428          ROCKER_GROUP_INDEX_LONG_SET(index))
 429 #define ROCKER_GROUP_L2_MCAST(vlan_id, index) \
 430         (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_MCAST) |\
 431          ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
 432 #define ROCKER_GROUP_L2_FLOOD(vlan_id, index) \
 433         (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L2_FLOOD) |\
 434         ROCKER_GROUP_VLAN_SET(ntohs(vlan_id)) | ROCKER_GROUP_INDEX_SET(index))
 435 #define ROCKER_GROUP_L3_UNICAST(index) \
 436         (ROCKER_GROUP_TYPE_SET(ROCKER_OF_DPA_GROUP_TYPE_L3_UCAST) |\
 437          ROCKER_GROUP_INDEX_LONG_SET(index))
 438
 439 /* Rocker general purpose registers */
 440 #define ROCKER_CONTROL                  0x0300
 441 #define ROCKER_PORT_PHYS_COUNT          0x0304
 442 #define ROCKER_PORT_PHYS_LINK_STATUS    0x0310 /* 8-byte */
 443 #define ROCKER_PORT_PHYS_ENABLE         0x0318 /* 8-byte */
 444 #define ROCKER_SWITCH_ID                0x0320 /* 8-byte */
 445
 446 /* Rocker control bits */
 447 #define ROCKER_CONTROL_RESET            (1 << 0)
 448
 449 #endif