sfc: Enable RX DMA scattering where possible
[deliverable/linux.git] / drivers / net / ethernet / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/pci.h>
25 #include <linux/cpu_rmap.h>
26 #include <linux/aer.h>
27 #include "net_driver.h"
28 #include "efx.h"
29 #include "nic.h"
30 #include "selftest.h"
31
32 #include "mcdi.h"
33 #include "workarounds.h"
34
35 /**************************************************************************
36 *
37 * Type name strings
38 *
39 **************************************************************************
40 */
41
42 /* Loopback mode names (see LOOPBACK_MODE()) */
43 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
44 const char *const efx_loopback_mode_names[] = {
45 [LOOPBACK_NONE] = "NONE",
46 [LOOPBACK_DATA] = "DATAPATH",
47 [LOOPBACK_GMAC] = "GMAC",
48 [LOOPBACK_XGMII] = "XGMII",
49 [LOOPBACK_XGXS] = "XGXS",
50 [LOOPBACK_XAUI] = "XAUI",
51 [LOOPBACK_GMII] = "GMII",
52 [LOOPBACK_SGMII] = "SGMII",
53 [LOOPBACK_XGBR] = "XGBR",
54 [LOOPBACK_XFI] = "XFI",
55 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
56 [LOOPBACK_GMII_FAR] = "GMII_FAR",
57 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
58 [LOOPBACK_XFI_FAR] = "XFI_FAR",
59 [LOOPBACK_GPHY] = "GPHY",
60 [LOOPBACK_PHYXS] = "PHYXS",
61 [LOOPBACK_PCS] = "PCS",
62 [LOOPBACK_PMAPMD] = "PMA/PMD",
63 [LOOPBACK_XPORT] = "XPORT",
64 [LOOPBACK_XGMII_WS] = "XGMII_WS",
65 [LOOPBACK_XAUI_WS] = "XAUI_WS",
66 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
67 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
68 [LOOPBACK_GMII_WS] = "GMII_WS",
69 [LOOPBACK_XFI_WS] = "XFI_WS",
70 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
71 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
72 };
73
74 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
75 const char *const efx_reset_type_names[] = {
76 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
77 [RESET_TYPE_ALL] = "ALL",
78 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
79 [RESET_TYPE_WORLD] = "WORLD",
80 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
81 [RESET_TYPE_DISABLE] = "DISABLE",
82 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
83 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
84 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
85 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
86 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 };
90
91 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
92 * queued onto this work queue. This is not a per-nic work queue, because
93 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
94 */
95 static struct workqueue_struct *reset_workqueue;
96
97 /**************************************************************************
98 *
99 * Configurable values
100 *
101 *************************************************************************/
102
103 /*
104 * Use separate channels for TX and RX events
105 *
106 * Set this to 1 to use separate channels for TX and RX. It allows us
107 * to control interrupt affinity separately for TX and RX.
108 *
109 * This is only used in MSI-X interrupt mode
110 */
111 static bool separate_tx_channels;
112 module_param(separate_tx_channels, bool, 0444);
113 MODULE_PARM_DESC(separate_tx_channels,
114 "Use separate channels for TX and RX");
115
116 /* This is the weight assigned to each of the (per-channel) virtual
117 * NAPI devices.
118 */
119 static int napi_weight = 64;
120
121 /* This is the time (in jiffies) between invocations of the hardware
122 * monitor.
123 * On Falcon-based NICs, this will:
124 * - Check the on-board hardware monitor;
125 * - Poll the link state and reconfigure the hardware as necessary.
126 * On Siena-based NICs for power systems with EEH support, this will give EEH a
127 * chance to start.
128 */
129 static unsigned int efx_monitor_interval = 1 * HZ;
130
131 /* Initial interrupt moderation settings. They can be modified after
132 * module load with ethtool.
133 *
134 * The default for RX should strike a balance between increasing the
135 * round-trip latency and reducing overhead.
136 */
137 static unsigned int rx_irq_mod_usec = 60;
138
139 /* Initial interrupt moderation settings. They can be modified after
140 * module load with ethtool.
141 *
142 * This default is chosen to ensure that a 10G link does not go idle
143 * while a TX queue is stopped after it has become full. A queue is
144 * restarted when it drops below half full. The time this takes (assuming
145 * worst case 3 descriptors per packet and 1024 descriptors) is
146 * 512 / 3 * 1.2 = 205 usec.
147 */
148 static unsigned int tx_irq_mod_usec = 150;
149
150 /* This is the first interrupt mode to try out of:
151 * 0 => MSI-X
152 * 1 => MSI
153 * 2 => legacy
154 */
155 static unsigned int interrupt_mode;
156
157 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
158 * i.e. the number of CPUs among which we may distribute simultaneous
159 * interrupt handling.
160 *
161 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
162 * The default (0) means to assign an interrupt to each core.
163 */
164 static unsigned int rss_cpus;
165 module_param(rss_cpus, uint, 0444);
166 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
167
168 static bool phy_flash_cfg;
169 module_param(phy_flash_cfg, bool, 0644);
170 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
171
172 static unsigned irq_adapt_low_thresh = 8000;
173 module_param(irq_adapt_low_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_low_thresh,
175 "Threshold score for reducing IRQ moderation");
176
177 static unsigned irq_adapt_high_thresh = 16000;
178 module_param(irq_adapt_high_thresh, uint, 0644);
179 MODULE_PARM_DESC(irq_adapt_high_thresh,
180 "Threshold score for increasing IRQ moderation");
181
182 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
183 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
184 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
185 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
186 module_param(debug, uint, 0);
187 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
188
189 /**************************************************************************
190 *
191 * Utility functions and prototypes
192 *
193 *************************************************************************/
194
195 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq);
196 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq);
197 static void efx_remove_channel(struct efx_channel *channel);
198 static void efx_remove_channels(struct efx_nic *efx);
199 static const struct efx_channel_type efx_default_channel_type;
200 static void efx_remove_port(struct efx_nic *efx);
201 static void efx_init_napi_channel(struct efx_channel *channel);
202 static void efx_fini_napi(struct efx_nic *efx);
203 static void efx_fini_napi_channel(struct efx_channel *channel);
204 static void efx_fini_struct(struct efx_nic *efx);
205 static void efx_start_all(struct efx_nic *efx);
206 static void efx_stop_all(struct efx_nic *efx);
207
208 #define EFX_ASSERT_RESET_SERIALISED(efx) \
209 do { \
210 if ((efx->state == STATE_READY) || \
211 (efx->state == STATE_RECOVERY) || \
212 (efx->state == STATE_DISABLED)) \
213 ASSERT_RTNL(); \
214 } while (0)
215
216 static int efx_check_disabled(struct efx_nic *efx)
217 {
218 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
219 netif_err(efx, drv, efx->net_dev,
220 "device is disabled due to earlier errors\n");
221 return -EIO;
222 }
223 return 0;
224 }
225
226 /**************************************************************************
227 *
228 * Event queue processing
229 *
230 *************************************************************************/
231
232 /* Process channel's event queue
233 *
234 * This function is responsible for processing the event queue of a
235 * single channel. The caller must guarantee that this function will
236 * never be concurrently called more than once on the same channel,
237 * though different channels may be being processed concurrently.
238 */
239 static int efx_process_channel(struct efx_channel *channel, int budget)
240 {
241 int spent;
242
243 if (unlikely(!channel->enabled))
244 return 0;
245
246 spent = efx_nic_process_eventq(channel, budget);
247 if (spent && efx_channel_has_rx_queue(channel)) {
248 struct efx_rx_queue *rx_queue =
249 efx_channel_get_rx_queue(channel);
250
251 efx_rx_flush_packet(channel);
252 if (rx_queue->enabled)
253 efx_fast_push_rx_descriptors(rx_queue);
254 }
255
256 return spent;
257 }
258
259 /* Mark channel as finished processing
260 *
261 * Note that since we will not receive further interrupts for this
262 * channel before we finish processing and call the eventq_read_ack()
263 * method, there is no need to use the interrupt hold-off timers.
264 */
265 static inline void efx_channel_processed(struct efx_channel *channel)
266 {
267 /* The interrupt handler for this channel may set work_pending
268 * as soon as we acknowledge the events we've seen. Make sure
269 * it's cleared before then. */
270 channel->work_pending = false;
271 smp_wmb();
272
273 efx_nic_eventq_read_ack(channel);
274 }
275
276 /* NAPI poll handler
277 *
278 * NAPI guarantees serialisation of polls of the same device, which
279 * provides the guarantee required by efx_process_channel().
280 */
281 static int efx_poll(struct napi_struct *napi, int budget)
282 {
283 struct efx_channel *channel =
284 container_of(napi, struct efx_channel, napi_str);
285 struct efx_nic *efx = channel->efx;
286 int spent;
287
288 netif_vdbg(efx, intr, efx->net_dev,
289 "channel %d NAPI poll executing on CPU %d\n",
290 channel->channel, raw_smp_processor_id());
291
292 spent = efx_process_channel(channel, budget);
293
294 if (spent < budget) {
295 if (efx_channel_has_rx_queue(channel) &&
296 efx->irq_rx_adaptive &&
297 unlikely(++channel->irq_count == 1000)) {
298 if (unlikely(channel->irq_mod_score <
299 irq_adapt_low_thresh)) {
300 if (channel->irq_moderation > 1) {
301 channel->irq_moderation -= 1;
302 efx->type->push_irq_moderation(channel);
303 }
304 } else if (unlikely(channel->irq_mod_score >
305 irq_adapt_high_thresh)) {
306 if (channel->irq_moderation <
307 efx->irq_rx_moderation) {
308 channel->irq_moderation += 1;
309 efx->type->push_irq_moderation(channel);
310 }
311 }
312 channel->irq_count = 0;
313 channel->irq_mod_score = 0;
314 }
315
316 efx_filter_rfs_expire(channel);
317
318 /* There is no race here; although napi_disable() will
319 * only wait for napi_complete(), this isn't a problem
320 * since efx_channel_processed() will have no effect if
321 * interrupts have already been disabled.
322 */
323 napi_complete(napi);
324 efx_channel_processed(channel);
325 }
326
327 return spent;
328 }
329
330 /* Process the eventq of the specified channel immediately on this CPU
331 *
332 * Disable hardware generated interrupts, wait for any existing
333 * processing to finish, then directly poll (and ack ) the eventq.
334 * Finally reenable NAPI and interrupts.
335 *
336 * This is for use only during a loopback self-test. It must not
337 * deliver any packets up the stack as this can result in deadlock.
338 */
339 void efx_process_channel_now(struct efx_channel *channel)
340 {
341 struct efx_nic *efx = channel->efx;
342
343 BUG_ON(channel->channel >= efx->n_channels);
344 BUG_ON(!channel->enabled);
345 BUG_ON(!efx->loopback_selftest);
346
347 /* Disable interrupts and wait for ISRs to complete */
348 efx_nic_disable_interrupts(efx);
349 if (efx->legacy_irq) {
350 synchronize_irq(efx->legacy_irq);
351 efx->legacy_irq_enabled = false;
352 }
353 if (channel->irq)
354 synchronize_irq(channel->irq);
355
356 /* Wait for any NAPI processing to complete */
357 napi_disable(&channel->napi_str);
358
359 /* Poll the channel */
360 efx_process_channel(channel, channel->eventq_mask + 1);
361
362 /* Ack the eventq. This may cause an interrupt to be generated
363 * when they are reenabled */
364 efx_channel_processed(channel);
365
366 napi_enable(&channel->napi_str);
367 if (efx->legacy_irq)
368 efx->legacy_irq_enabled = true;
369 efx_nic_enable_interrupts(efx);
370 }
371
372 /* Create event queue
373 * Event queue memory allocations are done only once. If the channel
374 * is reset, the memory buffer will be reused; this guards against
375 * errors during channel reset and also simplifies interrupt handling.
376 */
377 static int efx_probe_eventq(struct efx_channel *channel)
378 {
379 struct efx_nic *efx = channel->efx;
380 unsigned long entries;
381
382 netif_dbg(efx, probe, efx->net_dev,
383 "chan %d create event queue\n", channel->channel);
384
385 /* Build an event queue with room for one event per tx and rx buffer,
386 * plus some extra for link state events and MCDI completions. */
387 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
388 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
389 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
390
391 return efx_nic_probe_eventq(channel);
392 }
393
394 /* Prepare channel's event queue */
395 static void efx_init_eventq(struct efx_channel *channel)
396 {
397 netif_dbg(channel->efx, drv, channel->efx->net_dev,
398 "chan %d init event queue\n", channel->channel);
399
400 channel->eventq_read_ptr = 0;
401
402 efx_nic_init_eventq(channel);
403 }
404
405 /* Enable event queue processing and NAPI */
406 static void efx_start_eventq(struct efx_channel *channel)
407 {
408 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
409 "chan %d start event queue\n", channel->channel);
410
411 /* The interrupt handler for this channel may set work_pending
412 * as soon as we enable it. Make sure it's cleared before
413 * then. Similarly, make sure it sees the enabled flag set.
414 */
415 channel->work_pending = false;
416 channel->enabled = true;
417 smp_wmb();
418
419 napi_enable(&channel->napi_str);
420 efx_nic_eventq_read_ack(channel);
421 }
422
423 /* Disable event queue processing and NAPI */
424 static void efx_stop_eventq(struct efx_channel *channel)
425 {
426 if (!channel->enabled)
427 return;
428
429 napi_disable(&channel->napi_str);
430 channel->enabled = false;
431 }
432
433 static void efx_fini_eventq(struct efx_channel *channel)
434 {
435 netif_dbg(channel->efx, drv, channel->efx->net_dev,
436 "chan %d fini event queue\n", channel->channel);
437
438 efx_nic_fini_eventq(channel);
439 }
440
441 static void efx_remove_eventq(struct efx_channel *channel)
442 {
443 netif_dbg(channel->efx, drv, channel->efx->net_dev,
444 "chan %d remove event queue\n", channel->channel);
445
446 efx_nic_remove_eventq(channel);
447 }
448
449 /**************************************************************************
450 *
451 * Channel handling
452 *
453 *************************************************************************/
454
455 /* Allocate and initialise a channel structure. */
456 static struct efx_channel *
457 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
458 {
459 struct efx_channel *channel;
460 struct efx_rx_queue *rx_queue;
461 struct efx_tx_queue *tx_queue;
462 int j;
463
464 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
465 if (!channel)
466 return NULL;
467
468 channel->efx = efx;
469 channel->channel = i;
470 channel->type = &efx_default_channel_type;
471
472 for (j = 0; j < EFX_TXQ_TYPES; j++) {
473 tx_queue = &channel->tx_queue[j];
474 tx_queue->efx = efx;
475 tx_queue->queue = i * EFX_TXQ_TYPES + j;
476 tx_queue->channel = channel;
477 }
478
479 rx_queue = &channel->rx_queue;
480 rx_queue->efx = efx;
481 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
482 (unsigned long)rx_queue);
483
484 return channel;
485 }
486
487 /* Allocate and initialise a channel structure, copying parameters
488 * (but not resources) from an old channel structure.
489 */
490 static struct efx_channel *
491 efx_copy_channel(const struct efx_channel *old_channel)
492 {
493 struct efx_channel *channel;
494 struct efx_rx_queue *rx_queue;
495 struct efx_tx_queue *tx_queue;
496 int j;
497
498 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
499 if (!channel)
500 return NULL;
501
502 *channel = *old_channel;
503
504 channel->napi_dev = NULL;
505 memset(&channel->eventq, 0, sizeof(channel->eventq));
506
507 for (j = 0; j < EFX_TXQ_TYPES; j++) {
508 tx_queue = &channel->tx_queue[j];
509 if (tx_queue->channel)
510 tx_queue->channel = channel;
511 tx_queue->buffer = NULL;
512 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
513 }
514
515 rx_queue = &channel->rx_queue;
516 rx_queue->buffer = NULL;
517 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
518 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
519 (unsigned long)rx_queue);
520
521 return channel;
522 }
523
524 static int efx_probe_channel(struct efx_channel *channel)
525 {
526 struct efx_tx_queue *tx_queue;
527 struct efx_rx_queue *rx_queue;
528 int rc;
529
530 netif_dbg(channel->efx, probe, channel->efx->net_dev,
531 "creating channel %d\n", channel->channel);
532
533 rc = channel->type->pre_probe(channel);
534 if (rc)
535 goto fail;
536
537 rc = efx_probe_eventq(channel);
538 if (rc)
539 goto fail;
540
541 efx_for_each_channel_tx_queue(tx_queue, channel) {
542 rc = efx_probe_tx_queue(tx_queue);
543 if (rc)
544 goto fail;
545 }
546
547 efx_for_each_channel_rx_queue(rx_queue, channel) {
548 rc = efx_probe_rx_queue(rx_queue);
549 if (rc)
550 goto fail;
551 }
552
553 channel->n_rx_frm_trunc = 0;
554
555 return 0;
556
557 fail:
558 efx_remove_channel(channel);
559 return rc;
560 }
561
562 static void
563 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
564 {
565 struct efx_nic *efx = channel->efx;
566 const char *type;
567 int number;
568
569 number = channel->channel;
570 if (efx->tx_channel_offset == 0) {
571 type = "";
572 } else if (channel->channel < efx->tx_channel_offset) {
573 type = "-rx";
574 } else {
575 type = "-tx";
576 number -= efx->tx_channel_offset;
577 }
578 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
579 }
580
581 static void efx_set_channel_names(struct efx_nic *efx)
582 {
583 struct efx_channel *channel;
584
585 efx_for_each_channel(channel, efx)
586 channel->type->get_name(channel,
587 efx->channel_name[channel->channel],
588 sizeof(efx->channel_name[0]));
589 }
590
591 static int efx_probe_channels(struct efx_nic *efx)
592 {
593 struct efx_channel *channel;
594 int rc;
595
596 /* Restart special buffer allocation */
597 efx->next_buffer_table = 0;
598
599 /* Probe channels in reverse, so that any 'extra' channels
600 * use the start of the buffer table. This allows the traffic
601 * channels to be resized without moving them or wasting the
602 * entries before them.
603 */
604 efx_for_each_channel_rev(channel, efx) {
605 rc = efx_probe_channel(channel);
606 if (rc) {
607 netif_err(efx, probe, efx->net_dev,
608 "failed to create channel %d\n",
609 channel->channel);
610 goto fail;
611 }
612 }
613 efx_set_channel_names(efx);
614
615 return 0;
616
617 fail:
618 efx_remove_channels(efx);
619 return rc;
620 }
621
622 /* Channels are shutdown and reinitialised whilst the NIC is running
623 * to propagate configuration changes (mtu, checksum offload), or
624 * to clear hardware error conditions
625 */
626 static void efx_start_datapath(struct efx_nic *efx)
627 {
628 bool old_rx_scatter = efx->rx_scatter;
629 struct efx_tx_queue *tx_queue;
630 struct efx_rx_queue *rx_queue;
631 struct efx_channel *channel;
632 size_t rx_buf_len;
633
634 /* Calculate the rx buffer allocation parameters required to
635 * support the current MTU, including padding for header
636 * alignment and overruns.
637 */
638 efx->rx_dma_len = (efx->type->rx_buffer_hash_size +
639 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
640 efx->type->rx_buffer_padding);
641 rx_buf_len = (sizeof(struct efx_rx_page_state) +
642 EFX_PAGE_IP_ALIGN + efx->rx_dma_len);
643 if (rx_buf_len <= PAGE_SIZE) {
644 efx->rx_scatter = false;
645 efx->rx_buffer_order = 0;
646 if (rx_buf_len <= PAGE_SIZE / 2)
647 efx->rx_buffer_truesize = PAGE_SIZE / 2;
648 else
649 efx->rx_buffer_truesize = PAGE_SIZE;
650 } else if (efx->type->can_rx_scatter) {
651 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
652 EFX_PAGE_IP_ALIGN + EFX_RX_USR_BUF_SIZE >
653 PAGE_SIZE / 2);
654 efx->rx_scatter = true;
655 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
656 efx->rx_buffer_order = 0;
657 efx->rx_buffer_truesize = PAGE_SIZE / 2;
658 } else {
659 efx->rx_scatter = false;
660 efx->rx_buffer_order = get_order(rx_buf_len);
661 efx->rx_buffer_truesize = PAGE_SIZE << efx->rx_buffer_order;
662 }
663
664 /* RX filters also have scatter-enabled flags */
665 if (efx->rx_scatter != old_rx_scatter)
666 efx_filter_update_rx_scatter(efx);
667
668 /* We must keep at least one descriptor in a TX ring empty.
669 * We could avoid this when the queue size does not exactly
670 * match the hardware ring size, but it's not that important.
671 * Therefore we stop the queue when one more skb might fill
672 * the ring completely. We wake it when half way back to
673 * empty.
674 */
675 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
676 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
677
678 /* Initialise the channels */
679 efx_for_each_channel(channel, efx) {
680 efx_for_each_channel_tx_queue(tx_queue, channel)
681 efx_init_tx_queue(tx_queue);
682
683 efx_for_each_channel_rx_queue(rx_queue, channel) {
684 efx_init_rx_queue(rx_queue);
685 efx_nic_generate_fill_event(rx_queue);
686 }
687
688 WARN_ON(channel->rx_pkt_n_frags);
689 }
690
691 if (netif_device_present(efx->net_dev))
692 netif_tx_wake_all_queues(efx->net_dev);
693 }
694
695 static void efx_stop_datapath(struct efx_nic *efx)
696 {
697 struct efx_channel *channel;
698 struct efx_tx_queue *tx_queue;
699 struct efx_rx_queue *rx_queue;
700 struct pci_dev *dev = efx->pci_dev;
701 int rc;
702
703 EFX_ASSERT_RESET_SERIALISED(efx);
704 BUG_ON(efx->port_enabled);
705
706 /* Only perform flush if dma is enabled */
707 if (dev->is_busmaster && efx->state != STATE_RECOVERY) {
708 rc = efx_nic_flush_queues(efx);
709
710 if (rc && EFX_WORKAROUND_7803(efx)) {
711 /* Schedule a reset to recover from the flush failure. The
712 * descriptor caches reference memory we're about to free,
713 * but falcon_reconfigure_mac_wrapper() won't reconnect
714 * the MACs because of the pending reset. */
715 netif_err(efx, drv, efx->net_dev,
716 "Resetting to recover from flush failure\n");
717 efx_schedule_reset(efx, RESET_TYPE_ALL);
718 } else if (rc) {
719 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
720 } else {
721 netif_dbg(efx, drv, efx->net_dev,
722 "successfully flushed all queues\n");
723 }
724 }
725
726 efx_for_each_channel(channel, efx) {
727 /* RX packet processing is pipelined, so wait for the
728 * NAPI handler to complete. At least event queue 0
729 * might be kept active by non-data events, so don't
730 * use napi_synchronize() but actually disable NAPI
731 * temporarily.
732 */
733 if (efx_channel_has_rx_queue(channel)) {
734 efx_stop_eventq(channel);
735 efx_start_eventq(channel);
736 }
737
738 efx_for_each_channel_rx_queue(rx_queue, channel)
739 efx_fini_rx_queue(rx_queue);
740 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
741 efx_fini_tx_queue(tx_queue);
742 }
743 }
744
745 static void efx_remove_channel(struct efx_channel *channel)
746 {
747 struct efx_tx_queue *tx_queue;
748 struct efx_rx_queue *rx_queue;
749
750 netif_dbg(channel->efx, drv, channel->efx->net_dev,
751 "destroy chan %d\n", channel->channel);
752
753 efx_for_each_channel_rx_queue(rx_queue, channel)
754 efx_remove_rx_queue(rx_queue);
755 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
756 efx_remove_tx_queue(tx_queue);
757 efx_remove_eventq(channel);
758 channel->type->post_remove(channel);
759 }
760
761 static void efx_remove_channels(struct efx_nic *efx)
762 {
763 struct efx_channel *channel;
764
765 efx_for_each_channel(channel, efx)
766 efx_remove_channel(channel);
767 }
768
769 int
770 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
771 {
772 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
773 u32 old_rxq_entries, old_txq_entries;
774 unsigned i, next_buffer_table = 0;
775 int rc;
776
777 rc = efx_check_disabled(efx);
778 if (rc)
779 return rc;
780
781 /* Not all channels should be reallocated. We must avoid
782 * reallocating their buffer table entries.
783 */
784 efx_for_each_channel(channel, efx) {
785 struct efx_rx_queue *rx_queue;
786 struct efx_tx_queue *tx_queue;
787
788 if (channel->type->copy)
789 continue;
790 next_buffer_table = max(next_buffer_table,
791 channel->eventq.index +
792 channel->eventq.entries);
793 efx_for_each_channel_rx_queue(rx_queue, channel)
794 next_buffer_table = max(next_buffer_table,
795 rx_queue->rxd.index +
796 rx_queue->rxd.entries);
797 efx_for_each_channel_tx_queue(tx_queue, channel)
798 next_buffer_table = max(next_buffer_table,
799 tx_queue->txd.index +
800 tx_queue->txd.entries);
801 }
802
803 efx_device_detach_sync(efx);
804 efx_stop_all(efx);
805 efx_stop_interrupts(efx, true);
806
807 /* Clone channels (where possible) */
808 memset(other_channel, 0, sizeof(other_channel));
809 for (i = 0; i < efx->n_channels; i++) {
810 channel = efx->channel[i];
811 if (channel->type->copy)
812 channel = channel->type->copy(channel);
813 if (!channel) {
814 rc = -ENOMEM;
815 goto out;
816 }
817 other_channel[i] = channel;
818 }
819
820 /* Swap entry counts and channel pointers */
821 old_rxq_entries = efx->rxq_entries;
822 old_txq_entries = efx->txq_entries;
823 efx->rxq_entries = rxq_entries;
824 efx->txq_entries = txq_entries;
825 for (i = 0; i < efx->n_channels; i++) {
826 channel = efx->channel[i];
827 efx->channel[i] = other_channel[i];
828 other_channel[i] = channel;
829 }
830
831 /* Restart buffer table allocation */
832 efx->next_buffer_table = next_buffer_table;
833
834 for (i = 0; i < efx->n_channels; i++) {
835 channel = efx->channel[i];
836 if (!channel->type->copy)
837 continue;
838 rc = efx_probe_channel(channel);
839 if (rc)
840 goto rollback;
841 efx_init_napi_channel(efx->channel[i]);
842 }
843
844 out:
845 /* Destroy unused channel structures */
846 for (i = 0; i < efx->n_channels; i++) {
847 channel = other_channel[i];
848 if (channel && channel->type->copy) {
849 efx_fini_napi_channel(channel);
850 efx_remove_channel(channel);
851 kfree(channel);
852 }
853 }
854
855 efx_start_interrupts(efx, true);
856 efx_start_all(efx);
857 netif_device_attach(efx->net_dev);
858 return rc;
859
860 rollback:
861 /* Swap back */
862 efx->rxq_entries = old_rxq_entries;
863 efx->txq_entries = old_txq_entries;
864 for (i = 0; i < efx->n_channels; i++) {
865 channel = efx->channel[i];
866 efx->channel[i] = other_channel[i];
867 other_channel[i] = channel;
868 }
869 goto out;
870 }
871
872 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
873 {
874 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
875 }
876
877 static const struct efx_channel_type efx_default_channel_type = {
878 .pre_probe = efx_channel_dummy_op_int,
879 .post_remove = efx_channel_dummy_op_void,
880 .get_name = efx_get_channel_name,
881 .copy = efx_copy_channel,
882 .keep_eventq = false,
883 };
884
885 int efx_channel_dummy_op_int(struct efx_channel *channel)
886 {
887 return 0;
888 }
889
890 void efx_channel_dummy_op_void(struct efx_channel *channel)
891 {
892 }
893
894 /**************************************************************************
895 *
896 * Port handling
897 *
898 **************************************************************************/
899
900 /* This ensures that the kernel is kept informed (via
901 * netif_carrier_on/off) of the link status, and also maintains the
902 * link status's stop on the port's TX queue.
903 */
904 void efx_link_status_changed(struct efx_nic *efx)
905 {
906 struct efx_link_state *link_state = &efx->link_state;
907
908 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
909 * that no events are triggered between unregister_netdev() and the
910 * driver unloading. A more general condition is that NETDEV_CHANGE
911 * can only be generated between NETDEV_UP and NETDEV_DOWN */
912 if (!netif_running(efx->net_dev))
913 return;
914
915 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
916 efx->n_link_state_changes++;
917
918 if (link_state->up)
919 netif_carrier_on(efx->net_dev);
920 else
921 netif_carrier_off(efx->net_dev);
922 }
923
924 /* Status message for kernel log */
925 if (link_state->up)
926 netif_info(efx, link, efx->net_dev,
927 "link up at %uMbps %s-duplex (MTU %d)%s\n",
928 link_state->speed, link_state->fd ? "full" : "half",
929 efx->net_dev->mtu,
930 (efx->promiscuous ? " [PROMISC]" : ""));
931 else
932 netif_info(efx, link, efx->net_dev, "link down\n");
933 }
934
935 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
936 {
937 efx->link_advertising = advertising;
938 if (advertising) {
939 if (advertising & ADVERTISED_Pause)
940 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
941 else
942 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
943 if (advertising & ADVERTISED_Asym_Pause)
944 efx->wanted_fc ^= EFX_FC_TX;
945 }
946 }
947
948 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
949 {
950 efx->wanted_fc = wanted_fc;
951 if (efx->link_advertising) {
952 if (wanted_fc & EFX_FC_RX)
953 efx->link_advertising |= (ADVERTISED_Pause |
954 ADVERTISED_Asym_Pause);
955 else
956 efx->link_advertising &= ~(ADVERTISED_Pause |
957 ADVERTISED_Asym_Pause);
958 if (wanted_fc & EFX_FC_TX)
959 efx->link_advertising ^= ADVERTISED_Asym_Pause;
960 }
961 }
962
963 static void efx_fini_port(struct efx_nic *efx);
964
965 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
966 * the MAC appropriately. All other PHY configuration changes are pushed
967 * through phy_op->set_settings(), and pushed asynchronously to the MAC
968 * through efx_monitor().
969 *
970 * Callers must hold the mac_lock
971 */
972 int __efx_reconfigure_port(struct efx_nic *efx)
973 {
974 enum efx_phy_mode phy_mode;
975 int rc;
976
977 WARN_ON(!mutex_is_locked(&efx->mac_lock));
978
979 /* Serialise the promiscuous flag with efx_set_rx_mode. */
980 netif_addr_lock_bh(efx->net_dev);
981 netif_addr_unlock_bh(efx->net_dev);
982
983 /* Disable PHY transmit in mac level loopbacks */
984 phy_mode = efx->phy_mode;
985 if (LOOPBACK_INTERNAL(efx))
986 efx->phy_mode |= PHY_MODE_TX_DISABLED;
987 else
988 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
989
990 rc = efx->type->reconfigure_port(efx);
991
992 if (rc)
993 efx->phy_mode = phy_mode;
994
995 return rc;
996 }
997
998 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
999 * disabled. */
1000 int efx_reconfigure_port(struct efx_nic *efx)
1001 {
1002 int rc;
1003
1004 EFX_ASSERT_RESET_SERIALISED(efx);
1005
1006 mutex_lock(&efx->mac_lock);
1007 rc = __efx_reconfigure_port(efx);
1008 mutex_unlock(&efx->mac_lock);
1009
1010 return rc;
1011 }
1012
1013 /* Asynchronous work item for changing MAC promiscuity and multicast
1014 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1015 * MAC directly. */
1016 static void efx_mac_work(struct work_struct *data)
1017 {
1018 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1019
1020 mutex_lock(&efx->mac_lock);
1021 if (efx->port_enabled)
1022 efx->type->reconfigure_mac(efx);
1023 mutex_unlock(&efx->mac_lock);
1024 }
1025
1026 static int efx_probe_port(struct efx_nic *efx)
1027 {
1028 int rc;
1029
1030 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1031
1032 if (phy_flash_cfg)
1033 efx->phy_mode = PHY_MODE_SPECIAL;
1034
1035 /* Connect up MAC/PHY operations table */
1036 rc = efx->type->probe_port(efx);
1037 if (rc)
1038 return rc;
1039
1040 /* Initialise MAC address to permanent address */
1041 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
1042
1043 return 0;
1044 }
1045
1046 static int efx_init_port(struct efx_nic *efx)
1047 {
1048 int rc;
1049
1050 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1051
1052 mutex_lock(&efx->mac_lock);
1053
1054 rc = efx->phy_op->init(efx);
1055 if (rc)
1056 goto fail1;
1057
1058 efx->port_initialized = true;
1059
1060 /* Reconfigure the MAC before creating dma queues (required for
1061 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1062 efx->type->reconfigure_mac(efx);
1063
1064 /* Ensure the PHY advertises the correct flow control settings */
1065 rc = efx->phy_op->reconfigure(efx);
1066 if (rc)
1067 goto fail2;
1068
1069 mutex_unlock(&efx->mac_lock);
1070 return 0;
1071
1072 fail2:
1073 efx->phy_op->fini(efx);
1074 fail1:
1075 mutex_unlock(&efx->mac_lock);
1076 return rc;
1077 }
1078
1079 static void efx_start_port(struct efx_nic *efx)
1080 {
1081 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1082 BUG_ON(efx->port_enabled);
1083
1084 mutex_lock(&efx->mac_lock);
1085 efx->port_enabled = true;
1086
1087 /* efx_mac_work() might have been scheduled after efx_stop_port(),
1088 * and then cancelled by efx_flush_all() */
1089 efx->type->reconfigure_mac(efx);
1090
1091 mutex_unlock(&efx->mac_lock);
1092 }
1093
1094 /* Prevent efx_mac_work() and efx_monitor() from working */
1095 static void efx_stop_port(struct efx_nic *efx)
1096 {
1097 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1098
1099 mutex_lock(&efx->mac_lock);
1100 efx->port_enabled = false;
1101 mutex_unlock(&efx->mac_lock);
1102
1103 /* Serialise against efx_set_multicast_list() */
1104 netif_addr_lock_bh(efx->net_dev);
1105 netif_addr_unlock_bh(efx->net_dev);
1106 }
1107
1108 static void efx_fini_port(struct efx_nic *efx)
1109 {
1110 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1111
1112 if (!efx->port_initialized)
1113 return;
1114
1115 efx->phy_op->fini(efx);
1116 efx->port_initialized = false;
1117
1118 efx->link_state.up = false;
1119 efx_link_status_changed(efx);
1120 }
1121
1122 static void efx_remove_port(struct efx_nic *efx)
1123 {
1124 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1125
1126 efx->type->remove_port(efx);
1127 }
1128
1129 /**************************************************************************
1130 *
1131 * NIC handling
1132 *
1133 **************************************************************************/
1134
1135 /* This configures the PCI device to enable I/O and DMA. */
1136 static int efx_init_io(struct efx_nic *efx)
1137 {
1138 struct pci_dev *pci_dev = efx->pci_dev;
1139 dma_addr_t dma_mask = efx->type->max_dma_mask;
1140 int rc;
1141
1142 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1143
1144 rc = pci_enable_device(pci_dev);
1145 if (rc) {
1146 netif_err(efx, probe, efx->net_dev,
1147 "failed to enable PCI device\n");
1148 goto fail1;
1149 }
1150
1151 pci_set_master(pci_dev);
1152
1153 /* Set the PCI DMA mask. Try all possibilities from our
1154 * genuine mask down to 32 bits, because some architectures
1155 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1156 * masks event though they reject 46 bit masks.
1157 */
1158 while (dma_mask > 0x7fffffffUL) {
1159 if (dma_supported(&pci_dev->dev, dma_mask)) {
1160 rc = dma_set_mask(&pci_dev->dev, dma_mask);
1161 if (rc == 0)
1162 break;
1163 }
1164 dma_mask >>= 1;
1165 }
1166 if (rc) {
1167 netif_err(efx, probe, efx->net_dev,
1168 "could not find a suitable DMA mask\n");
1169 goto fail2;
1170 }
1171 netif_dbg(efx, probe, efx->net_dev,
1172 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1173 rc = dma_set_coherent_mask(&pci_dev->dev, dma_mask);
1174 if (rc) {
1175 /* dma_set_coherent_mask() is not *allowed* to
1176 * fail with a mask that dma_set_mask() accepted,
1177 * but just in case...
1178 */
1179 netif_err(efx, probe, efx->net_dev,
1180 "failed to set consistent DMA mask\n");
1181 goto fail2;
1182 }
1183
1184 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1185 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1186 if (rc) {
1187 netif_err(efx, probe, efx->net_dev,
1188 "request for memory BAR failed\n");
1189 rc = -EIO;
1190 goto fail3;
1191 }
1192 efx->membase = ioremap_nocache(efx->membase_phys,
1193 efx->type->mem_map_size);
1194 if (!efx->membase) {
1195 netif_err(efx, probe, efx->net_dev,
1196 "could not map memory BAR at %llx+%x\n",
1197 (unsigned long long)efx->membase_phys,
1198 efx->type->mem_map_size);
1199 rc = -ENOMEM;
1200 goto fail4;
1201 }
1202 netif_dbg(efx, probe, efx->net_dev,
1203 "memory BAR at %llx+%x (virtual %p)\n",
1204 (unsigned long long)efx->membase_phys,
1205 efx->type->mem_map_size, efx->membase);
1206
1207 return 0;
1208
1209 fail4:
1210 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1211 fail3:
1212 efx->membase_phys = 0;
1213 fail2:
1214 pci_disable_device(efx->pci_dev);
1215 fail1:
1216 return rc;
1217 }
1218
1219 static void efx_fini_io(struct efx_nic *efx)
1220 {
1221 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1222
1223 if (efx->membase) {
1224 iounmap(efx->membase);
1225 efx->membase = NULL;
1226 }
1227
1228 if (efx->membase_phys) {
1229 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1230 efx->membase_phys = 0;
1231 }
1232
1233 pci_disable_device(efx->pci_dev);
1234 }
1235
1236 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1237 {
1238 cpumask_var_t thread_mask;
1239 unsigned int count;
1240 int cpu;
1241
1242 if (rss_cpus) {
1243 count = rss_cpus;
1244 } else {
1245 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1246 netif_warn(efx, probe, efx->net_dev,
1247 "RSS disabled due to allocation failure\n");
1248 return 1;
1249 }
1250
1251 count = 0;
1252 for_each_online_cpu(cpu) {
1253 if (!cpumask_test_cpu(cpu, thread_mask)) {
1254 ++count;
1255 cpumask_or(thread_mask, thread_mask,
1256 topology_thread_cpumask(cpu));
1257 }
1258 }
1259
1260 free_cpumask_var(thread_mask);
1261 }
1262
1263 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1264 * table entries that are inaccessible to VFs
1265 */
1266 if (efx_sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1267 count > efx_vf_size(efx)) {
1268 netif_warn(efx, probe, efx->net_dev,
1269 "Reducing number of RSS channels from %u to %u for "
1270 "VF support. Increase vf-msix-limit to use more "
1271 "channels on the PF.\n",
1272 count, efx_vf_size(efx));
1273 count = efx_vf_size(efx);
1274 }
1275
1276 return count;
1277 }
1278
1279 static int
1280 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1281 {
1282 #ifdef CONFIG_RFS_ACCEL
1283 unsigned int i;
1284 int rc;
1285
1286 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1287 if (!efx->net_dev->rx_cpu_rmap)
1288 return -ENOMEM;
1289 for (i = 0; i < efx->n_rx_channels; i++) {
1290 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1291 xentries[i].vector);
1292 if (rc) {
1293 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1294 efx->net_dev->rx_cpu_rmap = NULL;
1295 return rc;
1296 }
1297 }
1298 #endif
1299 return 0;
1300 }
1301
1302 /* Probe the number and type of interrupts we are able to obtain, and
1303 * the resulting numbers of channels and RX queues.
1304 */
1305 static int efx_probe_interrupts(struct efx_nic *efx)
1306 {
1307 unsigned int max_channels =
1308 min(efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1309 unsigned int extra_channels = 0;
1310 unsigned int i, j;
1311 int rc;
1312
1313 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1314 if (efx->extra_channel_type[i])
1315 ++extra_channels;
1316
1317 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1318 struct msix_entry xentries[EFX_MAX_CHANNELS];
1319 unsigned int n_channels;
1320
1321 n_channels = efx_wanted_parallelism(efx);
1322 if (separate_tx_channels)
1323 n_channels *= 2;
1324 n_channels += extra_channels;
1325 n_channels = min(n_channels, max_channels);
1326
1327 for (i = 0; i < n_channels; i++)
1328 xentries[i].entry = i;
1329 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1330 if (rc > 0) {
1331 netif_err(efx, drv, efx->net_dev,
1332 "WARNING: Insufficient MSI-X vectors"
1333 " available (%d < %u).\n", rc, n_channels);
1334 netif_err(efx, drv, efx->net_dev,
1335 "WARNING: Performance may be reduced.\n");
1336 EFX_BUG_ON_PARANOID(rc >= n_channels);
1337 n_channels = rc;
1338 rc = pci_enable_msix(efx->pci_dev, xentries,
1339 n_channels);
1340 }
1341
1342 if (rc == 0) {
1343 efx->n_channels = n_channels;
1344 if (n_channels > extra_channels)
1345 n_channels -= extra_channels;
1346 if (separate_tx_channels) {
1347 efx->n_tx_channels = max(n_channels / 2, 1U);
1348 efx->n_rx_channels = max(n_channels -
1349 efx->n_tx_channels,
1350 1U);
1351 } else {
1352 efx->n_tx_channels = n_channels;
1353 efx->n_rx_channels = n_channels;
1354 }
1355 rc = efx_init_rx_cpu_rmap(efx, xentries);
1356 if (rc) {
1357 pci_disable_msix(efx->pci_dev);
1358 return rc;
1359 }
1360 for (i = 0; i < efx->n_channels; i++)
1361 efx_get_channel(efx, i)->irq =
1362 xentries[i].vector;
1363 } else {
1364 /* Fall back to single channel MSI */
1365 efx->interrupt_mode = EFX_INT_MODE_MSI;
1366 netif_err(efx, drv, efx->net_dev,
1367 "could not enable MSI-X\n");
1368 }
1369 }
1370
1371 /* Try single interrupt MSI */
1372 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1373 efx->n_channels = 1;
1374 efx->n_rx_channels = 1;
1375 efx->n_tx_channels = 1;
1376 rc = pci_enable_msi(efx->pci_dev);
1377 if (rc == 0) {
1378 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1379 } else {
1380 netif_err(efx, drv, efx->net_dev,
1381 "could not enable MSI\n");
1382 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1383 }
1384 }
1385
1386 /* Assume legacy interrupts */
1387 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1388 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1389 efx->n_rx_channels = 1;
1390 efx->n_tx_channels = 1;
1391 efx->legacy_irq = efx->pci_dev->irq;
1392 }
1393
1394 /* Assign extra channels if possible */
1395 j = efx->n_channels;
1396 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1397 if (!efx->extra_channel_type[i])
1398 continue;
1399 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1400 efx->n_channels <= extra_channels) {
1401 efx->extra_channel_type[i]->handle_no_channel(efx);
1402 } else {
1403 --j;
1404 efx_get_channel(efx, j)->type =
1405 efx->extra_channel_type[i];
1406 }
1407 }
1408
1409 /* RSS might be usable on VFs even if it is disabled on the PF */
1410 efx->rss_spread = ((efx->n_rx_channels > 1 || !efx_sriov_wanted(efx)) ?
1411 efx->n_rx_channels : efx_vf_size(efx));
1412
1413 return 0;
1414 }
1415
1416 /* Enable interrupts, then probe and start the event queues */
1417 static void efx_start_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1418 {
1419 struct efx_channel *channel;
1420
1421 BUG_ON(efx->state == STATE_DISABLED);
1422
1423 if (efx->legacy_irq)
1424 efx->legacy_irq_enabled = true;
1425 efx_nic_enable_interrupts(efx);
1426
1427 efx_for_each_channel(channel, efx) {
1428 if (!channel->type->keep_eventq || !may_keep_eventq)
1429 efx_init_eventq(channel);
1430 efx_start_eventq(channel);
1431 }
1432
1433 efx_mcdi_mode_event(efx);
1434 }
1435
1436 static void efx_stop_interrupts(struct efx_nic *efx, bool may_keep_eventq)
1437 {
1438 struct efx_channel *channel;
1439
1440 if (efx->state == STATE_DISABLED)
1441 return;
1442
1443 efx_mcdi_mode_poll(efx);
1444
1445 efx_nic_disable_interrupts(efx);
1446 if (efx->legacy_irq) {
1447 synchronize_irq(efx->legacy_irq);
1448 efx->legacy_irq_enabled = false;
1449 }
1450
1451 efx_for_each_channel(channel, efx) {
1452 if (channel->irq)
1453 synchronize_irq(channel->irq);
1454
1455 efx_stop_eventq(channel);
1456 if (!channel->type->keep_eventq || !may_keep_eventq)
1457 efx_fini_eventq(channel);
1458 }
1459 }
1460
1461 static void efx_remove_interrupts(struct efx_nic *efx)
1462 {
1463 struct efx_channel *channel;
1464
1465 /* Remove MSI/MSI-X interrupts */
1466 efx_for_each_channel(channel, efx)
1467 channel->irq = 0;
1468 pci_disable_msi(efx->pci_dev);
1469 pci_disable_msix(efx->pci_dev);
1470
1471 /* Remove legacy interrupt */
1472 efx->legacy_irq = 0;
1473 }
1474
1475 static void efx_set_channels(struct efx_nic *efx)
1476 {
1477 struct efx_channel *channel;
1478 struct efx_tx_queue *tx_queue;
1479
1480 efx->tx_channel_offset =
1481 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1482
1483 /* We need to mark which channels really have RX and TX
1484 * queues, and adjust the TX queue numbers if we have separate
1485 * RX-only and TX-only channels.
1486 */
1487 efx_for_each_channel(channel, efx) {
1488 if (channel->channel < efx->n_rx_channels)
1489 channel->rx_queue.core_index = channel->channel;
1490 else
1491 channel->rx_queue.core_index = -1;
1492
1493 efx_for_each_channel_tx_queue(tx_queue, channel)
1494 tx_queue->queue -= (efx->tx_channel_offset *
1495 EFX_TXQ_TYPES);
1496 }
1497 }
1498
1499 static int efx_probe_nic(struct efx_nic *efx)
1500 {
1501 size_t i;
1502 int rc;
1503
1504 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1505
1506 /* Carry out hardware-type specific initialisation */
1507 rc = efx->type->probe(efx);
1508 if (rc)
1509 return rc;
1510
1511 /* Determine the number of channels and queues by trying to hook
1512 * in MSI-X interrupts. */
1513 rc = efx_probe_interrupts(efx);
1514 if (rc)
1515 goto fail;
1516
1517 efx->type->dimension_resources(efx);
1518
1519 if (efx->n_channels > 1)
1520 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1521 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1522 efx->rx_indir_table[i] =
1523 ethtool_rxfh_indir_default(i, efx->rss_spread);
1524
1525 efx_set_channels(efx);
1526 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1527 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1528
1529 /* Initialise the interrupt moderation settings */
1530 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1531 true);
1532
1533 return 0;
1534
1535 fail:
1536 efx->type->remove(efx);
1537 return rc;
1538 }
1539
1540 static void efx_remove_nic(struct efx_nic *efx)
1541 {
1542 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1543
1544 efx_remove_interrupts(efx);
1545 efx->type->remove(efx);
1546 }
1547
1548 /**************************************************************************
1549 *
1550 * NIC startup/shutdown
1551 *
1552 *************************************************************************/
1553
1554 static int efx_probe_all(struct efx_nic *efx)
1555 {
1556 int rc;
1557
1558 rc = efx_probe_nic(efx);
1559 if (rc) {
1560 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1561 goto fail1;
1562 }
1563
1564 rc = efx_probe_port(efx);
1565 if (rc) {
1566 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1567 goto fail2;
1568 }
1569
1570 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1571 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1572 rc = -EINVAL;
1573 goto fail3;
1574 }
1575 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1576
1577 rc = efx_probe_filters(efx);
1578 if (rc) {
1579 netif_err(efx, probe, efx->net_dev,
1580 "failed to create filter tables\n");
1581 goto fail3;
1582 }
1583
1584 rc = efx_probe_channels(efx);
1585 if (rc)
1586 goto fail4;
1587
1588 return 0;
1589
1590 fail4:
1591 efx_remove_filters(efx);
1592 fail3:
1593 efx_remove_port(efx);
1594 fail2:
1595 efx_remove_nic(efx);
1596 fail1:
1597 return rc;
1598 }
1599
1600 /* If the interface is supposed to be running but is not, start
1601 * the hardware and software data path, regular activity for the port
1602 * (MAC statistics, link polling, etc.) and schedule the port to be
1603 * reconfigured. Interrupts must already be enabled. This function
1604 * is safe to call multiple times, so long as the NIC is not disabled.
1605 * Requires the RTNL lock.
1606 */
1607 static void efx_start_all(struct efx_nic *efx)
1608 {
1609 EFX_ASSERT_RESET_SERIALISED(efx);
1610 BUG_ON(efx->state == STATE_DISABLED);
1611
1612 /* Check that it is appropriate to restart the interface. All
1613 * of these flags are safe to read under just the rtnl lock */
1614 if (efx->port_enabled || !netif_running(efx->net_dev))
1615 return;
1616
1617 efx_start_port(efx);
1618 efx_start_datapath(efx);
1619
1620 /* Start the hardware monitor if there is one */
1621 if (efx->type->monitor != NULL)
1622 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1623 efx_monitor_interval);
1624
1625 /* If link state detection is normally event-driven, we have
1626 * to poll now because we could have missed a change
1627 */
1628 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) {
1629 mutex_lock(&efx->mac_lock);
1630 if (efx->phy_op->poll(efx))
1631 efx_link_status_changed(efx);
1632 mutex_unlock(&efx->mac_lock);
1633 }
1634
1635 efx->type->start_stats(efx);
1636 }
1637
1638 /* Flush all delayed work. Should only be called when no more delayed work
1639 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1640 * since we're holding the rtnl_lock at this point. */
1641 static void efx_flush_all(struct efx_nic *efx)
1642 {
1643 /* Make sure the hardware monitor and event self-test are stopped */
1644 cancel_delayed_work_sync(&efx->monitor_work);
1645 efx_selftest_async_cancel(efx);
1646 /* Stop scheduled port reconfigurations */
1647 cancel_work_sync(&efx->mac_work);
1648 }
1649
1650 /* Quiesce the hardware and software data path, and regular activity
1651 * for the port without bringing the link down. Safe to call multiple
1652 * times with the NIC in almost any state, but interrupts should be
1653 * enabled. Requires the RTNL lock.
1654 */
1655 static void efx_stop_all(struct efx_nic *efx)
1656 {
1657 EFX_ASSERT_RESET_SERIALISED(efx);
1658
1659 /* port_enabled can be read safely under the rtnl lock */
1660 if (!efx->port_enabled)
1661 return;
1662
1663 efx->type->stop_stats(efx);
1664 efx_stop_port(efx);
1665
1666 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1667 efx_flush_all(efx);
1668
1669 /* Stop the kernel transmit interface. This is only valid if
1670 * the device is stopped or detached; otherwise the watchdog
1671 * may fire immediately.
1672 */
1673 WARN_ON(netif_running(efx->net_dev) &&
1674 netif_device_present(efx->net_dev));
1675 netif_tx_disable(efx->net_dev);
1676
1677 efx_stop_datapath(efx);
1678 }
1679
1680 static void efx_remove_all(struct efx_nic *efx)
1681 {
1682 efx_remove_channels(efx);
1683 efx_remove_filters(efx);
1684 efx_remove_port(efx);
1685 efx_remove_nic(efx);
1686 }
1687
1688 /**************************************************************************
1689 *
1690 * Interrupt moderation
1691 *
1692 **************************************************************************/
1693
1694 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
1695 {
1696 if (usecs == 0)
1697 return 0;
1698 if (usecs * 1000 < quantum_ns)
1699 return 1; /* never round down to 0 */
1700 return usecs * 1000 / quantum_ns;
1701 }
1702
1703 /* Set interrupt moderation parameters */
1704 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1705 unsigned int rx_usecs, bool rx_adaptive,
1706 bool rx_may_override_tx)
1707 {
1708 struct efx_channel *channel;
1709 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
1710 efx->timer_quantum_ns,
1711 1000);
1712 unsigned int tx_ticks;
1713 unsigned int rx_ticks;
1714
1715 EFX_ASSERT_RESET_SERIALISED(efx);
1716
1717 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
1718 return -EINVAL;
1719
1720 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
1721 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
1722
1723 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1724 !rx_may_override_tx) {
1725 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1726 "RX and TX IRQ moderation must be equal\n");
1727 return -EINVAL;
1728 }
1729
1730 efx->irq_rx_adaptive = rx_adaptive;
1731 efx->irq_rx_moderation = rx_ticks;
1732 efx_for_each_channel(channel, efx) {
1733 if (efx_channel_has_rx_queue(channel))
1734 channel->irq_moderation = rx_ticks;
1735 else if (efx_channel_has_tx_queues(channel))
1736 channel->irq_moderation = tx_ticks;
1737 }
1738
1739 return 0;
1740 }
1741
1742 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1743 unsigned int *rx_usecs, bool *rx_adaptive)
1744 {
1745 /* We must round up when converting ticks to microseconds
1746 * because we round down when converting the other way.
1747 */
1748
1749 *rx_adaptive = efx->irq_rx_adaptive;
1750 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
1751 efx->timer_quantum_ns,
1752 1000);
1753
1754 /* If channels are shared between RX and TX, so is IRQ
1755 * moderation. Otherwise, IRQ moderation is the same for all
1756 * TX channels and is not adaptive.
1757 */
1758 if (efx->tx_channel_offset == 0)
1759 *tx_usecs = *rx_usecs;
1760 else
1761 *tx_usecs = DIV_ROUND_UP(
1762 efx->channel[efx->tx_channel_offset]->irq_moderation *
1763 efx->timer_quantum_ns,
1764 1000);
1765 }
1766
1767 /**************************************************************************
1768 *
1769 * Hardware monitor
1770 *
1771 **************************************************************************/
1772
1773 /* Run periodically off the general workqueue */
1774 static void efx_monitor(struct work_struct *data)
1775 {
1776 struct efx_nic *efx = container_of(data, struct efx_nic,
1777 monitor_work.work);
1778
1779 netif_vdbg(efx, timer, efx->net_dev,
1780 "hardware monitor executing on CPU %d\n",
1781 raw_smp_processor_id());
1782 BUG_ON(efx->type->monitor == NULL);
1783
1784 /* If the mac_lock is already held then it is likely a port
1785 * reconfiguration is already in place, which will likely do
1786 * most of the work of monitor() anyway. */
1787 if (mutex_trylock(&efx->mac_lock)) {
1788 if (efx->port_enabled)
1789 efx->type->monitor(efx);
1790 mutex_unlock(&efx->mac_lock);
1791 }
1792
1793 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1794 efx_monitor_interval);
1795 }
1796
1797 /**************************************************************************
1798 *
1799 * ioctls
1800 *
1801 *************************************************************************/
1802
1803 /* Net device ioctl
1804 * Context: process, rtnl_lock() held.
1805 */
1806 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1807 {
1808 struct efx_nic *efx = netdev_priv(net_dev);
1809 struct mii_ioctl_data *data = if_mii(ifr);
1810
1811 if (cmd == SIOCSHWTSTAMP)
1812 return efx_ptp_ioctl(efx, ifr, cmd);
1813
1814 /* Convert phy_id from older PRTAD/DEVAD format */
1815 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1816 (data->phy_id & 0xfc00) == 0x0400)
1817 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1818
1819 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1820 }
1821
1822 /**************************************************************************
1823 *
1824 * NAPI interface
1825 *
1826 **************************************************************************/
1827
1828 static void efx_init_napi_channel(struct efx_channel *channel)
1829 {
1830 struct efx_nic *efx = channel->efx;
1831
1832 channel->napi_dev = efx->net_dev;
1833 netif_napi_add(channel->napi_dev, &channel->napi_str,
1834 efx_poll, napi_weight);
1835 }
1836
1837 static void efx_init_napi(struct efx_nic *efx)
1838 {
1839 struct efx_channel *channel;
1840
1841 efx_for_each_channel(channel, efx)
1842 efx_init_napi_channel(channel);
1843 }
1844
1845 static void efx_fini_napi_channel(struct efx_channel *channel)
1846 {
1847 if (channel->napi_dev)
1848 netif_napi_del(&channel->napi_str);
1849 channel->napi_dev = NULL;
1850 }
1851
1852 static void efx_fini_napi(struct efx_nic *efx)
1853 {
1854 struct efx_channel *channel;
1855
1856 efx_for_each_channel(channel, efx)
1857 efx_fini_napi_channel(channel);
1858 }
1859
1860 /**************************************************************************
1861 *
1862 * Kernel netpoll interface
1863 *
1864 *************************************************************************/
1865
1866 #ifdef CONFIG_NET_POLL_CONTROLLER
1867
1868 /* Although in the common case interrupts will be disabled, this is not
1869 * guaranteed. However, all our work happens inside the NAPI callback,
1870 * so no locking is required.
1871 */
1872 static void efx_netpoll(struct net_device *net_dev)
1873 {
1874 struct efx_nic *efx = netdev_priv(net_dev);
1875 struct efx_channel *channel;
1876
1877 efx_for_each_channel(channel, efx)
1878 efx_schedule_channel(channel);
1879 }
1880
1881 #endif
1882
1883 /**************************************************************************
1884 *
1885 * Kernel net device interface
1886 *
1887 *************************************************************************/
1888
1889 /* Context: process, rtnl_lock() held. */
1890 static int efx_net_open(struct net_device *net_dev)
1891 {
1892 struct efx_nic *efx = netdev_priv(net_dev);
1893 int rc;
1894
1895 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1896 raw_smp_processor_id());
1897
1898 rc = efx_check_disabled(efx);
1899 if (rc)
1900 return rc;
1901 if (efx->phy_mode & PHY_MODE_SPECIAL)
1902 return -EBUSY;
1903 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1904 return -EIO;
1905
1906 /* Notify the kernel of the link state polled during driver load,
1907 * before the monitor starts running */
1908 efx_link_status_changed(efx);
1909
1910 efx_start_all(efx);
1911 efx_selftest_async_start(efx);
1912 return 0;
1913 }
1914
1915 /* Context: process, rtnl_lock() held.
1916 * Note that the kernel will ignore our return code; this method
1917 * should really be a void.
1918 */
1919 static int efx_net_stop(struct net_device *net_dev)
1920 {
1921 struct efx_nic *efx = netdev_priv(net_dev);
1922
1923 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1924 raw_smp_processor_id());
1925
1926 /* Stop the device and flush all the channels */
1927 efx_stop_all(efx);
1928
1929 return 0;
1930 }
1931
1932 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1933 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev,
1934 struct rtnl_link_stats64 *stats)
1935 {
1936 struct efx_nic *efx = netdev_priv(net_dev);
1937 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1938
1939 spin_lock_bh(&efx->stats_lock);
1940
1941 efx->type->update_stats(efx);
1942
1943 stats->rx_packets = mac_stats->rx_packets;
1944 stats->tx_packets = mac_stats->tx_packets;
1945 stats->rx_bytes = mac_stats->rx_bytes;
1946 stats->tx_bytes = mac_stats->tx_bytes;
1947 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1948 stats->multicast = mac_stats->rx_multicast;
1949 stats->collisions = mac_stats->tx_collision;
1950 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1951 mac_stats->rx_length_error);
1952 stats->rx_crc_errors = mac_stats->rx_bad;
1953 stats->rx_frame_errors = mac_stats->rx_align_error;
1954 stats->rx_fifo_errors = mac_stats->rx_overflow;
1955 stats->rx_missed_errors = mac_stats->rx_missed;
1956 stats->tx_window_errors = mac_stats->tx_late_collision;
1957
1958 stats->rx_errors = (stats->rx_length_errors +
1959 stats->rx_crc_errors +
1960 stats->rx_frame_errors +
1961 mac_stats->rx_symbol_error);
1962 stats->tx_errors = (stats->tx_window_errors +
1963 mac_stats->tx_bad);
1964
1965 spin_unlock_bh(&efx->stats_lock);
1966
1967 return stats;
1968 }
1969
1970 /* Context: netif_tx_lock held, BHs disabled. */
1971 static void efx_watchdog(struct net_device *net_dev)
1972 {
1973 struct efx_nic *efx = netdev_priv(net_dev);
1974
1975 netif_err(efx, tx_err, efx->net_dev,
1976 "TX stuck with port_enabled=%d: resetting channels\n",
1977 efx->port_enabled);
1978
1979 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1980 }
1981
1982
1983 /* Context: process, rtnl_lock() held. */
1984 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1985 {
1986 struct efx_nic *efx = netdev_priv(net_dev);
1987 int rc;
1988
1989 rc = efx_check_disabled(efx);
1990 if (rc)
1991 return rc;
1992 if (new_mtu > EFX_MAX_MTU)
1993 return -EINVAL;
1994
1995 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1996
1997 efx_device_detach_sync(efx);
1998 efx_stop_all(efx);
1999
2000 mutex_lock(&efx->mac_lock);
2001 net_dev->mtu = new_mtu;
2002 efx->type->reconfigure_mac(efx);
2003 mutex_unlock(&efx->mac_lock);
2004
2005 efx_start_all(efx);
2006 netif_device_attach(efx->net_dev);
2007 return 0;
2008 }
2009
2010 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2011 {
2012 struct efx_nic *efx = netdev_priv(net_dev);
2013 struct sockaddr *addr = data;
2014 char *new_addr = addr->sa_data;
2015
2016 if (!is_valid_ether_addr(new_addr)) {
2017 netif_err(efx, drv, efx->net_dev,
2018 "invalid ethernet MAC address requested: %pM\n",
2019 new_addr);
2020 return -EADDRNOTAVAIL;
2021 }
2022
2023 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
2024 efx_sriov_mac_address_changed(efx);
2025
2026 /* Reconfigure the MAC */
2027 mutex_lock(&efx->mac_lock);
2028 efx->type->reconfigure_mac(efx);
2029 mutex_unlock(&efx->mac_lock);
2030
2031 return 0;
2032 }
2033
2034 /* Context: netif_addr_lock held, BHs disabled. */
2035 static void efx_set_rx_mode(struct net_device *net_dev)
2036 {
2037 struct efx_nic *efx = netdev_priv(net_dev);
2038 struct netdev_hw_addr *ha;
2039 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
2040 u32 crc;
2041 int bit;
2042
2043 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
2044
2045 /* Build multicast hash table */
2046 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
2047 memset(mc_hash, 0xff, sizeof(*mc_hash));
2048 } else {
2049 memset(mc_hash, 0x00, sizeof(*mc_hash));
2050 netdev_for_each_mc_addr(ha, net_dev) {
2051 crc = ether_crc_le(ETH_ALEN, ha->addr);
2052 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
2053 __set_bit_le(bit, mc_hash);
2054 }
2055
2056 /* Broadcast packets go through the multicast hash filter.
2057 * ether_crc_le() of the broadcast address is 0xbe2612ff
2058 * so we always add bit 0xff to the mask.
2059 */
2060 __set_bit_le(0xff, mc_hash);
2061 }
2062
2063 if (efx->port_enabled)
2064 queue_work(efx->workqueue, &efx->mac_work);
2065 /* Otherwise efx_start_port() will do this */
2066 }
2067
2068 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2069 {
2070 struct efx_nic *efx = netdev_priv(net_dev);
2071
2072 /* If disabling RX n-tuple filtering, clear existing filters */
2073 if (net_dev->features & ~data & NETIF_F_NTUPLE)
2074 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2075
2076 return 0;
2077 }
2078
2079 static const struct net_device_ops efx_netdev_ops = {
2080 .ndo_open = efx_net_open,
2081 .ndo_stop = efx_net_stop,
2082 .ndo_get_stats64 = efx_net_stats,
2083 .ndo_tx_timeout = efx_watchdog,
2084 .ndo_start_xmit = efx_hard_start_xmit,
2085 .ndo_validate_addr = eth_validate_addr,
2086 .ndo_do_ioctl = efx_ioctl,
2087 .ndo_change_mtu = efx_change_mtu,
2088 .ndo_set_mac_address = efx_set_mac_address,
2089 .ndo_set_rx_mode = efx_set_rx_mode,
2090 .ndo_set_features = efx_set_features,
2091 #ifdef CONFIG_SFC_SRIOV
2092 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2093 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2094 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2095 .ndo_get_vf_config = efx_sriov_get_vf_config,
2096 #endif
2097 #ifdef CONFIG_NET_POLL_CONTROLLER
2098 .ndo_poll_controller = efx_netpoll,
2099 #endif
2100 .ndo_setup_tc = efx_setup_tc,
2101 #ifdef CONFIG_RFS_ACCEL
2102 .ndo_rx_flow_steer = efx_filter_rfs,
2103 #endif
2104 };
2105
2106 static void efx_update_name(struct efx_nic *efx)
2107 {
2108 strcpy(efx->name, efx->net_dev->name);
2109 efx_mtd_rename(efx);
2110 efx_set_channel_names(efx);
2111 }
2112
2113 static int efx_netdev_event(struct notifier_block *this,
2114 unsigned long event, void *ptr)
2115 {
2116 struct net_device *net_dev = ptr;
2117
2118 if (net_dev->netdev_ops == &efx_netdev_ops &&
2119 event == NETDEV_CHANGENAME)
2120 efx_update_name(netdev_priv(net_dev));
2121
2122 return NOTIFY_DONE;
2123 }
2124
2125 static struct notifier_block efx_netdev_notifier = {
2126 .notifier_call = efx_netdev_event,
2127 };
2128
2129 static ssize_t
2130 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2131 {
2132 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2133 return sprintf(buf, "%d\n", efx->phy_type);
2134 }
2135 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
2136
2137 static int efx_register_netdev(struct efx_nic *efx)
2138 {
2139 struct net_device *net_dev = efx->net_dev;
2140 struct efx_channel *channel;
2141 int rc;
2142
2143 net_dev->watchdog_timeo = 5 * HZ;
2144 net_dev->irq = efx->pci_dev->irq;
2145 net_dev->netdev_ops = &efx_netdev_ops;
2146 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
2147 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2148
2149 rtnl_lock();
2150
2151 /* Enable resets to be scheduled and check whether any were
2152 * already requested. If so, the NIC is probably hosed so we
2153 * abort.
2154 */
2155 efx->state = STATE_READY;
2156 smp_mb(); /* ensure we change state before checking reset_pending */
2157 if (efx->reset_pending) {
2158 netif_err(efx, probe, efx->net_dev,
2159 "aborting probe due to scheduled reset\n");
2160 rc = -EIO;
2161 goto fail_locked;
2162 }
2163
2164 rc = dev_alloc_name(net_dev, net_dev->name);
2165 if (rc < 0)
2166 goto fail_locked;
2167 efx_update_name(efx);
2168
2169 /* Always start with carrier off; PHY events will detect the link */
2170 netif_carrier_off(net_dev);
2171
2172 rc = register_netdevice(net_dev);
2173 if (rc)
2174 goto fail_locked;
2175
2176 efx_for_each_channel(channel, efx) {
2177 struct efx_tx_queue *tx_queue;
2178 efx_for_each_channel_tx_queue(tx_queue, channel)
2179 efx_init_tx_queue_core_txq(tx_queue);
2180 }
2181
2182 rtnl_unlock();
2183
2184 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2185 if (rc) {
2186 netif_err(efx, drv, efx->net_dev,
2187 "failed to init net dev attributes\n");
2188 goto fail_registered;
2189 }
2190
2191 return 0;
2192
2193 fail_registered:
2194 rtnl_lock();
2195 unregister_netdevice(net_dev);
2196 fail_locked:
2197 efx->state = STATE_UNINIT;
2198 rtnl_unlock();
2199 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2200 return rc;
2201 }
2202
2203 static void efx_unregister_netdev(struct efx_nic *efx)
2204 {
2205 struct efx_channel *channel;
2206 struct efx_tx_queue *tx_queue;
2207
2208 if (!efx->net_dev)
2209 return;
2210
2211 BUG_ON(netdev_priv(efx->net_dev) != efx);
2212
2213 /* Free up any skbs still remaining. This has to happen before
2214 * we try to unregister the netdev as running their destructors
2215 * may be needed to get the device ref. count to 0. */
2216 efx_for_each_channel(channel, efx) {
2217 efx_for_each_channel_tx_queue(tx_queue, channel)
2218 efx_release_tx_buffers(tx_queue);
2219 }
2220
2221 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2222 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2223
2224 rtnl_lock();
2225 unregister_netdevice(efx->net_dev);
2226 efx->state = STATE_UNINIT;
2227 rtnl_unlock();
2228 }
2229
2230 /**************************************************************************
2231 *
2232 * Device reset and suspend
2233 *
2234 **************************************************************************/
2235
2236 /* Tears down the entire software state and most of the hardware state
2237 * before reset. */
2238 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2239 {
2240 EFX_ASSERT_RESET_SERIALISED(efx);
2241
2242 efx_stop_all(efx);
2243 efx_stop_interrupts(efx, false);
2244
2245 mutex_lock(&efx->mac_lock);
2246 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2247 efx->phy_op->fini(efx);
2248 efx->type->fini(efx);
2249 }
2250
2251 /* This function will always ensure that the locks acquired in
2252 * efx_reset_down() are released. A failure return code indicates
2253 * that we were unable to reinitialise the hardware, and the
2254 * driver should be disabled. If ok is false, then the rx and tx
2255 * engines are not restarted, pending a RESET_DISABLE. */
2256 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2257 {
2258 int rc;
2259
2260 EFX_ASSERT_RESET_SERIALISED(efx);
2261
2262 rc = efx->type->init(efx);
2263 if (rc) {
2264 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2265 goto fail;
2266 }
2267
2268 if (!ok)
2269 goto fail;
2270
2271 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2272 rc = efx->phy_op->init(efx);
2273 if (rc)
2274 goto fail;
2275 if (efx->phy_op->reconfigure(efx))
2276 netif_err(efx, drv, efx->net_dev,
2277 "could not restore PHY settings\n");
2278 }
2279
2280 efx->type->reconfigure_mac(efx);
2281
2282 efx_start_interrupts(efx, false);
2283 efx_restore_filters(efx);
2284 efx_sriov_reset(efx);
2285
2286 mutex_unlock(&efx->mac_lock);
2287
2288 efx_start_all(efx);
2289
2290 return 0;
2291
2292 fail:
2293 efx->port_initialized = false;
2294
2295 mutex_unlock(&efx->mac_lock);
2296
2297 return rc;
2298 }
2299
2300 /* Reset the NIC using the specified method. Note that the reset may
2301 * fail, in which case the card will be left in an unusable state.
2302 *
2303 * Caller must hold the rtnl_lock.
2304 */
2305 int efx_reset(struct efx_nic *efx, enum reset_type method)
2306 {
2307 int rc, rc2;
2308 bool disabled;
2309
2310 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2311 RESET_TYPE(method));
2312
2313 efx_device_detach_sync(efx);
2314 efx_reset_down(efx, method);
2315
2316 rc = efx->type->reset(efx, method);
2317 if (rc) {
2318 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2319 goto out;
2320 }
2321
2322 /* Clear flags for the scopes we covered. We assume the NIC and
2323 * driver are now quiescent so that there is no race here.
2324 */
2325 efx->reset_pending &= -(1 << (method + 1));
2326
2327 /* Reinitialise bus-mastering, which may have been turned off before
2328 * the reset was scheduled. This is still appropriate, even in the
2329 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2330 * can respond to requests. */
2331 pci_set_master(efx->pci_dev);
2332
2333 out:
2334 /* Leave device stopped if necessary */
2335 disabled = rc ||
2336 method == RESET_TYPE_DISABLE ||
2337 method == RESET_TYPE_RECOVER_OR_DISABLE;
2338 rc2 = efx_reset_up(efx, method, !disabled);
2339 if (rc2) {
2340 disabled = true;
2341 if (!rc)
2342 rc = rc2;
2343 }
2344
2345 if (disabled) {
2346 dev_close(efx->net_dev);
2347 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2348 efx->state = STATE_DISABLED;
2349 } else {
2350 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2351 netif_device_attach(efx->net_dev);
2352 }
2353 return rc;
2354 }
2355
2356 /* Try recovery mechanisms.
2357 * For now only EEH is supported.
2358 * Returns 0 if the recovery mechanisms are unsuccessful.
2359 * Returns a non-zero value otherwise.
2360 */
2361 static int efx_try_recovery(struct efx_nic *efx)
2362 {
2363 #ifdef CONFIG_EEH
2364 /* A PCI error can occur and not be seen by EEH because nothing
2365 * happens on the PCI bus. In this case the driver may fail and
2366 * schedule a 'recover or reset', leading to this recovery handler.
2367 * Manually call the eeh failure check function.
2368 */
2369 struct eeh_dev *eehdev =
2370 of_node_to_eeh_dev(pci_device_to_OF_node(efx->pci_dev));
2371
2372 if (eeh_dev_check_failure(eehdev)) {
2373 /* The EEH mechanisms will handle the error and reset the
2374 * device if necessary.
2375 */
2376 return 1;
2377 }
2378 #endif
2379 return 0;
2380 }
2381
2382 /* The worker thread exists so that code that cannot sleep can
2383 * schedule a reset for later.
2384 */
2385 static void efx_reset_work(struct work_struct *data)
2386 {
2387 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2388 unsigned long pending;
2389 enum reset_type method;
2390
2391 pending = ACCESS_ONCE(efx->reset_pending);
2392 method = fls(pending) - 1;
2393
2394 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2395 method == RESET_TYPE_RECOVER_OR_ALL) &&
2396 efx_try_recovery(efx))
2397 return;
2398
2399 if (!pending)
2400 return;
2401
2402 rtnl_lock();
2403
2404 /* We checked the state in efx_schedule_reset() but it may
2405 * have changed by now. Now that we have the RTNL lock,
2406 * it cannot change again.
2407 */
2408 if (efx->state == STATE_READY)
2409 (void)efx_reset(efx, method);
2410
2411 rtnl_unlock();
2412 }
2413
2414 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2415 {
2416 enum reset_type method;
2417
2418 if (efx->state == STATE_RECOVERY) {
2419 netif_dbg(efx, drv, efx->net_dev,
2420 "recovering: skip scheduling %s reset\n",
2421 RESET_TYPE(type));
2422 return;
2423 }
2424
2425 switch (type) {
2426 case RESET_TYPE_INVISIBLE:
2427 case RESET_TYPE_ALL:
2428 case RESET_TYPE_RECOVER_OR_ALL:
2429 case RESET_TYPE_WORLD:
2430 case RESET_TYPE_DISABLE:
2431 case RESET_TYPE_RECOVER_OR_DISABLE:
2432 method = type;
2433 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2434 RESET_TYPE(method));
2435 break;
2436 default:
2437 method = efx->type->map_reset_reason(type);
2438 netif_dbg(efx, drv, efx->net_dev,
2439 "scheduling %s reset for %s\n",
2440 RESET_TYPE(method), RESET_TYPE(type));
2441 break;
2442 }
2443
2444 set_bit(method, &efx->reset_pending);
2445 smp_mb(); /* ensure we change reset_pending before checking state */
2446
2447 /* If we're not READY then just leave the flags set as the cue
2448 * to abort probing or reschedule the reset later.
2449 */
2450 if (ACCESS_ONCE(efx->state) != STATE_READY)
2451 return;
2452
2453 /* efx_process_channel() will no longer read events once a
2454 * reset is scheduled. So switch back to poll'd MCDI completions. */
2455 efx_mcdi_mode_poll(efx);
2456
2457 queue_work(reset_workqueue, &efx->reset_work);
2458 }
2459
2460 /**************************************************************************
2461 *
2462 * List of NICs we support
2463 *
2464 **************************************************************************/
2465
2466 /* PCI device ID table */
2467 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2468 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2469 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2470 .driver_data = (unsigned long) &falcon_a1_nic_type},
2471 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2472 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2473 .driver_data = (unsigned long) &falcon_b0_nic_type},
2474 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2475 .driver_data = (unsigned long) &siena_a0_nic_type},
2476 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2477 .driver_data = (unsigned long) &siena_a0_nic_type},
2478 {0} /* end of list */
2479 };
2480
2481 /**************************************************************************
2482 *
2483 * Dummy PHY/MAC operations
2484 *
2485 * Can be used for some unimplemented operations
2486 * Needed so all function pointers are valid and do not have to be tested
2487 * before use
2488 *
2489 **************************************************************************/
2490 int efx_port_dummy_op_int(struct efx_nic *efx)
2491 {
2492 return 0;
2493 }
2494 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2495
2496 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2497 {
2498 return false;
2499 }
2500
2501 static const struct efx_phy_operations efx_dummy_phy_operations = {
2502 .init = efx_port_dummy_op_int,
2503 .reconfigure = efx_port_dummy_op_int,
2504 .poll = efx_port_dummy_op_poll,
2505 .fini = efx_port_dummy_op_void,
2506 };
2507
2508 /**************************************************************************
2509 *
2510 * Data housekeeping
2511 *
2512 **************************************************************************/
2513
2514 /* This zeroes out and then fills in the invariants in a struct
2515 * efx_nic (including all sub-structures).
2516 */
2517 static int efx_init_struct(struct efx_nic *efx,
2518 struct pci_dev *pci_dev, struct net_device *net_dev)
2519 {
2520 int i;
2521
2522 /* Initialise common structures */
2523 spin_lock_init(&efx->biu_lock);
2524 #ifdef CONFIG_SFC_MTD
2525 INIT_LIST_HEAD(&efx->mtd_list);
2526 #endif
2527 INIT_WORK(&efx->reset_work, efx_reset_work);
2528 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2529 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
2530 efx->pci_dev = pci_dev;
2531 efx->msg_enable = debug;
2532 efx->state = STATE_UNINIT;
2533 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2534
2535 efx->net_dev = net_dev;
2536 spin_lock_init(&efx->stats_lock);
2537 mutex_init(&efx->mac_lock);
2538 efx->phy_op = &efx_dummy_phy_operations;
2539 efx->mdio.dev = net_dev;
2540 INIT_WORK(&efx->mac_work, efx_mac_work);
2541 init_waitqueue_head(&efx->flush_wq);
2542
2543 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2544 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2545 if (!efx->channel[i])
2546 goto fail;
2547 }
2548
2549 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2550
2551 /* Higher numbered interrupt modes are less capable! */
2552 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2553 interrupt_mode);
2554
2555 /* Would be good to use the net_dev name, but we're too early */
2556 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2557 pci_name(pci_dev));
2558 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2559 if (!efx->workqueue)
2560 goto fail;
2561
2562 return 0;
2563
2564 fail:
2565 efx_fini_struct(efx);
2566 return -ENOMEM;
2567 }
2568
2569 static void efx_fini_struct(struct efx_nic *efx)
2570 {
2571 int i;
2572
2573 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2574 kfree(efx->channel[i]);
2575
2576 if (efx->workqueue) {
2577 destroy_workqueue(efx->workqueue);
2578 efx->workqueue = NULL;
2579 }
2580 }
2581
2582 /**************************************************************************
2583 *
2584 * PCI interface
2585 *
2586 **************************************************************************/
2587
2588 /* Main body of final NIC shutdown code
2589 * This is called only at module unload (or hotplug removal).
2590 */
2591 static void efx_pci_remove_main(struct efx_nic *efx)
2592 {
2593 /* Flush reset_work. It can no longer be scheduled since we
2594 * are not READY.
2595 */
2596 BUG_ON(efx->state == STATE_READY);
2597 cancel_work_sync(&efx->reset_work);
2598
2599 #ifdef CONFIG_RFS_ACCEL
2600 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2601 efx->net_dev->rx_cpu_rmap = NULL;
2602 #endif
2603 efx_stop_interrupts(efx, false);
2604 efx_nic_fini_interrupt(efx);
2605 efx_fini_port(efx);
2606 efx->type->fini(efx);
2607 efx_fini_napi(efx);
2608 efx_remove_all(efx);
2609 }
2610
2611 /* Final NIC shutdown
2612 * This is called only at module unload (or hotplug removal).
2613 */
2614 static void efx_pci_remove(struct pci_dev *pci_dev)
2615 {
2616 struct efx_nic *efx;
2617
2618 efx = pci_get_drvdata(pci_dev);
2619 if (!efx)
2620 return;
2621
2622 /* Mark the NIC as fini, then stop the interface */
2623 rtnl_lock();
2624 dev_close(efx->net_dev);
2625 efx_stop_interrupts(efx, false);
2626 rtnl_unlock();
2627
2628 efx_sriov_fini(efx);
2629 efx_unregister_netdev(efx);
2630
2631 efx_mtd_remove(efx);
2632
2633 efx_pci_remove_main(efx);
2634
2635 efx_fini_io(efx);
2636 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2637
2638 efx_fini_struct(efx);
2639 pci_set_drvdata(pci_dev, NULL);
2640 free_netdev(efx->net_dev);
2641
2642 pci_disable_pcie_error_reporting(pci_dev);
2643 };
2644
2645 /* NIC VPD information
2646 * Called during probe to display the part number of the
2647 * installed NIC. VPD is potentially very large but this should
2648 * always appear within the first 512 bytes.
2649 */
2650 #define SFC_VPD_LEN 512
2651 static void efx_print_product_vpd(struct efx_nic *efx)
2652 {
2653 struct pci_dev *dev = efx->pci_dev;
2654 char vpd_data[SFC_VPD_LEN];
2655 ssize_t vpd_size;
2656 int i, j;
2657
2658 /* Get the vpd data from the device */
2659 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
2660 if (vpd_size <= 0) {
2661 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
2662 return;
2663 }
2664
2665 /* Get the Read only section */
2666 i = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
2667 if (i < 0) {
2668 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
2669 return;
2670 }
2671
2672 j = pci_vpd_lrdt_size(&vpd_data[i]);
2673 i += PCI_VPD_LRDT_TAG_SIZE;
2674 if (i + j > vpd_size)
2675 j = vpd_size - i;
2676
2677 /* Get the Part number */
2678 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
2679 if (i < 0) {
2680 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
2681 return;
2682 }
2683
2684 j = pci_vpd_info_field_size(&vpd_data[i]);
2685 i += PCI_VPD_INFO_FLD_HDR_SIZE;
2686 if (i + j > vpd_size) {
2687 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
2688 return;
2689 }
2690
2691 netif_info(efx, drv, efx->net_dev,
2692 "Part Number : %.*s\n", j, &vpd_data[i]);
2693 }
2694
2695
2696 /* Main body of NIC initialisation
2697 * This is called at module load (or hotplug insertion, theoretically).
2698 */
2699 static int efx_pci_probe_main(struct efx_nic *efx)
2700 {
2701 int rc;
2702
2703 /* Do start-of-day initialisation */
2704 rc = efx_probe_all(efx);
2705 if (rc)
2706 goto fail1;
2707
2708 efx_init_napi(efx);
2709
2710 rc = efx->type->init(efx);
2711 if (rc) {
2712 netif_err(efx, probe, efx->net_dev,
2713 "failed to initialise NIC\n");
2714 goto fail3;
2715 }
2716
2717 rc = efx_init_port(efx);
2718 if (rc) {
2719 netif_err(efx, probe, efx->net_dev,
2720 "failed to initialise port\n");
2721 goto fail4;
2722 }
2723
2724 rc = efx_nic_init_interrupt(efx);
2725 if (rc)
2726 goto fail5;
2727 efx_start_interrupts(efx, false);
2728
2729 return 0;
2730
2731 fail5:
2732 efx_fini_port(efx);
2733 fail4:
2734 efx->type->fini(efx);
2735 fail3:
2736 efx_fini_napi(efx);
2737 efx_remove_all(efx);
2738 fail1:
2739 return rc;
2740 }
2741
2742 /* NIC initialisation
2743 *
2744 * This is called at module load (or hotplug insertion,
2745 * theoretically). It sets up PCI mappings, resets the NIC,
2746 * sets up and registers the network devices with the kernel and hooks
2747 * the interrupt service routine. It does not prepare the device for
2748 * transmission; this is left to the first time one of the network
2749 * interfaces is brought up (i.e. efx_net_open).
2750 */
2751 static int efx_pci_probe(struct pci_dev *pci_dev,
2752 const struct pci_device_id *entry)
2753 {
2754 struct net_device *net_dev;
2755 struct efx_nic *efx;
2756 int rc;
2757
2758 /* Allocate and initialise a struct net_device and struct efx_nic */
2759 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2760 EFX_MAX_RX_QUEUES);
2761 if (!net_dev)
2762 return -ENOMEM;
2763 efx = netdev_priv(net_dev);
2764 efx->type = (const struct efx_nic_type *) entry->driver_data;
2765 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
2766 NETIF_F_HIGHDMA | NETIF_F_TSO |
2767 NETIF_F_RXCSUM);
2768 if (efx->type->offload_features & NETIF_F_V6_CSUM)
2769 net_dev->features |= NETIF_F_TSO6;
2770 /* Mask for features that also apply to VLAN devices */
2771 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2772 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2773 NETIF_F_RXCSUM);
2774 /* All offloads can be toggled */
2775 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2776 pci_set_drvdata(pci_dev, efx);
2777 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2778 rc = efx_init_struct(efx, pci_dev, net_dev);
2779 if (rc)
2780 goto fail1;
2781
2782 netif_info(efx, probe, efx->net_dev,
2783 "Solarflare NIC detected\n");
2784
2785 efx_print_product_vpd(efx);
2786
2787 /* Set up basic I/O (BAR mappings etc) */
2788 rc = efx_init_io(efx);
2789 if (rc)
2790 goto fail2;
2791
2792 rc = efx_pci_probe_main(efx);
2793 if (rc)
2794 goto fail3;
2795
2796 rc = efx_register_netdev(efx);
2797 if (rc)
2798 goto fail4;
2799
2800 rc = efx_sriov_init(efx);
2801 if (rc)
2802 netif_err(efx, probe, efx->net_dev,
2803 "SR-IOV can't be enabled rc %d\n", rc);
2804
2805 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2806
2807 /* Try to create MTDs, but allow this to fail */
2808 rtnl_lock();
2809 rc = efx_mtd_probe(efx);
2810 rtnl_unlock();
2811 if (rc)
2812 netif_warn(efx, probe, efx->net_dev,
2813 "failed to create MTDs (%d)\n", rc);
2814
2815 rc = pci_enable_pcie_error_reporting(pci_dev);
2816 if (rc && rc != -EINVAL)
2817 netif_warn(efx, probe, efx->net_dev,
2818 "pci_enable_pcie_error_reporting failed (%d)\n", rc);
2819
2820 return 0;
2821
2822 fail4:
2823 efx_pci_remove_main(efx);
2824 fail3:
2825 efx_fini_io(efx);
2826 fail2:
2827 efx_fini_struct(efx);
2828 fail1:
2829 pci_set_drvdata(pci_dev, NULL);
2830 WARN_ON(rc > 0);
2831 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2832 free_netdev(net_dev);
2833 return rc;
2834 }
2835
2836 static int efx_pm_freeze(struct device *dev)
2837 {
2838 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2839
2840 rtnl_lock();
2841
2842 if (efx->state != STATE_DISABLED) {
2843 efx->state = STATE_UNINIT;
2844
2845 efx_device_detach_sync(efx);
2846
2847 efx_stop_all(efx);
2848 efx_stop_interrupts(efx, false);
2849 }
2850
2851 rtnl_unlock();
2852
2853 return 0;
2854 }
2855
2856 static int efx_pm_thaw(struct device *dev)
2857 {
2858 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2859
2860 rtnl_lock();
2861
2862 if (efx->state != STATE_DISABLED) {
2863 efx_start_interrupts(efx, false);
2864
2865 mutex_lock(&efx->mac_lock);
2866 efx->phy_op->reconfigure(efx);
2867 mutex_unlock(&efx->mac_lock);
2868
2869 efx_start_all(efx);
2870
2871 netif_device_attach(efx->net_dev);
2872
2873 efx->state = STATE_READY;
2874
2875 efx->type->resume_wol(efx);
2876 }
2877
2878 rtnl_unlock();
2879
2880 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2881 queue_work(reset_workqueue, &efx->reset_work);
2882
2883 return 0;
2884 }
2885
2886 static int efx_pm_poweroff(struct device *dev)
2887 {
2888 struct pci_dev *pci_dev = to_pci_dev(dev);
2889 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2890
2891 efx->type->fini(efx);
2892
2893 efx->reset_pending = 0;
2894
2895 pci_save_state(pci_dev);
2896 return pci_set_power_state(pci_dev, PCI_D3hot);
2897 }
2898
2899 /* Used for both resume and restore */
2900 static int efx_pm_resume(struct device *dev)
2901 {
2902 struct pci_dev *pci_dev = to_pci_dev(dev);
2903 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2904 int rc;
2905
2906 rc = pci_set_power_state(pci_dev, PCI_D0);
2907 if (rc)
2908 return rc;
2909 pci_restore_state(pci_dev);
2910 rc = pci_enable_device(pci_dev);
2911 if (rc)
2912 return rc;
2913 pci_set_master(efx->pci_dev);
2914 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2915 if (rc)
2916 return rc;
2917 rc = efx->type->init(efx);
2918 if (rc)
2919 return rc;
2920 efx_pm_thaw(dev);
2921 return 0;
2922 }
2923
2924 static int efx_pm_suspend(struct device *dev)
2925 {
2926 int rc;
2927
2928 efx_pm_freeze(dev);
2929 rc = efx_pm_poweroff(dev);
2930 if (rc)
2931 efx_pm_resume(dev);
2932 return rc;
2933 }
2934
2935 static const struct dev_pm_ops efx_pm_ops = {
2936 .suspend = efx_pm_suspend,
2937 .resume = efx_pm_resume,
2938 .freeze = efx_pm_freeze,
2939 .thaw = efx_pm_thaw,
2940 .poweroff = efx_pm_poweroff,
2941 .restore = efx_pm_resume,
2942 };
2943
2944 /* A PCI error affecting this device was detected.
2945 * At this point MMIO and DMA may be disabled.
2946 * Stop the software path and request a slot reset.
2947 */
2948 pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
2949 enum pci_channel_state state)
2950 {
2951 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2952 struct efx_nic *efx = pci_get_drvdata(pdev);
2953
2954 if (state == pci_channel_io_perm_failure)
2955 return PCI_ERS_RESULT_DISCONNECT;
2956
2957 rtnl_lock();
2958
2959 if (efx->state != STATE_DISABLED) {
2960 efx->state = STATE_RECOVERY;
2961 efx->reset_pending = 0;
2962
2963 efx_device_detach_sync(efx);
2964
2965 efx_stop_all(efx);
2966 efx_stop_interrupts(efx, false);
2967
2968 status = PCI_ERS_RESULT_NEED_RESET;
2969 } else {
2970 /* If the interface is disabled we don't want to do anything
2971 * with it.
2972 */
2973 status = PCI_ERS_RESULT_RECOVERED;
2974 }
2975
2976 rtnl_unlock();
2977
2978 pci_disable_device(pdev);
2979
2980 return status;
2981 }
2982
2983 /* Fake a successfull reset, which will be performed later in efx_io_resume. */
2984 pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
2985 {
2986 struct efx_nic *efx = pci_get_drvdata(pdev);
2987 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
2988 int rc;
2989
2990 if (pci_enable_device(pdev)) {
2991 netif_err(efx, hw, efx->net_dev,
2992 "Cannot re-enable PCI device after reset.\n");
2993 status = PCI_ERS_RESULT_DISCONNECT;
2994 }
2995
2996 rc = pci_cleanup_aer_uncorrect_error_status(pdev);
2997 if (rc) {
2998 netif_err(efx, hw, efx->net_dev,
2999 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc);
3000 /* Non-fatal error. Continue. */
3001 }
3002
3003 return status;
3004 }
3005
3006 /* Perform the actual reset and resume I/O operations. */
3007 static void efx_io_resume(struct pci_dev *pdev)
3008 {
3009 struct efx_nic *efx = pci_get_drvdata(pdev);
3010 int rc;
3011
3012 rtnl_lock();
3013
3014 if (efx->state == STATE_DISABLED)
3015 goto out;
3016
3017 rc = efx_reset(efx, RESET_TYPE_ALL);
3018 if (rc) {
3019 netif_err(efx, hw, efx->net_dev,
3020 "efx_reset failed after PCI error (%d)\n", rc);
3021 } else {
3022 efx->state = STATE_READY;
3023 netif_dbg(efx, hw, efx->net_dev,
3024 "Done resetting and resuming IO after PCI error.\n");
3025 }
3026
3027 out:
3028 rtnl_unlock();
3029 }
3030
3031 /* For simplicity and reliability, we always require a slot reset and try to
3032 * reset the hardware when a pci error affecting the device is detected.
3033 * We leave both the link_reset and mmio_enabled callback unimplemented:
3034 * with our request for slot reset the mmio_enabled callback will never be
3035 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3036 */
3037 static struct pci_error_handlers efx_err_handlers = {
3038 .error_detected = efx_io_error_detected,
3039 .slot_reset = efx_io_slot_reset,
3040 .resume = efx_io_resume,
3041 };
3042
3043 static struct pci_driver efx_pci_driver = {
3044 .name = KBUILD_MODNAME,
3045 .id_table = efx_pci_table,
3046 .probe = efx_pci_probe,
3047 .remove = efx_pci_remove,
3048 .driver.pm = &efx_pm_ops,
3049 .err_handler = &efx_err_handlers,
3050 };
3051
3052 /**************************************************************************
3053 *
3054 * Kernel module interface
3055 *
3056 *************************************************************************/
3057
3058 module_param(interrupt_mode, uint, 0444);
3059 MODULE_PARM_DESC(interrupt_mode,
3060 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3061
3062 static int __init efx_init_module(void)
3063 {
3064 int rc;
3065
3066 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3067
3068 rc = register_netdevice_notifier(&efx_netdev_notifier);
3069 if (rc)
3070 goto err_notifier;
3071
3072 rc = efx_init_sriov();
3073 if (rc)
3074 goto err_sriov;
3075
3076 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3077 if (!reset_workqueue) {
3078 rc = -ENOMEM;
3079 goto err_reset;
3080 }
3081
3082 rc = pci_register_driver(&efx_pci_driver);
3083 if (rc < 0)
3084 goto err_pci;
3085
3086 return 0;
3087
3088 err_pci:
3089 destroy_workqueue(reset_workqueue);
3090 err_reset:
3091 efx_fini_sriov();
3092 err_sriov:
3093 unregister_netdevice_notifier(&efx_netdev_notifier);
3094 err_notifier:
3095 return rc;
3096 }
3097
3098 static void __exit efx_exit_module(void)
3099 {
3100 printk(KERN_INFO "Solarflare NET driver unloading\n");
3101
3102 pci_unregister_driver(&efx_pci_driver);
3103 destroy_workqueue(reset_workqueue);
3104 efx_fini_sriov();
3105 unregister_netdevice_notifier(&efx_netdev_notifier);
3106
3107 }
3108
3109 module_init(efx_init_module);
3110 module_exit(efx_exit_module);
3111
3112 MODULE_AUTHOR("Solarflare Communications and "
3113 "Michael Brown <mbrown@fensystems.co.uk>");
3114 MODULE_DESCRIPTION("Solarflare Communications network driver");
3115 MODULE_LICENSE("GPL");
3116 MODULE_DEVICE_TABLE(pci, efx_pci_table);
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