1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
41 const char *const efx_loopback_mode_names
[] = {
42 [LOOPBACK_NONE
] = "NONE",
43 [LOOPBACK_DATA
] = "DATAPATH",
44 [LOOPBACK_GMAC
] = "GMAC",
45 [LOOPBACK_XGMII
] = "XGMII",
46 [LOOPBACK_XGXS
] = "XGXS",
47 [LOOPBACK_XAUI
] = "XAUI",
48 [LOOPBACK_GMII
] = "GMII",
49 [LOOPBACK_SGMII
] = "SGMII",
50 [LOOPBACK_XGBR
] = "XGBR",
51 [LOOPBACK_XFI
] = "XFI",
52 [LOOPBACK_XAUI_FAR
] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR
] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR
] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR
] = "XFI_FAR",
56 [LOOPBACK_GPHY
] = "GPHY",
57 [LOOPBACK_PHYXS
] = "PHYXS",
58 [LOOPBACK_PCS
] = "PCS",
59 [LOOPBACK_PMAPMD
] = "PMA/PMD",
60 [LOOPBACK_XPORT
] = "XPORT",
61 [LOOPBACK_XGMII_WS
] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS
] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR
] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR
] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS
] = "GMII_WS",
66 [LOOPBACK_XFI_WS
] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR
] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS
] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
72 const char *const efx_reset_type_names
[] = {
73 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
74 [RESET_TYPE_ALL
] = "ALL",
75 [RESET_TYPE_WORLD
] = "WORLD",
76 [RESET_TYPE_DISABLE
] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE
] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct
*reset_workqueue
;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels
;
109 module_param(separate_tx_channels
, uint
, 0444);
110 MODULE_PARM_DESC(separate_tx_channels
,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight
= 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval
= 1 * HZ
;
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
131 static unsigned int rx_irq_mod_usec
= 60;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
142 static unsigned int tx_irq_mod_usec
= 150;
144 /* This is the first interrupt mode to try out of:
149 static unsigned int interrupt_mode
;
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
158 static unsigned int rss_cpus
;
159 module_param(rss_cpus
, uint
, 0444);
160 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
162 static int phy_flash_cfg
;
163 module_param(phy_flash_cfg
, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
166 static unsigned irq_adapt_low_thresh
= 10000;
167 module_param(irq_adapt_low_thresh
, uint
, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh
,
169 "Threshold score for reducing IRQ moderation");
171 static unsigned irq_adapt_high_thresh
= 20000;
172 module_param(irq_adapt_high_thresh
, uint
, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh
,
174 "Threshold score for increasing IRQ moderation");
176 static unsigned debug
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
177 NETIF_MSG_LINK
| NETIF_MSG_IFDOWN
|
178 NETIF_MSG_IFUP
| NETIF_MSG_RX_ERR
|
179 NETIF_MSG_TX_ERR
| NETIF_MSG_HW
);
180 module_param(debug
, uint
, 0);
181 MODULE_PARM_DESC(debug
, "Bitmapped debugging message enable value");
183 /**************************************************************************
185 * Utility functions and prototypes
187 *************************************************************************/
189 static void efx_remove_channels(struct efx_nic
*efx
);
190 static void efx_remove_port(struct efx_nic
*efx
);
191 static void efx_init_napi(struct efx_nic
*efx
);
192 static void efx_fini_napi(struct efx_nic
*efx
);
193 static void efx_fini_napi_channel(struct efx_channel
*channel
);
194 static void efx_fini_struct(struct efx_nic
*efx
);
195 static void efx_start_all(struct efx_nic
*efx
);
196 static void efx_stop_all(struct efx_nic
*efx
);
198 #define EFX_ASSERT_RESET_SERIALISED(efx) \
200 if ((efx->state == STATE_RUNNING) || \
201 (efx->state == STATE_DISABLED)) \
205 /**************************************************************************
207 * Event queue processing
209 *************************************************************************/
211 /* Process channel's event queue
213 * This function is responsible for processing the event queue of a
214 * single channel. The caller must guarantee that this function will
215 * never be concurrently called more than once on the same channel,
216 * though different channels may be being processed concurrently.
218 static int efx_process_channel(struct efx_channel
*channel
, int budget
)
220 struct efx_nic
*efx
= channel
->efx
;
223 if (unlikely(efx
->reset_pending
|| !channel
->enabled
))
226 spent
= efx_nic_process_eventq(channel
, budget
);
230 /* Deliver last RX packet. */
231 if (channel
->rx_pkt
) {
232 __efx_rx_packet(channel
, channel
->rx_pkt
,
233 channel
->rx_pkt_csummed
);
234 channel
->rx_pkt
= NULL
;
237 efx_rx_strategy(channel
);
239 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel
));
244 /* Mark channel as finished processing
246 * Note that since we will not receive further interrupts for this
247 * channel before we finish processing and call the eventq_read_ack()
248 * method, there is no need to use the interrupt hold-off timers.
250 static inline void efx_channel_processed(struct efx_channel
*channel
)
252 /* The interrupt handler for this channel may set work_pending
253 * as soon as we acknowledge the events we've seen. Make sure
254 * it's cleared before then. */
255 channel
->work_pending
= false;
258 efx_nic_eventq_read_ack(channel
);
263 * NAPI guarantees serialisation of polls of the same device, which
264 * provides the guarantee required by efx_process_channel().
266 static int efx_poll(struct napi_struct
*napi
, int budget
)
268 struct efx_channel
*channel
=
269 container_of(napi
, struct efx_channel
, napi_str
);
270 struct efx_nic
*efx
= channel
->efx
;
273 netif_vdbg(efx
, intr
, efx
->net_dev
,
274 "channel %d NAPI poll executing on CPU %d\n",
275 channel
->channel
, raw_smp_processor_id());
277 spent
= efx_process_channel(channel
, budget
);
279 if (spent
< budget
) {
280 if (channel
->channel
< efx
->n_rx_channels
&&
281 efx
->irq_rx_adaptive
&&
282 unlikely(++channel
->irq_count
== 1000)) {
283 if (unlikely(channel
->irq_mod_score
<
284 irq_adapt_low_thresh
)) {
285 if (channel
->irq_moderation
> 1) {
286 channel
->irq_moderation
-= 1;
287 efx
->type
->push_irq_moderation(channel
);
289 } else if (unlikely(channel
->irq_mod_score
>
290 irq_adapt_high_thresh
)) {
291 if (channel
->irq_moderation
<
292 efx
->irq_rx_moderation
) {
293 channel
->irq_moderation
+= 1;
294 efx
->type
->push_irq_moderation(channel
);
297 channel
->irq_count
= 0;
298 channel
->irq_mod_score
= 0;
301 efx_filter_rfs_expire(channel
);
303 /* There is no race here; although napi_disable() will
304 * only wait for napi_complete(), this isn't a problem
305 * since efx_channel_processed() will have no effect if
306 * interrupts have already been disabled.
309 efx_channel_processed(channel
);
315 /* Process the eventq of the specified channel immediately on this CPU
317 * Disable hardware generated interrupts, wait for any existing
318 * processing to finish, then directly poll (and ack ) the eventq.
319 * Finally reenable NAPI and interrupts.
321 * This is for use only during a loopback self-test. It must not
322 * deliver any packets up the stack as this can result in deadlock.
324 void efx_process_channel_now(struct efx_channel
*channel
)
326 struct efx_nic
*efx
= channel
->efx
;
328 BUG_ON(channel
->channel
>= efx
->n_channels
);
329 BUG_ON(!channel
->enabled
);
330 BUG_ON(!efx
->loopback_selftest
);
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx
);
334 if (efx
->legacy_irq
) {
335 synchronize_irq(efx
->legacy_irq
);
336 efx
->legacy_irq_enabled
= false;
339 synchronize_irq(channel
->irq
);
341 /* Wait for any NAPI processing to complete */
342 napi_disable(&channel
->napi_str
);
344 /* Poll the channel */
345 efx_process_channel(channel
, channel
->eventq_mask
+ 1);
347 /* Ack the eventq. This may cause an interrupt to be generated
348 * when they are reenabled */
349 efx_channel_processed(channel
);
351 napi_enable(&channel
->napi_str
);
353 efx
->legacy_irq_enabled
= true;
354 efx_nic_enable_interrupts(efx
);
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
362 static int efx_probe_eventq(struct efx_channel
*channel
)
364 struct efx_nic
*efx
= channel
->efx
;
365 unsigned long entries
;
367 netif_dbg(channel
->efx
, probe
, channel
->efx
->net_dev
,
368 "chan %d create event queue\n", channel
->channel
);
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries
= roundup_pow_of_two(efx
->rxq_entries
+ efx
->txq_entries
+ 128);
373 EFX_BUG_ON_PARANOID(entries
> EFX_MAX_EVQ_SIZE
);
374 channel
->eventq_mask
= max(entries
, EFX_MIN_EVQ_SIZE
) - 1;
376 return efx_nic_probe_eventq(channel
);
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel
*channel
)
382 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
383 "chan %d init event queue\n", channel
->channel
);
385 channel
->eventq_read_ptr
= 0;
387 efx_nic_init_eventq(channel
);
390 static void efx_fini_eventq(struct efx_channel
*channel
)
392 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
393 "chan %d fini event queue\n", channel
->channel
);
395 efx_nic_fini_eventq(channel
);
398 static void efx_remove_eventq(struct efx_channel
*channel
)
400 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
401 "chan %d remove event queue\n", channel
->channel
);
403 efx_nic_remove_eventq(channel
);
406 /**************************************************************************
410 *************************************************************************/
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel
*
415 efx_alloc_channel(struct efx_nic
*efx
, int i
, struct efx_channel
*old_channel
)
417 struct efx_channel
*channel
;
418 struct efx_rx_queue
*rx_queue
;
419 struct efx_tx_queue
*tx_queue
;
423 channel
= kmalloc(sizeof(*channel
), GFP_KERNEL
);
427 *channel
= *old_channel
;
429 channel
->napi_dev
= NULL
;
430 memset(&channel
->eventq
, 0, sizeof(channel
->eventq
));
432 rx_queue
= &channel
->rx_queue
;
433 rx_queue
->buffer
= NULL
;
434 memset(&rx_queue
->rxd
, 0, sizeof(rx_queue
->rxd
));
436 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
437 tx_queue
= &channel
->tx_queue
[j
];
438 if (tx_queue
->channel
)
439 tx_queue
->channel
= channel
;
440 tx_queue
->buffer
= NULL
;
441 memset(&tx_queue
->txd
, 0, sizeof(tx_queue
->txd
));
444 channel
= kzalloc(sizeof(*channel
), GFP_KERNEL
);
449 channel
->channel
= i
;
451 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
452 tx_queue
= &channel
->tx_queue
[j
];
454 tx_queue
->queue
= i
* EFX_TXQ_TYPES
+ j
;
455 tx_queue
->channel
= channel
;
459 rx_queue
= &channel
->rx_queue
;
461 setup_timer(&rx_queue
->slow_fill
, efx_rx_slow_fill
,
462 (unsigned long)rx_queue
);
467 static int efx_probe_channel(struct efx_channel
*channel
)
469 struct efx_tx_queue
*tx_queue
;
470 struct efx_rx_queue
*rx_queue
;
473 netif_dbg(channel
->efx
, probe
, channel
->efx
->net_dev
,
474 "creating channel %d\n", channel
->channel
);
476 rc
= efx_probe_eventq(channel
);
480 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
481 rc
= efx_probe_tx_queue(tx_queue
);
486 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
487 rc
= efx_probe_rx_queue(rx_queue
);
492 channel
->n_rx_frm_trunc
= 0;
497 efx_for_each_channel_rx_queue(rx_queue
, channel
)
498 efx_remove_rx_queue(rx_queue
);
500 efx_for_each_channel_tx_queue(tx_queue
, channel
)
501 efx_remove_tx_queue(tx_queue
);
507 static void efx_set_channel_names(struct efx_nic
*efx
)
509 struct efx_channel
*channel
;
510 const char *type
= "";
513 efx_for_each_channel(channel
, efx
) {
514 number
= channel
->channel
;
515 if (efx
->n_channels
> efx
->n_rx_channels
) {
516 if (channel
->channel
< efx
->n_rx_channels
) {
520 number
-= efx
->n_rx_channels
;
523 snprintf(efx
->channel_name
[channel
->channel
],
524 sizeof(efx
->channel_name
[0]),
525 "%s%s-%d", efx
->name
, type
, number
);
529 static int efx_probe_channels(struct efx_nic
*efx
)
531 struct efx_channel
*channel
;
534 /* Restart special buffer allocation */
535 efx
->next_buffer_table
= 0;
537 efx_for_each_channel(channel
, efx
) {
538 rc
= efx_probe_channel(channel
);
540 netif_err(efx
, probe
, efx
->net_dev
,
541 "failed to create channel %d\n",
546 efx_set_channel_names(efx
);
551 efx_remove_channels(efx
);
555 /* Channels are shutdown and reinitialised whilst the NIC is running
556 * to propagate configuration changes (mtu, checksum offload), or
557 * to clear hardware error conditions
559 static void efx_init_channels(struct efx_nic
*efx
)
561 struct efx_tx_queue
*tx_queue
;
562 struct efx_rx_queue
*rx_queue
;
563 struct efx_channel
*channel
;
565 /* Calculate the rx buffer allocation parameters required to
566 * support the current MTU, including padding for header
567 * alignment and overruns.
569 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
570 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
571 efx
->type
->rx_buffer_hash_size
+
572 efx
->type
->rx_buffer_padding
);
573 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
+
574 sizeof(struct efx_rx_page_state
));
576 /* Initialise the channels */
577 efx_for_each_channel(channel
, efx
) {
578 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
579 "init chan %d\n", channel
->channel
);
581 efx_init_eventq(channel
);
583 efx_for_each_channel_tx_queue(tx_queue
, channel
)
584 efx_init_tx_queue(tx_queue
);
586 /* The rx buffer allocation strategy is MTU dependent */
587 efx_rx_strategy(channel
);
589 efx_for_each_channel_rx_queue(rx_queue
, channel
)
590 efx_init_rx_queue(rx_queue
);
592 WARN_ON(channel
->rx_pkt
!= NULL
);
593 efx_rx_strategy(channel
);
597 /* This enables event queue processing and packet transmission.
599 * Note that this function is not allowed to fail, since that would
600 * introduce too much complexity into the suspend/resume path.
602 static void efx_start_channel(struct efx_channel
*channel
)
604 struct efx_rx_queue
*rx_queue
;
606 netif_dbg(channel
->efx
, ifup
, channel
->efx
->net_dev
,
607 "starting chan %d\n", channel
->channel
);
609 /* The interrupt handler for this channel may set work_pending
610 * as soon as we enable it. Make sure it's cleared before
611 * then. Similarly, make sure it sees the enabled flag set. */
612 channel
->work_pending
= false;
613 channel
->enabled
= true;
616 /* Fill the queues before enabling NAPI */
617 efx_for_each_channel_rx_queue(rx_queue
, channel
)
618 efx_fast_push_rx_descriptors(rx_queue
);
620 napi_enable(&channel
->napi_str
);
623 /* This disables event queue processing and packet transmission.
624 * This function does not guarantee that all queue processing
625 * (e.g. RX refill) is complete.
627 static void efx_stop_channel(struct efx_channel
*channel
)
629 if (!channel
->enabled
)
632 netif_dbg(channel
->efx
, ifdown
, channel
->efx
->net_dev
,
633 "stop chan %d\n", channel
->channel
);
635 channel
->enabled
= false;
636 napi_disable(&channel
->napi_str
);
639 static void efx_fini_channels(struct efx_nic
*efx
)
641 struct efx_channel
*channel
;
642 struct efx_tx_queue
*tx_queue
;
643 struct efx_rx_queue
*rx_queue
;
646 EFX_ASSERT_RESET_SERIALISED(efx
);
647 BUG_ON(efx
->port_enabled
);
649 rc
= efx_nic_flush_queues(efx
);
650 if (rc
&& EFX_WORKAROUND_7803(efx
)) {
651 /* Schedule a reset to recover from the flush failure. The
652 * descriptor caches reference memory we're about to free,
653 * but falcon_reconfigure_mac_wrapper() won't reconnect
654 * the MACs because of the pending reset. */
655 netif_err(efx
, drv
, efx
->net_dev
,
656 "Resetting to recover from flush failure\n");
657 efx_schedule_reset(efx
, RESET_TYPE_ALL
);
659 netif_err(efx
, drv
, efx
->net_dev
, "failed to flush queues\n");
661 netif_dbg(efx
, drv
, efx
->net_dev
,
662 "successfully flushed all queues\n");
665 efx_for_each_channel(channel
, efx
) {
666 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
667 "shut down chan %d\n", channel
->channel
);
669 efx_for_each_channel_rx_queue(rx_queue
, channel
)
670 efx_fini_rx_queue(rx_queue
);
671 efx_for_each_possible_channel_tx_queue(tx_queue
, channel
)
672 efx_fini_tx_queue(tx_queue
);
673 efx_fini_eventq(channel
);
677 static void efx_remove_channel(struct efx_channel
*channel
)
679 struct efx_tx_queue
*tx_queue
;
680 struct efx_rx_queue
*rx_queue
;
682 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
683 "destroy chan %d\n", channel
->channel
);
685 efx_for_each_channel_rx_queue(rx_queue
, channel
)
686 efx_remove_rx_queue(rx_queue
);
687 efx_for_each_possible_channel_tx_queue(tx_queue
, channel
)
688 efx_remove_tx_queue(tx_queue
);
689 efx_remove_eventq(channel
);
692 static void efx_remove_channels(struct efx_nic
*efx
)
694 struct efx_channel
*channel
;
696 efx_for_each_channel(channel
, efx
)
697 efx_remove_channel(channel
);
701 efx_realloc_channels(struct efx_nic
*efx
, u32 rxq_entries
, u32 txq_entries
)
703 struct efx_channel
*other_channel
[EFX_MAX_CHANNELS
], *channel
;
704 u32 old_rxq_entries
, old_txq_entries
;
709 efx_fini_channels(efx
);
712 memset(other_channel
, 0, sizeof(other_channel
));
713 for (i
= 0; i
< efx
->n_channels
; i
++) {
714 channel
= efx_alloc_channel(efx
, i
, efx
->channel
[i
]);
719 other_channel
[i
] = channel
;
722 /* Swap entry counts and channel pointers */
723 old_rxq_entries
= efx
->rxq_entries
;
724 old_txq_entries
= efx
->txq_entries
;
725 efx
->rxq_entries
= rxq_entries
;
726 efx
->txq_entries
= txq_entries
;
727 for (i
= 0; i
< efx
->n_channels
; i
++) {
728 channel
= efx
->channel
[i
];
729 efx
->channel
[i
] = other_channel
[i
];
730 other_channel
[i
] = channel
;
733 rc
= efx_probe_channels(efx
);
739 /* Destroy old channels */
740 for (i
= 0; i
< efx
->n_channels
; i
++) {
741 efx_fini_napi_channel(other_channel
[i
]);
742 efx_remove_channel(other_channel
[i
]);
745 /* Free unused channel structures */
746 for (i
= 0; i
< efx
->n_channels
; i
++)
747 kfree(other_channel
[i
]);
749 efx_init_channels(efx
);
755 efx
->rxq_entries
= old_rxq_entries
;
756 efx
->txq_entries
= old_txq_entries
;
757 for (i
= 0; i
< efx
->n_channels
; i
++) {
758 channel
= efx
->channel
[i
];
759 efx
->channel
[i
] = other_channel
[i
];
760 other_channel
[i
] = channel
;
765 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
)
767 mod_timer(&rx_queue
->slow_fill
, jiffies
+ msecs_to_jiffies(100));
770 /**************************************************************************
774 **************************************************************************/
776 /* This ensures that the kernel is kept informed (via
777 * netif_carrier_on/off) of the link status, and also maintains the
778 * link status's stop on the port's TX queue.
780 void efx_link_status_changed(struct efx_nic
*efx
)
782 struct efx_link_state
*link_state
= &efx
->link_state
;
784 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
785 * that no events are triggered between unregister_netdev() and the
786 * driver unloading. A more general condition is that NETDEV_CHANGE
787 * can only be generated between NETDEV_UP and NETDEV_DOWN */
788 if (!netif_running(efx
->net_dev
))
791 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
792 efx
->n_link_state_changes
++;
795 netif_carrier_on(efx
->net_dev
);
797 netif_carrier_off(efx
->net_dev
);
800 /* Status message for kernel log */
801 if (link_state
->up
) {
802 netif_info(efx
, link
, efx
->net_dev
,
803 "link up at %uMbps %s-duplex (MTU %d)%s\n",
804 link_state
->speed
, link_state
->fd
? "full" : "half",
806 (efx
->promiscuous
? " [PROMISC]" : ""));
808 netif_info(efx
, link
, efx
->net_dev
, "link down\n");
813 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
815 efx
->link_advertising
= advertising
;
817 if (advertising
& ADVERTISED_Pause
)
818 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
820 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
821 if (advertising
& ADVERTISED_Asym_Pause
)
822 efx
->wanted_fc
^= EFX_FC_TX
;
826 void efx_link_set_wanted_fc(struct efx_nic
*efx
, u8 wanted_fc
)
828 efx
->wanted_fc
= wanted_fc
;
829 if (efx
->link_advertising
) {
830 if (wanted_fc
& EFX_FC_RX
)
831 efx
->link_advertising
|= (ADVERTISED_Pause
|
832 ADVERTISED_Asym_Pause
);
834 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
835 ADVERTISED_Asym_Pause
);
836 if (wanted_fc
& EFX_FC_TX
)
837 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
841 static void efx_fini_port(struct efx_nic
*efx
);
843 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
844 * the MAC appropriately. All other PHY configuration changes are pushed
845 * through phy_op->set_settings(), and pushed asynchronously to the MAC
846 * through efx_monitor().
848 * Callers must hold the mac_lock
850 int __efx_reconfigure_port(struct efx_nic
*efx
)
852 enum efx_phy_mode phy_mode
;
855 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
857 /* Serialise the promiscuous flag with efx_set_multicast_list. */
858 if (efx_dev_registered(efx
)) {
859 netif_addr_lock_bh(efx
->net_dev
);
860 netif_addr_unlock_bh(efx
->net_dev
);
863 /* Disable PHY transmit in mac level loopbacks */
864 phy_mode
= efx
->phy_mode
;
865 if (LOOPBACK_INTERNAL(efx
))
866 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
868 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
870 rc
= efx
->type
->reconfigure_port(efx
);
873 efx
->phy_mode
= phy_mode
;
878 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
880 int efx_reconfigure_port(struct efx_nic
*efx
)
884 EFX_ASSERT_RESET_SERIALISED(efx
);
886 mutex_lock(&efx
->mac_lock
);
887 rc
= __efx_reconfigure_port(efx
);
888 mutex_unlock(&efx
->mac_lock
);
893 /* Asynchronous work item for changing MAC promiscuity and multicast
894 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
896 static void efx_mac_work(struct work_struct
*data
)
898 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
900 mutex_lock(&efx
->mac_lock
);
901 if (efx
->port_enabled
)
902 efx
->type
->reconfigure_mac(efx
);
903 mutex_unlock(&efx
->mac_lock
);
906 static int efx_probe_port(struct efx_nic
*efx
)
910 netif_dbg(efx
, probe
, efx
->net_dev
, "create port\n");
913 efx
->phy_mode
= PHY_MODE_SPECIAL
;
915 /* Connect up MAC/PHY operations table */
916 rc
= efx
->type
->probe_port(efx
);
920 /* Initialise MAC address to permanent address */
921 memcpy(efx
->net_dev
->dev_addr
, efx
->net_dev
->perm_addr
, ETH_ALEN
);
926 static int efx_init_port(struct efx_nic
*efx
)
930 netif_dbg(efx
, drv
, efx
->net_dev
, "init port\n");
932 mutex_lock(&efx
->mac_lock
);
934 rc
= efx
->phy_op
->init(efx
);
938 efx
->port_initialized
= true;
940 /* Reconfigure the MAC before creating dma queues (required for
941 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
942 efx
->type
->reconfigure_mac(efx
);
944 /* Ensure the PHY advertises the correct flow control settings */
945 rc
= efx
->phy_op
->reconfigure(efx
);
949 mutex_unlock(&efx
->mac_lock
);
953 efx
->phy_op
->fini(efx
);
955 mutex_unlock(&efx
->mac_lock
);
959 static void efx_start_port(struct efx_nic
*efx
)
961 netif_dbg(efx
, ifup
, efx
->net_dev
, "start port\n");
962 BUG_ON(efx
->port_enabled
);
964 mutex_lock(&efx
->mac_lock
);
965 efx
->port_enabled
= true;
967 /* efx_mac_work() might have been scheduled after efx_stop_port(),
968 * and then cancelled by efx_flush_all() */
969 efx
->type
->reconfigure_mac(efx
);
971 mutex_unlock(&efx
->mac_lock
);
974 /* Prevent efx_mac_work() and efx_monitor() from working */
975 static void efx_stop_port(struct efx_nic
*efx
)
977 netif_dbg(efx
, ifdown
, efx
->net_dev
, "stop port\n");
979 mutex_lock(&efx
->mac_lock
);
980 efx
->port_enabled
= false;
981 mutex_unlock(&efx
->mac_lock
);
983 /* Serialise against efx_set_multicast_list() */
984 if (efx_dev_registered(efx
)) {
985 netif_addr_lock_bh(efx
->net_dev
);
986 netif_addr_unlock_bh(efx
->net_dev
);
990 static void efx_fini_port(struct efx_nic
*efx
)
992 netif_dbg(efx
, drv
, efx
->net_dev
, "shut down port\n");
994 if (!efx
->port_initialized
)
997 efx
->phy_op
->fini(efx
);
998 efx
->port_initialized
= false;
1000 efx
->link_state
.up
= false;
1001 efx_link_status_changed(efx
);
1004 static void efx_remove_port(struct efx_nic
*efx
)
1006 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying port\n");
1008 efx
->type
->remove_port(efx
);
1011 /**************************************************************************
1015 **************************************************************************/
1017 /* This configures the PCI device to enable I/O and DMA. */
1018 static int efx_init_io(struct efx_nic
*efx
)
1020 struct pci_dev
*pci_dev
= efx
->pci_dev
;
1021 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
1024 netif_dbg(efx
, probe
, efx
->net_dev
, "initialising I/O\n");
1026 rc
= pci_enable_device(pci_dev
);
1028 netif_err(efx
, probe
, efx
->net_dev
,
1029 "failed to enable PCI device\n");
1033 pci_set_master(pci_dev
);
1035 /* Set the PCI DMA mask. Try all possibilities from our
1036 * genuine mask down to 32 bits, because some architectures
1037 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1038 * masks event though they reject 46 bit masks.
1040 while (dma_mask
> 0x7fffffffUL
) {
1041 if (pci_dma_supported(pci_dev
, dma_mask
)) {
1042 rc
= pci_set_dma_mask(pci_dev
, dma_mask
);
1049 netif_err(efx
, probe
, efx
->net_dev
,
1050 "could not find a suitable DMA mask\n");
1053 netif_dbg(efx
, probe
, efx
->net_dev
,
1054 "using DMA mask %llx\n", (unsigned long long) dma_mask
);
1055 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
1057 /* pci_set_consistent_dma_mask() is not *allowed* to
1058 * fail with a mask that pci_set_dma_mask() accepted,
1059 * but just in case...
1061 netif_err(efx
, probe
, efx
->net_dev
,
1062 "failed to set consistent DMA mask\n");
1066 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
1067 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
1069 netif_err(efx
, probe
, efx
->net_dev
,
1070 "request for memory BAR failed\n");
1074 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
1075 efx
->type
->mem_map_size
);
1076 if (!efx
->membase
) {
1077 netif_err(efx
, probe
, efx
->net_dev
,
1078 "could not map memory BAR at %llx+%x\n",
1079 (unsigned long long)efx
->membase_phys
,
1080 efx
->type
->mem_map_size
);
1084 netif_dbg(efx
, probe
, efx
->net_dev
,
1085 "memory BAR at %llx+%x (virtual %p)\n",
1086 (unsigned long long)efx
->membase_phys
,
1087 efx
->type
->mem_map_size
, efx
->membase
);
1092 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1094 efx
->membase_phys
= 0;
1096 pci_disable_device(efx
->pci_dev
);
1101 static void efx_fini_io(struct efx_nic
*efx
)
1103 netif_dbg(efx
, drv
, efx
->net_dev
, "shutting down I/O\n");
1106 iounmap(efx
->membase
);
1107 efx
->membase
= NULL
;
1110 if (efx
->membase_phys
) {
1111 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1112 efx
->membase_phys
= 0;
1115 pci_disable_device(efx
->pci_dev
);
1118 static int efx_wanted_parallelism(void)
1120 cpumask_var_t thread_mask
;
1127 if (unlikely(!zalloc_cpumask_var(&thread_mask
, GFP_KERNEL
))) {
1129 "sfc: RSS disabled due to allocation failure\n");
1134 for_each_online_cpu(cpu
) {
1135 if (!cpumask_test_cpu(cpu
, thread_mask
)) {
1137 cpumask_or(thread_mask
, thread_mask
,
1138 topology_thread_cpumask(cpu
));
1142 free_cpumask_var(thread_mask
);
1147 efx_init_rx_cpu_rmap(struct efx_nic
*efx
, struct msix_entry
*xentries
)
1149 #ifdef CONFIG_RFS_ACCEL
1152 efx
->net_dev
->rx_cpu_rmap
= alloc_irq_cpu_rmap(efx
->n_rx_channels
);
1153 if (!efx
->net_dev
->rx_cpu_rmap
)
1155 for (i
= 0; i
< efx
->n_rx_channels
; i
++) {
1156 rc
= irq_cpu_rmap_add(efx
->net_dev
->rx_cpu_rmap
,
1157 xentries
[i
].vector
);
1159 free_irq_cpu_rmap(efx
->net_dev
->rx_cpu_rmap
);
1160 efx
->net_dev
->rx_cpu_rmap
= NULL
;
1168 /* Probe the number and type of interrupts we are able to obtain, and
1169 * the resulting numbers of channels and RX queues.
1171 static int efx_probe_interrupts(struct efx_nic
*efx
)
1174 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
1177 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
1178 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
1181 n_channels
= efx_wanted_parallelism();
1182 if (separate_tx_channels
)
1184 n_channels
= min(n_channels
, max_channels
);
1186 for (i
= 0; i
< n_channels
; i
++)
1187 xentries
[i
].entry
= i
;
1188 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, n_channels
);
1190 netif_err(efx
, drv
, efx
->net_dev
,
1191 "WARNING: Insufficient MSI-X vectors"
1192 " available (%d < %d).\n", rc
, n_channels
);
1193 netif_err(efx
, drv
, efx
->net_dev
,
1194 "WARNING: Performance may be reduced.\n");
1195 EFX_BUG_ON_PARANOID(rc
>= n_channels
);
1197 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1202 efx
->n_channels
= n_channels
;
1203 if (separate_tx_channels
) {
1204 efx
->n_tx_channels
=
1205 max(efx
->n_channels
/ 2, 1U);
1206 efx
->n_rx_channels
=
1207 max(efx
->n_channels
-
1208 efx
->n_tx_channels
, 1U);
1210 efx
->n_tx_channels
= efx
->n_channels
;
1211 efx
->n_rx_channels
= efx
->n_channels
;
1213 rc
= efx_init_rx_cpu_rmap(efx
, xentries
);
1215 pci_disable_msix(efx
->pci_dev
);
1218 for (i
= 0; i
< n_channels
; i
++)
1219 efx_get_channel(efx
, i
)->irq
=
1222 /* Fall back to single channel MSI */
1223 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1224 netif_err(efx
, drv
, efx
->net_dev
,
1225 "could not enable MSI-X\n");
1229 /* Try single interrupt MSI */
1230 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1231 efx
->n_channels
= 1;
1232 efx
->n_rx_channels
= 1;
1233 efx
->n_tx_channels
= 1;
1234 rc
= pci_enable_msi(efx
->pci_dev
);
1236 efx_get_channel(efx
, 0)->irq
= efx
->pci_dev
->irq
;
1238 netif_err(efx
, drv
, efx
->net_dev
,
1239 "could not enable MSI\n");
1240 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1244 /* Assume legacy interrupts */
1245 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1246 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1247 efx
->n_rx_channels
= 1;
1248 efx
->n_tx_channels
= 1;
1249 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1255 static void efx_remove_interrupts(struct efx_nic
*efx
)
1257 struct efx_channel
*channel
;
1259 /* Remove MSI/MSI-X interrupts */
1260 efx_for_each_channel(channel
, efx
)
1262 pci_disable_msi(efx
->pci_dev
);
1263 pci_disable_msix(efx
->pci_dev
);
1265 /* Remove legacy interrupt */
1266 efx
->legacy_irq
= 0;
1269 static void efx_set_channels(struct efx_nic
*efx
)
1271 struct efx_channel
*channel
;
1272 struct efx_tx_queue
*tx_queue
;
1274 efx
->tx_channel_offset
=
1275 separate_tx_channels
? efx
->n_channels
- efx
->n_tx_channels
: 0;
1277 /* We need to adjust the TX queue numbers if we have separate
1278 * RX-only and TX-only channels.
1280 efx_for_each_channel(channel
, efx
) {
1281 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1282 tx_queue
->queue
-= (efx
->tx_channel_offset
*
1287 static int efx_probe_nic(struct efx_nic
*efx
)
1292 netif_dbg(efx
, probe
, efx
->net_dev
, "creating NIC\n");
1294 /* Carry out hardware-type specific initialisation */
1295 rc
= efx
->type
->probe(efx
);
1299 /* Determine the number of channels and queues by trying to hook
1300 * in MSI-X interrupts. */
1301 rc
= efx_probe_interrupts(efx
);
1305 if (efx
->n_channels
> 1)
1306 get_random_bytes(&efx
->rx_hash_key
, sizeof(efx
->rx_hash_key
));
1307 for (i
= 0; i
< ARRAY_SIZE(efx
->rx_indir_table
); i
++)
1308 efx
->rx_indir_table
[i
] =
1309 ethtool_rxfh_indir_default(i
, efx
->n_rx_channels
);
1311 efx_set_channels(efx
);
1312 netif_set_real_num_tx_queues(efx
->net_dev
, efx
->n_tx_channels
);
1313 netif_set_real_num_rx_queues(efx
->net_dev
, efx
->n_rx_channels
);
1315 /* Initialise the interrupt moderation settings */
1316 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true,
1322 efx
->type
->remove(efx
);
1326 static void efx_remove_nic(struct efx_nic
*efx
)
1328 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying NIC\n");
1330 efx_remove_interrupts(efx
);
1331 efx
->type
->remove(efx
);
1334 /**************************************************************************
1336 * NIC startup/shutdown
1338 *************************************************************************/
1340 static int efx_probe_all(struct efx_nic
*efx
)
1344 rc
= efx_probe_nic(efx
);
1346 netif_err(efx
, probe
, efx
->net_dev
, "failed to create NIC\n");
1350 rc
= efx_probe_port(efx
);
1352 netif_err(efx
, probe
, efx
->net_dev
, "failed to create port\n");
1356 efx
->rxq_entries
= efx
->txq_entries
= EFX_DEFAULT_DMAQ_SIZE
;
1357 rc
= efx_probe_channels(efx
);
1361 rc
= efx_probe_filters(efx
);
1363 netif_err(efx
, probe
, efx
->net_dev
,
1364 "failed to create filter tables\n");
1371 efx_remove_channels(efx
);
1373 efx_remove_port(efx
);
1375 efx_remove_nic(efx
);
1380 /* Called after previous invocation(s) of efx_stop_all, restarts the
1381 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1382 * and ensures that the port is scheduled to be reconfigured.
1383 * This function is safe to call multiple times when the NIC is in any
1385 static void efx_start_all(struct efx_nic
*efx
)
1387 struct efx_channel
*channel
;
1389 EFX_ASSERT_RESET_SERIALISED(efx
);
1391 /* Check that it is appropriate to restart the interface. All
1392 * of these flags are safe to read under just the rtnl lock */
1393 if (efx
->port_enabled
)
1395 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1397 if (efx_dev_registered(efx
) && !netif_running(efx
->net_dev
))
1400 /* Mark the port as enabled so port reconfigurations can start, then
1401 * restart the transmit interface early so the watchdog timer stops */
1402 efx_start_port(efx
);
1404 if (efx_dev_registered(efx
) && netif_device_present(efx
->net_dev
))
1405 netif_tx_wake_all_queues(efx
->net_dev
);
1407 efx_for_each_channel(channel
, efx
)
1408 efx_start_channel(channel
);
1410 if (efx
->legacy_irq
)
1411 efx
->legacy_irq_enabled
= true;
1412 efx_nic_enable_interrupts(efx
);
1414 /* Switch to event based MCDI completions after enabling interrupts.
1415 * If a reset has been scheduled, then we need to stay in polled mode.
1416 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1417 * reset_pending [modified from an atomic context], we instead guarantee
1418 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1419 efx_mcdi_mode_event(efx
);
1420 if (efx
->reset_pending
)
1421 efx_mcdi_mode_poll(efx
);
1423 /* Start the hardware monitor if there is one. Otherwise (we're link
1424 * event driven), we have to poll the PHY because after an event queue
1425 * flush, we could have a missed a link state change */
1426 if (efx
->type
->monitor
!= NULL
) {
1427 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1428 efx_monitor_interval
);
1430 mutex_lock(&efx
->mac_lock
);
1431 if (efx
->phy_op
->poll(efx
))
1432 efx_link_status_changed(efx
);
1433 mutex_unlock(&efx
->mac_lock
);
1436 efx
->type
->start_stats(efx
);
1439 /* Flush all delayed work. Should only be called when no more delayed work
1440 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1441 * since we're holding the rtnl_lock at this point. */
1442 static void efx_flush_all(struct efx_nic
*efx
)
1444 /* Make sure the hardware monitor is stopped */
1445 cancel_delayed_work_sync(&efx
->monitor_work
);
1446 /* Stop scheduled port reconfigurations */
1447 cancel_work_sync(&efx
->mac_work
);
1450 /* Quiesce hardware and software without bringing the link down.
1451 * Safe to call multiple times, when the nic and interface is in any
1452 * state. The caller is guaranteed to subsequently be in a position
1453 * to modify any hardware and software state they see fit without
1455 static void efx_stop_all(struct efx_nic
*efx
)
1457 struct efx_channel
*channel
;
1459 EFX_ASSERT_RESET_SERIALISED(efx
);
1461 /* port_enabled can be read safely under the rtnl lock */
1462 if (!efx
->port_enabled
)
1465 efx
->type
->stop_stats(efx
);
1467 /* Switch to MCDI polling on Siena before disabling interrupts */
1468 efx_mcdi_mode_poll(efx
);
1470 /* Disable interrupts and wait for ISR to complete */
1471 efx_nic_disable_interrupts(efx
);
1472 if (efx
->legacy_irq
) {
1473 synchronize_irq(efx
->legacy_irq
);
1474 efx
->legacy_irq_enabled
= false;
1476 efx_for_each_channel(channel
, efx
) {
1478 synchronize_irq(channel
->irq
);
1481 /* Stop all NAPI processing and synchronous rx refills */
1482 efx_for_each_channel(channel
, efx
)
1483 efx_stop_channel(channel
);
1485 /* Stop all asynchronous port reconfigurations. Since all
1486 * event processing has already been stopped, there is no
1487 * window to loose phy events */
1490 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1493 /* Stop the kernel transmit interface late, so the watchdog
1494 * timer isn't ticking over the flush */
1495 if (efx_dev_registered(efx
)) {
1496 netif_tx_stop_all_queues(efx
->net_dev
);
1497 netif_tx_lock_bh(efx
->net_dev
);
1498 netif_tx_unlock_bh(efx
->net_dev
);
1502 static void efx_remove_all(struct efx_nic
*efx
)
1504 efx_remove_filters(efx
);
1505 efx_remove_channels(efx
);
1506 efx_remove_port(efx
);
1507 efx_remove_nic(efx
);
1510 /**************************************************************************
1512 * Interrupt moderation
1514 **************************************************************************/
1516 static unsigned int irq_mod_ticks(unsigned int usecs
, unsigned int resolution
)
1520 if (usecs
< resolution
)
1521 return 1; /* never round down to 0 */
1522 return usecs
/ resolution
;
1525 /* Set interrupt moderation parameters */
1526 int efx_init_irq_moderation(struct efx_nic
*efx
, unsigned int tx_usecs
,
1527 unsigned int rx_usecs
, bool rx_adaptive
,
1528 bool rx_may_override_tx
)
1530 struct efx_channel
*channel
;
1531 unsigned tx_ticks
= irq_mod_ticks(tx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1532 unsigned rx_ticks
= irq_mod_ticks(rx_usecs
, EFX_IRQ_MOD_RESOLUTION
);
1534 EFX_ASSERT_RESET_SERIALISED(efx
);
1536 if (tx_ticks
> EFX_IRQ_MOD_MAX
|| rx_ticks
> EFX_IRQ_MOD_MAX
)
1539 if (tx_ticks
!= rx_ticks
&& efx
->tx_channel_offset
== 0 &&
1540 !rx_may_override_tx
) {
1541 netif_err(efx
, drv
, efx
->net_dev
, "Channels are shared. "
1542 "RX and TX IRQ moderation must be equal\n");
1546 efx
->irq_rx_adaptive
= rx_adaptive
;
1547 efx
->irq_rx_moderation
= rx_ticks
;
1548 efx_for_each_channel(channel
, efx
) {
1549 if (efx_channel_has_rx_queue(channel
))
1550 channel
->irq_moderation
= rx_ticks
;
1551 else if (efx_channel_has_tx_queues(channel
))
1552 channel
->irq_moderation
= tx_ticks
;
1558 void efx_get_irq_moderation(struct efx_nic
*efx
, unsigned int *tx_usecs
,
1559 unsigned int *rx_usecs
, bool *rx_adaptive
)
1561 *rx_adaptive
= efx
->irq_rx_adaptive
;
1562 *rx_usecs
= efx
->irq_rx_moderation
* EFX_IRQ_MOD_RESOLUTION
;
1564 /* If channels are shared between RX and TX, so is IRQ
1565 * moderation. Otherwise, IRQ moderation is the same for all
1566 * TX channels and is not adaptive.
1568 if (efx
->tx_channel_offset
== 0)
1569 *tx_usecs
= *rx_usecs
;
1572 efx
->channel
[efx
->tx_channel_offset
]->irq_moderation
*
1573 EFX_IRQ_MOD_RESOLUTION
;
1576 /**************************************************************************
1580 **************************************************************************/
1582 /* Run periodically off the general workqueue */
1583 static void efx_monitor(struct work_struct
*data
)
1585 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1588 netif_vdbg(efx
, timer
, efx
->net_dev
,
1589 "hardware monitor executing on CPU %d\n",
1590 raw_smp_processor_id());
1591 BUG_ON(efx
->type
->monitor
== NULL
);
1593 /* If the mac_lock is already held then it is likely a port
1594 * reconfiguration is already in place, which will likely do
1595 * most of the work of monitor() anyway. */
1596 if (mutex_trylock(&efx
->mac_lock
)) {
1597 if (efx
->port_enabled
)
1598 efx
->type
->monitor(efx
);
1599 mutex_unlock(&efx
->mac_lock
);
1602 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1603 efx_monitor_interval
);
1606 /**************************************************************************
1610 *************************************************************************/
1613 * Context: process, rtnl_lock() held.
1615 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1617 struct efx_nic
*efx
= netdev_priv(net_dev
);
1618 struct mii_ioctl_data
*data
= if_mii(ifr
);
1620 EFX_ASSERT_RESET_SERIALISED(efx
);
1622 /* Convert phy_id from older PRTAD/DEVAD format */
1623 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1624 (data
->phy_id
& 0xfc00) == 0x0400)
1625 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1627 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1630 /**************************************************************************
1634 **************************************************************************/
1636 static void efx_init_napi(struct efx_nic
*efx
)
1638 struct efx_channel
*channel
;
1640 efx_for_each_channel(channel
, efx
) {
1641 channel
->napi_dev
= efx
->net_dev
;
1642 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1643 efx_poll
, napi_weight
);
1647 static void efx_fini_napi_channel(struct efx_channel
*channel
)
1649 if (channel
->napi_dev
)
1650 netif_napi_del(&channel
->napi_str
);
1651 channel
->napi_dev
= NULL
;
1654 static void efx_fini_napi(struct efx_nic
*efx
)
1656 struct efx_channel
*channel
;
1658 efx_for_each_channel(channel
, efx
)
1659 efx_fini_napi_channel(channel
);
1662 /**************************************************************************
1664 * Kernel netpoll interface
1666 *************************************************************************/
1668 #ifdef CONFIG_NET_POLL_CONTROLLER
1670 /* Although in the common case interrupts will be disabled, this is not
1671 * guaranteed. However, all our work happens inside the NAPI callback,
1672 * so no locking is required.
1674 static void efx_netpoll(struct net_device
*net_dev
)
1676 struct efx_nic
*efx
= netdev_priv(net_dev
);
1677 struct efx_channel
*channel
;
1679 efx_for_each_channel(channel
, efx
)
1680 efx_schedule_channel(channel
);
1685 /**************************************************************************
1687 * Kernel net device interface
1689 *************************************************************************/
1691 /* Context: process, rtnl_lock() held. */
1692 static int efx_net_open(struct net_device
*net_dev
)
1694 struct efx_nic
*efx
= netdev_priv(net_dev
);
1695 EFX_ASSERT_RESET_SERIALISED(efx
);
1697 netif_dbg(efx
, ifup
, efx
->net_dev
, "opening device on CPU %d\n",
1698 raw_smp_processor_id());
1700 if (efx
->state
== STATE_DISABLED
)
1702 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1704 if (efx_mcdi_poll_reboot(efx
) && efx_reset(efx
, RESET_TYPE_ALL
))
1707 /* Notify the kernel of the link state polled during driver load,
1708 * before the monitor starts running */
1709 efx_link_status_changed(efx
);
1715 /* Context: process, rtnl_lock() held.
1716 * Note that the kernel will ignore our return code; this method
1717 * should really be a void.
1719 static int efx_net_stop(struct net_device
*net_dev
)
1721 struct efx_nic
*efx
= netdev_priv(net_dev
);
1723 netif_dbg(efx
, ifdown
, efx
->net_dev
, "closing on CPU %d\n",
1724 raw_smp_processor_id());
1726 if (efx
->state
!= STATE_DISABLED
) {
1727 /* Stop the device and flush all the channels */
1729 efx_fini_channels(efx
);
1730 efx_init_channels(efx
);
1736 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1737 static struct rtnl_link_stats64
*efx_net_stats(struct net_device
*net_dev
, struct rtnl_link_stats64
*stats
)
1739 struct efx_nic
*efx
= netdev_priv(net_dev
);
1740 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1742 spin_lock_bh(&efx
->stats_lock
);
1744 efx
->type
->update_stats(efx
);
1746 stats
->rx_packets
= mac_stats
->rx_packets
;
1747 stats
->tx_packets
= mac_stats
->tx_packets
;
1748 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1749 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1750 stats
->rx_dropped
= efx
->n_rx_nodesc_drop_cnt
;
1751 stats
->multicast
= mac_stats
->rx_multicast
;
1752 stats
->collisions
= mac_stats
->tx_collision
;
1753 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1754 mac_stats
->rx_length_error
);
1755 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1756 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1757 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1758 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1759 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1761 stats
->rx_errors
= (stats
->rx_length_errors
+
1762 stats
->rx_crc_errors
+
1763 stats
->rx_frame_errors
+
1764 mac_stats
->rx_symbol_error
);
1765 stats
->tx_errors
= (stats
->tx_window_errors
+
1768 spin_unlock_bh(&efx
->stats_lock
);
1773 /* Context: netif_tx_lock held, BHs disabled. */
1774 static void efx_watchdog(struct net_device
*net_dev
)
1776 struct efx_nic
*efx
= netdev_priv(net_dev
);
1778 netif_err(efx
, tx_err
, efx
->net_dev
,
1779 "TX stuck with port_enabled=%d: resetting channels\n",
1782 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1786 /* Context: process, rtnl_lock() held. */
1787 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1789 struct efx_nic
*efx
= netdev_priv(net_dev
);
1792 EFX_ASSERT_RESET_SERIALISED(efx
);
1794 if (new_mtu
> EFX_MAX_MTU
)
1799 netif_dbg(efx
, drv
, efx
->net_dev
, "changing MTU to %d\n", new_mtu
);
1801 efx_fini_channels(efx
);
1803 mutex_lock(&efx
->mac_lock
);
1804 /* Reconfigure the MAC before enabling the dma queues so that
1805 * the RX buffers don't overflow */
1806 net_dev
->mtu
= new_mtu
;
1807 efx
->type
->reconfigure_mac(efx
);
1808 mutex_unlock(&efx
->mac_lock
);
1810 efx_init_channels(efx
);
1816 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1818 struct efx_nic
*efx
= netdev_priv(net_dev
);
1819 struct sockaddr
*addr
= data
;
1820 char *new_addr
= addr
->sa_data
;
1822 EFX_ASSERT_RESET_SERIALISED(efx
);
1824 if (!is_valid_ether_addr(new_addr
)) {
1825 netif_err(efx
, drv
, efx
->net_dev
,
1826 "invalid ethernet MAC address requested: %pM\n",
1831 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1833 /* Reconfigure the MAC */
1834 mutex_lock(&efx
->mac_lock
);
1835 efx
->type
->reconfigure_mac(efx
);
1836 mutex_unlock(&efx
->mac_lock
);
1841 /* Context: netif_addr_lock held, BHs disabled. */
1842 static void efx_set_multicast_list(struct net_device
*net_dev
)
1844 struct efx_nic
*efx
= netdev_priv(net_dev
);
1845 struct netdev_hw_addr
*ha
;
1846 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1850 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1852 /* Build multicast hash table */
1853 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1854 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1856 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1857 netdev_for_each_mc_addr(ha
, net_dev
) {
1858 crc
= ether_crc_le(ETH_ALEN
, ha
->addr
);
1859 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1860 set_bit_le(bit
, mc_hash
->byte
);
1863 /* Broadcast packets go through the multicast hash filter.
1864 * ether_crc_le() of the broadcast address is 0xbe2612ff
1865 * so we always add bit 0xff to the mask.
1867 set_bit_le(0xff, mc_hash
->byte
);
1870 if (efx
->port_enabled
)
1871 queue_work(efx
->workqueue
, &efx
->mac_work
);
1872 /* Otherwise efx_start_port() will do this */
1875 static int efx_set_features(struct net_device
*net_dev
, netdev_features_t data
)
1877 struct efx_nic
*efx
= netdev_priv(net_dev
);
1879 /* If disabling RX n-tuple filtering, clear existing filters */
1880 if (net_dev
->features
& ~data
& NETIF_F_NTUPLE
)
1881 efx_filter_clear_rx(efx
, EFX_FILTER_PRI_MANUAL
);
1886 static const struct net_device_ops efx_netdev_ops
= {
1887 .ndo_open
= efx_net_open
,
1888 .ndo_stop
= efx_net_stop
,
1889 .ndo_get_stats64
= efx_net_stats
,
1890 .ndo_tx_timeout
= efx_watchdog
,
1891 .ndo_start_xmit
= efx_hard_start_xmit
,
1892 .ndo_validate_addr
= eth_validate_addr
,
1893 .ndo_do_ioctl
= efx_ioctl
,
1894 .ndo_change_mtu
= efx_change_mtu
,
1895 .ndo_set_mac_address
= efx_set_mac_address
,
1896 .ndo_set_rx_mode
= efx_set_multicast_list
,
1897 .ndo_set_features
= efx_set_features
,
1898 #ifdef CONFIG_NET_POLL_CONTROLLER
1899 .ndo_poll_controller
= efx_netpoll
,
1901 .ndo_setup_tc
= efx_setup_tc
,
1902 #ifdef CONFIG_RFS_ACCEL
1903 .ndo_rx_flow_steer
= efx_filter_rfs
,
1907 static void efx_update_name(struct efx_nic
*efx
)
1909 strcpy(efx
->name
, efx
->net_dev
->name
);
1910 efx_mtd_rename(efx
);
1911 efx_set_channel_names(efx
);
1914 static int efx_netdev_event(struct notifier_block
*this,
1915 unsigned long event
, void *ptr
)
1917 struct net_device
*net_dev
= ptr
;
1919 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1920 event
== NETDEV_CHANGENAME
)
1921 efx_update_name(netdev_priv(net_dev
));
1926 static struct notifier_block efx_netdev_notifier
= {
1927 .notifier_call
= efx_netdev_event
,
1931 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1933 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1934 return sprintf(buf
, "%d\n", efx
->phy_type
);
1936 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1938 static int efx_register_netdev(struct efx_nic
*efx
)
1940 struct net_device
*net_dev
= efx
->net_dev
;
1941 struct efx_channel
*channel
;
1944 net_dev
->watchdog_timeo
= 5 * HZ
;
1945 net_dev
->irq
= efx
->pci_dev
->irq
;
1946 net_dev
->netdev_ops
= &efx_netdev_ops
;
1947 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1951 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1954 efx_update_name(efx
);
1956 rc
= register_netdevice(net_dev
);
1960 efx_for_each_channel(channel
, efx
) {
1961 struct efx_tx_queue
*tx_queue
;
1962 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1963 efx_init_tx_queue_core_txq(tx_queue
);
1966 /* Always start with carrier off; PHY events will detect the link */
1967 netif_carrier_off(efx
->net_dev
);
1971 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1973 netif_err(efx
, drv
, efx
->net_dev
,
1974 "failed to init net dev attributes\n");
1975 goto fail_registered
;
1982 netif_err(efx
, drv
, efx
->net_dev
, "could not register net dev\n");
1986 unregister_netdev(net_dev
);
1990 static void efx_unregister_netdev(struct efx_nic
*efx
)
1992 struct efx_channel
*channel
;
1993 struct efx_tx_queue
*tx_queue
;
1998 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
2000 /* Free up any skbs still remaining. This has to happen before
2001 * we try to unregister the netdev as running their destructors
2002 * may be needed to get the device ref. count to 0. */
2003 efx_for_each_channel(channel
, efx
) {
2004 efx_for_each_channel_tx_queue(tx_queue
, channel
)
2005 efx_release_tx_buffers(tx_queue
);
2008 if (efx_dev_registered(efx
)) {
2009 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
2010 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
2011 unregister_netdev(efx
->net_dev
);
2015 /**************************************************************************
2017 * Device reset and suspend
2019 **************************************************************************/
2021 /* Tears down the entire software state and most of the hardware state
2023 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
2025 EFX_ASSERT_RESET_SERIALISED(efx
);
2028 mutex_lock(&efx
->mac_lock
);
2030 efx_fini_channels(efx
);
2031 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
2032 efx
->phy_op
->fini(efx
);
2033 efx
->type
->fini(efx
);
2036 /* This function will always ensure that the locks acquired in
2037 * efx_reset_down() are released. A failure return code indicates
2038 * that we were unable to reinitialise the hardware, and the
2039 * driver should be disabled. If ok is false, then the rx and tx
2040 * engines are not restarted, pending a RESET_DISABLE. */
2041 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
2045 EFX_ASSERT_RESET_SERIALISED(efx
);
2047 rc
= efx
->type
->init(efx
);
2049 netif_err(efx
, drv
, efx
->net_dev
, "failed to initialise NIC\n");
2056 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
2057 rc
= efx
->phy_op
->init(efx
);
2060 if (efx
->phy_op
->reconfigure(efx
))
2061 netif_err(efx
, drv
, efx
->net_dev
,
2062 "could not restore PHY settings\n");
2065 efx
->type
->reconfigure_mac(efx
);
2067 efx_init_channels(efx
);
2068 efx_restore_filters(efx
);
2070 mutex_unlock(&efx
->mac_lock
);
2077 efx
->port_initialized
= false;
2079 mutex_unlock(&efx
->mac_lock
);
2084 /* Reset the NIC using the specified method. Note that the reset may
2085 * fail, in which case the card will be left in an unusable state.
2087 * Caller must hold the rtnl_lock.
2089 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
2094 netif_info(efx
, drv
, efx
->net_dev
, "resetting (%s)\n",
2095 RESET_TYPE(method
));
2097 netif_device_detach(efx
->net_dev
);
2098 efx_reset_down(efx
, method
);
2100 rc
= efx
->type
->reset(efx
, method
);
2102 netif_err(efx
, drv
, efx
->net_dev
, "failed to reset hardware\n");
2106 /* Clear flags for the scopes we covered. We assume the NIC and
2107 * driver are now quiescent so that there is no race here.
2109 efx
->reset_pending
&= -(1 << (method
+ 1));
2111 /* Reinitialise bus-mastering, which may have been turned off before
2112 * the reset was scheduled. This is still appropriate, even in the
2113 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2114 * can respond to requests. */
2115 pci_set_master(efx
->pci_dev
);
2118 /* Leave device stopped if necessary */
2119 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
2120 rc2
= efx_reset_up(efx
, method
, !disabled
);
2128 dev_close(efx
->net_dev
);
2129 netif_err(efx
, drv
, efx
->net_dev
, "has been disabled\n");
2130 efx
->state
= STATE_DISABLED
;
2132 netif_dbg(efx
, drv
, efx
->net_dev
, "reset complete\n");
2133 netif_device_attach(efx
->net_dev
);
2138 /* The worker thread exists so that code that cannot sleep can
2139 * schedule a reset for later.
2141 static void efx_reset_work(struct work_struct
*data
)
2143 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
2144 unsigned long pending
= ACCESS_ONCE(efx
->reset_pending
);
2149 /* If we're not RUNNING then don't reset. Leave the reset_pending
2150 * flags set so that efx_pci_probe_main will be retried */
2151 if (efx
->state
!= STATE_RUNNING
) {
2152 netif_info(efx
, drv
, efx
->net_dev
,
2153 "scheduled reset quenched. NIC not RUNNING\n");
2158 (void)efx_reset(efx
, fls(pending
) - 1);
2162 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
2164 enum reset_type method
;
2167 case RESET_TYPE_INVISIBLE
:
2168 case RESET_TYPE_ALL
:
2169 case RESET_TYPE_WORLD
:
2170 case RESET_TYPE_DISABLE
:
2172 netif_dbg(efx
, drv
, efx
->net_dev
, "scheduling %s reset\n",
2173 RESET_TYPE(method
));
2176 method
= efx
->type
->map_reset_reason(type
);
2177 netif_dbg(efx
, drv
, efx
->net_dev
,
2178 "scheduling %s reset for %s\n",
2179 RESET_TYPE(method
), RESET_TYPE(type
));
2183 set_bit(method
, &efx
->reset_pending
);
2185 /* efx_process_channel() will no longer read events once a
2186 * reset is scheduled. So switch back to poll'd MCDI completions. */
2187 efx_mcdi_mode_poll(efx
);
2189 queue_work(reset_workqueue
, &efx
->reset_work
);
2192 /**************************************************************************
2194 * List of NICs we support
2196 **************************************************************************/
2198 /* PCI device ID table */
2199 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table
) = {
2200 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
,
2201 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0
),
2202 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
2203 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
,
2204 PCI_DEVICE_ID_SOLARFLARE_SFC4000B
),
2205 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
2206 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
, 0x0803), /* SFC9020 */
2207 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2208 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
, 0x0813), /* SFL9021 */
2209 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2210 {0} /* end of list */
2213 /**************************************************************************
2215 * Dummy PHY/MAC operations
2217 * Can be used for some unimplemented operations
2218 * Needed so all function pointers are valid and do not have to be tested
2221 **************************************************************************/
2222 int efx_port_dummy_op_int(struct efx_nic
*efx
)
2226 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
2228 static bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
2233 static const struct efx_phy_operations efx_dummy_phy_operations
= {
2234 .init
= efx_port_dummy_op_int
,
2235 .reconfigure
= efx_port_dummy_op_int
,
2236 .poll
= efx_port_dummy_op_poll
,
2237 .fini
= efx_port_dummy_op_void
,
2240 /**************************************************************************
2244 **************************************************************************/
2246 /* This zeroes out and then fills in the invariants in a struct
2247 * efx_nic (including all sub-structures).
2249 static int efx_init_struct(struct efx_nic
*efx
, const struct efx_nic_type
*type
,
2250 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
2254 /* Initialise common structures */
2255 memset(efx
, 0, sizeof(*efx
));
2256 spin_lock_init(&efx
->biu_lock
);
2257 #ifdef CONFIG_SFC_MTD
2258 INIT_LIST_HEAD(&efx
->mtd_list
);
2260 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
2261 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
2262 efx
->pci_dev
= pci_dev
;
2263 efx
->msg_enable
= debug
;
2264 efx
->state
= STATE_INIT
;
2265 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
2267 efx
->net_dev
= net_dev
;
2268 spin_lock_init(&efx
->stats_lock
);
2269 mutex_init(&efx
->mac_lock
);
2270 efx
->phy_op
= &efx_dummy_phy_operations
;
2271 efx
->mdio
.dev
= net_dev
;
2272 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
2274 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
2275 efx
->channel
[i
] = efx_alloc_channel(efx
, i
, NULL
);
2276 if (!efx
->channel
[i
])
2282 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2284 /* Higher numbered interrupt modes are less capable! */
2285 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2288 /* Would be good to use the net_dev name, but we're too early */
2289 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2291 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2292 if (!efx
->workqueue
)
2298 efx_fini_struct(efx
);
2302 static void efx_fini_struct(struct efx_nic
*efx
)
2306 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++)
2307 kfree(efx
->channel
[i
]);
2309 if (efx
->workqueue
) {
2310 destroy_workqueue(efx
->workqueue
);
2311 efx
->workqueue
= NULL
;
2315 /**************************************************************************
2319 **************************************************************************/
2321 /* Main body of final NIC shutdown code
2322 * This is called only at module unload (or hotplug removal).
2324 static void efx_pci_remove_main(struct efx_nic
*efx
)
2326 #ifdef CONFIG_RFS_ACCEL
2327 free_irq_cpu_rmap(efx
->net_dev
->rx_cpu_rmap
);
2328 efx
->net_dev
->rx_cpu_rmap
= NULL
;
2330 efx_nic_fini_interrupt(efx
);
2331 efx_fini_channels(efx
);
2333 efx
->type
->fini(efx
);
2335 efx_remove_all(efx
);
2338 /* Final NIC shutdown
2339 * This is called only at module unload (or hotplug removal).
2341 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2343 struct efx_nic
*efx
;
2345 efx
= pci_get_drvdata(pci_dev
);
2349 /* Mark the NIC as fini, then stop the interface */
2351 efx
->state
= STATE_FINI
;
2352 dev_close(efx
->net_dev
);
2354 /* Allow any queued efx_resets() to complete */
2357 efx_unregister_netdev(efx
);
2359 efx_mtd_remove(efx
);
2361 /* Wait for any scheduled resets to complete. No more will be
2362 * scheduled from this point because efx_stop_all() has been
2363 * called, we are no longer registered with driverlink, and
2364 * the net_device's have been removed. */
2365 cancel_work_sync(&efx
->reset_work
);
2367 efx_pci_remove_main(efx
);
2370 netif_dbg(efx
, drv
, efx
->net_dev
, "shutdown successful\n");
2372 pci_set_drvdata(pci_dev
, NULL
);
2373 efx_fini_struct(efx
);
2374 free_netdev(efx
->net_dev
);
2377 /* Main body of NIC initialisation
2378 * This is called at module load (or hotplug insertion, theoretically).
2380 static int efx_pci_probe_main(struct efx_nic
*efx
)
2384 /* Do start-of-day initialisation */
2385 rc
= efx_probe_all(efx
);
2391 rc
= efx
->type
->init(efx
);
2393 netif_err(efx
, probe
, efx
->net_dev
,
2394 "failed to initialise NIC\n");
2398 rc
= efx_init_port(efx
);
2400 netif_err(efx
, probe
, efx
->net_dev
,
2401 "failed to initialise port\n");
2405 efx_init_channels(efx
);
2407 rc
= efx_nic_init_interrupt(efx
);
2414 efx_fini_channels(efx
);
2417 efx
->type
->fini(efx
);
2420 efx_remove_all(efx
);
2425 /* NIC initialisation
2427 * This is called at module load (or hotplug insertion,
2428 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2429 * sets up and registers the network devices with the kernel and hooks
2430 * the interrupt service routine. It does not prepare the device for
2431 * transmission; this is left to the first time one of the network
2432 * interfaces is brought up (i.e. efx_net_open).
2434 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2435 const struct pci_device_id
*entry
)
2437 const struct efx_nic_type
*type
= (const struct efx_nic_type
*) entry
->driver_data
;
2438 struct net_device
*net_dev
;
2439 struct efx_nic
*efx
;
2442 /* Allocate and initialise a struct net_device and struct efx_nic */
2443 net_dev
= alloc_etherdev_mqs(sizeof(*efx
), EFX_MAX_CORE_TX_QUEUES
,
2447 net_dev
->features
|= (type
->offload_features
| NETIF_F_SG
|
2448 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2450 if (type
->offload_features
& NETIF_F_V6_CSUM
)
2451 net_dev
->features
|= NETIF_F_TSO6
;
2452 /* Mask for features that also apply to VLAN devices */
2453 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2454 NETIF_F_HIGHDMA
| NETIF_F_ALL_TSO
|
2456 /* All offloads can be toggled */
2457 net_dev
->hw_features
= net_dev
->features
& ~NETIF_F_HIGHDMA
;
2458 efx
= netdev_priv(net_dev
);
2459 pci_set_drvdata(pci_dev
, efx
);
2460 SET_NETDEV_DEV(net_dev
, &pci_dev
->dev
);
2461 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2465 netif_info(efx
, probe
, efx
->net_dev
,
2466 "Solarflare NIC detected\n");
2468 /* Set up basic I/O (BAR mappings etc) */
2469 rc
= efx_init_io(efx
);
2473 /* No serialisation is required with the reset path because
2474 * we're in STATE_INIT. */
2475 for (i
= 0; i
< 5; i
++) {
2476 rc
= efx_pci_probe_main(efx
);
2478 /* Serialise against efx_reset(). No more resets will be
2479 * scheduled since efx_stop_all() has been called, and we
2480 * have not and never have been registered with either
2481 * the rtnetlink or driverlink layers. */
2482 cancel_work_sync(&efx
->reset_work
);
2485 if (efx
->reset_pending
) {
2486 /* If there was a scheduled reset during
2487 * probe, the NIC is probably hosed anyway */
2488 efx_pci_remove_main(efx
);
2495 /* Retry if a recoverably reset event has been scheduled */
2496 if (efx
->reset_pending
&
2497 ~(1 << RESET_TYPE_INVISIBLE
| 1 << RESET_TYPE_ALL
) ||
2498 !efx
->reset_pending
)
2501 efx
->reset_pending
= 0;
2505 netif_err(efx
, probe
, efx
->net_dev
, "Could not reset NIC\n");
2509 /* Switch to the running state before we expose the device to the OS,
2510 * so that dev_open()|efx_start_all() will actually start the device */
2511 efx
->state
= STATE_RUNNING
;
2513 rc
= efx_register_netdev(efx
);
2517 netif_dbg(efx
, probe
, efx
->net_dev
, "initialisation successful\n");
2520 efx_mtd_probe(efx
); /* allowed to fail */
2525 efx_pci_remove_main(efx
);
2530 efx_fini_struct(efx
);
2533 netif_dbg(efx
, drv
, efx
->net_dev
, "initialisation failed. rc=%d\n", rc
);
2534 free_netdev(net_dev
);
2538 static int efx_pm_freeze(struct device
*dev
)
2540 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2542 efx
->state
= STATE_FINI
;
2544 netif_device_detach(efx
->net_dev
);
2547 efx_fini_channels(efx
);
2552 static int efx_pm_thaw(struct device
*dev
)
2554 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2556 efx
->state
= STATE_INIT
;
2558 efx_init_channels(efx
);
2560 mutex_lock(&efx
->mac_lock
);
2561 efx
->phy_op
->reconfigure(efx
);
2562 mutex_unlock(&efx
->mac_lock
);
2566 netif_device_attach(efx
->net_dev
);
2568 efx
->state
= STATE_RUNNING
;
2570 efx
->type
->resume_wol(efx
);
2572 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2573 queue_work(reset_workqueue
, &efx
->reset_work
);
2578 static int efx_pm_poweroff(struct device
*dev
)
2580 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2581 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2583 efx
->type
->fini(efx
);
2585 efx
->reset_pending
= 0;
2587 pci_save_state(pci_dev
);
2588 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2591 /* Used for both resume and restore */
2592 static int efx_pm_resume(struct device
*dev
)
2594 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2595 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2598 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2601 pci_restore_state(pci_dev
);
2602 rc
= pci_enable_device(pci_dev
);
2605 pci_set_master(efx
->pci_dev
);
2606 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2609 rc
= efx
->type
->init(efx
);
2616 static int efx_pm_suspend(struct device
*dev
)
2621 rc
= efx_pm_poweroff(dev
);
2627 static const struct dev_pm_ops efx_pm_ops
= {
2628 .suspend
= efx_pm_suspend
,
2629 .resume
= efx_pm_resume
,
2630 .freeze
= efx_pm_freeze
,
2631 .thaw
= efx_pm_thaw
,
2632 .poweroff
= efx_pm_poweroff
,
2633 .restore
= efx_pm_resume
,
2636 static struct pci_driver efx_pci_driver
= {
2637 .name
= KBUILD_MODNAME
,
2638 .id_table
= efx_pci_table
,
2639 .probe
= efx_pci_probe
,
2640 .remove
= efx_pci_remove
,
2641 .driver
.pm
= &efx_pm_ops
,
2644 /**************************************************************************
2646 * Kernel module interface
2648 *************************************************************************/
2650 module_param(interrupt_mode
, uint
, 0444);
2651 MODULE_PARM_DESC(interrupt_mode
,
2652 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2654 static int __init
efx_init_module(void)
2658 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2660 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2664 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2665 if (!reset_workqueue
) {
2670 rc
= pci_register_driver(&efx_pci_driver
);
2677 destroy_workqueue(reset_workqueue
);
2679 unregister_netdevice_notifier(&efx_netdev_notifier
);
2684 static void __exit
efx_exit_module(void)
2686 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2688 pci_unregister_driver(&efx_pci_driver
);
2689 destroy_workqueue(reset_workqueue
);
2690 unregister_netdevice_notifier(&efx_netdev_notifier
);
2694 module_init(efx_init_module
);
2695 module_exit(efx_exit_module
);
2697 MODULE_AUTHOR("Solarflare Communications and "
2698 "Michael Brown <mbrown@fensystems.co.uk>");
2699 MODULE_DESCRIPTION("Solarflare Communications network driver");
2700 MODULE_LICENSE("GPL");
2701 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);