sfc: Remove efx_nic_type::push_multicast_hash operation
[deliverable/linux.git] / drivers / net / ethernet / sfc / efx.c
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
26 #include "efx.h"
27 #include "nic.h"
28
29 #include "mcdi.h"
30 #include "workarounds.h"
31
32 /**************************************************************************
33 *
34 * Type name strings
35 *
36 **************************************************************************
37 */
38
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
41 const char *const efx_loopback_mode_names[] = {
42 [LOOPBACK_NONE] = "NONE",
43 [LOOPBACK_DATA] = "DATAPATH",
44 [LOOPBACK_GMAC] = "GMAC",
45 [LOOPBACK_XGMII] = "XGMII",
46 [LOOPBACK_XGXS] = "XGXS",
47 [LOOPBACK_XAUI] = "XAUI",
48 [LOOPBACK_GMII] = "GMII",
49 [LOOPBACK_SGMII] = "SGMII",
50 [LOOPBACK_XGBR] = "XGBR",
51 [LOOPBACK_XFI] = "XFI",
52 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR] = "XFI_FAR",
56 [LOOPBACK_GPHY] = "GPHY",
57 [LOOPBACK_PHYXS] = "PHYXS",
58 [LOOPBACK_PCS] = "PCS",
59 [LOOPBACK_PMAPMD] = "PMA/PMD",
60 [LOOPBACK_XPORT] = "XPORT",
61 [LOOPBACK_XGMII_WS] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS] = "GMII_WS",
66 [LOOPBACK_XFI_WS] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
69 };
70
71 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
72 const char *const efx_reset_type_names[] = {
73 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
74 [RESET_TYPE_ALL] = "ALL",
75 [RESET_TYPE_WORLD] = "WORLD",
76 [RESET_TYPE_DISABLE] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
84 };
85
86 #define EFX_MAX_MTU (9 * 1024)
87
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
91 */
92 static struct workqueue_struct *reset_workqueue;
93
94 /**************************************************************************
95 *
96 * Configurable values
97 *
98 *************************************************************************/
99
100 /*
101 * Use separate channels for TX and RX events
102 *
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
105 *
106 * This is only used in MSI-X interrupt mode
107 */
108 static unsigned int separate_tx_channels;
109 module_param(separate_tx_channels, uint, 0444);
110 MODULE_PARM_DESC(separate_tx_channels,
111 "Use separate channels for TX and RX");
112
113 /* This is the weight assigned to each of the (per-channel) virtual
114 * NAPI devices.
115 */
116 static int napi_weight = 64;
117
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
122 */
123 static unsigned int efx_monitor_interval = 1 * HZ;
124
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
127 *
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
130 */
131 static unsigned int rx_irq_mod_usec = 60;
132
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
135 *
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
141 */
142 static unsigned int tx_irq_mod_usec = 150;
143
144 /* This is the first interrupt mode to try out of:
145 * 0 => MSI-X
146 * 1 => MSI
147 * 2 => legacy
148 */
149 static unsigned int interrupt_mode;
150
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
154 *
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
157 */
158 static unsigned int rss_cpus;
159 module_param(rss_cpus, uint, 0444);
160 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
161
162 static int phy_flash_cfg;
163 module_param(phy_flash_cfg, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
165
166 static unsigned irq_adapt_low_thresh = 10000;
167 module_param(irq_adapt_low_thresh, uint, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh,
169 "Threshold score for reducing IRQ moderation");
170
171 static unsigned irq_adapt_high_thresh = 20000;
172 module_param(irq_adapt_high_thresh, uint, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh,
174 "Threshold score for increasing IRQ moderation");
175
176 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
177 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
178 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
179 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
180 module_param(debug, uint, 0);
181 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
182
183 /**************************************************************************
184 *
185 * Utility functions and prototypes
186 *
187 *************************************************************************/
188
189 static void efx_remove_channels(struct efx_nic *efx);
190 static void efx_remove_port(struct efx_nic *efx);
191 static void efx_init_napi(struct efx_nic *efx);
192 static void efx_fini_napi(struct efx_nic *efx);
193 static void efx_fini_napi_channel(struct efx_channel *channel);
194 static void efx_fini_struct(struct efx_nic *efx);
195 static void efx_start_all(struct efx_nic *efx);
196 static void efx_stop_all(struct efx_nic *efx);
197
198 #define EFX_ASSERT_RESET_SERIALISED(efx) \
199 do { \
200 if ((efx->state == STATE_RUNNING) || \
201 (efx->state == STATE_DISABLED)) \
202 ASSERT_RTNL(); \
203 } while (0)
204
205 /**************************************************************************
206 *
207 * Event queue processing
208 *
209 *************************************************************************/
210
211 /* Process channel's event queue
212 *
213 * This function is responsible for processing the event queue of a
214 * single channel. The caller must guarantee that this function will
215 * never be concurrently called more than once on the same channel,
216 * though different channels may be being processed concurrently.
217 */
218 static int efx_process_channel(struct efx_channel *channel, int budget)
219 {
220 struct efx_nic *efx = channel->efx;
221 int spent;
222
223 if (unlikely(efx->reset_pending || !channel->enabled))
224 return 0;
225
226 spent = efx_nic_process_eventq(channel, budget);
227 if (spent == 0)
228 return 0;
229
230 /* Deliver last RX packet. */
231 if (channel->rx_pkt) {
232 __efx_rx_packet(channel, channel->rx_pkt,
233 channel->rx_pkt_csummed);
234 channel->rx_pkt = NULL;
235 }
236
237 efx_rx_strategy(channel);
238
239 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel));
240
241 return spent;
242 }
243
244 /* Mark channel as finished processing
245 *
246 * Note that since we will not receive further interrupts for this
247 * channel before we finish processing and call the eventq_read_ack()
248 * method, there is no need to use the interrupt hold-off timers.
249 */
250 static inline void efx_channel_processed(struct efx_channel *channel)
251 {
252 /* The interrupt handler for this channel may set work_pending
253 * as soon as we acknowledge the events we've seen. Make sure
254 * it's cleared before then. */
255 channel->work_pending = false;
256 smp_wmb();
257
258 efx_nic_eventq_read_ack(channel);
259 }
260
261 /* NAPI poll handler
262 *
263 * NAPI guarantees serialisation of polls of the same device, which
264 * provides the guarantee required by efx_process_channel().
265 */
266 static int efx_poll(struct napi_struct *napi, int budget)
267 {
268 struct efx_channel *channel =
269 container_of(napi, struct efx_channel, napi_str);
270 struct efx_nic *efx = channel->efx;
271 int spent;
272
273 netif_vdbg(efx, intr, efx->net_dev,
274 "channel %d NAPI poll executing on CPU %d\n",
275 channel->channel, raw_smp_processor_id());
276
277 spent = efx_process_channel(channel, budget);
278
279 if (spent < budget) {
280 if (channel->channel < efx->n_rx_channels &&
281 efx->irq_rx_adaptive &&
282 unlikely(++channel->irq_count == 1000)) {
283 if (unlikely(channel->irq_mod_score <
284 irq_adapt_low_thresh)) {
285 if (channel->irq_moderation > 1) {
286 channel->irq_moderation -= 1;
287 efx->type->push_irq_moderation(channel);
288 }
289 } else if (unlikely(channel->irq_mod_score >
290 irq_adapt_high_thresh)) {
291 if (channel->irq_moderation <
292 efx->irq_rx_moderation) {
293 channel->irq_moderation += 1;
294 efx->type->push_irq_moderation(channel);
295 }
296 }
297 channel->irq_count = 0;
298 channel->irq_mod_score = 0;
299 }
300
301 efx_filter_rfs_expire(channel);
302
303 /* There is no race here; although napi_disable() will
304 * only wait for napi_complete(), this isn't a problem
305 * since efx_channel_processed() will have no effect if
306 * interrupts have already been disabled.
307 */
308 napi_complete(napi);
309 efx_channel_processed(channel);
310 }
311
312 return spent;
313 }
314
315 /* Process the eventq of the specified channel immediately on this CPU
316 *
317 * Disable hardware generated interrupts, wait for any existing
318 * processing to finish, then directly poll (and ack ) the eventq.
319 * Finally reenable NAPI and interrupts.
320 *
321 * This is for use only during a loopback self-test. It must not
322 * deliver any packets up the stack as this can result in deadlock.
323 */
324 void efx_process_channel_now(struct efx_channel *channel)
325 {
326 struct efx_nic *efx = channel->efx;
327
328 BUG_ON(channel->channel >= efx->n_channels);
329 BUG_ON(!channel->enabled);
330 BUG_ON(!efx->loopback_selftest);
331
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx);
334 if (efx->legacy_irq) {
335 synchronize_irq(efx->legacy_irq);
336 efx->legacy_irq_enabled = false;
337 }
338 if (channel->irq)
339 synchronize_irq(channel->irq);
340
341 /* Wait for any NAPI processing to complete */
342 napi_disable(&channel->napi_str);
343
344 /* Poll the channel */
345 efx_process_channel(channel, channel->eventq_mask + 1);
346
347 /* Ack the eventq. This may cause an interrupt to be generated
348 * when they are reenabled */
349 efx_channel_processed(channel);
350
351 napi_enable(&channel->napi_str);
352 if (efx->legacy_irq)
353 efx->legacy_irq_enabled = true;
354 efx_nic_enable_interrupts(efx);
355 }
356
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
361 */
362 static int efx_probe_eventq(struct efx_channel *channel)
363 {
364 struct efx_nic *efx = channel->efx;
365 unsigned long entries;
366
367 netif_dbg(channel->efx, probe, channel->efx->net_dev,
368 "chan %d create event queue\n", channel->channel);
369
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
373 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
374 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
375
376 return efx_nic_probe_eventq(channel);
377 }
378
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel *channel)
381 {
382 netif_dbg(channel->efx, drv, channel->efx->net_dev,
383 "chan %d init event queue\n", channel->channel);
384
385 channel->eventq_read_ptr = 0;
386
387 efx_nic_init_eventq(channel);
388 }
389
390 static void efx_fini_eventq(struct efx_channel *channel)
391 {
392 netif_dbg(channel->efx, drv, channel->efx->net_dev,
393 "chan %d fini event queue\n", channel->channel);
394
395 efx_nic_fini_eventq(channel);
396 }
397
398 static void efx_remove_eventq(struct efx_channel *channel)
399 {
400 netif_dbg(channel->efx, drv, channel->efx->net_dev,
401 "chan %d remove event queue\n", channel->channel);
402
403 efx_nic_remove_eventq(channel);
404 }
405
406 /**************************************************************************
407 *
408 * Channel handling
409 *
410 *************************************************************************/
411
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel *
415 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
416 {
417 struct efx_channel *channel;
418 struct efx_rx_queue *rx_queue;
419 struct efx_tx_queue *tx_queue;
420 int j;
421
422 if (old_channel) {
423 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
424 if (!channel)
425 return NULL;
426
427 *channel = *old_channel;
428
429 channel->napi_dev = NULL;
430 memset(&channel->eventq, 0, sizeof(channel->eventq));
431
432 rx_queue = &channel->rx_queue;
433 rx_queue->buffer = NULL;
434 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
435
436 for (j = 0; j < EFX_TXQ_TYPES; j++) {
437 tx_queue = &channel->tx_queue[j];
438 if (tx_queue->channel)
439 tx_queue->channel = channel;
440 tx_queue->buffer = NULL;
441 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
442 }
443 } else {
444 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
445 if (!channel)
446 return NULL;
447
448 channel->efx = efx;
449 channel->channel = i;
450
451 for (j = 0; j < EFX_TXQ_TYPES; j++) {
452 tx_queue = &channel->tx_queue[j];
453 tx_queue->efx = efx;
454 tx_queue->queue = i * EFX_TXQ_TYPES + j;
455 tx_queue->channel = channel;
456 }
457 }
458
459 rx_queue = &channel->rx_queue;
460 rx_queue->efx = efx;
461 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill,
462 (unsigned long)rx_queue);
463
464 return channel;
465 }
466
467 static int efx_probe_channel(struct efx_channel *channel)
468 {
469 struct efx_tx_queue *tx_queue;
470 struct efx_rx_queue *rx_queue;
471 int rc;
472
473 netif_dbg(channel->efx, probe, channel->efx->net_dev,
474 "creating channel %d\n", channel->channel);
475
476 rc = efx_probe_eventq(channel);
477 if (rc)
478 goto fail1;
479
480 efx_for_each_channel_tx_queue(tx_queue, channel) {
481 rc = efx_probe_tx_queue(tx_queue);
482 if (rc)
483 goto fail2;
484 }
485
486 efx_for_each_channel_rx_queue(rx_queue, channel) {
487 rc = efx_probe_rx_queue(rx_queue);
488 if (rc)
489 goto fail3;
490 }
491
492 channel->n_rx_frm_trunc = 0;
493
494 return 0;
495
496 fail3:
497 efx_for_each_channel_rx_queue(rx_queue, channel)
498 efx_remove_rx_queue(rx_queue);
499 fail2:
500 efx_for_each_channel_tx_queue(tx_queue, channel)
501 efx_remove_tx_queue(tx_queue);
502 fail1:
503 return rc;
504 }
505
506
507 static void efx_set_channel_names(struct efx_nic *efx)
508 {
509 struct efx_channel *channel;
510 const char *type = "";
511 int number;
512
513 efx_for_each_channel(channel, efx) {
514 number = channel->channel;
515 if (efx->n_channels > efx->n_rx_channels) {
516 if (channel->channel < efx->n_rx_channels) {
517 type = "-rx";
518 } else {
519 type = "-tx";
520 number -= efx->n_rx_channels;
521 }
522 }
523 snprintf(efx->channel_name[channel->channel],
524 sizeof(efx->channel_name[0]),
525 "%s%s-%d", efx->name, type, number);
526 }
527 }
528
529 static int efx_probe_channels(struct efx_nic *efx)
530 {
531 struct efx_channel *channel;
532 int rc;
533
534 /* Restart special buffer allocation */
535 efx->next_buffer_table = 0;
536
537 efx_for_each_channel(channel, efx) {
538 rc = efx_probe_channel(channel);
539 if (rc) {
540 netif_err(efx, probe, efx->net_dev,
541 "failed to create channel %d\n",
542 channel->channel);
543 goto fail;
544 }
545 }
546 efx_set_channel_names(efx);
547
548 return 0;
549
550 fail:
551 efx_remove_channels(efx);
552 return rc;
553 }
554
555 /* Channels are shutdown and reinitialised whilst the NIC is running
556 * to propagate configuration changes (mtu, checksum offload), or
557 * to clear hardware error conditions
558 */
559 static void efx_init_channels(struct efx_nic *efx)
560 {
561 struct efx_tx_queue *tx_queue;
562 struct efx_rx_queue *rx_queue;
563 struct efx_channel *channel;
564
565 /* Calculate the rx buffer allocation parameters required to
566 * support the current MTU, including padding for header
567 * alignment and overruns.
568 */
569 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
570 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
571 efx->type->rx_buffer_hash_size +
572 efx->type->rx_buffer_padding);
573 efx->rx_buffer_order = get_order(efx->rx_buffer_len +
574 sizeof(struct efx_rx_page_state));
575
576 /* Initialise the channels */
577 efx_for_each_channel(channel, efx) {
578 netif_dbg(channel->efx, drv, channel->efx->net_dev,
579 "init chan %d\n", channel->channel);
580
581 efx_init_eventq(channel);
582
583 efx_for_each_channel_tx_queue(tx_queue, channel)
584 efx_init_tx_queue(tx_queue);
585
586 /* The rx buffer allocation strategy is MTU dependent */
587 efx_rx_strategy(channel);
588
589 efx_for_each_channel_rx_queue(rx_queue, channel)
590 efx_init_rx_queue(rx_queue);
591
592 WARN_ON(channel->rx_pkt != NULL);
593 efx_rx_strategy(channel);
594 }
595 }
596
597 /* This enables event queue processing and packet transmission.
598 *
599 * Note that this function is not allowed to fail, since that would
600 * introduce too much complexity into the suspend/resume path.
601 */
602 static void efx_start_channel(struct efx_channel *channel)
603 {
604 struct efx_rx_queue *rx_queue;
605
606 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
607 "starting chan %d\n", channel->channel);
608
609 /* The interrupt handler for this channel may set work_pending
610 * as soon as we enable it. Make sure it's cleared before
611 * then. Similarly, make sure it sees the enabled flag set. */
612 channel->work_pending = false;
613 channel->enabled = true;
614 smp_wmb();
615
616 /* Fill the queues before enabling NAPI */
617 efx_for_each_channel_rx_queue(rx_queue, channel)
618 efx_fast_push_rx_descriptors(rx_queue);
619
620 napi_enable(&channel->napi_str);
621 }
622
623 /* This disables event queue processing and packet transmission.
624 * This function does not guarantee that all queue processing
625 * (e.g. RX refill) is complete.
626 */
627 static void efx_stop_channel(struct efx_channel *channel)
628 {
629 if (!channel->enabled)
630 return;
631
632 netif_dbg(channel->efx, ifdown, channel->efx->net_dev,
633 "stop chan %d\n", channel->channel);
634
635 channel->enabled = false;
636 napi_disable(&channel->napi_str);
637 }
638
639 static void efx_fini_channels(struct efx_nic *efx)
640 {
641 struct efx_channel *channel;
642 struct efx_tx_queue *tx_queue;
643 struct efx_rx_queue *rx_queue;
644 int rc;
645
646 EFX_ASSERT_RESET_SERIALISED(efx);
647 BUG_ON(efx->port_enabled);
648
649 rc = efx_nic_flush_queues(efx);
650 if (rc && EFX_WORKAROUND_7803(efx)) {
651 /* Schedule a reset to recover from the flush failure. The
652 * descriptor caches reference memory we're about to free,
653 * but falcon_reconfigure_mac_wrapper() won't reconnect
654 * the MACs because of the pending reset. */
655 netif_err(efx, drv, efx->net_dev,
656 "Resetting to recover from flush failure\n");
657 efx_schedule_reset(efx, RESET_TYPE_ALL);
658 } else if (rc) {
659 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
660 } else {
661 netif_dbg(efx, drv, efx->net_dev,
662 "successfully flushed all queues\n");
663 }
664
665 efx_for_each_channel(channel, efx) {
666 netif_dbg(channel->efx, drv, channel->efx->net_dev,
667 "shut down chan %d\n", channel->channel);
668
669 efx_for_each_channel_rx_queue(rx_queue, channel)
670 efx_fini_rx_queue(rx_queue);
671 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
672 efx_fini_tx_queue(tx_queue);
673 efx_fini_eventq(channel);
674 }
675 }
676
677 static void efx_remove_channel(struct efx_channel *channel)
678 {
679 struct efx_tx_queue *tx_queue;
680 struct efx_rx_queue *rx_queue;
681
682 netif_dbg(channel->efx, drv, channel->efx->net_dev,
683 "destroy chan %d\n", channel->channel);
684
685 efx_for_each_channel_rx_queue(rx_queue, channel)
686 efx_remove_rx_queue(rx_queue);
687 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
688 efx_remove_tx_queue(tx_queue);
689 efx_remove_eventq(channel);
690 }
691
692 static void efx_remove_channels(struct efx_nic *efx)
693 {
694 struct efx_channel *channel;
695
696 efx_for_each_channel(channel, efx)
697 efx_remove_channel(channel);
698 }
699
700 int
701 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
702 {
703 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
704 u32 old_rxq_entries, old_txq_entries;
705 unsigned i;
706 int rc;
707
708 efx_stop_all(efx);
709 efx_fini_channels(efx);
710
711 /* Clone channels */
712 memset(other_channel, 0, sizeof(other_channel));
713 for (i = 0; i < efx->n_channels; i++) {
714 channel = efx_alloc_channel(efx, i, efx->channel[i]);
715 if (!channel) {
716 rc = -ENOMEM;
717 goto out;
718 }
719 other_channel[i] = channel;
720 }
721
722 /* Swap entry counts and channel pointers */
723 old_rxq_entries = efx->rxq_entries;
724 old_txq_entries = efx->txq_entries;
725 efx->rxq_entries = rxq_entries;
726 efx->txq_entries = txq_entries;
727 for (i = 0; i < efx->n_channels; i++) {
728 channel = efx->channel[i];
729 efx->channel[i] = other_channel[i];
730 other_channel[i] = channel;
731 }
732
733 rc = efx_probe_channels(efx);
734 if (rc)
735 goto rollback;
736
737 efx_init_napi(efx);
738
739 /* Destroy old channels */
740 for (i = 0; i < efx->n_channels; i++) {
741 efx_fini_napi_channel(other_channel[i]);
742 efx_remove_channel(other_channel[i]);
743 }
744 out:
745 /* Free unused channel structures */
746 for (i = 0; i < efx->n_channels; i++)
747 kfree(other_channel[i]);
748
749 efx_init_channels(efx);
750 efx_start_all(efx);
751 return rc;
752
753 rollback:
754 /* Swap back */
755 efx->rxq_entries = old_rxq_entries;
756 efx->txq_entries = old_txq_entries;
757 for (i = 0; i < efx->n_channels; i++) {
758 channel = efx->channel[i];
759 efx->channel[i] = other_channel[i];
760 other_channel[i] = channel;
761 }
762 goto out;
763 }
764
765 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
766 {
767 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100));
768 }
769
770 /**************************************************************************
771 *
772 * Port handling
773 *
774 **************************************************************************/
775
776 /* This ensures that the kernel is kept informed (via
777 * netif_carrier_on/off) of the link status, and also maintains the
778 * link status's stop on the port's TX queue.
779 */
780 void efx_link_status_changed(struct efx_nic *efx)
781 {
782 struct efx_link_state *link_state = &efx->link_state;
783
784 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
785 * that no events are triggered between unregister_netdev() and the
786 * driver unloading. A more general condition is that NETDEV_CHANGE
787 * can only be generated between NETDEV_UP and NETDEV_DOWN */
788 if (!netif_running(efx->net_dev))
789 return;
790
791 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
792 efx->n_link_state_changes++;
793
794 if (link_state->up)
795 netif_carrier_on(efx->net_dev);
796 else
797 netif_carrier_off(efx->net_dev);
798 }
799
800 /* Status message for kernel log */
801 if (link_state->up) {
802 netif_info(efx, link, efx->net_dev,
803 "link up at %uMbps %s-duplex (MTU %d)%s\n",
804 link_state->speed, link_state->fd ? "full" : "half",
805 efx->net_dev->mtu,
806 (efx->promiscuous ? " [PROMISC]" : ""));
807 } else {
808 netif_info(efx, link, efx->net_dev, "link down\n");
809 }
810
811 }
812
813 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising)
814 {
815 efx->link_advertising = advertising;
816 if (advertising) {
817 if (advertising & ADVERTISED_Pause)
818 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
819 else
820 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
821 if (advertising & ADVERTISED_Asym_Pause)
822 efx->wanted_fc ^= EFX_FC_TX;
823 }
824 }
825
826 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
827 {
828 efx->wanted_fc = wanted_fc;
829 if (efx->link_advertising) {
830 if (wanted_fc & EFX_FC_RX)
831 efx->link_advertising |= (ADVERTISED_Pause |
832 ADVERTISED_Asym_Pause);
833 else
834 efx->link_advertising &= ~(ADVERTISED_Pause |
835 ADVERTISED_Asym_Pause);
836 if (wanted_fc & EFX_FC_TX)
837 efx->link_advertising ^= ADVERTISED_Asym_Pause;
838 }
839 }
840
841 static void efx_fini_port(struct efx_nic *efx);
842
843 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
844 * the MAC appropriately. All other PHY configuration changes are pushed
845 * through phy_op->set_settings(), and pushed asynchronously to the MAC
846 * through efx_monitor().
847 *
848 * Callers must hold the mac_lock
849 */
850 int __efx_reconfigure_port(struct efx_nic *efx)
851 {
852 enum efx_phy_mode phy_mode;
853 int rc;
854
855 WARN_ON(!mutex_is_locked(&efx->mac_lock));
856
857 /* Serialise the promiscuous flag with efx_set_multicast_list. */
858 if (efx_dev_registered(efx)) {
859 netif_addr_lock_bh(efx->net_dev);
860 netif_addr_unlock_bh(efx->net_dev);
861 }
862
863 /* Disable PHY transmit in mac level loopbacks */
864 phy_mode = efx->phy_mode;
865 if (LOOPBACK_INTERNAL(efx))
866 efx->phy_mode |= PHY_MODE_TX_DISABLED;
867 else
868 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
869
870 rc = efx->type->reconfigure_port(efx);
871
872 if (rc)
873 efx->phy_mode = phy_mode;
874
875 return rc;
876 }
877
878 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
879 * disabled. */
880 int efx_reconfigure_port(struct efx_nic *efx)
881 {
882 int rc;
883
884 EFX_ASSERT_RESET_SERIALISED(efx);
885
886 mutex_lock(&efx->mac_lock);
887 rc = __efx_reconfigure_port(efx);
888 mutex_unlock(&efx->mac_lock);
889
890 return rc;
891 }
892
893 /* Asynchronous work item for changing MAC promiscuity and multicast
894 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
895 * MAC directly. */
896 static void efx_mac_work(struct work_struct *data)
897 {
898 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
899
900 mutex_lock(&efx->mac_lock);
901 if (efx->port_enabled)
902 efx->type->reconfigure_mac(efx);
903 mutex_unlock(&efx->mac_lock);
904 }
905
906 static int efx_probe_port(struct efx_nic *efx)
907 {
908 int rc;
909
910 netif_dbg(efx, probe, efx->net_dev, "create port\n");
911
912 if (phy_flash_cfg)
913 efx->phy_mode = PHY_MODE_SPECIAL;
914
915 /* Connect up MAC/PHY operations table */
916 rc = efx->type->probe_port(efx);
917 if (rc)
918 return rc;
919
920 /* Initialise MAC address to permanent address */
921 memcpy(efx->net_dev->dev_addr, efx->net_dev->perm_addr, ETH_ALEN);
922
923 return 0;
924 }
925
926 static int efx_init_port(struct efx_nic *efx)
927 {
928 int rc;
929
930 netif_dbg(efx, drv, efx->net_dev, "init port\n");
931
932 mutex_lock(&efx->mac_lock);
933
934 rc = efx->phy_op->init(efx);
935 if (rc)
936 goto fail1;
937
938 efx->port_initialized = true;
939
940 /* Reconfigure the MAC before creating dma queues (required for
941 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
942 efx->type->reconfigure_mac(efx);
943
944 /* Ensure the PHY advertises the correct flow control settings */
945 rc = efx->phy_op->reconfigure(efx);
946 if (rc)
947 goto fail2;
948
949 mutex_unlock(&efx->mac_lock);
950 return 0;
951
952 fail2:
953 efx->phy_op->fini(efx);
954 fail1:
955 mutex_unlock(&efx->mac_lock);
956 return rc;
957 }
958
959 static void efx_start_port(struct efx_nic *efx)
960 {
961 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
962 BUG_ON(efx->port_enabled);
963
964 mutex_lock(&efx->mac_lock);
965 efx->port_enabled = true;
966
967 /* efx_mac_work() might have been scheduled after efx_stop_port(),
968 * and then cancelled by efx_flush_all() */
969 efx->type->reconfigure_mac(efx);
970
971 mutex_unlock(&efx->mac_lock);
972 }
973
974 /* Prevent efx_mac_work() and efx_monitor() from working */
975 static void efx_stop_port(struct efx_nic *efx)
976 {
977 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
978
979 mutex_lock(&efx->mac_lock);
980 efx->port_enabled = false;
981 mutex_unlock(&efx->mac_lock);
982
983 /* Serialise against efx_set_multicast_list() */
984 if (efx_dev_registered(efx)) {
985 netif_addr_lock_bh(efx->net_dev);
986 netif_addr_unlock_bh(efx->net_dev);
987 }
988 }
989
990 static void efx_fini_port(struct efx_nic *efx)
991 {
992 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
993
994 if (!efx->port_initialized)
995 return;
996
997 efx->phy_op->fini(efx);
998 efx->port_initialized = false;
999
1000 efx->link_state.up = false;
1001 efx_link_status_changed(efx);
1002 }
1003
1004 static void efx_remove_port(struct efx_nic *efx)
1005 {
1006 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1007
1008 efx->type->remove_port(efx);
1009 }
1010
1011 /**************************************************************************
1012 *
1013 * NIC handling
1014 *
1015 **************************************************************************/
1016
1017 /* This configures the PCI device to enable I/O and DMA. */
1018 static int efx_init_io(struct efx_nic *efx)
1019 {
1020 struct pci_dev *pci_dev = efx->pci_dev;
1021 dma_addr_t dma_mask = efx->type->max_dma_mask;
1022 int rc;
1023
1024 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1025
1026 rc = pci_enable_device(pci_dev);
1027 if (rc) {
1028 netif_err(efx, probe, efx->net_dev,
1029 "failed to enable PCI device\n");
1030 goto fail1;
1031 }
1032
1033 pci_set_master(pci_dev);
1034
1035 /* Set the PCI DMA mask. Try all possibilities from our
1036 * genuine mask down to 32 bits, because some architectures
1037 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1038 * masks event though they reject 46 bit masks.
1039 */
1040 while (dma_mask > 0x7fffffffUL) {
1041 if (pci_dma_supported(pci_dev, dma_mask)) {
1042 rc = pci_set_dma_mask(pci_dev, dma_mask);
1043 if (rc == 0)
1044 break;
1045 }
1046 dma_mask >>= 1;
1047 }
1048 if (rc) {
1049 netif_err(efx, probe, efx->net_dev,
1050 "could not find a suitable DMA mask\n");
1051 goto fail2;
1052 }
1053 netif_dbg(efx, probe, efx->net_dev,
1054 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1055 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
1056 if (rc) {
1057 /* pci_set_consistent_dma_mask() is not *allowed* to
1058 * fail with a mask that pci_set_dma_mask() accepted,
1059 * but just in case...
1060 */
1061 netif_err(efx, probe, efx->net_dev,
1062 "failed to set consistent DMA mask\n");
1063 goto fail2;
1064 }
1065
1066 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
1067 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
1068 if (rc) {
1069 netif_err(efx, probe, efx->net_dev,
1070 "request for memory BAR failed\n");
1071 rc = -EIO;
1072 goto fail3;
1073 }
1074 efx->membase = ioremap_nocache(efx->membase_phys,
1075 efx->type->mem_map_size);
1076 if (!efx->membase) {
1077 netif_err(efx, probe, efx->net_dev,
1078 "could not map memory BAR at %llx+%x\n",
1079 (unsigned long long)efx->membase_phys,
1080 efx->type->mem_map_size);
1081 rc = -ENOMEM;
1082 goto fail4;
1083 }
1084 netif_dbg(efx, probe, efx->net_dev,
1085 "memory BAR at %llx+%x (virtual %p)\n",
1086 (unsigned long long)efx->membase_phys,
1087 efx->type->mem_map_size, efx->membase);
1088
1089 return 0;
1090
1091 fail4:
1092 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1093 fail3:
1094 efx->membase_phys = 0;
1095 fail2:
1096 pci_disable_device(efx->pci_dev);
1097 fail1:
1098 return rc;
1099 }
1100
1101 static void efx_fini_io(struct efx_nic *efx)
1102 {
1103 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1104
1105 if (efx->membase) {
1106 iounmap(efx->membase);
1107 efx->membase = NULL;
1108 }
1109
1110 if (efx->membase_phys) {
1111 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
1112 efx->membase_phys = 0;
1113 }
1114
1115 pci_disable_device(efx->pci_dev);
1116 }
1117
1118 static int efx_wanted_parallelism(void)
1119 {
1120 cpumask_var_t thread_mask;
1121 int count;
1122 int cpu;
1123
1124 if (rss_cpus)
1125 return rss_cpus;
1126
1127 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1128 printk(KERN_WARNING
1129 "sfc: RSS disabled due to allocation failure\n");
1130 return 1;
1131 }
1132
1133 count = 0;
1134 for_each_online_cpu(cpu) {
1135 if (!cpumask_test_cpu(cpu, thread_mask)) {
1136 ++count;
1137 cpumask_or(thread_mask, thread_mask,
1138 topology_thread_cpumask(cpu));
1139 }
1140 }
1141
1142 free_cpumask_var(thread_mask);
1143 return count;
1144 }
1145
1146 static int
1147 efx_init_rx_cpu_rmap(struct efx_nic *efx, struct msix_entry *xentries)
1148 {
1149 #ifdef CONFIG_RFS_ACCEL
1150 int i, rc;
1151
1152 efx->net_dev->rx_cpu_rmap = alloc_irq_cpu_rmap(efx->n_rx_channels);
1153 if (!efx->net_dev->rx_cpu_rmap)
1154 return -ENOMEM;
1155 for (i = 0; i < efx->n_rx_channels; i++) {
1156 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
1157 xentries[i].vector);
1158 if (rc) {
1159 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
1160 efx->net_dev->rx_cpu_rmap = NULL;
1161 return rc;
1162 }
1163 }
1164 #endif
1165 return 0;
1166 }
1167
1168 /* Probe the number and type of interrupts we are able to obtain, and
1169 * the resulting numbers of channels and RX queues.
1170 */
1171 static int efx_probe_interrupts(struct efx_nic *efx)
1172 {
1173 int max_channels =
1174 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
1175 int rc, i;
1176
1177 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1178 struct msix_entry xentries[EFX_MAX_CHANNELS];
1179 int n_channels;
1180
1181 n_channels = efx_wanted_parallelism();
1182 if (separate_tx_channels)
1183 n_channels *= 2;
1184 n_channels = min(n_channels, max_channels);
1185
1186 for (i = 0; i < n_channels; i++)
1187 xentries[i].entry = i;
1188 rc = pci_enable_msix(efx->pci_dev, xentries, n_channels);
1189 if (rc > 0) {
1190 netif_err(efx, drv, efx->net_dev,
1191 "WARNING: Insufficient MSI-X vectors"
1192 " available (%d < %d).\n", rc, n_channels);
1193 netif_err(efx, drv, efx->net_dev,
1194 "WARNING: Performance may be reduced.\n");
1195 EFX_BUG_ON_PARANOID(rc >= n_channels);
1196 n_channels = rc;
1197 rc = pci_enable_msix(efx->pci_dev, xentries,
1198 n_channels);
1199 }
1200
1201 if (rc == 0) {
1202 efx->n_channels = n_channels;
1203 if (separate_tx_channels) {
1204 efx->n_tx_channels =
1205 max(efx->n_channels / 2, 1U);
1206 efx->n_rx_channels =
1207 max(efx->n_channels -
1208 efx->n_tx_channels, 1U);
1209 } else {
1210 efx->n_tx_channels = efx->n_channels;
1211 efx->n_rx_channels = efx->n_channels;
1212 }
1213 rc = efx_init_rx_cpu_rmap(efx, xentries);
1214 if (rc) {
1215 pci_disable_msix(efx->pci_dev);
1216 return rc;
1217 }
1218 for (i = 0; i < n_channels; i++)
1219 efx_get_channel(efx, i)->irq =
1220 xentries[i].vector;
1221 } else {
1222 /* Fall back to single channel MSI */
1223 efx->interrupt_mode = EFX_INT_MODE_MSI;
1224 netif_err(efx, drv, efx->net_dev,
1225 "could not enable MSI-X\n");
1226 }
1227 }
1228
1229 /* Try single interrupt MSI */
1230 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1231 efx->n_channels = 1;
1232 efx->n_rx_channels = 1;
1233 efx->n_tx_channels = 1;
1234 rc = pci_enable_msi(efx->pci_dev);
1235 if (rc == 0) {
1236 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1237 } else {
1238 netif_err(efx, drv, efx->net_dev,
1239 "could not enable MSI\n");
1240 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1241 }
1242 }
1243
1244 /* Assume legacy interrupts */
1245 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1246 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1247 efx->n_rx_channels = 1;
1248 efx->n_tx_channels = 1;
1249 efx->legacy_irq = efx->pci_dev->irq;
1250 }
1251
1252 return 0;
1253 }
1254
1255 static void efx_remove_interrupts(struct efx_nic *efx)
1256 {
1257 struct efx_channel *channel;
1258
1259 /* Remove MSI/MSI-X interrupts */
1260 efx_for_each_channel(channel, efx)
1261 channel->irq = 0;
1262 pci_disable_msi(efx->pci_dev);
1263 pci_disable_msix(efx->pci_dev);
1264
1265 /* Remove legacy interrupt */
1266 efx->legacy_irq = 0;
1267 }
1268
1269 static void efx_set_channels(struct efx_nic *efx)
1270 {
1271 struct efx_channel *channel;
1272 struct efx_tx_queue *tx_queue;
1273
1274 efx->tx_channel_offset =
1275 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0;
1276
1277 /* We need to adjust the TX queue numbers if we have separate
1278 * RX-only and TX-only channels.
1279 */
1280 efx_for_each_channel(channel, efx) {
1281 efx_for_each_channel_tx_queue(tx_queue, channel)
1282 tx_queue->queue -= (efx->tx_channel_offset *
1283 EFX_TXQ_TYPES);
1284 }
1285 }
1286
1287 static int efx_probe_nic(struct efx_nic *efx)
1288 {
1289 size_t i;
1290 int rc;
1291
1292 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1293
1294 /* Carry out hardware-type specific initialisation */
1295 rc = efx->type->probe(efx);
1296 if (rc)
1297 return rc;
1298
1299 /* Determine the number of channels and queues by trying to hook
1300 * in MSI-X interrupts. */
1301 rc = efx_probe_interrupts(efx);
1302 if (rc)
1303 goto fail;
1304
1305 if (efx->n_channels > 1)
1306 get_random_bytes(&efx->rx_hash_key, sizeof(efx->rx_hash_key));
1307 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++)
1308 efx->rx_indir_table[i] =
1309 ethtool_rxfh_indir_default(i, efx->n_rx_channels);
1310
1311 efx_set_channels(efx);
1312 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1313 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1314
1315 /* Initialise the interrupt moderation settings */
1316 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1317 true);
1318
1319 return 0;
1320
1321 fail:
1322 efx->type->remove(efx);
1323 return rc;
1324 }
1325
1326 static void efx_remove_nic(struct efx_nic *efx)
1327 {
1328 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1329
1330 efx_remove_interrupts(efx);
1331 efx->type->remove(efx);
1332 }
1333
1334 /**************************************************************************
1335 *
1336 * NIC startup/shutdown
1337 *
1338 *************************************************************************/
1339
1340 static int efx_probe_all(struct efx_nic *efx)
1341 {
1342 int rc;
1343
1344 rc = efx_probe_nic(efx);
1345 if (rc) {
1346 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1347 goto fail1;
1348 }
1349
1350 rc = efx_probe_port(efx);
1351 if (rc) {
1352 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1353 goto fail2;
1354 }
1355
1356 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1357 rc = efx_probe_channels(efx);
1358 if (rc)
1359 goto fail3;
1360
1361 rc = efx_probe_filters(efx);
1362 if (rc) {
1363 netif_err(efx, probe, efx->net_dev,
1364 "failed to create filter tables\n");
1365 goto fail4;
1366 }
1367
1368 return 0;
1369
1370 fail4:
1371 efx_remove_channels(efx);
1372 fail3:
1373 efx_remove_port(efx);
1374 fail2:
1375 efx_remove_nic(efx);
1376 fail1:
1377 return rc;
1378 }
1379
1380 /* Called after previous invocation(s) of efx_stop_all, restarts the
1381 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1382 * and ensures that the port is scheduled to be reconfigured.
1383 * This function is safe to call multiple times when the NIC is in any
1384 * state. */
1385 static void efx_start_all(struct efx_nic *efx)
1386 {
1387 struct efx_channel *channel;
1388
1389 EFX_ASSERT_RESET_SERIALISED(efx);
1390
1391 /* Check that it is appropriate to restart the interface. All
1392 * of these flags are safe to read under just the rtnl lock */
1393 if (efx->port_enabled)
1394 return;
1395 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1396 return;
1397 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1398 return;
1399
1400 /* Mark the port as enabled so port reconfigurations can start, then
1401 * restart the transmit interface early so the watchdog timer stops */
1402 efx_start_port(efx);
1403
1404 if (efx_dev_registered(efx) && netif_device_present(efx->net_dev))
1405 netif_tx_wake_all_queues(efx->net_dev);
1406
1407 efx_for_each_channel(channel, efx)
1408 efx_start_channel(channel);
1409
1410 if (efx->legacy_irq)
1411 efx->legacy_irq_enabled = true;
1412 efx_nic_enable_interrupts(efx);
1413
1414 /* Switch to event based MCDI completions after enabling interrupts.
1415 * If a reset has been scheduled, then we need to stay in polled mode.
1416 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1417 * reset_pending [modified from an atomic context], we instead guarantee
1418 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1419 efx_mcdi_mode_event(efx);
1420 if (efx->reset_pending)
1421 efx_mcdi_mode_poll(efx);
1422
1423 /* Start the hardware monitor if there is one. Otherwise (we're link
1424 * event driven), we have to poll the PHY because after an event queue
1425 * flush, we could have a missed a link state change */
1426 if (efx->type->monitor != NULL) {
1427 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1428 efx_monitor_interval);
1429 } else {
1430 mutex_lock(&efx->mac_lock);
1431 if (efx->phy_op->poll(efx))
1432 efx_link_status_changed(efx);
1433 mutex_unlock(&efx->mac_lock);
1434 }
1435
1436 efx->type->start_stats(efx);
1437 }
1438
1439 /* Flush all delayed work. Should only be called when no more delayed work
1440 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1441 * since we're holding the rtnl_lock at this point. */
1442 static void efx_flush_all(struct efx_nic *efx)
1443 {
1444 /* Make sure the hardware monitor is stopped */
1445 cancel_delayed_work_sync(&efx->monitor_work);
1446 /* Stop scheduled port reconfigurations */
1447 cancel_work_sync(&efx->mac_work);
1448 }
1449
1450 /* Quiesce hardware and software without bringing the link down.
1451 * Safe to call multiple times, when the nic and interface is in any
1452 * state. The caller is guaranteed to subsequently be in a position
1453 * to modify any hardware and software state they see fit without
1454 * taking locks. */
1455 static void efx_stop_all(struct efx_nic *efx)
1456 {
1457 struct efx_channel *channel;
1458
1459 EFX_ASSERT_RESET_SERIALISED(efx);
1460
1461 /* port_enabled can be read safely under the rtnl lock */
1462 if (!efx->port_enabled)
1463 return;
1464
1465 efx->type->stop_stats(efx);
1466
1467 /* Switch to MCDI polling on Siena before disabling interrupts */
1468 efx_mcdi_mode_poll(efx);
1469
1470 /* Disable interrupts and wait for ISR to complete */
1471 efx_nic_disable_interrupts(efx);
1472 if (efx->legacy_irq) {
1473 synchronize_irq(efx->legacy_irq);
1474 efx->legacy_irq_enabled = false;
1475 }
1476 efx_for_each_channel(channel, efx) {
1477 if (channel->irq)
1478 synchronize_irq(channel->irq);
1479 }
1480
1481 /* Stop all NAPI processing and synchronous rx refills */
1482 efx_for_each_channel(channel, efx)
1483 efx_stop_channel(channel);
1484
1485 /* Stop all asynchronous port reconfigurations. Since all
1486 * event processing has already been stopped, there is no
1487 * window to loose phy events */
1488 efx_stop_port(efx);
1489
1490 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1491 efx_flush_all(efx);
1492
1493 /* Stop the kernel transmit interface late, so the watchdog
1494 * timer isn't ticking over the flush */
1495 if (efx_dev_registered(efx)) {
1496 netif_tx_stop_all_queues(efx->net_dev);
1497 netif_tx_lock_bh(efx->net_dev);
1498 netif_tx_unlock_bh(efx->net_dev);
1499 }
1500 }
1501
1502 static void efx_remove_all(struct efx_nic *efx)
1503 {
1504 efx_remove_filters(efx);
1505 efx_remove_channels(efx);
1506 efx_remove_port(efx);
1507 efx_remove_nic(efx);
1508 }
1509
1510 /**************************************************************************
1511 *
1512 * Interrupt moderation
1513 *
1514 **************************************************************************/
1515
1516 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int resolution)
1517 {
1518 if (usecs == 0)
1519 return 0;
1520 if (usecs < resolution)
1521 return 1; /* never round down to 0 */
1522 return usecs / resolution;
1523 }
1524
1525 /* Set interrupt moderation parameters */
1526 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
1527 unsigned int rx_usecs, bool rx_adaptive,
1528 bool rx_may_override_tx)
1529 {
1530 struct efx_channel *channel;
1531 unsigned tx_ticks = irq_mod_ticks(tx_usecs, EFX_IRQ_MOD_RESOLUTION);
1532 unsigned rx_ticks = irq_mod_ticks(rx_usecs, EFX_IRQ_MOD_RESOLUTION);
1533
1534 EFX_ASSERT_RESET_SERIALISED(efx);
1535
1536 if (tx_ticks > EFX_IRQ_MOD_MAX || rx_ticks > EFX_IRQ_MOD_MAX)
1537 return -EINVAL;
1538
1539 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
1540 !rx_may_override_tx) {
1541 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
1542 "RX and TX IRQ moderation must be equal\n");
1543 return -EINVAL;
1544 }
1545
1546 efx->irq_rx_adaptive = rx_adaptive;
1547 efx->irq_rx_moderation = rx_ticks;
1548 efx_for_each_channel(channel, efx) {
1549 if (efx_channel_has_rx_queue(channel))
1550 channel->irq_moderation = rx_ticks;
1551 else if (efx_channel_has_tx_queues(channel))
1552 channel->irq_moderation = tx_ticks;
1553 }
1554
1555 return 0;
1556 }
1557
1558 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
1559 unsigned int *rx_usecs, bool *rx_adaptive)
1560 {
1561 *rx_adaptive = efx->irq_rx_adaptive;
1562 *rx_usecs = efx->irq_rx_moderation * EFX_IRQ_MOD_RESOLUTION;
1563
1564 /* If channels are shared between RX and TX, so is IRQ
1565 * moderation. Otherwise, IRQ moderation is the same for all
1566 * TX channels and is not adaptive.
1567 */
1568 if (efx->tx_channel_offset == 0)
1569 *tx_usecs = *rx_usecs;
1570 else
1571 *tx_usecs =
1572 efx->channel[efx->tx_channel_offset]->irq_moderation *
1573 EFX_IRQ_MOD_RESOLUTION;
1574 }
1575
1576 /**************************************************************************
1577 *
1578 * Hardware monitor
1579 *
1580 **************************************************************************/
1581
1582 /* Run periodically off the general workqueue */
1583 static void efx_monitor(struct work_struct *data)
1584 {
1585 struct efx_nic *efx = container_of(data, struct efx_nic,
1586 monitor_work.work);
1587
1588 netif_vdbg(efx, timer, efx->net_dev,
1589 "hardware monitor executing on CPU %d\n",
1590 raw_smp_processor_id());
1591 BUG_ON(efx->type->monitor == NULL);
1592
1593 /* If the mac_lock is already held then it is likely a port
1594 * reconfiguration is already in place, which will likely do
1595 * most of the work of monitor() anyway. */
1596 if (mutex_trylock(&efx->mac_lock)) {
1597 if (efx->port_enabled)
1598 efx->type->monitor(efx);
1599 mutex_unlock(&efx->mac_lock);
1600 }
1601
1602 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1603 efx_monitor_interval);
1604 }
1605
1606 /**************************************************************************
1607 *
1608 * ioctls
1609 *
1610 *************************************************************************/
1611
1612 /* Net device ioctl
1613 * Context: process, rtnl_lock() held.
1614 */
1615 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1616 {
1617 struct efx_nic *efx = netdev_priv(net_dev);
1618 struct mii_ioctl_data *data = if_mii(ifr);
1619
1620 EFX_ASSERT_RESET_SERIALISED(efx);
1621
1622 /* Convert phy_id from older PRTAD/DEVAD format */
1623 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1624 (data->phy_id & 0xfc00) == 0x0400)
1625 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1626
1627 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1628 }
1629
1630 /**************************************************************************
1631 *
1632 * NAPI interface
1633 *
1634 **************************************************************************/
1635
1636 static void efx_init_napi(struct efx_nic *efx)
1637 {
1638 struct efx_channel *channel;
1639
1640 efx_for_each_channel(channel, efx) {
1641 channel->napi_dev = efx->net_dev;
1642 netif_napi_add(channel->napi_dev, &channel->napi_str,
1643 efx_poll, napi_weight);
1644 }
1645 }
1646
1647 static void efx_fini_napi_channel(struct efx_channel *channel)
1648 {
1649 if (channel->napi_dev)
1650 netif_napi_del(&channel->napi_str);
1651 channel->napi_dev = NULL;
1652 }
1653
1654 static void efx_fini_napi(struct efx_nic *efx)
1655 {
1656 struct efx_channel *channel;
1657
1658 efx_for_each_channel(channel, efx)
1659 efx_fini_napi_channel(channel);
1660 }
1661
1662 /**************************************************************************
1663 *
1664 * Kernel netpoll interface
1665 *
1666 *************************************************************************/
1667
1668 #ifdef CONFIG_NET_POLL_CONTROLLER
1669
1670 /* Although in the common case interrupts will be disabled, this is not
1671 * guaranteed. However, all our work happens inside the NAPI callback,
1672 * so no locking is required.
1673 */
1674 static void efx_netpoll(struct net_device *net_dev)
1675 {
1676 struct efx_nic *efx = netdev_priv(net_dev);
1677 struct efx_channel *channel;
1678
1679 efx_for_each_channel(channel, efx)
1680 efx_schedule_channel(channel);
1681 }
1682
1683 #endif
1684
1685 /**************************************************************************
1686 *
1687 * Kernel net device interface
1688 *
1689 *************************************************************************/
1690
1691 /* Context: process, rtnl_lock() held. */
1692 static int efx_net_open(struct net_device *net_dev)
1693 {
1694 struct efx_nic *efx = netdev_priv(net_dev);
1695 EFX_ASSERT_RESET_SERIALISED(efx);
1696
1697 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
1698 raw_smp_processor_id());
1699
1700 if (efx->state == STATE_DISABLED)
1701 return -EIO;
1702 if (efx->phy_mode & PHY_MODE_SPECIAL)
1703 return -EBUSY;
1704 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
1705 return -EIO;
1706
1707 /* Notify the kernel of the link state polled during driver load,
1708 * before the monitor starts running */
1709 efx_link_status_changed(efx);
1710
1711 efx_start_all(efx);
1712 return 0;
1713 }
1714
1715 /* Context: process, rtnl_lock() held.
1716 * Note that the kernel will ignore our return code; this method
1717 * should really be a void.
1718 */
1719 static int efx_net_stop(struct net_device *net_dev)
1720 {
1721 struct efx_nic *efx = netdev_priv(net_dev);
1722
1723 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
1724 raw_smp_processor_id());
1725
1726 if (efx->state != STATE_DISABLED) {
1727 /* Stop the device and flush all the channels */
1728 efx_stop_all(efx);
1729 efx_fini_channels(efx);
1730 efx_init_channels(efx);
1731 }
1732
1733 return 0;
1734 }
1735
1736 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1737 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, struct rtnl_link_stats64 *stats)
1738 {
1739 struct efx_nic *efx = netdev_priv(net_dev);
1740 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1741
1742 spin_lock_bh(&efx->stats_lock);
1743
1744 efx->type->update_stats(efx);
1745
1746 stats->rx_packets = mac_stats->rx_packets;
1747 stats->tx_packets = mac_stats->tx_packets;
1748 stats->rx_bytes = mac_stats->rx_bytes;
1749 stats->tx_bytes = mac_stats->tx_bytes;
1750 stats->rx_dropped = efx->n_rx_nodesc_drop_cnt;
1751 stats->multicast = mac_stats->rx_multicast;
1752 stats->collisions = mac_stats->tx_collision;
1753 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1754 mac_stats->rx_length_error);
1755 stats->rx_crc_errors = mac_stats->rx_bad;
1756 stats->rx_frame_errors = mac_stats->rx_align_error;
1757 stats->rx_fifo_errors = mac_stats->rx_overflow;
1758 stats->rx_missed_errors = mac_stats->rx_missed;
1759 stats->tx_window_errors = mac_stats->tx_late_collision;
1760
1761 stats->rx_errors = (stats->rx_length_errors +
1762 stats->rx_crc_errors +
1763 stats->rx_frame_errors +
1764 mac_stats->rx_symbol_error);
1765 stats->tx_errors = (stats->tx_window_errors +
1766 mac_stats->tx_bad);
1767
1768 spin_unlock_bh(&efx->stats_lock);
1769
1770 return stats;
1771 }
1772
1773 /* Context: netif_tx_lock held, BHs disabled. */
1774 static void efx_watchdog(struct net_device *net_dev)
1775 {
1776 struct efx_nic *efx = netdev_priv(net_dev);
1777
1778 netif_err(efx, tx_err, efx->net_dev,
1779 "TX stuck with port_enabled=%d: resetting channels\n",
1780 efx->port_enabled);
1781
1782 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1783 }
1784
1785
1786 /* Context: process, rtnl_lock() held. */
1787 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1788 {
1789 struct efx_nic *efx = netdev_priv(net_dev);
1790 int rc = 0;
1791
1792 EFX_ASSERT_RESET_SERIALISED(efx);
1793
1794 if (new_mtu > EFX_MAX_MTU)
1795 return -EINVAL;
1796
1797 efx_stop_all(efx);
1798
1799 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
1800
1801 efx_fini_channels(efx);
1802
1803 mutex_lock(&efx->mac_lock);
1804 /* Reconfigure the MAC before enabling the dma queues so that
1805 * the RX buffers don't overflow */
1806 net_dev->mtu = new_mtu;
1807 efx->type->reconfigure_mac(efx);
1808 mutex_unlock(&efx->mac_lock);
1809
1810 efx_init_channels(efx);
1811
1812 efx_start_all(efx);
1813 return rc;
1814 }
1815
1816 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1817 {
1818 struct efx_nic *efx = netdev_priv(net_dev);
1819 struct sockaddr *addr = data;
1820 char *new_addr = addr->sa_data;
1821
1822 EFX_ASSERT_RESET_SERIALISED(efx);
1823
1824 if (!is_valid_ether_addr(new_addr)) {
1825 netif_err(efx, drv, efx->net_dev,
1826 "invalid ethernet MAC address requested: %pM\n",
1827 new_addr);
1828 return -EINVAL;
1829 }
1830
1831 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1832
1833 /* Reconfigure the MAC */
1834 mutex_lock(&efx->mac_lock);
1835 efx->type->reconfigure_mac(efx);
1836 mutex_unlock(&efx->mac_lock);
1837
1838 return 0;
1839 }
1840
1841 /* Context: netif_addr_lock held, BHs disabled. */
1842 static void efx_set_multicast_list(struct net_device *net_dev)
1843 {
1844 struct efx_nic *efx = netdev_priv(net_dev);
1845 struct netdev_hw_addr *ha;
1846 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1847 u32 crc;
1848 int bit;
1849
1850 efx->promiscuous = !!(net_dev->flags & IFF_PROMISC);
1851
1852 /* Build multicast hash table */
1853 if (efx->promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1854 memset(mc_hash, 0xff, sizeof(*mc_hash));
1855 } else {
1856 memset(mc_hash, 0x00, sizeof(*mc_hash));
1857 netdev_for_each_mc_addr(ha, net_dev) {
1858 crc = ether_crc_le(ETH_ALEN, ha->addr);
1859 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1860 set_bit_le(bit, mc_hash->byte);
1861 }
1862
1863 /* Broadcast packets go through the multicast hash filter.
1864 * ether_crc_le() of the broadcast address is 0xbe2612ff
1865 * so we always add bit 0xff to the mask.
1866 */
1867 set_bit_le(0xff, mc_hash->byte);
1868 }
1869
1870 if (efx->port_enabled)
1871 queue_work(efx->workqueue, &efx->mac_work);
1872 /* Otherwise efx_start_port() will do this */
1873 }
1874
1875 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
1876 {
1877 struct efx_nic *efx = netdev_priv(net_dev);
1878
1879 /* If disabling RX n-tuple filtering, clear existing filters */
1880 if (net_dev->features & ~data & NETIF_F_NTUPLE)
1881 efx_filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
1882
1883 return 0;
1884 }
1885
1886 static const struct net_device_ops efx_netdev_ops = {
1887 .ndo_open = efx_net_open,
1888 .ndo_stop = efx_net_stop,
1889 .ndo_get_stats64 = efx_net_stats,
1890 .ndo_tx_timeout = efx_watchdog,
1891 .ndo_start_xmit = efx_hard_start_xmit,
1892 .ndo_validate_addr = eth_validate_addr,
1893 .ndo_do_ioctl = efx_ioctl,
1894 .ndo_change_mtu = efx_change_mtu,
1895 .ndo_set_mac_address = efx_set_mac_address,
1896 .ndo_set_rx_mode = efx_set_multicast_list,
1897 .ndo_set_features = efx_set_features,
1898 #ifdef CONFIG_NET_POLL_CONTROLLER
1899 .ndo_poll_controller = efx_netpoll,
1900 #endif
1901 .ndo_setup_tc = efx_setup_tc,
1902 #ifdef CONFIG_RFS_ACCEL
1903 .ndo_rx_flow_steer = efx_filter_rfs,
1904 #endif
1905 };
1906
1907 static void efx_update_name(struct efx_nic *efx)
1908 {
1909 strcpy(efx->name, efx->net_dev->name);
1910 efx_mtd_rename(efx);
1911 efx_set_channel_names(efx);
1912 }
1913
1914 static int efx_netdev_event(struct notifier_block *this,
1915 unsigned long event, void *ptr)
1916 {
1917 struct net_device *net_dev = ptr;
1918
1919 if (net_dev->netdev_ops == &efx_netdev_ops &&
1920 event == NETDEV_CHANGENAME)
1921 efx_update_name(netdev_priv(net_dev));
1922
1923 return NOTIFY_DONE;
1924 }
1925
1926 static struct notifier_block efx_netdev_notifier = {
1927 .notifier_call = efx_netdev_event,
1928 };
1929
1930 static ssize_t
1931 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1932 {
1933 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1934 return sprintf(buf, "%d\n", efx->phy_type);
1935 }
1936 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1937
1938 static int efx_register_netdev(struct efx_nic *efx)
1939 {
1940 struct net_device *net_dev = efx->net_dev;
1941 struct efx_channel *channel;
1942 int rc;
1943
1944 net_dev->watchdog_timeo = 5 * HZ;
1945 net_dev->irq = efx->pci_dev->irq;
1946 net_dev->netdev_ops = &efx_netdev_ops;
1947 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1948
1949 rtnl_lock();
1950
1951 rc = dev_alloc_name(net_dev, net_dev->name);
1952 if (rc < 0)
1953 goto fail_locked;
1954 efx_update_name(efx);
1955
1956 rc = register_netdevice(net_dev);
1957 if (rc)
1958 goto fail_locked;
1959
1960 efx_for_each_channel(channel, efx) {
1961 struct efx_tx_queue *tx_queue;
1962 efx_for_each_channel_tx_queue(tx_queue, channel)
1963 efx_init_tx_queue_core_txq(tx_queue);
1964 }
1965
1966 /* Always start with carrier off; PHY events will detect the link */
1967 netif_carrier_off(efx->net_dev);
1968
1969 rtnl_unlock();
1970
1971 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1972 if (rc) {
1973 netif_err(efx, drv, efx->net_dev,
1974 "failed to init net dev attributes\n");
1975 goto fail_registered;
1976 }
1977
1978 return 0;
1979
1980 fail_locked:
1981 rtnl_unlock();
1982 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
1983 return rc;
1984
1985 fail_registered:
1986 unregister_netdev(net_dev);
1987 return rc;
1988 }
1989
1990 static void efx_unregister_netdev(struct efx_nic *efx)
1991 {
1992 struct efx_channel *channel;
1993 struct efx_tx_queue *tx_queue;
1994
1995 if (!efx->net_dev)
1996 return;
1997
1998 BUG_ON(netdev_priv(efx->net_dev) != efx);
1999
2000 /* Free up any skbs still remaining. This has to happen before
2001 * we try to unregister the netdev as running their destructors
2002 * may be needed to get the device ref. count to 0. */
2003 efx_for_each_channel(channel, efx) {
2004 efx_for_each_channel_tx_queue(tx_queue, channel)
2005 efx_release_tx_buffers(tx_queue);
2006 }
2007
2008 if (efx_dev_registered(efx)) {
2009 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2010 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2011 unregister_netdev(efx->net_dev);
2012 }
2013 }
2014
2015 /**************************************************************************
2016 *
2017 * Device reset and suspend
2018 *
2019 **************************************************************************/
2020
2021 /* Tears down the entire software state and most of the hardware state
2022 * before reset. */
2023 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2024 {
2025 EFX_ASSERT_RESET_SERIALISED(efx);
2026
2027 efx_stop_all(efx);
2028 mutex_lock(&efx->mac_lock);
2029
2030 efx_fini_channels(efx);
2031 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
2032 efx->phy_op->fini(efx);
2033 efx->type->fini(efx);
2034 }
2035
2036 /* This function will always ensure that the locks acquired in
2037 * efx_reset_down() are released. A failure return code indicates
2038 * that we were unable to reinitialise the hardware, and the
2039 * driver should be disabled. If ok is false, then the rx and tx
2040 * engines are not restarted, pending a RESET_DISABLE. */
2041 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2042 {
2043 int rc;
2044
2045 EFX_ASSERT_RESET_SERIALISED(efx);
2046
2047 rc = efx->type->init(efx);
2048 if (rc) {
2049 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2050 goto fail;
2051 }
2052
2053 if (!ok)
2054 goto fail;
2055
2056 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
2057 rc = efx->phy_op->init(efx);
2058 if (rc)
2059 goto fail;
2060 if (efx->phy_op->reconfigure(efx))
2061 netif_err(efx, drv, efx->net_dev,
2062 "could not restore PHY settings\n");
2063 }
2064
2065 efx->type->reconfigure_mac(efx);
2066
2067 efx_init_channels(efx);
2068 efx_restore_filters(efx);
2069
2070 mutex_unlock(&efx->mac_lock);
2071
2072 efx_start_all(efx);
2073
2074 return 0;
2075
2076 fail:
2077 efx->port_initialized = false;
2078
2079 mutex_unlock(&efx->mac_lock);
2080
2081 return rc;
2082 }
2083
2084 /* Reset the NIC using the specified method. Note that the reset may
2085 * fail, in which case the card will be left in an unusable state.
2086 *
2087 * Caller must hold the rtnl_lock.
2088 */
2089 int efx_reset(struct efx_nic *efx, enum reset_type method)
2090 {
2091 int rc, rc2;
2092 bool disabled;
2093
2094 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2095 RESET_TYPE(method));
2096
2097 netif_device_detach(efx->net_dev);
2098 efx_reset_down(efx, method);
2099
2100 rc = efx->type->reset(efx, method);
2101 if (rc) {
2102 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2103 goto out;
2104 }
2105
2106 /* Clear flags for the scopes we covered. We assume the NIC and
2107 * driver are now quiescent so that there is no race here.
2108 */
2109 efx->reset_pending &= -(1 << (method + 1));
2110
2111 /* Reinitialise bus-mastering, which may have been turned off before
2112 * the reset was scheduled. This is still appropriate, even in the
2113 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2114 * can respond to requests. */
2115 pci_set_master(efx->pci_dev);
2116
2117 out:
2118 /* Leave device stopped if necessary */
2119 disabled = rc || method == RESET_TYPE_DISABLE;
2120 rc2 = efx_reset_up(efx, method, !disabled);
2121 if (rc2) {
2122 disabled = true;
2123 if (!rc)
2124 rc = rc2;
2125 }
2126
2127 if (disabled) {
2128 dev_close(efx->net_dev);
2129 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2130 efx->state = STATE_DISABLED;
2131 } else {
2132 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2133 netif_device_attach(efx->net_dev);
2134 }
2135 return rc;
2136 }
2137
2138 /* The worker thread exists so that code that cannot sleep can
2139 * schedule a reset for later.
2140 */
2141 static void efx_reset_work(struct work_struct *data)
2142 {
2143 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2144 unsigned long pending = ACCESS_ONCE(efx->reset_pending);
2145
2146 if (!pending)
2147 return;
2148
2149 /* If we're not RUNNING then don't reset. Leave the reset_pending
2150 * flags set so that efx_pci_probe_main will be retried */
2151 if (efx->state != STATE_RUNNING) {
2152 netif_info(efx, drv, efx->net_dev,
2153 "scheduled reset quenched. NIC not RUNNING\n");
2154 return;
2155 }
2156
2157 rtnl_lock();
2158 (void)efx_reset(efx, fls(pending) - 1);
2159 rtnl_unlock();
2160 }
2161
2162 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2163 {
2164 enum reset_type method;
2165
2166 switch (type) {
2167 case RESET_TYPE_INVISIBLE:
2168 case RESET_TYPE_ALL:
2169 case RESET_TYPE_WORLD:
2170 case RESET_TYPE_DISABLE:
2171 method = type;
2172 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2173 RESET_TYPE(method));
2174 break;
2175 default:
2176 method = efx->type->map_reset_reason(type);
2177 netif_dbg(efx, drv, efx->net_dev,
2178 "scheduling %s reset for %s\n",
2179 RESET_TYPE(method), RESET_TYPE(type));
2180 break;
2181 }
2182
2183 set_bit(method, &efx->reset_pending);
2184
2185 /* efx_process_channel() will no longer read events once a
2186 * reset is scheduled. So switch back to poll'd MCDI completions. */
2187 efx_mcdi_mode_poll(efx);
2188
2189 queue_work(reset_workqueue, &efx->reset_work);
2190 }
2191
2192 /**************************************************************************
2193 *
2194 * List of NICs we support
2195 *
2196 **************************************************************************/
2197
2198 /* PCI device ID table */
2199 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table) = {
2200 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2201 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0),
2202 .driver_data = (unsigned long) &falcon_a1_nic_type},
2203 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE,
2204 PCI_DEVICE_ID_SOLARFLARE_SFC4000B),
2205 .driver_data = (unsigned long) &falcon_b0_nic_type},
2206 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2207 .driver_data = (unsigned long) &siena_a0_nic_type},
2208 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2209 .driver_data = (unsigned long) &siena_a0_nic_type},
2210 {0} /* end of list */
2211 };
2212
2213 /**************************************************************************
2214 *
2215 * Dummy PHY/MAC operations
2216 *
2217 * Can be used for some unimplemented operations
2218 * Needed so all function pointers are valid and do not have to be tested
2219 * before use
2220 *
2221 **************************************************************************/
2222 int efx_port_dummy_op_int(struct efx_nic *efx)
2223 {
2224 return 0;
2225 }
2226 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2227
2228 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2229 {
2230 return false;
2231 }
2232
2233 static const struct efx_phy_operations efx_dummy_phy_operations = {
2234 .init = efx_port_dummy_op_int,
2235 .reconfigure = efx_port_dummy_op_int,
2236 .poll = efx_port_dummy_op_poll,
2237 .fini = efx_port_dummy_op_void,
2238 };
2239
2240 /**************************************************************************
2241 *
2242 * Data housekeeping
2243 *
2244 **************************************************************************/
2245
2246 /* This zeroes out and then fills in the invariants in a struct
2247 * efx_nic (including all sub-structures).
2248 */
2249 static int efx_init_struct(struct efx_nic *efx, const struct efx_nic_type *type,
2250 struct pci_dev *pci_dev, struct net_device *net_dev)
2251 {
2252 int i;
2253
2254 /* Initialise common structures */
2255 memset(efx, 0, sizeof(*efx));
2256 spin_lock_init(&efx->biu_lock);
2257 #ifdef CONFIG_SFC_MTD
2258 INIT_LIST_HEAD(&efx->mtd_list);
2259 #endif
2260 INIT_WORK(&efx->reset_work, efx_reset_work);
2261 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
2262 efx->pci_dev = pci_dev;
2263 efx->msg_enable = debug;
2264 efx->state = STATE_INIT;
2265 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
2266
2267 efx->net_dev = net_dev;
2268 spin_lock_init(&efx->stats_lock);
2269 mutex_init(&efx->mac_lock);
2270 efx->phy_op = &efx_dummy_phy_operations;
2271 efx->mdio.dev = net_dev;
2272 INIT_WORK(&efx->mac_work, efx_mac_work);
2273
2274 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
2275 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
2276 if (!efx->channel[i])
2277 goto fail;
2278 }
2279
2280 efx->type = type;
2281
2282 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
2283
2284 /* Higher numbered interrupt modes are less capable! */
2285 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2286 interrupt_mode);
2287
2288 /* Would be good to use the net_dev name, but we're too early */
2289 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2290 pci_name(pci_dev));
2291 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2292 if (!efx->workqueue)
2293 goto fail;
2294
2295 return 0;
2296
2297 fail:
2298 efx_fini_struct(efx);
2299 return -ENOMEM;
2300 }
2301
2302 static void efx_fini_struct(struct efx_nic *efx)
2303 {
2304 int i;
2305
2306 for (i = 0; i < EFX_MAX_CHANNELS; i++)
2307 kfree(efx->channel[i]);
2308
2309 if (efx->workqueue) {
2310 destroy_workqueue(efx->workqueue);
2311 efx->workqueue = NULL;
2312 }
2313 }
2314
2315 /**************************************************************************
2316 *
2317 * PCI interface
2318 *
2319 **************************************************************************/
2320
2321 /* Main body of final NIC shutdown code
2322 * This is called only at module unload (or hotplug removal).
2323 */
2324 static void efx_pci_remove_main(struct efx_nic *efx)
2325 {
2326 #ifdef CONFIG_RFS_ACCEL
2327 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
2328 efx->net_dev->rx_cpu_rmap = NULL;
2329 #endif
2330 efx_nic_fini_interrupt(efx);
2331 efx_fini_channels(efx);
2332 efx_fini_port(efx);
2333 efx->type->fini(efx);
2334 efx_fini_napi(efx);
2335 efx_remove_all(efx);
2336 }
2337
2338 /* Final NIC shutdown
2339 * This is called only at module unload (or hotplug removal).
2340 */
2341 static void efx_pci_remove(struct pci_dev *pci_dev)
2342 {
2343 struct efx_nic *efx;
2344
2345 efx = pci_get_drvdata(pci_dev);
2346 if (!efx)
2347 return;
2348
2349 /* Mark the NIC as fini, then stop the interface */
2350 rtnl_lock();
2351 efx->state = STATE_FINI;
2352 dev_close(efx->net_dev);
2353
2354 /* Allow any queued efx_resets() to complete */
2355 rtnl_unlock();
2356
2357 efx_unregister_netdev(efx);
2358
2359 efx_mtd_remove(efx);
2360
2361 /* Wait for any scheduled resets to complete. No more will be
2362 * scheduled from this point because efx_stop_all() has been
2363 * called, we are no longer registered with driverlink, and
2364 * the net_device's have been removed. */
2365 cancel_work_sync(&efx->reset_work);
2366
2367 efx_pci_remove_main(efx);
2368
2369 efx_fini_io(efx);
2370 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
2371
2372 pci_set_drvdata(pci_dev, NULL);
2373 efx_fini_struct(efx);
2374 free_netdev(efx->net_dev);
2375 };
2376
2377 /* Main body of NIC initialisation
2378 * This is called at module load (or hotplug insertion, theoretically).
2379 */
2380 static int efx_pci_probe_main(struct efx_nic *efx)
2381 {
2382 int rc;
2383
2384 /* Do start-of-day initialisation */
2385 rc = efx_probe_all(efx);
2386 if (rc)
2387 goto fail1;
2388
2389 efx_init_napi(efx);
2390
2391 rc = efx->type->init(efx);
2392 if (rc) {
2393 netif_err(efx, probe, efx->net_dev,
2394 "failed to initialise NIC\n");
2395 goto fail3;
2396 }
2397
2398 rc = efx_init_port(efx);
2399 if (rc) {
2400 netif_err(efx, probe, efx->net_dev,
2401 "failed to initialise port\n");
2402 goto fail4;
2403 }
2404
2405 efx_init_channels(efx);
2406
2407 rc = efx_nic_init_interrupt(efx);
2408 if (rc)
2409 goto fail5;
2410
2411 return 0;
2412
2413 fail5:
2414 efx_fini_channels(efx);
2415 efx_fini_port(efx);
2416 fail4:
2417 efx->type->fini(efx);
2418 fail3:
2419 efx_fini_napi(efx);
2420 efx_remove_all(efx);
2421 fail1:
2422 return rc;
2423 }
2424
2425 /* NIC initialisation
2426 *
2427 * This is called at module load (or hotplug insertion,
2428 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2429 * sets up and registers the network devices with the kernel and hooks
2430 * the interrupt service routine. It does not prepare the device for
2431 * transmission; this is left to the first time one of the network
2432 * interfaces is brought up (i.e. efx_net_open).
2433 */
2434 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2435 const struct pci_device_id *entry)
2436 {
2437 const struct efx_nic_type *type = (const struct efx_nic_type *) entry->driver_data;
2438 struct net_device *net_dev;
2439 struct efx_nic *efx;
2440 int i, rc;
2441
2442 /* Allocate and initialise a struct net_device and struct efx_nic */
2443 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
2444 EFX_MAX_RX_QUEUES);
2445 if (!net_dev)
2446 return -ENOMEM;
2447 net_dev->features |= (type->offload_features | NETIF_F_SG |
2448 NETIF_F_HIGHDMA | NETIF_F_TSO |
2449 NETIF_F_RXCSUM);
2450 if (type->offload_features & NETIF_F_V6_CSUM)
2451 net_dev->features |= NETIF_F_TSO6;
2452 /* Mask for features that also apply to VLAN devices */
2453 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2454 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
2455 NETIF_F_RXCSUM);
2456 /* All offloads can be toggled */
2457 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA;
2458 efx = netdev_priv(net_dev);
2459 pci_set_drvdata(pci_dev, efx);
2460 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
2461 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2462 if (rc)
2463 goto fail1;
2464
2465 netif_info(efx, probe, efx->net_dev,
2466 "Solarflare NIC detected\n");
2467
2468 /* Set up basic I/O (BAR mappings etc) */
2469 rc = efx_init_io(efx);
2470 if (rc)
2471 goto fail2;
2472
2473 /* No serialisation is required with the reset path because
2474 * we're in STATE_INIT. */
2475 for (i = 0; i < 5; i++) {
2476 rc = efx_pci_probe_main(efx);
2477
2478 /* Serialise against efx_reset(). No more resets will be
2479 * scheduled since efx_stop_all() has been called, and we
2480 * have not and never have been registered with either
2481 * the rtnetlink or driverlink layers. */
2482 cancel_work_sync(&efx->reset_work);
2483
2484 if (rc == 0) {
2485 if (efx->reset_pending) {
2486 /* If there was a scheduled reset during
2487 * probe, the NIC is probably hosed anyway */
2488 efx_pci_remove_main(efx);
2489 rc = -EIO;
2490 } else {
2491 break;
2492 }
2493 }
2494
2495 /* Retry if a recoverably reset event has been scheduled */
2496 if (efx->reset_pending &
2497 ~(1 << RESET_TYPE_INVISIBLE | 1 << RESET_TYPE_ALL) ||
2498 !efx->reset_pending)
2499 goto fail3;
2500
2501 efx->reset_pending = 0;
2502 }
2503
2504 if (rc) {
2505 netif_err(efx, probe, efx->net_dev, "Could not reset NIC\n");
2506 goto fail4;
2507 }
2508
2509 /* Switch to the running state before we expose the device to the OS,
2510 * so that dev_open()|efx_start_all() will actually start the device */
2511 efx->state = STATE_RUNNING;
2512
2513 rc = efx_register_netdev(efx);
2514 if (rc)
2515 goto fail5;
2516
2517 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
2518
2519 rtnl_lock();
2520 efx_mtd_probe(efx); /* allowed to fail */
2521 rtnl_unlock();
2522 return 0;
2523
2524 fail5:
2525 efx_pci_remove_main(efx);
2526 fail4:
2527 fail3:
2528 efx_fini_io(efx);
2529 fail2:
2530 efx_fini_struct(efx);
2531 fail1:
2532 WARN_ON(rc > 0);
2533 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
2534 free_netdev(net_dev);
2535 return rc;
2536 }
2537
2538 static int efx_pm_freeze(struct device *dev)
2539 {
2540 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2541
2542 efx->state = STATE_FINI;
2543
2544 netif_device_detach(efx->net_dev);
2545
2546 efx_stop_all(efx);
2547 efx_fini_channels(efx);
2548
2549 return 0;
2550 }
2551
2552 static int efx_pm_thaw(struct device *dev)
2553 {
2554 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
2555
2556 efx->state = STATE_INIT;
2557
2558 efx_init_channels(efx);
2559
2560 mutex_lock(&efx->mac_lock);
2561 efx->phy_op->reconfigure(efx);
2562 mutex_unlock(&efx->mac_lock);
2563
2564 efx_start_all(efx);
2565
2566 netif_device_attach(efx->net_dev);
2567
2568 efx->state = STATE_RUNNING;
2569
2570 efx->type->resume_wol(efx);
2571
2572 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2573 queue_work(reset_workqueue, &efx->reset_work);
2574
2575 return 0;
2576 }
2577
2578 static int efx_pm_poweroff(struct device *dev)
2579 {
2580 struct pci_dev *pci_dev = to_pci_dev(dev);
2581 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2582
2583 efx->type->fini(efx);
2584
2585 efx->reset_pending = 0;
2586
2587 pci_save_state(pci_dev);
2588 return pci_set_power_state(pci_dev, PCI_D3hot);
2589 }
2590
2591 /* Used for both resume and restore */
2592 static int efx_pm_resume(struct device *dev)
2593 {
2594 struct pci_dev *pci_dev = to_pci_dev(dev);
2595 struct efx_nic *efx = pci_get_drvdata(pci_dev);
2596 int rc;
2597
2598 rc = pci_set_power_state(pci_dev, PCI_D0);
2599 if (rc)
2600 return rc;
2601 pci_restore_state(pci_dev);
2602 rc = pci_enable_device(pci_dev);
2603 if (rc)
2604 return rc;
2605 pci_set_master(efx->pci_dev);
2606 rc = efx->type->reset(efx, RESET_TYPE_ALL);
2607 if (rc)
2608 return rc;
2609 rc = efx->type->init(efx);
2610 if (rc)
2611 return rc;
2612 efx_pm_thaw(dev);
2613 return 0;
2614 }
2615
2616 static int efx_pm_suspend(struct device *dev)
2617 {
2618 int rc;
2619
2620 efx_pm_freeze(dev);
2621 rc = efx_pm_poweroff(dev);
2622 if (rc)
2623 efx_pm_resume(dev);
2624 return rc;
2625 }
2626
2627 static const struct dev_pm_ops efx_pm_ops = {
2628 .suspend = efx_pm_suspend,
2629 .resume = efx_pm_resume,
2630 .freeze = efx_pm_freeze,
2631 .thaw = efx_pm_thaw,
2632 .poweroff = efx_pm_poweroff,
2633 .restore = efx_pm_resume,
2634 };
2635
2636 static struct pci_driver efx_pci_driver = {
2637 .name = KBUILD_MODNAME,
2638 .id_table = efx_pci_table,
2639 .probe = efx_pci_probe,
2640 .remove = efx_pci_remove,
2641 .driver.pm = &efx_pm_ops,
2642 };
2643
2644 /**************************************************************************
2645 *
2646 * Kernel module interface
2647 *
2648 *************************************************************************/
2649
2650 module_param(interrupt_mode, uint, 0444);
2651 MODULE_PARM_DESC(interrupt_mode,
2652 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2653
2654 static int __init efx_init_module(void)
2655 {
2656 int rc;
2657
2658 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2659
2660 rc = register_netdevice_notifier(&efx_netdev_notifier);
2661 if (rc)
2662 goto err_notifier;
2663
2664 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2665 if (!reset_workqueue) {
2666 rc = -ENOMEM;
2667 goto err_reset;
2668 }
2669
2670 rc = pci_register_driver(&efx_pci_driver);
2671 if (rc < 0)
2672 goto err_pci;
2673
2674 return 0;
2675
2676 err_pci:
2677 destroy_workqueue(reset_workqueue);
2678 err_reset:
2679 unregister_netdevice_notifier(&efx_netdev_notifier);
2680 err_notifier:
2681 return rc;
2682 }
2683
2684 static void __exit efx_exit_module(void)
2685 {
2686 printk(KERN_INFO "Solarflare NET driver unloading\n");
2687
2688 pci_unregister_driver(&efx_pci_driver);
2689 destroy_workqueue(reset_workqueue);
2690 unregister_netdevice_notifier(&efx_netdev_notifier);
2691
2692 }
2693
2694 module_init(efx_init_module);
2695 module_exit(efx_exit_module);
2696
2697 MODULE_AUTHOR("Solarflare Communications and "
2698 "Michael Brown <mbrown@fensystems.co.uk>");
2699 MODULE_DESCRIPTION("Solarflare Communications network driver");
2700 MODULE_LICENSE("GPL");
2701 MODULE_DEVICE_TABLE(pci, efx_pci_table);
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