1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
18 #include <linux/tcp.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include <linux/gfp.h>
24 #include <linux/cpu_rmap.h>
25 #include "net_driver.h"
30 #include "workarounds.h"
32 /**************************************************************************
36 **************************************************************************
39 /* Loopback mode names (see LOOPBACK_MODE()) */
40 const unsigned int efx_loopback_mode_max
= LOOPBACK_MAX
;
41 const char *const efx_loopback_mode_names
[] = {
42 [LOOPBACK_NONE
] = "NONE",
43 [LOOPBACK_DATA
] = "DATAPATH",
44 [LOOPBACK_GMAC
] = "GMAC",
45 [LOOPBACK_XGMII
] = "XGMII",
46 [LOOPBACK_XGXS
] = "XGXS",
47 [LOOPBACK_XAUI
] = "XAUI",
48 [LOOPBACK_GMII
] = "GMII",
49 [LOOPBACK_SGMII
] = "SGMII",
50 [LOOPBACK_XGBR
] = "XGBR",
51 [LOOPBACK_XFI
] = "XFI",
52 [LOOPBACK_XAUI_FAR
] = "XAUI_FAR",
53 [LOOPBACK_GMII_FAR
] = "GMII_FAR",
54 [LOOPBACK_SGMII_FAR
] = "SGMII_FAR",
55 [LOOPBACK_XFI_FAR
] = "XFI_FAR",
56 [LOOPBACK_GPHY
] = "GPHY",
57 [LOOPBACK_PHYXS
] = "PHYXS",
58 [LOOPBACK_PCS
] = "PCS",
59 [LOOPBACK_PMAPMD
] = "PMA/PMD",
60 [LOOPBACK_XPORT
] = "XPORT",
61 [LOOPBACK_XGMII_WS
] = "XGMII_WS",
62 [LOOPBACK_XAUI_WS
] = "XAUI_WS",
63 [LOOPBACK_XAUI_WS_FAR
] = "XAUI_WS_FAR",
64 [LOOPBACK_XAUI_WS_NEAR
] = "XAUI_WS_NEAR",
65 [LOOPBACK_GMII_WS
] = "GMII_WS",
66 [LOOPBACK_XFI_WS
] = "XFI_WS",
67 [LOOPBACK_XFI_WS_FAR
] = "XFI_WS_FAR",
68 [LOOPBACK_PHYXS_WS
] = "PHYXS_WS",
71 const unsigned int efx_reset_type_max
= RESET_TYPE_MAX
;
72 const char *const efx_reset_type_names
[] = {
73 [RESET_TYPE_INVISIBLE
] = "INVISIBLE",
74 [RESET_TYPE_ALL
] = "ALL",
75 [RESET_TYPE_WORLD
] = "WORLD",
76 [RESET_TYPE_DISABLE
] = "DISABLE",
77 [RESET_TYPE_TX_WATCHDOG
] = "TX_WATCHDOG",
78 [RESET_TYPE_INT_ERROR
] = "INT_ERROR",
79 [RESET_TYPE_RX_RECOVERY
] = "RX_RECOVERY",
80 [RESET_TYPE_RX_DESC_FETCH
] = "RX_DESC_FETCH",
81 [RESET_TYPE_TX_DESC_FETCH
] = "TX_DESC_FETCH",
82 [RESET_TYPE_TX_SKIP
] = "TX_SKIP",
83 [RESET_TYPE_MC_FAILURE
] = "MC_FAILURE",
86 #define EFX_MAX_MTU (9 * 1024)
88 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
89 * queued onto this work queue. This is not a per-nic work queue, because
90 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
92 static struct workqueue_struct
*reset_workqueue
;
94 /**************************************************************************
98 *************************************************************************/
101 * Use separate channels for TX and RX events
103 * Set this to 1 to use separate channels for TX and RX. It allows us
104 * to control interrupt affinity separately for TX and RX.
106 * This is only used in MSI-X interrupt mode
108 static unsigned int separate_tx_channels
;
109 module_param(separate_tx_channels
, uint
, 0444);
110 MODULE_PARM_DESC(separate_tx_channels
,
111 "Use separate channels for TX and RX");
113 /* This is the weight assigned to each of the (per-channel) virtual
116 static int napi_weight
= 64;
118 /* This is the time (in jiffies) between invocations of the hardware
119 * monitor. On Falcon-based NICs, this will:
120 * - Check the on-board hardware monitor;
121 * - Poll the link state and reconfigure the hardware as necessary.
123 static unsigned int efx_monitor_interval
= 1 * HZ
;
125 /* Initial interrupt moderation settings. They can be modified after
126 * module load with ethtool.
128 * The default for RX should strike a balance between increasing the
129 * round-trip latency and reducing overhead.
131 static unsigned int rx_irq_mod_usec
= 60;
133 /* Initial interrupt moderation settings. They can be modified after
134 * module load with ethtool.
136 * This default is chosen to ensure that a 10G link does not go idle
137 * while a TX queue is stopped after it has become full. A queue is
138 * restarted when it drops below half full. The time this takes (assuming
139 * worst case 3 descriptors per packet and 1024 descriptors) is
140 * 512 / 3 * 1.2 = 205 usec.
142 static unsigned int tx_irq_mod_usec
= 150;
144 /* This is the first interrupt mode to try out of:
149 static unsigned int interrupt_mode
;
151 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
152 * i.e. the number of CPUs among which we may distribute simultaneous
153 * interrupt handling.
155 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
156 * The default (0) means to assign an interrupt to each core.
158 static unsigned int rss_cpus
;
159 module_param(rss_cpus
, uint
, 0444);
160 MODULE_PARM_DESC(rss_cpus
, "Number of CPUs to use for Receive-Side Scaling");
162 static int phy_flash_cfg
;
163 module_param(phy_flash_cfg
, int, 0644);
164 MODULE_PARM_DESC(phy_flash_cfg
, "Set PHYs into reflash mode initially");
166 static unsigned irq_adapt_low_thresh
= 10000;
167 module_param(irq_adapt_low_thresh
, uint
, 0644);
168 MODULE_PARM_DESC(irq_adapt_low_thresh
,
169 "Threshold score for reducing IRQ moderation");
171 static unsigned irq_adapt_high_thresh
= 20000;
172 module_param(irq_adapt_high_thresh
, uint
, 0644);
173 MODULE_PARM_DESC(irq_adapt_high_thresh
,
174 "Threshold score for increasing IRQ moderation");
176 static unsigned debug
= (NETIF_MSG_DRV
| NETIF_MSG_PROBE
|
177 NETIF_MSG_LINK
| NETIF_MSG_IFDOWN
|
178 NETIF_MSG_IFUP
| NETIF_MSG_RX_ERR
|
179 NETIF_MSG_TX_ERR
| NETIF_MSG_HW
);
180 module_param(debug
, uint
, 0);
181 MODULE_PARM_DESC(debug
, "Bitmapped debugging message enable value");
183 /**************************************************************************
185 * Utility functions and prototypes
187 *************************************************************************/
189 static void efx_remove_channels(struct efx_nic
*efx
);
190 static void efx_remove_port(struct efx_nic
*efx
);
191 static void efx_init_napi(struct efx_nic
*efx
);
192 static void efx_fini_napi(struct efx_nic
*efx
);
193 static void efx_fini_napi_channel(struct efx_channel
*channel
);
194 static void efx_fini_struct(struct efx_nic
*efx
);
195 static void efx_start_all(struct efx_nic
*efx
);
196 static void efx_stop_all(struct efx_nic
*efx
);
198 #define EFX_ASSERT_RESET_SERIALISED(efx) \
200 if ((efx->state == STATE_RUNNING) || \
201 (efx->state == STATE_DISABLED)) \
205 /**************************************************************************
207 * Event queue processing
209 *************************************************************************/
211 /* Process channel's event queue
213 * This function is responsible for processing the event queue of a
214 * single channel. The caller must guarantee that this function will
215 * never be concurrently called more than once on the same channel,
216 * though different channels may be being processed concurrently.
218 static int efx_process_channel(struct efx_channel
*channel
, int budget
)
220 struct efx_nic
*efx
= channel
->efx
;
223 if (unlikely(efx
->reset_pending
|| !channel
->enabled
))
226 spent
= efx_nic_process_eventq(channel
, budget
);
230 /* Deliver last RX packet. */
231 if (channel
->rx_pkt
) {
232 __efx_rx_packet(channel
, channel
->rx_pkt
,
233 channel
->rx_pkt_csummed
);
234 channel
->rx_pkt
= NULL
;
237 efx_rx_strategy(channel
);
239 efx_fast_push_rx_descriptors(efx_channel_get_rx_queue(channel
));
244 /* Mark channel as finished processing
246 * Note that since we will not receive further interrupts for this
247 * channel before we finish processing and call the eventq_read_ack()
248 * method, there is no need to use the interrupt hold-off timers.
250 static inline void efx_channel_processed(struct efx_channel
*channel
)
252 /* The interrupt handler for this channel may set work_pending
253 * as soon as we acknowledge the events we've seen. Make sure
254 * it's cleared before then. */
255 channel
->work_pending
= false;
258 efx_nic_eventq_read_ack(channel
);
263 * NAPI guarantees serialisation of polls of the same device, which
264 * provides the guarantee required by efx_process_channel().
266 static int efx_poll(struct napi_struct
*napi
, int budget
)
268 struct efx_channel
*channel
=
269 container_of(napi
, struct efx_channel
, napi_str
);
270 struct efx_nic
*efx
= channel
->efx
;
273 netif_vdbg(efx
, intr
, efx
->net_dev
,
274 "channel %d NAPI poll executing on CPU %d\n",
275 channel
->channel
, raw_smp_processor_id());
277 spent
= efx_process_channel(channel
, budget
);
279 if (spent
< budget
) {
280 if (channel
->channel
< efx
->n_rx_channels
&&
281 efx
->irq_rx_adaptive
&&
282 unlikely(++channel
->irq_count
== 1000)) {
283 if (unlikely(channel
->irq_mod_score
<
284 irq_adapt_low_thresh
)) {
285 if (channel
->irq_moderation
> 1) {
286 channel
->irq_moderation
-= 1;
287 efx
->type
->push_irq_moderation(channel
);
289 } else if (unlikely(channel
->irq_mod_score
>
290 irq_adapt_high_thresh
)) {
291 if (channel
->irq_moderation
<
292 efx
->irq_rx_moderation
) {
293 channel
->irq_moderation
+= 1;
294 efx
->type
->push_irq_moderation(channel
);
297 channel
->irq_count
= 0;
298 channel
->irq_mod_score
= 0;
301 efx_filter_rfs_expire(channel
);
303 /* There is no race here; although napi_disable() will
304 * only wait for napi_complete(), this isn't a problem
305 * since efx_channel_processed() will have no effect if
306 * interrupts have already been disabled.
309 efx_channel_processed(channel
);
315 /* Process the eventq of the specified channel immediately on this CPU
317 * Disable hardware generated interrupts, wait for any existing
318 * processing to finish, then directly poll (and ack ) the eventq.
319 * Finally reenable NAPI and interrupts.
321 * This is for use only during a loopback self-test. It must not
322 * deliver any packets up the stack as this can result in deadlock.
324 void efx_process_channel_now(struct efx_channel
*channel
)
326 struct efx_nic
*efx
= channel
->efx
;
328 BUG_ON(channel
->channel
>= efx
->n_channels
);
329 BUG_ON(!channel
->enabled
);
330 BUG_ON(!efx
->loopback_selftest
);
332 /* Disable interrupts and wait for ISRs to complete */
333 efx_nic_disable_interrupts(efx
);
334 if (efx
->legacy_irq
) {
335 synchronize_irq(efx
->legacy_irq
);
336 efx
->legacy_irq_enabled
= false;
339 synchronize_irq(channel
->irq
);
341 /* Wait for any NAPI processing to complete */
342 napi_disable(&channel
->napi_str
);
344 /* Poll the channel */
345 efx_process_channel(channel
, channel
->eventq_mask
+ 1);
347 /* Ack the eventq. This may cause an interrupt to be generated
348 * when they are reenabled */
349 efx_channel_processed(channel
);
351 napi_enable(&channel
->napi_str
);
353 efx
->legacy_irq_enabled
= true;
354 efx_nic_enable_interrupts(efx
);
357 /* Create event queue
358 * Event queue memory allocations are done only once. If the channel
359 * is reset, the memory buffer will be reused; this guards against
360 * errors during channel reset and also simplifies interrupt handling.
362 static int efx_probe_eventq(struct efx_channel
*channel
)
364 struct efx_nic
*efx
= channel
->efx
;
365 unsigned long entries
;
367 netif_dbg(efx
, probe
, efx
->net_dev
,
368 "chan %d create event queue\n", channel
->channel
);
370 /* Build an event queue with room for one event per tx and rx buffer,
371 * plus some extra for link state events and MCDI completions. */
372 entries
= roundup_pow_of_two(efx
->rxq_entries
+ efx
->txq_entries
+ 128);
373 EFX_BUG_ON_PARANOID(entries
> EFX_MAX_EVQ_SIZE
);
374 channel
->eventq_mask
= max(entries
, EFX_MIN_EVQ_SIZE
) - 1;
376 return efx_nic_probe_eventq(channel
);
379 /* Prepare channel's event queue */
380 static void efx_init_eventq(struct efx_channel
*channel
)
382 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
383 "chan %d init event queue\n", channel
->channel
);
385 channel
->eventq_read_ptr
= 0;
387 efx_nic_init_eventq(channel
);
390 static void efx_fini_eventq(struct efx_channel
*channel
)
392 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
393 "chan %d fini event queue\n", channel
->channel
);
395 efx_nic_fini_eventq(channel
);
398 static void efx_remove_eventq(struct efx_channel
*channel
)
400 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
401 "chan %d remove event queue\n", channel
->channel
);
403 efx_nic_remove_eventq(channel
);
406 /**************************************************************************
410 *************************************************************************/
412 /* Allocate and initialise a channel structure, optionally copying
413 * parameters (but not resources) from an old channel structure. */
414 static struct efx_channel
*
415 efx_alloc_channel(struct efx_nic
*efx
, int i
, struct efx_channel
*old_channel
)
417 struct efx_channel
*channel
;
418 struct efx_rx_queue
*rx_queue
;
419 struct efx_tx_queue
*tx_queue
;
423 channel
= kmalloc(sizeof(*channel
), GFP_KERNEL
);
427 *channel
= *old_channel
;
429 channel
->napi_dev
= NULL
;
430 memset(&channel
->eventq
, 0, sizeof(channel
->eventq
));
432 rx_queue
= &channel
->rx_queue
;
433 rx_queue
->buffer
= NULL
;
434 memset(&rx_queue
->rxd
, 0, sizeof(rx_queue
->rxd
));
436 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
437 tx_queue
= &channel
->tx_queue
[j
];
438 if (tx_queue
->channel
)
439 tx_queue
->channel
= channel
;
440 tx_queue
->buffer
= NULL
;
441 memset(&tx_queue
->txd
, 0, sizeof(tx_queue
->txd
));
444 channel
= kzalloc(sizeof(*channel
), GFP_KERNEL
);
449 channel
->channel
= i
;
451 for (j
= 0; j
< EFX_TXQ_TYPES
; j
++) {
452 tx_queue
= &channel
->tx_queue
[j
];
454 tx_queue
->queue
= i
* EFX_TXQ_TYPES
+ j
;
455 tx_queue
->channel
= channel
;
459 rx_queue
= &channel
->rx_queue
;
461 setup_timer(&rx_queue
->slow_fill
, efx_rx_slow_fill
,
462 (unsigned long)rx_queue
);
467 static int efx_probe_channel(struct efx_channel
*channel
)
469 struct efx_tx_queue
*tx_queue
;
470 struct efx_rx_queue
*rx_queue
;
473 netif_dbg(channel
->efx
, probe
, channel
->efx
->net_dev
,
474 "creating channel %d\n", channel
->channel
);
476 rc
= efx_probe_eventq(channel
);
480 efx_for_each_channel_tx_queue(tx_queue
, channel
) {
481 rc
= efx_probe_tx_queue(tx_queue
);
486 efx_for_each_channel_rx_queue(rx_queue
, channel
) {
487 rc
= efx_probe_rx_queue(rx_queue
);
492 channel
->n_rx_frm_trunc
= 0;
497 efx_for_each_channel_rx_queue(rx_queue
, channel
)
498 efx_remove_rx_queue(rx_queue
);
500 efx_for_each_channel_tx_queue(tx_queue
, channel
)
501 efx_remove_tx_queue(tx_queue
);
507 static void efx_set_channel_names(struct efx_nic
*efx
)
509 struct efx_channel
*channel
;
510 const char *type
= "";
513 efx_for_each_channel(channel
, efx
) {
514 number
= channel
->channel
;
515 if (efx
->n_channels
> efx
->n_rx_channels
) {
516 if (channel
->channel
< efx
->n_rx_channels
) {
520 number
-= efx
->n_rx_channels
;
523 snprintf(efx
->channel_name
[channel
->channel
],
524 sizeof(efx
->channel_name
[0]),
525 "%s%s-%d", efx
->name
, type
, number
);
529 static int efx_probe_channels(struct efx_nic
*efx
)
531 struct efx_channel
*channel
;
534 /* Restart special buffer allocation */
535 efx
->next_buffer_table
= 0;
537 efx_for_each_channel(channel
, efx
) {
538 rc
= efx_probe_channel(channel
);
540 netif_err(efx
, probe
, efx
->net_dev
,
541 "failed to create channel %d\n",
546 efx_set_channel_names(efx
);
551 efx_remove_channels(efx
);
555 /* Channels are shutdown and reinitialised whilst the NIC is running
556 * to propagate configuration changes (mtu, checksum offload), or
557 * to clear hardware error conditions
559 static void efx_init_channels(struct efx_nic
*efx
)
561 struct efx_tx_queue
*tx_queue
;
562 struct efx_rx_queue
*rx_queue
;
563 struct efx_channel
*channel
;
565 /* Calculate the rx buffer allocation parameters required to
566 * support the current MTU, including padding for header
567 * alignment and overruns.
569 efx
->rx_buffer_len
= (max(EFX_PAGE_IP_ALIGN
, NET_IP_ALIGN
) +
570 EFX_MAX_FRAME_LEN(efx
->net_dev
->mtu
) +
571 efx
->type
->rx_buffer_hash_size
+
572 efx
->type
->rx_buffer_padding
);
573 efx
->rx_buffer_order
= get_order(efx
->rx_buffer_len
+
574 sizeof(struct efx_rx_page_state
));
576 /* Initialise the channels */
577 efx_for_each_channel(channel
, efx
) {
578 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
579 "init chan %d\n", channel
->channel
);
581 efx_init_eventq(channel
);
583 efx_for_each_channel_tx_queue(tx_queue
, channel
)
584 efx_init_tx_queue(tx_queue
);
586 /* The rx buffer allocation strategy is MTU dependent */
587 efx_rx_strategy(channel
);
589 efx_for_each_channel_rx_queue(rx_queue
, channel
)
590 efx_init_rx_queue(rx_queue
);
592 WARN_ON(channel
->rx_pkt
!= NULL
);
593 efx_rx_strategy(channel
);
597 /* This enables event queue processing and packet transmission.
599 * Note that this function is not allowed to fail, since that would
600 * introduce too much complexity into the suspend/resume path.
602 static void efx_start_channel(struct efx_channel
*channel
)
604 struct efx_rx_queue
*rx_queue
;
606 netif_dbg(channel
->efx
, ifup
, channel
->efx
->net_dev
,
607 "starting chan %d\n", channel
->channel
);
609 /* The interrupt handler for this channel may set work_pending
610 * as soon as we enable it. Make sure it's cleared before
611 * then. Similarly, make sure it sees the enabled flag set. */
612 channel
->work_pending
= false;
613 channel
->enabled
= true;
616 /* Fill the queues before enabling NAPI */
617 efx_for_each_channel_rx_queue(rx_queue
, channel
)
618 efx_fast_push_rx_descriptors(rx_queue
);
620 napi_enable(&channel
->napi_str
);
623 /* This disables event queue processing and packet transmission.
624 * This function does not guarantee that all queue processing
625 * (e.g. RX refill) is complete.
627 static void efx_stop_channel(struct efx_channel
*channel
)
629 if (!channel
->enabled
)
632 netif_dbg(channel
->efx
, ifdown
, channel
->efx
->net_dev
,
633 "stop chan %d\n", channel
->channel
);
635 channel
->enabled
= false;
636 napi_disable(&channel
->napi_str
);
639 static void efx_fini_channels(struct efx_nic
*efx
)
641 struct efx_channel
*channel
;
642 struct efx_tx_queue
*tx_queue
;
643 struct efx_rx_queue
*rx_queue
;
646 EFX_ASSERT_RESET_SERIALISED(efx
);
647 BUG_ON(efx
->port_enabled
);
649 rc
= efx_nic_flush_queues(efx
);
650 if (rc
&& EFX_WORKAROUND_7803(efx
)) {
651 /* Schedule a reset to recover from the flush failure. The
652 * descriptor caches reference memory we're about to free,
653 * but falcon_reconfigure_mac_wrapper() won't reconnect
654 * the MACs because of the pending reset. */
655 netif_err(efx
, drv
, efx
->net_dev
,
656 "Resetting to recover from flush failure\n");
657 efx_schedule_reset(efx
, RESET_TYPE_ALL
);
659 netif_err(efx
, drv
, efx
->net_dev
, "failed to flush queues\n");
661 netif_dbg(efx
, drv
, efx
->net_dev
,
662 "successfully flushed all queues\n");
665 efx_for_each_channel(channel
, efx
) {
666 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
667 "shut down chan %d\n", channel
->channel
);
669 efx_for_each_channel_rx_queue(rx_queue
, channel
)
670 efx_fini_rx_queue(rx_queue
);
671 efx_for_each_possible_channel_tx_queue(tx_queue
, channel
)
672 efx_fini_tx_queue(tx_queue
);
673 efx_fini_eventq(channel
);
677 static void efx_remove_channel(struct efx_channel
*channel
)
679 struct efx_tx_queue
*tx_queue
;
680 struct efx_rx_queue
*rx_queue
;
682 netif_dbg(channel
->efx
, drv
, channel
->efx
->net_dev
,
683 "destroy chan %d\n", channel
->channel
);
685 efx_for_each_channel_rx_queue(rx_queue
, channel
)
686 efx_remove_rx_queue(rx_queue
);
687 efx_for_each_possible_channel_tx_queue(tx_queue
, channel
)
688 efx_remove_tx_queue(tx_queue
);
689 efx_remove_eventq(channel
);
692 static void efx_remove_channels(struct efx_nic
*efx
)
694 struct efx_channel
*channel
;
696 efx_for_each_channel(channel
, efx
)
697 efx_remove_channel(channel
);
701 efx_realloc_channels(struct efx_nic
*efx
, u32 rxq_entries
, u32 txq_entries
)
703 struct efx_channel
*other_channel
[EFX_MAX_CHANNELS
], *channel
;
704 u32 old_rxq_entries
, old_txq_entries
;
709 efx_fini_channels(efx
);
712 memset(other_channel
, 0, sizeof(other_channel
));
713 for (i
= 0; i
< efx
->n_channels
; i
++) {
714 channel
= efx_alloc_channel(efx
, i
, efx
->channel
[i
]);
719 other_channel
[i
] = channel
;
722 /* Swap entry counts and channel pointers */
723 old_rxq_entries
= efx
->rxq_entries
;
724 old_txq_entries
= efx
->txq_entries
;
725 efx
->rxq_entries
= rxq_entries
;
726 efx
->txq_entries
= txq_entries
;
727 for (i
= 0; i
< efx
->n_channels
; i
++) {
728 channel
= efx
->channel
[i
];
729 efx
->channel
[i
] = other_channel
[i
];
730 other_channel
[i
] = channel
;
733 rc
= efx_probe_channels(efx
);
739 /* Destroy old channels */
740 for (i
= 0; i
< efx
->n_channels
; i
++) {
741 efx_fini_napi_channel(other_channel
[i
]);
742 efx_remove_channel(other_channel
[i
]);
745 /* Free unused channel structures */
746 for (i
= 0; i
< efx
->n_channels
; i
++)
747 kfree(other_channel
[i
]);
749 efx_init_channels(efx
);
755 efx
->rxq_entries
= old_rxq_entries
;
756 efx
->txq_entries
= old_txq_entries
;
757 for (i
= 0; i
< efx
->n_channels
; i
++) {
758 channel
= efx
->channel
[i
];
759 efx
->channel
[i
] = other_channel
[i
];
760 other_channel
[i
] = channel
;
765 void efx_schedule_slow_fill(struct efx_rx_queue
*rx_queue
)
767 mod_timer(&rx_queue
->slow_fill
, jiffies
+ msecs_to_jiffies(100));
770 /**************************************************************************
774 **************************************************************************/
776 /* This ensures that the kernel is kept informed (via
777 * netif_carrier_on/off) of the link status, and also maintains the
778 * link status's stop on the port's TX queue.
780 void efx_link_status_changed(struct efx_nic
*efx
)
782 struct efx_link_state
*link_state
= &efx
->link_state
;
784 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
785 * that no events are triggered between unregister_netdev() and the
786 * driver unloading. A more general condition is that NETDEV_CHANGE
787 * can only be generated between NETDEV_UP and NETDEV_DOWN */
788 if (!netif_running(efx
->net_dev
))
791 if (link_state
->up
!= netif_carrier_ok(efx
->net_dev
)) {
792 efx
->n_link_state_changes
++;
795 netif_carrier_on(efx
->net_dev
);
797 netif_carrier_off(efx
->net_dev
);
800 /* Status message for kernel log */
801 if (link_state
->up
) {
802 netif_info(efx
, link
, efx
->net_dev
,
803 "link up at %uMbps %s-duplex (MTU %d)%s\n",
804 link_state
->speed
, link_state
->fd
? "full" : "half",
806 (efx
->promiscuous
? " [PROMISC]" : ""));
808 netif_info(efx
, link
, efx
->net_dev
, "link down\n");
813 void efx_link_set_advertising(struct efx_nic
*efx
, u32 advertising
)
815 efx
->link_advertising
= advertising
;
817 if (advertising
& ADVERTISED_Pause
)
818 efx
->wanted_fc
|= (EFX_FC_TX
| EFX_FC_RX
);
820 efx
->wanted_fc
&= ~(EFX_FC_TX
| EFX_FC_RX
);
821 if (advertising
& ADVERTISED_Asym_Pause
)
822 efx
->wanted_fc
^= EFX_FC_TX
;
826 void efx_link_set_wanted_fc(struct efx_nic
*efx
, u8 wanted_fc
)
828 efx
->wanted_fc
= wanted_fc
;
829 if (efx
->link_advertising
) {
830 if (wanted_fc
& EFX_FC_RX
)
831 efx
->link_advertising
|= (ADVERTISED_Pause
|
832 ADVERTISED_Asym_Pause
);
834 efx
->link_advertising
&= ~(ADVERTISED_Pause
|
835 ADVERTISED_Asym_Pause
);
836 if (wanted_fc
& EFX_FC_TX
)
837 efx
->link_advertising
^= ADVERTISED_Asym_Pause
;
841 static void efx_fini_port(struct efx_nic
*efx
);
843 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
844 * the MAC appropriately. All other PHY configuration changes are pushed
845 * through phy_op->set_settings(), and pushed asynchronously to the MAC
846 * through efx_monitor().
848 * Callers must hold the mac_lock
850 int __efx_reconfigure_port(struct efx_nic
*efx
)
852 enum efx_phy_mode phy_mode
;
855 WARN_ON(!mutex_is_locked(&efx
->mac_lock
));
857 /* Serialise the promiscuous flag with efx_set_multicast_list. */
858 netif_addr_lock_bh(efx
->net_dev
);
859 netif_addr_unlock_bh(efx
->net_dev
);
861 /* Disable PHY transmit in mac level loopbacks */
862 phy_mode
= efx
->phy_mode
;
863 if (LOOPBACK_INTERNAL(efx
))
864 efx
->phy_mode
|= PHY_MODE_TX_DISABLED
;
866 efx
->phy_mode
&= ~PHY_MODE_TX_DISABLED
;
868 rc
= efx
->type
->reconfigure_port(efx
);
871 efx
->phy_mode
= phy_mode
;
876 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
878 int efx_reconfigure_port(struct efx_nic
*efx
)
882 EFX_ASSERT_RESET_SERIALISED(efx
);
884 mutex_lock(&efx
->mac_lock
);
885 rc
= __efx_reconfigure_port(efx
);
886 mutex_unlock(&efx
->mac_lock
);
891 /* Asynchronous work item for changing MAC promiscuity and multicast
892 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
894 static void efx_mac_work(struct work_struct
*data
)
896 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, mac_work
);
898 mutex_lock(&efx
->mac_lock
);
899 if (efx
->port_enabled
)
900 efx
->type
->reconfigure_mac(efx
);
901 mutex_unlock(&efx
->mac_lock
);
904 static int efx_probe_port(struct efx_nic
*efx
)
908 netif_dbg(efx
, probe
, efx
->net_dev
, "create port\n");
911 efx
->phy_mode
= PHY_MODE_SPECIAL
;
913 /* Connect up MAC/PHY operations table */
914 rc
= efx
->type
->probe_port(efx
);
918 /* Initialise MAC address to permanent address */
919 memcpy(efx
->net_dev
->dev_addr
, efx
->net_dev
->perm_addr
, ETH_ALEN
);
924 static int efx_init_port(struct efx_nic
*efx
)
928 netif_dbg(efx
, drv
, efx
->net_dev
, "init port\n");
930 mutex_lock(&efx
->mac_lock
);
932 rc
= efx
->phy_op
->init(efx
);
936 efx
->port_initialized
= true;
938 /* Reconfigure the MAC before creating dma queues (required for
939 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
940 efx
->type
->reconfigure_mac(efx
);
942 /* Ensure the PHY advertises the correct flow control settings */
943 rc
= efx
->phy_op
->reconfigure(efx
);
947 mutex_unlock(&efx
->mac_lock
);
951 efx
->phy_op
->fini(efx
);
953 mutex_unlock(&efx
->mac_lock
);
957 static void efx_start_port(struct efx_nic
*efx
)
959 netif_dbg(efx
, ifup
, efx
->net_dev
, "start port\n");
960 BUG_ON(efx
->port_enabled
);
962 mutex_lock(&efx
->mac_lock
);
963 efx
->port_enabled
= true;
965 /* efx_mac_work() might have been scheduled after efx_stop_port(),
966 * and then cancelled by efx_flush_all() */
967 efx
->type
->reconfigure_mac(efx
);
969 mutex_unlock(&efx
->mac_lock
);
972 /* Prevent efx_mac_work() and efx_monitor() from working */
973 static void efx_stop_port(struct efx_nic
*efx
)
975 netif_dbg(efx
, ifdown
, efx
->net_dev
, "stop port\n");
977 mutex_lock(&efx
->mac_lock
);
978 efx
->port_enabled
= false;
979 mutex_unlock(&efx
->mac_lock
);
981 /* Serialise against efx_set_multicast_list() */
982 netif_addr_lock_bh(efx
->net_dev
);
983 netif_addr_unlock_bh(efx
->net_dev
);
986 static void efx_fini_port(struct efx_nic
*efx
)
988 netif_dbg(efx
, drv
, efx
->net_dev
, "shut down port\n");
990 if (!efx
->port_initialized
)
993 efx
->phy_op
->fini(efx
);
994 efx
->port_initialized
= false;
996 efx
->link_state
.up
= false;
997 efx_link_status_changed(efx
);
1000 static void efx_remove_port(struct efx_nic
*efx
)
1002 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying port\n");
1004 efx
->type
->remove_port(efx
);
1007 /**************************************************************************
1011 **************************************************************************/
1013 /* This configures the PCI device to enable I/O and DMA. */
1014 static int efx_init_io(struct efx_nic
*efx
)
1016 struct pci_dev
*pci_dev
= efx
->pci_dev
;
1017 dma_addr_t dma_mask
= efx
->type
->max_dma_mask
;
1020 netif_dbg(efx
, probe
, efx
->net_dev
, "initialising I/O\n");
1022 rc
= pci_enable_device(pci_dev
);
1024 netif_err(efx
, probe
, efx
->net_dev
,
1025 "failed to enable PCI device\n");
1029 pci_set_master(pci_dev
);
1031 /* Set the PCI DMA mask. Try all possibilities from our
1032 * genuine mask down to 32 bits, because some architectures
1033 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
1034 * masks event though they reject 46 bit masks.
1036 while (dma_mask
> 0x7fffffffUL
) {
1037 if (pci_dma_supported(pci_dev
, dma_mask
)) {
1038 rc
= pci_set_dma_mask(pci_dev
, dma_mask
);
1045 netif_err(efx
, probe
, efx
->net_dev
,
1046 "could not find a suitable DMA mask\n");
1049 netif_dbg(efx
, probe
, efx
->net_dev
,
1050 "using DMA mask %llx\n", (unsigned long long) dma_mask
);
1051 rc
= pci_set_consistent_dma_mask(pci_dev
, dma_mask
);
1053 /* pci_set_consistent_dma_mask() is not *allowed* to
1054 * fail with a mask that pci_set_dma_mask() accepted,
1055 * but just in case...
1057 netif_err(efx
, probe
, efx
->net_dev
,
1058 "failed to set consistent DMA mask\n");
1062 efx
->membase_phys
= pci_resource_start(efx
->pci_dev
, EFX_MEM_BAR
);
1063 rc
= pci_request_region(pci_dev
, EFX_MEM_BAR
, "sfc");
1065 netif_err(efx
, probe
, efx
->net_dev
,
1066 "request for memory BAR failed\n");
1070 efx
->membase
= ioremap_nocache(efx
->membase_phys
,
1071 efx
->type
->mem_map_size
);
1072 if (!efx
->membase
) {
1073 netif_err(efx
, probe
, efx
->net_dev
,
1074 "could not map memory BAR at %llx+%x\n",
1075 (unsigned long long)efx
->membase_phys
,
1076 efx
->type
->mem_map_size
);
1080 netif_dbg(efx
, probe
, efx
->net_dev
,
1081 "memory BAR at %llx+%x (virtual %p)\n",
1082 (unsigned long long)efx
->membase_phys
,
1083 efx
->type
->mem_map_size
, efx
->membase
);
1088 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1090 efx
->membase_phys
= 0;
1092 pci_disable_device(efx
->pci_dev
);
1097 static void efx_fini_io(struct efx_nic
*efx
)
1099 netif_dbg(efx
, drv
, efx
->net_dev
, "shutting down I/O\n");
1102 iounmap(efx
->membase
);
1103 efx
->membase
= NULL
;
1106 if (efx
->membase_phys
) {
1107 pci_release_region(efx
->pci_dev
, EFX_MEM_BAR
);
1108 efx
->membase_phys
= 0;
1111 pci_disable_device(efx
->pci_dev
);
1114 static int efx_wanted_parallelism(void)
1116 cpumask_var_t thread_mask
;
1123 if (unlikely(!zalloc_cpumask_var(&thread_mask
, GFP_KERNEL
))) {
1125 "sfc: RSS disabled due to allocation failure\n");
1130 for_each_online_cpu(cpu
) {
1131 if (!cpumask_test_cpu(cpu
, thread_mask
)) {
1133 cpumask_or(thread_mask
, thread_mask
,
1134 topology_thread_cpumask(cpu
));
1138 free_cpumask_var(thread_mask
);
1143 efx_init_rx_cpu_rmap(struct efx_nic
*efx
, struct msix_entry
*xentries
)
1145 #ifdef CONFIG_RFS_ACCEL
1148 efx
->net_dev
->rx_cpu_rmap
= alloc_irq_cpu_rmap(efx
->n_rx_channels
);
1149 if (!efx
->net_dev
->rx_cpu_rmap
)
1151 for (i
= 0; i
< efx
->n_rx_channels
; i
++) {
1152 rc
= irq_cpu_rmap_add(efx
->net_dev
->rx_cpu_rmap
,
1153 xentries
[i
].vector
);
1155 free_irq_cpu_rmap(efx
->net_dev
->rx_cpu_rmap
);
1156 efx
->net_dev
->rx_cpu_rmap
= NULL
;
1164 /* Probe the number and type of interrupts we are able to obtain, and
1165 * the resulting numbers of channels and RX queues.
1167 static int efx_probe_interrupts(struct efx_nic
*efx
)
1170 min_t(int, efx
->type
->phys_addr_channels
, EFX_MAX_CHANNELS
);
1173 if (efx
->interrupt_mode
== EFX_INT_MODE_MSIX
) {
1174 struct msix_entry xentries
[EFX_MAX_CHANNELS
];
1177 n_channels
= efx_wanted_parallelism();
1178 if (separate_tx_channels
)
1180 n_channels
= min(n_channels
, max_channels
);
1182 for (i
= 0; i
< n_channels
; i
++)
1183 xentries
[i
].entry
= i
;
1184 rc
= pci_enable_msix(efx
->pci_dev
, xentries
, n_channels
);
1186 netif_err(efx
, drv
, efx
->net_dev
,
1187 "WARNING: Insufficient MSI-X vectors"
1188 " available (%d < %d).\n", rc
, n_channels
);
1189 netif_err(efx
, drv
, efx
->net_dev
,
1190 "WARNING: Performance may be reduced.\n");
1191 EFX_BUG_ON_PARANOID(rc
>= n_channels
);
1193 rc
= pci_enable_msix(efx
->pci_dev
, xentries
,
1198 efx
->n_channels
= n_channels
;
1199 if (separate_tx_channels
) {
1200 efx
->n_tx_channels
=
1201 max(efx
->n_channels
/ 2, 1U);
1202 efx
->n_rx_channels
=
1203 max(efx
->n_channels
-
1204 efx
->n_tx_channels
, 1U);
1206 efx
->n_tx_channels
= efx
->n_channels
;
1207 efx
->n_rx_channels
= efx
->n_channels
;
1209 rc
= efx_init_rx_cpu_rmap(efx
, xentries
);
1211 pci_disable_msix(efx
->pci_dev
);
1214 for (i
= 0; i
< n_channels
; i
++)
1215 efx_get_channel(efx
, i
)->irq
=
1218 /* Fall back to single channel MSI */
1219 efx
->interrupt_mode
= EFX_INT_MODE_MSI
;
1220 netif_err(efx
, drv
, efx
->net_dev
,
1221 "could not enable MSI-X\n");
1225 /* Try single interrupt MSI */
1226 if (efx
->interrupt_mode
== EFX_INT_MODE_MSI
) {
1227 efx
->n_channels
= 1;
1228 efx
->n_rx_channels
= 1;
1229 efx
->n_tx_channels
= 1;
1230 rc
= pci_enable_msi(efx
->pci_dev
);
1232 efx_get_channel(efx
, 0)->irq
= efx
->pci_dev
->irq
;
1234 netif_err(efx
, drv
, efx
->net_dev
,
1235 "could not enable MSI\n");
1236 efx
->interrupt_mode
= EFX_INT_MODE_LEGACY
;
1240 /* Assume legacy interrupts */
1241 if (efx
->interrupt_mode
== EFX_INT_MODE_LEGACY
) {
1242 efx
->n_channels
= 1 + (separate_tx_channels
? 1 : 0);
1243 efx
->n_rx_channels
= 1;
1244 efx
->n_tx_channels
= 1;
1245 efx
->legacy_irq
= efx
->pci_dev
->irq
;
1251 static void efx_remove_interrupts(struct efx_nic
*efx
)
1253 struct efx_channel
*channel
;
1255 /* Remove MSI/MSI-X interrupts */
1256 efx_for_each_channel(channel
, efx
)
1258 pci_disable_msi(efx
->pci_dev
);
1259 pci_disable_msix(efx
->pci_dev
);
1261 /* Remove legacy interrupt */
1262 efx
->legacy_irq
= 0;
1265 static void efx_set_channels(struct efx_nic
*efx
)
1267 struct efx_channel
*channel
;
1268 struct efx_tx_queue
*tx_queue
;
1270 efx
->tx_channel_offset
=
1271 separate_tx_channels
? efx
->n_channels
- efx
->n_tx_channels
: 0;
1273 /* We need to adjust the TX queue numbers if we have separate
1274 * RX-only and TX-only channels.
1276 efx_for_each_channel(channel
, efx
) {
1277 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1278 tx_queue
->queue
-= (efx
->tx_channel_offset
*
1283 static int efx_probe_nic(struct efx_nic
*efx
)
1288 netif_dbg(efx
, probe
, efx
->net_dev
, "creating NIC\n");
1290 /* Carry out hardware-type specific initialisation */
1291 rc
= efx
->type
->probe(efx
);
1295 /* Determine the number of channels and queues by trying to hook
1296 * in MSI-X interrupts. */
1297 rc
= efx_probe_interrupts(efx
);
1301 if (efx
->n_channels
> 1)
1302 get_random_bytes(&efx
->rx_hash_key
, sizeof(efx
->rx_hash_key
));
1303 for (i
= 0; i
< ARRAY_SIZE(efx
->rx_indir_table
); i
++)
1304 efx
->rx_indir_table
[i
] =
1305 ethtool_rxfh_indir_default(i
, efx
->n_rx_channels
);
1307 efx_set_channels(efx
);
1308 netif_set_real_num_tx_queues(efx
->net_dev
, efx
->n_tx_channels
);
1309 netif_set_real_num_rx_queues(efx
->net_dev
, efx
->n_rx_channels
);
1311 /* Initialise the interrupt moderation settings */
1312 efx_init_irq_moderation(efx
, tx_irq_mod_usec
, rx_irq_mod_usec
, true,
1318 efx
->type
->remove(efx
);
1322 static void efx_remove_nic(struct efx_nic
*efx
)
1324 netif_dbg(efx
, drv
, efx
->net_dev
, "destroying NIC\n");
1326 efx_remove_interrupts(efx
);
1327 efx
->type
->remove(efx
);
1330 /**************************************************************************
1332 * NIC startup/shutdown
1334 *************************************************************************/
1336 static int efx_probe_all(struct efx_nic
*efx
)
1340 rc
= efx_probe_nic(efx
);
1342 netif_err(efx
, probe
, efx
->net_dev
, "failed to create NIC\n");
1346 rc
= efx_probe_port(efx
);
1348 netif_err(efx
, probe
, efx
->net_dev
, "failed to create port\n");
1352 efx
->rxq_entries
= efx
->txq_entries
= EFX_DEFAULT_DMAQ_SIZE
;
1353 rc
= efx_probe_channels(efx
);
1357 rc
= efx_probe_filters(efx
);
1359 netif_err(efx
, probe
, efx
->net_dev
,
1360 "failed to create filter tables\n");
1367 efx_remove_channels(efx
);
1369 efx_remove_port(efx
);
1371 efx_remove_nic(efx
);
1376 /* Called after previous invocation(s) of efx_stop_all, restarts the
1377 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1378 * and ensures that the port is scheduled to be reconfigured.
1379 * This function is safe to call multiple times when the NIC is in any
1381 static void efx_start_all(struct efx_nic
*efx
)
1383 struct efx_channel
*channel
;
1385 EFX_ASSERT_RESET_SERIALISED(efx
);
1387 /* Check that it is appropriate to restart the interface. All
1388 * of these flags are safe to read under just the rtnl lock */
1389 if (efx
->port_enabled
)
1391 if ((efx
->state
!= STATE_RUNNING
) && (efx
->state
!= STATE_INIT
))
1393 if (!netif_running(efx
->net_dev
))
1396 /* Mark the port as enabled so port reconfigurations can start, then
1397 * restart the transmit interface early so the watchdog timer stops */
1398 efx_start_port(efx
);
1400 if (netif_device_present(efx
->net_dev
))
1401 netif_tx_wake_all_queues(efx
->net_dev
);
1403 efx_for_each_channel(channel
, efx
)
1404 efx_start_channel(channel
);
1406 if (efx
->legacy_irq
)
1407 efx
->legacy_irq_enabled
= true;
1408 efx_nic_enable_interrupts(efx
);
1410 /* Switch to event based MCDI completions after enabling interrupts.
1411 * If a reset has been scheduled, then we need to stay in polled mode.
1412 * Rather than serialising efx_mcdi_mode_event() [which sleeps] and
1413 * reset_pending [modified from an atomic context], we instead guarantee
1414 * that efx_mcdi_mode_poll() isn't reverted erroneously */
1415 efx_mcdi_mode_event(efx
);
1416 if (efx
->reset_pending
)
1417 efx_mcdi_mode_poll(efx
);
1419 /* Start the hardware monitor if there is one. Otherwise (we're link
1420 * event driven), we have to poll the PHY because after an event queue
1421 * flush, we could have a missed a link state change */
1422 if (efx
->type
->monitor
!= NULL
) {
1423 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1424 efx_monitor_interval
);
1426 mutex_lock(&efx
->mac_lock
);
1427 if (efx
->phy_op
->poll(efx
))
1428 efx_link_status_changed(efx
);
1429 mutex_unlock(&efx
->mac_lock
);
1432 efx
->type
->start_stats(efx
);
1435 /* Flush all delayed work. Should only be called when no more delayed work
1436 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1437 * since we're holding the rtnl_lock at this point. */
1438 static void efx_flush_all(struct efx_nic
*efx
)
1440 /* Make sure the hardware monitor is stopped */
1441 cancel_delayed_work_sync(&efx
->monitor_work
);
1442 /* Stop scheduled port reconfigurations */
1443 cancel_work_sync(&efx
->mac_work
);
1446 /* Quiesce hardware and software without bringing the link down.
1447 * Safe to call multiple times, when the nic and interface is in any
1448 * state. The caller is guaranteed to subsequently be in a position
1449 * to modify any hardware and software state they see fit without
1451 static void efx_stop_all(struct efx_nic
*efx
)
1453 struct efx_channel
*channel
;
1455 EFX_ASSERT_RESET_SERIALISED(efx
);
1457 /* port_enabled can be read safely under the rtnl lock */
1458 if (!efx
->port_enabled
)
1461 efx
->type
->stop_stats(efx
);
1463 /* Switch to MCDI polling on Siena before disabling interrupts */
1464 efx_mcdi_mode_poll(efx
);
1466 /* Disable interrupts and wait for ISR to complete */
1467 efx_nic_disable_interrupts(efx
);
1468 if (efx
->legacy_irq
) {
1469 synchronize_irq(efx
->legacy_irq
);
1470 efx
->legacy_irq_enabled
= false;
1472 efx_for_each_channel(channel
, efx
) {
1474 synchronize_irq(channel
->irq
);
1477 /* Stop all NAPI processing and synchronous rx refills */
1478 efx_for_each_channel(channel
, efx
)
1479 efx_stop_channel(channel
);
1481 /* Stop all asynchronous port reconfigurations. Since all
1482 * event processing has already been stopped, there is no
1483 * window to loose phy events */
1486 /* Flush efx_mac_work(), refill_workqueue, monitor_work */
1489 /* Stop the kernel transmit interface late, so the watchdog
1490 * timer isn't ticking over the flush */
1491 netif_tx_stop_all_queues(efx
->net_dev
);
1492 netif_tx_lock_bh(efx
->net_dev
);
1493 netif_tx_unlock_bh(efx
->net_dev
);
1496 static void efx_remove_all(struct efx_nic
*efx
)
1498 efx_remove_filters(efx
);
1499 efx_remove_channels(efx
);
1500 efx_remove_port(efx
);
1501 efx_remove_nic(efx
);
1504 /**************************************************************************
1506 * Interrupt moderation
1508 **************************************************************************/
1510 static unsigned int irq_mod_ticks(unsigned int usecs
, unsigned int quantum_ns
)
1514 if (usecs
* 1000 < quantum_ns
)
1515 return 1; /* never round down to 0 */
1516 return usecs
* 1000 / quantum_ns
;
1519 /* Set interrupt moderation parameters */
1520 int efx_init_irq_moderation(struct efx_nic
*efx
, unsigned int tx_usecs
,
1521 unsigned int rx_usecs
, bool rx_adaptive
,
1522 bool rx_may_override_tx
)
1524 struct efx_channel
*channel
;
1525 unsigned int irq_mod_max
= DIV_ROUND_UP(efx
->type
->timer_period_max
*
1526 efx
->timer_quantum_ns
,
1528 unsigned int tx_ticks
;
1529 unsigned int rx_ticks
;
1531 EFX_ASSERT_RESET_SERIALISED(efx
);
1533 if (tx_usecs
> irq_mod_max
|| rx_usecs
> irq_mod_max
)
1536 tx_ticks
= irq_mod_ticks(tx_usecs
, efx
->timer_quantum_ns
);
1537 rx_ticks
= irq_mod_ticks(rx_usecs
, efx
->timer_quantum_ns
);
1539 if (tx_ticks
!= rx_ticks
&& efx
->tx_channel_offset
== 0 &&
1540 !rx_may_override_tx
) {
1541 netif_err(efx
, drv
, efx
->net_dev
, "Channels are shared. "
1542 "RX and TX IRQ moderation must be equal\n");
1546 efx
->irq_rx_adaptive
= rx_adaptive
;
1547 efx
->irq_rx_moderation
= rx_ticks
;
1548 efx_for_each_channel(channel
, efx
) {
1549 if (efx_channel_has_rx_queue(channel
))
1550 channel
->irq_moderation
= rx_ticks
;
1551 else if (efx_channel_has_tx_queues(channel
))
1552 channel
->irq_moderation
= tx_ticks
;
1558 void efx_get_irq_moderation(struct efx_nic
*efx
, unsigned int *tx_usecs
,
1559 unsigned int *rx_usecs
, bool *rx_adaptive
)
1561 /* We must round up when converting ticks to microseconds
1562 * because we round down when converting the other way.
1565 *rx_adaptive
= efx
->irq_rx_adaptive
;
1566 *rx_usecs
= DIV_ROUND_UP(efx
->irq_rx_moderation
*
1567 efx
->timer_quantum_ns
,
1570 /* If channels are shared between RX and TX, so is IRQ
1571 * moderation. Otherwise, IRQ moderation is the same for all
1572 * TX channels and is not adaptive.
1574 if (efx
->tx_channel_offset
== 0)
1575 *tx_usecs
= *rx_usecs
;
1577 *tx_usecs
= DIV_ROUND_UP(
1578 efx
->channel
[efx
->tx_channel_offset
]->irq_moderation
*
1579 efx
->timer_quantum_ns
,
1583 /**************************************************************************
1587 **************************************************************************/
1589 /* Run periodically off the general workqueue */
1590 static void efx_monitor(struct work_struct
*data
)
1592 struct efx_nic
*efx
= container_of(data
, struct efx_nic
,
1595 netif_vdbg(efx
, timer
, efx
->net_dev
,
1596 "hardware monitor executing on CPU %d\n",
1597 raw_smp_processor_id());
1598 BUG_ON(efx
->type
->monitor
== NULL
);
1600 /* If the mac_lock is already held then it is likely a port
1601 * reconfiguration is already in place, which will likely do
1602 * most of the work of monitor() anyway. */
1603 if (mutex_trylock(&efx
->mac_lock
)) {
1604 if (efx
->port_enabled
)
1605 efx
->type
->monitor(efx
);
1606 mutex_unlock(&efx
->mac_lock
);
1609 queue_delayed_work(efx
->workqueue
, &efx
->monitor_work
,
1610 efx_monitor_interval
);
1613 /**************************************************************************
1617 *************************************************************************/
1620 * Context: process, rtnl_lock() held.
1622 static int efx_ioctl(struct net_device
*net_dev
, struct ifreq
*ifr
, int cmd
)
1624 struct efx_nic
*efx
= netdev_priv(net_dev
);
1625 struct mii_ioctl_data
*data
= if_mii(ifr
);
1627 EFX_ASSERT_RESET_SERIALISED(efx
);
1629 /* Convert phy_id from older PRTAD/DEVAD format */
1630 if ((cmd
== SIOCGMIIREG
|| cmd
== SIOCSMIIREG
) &&
1631 (data
->phy_id
& 0xfc00) == 0x0400)
1632 data
->phy_id
^= MDIO_PHY_ID_C45
| 0x0400;
1634 return mdio_mii_ioctl(&efx
->mdio
, data
, cmd
);
1637 /**************************************************************************
1641 **************************************************************************/
1643 static void efx_init_napi(struct efx_nic
*efx
)
1645 struct efx_channel
*channel
;
1647 efx_for_each_channel(channel
, efx
) {
1648 channel
->napi_dev
= efx
->net_dev
;
1649 netif_napi_add(channel
->napi_dev
, &channel
->napi_str
,
1650 efx_poll
, napi_weight
);
1654 static void efx_fini_napi_channel(struct efx_channel
*channel
)
1656 if (channel
->napi_dev
)
1657 netif_napi_del(&channel
->napi_str
);
1658 channel
->napi_dev
= NULL
;
1661 static void efx_fini_napi(struct efx_nic
*efx
)
1663 struct efx_channel
*channel
;
1665 efx_for_each_channel(channel
, efx
)
1666 efx_fini_napi_channel(channel
);
1669 /**************************************************************************
1671 * Kernel netpoll interface
1673 *************************************************************************/
1675 #ifdef CONFIG_NET_POLL_CONTROLLER
1677 /* Although in the common case interrupts will be disabled, this is not
1678 * guaranteed. However, all our work happens inside the NAPI callback,
1679 * so no locking is required.
1681 static void efx_netpoll(struct net_device
*net_dev
)
1683 struct efx_nic
*efx
= netdev_priv(net_dev
);
1684 struct efx_channel
*channel
;
1686 efx_for_each_channel(channel
, efx
)
1687 efx_schedule_channel(channel
);
1692 /**************************************************************************
1694 * Kernel net device interface
1696 *************************************************************************/
1698 /* Context: process, rtnl_lock() held. */
1699 static int efx_net_open(struct net_device
*net_dev
)
1701 struct efx_nic
*efx
= netdev_priv(net_dev
);
1702 EFX_ASSERT_RESET_SERIALISED(efx
);
1704 netif_dbg(efx
, ifup
, efx
->net_dev
, "opening device on CPU %d\n",
1705 raw_smp_processor_id());
1707 if (efx
->state
== STATE_DISABLED
)
1709 if (efx
->phy_mode
& PHY_MODE_SPECIAL
)
1711 if (efx_mcdi_poll_reboot(efx
) && efx_reset(efx
, RESET_TYPE_ALL
))
1714 /* Notify the kernel of the link state polled during driver load,
1715 * before the monitor starts running */
1716 efx_link_status_changed(efx
);
1722 /* Context: process, rtnl_lock() held.
1723 * Note that the kernel will ignore our return code; this method
1724 * should really be a void.
1726 static int efx_net_stop(struct net_device
*net_dev
)
1728 struct efx_nic
*efx
= netdev_priv(net_dev
);
1730 netif_dbg(efx
, ifdown
, efx
->net_dev
, "closing on CPU %d\n",
1731 raw_smp_processor_id());
1733 if (efx
->state
!= STATE_DISABLED
) {
1734 /* Stop the device and flush all the channels */
1736 efx_fini_channels(efx
);
1737 efx_init_channels(efx
);
1743 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1744 static struct rtnl_link_stats64
*efx_net_stats(struct net_device
*net_dev
, struct rtnl_link_stats64
*stats
)
1746 struct efx_nic
*efx
= netdev_priv(net_dev
);
1747 struct efx_mac_stats
*mac_stats
= &efx
->mac_stats
;
1749 spin_lock_bh(&efx
->stats_lock
);
1751 efx
->type
->update_stats(efx
);
1753 stats
->rx_packets
= mac_stats
->rx_packets
;
1754 stats
->tx_packets
= mac_stats
->tx_packets
;
1755 stats
->rx_bytes
= mac_stats
->rx_bytes
;
1756 stats
->tx_bytes
= mac_stats
->tx_bytes
;
1757 stats
->rx_dropped
= efx
->n_rx_nodesc_drop_cnt
;
1758 stats
->multicast
= mac_stats
->rx_multicast
;
1759 stats
->collisions
= mac_stats
->tx_collision
;
1760 stats
->rx_length_errors
= (mac_stats
->rx_gtjumbo
+
1761 mac_stats
->rx_length_error
);
1762 stats
->rx_crc_errors
= mac_stats
->rx_bad
;
1763 stats
->rx_frame_errors
= mac_stats
->rx_align_error
;
1764 stats
->rx_fifo_errors
= mac_stats
->rx_overflow
;
1765 stats
->rx_missed_errors
= mac_stats
->rx_missed
;
1766 stats
->tx_window_errors
= mac_stats
->tx_late_collision
;
1768 stats
->rx_errors
= (stats
->rx_length_errors
+
1769 stats
->rx_crc_errors
+
1770 stats
->rx_frame_errors
+
1771 mac_stats
->rx_symbol_error
);
1772 stats
->tx_errors
= (stats
->tx_window_errors
+
1775 spin_unlock_bh(&efx
->stats_lock
);
1780 /* Context: netif_tx_lock held, BHs disabled. */
1781 static void efx_watchdog(struct net_device
*net_dev
)
1783 struct efx_nic
*efx
= netdev_priv(net_dev
);
1785 netif_err(efx
, tx_err
, efx
->net_dev
,
1786 "TX stuck with port_enabled=%d: resetting channels\n",
1789 efx_schedule_reset(efx
, RESET_TYPE_TX_WATCHDOG
);
1793 /* Context: process, rtnl_lock() held. */
1794 static int efx_change_mtu(struct net_device
*net_dev
, int new_mtu
)
1796 struct efx_nic
*efx
= netdev_priv(net_dev
);
1799 EFX_ASSERT_RESET_SERIALISED(efx
);
1801 if (new_mtu
> EFX_MAX_MTU
)
1806 netif_dbg(efx
, drv
, efx
->net_dev
, "changing MTU to %d\n", new_mtu
);
1808 efx_fini_channels(efx
);
1810 mutex_lock(&efx
->mac_lock
);
1811 /* Reconfigure the MAC before enabling the dma queues so that
1812 * the RX buffers don't overflow */
1813 net_dev
->mtu
= new_mtu
;
1814 efx
->type
->reconfigure_mac(efx
);
1815 mutex_unlock(&efx
->mac_lock
);
1817 efx_init_channels(efx
);
1823 static int efx_set_mac_address(struct net_device
*net_dev
, void *data
)
1825 struct efx_nic
*efx
= netdev_priv(net_dev
);
1826 struct sockaddr
*addr
= data
;
1827 char *new_addr
= addr
->sa_data
;
1829 EFX_ASSERT_RESET_SERIALISED(efx
);
1831 if (!is_valid_ether_addr(new_addr
)) {
1832 netif_err(efx
, drv
, efx
->net_dev
,
1833 "invalid ethernet MAC address requested: %pM\n",
1838 memcpy(net_dev
->dev_addr
, new_addr
, net_dev
->addr_len
);
1840 /* Reconfigure the MAC */
1841 mutex_lock(&efx
->mac_lock
);
1842 efx
->type
->reconfigure_mac(efx
);
1843 mutex_unlock(&efx
->mac_lock
);
1848 /* Context: netif_addr_lock held, BHs disabled. */
1849 static void efx_set_multicast_list(struct net_device
*net_dev
)
1851 struct efx_nic
*efx
= netdev_priv(net_dev
);
1852 struct netdev_hw_addr
*ha
;
1853 union efx_multicast_hash
*mc_hash
= &efx
->multicast_hash
;
1857 efx
->promiscuous
= !!(net_dev
->flags
& IFF_PROMISC
);
1859 /* Build multicast hash table */
1860 if (efx
->promiscuous
|| (net_dev
->flags
& IFF_ALLMULTI
)) {
1861 memset(mc_hash
, 0xff, sizeof(*mc_hash
));
1863 memset(mc_hash
, 0x00, sizeof(*mc_hash
));
1864 netdev_for_each_mc_addr(ha
, net_dev
) {
1865 crc
= ether_crc_le(ETH_ALEN
, ha
->addr
);
1866 bit
= crc
& (EFX_MCAST_HASH_ENTRIES
- 1);
1867 set_bit_le(bit
, mc_hash
->byte
);
1870 /* Broadcast packets go through the multicast hash filter.
1871 * ether_crc_le() of the broadcast address is 0xbe2612ff
1872 * so we always add bit 0xff to the mask.
1874 set_bit_le(0xff, mc_hash
->byte
);
1877 if (efx
->port_enabled
)
1878 queue_work(efx
->workqueue
, &efx
->mac_work
);
1879 /* Otherwise efx_start_port() will do this */
1882 static int efx_set_features(struct net_device
*net_dev
, netdev_features_t data
)
1884 struct efx_nic
*efx
= netdev_priv(net_dev
);
1886 /* If disabling RX n-tuple filtering, clear existing filters */
1887 if (net_dev
->features
& ~data
& NETIF_F_NTUPLE
)
1888 efx_filter_clear_rx(efx
, EFX_FILTER_PRI_MANUAL
);
1893 static const struct net_device_ops efx_netdev_ops
= {
1894 .ndo_open
= efx_net_open
,
1895 .ndo_stop
= efx_net_stop
,
1896 .ndo_get_stats64
= efx_net_stats
,
1897 .ndo_tx_timeout
= efx_watchdog
,
1898 .ndo_start_xmit
= efx_hard_start_xmit
,
1899 .ndo_validate_addr
= eth_validate_addr
,
1900 .ndo_do_ioctl
= efx_ioctl
,
1901 .ndo_change_mtu
= efx_change_mtu
,
1902 .ndo_set_mac_address
= efx_set_mac_address
,
1903 .ndo_set_rx_mode
= efx_set_multicast_list
,
1904 .ndo_set_features
= efx_set_features
,
1905 #ifdef CONFIG_NET_POLL_CONTROLLER
1906 .ndo_poll_controller
= efx_netpoll
,
1908 .ndo_setup_tc
= efx_setup_tc
,
1909 #ifdef CONFIG_RFS_ACCEL
1910 .ndo_rx_flow_steer
= efx_filter_rfs
,
1914 static void efx_update_name(struct efx_nic
*efx
)
1916 strcpy(efx
->name
, efx
->net_dev
->name
);
1917 efx_mtd_rename(efx
);
1918 efx_set_channel_names(efx
);
1921 static int efx_netdev_event(struct notifier_block
*this,
1922 unsigned long event
, void *ptr
)
1924 struct net_device
*net_dev
= ptr
;
1926 if (net_dev
->netdev_ops
== &efx_netdev_ops
&&
1927 event
== NETDEV_CHANGENAME
)
1928 efx_update_name(netdev_priv(net_dev
));
1933 static struct notifier_block efx_netdev_notifier
= {
1934 .notifier_call
= efx_netdev_event
,
1938 show_phy_type(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
1940 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
1941 return sprintf(buf
, "%d\n", efx
->phy_type
);
1943 static DEVICE_ATTR(phy_type
, 0644, show_phy_type
, NULL
);
1945 static int efx_register_netdev(struct efx_nic
*efx
)
1947 struct net_device
*net_dev
= efx
->net_dev
;
1948 struct efx_channel
*channel
;
1951 net_dev
->watchdog_timeo
= 5 * HZ
;
1952 net_dev
->irq
= efx
->pci_dev
->irq
;
1953 net_dev
->netdev_ops
= &efx_netdev_ops
;
1954 SET_ETHTOOL_OPS(net_dev
, &efx_ethtool_ops
);
1958 rc
= dev_alloc_name(net_dev
, net_dev
->name
);
1961 efx_update_name(efx
);
1963 rc
= register_netdevice(net_dev
);
1967 efx_for_each_channel(channel
, efx
) {
1968 struct efx_tx_queue
*tx_queue
;
1969 efx_for_each_channel_tx_queue(tx_queue
, channel
)
1970 efx_init_tx_queue_core_txq(tx_queue
);
1973 /* Always start with carrier off; PHY events will detect the link */
1974 netif_carrier_off(net_dev
);
1978 rc
= device_create_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
1980 netif_err(efx
, drv
, efx
->net_dev
,
1981 "failed to init net dev attributes\n");
1982 goto fail_registered
;
1989 netif_err(efx
, drv
, efx
->net_dev
, "could not register net dev\n");
1993 unregister_netdev(net_dev
);
1997 static void efx_unregister_netdev(struct efx_nic
*efx
)
1999 struct efx_channel
*channel
;
2000 struct efx_tx_queue
*tx_queue
;
2005 BUG_ON(netdev_priv(efx
->net_dev
) != efx
);
2007 /* Free up any skbs still remaining. This has to happen before
2008 * we try to unregister the netdev as running their destructors
2009 * may be needed to get the device ref. count to 0. */
2010 efx_for_each_channel(channel
, efx
) {
2011 efx_for_each_channel_tx_queue(tx_queue
, channel
)
2012 efx_release_tx_buffers(tx_queue
);
2015 strlcpy(efx
->name
, pci_name(efx
->pci_dev
), sizeof(efx
->name
));
2016 device_remove_file(&efx
->pci_dev
->dev
, &dev_attr_phy_type
);
2017 unregister_netdev(efx
->net_dev
);
2020 /**************************************************************************
2022 * Device reset and suspend
2024 **************************************************************************/
2026 /* Tears down the entire software state and most of the hardware state
2028 void efx_reset_down(struct efx_nic
*efx
, enum reset_type method
)
2030 EFX_ASSERT_RESET_SERIALISED(efx
);
2033 mutex_lock(&efx
->mac_lock
);
2035 efx_fini_channels(efx
);
2036 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
)
2037 efx
->phy_op
->fini(efx
);
2038 efx
->type
->fini(efx
);
2041 /* This function will always ensure that the locks acquired in
2042 * efx_reset_down() are released. A failure return code indicates
2043 * that we were unable to reinitialise the hardware, and the
2044 * driver should be disabled. If ok is false, then the rx and tx
2045 * engines are not restarted, pending a RESET_DISABLE. */
2046 int efx_reset_up(struct efx_nic
*efx
, enum reset_type method
, bool ok
)
2050 EFX_ASSERT_RESET_SERIALISED(efx
);
2052 rc
= efx
->type
->init(efx
);
2054 netif_err(efx
, drv
, efx
->net_dev
, "failed to initialise NIC\n");
2061 if (efx
->port_initialized
&& method
!= RESET_TYPE_INVISIBLE
) {
2062 rc
= efx
->phy_op
->init(efx
);
2065 if (efx
->phy_op
->reconfigure(efx
))
2066 netif_err(efx
, drv
, efx
->net_dev
,
2067 "could not restore PHY settings\n");
2070 efx
->type
->reconfigure_mac(efx
);
2072 efx_init_channels(efx
);
2073 efx_restore_filters(efx
);
2075 mutex_unlock(&efx
->mac_lock
);
2082 efx
->port_initialized
= false;
2084 mutex_unlock(&efx
->mac_lock
);
2089 /* Reset the NIC using the specified method. Note that the reset may
2090 * fail, in which case the card will be left in an unusable state.
2092 * Caller must hold the rtnl_lock.
2094 int efx_reset(struct efx_nic
*efx
, enum reset_type method
)
2099 netif_info(efx
, drv
, efx
->net_dev
, "resetting (%s)\n",
2100 RESET_TYPE(method
));
2102 netif_device_detach(efx
->net_dev
);
2103 efx_reset_down(efx
, method
);
2105 rc
= efx
->type
->reset(efx
, method
);
2107 netif_err(efx
, drv
, efx
->net_dev
, "failed to reset hardware\n");
2111 /* Clear flags for the scopes we covered. We assume the NIC and
2112 * driver are now quiescent so that there is no race here.
2114 efx
->reset_pending
&= -(1 << (method
+ 1));
2116 /* Reinitialise bus-mastering, which may have been turned off before
2117 * the reset was scheduled. This is still appropriate, even in the
2118 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2119 * can respond to requests. */
2120 pci_set_master(efx
->pci_dev
);
2123 /* Leave device stopped if necessary */
2124 disabled
= rc
|| method
== RESET_TYPE_DISABLE
;
2125 rc2
= efx_reset_up(efx
, method
, !disabled
);
2133 dev_close(efx
->net_dev
);
2134 netif_err(efx
, drv
, efx
->net_dev
, "has been disabled\n");
2135 efx
->state
= STATE_DISABLED
;
2137 netif_dbg(efx
, drv
, efx
->net_dev
, "reset complete\n");
2138 netif_device_attach(efx
->net_dev
);
2143 /* The worker thread exists so that code that cannot sleep can
2144 * schedule a reset for later.
2146 static void efx_reset_work(struct work_struct
*data
)
2148 struct efx_nic
*efx
= container_of(data
, struct efx_nic
, reset_work
);
2149 unsigned long pending
= ACCESS_ONCE(efx
->reset_pending
);
2154 /* If we're not RUNNING then don't reset. Leave the reset_pending
2155 * flags set so that efx_pci_probe_main will be retried */
2156 if (efx
->state
!= STATE_RUNNING
) {
2157 netif_info(efx
, drv
, efx
->net_dev
,
2158 "scheduled reset quenched. NIC not RUNNING\n");
2163 (void)efx_reset(efx
, fls(pending
) - 1);
2167 void efx_schedule_reset(struct efx_nic
*efx
, enum reset_type type
)
2169 enum reset_type method
;
2172 case RESET_TYPE_INVISIBLE
:
2173 case RESET_TYPE_ALL
:
2174 case RESET_TYPE_WORLD
:
2175 case RESET_TYPE_DISABLE
:
2177 netif_dbg(efx
, drv
, efx
->net_dev
, "scheduling %s reset\n",
2178 RESET_TYPE(method
));
2181 method
= efx
->type
->map_reset_reason(type
);
2182 netif_dbg(efx
, drv
, efx
->net_dev
,
2183 "scheduling %s reset for %s\n",
2184 RESET_TYPE(method
), RESET_TYPE(type
));
2188 set_bit(method
, &efx
->reset_pending
);
2190 /* efx_process_channel() will no longer read events once a
2191 * reset is scheduled. So switch back to poll'd MCDI completions. */
2192 efx_mcdi_mode_poll(efx
);
2194 queue_work(reset_workqueue
, &efx
->reset_work
);
2197 /**************************************************************************
2199 * List of NICs we support
2201 **************************************************************************/
2203 /* PCI device ID table */
2204 static DEFINE_PCI_DEVICE_TABLE(efx_pci_table
) = {
2205 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
,
2206 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0
),
2207 .driver_data
= (unsigned long) &falcon_a1_nic_type
},
2208 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
,
2209 PCI_DEVICE_ID_SOLARFLARE_SFC4000B
),
2210 .driver_data
= (unsigned long) &falcon_b0_nic_type
},
2211 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
, 0x0803), /* SFC9020 */
2212 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2213 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE
, 0x0813), /* SFL9021 */
2214 .driver_data
= (unsigned long) &siena_a0_nic_type
},
2215 {0} /* end of list */
2218 /**************************************************************************
2220 * Dummy PHY/MAC operations
2222 * Can be used for some unimplemented operations
2223 * Needed so all function pointers are valid and do not have to be tested
2226 **************************************************************************/
2227 int efx_port_dummy_op_int(struct efx_nic
*efx
)
2231 void efx_port_dummy_op_void(struct efx_nic
*efx
) {}
2233 static bool efx_port_dummy_op_poll(struct efx_nic
*efx
)
2238 static const struct efx_phy_operations efx_dummy_phy_operations
= {
2239 .init
= efx_port_dummy_op_int
,
2240 .reconfigure
= efx_port_dummy_op_int
,
2241 .poll
= efx_port_dummy_op_poll
,
2242 .fini
= efx_port_dummy_op_void
,
2245 /**************************************************************************
2249 **************************************************************************/
2251 /* This zeroes out and then fills in the invariants in a struct
2252 * efx_nic (including all sub-structures).
2254 static int efx_init_struct(struct efx_nic
*efx
, const struct efx_nic_type
*type
,
2255 struct pci_dev
*pci_dev
, struct net_device
*net_dev
)
2259 /* Initialise common structures */
2260 memset(efx
, 0, sizeof(*efx
));
2261 spin_lock_init(&efx
->biu_lock
);
2262 #ifdef CONFIG_SFC_MTD
2263 INIT_LIST_HEAD(&efx
->mtd_list
);
2265 INIT_WORK(&efx
->reset_work
, efx_reset_work
);
2266 INIT_DELAYED_WORK(&efx
->monitor_work
, efx_monitor
);
2267 efx
->pci_dev
= pci_dev
;
2268 efx
->msg_enable
= debug
;
2269 efx
->state
= STATE_INIT
;
2270 strlcpy(efx
->name
, pci_name(pci_dev
), sizeof(efx
->name
));
2272 efx
->net_dev
= net_dev
;
2273 spin_lock_init(&efx
->stats_lock
);
2274 mutex_init(&efx
->mac_lock
);
2275 efx
->phy_op
= &efx_dummy_phy_operations
;
2276 efx
->mdio
.dev
= net_dev
;
2277 INIT_WORK(&efx
->mac_work
, efx_mac_work
);
2279 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++) {
2280 efx
->channel
[i
] = efx_alloc_channel(efx
, i
, NULL
);
2281 if (!efx
->channel
[i
])
2287 EFX_BUG_ON_PARANOID(efx
->type
->phys_addr_channels
> EFX_MAX_CHANNELS
);
2289 /* Higher numbered interrupt modes are less capable! */
2290 efx
->interrupt_mode
= max(efx
->type
->max_interrupt_mode
,
2293 /* Would be good to use the net_dev name, but we're too early */
2294 snprintf(efx
->workqueue_name
, sizeof(efx
->workqueue_name
), "sfc%s",
2296 efx
->workqueue
= create_singlethread_workqueue(efx
->workqueue_name
);
2297 if (!efx
->workqueue
)
2303 efx_fini_struct(efx
);
2307 static void efx_fini_struct(struct efx_nic
*efx
)
2311 for (i
= 0; i
< EFX_MAX_CHANNELS
; i
++)
2312 kfree(efx
->channel
[i
]);
2314 if (efx
->workqueue
) {
2315 destroy_workqueue(efx
->workqueue
);
2316 efx
->workqueue
= NULL
;
2320 /**************************************************************************
2324 **************************************************************************/
2326 /* Main body of final NIC shutdown code
2327 * This is called only at module unload (or hotplug removal).
2329 static void efx_pci_remove_main(struct efx_nic
*efx
)
2331 #ifdef CONFIG_RFS_ACCEL
2332 free_irq_cpu_rmap(efx
->net_dev
->rx_cpu_rmap
);
2333 efx
->net_dev
->rx_cpu_rmap
= NULL
;
2335 efx_nic_fini_interrupt(efx
);
2336 efx_fini_channels(efx
);
2338 efx
->type
->fini(efx
);
2340 efx_remove_all(efx
);
2343 /* Final NIC shutdown
2344 * This is called only at module unload (or hotplug removal).
2346 static void efx_pci_remove(struct pci_dev
*pci_dev
)
2348 struct efx_nic
*efx
;
2350 efx
= pci_get_drvdata(pci_dev
);
2354 /* Mark the NIC as fini, then stop the interface */
2356 efx
->state
= STATE_FINI
;
2357 dev_close(efx
->net_dev
);
2359 /* Allow any queued efx_resets() to complete */
2362 efx_unregister_netdev(efx
);
2364 efx_mtd_remove(efx
);
2366 /* Wait for any scheduled resets to complete. No more will be
2367 * scheduled from this point because efx_stop_all() has been
2368 * called, we are no longer registered with driverlink, and
2369 * the net_device's have been removed. */
2370 cancel_work_sync(&efx
->reset_work
);
2372 efx_pci_remove_main(efx
);
2375 netif_dbg(efx
, drv
, efx
->net_dev
, "shutdown successful\n");
2377 pci_set_drvdata(pci_dev
, NULL
);
2378 efx_fini_struct(efx
);
2379 free_netdev(efx
->net_dev
);
2382 /* Main body of NIC initialisation
2383 * This is called at module load (or hotplug insertion, theoretically).
2385 static int efx_pci_probe_main(struct efx_nic
*efx
)
2389 /* Do start-of-day initialisation */
2390 rc
= efx_probe_all(efx
);
2396 rc
= efx
->type
->init(efx
);
2398 netif_err(efx
, probe
, efx
->net_dev
,
2399 "failed to initialise NIC\n");
2403 rc
= efx_init_port(efx
);
2405 netif_err(efx
, probe
, efx
->net_dev
,
2406 "failed to initialise port\n");
2410 efx_init_channels(efx
);
2412 rc
= efx_nic_init_interrupt(efx
);
2419 efx_fini_channels(efx
);
2422 efx
->type
->fini(efx
);
2425 efx_remove_all(efx
);
2430 /* NIC initialisation
2432 * This is called at module load (or hotplug insertion,
2433 * theoretically). It sets up PCI mappings, resets the NIC,
2434 * sets up and registers the network devices with the kernel and hooks
2435 * the interrupt service routine. It does not prepare the device for
2436 * transmission; this is left to the first time one of the network
2437 * interfaces is brought up (i.e. efx_net_open).
2439 static int __devinit
efx_pci_probe(struct pci_dev
*pci_dev
,
2440 const struct pci_device_id
*entry
)
2442 const struct efx_nic_type
*type
= (const struct efx_nic_type
*) entry
->driver_data
;
2443 struct net_device
*net_dev
;
2444 struct efx_nic
*efx
;
2447 /* Allocate and initialise a struct net_device and struct efx_nic */
2448 net_dev
= alloc_etherdev_mqs(sizeof(*efx
), EFX_MAX_CORE_TX_QUEUES
,
2452 net_dev
->features
|= (type
->offload_features
| NETIF_F_SG
|
2453 NETIF_F_HIGHDMA
| NETIF_F_TSO
|
2455 if (type
->offload_features
& NETIF_F_V6_CSUM
)
2456 net_dev
->features
|= NETIF_F_TSO6
;
2457 /* Mask for features that also apply to VLAN devices */
2458 net_dev
->vlan_features
|= (NETIF_F_ALL_CSUM
| NETIF_F_SG
|
2459 NETIF_F_HIGHDMA
| NETIF_F_ALL_TSO
|
2461 /* All offloads can be toggled */
2462 net_dev
->hw_features
= net_dev
->features
& ~NETIF_F_HIGHDMA
;
2463 efx
= netdev_priv(net_dev
);
2464 pci_set_drvdata(pci_dev
, efx
);
2465 SET_NETDEV_DEV(net_dev
, &pci_dev
->dev
);
2466 rc
= efx_init_struct(efx
, type
, pci_dev
, net_dev
);
2470 netif_info(efx
, probe
, efx
->net_dev
,
2471 "Solarflare NIC detected\n");
2473 /* Set up basic I/O (BAR mappings etc) */
2474 rc
= efx_init_io(efx
);
2478 /* No serialisation is required with the reset path because
2479 * we're in STATE_INIT. */
2480 for (i
= 0; i
< 5; i
++) {
2481 rc
= efx_pci_probe_main(efx
);
2483 /* Serialise against efx_reset(). No more resets will be
2484 * scheduled since efx_stop_all() has been called, and we
2485 * have not and never have been registered with either
2486 * the rtnetlink or driverlink layers. */
2487 cancel_work_sync(&efx
->reset_work
);
2490 if (efx
->reset_pending
) {
2491 /* If there was a scheduled reset during
2492 * probe, the NIC is probably hosed anyway */
2493 efx_pci_remove_main(efx
);
2500 /* Retry if a recoverably reset event has been scheduled */
2501 if (efx
->reset_pending
&
2502 ~(1 << RESET_TYPE_INVISIBLE
| 1 << RESET_TYPE_ALL
) ||
2503 !efx
->reset_pending
)
2506 efx
->reset_pending
= 0;
2510 netif_err(efx
, probe
, efx
->net_dev
, "Could not reset NIC\n");
2514 /* Switch to the running state before we expose the device to the OS,
2515 * so that dev_open()|efx_start_all() will actually start the device */
2516 efx
->state
= STATE_RUNNING
;
2518 rc
= efx_register_netdev(efx
);
2522 netif_dbg(efx
, probe
, efx
->net_dev
, "initialisation successful\n");
2525 efx_mtd_probe(efx
); /* allowed to fail */
2530 efx_pci_remove_main(efx
);
2535 efx_fini_struct(efx
);
2538 netif_dbg(efx
, drv
, efx
->net_dev
, "initialisation failed. rc=%d\n", rc
);
2539 free_netdev(net_dev
);
2543 static int efx_pm_freeze(struct device
*dev
)
2545 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2547 efx
->state
= STATE_FINI
;
2549 netif_device_detach(efx
->net_dev
);
2552 efx_fini_channels(efx
);
2557 static int efx_pm_thaw(struct device
*dev
)
2559 struct efx_nic
*efx
= pci_get_drvdata(to_pci_dev(dev
));
2561 efx
->state
= STATE_INIT
;
2563 efx_init_channels(efx
);
2565 mutex_lock(&efx
->mac_lock
);
2566 efx
->phy_op
->reconfigure(efx
);
2567 mutex_unlock(&efx
->mac_lock
);
2571 netif_device_attach(efx
->net_dev
);
2573 efx
->state
= STATE_RUNNING
;
2575 efx
->type
->resume_wol(efx
);
2577 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
2578 queue_work(reset_workqueue
, &efx
->reset_work
);
2583 static int efx_pm_poweroff(struct device
*dev
)
2585 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2586 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2588 efx
->type
->fini(efx
);
2590 efx
->reset_pending
= 0;
2592 pci_save_state(pci_dev
);
2593 return pci_set_power_state(pci_dev
, PCI_D3hot
);
2596 /* Used for both resume and restore */
2597 static int efx_pm_resume(struct device
*dev
)
2599 struct pci_dev
*pci_dev
= to_pci_dev(dev
);
2600 struct efx_nic
*efx
= pci_get_drvdata(pci_dev
);
2603 rc
= pci_set_power_state(pci_dev
, PCI_D0
);
2606 pci_restore_state(pci_dev
);
2607 rc
= pci_enable_device(pci_dev
);
2610 pci_set_master(efx
->pci_dev
);
2611 rc
= efx
->type
->reset(efx
, RESET_TYPE_ALL
);
2614 rc
= efx
->type
->init(efx
);
2621 static int efx_pm_suspend(struct device
*dev
)
2626 rc
= efx_pm_poweroff(dev
);
2632 static const struct dev_pm_ops efx_pm_ops
= {
2633 .suspend
= efx_pm_suspend
,
2634 .resume
= efx_pm_resume
,
2635 .freeze
= efx_pm_freeze
,
2636 .thaw
= efx_pm_thaw
,
2637 .poweroff
= efx_pm_poweroff
,
2638 .restore
= efx_pm_resume
,
2641 static struct pci_driver efx_pci_driver
= {
2642 .name
= KBUILD_MODNAME
,
2643 .id_table
= efx_pci_table
,
2644 .probe
= efx_pci_probe
,
2645 .remove
= efx_pci_remove
,
2646 .driver
.pm
= &efx_pm_ops
,
2649 /**************************************************************************
2651 * Kernel module interface
2653 *************************************************************************/
2655 module_param(interrupt_mode
, uint
, 0444);
2656 MODULE_PARM_DESC(interrupt_mode
,
2657 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2659 static int __init
efx_init_module(void)
2663 printk(KERN_INFO
"Solarflare NET driver v" EFX_DRIVER_VERSION
"\n");
2665 rc
= register_netdevice_notifier(&efx_netdev_notifier
);
2669 reset_workqueue
= create_singlethread_workqueue("sfc_reset");
2670 if (!reset_workqueue
) {
2675 rc
= pci_register_driver(&efx_pci_driver
);
2682 destroy_workqueue(reset_workqueue
);
2684 unregister_netdevice_notifier(&efx_netdev_notifier
);
2689 static void __exit
efx_exit_module(void)
2691 printk(KERN_INFO
"Solarflare NET driver unloading\n");
2693 pci_unregister_driver(&efx_pci_driver
);
2694 destroy_workqueue(reset_workqueue
);
2695 unregister_netdevice_notifier(&efx_netdev_notifier
);
2699 module_init(efx_init_module
);
2700 module_exit(efx_exit_module
);
2702 MODULE_AUTHOR("Solarflare Communications and "
2703 "Michael Brown <mbrown@fensystems.co.uk>");
2704 MODULE_DESCRIPTION("Solarflare Communications network driver");
2705 MODULE_LICENSE("GPL");
2706 MODULE_DEVICE_TABLE(pci
, efx_pci_table
);