1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2011 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
11 /* Common definitions for all Efx net driver code */
13 #ifndef EFX_NET_DRIVER_H
14 #define EFX_NET_DRIVER_H
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
18 #include <linux/ethtool.h>
19 #include <linux/if_vlan.h>
20 #include <linux/timer.h>
21 #include <linux/mdio.h>
22 #include <linux/list.h>
23 #include <linux/pci.h>
24 #include <linux/device.h>
25 #include <linux/highmem.h>
26 #include <linux/workqueue.h>
27 #include <linux/mutex.h>
28 #include <linux/vmalloc.h>
29 #include <linux/i2c.h>
30 #include <linux/mtd/mtd.h>
36 /**************************************************************************
40 **************************************************************************/
42 #define EFX_DRIVER_VERSION "3.2"
45 #define EFX_BUG_ON_PARANOID(x) BUG_ON(x)
46 #define EFX_WARN_ON_PARANOID(x) WARN_ON(x)
48 #define EFX_BUG_ON_PARANOID(x) do {} while (0)
49 #define EFX_WARN_ON_PARANOID(x) do {} while (0)
52 /**************************************************************************
56 **************************************************************************/
58 #define EFX_MAX_CHANNELS 32U
59 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS
60 #define EFX_EXTRA_CHANNEL_IOV 0
61 #define EFX_EXTRA_CHANNEL_PTP 1
62 #define EFX_MAX_EXTRA_CHANNELS 2U
64 /* Checksum generation is a per-queue option in hardware, so each
65 * queue visible to the networking core is backed by two hardware TX
67 #define EFX_MAX_TX_TC 2
68 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)
69 #define EFX_TXQ_TYPE_OFFLOAD 1 /* flag */
70 #define EFX_TXQ_TYPE_HIGHPRI 2 /* flag */
71 #define EFX_TXQ_TYPES 4
72 #define EFX_MAX_TX_QUEUES (EFX_TXQ_TYPES * EFX_MAX_CHANNELS)
74 /* Maximum possible MTU the driver supports */
75 #define EFX_MAX_MTU (9 * 1024)
77 /* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
78 * and should be a multiple of the cache line size.
80 #define EFX_RX_USR_BUF_SIZE (2048 - 256)
82 /* If possible, we should ensure cache line alignment at start and end
83 * of every buffer. Otherwise, we just need to ensure 4-byte
84 * alignment of the network header.
87 #define EFX_RX_BUF_ALIGNMENT L1_CACHE_BYTES
89 #define EFX_RX_BUF_ALIGNMENT 4
92 /* Forward declare Precision Time Protocol (PTP) support structure. */
95 struct efx_self_tests
;
98 * struct efx_buffer - A general-purpose DMA buffer
99 * @addr: host base address of the buffer
100 * @dma_addr: DMA base address of the buffer
101 * @len: Buffer length, in bytes
103 * The NIC uses these buffers for its interrupt status registers and
113 * struct efx_special_buffer - DMA buffer entered into buffer table
114 * @buf: Standard &struct efx_buffer
115 * @index: Buffer index within controller;s buffer table
116 * @entries: Number of buffer table entries
118 * The NIC has a buffer table that maps buffers of size %EFX_BUF_SIZE.
119 * Event and descriptor rings are addressed via one or more buffer
120 * table entries (and so can be physically non-contiguous, although we
121 * currently do not take advantage of that). On Falcon and Siena we
122 * have to take care of allocating and initialising the entries
123 * ourselves. On later hardware this is managed by the firmware and
124 * @index and @entries are left as 0.
126 struct efx_special_buffer
{
127 struct efx_buffer buf
;
129 unsigned int entries
;
133 * struct efx_tx_buffer - buffer state for a TX descriptor
134 * @skb: When @flags & %EFX_TX_BUF_SKB, the associated socket buffer to be
135 * freed when descriptor completes
136 * @heap_buf: When @flags & %EFX_TX_BUF_HEAP, the associated heap buffer to be
137 * freed when descriptor completes.
138 * @dma_addr: DMA address of the fragment.
139 * @flags: Flags for allocation and DMA mapping type
140 * @len: Length of this fragment.
141 * This field is zero when the queue slot is empty.
142 * @unmap_len: Length of this fragment to unmap
144 struct efx_tx_buffer
{
146 const struct sk_buff
*skb
;
150 unsigned short flags
;
152 unsigned short unmap_len
;
154 #define EFX_TX_BUF_CONT 1 /* not last descriptor of packet */
155 #define EFX_TX_BUF_SKB 2 /* buffer is last part of skb */
156 #define EFX_TX_BUF_HEAP 4 /* buffer was allocated with kmalloc() */
157 #define EFX_TX_BUF_MAP_SINGLE 8 /* buffer was mapped with dma_map_single() */
160 * struct efx_tx_queue - An Efx TX queue
162 * This is a ring buffer of TX fragments.
163 * Since the TX completion path always executes on the same
164 * CPU and the xmit path can operate on different CPUs,
165 * performance is increased by ensuring that the completion
166 * path and the xmit path operate on different cache lines.
167 * This is particularly important if the xmit path is always
168 * executing on one CPU which is different from the completion
169 * path. There is also a cache line for members which are
170 * read but not written on the fast path.
172 * @efx: The associated Efx NIC
173 * @queue: DMA queue number
174 * @channel: The associated channel
175 * @core_txq: The networking core TX queue structure
176 * @buffer: The software buffer ring
177 * @tsoh_page: Array of pages of TSO header buffers
178 * @txd: The hardware descriptor ring
179 * @ptr_mask: The size of the ring minus 1.
180 * @initialised: Has hardware queue been initialised?
181 * @read_count: Current read pointer.
182 * This is the number of buffers that have been removed from both rings.
183 * @old_write_count: The value of @write_count when last checked.
184 * This is here for performance reasons. The xmit path will
185 * only get the up-to-date value of @write_count if this
186 * variable indicates that the queue is empty. This is to
187 * avoid cache-line ping-pong between the xmit path and the
189 * @merge_events: Number of TX merged completion events
190 * @insert_count: Current insert pointer
191 * This is the number of buffers that have been added to the
193 * @write_count: Current write pointer
194 * This is the number of buffers that have been added to the
196 * @old_read_count: The value of read_count when last checked.
197 * This is here for performance reasons. The xmit path will
198 * only get the up-to-date value of read_count if this
199 * variable indicates that the queue is full. This is to
200 * avoid cache-line ping-pong between the xmit path and the
202 * @tso_bursts: Number of times TSO xmit invoked by kernel
203 * @tso_long_headers: Number of packets with headers too long for standard
205 * @tso_packets: Number of packets via the TSO xmit path
206 * @pushes: Number of times the TX push feature has been used
207 * @empty_read_count: If the completion path has seen the queue as empty
208 * and the transmission path has not yet checked this, the value of
209 * @read_count bitwise-added to %EFX_EMPTY_COUNT_VALID; otherwise 0.
211 struct efx_tx_queue
{
212 /* Members which don't change on the fast path */
213 struct efx_nic
*efx ____cacheline_aligned_in_smp
;
215 struct efx_channel
*channel
;
216 struct netdev_queue
*core_txq
;
217 struct efx_tx_buffer
*buffer
;
218 struct efx_buffer
*tsoh_page
;
219 struct efx_special_buffer txd
;
220 unsigned int ptr_mask
;
223 /* Members used mainly on the completion path */
224 unsigned int read_count ____cacheline_aligned_in_smp
;
225 unsigned int old_write_count
;
226 unsigned int merge_events
;
228 /* Members used only on the xmit path */
229 unsigned int insert_count ____cacheline_aligned_in_smp
;
230 unsigned int write_count
;
231 unsigned int old_read_count
;
232 unsigned int tso_bursts
;
233 unsigned int tso_long_headers
;
234 unsigned int tso_packets
;
237 /* Members shared between paths and sometimes updated */
238 unsigned int empty_read_count ____cacheline_aligned_in_smp
;
239 #define EFX_EMPTY_COUNT_VALID 0x80000000
240 atomic_t flush_outstanding
;
244 * struct efx_rx_buffer - An Efx RX data buffer
245 * @dma_addr: DMA base address of the buffer
246 * @page: The associated page buffer.
247 * Will be %NULL if the buffer slot is currently free.
248 * @page_offset: If pending: offset in @page of DMA base address.
249 * If completed: offset in @page of Ethernet header.
250 * @len: If pending: length for DMA descriptor.
251 * If completed: received length, excluding hash prefix.
252 * @flags: Flags for buffer and packet state. These are only set on the
253 * first buffer of a scattered packet.
255 struct efx_rx_buffer
{
262 #define EFX_RX_BUF_LAST_IN_PAGE 0x0001
263 #define EFX_RX_PKT_CSUMMED 0x0002
264 #define EFX_RX_PKT_DISCARD 0x0004
265 #define EFX_RX_PKT_TCP 0x0040
266 #define EFX_RX_PKT_PREFIX_LEN 0x0080 /* length is in prefix only */
269 * struct efx_rx_page_state - Page-based rx buffer state
271 * Inserted at the start of every page allocated for receive buffers.
272 * Used to facilitate sharing dma mappings between recycled rx buffers
273 * and those passed up to the kernel.
275 * @refcnt: Number of struct efx_rx_buffer's referencing this page.
276 * When refcnt falls to zero, the page is unmapped for dma
277 * @dma_addr: The dma address of this page.
279 struct efx_rx_page_state
{
283 unsigned int __pad
[0] ____cacheline_aligned
;
287 * struct efx_rx_queue - An Efx RX queue
288 * @efx: The associated Efx NIC
289 * @core_index: Index of network core RX queue. Will be >= 0 iff this
290 * is associated with a real RX queue.
291 * @buffer: The software buffer ring
292 * @rxd: The hardware descriptor ring
293 * @ptr_mask: The size of the ring minus 1.
294 * @refill_enabled: Enable refill whenever fill level is low
295 * @flush_pending: Set when a RX flush is pending. Has the same lifetime as
296 * @rxq_flush_pending.
297 * @added_count: Number of buffers added to the receive queue.
298 * @notified_count: Number of buffers given to NIC (<= @added_count).
299 * @removed_count: Number of buffers removed from the receive queue.
300 * @scatter_n: Used by NIC specific receive code.
301 * @scatter_len: Used by NIC specific receive code.
302 * @page_ring: The ring to store DMA mapped pages for reuse.
303 * @page_add: Counter to calculate the write pointer for the recycle ring.
304 * @page_remove: Counter to calculate the read pointer for the recycle ring.
305 * @page_recycle_count: The number of pages that have been recycled.
306 * @page_recycle_failed: The number of pages that couldn't be recycled because
307 * the kernel still held a reference to them.
308 * @page_recycle_full: The number of pages that were released because the
309 * recycle ring was full.
310 * @page_ptr_mask: The number of pages in the RX recycle ring minus 1.
311 * @max_fill: RX descriptor maximum fill level (<= ring size)
312 * @fast_fill_trigger: RX descriptor fill level that will trigger a fast fill
314 * @min_fill: RX descriptor minimum non-zero fill level.
315 * This records the minimum fill level observed when a ring
316 * refill was triggered.
317 * @recycle_count: RX buffer recycle counter.
318 * @slow_fill: Timer used to defer efx_nic_generate_fill_event().
320 struct efx_rx_queue
{
323 struct efx_rx_buffer
*buffer
;
324 struct efx_special_buffer rxd
;
325 unsigned int ptr_mask
;
329 unsigned int added_count
;
330 unsigned int notified_count
;
331 unsigned int removed_count
;
332 unsigned int scatter_n
;
333 unsigned int scatter_len
;
334 struct page
**page_ring
;
335 unsigned int page_add
;
336 unsigned int page_remove
;
337 unsigned int page_recycle_count
;
338 unsigned int page_recycle_failed
;
339 unsigned int page_recycle_full
;
340 unsigned int page_ptr_mask
;
341 unsigned int max_fill
;
342 unsigned int fast_fill_trigger
;
343 unsigned int min_fill
;
344 unsigned int min_overfill
;
345 unsigned int recycle_count
;
346 struct timer_list slow_fill
;
347 unsigned int slow_fill_count
;
350 enum efx_rx_alloc_method
{
351 RX_ALLOC_METHOD_AUTO
= 0,
352 RX_ALLOC_METHOD_SKB
= 1,
353 RX_ALLOC_METHOD_PAGE
= 2,
357 * struct efx_channel - An Efx channel
359 * A channel comprises an event queue, at least one TX queue, at least
360 * one RX queue, and an associated tasklet for processing the event
363 * @efx: Associated Efx NIC
364 * @channel: Channel instance number
365 * @type: Channel type definition
366 * @eventq_init: Event queue initialised flag
367 * @enabled: Channel enabled indicator
368 * @irq: IRQ number (MSI and MSI-X only)
369 * @irq_moderation: IRQ moderation value (in hardware ticks)
370 * @napi_dev: Net device used with NAPI
371 * @napi_str: NAPI control structure
372 * @eventq: Event queue buffer
373 * @eventq_mask: Event queue pointer mask
374 * @eventq_read_ptr: Event queue read pointer
375 * @event_test_cpu: Last CPU to handle interrupt or test event for this channel
376 * @irq_count: Number of IRQs since last adaptive moderation decision
377 * @irq_mod_score: IRQ moderation score
378 * @n_rx_tobe_disc: Count of RX_TOBE_DISC errors
379 * @n_rx_ip_hdr_chksum_err: Count of RX IP header checksum errors
380 * @n_rx_tcp_udp_chksum_err: Count of RX TCP and UDP checksum errors
381 * @n_rx_mcast_mismatch: Count of unmatched multicast frames
382 * @n_rx_frm_trunc: Count of RX_FRM_TRUNC errors
383 * @n_rx_overlength: Count of RX_OVERLENGTH errors
384 * @n_skbuff_leaks: Count of skbuffs leaked due to RX overrun
385 * @n_rx_nodesc_trunc: Number of RX packets truncated and then dropped due to
386 * lack of descriptors
387 * @rx_pkt_n_frags: Number of fragments in next packet to be delivered by
388 * __efx_rx_packet(), or zero if there is none
389 * @rx_pkt_index: Ring index of first buffer for next packet to be delivered
390 * by __efx_rx_packet(), if @rx_pkt_n_frags != 0
391 * @rx_queue: RX queue for this channel
392 * @tx_queue: TX queues for this channel
397 const struct efx_channel_type
*type
;
401 unsigned int irq_moderation
;
402 struct net_device
*napi_dev
;
403 struct napi_struct napi_str
;
404 struct efx_special_buffer eventq
;
405 unsigned int eventq_mask
;
406 unsigned int eventq_read_ptr
;
409 unsigned int irq_count
;
410 unsigned int irq_mod_score
;
411 #ifdef CONFIG_RFS_ACCEL
412 unsigned int rfs_filters_added
;
415 unsigned n_rx_tobe_disc
;
416 unsigned n_rx_ip_hdr_chksum_err
;
417 unsigned n_rx_tcp_udp_chksum_err
;
418 unsigned n_rx_mcast_mismatch
;
419 unsigned n_rx_frm_trunc
;
420 unsigned n_rx_overlength
;
421 unsigned n_skbuff_leaks
;
422 unsigned int n_rx_nodesc_trunc
;
424 unsigned int rx_pkt_n_frags
;
425 unsigned int rx_pkt_index
;
427 struct efx_rx_queue rx_queue
;
428 struct efx_tx_queue tx_queue
[EFX_TXQ_TYPES
];
432 * struct efx_msi_context - Context for each MSI
433 * @efx: The associated NIC
434 * @index: Index of the channel/IRQ
435 * @name: Name of the channel/IRQ
437 * Unlike &struct efx_channel, this is never reallocated and is always
438 * safe for the IRQ handler to access.
440 struct efx_msi_context
{
443 char name
[IFNAMSIZ
+ 6];
447 * struct efx_channel_type - distinguishes traffic and extra channels
448 * @handle_no_channel: Handle failure to allocate an extra channel
449 * @pre_probe: Set up extra state prior to initialisation
450 * @post_remove: Tear down extra state after finalisation, if allocated.
451 * May be called on channels that have not been probed.
452 * @get_name: Generate the channel's name (used for its IRQ handler)
453 * @copy: Copy the channel state prior to reallocation. May be %NULL if
454 * reallocation is not supported.
455 * @receive_skb: Handle an skb ready to be passed to netif_receive_skb()
456 * @keep_eventq: Flag for whether event queue should be kept initialised
457 * while the device is stopped
459 struct efx_channel_type
{
460 void (*handle_no_channel
)(struct efx_nic
*);
461 int (*pre_probe
)(struct efx_channel
*);
462 void (*post_remove
)(struct efx_channel
*);
463 void (*get_name
)(struct efx_channel
*, char *buf
, size_t len
);
464 struct efx_channel
*(*copy
)(const struct efx_channel
*);
465 bool (*receive_skb
)(struct efx_channel
*, struct sk_buff
*);
475 #define STRING_TABLE_LOOKUP(val, member) \
476 ((val) < member ## _max) ? member ## _names[val] : "(invalid)"
478 extern const char *const efx_loopback_mode_names
[];
479 extern const unsigned int efx_loopback_mode_max
;
480 #define LOOPBACK_MODE(efx) \
481 STRING_TABLE_LOOKUP((efx)->loopback_mode, efx_loopback_mode)
483 extern const char *const efx_reset_type_names
[];
484 extern const unsigned int efx_reset_type_max
;
485 #define RESET_TYPE(type) \
486 STRING_TABLE_LOOKUP(type, efx_reset_type)
489 /* Be careful if altering to correct macro below */
490 EFX_INT_MODE_MSIX
= 0,
491 EFX_INT_MODE_MSI
= 1,
492 EFX_INT_MODE_LEGACY
= 2,
493 EFX_INT_MODE_MAX
/* Insert any new items before this */
495 #define EFX_INT_MODE_USE_MSI(x) (((x)->interrupt_mode) <= EFX_INT_MODE_MSI)
498 STATE_UNINIT
= 0, /* device being probed/removed or is frozen */
499 STATE_READY
= 1, /* hardware ready and netdev registered */
500 STATE_DISABLED
= 2, /* device disabled due to hardware errors */
501 STATE_RECOVERY
= 3, /* device recovering from PCI error */
505 * Alignment of the skb->head which wraps a page-allocated RX buffer
507 * The skb allocated to wrap an rx_buffer can have this alignment. Since
508 * the data is memcpy'd from the rx_buf, it does not need to be equal to
511 #define EFX_PAGE_SKB_ALIGN 2
513 /* Forward declaration */
516 /* Pseudo bit-mask flow control field */
517 #define EFX_FC_RX FLOW_CTRL_RX
518 #define EFX_FC_TX FLOW_CTRL_TX
519 #define EFX_FC_AUTO 4
522 * struct efx_link_state - Current state of the link
524 * @fd: Link is full-duplex
525 * @fc: Actual flow control flags
526 * @speed: Link speed (Mbps)
528 struct efx_link_state
{
535 static inline bool efx_link_state_equal(const struct efx_link_state
*left
,
536 const struct efx_link_state
*right
)
538 return left
->up
== right
->up
&& left
->fd
== right
->fd
&&
539 left
->fc
== right
->fc
&& left
->speed
== right
->speed
;
543 * struct efx_phy_operations - Efx PHY operations table
544 * @probe: Probe PHY and initialise efx->mdio.mode_support, efx->mdio.mmds,
545 * efx->loopback_modes.
546 * @init: Initialise PHY
547 * @fini: Shut down PHY
548 * @reconfigure: Reconfigure PHY (e.g. for new link parameters)
549 * @poll: Update @link_state and report whether it changed.
550 * Serialised by the mac_lock.
551 * @get_settings: Get ethtool settings. Serialised by the mac_lock.
552 * @set_settings: Set ethtool settings. Serialised by the mac_lock.
553 * @set_npage_adv: Set abilities advertised in (Extended) Next Page
554 * (only needed where AN bit is set in mmds)
555 * @test_alive: Test that PHY is 'alive' (online)
556 * @test_name: Get the name of a PHY-specific test/result
557 * @run_tests: Run tests and record results as appropriate (offline).
558 * Flags are the ethtool tests flags.
560 struct efx_phy_operations
{
561 int (*probe
) (struct efx_nic
*efx
);
562 int (*init
) (struct efx_nic
*efx
);
563 void (*fini
) (struct efx_nic
*efx
);
564 void (*remove
) (struct efx_nic
*efx
);
565 int (*reconfigure
) (struct efx_nic
*efx
);
566 bool (*poll
) (struct efx_nic
*efx
);
567 void (*get_settings
) (struct efx_nic
*efx
,
568 struct ethtool_cmd
*ecmd
);
569 int (*set_settings
) (struct efx_nic
*efx
,
570 struct ethtool_cmd
*ecmd
);
571 void (*set_npage_adv
) (struct efx_nic
*efx
, u32
);
572 int (*test_alive
) (struct efx_nic
*efx
);
573 const char *(*test_name
) (struct efx_nic
*efx
, unsigned int index
);
574 int (*run_tests
) (struct efx_nic
*efx
, int *results
, unsigned flags
);
575 int (*get_module_eeprom
) (struct efx_nic
*efx
,
576 struct ethtool_eeprom
*ee
,
578 int (*get_module_info
) (struct efx_nic
*efx
,
579 struct ethtool_modinfo
*modinfo
);
583 * enum efx_phy_mode - PHY operating mode flags
584 * @PHY_MODE_NORMAL: on and should pass traffic
585 * @PHY_MODE_TX_DISABLED: on with TX disabled
586 * @PHY_MODE_LOW_POWER: set to low power through MDIO
587 * @PHY_MODE_OFF: switched off through external control
588 * @PHY_MODE_SPECIAL: on but will not pass traffic
592 PHY_MODE_TX_DISABLED
= 1,
593 PHY_MODE_LOW_POWER
= 2,
595 PHY_MODE_SPECIAL
= 8,
598 static inline bool efx_phy_mode_disabled(enum efx_phy_mode mode
)
600 return !!(mode
& ~PHY_MODE_TX_DISABLED
);
604 * struct efx_hw_stat_desc - Description of a hardware statistic
605 * @name: Name of the statistic as visible through ethtool, or %NULL if
606 * it should not be exposed
607 * @dma_width: Width in bits (0 for non-DMA statistics)
608 * @offset: Offset within stats (ignored for non-DMA statistics)
610 struct efx_hw_stat_desc
{
616 /* Number of bits used in a multicast filter hash address */
617 #define EFX_MCAST_HASH_BITS 8
619 /* Number of (single-bit) entries in a multicast filter hash */
620 #define EFX_MCAST_HASH_ENTRIES (1 << EFX_MCAST_HASH_BITS)
622 /* An Efx multicast filter hash */
623 union efx_multicast_hash
{
624 u8 byte
[EFX_MCAST_HASH_ENTRIES
/ 8];
625 efx_oword_t oword
[EFX_MCAST_HASH_ENTRIES
/ sizeof(efx_oword_t
) / 8];
632 * struct efx_nic - an Efx NIC
633 * @name: Device name (net device name or bus id before net device registered)
634 * @pci_dev: The PCI device
635 * @type: Controller type attributes
636 * @legacy_irq: IRQ number
637 * @workqueue: Workqueue for port reconfigures and the HW monitor.
638 * Work items do not hold and must not acquire RTNL.
639 * @workqueue_name: Name of workqueue
640 * @reset_work: Scheduled reset workitem
641 * @membase_phys: Memory BAR value as physical address
642 * @membase: Memory BAR value
643 * @interrupt_mode: Interrupt mode
644 * @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
645 * @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
646 * @irq_rx_moderation: IRQ moderation time for RX event queues
647 * @msg_enable: Log message enable flags
648 * @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
649 * @reset_pending: Bitmask for pending resets
650 * @tx_queue: TX DMA queues
651 * @rx_queue: RX DMA queues
653 * @msi_context: Context for each MSI
654 * @extra_channel_types: Types of extra (non-traffic) channels that
655 * should be allocated for this NIC
656 * @rxq_entries: Size of receive queues requested by user.
657 * @txq_entries: Size of transmit queues requested by user.
658 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
659 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
660 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
661 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
662 * @sram_lim_qw: Qword address limit of SRAM
663 * @next_buffer_table: First available buffer table id
664 * @n_channels: Number of channels in use
665 * @n_rx_channels: Number of channels used for RX (= number of RX queues)
666 * @n_tx_channels: Number of channels used for TX
667 * @rx_dma_len: Current maximum RX DMA length
668 * @rx_buffer_order: Order (log2) of number of pages for each RX buffer
669 * @rx_buffer_truesize: Amortised allocation size of an RX buffer,
670 * for use in sk_buff::truesize
671 * @rx_prefix_size: Size of RX prefix before packet data
672 * @rx_packet_hash_offset: Offset of RX flow hash from start of packet data
673 * (valid only if @rx_prefix_size != 0; always negative)
674 * @rx_packet_len_offset: Offset of RX packet length from start of packet data
675 * (valid only for NICs that set %EFX_RX_PKT_PREFIX_LEN; always negative)
676 * @rx_hash_key: Toeplitz hash key for RSS
677 * @rx_indir_table: Indirection table for RSS
678 * @rx_scatter: Scatter mode enabled for receives
679 * @int_error_count: Number of internal errors seen recently
680 * @int_error_expire: Time at which error count will be expired
681 * @irq_soft_enabled: Are IRQs soft-enabled? If not, IRQ handler will
682 * acknowledge but do nothing else.
683 * @irq_status: Interrupt status buffer
684 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
685 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
686 * @selftest_work: Work item for asynchronous self-test
687 * @mtd_list: List of MTDs attached to the NIC
688 * @nic_data: Hardware dependent state
689 * @mcdi: Management-Controller-to-Driver Interface state
690 * @mac_lock: MAC access lock. Protects @port_enabled, @phy_mode,
691 * efx_monitor() and efx_reconfigure_port()
692 * @port_enabled: Port enabled indicator.
693 * Serialises efx_stop_all(), efx_start_all(), efx_monitor() and
694 * efx_mac_work() with kernel interfaces. Safe to read under any
695 * one of the rtnl_lock, mac_lock, or netif_tx_lock, but all three must
696 * be held to modify it.
697 * @port_initialized: Port initialized?
698 * @net_dev: Operating system network device. Consider holding the rtnl lock
699 * @stats_buffer: DMA buffer for statistics
700 * @phy_type: PHY type
701 * @phy_op: PHY interface
702 * @phy_data: PHY private data (including PHY-specific stats)
703 * @mdio: PHY MDIO interface
704 * @mdio_bus: PHY MDIO bus ID (only used by Siena)
705 * @phy_mode: PHY operating mode. Serialised by @mac_lock.
706 * @link_advertising: Autonegotiation advertising flags
707 * @link_state: Current state of the link
708 * @n_link_state_changes: Number of times the link has changed state
709 * @unicast_filter: Flag for Falcon-arch simple unicast filter.
710 * Protected by @mac_lock.
711 * @multicast_hash: Multicast hash table for Falcon-arch.
712 * Protected by @mac_lock.
713 * @wanted_fc: Wanted flow control flags
714 * @fc_disable: When non-zero flow control is disabled. Typically used to
715 * ensure that network back pressure doesn't delay dma queue flushes.
716 * Serialised by the rtnl lock.
717 * @mac_work: Work item for changing MAC promiscuity and multicast hash
718 * @loopback_mode: Loopback status
719 * @loopback_modes: Supported loopback mode bitmask
720 * @loopback_selftest: Offline self-test private state
721 * @filter_lock: Filter table lock
722 * @filter_state: Architecture-dependent filter table state
723 * @rps_flow_id: Flow IDs of filters allocated for accelerated RFS,
724 * indexed by filter ID
725 * @rps_expire_index: Next index to check for expiry in @rps_flow_id
726 * @drain_pending: Count of RX and TX queues that haven't been flushed and drained.
727 * @rxq_flush_pending: Count of number of receive queues that need to be flushed.
728 * Decremented when the efx_flush_rx_queue() is called.
729 * @rxq_flush_outstanding: Count of number of RX flushes started but not yet
730 * completed (either success or failure). Not used when MCDI is used to
731 * flush receive queues.
732 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
733 * @vf: Array of &struct efx_vf objects.
734 * @vf_count: Number of VFs intended to be enabled.
735 * @vf_init_count: Number of VFs that have been fully initialised.
736 * @vi_scale: log2 number of vnics per VF.
737 * @vf_buftbl_base: The zeroth buffer table index used to back VF queues.
738 * @vfdi_status: Common VFDI status page to be dmad to VF address space.
739 * @local_addr_list: List of local addresses. Protected by %local_lock.
740 * @local_page_list: List of DMA addressable pages used to broadcast
741 * %local_addr_list. Protected by %local_lock.
742 * @local_lock: Mutex protecting %local_addr_list and %local_page_list.
743 * @peer_work: Work item to broadcast peer addresses to VMs.
744 * @ptp_data: PTP state data
745 * @monitor_work: Hardware monitor workitem
746 * @biu_lock: BIU (bus interface unit) lock
747 * @last_irq_cpu: Last CPU to handle a possible test interrupt. This
748 * field is used by efx_test_interrupts() to verify that an
749 * interrupt has occurred.
750 * @stats_lock: Statistics update lock. Must be held when calling
751 * efx_nic_type::{update,start,stop}_stats.
753 * This is stored in the private area of the &struct net_device.
756 /* The following fields should be written very rarely */
759 struct pci_dev
*pci_dev
;
760 unsigned int port_num
;
761 const struct efx_nic_type
*type
;
763 bool eeh_disabled_legacy_irq
;
764 struct workqueue_struct
*workqueue
;
765 char workqueue_name
[16];
766 struct work_struct reset_work
;
767 resource_size_t membase_phys
;
768 void __iomem
*membase
;
770 enum efx_int_mode interrupt_mode
;
771 unsigned int timer_quantum_ns
;
772 bool irq_rx_adaptive
;
773 unsigned int irq_rx_moderation
;
776 enum nic_state state
;
777 unsigned long reset_pending
;
779 struct efx_channel
*channel
[EFX_MAX_CHANNELS
];
780 struct efx_msi_context msi_context
[EFX_MAX_CHANNELS
];
781 const struct efx_channel_type
*
782 extra_channel_type
[EFX_MAX_EXTRA_CHANNELS
];
784 unsigned rxq_entries
;
785 unsigned txq_entries
;
786 unsigned int txq_stop_thresh
;
787 unsigned int txq_wake_thresh
;
791 unsigned sram_lim_qw
;
792 unsigned next_buffer_table
;
794 unsigned int max_channels
;
796 unsigned n_rx_channels
;
798 unsigned tx_channel_offset
;
799 unsigned n_tx_channels
;
800 unsigned int rx_dma_len
;
801 unsigned int rx_buffer_order
;
802 unsigned int rx_buffer_truesize
;
803 unsigned int rx_page_buf_step
;
804 unsigned int rx_bufs_per_page
;
805 unsigned int rx_pages_per_batch
;
806 unsigned int rx_prefix_size
;
807 int rx_packet_hash_offset
;
808 int rx_packet_len_offset
;
810 u32 rx_indir_table
[128];
813 unsigned int_error_count
;
814 unsigned long int_error_expire
;
816 bool irq_soft_enabled
;
817 struct efx_buffer irq_status
;
818 unsigned irq_zero_count
;
820 struct delayed_work selftest_work
;
822 #ifdef CONFIG_SFC_MTD
823 struct list_head mtd_list
;
827 struct efx_mcdi_data
*mcdi
;
829 struct mutex mac_lock
;
830 struct work_struct mac_work
;
833 bool port_initialized
;
834 struct net_device
*net_dev
;
836 struct efx_buffer stats_buffer
;
838 unsigned int phy_type
;
839 const struct efx_phy_operations
*phy_op
;
841 struct mdio_if_info mdio
;
842 unsigned int mdio_bus
;
843 enum efx_phy_mode phy_mode
;
845 u32 link_advertising
;
846 struct efx_link_state link_state
;
847 unsigned int n_link_state_changes
;
850 union efx_multicast_hash multicast_hash
;
855 enum efx_loopback_mode loopback_mode
;
858 void *loopback_selftest
;
860 spinlock_t filter_lock
;
862 #ifdef CONFIG_RFS_ACCEL
864 unsigned int rps_expire_index
;
867 atomic_t drain_pending
;
868 atomic_t rxq_flush_pending
;
869 atomic_t rxq_flush_outstanding
;
870 wait_queue_head_t flush_wq
;
872 #ifdef CONFIG_SFC_SRIOV
873 struct efx_channel
*vfdi_channel
;
876 unsigned vf_init_count
;
878 unsigned vf_buftbl_base
;
879 struct efx_buffer vfdi_status
;
880 struct list_head local_addr_list
;
881 struct list_head local_page_list
;
882 struct mutex local_lock
;
883 struct work_struct peer_work
;
886 struct efx_ptp_data
*ptp_data
;
888 /* The following fields may be written more often */
890 struct delayed_work monitor_work ____cacheline_aligned_in_smp
;
893 spinlock_t stats_lock
;
896 static inline int efx_dev_registered(struct efx_nic
*efx
)
898 return efx
->net_dev
->reg_state
== NETREG_REGISTERED
;
901 static inline unsigned int efx_port_num(struct efx_nic
*efx
)
903 return efx
->port_num
;
906 struct efx_mtd_partition
{
907 struct list_head node
;
909 const char *dev_type_name
;
910 const char *type_name
;
911 char name
[IFNAMSIZ
+ 20];
915 * struct efx_nic_type - Efx device type definition
916 * @mem_map_size: Get memory BAR mapped size
917 * @probe: Probe the controller
918 * @remove: Free resources allocated by probe()
919 * @init: Initialise the controller
920 * @dimension_resources: Dimension controller resources (buffer table,
921 * and VIs once the available interrupt resources are clear)
922 * @fini: Shut down the controller
923 * @monitor: Periodic function for polling link state and hardware monitor
924 * @map_reset_reason: Map ethtool reset reason to a reset method
925 * @map_reset_flags: Map ethtool reset flags to a reset method, if possible
926 * @reset: Reset the controller hardware and possibly the PHY. This will
927 * be called while the controller is uninitialised.
928 * @probe_port: Probe the MAC and PHY
929 * @remove_port: Free resources allocated by probe_port()
930 * @handle_global_event: Handle a "global" event (may be %NULL)
931 * @fini_dmaq: Flush and finalise DMA queues (RX and TX queues)
932 * @prepare_flush: Prepare the hardware for flushing the DMA queues
933 * (for Falcon architecture)
934 * @finish_flush: Clean up after flushing the DMA queues (for Falcon
936 * @describe_stats: Describe statistics for ethtool
937 * @update_stats: Update statistics not provided by event handling.
938 * Either argument may be %NULL.
939 * @start_stats: Start the regular fetching of statistics
940 * @stop_stats: Stop the regular fetching of statistics
941 * @set_id_led: Set state of identifying LED or revert to automatic function
942 * @push_irq_moderation: Apply interrupt moderation value
943 * @reconfigure_port: Push loopback/power/txdis changes to the MAC and PHY
944 * @prepare_enable_fc_tx: Prepare MAC to enable pause frame TX (may be %NULL)
945 * @reconfigure_mac: Push MAC address, MTU, flow control and filter settings
946 * to the hardware. Serialised by the mac_lock.
947 * @check_mac_fault: Check MAC fault state. True if fault present.
948 * @get_wol: Get WoL configuration from driver state
949 * @set_wol: Push WoL configuration to the NIC
950 * @resume_wol: Synchronise WoL state between driver and MC (e.g. after resume)
951 * @test_chip: Test registers. May use efx_farch_test_registers(), and is
952 * expected to reset the NIC.
953 * @test_nvram: Test validity of NVRAM contents
954 * @mcdi_request: Send an MCDI request with the given header and SDU.
955 * The SDU length may be any value from 0 up to the protocol-
956 * defined maximum, but its buffer will be padded to a multiple
958 * @mcdi_poll_response: Test whether an MCDI response is available.
959 * @mcdi_read_response: Read the MCDI response PDU. The offset will
960 * be a multiple of 4. The length may not be, but the buffer
961 * will be padded so it is safe to round up.
962 * @mcdi_poll_reboot: Test whether the MCDI has rebooted. If so,
963 * return an appropriate error code for aborting any current
964 * request; otherwise return 0.
965 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
966 * be separately enabled after this.
967 * @irq_test_generate: Generate a test IRQ
968 * @irq_disable_non_ev: Disable non-event IRQs on the NIC. Each event
969 * queue must be separately disabled before this.
970 * @irq_handle_msi: Handle MSI for a channel. The @dev_id argument is
971 * a pointer to the &struct efx_msi_context for the channel.
972 * @irq_handle_legacy: Handle legacy interrupt. The @dev_id argument
973 * is a pointer to the &struct efx_nic.
974 * @tx_probe: Allocate resources for TX queue
975 * @tx_init: Initialise TX queue on the NIC
976 * @tx_remove: Free resources for TX queue
977 * @tx_write: Write TX descriptors and doorbell
978 * @rx_push_indir_table: Write RSS indirection table to the NIC
979 * @rx_probe: Allocate resources for RX queue
980 * @rx_init: Initialise RX queue on the NIC
981 * @rx_remove: Free resources for RX queue
982 * @rx_write: Write RX descriptors and doorbell
983 * @rx_defer_refill: Generate a refill reminder event
984 * @ev_probe: Allocate resources for event queue
985 * @ev_init: Initialise event queue on the NIC
986 * @ev_fini: Deinitialise event queue on the NIC
987 * @ev_remove: Free resources for event queue
988 * @ev_process: Process events for a queue, up to the given NAPI quota
989 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
990 * @ev_test_generate: Generate a test event
991 * @filter_table_probe: Probe filter capabilities and set up filter software state
992 * @filter_table_restore: Restore filters removed from hardware
993 * @filter_table_remove: Remove filters from hardware and tear down software state
994 * @filter_update_rx_scatter: Update filters after change to rx scatter setting
995 * @filter_insert: add or replace a filter
996 * @filter_remove_safe: remove a filter by ID, carefully
997 * @filter_get_safe: retrieve a filter by ID, carefully
998 * @filter_clear_rx: remove RX filters by priority
999 * @filter_count_rx_used: Get the number of filters in use at a given priority
1000 * @filter_get_rx_id_limit: Get maximum value of a filter id, plus 1
1001 * @filter_get_rx_ids: Get list of RX filters at a given priority
1002 * @filter_rfs_insert: Add or replace a filter for RFS. This must be
1003 * atomic. The hardware change may be asynchronous but should
1004 * not be delayed for long. It may fail if this can't be done
1006 * @filter_rfs_expire_one: Consider expiring a filter inserted for RFS.
1007 * This must check whether the specified table entry is used by RFS
1008 * and that rps_may_expire_flow() returns true for it.
1009 * @mtd_probe: Probe and add MTD partitions associated with this net device,
1010 * using efx_mtd_add()
1011 * @mtd_rename: Set an MTD partition name using the net device name
1012 * @mtd_read: Read from an MTD partition
1013 * @mtd_erase: Erase part of an MTD partition
1014 * @mtd_write: Write to an MTD partition
1015 * @mtd_sync: Wait for write-back to complete on MTD partition. This
1016 * also notifies the driver that a writer has finished using this
1018 * @revision: Hardware architecture revision
1019 * @txd_ptr_tbl_base: TX descriptor ring base address
1020 * @rxd_ptr_tbl_base: RX descriptor ring base address
1021 * @buf_tbl_base: Buffer table base address
1022 * @evq_ptr_tbl_base: Event queue pointer table base address
1023 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1024 * @max_dma_mask: Maximum possible DMA mask
1025 * @rx_prefix_size: Size of RX prefix before packet data
1026 * @rx_hash_offset: Offset of RX flow hash within prefix
1027 * @rx_buffer_padding: Size of padding at end of RX packet
1028 * @can_rx_scatter: NIC is able to scatter packets to multiple buffers
1029 * @always_rx_scatter: NIC will always scatter packets to multiple buffers
1030 * @max_interrupt_mode: Highest capability interrupt mode supported
1031 * from &enum efx_init_mode.
1032 * @timer_period_max: Maximum period of interrupt timer (in ticks)
1033 * @offload_features: net_device feature flags for protocol offload
1034 * features implemented in hardware
1035 * @mcdi_max_ver: Maximum MCDI version supported
1037 struct efx_nic_type
{
1038 unsigned int (*mem_map_size
)(struct efx_nic
*efx
);
1039 int (*probe
)(struct efx_nic
*efx
);
1040 void (*remove
)(struct efx_nic
*efx
);
1041 int (*init
)(struct efx_nic
*efx
);
1042 int (*dimension_resources
)(struct efx_nic
*efx
);
1043 void (*fini
)(struct efx_nic
*efx
);
1044 void (*monitor
)(struct efx_nic
*efx
);
1045 enum reset_type (*map_reset_reason
)(enum reset_type reason
);
1046 int (*map_reset_flags
)(u32
*flags
);
1047 int (*reset
)(struct efx_nic
*efx
, enum reset_type method
);
1048 int (*probe_port
)(struct efx_nic
*efx
);
1049 void (*remove_port
)(struct efx_nic
*efx
);
1050 bool (*handle_global_event
)(struct efx_channel
*channel
, efx_qword_t
*);
1051 int (*fini_dmaq
)(struct efx_nic
*efx
);
1052 void (*prepare_flush
)(struct efx_nic
*efx
);
1053 void (*finish_flush
)(struct efx_nic
*efx
);
1054 size_t (*describe_stats
)(struct efx_nic
*efx
, u8
*names
);
1055 size_t (*update_stats
)(struct efx_nic
*efx
, u64
*full_stats
,
1056 struct rtnl_link_stats64
*core_stats
);
1057 void (*start_stats
)(struct efx_nic
*efx
);
1058 void (*stop_stats
)(struct efx_nic
*efx
);
1059 void (*set_id_led
)(struct efx_nic
*efx
, enum efx_led_mode mode
);
1060 void (*push_irq_moderation
)(struct efx_channel
*channel
);
1061 int (*reconfigure_port
)(struct efx_nic
*efx
);
1062 void (*prepare_enable_fc_tx
)(struct efx_nic
*efx
);
1063 int (*reconfigure_mac
)(struct efx_nic
*efx
);
1064 bool (*check_mac_fault
)(struct efx_nic
*efx
);
1065 void (*get_wol
)(struct efx_nic
*efx
, struct ethtool_wolinfo
*wol
);
1066 int (*set_wol
)(struct efx_nic
*efx
, u32 type
);
1067 void (*resume_wol
)(struct efx_nic
*efx
);
1068 int (*test_chip
)(struct efx_nic
*efx
, struct efx_self_tests
*tests
);
1069 int (*test_nvram
)(struct efx_nic
*efx
);
1070 void (*mcdi_request
)(struct efx_nic
*efx
,
1071 const efx_dword_t
*hdr
, size_t hdr_len
,
1072 const efx_dword_t
*sdu
, size_t sdu_len
);
1073 bool (*mcdi_poll_response
)(struct efx_nic
*efx
);
1074 void (*mcdi_read_response
)(struct efx_nic
*efx
, efx_dword_t
*pdu
,
1075 size_t pdu_offset
, size_t pdu_len
);
1076 int (*mcdi_poll_reboot
)(struct efx_nic
*efx
);
1077 void (*irq_enable_master
)(struct efx_nic
*efx
);
1078 void (*irq_test_generate
)(struct efx_nic
*efx
);
1079 void (*irq_disable_non_ev
)(struct efx_nic
*efx
);
1080 irqreturn_t (*irq_handle_msi
)(int irq
, void *dev_id
);
1081 irqreturn_t (*irq_handle_legacy
)(int irq
, void *dev_id
);
1082 int (*tx_probe
)(struct efx_tx_queue
*tx_queue
);
1083 void (*tx_init
)(struct efx_tx_queue
*tx_queue
);
1084 void (*tx_remove
)(struct efx_tx_queue
*tx_queue
);
1085 void (*tx_write
)(struct efx_tx_queue
*tx_queue
);
1086 void (*rx_push_indir_table
)(struct efx_nic
*efx
);
1087 int (*rx_probe
)(struct efx_rx_queue
*rx_queue
);
1088 void (*rx_init
)(struct efx_rx_queue
*rx_queue
);
1089 void (*rx_remove
)(struct efx_rx_queue
*rx_queue
);
1090 void (*rx_write
)(struct efx_rx_queue
*rx_queue
);
1091 void (*rx_defer_refill
)(struct efx_rx_queue
*rx_queue
);
1092 int (*ev_probe
)(struct efx_channel
*channel
);
1093 int (*ev_init
)(struct efx_channel
*channel
);
1094 void (*ev_fini
)(struct efx_channel
*channel
);
1095 void (*ev_remove
)(struct efx_channel
*channel
);
1096 int (*ev_process
)(struct efx_channel
*channel
, int quota
);
1097 void (*ev_read_ack
)(struct efx_channel
*channel
);
1098 void (*ev_test_generate
)(struct efx_channel
*channel
);
1099 int (*filter_table_probe
)(struct efx_nic
*efx
);
1100 void (*filter_table_restore
)(struct efx_nic
*efx
);
1101 void (*filter_table_remove
)(struct efx_nic
*efx
);
1102 void (*filter_update_rx_scatter
)(struct efx_nic
*efx
);
1103 s32 (*filter_insert
)(struct efx_nic
*efx
,
1104 struct efx_filter_spec
*spec
, bool replace
);
1105 int (*filter_remove_safe
)(struct efx_nic
*efx
,
1106 enum efx_filter_priority priority
,
1108 int (*filter_get_safe
)(struct efx_nic
*efx
,
1109 enum efx_filter_priority priority
,
1110 u32 filter_id
, struct efx_filter_spec
*);
1111 void (*filter_clear_rx
)(struct efx_nic
*efx
,
1112 enum efx_filter_priority priority
);
1113 u32 (*filter_count_rx_used
)(struct efx_nic
*efx
,
1114 enum efx_filter_priority priority
);
1115 u32 (*filter_get_rx_id_limit
)(struct efx_nic
*efx
);
1116 s32 (*filter_get_rx_ids
)(struct efx_nic
*efx
,
1117 enum efx_filter_priority priority
,
1118 u32
*buf
, u32 size
);
1119 #ifdef CONFIG_RFS_ACCEL
1120 s32 (*filter_rfs_insert
)(struct efx_nic
*efx
,
1121 struct efx_filter_spec
*spec
);
1122 bool (*filter_rfs_expire_one
)(struct efx_nic
*efx
, u32 flow_id
,
1123 unsigned int index
);
1125 #ifdef CONFIG_SFC_MTD
1126 int (*mtd_probe
)(struct efx_nic
*efx
);
1127 void (*mtd_rename
)(struct efx_mtd_partition
*part
);
1128 int (*mtd_read
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
1129 size_t *retlen
, u8
*buffer
);
1130 int (*mtd_erase
)(struct mtd_info
*mtd
, loff_t start
, size_t len
);
1131 int (*mtd_write
)(struct mtd_info
*mtd
, loff_t start
, size_t len
,
1132 size_t *retlen
, const u8
*buffer
);
1133 int (*mtd_sync
)(struct mtd_info
*mtd
);
1135 void (*ptp_write_host_time
)(struct efx_nic
*efx
, u32 host_time
);
1138 unsigned int txd_ptr_tbl_base
;
1139 unsigned int rxd_ptr_tbl_base
;
1140 unsigned int buf_tbl_base
;
1141 unsigned int evq_ptr_tbl_base
;
1142 unsigned int evq_rptr_tbl_base
;
1144 unsigned int rx_prefix_size
;
1145 unsigned int rx_hash_offset
;
1146 unsigned int rx_buffer_padding
;
1147 bool can_rx_scatter
;
1148 bool always_rx_scatter
;
1149 unsigned int max_interrupt_mode
;
1150 unsigned int timer_period_max
;
1151 netdev_features_t offload_features
;
1153 unsigned int max_rx_ip_filters
;
1156 /**************************************************************************
1158 * Prototypes and inline functions
1160 *************************************************************************/
1162 static inline struct efx_channel
*
1163 efx_get_channel(struct efx_nic
*efx
, unsigned index
)
1165 EFX_BUG_ON_PARANOID(index
>= efx
->n_channels
);
1166 return efx
->channel
[index
];
1169 /* Iterate over all used channels */
1170 #define efx_for_each_channel(_channel, _efx) \
1171 for (_channel = (_efx)->channel[0]; \
1173 _channel = (_channel->channel + 1 < (_efx)->n_channels) ? \
1174 (_efx)->channel[_channel->channel + 1] : NULL)
1176 /* Iterate over all used channels in reverse */
1177 #define efx_for_each_channel_rev(_channel, _efx) \
1178 for (_channel = (_efx)->channel[(_efx)->n_channels - 1]; \
1180 _channel = _channel->channel ? \
1181 (_efx)->channel[_channel->channel - 1] : NULL)
1183 static inline struct efx_tx_queue
*
1184 efx_get_tx_queue(struct efx_nic
*efx
, unsigned index
, unsigned type
)
1186 EFX_BUG_ON_PARANOID(index
>= efx
->n_tx_channels
||
1187 type
>= EFX_TXQ_TYPES
);
1188 return &efx
->channel
[efx
->tx_channel_offset
+ index
]->tx_queue
[type
];
1191 static inline bool efx_channel_has_tx_queues(struct efx_channel
*channel
)
1193 return channel
->channel
- channel
->efx
->tx_channel_offset
<
1194 channel
->efx
->n_tx_channels
;
1197 static inline struct efx_tx_queue
*
1198 efx_channel_get_tx_queue(struct efx_channel
*channel
, unsigned type
)
1200 EFX_BUG_ON_PARANOID(!efx_channel_has_tx_queues(channel
) ||
1201 type
>= EFX_TXQ_TYPES
);
1202 return &channel
->tx_queue
[type
];
1205 static inline bool efx_tx_queue_used(struct efx_tx_queue
*tx_queue
)
1207 return !(tx_queue
->efx
->net_dev
->num_tc
< 2 &&
1208 tx_queue
->queue
& EFX_TXQ_TYPE_HIGHPRI
);
1211 /* Iterate over all TX queues belonging to a channel */
1212 #define efx_for_each_channel_tx_queue(_tx_queue, _channel) \
1213 if (!efx_channel_has_tx_queues(_channel)) \
1216 for (_tx_queue = (_channel)->tx_queue; \
1217 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES && \
1218 efx_tx_queue_used(_tx_queue); \
1221 /* Iterate over all possible TX queues belonging to a channel */
1222 #define efx_for_each_possible_channel_tx_queue(_tx_queue, _channel) \
1223 if (!efx_channel_has_tx_queues(_channel)) \
1226 for (_tx_queue = (_channel)->tx_queue; \
1227 _tx_queue < (_channel)->tx_queue + EFX_TXQ_TYPES; \
1230 static inline bool efx_channel_has_rx_queue(struct efx_channel
*channel
)
1232 return channel
->rx_queue
.core_index
>= 0;
1235 static inline struct efx_rx_queue
*
1236 efx_channel_get_rx_queue(struct efx_channel
*channel
)
1238 EFX_BUG_ON_PARANOID(!efx_channel_has_rx_queue(channel
));
1239 return &channel
->rx_queue
;
1242 /* Iterate over all RX queues belonging to a channel */
1243 #define efx_for_each_channel_rx_queue(_rx_queue, _channel) \
1244 if (!efx_channel_has_rx_queue(_channel)) \
1247 for (_rx_queue = &(_channel)->rx_queue; \
1251 static inline struct efx_channel
*
1252 efx_rx_queue_channel(struct efx_rx_queue
*rx_queue
)
1254 return container_of(rx_queue
, struct efx_channel
, rx_queue
);
1257 static inline int efx_rx_queue_index(struct efx_rx_queue
*rx_queue
)
1259 return efx_rx_queue_channel(rx_queue
)->channel
;
1262 /* Returns a pointer to the specified receive buffer in the RX
1265 static inline struct efx_rx_buffer
*efx_rx_buffer(struct efx_rx_queue
*rx_queue
,
1268 return &rx_queue
->buffer
[index
];
1273 * EFX_MAX_FRAME_LEN - calculate maximum frame length
1275 * This calculates the maximum frame length that will be used for a
1276 * given MTU. The frame length will be equal to the MTU plus a
1277 * constant amount of header space and padding. This is the quantity
1278 * that the net driver will program into the MAC as the maximum frame
1281 * The 10G MAC requires 8-byte alignment on the frame
1282 * length, so we round up to the nearest 8.
1284 * Re-clocking by the XGXS on RX can reduce an IPG to 32 bits (half an
1285 * XGMII cycle). If the frame length reaches the maximum value in the
1286 * same cycle, the XMAC can miss the IPG altogether. We work around
1287 * this by adding a further 16 bytes.
1289 #define EFX_MAX_FRAME_LEN(mtu) \
1290 ((((mtu) + ETH_HLEN + VLAN_HLEN + 4/* FCS */ + 7) & ~7) + 16)
1292 static inline bool efx_xmit_with_hwtstamp(struct sk_buff
*skb
)
1294 return skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
;
1296 static inline void efx_xmit_hwtstamp_pending(struct sk_buff
*skb
)
1298 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
1301 #endif /* EFX_NET_DRIVER_H */